This patch should be applied to an un-modified XFree86 version 4.5.0 source tree. It is patch 3 of 4 patches that will will convert the source tree to XFree86 version 4.6.0. To apply this patch, run the following from the directory containing your 'xc' directory: patch -p0 -E < XFree86-4.5.0-4.6.0.diff1 patch -p0 -E < XFree86-4.5.0-4.6.0.diff2 patch -p0 -E < XFree86-4.5.0-4.6.0.diff3 patch -p0 -E < XFree86-4.5.0-4.6.0.diff4 sh XFree86-4.5.0-4.6.0-cleanup.sh gzip -d < XFree86-4.5.0-4.6.0-diff0.tgz | tar vxf - ------------------------------------------------------------------------------- Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_setmode.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_setmode.h:1.1 --- /dev/null Tue May 9 21:57:01 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_setmode.h Mon May 2 09:28:02 2005 @@ -0,0 +1,33 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_setmode.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ + +#ifndef _VBSETMODE_ +#define _VBSETMODE_ + +extern void XGI_InitTo330Pointer(UCHAR,PVB_DEVICE_INFO); +extern void XGI_UnLockCRT2(PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO ); +extern void XGI_LockCRT2(PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO ); +extern void XGI_LongWait( PVB_DEVICE_INFO ); +extern void XGI_SetCRT2ModeRegs(USHORT ModeNo,PXGI_HW_DEVICE_INFO, PVB_DEVICE_INFO ); +extern void XGI_DisableBridge(PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO ); +extern void XGI_EnableBridge(PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO ); +extern void XGI_DisplayOff( PVB_DEVICE_INFO ); +extern void XGI_DisplayOn( PVB_DEVICE_INFO ); +extern void XGI_GetVBType(PVB_DEVICE_INFO); +extern void XGI_SenseCRT1(PVB_DEVICE_INFO ); +extern void XGI_GetVGAType(PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO ); +extern void XGI_GetVBInfo(USHORT ModeNo,USHORT ModeIdIndex,PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO ); +extern void XGI_GetTVInfo(USHORT ModeNo,USHORT ModeIdIndex, PVB_DEVICE_INFO ); +extern void XGI_SetCRT1Offset(USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex,PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO ); +extern void XGI_SetLCDAGroup(USHORT ModeNo,USHORT ModeIdIndex,PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO ); +extern void XGI_WaitDisply( PVB_DEVICE_INFO ); + +extern BOOLEAN XGISetModeNew( PXGI_HW_DEVICE_INFO HwDeviceExtension , USHORT ModeNo ) ; +extern BOOLEAN XGI_CheckDualChip(PVB_DEVICE_INFO ); +extern BOOLEAN XGI_SearchModeID( USHORT ModeNo,USHORT *ModeIdIndex, PVB_DEVICE_INFO ); +extern BOOLEAN XGI_GetLCDInfo(USHORT ModeNo,USHORT ModeIdIndex,PVB_DEVICE_INFO ); +extern BOOLEAN XGI_BridgeIsOn( PVB_DEVICE_INFO ); +extern BOOLEAN XGI_SetCRT2Group301(USHORT ModeNo, PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO); +extern USHORT XGI_GetRatePtrCRT2( USHORT ModeNo,USHORT ModeIdIndex, PVB_DEVICE_INFO ); + + +#endif Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_struct.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_struct.h:1.1 --- /dev/null Tue May 9 21:57:01 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_struct.h Mon May 2 09:28:02 2005 @@ -0,0 +1,471 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_struct.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ + +#ifndef _VB_STRUCT_ +#define _VB_STRUCT_ + +#ifdef _INITNEW_ +#define EXTERN +#else +#define EXTERN extern +#endif + + + + +typedef struct _XGI_PanelDelayTblStruct +{ + UCHAR timer[2]; +} XGI_PanelDelayTblStruct; + +typedef struct _XGI_LCDDataStruct +{ + USHORT RVBHCMAX; + USHORT RVBHCFACT; + USHORT VGAHT; + USHORT VGAVT; + USHORT LCDHT; + USHORT LCDVT; +} XGI_LCDDataStruct; + + +typedef struct _XGI_LVDSCRT1HDataStruct +{ + UCHAR Reg[8]; +} XGI_LVDSCRT1HDataStruct; +typedef struct _XGI_LVDSCRT1VDataStruct +{ + UCHAR Reg[7]; +} XGI_LVDSCRT1VDataStruct; + + +typedef struct _XGI_TVDataStruct +{ + USHORT RVBHCMAX; + USHORT RVBHCFACT; + USHORT VGAHT; + USHORT VGAVT; + USHORT TVHDE; + USHORT TVVDE; + USHORT RVBHRS; + UCHAR FlickerMode; + USHORT HALFRVBHRS; + UCHAR RY1COE; + UCHAR RY2COE; + UCHAR RY3COE; + UCHAR RY4COE; +} XGI_TVDataStruct; + +typedef struct _XGI_LVDSDataStruct +{ + USHORT VGAHT; + USHORT VGAVT; + USHORT LCDHT; + USHORT LCDVT; +} XGI_LVDSDataStruct; + +typedef struct _XGI_LVDSDesStruct +{ + USHORT LCDHDES; + USHORT LCDVDES; +} XGI_LVDSDesStruct; + +typedef struct _XGI_LVDSCRT1DataStruct +{ + UCHAR CR[15]; +} XGI_LVDSCRT1DataStruct; + +/*add for LCDA*/ + + +typedef struct _XGI_StStruct +{ + UCHAR St_ModeID; + USHORT St_ModeFlag; + UCHAR St_StTableIndex; + UCHAR St_CRT2CRTC; + UCHAR St_CRT2CRTC2; + UCHAR St_ResInfo; + UCHAR VB_StTVFlickerIndex; + UCHAR VB_StTVEdgeIndex; + UCHAR VB_StTVYFilterIndex; +} XGI_StStruct; + +typedef struct _XGI_StandTableStruct +{ + UCHAR CRT_COLS; + UCHAR ROWS; + UCHAR CHAR_HEIGHT; + USHORT CRT_LEN; + UCHAR SR[4]; + UCHAR MISC; + UCHAR CRTC[0x19]; + UCHAR ATTR[0x14]; + UCHAR GRC[9]; +} XGI_StandTableStruct; + +typedef struct _XGI_ExtStruct +{ + UCHAR Ext_ModeID; + USHORT Ext_ModeFlag; + USHORT Ext_ModeInfo; + USHORT Ext_Point; + USHORT Ext_VESAID; + UCHAR Ext_VESAMEMSize; + UCHAR Ext_RESINFO; + UCHAR VB_ExtTVFlickerIndex; + UCHAR VB_ExtTVEdgeIndex; + UCHAR VB_ExtTVYFilterIndex; + UCHAR REFindex; +} XGI_ExtStruct; + +typedef struct _XGI_Ext2Struct +{ + USHORT Ext_InfoFlag; + UCHAR Ext_CRT1CRTC; + UCHAR Ext_CRTVCLK; + UCHAR Ext_CRT2CRTC; + UCHAR Ext_CRT2CRTC2; + UCHAR ModeID; + USHORT XRes; + USHORT YRes; + /* USHORT ROM_OFFSET; */ +} XGI_Ext2Struct; + + +typedef struct _XGI_MCLKDataStruct +{ + UCHAR SR28,SR29,SR2A; + USHORT CLOCK; +} XGI_MCLKDataStruct; + +typedef struct _XGI_ECLKDataStruct +{ + UCHAR SR2E,SR2F,SR30; + USHORT CLOCK; +} XGI_ECLKDataStruct; + +typedef struct _XGI_VCLKDataStruct +{ + UCHAR SR2B,SR2C; + USHORT CLOCK; +} XGI_VCLKDataStruct; + +typedef struct _XGI_VBVCLKDataStruct +{ + UCHAR Part4_A,Part4_B; + USHORT CLOCK; +} XGI_VBVCLKDataStruct; + +typedef struct _XGI_StResInfoStruct +{ + USHORT HTotal; + USHORT VTotal; +} XGI_StResInfoStruct; + +typedef struct _XGI_ModeResInfoStruct +{ + USHORT HTotal; + USHORT VTotal; + UCHAR XChar; + UCHAR YChar; +} XGI_ModeResInfoStruct; + +typedef struct _XGI_LCDNBDesStruct +{ + UCHAR NB[12]; +} XGI_LCDNBDesStruct; + /*add for new UNIVGABIOS*/ +typedef struct _XGI_LCDDesStruct +{ + USHORT LCDHDES; + USHORT LCDHRS; + USHORT LCDVDES; + USHORT LCDVRS; +} XGI_LCDDesStruct; + +typedef struct _XGI_LCDDataTablStruct +{ + UCHAR PANELID; + USHORT MASK; + USHORT CAP; + USHORT DATAPTR; +} XGI_LCDDataTablStruct; + +typedef struct _XGI_TVTablDataStruct +{ + USHORT MASK; + USHORT CAP; + USHORT DATAPTR; +} XGI_TVDataTablStruct; + +typedef struct _XGI330_LCDDesDataStruct +{ + USHORT LCDHDES; + USHORT LCDHRS; + USHORT LCDVDES; + USHORT LCDVRS; +} XGI330_LCDDataDesStruct; + + +typedef struct _XGI330_LVDSDataStruct +{ + USHORT VGAHT; + USHORT VGAVT; + USHORT LCDHT; + USHORT LCDVT; +} XGI330_LVDSDataStruct; + +typedef struct _XGI330_LCDDesDataStruct2 +{ + USHORT LCDHDES; + USHORT LCDHRS; + USHORT LCDVDES; + USHORT LCDVRS; + USHORT LCDHSync; + USHORT LCDVSync; +} XGI330_LCDDataDesStruct2; + +typedef struct _XGI330_LCDDataStruct +{ + USHORT RVBHCMAX; + USHORT RVBHCFACT; + USHORT VGAHT; + USHORT VGAVT; + USHORT LCDHT; + USHORT LCDVT; +} XGI330_LCDDataStruct; + + +typedef struct _XGI330_TVDataStruct +{ + USHORT RVBHCMAX; + USHORT RVBHCFACT; + USHORT VGAHT; + USHORT VGAVT; + USHORT TVHDE; + USHORT TVVDE; + USHORT RVBHRS; + UCHAR FlickerMode; + USHORT HALFRVBHRS; +} XGI330_TVDataStruct; + +typedef struct _XGI330_LCDDataTablStruct +{ + UCHAR PANELID; + USHORT MASK; + USHORT CAP; + USHORT DATAPTR; +} XGI330_LCDDataTablStruct; + +typedef struct _XGI330_TVDataTablStruct +{ + USHORT MASK; + USHORT CAP; + USHORT DATAPTR; +} XGI330_TVDataTablStruct; + + +typedef struct _XGI330_CHTVDataStruct +{ + USHORT VGAHT; + USHORT VGAVT; + USHORT LCDHT; + USHORT LCDVT; +} XGI330_CHTVDataStruct; + +typedef struct _XGI_TimingHStruct +{ + UCHAR data[8]; +} XGI_TimingHStruct; + +typedef struct _XGI_TimingVStruct +{ + UCHAR data[7]; +} XGI_TimingVStruct; + +typedef struct _XGI330_CHTVRegDataStruct +{ + UCHAR Reg[16]; +} XGI330_CHTVRegDataStruct; + +typedef struct _XGI330_LCDCapStruct +{ + UCHAR LCD_ID; + USHORT LCD_Capability; + UCHAR LCD_SetFlag; + UCHAR LCD_DelayCompensation; + UCHAR LCD_HSyncWidth; + UCHAR LCD_VSyncWidth; + UCHAR LCD_VCLK; + UCHAR LCDA_VCLKData1; + UCHAR LCDA_VCLKData2; + UCHAR LCUCHAR_VCLKData1; + UCHAR LCUCHAR_VCLKData2; + UCHAR PSC_S1; + UCHAR PSC_S2; + UCHAR PSC_S3; + UCHAR PSC_S4; + UCHAR PSC_S5; + UCHAR PWD_2B; + UCHAR PWD_2C; + UCHAR PWD_2D; + UCHAR PWD_2E; + UCHAR PWD_2F; + UCHAR Spectrum_31; + UCHAR Spectrum_32; + UCHAR Spectrum_33; + UCHAR Spectrum_34; +} XGI330_LCDCapStruct; + +typedef struct _XGI_CRT1TableStruct +{ + UCHAR CR[15]; +} XGI_CRT1TableStruct; + + +typedef struct _XGI330_VCLKDataStruct +{ + UCHAR SR2B,SR2C; + USHORT CLOCK; +} XGI330_VCLKDataStruct; + +typedef struct _XGI301C_Tap4TimingStruct +{ + USHORT DE; + UCHAR Reg[64]; /* C0-FF */ +} XGI301C_Tap4TimingStruct; + +typedef struct _XGI_New_StandTableStruct +{ + UCHAR CRT_COLS; + UCHAR ROWS; + UCHAR CHAR_HEIGHT; + USHORT CRT_LEN; + UCHAR SR[4]; + UCHAR MISC; + UCHAR CRTC[0x19]; + UCHAR ATTR[0x14]; + UCHAR GRC[9]; +} XGI_New_StandTableStruct; + +typedef UCHAR DRAM8Type[8]; +typedef UCHAR DRAM4Type[4]; +typedef UCHAR DRAM32Type[32]; +typedef UCHAR DRAM2Type[2]; + +typedef struct _VB_DEVICE_INFO VB_DEVICE_INFO,*PVB_DEVICE_INFO; + +struct _VB_DEVICE_INFO +{ + BOOLEAN ISXPDOS; + USHORT P3c4,P3d4,P3c0,P3ce,P3c2,P3cc; + USHORT P3ca,P3c6,P3c7,P3c8,P3c9,P3da; + USHORT Part0Port,Part1Port,Part2Port; + USHORT Part3Port,Part4Port,Part5Port; + USHORT RVBHCFACT,RVBHCMAX,RVBHRS; + USHORT VGAVT,VGAHT,VGAVDE,VGAHDE; + USHORT VT,HT,VDE,HDE; + USHORT LCDHRS,LCDVRS,LCDHDES,LCDVDES; + + USHORT ModeType; + USHORT IF_DEF_LVDS,IF_DEF_TRUMPION,IF_DEF_DSTN;/* ,IF_DEF_FSTN; add for dstn */ + USHORT IF_DEF_CRT2Monitor,IF_DEF_VideoCapture; + USHORT IF_DEF_LCDA,IF_DEF_CH7017,IF_DEF_YPbPr,IF_DEF_ScaleLCD,IF_DEF_OEMUtil,IF_DEF_PWD; + USHORT IF_DEF_ExpLink; + USHORT IF_DEF_CH7005,IF_DEF_HiVision; + USHORT LCDResInfo,LCDTypeInfo, VBType;/*301b*/ + USHORT VBInfo,TVInfo,LCDInfo, Set_VGAType; + USHORT VBExtInfo;/*301lv*/ + USHORT SetFlag; + USHORT NewFlickerMode; + USHORT SelectCRT2Rate; + + PUCHAR ROMAddr; + PUCHAR FBAddr; + USHORT BaseAddr; + USHORT RelIO; + + DRAM4Type *CR6B; + DRAM4Type *CR6E; + DRAM32Type *CR6F; + DRAM2Type *CR89; + + DRAM8Type *SR15; /* pointer : point to array */ + DRAM8Type *CR40; + UCHAR *pSoftSetting; + UCHAR *pOutputSelect; + + USHORT *pRGBSenseData; + USHORT *pRGBSenseData2; /*301b*/ + USHORT *pVideoSenseData; + USHORT *pVideoSenseData2; + USHORT *pYCSenseData; + USHORT *pYCSenseData2; + + UCHAR *pSR07; + UCHAR *CR49; + UCHAR *pSR1F; + UCHAR *AGPReg; + UCHAR *SR16; + UCHAR *pSR21; + UCHAR *pSR22; + UCHAR *pSR23; + UCHAR *pSR24; + UCHAR *SR25; + UCHAR *pSR31; + UCHAR *pSR32; + UCHAR *pSR33; + UCHAR *pCRCF; + UCHAR *pCRT2Data_1_2; + UCHAR *pCRT2Data_4_D; + UCHAR *pCRT2Data_4_E; + UCHAR *pCRT2Data_4_10; + XGI_MCLKDataStruct *MCLKData; + XGI_ECLKDataStruct *ECLKData; + + UCHAR *XGI_TVDelayList; + UCHAR *XGI_TVDelayList2; + UCHAR *CHTVVCLKUNTSC; + UCHAR *CHTVVCLKONTSC; + UCHAR *CHTVVCLKUPAL; + UCHAR *CHTVVCLKOPAL; + UCHAR *NTSCTiming; + UCHAR *PALTiming; + UCHAR *HiTVExtTiming; + UCHAR *HiTVSt1Timing; + UCHAR *HiTVSt2Timing; + UCHAR *HiTVTextTiming; + UCHAR *YPbPr750pTiming; + UCHAR *YPbPr525pTiming; + UCHAR *YPbPr525iTiming; + UCHAR *HiTVGroup3Data; + UCHAR *HiTVGroup3Simu; + UCHAR *HiTVGroup3Text; + UCHAR *Ren525pGroup3; + UCHAR *Ren750pGroup3; + UCHAR *ScreenOffset; + UCHAR *pXGINew_DRAMTypeDefinition; + UCHAR *pXGINew_I2CDefinition ; + UCHAR *pXGINew_CR97 ; + + XGI330_LCDCapStruct *LCDCapList; + + XGI_TimingHStruct *TimingH; + XGI_TimingVStruct *TimingV; + + XGI_StStruct *SModeIDTable; + XGI_StandTableStruct *StandTable; + XGI_ExtStruct *EModeIDTable; + XGI_Ext2Struct *RefIndex; + /* XGINew_CRT1TableStruct *CRT1Table; */ + XGI_CRT1TableStruct *XGINEWUB_CRT1Table; + XGI_VCLKDataStruct *VCLKData; + XGI_VBVCLKDataStruct *VBVCLKData; + XGI_StResInfoStruct *StResInfo; + XGI_ModeResInfoStruct *ModeResInfo; +}; /* _VB_DEVICE_INFO */ + + + +#define _VB_STRUCT_ +#endif /* _VB_STRUCT_ */ Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_table.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_table.h:1.2 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_table.h Mon Jun 6 22:09:30 2005 @@ -0,0 +1,4281 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_table.h,v 1.2 2005/06/07 02:09:30 tsi Exp $ */ + +#define Tap4 +#if 0 +static XGI_MCLKDataStruct XGI660_MCLKData[]= +{ + { 0x5C,0x23,0x82,166 }, + { 0x5C,0x23,0x82,166 }, + { 0x37,0x21,0x82,200 }, + { 0x37,0x22,0x82,133 }, + { 0x29,0x21,0x82,150 }, + { 0x5C,0x23,0x82,166 }, + { 0x65,0x23,0x82,183 }, + { 0x37,0x21,0x82,200 } +}; + +static XGI_ECLKDataStruct XGI660_ECLKData[]= +{ + {0x37,0x61,0x82,100}, + {0x37,0x22,0x82,133}, + {0x37,0x22,0x82,133}, + {0x16,0x01,0x82,166}, + {0x16,0x01,0x82,166}, + {0x16,0x01,0x82,166}, + {0x16,0x01,0x82,166}, + {0x16,0x01,0x82,166} + +}; +#endif + +static XGI_ECLKDataStruct XGI330_ECLKData[]= +{ + { 0x5c,0x23,0x01,166}, + { 0x5c,0x23,0x01,166}, + { 0x7C,0x08,0x80,200}, + { 0x79,0x06,0x80,250}, + { 0x29,0x01,0x81,300}, + { 0x29,0x01,0x81,300}, + { 0x29,0x01,0x81,300}, + { 0x29,0x01,0x81,300} +}; + +static XGI_ECLKDataStruct XGI340_ECLKData[]= +{ + { 0x7c,0x08,0x01,200}, + { 0x7c,0x08,0x01,200}, + { 0x7C,0x08,0x80,200}, + { 0x79,0x06,0x80,250}, + { 0x29,0x01,0x81,300}, + { 0x29,0x01,0x81,300}, + { 0x29,0x01,0x81,300}, + { 0x29,0x01,0x81,300} +}; + +static UCHAR XGI340_SR13[4][8]={ +{0xb1,0xb1,0xb1,0x00,0x00,0x00,0x00,0x00},/* SR13 */ +{0x6a,0x5c,0x5c,0x00,0x00,0x00,0x00,0x00},/* SR14 */ +{0x31,0x72,0x42,0x00,0x00,0x00,0x00,0x00},/* SR18 */ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}/* SR1B */ +}; + +static UCHAR XGI340_cr41[24][8]= +{{0x20,0x91,0x60,0x00,0x00,0x00,0x00,0x00},/* 0 CR41 */ +{0x04,0x04,0x84,0x00,0x00,0x00,0x00,0x00},/* 1 CR8A */ +{0x04,0x04,0x84,0x00,0x00,0x00,0x00,0x00},/* 2 CR8B */ +{0xb5,0xc6,0xa4,0x00,0x00,0x00,0x00,0x00}, +{0xf0,0x90,0xf0,0x00,0x00,0x00,0x00,0x00}, +{0xa4,0x24,0x24,0x00,0x00,0x00,0x00,0x00},/* 5 CR68 */ +{0x77,0x44,0x44,0x00,0x00,0x00,0x00,0x00},/* 6 CR69 */ +{0x77,0x44,0x44,0x00,0x00,0x00,0x00,0x00},/* 7 CR6A */ +{0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00},/* 8 CR6D */ +{0x55,0x55,0x55,0x00,0x00,0x00,0x00,0x00},/* 9 CR80 */ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},/* 10 CR81 */ +{0x48,0xaa,0x48,0x00,0x00,0x00,0x00,0x00},/* 11 CR82 */ +{0x77,0x77,0x77,0x00,0x00,0x00,0x00,0x00},/* 12 CR85 */ +{0x88,0x78,0x88,0x00,0x00,0x00,0x00,0x00},/* 13 CR86 */ +{0x44,0x43,0x44,0x00,0x00,0x00,0x00,0x00},/* 14 CR90 */ +{0x44,0x55,0x44,0x00,0x00,0x00,0x00,0x00},/* 15 CR91 */ +{0x07,0x07,0x07,0x00,0x00,0x00,0x00,0x00},/* 16 CR92 */ +{0x44,0x45,0x44,0x00,0x00,0x00,0x00,0x00},/* 17 CR93 */ +{0x0A,0x0A,0x0A,0x00,0x00,0x00,0x00,0x00},/* 18 CR94 */ +{0x0C,0x0C,0x0C,0x00,0x00,0x00,0x00,0x00},/* 19 CR95 */ +{0x05,0x05,0x05,0x00,0x00,0x00,0x00,0x00},/* 20 CR96 */ +{0xf0,0xf0,0xf0,0x00,0x00,0x00,0x00,0x00},/* 21 CRC3 */ +{0x03,0x02,0x02,0x00,0x00,0x00,0x00,0x00},/* 22 CRC4 */ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}/* 23 CRC5 */ +}; + +static UCHAR XGI340_CR6B[8][4]={ +{0xaa,0xaa,0xaa,0xaa}, +{0xaa,0xaa,0xaa,0xaa}, +{0xaa,0xaa,0xaa,0xaa}, +{0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00} +}; + +static UCHAR XGI340_CR6E[8][4]={ +{0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00} +}; + +static UCHAR XGI340_CR6F[8][32]={ +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} +}; + +static UCHAR XGI340_CR89[8][2]={ +{0xa0,0x00}, +{0xa0,0x00}, +{0xa0,0x00}, +{0x00,0x00}, +{0x00,0x00}, +{0x00,0x00}, +{0x00,0x00}, +{0x00,0x00} +}; + /* CR47,CR48,CR49,CR4A,CR4B,CR4C,CR70,CR71,CR74,CR75,CR76,CR77 */ +static UCHAR XGI340_AGPReg[12]={0x28,0x23,0x00,0x20,0x00,0x20,0x00,0x05,0xd0,0x10,0x10,0x00}; + +static UCHAR XGI340_SR16[4]={0x03,0x83,0x03,0x83}; + +#if 0 +static UCHAR XGI330_SR15_1[8][8]={ +{0x0,0x0,0x00,0x00,0x20,0x20,0x00,0x00}, +{0x5,0x15,0x15,0x15,0x15,0x15,0x00,0x00}, +{0xba,0xba,0xba,0xba,0xBA,0xBA,0x00,0x00}, +{0x55,0x57,0x57,0xAB,0xAB,0xAB,0x00,0x00}, +{0x60,0x34,0x34,0x34,0x34,0x34,0x00,0x00}, +{0x0,0x80,0x80,0x80,0x83,0x83,0x00,0x00}, +{0x50,0x50,0x50,0x3C,0x3C,0x3C,0x00,0x00}, +{0x0,0xa5,0xfb,0xf6,0xF6,0xF6,0x00,0x00} +}; + +static UCHAR XGI330_cr40_1[15][8]={ +{0x66,0x40,0x40,0x28,0x24,0x24,0x00,0x00}, +{0x66,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x0F,0x0F,0x00,0x00}, +{0x00,0xf0,0xf0,0xf0,0xF0,0xF0,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x10,0x10,0x10,0x10,0x20,0x20,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x88,0x88,0x88,0xAA,0xAC,0xAC,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x77,0x77,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, +{0x00,0xA2,0x00,0x00,0xA2,0xA2,0x00,0x00}, +}; +#endif + +static UCHAR XGI330_sr25[]={0x00,0x0}; +static UCHAR XGI330_sr31=0x40; +static UCHAR XGI330_sr32=0x11; +static UCHAR XG40_CRCF=0x13; +static UCHAR XG40_DRAMTypeDefinition=0xFF ; + +static XGI_StStruct XGI330_SModeIDTable[]= +{ + {0x01,0x9208,0x01,0x00,0x10,0x00,0x00,0x01,0x00}, + {0x01,0x1210,0x14,0x01,0x00,0x01,0x00,0x01,0x00}, + {0x01,0x1010,0x17,0x02,0x11,0x00,0x00,0x01,0x01}, + {0x03,0x8208,0x03,0x00,0x14,0x00,0x00,0x01,0x02}, + {0x03,0x0210,0x16,0x01,0x04,0x01,0x00,0x01,0x02}, + {0x03,0x0010,0x18,0x02,0x15,0x00,0x00,0x01,0x03}, + {0x05,0x9209,0x05,0x00,0x10,0x00,0x00,0x00,0x04}, + {0x06,0x8209,0x06,0x00,0x14,0x00,0x00,0x00,0x05}, + {0x07,0x0000,0x07,0x03,0x05,0x03,0x00,0x01,0x03}, + {0x07,0x0000,0x19,0x02,0x15,0x02,0x00,0x01,0x03}, + {0x0d,0x920a,0x0d,0x00,0x10,0x00,0x00,0x00,0x04}, + {0x0e,0x820a,0x0e,0x00,0x14,0x00,0x00,0x00,0x05}, + {0x0f,0x0202,0x11,0x01,0x04,0x01,0x00,0x00,0x05}, + {0x10,0x0212,0x12,0x01,0x04,0x01,0x00,0x00,0x05}, + {0x11,0x0212,0x1a,0x04,0x24,0x04,0x00,0x00,0x05}, + {0x12,0x0212,0x1b,0x04,0x24,0x04,0x00,0x00,0x05}, + {0x13,0x021b,0x1c,0x00,0x14,0x00,0x00,0x00,0x04}, + {0x12,0x0010,0x18,0x02,0x24,0x02,0x00,0x00,0x05},/* St_CRT2CRTC2 not sure */ + {0x12,0x0210,0x18,0x01,0x24,0x01,0x00,0x00,0x05},/* St_CRT2CRTC2 not sure */ + {0xff,0x0000,0x00,0x00,0x00,0x00,0x00,0x00,0x00} +}; + + +static XGI_ExtStruct XGI330_EModeIDTable[]= +{ + {0x6a,0x2212,0x0407,0x3a81,0x0102,0x08,0x07,0x00,0x00,0x07,0x0e}, + {0x2e,0x0a1b,0x0306,0x3a57,0x0101,0x08,0x06,0x00,0x00,0x05,0x06}, + {0x2f,0x0a1b,0x0305,0x3a50,0x0100,0x08,0x05,0x00,0x00,0x05,0x05}, + {0x30,0x2a1b,0x0407,0x3a81,0x0103,0x08,0x07,0x00,0x00,0x07,0x0e}, + {0x31,0x0a1b,0x030d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x3d}, + {0x32,0x0a1b,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x3e}, + {0x33,0x0a1d,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x3d}, + {0x34,0x2a1d,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x3e}, + {0x35,0x0a1f,0x0a0d,0x3b85,0x0000,0x08,0x0d,0x00,0x00,0x06,0x3d}, + {0x36,0x2a1f,0x0a0e,0x3b8c,0x0000,0x08,0x0e,0x00,0x00,0x06,0x3e}, + {0x37,0x0212,0x0508,0x3aab,0x0104,0x08,0x08,0x00,0x00,0x00,0x16}, + {0x38,0x0a1b,0x0508,0x3aab,0x0105,0x08,0x08,0x00,0x00,0x00,0x16}, + {0x3a,0x0e3b,0x0609,0x3adc,0x0107,0x08,0x09,0x00,0x00,0x00,0x1e}, + {0x3c,0x0e3b,0x070a,0x3af2,0x0130,0x08,0x0a,0x00,0x00,0x00,0x22}, /* mode 1600x1200 add CRT2MODE [2003/10/07] */ + {0x3d,0x0e7d,0x070a,0x3af2,0x0131,0x08,0x0a,0x00,0x00,0x00,0x22}, /* mode 1600x1200 add CRT2MODE */ + {0x40,0x9a1c,0x0000,0x3a34,0x010d,0x08,0x00,0x00,0x00,0x04,0x00}, + {0x41,0x9a1d,0x0000,0x3a34,0x010e,0x08,0x00,0x00,0x00,0x04,0x00}, /* ModeIdIndex = 0x10 */ + {0x43,0x0a1c,0x0306,0x3a57,0x0110,0x08,0x06,0x00,0x00,0x05,0x06}, + {0x44,0x0a1d,0x0306,0x3a57,0x0111,0x08,0x06,0x00,0x00,0x05,0x06}, + {0x46,0x2a1c,0x0407,0x3a81,0x0113,0x08,0x07,0x00,0x00,0x07,0x0e}, + {0x47,0x2a1d,0x0407,0x3a81,0x0114,0x08,0x07,0x00,0x00,0x07,0x0e}, + {0x49,0x0a3c,0x0508,0x3aab,0x0116,0x08,0x08,0x00,0x00,0x00,0x16}, + {0x4a,0x0a3d,0x0508,0x3aab,0x0117,0x08,0x08,0x00,0x00,0x00,0x16}, + {0x4c,0x0e7c,0x0609,0x3adc,0x0119,0x08,0x09,0x00,0x00,0x00,0x1e}, + {0x4d,0x0e7d,0x0609,0x3adc,0x011a,0x08,0x09,0x00,0x00,0x00,0x1e}, + {0x50,0x9a1b,0x0001,0x3a3b,0x0132,0x08,0x01,0x00,0x00,0x04,0x02}, + {0x51,0xba1b,0x0103,0x3a42,0x0133,0x08,0x03,0x00,0x00,0x07,0x03}, + {0x52,0x9a1b,0x0204,0x3a49,0x0134,0x08,0x04,0x00,0x00,0x00,0x04}, + {0x56,0x9a1d,0x0001,0x3a3b,0x0135,0x08,0x01,0x00,0x00,0x04,0x02}, + {0x57,0xba1d,0x0103,0x3a42,0x0136,0x08,0x03,0x00,0x00,0x07,0x03}, + {0x58,0x9a1d,0x0204,0x3a49,0x0137,0x08,0x04,0x00,0x00,0x00,0x04}, + {0x59,0x9a1b,0x0000,0x3a34,0x0138,0x08,0x00,0x00,0x00,0x04,0x00}, + {0x5A,0x021b,0x0014,0x3b83,0x0138,0x08,0x01,0x00,0x00,0x04,0x3f}, /* ModeIdIndex = 0x20 */ + {0x5B,0x0a1d,0x0014,0x3b83,0x0135,0x08,0x01,0x00,0x00,0x04,0x3f}, + {0x5d,0x0a1d,0x0305,0x3a50,0x0139,0x08,0x05,0x00,0x00,0x07,0x05}, + {0x62,0x0a3f,0x0306,0x3a57,0x013a,0x08,0x06,0x00,0x00,0x05,0x06}, + {0x63,0x2a3f,0x0407,0x3a81,0x013b,0x08,0x07,0x00,0x00,0x07,0x0e}, + {0x64,0x0a7f,0x0508,0x3aab,0x013c,0x08,0x08,0x00,0x00,0x00,0x16}, + {0x65,0x0eff,0x0609,0x3adc,0x013d,0x08,0x09,0x00,0x00,0x00,0x1e}, + {0x66,0x0eff,0x070a,0x3af2,0x013e,0x08,0x0a,0x00,0x00,0x00,0x22}, /* mode 1600x1200 add CRT2MODE */ + {0x68,0x067b,0x080b,0x3b17,0x013f,0x08,0x0b,0x00,0x00,0x00,0x29}, + {0x69,0x06fd,0x080b,0x3b17,0x0140,0x08,0x0b,0x00,0x00,0x00,0x29}, + {0x6b,0x07ff,0x080b,0x3b17,0x0141,0x10,0x0b,0x00,0x00,0x00,0x29}, + {0x6c,0x067b,0x090c,0x3b37,0x0000,0x08,0x0c,0x00,0x00,0x00,0x2f}, + {0x6d,0x06fd,0x090c,0x3b37,0x0000,0x10,0x0c,0x00,0x00,0x00,0x2f}, + {0x6e,0x07ff,0x090c,0x3b37,0x0000,0x10,0x0c,0x00,0x00,0x00,0x2f}, + {0x70,0x2a1b,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34}, + {0x71,0x0a1b,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37}, + {0x74,0x0a1d,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37}, /* ModeIdIndex = 0x30 */ + {0x75,0x0a3d,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a}, + {0x76,0x2a1f,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34}, + {0x77,0x0a1f,0x0511,0x3b63,0x0000,0x08,0x11,0x00,0x00,0x00,0x37}, + {0x78,0x0a3f,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a}, + {0x79,0x0a3b,0x0612,0x3b74,0x0000,0x08,0x12,0x00,0x00,0x00,0x3a}, + {0x7a,0x2a1d,0x0410,0x3b52,0x0000,0x08,0x10,0x00,0x00,0x07,0x34}, + {0x7b,0x0e3b,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x1d}, + {0x7c,0x0e7d,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x1d}, + {0x7d,0x0eff,0x060f,0x3ad0,0x0000,0x08,0x0f,0x00,0x00,0x00,0x1d}, + {0x20,0x0e3b,0x0D16,0x49e0,0x0000,0x08,0x16,0x00,0x00,0x00,0x43}, + {0x21,0x0e7d,0x0D16,0x49e0,0x0000,0x08,0x16,0x00,0x00,0x00,0x43}, + {0x22,0x0eff,0x0D16,0x49e0,0x0000,0x08,0x16,0x00,0x00,0x00,0x43}, + {0x23,0x0e3b,0x0614,0x49d5,0x0000,0x08,0x14,0x00,0x00,0x00,0x41}, + {0x24,0x0e7d,0x0614,0x49d5,0x0000,0x08,0x14,0x00,0x00,0x00,0x41}, + {0x25,0x0eff,0x0614,0x49d5,0x0000,0x08,0x14,0x00,0x00,0x00,0x41}, + {0x26,0x063b,0x0c15,0x49dc,0x0000,0x08,0x15,0x00,0x00,0x00,0x42}, /* ModeIdIndex = 0x40 */ + {0x27,0x067d,0x0c15,0x49dc,0x0000,0x08,0x15,0x00,0x00,0x00,0x42}, + {0x28,0x06ff,0x0c15,0x49dc,0x0000,0x08,0x15,0x00,0x00,0x00,0x42}, + {0xff,0x0000,0x0000,0x0000,0x0000,0x00,0x00,0x00,0x00,0x00,0x00} +}; + +static XGI_StandTableStruct XGI330_StandTable[]= +{ +/* MD_0_200 */ + { + 0x28,0x18,0x08,0x0800, + {0x09,0x03,0x00,0x02}, + 0x63, + {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f, + 0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, + 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, + 0x08,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, + 0xff} + }, +/* MD_1_200 */ + { + 0x28,0x18,0x08,0x0800, + {0x09,0x03,0x00,0x02}, + 0x63, + {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f, + 0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, + 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, + 0x08,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, + 0xff} + }, +/* MD_2_200 */ + { + 0x50,0x18,0x08,0x1000, + {0x01,0x03,0x00,0x02}, + 0x63, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, + 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, + 0x08,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, + 0xff} + }, +/* MD_3_200 */ + { + 0x50,0x18,0x08,0x1000, + {0x01,0x03,0x00,0x02}, + 0x63, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0xc7,0x06,0x07,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, + 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, + 0x08,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, + 0xff} + }, +/* MD_4 */ + { + 0x28,0x18,0x08,0x4000, + {0x09,0x03,0x00,0x02}, + 0x63, + {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f, + 0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2, + 0xff}, + {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07, + 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, + 0x01,0x00,0x03,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00, + 0xff} + }, +/* MD_5 */ + { + 0x28,0x18,0x08,0x4000, + {0x09,0x03,0x00,0x02}, + 0x63, + {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f, + 0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xa2, + 0xff}, + {0x00,0x13,0x15,0x17,0x02,0x04,0x06,0x07, + 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, + 0x01,0x00,0x03,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x30,0x0f,0x00, + 0xff} + }, +/* MD_6 */ + { + 0x50,0x18,0x08,0x4000, + {0x01,0x01,0x00,0x06}, + 0x63, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0xc1,0x00,0x00,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xc2, + 0xff}, + {0x00,0x17,0x17,0x17,0x17,0x17,0x17,0x17, + 0x17,0x17,0x17,0x17,0x17,0x17,0x17,0x17, + 0x01,0x00,0x01,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x0d,0x00, + 0xff} + }, +/* MD_7 */ + { + 0x50,0x18,0x0e,0x1000, + {0x00,0x03,0x00,0x03}, + 0xa6, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00, + 0x83,0x85,0x5d,0x28,0x0d,0x63,0xba,0xa3, + 0xff}, + {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08, + 0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18, + 0x0e,0x00,0x0f,0x08}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00, + 0xff} + }, +/* MDA_DAC */ + { + 0x00,0x00,0x00,0x0000, + {0x00,0x00,0x00,0x15}, + 0x15, + {0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15, + 0x15,0x15,0x15,0x15,0x15,0x15,0x3f,0x3f, + 0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x00,0x00, + 0x00}, + {0x00,0x00,0x00,0x00,0x00,0x15,0x15,0x15, + 0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15, + 0x15,0x15,0x15,0x15}, + {0x15,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f, + 0x3f} + }, +/* CGA_DAC */ + { + 0x00,0x10,0x04,0x0114, + {0x11,0x09,0x15,0x00}, + 0x10, + {0x04,0x14,0x01,0x11,0x09,0x15,0x2a,0x3a, + 0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x2a,0x3a, + 0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x10, + 0x04}, + {0x14,0x01,0x11,0x09,0x15,0x00,0x10,0x04, + 0x14,0x01,0x11,0x09,0x15,0x2a,0x3a,0x2e, + 0x3e,0x2b,0x3b,0x2f}, + {0x3f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f, + 0x3f} + }, +/* EGA_DAC */ + { + 0x00,0x10,0x04,0x0114, + {0x11,0x05,0x15,0x20}, + 0x30, + {0x24,0x34,0x21,0x31,0x25,0x35,0x08,0x18, + 0x0c,0x1c,0x09,0x19,0x0d,0x1d,0x28,0x38, + 0x2c,0x3c,0x29,0x39,0x2d,0x3d,0x02,0x12, + 0x06}, + {0x16,0x03,0x13,0x07,0x17,0x22,0x32,0x26, + 0x36,0x23,0x33,0x27,0x37,0x0a,0x1a,0x0e, + 0x1e,0x0b,0x1b,0x0f}, + {0x1f,0x2a,0x3a,0x2e,0x3e,0x2b,0x3b,0x2f, + 0x3f} + }, +/* VGA_DAC */ + { + 0x00,0x10,0x04,0x0114, + {0x11,0x09,0x15,0x2a}, + 0x3a, + {0x2e,0x3e,0x2b,0x3b,0x2f,0x3f,0x00,0x05, + 0x08,0x0b,0x0e,0x11,0x14,0x18,0x1c,0x20, + 0x24,0x28,0x2d,0x32,0x38,0x3f,0x00,0x10, + 0x1f}, + {0x2f,0x3f,0x1f,0x27,0x2f,0x37,0x3f,0x2d, + 0x31,0x36,0x3a,0x3f,0x00,0x07,0x0e,0x15, + 0x1c,0x0e,0x11,0x15}, + {0x18,0x1c,0x14,0x16,0x18,0x1a,0x1c,0x00, + 0x04} + }, + { + 0x08,0x0c,0x10,0x0a08, + {0x0c,0x0e,0x10,0x0b}, + 0x0c, + {0x0d,0x0f,0x10,0x10,0x01,0x08,0x00,0x00, + 0x00,0x00,0x01,0x00,0x02,0x02,0x01,0x00, + 0x04,0x04,0x01,0x00,0x05,0x02,0x05,0x00, + 0x06}, + {0x01,0x06,0x05,0x06,0x00,0x08,0x01,0x08, + 0x00,0x07,0x02,0x07,0x06,0x07,0x00,0x00, + 0x00,0x00,0x00,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00} + }, +/* MD_D */ + { + 0x28,0x18,0x08,0x2000, + {0x09,0x0f,0x00,0x06}, + 0x63, + {0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f, + 0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x14,0x00,0x96,0xb9,0xe3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, + 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, + 0x01,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, + 0xff} + }, +/* MD_E */ + { + 0x50,0x18,0x08,0x4000, + {0x01,0x0f,0x00,0x06}, + 0x63, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x28,0x00,0x96,0xb9,0xe3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, + 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17, + 0x01,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, + 0xff} + }, +/* ExtVGATable */ + { + 0x00,0x00,0x00,0x0000, + {0x01,0x0f,0x00,0x0e}, + 0x23, + {0x5f,0x4f,0x50,0x82,0x54,0x80,0x0b,0x3e, + 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, + 0xea,0x8c,0xdf,0x28,0x40,0xe7,0x04,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, + 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f, + 0x01,0x00,0x00,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f, + 0xff} + }, +/* ROM_SAVEPTR */ + { + 0x9f,0x3b,0x00,0x00c0, + {0x00,0x00,0x00,0x00}, + 0x00, + {0x00,0x00,0x00,0x00,0x00,0x00,0xbb,0x3f, + 0x00,0xc0,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x1a,0x00,0xac,0x3e,0x00,0xc0, + 0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00} + }, +/* MD_F */ + { + 0x50,0x18,0x0e,0x8000, + {0x01,0x0f,0x00,0x06}, + 0xa2, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, + 0x82,0x84,0x5d,0x28,0x0f,0x63,0xba,0xe3, + 0xff}, + {0x00,0x08,0x00,0x00,0x18,0x18,0x00,0x00, + 0x00,0x08,0x00,0x00,0x00,0x18,0x00,0x00, + 0x0b,0x00,0x05,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05, + 0xff} + }, +/* MD_10 */ + { + 0x50,0x18,0x0e,0x8000, + {0x01,0x0f,0x00,0x06}, + 0xa3, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, + 0x82,0x84,0x5d,0x28,0x0f,0x63,0xba,0xe3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, + 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, + 0x01,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, + 0xff} + }, +/* MD_0_350 */ + { + 0x28,0x18,0x0e,0x0800, + {0x09,0x03,0x00,0x02}, + 0xa3, + {0x2d,0x27,0x28,0x90,0x2b,0xb1,0xbf,0x1f, + 0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00, + 0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, + 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, + 0x08,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, + 0xff} + }, +/* MD_1_350 */ + { + 0x28,0x18,0x0e,0x0800, + {0x09,0x03,0x00,0x02}, + 0xa3, + {0x2d,0x27,0x28,0x90,0x2b,0xa0,0xbf,0x1f, + 0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00, + 0x83,0x85,0x5d,0x14,0x1f,0x63,0xba,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, + 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, + 0x08,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, + 0xff} + }, +/* MD_2_350 */ + { + 0x50,0x18,0x0e,0x1000, + {0x01,0x03,0x00,0x02}, + 0xa3, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00, + 0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, + 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, + 0x08,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, + 0xff} + }, +/* MD_3_350 */ + { + 0x50,0x18,0x0e,0x1000, + {0x01,0x03,0x00,0x02}, + 0xa3, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0x4d,0x0b,0x0c,0x00,0x00,0x00,0x00, + 0x83,0x85,0x5d,0x28,0x1f,0x63,0xba,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, + 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, + 0x08,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, + 0xff} + }, +/* MD_0_1_400 */ + { + 0x28,0x18,0x10,0x0800, + {0x08,0x03,0x00,0x02}, + 0x67, + {0x2d,0x27,0x28,0x90,0x2b,0xb1,0xbf,0x1f, + 0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x14,0x1f,0x96,0xb9,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, + 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, + 0x0c,0x00,0x0f,0x08}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, + 0xff} + }, +/* MD_2_3_400 */ + { + 0x50,0x18,0x10,0x1000, + {0x00,0x03,0x00,0x02}, + 0x67, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x28,0x1f,0x96,0xb9,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, + 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, + 0x0c,0x00,0x0f,0x08}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0e,0x00, + 0xff} + }, +/* MD_7_400 */ + { + 0x50,0x18,0x10,0x1000, + {0x00,0x03,0x00,0x02}, + 0x66, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0x4f,0x0d,0x0e,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x28,0x0f,0x96,0xb9,0xa3, + 0xff}, + {0x00,0x08,0x08,0x08,0x08,0x08,0x08,0x08, + 0x10,0x18,0x18,0x18,0x18,0x18,0x18,0x18, + 0x0e,0x00,0x0f,0x08}, + {0x00,0x00,0x00,0x00,0x00,0x10,0x0a,0x00, + 0xff} + }, +/* MD_11 */ + { + 0x50,0x1d,0x10,0xa000, + {0x01,0x0f,0x00,0x06}, + 0xe3, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e, + 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, + 0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xc3, + 0xff}, + {0x00,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f, + 0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f,0x3f, + 0x01,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x01, + 0xff} + }, +/* ExtEGATable */ + { + 0x50,0x1d,0x10,0xa000, + {0x01,0x0f,0x00,0x06}, + 0xe3, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e, + 0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00, + 0xe9,0x8b,0xdf,0x28,0x00,0xe7,0x04,0xe3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07, + 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f, + 0x01,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f, + 0xff} + }, +/* MD_13 */ + { + 0x28,0x18,0x08,0x2000, + {0x01,0x0f,0x00,0x0e}, + 0x63, + {0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, + 0x00,0x41,0x00,0x00,0x00,0x00,0x00,0x00, + 0x9c,0x8e,0x8f,0x28,0x40,0x96,0xb9,0xa3, + 0xff}, + {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07, + 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f, + 0x41,0x00,0x0f,0x00}, + {0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f, + 0xff} + } +}; + +static XGI_TimingHStruct XGI_TimingH[]= +{{{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}}; + +static XGI_TimingVStruct XGI_TimingV[]= +{{{0x00,0x00,0x00,0x00,0x00,0x00,0x00}}}; + + +static XGI_CRT1TableStruct XGI_CRT1Table[]= +{ + {{0x2d,0x28,0x90,0x2c,0x90,0x00,0x04,0x00, + 0xbf,0x1f,0x9c,0x8e,0x96,0xb9,0x30}}, /* 0x0 */ + {{0x2d,0x28,0x90,0x2c,0x90,0x00,0x04,0x00, + 0x0b,0x3e,0xe9,0x8b,0xe7,0x04,0x00}}, /* 0x1 */ + {{0x3D,0x31,0x81,0x37,0x1F,0x00,0x05,0x00, + 0x72,0xF0,0x58,0x8C,0x57,0x73,0xA0}}, /* 0x2 */ + {{0x4F,0x3F,0x93,0x45,0x0D,0x00,0x01,0x00, + 0x24,0xF5,0x02,0x88,0xFF,0x25,0x90}}, /* 0x3 */ + {{0x5F,0x50,0x82,0x55,0x81,0x00,0x05,0x00, + 0xBF,0x1F,0x9C,0x8E,0x96,0xB9,0x30}}, /* 0x4 */ + {{0x5F,0x50,0x82,0x55,0x81,0x00,0x05,0x00, + 0x0B,0x3E,0xE9,0x8B,0xE7,0x04,0x00}}, /* 0x5 */ + {{0x63,0x50,0x86,0x56,0x9B,0x00,0x01,0x00, + 0x06,0x3E,0xE8,0x8B,0xE7,0xFF,0x10}}, /* 0x6 */ + {{0x64,0x4F,0x88,0x55,0x9D,0x00,0x01,0x00, + 0xF2,0x1F,0xE0,0x83,0xDF,0xF3,0x10}}, /* 0x7 */ + {{0x63,0x4F,0x87,0x5A,0x81,0x00,0x05,0x00, + 0xFB,0x1F,0xE0,0x83,0xDF,0xFC,0x10}}, /* 0x8 */ + {{0x65,0x4F,0x89,0x58,0x80,0x00,0x05,0x60, + 0xFB,0x1F,0xE0,0x83,0xDF,0xFC,0x80}}, /* 0x9 */ + {{0x65,0x4F,0x89,0x58,0x80,0x00,0x05,0x60, + 0x01,0x3E,0xE0,0x83,0xDF,0x02,0x80}}, /* 0xa */ + {{0x67,0x4F,0x8B,0x58,0x81,0x00,0x05,0x60, + 0x0D,0x3E,0xE0,0x83,0xDF,0x0E,0x90}}, /* 0xb */ + {{0x65,0x4F,0x89,0x57,0x9F,0x00,0x01,0x00, + 0xFB,0x1F,0xE6,0x8A,0xDF,0xFC,0x10}}, /* 0xc */ + {{0x7B,0x63,0x9F,0x6A,0x93,0x00,0x05,0x00, /* ; 0D (800x600,56Hz) */ + 0x6F,0xF0,0x58,0x8A,0x57,0x70,0xA0}}, /* ; (VCLK 36.0MHz) */ + {{0x7F,0x63,0x83,0x6C,0x1C,0x00,0x06,0x00, /* ; 0E (800x600,60Hz) */ + 0x72,0xF0,0x58,0x8C,0x57,0x73,0xA0}}, /* ; (VCLK 40.0MHz) */ + {{0x7D,0x63,0x81,0x6E,0x1D,0x00,0x06,0x00, /* ; 0F (800x600,72Hz) */ + 0x98,0xF0,0x7C,0x82,0x57,0x99,0x80}}, /* ; (VCLK 50.0MHz) */ + {{0x7F,0x63,0x83,0x69,0x13,0x00,0x06,0x00, /* ; 10 (800x600,75Hz) */ + 0x6F,0xF0,0x58,0x8B,0x57,0x70,0xA0}}, /* ; (VCLK 49.5MHz) */ + {{0x7E,0x63,0x82,0x6B,0x13,0x00,0x06,0x00, /* ; 11 (800x600,85Hz) */ + 0x75,0xF0,0x58,0x8B,0x57,0x76,0xA0}}, /* ; (VCLK 56.25MHz) */ + {{0x81,0x63,0x85,0x6D,0x18,0x00,0x06,0x60, /* ; 12 (800x600,100Hz) */ + 0x7A,0xF0,0x58,0x8B,0x57,0x7B,0xA0}}, /* ; (VCLK 75.8MHz) */ + {{0x83,0x63,0x87,0x6E,0x19,0x00,0x06,0x60, /* ; 13 (800x600,120Hz) */ + 0x81,0xF0,0x58,0x8B,0x57,0x82,0xA0}}, /* ; (VCLK 79.411MHz) */ + {{0x85,0x63,0x89,0x6F,0x1A,0x00,0x06,0x60, /* ; 14 (800x600,160Hz) */ + 0x91,0xF0,0x58,0x8B,0x57,0x92,0xA0}}, /* ; (VCLK 105.822MHz) */ + {{0x99,0x7F,0x9D,0x84,0x1A,0x00,0x02,0x00, + 0x96,0x1F,0x7F,0x83,0x7F,0x97,0x10}}, /* 0x15 */ + {{0xA3,0x7F,0x87,0x86,0x97,0x00,0x02,0x00, + 0x24,0xF5,0x02,0x88,0xFF,0x25,0x90}}, /* 0x16 */ + {{0xA1,0x7F,0x85,0x86,0x97,0x00,0x02,0x00, + 0x24,0xF5,0x02,0x88,0xFF,0x25,0x90}}, /* 0x17 */ + {{0x9F,0x7F,0x83,0x85,0x91,0x00,0x02,0x00, + 0x1E,0xF5,0x00,0x83,0xFF,0x1F,0x90}}, /* 0x18 */ + {{0xA7,0x7F,0x8B,0x89,0x95,0x00,0x02,0x00, + 0x26,0xF5,0x00,0x83,0xFF,0x27,0x90}}, /* 0x19 */ + {{0xA9,0x7F,0x8D,0x8C,0x9A,0x00,0x02,0x62, + 0x2C,0xF5,0x00,0x83,0xFF,0x2D,0x14}}, /* 0x1a */ + {{0xAB,0x7F,0x8F,0x8D,0x9B,0x00,0x02,0x62, + 0x35,0xF5,0x00,0x83,0xFF,0x36,0x14}}, /* 0x1b */ + {{0xCF,0x9F,0x93,0xB2,0x01,0x00,0x03,0x00, + 0x14,0xBA,0x00,0x83,0xFF,0x15,0x00}}, /* 0x1c */ + {{0xCE,0x9F,0x92,0xA9,0x17,0x00,0x07,0x00, + 0x28,0x5A,0x00,0x83,0xFF,0x29,0x89}}, /* 0x1d */ + {{0xCE,0x9F,0x92,0xA5,0x17,0x00,0x07,0x00, + 0x28,0x5A,0x00,0x83,0xFF,0x29,0x89}}, /* 0x1e */ + {{0xD3,0x9F,0x97,0xAB,0x1F,0x00,0x07,0x00, + 0x2E,0x5A,0x00,0x83,0xFF,0x2F,0x89}}, /* 0x1f */ + {{0x09,0xC7,0x8D,0xD3,0x0B,0x01,0x04,0x00, + 0xE0,0x10,0xB0,0x83,0xAF,0xE1,0x2F}}, /* 0x20 */ + {{0x09,0xC7,0x8D,0xD3,0x0B,0x01,0x04,0x00, + 0xE0,0x10,0xB0,0x83,0xAF,0xE1,0x2F}}, /* 0x21 */ + {{0x09,0xC7,0x8D,0xD3,0x0B,0x01,0x04,0x00, + 0xE0,0x10,0xB0,0x83,0xAF,0xE1,0x2F}}, /* 0x22 */ + {{0x09,0xC7,0x8D,0xD3,0x0B,0x01,0x04,0x00, + 0xE0,0x10,0xB0,0x83,0xAF,0xE1,0x2F}}, /* 0x23 */ + {{0x09,0xC7,0x8D,0xD3,0x0B,0x01,0x04,0x00, + 0xE0,0x10,0xB0,0x83,0xAF,0xE1,0x2F}}, /* 0x24 */ + {{0x09,0xC7,0x8D,0xD3,0x0B,0x01,0x04,0x00, + 0xE0,0x10,0xB0,0x83,0xAF,0xE1,0x2F}}, /* 0x25 */ + {{0x09,0xC7,0x8D,0xD3,0x0B,0x01,0x04,0x00, + 0xE0,0x10,0xB0,0x83,0xAF,0xE1,0x2F}}, /* 0x26 */ + {{0x40,0xEF,0x84,0x03,0x1D,0x41,0x01,0x00, + 0xDA,0x1F,0xA0,0x83,0x9F,0xDB,0x1F}}, /* 0x27 */ + {{0x43,0xEF,0x87,0x06,0x00,0x41,0x05,0x62, + 0xD4,0x1F,0xA0,0x83,0x9F,0xD5,0x9F}}, /* 0x28 */ + {{0x45,0xEF,0x89,0x07,0x01,0x41,0x05,0x62, + 0xD9,0x1F,0xA0,0x83,0x9F,0xDA,0x9F}}, /* 0x29 */ + {{0x40,0xEF,0x84,0x03,0x1D,0x41,0x01,0x00, + 0xDA,0x1F,0xA0,0x83,0x9F,0xDB,0x1F}}, /* 0x2a */ + {{0x40,0xEF,0x84,0x03,0x1D,0x41,0x01,0x00, + 0xDA,0x1F,0xA0,0x83,0x9F,0xDB,0x1F}}, /* 0x2b */ + {{0x40,0xEF,0x84,0x03,0x1D,0x41,0x01,0x00, + 0xDA,0x1F,0xA0,0x83,0x9F,0xDB,0x1F}}, /* 0x2c */ + {{0x59,0xFF,0x9D,0x17,0x13,0x41,0x05,0x44, + 0x33,0xBA,0x00,0x83,0xFF,0x34,0x0F}}, /* 0x2d */ + {{0x5B,0xFF,0x9F,0x18,0x14,0x41,0x05,0x44, + 0x38,0xBA,0x00,0x83,0xFF,0x39,0x0F}}, /* 0x2e */ + {{0x5B,0xFF,0x9F,0x18,0x14,0x41,0x05,0x44, + 0x3D,0xBA,0x00,0x83,0xFF,0x3E,0x0F}}, /* 0x2f */ + {{0x5D,0xFF,0x81,0x19,0x95,0x41,0x05,0x44, + 0x41,0xBA,0x00,0x84,0xFF,0x42,0x0F}}, /* 0x30 */ + {{0x55,0xFF,0x99,0x0D,0x0C,0x41,0x05,0x00, + 0x3E,0xBA,0x00,0x84,0xFF,0x3F,0x0F}}, /* 0x31 */ + {{0x7F,0x63,0x83,0x6C,0x1C,0x00,0x06,0x00, + 0x72,0xBA,0x27,0x8B,0xDF,0x73,0x80}}, /* 0x32 */ + {{0x7F,0x63,0x83,0x69,0x13,0x00,0x06,0x00, + 0x6F,0xBA,0x26,0x89,0xDF,0x6F,0x80}}, /* 0x33 */ + {{0x7F,0x63,0x82,0x6B,0x13,0x00,0x06,0x00, + 0x75,0xBA,0x29,0x8C,0xDF,0x75,0x80}}, /* 0x34 */ + {{0xA3,0x7F,0x87,0x86,0x97,0x00,0x02,0x00, + 0x24,0xF1,0xAF,0x85,0x3F,0x25,0xB0}}, /* 0x35 */ + {{0x9F,0x7F,0x83,0x85,0x91,0x00,0x02,0x00, + 0x1E,0xF1,0xAD,0x81,0x3F,0x1F,0xB0}}, /* 0x36 */ + {{0xA7,0x7F,0x88,0x89,0x15,0x00,0x02,0x00, + 0x26,0xF1,0xB1,0x85,0x3F,0x27,0xB0}}, /* 0x37 */ + {{0xCE,0x9F,0x92,0xA9,0x17,0x00,0x07,0x00, + 0x28,0xC4,0x7A,0x8E,0xCF,0x29,0xA1}}, /* 0x38 */ + {{0xCE,0x9F,0x92,0xA5,0x17,0x00,0x07,0x00, + 0x28,0xD4,0x7A,0x8E,0xCF,0x29,0xA1}}, /* 0x39 */ + {{0xD3,0x9F,0x97,0xAB,0x1F,0x00,0x07,0x00, + 0x2E,0xD4,0x7D,0x81,0xCF,0x2F,0xA1}}, /* 0x3a */ + {{0xDC,0x9F,0x00,0xAB,0x19,0x00,0x07,0x00, + 0xE6,0xEF,0xC0,0xC3,0xBF,0xE7,0x90}}, /* 0x3b */ + {{0x6B,0x59,0x8F,0x5E,0x8C,0x00,0x05,0x00, + 0x0B,0x3E,0xE9,0x8B,0xE7,0x04,0x00}}, /* 0x3c */ + {{0x7B,0x63,0x9F,0x6A,0x93,0x00,0x05,0x00, + 0x6F,0xF0,0x58,0x8A,0x57,0x70,0xA0}}, /* 0x3d */ + {{0x86,0x6A,0x8a,0x74,0x06,0x00,0x02,0x00, + 0x8c,0x15,0x4f,0x83,0xef,0x8d,0x30}}, /* 0x3e */ + {{0x81,0x6A,0x85,0x70,0x00,0x00,0x02,0x00, + 0x0f,0x3e,0xeb,0x8e,0xdf,0x10,0x00}}, /* 0x3f */ + {{0xCE,0x9F,0x92,0xA9,0x17,0x00,0x07,0x00, + 0x20,0xF5,0x03,0x88,0xFF,0x21,0x90}}, /* 0x40 */ + {{0xE6,0xAE,0x8A,0xBD,0x90,0x00,0x03,0x00, + 0x3D,0x10,0x1A,0x8D,0x19,0x3E,0x2F}}, /* 0x41 */ + {{0xB9,0x8F,0x9D,0x9B,0x8A,0x00,0x06,0x00, + 0x7D,0xFF,0x60,0x83,0x5F,0x7E,0x90}}, /* 0x42 */ + {{0xC3,0x8F,0x87,0x9B,0x0B,0x00,0x07,0x00, + 0x82,0xFF,0x60,0x83,0x5F,0x83,0x90}}, /* 0x43 */ + {{0xAD,0x7F,0x91,0x8E,0x9C,0x00,0x02,0x82, + 0x49,0xF5,0x00,0x83,0xFF,0x4A,0x90}}, /* 0x44 */ + {{0xCD,0x9F,0x91,0xA7,0x19,0x00,0x07,0x60, + 0xE6,0xFF,0xC0,0x83,0xBF,0xE7,0x90}}, /* 0x45 */ + {{0xD3,0x9F,0x97,0xAB,0x1F,0x00,0x07,0x60, + 0xF1,0xFF,0xC0,0x83,0xBF,0xF2,0x90}}, /* 0x46 */ + {{0xD7,0x9F,0x9B,0xAC,0x1E,0x00,0x07,0x00, + 0x03,0xDE,0xC0,0x84,0xBF,0x04,0x90}} /* 0x47 */ +}; + +static XGI330_CHTVRegDataStruct XGI_CHTVRegUNTSC[] = { + /* Index:000h,001h,002h,004h,003h,005h,006h,007h,008h,015h,01Fh,00Ch,00Dh,00Eh,00Fh,010h */ + {{ 0x4A,0x77,0xBB,0x94,0x84,0x48,0xFE,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* 00 (640x200,640x400) */ + {{ 0x4A,0x77,0xBB,0x94,0x84,0x48,0xFE,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* 01 (640x350) */ + {{ 0x4A,0x77,0xBB,0x94,0x84,0x48,0xFE,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* 02 (720x400) */ + {{ 0x4A,0x77,0xBB,0x94,0x84,0x48,0xFE,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* 03 (720x350) */ + {{ 0x6A,0x77,0xBB,0x6E,0x84,0x2E,0x02,0x5A,0x04,0x00,0x80,0x20,0x7E,0x80,0x97,0x00 }},/* 04 (640x480) ;;5/6/02 */ + {{ 0xCF,0x77,0xB7,0xC8,0x84,0x3B,0x02,0x5A,0x04,0x00,0x80,0x19,0x88,0xAE,0xA3,0x00 }},/* 05 (800x600) ;;1/12/02 */ + {{ 0xEE,0x77,0xBB,0x66,0x87,0x32,0x01,0x5A,0x04,0x00,0x80,0x1B,0xD4,0x2F,0x6F,0x00 }}/* 06 (1024x768) ;;5/6/02 */ + }; + +static XGI330_CHTVRegDataStruct XGI_CHTVRegONTSC[]= { + /* Index:000h,001h,002h,004h,003h,005h,006h,007h,008h,015h,01Fh,00Ch,00Dh,00Eh,00Fh,010h */ + {{ 0x49,0x77,0xBB,0x7B,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* 00 (640x200,640x400) */ + {{ 0x49,0x77,0xBB,0x7B,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* 01 (640x350) */ + {{ 0x49,0x77,0xBB,0x7B,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* 02 (720x400) */ + {{ 0x49,0x77,0xBB,0x7B,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* 03 (720x350) */ + {{ 0x69,0x77,0xBB,0x6E,0x84,0x1E,0x00,0x5A,0x04,0x00,0x80,0x25,0x1A,0x80,0x26,0x00 }},/* 04 (640x480) ;;5/6/02 */ + {{ 0xCE,0x77,0xB7,0xB6,0x83,0x2C,0x02,0x5A,0x04,0x00,0x80,0x1C,0x00,0x82,0x97,0x00 }},/* 05 (800x600) ;;5/6/02 */ + {{ 0xED,0x77,0xBB,0x66,0x8C,0x21,0x02,0x5A,0x04,0x00,0x80,0x1F,0xA0,0x7E,0x73,0x00 }}/* 06 (1024x768) ;;5/6/02 */ + }; + +static XGI330_CHTVRegDataStruct XGI_CHTVRegUPAL[]= { + /* Index:000h,001h,002h,004h,003h,005h,006h,007h,008h,015h,01Fh,00Ch,00Dh,00Eh,00Fh,010h */ + {{ 0x41,0x7F,0xB7,0x34,0xAD,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* ; 00 (640x200,640x400) */ + {{ 0x41,0x7F,0xB7,0x80,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* ; 01 (640x350) */ + {{ 0x41,0x7F,0xB7,0x34,0xAD,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* ; 02 (720x400) */ + {{ 0x41,0x7F,0xB7,0x12,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* ; 03 (720x350) */ + {{ 0x61,0x7F,0xB7,0x99,0x84,0x35,0x04,0x5A,0x05,0x00,0x80,0x26,0x2A,0x55,0x5D,0x00 }},/* ; 04 (640x480) */ + {{ 0xC3,0x7F,0xB7,0x7A,0x84,0x40,0x02,0x5A,0x05,0x00,0x80,0x1F,0x84,0x3D,0x28,0x00 }},/* ; 05 (800x600) ;;1/12/02 */ + {{ 0xE5,0x7F,0xB7,0x1D,0xA7,0x3E,0x04,0x5A,0x05,0x00,0x80,0x20,0x3E,0xE4,0x22,0x00 }}/* ; 06 (1024x768) ;;1/12/02 */ + }; + +static XGI330_CHTVRegDataStruct XGI_CHTVRegOPAL[]={ + /* Index:000,0x01,0x02,0x04,0x03,0x05,0x06,0x07,0x08,0x15,0x1F,0x0C,0x0D,0x0E,0x0F,0x10h */ + {{ 0x41,0x7F,0xB7,0x36,0xAD,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* 00 (640x200,640x400) */ + {{ 0x41,0x7F,0xB7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* 01 (640x350) */ + {{ 0x41,0x7F,0xB7,0x36,0xAD,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* 02 (720x400) */ + {{ 0x41,0x7F,0xB7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01 }},/* 03 (720x350) */ + {{ 0x61,0x7F,0xB7,0x99,0x84,0x35,0x04,0x5A,0x05,0x00,0x80,0x26,0x2A,0x55,0x5D,0x00 }},/* 04 (640x480) */ + {{ 0xC1,0x7F,0xB7,0x4D,0x8C,0x1E,0x31,0x5A,0x05,0x00,0x80,0x26,0x78,0x19,0x34,0x00 }},/* 05 (800x600) ;;1/12/02 */ + {{ 0xE4,0x7F,0xB7,0x1E,0xAF,0x29,0x37,0x5A,0x05,0x00,0x80,0x25,0x8C,0xB2,0x2A,0x00 }}/* 06 (1024x768) ;;1/12/02 */ + }; + +static UCHAR XGI_CH7017LV1024x768[]={0x60,0x02,0x00,0x07,0x40,0xED,0xA3, + 0xC8,0xC7,0xAC,0xE0,0x02}; +static UCHAR XGI_CH7017LV1400x1050[]={0x60,0x03,0x11,0x00,0x40,0xE3,0xAD, + 0xDB,0xF6,0xAC,0xE0,0x02}; + + +/*add for new UNIVGABIOS*/ +static XGI330_LCDDataStruct XGI_StLCD1024x768Data[]= +{ + { 62, 25, 800, 546,1344, 806}, + { 32, 15, 930, 546,1344, 806}, + { 62, 25, 800, 546,1344, 806}, /* chiawen for dot9 -> dot8 */ + { 104, 45, 945, 496,1344, 806}, + { 62, 25, 800, 546,1344, 806}, + { 31, 18,1008, 624,1344, 806}, + { 1, 1,1344, 806,1344, 806} +}; + +static XGI330_LCDDataStruct XGI_ExtLCD1024x768Data[]= +{ + { 42, 25,1536, 419,1344, 806}, /* { 12, 5, 896, 512,1344, 806}, // alan 09/12/2003 */ + { 48, 25,1536, 369,1344, 806}, /* { 12, 5, 896, 510,1344, 806}, // alan 09/12/2003 */ + { 42, 25,1536, 419,1344, 806}, /* { 32, 15,1008, 505,1344, 806}, // alan 09/12/2003 */ + { 48, 25,1536, 369,1344, 806}, /* { 32, 15,1008, 514,1344, 806}, // alan 09/12/2003 */ + { 12, 5, 896, 500,1344, 806}, + { 42, 25,1024, 625,1344, 806}, + { 1, 1,1344, 806,1344, 806}, + { 12, 5, 896, 500,1344, 806}, + { 42, 25,1024, 625,1344, 806}, + { 1, 1,1344, 806,1344, 806}, + { 12, 5, 896, 500,1344, 806}, + { 42, 25,1024, 625,1344, 806}, + { 1, 1,1344, 806,1344, 806} +}; + +/*XGI330_LCDDataStruct XGI_St2LCD1024x768Data[]= +{ + { 62, 25, 800, 546,1344, 806}, + { 32, 15, 930, 546,1344, 806}, + { 62, 25, 800, 546,1344, 806}, + { 104, 45, 945, 496,1344, 806}, + { 62, 25, 800, 546,1344, 806}, + { 31, 18,1008, 624,1344, 806}, + { 1, 1,1344, 806,1344, 806} +};*/ + +static XGI330_LCDDataStruct XGI_CetLCD1024x768Data[]= +{ + { 1,1,1344,806,1344,806 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + { 1,1,1344,806,1344,806 }, /* 01 (320x350,640x350) */ + { 1,1,1344,806,1344,806 }, /* 02 (360x400,720x400) */ + { 1,1,1344,806,1344,806 }, /* 03 (720x350) */ + { 1,1,1344,806,1344,806 }, /* 04 (640x480x60Hz) */ + { 1,1,1344,806,1344,806 }, /* 05 (800x600x60Hz) */ + { 1,1,1344,806,1344,806 } /* 06 (1024x768x60Hz) */ +}; + +static XGI330_LCDDataStruct XGI_StLCD1280x1024Data[]= +{ + { 22, 5, 800, 510,1650,1088}, + { 22, 5, 800, 510,1650,1088}, + { 176, 45, 900, 510,1650,1088}, + { 176, 45, 900, 510,1650,1088}, + { 22, 5, 800, 510,1650,1088}, + { 13, 5,1024, 675,1560,1152}, + { 16, 9,1266, 804,1688,1072}, + { 1, 1,1688,1066,1688,1066} +}; + +static XGI330_LCDDataStruct XGI_ExtLCD1280x1024Data[]= +{ + { 211, 60,1024, 501,1688,1066}, + { 211, 60,1024, 508,1688,1066}, + { 211, 60,1024, 501,1688,1066}, + { 211, 60,1024, 508,1688,1066}, + { 211, 60,1024, 500,1688,1066}, + { 211, 75,1024, 625,1688,1066}, + { 211, 120,1280, 798,1688,1066}, + { 1, 1,1688,1066,1688,1066} +}; + +#if 0 +static XGI330_LCDDataStruct XGI_St2LCD1280x1024Data[]= +{ + { 22, 5, 800, 510,1650,1088}, + { 22, 5, 800, 510,1650,1088}, + { 176, 45, 900, 510,1650,1088}, + { 176, 45, 900, 510,1650,1088}, + { 22, 5, 800, 510,1650,1088}, + { 13, 5,1024, 675,1560,1152}, + { 16, 9,1266, 804,1688,1072}, + { 1, 1,1688,1066,1688,1066} +}; +#endif + +static XGI330_LCDDataStruct XGI_CetLCD1280x1024Data[]= +{ + { 1,1,1688,1066,1688,1066 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 1,1,1688,1066,1688,1066 }, /* 01 (320x350,640x350) */ + { 1,1,1688,1066,1688,1066 }, /* 02 (360x400,720x400) */ + { 1,1,1688,1066,1688,1066 }, /* 03 (720x350) */ + { 1,1,1688,1066,1688,1066 }, /* 04 (640x480x60Hz) */ + { 1,1,1688,1066,1688,1066 }, /* 05 (800x600x60Hz) */ + { 1,1,1688,1066,1688,1066 }, /* 06 (1024x768x60Hz) */ + { 1,1,1688,1066,1688,1066 }, /* 07 (1280x1024x60Hz) */ + { 1,1,1688,1066,1688,1066 } /* 08 (1400x1050x60Hz) */ +}; + +static XGI330_LCDDataStruct XGI_StLCD1400x1050Data[]= +{ + { 211,100,2100,408,1688,1066 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 211,64,1536,358,1688,1066 }, /* 01 (320x350,640x350) */ + { 211,100,2100,408,1688,1066 }, /* 02 (360x400,720x400) */ + { 211,64,1536,358,1688,1066 }, /* 03 (720x350) */ + { 211,48,840,488,1688,1066 }, /* 04 (640x480x60Hz) */ + { 211,72,1008,609,1688,1066 }, /* 05 (800x600x60Hz) */ + { 211,128,1400,776,1688,1066 }, /* 06 (1024x768x60Hz) */ + { 1,1,1688,1066,1688,1066 }, /* 07 (1280x1024x60Hz w/o Scaling) */ + { 1,1,1688,1066,1688,1066 } /* 08 (1400x1050x60Hz) */ +}; + +static XGI330_LCDDataStruct XGI_ExtLCD1400x1050Data[]= +{ + { 211,100,2100,408,1688,1066 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 211,64,1536,358,1688,1066 }, /* 01 (320x350,640x350) */ + { 211,100,2100,408,1688,1066 }, /* 02 (360x400,720x400) */ + { 211,64,1536,358,1688,1066 }, /* 03 (720x350) */ + { 211,48,840,488,1688,1066 }, /* 04 (640x480x60Hz) */ + { 211,72,1008,609,1688,1066 }, /* 05 (800x600x60Hz) */ + { 211,128,1400,776,1688,1066 }, /* 06 (1024x768x60Hz) */ + { 1,1,1688,1066,1688,1066 }, /* 07 (1280x1024x60Hz w/o Scaling) */ + { 1,1,1688,1066,1688,1066 } /* 08 (1400x1050x60Hz) */ +}; + +static XGI330_LCDDataStruct XGI_ExtLCD1600x1200Data[]= +{ + { 4,1,1620,420,2160,1250 }, /* { 3,1,2160,425,2160,1250 }, // 00 (320x200,320x400,640x200,640x400) // alan 10/14/2003 */ + { 27,7,1920,375,2160,1250 }, /* 01 (320x350,640x350) */ + { 4,1,1620,420,2160,1250 }, /* { 3,1,2160,425,2160,1250 }, // 02 (360x400,720x400) // alan 10/14/2003 */ + { 27,7,1920,375,2160,1250 }, /* 03 (720x350) */ + { 27,4,800,500,2160,1250 }, /* 04 (640x480x60Hz) */ + { 4,1,1080,625,2160,1250 }, /* 05 (800x600x60Hz) */ + { 5,2,1350,800,2160,1250 }, /* 06 (1024x768x60Hz) */ + { 27,16,1500,1064,2160,1250 }, /* 07 (1280x1024x60Hz) */ + { 9,7,1920,1106,2160,1250 }, /* 08 (1400x1050x60Hz) */ + { 1,1,2160,1250,2160,1250 } /* 09 (1600x1200x60Hz) ;302lv */ +}; + +static XGI330_LCDDataStruct XGI_StLCD1600x1200Data[]= +{ + { 27,4,800,500,2160,1250 },/* 00 (320x200,320x400,640x200,640x400) */ + { 27,4,800,500,2160,1250 },/* 01 (320x350,640x350) */ + { 27,4,800,500,2160,1250 },/* 02 (360x400,720x400) */ + { 27,4,800,500,2160,1250 },/* 03 (720x350) */ + { 27,4,800,500,2160,1250 },/* 04 (320x240,640x480) */ + { 4,1,1080,625,2160,1250 },/* 05 (400x300,800x600) */ + { 5,2,1350,800,2160,1250 },/* 06 (512x384,1024x768) */ + { 135,88,1600,1100,2160,1250 },/* 07 (1280x1024) */ + { 1,1,1800,1500,2160,1250 },/* 08 (1400x1050) */ + { 1,1,2160,1250,2160,1250 } /* 09 (1600x1200) */ +}; + +static XGI330_LCDDataStruct XGI_CetLCD1400x1050Data[]= +{ + { 1,1,1688,1066,1688,1066 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 1,1,1688,1066,1688,1066 }, /* 01 (320x350,640x350) */ + { 1,1,1688,1066,1688,1066 }, /* 02 (360x400,720x400) */ + { 1,1,1688,1066,1688,1066 }, /* 03 (720x350) */ + { 1,1,1688,1066,1688,1066 }, /* 04 (640x480x60Hz) */ + { 1,1,1688,1066,1688,1066 }, /* 05 (800x600x60Hz) */ + { 1,1,1688,1066,1688,1066 }, /* 06 (1024x768x60Hz) */ + { 1,1,1688,1066,1688,1066 }, /* 07 (1280x1024x60Hz) */ + { 1,1,1688,1066,1688,1066 } /* 08 (1400x1050x60Hz) */ +}; + +static XGI330_LCDDataStruct XGI_NoScalingData[]= +{ + { 1, 1, 800, 449, 800, 449}, + { 1, 1, 800, 449, 800, 449}, + { 1, 1, 900, 449, 900, 449}, + { 1, 1, 900, 449, 900, 449}, + { 1, 1, 800, 525, 800, 525}, + { 1, 1,1056, 628,1056, 628}, + { 1, 1,1344, 806,1344, 806}, + { 1, 1,1688,1066,1688,1066} +}; + +static XGI330_LCDDataStruct XGI_ExtLCD1024x768x75Data[]= +{ + {42,25,1536,419,1344,806 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + {48,25,1536,369,1344,806 }, /* ; 01 (320x350,640x350) */ + {42,25,1536,419,1344,806 }, /* ; 02 (360x400,720x400) */ + {48,25,1536,369,1344,806 }, /* ; 03 (720x350) */ + {8,5,1312,500,1312,800 }, /* ; 04 (640x480x75Hz) */ + {41,25,1024,625,1312,800 }, /* ; 05 (800x600x75Hz) */ + {1,1,1312,800,1312,800 } /* ; 06 (1024x768x75Hz) */ +}; + +#if 0 +static XGI330_LCDDataStruct XGI_StLCD1024x768x75Data[]= +{ + {42,25,1536,419,1344,806 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + {48,25,1536,369,1344,806 }, /* ; 01 (320x350,640x350) */ + {42,25,1536,419,1344,806 }, /* ; 02 (360x400,720x400) */ + {48,25,1536,369,1344,806 }, /* ; 03 (720x350) */ + {8,5,1312,500,1312,800 }, /* ; 04 (640x480x75Hz) */ + {41,25,1024,625,1312,800 }, /* ; 05 (800x600x75Hz) */ + {1,1,1312,800,1312,800 } /* ; 06 (1024x768x75Hz) */ +}; +#endif + +static XGI330_LCDDataStruct XGI_CetLCD1024x768x75Data[]= +{ + {1,1,1312,800,1312,800}, /* ; 00 (320x200,320x400,640x200,640x400) */ + {1,1,1312,800,1312,800}, /* ; 01 (320x350,640x350) */ + {1,1,1312,800,1312,800}, /* ; 02 (360x400,720x400) */ + {1,1,1312,800,1312,800}, /* ; 03 (720x350) */ + {1,1,1312,800,1312,800}, /* ; 04 (640x480x75Hz) */ + {1,1,1312,800,1312,800}, /* ; 05 (800x600x75Hz) */ + {1,1,1312,800,1312,800} /* ; 06 (1024x768x75Hz) */ +}; + +static XGI330_LCDDataStruct XGI_ExtLCD1280x1024x75Data[]= +{ + {211,60,1024,501,1688,1066 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + {211,60,1024,508,1688,1066 }, /* ; 01 (320x350,640x350) */ + {211,60,1024,501,1688,1066 }, /* ; 02 (360x400,720x400) */ + {211,60,1024,508,1688,1066 }, /* ; 03 (720x350) */ + {211,45,768,498,1688,1066 }, /* ; 04 (640x480x75Hz) */ + {211,75,1024,625,1688,1066 }, /* ; 05 (800x600x75Hz) */ + {211,120,1280,798,1688,1066 }, /* ; 06 (1024x768x75Hz) */ + {1,1,1688,1066,1688,1066 } /* ; 07 (1280x1024x75Hz) */ +}; + +static XGI330_LCDDataStruct XGI_StLCD1280x1024x75Data[]= +{ + {211,60,1024,501,1688,1066 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + {211,60,1024,508,1688,1066 }, /* ; 01 (320x350,640x350) */ + {211,60,1024,501,1688,1066 }, /* ; 02 (360x400,720x400) */ + {211,60,1024,508,1688,1066 }, /* ; 03 (720x350) */ + {211,45,768,498,1688,1066 }, /* ; 04 (640x480x75Hz) */ + {211,75,1024,625,1688,1066 }, /* ; 05 (800x600x75Hz) */ + {211,120,1280,798,1688,1066}, /* ; 06 (1024x768x75Hz) */ + {1,1,1688,1066,1688,1066 } /* ; 07 (1280x1024x75Hz) */ +}; + +static XGI330_LCDDataStruct XGI_CetLCD1280x1024x75Data[]= +{ + {1,1,1688,1066,1688,1066}, /* ; 00 (320x200,320x400,640x200,640x400) */ + {1,1,1688,1066,1688,1066}, /* ; 01 (320x350,640x350) */ + {1,1,1688,1066,1688,1066}, /* ; 02 (360x400,720x400) */ + {1,1,1688,1066,1688,1066}, /* ; 03 (720x350) */ + {1,1,1688,1066,1688,1066}, /* ; 04 (640x480x75Hz) */ + {1,1,1688,1066,1688,1066}, /* ; 05 (800x600x75Hz) */ + {1,1,1688,1066,1688,1066}, /* ; 06 (1024x768x75Hz) */ + {1,1,1688,1066,1688,1066} /* ; 07 (1280x1024x75Hz) */ +}; + +static XGI330_LCDDataStruct XGI_NoScalingDatax75[]= +{ + {1,1,800,449,800,449 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + {1,1,800,449,800,449 }, /* ; 01 (320x350,640x350) */ + {1,1,900,449,900,449 }, /* ; 02 (360x400,720x400) */ + {1,1,900,449,900,449 }, /* ; 03 (720x350) */ + {1,1,840,500,840,500 }, /* ; 04 (640x480x75Hz) */ + {1,1,1056,625,1056,625 }, /* ; 05 (800x600x75Hz) */ + {1,1,1312,800,1312,800 }, /* ; 06 (1024x768x75Hz) */ + {1,1,1688,1066,1688,1066}, /* ; 07 (1280x1024x75Hz) */ + {1,1,1688,1066,1688,1066}, /* ; 08 (1400x1050x75Hz) ;;[ycchen] 12/19/02 */ + {1,1,2160,1250,2160,1250}, /* ; 09 (1600x1200x75Hz) */ + {1,1,1688,806,1688,806 } /* ; 0A (1280x768x75Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_ExtLCDDes1024x768Data[]= +{ + { 9,1057,0, 771 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + { 9,1057,0, 771 }, /* ; 01 (320x350,640x350) */ + { 9,1057,0, 771 }, /* ; 02 (360x400,720x400) */ + { 9,1057,0, 771 }, /* ; 03 (720x350) */ + { 9,1057,0, 771 }, /* ; 04 (640x480x60Hz) */ + { 9,1057,0, 771 }, /* ; 05 (800x600x60Hz) */ + { 9,1057,805, 770 } /* ; 06 (1024x768x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_StLCDDes1024x768Data[]= +{ + { 9,1057,737,703 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + { 9,1057,686,651 }, /* ; 01 (320x350,640x350) */ + { 9,1057,737,703 }, /* ; 02 (360x400,720x400) */ + { 9,1057,686,651 }, /* ; 03 (720x350) */ + { 9,1057,776,741 }, /* ; 04 (640x480x60Hz) */ + { 9,1057, 0 ,771 }, /* ; 05 (800x600x60Hz) */ + { 9,1057,805,770 } /* ; 06 (1024x768x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_CetLCDDes1024x768Data[]= +{ + { 1152,856,622,587 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + { 1152,856,597,562 }, /* ; 01 (320x350,640x350) */ + { 1152,856,622,587 }, /* ; 02 (360x400,720x400) */ + { 1152,856,597,562 }, /* ; 03 (720x350) */ + { 1152,856,662,627 }, /* ; 04 (640x480x60Hz) */ + { 1232,936,722,687 }, /* ; 05 (800x600x60Hz) */ + { 0,1048,805,770 } /* ; 06 (1024x768x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_ExtLCDDLDes1280x1024Data[]= +{ + { 18,1346,981,940 },/* 00 (320x200,320x400,640x200,640x400) */ + { 18,1346,926,865 },/* 01 (320x350,640x350) */ + { 18,1346,981,940 },/* 02 (360x400,720x400) */ + { 18,1346,926,865 },/* 03 (720x350) */ + { 18,1346,0,1025 },/* 04 (640x480x60Hz) */ + { 18,1346,0,1025 },/* 05 (800x600x60Hz) */ + { 18,1346,1065,1024 },/* 06 (1024x768x60Hz) */ + { 18,1346,1065,1024 }/* 07 (1280x1024x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_StLCDDLDes1280x1024Data[]= +{ + { 18,1346,970,907 },/* 00 (320x200,320x400,640x200,640x400) */ + { 18,1346,917,854 },/* 01 (320x350,640x350) */ + { 18,1346,970,907 },/* 02 (360x400,720x400) */ + { 18,1346,917,854 },/* 03 (720x350) */ + { 18,1346,0,1025 },/* 04 (640x480x60Hz) */ + { 18,1346,0,1025 },/* 05 (800x600x60Hz) */ + { 18,1346,1065,1024 },/* 06 (1024x768x60Hz) */ + { 18,1346,1065,1024 }/* 07 (1280x1024x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_CetLCDDLDes1280x1024Data[]= +{ + { 1368,1008,752,711 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 1368,1008,729,688 }, /* 01 (320x350,640x350) */ + { 1368,1008,752,711 }, /* 02 (360x400,720x400) */ + { 1368,1008,729,688 }, /* 03 (720x350) */ + { 1368,1008,794,753 }, /* 04 (640x480x60Hz) */ + { 1448,1068,854,813 }, /* 05 (800x600x60Hz) */ + { 1560,1200,938,897 }, /* 06 (1024x768x60Hz) */ + { 18,1346,1065,1024 } /* 07 (1280x1024x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_ExtLCDDes1280x1024Data[]= +{ + { 9,1337,981,940 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + { 9,1337,926,884 }, /* ; 01 (320x350,640x350) alan, 2003/09/30 */ + { 9,1337,981,940 }, /* ; 02 (360x400,720x400) */ + { 9,1337,926,884 }, /* ; 03 (720x350) alan, 2003/09/30 */ + { 9,1337,0,1025 }, /* ; 04 (640x480x60Hz) */ + { 9,1337,0,1025 }, /* ; 05 (800x600x60Hz) */ + { 9,1337,1065,1024 }, /* ; 06 (1024x768x60Hz) */ + { 9,1337,1065,1024 } /* ; 07 (1280x1024x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_StLCDDes1280x1024Data[]= +{ + { 9,1337,970,907 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + { 9,1337,917,854 }, /* ; 01 (320x350,640x350) */ + { 9,1337,970,907 }, /* ; 02 (360x400,720x400) */ + { 9,1337,917,854 }, /* ; 03 (720x350) */ + { 9,1337,0,1025 }, /* ; 04 (640x480x60Hz) */ + { 9,1337,0,1025 }, /* ; 05 (800x600x60Hz) */ + { 9,1337,1065,1024 }, /* ; 06 (1024x768x60Hz) */ + { 9,1337,1065,1024 } /* ; 07 (1280x1024x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_CetLCDDes1280x1024Data[]= +{ + { 1368,1008,752,711 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 1368,1008,729,688 }, /* 01 (320x350,640x350) */ + { 1368,1008,752,711 }, /* 02 (360x400,720x400) */ + { 1368,1008,729,688 }, /* 03 (720x350) */ + { 1368,1008,794,753 }, /* 04 (640x480x60Hz) */ + { 1448,1068,854,813 }, /* 05 (800x600x60Hz) */ + { 1560,1200,938,897 }, /* 06 (1024x768x60Hz) */ + { 9,1337,1065,1024 } /* 07 (1280x1024x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_StLCDDLDes1400x1050Data[]= +{ + { 18,1464,0,1051 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 18,1464,0,1051 }, /* 01 (320x350,640x350) */ + { 18,1464,0,1051 }, /* 02 (360x400,720x400) */ + { 18,1464,0,1051 }, /* 03 (720x350) */ + { 18,1464,0,1051 }, /* 04 (640x480x60Hz) */ + { 18,1464,0,1051 }, /* 05 (800x600x60Hz) */ + { 18,1464,0,1051 }, /* 06 (1024x768x60Hz) */ + { 1646,1406,1053,1038 }, /* 07 (1280x1024x60Hz) */ + { 18,1464,0,1051 } /* 08 (1400x1050x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_ExtLCDDLDes1400x1050Data[]= +{ + { 18,1464,0,1051 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 18,1464,0,1051 }, /* 01 (320x350,640x350) */ + { 18,1464,0,1051 }, /* 02 (360x400,720x400) */ + { 18,1464,0,1051 }, /* 03 (720x350) */ + { 18,1464,0,1051 }, /* 04 (640x480x60Hz) */ + { 18,1464,0,1051 }, /* 05 (800x600x60Hz) */ + { 18,1464,0,1051 }, /* 06 (1024x768x60Hz) */ + { 1646,1406,1053,1038 }, /* 07 (1280x1024x60Hz) */ + { 18,1464,0,1051 } /* 08 (1400x1050x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_StLCDDes1400x1050Data[]= +{ + { 9,1455,0,1051 },/* 00 (320x200,320x400,640x200,640x400) */ + { 9,1455,0,1051 },/* 01 (320x350,640x350) */ + { 9,1455,0,1051 },/* 02 (360x400,720x400) */ + { 9,1455,0,1051 },/* 03 (720x350) */ + { 9,1455,0,1051 },/* 04 (640x480x60Hz) */ + { 9,1455,0,1051 },/* 05 (800x600x60Hz) */ + { 9,1455,0,1051 },/* 06 (1024x768x60Hz) */ + { 1637,1397,1053,1038 },/* 07 (1280x1024x60Hz) */ + { 9,1455,0,1051 } /* 08 (1400x1050x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_ExtLCDDes1400x1050Data[]= +{ + { 9,1455,0,1051 },/* 00 (320x200,320x400,640x200,640x400) */ + { 9,1455,0,1051 },/* 01 (320x350,640x350) */ + { 9,1455,0,1051 },/* 02 (360x400,720x400) */ + { 9,1455,0,1051 },/* 03 (720x350) */ + { 9,1455,0,1051 },/* 04 (640x480x60Hz) */ + { 9,1455,0,1051 },/* 05 (800x600x60Hz) */ + { 9,1455,0,1051 },/* 06 (1024x768x60Hz) */ + { 1637,1397,1053,1038 },/* 07 (1280x1024x60Hz) */ + { 9,1455,0,1051 } /* 08 (1400x1050x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_CetLCDDes1400x1050Data[]= +{ + { 1308,1068,781,766 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 1308,1068,781,766 }, /* 01 (320x350,640x350) */ + { 1308,1068,781,766 }, /* 02 (360x400,720x400) */ + { 1308,1068,781,766 }, /* 03 (720x350) */ + { 1308,1068,781,766 }, /* 04 (640x480x60Hz) */ + { 1388,1148,841,826 }, /* 05 (800x600x60Hz) */ + { 1490,1250,925,910 }, /* 06 (1024x768x60Hz) */ + { 1646,1406,1053,1038 }, /* 07 (1280x1024x60Hz) */ + { 18,1464,0,1051 } /* 08 (1400x1050x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_CetLCDDes1400x1050Data2[]= +{ + { 0,1448,0,1051 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 0,1448,0,1051 }, /* 01 (320x350,640x350) */ + { 0,1448,0,1051 }, /* 02 (360x400,720x400) */ + { 0,1448,0,1051 }, /* 03 (720x350) */ + { 0,1448,0,1051 } /* 04 (640x480x60Hz) */ +}; + + + +static XGI330_LCDDataDesStruct XGI_ExtLCDDLDes1600x1200Data[]= +{ + { 18,1682,0,1201 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 18,1682,0,1201 }, /* 01 (320x350,640x350) */ + { 18,1682,0,1201 }, /* 02 (360x400,720x400) */ + { 18,1682,0,1201 }, /* 03 (720x350) */ + { 18,1682,0,1201 }, /* 04 (640x480x60Hz) */ + { 18,1682,0,1201 }, /* 05 (800x600x60Hz) */ + { 18,1682,0,1201 }, /* 06 (1024x768x60Hz) */ + { 18,1682,0,1201 }, /* 07 (1280x1024x60Hz) */ + { 18,1682,0,1201 }, /* 08 (1400x1050x60Hz) */ + { 18,1682,0,1201 } /* 09 (1600x1200x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_StLCDDLDes1600x1200Data[]= +{ + { 18,1682,1150,1101 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 18,1682,1083,1034 }, /* 01 (320x350,640x350) */ + { 18,1682,1150,1101 }, /* 02 (360x400,720x400) */ + { 18,1682,1083,1034 }, /* 03 (720x350) */ + { 18,1682,0,1201 }, /* 04 (640x480x60Hz) */ + { 18,1682,0,1201 }, /* 05 (800x600x60Hz) */ + { 18,1682,0,1201 }, /* 06 (1024x768x60Hz) */ + { 18,1682,1232,1183 }, /* 07 (1280x1024x60Hz) */ + { 18,1682,0,1201 }, /* 08 (1400x1050x60Hz) */ + { 18,1682,0,1201 } /* 09 (1600x1200x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_ExtLCDDes1600x1200Data[]= +{ + { 9,1673,0,1201 },/* 00 (320x200,320x400,640x200,640x400) */ + { 9,1673,0,1201 },/* 01 (320x350,640x350) */ + { 9,1673,0,1201 },/* 02 (360x400,720x400) */ + { 9,1673,0,1201 },/* 03 (720x350) */ + { 9,1673,0,1201 },/* 04 (640x480x60Hz) */ + { 9,1673,0,1201 },/* 05 (800x600x60Hz) */ + { 9,1673,0,1201 },/* 06 (1024x768x60Hz) */ + { 9,1673,0,1201 },/* 07 (1280x1024x60Hz) */ + { 9,1673,0,1201 },/* 08 (1400x1050x60Hz) */ + { 9,1673,0,1201 } /* 09 (1600x1200x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_StLCDDes1600x1200Data[]= +{ + { 9,1673,1150,1101 },/* 00 (320x200,320x400,640x200,640x400) */ + { 9,1673,1083,1034 },/* 01 (320x350,640x350) */ + { 9,1673,1150,1101 },/* 02 (360x400,720x400) */ + { 9,1673,1083,1034 },/* 03 (720x350) */ + { 9,1673,0,1201 },/* 04 (640x480x60Hz) */ + { 9,1673,0,1201 },/* 05 (800x600x60Hz) */ + { 9,1673,0,1201 },/* 06 (1024x768x60Hz) */ + { 9,1673,1232,1183 },/* 07 (1280x1024x60Hz) */ + { 9,1673,0,1201 },/* 08 (1400x1050x60Hz) */ + { 9,1673,0,1201 } /* 09 (1600x1200x60Hz) */ +}; + +static XGI330_LCDDataDesStruct2 XGI_NoScalingDesData[]= +{ + { 9,657,448,405,96,2 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 9,657,448,355,96,2 }, /* 01 (320x350,640x350) */ + { 9,657,448,405,96,2 }, /* 02 (360x400,720x400) */ + { 9,657,448,355,96,2 }, /* 03 (720x350) */ + { 9,657,1,483,96,2 }, /* 04 (640x480x60Hz) */ + { 9,849,627,600,128,4 }, /* 05 (800x600x60Hz) */ + { 9,1057,805,770,0136,6 }, /* 06 (1024x768x60Hz) */ + { 9,1337,0,1025,112,3 }, /* 07 (1280x1024x60Hz) */ + { 9,1457,0,1051,112,3 }, /* 08 (1400x1050x60Hz) }, //;[ycchen] 12/19/02 */ + { 9,1673,0,1201,192,3 }, /* 09 (1600x1200x60Hz) */ + { 9,1337,0,771,112,6 } /* 0A (1280x768x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_ExtLCDDes1024x768x75Data[]= /* ;;1024x768x75Hz */ +{ + {9,1049,0,769}, /* ; 00 (320x200,320x400,640x200,640x400) */ + {9,1049,0,769}, /* ; 01 (320x350,640x350) */ + {9,1049,0,769}, /* ; 02 (360x400,720x400) */ + {9,1049,0,769}, /* ; 03 (720x350) */ + {9,1049,0,769}, /* ; 04 (640x480x75Hz) */ + {9,1049,0,769}, /* ; 05 (800x600x75Hz) */ + {9,1049,0,769} /* ; 06 (1024x768x75Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_StLCDDes1024x768x75Data[]= +{ + {9,1049,0,769}, /* ; 00 (320x200,320x400,640x200,640x400) */ + {9,1049,0,769}, /* ; 01 (320x350,640x350) */ + {9,1049,0,769}, /* ; 02 (360x400,720x400) */ + {9,1049,0,769}, /* ; 03 (720x350) */ + {9,1049,0,769}, /* ; 04 (640x480x75Hz) */ + {9,1049,0,769}, /* ; 05 (800x600x75Hz) */ + {9,1049,0,769} /* ; 06 (1024x768x75Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_CetLCDDes1024x768x75Data[]= /* ;;1024x768x75Hz */ +{ + {1152,856,622,587}, /* ; 00 (320x200,320x400,640x200,640x400) */ + {1152,856,597,562}, /* ; 01 (320x350,640x350) */ + {1192,896,622,587}, /* ; 02 (360x400,720x400) */ + {1192,896,597,562}, /* ; 03 (720x350) */ + {1129,857,656,625}, /* ; 04 (640x480x75Hz) */ + {1209,937,716,685}, /* ; 05 (800x600x75Hz) */ + {9,1049,0,769} /* ; 06 (1024x768x75Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_ExtLCDDLDes1280x1024x75Data[]= /* ;;1280x1024x75Hz */ +{ + {18,1314,0,1025 },/* ; 00 (320x200,320x400,640x200,640x400) */ + {18,1314,0,1025 },/* ; 01 (320x350,640x350) */ + {18,1314,0,1025 },/* ; 02 (360x400,720x400) */ + {18,1314,0,1025 },/* ; 03 (720x350) */ + {18,1314,0,1025 },/* ; 04 (640x480x60Hz) */ + {18,1314,0,1025 },/* ; 05 (800x600x60Hz) */ + {18,1314,0,1025 },/* ; 06 (1024x768x60Hz) */ + {18,1314,0,1025 }/* ; 07 (1280x1024x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_StLCDDLDes1280x1024x75Data[]= +{ + {18,1314,0,1025 },/* ; 00 (320x200,320x400,640x200,640x400) */ + {18,1314,0,1025 },/* ; 01 (320x350,640x350) */ + {18,1314,0,1025 },/* ; 02 (360x400,720x400) */ + {18,1314,0,1025 },/* ; 03 (720x350) */ + {18,1314,0,1025 },/* ; 04 (640x480x60Hz) */ + {18,1314,0,1025 },/* ; 05 (800x600x60Hz) */ + {18,1314,0,1025 },/* ; 06 (1024x768x60Hz) */ + {18,1314,0,1025 }/* ; 07 (1280x1024x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_CetLCDDLDes1280x1024x75Data[]= /* 1280x1024x75Hz */ +{ + {1368,1008,752,711}, /* ; 00 (320x200,320x400,640x200,640x400) */ + {1368,1008,729,688}, /* ; 01 (320x350,640x350) */ + {1408,1048,752,711}, /* ; 02 (360x400,720x400) */ + {1408,1048,729,688}, /* ; 03 (720x350) */ + {1377,985,794,753}, /* ; 04 (640x480x75Hz) */ + {1457,1065,854,813}, /* ; 05 (800x600x75Hz) */ + {1569,1177,938,897}, /* ; 06 (1024x768x75Hz) */ + {18,1314,0,1025} /* ; 07 (1280x1024x75Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_ExtLCDDes1280x1024x75Data[]= /* ;;1280x1024x75Hz */ +{ + {9,1305,0,1025},/* ; 00 (320x200,320x400,640x200,640x400) */ + {9,1305,0,1025},/* ; 01 (320x350,640x350) */ + {9,1305,0,1025},/* ; 02 (360x400,720x400) */ + {9,1305,0,1025},/* ; 03 (720x350) */ + {9,1305,0,1025},/* ; 04 (640x480x60Hz) */ + {9,1305,0,1025},/* ; 05 (800x600x60Hz) */ + {9,1305,0,1025},/* ; 06 (1024x768x60Hz) */ + {9,1305,0,1025} /* ; 07 (1280x1024x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_StLCDDes1280x1024x75Data[]= +{ + {9,1305,0,1025},/* ; 00 (320x200,320x400,640x200,640x400) */ + {9,1305,0,1025},/* ; 01 (320x350,640x350) */ + {9,1305,0,1025},/* ; 02 (360x400,720x400) */ + {9,1305,0,1025},/* ; 03 (720x350) */ + {9,1305,0,1025},/* ; 04 (640x480x60Hz) */ + {9,1305,0,1025},/* ; 05 (800x600x60Hz) */ + {9,1305,0,1025},/* ; 06 (1024x768x60Hz) */ + {9,1305,0,1025} /* ; 07 (1280x1024x60Hz) */ +}; + +static XGI330_LCDDataDesStruct XGI_CetLCDDes1280x1024x75Data[]= /* 1280x1024x75Hz */ +{ + {1368,1008,752,711}, /* ; 00 (320x200,320x400,640x200,640x400) */ + {1368,1008,729,688}, /* ; 01 (320x350,640x350) */ + {1408,1048,752,711}, /* ; 02 (360x400,720x400) */ + {1408,1048,729,688}, /* ; 03 (720x350) */ + {1377,985,794,753}, /* ; 04 (640x480x75Hz) */ + {1457,1065,854,813}, /* ; 05 (800x600x75Hz) */ + {1569,1177,938,897}, /* ; 06 (1024x768x75Hz) */ + {9,1305,0,1025} /* ; 07 (1280x1024x75Hz) */ +}; + +static XGI330_LCDDataDesStruct2 XGI_NoScalingDesDatax75[]= /* Scaling LCD 75Hz */ +{ + {9,657,448,405,96,2}, /* ; 00 (320x200,320x400,640x200,640x400) */ + {9,657,448,355,96,2}, /* ; 01 (320x350,640x350) */ + {9,738,448,405,108,2}, /* ; 02 (360x400,720x400) */ + {9,738,448,355,108,2}, /* ; 03 (720x350) */ + {9,665,0,481,64,3}, /* ; 04 (640x480x75Hz) */ + {9,825,0,601,80,3}, /* ; 05 (800x600x75Hz) */ + {9,1049,0,769,96,3}, /* ; 06 (1024x768x75Hz) */ + {9,1305,0,1025,144,3}, /* ; 07 (1280x1024x75Hz) */ + {9,1457,0,1051,112,3}, /* ; 08 (1400x1050x60Hz) ;;[ycchen] 12/19/02 */ + {9,1673,0,1201,192,3}, /* ; 09 (1600x1200x75Hz) */ + {9,1337,0,771,112,6} /* ; 0A (1280x768x60Hz) */ +}; + +static XGI330_TVDataStruct XGI_StPALData[]= +{ + { 1, 1, 864, 525,1270, 400, 100, 0, 760}, + { 1, 1, 864, 525,1270, 350, 100, 0, 760}, + { 1, 1, 864, 525,1270, 400, 0, 0, 720}, + { 1, 1, 864, 525,1270, 350, 0, 0, 720}, + { 1, 1, 864, 525,1270, 480, 50, 0, 760}, + { 1, 1, 864, 525,1270, 600, 50, 0, 0} +}; + +static XGI330_TVDataStruct XGI_ExtPALData[]= +{ + { 2, 1,1080, 463,1270, 500, 50, 0, 50}, + { 15, 7,1152, 413,1270, 500, 50, 0, 50}, + { 2, 1,1080, 463,1270, 500, 50, 0, 50}, + { 15, 7,1152, 413,1270, 500, 50, 0, 50}, + { 2, 1, 900, 543,1270, 500, 0, 0, 50}, + { 4, 3,1080, 663,1270, 500, 438, 0, 438}, + { 1, 1,1125, 831,1270, 500, 686, 0, 686}, /*301b*/ + { 3, 2,1080, 619,1270, 540, 438, 0, 438} +}; + +static XGI330_TVDataStruct XGI_StNTSCData[]= +{ + { 1, 1, 858, 525,1270, 400, 50, 0, 760}, + { 1, 1, 858, 525,1270, 350, 50, 0, 640}, + { 1, 1, 858, 525,1270, 400, 0, 0, 720}, + { 1, 1, 858, 525,1270, 350, 0, 0, 720}, + { 1, 1, 858, 525,1270, 480, 0, 0, 760} +}; + +static XGI330_TVDataStruct XGI_ExtNTSCData[]= +{ + { 9, 5, 1001, 453,1270, 420, 171, 0, 171}, + { 12, 5, 858, 403,1270, 420, 171, 0, 171}, + { 9, 5, 1001, 453,1270, 420, 171, 0, 171}, + { 12, 5, 858, 403,1270, 420, 171, 0, 171}, + { 143, 80, 836, 523,1270, 420, 224, 0, 0}, + { 143, 120,1008, 643,1270, 420, 0, 1, 0}, + { 1, 1,1120, 821,1516, 420, 0, 1, 0}, /*301b*/ + { 2, 1, 858, 503,1584, 480, 0, 1, 0}, + { 3, 2,1001, 533,1270, 420, 0, 0, 0} +}; + +static XGI330_TVDataStruct XGI_St1HiTVData[]= +{ + { 1,1,892,563,690,800,0,0,0 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 1,1,892,563,690,700,0,0,0 }, /* 01 (320x350,640x350) */ + { 1,1,1000,563,785,800,0,0,0 }, /* 02 (360x400,720x400) */ + { 1,1,1000,563,785,700,0,0,0 }, /* 03 (720x350) */ + { 1,1,892,563,690,960,0,0,0 }, /* 04 (320x240,640x480) */ + { 8,5,1050,683,1648,960,0x150,1,0 } /* 05 (400x300,800x600) */ +}; + +static XGI330_TVDataStruct XGI_St2HiTVData[]= +{ + { 3,1,840,483,1648,960,0x032,0,0 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 1,1,892,563,690,700,0,0,0 }, /* 01 (320x350,640x350) */ + { 3,1,840,483,1648,960,0x032,0,0 }, /* 02 (360x400,720x400) */ + { 1,1,1000,563,785,700,0,0,0 }, /* 03 (720x350) */ + { 5,2,840,563,1648,960,0x08D,1,0 }, /* 04 (320x240,640x480) */ + { 8,5,1050,683,1648,960,0x17C,1,0 } /* 05 (400x300,800x600) */ + +}; + +static XGI330_TVDataStruct XGI_ExtHiTVData[]= +{ + { 6,1,840,563,1632,960,0,0,0 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 3,1,960,563,1632,960,0,0,0 }, /* 01 (320x350,640x350) */ + { 3,1,840,483,1632,960,0,0,0 }, /* 02 (360x400,720x400) */ + { 3,1,960,563,1632,960,0,0,0 }, /* 03 (720x350) */ + { 5,1,840,563,1648,960,0x166,1,0 }, /* 04 (320x240,640x480) */ + { 16,5,1050,683,1648,960,0x143,1,0 }, /* 05 (400x300,800x600) */ + { 25,12,1260,851,1648,960,0x032,0,0 }, /* 06 (512x384,1024x768) */ + { 5,4,1575,1124,1648,960,0x128,0,0 }, /* 07 (1280x1024) */ + { 4,1,1050,563,1548,960,0x143,1,0 }, /* 08 (800x480) */ + { 5,2,1400,659,1648,960,0x032,0,0 }, /* 09 (1024x576) */ + { 8,5,1750,803,1648,960,0x128,0,0 } /* 0A (1280x720) */ + +}; + +static XGI330_TVDataStruct XGI_ExtYPbPr525iData[]= +{ + { 9, 5, 1001, 453,1270, 420, 171, 0, 171}, + { 12, 5, 858, 403,1270, 420, 171, 0, 171}, + { 9, 5, 1001, 453,1270, 420, 171, 0, 171}, + { 12, 5, 858, 403,1270, 420, 171, 0, 171}, + { 143, 80, 836, 523,1250, 420, 224, 0, 0}, + { 143, 120,1008, 643,1250, 420, 0, 1, 0}, + { 1, 1,1120, 821,1516, 420, 0, 1, 0}, /*301b*/ + { 2, 1, 858, 503,1584, 480, 0, 1, 0}, + { 3, 2,1001, 533,1250, 420, 0, 0, 0} +}; + +static XGI330_TVDataStruct XGI_StYPbPr525iData[]= +{ + { 1, 1, 858, 525,1270, 400, 50, 0, 760}, + { 1, 1, 858, 525,1270, 350, 50, 0, 640}, + { 1, 1, 858, 525,1270, 400, 0, 0, 720}, + { 1, 1, 858, 525,1270, 350, 0, 0, 720}, + { 1, 1, 858, 525,1270, 480, 0, 0, 760}, +}; + +static XGI330_TVDataStruct XGI_ExtYPbPr525pData[]= +{ + { 9, 5, 1001, 453,1270, 420, 171, 0, 171}, + { 12, 5, 858, 403,1270, 420, 171, 0, 171}, + { 9, 5, 1001, 453,1270, 420, 171, 0, 171}, + { 12, 5, 858, 403,1270, 420, 171, 0, 171}, + { 143, 80, 836, 523,1270, 420, 224, 0, 0}, + { 143, 120,1008, 643,1270, 420, 0, 1, 0}, + { 1, 1,1120, 821,1516, 420, 0, 1, 0}, /*301b*/ + { 2, 1, 858, 503,1584, 480, 0, 1, 0}, + { 3, 2,1001, 533,1270, 420, 0, 0, 0} + }; + +static XGI330_TVDataStruct XGI_StYPbPr525pData[]= +{ + { 1, 1,1716, 525,1270, 400, 50, 0, 760}, + { 1, 1,1716, 525,1270, 350, 50, 0, 640}, + { 1, 1,1716, 525,1270, 400, 0, 0, 720}, + { 1, 1,1716, 525,1270, 350, 0, 0, 720}, + { 1, 1,1716, 525,1270, 480, 0, 0, 760}, +}; + +static XGI330_TVDataStruct XGI_ExtYPbPr750pData[]= +{ + { 3, 1, 935, 470,1130, 680, 50, 0, 0}, /* 00 (320x200,320x400,640x200,640x400) */ + { 24, 7, 935, 420,1130, 680, 50, 0, 0}, /* 01 (320x350,640x350) */ + { 3, 1, 935, 470,1130, 680, 50, 0, 0}, /* 02 (360x400,720x400) */ + { 24, 7, 935, 420,1130, 680, 50, 0, 0}, /* 03 (720x350) */ + { 2, 1,1100, 590,1130, 640, 50, 0, 0}, /* 04 (320x240,640x480) */ + { 3, 2,1210, 690,1130, 660, 50, 0, 0}, /* 05 (400x300,800x600) */ + { 1, 1,1375, 878,1130, 640, 638, 0, 0}, /* 06 (1024x768) */ + { 2, 1, 858, 503,1130, 480, 0, 1, 0}, /* 07 (720x480) */ + { 5, 4,1815, 570,1130, 660, 50, 0, 0}, + { 5, 3,1100, 686,1130, 640, 50, 1, 0}, + { 10, 9,1320, 830,1130, 640, 50, 0, 0} +}; + +static XGI330_TVDataStruct XGI_StYPbPr750pData[]= +{ + { 1, 1,1650, 750,1280, 400, 50, 0, 760}, + { 1, 1,1650, 750,1280, 350, 50, 0, 640}, + { 1, 1,1650, 750,1280, 400, 0, 0, 720}, + { 1, 1,1650, 750,1280, 350, 0, 0, 720}, + { 1, 1,1650, 750,1280, 480, 0, 0, 760}, +}; + +static UCHAR XGI330_NTSCTiming[] = { + 0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c, + 0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a, + 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b, + 0x0c,0x50,0x00,0x97,0x00,0xda,0x4a,0x17, + 0x7d,0x05,0x4b,0x00,0x00,0xe2,0x00,0x02, + 0x03,0x0a,0x65,0x9d,0x08,0x92,0x8f,0x40, + 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x50, + 0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00}; + +static UCHAR XGI330_PALTiming[] = { + 0x21,0x5A,0x35,0x6e,0x04,0x38,0x3d,0x70, + 0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d, + 0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b, + 0x70,0x50,0x00,0x9b,0x00,0xd9,0x5d,0x17, + 0x7d,0x05,0x45,0x00,0x00,0xe8,0x00,0x02, + 0x0d,0x00,0x68,0xb0,0x0b,0x92,0x8f,0x40, + 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x63, + 0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00}; + +static UCHAR XGI330_HiTVExtTiming[] = +{ + 0x2D,0x60,0x2C,0x5F,0x08,0x31,0x3A,0x64, + 0x28,0x02,0x01,0x3D,0x06,0x3E,0x35,0x6D, + 0x06,0x14,0x3E,0x35,0x6D,0x00,0xC5,0x3F, + 0x64,0x90,0x33,0x8C,0x18,0x36,0x3E,0x13, + 0x2A,0xDE,0x2A,0x44,0x40,0x2A,0x44,0x40, + 0x8E,0x8E,0x82,0x07,0x0B, + 0x92,0x0F,0x40,0x60,0x80,0x14,0x90,0x8C, + 0x60,0x14,0x3D,0x63,0x4F, + 0x27,0x00,0xfc,0xff,0x6a,0x00 + +}; + +static UCHAR XGI330_HiTVSt1Timing[] = +{ + 0x32,0x65,0x2C,0x5F,0x08,0x31,0x3A,0x65, + 0x28,0x02,0x01,0x3D,0x06,0x3E,0x35,0x6D, + 0x06,0x14,0x3E,0x35,0x6D,0x00,0xC5,0x3F, + 0x65,0x90,0x7B,0xA8,0x03,0xF0,0x87,0x03, + 0x11,0x15,0x11,0xCF,0x10,0x11,0xCF,0x10, + 0x35,0x35,0x3B,0x69,0x1D, + 0x92,0x0F,0x40,0x60,0x80,0x14,0x90,0x8C, + 0x60,0x04,0x86,0xAF,0x5D, + 0x0E,0x00,0xfc,0xff,0x2d,0x00 +}; + +static UCHAR XGI330_HiTVSt2Timing[] = +{ + 0x32,0x65,0x2C,0x5F,0x08,0x31,0x3A,0x64, + 0x28,0x02,0x01,0x3D,0x06,0x3E,0x35,0x6D, + 0x06,0x14,0x3E,0x35,0x6D,0x00,0xC5,0x3F, + 0x64,0x90,0x33,0x8C,0x18,0x36,0x3E,0x13, + 0x2A,0xDE,0x2A,0x44,0x40,0x2A,0x44,0x40, + 0x8E,0x8E,0x82,0x07,0x0B, + 0x92,0x0F,0x40,0x60,0x80,0x14,0x90,0x8C, + 0x60,0x14,0x3D,0x63,0x4F, + 0x27,0x00,0xFC,0xff,0x6a,0x00 +}; + +static UCHAR XGI330_HiTVTextTiming[] = +{ + 0x32,0x65,0x2C,0x5F,0x08,0x31,0x3A,0x65, + 0x28,0x02,0x01,0x3D,0x06,0x3E,0x35,0x6D, + 0x06,0x14,0x3E,0x35,0x6D,0x00,0xC5,0x3F, + 0x65,0x90,0xE7,0xBC,0x03,0x0C,0x97,0x03, + 0x14,0x78,0x14,0x08,0x20,0x14,0x08,0x20, + 0xC8,0xC8,0x3B,0xD2,0x26, + 0x92,0x0F,0x40,0x60,0x80,0x14,0x90,0x8C, + 0x60,0x04,0x96,0x72,0x5C, + 0x11,0x00,0xFC,0xFF,0x32,0x00 +}; + +static UCHAR XGI330_YPbPr750pTiming[] = +{ + 0x30,0x1d,0xe8,0x09,0x09,0xed,0x0c,0x0c, + 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a, + 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f, + 0xed,0x50,0x70,0x9f,0x16,0x59,0x60,0x13, + 0x27,0x0b,0x27,0xfc,0x30,0x27,0x1c,0xb0, + 0x4b,0x4b,0x6f,0x2f,0x63, + 0x92,0x0F,0x40,0x60,0x80,0x14,0x90,0x8C, + 0x60,0x14,0x73,0x00,0x40, + 0x11,0x00,0xfc,0xff,0x32,0x00 +}; + +static UCHAR XGI330_YPbPr525pTiming[] = +{ + 0x3E,0x11,0x06,0x09,0x0b,0x0c,0x0c,0x0c, + 0x98,0x0a,0x01,0x0d,0x06,0x0d,0x04,0x0a, + 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f, + 0x0c,0x50,0xb2,0x9f,0x16,0x59,0x4f,0x13, + 0xad,0x11,0xad,0x1d,0x40,0x8a,0x3d,0xb8, + 0x51,0x5e,0x60,0x49,0x7d, + 0x92,0x0F,0x40,0x60,0x80,0x14,0x90,0x8C, + 0x60,0x14,0x4B,0x43,0x41, + 0x11,0x00,0xFC,0xFF,0x32,0x00 +}; + +static UCHAR XGI330_YPbPr525iTiming[] = +{ + 0x1B,0x21,0x03,0x09,0x05,0x06,0x0C,0x0C, + 0x94,0x49,0x01,0x0A,0x06,0x0D,0x04,0x0A, + 0x06,0x14,0x0D,0x04,0x0A,0x00,0x85,0x1B, + 0x0C,0x50,0x00,0x97,0x00,0xDA,0x4A,0x17, + 0x7D,0x05,0x4B,0x00,0x00,0xE2,0x00,0x02, + 0x03,0x0A,0x65,0x9D,0x08, + 0x92,0x8F,0x40,0x60,0x80,0x14,0x90,0x8C, + 0x60,0x14,0x4B,0x00,0x40, + 0x44,0x00,0xDB,0x02,0x3B,0x00 + +}; + +static UCHAR XGI330_HiTVGroup3Data[] = +{ + 0x00,0x1A,0x22,0x63,0x62,0x22,0x08,0x5F, + 0x05,0x21,0xB2,0xB2,0x55,0x77,0x2A,0xA6, + 0x25,0x2F,0x47,0xFA,0xC8,0xFF,0x8E,0x20, + 0x8C,0x6E,0x60,0x2E,0x58,0x48,0x72,0x44, + 0x56,0x36,0x4F,0x6E,0x3F,0x80,0x00,0x80, + 0x4F,0x7F,0x03,0xA8,0x7D,0x20,0x1A,0xA9, + 0x14,0x05,0x03,0x7E,0x64,0x31,0x14,0x75, + 0x18,0x05,0x18,0x05,0x4C,0xA8,0x01 +}; + +static UCHAR XGI330_HiTVGroup3Simu[] = +{ + 0x00,0x1A,0x22,0x63,0x62,0x22,0x08,0x95, + 0xDB,0x20,0xB8,0xB8,0x55,0x47,0x2A,0xA6, + 0x25,0x2F,0x47,0xFA,0xC8,0xFF,0x8E,0x20, + 0x8C,0x6E,0x60,0x15,0x26,0xD3,0xE4,0x11, + 0x56,0x36,0x4F,0x6E,0x3F,0x80,0x00,0x80, + 0x67,0x36,0x01,0x47,0x0E,0x10,0xBE,0xB4, + 0x01,0x05,0x03,0x7E,0x65,0x31,0x14,0x75, + 0x18,0x05,0x18,0x05,0x4C,0xA8,0x01 +}; + +static UCHAR XGI330_HiTVGroup3Text[] = +{ + 0x00,0x1A,0x22,0x63,0x62,0x22,0x08,0xA7, + 0xF5,0x20,0xCE,0xCE,0x55,0x47,0x2A,0xA6, + 0x25,0x2F,0x47,0xFA,0xC8,0xFF,0x8E,0x20, + 0x8C,0x6E,0x60,0x18,0x2C,0x0C,0x20,0x22, + 0x56,0x36,0x4F,0x6E,0x3F,0x80,0x00,0x80, + 0x93,0x3C,0x01,0x50,0x2F,0x10,0xF4,0xCA, + 0x01,0x05,0x03,0x7E,0x65,0x31,0x14,0x75, + 0x18,0x05,0x18,0x05,0x4C,0xA8,0x01 +}; + +static UCHAR XGI330_Ren525pGroup3[] = +{ + 0x00,0x14,0x15,0x25,0x55,0x15,0x0b,0x13, + 0xB1,0x41,0x62,0x62,0xFF,0xF4,0x45,0xa6, + 0x25,0x2F,0x67,0xF6,0xbf,0xFF,0x8E,0x20, + 0xAC,0xDA,0x60,0xFe,0x6A,0x9A,0x06,0x10, + 0xd1,0x04,0x18,0x0a,0xFF,0x80,0x00,0x80, + 0x3c,0x77,0x00,0xEF,0xE0,0x10,0xB0,0xE0, + 0x10,0x4F,0x0F,0x0F,0x05,0x0F,0x08,0x6E, + 0x1a,0x1F,0x25,0x2a,0x4C,0xAA,0x01 +}; + +static UCHAR XGI330_Ren750pGroup3[] = +{ + 0x00,0x14,0x15,0x25,0x55,0x15,0x0b,0x7a, + 0x54,0x41,0xE7,0xE7,0xFF,0xF4,0x45,0xa6, + 0x25,0x2F,0x67,0xF6,0xbf,0xFF,0x8E,0x20, + 0xAC,0x6A,0x60,0x2b,0x52,0xCD,0x61,0x10, + 0x51,0x04,0x18,0x0a,0x1F,0x80,0x00,0x80, + 0xFF,0xA4,0x04,0x2B,0x94,0x21,0x72,0x94, + 0x26,0x05,0x01,0x0F,0xed,0x0F,0x0A,0x64, + 0x18,0x1D,0x23,0x28,0x4C,0xAA,0x01 +}; + +#if 0 +static XGI_PanelDelayTblStruct XGI330_PanelDelayTbl[]= +{ +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}}, +{{0x00,0x00}} +}; + +static XGI330_LVDSDataStruct XGI330_LVDS320x480Data_1[]= +{ + {848, 433,400,525}, + {848, 389,400,525}, + {848, 433,400,525}, + {848, 389,400,525}, + {848, 518,400, 525}, + {1056, 628,400,525}, + {400, 525,400,525}, + {800, 449,1000, 644}, + {800, 525,1000, 635} +}; + +static XGI330_LVDSDataStruct XGI330_LVDS800x600Data_1[]= +{ + {848, 433,1060, 629}, + {848, 389,1060, 629}, + {848, 433,1060, 629}, + {848, 389,1060, 629}, + {848, 518,1060, 629}, + {1056, 628,1056, 628}, + {1056, 628,1056, 628}, + {800, 449,1000, 644}, + {800, 525,1000, 635} +}; + +static XGI330_LVDSDataStruct XGI330_LVDS800x600Data_2[]= +{ + {1056, 628,1056, 628}, + {1056, 628,1056, 628}, + {1056, 628,1056, 628}, + {1056, 628,1056, 628}, + {1056, 628,1056, 628}, + {1056, 628,1056, 628}, + {1056, 628,1056, 628}, + {800, 449,1000, 644}, + {800, 525,1000, 635} +}; +#endif + +static XGI330_LVDSDataStruct XGI_LVDS1024x768Data_1[]= +{ + { 960 , 438 , 1344 , 806 } , /* 00 (320x200,320x400,640x200,640x400) */ + { 960 , 388 , 1344 , 806 } , /* 01 (320x350,640x350) */ + { 1040, 438 , 1344 , 806 } , /* 02 (360x400,720x400) */ + { 1040, 388 , 1344 , 806 } , /* 03 (720x350) */ + { 960 , 518 , 1344 , 806 } , /* 04 (320x240,640x480) */ + {1120 , 638 , 1344 , 806 } , /* 05 (400x300,800x600) */ + {1344 , 806 , 1344 , 806 } /* 06 (512x384,1024x768) */ +}; + + +static XGI330_LVDSDataStruct XGI_LVDS1024x768Data_2[]= +{ + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {800, 449,1280, 801}, + {800, 525,1280, 813} +}; + +static XGI330_LVDSDataStruct XGI_LVDS1280x1024Data_1[]= +{ + {1048, 442,1688, 1066}, + {1048, 392,1688, 1066}, + {1048, 442,1688, 1066}, + {1048, 392,1688, 1066}, + {1048, 522,1688, 1066}, + {1208, 642,1688, 1066}, + {1432, 810,1688, 1066}, + {1688, 1066,1688, 1066} +}; + +static XGI330_LVDSDataStruct XGI_LVDS1280x1024Data_2[]= +{ + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {800, 449,1280, 801}, + {800, 525,1280, 813} +}; +/* +static XGI330_LVDSDataStruct XGI_LVDS1280x768Data_1[]= +{ + {768,438,1408,806}, + {768,388,1408,806}, + {768,438,1408,806}, + {768,388,1408,806}, + {768,518,1408,806}, + {928,638,1408,806}, + {1408,806,1408,806}, + {1408,806,1408,806}, + {1408,806,1408,806} +}; + +static XGI330_LVDSDataStruct XGI_LVDS1280x768Data_2[]= +{ + {1408, 806,1408, 806}, + {1408, 806,1408, 806}, + {1408, 806,1408, 806}, + {1408, 806,1408, 806}, + {1408, 806,1408, 806}, + {1408, 806,1408, 806}, + {1408, 806,1408, 806}, + {1408, 806,1408, 806}, + {1408, 806,1408, 806} +}; + +static XGI330_LVDSDataStruct XGI_LVDS1280x768NData_1[]= +{ + {704, 438,1344, 806}, + {704, 388,1344, 806}, + {704, 438,1344, 806}, + {704, 388,1344, 806}, + {704, 518,1344, 806}, + {864, 638,1344, 806}, + {1088, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806} +}; + +static XGI330_LVDSDataStruct XGI_LVDS1280x768NData_2[]= +{ + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806}, + {1344, 806,1344, 806} +}; + +static XGI330_LVDSDataStruct XGI_LVDS1280x768SData_1[]= +{ + {1048,438,1688,806}, + {1048,388,1688,806}, + {1148,438,1688,806}, + {1148,388,1688,806}, + {1048,518,1688,806}, + {1208,638,1688,806}, + {1432,806,1688,806}, + {1688,806,1688,806}, + {1688,806,1688,806} +}; + +static XGI330_LVDSDataStruct XGI_LVDS1280x768SData_2[]= +{ + {1688,806,1688,806}, + {1688,806,1688,806}, + {1688,806,1688,806}, + {1688,806,1688,806}, + {1688,806,1688,806}, + {1688,806,1688,806}, + {1688,806,1688,806}, + {1688,806,1688,806}, + {1688,806,1688,806} +}; +*/ +static XGI330_LVDSDataStruct XGI_LVDS1400x1050Data_1[]= +{ + {928,416,1688,1066}, + {928,366,1688,1066}, + {928,416,1688,1066}, + {928,366,1688,1066}, + {928,496,1688,1066}, + {1088,616,1688,1066}, + {1312,784,1688,1066}, + {1568,1040,1688,1066}, + {1688,1066,1688,1066} +}; + +static XGI330_LVDSDataStruct XGI_LVDS1400x1050Data_2[]= +{ + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066}, + {1688,1066,1688,1066} +}; + +static XGI330_LVDSDataStruct XGI_LVDS1600x1200Data_1[]= +{ /* ;;[ycchen] 12/05/02 LCDHTxLCDVT=2048x1320 */ + { 1088,520,2048,1320 },/* 00 (320x200,320x400,640x200,640x400) */ + { 1088,470,2048,1320 },/* 01 (320x350,640x350) */ + { 1088,520,2048,1320 },/* 02 (360x400,720x400) */ + { 1088,470,2048,1320 },/* 03 (720x350) */ + { 1088,600,2048,1320 },/* 04 (320x240,640x480) */ + { 1248,720,2048,1320 },/* 05 (400x300,800x600) */ + { 1472,888,2048,1320 },/* 06 (512x384,1024x768) */ + { 1728,1144,2048,1320 },/* 07 (640x512,1280x1024) */ + { 1848,1170,2048,1320 },/* 08 (1400x1050) */ + { 2048,1320,2048,1320 } /* 09 (1600x1200) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDSNoScalingData[]= +{ + { 800,449,800,449 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 800,449,800,449 }, /* 01 (320x350,640x350) */ + { 800,449,800,449 }, /* 02 (360x400,720x400) */ + { 800,449,800,449 }, /* 03 (720x350) */ + { 800,525,800,525 }, /* 04 (640x480x60Hz) */ + { 1056,628,1056,628 }, /* 05 (800x600x60Hz) */ + { 1344,806,1344,806 }, /* 06 (1024x768x60Hz) */ + { 1688,1066,1688,1066 }, /* 07 (1280x1024x60Hz) */ + { 1688,1066,1688,1066 }, /* 08 (1400x1050x60Hz) ;;[ycchen] 12/19/02 */ + { 2160,1250,2160,1250 }, /* 09 (1600x1200x60Hz) */ + { 1688,806,1688,806 } /* 0A (1280x768x60Hz) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1024x768Data_1x75[]= +{ + {960,438,1312,800 }, /* 00 (320x200,320x400,640x200,640x400) */ + {960,388,1312,800 }, /* 01 (320x350,640x350) */ + {1040,438,1312,800 }, /* 02 (360x400,720x400) */ + {1040,388,1312,800 }, /* 03 (720x350) */ + {928,512,1312,800 }, /* 04 (320x240,640x480) */ + {1088,632,1312,800 }, /* 05 (400x300,800x600) */ + {1312,800,1312,800 }, /* 06 (512x384,1024x768) */ +}; + + +static XGI330_LVDSDataStruct XGI_LVDS1024x768Data_2x75[]= +{ + {1312,800,1312,800}, /* ; 00 (320x200,320x400,640x200,640x400) */ + {1312,800,1312,800}, /* ; 01 (320x350,640x350) */ + {1312,800,1312,800}, /* ; 02 (360x400,720x400) */ + {1312,800,1312,800}, /* ; 03 (720x350) */ + {1312,800,1312,800}, /* ; 04 (320x240,640x480) */ + {1312,800,1312,800}, /* ; 05 (400x300,800x600) */ + {1312,800,1312,800}, /* ; 06 (512x384,1024x768) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1280x1024Data_1x75[]= +{ + {1048,442,1688,1066 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + {1048,392,1688,1066 }, /* ; 01 (320x350,640x350) */ + {1128,442,1688,1066 }, /* ; 02 (360x400,720x400) */ + {1128,392,1688,1066 }, /* ; 03 (720x350) */ + {1048,522,1688,1066 }, /* ; 04 (320x240,640x480) */ + {1208,642,1688,1066 }, /* ; 05 (400x300,800x600) */ + {1432,810,1688,1066 }, /* ; 06 (512x384,1024x768) */ + {1688,1066,1688,1066 }, /* ; 06; 07 (640x512,1280x1024) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1280x1024Data_2x75[]= +{ + {1688,1066,1688,1066 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + {1688,1066,1688,1066 }, /* ; 01 (320x350,640x350) */ + {1688,1066,1688,1066 }, /* ; 02 (360x400,720x400) */ + {1688,1066,1688,1066 }, /* ; 03 (720x350) */ + {1688,1066,1688,1066 }, /* ; 04 (320x240,640x480) */ + {1688,1066,1688,1066 }, /* ; 05 (400x300,800x600) */ + {1688,1066,1688,1066 }, /* ; 06 (512x384,1024x768) */ + {1688,1066,1688,1066 }, /* ; 06; 07 (640x512,1280x1024) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDSNoScalingDatax75[]= +{ + {800,449,800,449 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + {800,449,800,449 }, /* ; 01 (320x350,640x350) */ + {900,449,900,449 }, /* ; 02 (360x400,720x400) */ + {900,449,900,449 }, /* ; 03 (720x350) */ + {800,500,800,500 }, /* ; 04 (640x480x75Hz) */ + {1056,625,1056,625 }, /* ; 05 (800x600x75Hz) */ + {1312,800,1312,800 }, /* ; 06 (1024x768x75Hz) */ + {1688,1066,1688,1066 }, /* ; 07 (1280x1024x75Hz) */ + {1688,1066,1688,1066 }, /* ; 08 (1400x1050x75Hz) ;;[ycchen] 12/19/02 */ + {2160,1250,2160,1250 }, /* ; 09 (1600x1200x75Hz) */ + {1688,806,1688,806 }, /* ; 0A (1280x768x75Hz) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1024x768Des_1[]= +{ + { 0,1048, 0, 771 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 0,1048, 0, 771 }, /* 01 (320x350,640x350) */ + { 0,1048, 0, 771 }, /* 02 (360x400,720x400) */ + { 0,1048, 0, 771 }, /* 03 (720x350) */ + { 0,1048, 0, 771 }, /* 04 (640x480x60Hz) */ + { 0,1048, 0, 771 }, /* 05 (800x600x60Hz) */ + { 0,1048, 805, 770 } /* 06 (1024x768x60Hz) */ +} ; + +static XGI330_LVDSDataStruct XGI_LVDS1024x768Des_2[]= +{ + { 1142, 856, 622, 587 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 1142, 856, 597, 562 }, /* 01 (320x350,640x350) */ + { 1142, 856, 622, 587 }, /* 02 (360x400,720x400) */ + { 1142, 856, 597, 562 }, /* 03 (720x350) */ + { 1142,1048, 722, 687 }, /* 04 (640x480x60Hz) */ + { 1232, 936, 722, 687 }, /* 05 (800x600x60Hz) */ + { 0,1048, 805, 771 } /* 06 (1024x768x60Hz) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1024x768Des_3[]= +{ + { 320, 24, 622, 587 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 320, 24, 597, 562 }, /* 01 (320x350,640x350) */ + { 320, 24, 622, 587 }, /* 02 (360x400,720x400) */ + { 320, 24, 597, 562 }, /* 03 (720x350) */ + { 320, 24, 722, 687 } /* 04 (640x480x60Hz) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1280x1024Des_1[]= +{ + { 0,1328, 0, 1025 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 0,1328, 0, 1025 }, /* 01 (320x350,640x350) */ + { 0,1328, 0, 1025 }, /* 02 (360x400,720x400) */ + { 0,1328, 0, 1025 }, /* 03 (720x350) */ + { 0,1328, 0, 1025 }, /* 04 (640x480x60Hz) */ + { 0,1328, 0, 1025 }, /* 05 (800x600x60Hz) */ + { 0,1328, 0, 1025 }, /* 06 (1024x768x60Hz) */ + { 0,1328, 1065, 1024 } /* 07 (1280x1024x60Hz) */ +}; + + /* The Display setting for DE Mode Panel */ +static XGI330_LVDSDataStruct XGI_LVDS1280x1024Des_2[]= +{ + { 1368,1008,752,711 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 1368,1008,729,688 }, /* 01 (320x350,640x350) */ + { 1408,1048,752,711 }, /* 02 (360x400,720x400) */ + { 1408,1048,729,688 }, /* 03 (720x350) */ + { 1368,1008,794,753 }, /* 04 (640x480x60Hz) */ + { 1448,1068,854,813 }, /* 05 (800x600x60Hz) */ + { 1560,1200,938,897 }, /* 06 (1024x768x60Hz) */ + { 0000,1328,0,1025 } /* 07 (1280x1024x60Hz) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1400x1050Des_1[]= +{ + { 0,1448,0,1051 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 0,1448,0,1051 }, /* 01 (320x350,640x350) */ + { 0,1448,0,1051 }, /* 02 (360x400,720x400) */ + { 0,1448,0,1051 }, /* 03 (720x350) */ + { 0,1448,0,1051 }, /* 04 (640x480x60Hz) */ + { 0,1448,0,1051 }, /* 05 (800x600x60Hz) */ + { 0,1448,0,1051 }, /* 06 (1024x768x60Hz) */ + { 0,1448,0,1051 }, /* 07 (1280x1024x60Hz) */ + { 0,1448,0,1051 } /* 08 (1400x1050x60Hz) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1400x1050Des_2[]= +{ + { 1308,1068, 781, 766 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 1308,1068, 781, 766 }, /* 01 (320x350,640x350) */ + { 1308,1068, 781, 766 }, /* 02 (360x400,720x400) */ + { 1308,1068, 781, 766 }, /* 03 (720x350) */ + { 1308,1068, 781, 766 }, /* 04 (640x480x60Hz) */ + { 1388,1148, 841, 826 }, /* 05 (800x600x60Hz) */ + { 1490,1250, 925, 910 }, /* 06 (1024x768x60Hz) */ + { 1608,1368,1053,1038 }, /* 07 (1280x1024x60Hz) */ + { 0,1448,0,1051 } /* 08 (1400x1050x60Hz) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1600x1200Des_1[]= +{ + { 0,1664,0,1201 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 0,1664,0,1201 }, /* 01 (320x350,640x350) */ + { 0,1664,0,1201 }, /* 02 (360x400,720x400) */ + { 0,1664,0,1201 }, /* 03 (720x350) */ + { 0,1664,0,1201 }, /* 04 (640x480x60Hz) */ + { 0,1664,0,1201 }, /* 05 (800x600x60Hz) */ + { 0,1664,0,1201 }, /* 06 (1024x768x60Hz) */ + { 0,1664,0,1201 }, /* 07 (1280x1024x60Hz) */ + { 0,1664,0,1201 }, /* 08 (1400x1050x60Hz) */ + { 0,1664,0,1201 } /* 09 (1600x1200x60Hz) */ +}; + + + +static XGI330_LCDDataDesStruct2 XGI_LVDSNoScalingDesData[]= +{ + { 0, 648, 448, 405, 96, 2 }, /* 00 (320x200,320x400,640x200,640x400) */ + { 0, 648, 448, 355, 96, 2 }, /* 01 (320x350,640x350) */ + { 0, 648, 448, 405, 96, 2 }, /* 02 (360x400,720x400) */ + { 0, 648, 448, 355, 96, 2 }, /* 03 (720x350) */ + { 0, 648, 1, 483, 96, 2 }, /* 04 (640x480x60Hz) */ + { 0, 840, 627, 600, 128, 4 }, /* 05 (800x600x60Hz) */ + { 0,1048, 805, 770, 136, 6 }, /* 06 (1024x768x60Hz) */ + { 0,1328,0,1025, 112, 3 }, /* 07 (1280x1024x60Hz) */ + { 0,1438,0,1051, 112, 3 }, /* 08 (1400x1050x60Hz) ;;[ycchen] 12/19/02 */ + { 0,1664,0,1201, 192, 3 }, /* 09 (1600x1200x60Hz) */ + { 0,1328,0,0771, 112, 6 } /* 0A (1280x768x60Hz) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1024x768Des_1x75[]= /* ; 1024x768 Full-screen */ +{ + {0,1040,0,769}, /* ; 00 (320x200,320x400,640x200,640x400) */ + {0,1040,0,769}, /* ; 01 (320x350,640x350) */ + {0,1040,0,769}, /* ; 02 (360x400,720x400) */ + {0,1040,0,769}, /* ; 03 (720x350) */ + {0,1040,0,769}, /* ; 04 (640x480x75Hz) */ + {0,1040,0,769}, /* ; 05 (800x600x75Hz) */ + {0,1040,0,769} /* ; 06 (1024x768x75Hz) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1024x768Des_2x75[]= /* ; 1024x768 center-screen (Enh. Mode) */ +{ + {1142, 856,622,587 }, /* 00 (320x200,320x400,640x200,640x400) */ + {1142, 856,597,562 }, /* 01 (320x350,640x350) */ + {1142, 856,622,587 }, /* 02 (360x400,720x400) */ + {1142, 856,597,562 }, /* 03 (720x350) */ + {1142,1048,722,687 }, /* 04 (640x480x60Hz) */ + {1232, 936,722,687 }, /* 05 (800x600x60Hz) */ + { 0,1048,805,771 } /* 06 (1024x768x60Hz) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1024x768Des_3x75[]= /* ; 1024x768 center-screen (St.Mode) */ +{ + {320,24,622,587 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + {320,24,597,562 }, /* ; 01 (320x350,640x350) */ + {320,24,622,587 }, /* ; 02 (360x400,720x400) */ + {320,24,597,562 }, /* ; 03 (720x350) */ + {320,24,722,687 } /* ; 04 (640x480x60Hz) */ +}; + +static XGI330_LVDSDataStruct XGI_LVDS1280x1024Des_1x75[]= +{ + {0,1296,0,1025}, /* ; 00 (320x200,320x400,640x200,640x400) */ + {0,1296,0,1025}, /* ; 01 (320x350,640x350) */ + {0,1296,0,1025}, /* ; 02 (360x400,720x400) */ + {0,1296,0,1025}, /* ; 03 (720x350) */ + {0,1296,0,1025}, /* ; 04 (640x480x75Hz) */ + {0,1296,0,1025}, /* ; 05 (800x600x75Hz) */ + {0,1296,0,1025}, /* ; 06 (1024x768x75Hz) */ + {0,1296,0,1025} /* ; 07 (1280x1024x75Hz) */ +}; + +/* The Display setting for DE Mode Panel */ +static XGI330_LVDSDataStruct XGI_LVDS1280x1024Des_2x75[]= /* [ycchen] 02/18/03 Set DE as default */ +{ + {1368,976,752,711 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + {1368,976,729,688 }, /* ; 01 (320x350,640x350) */ + {1408,976,752,711 }, /* ; 02 (360x400,720x400) */ + {1408,976,729,688 }, /* ; 03 (720x350) */ + {1368,976,794,753 }, /* ; 04 (640x480x75Hz) */ + {1448,1036,854,813}, /* ; 05 (800x600x75Hz) */ + {1560,1168,938,897}, /* ; 06 (1024x768x75Hz) */ + {0,1296,0,1025 } /* ; 07 (1280x1024x75Hz) */ +}; + +static XGI330_LCDDataDesStruct2 XGI_LVDSNoScalingDesDatax75[]= /* Scaling LCD 75Hz */ +{ + { 0,648,448,405,96,2 }, /* ; 00 (320x200,320x400,640x200,640x400) */ + { 0,648,448,355,96,2 }, /* ; 01 (320x350,640x350) */ + { 0,729,448,405,108,2 }, /* ; 02 (360x400,720x400) */ + { 0,729,448,355,108,2 }, /* ; 03 (720x350) */ + { 0,656,0,481,64,3 }, /* ; 04 (640x480x75Hz) */ + { 0,816,0,601,80,3 }, /* ; 05 (800x600x75Hz) */ + { 0,1040,0,769,96,3 }, /* ; 06 (1024x768x75Hz) */ + { 0,1296,0,1025,144,3 }, /* ; 07 (1280x1024x75Hz) */ + { 0,1448,0,1051,112,3 }, /* ; 08 (1400x1050x75Hz) ;;[ycchen] 12/19/02 */ + { 0,1664,0,1201,192,3 }, /* ; 09 (1600x1200x75Hz) */ + { 0,1328,0,771,112,6 } /* ; 0A (1280x768x75Hz) */ +}; + +#if 0 +static XGI330_LVDSDataStruct XGI330_LVDS640x480Data_1[]= +{ + {800, 449, 800, 449}, + {800, 449, 800, 449}, + {800, 449, 800, 449}, + {800, 449, 800, 449}, + {800, 525, 800, 525}, + {1056, 628,1056, 628}, + {1056, 628,1056, 628}, + {1056, 628,1056, 628}, + {1056, 628,1056, 628} +}; +#endif + +static XGI330_CHTVDataStruct XGI_CHTVUNTSCData[]= +{ + {840, 600, 840, 600}, + {840, 600, 840, 600}, + {840, 600, 840, 600}, + {840, 600, 840, 600}, + {784, 600, 784, 600}, + {1064, 750,1064, 750} +}; + +static XGI330_CHTVDataStruct XGI_CHTVONTSCData[]= +{ + {840, 525, 840, 525}, + {840, 525, 840, 525}, + {840, 525, 840, 525}, + {840, 525, 840, 525}, + {784, 525, 784, 525}, + {1040, 700,1040, 700} +}; + +static XGI330_CHTVDataStruct XGI_CHTVUPALData[]= +{ + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {840, 750, 840, 750}, + {936, 836, 936, 836} +}; + +static XGI330_CHTVDataStruct XGI_CHTVOPALData[]= +{ + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {1008, 625,1008, 625}, + {840, 625, 840, 625}, + {960, 750, 960, 750} +}; + +static XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_1_H[]= +{ + /* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ + {{ 0x4B,0x27,0x8F,0x32,0x1B,0x00,0x45,0x00 }}, /* 00 (320x) */ + {{ 0x4B,0x27,0x8F,0x2B,0x03,0x00,0x44,0x00 }}, /* 01 (360x) */ + {{ 0x55,0x31,0x99,0x46,0x1D,0x00,0x55,0x00 }}, /* 02 (400x) */ + {{ 0x63,0x3F,0x87,0x4A,0x93,0x00,0x01,0x00 }}, /* 03 (512x) */ + {{ 0x73,0x4F,0x97,0x55,0x86,0x00,0x05,0x00 }}, /* 04 (640x) */ + {{ 0x73,0x4F,0x97,0x55,0x86,0x00,0x05,0x00 }}, /* 05 (720x) */ + {{ 0x87,0x63,0x8B,0x69,0x1A,0x00,0x26,0x00 }}, /* 06 (800x) */ + {{ 0xA3,0x7F,0x87,0x86,0x97,0x00,0x02,0x00 }} /* 07 (1024x) */ +}; + +static XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_1_H[]= +{ + /* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ + {{ 0x56,0x27,0x9A,0x30,0x1E,0x00,0x05,0x00 }}, /* 00 (320x) */ + {{ 0x56,0x27,0x9A,0x30,0x1E,0x00,0x05,0x00 }}, /* 01 (360x) */ + {{ 0x60,0x31,0x84,0x3A,0x88,0x00,0x01,0x00 }}, /* 02 (400x) */ + {{ 0x6E,0x3F,0x92,0x48,0x96,0x00,0x01,0x00 }}, /* 03 (512x) */ + {{ 0x7E,0x4F,0x82,0x58,0x06,0x00,0x06,0x00 }}, /* 04 (640x) */ + {{ 0x7E,0x4F,0x82,0x58,0x06,0x00,0x06,0x00 }}, /* 05 (720x) */ + {{ 0x92,0x63,0x96,0x6C,0x1A,0x00,0x06,0x00 }}, /* 06 (800x) */ + {{ 0xAE,0x7F,0x92,0x88,0x96,0x00,0x02,0x00 }}, /* 07 (1024x) */ + {{ 0xCE,0x9F,0x92,0xA8,0x16,0x00,0x07,0x00 }} /* 08 (1280x) */ +}; + +static XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_2_H[]= +{ + /* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ + {{ 0x63,0x27,0x87,0x3B,0x8C,0x00,0x01,0x00 }}, /* 00 (320x) */ + {{ 0x63,0x27,0x87,0x3B,0x8C,0x00,0x01,0x00 }}, /* 01 (360x) */ + {{ 0x63,0x31,0x87,0x3D,0x8E,0x00,0x01,0x00 }}, /* 02 (400x) */ + {{ 0x63,0x3F,0x87,0x45,0x96,0x00,0x01,0x00 }}, /* 03 (512x) */ + {{ 0xA3,0x4F,0x87,0x6E,0x9F,0x00,0x06,0x00 }}, /* 04 (640x) */ + {{ 0xA3,0x4F,0x87,0x6E,0x9F,0x00,0x06,0x00 }}, /* 05 (720x) */ + {{ 0xA3,0x63,0x87,0x78,0x89,0x00,0x02,0x00 }}, /* 06 (800x) */ + {{ 0xA3,0x7F,0x87,0x86,0x97,0x00,0x02,0x00 }} /* 07 (1024x) */ +}; + +static XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_2_H[]= +{ + /* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ + {{ 0x7E,0x3B,0x9A,0x44,0x12,0x00,0x01,0x00 }}, /* 00 (320x) */ + {{ 0x7E,0x3B,0x9A,0x44,0x12,0x00,0x01,0x00 }}, /* 01 (360x) */ + {{ 0x7E,0x40,0x84,0x49,0x91,0x00,0x01,0x00 }}, /* 02 (400x) */ + {{ 0x7E,0x47,0x93,0x50,0x9E,0x00,0x01,0x00 }}, /* 03 (512x) */ + {{ 0xCE,0x77,0x8A,0x80,0x8E,0x00,0x02,0x00 }}, /* 04 (640x) */ + {{ 0xCE,0x77,0x8A,0x80,0x8E,0x00,0x02,0x00 }}, /* 05 (720x) */ + {{ 0xCE,0x81,0x94,0x8A,0x98,0x00,0x02,0x00 }}, /* 06 (800x) */ + {{ 0xCE,0x8F,0x82,0x98,0x06,0x00,0x07,0x00 }}, /* 07 (1024x) */ + {{ 0xCE,0x9F,0x92,0xA8,0x16,0x00,0x07,0x00 }} /* 08 (1280x) */ +}; + +static XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11400x1050_1_H[]= +{ /* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ + {{ 0x47,0x27,0x8B,0x2C,0x1A,0x00,0x05,0x00 }}, /* 00 (320x) */ + {{ 0x47,0x27,0x8B,0x30,0x1E,0x00,0x05,0x00 }}, /* 01 (360x) */ + {{ 0x51,0x31,0x95,0x36,0x04,0x00,0x01,0x00 }}, /* 02 (400x) */ + {{ 0x5F,0x3F,0x83,0x44,0x92,0x00,0x01,0x00 }}, /* 03 (512x) */ + {{ 0x6F,0x4F,0x93,0x54,0x82,0x00,0x05,0x00 }}, /* 04 (640x) */ + {{ 0x6F,0x4F,0x93,0x54,0x82,0x00,0x05,0x00 }}, /* 05 (720x) */ + {{ 0x83,0x63,0x87,0x68,0x16,0x00,0x06,0x00 }}, /* 06 (800x) */ + {{ 0x9F,0x7F,0x83,0x84,0x92,0x00,0x02,0x00 }}, /* 07 (1024x) */ + {{ 0xBF,0x9F,0x83,0xA4,0x12,0x00,0x07,0x00 }}, /* 08 (1280x) */ + {{ 0xCE,0xAE,0x92,0xB3,0x01,0x00,0x03,0x00 }} /* 09 (1400x) */ +}; + +static XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11400x1050_2_H[]= +{ /* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ + {{ 0x76,0x3F,0x83,0x45,0x8C,0x00,0x41,0x00 }}, /* 00 (320x) */ + {{ 0x76,0x3F,0x83,0x45,0x8C,0x00,0x41,0x00 }}, /* 01 (360x) */ + {{ 0x76,0x31,0x9A,0x48,0x9F,0x00,0x41,0x00 }}, /* 02 (400x) */ + {{ 0x76,0x3F,0x9A,0x4F,0x96,0x00,0x41,0x00 }}, /* 03 (512x) */ + {{ 0xCE,0x7E,0x82,0x87,0x9E,0x00,0x02,0x00 }}, /* 04 (640x) */ + {{ 0xCE,0x7E,0x82,0x87,0x9E,0x00,0x02,0x00 }}, /* 05 (720x) */ + {{ 0xCE,0x63,0x92,0x96,0x04,0x00,0x07,0x00 }}, /* 06 (800x) */ + {{ 0xCE,0x7F,0x92,0xA4,0x12,0x00,0x07,0x00 }}, /* 07 (1024x) */ + {{ 0xCE,0x9F,0x92,0xB4,0x02,0x00,0x03,0x00 }}, /* 08 (1280x) */ + {{ 0xCE,0xAE,0x92,0xBC,0x0A,0x00,0x03,0x00 }} /* 09 (1400x) */ +}; + +static XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11600x1200_1_H[]= +/* ;302lv channelA [ycchen] 12/05/02 LCDHT=2048 */ +{ /* ; CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ + {{ 0x5B,0x27,0x9F,0x32,0x0A,0x00,0x01,0x00 }},/* 00 (320x) */ + {{ 0x5B,0x27,0x9F,0x32,0x0A,0x00,0x01,0x00 }},/* 01 (360x) */ + {{ 0x65,0x31,0x89,0x3C,0x94,0x00,0x01,0x00 }},/* 02 (400x) */ + {{ 0x73,0x3F,0x97,0x4A,0x82,0x00,0x05,0x00 }},/* 03 (512x) */ + {{ 0x83,0x4F,0x87,0x51,0x09,0x00,0x06,0x00 }},/* 04 (640x) */ + {{ 0x83,0x4F,0x87,0x51,0x09,0x00,0x06,0x00 }},/* 05 (720x) */ + {{ 0x97,0x63,0x9B,0x65,0x1D,0x00,0x06,0xF0 }},/* 06 (800x) */ + {{ 0xB3,0x7F,0x97,0x81,0x99,0x00,0x02,0x00 }},/* 07 (1024x) */ + {{ 0xD3,0x9F,0x97,0xA1,0x19,0x00,0x07,0x00 }},/* 08 (1280x) */ + {{ 0xE2,0xAE,0x86,0xB9,0x91,0x00,0x03,0x00 }},/* 09 (1400x) */ + {{ 0xFB,0xC7,0x9F,0xC9,0x81,0x00,0x07,0x00 }} /* 0A (1600x) */ +}; + +static XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_1_V[]= +{ /* CR06,CR07,CR10,CR11,CR15,CR16,SR0A+CR09(5->7) */ + {{ 0x97,0x1F,0x60,0x87,0x5D,0x83,0x10 }}, /* 00 (x350) */ + {{ 0xB4,0x1F,0x92,0x89,0x8F,0xB5,0x30 }}, /* 01 (x400) */ + {{ 0x04,0x3E,0xE2,0x89,0xDF,0x05,0x00 }}, /* 02 (x480) */ + {{ 0x7C,0xF0,0x5A,0x8F,0x57,0x7D,0xA0 }}, /* 03 (x600) */ + {{ 0x24,0xF5,0x02,0x88,0xFF,0x25,0x90 }} /* 04 (x768) */ +}; + +static XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_2_V[]= +{ /* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ + {{ 0x24,0xBB,0x31,0x87,0x5D,0x25,0x30 }}, /* 00 (x350) */ + {{ 0x24,0xBB,0x4A,0x80,0x8F,0x25,0x30 }}, /* 01 (x400) */ + {{ 0x24,0xBB,0x72,0x88,0xDF,0x25,0x30 }}, /* 02 (x480) */ + {{ 0x24,0xF1,0xAE,0x84,0x57,0x25,0xB0 }}, /* 03 (x600) */ + {{ 0x24,0xF5,0x02,0x88,0xFF,0x25,0x90 }} /* 04 (x768) */ +}; + +static XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_1_V[]= +{ /* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ + {{ 0x86,0x1F,0x5E,0x82,0x5D,0x87,0x00 }}, /* 00 (x350) */ + {{ 0xB8,0x1F,0x90,0x84,0x8F,0xB9,0x30 }}, /* 01 (x400) */ + {{ 0x08,0x3E,0xE0,0x84,0xDF,0x09,0x00 }}, /* 02 (x480) */ + {{ 0x80,0xF0,0x58,0x8C,0x57,0x81,0xA0 }}, /* 03 (x600) */ + {{ 0x28,0xF5,0x00,0x84,0xFF,0x29,0x90 }}, /* 04 (x768) */ + {{ 0x28,0x5A,0x13,0x87,0xFF,0x29,0xA9 }} /* 05 (x1024) */ +}; + +static XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_2_V[]= +{ /* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ + {{ 0x28,0xD2,0xAF,0x83,0xAE,0xD8,0xA1 }}, /* 00 (x350) */ + {{ 0x28,0xD2,0xC8,0x8C,0xC7,0xF2,0x81 }}, /* 01 (x400) */ + {{ 0x28,0xD2,0xF0,0x84,0xEF,0x1A,0xB1 }}, /* 02 (x480) */ + {{ 0x28,0xDE,0x2C,0x8F,0x2B,0x56,0x91 }}, /* 03 (x600) */ + {{ 0x28,0xDE,0x80,0x83,0x7F,0xAA,0x91 }}, /* 04 (x768) */ + {{ 0x28,0x5A,0x13,0x87,0xFF,0x29,0xA9 }} /* 05 (x1024) */ +}; + +static XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11400x1050_1_V[]= +{ /* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ + {{ 0x6C,0x1F,0x60,0x84,0x5D,0x6D,0x10 }}, /* 00 (x350) */ + {{ 0x9E,0x1F,0x93,0x86,0x8F,0x9F,0x30 }}, /* 01 (x400) */ + {{ 0xEE,0x1F,0xE2,0x86,0xDF,0xEF,0x10 }}, /* 02 (x480) */ + {{ 0x66,0xF0,0x5A,0x8e,0x57,0x67,0xA0 }}, /* 03 (x600) */ + {{ 0x0E,0xF5,0x02,0x86,0xFF,0x0F,0x90 }}, /* 04 (x768) */ + {{ 0x0E,0x5A,0x02,0x86,0xFF,0x0F,0x89 }}, /* 05 (x1024) */ + {{ 0x28,0x10,0x1A,0x80,0x19,0x29,0x0F }} /* 06 (x1050) */ +}; + +static XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11400x1050_2_V[]= +{ /* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ + {{ 0x28,0x92,0xB6,0x83,0xB5,0xCF,0x81 }}, /* 00 (x350) */ + {{ 0x28,0x92,0xD5,0x82,0xD4,0xEE,0x81 }}, /* 01 (x400) */ + {{ 0x28,0x92,0xFD,0x8A,0xFC,0x16,0xB1 }}, /* 02 (x480) */ + {{ 0x28,0xD4,0x39,0x86,0x57,0x29,0x81 }}, /* 03 (x600) */ + {{ 0x28,0xD4,0x8D,0x9A,0xFF,0x29,0xA1 }}, /* 04 (x768) */ + {{ 0x28,0x5A,0x0D,0x9A,0xFF,0x29,0xA9 }}, /* 05 (x1024) */ + {{ 0x28,0x10,0x1A,0x87,0x19,0x29,0x8F }} /* 06 (x1050) */ +}; + +static XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11600x1200_1_V[]= +{ + /* CR06,CR07,CR10,CR11,CR15,CR16,SR0A+CR09(5->7) */ + {{ 0xd4,0x1F,0x81,0x84,0x5D,0xd5,0x10 }}, /* 00 (x350) */ + {{ 0x06,0x3e,0xb3,0x86,0x8F,0x07,0x20 }}, /* 01 (x400) */ + {{ 0x56,0xba,0x03,0x86,0xDF,0x57,0x00 }}, /* 02 (x480) */ + {{ 0xce,0xF0,0x7b,0x8e,0x57,0xcf,0xa0 }}, /* 03 (x600) */ + {{ 0x76,0xF5,0x23,0x86,0xFF,0x77,0x90 }}, /* 04 (x768) */ + {{ 0x76,0x5A,0x23,0x86,0xFF,0x77,0x89 }}, /* 05 (x1024) */ + {{ 0x90,0x10,0x1A,0x8E,0x19,0x91,0x2F }}, /* 06 (x1050) */ + {{ 0x26,0x11,0xd3,0x86,0xaF,0x27,0x3f }} /* 07 (x1200) */ +}; + +static XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_1_Hx75[]= +{ /* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ + {{ 0x4B,0x27,0x8F,0x32,0x1B,0x00,0x45,0x00 }},/* ; 00 (320x) */ + {{ 0x4B,0x27,0x8F,0x2B,0x03,0x00,0x44,0x00 }},/* ; 01 (360x) */ + {{ 0x55,0x31,0x99,0x46,0x1D,0x00,0x55,0x00 }},/* ; 02 (400x) */ + {{ 0x63,0x3F,0x87,0x4A,0x93,0x00,0x01,0x00 }},/* ; 03 (512x) */ + {{ 0x6F,0x4F,0x93,0x54,0x80,0x00,0x05,0x00 }},/* ; 04 (640x) */ + {{ 0x6F,0x4F,0x93,0x54,0x80,0x00,0x05,0x00 }},/* ; 05 (720x) */ + {{ 0x83,0x63,0x87,0x68,0x14,0x00,0x26,0x00 }},/* ; 06 (800x) */ + {{ 0x9F,0x7F,0x83,0x85,0x91,0x00,0x02,0x00 }} /* ; 07 (1024x) */ +}; + +static XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_1_Vx75[]= +{ /* CR06,CR07,CR10,CR11,CR15,CR16,SR0A+CR09(5->7) */ + {{ 0x97,0x1F,0x60,0x87,0x5D,0x83,0x10 }},/* ; 00 (x350) */ + {{ 0xB4,0x1F,0x92,0x89,0x8F,0xB5,0x30 }},/* ; 01 (x400) */ + {{ 0xFE,0x1F,0xE0,0x84,0xDF,0xFF,0x10 }},/* ; 02 (x480) */ + {{ 0x76,0xF0,0x58,0x8C,0x57,0x77,0xA0 }},/* ; 03 (x600) */ + {{ 0x1E,0xF5,0x00,0x83,0xFF,0x1F,0x90 }} /* ; 04 (x768) */ +}; + +static XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11024x768_2_Hx75[]= +{ /* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ + {{ 0x63,0x27,0x87,0x3B,0x8C,0x00,0x01,0x00 }},/* ; 00 (320x) */ + {{ 0x63,0x27,0x87,0x3B,0x8C,0x00,0x01,0x00 }},/* ; 01 (360x) */ + {{ 0x63,0x31,0x87,0x3D,0x8E,0x00,0x01,0x00 }},/* ; 02 (400x) */ + {{ 0x63,0x3F,0x87,0x45,0x96,0x00,0x01,0x00 }},/* ; 03 (512x) */ + {{ 0xA3,0x4F,0x87,0x6E,0x9F,0x00,0x06,0x00 }},/* ; 04 (640x) */ + {{ 0xA3,0x4F,0x87,0x6E,0x9F,0x00,0x06,0x00 }},/* ; 05 (720x) */ + {{ 0xA3,0x63,0x87,0x78,0x89,0x00,0x02,0x00 }},/* ; 06 (800x) */ + {{ 0xA3,0x7F,0x87,0x86,0x97,0x00,0x02,0x00 }} /* ; 07 (1024x) */ +}; + +static XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11024x768_2_Vx75[]= +{ /* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ + {{ 0x24,0xBB,0x31,0x87,0x5D,0x25,0x30 }},/* ; 00 (x350) */ + {{ 0x24,0xBB,0x4A,0x80,0x8F,0x25,0x30 }},/* ; 01 (x400) */ + {{ 0x24,0xBB,0x72,0x88,0xDF,0x25,0x30 }},/* ; 02 (x480) */ + {{ 0x24,0xF1,0xAE,0x84,0x57,0x25,0xB0 }},/* ; 03 (x600) */ + {{ 0x24,0xF5,0x02,0x88,0xFF,0x25,0x90 }} /* ; 04 (x768) */ +}; + +static XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_1_Hx75[]= +{ /* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ + {{ 0x56,0x27,0x9A,0x30,0x1E,0x00,0x05,0x00 }},/* ; 00 (320x) */ + {{ 0x56,0x27,0x9A,0x30,0x1E,0x00,0x05,0x00 }},/* ; 01 (360x) */ + {{ 0x60,0x31,0x84,0x3A,0x88,0x00,0x01,0x00 }},/* ; 02 (400x) */ + {{ 0x6E,0x3F,0x92,0x48,0x96,0x00,0x01,0x00 }},/* ; 03 (512x) */ + {{ 0x7E,0x4F,0x82,0x54,0x06,0x00,0x06,0x00 }},/* ; 04 (640x) */ + {{ 0x7E,0x4F,0x82,0x54,0x06,0x00,0x06,0x00 }},/* ; 05 (720x) */ + {{ 0x92,0x63,0x96,0x68,0x1A,0x00,0x06,0x00 }},/* ; 06 (800x) */ + {{ 0xAE,0x7F,0x92,0x84,0x96,0x00,0x02,0x00 }},/* ; 07 (1024x) */ + {{ 0xCE,0x9F,0x92,0xA5,0x17,0x00,0x07,0x00 }} /* ; 08 (1280x) */ +}; + +static XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_1_Vx75[]= +{ /* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ + {{ 0x86,0xD1,0xBC,0x80,0xBB,0xE5,0x00 }},/* ; 00 (x350) */ + {{ 0xB8,0x1F,0x90,0x84,0x8F,0xB9,0x30 }},/* ; 01 (x400) */ + {{ 0x08,0x3E,0xE0,0x84,0xDF,0x09,0x00 }},/* ; 02 (x480) */ + {{ 0x80,0xF0,0x58,0x8C,0x57,0x81,0xA0 }},/* ; 03 (x600) */ + {{ 0x28,0xF5,0x00,0x84,0xFF,0x29,0x90 }},/* ; 04 (x768) */ + {{ 0x28,0x5A,0x13,0x87,0xFF,0x29,0xA9 }} /* ; 05 (x1024) */ +}; + +static XGI_LVDSCRT1HDataStruct XGI_LVDSCRT11280x1024_2_Hx75[]= +{ + /* CR00,CR02,CR03,CR04,CR05,SR0B,SR0C,SR0E */ + {{ 0x7E,0x3B,0x9A,0x44,0x12,0x00,0x01,0x00 }},/* ; 00 (320x) */ + {{ 0x7E,0x3B,0x9A,0x44,0x12,0x00,0x01,0x00 }},/* ; 01 (360x) */ + {{ 0x7E,0x40,0x84,0x49,0x91,0x00,0x01,0x00 }},/* ; 02 (400x) */ + {{ 0x7E,0x47,0x93,0x50,0x9E,0x00,0x01,0x00 }},/* ; 03 (512x) */ + {{ 0xCE,0x77,0x8A,0x80,0x8E,0x00,0x02,0x00 }},/* ; 04 (640x) */ + {{ 0xCE,0x77,0x8A,0x80,0x8E,0x00,0x02,0x00 }},/* ; 05 (720x) */ + {{ 0xCE,0x81,0x94,0x8A,0x98,0x00,0x02,0x00 }},/* ; 06 (800x) */ + {{ 0xCE,0x8F,0x82,0x98,0x06,0x00,0x07,0x00 }},/* ; 07 (1024x) */ + {{ 0xCE,0x9F,0x92,0xA8,0x16,0x00,0x07,0x00 }} /* ; 08 (1280x) */ +}; + +static XGI_LVDSCRT1VDataStruct XGI_LVDSCRT11280x1024_2_Vx75[]= +{ + /* CR06,CR07,CR10,CR11,CR15,CR16,SR0A */ + {{ 0x28,0xD2,0xAF,0x83,0xAE,0xD8,0xA1 }},/* ; 00 (x350) */ + {{ 0x28,0xD2,0xC8,0x8C,0xC7,0xF2,0x81 }},/* ; 01 (x400) */ + {{ 0x28,0xD2,0xF0,0x84,0xEF,0x1A,0xB1 }},/* ; 02 (x480) */ + {{ 0x28,0xDE,0x2C,0x8F,0x2B,0x56,0x91 }},/* ; 03 (x600) */ + {{ 0x28,0xDE,0x80,0x83,0x7F,0xAA,0x91 }},/* ; 04 (x768) */ + {{ 0x28,0x5A,0x13,0x87,0xFF,0x29,0xA9 }} /* ; 05 (x1024) */ +}; + +#if 0 +static XGI_LVDSCRT1DataStruct XGI_CHTVCRT1UNTSC[]= +{ + {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e, + 0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,0x00 }}, + {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e, + 0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,0x00 }}, + {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e, + 0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,0x00 }}, + {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e, + 0xd0,0x82,0x5d,0x57,0x00,0x00,0x01,0x00 }}, + {{0x5d,0x4f,0x81,0x53,0x9c,0x56,0xba, + 0x18,0x84,0xdf,0x57,0x00,0x00,0x01,0x00 }}, + {{0x80,0x63,0x84,0x6c,0x17,0xec,0xf0, + 0x90,0x8c,0x57,0xed,0x20,0x00,0x06,0x01 }} +}; + +static XGI_LVDSCRT1DataStruct XGI_CHTVCRT1ONTSC[]= +{ + {{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e, + 0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,0x00 }}, + {{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e, + 0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,0x00 }}, + {{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e, + 0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,0x00 }}, + {{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e, + 0xb0,0x8d,0x5d,0x0c,0x00,0x00,0x01,0x00 }}, + {{0x5d,0x4f,0x81,0x56,0x9c,0x0b,0x3e, + 0xe8,0x84,0xdf,0x0c,0x00,0x00,0x01,0x00 }}, + {{0x7d,0x63,0x81,0x6a,0x16,0xba,0xf0, + 0x7f,0x86,0x57,0xbb,0x00,0x00,0x06,0x01 }} +}; + +static XGI_LVDSCRT1DataStruct XGI_CHTVCRT1UPAL[]= +{ + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,0x00 }}, + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xde,0x81,0x5d,0x70,0x00,0x00,0x05,0x00 }}, + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,0x00 }}, + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xde,0x81,0x5d,0x70,0x00,0x00,0x05,0x00 }}, + {{0x64,0x4f,0x88,0x55,0x80,0xec,0xba, + 0x50,0x84,0xdf,0xed,0x00,0x00,0x05,0x00 }}, + {{0x70,0x63,0x94,0x68,0x8d,0x42,0xf1, + 0xc8,0x8c,0x57,0xe9,0x20,0x00,0x05,0x01 }} +}; + +static XGI_LVDSCRT1DataStruct XGI_CHTVCRT1OPAL[]= +{ + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,0x00 }}, + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xde,0x81,0x5d,0x70,0x00,0x00,0x05,0x00 }}, + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,0x00 }}, + {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, + 0xde,0x81,0x5d,0x70,0x00,0x00,0x05,0x00 }}, + {{0x64,0x4f,0x88,0x55,0x80,0x6f,0xba, + 0x20,0x83,0xdf,0x70,0x00,0x00,0x05,0x00 }}, + {{0x73,0x63,0x97,0x69,0x8e,0xec,0xf0, + 0x90,0x8c,0x57,0xed,0x20,0x00,0x05,0x01 }} +}; +#endif + +/*add for new UNIVGABIOS*/ +static XGI330_LCDDataTablStruct XGI_LCDDataTable[]= +{ + {Panel1024x768,0x0019,0x0001,0}, /* XGI_ExtLCD1024x768Data */ + {Panel1024x768,0x0019,0x0000,1}, /* XGI_StLCD1024x768Data */ + {Panel1024x768,0x0018,0x0010,2}, /* XGI_CetLCD1024x768Data */ + {Panel1280x1024,0x0019,0x0001,3}, /* XGI_ExtLCD1280x1024Data */ + {Panel1280x1024,0x0019,0x0000,4}, /* XGI_StLCD1280x1024Data */ + {Panel1280x1024,0x0018,0x0010,5}, /* XGI_CetLCD1280x1024Data */ + {Panel1400x1050,0x0019,0x0001,6}, /* XGI_ExtLCD1400x1050Data */ + {Panel1400x1050,0x0019,0x0000,7}, /* XGI_StLCD1400x1050Data */ + {Panel1400x1050,0x0018,0x0010,8}, /* XGI_CetLCD1400x1050Data */ + {Panel1600x1200,0x0019,0x0001,9}, /* XGI_ExtLCD1600x1200Data */ + {Panel1600x1200,0x0019,0x0000,10}, /* XGI_StLCD1600x1200Data */ + {PanelRef60Hz,0x0008,0x0008,11}, /* XGI_NoScalingData */ + {Panel1024x768x75,0x0019,0x0001,12}, /* XGI_ExtLCD1024x768x75Data */ + {Panel1024x768x75,0x0019,0x0000,13}, /* XGI_StLCD1024x768x75Data */ + {Panel1024x768x75,0x0018,0x0010,14}, /* XGI_CetLCD1024x768x75Data */ + {Panel1280x1024x75,0x0019,0x0001,15}, /* XGI_ExtLCD1280x1024x75Data */ + {Panel1280x1024x75,0x0019,0x0000,16}, /* XGI_StLCD1280x1024x75Data */ + {Panel1280x1024x75,0x0018,0x0010,17}, /* XGI_CetLCD1280x1024x75Data */ + {PanelRef75Hz,0x0008,0x0008,18}, /* XGI_NoScalingDatax75 */ + {0xFF,0x0000,0x0000,0} /* End of table */ +}; + +static XGI330_LCDDataTablStruct XGI_LCDDesDataTable[]= +{ + {Panel1024x768,0x0019,0x0001,0}, /* XGI_ExtLCDDes1024x768Data */ + {Panel1024x768,0x0019,0x0000,1}, /* XGI_StLCDDes1024x768Data */ + {Panel1024x768,0x0018,0x0010,2}, /* XGI_CetLCDDes1024x768Data */ + {Panel1280x1024,0x0019,0x0001,3}, /* XGI_ExtLCDDes1280x1024Data */ + {Panel1280x1024,0x0019,0x0000,4}, /* XGI_StLCDDes1280x1024Data */ + {Panel1280x1024,0x0018,0x0010,5}, /* XGI_CetLCDDes1280x1024Data */ + {Panel1400x1050,0x0019,0x0001,6}, /* XGI_ExtLCDDes1400x1050Data */ + {Panel1400x1050,0x0019,0x0000,7}, /* XGI_StLCDDes1400x1050Data */ + {Panel1400x1050,0x0418,0x0010,8}, /* XGI_CetLCDDes1400x1050Data */ + {Panel1400x1050,0x0418,0x0410,9}, /* XGI_CetLCDDes1400x1050Data2 */ + {Panel1600x1200,0x0019,0x0001,10}, /* XGI_ExtLCDDes1600x1200Data */ + {Panel1600x1200,0x0019,0x0000,11}, /* XGI_StLCDDes1600x1200Data */ + {PanelRef60Hz,0x0008,0x0008,12}, /* XGI_NoScalingDesData */ + {Panel1024x768x75,0x0019,0x0001,13}, /* XGI_ExtLCDDes1024x768x75Data */ + {Panel1024x768x75,0x0019,0x0000,14}, /* XGI_StLCDDes1024x768x75Data */ + {Panel1024x768x75,0x0018,0x0010,15}, /* XGI_CetLCDDes1024x768x75Data */ + {Panel1280x1024x75,0x0019,0x0001,16}, /* XGI_ExtLCDDes1280x1024x75Data */ + {Panel1280x1024x75,0x0019,0x0000,17}, /* XGI_StLCDDes1280x1024x75Data */ + {Panel1280x1024x75,0x0018,0x0010,18}, /* XGI_CetLCDDes1280x1024x75Data */ + {PanelRef75Hz,0x0008,0x0008,19}, /* XGI_NoScalingDesDatax75 */ + {0xFF,0x0000,0x0000,0} +}; + +static XGI330_LCDDataTablStruct XGI_EPLLCDCRT1Ptr_H[]= +{ + {Panel1024x768,0x0018,0x0000,0}, /* XGI_LVDSCRT11024x768_1_H */ + {Panel1024x768,0x0018,0x0010,1}, /* XGI_LVDSCRT11024x768_2_H */ + {Panel1280x1024,0x0018,0x0000,2}, /* XGI_LVDSCRT11280x1024_1_H */ + {Panel1280x1024,0x0018,0x0010,3}, /* XGI_LVDSCRT11280x1024_2_H */ + {Panel1400x1050,0x0018,0x0000,4}, /* XGI_LVDSCRT11400x1050_1_H */ + {Panel1400x1050,0x0018,0x0010,5}, /* XGI_LVDSCRT11400x1050_2_H */ + {Panel1600x1200,0x0018,0x0000,6}, /* XGI_LVDSCRT11600x1200_1_H */ + {Panel1024x768x75,0x0018,0x0000,7}, /* XGI_LVDSCRT11024x768_1_Hx75 */ + {Panel1024x768x75,0x0018,0x0010,8}, /* XGI_LVDSCRT11024x768_2_Hx75 */ + {Panel1280x1024x75,0x0018,0x0000,9}, /* XGI_LVDSCRT11280x1024_1_Hx75 */ + {Panel1280x1024x75,0x0018,0x0010,10}, /* XGI_LVDSCRT11280x1024_2_Hx75 */ + {0xFF,0x0000,0x0000,0} +}; + +static XGI330_LCDDataTablStruct XGI_EPLLCDCRT1Ptr_V[]= +{ + {Panel1024x768,0x0018,0x0000,0}, /* XGI_LVDSCRT11024x768_1_V */ + {Panel1024x768,0x0018,0x0010,1}, /* XGI_LVDSCRT11024x768_2_V */ + {Panel1280x1024,0x0018,0x0000,2}, /* XGI_LVDSCRT11280x1024_1_V */ + {Panel1280x1024,0x0018,0x0010,3}, /* XGI_LVDSCRT11280x1024_2_V */ + {Panel1400x1050,0x0018,0x0000,4}, /* XGI_LVDSCRT11400x1050_1_V */ + {Panel1400x1050,0x0018,0x0010,5}, /* XGI_LVDSCRT11400x1050_2_V */ + {Panel1600x1200,0x0018,0x0000,6}, /* XGI_LVDSCRT11600x1200_1_V */ + {Panel1024x768x75,0x0018,0x0000,7}, /* XGI_LVDSCRT11024x768_1_Vx75 */ + {Panel1024x768x75,0x0018,0x0010,8}, /* XGI_LVDSCRT11024x768_2_Vx75 */ + {Panel1280x1024x75,0x0018,0x0000,9}, /* XGI_LVDSCRT11280x1024_1_Vx75 */ + {Panel1280x1024x75,0x0018,0x0010,10}, /* XGI_LVDSCRT11280x1024_2_Vx75 */ + {0xFF,0x0000,0x0000,0} +}; + +static XGI330_LCDDataTablStruct XGI_EPLLCDDataPtr[]= +{ + {Panel1024x768,0x0018,0x0000,0}, /* XGI_LVDS1024x768Data_1 */ + {Panel1024x768,0x0018,0x0010,1}, /* XGI_LVDS1024x768Data_2 */ + {Panel1280x1024,0x0018,0x0000,2}, /* XGI_LVDS1280x1024Data_1 */ + {Panel1280x1024,0x0018,0x0010,3}, /* XGI_LVDS1280x1024Data_2 */ + {Panel1400x1050,0x0018,0x0000,4}, /* XGI_LVDS1400x1050Data_1 */ + {Panel1400x1050,0x0018,0x0010,5}, /* XGI_LVDS1400x1050Data_2 */ + {Panel1600x1200,0x0018,0x0000,6}, /* XGI_LVDS1600x1200Data_1 */ + {PanelRef60Hz,0x0008,0x0008,7}, /* XGI_LVDSNoScalingData */ + {Panel1024x768x75,0x0018,0x0000,8}, /* XGI_LVDS1024x768Data_1x75 */ + {Panel1024x768x75,0x0018,0x0010,9}, /* XGI_LVDS1024x768Data_2x75 */ + {Panel1280x1024x75,0x0018,0x0000,10}, /* XGI_LVDS1280x1024Data_1x75 */ + {Panel1280x1024x75,0x0018,0x0010,11}, /* XGI_LVDS1280x1024Data_2x75 */ + {PanelRef75Hz,0x0008,0x0008,12}, /* XGI_LVDSNoScalingDatax75 */ + {0xFF,0x0000,0x0000,0} +}; + +static XGI330_LCDDataTablStruct XGI_EPLLCDDesDataPtr[]= +{ + {Panel1024x768,0x0018,0x0000,0}, /* XGI_LVDS1024x768Des_1 */ + {Panel1024x768,0x0618,0x0410,1}, /* XGI_LVDS1024x768Des_3 */ + {Panel1024x768,0x0018,0x0010,2}, /* XGI_LVDS1024x768Des_2 */ + {Panel1280x1024,0x0018,0x0000,3}, /* XGI_LVDS1280x1024Des_1 */ + {Panel1280x1024,0x0018,0x0010,4}, /* XGI_LVDS1280x1024Des_2 */ + {Panel1400x1050,0x0018,0x0000,5}, /* XGI_LVDS1400x1050Des_1 */ + {Panel1400x1050,0x0018,0x0010,6}, /* XGI_LVDS1400x1050Des_2 */ + {Panel1600x1200,0x0018,0x0000,7}, /* XGI_LVDS1600x1200Des_1 */ + {PanelRef60Hz,0x0008,0x0008,8}, /* XGI_LVDSNoScalingDesData */ + {Panel1024x768x75,0x0018,0x0000,9}, /* XGI_LVDS1024x768Des_1x75 */ + {Panel1024x768x75,0x0618,0x0410,10}, /* XGI_LVDS1024x768Des_3x75 */ + {Panel1024x768x75,0x0018,0x0010,11}, /* XGI_LVDS1024x768Des_2x75 */ + {Panel1280x1024x75,0x0018,0x0000,12}, /* XGI_LVDS1280x1024Des_1x75 */ + {Panel1280x1024x75,0x0018,0x0010,13}, /* XGI_LVDS1280x1024Des_2x75 */ + {PanelRef75Hz,0x0008,0x0008,14}, /* XGI_LVDSNoScalingDesDatax75 */ + {0xFF,0x0000,0x0000,0} +}; + +static XGI330_LCDDataTablStruct XGI_EPLCHLCDRegPtr[]= +{ + {Panel1024x768,0x0000,0x0000,0}, /* XGI_CH7017LV1024x768 */ + {Panel1400x1050,0x0000,0x0000,1}, /* XGI_CH7017LV1400x1050 */ + {0xFF,0x0000,0x0000,0} +}; + +static XGI330_TVDataTablStruct XGI_TVDataTable[]= +{ + {0x09E1,0x0001,0}, /* XGI_ExtPALData */ + {0x09E1,0x0000,1}, /* XGI_ExtNTSCData */ + {0x09E1,0x0801,2}, /* XGI_StPALData */ + {0x09E1,0x0800,3}, /* XGI_StNTSCData */ + {0x49E0,0x0100,4}, /* XGI_ExtHiTVData */ + {0x49E0,0x4100,5}, /* XGI_St2HiTVData */ + {0x49E0,0x4900,13}, /* XGI_St1HiTVData */ + {0x09E0,0x0020,6}, /* XGI_ExtYPbPr525iData */ + {0x09E0,0x0040,7}, /* XGI_ExtYPbPr525pData */ + {0x09E0,0x0080,8}, /* XGI_ExtYPbPr750pData */ + {0x09E0,0x0820,9}, /* XGI_StYPbPr525iData */ + {0x09E0,0x0840,10}, /* XGI_StYPbPr525pData */ + {0x09E0,0x0880,11}, /* XGI_StYPbPr750pData */ + {0xffff,0x0000,12} /* END */ +}; + +#if 0 +static USHORT TVLenList[]= +{ + LVDSCRT1Len_H, + LVDSCRT1Len_V, + LVDSDataLen, + 0, + TVDataLen, + 0, + 0, + CHTVRegLen +} ; + +/* Chrontel 7017 TV CRT1 Timing List */ +static XGI330_TVDataTablStruct XGI_EPLCHTVCRT1Ptr[]= +{ + {0x0011,0x0000,0}, /* XGI_CHTVCRT1UNTSC */ + {0x0011,0x0010,1}, /* XGI_CHTVCRT1ONTSC */ + {0x0011,0x0001,2}, /* XGI_CHTVCRT1UPAL */ + {0x0011,0x0011,3}, /* XGI_CHTVCRT1OPAL */ + {0xFFFF,0x0000,4} +}; +#endif + +/* ;;Chrontel 7017 TV Timing List */ +static XGI330_TVDataTablStruct XGI_EPLCHTVDataPtr[]= +{ + {0x0011,0x0000,0}, /* XGI_CHTVUNTSCData */ + {0x0011,0x0010,1}, /* XGI_CHTVONTSCData */ + {0x0011,0x0001,2}, /* XGI_CHTVUPALData */ + {0x0011,0x0011,3}, /* XGI_CHTVOPALData */ + {0xFFFF,0x0000,4} +}; + +/* ;;Chrontel 7017 TV Reg. List */ +static XGI330_TVDataTablStruct XGI_EPLCHTVRegPtr[]= +{ + {0x0011,0x0000,0}, /* XGI_CHTVRegUNTSC */ + {0x0011,0x0010,1}, /* XGI_CHTVRegONTSC */ + {0x0011,0x0001,2}, /* XGI_CHTVRegUPAL */ + {0x0011,0x0011,3}, /* XGI_CHTVRegOPAL */ + {0xFFFF,0x0000,4} +}; + +#if 0 +static USHORT LCDLenList[]= +{ + LVDSCRT1Len_H, + LVDSCRT1Len_V, + LVDSDataLen, + LCDDesDataLen, + LCDDataLen, + LCDDesDataLen, + 0, + LCDDesDataLen, + LCDDesDataLen, + 0 +} ; + +static XGI330_LCDCapStruct XGI660_LCDDLCapList[]= /* 660, Dual link */ +{ +/* LCDCap1024x768 */ + {Panel1024x768, DefaultLCDCap, 0, 0x014, 0x88, 0x06, VCLK65, + 0x6C, 0xC3, 0x35, 0x62, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10}, +/* LCDCap1280x1024 */ + {Panel1280x1024, LCDDualLink+DefaultLCDCap, StLCDBToA, 0x053, 0x70, 0x03, VCLK108_2, + 0x70, 0x44, 0xF8, 0x2F, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCap1400x1050 */ + {Panel1400x1050, LCDDualLink+DefaultLCDCap, StLCDBToA, 0x053, 0x70, 0x03, VCLK108_2, + 0x70, 0x44, 0xF8, 0x2F, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCap1600x1200 */ + {Panel1600x1200, LCDDualLink+DefaultLCDCap, LCDToFull, 0x053, 0xC0, 0x03, VCLK162, + 0x43, 0x22, 0x70, 0x24, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCap1024x768x75 */ + {Panel1024x768x75, DefaultLCDCap, 0, 0x014, 0x60, 0, VCLK78_75, + 0x2B, 0x61, 0x2B, 0x61, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10}, +/* LCDCap1280x1024x75 */ + {Panel1280x1024x75, LCDDualLink+DefaultLCDCap, StLCDBToA, 0x053, 0x90, 0x03, VCLK135_5, + 0x54, 0x42, 0x4A, 0x61, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCapDefault */ + {0xFF, DefaultLCDCap, 0, 0x053, 0x88, 0x06, VCLK65, + 0x6C, 0xC3, 0x35, 0x62, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10} +}; +#endif + +static XGI330_LCDCapStruct XGI_LCDDLCapList[]= /* Dual link only */ +{ +/* LCDCap1024x768 */ + {Panel1024x768, DefaultLCDCap, 0, 0x012, 0x88, 0x06, VCLK65, + 0x6C, 0xC3, 0x35, 0x62, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10}, +/* LCDCap1280x1024 */ + {Panel1280x1024, LCDDualLink+DefaultLCDCap, StLCDBToA, 0x012, 0x70, 0x03, VCLK108_2, + 0x70, 0x44, 0xF8, 0x2F, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCap1400x1050 */ + {Panel1400x1050, LCDDualLink+DefaultLCDCap, StLCDBToA, 0x012, 0x70, 0x03, VCLK108_2, + 0x70, 0x44, 0xF8, 0x2F, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCap1600x1200 */ + {Panel1600x1200, LCDDualLink+DefaultLCDCap, LCDToFull, 0x012, 0xC0, 0x03, VCLK162, + 0x43, 0x22, 0x70, 0x24, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCap1024x768x75 */ + {Panel1024x768x75, DefaultLCDCap, 0, 0x012, 0x60, 0, VCLK78_75, + 0x2B, 0x61, 0x2B, 0x61, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10}, +/* LCDCap1280x1024x75 */ + {Panel1280x1024x75, LCDDualLink+DefaultLCDCap, StLCDBToA, 0x012, 0x90, 0x03, VCLK135_5, + 0x54, 0x42, 0x4A, 0x61, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCapDefault */ + {0xFF, DefaultLCDCap, 0, 0x012, 0x88, 0x06, VCLK65, + 0x6C, 0xC3, 0x35, 0x62, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10} +}; + +#if 0 +static XGI330_LCDCapStruct XGI660_LCDCapList[]= +{ +/* LCDCap1024x768 */ + {Panel1024x768, DefaultLCDCap, 0, 0x014, 0x88, 0x06, VCLK65, + 0x6C, 0xC3, 0x35, 0x62, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10}, +/* LCDCap1280x1024 */ + {Panel1280x1024, DefaultLCDCap, StLCDBToA, 0x053, 0x70, 0x03, VCLK108_2, + 0x70, 0x44, 0xF8, 0x2F, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCap1400x1050 */ + {Panel1400x1050, DefaultLCDCap, StLCDBToA, 0x053, 0x70, 0x03, VCLK108_2, + 0x70, 0x44, 0xF8, 0x2F, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCap1600x1200 */ + {Panel1600x1200, DefaultLCDCap, LCDToFull, 0x053, 0xC0, 0x03, VCLK162, + 0x5A, 0x23, 0x5A, 0x23, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCap1024x768x75 */ + {Panel1024x768x75, DefaultLCDCap, 0, 0x014, 0x60, 0, VCLK78_75, + 0x2B, 0x61, 0x2B, 0x61, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10}, +/* LCDCap1280x1024x75 */ + {Panel1280x1024x75,+DefaultLCDCap, StLCDBToA, 0x053, 0x90, 0x03, VCLK135_5, + 0x54, 0x42, 0x4A, 0x61, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCapDefault */ + {0xFF, DefaultLCDCap, 0, 0x053, 0x88, 0x06, VCLK65, + 0x6C, 0xC3, 0x35, 0x62, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10} +}; +#endif + +static XGI330_LCDCapStruct XGI_LCDCapList[]= +{ +/* LCDCap1024x768 */ + {Panel1024x768, DefaultLCDCap, 0, 0x012, 0x88, 0x06, VCLK65, + 0x6C, 0xC3, 0x35, 0x62, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10}, +/* LCDCap1280x1024 */ + {Panel1280x1024, DefaultLCDCap, StLCDBToA, 0x012, 0x70, 0x03, VCLK108_2, + 0x70, 0x44, 0xF8, 0x2F, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCap1400x1050 */ + {Panel1400x1050, DefaultLCDCap, StLCDBToA, 0x012, 0x70, 0x03, VCLK108_2, + 0x70, 0x44, 0xF8, 0x2F, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCap1600x1200 */ + {Panel1600x1200, DefaultLCDCap, LCDToFull, 0x012, 0xC0, 0x03, VCLK162, + 0x5A, 0x23, 0x5A, 0x23, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCap1024x768x75 */ + {Panel1024x768x75, DefaultLCDCap, 0, 0x012, 0x60, 0, VCLK78_75, + 0x2B, 0x61, 0x2B, 0x61, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10}, +/* LCDCap1280x1024x75 */ + {Panel1280x1024x75, DefaultLCDCap, StLCDBToA, 0x012, 0x90, 0x03, VCLK135_5, + 0x54, 0x42, 0x4A, 0x61, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x30, 0x10}, +/* LCDCapDefault */ + {0xFF, DefaultLCDCap, 0, 0x012, 0x88, 0x06, VCLK65, + 0x6C, 0xC3, 0x35, 0x62, 0x02, 0x14, 0x0A, 0x02, 0x00, + 0x30, 0x10, 0x5A, 0x10, 0x10, 0x0A, 0xC0, 0x28, 0x10} +}; + +static XGI_Ext2Struct XGI330_RefIndex[]= +{ +{Support32Bpp + SupportAllCRT2 + SyncPN, RES320x200, VCLK25_175, 0x00,0x10,0x59, 320, 200},/* 00 */ +{Support32Bpp + SupportAllCRT2 + SyncPN, RES320x200, VCLK25_175, 0x00,0x10,0x00, 320, 400},/* 01 */ +{Support32Bpp + SupportAllCRT2 + SyncNN, RES320x240, VCLK25_175, 0x04,0x20,0x50, 320, 240},/* 02 */ +{Support32Bpp + SupportAllCRT2 + SyncPP, RES400x300, VCLK40, 0x05,0x32,0x51, 400, 300},/* 03 */ +{Support32Bpp + NoSupportTV + SyncNN + SupportTV1024, RES512x384, VCLK65, 0x06,0x43,0x52, 512, 384},/* 04 */ +{Support32Bpp + SupportAllCRT2 + SyncPN, RES640x400, VCLK25_175, 0x00,0x14,0x2f, 640, 400},/* 05 */ +{Support32Bpp + SupportAllCRT2 + SyncNN, RES640x480x60, VCLK25_175, 0x04,0x24,0x2e, 640, 480},/* 06 640x480x60Hz (LCD 640x480x60z) */ +{Support32Bpp + NoSupportHiVisionTV + SyncNN, RES640x480x72, VCLK31_5, 0x04,0x24,0x2e, 640, 480},/* 07 640x480x72Hz (LCD 640x480x70Hz) */ +{Support32Bpp + NoSupportHiVisionTV + SyncNN, RES640x480x75, VCLK31_5, 0x47,0x24,0x2e, 640, 480},/* 08 640x480x75Hz (LCD 640x480x75Hz) */ +{Support32Bpp + SupportRAMDAC2 + SyncNN, RES640x480x85, VCLK36, 0x8A,0x24,0x2e, 640, 480},/* 09 640x480x85Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPN, RES640x480x100, VCLK43_163, 0x00,0x24,0x2e, 640, 480},/* 0a 640x480x100Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPN, RES640x480x120, VCLK52_406, 0x00,0x24,0x2e, 640, 480},/* 0b 640x480x120Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPN, RES640x480x160, VCLK72_852, 0x00,0x24,0x2e, 640, 480},/* 0c 640x480x160Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncNN, RES640x480x200, VCLK86_6, 0x00,0x24,0x2e, 640, 480},/* 0d 640x480x200Hz */ +{Support32Bpp + NoSupportLCD + SyncPP, RES800x600x56, VCLK36, 0x05,0x36,0x6a, 800, 600},/* 0e 800x600x56Hz */ +{Support32Bpp + NoSupportTV + SyncPP, RES800x600x60, VCLK40, 0x05,0x36,0x6a, 800, 600},/* 0f 800x600x60Hz (LCD 800x600x60Hz) */ +{Support32Bpp + NoSupportHiVisionTV + SyncPP, RES800x600x72, VCLK50, 0x48,0x36,0x6a, 800, 600},/* 10 800x600x72Hz (LCD 800x600x70Hz) */ +{Support32Bpp + NoSupportHiVisionTV + SyncPP, RES800x600x75, VCLK49_5, 0x8B,0x36,0x6a, 800, 600},/* 11 800x600x75Hz (LCD 800x600x75Hz) */ +{Support32Bpp + SupportRAMDAC2 + SyncPP, RES800x600x85, VCLK56_25, 0x00,0x36,0x6a, 800, 600},/* 12 800x600x85Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPN, RES800x600x100, VCLK68_179, 0x00,0x36,0x6a, 800, 600},/* 13 800x600x100Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPN, RES800x600x120, VCLK83_95, 0x00,0x36,0x6a, 800, 600},/* 14 800x600x120Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPN, RES800x600x160, VCLK116_406,0x00,0x36,0x6a, 800, 600},/* 15 800x600x160Hz */ +{Support32Bpp + InterlaceMode + SyncPP, RES1024x768x43, VCLK44_9, 0x00,0x47,0x37,1024, 768},/* 16 1024x768x43Hz */ +{Support32Bpp + NoSupportTV + SyncNN + SupportTV1024, RES1024x768x60, VCLK65, 0x06,0x47,0x37,1024, 768},/* 17 1024x768x60Hz (LCD 1024x768x60Hz) */ +{Support32Bpp + NoSupportHiVisionTV + SyncNN, RES1024x768x70, VCLK75, 0x49,0x47,0x37,1024, 768},/* 18 1024x768x70Hz (LCD 1024x768x70Hz) */ +{Support32Bpp + NoSupportHiVisionTV + SyncPP, RES1024x768x75, VCLK78_75, 0x00,0x47,0x37,1024, 768},/* 19 1024x768x75Hz (LCD 1024x768x75Hz) */ +{Support32Bpp + SupportRAMDAC2 + SyncPP, RES1024x768x85, VCLK94_5, 0x8C,0x47,0x37,1024, 768},/* 1a 1024x768x85Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPN, RES1024x768x100, VCLK113_309,0x00,0x47,0x37,1024, 768},/* 1b 1024x768x100Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPN, RES1024x768x120, VCLK139_054,0x00,0x47,0x37,1024, 768},/* 1c 1024x768x120Hz */ +{Support32Bpp + SupportLCD + SyncPP, RES1280x960x60, VCLK108_2, 0x08,0x58,0x7b,1280, 960},/* 1d 1280x960x60Hz */ +{Support32Bpp + InterlaceMode + SyncPP, RES1280x1024x43, VCLK78_75, 0x00,0x58,0x3a,1280,1024},/* 1e 1280x1024x43Hz */ +{Support32Bpp + NoSupportTV + SyncPP, RES1280x1024x60, VCLK108_2, 0x07,0x58,0x3a,1280,1024},/* 1f 1280x1024x60Hz (LCD 1280x1024x60Hz) */ +{Support32Bpp + NoSupportTV + SyncPP, RES1280x1024x75, VCLK135_5, 0x00,0x58,0x3a,1280,1024},/* 20 1280x1024x75Hz (LCD 1280x1024x75Hz) */ +{Support32Bpp + SyncPP, RES1280x1024x85, VCLK157_5, 0x00,0x58,0x3a,1280,1024},/* 21 1280x1024x85Hz */ +{Support32Bpp + SupportLCD + SyncPP + SupportCRT2in301C, RES1600x1200x60, VCLK162, 0x09,0x7A,0x3c,1600,1200},/* 22 1600x1200x60Hz */ +{Support32Bpp + SyncPP + SupportCRT2in301C, RES1600x1200x65, VCLK175, 0x00,0x69,0x3c,1600,1200},/* 23 1600x1200x65Hz */ +{Support32Bpp + SyncPP + SupportCRT2in301C, RES1600x1200x70, VCLK189, 0x00,0x69,0x3c,1600,1200},/* 24 1600x1200x70Hz */ +{Support32Bpp + SyncPP + SupportCRT2in301C, RES1600x1200x75, VCLK202_5, 0x00,0x69,0x3c,1600,1200},/* 25 1600x1200x75Hz */ +{Support32Bpp + SyncPP, RES1600x1200x85, VCLK229_5, 0x00,0x69,0x3c,1600,1200},/* 26 1600x1200x85Hz */ +{Support32Bpp + SyncPP, RES1600x1200x100,VCLK269_655,0x00,0x69,0x3c,1600,1200},/* 27 1600x1200x100Hz */ +{Support32Bpp + SyncPP, RES1600x1200x120,VCLK323_586,0x00,0x69,0x3c,1600,1200},/* 28 1600x1200x120Hz */ +{Support32Bpp + SupportLCD + SyncNP, RES1920x1440x60, VCLK234, 0x00,0x00,0x68,1920,1440},/* 29 1920x1440x60Hz */ +{Support32Bpp + SyncPN, RES1920x1440x65, VCLK254_817,0x00,0x00,0x68,1920,1440},/* 2a 1920x1440x65Hz */ +{Support32Bpp + SyncPN, RES1920x1440x70, VCLK277_015,0x00,0x00,0x68,1920,1440},/* 2b 1920x1440x70Hz */ +{Support32Bpp + SyncPN, RES1920x1440x75, VCLK291_132,0x00,0x00,0x68,1920,1440},/* 2c 1920x1440x75Hz */ +{Support32Bpp + SyncPN, RES1920x1440x85, VCLK330_615,0x00,0x00,0x68,1920,1440},/* 2d 1920x1440x85Hz */ +{Support16Bpp + SyncPN, RES1920x1440x100,VCLK388_631,0x00,0x00,0x68,1920,1440},/* 2e 1920x1440x100Hz */ +{Support32Bpp + SupportLCD + SyncPN, RES2048x1536x60, VCLK266_952,0x00,0x00,0x6c,2048,1536},/* 2f 2048x1536x60Hz */ +{Support32Bpp + SyncPN, RES2048x1536x65, VCLK291_766,0x00,0x00,0x6c,2048,1536},/* 30 2048x1536x65Hz */ +{Support32Bpp + SyncPN, RES2048x1536x70, VCLK315_195,0x00,0x00,0x6c,2048,1536},/* 31 2048x1536x70Hz */ +{Support32Bpp + SyncPN, RES2048x1536x75, VCLK340_477,0x00,0x00,0x6c,2048,1536},/* 32 2048x1536x75Hz */ +{Support16Bpp + SyncPN, RES2048x1536x85, VCLK375_847,0x00,0x00,0x6c,2048,1536},/* 33 2048x1536x85Hz */ +{Support32Bpp + SupportHiVisionTV + SupportRAMDAC2 + SyncPP + SupportYPbPr, RES800x480x60, VCLK39_77, 0x08,0x00,0x70, 800, 480},/* 34 800x480x60Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPP, RES800x480x75, VCLK49_5, 0x08,0x00,0x70, 800, 480},/* 35 800x480x75Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPP, RES800x480x85, VCLK56_25, 0x08,0x00,0x70, 800, 480},/* 36 800x480x85Hz */ +{Support32Bpp + SupportHiVisionTV + SupportRAMDAC2 + SyncPP + SupportYPbPr, RES1024x576x60, VCLK65, 0x09,0x00,0x71,1024, 576},/* 37 1024x576x60Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPP, RES1024x576x75, VCLK78_75, 0x09,0x00,0x71,1024, 576},/* 38 1024x576x75Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPP, RES1024x576x85, VCLK94_5, 0x09,0x00,0x71,1024, 576},/* 39 1024x576x85Hz */ +{Support32Bpp + SupportHiVisionTV + SupportRAMDAC2 + SyncPP + SupportYPbPr, RES1280x720x60, VCLK108_2, 0x0A,0x00,0x75,1280, 720},/* 3a 1280x720x60Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPP, RES1280x720x75, VCLK135_5, 0x0A,0x00,0x75,1280, 720},/* 3b 1280x720x75Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPP, RES1280x720x85, VCLK157_5, 0x0A,0x00,0x75,1280, 720},/* 3c 1280x720x85Hz */ +{Support32Bpp + SupportTV + SyncNN, RES720x480x60, VCLK28_322, 0x06,0x00,0x31, 720, 480},/* 3d 720x480x60Hz */ +{Support32Bpp + SupportTV + SyncPP, RES720x576x56, VCLK36, 0x06,0x00,0x32, 720, 576},/* 3e 720x576x56Hz */ +{Support32Bpp + InterlaceMode + NoSupportLCD + SyncPP, RES856x480x79I, VCLK35_2, 0x00,0x00,0x00, 856, 480},/* 3f 856x480x79I */ +{Support32Bpp + NoSupportLCD + SyncNN, RES856x480x60, VCLK35_2, 0x00,0x00,0x00, 856, 480},/* 40 856x480x60Hz */ +{Support32Bpp + NoSupportHiVisionTV + SyncPP, RES1280x768x60, VCLK79_411, 0x08,0x48,0x23,1280, 768},/* 41 1280x768x60Hz */ +{Support32Bpp + NoSupportHiVisionTV + SyncPP, RES1400x1050x60, VCLK122_61, 0x08,0x69,0x26,1400,1050},/* 42 1400x1050x60Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPP, RES1152x864x60, VCLK80_350, 0x37,0x00,0x20,1152, 864},/* 43 1152x864x60Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPP, RES1152x864x75, VCLK107_385,0x37,0x00,0x20,1152, 864},/* 44 1152x864x75Hz */ +{Support32Bpp + SupportLCD + SupportRAMDAC2 + SyncPP, RES1280x960x75, VCLK125_999,0x3A,0x88,0x7b,1280, 960},/* 45 1280x960x75Hz */ +{Support32Bpp + SupportLCD + SupportRAMDAC2 + SyncPP, RES1280x960x85, VCLK148_5, 0x0A,0x88,0x7b,1280, 960},/* 46 1280x960x85Hz */ +{Support32Bpp + SupportLCD + SupportRAMDAC2 + SyncPP, RES1280x960x120, VCLK217_325,0x3A,0x88,0x7b,1280, 960},/* 47 1280x960x120Hz */ +{Support32Bpp + SupportRAMDAC2 + SyncPN, RES1024x768x160, VCLK139_054,0x30,0x47,0x37,1024, 768},/* 48 1024x768x160Hz */ +}; + +static XGI_MCLKDataStruct XGI330New_MCLKData[]= +{ + { 0x5c,0x23,0x01,166}, + { 0x5c,0x23,0x01,166}, + { 0x7C,0x08,0x80,200}, + { 0x79,0x06,0x80,250}, + { 0x29,0x01,0x81,300}, + { 0x29,0x01,0x81,300}, + { 0x29,0x01,0x81,300}, + { 0x29,0x01,0x81,300} +}; + +static XGI_MCLKDataStruct XGI340New_MCLKData[]= +{ + { 0x79,0x06,0x01,250}, + { 0x7c,0x08,0x01,200}, + { 0x7C,0x08,0x80,200}, + { 0x79,0x06,0x80,250}, + { 0x29,0x01,0x81,300}, + { 0x29,0x01,0x81,300}, + { 0x29,0x01,0x81,300}, + { 0x29,0x01,0x81,300} +}; + + + +#if 0 +static XGI330_VCLKDataStruct XGI330_VCLKData[]= +{ + { 0x1b,0xe1, 25}, /* 0x0 */ + { 0x4e,0xe4, 28}, /* 0x1 */ + { 0x57,0xe4, 31}, /* 0x2 */ + { 0xc3,0xc8, 36}, /* 0x3 */ + { 0x42,0xe2, 40}, /* 0x4 */ + { 0xfe,0xcd, 43}, /* 0x5 */ + { 0x5d,0xc4, 44}, /* 0x6 */ + { 0x52,0xe2, 49}, /* 0x7 */ + { 0x53,0xe2, 50}, /* 0x8 */ + { 0x74,0x67, 52}, /* 0x9 */ + { 0x6d,0x66, 56}, /* 0xa */ + { 0x6c,0xc3, 65}, /* 0xb */ + { 0x46,0x44, 67}, /* 0xc */ + { 0xb1,0x46, 68}, /* 0xd */ + { 0xd3,0x4a, 72}, /* 0xe */ + { 0x29,0x61, 75}, /* 0xf */ + { 0x6e,0x46, 76}, /* 0x10 */ + { 0x2b,0x61, 78}, /* 0x11 */ + { 0x31,0x42, 79}, /* 0x12 */ + { 0xab,0x44, 83}, /* 0x13 */ + { 0x46,0x25, 84}, /* 0x14 */ + { 0x78,0x29, 86}, /* 0x15 */ + { 0x62,0x44, 94}, /* 0x16 */ + { 0x2b,0x41,104}, /* 0x17 */ + { 0x3a,0x23,105}, /* 0x18 */ + { 0x70,0x44,108}, /* 0x19 */ + { 0x3c,0x23,109}, /* 0x1a */ + { 0x5e,0x43,113}, /* 0x1b */ + { 0xbc,0x44,116}, /* 0x1c */ + { 0xe0,0x46,132}, /* 0x1d */ + { 0x54,0x42,135}, /* 0x1e */ + { 0xea,0x2a,139}, /* 0x1f */ + { 0x41,0x22,157}, /* 0x20 */ + { 0x70,0x24,162}, /* 0x21 */ + { 0x30,0x21,175}, /* 0x22 */ + { 0x4e,0x22,189}, /* 0x23 */ + { 0xde,0x26,194}, /* 0x24 */ + { 0x62,0x06,202}, /* 0x25 */ + { 0x3f,0x03,229}, /* 0x26 */ + { 0xb8,0x06,234}, /* 0x27 */ + { 0x34,0x02,253}, /* 0x28 */ + { 0x58,0x04,255}, /* 0x29 */ + { 0x24,0x01,265}, /* 0x2a */ + { 0x9b,0x02,267}, /* 0x2b */ + { 0x70,0x05,270}, /* 0x2c */ + { 0x25,0x01,272}, /* 0x2d */ + { 0x9c,0x02,277}, /* 0x2e */ + { 0x27,0x01,286}, /* 0x2f */ + { 0x3c,0x02,291}, /* 0x30 */ + { 0xef,0x0a,292}, /* 0x31 */ + { 0xf6,0x0a,310}, /* 0x32 */ + { 0x95,0x01,315}, /* 0x33 */ + { 0xf0,0x09,324}, /* 0x34 */ + { 0xfe,0x0a,331}, /* 0x35 */ + { 0xf3,0x09,332}, /* 0x36 */ + { 0xea,0x08,340}, /* 0x37 */ + { 0xe8,0x07,376}, /* 0x38 */ + { 0xde,0x06,389}, /* 0x39 */ + { 0x52,0x2a, 54}, /* 0x3a */ + { 0x52,0x6a, 27}, /* 0x3b */ + { 0x62,0x24, 70}, /* 0x3c */ + { 0x62,0x64, 70}, /* 0x3d */ + { 0xa8,0x4c, 30}, /* 0x3e */ + { 0x20,0x26, 33}, /* 0x3f */ + { 0x31,0xc2, 39}, /* 0x40 */ + { 0x60,0x36, 30}, /* 0x41 */ + { 0x40,0x4A, 28}, /* 0x42 */ + { 0x9F,0x46, 44}, /* 0x43 */ + { 0x97,0x2C, 26}, /* 0x44 */ + { 0x44,0xE4, 25}, /* 0x45 */ + { 0x7E,0x32, 47}, /* 0x46 */ + { 0x08,0x24, 31}, /* 0x47 */ + { 0x97,0x2c, 26}, /* 0x48 */ + { 0xCE,0x3c, 39}, /* 0x49 */ + { 0x52,0x4A, 36}, /* 0x4a */ + { 0x2C,0x61, 95}, /* 0x4b */ + { 0x78,0x27,108}, /* 0x4c */ + { 0x66,0x43,123}, /* 0x4d */ + { 0x2c,0x61, 80}, /* 0x4e */ + { 0x3b,0x61,108} /* 0x4f */ +}; + +static XGI_VBVCLKDataStruct XGI330_VBVCLKData[]= +{ + { 0x1b,0xe1, 25}, /* 0x0 */ + { 0x4e,0xe4, 28}, /* 0x1 */ + { 0x57,0xe4, 31}, /* 0x2 */ + { 0xc3,0xc8, 36}, /* 0x3 */ + { 0x42,0x47, 40}, /* 0x4 */ + { 0xfe,0xcd, 43}, /* 0x5 */ + { 0x5d,0xc4, 44}, /* 0x6 */ + { 0x52,0x47, 49}, /* 0x7 */ + { 0x53,0x47, 50}, /* 0x8 */ + { 0x74,0x67, 52}, /* 0x9 */ + { 0x6d,0x66, 56}, /* 0xa */ + { 0x5a,0x64, 65}, /* 0xb */ + { 0x46,0x44, 67}, /* 0xc */ + { 0xb1,0x46, 68}, /* 0xd */ + { 0xd3,0x4a, 72}, /* 0xe */ + { 0x29,0x61, 75}, /* 0xf */ + { 0x6d,0x46, 75}, /* 0x10 */ + { 0x41,0x43, 78}, /* 0x11 */ + { 0x31,0x42, 79}, /* 0x12 */ + { 0xab,0x44, 83}, /* 0x13 */ + { 0x46,0x25, 84}, /* 0x14 */ + { 0x78,0x29, 86}, /* 0x15 */ + { 0x62,0x44, 94}, /* 0x16 */ + { 0x2b,0x22,104}, /* 0x17 */ + { 0x49,0x24,105}, /* 0x18 */ + { 0xf8,0x2f,108}, /* 0x19 */ + { 0x3c,0x23,109}, /* 0x1a */ + { 0x5e,0x43,113}, /* 0x1b */ + { 0xbc,0x44,116}, /* 0x1c */ + { 0xe0,0x46,132}, /* 0x1d */ + { 0xd4,0x28,135}, /* 0x1e */ + { 0xea,0x2a,139}, /* 0x1f */ + { 0x41,0x22,157}, /* 0x20 */ + { 0x70,0x24,162}, /* 0x21 */ + { 0x30,0x21,175}, /* 0x22 */ + { 0x4e,0x22,189}, /* 0x23 */ + { 0xde,0x26,194}, /* 0x24 */ + { 0x70,0x07,202}, /* 0x25 */ + { 0x3f,0x03,229}, /* 0x26 */ + { 0xb8,0x06,234}, /* 0x27 */ + { 0x34,0x02,253}, /* 0x28 */ + { 0x58,0x04,255}, /* 0x29 */ + { 0x24,0x01,265}, /* 0x2a */ + { 0x9b,0x02,267}, /* 0x2b */ + { 0x70,0x05,270}, /* 0x2c */ + { 0x25,0x01,272}, /* 0x2d */ + { 0x9c,0x02,277}, /* 0x2e */ + { 0x27,0x01,286}, /* 0x2f */ + { 0x3c,0x02,291}, /* 0x30 */ + { 0xef,0x0a,292}, /* 0x31 */ + { 0xf6,0x0a,310}, /* 0x32 */ + { 0x95,0x01,315}, /* 0x33 */ + { 0xf0,0x09,324}, /* 0x34 */ + { 0xfe,0x0a,331}, /* 0x35 */ + { 0xf3,0x09,332}, /* 0x36 */ + { 0xea,0x08,340}, /* 0x37 */ + { 0xe8,0x07,376}, /* 0x38 */ + { 0xde,0x06,389}, /* 0x39 */ + { 0x52,0x2a, 54}, /* 0x3a */ + { 0x52,0x6a, 27}, /* 0x3b */ + { 0x62,0x24, 70}, /* 0x3c */ + { 0x62,0x64, 70}, /* 0x3d */ + { 0xa8,0x4c, 30}, /* 0x3e */ + { 0x20,0x26, 33}, /* 0x3f */ + { 0x31,0xc2, 39}, /* 0x40 */ + { 0x2e,0x48, 25}, /* 0x41 */ + { 0x24,0x46, 25}, /* 0x42 */ + { 0x26,0x64, 28}, /* 0x43 */ + { 0x37,0x64, 40}, /* 0x44 */ + { 0xa1,0x42,108}, /* 0x45 */ + { 0x37,0x61,100}, /* 0x46 */ + { 0x78,0x27,108}, /* 0x47 */ + { 0x5e,0x64,68}, /* 0x48 chiawen for fuj1280x768*/ + { 0x70,0x44,108}, /* 0x49 chiawen for 1400x1050*/ +}; +#endif + +static UCHAR XGI330_ScreenOffset[]={ 0x14,0x19,0x20,0x28,0x32,0x40,0x50,0x64,0x78,0x80,0x2d,0x35,0x57,0x48 }; + +static XGI_StResInfoStruct XGI330_StResInfo[]= +{ + { 640,400}, + { 640,350}, + { 720,400}, + { 720,350}, + { 640,480} +}; + +static XGI_ModeResInfoStruct XGI330_ModeResInfo[]= +{ + { 320, 200, 8, 8}, + { 320, 240, 8, 8}, + { 320, 400, 8, 8}, + { 400, 300, 8, 8}, + { 512, 384, 8, 8}, + { 640, 400, 8,16}, + { 640, 480, 8,16}, + { 800, 600, 8,16}, + { 1024, 768, 8,16}, + { 1280,1024, 8,16}, + { 1600,1200, 8,16}, + { 1920,1440, 8,16}, + { 2048,1536, 8,16}, + { 720, 480, 8,16}, + { 720, 576, 8,16}, + { 1280, 960, 8,16}, + { 800, 480, 8,16}, + { 1024, 576, 8,16}, + { 1280, 720, 8,16}, + { 856, 480, 8,16}, + { 1280, 768, 8,16}, + { 1400,1050, 8,16}, + { 1152, 864, 8,16} +}; + +static UCHAR XGI330_OutputSelect =0x40; +static UCHAR XGI330_SoftSetting = 0x30; +static UCHAR XGI330_SR07=0x18; +#if 0 +static UCHAR XGI330New_SR15[8][8]={ +{0x0,0x4,0x60,0x60}, +{0xf,0xf,0xf,0xf}, +{0xba,0xba,0xba,0xba}, +{0xa9,0xa9,0xac,0xac}, +{0xa0,0xa0,0xa0,0xa8}, +{0x0,0x0,0x2,0x2}, +{0x30,0x30,0x40,0x40}, +{0x0,0xa5,0xfb,0xf6} +}; + +static UCHAR XGI330New_CR40[5][8]={ +{0x77,0x77,0x44,0x44}, +{0x77,0x77,0x44,0x44}, +{0x0,0x0,0x0,0x0}, +{0x5b,0x5b,0xab,0xab}, +{0x0,0x0,0xf0,0xf8} +}; +#endif + +static UCHAR XGI330_CR49[]={0xaa,0x88}; +static UCHAR XGI330_SR1F=0x0; +static UCHAR XGI330_SR21=0xa5; +#if 0 +static UCHAR XGI330_650_SR21=0xa7; +#endif +static UCHAR XGI330_SR22=0xfb; +static UCHAR XGI330_SR23=0xf6; +static UCHAR XGI330_SR24=0xd; + +#if 0 +static UCHAR XGI660_SR21=0xa3;/* 2003.0312 */ +static UCHAR XGI660_SR22=0xf3;/* 2003.0312 */ +#endif +static UCHAR XGI330_SR33=0x00; +#if 0 +static UCHAR XGI330_LVDS_SR32=0x00; /* ynlai for 650 LVDS */ +static UCHAR XGI330_LVDS_SR33=0x00; /* chiawen for 650 LVDS */ +static UCHAR XGI330_650_SR31=0x40; +static UCHAR XGI330_650_SR33=0x04; +#endif +static UCHAR XGI330_CRT2Data_1_2 = 0x0; +static UCHAR XGI330_CRT2Data_4_D = 0x0; +static UCHAR XGI330_CRT2Data_4_E = 0x0; +static UCHAR XGI330_CRT2Data_4_10 = 0x80; +static USHORT XGI330_RGBSenseData = 0xd1; +static USHORT XGI330_VideoSenseData = 0xb9; +static USHORT XGI330_YCSenseData = 0xb3; +static USHORT XGI330_RGBSenseData2 = 0x0190; /*301b*/ +static USHORT XGI330_VideoSenseData2 = 0x0110; +static USHORT XGI330_YCSenseData2 = 0x016B; +#if 0 +static UCHAR XGI330_NTSCPhase[] = {0x21,0xed,0x8a,0x8}; +static UCHAR XGI330_PALPhase[] = {0x2a,0x5,0xd3,0x0}; +static UCHAR XGI330_NTSCPhase2[] = {0x21,0xF0,0x7B,0xD6};/*301b*/ +static UCHAR XGI330_PALPhase2[] = {0x2a,0x09,0x86,0xe9}; +static UCHAR XGI330_PALMPhase[] = {0x21,0xE4,0x2E,0x9B}; /*palmn*/ +static UCHAR XGI330_PALNPhase[] = {0x21,0xF4,0x3E,0xBA}; +#endif +static UCHAR XG40_I2CDefinition = 0x00 ; +static UCHAR XG20_CR97 = 0x10 ; + +static UCHAR XGI330_CHTVVCLKUNTSC[]={0x00 }; + +static UCHAR XGI330_CHTVVCLKONTSC[]={0x00 }; + +static UCHAR XGI330_CHTVVCLKUPAL[]={0x00 }; + +static UCHAR XGI330_CHTVVCLKOPAL[]={0x00 }; + +static XGI330_VCLKDataStruct XGI_VCLKData[]= +{ + /* SR2B,SR2C,SR2D */ + { 0x1B,0xE1,25 },/* 00 (25.175MHz) */ + + { 0x4E,0xE4,28 },/* 01 (28.322MHz) */ + + { 0x57,0xE4,31 },/* 02 (31.500MHz) */ + + { 0xC3,0xC8,36 },/* 03 (36.000MHz) */ + + { 0x42,0xE2,40 },/* 04 (40.000MHz) */ + + { 0xFE,0xCD,43 },/* 05 (43.163MHz) */ + + { 0x5D,0xC4,44 },/* 06 (44.900MHz) */ + + { 0x52,0xE2,49 },/* 07 (49.500MHz) */ + + { 0x53,0xE2,50 },/* 08 (50.000MHz) */ + + { 0x74,0x67,52 },/* 09 (52.406MHz) */ + + { 0x6D,0x66,56 },/* 0A (56.250MHz) */ + + { 0x6C,0xC3,65 },/* 0B (65.000MHz) */ + + { 0x46,0x44,67 },/* 0C (67.765MHz) */ + + { 0xB1,0x46,68 },/* 0D (68.179MHz) */ + + { 0xD3,0x4A,72 },/* 0E (72.852MHz) */ + + { 0x29,0x61,75 },/* 0F (75.000MHz) */ + + { 0x6E,0x46,76 },/* 10 (75.800MHz) */ + + { 0x2B,0x61,78 },/* 11 (78.750MHz) */ + + { 0x31,0x42,79 },/* 12 (79.411MHz) */ + + { 0xAB,0x44,83 },/* 13 (83.950MHz) */ + + { 0x46,0x25,84 },/* 14 (84.800MHz) */ + + { 0x78,0x29,86 },/* 15 (86.600MHz) */ + + { 0x62,0x44,94 },/* 16 (94.500MHz) */ + + { 0x2B,0x41,104 },/* 17 (104.998MHz) */ + + { 0x3A,0x23,105 },/* 18 (105.882MHz) */ + + { 0x70,0x44,108 },/* 19 (107.862MHz) */ + + { 0x3C,0x23,109 },/* 1A (109.175MHz) */ + + { 0x5E,0x43,113 },/* 1B (113.309MHz) */ + + { 0xBC,0x44,116 },/* 1C (116.406MHz) */ + + { 0xE0,0x46,132 },/* 1D (132.258MHz) */ + + { 0x54,0x42,135 },/* 1E (135.500MHz) */ + + { 0x9C,0x22,139 },/* 1F (139.275MHz) */ + + { 0x41,0x22,157 },/* 20 (157.500MHz) */ + + { 0x70,0x24,162 },/* 21 (161.793MHz) */ + + { 0x30,0x21,175 },/* 22 (175.000MHz) */ + + { 0x4E,0x22,189 },/* 23 (188.520MHz) */ + + { 0xDE,0x26,194 },/* 24 (194.400MHz) */ + + { 0x62,0x06,202 },/* 25 (202.500MHz) */ + + { 0x3F,0x03,229 },/* 26 (229.500MHz) */ + + { 0xB8,0x06,234 },/* 27 (233.178MHz) */ + + { 0x34,0x02,253 },/* 28 (252.699MHz) */ + + { 0x58,0x04,255 },/* 29 (254.817MHz) */ + + { 0x24,0x01,265 },/* 2A (265.728MHz) */ + + { 0x9B,0x02,267 },/* 2B (266.952MHz) */ + + { 0x70,0x05,270 },/* 2C (269.65567MHz) */ + + { 0x25,0x01,272 },/* 2D (272.04199MHz) */ + + { 0x9C,0x02,277 },/* 2E (277.015MHz) */ + + { 0x27,0x01,286 },/* 2F (286.359985MHz) */ + + { 0xB3,0x04,291 },/* 30 (291.13266MHz) */ + + { 0xBC,0x05,292 },/* 31 (291.766MHz) */ + + { 0xF6,0x0A,310 },/* 32 (309.789459MHz) */ + + { 0x95,0x01,315 },/* 33 (315.195MHz) */ + + { 0xF0,0x09,324 },/* 34 (323.586792MHz) */ + + { 0xFE,0x0A,331 },/* 35 (330.615631MHz) */ + + { 0xF3,0x09,332 },/* 36 (332.177612MHz) */ + + { 0x5E,0x03,340 },/* 37 (340.477MHz) */ + + { 0xE8,0x07,376 },/* 38 (375.847504MHz) */ + + { 0xDE, 0x06,389 },/* 39 (388.631439MHz) */ + + { 0x52,0x2A,54 },/* 3A (54.000MHz) */ + + { 0x52,0x6A,27 },/* 3B (27.000MHz) */ + + { 0x62,0x24,70 },/* 3C (70.874991MHz) */ + + { 0x62,0x64,70 },/* 3D (70.1048912MHz) */ + + { 0xA8,0x4C,30 },/* 3E (30.1048912MHz) */ + + { 0x20,0x26,33 },/* 3F (33.7499957MHz) */ + + { 0x31,0xc2,39 },/* 40 (39.77MHz) */ + + { 0x11,0x21,30 },/* 41 (30MHz) }// NTSC 1024X768 */ + + { 0x2E,0x48,25 },/* 42 (25.175MHz) }// ScaleLCD */ + + { 0x24,0x46,25 },/* 43 (25.175MHz) */ + + { 0x26,0x64,28 },/* 44 (28.322MHz) */ + + { 0x37,0x64,40 },/* 45 (40.000MHz) */ + + { 0xA1,0x42,108 },/* 46 (95.000MHz) }// QVGA */ + + { 0x37,0x61,100 },/* 47 (100.00MHz) */ + + { 0x78,0x27,108 },/* 48 (108.200MHz) */ + + { 0xBF,0xC8,35 },/* 49 (35.2MHz) */ + + { 0x66,0x43,123 },/* 4A (122.61Mhz) */ + + { 0x2C,0x61,80 },/* 4B (80.350Mhz) */ + + { 0x3B,0x61,108 },/* 4C (107.385Mhz) */ + + +/* { 0x60,0x36,30 },// 4D (30.200MHz) }// No use + + { 0x60,0x36,30 },// 4E (30.200MHz) }// No use + + { 0x60,0x36,30 },// 4F (30.200MHz) }// No use + + { 0x60,0x36,30 },// 50 (30.200MHz) }// CHTV + + { 0x40,0x4A,28 },// 51 (28.190MHz) + + { 0x9F,0x46,44 },// 52 (43.600MHz) + + { 0x97,0x2C,26 },// 53 (26.400MHz) + + { 0x44,0xE4,25 },// 54 (24.600MHz) + + { 0x7E,0x32,47 },// 55 (47.832MHz) + + { 0x8A,0x24,31 },// 56 (31.500MHz) + + { 0x97,0x2C,26 },// 57 (26.200MHz) + + { 0xCE,0x3C,39 },// 58 (39.000MHz) + + { 0x52,0x4A,36 },// 59 (36.000MHz) + +*/ + { 0x69,0x61,191 }, /* 4D (190.96MHz ) */ + { 0x4F,0x22,192 }, /* 4E (192.069MHz) */ + { 0x28,0x26,322 }, /* 4F (322.273MHz) */ + { 0x5C,0x6B,27 }, /* 50 (27.74HMz) */ + { 0x57,0x24,126 }, /* 51 (125.999MHz) */ + { 0x5C,0x42,148 }, /* 52 (148.5MHz) */ + { 0x42,0x61,120 }, /* 53 (120.839MHz) */ + { 0x62,0x61,178 }, /* 54 (178.992MHz) */ + { 0x59,0x22,217 }, /* 55 (217.325MHz) */ + { 0x29,0x01,300 }, /* 56 (299.505Mhz) */ + { 0x52,0x63,74 }, /* 57 (74.25MHz) */ + + + { 0xFF,0x00,0 }/* End mark */ + } ; + +static XGI330_VCLKDataStruct XGI_VBVCLKData[]= +{ + { 0x1B,0xE1,25 },/* 00 (25.175MHz) */ + + { 0x4E,0xE4,28 },/* 01 (28.322MHz) */ + + { 0x57,0xE4,31 },/* 02 (31.500MHz) */ + + { 0xC3,0xC8,36 },/* 03 (36.000MHz) */ + + { 0x42,0x47,40 },/* 04 (40.000MHz) */ + + { 0xFE,0xCD,43 },/* 05 (43.163MHz) */ + + { 0x5D,0xC4,44 },/* 06 (44.900MHz) */ + + { 0x52,0x47,49 },/* 07 (49.500MHz) */ + + { 0x53,0x47,50 },/* 08 (50.000MHz) */ + + { 0x74,0x67,52 },/* 09 (52.406MHz) */ + + { 0x6D,0x66,56 },/* 0A (56.250MHz) */ + + { 0x35,0x62,65 },/* 0B (65.000MHz) */ + + { 0x46,0x44,67 },/* 0C (67.765MHz) */ + + { 0xB1,0x46,68 },/* 0D (68.179MHz) */ + + { 0xD3,0x4A,72 },/* 0E (72.852MHz) */ + + { 0x29,0x61,75 },/* 0F (75.000MHz) */ + + { 0x6D,0x46,75 },/* 10 (75.800MHz) */ + + { 0x41,0x43,78 },/* 11 (78.750MHz) */ + + { 0x31,0x42,79 },/* 12 (79.411MHz) */ + + { 0xAB,0x44,83 },/* 13 (83.950MHz) */ + + { 0x46,0x25,84 },/* 14 (84.800MHz) */ + + { 0x78,0x29,86 },/* 15 (86.600MHz) */ + + { 0x62,0x44,94 },/* 16 (94.500MHz) */ + + { 0x2B,0x22,104 },/* 17 (104.998MHz) */ + + { 0x49,0x24,105 },/* 18 (105.882MHz) */ + + { 0xF8,0x2F,108 },/* 19 (108.279MHz) */ + + { 0x3C,0x23,109 },/* 1A (109.175MHz) */ + + { 0x5E,0x43,113 },/* 1B (113.309MHz) */ + + { 0xBC,0x44,116 },/* 1C (116.406MHz) */ + + { 0xE0,0x46,132 },/* 1D (132.258MHz) */ + + { 0xD4,0x28,135 },/* 1E (135.220MHz) */ + + { 0xEA,0x2A,139 },/* 1F (139.275MHz) */ + + { 0x41,0x22,157 },/* 20 (157.500MHz) */ + + { 0x70,0x24,162 },/* 21 (161.793MHz) */ + + { 0x30,0x21,175 },/* 22 (175.000MHz) */ + + { 0x4E,0x22,189 },/* 23 (188.520MHz) */ + + { 0xDE,0x26,194 },/* 24 (194.400MHz) */ + + { 0x70,0x07,202 },/* 25 (202.500MHz) */ + + { 0x3F,0x03,229 },/* 26 (229.500MHz) */ + + { 0xB8,0x06,234 },/* 27 (233.178MHz) */ + + { 0x34,0x02,253 },/* 28 (252.699997 MHz) */ + + { 0x58,0x04,255 },/* 29 (254.817MHz) */ + + { 0x24,0x01,265 },/* 2A (265.728MHz) */ + + { 0x9B,0x02,267 },/* 2B (266.952MHz) */ + + { 0x70,0x05,270 },/* 2C (269.65567 MHz) */ + + { 0x25,0x01,272 },/* 2D (272.041992 MHz) */ + + { 0x9C,0x02,277 },/* 2E (277.015MHz) */ + + { 0x27,0x01,286 },/* 2F (286.359985 MHz) */ + + { 0x3C,0x02,291 },/* 30 (291.132660 MHz) */ + + { 0xEF,0x0A,292 },/* 31 (291.766MHz) */ + + { 0xF6,0x0A,310 },/* 32 (309.789459 MHz) */ + + { 0x95,0x01,315 },/* 33 (315.195MHz) */ + + { 0xF0,0x09,324 },/* 34 (323.586792 MHz) */ + + { 0xFE,0x0A,331 },/* 35 (330.615631 MHz) */ + + { 0xF3,0x09,332 },/* 36 (332.177612 MHz) */ + + { 0xEA,0x08,340 },/* 37 (340.477MHz) */ + + { 0xE8,0x07,376 },/* 38 (375.847504 MHz) */ + + { 0xDE,0x06,389 },/* 39 (388.631439 MHz) */ + + { 0x52,0x2A,54 },/* 3A (54.000MHz) */ + + { 0x52,0x6A,27 },/* 3B (27.000MHz) */ + + + { 0x62,0x24,70 },/* 3C (70.874991MHz) */ + + + { 0x62,0x64,70 },/* 3D (70.1048912MHz) */ + + { 0xA8,0x4C,30 },/* 3E (30.1048912MHz) */ + + { 0x20,0x26,33 },/* 3F (33.7499957MHz) */ + + { 0x31,0xc2,39 },/* 40 (39.77MHz) */ + + { 0x11,0x21,30 },/* 41 (30MHz) }// NTSC 1024X768 */ + + { 0x2E,0x48,25 },/* 42 (25.175MHz) }// ScaleLCD */ + + { 0x24,0x46,25 },/* 43 (25.175MHz) */ + + { 0x26,0x64,28 },/* 44 (28.322MHz) */ + + { 0x37,0x64,40 },/* 45 (40.000MHz) */ + + { 0xA1,0x42,108 },/* 46 (95.000MHz) }// QVGA */ + + { 0x37,0x61,100 },/* 47 (100.00MHz) */ + + { 0x78,0x27,108 },/* 48 (108.200MHz) */ + + { 0xBF,0xC8,35 },/* 49 (35.2MHz) */ + + { 0x66,0x43,123 },/* 4A (122.61Mhz) */ + + { 0x2C,0x61,80 },/* 4B (80.350Mhz) */ + + { 0x3B,0x61,108 },/* 4C (107.385Mhz) */ + +/* + { 0x60,0x36,30 },// 4D (30.200MHz) }// No use + + { 0x60,0x36,30 },// 4E (30.200MHz) }// No use + + { 0x60,0x36,30 },// 4F (30.200MHz) }// No use + + { 0x60,0x36,30 },// 50 (30.200MHz) }// CHTV + + { 0x40,0x4A,28 },// 51 (28.190MHz) + + { 0x9F,0x46,44 },// 52 (43.600MHz) + + { 0x97,0x2C,26 },// 53 (26.400MHz) + + { 0x44,0xE4,25 },// 54 (24.600MHz) + + { 0x7E,0x32,47 },// 55 (47.832MHz) + + { 0x8A,0x24,31 },// 56 (31.500MHz) + + { 0x97,0x2C,26 },// 57 (26.200MHz) + + { 0xCE,0x3C,39 },// 58 (39.000MHz) + + { 0x52,0x4A,36 },// 59 (36.000MHz) +*/ + { 0x69,0x61,191 }, /* 4D (190.96MHz ) */ + { 0x4F,0x22,192 }, /* 4E (192.069MHz) */ + { 0x28,0x26,322 }, /* 4F (322.273MHz) */ + { 0x5C,0x6B,27 }, /* 50 (27.74HMz) */ + { 0x57,0x24,126 }, /* 51 (125.999MHz) */ + { 0x5C,0x42,148 }, /* 52 (148.5MHz) */ + { 0x42,0x61,120 }, /* 53 (120.839MHz) */ + { 0x62,0x61,178 }, /* 54 (178.992MHz) */ + { 0x59,0x22,217 }, /* 55 (217.325MHz) */ + { 0x29,0x01,300 }, /* 56 (299.505Mhz) */ + { 0x52,0x63,74 }, /* 57 (74.25MHz) */ + + + { 0xFF,0x00,0 } /* End mark */ +}; + +#if 0 +static UCHAR XGI660_TVDelayList[]= +{ + 0x44, /* ; 0 ExtNTSCDelay */ + 0x44, /* ; 1 StNTSCDelay */ + 0x44, /* ; 2 ExtPALDelay */ + 0x44, /* ; 3 StPALDelay */ + 0x44, /* ; 4 ExtHiTVDelay(1080i) */ + 0x44, /* ; 5 StHiTVDelay(1080i) */ + 0x44, /* ; 6 ExtYPbPrDelay(525i) */ + 0x44, /* ; 7 StYPbPrDealy(525i) */ + 0x44, /* ; 8 ExtYPbPrDelay(525p) */ + 0x44, /* ; 9 StYPbPrDealy(525p) */ + 0x44, /* ; A ExtYPbPrDelay(750p) */ + 0x44 /* ; B StYPbPrDealy(750p) */ +}; + +static UCHAR XGI660_TVDelayList2[]= +{ + 0x44, /* ; 0 ExtNTSCDelay */ + 0x44, /* ; 1 StNTSCDelay */ + 0x44, /* ; 2 ExtPALDelay */ + 0x44, /* ; 3 StPALDelay */ + 0x44, /* ; 4 ExtHiTVDelay */ + 0x44, /* ; 5 StHiTVDelay */ + 0x44, /* ; 6 ExtYPbPrDelay(525i) */ + 0x44, /* ; 7 StYPbPrDealy(525i) */ + 0x44, /* ; 8 ExtYPbPrDelay(525p) */ + 0x44, /* ; 9 StYPbPrDealy(525p) */ + 0x44, /* ; A ExtYPbPrDelay(750p) */ + 0x44 /* ; B StYPbPrDealy(750p) */ +}; +#endif + +static UCHAR XGI301TVDelayList[]= +{ + 0x22, /* ; 0 ExtNTSCDelay */ + 0x22, /* ; 1 StNTSCDelay */ + 0x22, /* ; 2 ExtPALDelay */ + 0x22, /* ; 3 StPALDelay */ + 0x88, /* ; 4 ExtHiTVDelay(1080i) */ + 0xBB, /* ; 5 StHiTVDelay(1080i) */ + 0x22, /* ; 6 ExtYPbPrDelay(525i) */ + 0x22, /* ; 7 StYPbPrDealy(525i) */ + 0x22, /* ; 8 ExtYPbPrDelay(525p) */ + 0x22, /* ; 9 StYPbPrDealy(525p) */ + 0x22, /* ; A ExtYPbPrDelay(750p) */ + 0x22 /* B StYPbPrDealy(750p) */ +}; + +static UCHAR XGI301TVDelayList2[]= +{ + 0x22, /* ; 0 ExtNTSCDelay */ + 0x22, /* ; 1 StNTSCDelay */ + 0x22, /* ; 2 ExtPALDelay */ + 0x22, /* ; 3 StPALDelay */ + 0x22, /* ; 4 ExtHiTVDelay */ + 0x22, /* ; 5 StHiTVDelay */ + 0x22, /* ; 6 ExtYPbPrDelay(525i) */ + 0x22, /* ; 7 StYPbPrDealy(525i) */ + 0x22, /* ; 8 ExtYPbPrDelay(525p) */ + 0x22, /* ; 9 StYPbPrDealy(525p) */ + 0x22, /* ; A ExtYPbPrDelay(750p) */ + 0x22 /* ; B StYPbPrDealy(750p) */ +}; + + +static UCHAR TVAntiFlickList[]= +{/* NTSCAntiFlicker */ + 0x04, /* ; 0 Adaptive */ + 0x00, /* ; 1 new anti-flicker ? */ +/* PALAntiFlicker */ + 0x04, /* ; 0 Adaptive */ + 0x08, /* ; 1 new anti-flicker ? */ +/* HiTVAntiFlicker */ + 0x04, /* ; 0 ? */ + 0x00 /* ; 1 new anti-flicker ? */ +}; + + +static UCHAR TVEdgeList[]= +{ + 0x00, /* ; 0 NTSC No Edge enhance */ + 0x04, /* ; 1 NTSC Adaptive Edge enhance */ + 0x00, /* ; 0 PAL No Edge enhance */ + 0x04, /* ; 1 PAL Adaptive Edge enhance */ + 0x00, /* ; 0 HiTV */ + 0x00 /* ; 1 HiTV */ +}; + +static ULONG TVPhaseList[]= +{ 0x08BAED21, /* ; 0 NTSC phase */ + 0x00E3052A, /* ; 1 PAL phase */ + 0x9B2EE421, /* ; 2 PAL-M phase */ + 0xBA3EF421, /* ; 3 PAL-N phase */ + 0xA7A28B1E, /* ; 4 NTSC 1024x768 */ + 0xE00A831E, /* ; 5 PAL-M 1024x768 */ + 0x00000000, /* ; 6 reserved */ + 0x00000000, /* ; 7 reserved */ + 0xD67BF021, /* ; 8 NTSC phase */ + 0xE986092A, /* ; 9 PAL phase */ + 0xA4EFE621, /* ; A PAL-M phase */ + 0x4694F621, /* ; B PAL-N phase */ + 0x8BDE711C, /* ; C NTSC 1024x768 */ + 0xE00A831E /* ; D PAL-M 1024x768 */ +}; + +static UCHAR NTSCYFilter1[]= +{ + 0x00,0xF4,0x10,0x38 ,/* 0 : 320x text mode */ + 0x00,0xF4,0x10,0x38 ,/* 1 : 360x text mode */ + 0xEB,0x04,0x25,0x18 ,/* 2 : 640x text mode */ + 0xF1,0x04,0x1F,0x18 ,/* 3 : 720x text mode */ + 0x00,0xF4,0x10,0x38 ,/* 4 : 320x gra. mode */ + 0xEB,0x04,0x25,0x18 ,/* 5 : 640x gra. mode */ + 0xEB,0x15,0x25,0xF6 /* 6 : 800x gra. mode */ +}; + +static UCHAR PALYFilter1[]= +{ + 0x00,0xF4,0x10,0x38, /* 0 : 320x text mode */ + 0x00,0xF4,0x10,0x38 ,/* 1 : 360x text mode */ + 0xF1,0xF7,0x1F,0x32 ,/* 2 : 640x text mode */ + 0xF3,0x00,0x1D,0x20 ,/* 3 : 720x text mode */ + 0x00,0xF4,0x10,0x38 ,/* 4 : 320x gra. mode */ + 0xF1,0xF7,0x1F,0x32 ,/* 5 : 640x gra. mode */ + 0xFC,0xFB,0x14,0x2A /* 6 : 800x gra. mode */ +}; + +static UCHAR PALMYFilter1[]= +{ + 0x00,0xF4,0x10,0x38, /* 0 : 320x text mode */ + 0x00,0xF4,0x10,0x38, /* 1 : 360x text mode */ + 0xEB,0x04,0x10,0x18, /* 2 : 640x text mode */ + 0xF7,0x06,0x19,0x14, /* 3 : 720x text mode */ + 0x00,0xF4,0x10,0x38, /* 4 : 320x gra. mode */ + 0xEB,0x04,0x25,0x18, /* 5 : 640x gra. mode */ + 0xEB,0x15,0x25,0xF6, /* 6 : 800x gra. mode */ + 0xFF,0xFF,0xFF,0xFF /* End of Table */ +}; + +static UCHAR PALNYFilter1[]= +{ + 0x00,0xF4,0x10,0x38, /* 0 : 320x text mode */ + 0x00,0xF4,0x10,0x38, /* 1 : 360x text mode */ + 0xEB,0x04,0x10,0x18, /* 2 : 640x text mode */ + 0xF7,0x06,0x19,0x14, /* 3 : 720x text mode */ + 0x00,0xF4,0x10,0x38, /* 4 : 320x gra. mode */ + 0xEB,0x04,0x25,0x18, /* 5 : 640x gra. mode */ + 0xEB,0x15,0x25,0xF6, /* 6 : 800x gra. mode */ + 0xFF,0xFF,0xFF,0xFF /* End of Table */ +}; + +static UCHAR NTSCYFilter2[]= +{ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 0 : 320x text mode */ + 0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C, /* 1 : 360x text mode */ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 2 : 640x text mode */ + 0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C, /* 3 : 720x text mode */ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 4 : 320x gra. mode */ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 5 : 640x gra. mode */ + 0x01,0x01,0xFC,0xF8,0x08,0x26,0x38, /* 6 : 800x gra. mode */ + 0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28 /* 7 : 1024xgra. mode */ +}; + +static UCHAR PALYFilter2[]= +{ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 0 : 320x text mode */ + 0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C, /* 1 : 360x text mode */ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 2 : 640x text mode */ + 0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C, /* 3 : 720x text mode */ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 4 : 320x gra. mode */ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 5 : 640x gra. mode */ + 0x01,0x01,0xFC,0xF8,0x08,0x26,0x38, /* 6 : 800x gra. mode */ + 0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28 /* 7 : 1024xgra. mode */ +}; + +static UCHAR PALMYFilter2[]= +{ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 0 : 320x text mode */ + 0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C, /* 1 : 360x text mode */ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 2 : 640x text mode */ + 0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C, /* 3 : 720x text mode */ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 4 : 320x gra. mode */ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 5 : 640x gra. mode */ + 0x01,0x01,0xFC,0xF8,0x08,0x26,0x38, /* 6 : 800x gra. mode */ + 0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28 /* 7 : 1024xgra. mode */ +}; + +static UCHAR PALNYFilter2[]= +{ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 0 : 320x text mode */ + 0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C, /* 1 : 360x text mode */ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 2 : 640x text mode */ + 0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C, /* 3 : 720x text mode */ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 4 : 320x gra. mode */ + 0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46, /* 5 : 640x gra. mode */ + 0x01,0x01,0xFC,0xF8,0x08,0x26,0x38, /* 6 : 800x gra. mode */ + 0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28 /* 7 : 1024xgra. mode */ +}; + +static UCHAR XGI_NTSC1024AdjTime[]= +{ + 0xa7,0x07,0xf2,0x6e,0x17,0x8b,0x73,0x53, + 0x13,0x40,0x34,0xF4,0x63,0xBB,0xCC,0x7A, + 0x58,0xe4,0x73,0xd0,0x13 +}; + +static XGI301C_Tap4TimingStruct HiTVTap4Timing[]= +{ + {0,{ + 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F, /* ; C0-C7 */ + 0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, /* ; C8-CF */ + 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E, /* ; D0-D7 */ + 0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, /* ; D8-DF */ + 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C, /* ; E0-E7 */ + 0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, /* ; EA-EF */ + 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C, /* ; F0-F7 */ + 0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E /* ; F8-FF */ + } + } +}; + +static XGI301C_Tap4TimingStruct EnlargeTap4Timing[]= +{ + {0,{ + 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F, /* ; C0-C7 */ + 0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, /* ; C8-CF */ + 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E, /* ; D0-D7 */ + 0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, /* ; D8-DF */ + 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C, /* ; E0-E7 */ + 0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, /* ; EA-EF */ + 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C, /* ; F0-F7 */ + 0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E /* ; F8-FF */ + } + } +}; + +static XGI301C_Tap4TimingStruct NoScaleTap4Timing[]= +{ + {0,{ + 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F, /* ; C0-C7 */ + 0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, /* ; C8-CF */ + 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E, /* ; D0-D7 */ + 0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, /* ; D8-DF */ + 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C, /* ; E0-E7 */ + 0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, /* ; EA-EF */ + 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C, /* ; F0-F7 */ + 0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E /* ; F8-FF */ + } + } +}; + +static XGI301C_Tap4TimingStruct PALTap4Timing[]= +{ + {600, { + 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E, /* ; C0-C7 */ + 0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D, /* ; C8-CF */ + 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C, /* ; D0-D7 */ + 0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D, /* ; D8-DF */ + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E, /* ; E0-E7 */ + 0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E, /* ; EA-EF */ + 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01, /* ; F0-F7 */ + 0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04 /* ; F8-FF */ + } + }, + {768, { + 0x08,0x12,0x08,0x7E,0x07,0x12,0x09,0x7E, /* ; C0-C7 */ + 0x06,0x12,0x0A,0x7E,0x05,0x11,0x0B,0x7F, /* ; C8-CF */ + 0x04,0x11,0x0C,0x7F,0x03,0x11,0x0C,0x00, /* ; D0-D7 */ + 0x03,0x10,0x0D,0x00,0x02,0x0F,0x0E,0x01, /* ; D8-DF */ + 0x01,0x0F,0x0F,0x01,0x01,0x0E,0x0F,0x02, /* ; E0-E7 */ + 0x00,0x0D,0x10,0x03,0x7F,0x0C,0x11,0x04, /* ; EA-EF */ + 0x7F,0x0C,0x11,0x04,0x7F,0x0B,0x11,0x05, /* ; F0-F7 */ + 0x7E,0x0A,0x12,0x06,0x7E,0x09,0x12,0x07 /* ; F8-FF */ + } + }, + {0xFFFF, + { + 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E, /* ; C0-C7 */ + 0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D, /* ; C8-CF */ + 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D, /* ; D0-D7 */ + 0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C, /* ; D8-DF */ + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D, /* ; E0-E7 */ + 0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F, /* ; EA-EF */ + 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00, /* ; F0-F7 */ + 0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02 /* ; F8-FF */ + } + } +}; + +static XGI301C_Tap4TimingStruct NTSCTap4Timing[]= +{ + {480, { + 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D, /* ; C0-C7 */ + 0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D, /* ; C8-CF */ + 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C, /* ; D0-D7 */ + 0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C, /* ; D8-DF */ + 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D, /* ; E0-E7 */ + 0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E, /* ; EA-EF */ + 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00, /* ; F0-F7 */ + 0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02 /* ; F8-FF */ + } + }, + {600, { + 0x07,0x14,0x07,0x7E,0x06,0x14,0x09,0x7D, /* ; C0-C7 */ + 0x05,0x14,0x0A,0x7D,0x04,0x13,0x0B,0x7E, /* ; C8-CF */ + 0x03,0x13,0x0C,0x7E,0x02,0x12,0x0D,0x7F, /* ; D0-D7 */ + 0x01,0x12,0x0E,0x7F,0x01,0x11,0x0F,0x7F, /* ; D8-DF */ + 0x01,0x10,0x10,0x00,0x7F,0x0F,0x11,0x01, /* ; E0-E7 */ + 0x7F,0x0E,0x12,0x01,0x7E,0x0D,0x12,0x03, /* ; EA-EF */ + 0x7E,0x0C,0x13,0x03,0x7E,0x0B,0x13,0x04, /* ; F0-F7 */ + 0x7E,0x0A,0x14,0x04,0x7D,0x09,0x14,0x06 /* ; F8-FF */ + } + }, + {0xFFFF, + { + 0x09,0x0F,0x09,0x7F,0x08,0x0F,0x09,0x00, /* ; C0-C7 */ + 0x07,0x0F,0x0A,0x00,0x06,0x0F,0x0A,0x01, /* ; C8-CF */ + 0x06,0x0E,0x0B,0x01,0x05,0x0E,0x0B,0x02, /* ; D0-D7 */ + 0x04,0x0E,0x0C,0x02,0x04,0x0D,0x0C,0x03, /* ; D8-DF */ + 0x03,0x0D,0x0D,0x03,0x02,0x0C,0x0D,0x05, /* ; E0-E7 */ + 0x02,0x0C,0x0E,0x04,0x01,0x0B,0x0E,0x06, /* ; EA-EF */ + 0x01,0x0B,0x0E,0x06,0x00,0x0A,0x0F,0x07, /* ; F0-F7 */ + 0x00,0x0A,0x0F,0x07,0x00,0x09,0x0F,0x08 /* ; F8-FF */ + } + } +}; + +static XGI301C_Tap4TimingStruct YPbPr525pTap4Timing[]= +{ + {480, { + 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D, /* ; C0-C7 */ + 0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D, /* ; C8-CF */ + 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C, /* ; D0-D7 */ + 0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C, /* ; D8-DF */ + 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D, /* ; E0-E7 */ + 0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E, /* ; EA-EF */ + 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00, /* ; F0-F7 */ + 0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02 /* ; F8-FF */ + } + }, + {600, { + 0x07,0x14,0x07,0x7E,0x06,0x14,0x09,0x7D, /* ; C0-C7 */ + 0x05,0x14,0x0A,0x7D,0x04,0x13,0x0B,0x7E, /* ; C8-CF */ + 0x03,0x13,0x0C,0x7E,0x02,0x12,0x0D,0x7F, /* ; D0-D7 */ + 0x01,0x12,0x0E,0x7F,0x01,0x11,0x0F,0x7F, /* ; D8-DF */ + 0x01,0x10,0x10,0x00,0x7F,0x0F,0x11,0x01, /* ; E0-E7 */ + 0x7F,0x0E,0x12,0x01,0x7E,0x0D,0x12,0x03, /* ; EA-EF */ + 0x7E,0x0C,0x13,0x03,0x7E,0x0B,0x13,0x04, /* ; F0-F7 */ + 0x7E,0x0A,0x14,0x04,0x7D,0x09,0x14,0x06 /* ; F8-FF */ + } + }, + {0xFFFF, + { + 0x09,0x0F,0x09,0x7F,0x08,0x0F,0x09,0x00, /* ; C0-C7 */ + 0x07,0x0F,0x0A,0x00,0x06,0x0F,0x0A,0x01, /* ; C8-CF */ + 0x06,0x0E,0x0B,0x01,0x05,0x0E,0x0B,0x02, /* ; D0-D7 */ + 0x04,0x0E,0x0C,0x02,0x04,0x0D,0x0C,0x03, /* ; D8-DF */ + 0x03,0x0D,0x0D,0x03,0x02,0x0C,0x0D,0x05, /* ; E0-E7 */ + 0x02,0x0C,0x0E,0x04,0x01,0x0B,0x0E,0x06, /* ; EA-EF */ + 0x01,0x0B,0x0E,0x06,0x00,0x0A,0x0F,0x07, /* ; F0-F7 */ + 0x00,0x0A,0x0F,0x07,0x00,0x09,0x0F,0x08 /* ; F8-FF */ + } + } +}; + +static XGI301C_Tap4TimingStruct YPbPr525iTap4Timing[]= +{ + {480, { + 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D, /* ; C0-C7 */ + 0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D, /* ; C8-CF */ + 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C, /* ; D0-D7 */ + 0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C, /* ; D8-DF */ + 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D, /* ; E0-E7 */ + 0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E, /* ; EA-EF */ + 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00, /* ; F0-F7 */ + 0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02 /* ; F8-FF */ + } + }, + {600, { + 0x07,0x14,0x07,0x7E,0x06,0x14,0x09,0x7D, /* ; C0-C7 */ + 0x05,0x14,0x0A,0x7D,0x04,0x13,0x0B,0x7E, /* ; C8-CF */ + 0x03,0x13,0x0C,0x7E,0x02,0x12,0x0D,0x7F, /* ; D0-D7 */ + 0x01,0x12,0x0E,0x7F,0x01,0x11,0x0F,0x7F, /* ; D8-DF */ + 0x01,0x10,0x10,0x00,0x7F,0x0F,0x11,0x01, /* ; E0-E7 */ + 0x7F,0x0E,0x12,0x01,0x7E,0x0D,0x12,0x03, /* ; EA-EF */ + 0x7E,0x0C,0x13,0x03,0x7E,0x0B,0x13,0x04, /* ; F0-F7 */ + 0x7E,0x0A,0x14,0x04,0x7D,0x09,0x14,0x06 /* ; F8-FF */ + } + }, + {0xFFFF, + { + 0x09,0x0F,0x09,0x7F,0x08,0x0F,0x09,0x00, /* ; C0-C7 */ + 0x07,0x0F,0x0A,0x00,0x06,0x0F,0x0A,0x01, /* ; C8-CF */ + 0x06,0x0E,0x0B,0x01,0x05,0x0E,0x0B,0x02, /* ; D0-D7 */ + 0x04,0x0E,0x0C,0x02,0x04,0x0D,0x0C,0x03, /* ; D8-DF */ + 0x03,0x0D,0x0D,0x03,0x02,0x0C,0x0D,0x05, /* ; E0-E7 */ + 0x02,0x0C,0x0E,0x04,0x01,0x0B,0x0E,0x06, /* ; EA-EF */ + 0x01,0x0B,0x0E,0x06,0x00,0x0A,0x0F,0x07, /* ; F0-F7 */ + 0x00,0x0A,0x0F,0x07,0x00,0x09,0x0F,0x08 /* ; F8-FF */ + } + } +}; + +static XGI301C_Tap4TimingStruct YPbPr750pTap4Timing[]= +{ {0xFFFF, + { + 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E, /* ; C0-C7 */ + 0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D, /* ; C8-CF */ + 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C, /* ; D0-D7 */ + 0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D, /* ; D8-DF */ + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E, /* ; E0-E7 */ + 0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E, /* ; EA-EF */ + 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01, /* ; F0-F7 */ + 0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04 /* F8-FF */ + } + } +}; Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_util.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_util.c:1.2 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_util.c Thu Jun 2 21:13:02 2005 @@ -0,0 +1,262 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_util.c,v 1.2 2005/06/03 01:13:02 tsi Exp $ */ + +#include "osdef.h" +#include "vb_def.h" +#include "vgatypes.h" +#include "vb_struct.h" +#include "vb_util.h" + +#ifdef LINUX_KERNEL +#include "XGIfb.h" +#include +#include +#endif + +#ifdef TC +#include +#include +#include +#include +#endif + +#ifdef WIN2000 +#include +#include +#include +#include +#include + +#include "xgiv.h" +#include "dd_i2c.h" +#include "tools.h" +#endif + +#ifdef LINUX_XF86 +#include "xf86.h" +#include "xf86PciInfo.h" +#include "xgi.h" +#include "xgi_regs.h" +#endif + + +/* --------------------------------------------------------------------- */ +/* Function : XGINew_SetReg1 */ +/* Input : */ +/* Output : */ +/* Description : SR CRTC GR */ +/* --------------------------------------------------------------------- */ +void XGINew_SetReg1( USHORT port , USHORT index , USHORT data ) +{ + OutPortByte( ( ULONG )port , index ) ; + OutPortByte( ( ULONG )port + 1 , data ) ; +} + + +/* --------------------------------------------------------------------- */ +/* Function : XGINew_SetReg2 */ +/* Input : */ +/* Output : */ +/* Description : AR( 3C0 ) */ +/* --------------------------------------------------------------------- */ +/*void XGINew_SetReg2( USHORT port , USHORT index , USHORT data ) +{ + InPortByte( ( PUCHAR )port + 0x3da - 0x3c0 ) ; + OutPortByte( XGINew_P3c0 , index ) ; + OutPortByte( XGINew_P3c0 , data ) ; + OutPortByte( XGINew_P3c0 , 0x20 ) ; +}*/ + + +/* --------------------------------------------------------------------- */ +/* Function : */ +/* Input : */ +/* Output : */ +/* Description : */ +/* --------------------------------------------------------------------- */ +void XGINew_SetReg3( USHORT port , USHORT data ) +{ + OutPortByte( port , data ) ; +} + + +/* --------------------------------------------------------------------- */ +/* Function : XGINew_SetReg4 */ +/* Input : */ +/* Output : */ +/* Description : */ +/* --------------------------------------------------------------------- */ +void XGINew_SetReg4( USHORT port , ULONG data ) +{ + OutPortLong( port , data ) ; +} + + +/* --------------------------------------------------------------------- */ +/* Function : XGINew_GetReg1 */ +/* Input : */ +/* Output : */ +/* Description : */ +/* --------------------------------------------------------------------- */ +UCHAR XGINew_GetReg1( USHORT port , USHORT index ) +{ + UCHAR data ; + + OutPortByte( ( ULONG )port , index ) ; + data = InPortByte( ( ULONG )port + 1 ) ; + + return( data ) ; +} + + +/* --------------------------------------------------------------------- */ +/* Function : XGINew_GetReg2 */ +/* Input : */ +/* Output : */ +/* Description : */ +/* --------------------------------------------------------------------- */ +UCHAR XGINew_GetReg2( USHORT port ) +{ + UCHAR data ; + + data = InPortByte( port ) ; + + return( data ) ; +} + + +/* --------------------------------------------------------------------- */ +/* Function : XGINew_GetReg3 */ +/* Input : */ +/* Output : */ +/* Description : */ +/* --------------------------------------------------------------------- */ +ULONG XGINew_GetReg3( USHORT port ) +{ + ULONG data ; + + data = InPortLong( port ) ; + + return( data ) ; +} + + + +/* --------------------------------------------------------------------- */ +/* Function : XGINew_SetRegANDOR */ +/* Input : */ +/* Output : */ +/* Description : */ +/* --------------------------------------------------------------------- */ +void XGINew_SetRegANDOR( USHORT Port , USHORT Index , USHORT DataAND , USHORT DataOR ) +{ + USHORT temp ; + + temp = XGINew_GetReg1( Port , Index ) ; /* XGINew_Part1Port index 02 */ + temp = ( temp & ( DataAND ) ) | DataOR ; + XGINew_SetReg1( Port , Index , temp ) ; +} + + +/* --------------------------------------------------------------------- */ +/* Function : XGINew_SetRegAND */ +/* Input : */ +/* Output : */ +/* Description : */ +/* --------------------------------------------------------------------- */ +void XGINew_SetRegAND(USHORT Port,USHORT Index,USHORT DataAND) +{ + USHORT temp ; + + temp = XGINew_GetReg1( Port , Index ) ; /* XGINew_Part1Port index 02 */ + temp &= DataAND ; + XGINew_SetReg1( Port , Index , temp ) ; +} + + +/* --------------------------------------------------------------------- */ +/* Function : XGINew_SetRegOR */ +/* Input : */ +/* Output : */ +/* Description : */ +/* --------------------------------------------------------------------- */ +void XGINew_SetRegOR( USHORT Port , USHORT Index , USHORT DataOR ) +{ + USHORT temp ; + + temp = XGINew_GetReg1( Port , Index ) ; /* XGINew_Part1Port index 02 */ + temp |= DataOR ; + XGINew_SetReg1( Port , Index , temp ) ; +} + + + +/* --------------------------------------------------------------------- */ +/* Function : */ +/* Input : */ +/* Output : */ +/* Description : */ +/* --------------------------------------------------------------------- */ +void XGINew_ClearDAC( PUCHAR port ) +{ + int i ; + + OutPortByte( port , 0 ) ; + port++ ; + for( i = 0 ; i < 256 * 3 ; i++ ) + { + OutPortByte( port , 0 ) ; + } +} + + +#if 0 +/* --------------------------------------------------------------------- */ +/* Function : NewDelaySecond */ +/* Input : */ +/* Output : */ +/* Description : */ +/* --------------------------------------------------------------------- */ +static void NewDelaySeconds( int seconds ) +{ + int i ; + + + for( i = 0 ; i < seconds ; i++ ) + { +#ifdef TC + delay( 1000 ) ; +#endif + +#ifdef WIN2000 + + for ( j = 0 ; j < 20000 ; j++ ) + VideoPortStallExecution( 50 ) ; +#endif + +#ifdef WINCE_HEADER +#endif + +#ifdef LINUX_KERNEL +#endif + } +} +#endif + + +/* --------------------------------------------------------------------- */ +/* Function : XGI_Newdebugcode */ +/* Input : */ +/* Output : */ +/* Description : */ +/* --------------------------------------------------------------------- */ +void XGI_Newdebugcode( UCHAR code ) +{ + OutPortByte ( 0x80 , code ) ; +#if 0 + OutPortByte ( 0x300 , code ) ; + NewDelaySeconds( 0x3 ) ; +#endif +} + + + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_util.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_util.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_util.h Mon May 2 09:28:02 2005 @@ -0,0 +1,18 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_util.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ + +#ifndef _VBUTIL_ +#define _VBUTIL_ +extern void XGI_Newdebugcode( UCHAR ); +extern void XGINew_SetReg1(USHORT, USHORT, USHORT); +extern void XGINew_SetReg2(USHORT, USHORT, USHORT); +extern void XGINew_SetReg3(USHORT, USHORT); +extern UCHAR XGINew_GetReg1(USHORT, USHORT); +extern UCHAR XGINew_GetReg2(USHORT); +extern void XGINew_SetReg4(USHORT, ULONG); +extern ULONG XGINew_GetReg3(USHORT); +extern void XGINew_ClearDAC( PUCHAR ) ; +extern void XGINew_SetRegOR(USHORT Port,USHORT Index,USHORT DataOR); +extern void XGINew_SetRegAND(USHORT Port,USHORT Index,USHORT DataAND); +extern void XGINew_SetRegANDOR(USHORT Port,USHORT Index,USHORT DataAND,USHORT DataOR); +#endif + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/vgatypes.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/vgatypes.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/vgatypes.h Mon May 2 09:28:02 2005 @@ -0,0 +1,366 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/vgatypes.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ +/* + * General type definitions for universal mode switching modules + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria + * + * If distributed as part of the Linux kernel, the following license terms + * apply: + * + * * This program is free software; you can redistribute it and/or modify + * * it under the terms of the GNU General Public License as published by + * * the Free Software Foundation; either version 2 of the named License, + * * or any later version. + * * + * * This program is distributed in the hope that it will be useful, + * * but WITHOUT ANY WARRANTY; without even the implied warranty of + * * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * * GNU General Public License for more details. + * * + * * You should have received a copy of the GNU General Public License + * * along with this program; if not, write to the Free Software + * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA + * + * Otherwise, the following license terms apply: + * + * * Redistribution and use in source and binary forms, with or without + * * modification, are permitted provided that the following conditions + * * are met: + * * 1) Redistributions of source code must retain the above copyright + * * notice, this list of conditions and the following disclaimer. + * * 2) Redistributions in binary form must reproduce the above copyright + * * notice, this list of conditions and the following disclaimer in the + * * documentation and/or other materials provided with the distribution. + * * 3) The name of the author may not be used to endorse or promote products + * * derived from this software without specific prior written permission. + * * + * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Thomas Winischhofer + * + */ + +#ifndef _VGATYPES_ +#define _VGATYPES_ + +#ifdef LINUX_XF86 +#include "xf86Version.h" +#include "xf86Pci.h" +#endif + +#ifdef LINUX_KERNEL /* We don't want the X driver to depend on kernel source */ +#include +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef NULL +#define NULL 0 +#endif + +#ifndef CHAR +typedef char CHAR; +#endif + +#ifndef SHORT +typedef short SHORT; +#endif + +#ifndef LONG +typedef long LONG; +#endif + +#ifndef UCHAR +typedef unsigned char UCHAR; +#endif + +#ifndef USHORT +typedef unsigned short USHORT; +#endif + +#ifndef ULONG +typedef unsigned long ULONG; +#endif + +#ifndef PUCHAR +typedef UCHAR *PUCHAR; +#endif + +#ifndef PUSHORT +typedef USHORT *PUSHORT; +#endif + +#ifndef PLONGU +typedef ULONG *PULONG; +#endif + +#ifndef VOID +typedef void VOID; +#endif + +#ifndef PVOID +typedef void *PVOID; +#endif + +#ifndef BOOLEAN +typedef UCHAR BOOLEAN; +#endif + +#ifndef bool +typedef UCHAR bool; +#endif + +#ifdef LINUX_KERNEL +typedef unsigned long XGIIOADDRESS; +#endif + +#ifdef LINUX_XF86 +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,0,0,0) +typedef unsigned char IOADDRESS; +typedef unsigned char XGIIOADDRESS; +#else +typedef IOADDRESS XGIIOADDRESS; +#endif +#endif + +#ifndef VBIOS_VER_MAX_LENGTH +#define VBIOS_VER_MAX_LENGTH 4 +#endif + +#ifndef LINUX_KERNEL /* For the linux kernel, this is defined in xgifb.h */ +#ifndef XGI_CHIP_TYPE +typedef enum _XGI_CHIP_TYPE { + XGI_VGALegacy = 0, +#ifdef LINUX_XF86 + XGI_530, + XGI_OLD, +#endif + XGI_300, + XGI_630, + XGI_640, + XGI_315H, + XGI_315, + XGI_315PRO, + XGI_550, + XGI_650, + XGI_650M, + XGI_740, + XGI_330, + XGI_661, + XGI_660, + XGI_760, + XG40 = 32, + XG41, + XG42, + XG45, + XG20 = 48, + MAX_XGI_CHIP +} XGI_CHIP_TYPE; +#endif +#endif + +#ifndef XGI_VB_CHIP_TYPE +typedef enum _XGI_VB_CHIP_TYPE { + VB_CHIP_Legacy = 0, + VB_CHIP_301, + VB_CHIP_301B, + VB_CHIP_301LV, + VB_CHIP_302, + VB_CHIP_302B, + VB_CHIP_302LV, + VB_CHIP_301C, + VB_CHIP_302ELV, + VB_CHIP_UNKNOWN, /* other video bridge or no video bridge */ + MAX_VB_CHIP +} XGI_VB_CHIP_TYPE; +#endif + +#ifndef XGI_LCD_TYPE +typedef enum _XGI_LCD_TYPE { + LCD_INVALID = 0, + LCD_800x600, + LCD_1024x768, + LCD_1280x1024, + LCD_1280x960, + LCD_640x480, + LCD_1600x1200, + LCD_1920x1440, + LCD_2048x1536, + LCD_320x480, /* FSTN, DSTN */ + LCD_1400x1050, + LCD_1152x864, + LCD_1152x768, + LCD_1280x768, + LCD_1024x600, + LCD_640x480_2, /* FSTN, DSTN */ + LCD_640x480_3, /* FSTN, DSTN */ + LCD_848x480, + LCD_1280x800, + LCD_1680x1050, + LCD_1280x720, + LCD_CUSTOM, + LCD_UNKNOWN +} XGI_LCD_TYPE; +#endif + +#ifndef PXGI_DSReg +typedef struct _XGI_DSReg +{ + UCHAR jIdx; + UCHAR jVal; +} XGI_DSReg, *PXGI_DSReg; +#endif + +#ifndef XGI_HW_DEVICE_INFO + +typedef struct _XGI_HW_DEVICE_INFO XGI_HW_DEVICE_INFO, *PXGI_HW_DEVICE_INFO; + +typedef BOOLEAN (*PXGI_QUERYSPACE) (PXGI_HW_DEVICE_INFO, ULONG, ULONG, ULONG *); + +struct _XGI_HW_DEVICE_INFO +{ + ULONG ulExternalChip; /* NO VB or other video bridge*/ + /* if ujVBChipID = VB_CHIP_UNKNOWN, */ +#ifdef LINUX_XF86 + PCITAG PciTag; /* PCI Tag */ +#endif + + PUCHAR pjVirtualRomBase; /* ROM image */ + + BOOLEAN UseROM; /* Use the ROM image if provided */ + + PVOID pDevice; + + PUCHAR pjVideoMemoryAddress;/* base virtual memory address */ + /* of Linear VGA memory */ + + ULONG ulVideoMemorySize; /* size, in bytes, of the memory on the board */ + + PUCHAR pjCustomizedROMImage; + +/* PUCHAR pj2ndIOAddress; */ + ULONG pj2ndIOAddress; + + XGIIOADDRESS pjIOAddress; /* base I/O address of VGA ports (0x3B0) */ + + UCHAR jChipType; /* Used to Identify Graphics Chip */ + /* defined in the data structure type */ + /* "XGI_CHIP_TYPE" */ + + UCHAR jChipRevision; /* Used to Identify Graphics Chip Revision */ + + UCHAR ujVBChipID; /* the ID of video bridge */ + /* defined in the data structure type */ + /* "XGI_VB_CHIP_TYPE" */ +/* +#ifdef LINUX_KERNEL + BOOLEAN Is301BDH; + ULONG ulCRT2LCDType; / * defined in the data structure type * / + / * "XGI_LCD_TYPE" * / +#endif +*/ + ULONG ulCRT2LCDType; /* defined in the data structure type */ + + ULONG usExternalChip; /* NO VB or other video bridge (other than */ + /* video bridge) */ + + BOOLEAN bIntegratedMMEnabled;/* supporting integration MM enable */ + + BOOLEAN bSkipDramSizing; /* True: Skip video memory sizing. */ + + BOOLEAN bSkipSense; +/* +#ifdef LINUX_KERNEL +*/ + PXGI_DSReg pSR; /* restore SR registers in initial function. */ + /* end data :(idx, val) = (FF, FF). */ + /* Note : restore SR registers if */ + /* bSkipDramSizing = TRUE */ + + PXGI_DSReg pCR; /* restore CR registers in initial function. */ + /* end data :(idx, val) = (FF, FF) */ + /* Note : restore cR registers if */ + /* bSkipDramSizing = TRUE */ +/* +#endif +*/ + + PXGI_QUERYSPACE pQueryVGAConfigSpace; + + PXGI_QUERYSPACE pQueryNorthBridgeSpace; + + UCHAR szVBIOSVer[VBIOS_VER_MAX_LENGTH]; + +}; +#endif + +/* Addtional IOCTL for communication xgifb <> X driver */ +/* If changing this, xgifb.h must also be changed (for xgifb) */ + +#ifdef LINUX_XF86 /* We don't want the X driver to depend on the kernel source */ + +/* ioctl for identifying and giving some info (esp. memory heap start) */ +#define XGIFB_GET_INFO 0x80046ef8 /* Wow, what a terrible hack... */ + +/* Structure argument for XGIFB_GET_INFO ioctl */ +typedef struct _XGIFB_INFO xgifb_info, *pxgifb_info; + +struct _XGIFB_INFO { + CARD32 xgifb_id; /* for identifying xgifb */ +#ifndef XGIFB_ID +#define XGIFB_ID 0x53495346 /* Identify myself with 'XGIF' */ +#endif + CARD32 chip_id; /* PCI ID of detected chip */ + CARD32 memory; /* video memory in KB which xgifb manages */ + CARD32 heapstart; /* heap start (= xgifb "mem" argument) in KB */ + CARD8 fbvidmode; /* current xgifb mode */ + + CARD8 xgifb_version; + CARD8 xgifb_revision; + CARD8 xgifb_patchlevel; + + CARD8 xgifb_caps; /* xgifb's capabilities */ + + CARD32 xgifb_tqlen; /* turbo queue length (in KB) */ + + CARD32 xgifb_pcibus; /* The card's PCI ID */ + CARD32 xgifb_pcislot; + CARD32 xgifb_pcifunc; + + CARD8 xgifb_lcdpdc; + + CARD8 xgifb_lcda; + + CARD32 xgifb_vbflags; + CARD32 xgifb_currentvbflags; + + CARD32 xgifb_scalelcd; + CARD32 xgifb_specialtiming; + + CARD8 xgifb_haveemi; + CARD8 xgifb_emi30,xgifb_emi31,xgifb_emi32,xgifb_emi33; + CARD8 xgifb_haveemilcd; + + CARD8 xgifb_lcdpdca; + + CARD8 reserved[212]; /* for future use */ +}; +#endif + +#endif + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/vstruct.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/vstruct.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/vstruct.h Mon May 2 09:28:02 2005 @@ -0,0 +1,672 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/vstruct.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ +/* + * General structure definitions for universal mode switching modules + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria + * + * If distributed as part of the Linux kernel, the following license terms + * apply: + * + * * This program is free software; you can redistribute it and/or modify + * * it under the terms of the GNU General Public License as published by + * * the Free Software Foundation; either version 2 of the named License, + * * or any later version. + * * + * * This program is distributed in the hope that it will be useful, + * * but WITHOUT ANY WARRANTY; without even the implied warranty of + * * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * * GNU General Public License for more details. + * * + * * You should have received a copy of the GNU General Public License + * * along with this program; if not, write to the Free Software + * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA + * + * Otherwise, the following license terms apply: + * + * * Redistribution and use in source and binary forms, with or without + * * modification, are permitted provided that the following conditions + * * are met: + * * 1) Redistributions of source code must retain the above copyright + * * notice, this list of conditions and the following disclaimer. + * * 2) Redistributions in binary form must reproduce the above copyright + * * notice, this list of conditions and the following disclaimer in the + * * documentation and/or other materials provided with the distribution. + * * 3) The name of the author may not be used to endorse or promote products + * * derived from this software without specific prior written permission. + * * + * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Thomas Winischhofer + * + */ +/* +#ifdef _INIT_ +#define EXTERN +#else +#define EXTERN extern +#endif +*/ +#ifndef _VSTRUCT_ +#define _VSTRUCT_ + +typedef struct _XGI_New_PanelDelayTblStruct +{ + UCHAR timer[2]; +} XGI_New_PanelDelayTblStruct; +/* +typedef struct _XGI_LCDDataStruct +{ + USHORT RVBHCMAX; + USHORT RVBHCFACT; + USHORT VGAHT; + USHORT VGAVT; + USHORT LCDHT; + USHORT LCDVT; +} XGI_LCDDataStruct; + +typedef struct _XGI_TVDataStruct +{ + USHORT RVBHCMAX; + USHORT RVBHCFACT; + USHORT VGAHT; + USHORT VGAVT; + USHORT TVHDE; + USHORT TVVDE; + USHORT RVBHRS; + UCHAR FlickerMode; + USHORT HALFRVBHRS; + UCHAR RY1COE; + UCHAR RY2COE; + UCHAR RY3COE; + UCHAR RY4COE; +} XGI_TVDataStruct; + +typedef struct _XGI_LVDSDataStruct +{ + USHORT VGAHT; + USHORT VGAVT; + USHORT LCDHT; + USHORT LCDVT; +} XGI_LVDSDataStruct; + +typedef struct _XGI_LVDSDesStruct +{ + USHORT LCDHDES; + USHORT LCDVDES; +} XGI_LVDSDesStruct; + +typedef struct _XGI_LVDSCRT1DataStruct +{ + UCHAR CR[15]; +} XGI_LVDSCRT1DataStruct; +*/ +typedef struct _XGI_LCDACRT1DataStruct +{ + UCHAR CR[17]; +} XGI_LCDACRT1DataStruct; + +typedef struct _XGI_CHTVRegDataStruct +{ + UCHAR Reg[16]; +} XGI_CHTVRegDataStruct; +/* +typedef struct _XGI_StStruct +{ + UCHAR St_ModeID; + USHORT St_ModeFlag; + UCHAR St_StTableIndex; + UCHAR St_CRT2CRTC; + UCHAR St_ResInfo; + UCHAR VB_StTVFlickerIndex; + UCHAR VB_StTVEdgeIndex; + UCHAR VB_StTVYFilterIndex; + UCHAR St_PDC; +} XGI_StStruct; +*/ +typedef struct _XGI_VBModeStruct +{ + UCHAR ModeID; + UCHAR VB_TVDelayIndex; + UCHAR VB_TVFlickerIndex; + UCHAR VB_TVPhaseIndex; + UCHAR VB_TVYFilterIndex; + UCHAR VB_LCDDelayIndex; + UCHAR _VB_LCDHIndex; + UCHAR _VB_LCDVIndex; +} XGI_VBModeStruct; +/* +typedef struct _XGI_New_StandTableStruct +{ + UCHAR CRT_COLS; + UCHAR ROWS; + UCHAR CHAR_HEIGHT; + USHORT CRT_LEN; + UCHAR SR[4]; + UCHAR MISC; + UCHAR CRTC[0x19]; + UCHAR ATTR[0x14]; + UCHAR GRC[9]; +} XGI_New_StandTableStruct; + +typedef struct _XGI_ExtStruct +{ + UCHAR Ext_ModeID; + USHORT Ext_ModeFlag; + USHORT Ext_VESAID; + UCHAR Ext_RESINFO; + UCHAR VB_ExtTVFlickerIndex; + UCHAR VB_ExtTVEdgeIndex; + UCHAR VB_ExtTVYFilterIndex; + UCHAR VB_ExtTVYFilterIndexROM661; + UCHAR REFindex; +} XGI_ExtStruct; + +typedef struct _XGI_Ext2Struct +{ + USHORT Ext_InfoFlag; + UCHAR Ext_CRT1CRTC; + UCHAR Ext_CRTVCLK; + UCHAR Ext_CRT2CRTC; + UCHAR Ext_CRT2CRTC_NS; + UCHAR ModeID; + USHORT XRes; + USHORT YRes; + UCHAR Ext_PDC; +} XGI_Ext2Struct; +*/ +typedef struct _XGI_Part2PortTblStruct +{ + UCHAR CR[12]; +} XGI_Part2PortTblStruct; +/* +typedef struct _XGI_CRT1TableStruct +{ + UCHAR CR[17]; +} XGI_CRT1TableStruct; + +typedef struct _XGI_MCLKDataStruct +{ + UCHAR SR28,SR29,SR2A; + USHORT CLOCK; +} XGI_MCLKDataStruct; + +typedef struct _XGI_VCLKDataStruct +{ + UCHAR SR2B,SR2C; + USHORT CLOCK; +} XGI_VCLKDataStruct; + +typedef struct _XGI_VBVCLKDataStruct +{ + UCHAR Part4_A,Part4_B; + USHORT CLOCK; +} XGI_VBVCLKDataStruct; +*/ +typedef struct _XGI_New_StResInfoStruct +{ + USHORT HTotal; + USHORT VTotal; +} XGI_New_StResInfoStruct; + +typedef struct _XGI_New_ModeResInfoStruct +{ + USHORT HTotal; + USHORT VTotal; + UCHAR XChar; + UCHAR YChar; +} XGI_New_ModeResInfoStruct; + + + +typedef UCHAR DRAM4sType[4]; + +/* Defines for XGI_CustomT */ +/* Never change these for xgifb compatibility */ +#define CUT_NONE 0 +#define CUT_FORCENONE 1 +#define CUT_BARCO1366 2 +#define CUT_BARCO1024 3 +#define CUT_COMPAQ1280 4 +#define CUT_COMPAQ12802 5 +#define CUT_PANEL848 6 +#define CUT_CLEVO1024 7 +#define CUT_CLEVO10242 8 +#define CUT_CLEVO1400 9 +#define CUT_CLEVO14002 10 +#define CUT_UNIWILL1024 11 +#define CUT_ASUSL3000D 12 +#define CUT_UNIWILL10242 13 +#define CUT_ACER1280 14 +#define CUT_COMPAL1400_1 15 +#define CUT_COMPAL1400_2 16 +#define CUT_ASUSA2H_1 17 +#define CUT_ASUSA2H_2 18 + +typedef struct _XGI_Private +{ +#ifdef LINUX_KERNEL + XGIIOADDRESS RelIO; +#endif + XGIIOADDRESS XGI_P3c4; + XGIIOADDRESS XGI_P3d4; + XGIIOADDRESS XGI_P3c0; + XGIIOADDRESS XGI_P3ce; + XGIIOADDRESS XGI_P3c2; + XGIIOADDRESS XGI_P3ca; + XGIIOADDRESS XGI_P3c6; + XGIIOADDRESS XGI_P3c7; + XGIIOADDRESS XGI_P3c8; + XGIIOADDRESS XGI_P3c9; + XGIIOADDRESS XGI_P3cb; + XGIIOADDRESS XGI_P3cd; + XGIIOADDRESS XGI_P3da; + XGIIOADDRESS XGI_Part1Port; + XGIIOADDRESS XGI_Part2Port; + XGIIOADDRESS XGI_Part3Port; + XGIIOADDRESS XGI_Part4Port; + XGIIOADDRESS XGI_Part5Port; + XGIIOADDRESS XGI_VidCapt; + XGIIOADDRESS XGI_VidPlay; + USHORT XGI_IF_DEF_LVDS; + USHORT XGI_IF_DEF_CH70xx; + USHORT XGI_IF_DEF_CONEX; + USHORT XGI_IF_DEF_TRUMPION; + USHORT XGI_IF_DEF_DSTN; + USHORT XGI_IF_DEF_FSTN; + USHORT XGI_SysFlags; + UCHAR XGI_VGAINFO; +#ifndef LINUX_KERNEL + USHORT XGI_CP1, XGI_CP2, XGI_CP3, XGI_CP4; +#endif + BOOLEAN XGI_UseROM; + BOOLEAN XGI_ROMNew; + BOOLEAN PanelSelfDetected; + int XGI_CHOverScan; + BOOLEAN XGI_CHSOverScan; + BOOLEAN XGI_ChSW; + BOOLEAN XGI_UseLCDA; + int XGI_UseOEM; + ULONG XGI_CustomT; + USHORT XGI_Backup70xx; + BOOLEAN HaveEMI; + BOOLEAN HaveEMILCD; + BOOLEAN OverruleEMI; + UCHAR EMI_30,EMI_31,EMI_32,EMI_33; + SHORT PDC, PDCA; + UCHAR XGI_MyCR63; + USHORT XGI_CRT1Mode; + USHORT XGI_flag_clearbuffer; + int XGI_RAMType; + UCHAR XGI_ChannelAB; + UCHAR XGI_DataBusWidth; + USHORT XGI_ModeType; + USHORT XGI_VBInfo; + USHORT XGI_TVMode; + USHORT XGI_LCDResInfo; + USHORT XGI_LCDTypeInfo; + USHORT XGI_LCDInfo; + USHORT XGI_LCDInfo661; + USHORT XGI_VBType; + USHORT XGI_VBExtInfo; + USHORT XGI_YPbPr; + USHORT XGI_SelectCRT2Rate; + USHORT XGI_SetFlag; + USHORT XGI_RVBHCFACT; + USHORT XGI_RVBHCMAX; + USHORT XGI_RVBHRS; + USHORT XGI_VGAVT; + USHORT XGI_VGAHT; + USHORT XGI_VT; + USHORT XGI_HT; + USHORT XGI_VGAVDE; + USHORT XGI_VGAHDE; + USHORT XGI_VDE; + USHORT XGI_HDE; + USHORT XGI_NewFlickerMode; + USHORT XGI_RY1COE; + USHORT XGI_RY2COE; + USHORT XGI_RY3COE; + USHORT XGI_RY4COE; + USHORT XGI_LCDHDES; + USHORT XGI_LCDVDES; + USHORT XGI_DDC_Port; + USHORT XGI_DDC_Index; + USHORT XGI_DDC_Data; + USHORT XGI_DDC_NData; + USHORT XGI_DDC_Clk; + USHORT XGI_DDC_NClk; + USHORT XGI_DDC_DeviceAddr; + USHORT XGI_DDC_ReadAddr; + USHORT XGI_DDC_SecAddr; + USHORT XGI_ChrontelInit; + BOOLEAN XGI_SensibleSR11; + + + USHORT XGI_PanelMinLVDS; + USHORT XGI_PanelMin301; + + const XGI_StStruct *XGI_SModeIDTable; + XGI_New_StandTableStruct *XGI_StandTable; + const XGI_ExtStruct *XGI_EModeIDTable; + const XGI_Ext2Struct *XGI_RefIndex; + const XGI_VBModeStruct *XGI_VBModeIDTable; + const XGI_CRT1TableStruct *XGI_CRT1Table; + const XGI_MCLKDataStruct *XGI_MCLKData_0; + const XGI_MCLKDataStruct *XGI_MCLKData_1; + XGI_VCLKDataStruct *XGI_VCLKData; + XGI_VBVCLKDataStruct *XGI_VBVCLKData; + const XGI_New_StResInfoStruct *XGI_StResInfo; + const XGI_New_ModeResInfoStruct *XGI_ModeResInfo; + + const UCHAR *pXGI_OutputSelect; + const UCHAR *pXGI_SoftSetting; + + const DRAM4sType *XGI_SR15; /* pointer : point to array */ +#ifndef LINUX_XF86 + UCHAR *pXGI_SR07; + const DRAM4sType *XGI_CR40; /* pointer : point to array */ + UCHAR *XGI_CR49; + UCHAR *XGI_SR25; + UCHAR *pXGI_SR1F; + UCHAR *pXGI_SR21; + UCHAR *pXGI_SR22; + UCHAR *pXGI_SR23; + UCHAR *pXGI_SR24; + UCHAR *pXGI_SR31; + UCHAR *pXGI_SR32; + UCHAR *pXGI_SR33; + UCHAR *pXGI_CRT2Data_1_2; + UCHAR *pXGI_CRT2Data_4_D; + UCHAR *pXGI_CRT2Data_4_E; + UCHAR *pXGI_CRT2Data_4_10; + const USHORT *pXGI_RGBSenseData; + const USHORT *pXGI_VideoSenseData; + const USHORT *pXGI_YCSenseData; + const USHORT *pXGI_RGBSenseData2; + const USHORT *pXGI_VideoSenseData2; + const USHORT *pXGI_YCSenseData2; +#endif + + const XGI_New_PanelDelayTblStruct *XGI_PanelDelayTbl; + const XGI_New_PanelDelayTblStruct *XGI_PanelDelayTblLVDS; + + /* bridge */ + + const UCHAR *XGI_NTSCPhase; + const UCHAR *XGI_PALPhase; + const UCHAR *XGI_NTSCPhase2; + const UCHAR *XGI_PALPhase2; + const UCHAR *XGI_PALMPhase; + const UCHAR *XGI_PALNPhase; + const UCHAR *XGI_PALMPhase2; + const UCHAR *XGI_PALNPhase2; + const UCHAR *XGI_SpecialPhase; + const UCHAR *XGI_SpecialPhaseM; + const UCHAR *XGI_SpecialPhaseJ; + const XGI_LCDDataStruct *XGI_ExtLCD1024x768Data; + const XGI_LCDDataStruct *XGI_St2LCD1024x768Data; + const XGI_LCDDataStruct *XGI_LCD1280x720Data; + const XGI_LCDDataStruct *XGI_StLCD1280x768_2Data; + const XGI_LCDDataStruct *XGI_ExtLCD1280x768_2Data; + const XGI_LCDDataStruct *XGI_LCD1280x768_3Data; + const XGI_LCDDataStruct *XGI_LCD1280x800Data; + const XGI_LCDDataStruct *XGI_LCD1280x960Data; + const XGI_LCDDataStruct *XGI_ExtLCD1280x1024Data; + const XGI_LCDDataStruct *XGI_St2LCD1280x1024Data; + const XGI_LCDDataStruct *XGI_New_StLCD1400x1050Data; + const XGI_LCDDataStruct *XGI_New_ExtLCD1400x1050Data; + const XGI_LCDDataStruct *XGI_New_StLCD1600x1200Data; + const XGI_LCDDataStruct *XGI_New_ExtLCD1600x1200Data; + const XGI_LCDDataStruct *XGI_LCD1680x1050Data; + const XGI_LCDDataStruct *XGI_NoScaleData; + const XGI_TVDataStruct *XGI_New_StPALData; + const XGI_TVDataStruct *XGI_New_ExtPALData; + const XGI_TVDataStruct *XGI_New_StNTSCData; + const XGI_TVDataStruct *XGI_New_ExtNTSCData; + const XGI_TVDataStruct *XGI_St1HiTVData; + const XGI_TVDataStruct *XGI_New_St2HiTVData; + const XGI_TVDataStruct *XGI_New_ExtHiTVData; + const XGI_TVDataStruct *XGI_St525iData; + const XGI_TVDataStruct *XGI_St525pData; + const XGI_TVDataStruct *XGI_St750pData; + const XGI_TVDataStruct *XGI_Ext525iData; + const XGI_TVDataStruct *XGI_Ext525pData; + const XGI_TVDataStruct *XGI_Ext750pData; + const UCHAR *XGI_NTSCTiming; + const UCHAR *XGI_PALTiming; + const UCHAR *XGI_HiTVExtTiming; + const UCHAR *XGI_HiTVSt1Timing; + const UCHAR *XGI_HiTVSt2Timing; + const UCHAR *XGI_HiTVGroup3Data; + const UCHAR *XGI_HiTVGroup3Simu; + + const XGI_Part2PortTblStruct *XGI_CRT2Part2_1024x768_1; + const XGI_Part2PortTblStruct *XGI_CRT2Part2_1280x1024_1; + const XGI_Part2PortTblStruct *XGI_CRT2Part2_1024x768_2; + const XGI_Part2PortTblStruct *XGI_CRT2Part2_1280x1024_2; + const XGI_Part2PortTblStruct *XGI_CRT2Part2_1024x768_3; + const XGI_Part2PortTblStruct *XGI_CRT2Part2_1280x1024_3; + + /* LVDS, Chrontel */ + + const XGI_LVDSDataStruct *XGI_LVDS800x600Data_1; + const XGI_LVDSDataStruct *XGI_LVDS800x600Data_2; + const XGI_LVDSDataStruct *XGI_New_LVDS1024x768Data_1; + const XGI_LVDSDataStruct *XGI_New_LVDS1024x768Data_2; + const XGI_LVDSDataStruct *XGI_New_LVDS1280x1024Data_1; + const XGI_LVDSDataStruct *XGI_New_LVDS1280x1024Data_2; + const XGI_LVDSDataStruct *XGI_LVDS1280x960Data_1; + const XGI_LVDSDataStruct *XGI_LVDS1280x960Data_2; + const XGI_LVDSDataStruct *XGI_New_LVDS1400x1050Data_1; + const XGI_LVDSDataStruct *XGI_New_LVDS1400x1050Data_2; + const XGI_LVDSDataStruct *XGI_New_LVDS1600x1200Data_1; + const XGI_LVDSDataStruct *XGI_LVDS1600x1200Data_2; + const XGI_LVDSDataStruct *XGI_LVDS1280x768Data_1; + const XGI_LVDSDataStruct *XGI_LVDS1280x768Data_2; + const XGI_LVDSDataStruct *XGI_LVDS1024x600Data_1; + const XGI_LVDSDataStruct *XGI_LVDS1024x600Data_2; + const XGI_LVDSDataStruct *XGI_LVDS1152x768Data_1; + const XGI_LVDSDataStruct *XGI_LVDS1152x768Data_2; + const XGI_LVDSDataStruct *XGI_LVDS640x480Data_1; + const XGI_LVDSDataStruct *XGI_LVDS640x480Data_2; + const XGI_LVDSDataStruct *XGI_LVDS320x480Data_1; + const XGI_LVDSDataStruct *XGI_LVDSXXXxXXXData_1; + const XGI_LVDSDataStruct *XGI_LVDSBARCO1366Data_1; + const XGI_LVDSDataStruct *XGI_LVDSBARCO1366Data_2; + const XGI_LVDSDataStruct *XGI_LVDSBARCO1024Data_1; + const XGI_LVDSDataStruct *XGI_LVDSBARCO1024Data_2; + const XGI_LVDSDataStruct *XGI_LVDS848x480Data_1; + const XGI_LVDSDataStruct *XGI_LVDS848x480Data_2; + const XGI_LVDSDataStruct *XGI_New_CHTVUNTSCData; + const XGI_LVDSDataStruct *XGI_New_CHTVONTSCData; + const XGI_LVDSDataStruct *XGI_CHTVUPALData; + const XGI_LVDSDataStruct *XGI_CHTVOPALData; + const XGI_LVDSDataStruct *XGI_CHTVUPALMData; + const XGI_LVDSDataStruct *XGI_CHTVOPALMData; + const XGI_LVDSDataStruct *XGI_CHTVUPALNData; + const XGI_LVDSDataStruct *XGI_CHTVOPALNData; + const XGI_LVDSDataStruct *XGI_CHTVSOPALData; + + const XGI_LVDSDesStruct *XGI_PanelType00_1; + const XGI_LVDSDesStruct *XGI_PanelType01_1; + const XGI_LVDSDesStruct *XGI_PanelType02_1; + const XGI_LVDSDesStruct *XGI_PanelType03_1; + const XGI_LVDSDesStruct *XGI_PanelType04_1; + const XGI_LVDSDesStruct *XGI_PanelType05_1; + const XGI_LVDSDesStruct *XGI_PanelType06_1; + const XGI_LVDSDesStruct *XGI_PanelType07_1; + const XGI_LVDSDesStruct *XGI_PanelType08_1; + const XGI_LVDSDesStruct *XGI_PanelType09_1; + const XGI_LVDSDesStruct *XGI_PanelType0a_1; + const XGI_LVDSDesStruct *XGI_PanelType0b_1; + const XGI_LVDSDesStruct *XGI_PanelType0c_1; + const XGI_LVDSDesStruct *XGI_PanelType0d_1; + const XGI_LVDSDesStruct *XGI_PanelType0e_1; + const XGI_LVDSDesStruct *XGI_PanelType0f_1; + const XGI_LVDSDesStruct *XGI_PanelTypeNS_1; + const XGI_LVDSDesStruct *XGI_PanelType00_2; + const XGI_LVDSDesStruct *XGI_PanelType01_2; + const XGI_LVDSDesStruct *XGI_PanelType02_2; + const XGI_LVDSDesStruct *XGI_PanelType03_2; + const XGI_LVDSDesStruct *XGI_PanelType04_2; + const XGI_LVDSDesStruct *XGI_PanelType05_2; + const XGI_LVDSDesStruct *XGI_PanelType06_2; + const XGI_LVDSDesStruct *XGI_PanelType07_2; + const XGI_LVDSDesStruct *XGI_PanelType08_2; + const XGI_LVDSDesStruct *XGI_PanelType09_2; + const XGI_LVDSDesStruct *XGI_PanelType0a_2; + const XGI_LVDSDesStruct *XGI_PanelType0b_2; + const XGI_LVDSDesStruct *XGI_PanelType0c_2; + const XGI_LVDSDesStruct *XGI_PanelType0d_2; + const XGI_LVDSDesStruct *XGI_PanelType0e_2; + const XGI_LVDSDesStruct *XGI_PanelType0f_2; + const XGI_LVDSDesStruct *XGI_PanelTypeNS_2; + const XGI_LVDSDesStruct *XGI_CHTVUNTSCDesData; + const XGI_LVDSDesStruct *XGI_CHTVONTSCDesData; + const XGI_LVDSDesStruct *XGI_CHTVUPALDesData; + const XGI_LVDSDesStruct *XGI_CHTVOPALDesData; + + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1800x600_1; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11024x768_1; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11280x1024_1; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11400x1050_1; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11280x768_1; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11024x600_1; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11152x768_1; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11600x1200_1; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1800x600_1_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11024x768_1_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11280x1024_1_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11400x1050_1_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11280x768_1_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11024x600_1_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11152x768_1_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11600x1200_1_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1800x600_2; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11024x768_2; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11280x1024_2; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11400x1050_2; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11280x768_2; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11024x600_2; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11152x768_2; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11600x1200_2; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1800x600_2_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11024x768_2_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11280x1024_2_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11400x1050_2_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11280x768_2_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11024x600_2_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11152x768_2_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT11600x1200_2_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1XXXxXXX_1; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1XXXxXXX_1_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1640x480_1; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1640x480_1_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1640x480_2; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1640x480_2_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1640x480_3; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1640x480_3_H; + const XGI_LVDSCRT1DataStruct *XGI_LVDSCRT1320x480_1; + const XGI_LVDSCRT1DataStruct *XGI_CHTVCRT1UNTSC; + const XGI_LVDSCRT1DataStruct *XGI_CHTVCRT1ONTSC; + const XGI_LVDSCRT1DataStruct *XGI_CHTVCRT1UPAL; + const XGI_LVDSCRT1DataStruct *XGI_CHTVCRT1OPAL; + const XGI_LVDSCRT1DataStruct *XGI_CHTVCRT1SOPAL; + + const XGI_CHTVRegDataStruct *XGI_CHTVReg_UNTSC; + const XGI_CHTVRegDataStruct *XGI_CHTVReg_ONTSC; + const XGI_CHTVRegDataStruct *XGI_CHTVReg_UPAL; + const XGI_CHTVRegDataStruct *XGI_CHTVReg_OPAL; + const XGI_CHTVRegDataStruct *XGI_CHTVReg_UPALM; + const XGI_CHTVRegDataStruct *XGI_CHTVReg_OPALM; + const XGI_CHTVRegDataStruct *XGI_CHTVReg_UPALN; + const XGI_CHTVRegDataStruct *XGI_CHTVReg_OPALN; + const XGI_CHTVRegDataStruct *XGI_CHTVReg_SOPAL; + + const UCHAR *XGI_CHTVVCLKUNTSC; + const UCHAR *XGI_CHTVVCLKONTSC; + const UCHAR *XGI_CHTVVCLKUPAL; + const UCHAR *XGI_CHTVVCLKOPAL; + const UCHAR *XGI_CHTVVCLKUPALM; + const UCHAR *XGI_CHTVVCLKOPALM; + const UCHAR *XGI_CHTVVCLKUPALN; + const UCHAR *XGI_CHTVVCLKOPALN; + const UCHAR *XGI_CHTVVCLKSOPAL; + + USHORT PanelXRes, PanelHT; + USHORT PanelYRes, PanelVT; + USHORT PanelHRS, PanelHRE; + USHORT PanelVRS, PanelVRE; + USHORT PanelVCLKIdx300; + USHORT PanelVCLKIdx315; + + BOOLEAN UseCustomMode; + BOOLEAN CRT1UsesCustomMode; + USHORT CHDisplay; + USHORT CHSyncStart; + USHORT CHSyncEnd; + USHORT CHTotal; + USHORT CHBlankStart; + USHORT CHBlankEnd; + USHORT CVDisplay; + USHORT CVSyncStart; + USHORT CVSyncEnd; + USHORT CVTotal; + USHORT CVBlankStart; + USHORT CVBlankEnd; + ULONG CDClock; + ULONG CFlags; + UCHAR CCRT1CRTC[17]; + UCHAR CSR2B; + UCHAR CSR2C; + USHORT CSRClock; + USHORT CSRClock_CRT1; + USHORT CModeFlag; + USHORT CModeFlag_CRT1; + USHORT CInfoFlag; + + int LVDSHL; + + BOOLEAN Backup; + UCHAR Backup_Mode; + UCHAR Backup_14; + UCHAR Backup_15; + UCHAR Backup_16; + UCHAR Backup_17; + UCHAR Backup_18; + UCHAR Backup_19; + UCHAR Backup_1a; + UCHAR Backup_1b; + UCHAR Backup_1c; + UCHAR Backup_1d; + + int UsePanelScaler; + int CenterScreen; + + USHORT CP_Vendor, CP_Product; + BOOLEAN CP_HaveCustomData; + int CP_PreferredX, CP_PreferredY, CP_PreferredIndex; + int CP_MaxX, CP_MaxY, CP_MaxClock; + BOOLEAN CP_Supports64048075; + int CP_HDisplay[7], CP_VDisplay[7]; /* For Custom LCD panel dimensions */ + int CP_HTotal[7], CP_VTotal[7]; + int CP_HSyncStart[7], CP_VSyncStart[7]; + int CP_HSyncEnd[7], CP_VSyncEnd[7]; + int CP_HBlankStart[7], CP_VBlankStart[7]; + int CP_HBlankEnd[7], CP_VBlankEnd[7]; + int CP_Clock[7]; + BOOLEAN CP_DataValid[7]; + BOOLEAN CP_HSync_P[7], CP_VSync_P[7], CP_SyncValid[7]; +} XGI_Private; + +#endif + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi.h:1.3 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi.h Fri Oct 14 11:16:49 2005 @@ -0,0 +1,1151 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi.h,v 1.3 2005/10/14 15:16:49 tsi Exp $ */ +/* + * Main global data and definitions + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1) Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2) Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3) The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Thomas Winischhofer + * others (old code base) + * + */ +#ifndef _XGI_H_ +#define _XGI_H_ + + +/* #define DEBUG */ + +/* #define DEBUG1 */ + +/*********************************************************************** +#define DDEBUG +#define DEBUG1 +#define DEBUG2 +#define DEBUG3 +#define DEBUG5 +#define DEBUG4 +***********************************************************************/ + +#ifdef DDEBUG +#define PDDEBUG(p) p +#else +#define PDDEBUG(p) +#endif + +#ifdef DEBUG5 +#define PDEBUG5(p) p +#else +#define PDEBUG5(p) +#endif + +#ifdef DEBUG +#define PDEBUG(p) p +#else +#define PDEBUG(p) +#endif + +#ifdef DEBUG1 +#define PDEBUG1(p) p +#else +#define PDEBUG1(p) +#endif + +#ifdef DEBUG2 +#define PDEBUG2(p) p +#else +#define PDEBUG2(p) +#endif + +#ifdef DEBUG3 +#define PDEBUG3(p) p +#else +#define PDEBUG3(p) +#endif + +#ifdef DEBUG4 +#define PDEBUG4(p) p +#else +#define PDEBUG4(p) +#endif + +#include "xgi_ver.h" + +/* Always unlock the registers (should be set!) */ +#define UNLOCK_ALWAYS +/* +#define XGIDRIVERVERSIONYEAR 4 +#define XGIDRIVERVERSIONMONTH 2 +#define XGIDRIVERVERSIONDAY 26 +#define XGIDRIVERREVISION 1 +*/ +#define XGIDRIVERIVERSION (XGIDRIVERVERSIONYEAR << 16) | \ + (XGIDRIVERVERSIONMONTH << 8) | \ + XGIDRIVERVERSIONDAY | \ + (XGIDRIVERREVISION << 24) + +#undef XGI_CP + +#include "xf86Pci.h" +#include "xf86Cursor.h" +#include "xf86_ansic.h" +#include "xf86xv.h" +#include "compiler.h" +#include "xaa.h" +#include "vgaHW.h" +#include "vbe.h" + +#include "xgi_pci.h" + +#include "osdef.h" +#include "vgatypes.h" + +#include "vb_struct.h" +#include "vstruct.h" +#ifdef XF86DRI +#undef XGINEWDRI +#undef XGINEWDRI2 +#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,3,99,14,0) +#define XGINEWDRI +#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,4,99,99,0) /* Adapt this when the time has come */ +#define XGINEWDRI2 +#endif +#endif +#include "xf86drm.h" +#include "sarea.h" +#define _XF86DRI_SERVER_ +#include "xf86dri.h" +#include "dri.h" +#include "GL/glxint.h" +#include "xgi_dri.h" +#endif + +#if 1 +#define XGIDUALHEAD /* Include Dual Head code */ +#endif + +#if 1 +#define XGIMERGED /* Include Merged-FB mode */ +#endif + +#ifdef XGIMERGED +#if 1 +#define XGIXINERAMA /* Include Pseudo-Xinerama for MergedFB mode */ +#define XGI_XINERAMA_MAJOR_VERSION 1 +#define XGI_XINERAMA_MINOR_VERSION 1 +#endif +#endif + +#if 1 +#define XGIGAMMA /* Include code for gamma correction */ +#endif + +#if 1 /* Include code for color hardware cursors */ +#define XGI_ARGB_CURSOR +#endif + +#if 1 /* Include YPbPr support on VB */ +#define ENABLE_YPBPR +#endif + +#ifdef XGIMERGED +#ifdef XGIXINERAMA +#define NEED_REPLIES /* ? */ +#define EXTENSION_PROC_ARGS void * +#include "extnsionst.h" /* required */ +#include /* required */ +#endif +#endif + +#if 1 +#define XGIVRAMQ /* Use VRAM queue mode on 315 series */ +#endif + +#undef XGI315DRI /* define this if dri is adapted for 315/330 series */ + +#ifndef PCI_VENDOR_XGI +#define PCI_VENDOR_XGI 0x18CA +#endif +#ifndef PCI_CHIP_XGIXG40 +#define PCI_CHIP_XGIXG40 0x0040 +#endif +#ifndef PCI_CHIP_XGIXG20 +#define PCI_CHIP_XGIXG20 0x0020 +#endif + +#define CONFIG_DRM_XGI + +#define XGI_NAME "XGI" +#define XGI_DRIVER_NAME "xgi" +/* +#define XGI_MAJOR_VERSION 1 +#define XGI_MINOR_VERSION 1 +#define XGI_PATCHLEVEL 4 +*/ +#define XGI_CURRENT_VERSION ((XGI_MAJOR_VERSION << 16) | \ + (XGI_MINOR_VERSION << 8) | XGI_PATCHLEVEL ) + +/* pXGI->Flags (old series only) */ +#define SYNCDRAM 0x00000001 +#define RAMFLAG 0x00000002 +#define ESS137xPRESENT 0x00000004 +#define SECRETFLAG 0x00000008 +#define A6326REVAB 0x00000010 +#define MMIOMODE 0x00010000 +#define LFBQMODE 0x00020000 +#define AGPQMODE 0x00040000 +#define UMA 0x80000000 + +#define BIOS_BASE 0xC0000 +#define BIOS_SIZE 0x10000 + +#define SR_BUFFER_SIZE 5 +#define CR_BUFFER_SIZE 5 + +#define XGI_VBFlagsVersion 1 + +/* VBFlags - if anything is changed here, increase VBFlagsVersion! */ +#define CRT2_DEFAULT 0x00000001 +#define CRT2_LCD 0x00000002 /* Never change the order of the CRT2_XXX entries */ +#define CRT2_TV 0x00000004 +#define CRT2_VGA 0x00000008 +#define TV_NTSC 0x00000010 +#define TV_PAL 0x00000020 +#define TV_HIVISION 0x00000040 +#define TV_YPBPR 0x00000080 +#define TV_AVIDEO 0x00000100 +#define TV_SVIDEO 0x00000200 +#define TV_SCART 0x00000400 +#define VB_CONEXANT 0x00000800 /* 661 series only */ +#define VB_TRUMPION VB_CONEXANT /* 300 series only */ +#define TV_PALM 0x00001000 +#define TV_PALN 0x00002000 +#define TV_NTSCJ 0x00001000 +#define VB_302ELV 0x00004000 +#define TV_CHSCART 0x00008000 +#define TV_CHYPBPR525I 0x00010000 +#define CRT1_VGA 0x00000000 +#define CRT1_LCDA 0x00020000 +#define VGA2_CONNECTED 0x00040000 +#define DISPTYPE_CRT1 0x00080000 /* CRT1 connected and used */ +#define VB_301 0x00100000 /* Video bridge type */ +#define VB_301B 0x00200000 +#define VB_302B 0x00400000 +#define VB_302 0x00200000 +#define VB_303 0x00400000 +#define VB_30xBDH 0x00800000 /* 30xB DH version (w/o LCD support) */ +#define VB_LVDS 0x01000000 +#define VB_CHRONTEL 0x02000000 +#define VB_301LV 0x04000000 +#define VB_302LV 0x08000000 +#define VB_301C 0x10000000 +#define SINGLE_MODE 0x20000000 /* CRT1 or CRT2; determined by DISPTYPE_CRTx */ +#define MIRROR_MODE 0x40000000 /* CRT1 + CRT2 identical (mirror mode) */ +#define DUALVIEW_MODE 0x80000000 /* CRT1 + CRT2 independent (dual head mode) */ + +/* Aliases: */ +#define CRT2_ENABLE (CRT2_LCD | CRT2_TV | CRT2_VGA) +#define TV_STANDARD (TV_NTSC | TV_PAL | TV_PALM | TV_PALN | TV_NTSCJ) +#define TV_INTERFACE (TV_AVIDEO|TV_SVIDEO|TV_SCART|TV_HIVISION|TV_YPBPR) + +/* Only if TV_YPBPR is set: */ +#define TV_YPBPR525I TV_NTSC +#define TV_YPBPR525P TV_PAL +#define TV_YPBPR750P TV_PALM +#define TV_YPBPR1080I TV_PALN +#define TV_YPBPRALL (TV_YPBPR525I | TV_YPBPR525P | TV_YPBPR750P | TV_YPBPR1080I) + +#define TV_YPBPR43LB TV_CHSCART +#define TV_YPBPR43 TV_CHYPBPR525I +#define TV_YPBPR169 (TV_CHSCART | TV_CHYPBPR525I) +#define TV_YPBPRAR (TV_CHSCART | TV_CHYPBPR525I) + +#define VB_XGIBRIDGE (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV) +#define VB_XGITVBRIDGE (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV) +#define VB_VIDEOBRIDGE (VB_XGIBRIDGE | VB_LVDS | VB_CHRONTEL | VB_CONEXANT) + +#define DISPTYPE_DISP2 CRT2_ENABLE +#define DISPTYPE_DISP1 DISPTYPE_CRT1 +#define VB_DISPMODE_SINGLE SINGLE_MODE /* alias */ +#define VB_DISPMODE_MIRROR MIRROR_MODE /* alias */ +#define VB_DISPMODE_DUAL DUALVIEW_MODE /* alias */ +#define DISPLAY_MODE (SINGLE_MODE | MIRROR_MODE | DUALVIEW_MODE) + +/* pXGI->VBLCDFlags */ +#define VB_LCD_320x480 0x00000001 /* DSTN/FSTN for 550 */ +#define VB_LCD_640x480 0x00000002 +#define VB_LCD_800x600 0x00000004 +#define VB_LCD_1024x768 0x00000008 +#define VB_LCD_1280x1024 0x00000010 +#define VB_LCD_1280x960 0x00000020 +#define VB_LCD_1600x1200 0x00000040 +#define VB_LCD_2048x1536 0x00000080 +#define VB_LCD_1400x1050 0x00000100 +#define VB_LCD_1152x864 0x00000200 +#define VB_LCD_1152x768 0x00000400 +#define VB_LCD_1280x768 0x00000800 +#define VB_LCD_1024x600 0x00001000 +#define VB_LCD_640x480_2 0x00002000 /* DSTN/FSTN */ +#define VB_LCD_640x480_3 0x00004000 /* DSTN/FSTN */ +#define VB_LCD_848x480 0x00008000 /* LVDS only, otherwise handled as custom */ +#define VB_LCD_1280x800 0x00010000 +#define VB_LCD_1680x1050 0x00020000 +#define VB_LCD_1280x720 0x00040000 +#define VB_LCD_BARCO1366 0x20000000 +#define VB_LCD_CUSTOM 0x40000000 +#define VB_LCD_EXPANDING 0x80000000 + +/* PresetMode argument */ +#define XGI_MODE_SIMU 0 +#define XGI_MODE_CRT1 1 +#define XGI_MODE_CRT2 2 + +/* pXGI->MiscFlags */ +#define MISC_CRT1OVERLAY 0x00000001 /* Current display mode supports overlay */ +#define MISC_PANELLINKSCALER 0x00000002 /* Panel link is currently scaling */ +#define MISC_CRT1OVERLAYGAMMA 0x00000004 /* Current display mode supports overlay gamma corr on CRT1 */ +#define MISC_TVNTSC1024 0x00000008 /* Current display mode is TV NTSC/PALM/YPBPR525I 1024x768 */ + + +#define HW_DEVICE_EXTENSION XGI_HW_DEVICE_INFO + +#define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l)) +#define GENMASK(mask) BITMASK(1?mask,0?mask) + +typedef unsigned long ULong; +typedef unsigned short UShort; +typedef unsigned char UChar; + +/* VGA engine types */ +#define UNKNOWN_VGA 0 +#define XGI_530_VGA 1 +#define XGI_OLD_VGA 2 +#define XGI_300_VGA 3 +#define XGI_315_VGA 4 /* Includes 330/660/661/741/760 and M versions thereof */ +#define XGI_XGX_VGA 5 + + +/* oldChipset */ +#define OC_UNKNOWN 0 +#define OC_XGI86201 1 +#define OC_XGI86202 2 +#define OC_XGI6205A 3 +#define OC_XGI6205B 4 +#define OC_XGI82204 5 +#define OC_XGI6205C 6 +#define OC_XGI6225 7 +#define OC_XGI5597 8 +#define OC_XGI6326 9 +#define OC_XGI530A 11 +#define OC_XGI530B 12 +#define OC_XGI620 13 + +/* Chrontel type */ +#define CHRONTEL_700x 0 +#define CHRONTEL_701x 1 + +/* ChipFlags */ +/* Use only lower 16 bit for chip id! (xgictrl) */ +#define XGICF_LARGEOVERLAY 0x00000001 +#define XGICF_Is651 0x00000002 +#define XGICF_IsM650 0x00000004 +#define XGICF_IsM652 0x00000008 +#define XGICF_IsM653 0x00000010 +#define XGICF_Is652 0x00000020 +#define XGICF_Is65x (XGICF_Is651|XGICF_IsM650|XGICF_IsM652|XGICF_IsM653|XGICF_Is652) +#define XGICF_IsM661 0x00000100 /* M661FX */ +#define XGICF_IsM741 0x00000200 +#define XGICF_IsM760 0x00000400 +#define XGICF_IsM661M 0x00000800 /* M661MX */ +#define XGICF_IsM66x (XGICF_IsM661 | XGICF_IsM741 | XGICF_IsM760 | XGICF_IsM661M) +#define XGICF_315Core 0x00010000 /* 3D: Real 315 */ +#define XGICF_Real256ECore 0x00020000 /* 3D: Similar to 315 core, no T&L? (65x, 661, 740, 741) */ +#define XGICF_XabreCore 0x00040000 /* 3D: Real Xabre */ +#define XGICF_Ultra256Core 0x00080000 /* 3D: Similar to Xabre, no T&L?, no P:Shader? (660, 760) */ +#define XGICF_UseLCDA 0x01000000 +#define XGICF_760UMA 0x10000000 /* 760: UMA active */ +#define XGICF_CRT2HWCKaputt 0x20000000 /* CRT2 Mono HWCursor engine buggy */ +#define XGICF_Glamour3 0x40000000 +#define XGICF_Integrated 0x80000000 + +/* Direct Xv-API */ +#define XGI_SD_IS300SERIES 0x00000001 +#define XGI_SD_IS315SERIES 0x00000002 +#define XGI_SD_IS330SERIES 0x00000004 +#define XGI_SD_SUPPORTPALMN 0x00000008 /* tv chip supports pal-m, pal-n */ +#define XGI_SD_SUPPORT2OVL 0x00000010 /* set = 2 overlays, clear = support SWITCHCRT xv prop */ +#define XGI_SD_SUPPORTTVPOS 0x00000020 /* supports changing tv position */ +#define XGI_SD_ISDUALHEAD 0x00000040 /* Driver is in dual head mode */ +#define XGI_SD_ISMERGEDFB 0x00000080 /* Driver is in merged fb mode */ +#define XGI_SD_ISDHSECONDHEAD 0x00000100 /* Dual head: This is CRT1 (=second head) */ +#define XGI_SD_ISDHXINERAMA 0x00000200 /* Dual head: We are running Xinerama */ +#define XGI_SD_VBHASSCART 0x00000400 /* videobridge has SCART instead of VGA2 */ +#define XGI_SD_ISDEPTH8 0x00000800 /* Depth is 8, no independent gamma correction */ +#define XGI_SD_SUPPORTSOVER 0x00001000 /* Support for Chrontel Super Overscan */ +#define XGI_SD_ENABLED 0x00002000 /* xgictrl is enabled (by option) */ +#define XGI_SD_PSEUDOXINERAMA 0x00004000 /* pseudo xinerama is active */ +#define XGI_SD_SUPPORTLCDA 0x00008000 /* Support LCD Channel A */ +#define XGI_SD_SUPPORTNTSCJ 0x00010000 /* tv chip supports ntsc-j */ +#define XGI_SD_ADDLSUPFLAG 0x00020000 /* 1 = the following flags are valid */ +#define XGI_SD_SUPPORTVGA2 0x00040000 /* CRT2=VGA supported */ +#define XGI_SD_SUPPORTSCART 0x00080000 /* CRT2=SCART supported */ +#define XGI_SD_SUPPORTOVERSCAN 0x00100000 /* Overscan flag supported */ +#define XGI_SD_SUPPORTXVGAMMA1 0x00200000 /* Xv Gamma correction for CRT1 supported */ +#define XGI_SD_SUPPORTTV 0x00400000 /* CRT2=TV supported */ +#define XGI_SD_SUPPORTYPBPR 0x00800000 /* CRT2=YPbPr (525i, 525p, 750p, 1080i) is supported */ +#define XGI_SD_SUPPORTHIVISION 0x01000000 /* CRT2=HiVision is supported */ +#define XGI_SD_SUPPORTYPBPRAR 0x02000000 /* YPbPr aspect ratio is supported */ +#define XGI_SD_SUPPORTSCALE 0x04000000 /* Scaling of LCD panel supported */ +#define XGI_SD_SUPPORTCENTER 0x08000000 /* If scaling supported: Centering of screen [NOT] supported (TMDS only) */ + +#define XGI_DIRECTKEY 0x03145792 + +/* XGICtrl: Check mode for CRT2 */ +#define XGI_CF2_LCD 0x01 +#define XGI_CF2_TV 0x02 +#define XGI_CF2_VGA2 0x04 +#define XGI_CF2_TVPAL 0x08 +#define XGI_CF2_TVNTSC 0x10 /* + NTSC-J */ +#define XGI_CF2_TVPALM 0x20 +#define XGI_CF2_TVPALN 0x40 +#define XGI_CF2_CRT1LCDA 0x80 +#define XGI_CF2_TYPEMASK (XGI_CF2_LCD | XGI_CF2_TV | XGI_CF2_VGA2 | XGI_CF2_CRT1LCDA) +#define XGI_CF2_TVSPECIAL (XGI_CF2_LCD | XGI_CF2_TV) +#define XGI_CF2_TVSPECMASK (XGI_CF2_TVPAL | XGI_CF2_TVNTSC | XGI_CF2_TVPALM | XGI_CF2_TVPALN) +#define XGI_CF2_TVHIVISION XGI_CF2_TVPAL +#define XGI_CF2_TVYPBPR525I XGI_CF2_TVNTSC +#define XGI_CF2_TVYPBPR525P (XGI_CF2_TVPAL | XGI_CF2_TVNTSC) +#define XGI_CF2_TVYPBPR750P XGI_CF2_TVPALM +#define XGI_CF2_TVYPBPR1080I (XGI_CF2_TVPALM | XGI_CF2_TVPAL) + +/* AGP stuff for DRI */ +#define AGP_PAGE_SIZE 4096 +#define AGP_PAGES 2048 /* Default: 2048 pages @ 4096 = 8MB */ +/* 300 */ +#define AGP_CMDBUF_PAGES 256 +#define AGP_CMDBUF_SIZE (AGP_PAGE_SIZE * AGP_CMDBUF_PAGES) +/* 315/330 */ +#define AGP_VTXBUF_PAGES 512 +#define AGP_VTXBUF_SIZE (AGP_PAGE_SIZE * AGP_VTXBUF_PAGES) + +#define VOLARI_CQSIZE (1024*1024) +#define VOLARI_CQSIZEXG20 (128*1024) +#define VOLARI_CURSOR_SHAPE_SIZE (64*64*4) + +/* For backup of register contents */ +typedef struct { + unsigned char xgiRegs3C4[0x50]; + unsigned char xgiRegs3D4[0x90]; + unsigned char xgiRegs3C2; + unsigned char xgiCapt[0x60]; + unsigned char xgiVid[0x50]; + unsigned char VBPart1[0x50]; + unsigned char VBPart2[0x100]; + unsigned char VBPart3[0x50]; + unsigned char VBPart4[0x50]; + unsigned short ch70xx[64]; + unsigned long xgiMMIO85C0; + unsigned char xgi6326tv[0x46]; + unsigned long xgiRegsPCI50, xgiRegsPCIA0; +} XGIRegRec, *XGIRegPtr; + +typedef struct _xgiModeInfoPtr { + int width; + int height; + int bpp; + int n; + struct _xgiModeInfoPtr *next; +} xgiModeInfoRec, *xgiModeInfoPtr; + +/* XGIFBLayout is mainly there because of DGA. It holds the + * current layout parameters needed for acceleration and other + * stuff. When switching mode using DGA, these are set up + * accordingly and not necessarily match pScrn's. Therefore, + * driver modules should read these values instead of pScrn's. + */ +typedef struct { + int bitsPerPixel; /* = pScrn->bitsPerPixel */ + int depth; /* = pScrn->depth */ + int displayWidth; /* = pScrn->displayWidth */ + DisplayModePtr mode; /* = pScrn->currentMode */ +} XGIFBLayout; + +/* Dual head private entity structure */ +#ifdef XGIDUALHEAD +typedef struct { + ScrnInfoPtr pScrn_1; + ScrnInfoPtr pScrn_2; + unsigned char * BIOS; + XGI_Private * XGI_Pr; + unsigned long agpHandle; + unsigned long agpAddr; + unsigned char *agpBase; + unsigned int agpSize; + unsigned int agpWantedSize; + unsigned int agpWantedPages; + unsigned long agpCmdBufAddr; /* 300 series */ + unsigned char *agpCmdBufBase; + unsigned int agpCmdBufSize; + unsigned int agpCmdBufFree; + unsigned long agpVtxBufAddr; /* 315 series */ + unsigned char *agpVtxBufBase; + unsigned int agpVtxBufSize; + unsigned int agpVtxBufFree; +#ifdef XF86DRI + xgiRegion agp; + int drmSubFD; +#endif + Bool AGPInitOK; + int CRT1ModeNo; /* Current display mode for CRT1 */ + DisplayModePtr CRT1DMode; /* Current display mode for CRT1 */ + int CRT2ModeNo; /* Current display mode for CRT2 */ + DisplayModePtr CRT2DMode; /* Current display mode for CRT2 */ + Bool CRT2ModeSet; /* CRT2 mode has been set */ + Bool CRT2IsCustom; + unsigned char CRT2CR30, CRT2CR31, CRT2CR35, CRT2CR38; + int refCount; + int lastInstance; /* number of entities */ + Bool DisableDual; /* Emergency flag */ + Bool ErrorAfterFirst; /* Emergency flag: Error after first init -> Abort second */ + Bool HWCursor; /* Backup master settings for use on slave */ + Bool TurboQueue; + int ForceCRT1Type; + int ForceCRT2Type; + int OptTVStand; + int OptTVOver; + int OptTVSOver; + int OptROMUsage; + int OptUseOEM; + Bool NoAccel; + int forceCRT1; + int DSTN, FSTN; + Bool XvOnCRT2; + int maxUsedClock; /* Max used pixelclock on master head */ + unsigned long masterFbAddress; /* Framebuffer addresses and sizes */ + unsigned long masterFbSize; + unsigned long slaveFbAddress; + unsigned long slaveFbSize; + unsigned char * FbBase; /* VRAM linear address */ + unsigned char * IOBase; /* MMIO linear address */ + unsigned short MapCountIOBase; /* map/unmap queue counter */ + unsigned short MapCountFbBase; /* map/unmap queue counter */ + Bool forceUnmapIOBase; /* ignore counter and unmap */ + Bool forceUnmapFbBase; /* ignore counter and unmap */ +#ifdef __alpha__ + unsigned char * IOBaseDense; /* MMIO for Alpha platform */ + unsigned short MapCountIOBaseDense; + Bool forceUnmapIOBaseDense; /* ignore counter and unmap */ +#endif + int chtvlumabandwidthcvbs; /* TV settings for Chrontel TV encoder */ + int chtvlumabandwidthsvideo; + int chtvlumaflickerfilter; + int chtvchromabandwidth; + int chtvchromaflickerfilter; + int chtvcvbscolor; + int chtvtextenhance; + int chtvcontrast; + int xgitvedgeenhance; /* TV settings for bridge */ + int xgitvantiflicker; + int xgitvsaturation; + int xgitvcolcalibc; + int xgitvcolcalibf; + int xgitvcfilter; + int xgitvyfilter; + int tvxpos, tvypos; + int tvxscale, tvyscale; + int ForceTVType, SenseYPbPr; + unsigned long ForceYPbPrType, ForceYPbPrAR; + int chtvtype; + int NonDefaultPAL, NonDefaultNTSC; + unsigned short tvx, tvy; + unsigned char p2_01, p2_02, p2_1f, p2_20, p2_43, p2_42, p2_2b; + unsigned char p2_44, p2_45, p2_46; + unsigned long xgitvccbase; + unsigned char p2_35, p2_36, p2_37, p2_38, p2_48, p2_49, p2_4a; + unsigned char p2_0a, p2_2f, p2_30, p2_47; + unsigned char scalingp1[9], scalingp4[9], scalingp2[64]; + unsigned short cursorBufferNum; + BOOLEAN restorebyset; + BOOLEAN CRT1gamma, CRT1gammaGiven, CRT2gamma, XvGamma, XvGammaGiven; + int XvGammaRed, XvGammaGreen, XvGammaBlue; + int GammaBriR, GammaBriG, GammaBriB; /* strictly for Xinerama */ + int GammaPBriR, GammaPBriG, GammaPBriB; /* strictly for Xinerama */ + int curxvcrtnum; + int UsePanelScaler, CenterLCD; + int AllowHotkey; + BOOLEAN enablexgictrl; + unsigned long cmdQ_SharedWritePort_2D; + unsigned char *RenderAccelArray; + unsigned char * FbBase1; + unsigned long OnScreenSize1; + unsigned char OldMode; + int HWCursorMBufNum, HWCursorCBufNum; + BOOLEAN ROM661New; +#ifdef XGI_CP + XGI_CP_H_ENT +#endif +} XGIEntRec, *XGIEntPtr; +#endif + +#define XGIPTR(p) ((XGIPtr)((p)->driverPrivate)) +#define XAAPTR(p) ((XAAInfoRecPtr)(XGIPTR(p)->AccelInfoPtr)) + +#define ExtRegSize 0x40 + +/* Relative merge position */ +typedef enum { + xgiLeftOf, + xgiRightOf, + xgiAbove, + xgiBelow, + xgiClone +} XGIScrn2Rel; + +typedef struct { + ScrnInfoPtr pScrn; /* -------------- DON'T INSERT ANYTHING HERE --------------- */ + pciVideoPtr PciInfo; /* -------- OTHERWISE xgi_dri.so MUST BE RECOMPILED -------- */ + PCITAG PciTag; + EntityInfoPtr pEnt; + int Chipset; + int ChipRev; + int VGAEngine; /* see above */ + int hasTwoOverlays; /* Chipset supports two video overlays? */ + XGI_Private * XGI_Pr; /* For new mode switching code */ + int DSTN; /* For 550 FSTN/DSTN; set by option, no detection */ + unsigned long FbAddress; /* VRAM physical address (in DHM: for each Fb!) */ + unsigned long realFbAddress; /* For DHM/PCI mem mapping: store global FBAddress */ + unsigned char * FbBase; /* VRAM virtual linear address */ + CARD32 IOAddress; /* MMIO physical address */ + unsigned char * IOBase; /* MMIO linear address */ + IOADDRESS IODBase; /* Base of PIO memory area */ +#ifdef __alpha__ + unsigned char * IOBaseDense; /* MMIO for Alpha platform */ +#endif + XGIIOADDRESS RelIO; /* Relocated IO Ports baseaddress */ + unsigned char * BIOS; + int MemClock; + int BusWidth; + int MinClock; + int MaxClock; + int Flags; /* HW config flags */ + long FbMapSize; /* Used for Mem Mapping - DON'T CHANGE THIS */ + long availMem; /* Really available Fb mem (minus TQ, HWCursor) */ + unsigned long maxxfbmem; /* limit fb memory X is to use to this (KB) */ + unsigned long xgifbMem; /* heapstart of xgifb (if running) */ +#ifdef XGIDUALHEAD + unsigned long dhmOffset; /* Offset to memory for each head (0 or ..) */ +#endif + DGAModePtr DGAModes; + int numDGAModes; + Bool DGAactive; + int DGAViewportStatus; + unsigned char OldMode; /* Back old modeNo (if available) */ + Bool NoAccel; + Bool NoXvideo; + Bool XvOnCRT2; /* see xgi_opt.c */ + Bool HWCursor; + Bool UsePCIRetry; + Bool TurboQueue; + int VESA; + int ForceCRT1Type; + int ForceCRT2Type; + int OptTVStand; + int OptTVOver; + int OptROMUsage; + int UseCHOverScan; + Bool ValidWidth; + Bool FastVram; /* now unused */ + int forceCRT1; + Bool CRT1changed; + unsigned char oldCR17, oldCR63, oldSR1F; + unsigned char oldCR32, oldCR36, oldCR37; + unsigned char myCR32, myCR36, myCR37, myCR63; + unsigned char newCR32; + unsigned long VBFlags; /* Video bridge configuration */ + unsigned long VBFlags_backup; /* Backup for SlaveMode-modes */ + unsigned long VBLCDFlags; /* Moved LCD panel size bits here */ + int ChrontelType; /* CHRONTEL_700x or CHRONTEL_701x */ + unsigned int PDC, PDCA; /* PanelDelayCompensation */ + short scrnOffset; /* Screen pitch (data) */ + short scrnPitch; /* Screen pitch (display; regarding interlace) */ + unsigned long DstColor; + int xcurrent; /* for temp use in accel */ + int ycurrent; /* for temp use in accel */ + long XGI310_AccelDepth; /* used in accel for 315 series */ + int Xdirection; /* for temp use in accel */ + int Ydirection; /* for temp use in accel */ + int xgiPATternReg[4]; + int ROPReg; + int CommandReg; + int MaxCMDQueueLen; + int CurCMDQueueLen; + int MinCMDQueueLen; + CARD16 CursorSize; /* Size of HWCursor area (bytes) */ + CARD32 cursorOffset; /* see xgi_driver.c and xgi_cursor.c */ + int DstX; + int DstY; + unsigned char * XAAScanlineColorExpandBuffers[2]; + CARD32 AccelFlags; + Bool ClipEnabled; + Bool DoColorExpand; + Bool ColorExpandBusy; + Bool alphaBlitBusy; + XGIRegRec SavedReg; + XGIRegRec ModeReg; + xf86CursorInfoPtr CursorInfoPtr; + XAAInfoRecPtr AccelInfoPtr; + CloseScreenProcPtr CloseScreen; + Bool (*ModeInit)(ScrnInfoPtr pScrn, DisplayModePtr mode); + void (*XGISave)(ScrnInfoPtr pScrn, XGIRegPtr xgireg); + void (*XGISave2)(ScrnInfoPtr pScrn, XGIRegPtr xgireg); + void (*XGISave3)(ScrnInfoPtr pScrn, XGIRegPtr xgireg); + void (*XGISaveLVDSChrontel)(ScrnInfoPtr pScrn, XGIRegPtr xgireg); + void (*XGIRestore)(ScrnInfoPtr pScrn, XGIRegPtr xgireg); + void (*XGIRestore2)(ScrnInfoPtr pScrn, XGIRegPtr xgireg); + void (*XGIRestore3)(ScrnInfoPtr pScrn, XGIRegPtr xgireg); + void (*XGIRestoreLVDSChrontel)(ScrnInfoPtr pScrn, XGIRegPtr xgireg); + void (*LoadCRT2Palette)(ScrnInfoPtr pScrn, int numColors, + int *indicies, LOCO *colors, VisualPtr pVisual); + + int cmdQueueLen; /* Current cmdQueueLength (for 2D and 3D) */ + unsigned long cmdQueueLenMax; + unsigned long cmdQueueLenMin; + unsigned char *cmdQueueBase; + int *cmdQueueLenPtr; /* Ptr to variable holding the current queue length */ + int *cmdQueueLenPtrBackup; /* Backup for DRI init/restore */ + unsigned int cmdQueueOffset; + unsigned int cmdQueueSize; + unsigned long cmdQueueSizeMask; + unsigned long cmdQ_SharedWritePort_2D; + unsigned long *cmdQ_SharedWritePort; + unsigned long *cmdQ_SharedWritePortBackup; + unsigned int cmdQueueSize_div2; + unsigned int cmdQueueSize_div4; + unsigned int cmdQueueSize_4_3; + unsigned long agpHandle; + unsigned long agpAddr; + unsigned char *agpBase; + unsigned int agpSize; + unsigned int agpWantedSize; + unsigned int agpWantedPages; + unsigned long agpCmdBufAddr; /* 300 series */ + unsigned char *agpCmdBufBase; + unsigned int agpCmdBufSize; + unsigned int agpCmdBufFree; + unsigned long agpVtxBufAddr; /* 315 series */ + unsigned char *agpVtxBufBase; + unsigned int agpVtxBufSize; + unsigned int agpVtxBufFree; +#ifdef XF86DRI + xgiRegion agp; +#endif + Bool AGPInitOK; + Bool irqEnabled; + int irq; + Bool IsAGPCard; + unsigned long DRIheapstart, DRIheapend; + + void (*RenderCallback)(ScrnInfoPtr); + Time RenderTime; + unsigned char *RenderAccelArray; + Bool doRender; + + int ColorExpandRingHead; + int ColorExpandRingTail; + int PerColorExpandBufferSize; + int ColorExpandBufferNumber; + int ColorExpandBufferCountMask; + unsigned char *ColorExpandBufferAddr[32]; + int ColorExpandBufferScreenOffset[32]; + long ColorExpandBase; + int ImageWriteBufferSize; + unsigned char *ImageWriteBufferAddr; + + int Rotate; + void (*PointerMoved)(int index, int x, int y); + + /* ShadowFB support */ + Bool ShadowFB; + unsigned char *ShadowPtr; + int ShadowPitch; + + Bool loadDRI; + +#ifdef XF86DRI + Bool directRenderingEnabled; + DRIInfoPtr pDRIInfo; + int drmSubFD; + int numVisualConfigs; + __GLXvisualConfig* pVisualConfigs; + XGIConfigPrivPtr pVisualConfigsPriv; + XGIRegRec DRContextRegs; +#endif + + HW_DEVICE_EXTENSION xgi_HwDevExt; /* For new mode switching code */ + /* XGI_HW_DEVICE_INFO HwDeviceExtension ; *//* Never Used */ + VB_DEVICE_INFO VBInfo ; + PVB_DEVICE_INFO pVBInfo ; + + XF86VideoAdaptorPtr adaptor; + ScreenBlockHandlerProcPtr BlockHandler; + void (*VideoTimerCallback)(ScrnInfoPtr, Time); + void (*ResetXv)(ScrnInfoPtr); + void (*ResetXvGamma)(ScrnInfoPtr); + + OptionInfoPtr Options; + unsigned char LCDon; +#ifdef XGIDUALHEAD + Bool BlankCRT1, BlankCRT2; +#endif + Bool Blank; + unsigned char BIOSModeSave; + int CRT1off; /* 1=CRT1 off, 0=CRT1 on */ + CARD16 LCDheight; /* Vertical resolution of LCD panel */ + CARD16 LCDwidth; /* Horizontal resolution of LCD panel */ + vbeInfoPtr pVbe; /* For VESA mode switching */ + CARD16 vesamajor; + CARD16 vesaminor; + int UseVESA; + xgiModeInfoPtr XGIVESAModeList; + xf86MonPtr monitor; + CARD16 maxBytesPerScanline; + CARD32 *pal, *savedPal; + int mapPhys, mapOff, mapSize; + int statePage, stateSize, stateMode; + CARD8 *fonts; + CARD8 *state, *pstate; + void *base, *VGAbase; +#ifdef XGIDUALHEAD + BOOL DualHeadMode; /* TRUE if we use dual head mode */ + BOOL SecondHead; /* TRUE is this is the second head */ + XGIEntPtr entityPrivate; /* Ptr to private entity (see above) */ + BOOL xgiXinerama; /* Do we use Xinerama mode? */ +#endif + XGIFBLayout CurrentLayout; /* Current framebuffer layout */ + USHORT XGI_DDC2_Index; + USHORT XGI_DDC2_Data; + USHORT XGI_DDC2_Clk; + BOOL Primary; /* Display adapter is primary */ + xf86Int10InfoPtr pInt; /* Our int10 */ + int oldChipset; /* Type of old chipset */ + int RealVideoRam; /* 6326 can only address 4MB, but TQ can be above */ + CARD32 CmdQueLenMask; /* Mask of queue length in MMIO register */ + CARD32 CmdQueLenFix; /* Fix value to subtract from QueLen (530/620) */ + CARD32 CmdQueMaxLen; /* (6326/5597/5598) Amount of cmds the queue can hold */ + CARD32 TurboQueueLen; /* For future use */ + CARD32 detectedCRT2Devices; /* detected CRT2 devices before mask-out */ + Bool NoHostBus; /* Enable/disable 5597/5598 host bus */ + Bool noInternalModes; /* Use our own default modes? */ + int OptUseOEM; /* Use internal OEM data? */ + int chtvlumabandwidthcvbs; /* TV settings for Chrontel TV encoder */ + int chtvlumabandwidthsvideo; + int chtvlumaflickerfilter; + int chtvchromabandwidth; + int chtvchromaflickerfilter; + int chtvcvbscolor; + int chtvtextenhance; + int chtvcontrast; + int xgitvedgeenhance; /* TV settings for bridges */ + int xgitvantiflicker; + int xgitvsaturation; + int xgitvcolcalibc; + int xgitvcolcalibf; + int xgitvcfilter; + int xgitvyfilter; + int OptTVSOver; /* Chrontel 7005: Superoverscan */ + int tvxpos, tvypos; + int tvxscale, tvyscale; + int XGI6326Flags; /* 6326 TV settings */ + int xgi6326enableyfilter; + int xgi6326yfilterstrong; + int xgi6326tvplug; + int xgi6326fscadjust; + BOOL xgifbfound; + BOOL donttrustpdc; /* Don't trust the detected PDC */ + unsigned char xgifbpdc, xgifbpdca; + unsigned char xgifblcda; + int xgifbscalelcd; + unsigned long xgifbspecialtiming; + BOOL xgifb_haveemi, xgifb_haveemilcd; + unsigned char xgifb_emi30,xgifb_emi31,xgifb_emi32,xgifb_emi33; + int EMI; + int NoYV12; /* Disable Xv YV12 support (old series) */ + unsigned char postVBCR32; + int newFastVram; /* Replaces FastVram */ + int ForceTVType, SenseYPbPr; + int NonDefaultPAL, NonDefaultNTSC; + unsigned long ForceYPbPrType, ForceYPbPrAR; + unsigned long lockcalls; /* Count unlock calls for debug */ + unsigned short tvx, tvy; /* Backup TV position registers */ + unsigned char p2_01, p2_02, p2_1f, p2_20, p2_43, p2_42, p2_2b; /* Backup TV position registers */ + unsigned short tvx1, tvx2, tvx3, tvy1; /* Backup TV position registers */ + unsigned char p2_44, p2_45, p2_46; + unsigned long xgitvccbase; + unsigned char p2_35, p2_36, p2_37, p2_38, p2_48, p2_49, p2_4a; + unsigned char p2_0a, p2_2f, p2_30, p2_47; + unsigned char scalingp1[9], scalingp4[9], scalingp2[64]; + BOOLEAN ForceCursorOff; + BOOLEAN HaveCustomModes; + BOOLEAN IsCustom; + DisplayModePtr backupmodelist; + int chtvtype; + Atom xvBrightness, xvContrast, xvColorKey, xvHue, xvSaturation; + Atom xvAutopaintColorKey, xvSetDefaults, xvSwitchCRT; + Atom xvDisableGfx, xvDisableGfxLR, xvTVXPosition, xvTVYPosition; + Atom xvDisableColorkey, xvUseChromakey, xvChromaMin, xvChromaMax; + Atom xvInsideChromakey, xvYUVChromakey; + Atom xvGammaRed, xvGammaGreen, xvGammaBlue; + Atom xv_QVF, xv_QVV, xv_USD, xv_SVF, xv_QDD, xv_TAF, xv_TSA, xv_TEE, xv_GSF; + Atom xv_TTE, xv_TCO, xv_TCC, xv_TCF, xv_TLF, xv_CMD, xv_CMDR, xv_CT1, xv_SGA; + Atom xv_GDV, xv_GHI, xv_OVR, xv_GBI, xv_TXS, xv_TYS, xv_CFI, xv_COC, xv_COF; + Atom xv_YFI, xv_GSS, xv_BRR, xv_BRG, xv_BRB, xv_PBR, xv_PBG, xv_PBB, xv_SHC; + Atom xv_BRR2, xv_BRG2, xv_BRB2, xv_PBR2, xv_PBG2, xv_PBB2, xv_PMD; +#ifdef TWDEBUG + Atom xv_STR; +#endif + int xv_xgidirectunlocked; + unsigned long xv_sd_result; + int CRT1isoff; +#ifdef XGI_CP + XGI_CP_H +#endif + unsigned long ChipFlags; + unsigned long XGI_SD_Flags; + BOOLEAN UseHWARGBCursor; + int OptUseColorCursor; + int OptUseColorCursorBlend; + CARD32 OptColorCursorBlendThreshold; + unsigned short cursorBufferNum; + int vb; + BOOLEAN restorebyset; + BOOLEAN nocrt2ddcdetection; + BOOLEAN forcecrt2redetection; + BOOLEAN CRT1gamma, CRT1gammaGiven, CRT2gamma, XvGamma, XvGammaGiven; + int XvDefCon, XvDefBri, XvDefHue, XvDefSat; + BOOLEAN XvDefDisableGfx, XvDefDisableGfxLR; + BOOLEAN XvUseMemcpy; + BOOLEAN XvUseChromaKey, XvDisableColorKey; + BOOLEAN XvInsideChromaKey, XvYUVChromaKey; + int XvChromaMin, XvChromaMax; + int XvGammaRed, XvGammaGreen, XvGammaBlue; + int XvGammaRedDef, XvGammaGreenDef, XvGammaBlueDef; + CARD8 XvGammaRampRed[256], XvGammaRampGreen[256], XvGammaRampBlue[256]; + BOOLEAN disablecolorkeycurrent; + CARD32 colorKey; + CARD32 MiscFlags; + int UsePanelScaler, CenterLCD; + FBLinearPtr AccelLinearScratch; + void (*AccelRenderCallback)(ScrnInfoPtr); + float zClearVal; + unsigned long bClrColor, dwColor; + int AllowHotkey; + BOOLEAN enablexgictrl; + short Video_MaxWidth, Video_MaxHeight; + int FSTN; + BOOLEAN AddedPlasmaModes; + short scrnPitch2; + CARD32 CurFGCol, CurBGCol; + unsigned char * CurMonoSrc; + CARD32 * CurARGBDest; + int GammaBriR, GammaBriG, GammaBriB; + int GammaPBriR, GammaPBriG, GammaPBriB; + Bool HideHWCursor; /* Custom application */ + Bool HWCursorIsVisible; + unsigned long HWCursorBackup[16]; + int HWCursorMBufNum, HWCursorCBufNum; + unsigned long mmioSize; + BOOLEAN ROM661New; +#ifdef XGIMERGED + Bool MergedFB, MergedFBAuto; + XGIScrn2Rel CRT2Position; + char * CRT2HSync; + char * CRT2VRefresh; + char * MetaModes; + ScrnInfoPtr CRT2pScrn; + DisplayModePtr CRT1Modes; + DisplayModePtr CRT1CurrentMode; + int CRT1frameX0; + int CRT1frameY0; + int CRT1frameX1; + int CRT1frameY1; + Bool CheckForCRT2; + Bool IsCustomCRT2; + BOOLEAN HaveCustomModes2; + int maxCRT1_X1, maxCRT1_X2, maxCRT1_Y1, maxCRT1_Y2; + int maxCRT2_X1, maxCRT2_X2, maxCRT2_Y1, maxCRT2_Y2; + int maxClone_X1, maxClone_X2, maxClone_Y1, maxClone_Y2; + int MergedFBXDPI, MergedFBYDPI; +#ifdef XGIXINERAMA + Bool UsexgiXinerama; + Bool CRT2IsScrn0; + ExtensionEntry *XineramaExtEntry; + int xgiXineramaVX, xgiXineramaVY; + Bool AtLeastOneNonClone; +#endif +#endif + unsigned CursorOffset ; + + /* Added for 3D */ + unsigned long cmdQueue_shareWP_only2D; + unsigned long *pCQ_shareWritePort; + void (*SetThreshold)(ScrnInfoPtr pScrn, DisplayModePtr mode, + unsigned short *Low, unsigned short *High); + + XGI_DSReg SRList[ExtRegSize] ; + XGI_DSReg CRList[ExtRegSize] ; +} XGIRec, *XGIPtr; + +#define SEQ_ADDRESS_PORT 0x0014 +#define MISC_OUTPUT_REG_WRITE_PORT 0x0012 +#define MISC_OUTPUT_REG_READ_PORT 0x001C +#define GRAPH_ADDRESS_PORT 0x001E +#define VIDEO_SUBSYSTEM_ENABLE_PORT 0x0013 +#define CRTC_ADDRESS_PORT_COLOR 0x0024 +#define PCI_COMMAND 0x04 + +#define SDMPTR(x) ((XGIMergedDisplayModePtr)(x->currentMode->Private)) +#define CDMPTR ((XGIMergedDisplayModePtr)(pXGI->CurrentLayout.mode->Private)) + +#define BOUND(test,low,hi) { \ + if(test < low) test = low; \ + if(test > hi) test = hi; } + +#define REBOUND(low,hi,test) { \ + if(test < low) { \ + hi += test-low; \ + low = test; } \ + if(test > hi) { \ + low += test-hi; \ + hi = test; } } + +typedef struct _MergedDisplayModeRec { + DisplayModePtr CRT1; + DisplayModePtr CRT2; + XGIScrn2Rel CRT2Position; +} XGIMergedDisplayModeRec, *XGIMergedDisplayModePtr; + + +typedef struct _region { + int x0,x1,y0,y1; +} region; + +typedef struct _myhddctiming { + int whichone; + unsigned char mask; + float rate; +} myhddctiming; + +typedef struct _myvddctiming { + int whichone; + unsigned char mask; + int rate; +} myvddctiming; + +typedef struct _myddcstdmodes { + int hsize; + int vsize; + int refresh; + float hsync; +} myddcstdmodes; + +typedef struct _pdctable { + int subsysVendor; + int subsysCard; + int pdc; + char *vendorName; + char *cardName; +} pdctable; + +typedef struct _chswtable { + int subsysVendor; + int subsysCard; + char *vendorName; + char *cardName; +} chswtable; + +typedef struct _customttable { + unsigned short chipID; + char *biosversion; + char *biosdate; + unsigned long bioschksum; + unsigned short biosFootprintAddr[5]; + unsigned char biosFootprintData[5]; + unsigned short pcisubsysvendor; + unsigned short pcisubsyscard; + char *vendorName; + char *cardName; + unsigned long SpecialID; + char *optionName; +} customttable; + +#ifdef XGIMERGED +#ifdef XGIXINERAMA +typedef struct _xgiXineramaData { + int x; + int y; + int width; + int height; +} xgiXineramaData; +#endif +#endif + +extern void xgiSaveUnlockExtRegisterLock(XGIPtr pXGI, unsigned char *reg1, unsigned char *reg2); +extern void xgiRestoreExtRegisterLock(XGIPtr pXGI, unsigned char reg1, unsigned char reg2); +extern void xgiOptions(ScrnInfoPtr pScrn); +extern const OptionInfoRec * XGIAvailableOptions(int chipid, int busid); +extern void XGISetup(ScrnInfoPtr pScrn); +extern void XGIVGAPreInit(ScrnInfoPtr pScrn); +extern Bool XGIAccelInit(ScreenPtr pScreen); +extern Bool XGIHWCursorInit(ScreenPtr pScreen); +extern Bool XGIDGAInit(ScreenPtr pScreen); +extern void XGIInitVideo(ScreenPtr pScreen); + +extern Bool XGISwitchCRT2Type(ScrnInfoPtr pScrn, unsigned long newvbflags); + +extern Bool XGISwitchCRT1Status(ScrnInfoPtr pScrn, int onoff); +extern int XGI_GetCHTVlumabandwidthcvbs(ScrnInfoPtr pScrn); + +int XG40Mclk(XGIPtr pXGI); + +Bool XGI_InitHwDevInfo(ScrnInfoPtr pScrn) ; + +void XGINew_InitVBIOSData(PXGI_HW_DEVICE_INFO HwDeviceExtension, PVB_DEVICE_INFO pVBInfo) ; + +int XGI_compute_vclk(int Clock, int *out_n, int *out_dn, int *out_div, + int *out_sbit, int *out_scale); + +void XGI_vWaitCRT1VerticalRetrace(ScrnInfoPtr pScrn) ; +void XGIDelayUS(int us); + +Bool Volari_AccelInit(ScreenPtr pScreen) ; +/* void XGI_UnLockCRT2(PXGI_HW_DEVICE_INFO,USHORT BaseAddr);*/ +/* void XGI_LockCRT2(PXGI_HW_DEVICE_INFO,USHORT BaseAddr); */ +/* void XGI_DisableBridge(PXGI_HW_DEVICE_INFO,USHORT BaseAddr); */ +/* void XGI_EnableBridge(PXGI_HW_DEVICE_INFO,USHORT BaseAddr); */ +void Volari_DisableAccelerator(ScrnInfoPtr pScrn); + +#endif + +#ifdef DEBUG +void XGIDumpRegs(ScrnInfoPtr pScrn) ; +#endif Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi.man diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi.man:1.2 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi.man Tue Apr 11 21:39:22 2006 @@ -0,0 +1,35 @@ +.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi.man,v 1.2 2006/04/12 01:39:22 dawes Exp $ +.\" shorthand for double quote that works everywhere. +.ds q \N'34' +.TH XGI __drivermansuffix__ __vendorversion__ +.SH NAME +xgi \- XGI video driver +.SH SYNOPSIS +.nf +.B "Section \*qDevice\*q" +.BI " Identifier \*q" devname \*q +.B " Driver \*qxgi\*q" +\ \ ... +.B EndSection +.fi +.SH DESCRIPTION +.B xgi +is an XFree86 driver for XGI (Xabre Graphics Inc) video chips. The +driver is accelerated, and provides support for colordepths of 8, 16 and 24 bpp. +XVideo, Render and other extensions are supported as well. +.SH SUPPORTED HARDWARE +The +.B xgi +driver supports PCI and AGP video cards based on the following chipsets: +.PP +.B Volari V3XT/V5/V8 +.B Volari Z7 +.SH CONFIGURATION DETAILS +Please refer to XF86Config(__filemansuffix__) for general configuration +details. This section only covers configuration details specific to this +driver. +.SH "SEE ALSO" +XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__) +.SH AUTHORS +Authors include: Alan Hourihane, Mike Chapman, Juanjo Santamarta, Mitani +Hiroshi, David Thomas, Sung-Ching Lin, Ademar Reis, Thomas Winischhofer Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.c:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.c Mon May 2 09:28:02 2005 @@ -0,0 +1,720 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.c,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ +/* + + * + * Copyright (C) 1998, 1999 by Alan Hourihane, Wigan, England. + * Parts Copyright (C) 2001-2004 Thomas Winischhofer, Vienna, Austria. + * + * Licensed under the following terms: + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appears in all copies and that both that copyright + * notice and this permission notice appear in supporting documentation, and + * and that the name of the copyright holder not be used in advertising + * or publicity pertaining to distribution of the software without specific, + * written prior permission. The copyright holder makes no representations + * about the suitability of this software for any purpose. It is provided + * "as is" without expressed or implied warranty. + * + * THE COPYRIGHT HOLDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO + * EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, + * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER + * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR + * PERFORMANCE OF THIS SOFTWARE. + * + * Authors: Alan Hourihane , + * Mike Chapman , + * Juanjo Santamarta , + * Mitani Hiroshi , + * David Thomas , + * Thomas Winischhofer . + */ + + +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86_ansic.h" +#include + +#include "xf86PciInfo.h" +#include "xf86Pci.h" + +#include +#include + +#include "xgi_accel.h" +#include "regs.h" +#include "xgi.h" + +#include "xaarop.h" +#include +#include +#include + +/*************************************************************************/ + +void Volari_Sync(ScrnInfoPtr pScrn); + +static void Volari_SetupForScreenToScreenCopy(ScrnInfoPtr pScrn, + int xdir, int ydir, int rop, + unsigned int planemask, int trans_color); +static void Volari_SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, + int x1, int y1, int x2, int y2, + int width, int height); +static void Volari_SetupForSolidFill(ScrnInfoPtr pScrn, int color, + int rop, unsigned int planemask); +static void Volari_SubsequentSolidFillRect(ScrnInfoPtr pScrn, + int x, int y, int w, int h); +static void Volari_SetupForMonoPatternFill(ScrnInfoPtr pScrn, + int patx, int paty, int fg, int bg, + int rop, unsigned int planemask); +static void Volari_SubsequentMonoPatternFill(ScrnInfoPtr pScrn, + int patx, int paty, + int x, int y, int w, int h); + +void Volari_EnableAccelerator(ScrnInfoPtr pScrn) ; +static void Volari_InitCmdQueue(ScrnInfoPtr pScrn) ; +static void Volari_DisableDualPipe(ScrnInfoPtr pScrn) ; +static void Volari_DisableCmdQueue(ScrnInfoPtr pScrn) ; + +static int Alignment; + +extern int XGI_FbDevExist; + +void +Volari_EnableAccelerator(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + PDEBUG(ErrorF("Volari_EnableAccelerator()\n")) ; + + switch( pXGI->Chipset ) + { + case PCI_CHIP_XGIXG40: + default: + orXGIIDXREG(XGISR, 0x1E, 0xDA) ; + } + + + if( pXGI->TurboQueue ) + { + Volari_InitCmdQueue(pScrn) ; + } +} + +static void +Volari_InitCmdQueue(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + unsigned long ulXGITempRP ; + unsigned long ulCR55 ; + unsigned long ulSR26 ; + unsigned long temp ; + /* unsigned long ulFlag = 0 ; */ + + PDEBUG(ErrorF("Volari_InitCmdQueue()\n")); + PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85c0, XGIMMIOLONG(0x85c0))) ; + PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85c4, XGIMMIOLONG(0x85c4))) ; + PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85c8, XGIMMIOLONG(0x85c8))) ; + PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85cc, XGIMMIOLONG(0x85cc))) ; + + inXGIIDXREG(XGICR, 0x55, ulCR55) ; + andXGIIDXREG(XGICR, 0x55, 0x33) ; + orXGIIDXREG(XGISR, 0x26, 1) ; /* reset cmd queue */ + + XGI_w_port = Volari_GetSwWP() ; /* GuardBand() Init */ + XGI_r_port = Volari_GetHwRP() ; + + if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) + { + Alignment = 1 ; /* 64 bits */ + + switch(pXGI->cmdQueueSize) + { + case 64*1024: + ulSR26 = 0x40 + 0x00 ; + break ; + case 128*1024: + ulSR26 = 0x40 + 0x04 ; + break ; + default: + /* reset the command queue information */ + + pXGI->cmdQueueSize = 128*1024 ; /* reset the command queue */ + pXGI->cmdQueueSizeMask = pXGI->cmdQueueSize - 1 ; + if( XGI_FbDevExist ) + { + if( pScrn->videoRam < 8*1024 ) + { + pXGI->cmdQueueOffset = 4*1024*1024 - pXGI->cmdQueueSize ; + } + else + { + pXGI->cmdQueueOffset = 8*1024*1024 - pXGI->cmdQueueSize ; + } + } + else + { + pXGI->cmdQueueOffset = (pScrn->videoRam)*1024 - pXGI->cmdQueueSize ; + } + + pXGI->cmdQueueLen = 0 ; + pXGI->cmdQueueLenMin = 0x200 ; + pXGI->cmdQueueLenMax = pXGI->cmdQueueSize - pXGI->cmdQueueLenMin ; + + ulSR26 = 0x40 ; + break ; + } + } + else + { + Alignment = 2 ; /* 128 bits */ + + switch(pXGI->cmdQueueSize) + { + case 512*1024: + ulSR26 = 0x40 + 0x00 ; + break ; + case 1024*1024: + ulSR26 = 0x40 + 0x04 ; + break ; + case 2*1024*1024: + ulSR26 = 0x40 + 0x08 ; + break ; + case 4*1024*1024: + ulSR26 = 0x40 + 0x0C ; + break ; + default: + /* reset the command queue information */ + + pXGI->cmdQueueSize = 512*1024 ; /* reset the command queue */ + pXGI->cmdQueueSizeMask = pXGI->cmdQueueSize - 1 ; + if( XGI_FbDevExist ) + { + if( pScrn->videoRam < 8*1024 ) + { + pXGI->cmdQueueOffset = 4*1024*1024 - pXGI->cmdQueueSize ; + } + else + { + pXGI->cmdQueueOffset = 8*1024*1024 - pXGI->cmdQueueSize ; + } + } + else + { + pXGI->cmdQueueOffset = (pScrn->videoRam)*1024 - pXGI->cmdQueueSize ; + } + + pXGI->cmdQueueLen = 0 ; + pXGI->cmdQueueLenMin = 0x200 ; + pXGI->cmdQueueLenMax = pXGI->cmdQueueSize - pXGI->cmdQueueLenMin ; + + ulSR26 = 0x40 ; + break ; + } + } + + pXGI->CursorOffset = pXGI->cmdQueueOffset - VOLARI_CURSOR_SHAPE_SIZE ; + + temp = (unsigned long)pXGI->FbBase ; + temp += pXGI->cmdQueueOffset ; + pXGI->cmdQueueBase = (unsigned char *)temp ; + + PDEBUG(ErrorF( "pXGI->FbBase = 0x%lX\n", pXGI->FbBase )) ; + PDEBUG(ErrorF( "pXGI->cmdQueueOffset = 0x%lX\n", pXGI->cmdQueueOffset )) ; + PDEBUG(ErrorF( "pXGI->cmdQueueBase = 0x%lX\n", pXGI->cmdQueueBase )) ; + + outXGIIDXREG(XGISR, 0x26, ulSR26) ; + + ulXGITempRP=Volari_GetHwRP() ; + + PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85c0, XGIMMIOLONG(0x85c0))) ; + PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85c4, XGIMMIOLONG(0x85c4))) ; + PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85c8, XGIMMIOLONG(0x85c8))) ; + PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85cc, XGIMMIOLONG(0x85cc))) ; + + /* XGI315 */ + pXGI->cmdQueue_shareWP_only2D = ulXGITempRP; + /* pXGI->pCQ_shareWritePort = &(pXGI->cmdQueue_shareWP_only2D); */ + + Volari_UpdateHwWP(ulXGITempRP) ; + + + + MMIO_OUT32(pXGI->IOBase, 0x85C0, pXGI->cmdQueueOffset) ; + + outXGIIDXREG(XGICR, 0x55, ulCR55) ; + + if(pXGI->Chipset == PCI_CHIP_XGIXG40) + { + Volari_Idle ; + Volari_DisableDualPipe(pScrn) ; + Volari_Idle ; + + } + PDEBUG(ErrorF("Volari_InitCmdQueue() done.\n")) ; +} + +static void +Volari_DisableDualPipe(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn) ; + unsigned long ulTemp ; + unsigned long ulValue = MMIO_IN32(pXGI->IOBase, 0x8240) ; + ulValue |= 1 << 10 ; /* D[10] = 1, Disable Dual Pipe. */ + + ulTemp = Volari_GetSwWP() ; + + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = (CARD32)(GR_SKPC_HEADER + 0x8240) ; + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) = (CARD32)(ulValue) ; + + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) + { + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = (CARD32)(GR_NIL_CMD) ; + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = (CARD32)(GR_NIL_CMD) ; + + ulTemp += 0x10 ; + } + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) + ulTemp += 0x08 ; + + ulTemp &= pXGI->cmdQueueSizeMask ; + Volari_UpdateHwWP(ulTemp) ; +} + +void +Volari_DisableAccelerator(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn) ; + + PDEBUG(ErrorF("Volari_DisableAccelerator(pScrn)\n")) ; + + Volari_Idle ; + + if( pXGI->TurboQueue ) + { + Volari_DisableCmdQueue(pScrn) ; + } + + andXGIIDXREG(XGISR, 0x1E, ~0xDA) ; + PDEBUG(ErrorF("Volari_DisableAccelerator(pScrn) Done\n")) ; +} + +static void +Volari_DisableCmdQueue(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn) ; + + andXGIIDXREG(XGISR, 0x26, 0x0F) ; +} + +static void +Volari_InitializeAccelerator(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + pXGI->DoColorExpand = FALSE; +} + +Bool +Volari_AccelInit(ScreenPtr pScreen) +{ + XAAInfoRecPtr infoPtr; + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XGIPtr pXGI = XGIPTR(pScrn); + int reservedFbSize; + long UsableFbSize; + unsigned char *AvailBufBase; + BoxRec Avail; + int i; /*, divider; + unsigned long ulFbMgrSize; + Bool bRetValue ; */ + + + Avail.x1 = 0; Avail.y1 = 0; Avail.x2 = 0; Avail.y2 = 0; + + PDEBUG1(ErrorF("Volari_AccelInit()\n" )) ; + + pXGI->AccelInfoPtr = infoPtr = XAACreateInfoRec(); + if (!infoPtr) return FALSE; + + Volari_InitializeAccelerator(pScrn); + + infoPtr->Flags = LINEAR_FRAMEBUFFER | + OFFSCREEN_PIXMAPS | + PIXMAP_CACHE; + + /* sync */ + infoPtr->Sync = Volari_Sync; + + if ((pScrn->bitsPerPixel != 8) && + (pScrn->bitsPerPixel != 16) && + (pScrn->bitsPerPixel != 32)) + { + return FALSE; + } + +#ifdef XGIG2_SCR2SCRCOPY + /* BitBlt */ + infoPtr->SetupForScreenToScreenCopy = Volari_SetupForScreenToScreenCopy; + infoPtr->SubsequentScreenToScreenCopy = Volari_SubsequentScreenToScreenCopy; + infoPtr->ScreenToScreenCopyFlags = NO_PLANEMASK | NO_TRANSPARENCY; +#endif + +#ifdef XGIG2_SOLIDFILL + /* solid fills */ + infoPtr->SetupForSolidFill = Volari_SetupForSolidFill; + infoPtr->SubsequentSolidFillRect = Volari_SubsequentSolidFillRect; + infoPtr->SolidFillFlags = NO_PLANEMASK; +#endif + +#ifdef XGIG2_8X8MONOPATFILL + /* 8x8 mono pattern fill */ + infoPtr->SetupForMono8x8PatternFill = Volari_SetupForMonoPatternFill; + infoPtr->SubsequentMono8x8PatternFillRect = Volari_SubsequentMonoPatternFill; + infoPtr->Mono8x8PatternFillFlags = + NO_PLANEMASK | + HARDWARE_PATTERN_SCREEN_ORIGIN | + HARDWARE_PATTERN_PROGRAMMED_BITS | + NO_TRANSPARENCY | + BIT_ORDER_IN_BYTE_MSBFIRST ; +#endif /* XGIG2_8X8MONOPATFILL */ + + /* init Frame Buffer Manager */ + reservedFbSize = 0; + if (pXGI->TurboQueue) + { + reservedFbSize += pXGI->cmdQueueSize ; + } + + if (pXGI->HWCursor) + { + reservedFbSize += XGI315_HCSIZE ; + } + +#ifdef XGIG2_COLOREXPSCANLN + reservedFbSize += (pXGI->ColorExpandBufferNumber * pXGI->PerColorExpandBufferSize); +#endif + + UsableFbSize = pXGI->FbMapSize - reservedFbSize; + AvailBufBase = pXGI->FbBase + UsableFbSize; + + for (i=0; iColorExpandBufferNumber; i++) + { + pXGI->ColorExpandBufferAddr[i] = AvailBufBase + i*pXGI->PerColorExpandBufferSize; + pXGI->ColorExpandBufferScreenOffset[i] = UsableFbSize + i*pXGI->PerColorExpandBufferSize; + } + +#ifdef XGIG2_IMAGEWRITE + reservedFbSize += pXGI->ImageWriteBufferSize; + UsableFbSize = pXGI->FbMapSize - reservedFbSize; + pXGI->ImageWriteBufferAddr = AvailBufBase = pXGI->FbBase + UsableFbSize; + infoPtr->ImageWriteRange = pXGI->ImageWriteBufferAddr; +#endif /* XGIG2_IMAGEWRITE */ + + Avail.x1 = 0; + Avail.y1 = 0; + +/* + Avail.x2 = pScrn->displayWidth; + + ErrorF("FbDevExist=%s\n",XGI_FbDevExist?"TRUE":"FALSE"); + + if (XGI_FbDevExist) + { + if( UsableFbSize >= 8*1024*1024 ) + { + UsableFbSize = 8*1024*1024 ; + } + else + { + UsableFbSize = 4*1024*1024 ; + } + } + + PDEBUG1(ErrorF( "UsabelFbSize = %08lx\n", UsableFbSize )) ; + Avail.y2 = UsableFbSize / pXGI->scrnOffset ; + + if ((unsigned long)Avail.y2 > 8192) + { + Avail.y2 = 8192 ; + } +*/ + + UsableFbSize = pXGI->CursorOffset ; + Avail.x1 = 0 ; + Avail.y1 = 0 ; + Avail.x2 = pScrn->displayWidth; + Avail.y2 = UsableFbSize / pXGI->scrnOffset ; + + + if ((unsigned long)Avail.y2 > 8192) + { + Avail.y2 = 8192 ; + } + + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Usable FBSize = %08lx\n", UsableFbSize ) ; + + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Frame Buffer From (%d,%d) To (%d,%d)\n", + Avail.x1, Avail.y1, Avail.x2, Avail.y2); + + xf86InitFBManager(pScreen, &Avail); + + return(XAAInit(pScreen, infoPtr)); + +} + +void +Volari_Sync(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + PDEBUG1(ErrorF("Volari_Sync()\n")); + pXGI->DoColorExpand = FALSE; + Volari_Idle ; +} + +static int xgiG2_ALUConv[] = +{ + 0x00, /* dest = 0; 0, GXclear, 0 */ + 0x88, /* dest &= src; DSa, GXand, 0x1 */ + 0x44, /* dest = src & ~dest; SDna, GXandReverse, 0x2 */ + 0xCC, /* dest = src; S, GXcopy, 0x3 */ + 0x22, /* dest &= ~src; DSna, GXandInverted, 0x4 */ + 0xAA, /* dest = dest; D, GXnoop, 0x5 */ + 0x66, /* dest = ^src; DSx, GXxor, 0x6 */ + 0xEE, /* dest |= src; DSo, GXor, 0x7 */ + 0x11, /* dest = ~src & ~dest; DSon, GXnor, 0x8 */ + 0x99, /* dest ^= ~src ; DSxn, GXequiv, 0x9 */ + 0x55, /* dest = ~dest; Dn, GXInvert, 0xA */ + 0xDD, /* dest = src|~dest ; SDno, GXorReverse, 0xB */ + 0x33, /* dest = ~src; Sn, GXcopyInverted, 0xC */ + 0xBB, /* dest |= ~src; DSno, GXorInverted, 0xD */ + 0x77, /* dest = ~src|~dest; DSan, GXnand, 0xE */ + 0xFF, /* dest = 0xFF; 1, GXset, 0xF */ +}; +/* same ROP but with Pattern as Source */ +static int xgiG2_PatALUConv[] = +{ + 0x00, /* dest = 0; 0, GXclear, 0 */ + 0xA0, /* dest &= src; DPa, GXand, 0x1 */ + 0x50, /* dest = src & ~dest; PDna, GXandReverse, 0x2 */ + 0xF0, /* dest = src; P, GXcopy, 0x3 */ + 0x0A, /* dest &= ~src; DPna, GXandInverted, 0x4 */ + 0xAA, /* dest = dest; D, GXnoop, 0x5 */ + 0x5A, /* dest = ^src; DPx, GXxor, 0x6 */ + 0xFA, /* dest |= src; DPo, GXor, 0x7 */ + 0x05, /* dest = ~src & ~dest; DPon, GXnor, 0x8 */ + 0xA5, /* dest ^= ~src ; DPxn, GXequiv, 0x9 */ + 0x55, /* dest = ~dest; Dn, GXInvert, 0xA */ + 0xF5, /* dest = src|~dest ; PDno, GXorReverse, 0xB */ + 0x0F, /* dest = ~src; Pn, GXcopyInverted, 0xC */ + 0xAF, /* dest |= ~src; DPno, GXorInverted, 0xD */ + 0x5F, /* dest = ~src|~dest; DPan, GXnand, 0xE */ + 0xFF, /* dest = 0xFF; 1, GXset, 0xF */ +}; + +static void +Volari_SetupForScreenToScreenCopy( + ScrnInfoPtr pScrn, + int xdir, int ydir, int rop, + unsigned int planemask, int trans_color) +{ + XGIPtr pXGI = XGIPTR(pScrn); +#ifdef SHOW_XAAINFO + XAAInfoRecPtr pXAA = XAAPTR(pScrn); +/* + ErrorF("XAAInfoPtr->UsingPixmapCache = %s\n" + "XAAInfoPtr->CanDoMono8x8 = %s\n" + "XAAInfoPtr->CanDoColor8x8 = %s\n" + "XAAInfoPtr->CachePixelGranularity = %d\n" + "XAAInfoPtr->MaxCacheableTileWidth = %d\n" + "XAAInfoPtr->MaxCacheableTileHeight = %d\n" + "XAAInfoPtr->MaxCacheableStippleWidth = %d\n" + "XAAInfoPtr->MaxCacheableStippleHeight = %d\n" + "XAAInfoPtr->MonoPatternPitch = %d\n" + "XAAInfoPtr->CacheWidthMono8x8Pattern = %d\n" + "XAAInfoPtr->CacheHeightMono8x8Pattern = %d\n" + "XAAInfoPtr->ColorPatternPitch = %d\n" + "XAAInfoPtr->CacheWidthColor8x8Pattern = %d\n" + "XAAInfoPtr->CacheHeightColor8x8Pattern = %d\n" + "XAAInfoPtr->CacheColorExpandDensity = %d\n" + "XAAInfoPtr->maxOffPixWidth = %d\n" + "XAAInfoPtr->maxOffPixHeight= %d\n" + "XAAInfoPtr->NeedToSync = %s\n" + "\n", + pXAA->UsingPixmapCache ? "True" : "False", + pXAA->CanDoMono8x8 ? "True" : "False", + pXAA->CanDoColor8x8 ? "True" : "False", + pXAA->CachePixelGranularity, + pXAA->MaxCacheableTileWidth, + pXAA->MaxCacheableTileHeight, + pXAA->MaxCacheableStippleWidth, + pXAA->MaxCacheableStippleHeight, + pXAA->MonoPatternPitch, + pXAA->CacheWidthMono8x8Pattern, + pXAA->CacheHeightMono8x8Pattern, + pXAA->ColorPatternPitch, + pXAA->CacheWidthColor8x8Pattern, + pXAA->CacheHeightColor8x8Pattern, + pXAA->CacheColorExpandDensity, + pXAA->maxOffPixWidth, + pXAA->maxOffPixHeight, + pXAA->NeedToSync ? "True" : "False"); +*/ +#endif + + PDEBUG1(ErrorF("Setup ScreenCopy(%d, %d, 0x%x, 0x%x, 0x%x)\n", + xdir, ydir, rop, planemask, trans_color)); + + Volari_ResetCmd ; + GuardBand(0x20 * Alignment); + Volari_SetupDSTColorDepth(pXGI->DstColor); + Volari_SetupSRCPitch(pXGI->scrnOffset) ; + Volari_SetupDSTRect(pXGI->scrnOffset, Dst_Hight) ; + Volari_SetupROP(xgiG2_ALUConv[rop]) ; +} + +static void +Volari_SubsequentScreenToScreenCopy( + ScrnInfoPtr pScrn, + int src_x, int src_y, + int dst_x, int dst_y, + int width, int height) +{ + XGIPtr pXGI = XGIPTR(pScrn); + long srcbase, dstbase; + + PDEBUG1(ErrorF("Subsequent ScreenCopy(%d,%d, %d,%d, %d,%d)\n", + src_x, src_y, + dst_x, dst_y, + width, height)); + + srcbase=dstbase=0; + if (src_y >= 2048) + { + srcbase=pXGI->scrnOffset*src_y; + src_y=0; + } + if (dst_y >= pScrn->virtualY) + { + dstbase=pXGI->scrnOffset*dst_y; + dst_y=0; + } + PDEBUG1(ErrorF("SrcBase = %08lX DstBase = %08lX\n",srcbase,dstbase)) ; + PDEBUG1(ErrorF("SrcX = %08lX SrcY = %08lX\n",src_x,src_y)) ; + PDEBUG1(ErrorF("DstX = %08lX DstY = %08lX\n",dst_x,dst_y)) ; + + GuardBand(0x30 * Alignment); + Volari_SetupSRCBase(srcbase); + Volari_SetupDSTBase(dstbase); + Volari_SetupSRCXY(src_x,src_y) ; + Volari_SetupDSTXY(dst_x,dst_y) ; + Volari_SetupRect(width, height) ; + Volari_DoCMD ; +} + +static void +Volari_SetupForSolidFill(ScrnInfoPtr pScrn, + int color, int rop, unsigned int planemask) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + PDEBUG1(ErrorF("Volari_SetupForSolidFill()\n")) ; + PDEBUG1(ErrorF("Color = #%08lX ",color)) ; + PDEBUG1(ErrorF("DstPitch = #%04lX ",(pXGI->scrnOffset))) ; + PDEBUG1(ErrorF("\n")) ; + + Volari_ResetCmd ; + GuardBand(0x28 * Alignment); + Volari_SetupPATFG(color) ; + Volari_SetupDSTRect(pXGI->scrnOffset, Dst_Hight) ; + Volari_SetupDSTColorDepth(XGIPTR(pScrn)->DstColor) ; + Volari_SetupROP(xgiG2_PatALUConv[rop]) ; + Volari_SetupCMDFlag(PATFG | BITBLT) ; +} + +static void +Volari_SubsequentSolidFillRect( + ScrnInfoPtr pScrn, + int x, int y, + int width, int height) +{ + XGIPtr pXGI = XGIPTR(pScrn); + unsigned long dstbase = 0 ; + + PDEBUG1(ErrorF("Subsequent SolidFillRect(%d, %d, %d, %d)\n", + x, y, width, height)); + + dstbase=0; + if (y>=2048) + { + dstbase=pXGI->scrnOffset*y; + y=0; + } + + GuardBand(0x20 * Alignment); + Volari_SetupDSTBase(dstbase) ; + Volari_SetupDSTXY(x,y) ; + Volari_SetupRect(width,height) ; + Volari_DoCMD ; + +} + +static void +Volari_SetupForMonoPatternFill(ScrnInfoPtr pScrn, + int pat0, int pat1, + int fg, int bg, + int rop, unsigned int planemask) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + PDEBUG1(ErrorF("Setup MonoPatFill(0x%x,0x%x, 0x%x,0x%x, 0x%x, 0x%x)\n", + pat0, pat1, fg, bg, rop, planemask)); + + Volari_ResetCmd ; + GuardBand(0x40 * Alignment); + Volari_SetupDSTRect(pXGI->scrnOffset, Dst_Hight) ; + Volari_SetupMONOPAT0(pat0) ; + Volari_SetupMONOPAT1(pat1) ; + Volari_SetupPATFG(fg) ; + Volari_SetupPATBG(bg) ; + Volari_SetupROP(xgiG2_PatALUConv[rop]) ; + Volari_SetupDSTColorDepth(pXGI->DstColor) ; + Volari_SetupCMDFlag(PATMONO | BITBLT) ; +} + +static void +Volari_SubsequentMonoPatternFill(ScrnInfoPtr pScrn, + int patx, int paty, + int x, int y, int w, int h) +{ + XGIPtr pXGI = XGIPTR(pScrn); + long dstbase; + + PDEBUG1(ErrorF("Subsequent MonoPatFill(0x%x,0x%x, %d,%d, %d,%d)\n", + patx, paty, x, y, w, h)); + dstbase=0; + if (y>=2048) + { + dstbase=pXGI->scrnOffset*y; + y=0; + } + + GuardBand(0x20 * Alignment); + Volari_SetupDSTBase(dstbase) ; + Volari_SetupDSTXY(x,y) ; + Volari_SetupRect(w,h) ; + Volari_DoCMD ; + Volari_Idle; +} + +/************************************************************************/ + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.h Mon May 2 09:28:02 2005 @@ -0,0 +1,984 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ +/* + * 2D acceleration for 5597/5598 and 6326 + * Definitions for the XGI engine communication + * + * Copyright (C) 1998, 1999 by Alan Hourihane, Wigan, England. + * Parts Copyright (C) 2001-2004 Thomas Winischhofer, Vienna, Austria. + * + * Licensed under the following terms: + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appears in all copies and that both that copyright + * notice and this permission notice appear in supporting documentation, and + * and that the name of the copyright holder not be used in advertising + * or publicity pertaining to distribution of the software without specific, + * written prior permission. The copyright holder makes no representations + * about the suitability of this software for any purpose. It is provided + * "as is" without expressed or implied warranty. + * + * THE COPYRIGHT HOLDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO + * EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, + * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER + * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR + * PERFORMANCE OF THIS SOFTWARE. + * + * Authors: Alan Hourihane , + * Mike Chapman , + * Juanjo Santamarta , + * Mitani Hiroshi , + * David Thomas , + * Thomas Winischhofer . + */ + +#ifndef _XGI_315_ACCEL_H_ +#define _XGI_315_ACCEL_H_ +/* Definitions for the XGI engine communication. */ + +#define XGI315_HCSIZE (16*1024) + +#define PATREGSIZE 256 + +#define XGIG2_SCR2SCRCOPY +#define XGIG2_SOLIDFILL +#define XGIG2_8X8MONOPATFILL + + +/* +#define XGIG2_COLOREXPSCANLN +#define XGIG2_SOLIDLINE +#define XGIG2_DASHEDLINE +#define XGIG2_S2SCOLOREXPANFILL +#define XGIG2_8X8COLORPATFILL +#define XGIG2_C2SCOLOREXPANFILL +#define XGIG2_IMAGEWRITE +#define XGIG2_COLOREXPSCANLN +#define XGIG2_IMAGEWRITE +*/ + +#undef BR +#undef PBR +#define BR(x) (0x8200 | (x) << 2) +#define PBR(x) (0x8300 | (x) << 2) + +/* Definitions for the engine command */ +#define BITBLT 0x00000000 +#define COLOREXP 0x00000001 +#define ENCOLOREXP 0x00000002 +#define MULTIPLE_SCANLINE 0x00000003 +#define LINE 0x00000004 +#define TRAPAZOID_FILL 0x00000005 +#define TRANSPARENT_BITBLT 0x00000006 + +#define SRCVIDEO 0x00000000 +#define SRCSYSTEM 0x00000010 +#define SRCAGP 0x00000020 + +#define PATFG 0x00000000 +#define PATPATREG 0x00000040 +#define PATMONO 0x00000080 + +#define X_INC 0x00010000 +#define X_DEC 0x00000000 +#define Y_INC 0x00020000 +#define Y_DEC 0x00000000 + +#define NOCLIP 0x00000000 +#define NOMERGECLIP 0x04000000 +#define CLIPENABLE 0x00040000 +#define CLIPWITHOUTMERGE 0x04040000 + +#define OPAQUE 0x00000000 +#define TRANSPARENT 0x00100000 + +#define DSTAGP 0x02000000 +#define DSTVIDEO 0x02000000 + +/* Line */ +#define LINE_STYLE 0x00800000 +#define NO_RESET_COUNTER 0x00400000 +#define NO_LAST_PIXEL 0x00200000 + +/* Macros to do useful things with the XGI BitBLT engine */ + +/* + bit 31 2D engine: 1 is idle, + bit 30 3D engine: 1 is idle, + bit 29 Command queue: 1 is empty +*/ + +#define GR_SKPC_HEADER 0x16800000L +#define GR_NIL_CMD 0x168F0000L + +#define Dst_Hight 0xFFF + +#define BandSize 0x10 + +/* typedef unsigned long ulong ; */ + +unsigned long XGI_r_port, XGI_w_port ; + +int XGI_G2CmdQueLen; + +/*********************************************************************** + *#define Volari_Idle \ + * while( (MMIO_IN16(pXGI->IOBase, BR(16)+2) & 0xE000) != 0xE000){}; \ + * while( (MMIO_IN16(pXGI->IOBase, BR(16)+2) & 0xE000) != 0xE000){}; \ + * XGI_G2CmdQueLen=MMIO_IN16(pXGI->IOBase, 0x8240); + ***********************************************************************/ + +#define Volari_Idle \ + {\ + unsigned long ulTemp ;\ +\ + do \ + {\ + ulTemp = MMIO_IN32(pXGI->IOBase, 0x85CC) ;\ + if( ulTemp & 0x80000000 )\ + {\ + break ;\ + }\ + }while(1) ;\ +\ + do \ + {\ + ulTemp = MMIO_IN32(pXGI->IOBase, 0x85CC) ;\ + if( ulTemp & 0x80000000 )\ + {\ + break ;\ + }\ + }while(1) ;\ +\ + do \ + {\ + ulTemp = MMIO_IN32(pXGI->IOBase, 0x85CC) ;\ + if( ulTemp & 0x80000000 )\ + {\ + break ;\ + }\ + }while(1) ;\ +\ + do \ + {\ + ulTemp = MMIO_IN32(pXGI->IOBase, 0x85CC) ;\ + if( ulTemp & 0x80000000 )\ + {\ + break ;\ + }\ + }while(1) ;\ +\ + } + +#define Volari_GetSwWP() (unsigned long)(*(pXGI->pCQ_shareWritePort)) +#define Volari_GetHwRP() (unsigned long)(MMIO_IN32(pXGI->IOBase, 0x85c8)) + +#define Volari_SyncWP\ + {\ + unsigned long p ;\ + \ + p = *(pXGI->pCQ_shareWritePort);\ + PDEBUG4(ErrorF("Volari_SyncWP(%08lx)\n",(p)));\ + MMIO_OUT32(pXGI->IOBase, 0x85c4, p) ;\ + } + +#define Volari_UpdateHwWP(p)\ + {\ + PDEBUG4(ErrorF("Volari_UpdateHwWP(%08lx)\n",(p)));\ + *(pXGI->pCQ_shareWritePort) = (p) ;\ + MMIO_OUT32(pXGI->IOBase, 0x85c4, (p)) ;\ + } + +#define Volari_UpdateSwWP(p)\ + {\ + PDEBUG4(ErrorF("Volari_UpdateSwWP(%08lx)\n",(p)));\ + *(pXGI->pCQ_shareWritePort) = (p) ;\ + } + + +#define Volari_ResetCmd \ + pXGI->CommandReg = 0 ; + +#define Volari_SetupROP(rop) \ + pXGI->CommandReg |= (rop) << 8; + +#define Volari_SetupCMDFlag(flags) \ + pXGI->CommandReg |= (flags); + + +#define GuardBand(CS)\ + {\ + unsigned long lTemp ; \ + \ + XGI_w_port = Volari_GetSwWP(); \ + lTemp = XGI_r_port - XGI_w_port + pXGI->cmdQueueSize ; \ + \ + if( ((lTemp & pXGI->cmdQueueSizeMask ) < (BandSize + CS)) && ( XGI_r_port != XGI_w_port ) ) \ + { \ + while ( 1 ) \ + { \ + XGI_r_port = Volari_GetHwRP(); \ + if(XGI_r_port == XGI_w_port) \ + break; \ + lTemp = XGI_r_port - XGI_w_port + pXGI->cmdQueueSize ; \ + if( (lTemp & pXGI->cmdQueueSizeMask ) >= (BandSize + CS) ) \ + break; \ + } \ + } \ + } + +/* +#define GuardBand(CS)\ + {\ + long lTemp ; \ + XGI_w_port = Volari_GetSwWP(); \ + while ( 1 ) \ + { \ + XGI_r_port = Volari_GetHwRP(); \ + if(XGI_r_port == XGI_w_port)\ + break; \ + lTemp = XGI_r_port - XGI_w_port + pXGI->cmdQueueSize ; \ + if( (lTemp & pXGI->cmdQueueSizeMask ) >= (BandSize + CS) ) \ + break; \ + }\ + } +*/ + +#define Volari_DoCMD\ + {\ + unsigned long ulTemp ;\ + \ + PDEBUG4(ErrorF("pXGI->CommandReg = %08lX\n", pXGI->CommandReg));\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + 0x823C) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(pXGI->CommandReg) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateHwWP(ulTemp) ;\ + \ + } + +/********************************************************************** +#define Volari_SetupSRCBase(base) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(0), base);\ + XGI_G2CmdQueLen --; + **********************************************************************/ + +#define Volari_SetupSRCBase(base) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + 0x8200) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(base) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + + +/*********************************************************************** +#define Volari_SetupSRCPitch(pitch) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT16(pXGI->IOBase, BR(1), pitch);\ + XGI_G2CmdQueLen --; + +***********************************************************************/ + +#define Volari_SetupSRCPitch(pitch) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + 0x8204) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(pitch) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +/*********************************************************************** +#define Volari_SetupSRCXY(x,y) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(2), (x)<<16 | (y) );\ + XGI_G2CmdQueLen --; +***********************************************************************/ + +#define Volari_SetupSRCXY(x,y) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + 0x8208) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)((x<<16)+(y&0xFFFF)) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +/*********************************************************************** +#define Volari_SetupDSTBase(base) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(4), base);\ + XGI_G2CmdQueLen --; + +***********************************************************************/ + +#define Volari_SetupDSTBase(base) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + 0x8210) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(base) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +/*********************************************************************** +#define Volari_SetupDSTXY(x,y) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(3), (x)<<16 | (y) );\ + XGI_G2CmdQueLen --; + +***********************************************************************/ + +#define Volari_SetupDSTXY(x,y) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + 0x820C) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(((x)<<16)+((y)&0xFFFF)) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +/*********************************************************************** +#define Volari_SetupDSTRect(x,y) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(5), (y)<<16 | (x) );\ + XGI_G2CmdQueLen --; + +***********************************************************************/ + +#define Volari_SetupDSTRect(x,y) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + 0x8214) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(((y)<<16)|((x)&0xFFFF)) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + Volari_UpdateHwWP(ulTemp) ;\ + \ + } + +/*********************************************************************** +#define Volari_SetupDSTColorDepth(bpp) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT16(pXGI->IOBase, BR(1)+2, bpp);\ + XGI_G2CmdQueLen --; +***********************************************************************/ + +#define Volari_SetupDSTColorDepth(bpp) \ + pXGI->CommandReg |= ((unsigned long)(bpp))&(GENMASK(17:16)) ; + +/*********************************************************************** +#define Volari_SetupRect(w,h) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(6), (h)<<16 | (w) );\ + XGI_G2CmdQueLen --; +***********************************************************************/ + +#define Volari_SetupRect(w,h) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + 0x8218) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(((h)<<16)|((w)&0xffff)) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +/*********************************************************************** +#define Volari_SetupPATFG(color) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(7), color);\ + XGI_G2CmdQueLen --; +***********************************************************************/ +/*********************************************************************** +#define Volari_SetupPATBG(color) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(8), color);\ + XGI_G2CmdQueLen --; +***********************************************************************/ +/*********************************************************************** +#define Volari_SetupSRCFG(color) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(9), color);\ + XGI_G2CmdQueLen --; +***********************************************************************/ +/*********************************************************************** +#define Volari_SetupSRCBG(color) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(10), color);\ + XGI_G2CmdQueLen --; +***********************************************************************/ + +#define Volari_SetupPATFG(color) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(7)) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(color) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + Volari_UpdateHwWP(ulTemp) ;\ + \ + } + +#define Volari_SetupPATBG(color) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(8)) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(color) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +#define Volari_SetupSRCFG(color) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(9)) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(color) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +#define Volari_SetupSRCBG(color) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(10)) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(color) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +/*********************************************************************** +#define Volari_SetupMONOPAT(p0,p1) \ + if (XGI_G2CmdQueLen <= 1) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(11), p0);\ + MMIO_OUT32(pXGI->IOBase, BR(12), p1);\ + XGI_G2CmdQueLen =XGI_G2CmdQueLen-2; +***********************************************************************/ + +#define Volari_SetupMONOPAT0(p0) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + 0x822C) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(p0) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +#define Volari_SetupMONOPAT1(p1) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + 0x8230) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(p1) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } +/*********************************************************************** +#define Volari_SetupClipLT(left,top) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(13), ((left) & 0xFFFF) | (top)<<16 );\ + XGI_G2CmdQueLen--; +***********************************************************************/ +/*********************************************************************** +#define Volari_SetupClipRB(right,bottom) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(14), ((right) & 0xFFFF) | (bottom)<<16 );\ + XGI_G2CmdQueLen --; +***********************************************************************/ + +#define Volari_SetupClip(left,top,right,bottom) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(13)) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(((top)<<16)|((left)&0xffff)) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +#define Volari_SetupClipLT(left,top) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(13)) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(((top)<<16)|((left)&0xffff)) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +#define Volari_SetupClipRB(right,bottom) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(14)) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(((right) & 0xFFFF) | ((bottom)<<16))) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +/*********************************************************************** +#define Volari_SetupROP(rop) \ + pXGI->CommandReg = (rop) << 8; + +#define Volari_SetupCMDFlag(flags) \ + pXGI->CommandReg |= (flags); + +#define Volari_DoCMD \ + if (XGI_G2CmdQueLen <= 1) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(15), pXGI->CommandReg); \ + MMIO_OUT32(pXGI->IOBase, BR(16), 0);\ + XGI_G2CmdQueLen =XGI_G2CmdQueLen-2; +***********************************************************************/ + +/*********************************************************************** +#define Volari_SetupX0Y0(x,y) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(2), (y)<<16 | (x) );\ + XGI_G2CmdQueLen --; +#define Volari_SetupX1Y1(x,y) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(3), (y)<<16 | (x) );\ + XGI_G2CmdQueLen --; +#define Volari_SetupLineCount(c) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT16(pXGI->IOBase, BR(6), c);\ + XGI_G2CmdQueLen --; +#define Volari_SetupStylePeriod(p) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT16(pXGI->IOBase, BR(6)+2, p);\ + XGI_G2CmdQueLen --; +#define Volari_SetupStyleLow(ls) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(11), ls);\ + XGI_G2CmdQueLen --; +#define Volari_SetupStyleHigh(ls) \ + if (XGI_G2CmdQueLen <= 0) Volari_Idle;\ + MMIO_OUT32(pXGI->IOBase, BR(12), ls);\ + XGI_G2CmdQueLen --; +***********************************************************************/ + + +/*********************************************************************** + * For Line Drawing + ***********************************************************************/ + +#define Volari_SetupX0Y0(x,y) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(2)) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(((y)<<16) | ((x)&0xFFFF) ) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +#define Volari_SetupX1Y1(x,y) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(3)) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(((y)<<16) | ((x)&0xFFFF) ) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +#define Volari_SetupLineCount(c) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(6) + 0x30000 ) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(((c)&0xffff)) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +#define Volari_SetupStylePeriod(p) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(6) + 0xC0000 ) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(((p)<<16)) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +#define Volari_SetupStylePeriodCount(p,c) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(6)) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(((p)<<16)|((c)&0xffff)) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +#define Volari_SetupStyle(ls,hs) \ + {\ + unsigned long ulTemp ;\ + \ + ulTemp = Volari_GetSwWP() ;\ + \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp) = \ + (CARD32)(GR_SKPC_HEADER + BR(11)) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+4) =\ + (CARD32)(ls) ;\ + if( pXGI->Chipset == PCI_CHIP_XGIXG40 ) \ + { \ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+8) = \ + (CARD32)(GR_NIL_CMD) ;\ + *(CARD32 *)(pXGI->cmdQueueBase+ulTemp+12) = \ + (CARD32)(GR_NIL_CMD) ;\ + ulTemp += 0x10 ;\ + } \ + else if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) \ + ulTemp += 0x08 ;\ + ulTemp &= pXGI->cmdQueueSizeMask ;\ + Volari_UpdateSwWP(ulTemp) ;\ + \ + } + +#endif /* _XGI_315_ACCEL_H_ */ + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_common.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_common.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_common.h Mon May 2 09:28:02 2005 @@ -0,0 +1,63 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_common.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ +/* + * Common header definitions for XGI 2D/3D/DRM suite + * + * Copyright (C) 2003 Eric Anholt + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appears in all copies and that both that copyright + * notice and this permission notice appear in supporting documentation, and + * and that the name of the copyright holder not be used in advertising + * or publicity pertaining to distribution of the software without specific, + * written prior permission. The copyright holder makes no representations + * about the suitability of this software for any purpose. It is provided + * "as is" without expressed or implied warranty. + * + * THE COPYRIGHT HOLDER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO + * EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY SPECIAL, INDIRECT OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, + * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER + * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR + * PERFORMANCE OF THIS SOFTWARE. + * + * Author: + * Eric Anholt + * + */ + +#ifndef _XGI_COMMON_H_ +#define _XGI_COMMON_H_ + +#define DRM_XGI_FB_ALLOC 0x04 +#define DRM_XGI_FB_FREE 0x05 +#define DRM_XGI_FLIP 0x08 +#define DRM_XGI_FLIP_INIT 0x09 +#define DRM_XGI_FLIP_FINAL 0x10 +#define DRM_XGI_AGP_INIT 0x13 +#define DRM_XGI_AGP_ALLOC 0x14 +#define DRM_XGI_AGP_FREE 0x15 +#define DRM_XGI_FB_INIT 0x16 + +typedef struct { + int context; + unsigned long offset; + unsigned long size; + void *free; +} drm_xgi_mem_t; + +typedef struct { + unsigned long offset, size; +} drm_xgi_agp_t; + +typedef struct { + unsigned long offset, size; +} drm_xgi_fb_t; + +typedef struct { + unsigned int left, right; +} drm_xgi_flip_t; + +#endif /* _XGI_COMMON_H_ */ + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_cursor.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_cursor.c:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_cursor.c Mon May 2 09:28:02 2005 @@ -0,0 +1,230 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_cursor.c,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ +/* + * XGI hardware cursor handling + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1) Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2) Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3) The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Thomas Winischhofer + * + * Idea based on code by Can-Ru Yeou, XGI Inc. + * + */ + +#include "xf86.h" +#include "xf86PciInfo.h" +#include "cursorstr.h" +#include "vgaHW.h" + +#include "xgi.h" +#include "regs.h" +#include "xgi_cursor.h" + +static int currX = 0 , currY = 0 ; + +extern void XGIWaitRetraceCRT1(ScrnInfoPtr pScrn); +extern void XGIWaitRetraceCRT2(ScrnInfoPtr pScrn); +static void XGIG1_SetCursorPosition(ScrnInfoPtr pScrn, int x, int y) ; + +/* Helper function for Xabre to convert mono image to ARGB */ +/* The Xabre's cursor engine for CRT2 is buggy and can't + * handle mono cursors. We therefore convert the mono image + * to ARGB + */ + +static void +Volari_ShowCursor(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + /* unsigned long cursor_addr = pXGI->CursorOffset ; */ + unsigned long cursor_base = pXGI->CursorOffset/1024 ; + + xgiG2CRT1_EnableHWCursor(cursor_base, 0); + if (pXGI->VBFlags & CRT2_ENABLE) { + xgiG2CRT2_EnableHWCursor(cursor_base, 0); + } + XGIG1_SetCursorPosition(pScrn, currX, currY) ; + XGI_vWaitCRT1VerticalRetrace(pScrn) ; +} + +static void +Volari_HideCursor(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + PDEBUG4(ErrorF("Volari_HideCursor(pScrn)\n")); + xgiG1CRT1_DisableHWCursor() ; + if (pXGI->VBFlags & CRT2_ENABLE) { + xgiG1CRT2_DisableHWCursor() ; + } + XGIG1_SetCursorPosition(pScrn, currX, currY) ; + XGI_vWaitCRT1VerticalRetrace(pScrn) ; + +#ifdef DEBUG4 + XGIDumpCursorMMIO(pScrn) ; +#endif +} + +static void +XGIG1_SetCursorPosition(ScrnInfoPtr pScrn, int x, int y) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + unsigned char x_preset = 0; + unsigned char y_preset = 0; + + currX = x ; + currY = y ; + + if (x < 0) { + x_preset = (-x); + x = 0; + } + if (y < 0) { + y_preset = (-y); + y = 0; + } + xgiG1CRT1_SetCursorPositionX(x, x_preset) ; + xgiG1CRT1_SetCursorPositionY(y, y_preset) ; + if (pXGI->VBFlags & CRT2_ENABLE) { + xgiG1CRT2_SetCursorPositionX(x+13, x_preset) ; + xgiG1CRT2_SetCursorPositionY(y, y_preset) ; + } +} + +static void +Volari_SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + xgiG1CRT1_SetCursorBGColor(bg) ; + xgiG1CRT1_SetCursorFGColor(fg) ; + if (pXGI->VBFlags & CRT2_ENABLE) { + xgiG1CRT2_SetCursorBGColor(bg) ; + xgiG1CRT2_SetCursorFGColor(fg) ; + } + XGIG1_SetCursorPosition(pScrn, currX, currY) ; +} + +static void +Volari_LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src) +{ + XGIPtr pXGI = XGIPTR(pScrn); + unsigned long cursor_addr = pXGI->CursorOffset ; + unsigned long cursor_base = pXGI->CursorOffset/1024 ; + unsigned char *pCursorShape ; + + /* cursor_addr = 1024*1024 ; */ + /* cursor_base = 1024 ; */ + pCursorShape = pXGI->FbBase + cursor_addr ; + + memcpy(pCursorShape, src, 1024); + + xgiG2CRT1_SetCursorAddressPattern(cursor_base,0) ; + /* xgiG2CRT1_SetCursorAddress(cursor_base) ; */ + /* xgiG2CRT1_SetCursorPatternSelect(0) ; */ + if (pXGI->VBFlags & CRT2_ENABLE) { + xgiG2CRT2_SetCursorAddressPattern(cursor_base,0) ; + /* xgiG1CRT2_SetCursorAddress(cursor_base) ; */ + /* xgiG1CRT2_SetCursorPatternSelect(0) ; */ + } + XGIG1_SetCursorPosition(pScrn, currX, currY) ; +} + +static Bool +Volari_UseHWCursor(ScreenPtr pScreen, CursorPtr pCurs) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + DisplayModePtr mode = pScrn->currentMode; + + if (mode->Flags & V_INTERLACE) + { + return FALSE; + } + return TRUE; +} + +Bool +XGIHWCursorInit(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XGIPtr pXGI = XGIPTR(pScrn); + xf86CursorInfoPtr infoPtr; + + infoPtr = xf86CreateCursorInfoRec(); + if(!infoPtr) return FALSE; + + pXGI->CursorInfoPtr = infoPtr; + pXGI->UseHWARGBCursor = FALSE; + + switch (pXGI->Chipset) { + + case PCI_CHIP_XGIXG40: + case PCI_CHIP_XGIXG20: + default: + PDEBUG(ErrorF("--- HWCursorInit() \n")); + infoPtr->MaxWidth = 64; + infoPtr->MaxHeight = 64; +/* infoPtr->ShowCursor = Volari_ShowCursorColor; // */ + infoPtr->ShowCursor = Volari_ShowCursor; + infoPtr->HideCursor = Volari_HideCursor; + infoPtr->SetCursorPosition = XGIG1_SetCursorPosition; + infoPtr->SetCursorColors = Volari_SetCursorColors; +/* infoPtr->LoadCursorImage = Volari_LoadCursorImageColors; // */ + infoPtr->LoadCursorImage = Volari_LoadCursorImage; + infoPtr->UseHWCursor = Volari_UseHWCursor; +/* infoPtr->RealizeCursor = XGIRealizeCursorColor ; // */ + infoPtr->Flags = + HARDWARE_CURSOR_TRUECOLOR_AT_8BPP | + HARDWARE_CURSOR_INVERT_MASK | + HARDWARE_CURSOR_BIT_ORDER_MSBFIRST | + HARDWARE_CURSOR_AND_SOURCE_WITH_MASK | + HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK | + HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64 ; + break ; + } + + return(xf86InitCursor(pScreen, infoPtr)); +} + +#ifdef DEBUG4 +void +XGIDumpCursorMMIO(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + unsigned long i ; + + ErrorF("-------------------------------------------------\n" ) ; + ErrorF("Dump Cursor Information\n" ) ; + ErrorF("-------------------------------------------------\n" ) ; + + for( i = 0x8500 ; i < 0x8540 ; i+=0x10 ) + { + ErrorF( "MMIO[%04lX]=%08lX ", i,XGIMMIOLONG(i) ) ; + ErrorF( "MMIO[%04lX]=%08lX ", i+4,XGIMMIOLONG(i+4) ) ; + ErrorF( "MMIO[%04lX]=%08lX ", i+8,XGIMMIOLONG(i+8) ) ; + ErrorF( "MMIO[%04lX]=%08lX\n", i+12,XGIMMIOLONG(i+12) ) ; + } +} +#endif Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_cursor.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_cursor.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_cursor.h Mon May 2 09:28:02 2005 @@ -0,0 +1,184 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_cursor.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ +/* + * XGI hardware cursor handling + * Definitions + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1) Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2) Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3) The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Thomas Winischhofer + * + * Idea based on code by Can-Ru Yeou, XGI Inc. + * + */ +#include "regs.h" +#define CS(x) (0x8500 + (x << 2)) + +/* 300 series, CRT1 */ + +/* 80000000 = RGB(1) - MONO(0) + * 40000000 = enable(1) - disable(0) + * 20000000 = 32(1) / 16(1) bit RGB + * 10000000 = "ghost"(1) - [other effect](0) + */ + +#define xgiG1CRT1_DisableHWCursor()\ + {\ + XGIMMIOLONG(0x8500) &= ~(1<<30) ; \ + } + +#define xgiG1CRT1_SetCursorBGColor(color)\ + {\ + XGIMMIOLONG(0x8504) = (color) ;\ + } + +#define xgiG1CRT1_SetCursorFGColor(color)\ + {\ + XGIMMIOLONG(0x8508) = (color) ;\ + } + +#define xgiG1CRT1_SetCursorPositionX(x,preset)\ + {\ + XGIMMIOLONG(0x850C) = (x) | ((preset)<<16);\ + } + +#define xgiG1CRT1_SetCursorPositionY(y,preset)\ + {\ + XGIMMIOLONG(0x8510) = (y) | ((preset)<<16);\ + } + +#define xgiG2CRT1_SetCursorAddressPattern(address,pat_id) \ +{\ + unsigned long ulTemp ;\ + ulTemp = XGIMMIOLONG(0x8500) ;\ + ulTemp &= 0xF0FE0000 ;\ + ulTemp |= (address) & 0x1FFFF ;\ + ulTemp |= ((pat_id)&0xF)<<24 ;\ + XGIMMIOLONG(0x8500) = ulTemp ;\ +} + +#define xgiG2CRT2_SetCursorAddressPattern(address,pat_id) \ +{\ + unsigned long ulTemp ;\ + ulTemp = XGIMMIOLONG(0x8520) ;\ + ulTemp &= 0xF0FE0000 ;\ + ulTemp |= (address) & 0x1FFFF ;\ + ulTemp |= ((pat_id)&0xF)<<24 ;\ + XGIMMIOLONG(0x8520) = ulTemp ;\ +} + +#define xgiG2CRT1_SetCursorAddress(address)\ + {\ + unsigned long ulTemp ;\ + ulTemp = XGIMMIOLONG(0x8500) ;\ + ulTemp &= 0xFFFE0000 ;\ + ulTemp |= (address) & 0x1FFFF ;\ + XGIMMIOLONG(0x8500) = ulTemp ;\ + } + +#define xgiG2CRT1_SetCursorPatternSelect(pat_id)\ + {\ + unsigned long ulTemp ;\ + ulTemp = XGIMMIOLONG(0x8500) ;\ + ulTemp &= 0xF0FFFFFF ;\ + ulTemp |= ((pat_id)&0xF)<<24 ;\ + XGIMMIOLONG(0x8500) = ulTemp ;\ + } + +#define xgiG1CRT2_DisableHWCursor()\ + {\ + XGIMMIOLONG(0x8520) &= ~(1<<30);\ + } + +#define xgiG1CRT2_SetCursorBGColor(color)\ + {\ + XGIMMIOLONG(0x8524) = (color) ;\ + } + +#define xgiG1CRT2_SetCursorFGColor(color)\ + {\ + XGIMMIOLONG(0x8528) = (color) ;\ + } + +#define xgiG1CRT2_SetCursorPositionX(x,preset)\ + {\ + XGIMMIOLONG(0x852C) = (x) | ((preset)<<16);\ + } + +#define xgiG1CRT2_SetCursorPositionY(y,preset)\ + {\ + XGIMMIOLONG(0x8530) = (y) | ((preset)<<16);\ + } + +#define xgiG1CRT2_SetCursorAddress(address)\ + {\ + unsigned long ulTemp ;\ + ulTemp = XGIMMIOLONG(0x8520) ;\ + ulTemp &= 0xFFFE0000 ;\ + ulTemp |= (address) & 0x1FFFF ;\ + XGIMMIOLONG(0x8520) = ulTemp ;\ + } + +#define xgiG1CRT2_SetCursorPatternSelect(pat_id)\ + {\ + unsigned long ulTemp ;\ + ulTemp = XGIMMIOLONG(0x8520) ;\ + ulTemp &= 0xF0FFFFFF ;\ + ulTemp |= ((pat_id)&0xF) << 24 ;\ + XGIMMIOLONG(0x8520) = ulTemp ;\ + } + +#define xgiG2CRT1_EnableHWCursor(cursor_base,pat_id)\ + {\ + CARD32 ulTemp ;\ + ulTemp = XGIMMIOLONG(0x8500) ;\ + ulTemp &= 0x00FE0000 ;\ + ulTemp |= 1<<30 ;\ + ulTemp |= (cursor_base) & 0x1FFFF ;\ + ulTemp |= ((pat_id)&0xF)<<24 ;\ + XGIMMIOLONG(0x8500) = ulTemp ;\ + } + +#define xgiG2CRT1_DisableHWCursor()\ + {\ + XGIMMIOLONG(0x8500) &= ~(1<<30);\ + } + +#define xgiG2CRT2_EnableHWCursor(cursor_base,pat_id)\ + {\ + CARD32 ulTemp ;\ + ulTemp = XGIMMIOLONG(0x8520) ;\ + ulTemp &= 0x00FE0000 ;\ + ulTemp |= 1<<30 ;\ + ulTemp |= (cursor_base) & 0x1FFFF ;\ + ulTemp |= ((pat_id)&0xF)<<24 ;\ + XGIMMIOLONG(0x8520) = ulTemp ;\ + } + +/*******************************************************************/ + + + + + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.c:1.2 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.c Mon Jun 6 21:33:39 2005 @@ -0,0 +1,650 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.c,v 1.2 2005/06/07 01:33:39 tsi Exp $ */ +/* + * DAC helper functions (Save/Restore, MemClk, etc) + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1) Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2) Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3) The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Thomas Winischhofer + * + * XGI_compute_vclk(), XGICalcClock() and parts of XGIMclk(): + * Copyright (C) 1998, 1999 by Alan Hourihane, Wigan, England + * Written by: + * Alan Hourihane , + * Mike Chapman , + * Juanjo Santamarta , + * Mitani Hiroshi , + * David Thomas , + * Thomas Winischhofer . + * Licensed under the terms of the XFree86 license + * (http://www.xfree86.org/current/LICENSE1.html) + * + */ + +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86_ansic.h" +#include "xf86Version.h" +#include "xf86PciInfo.h" +#include "xf86Pci.h" +#include "xf86DDC.h" + +#include "xgi.h" +#include "xgi_dac.h" +#include "regs.h" +#include "xgi_vb.h" + +static void Volari_Save(ScrnInfoPtr pScrn, XGIRegPtr xgiReg) ; +static void Volari_Restore(ScrnInfoPtr pScrn, XGIRegPtr xgiReg) ; +static void Volari_Threshold(ScrnInfoPtr pScrn, DisplayModePtr mode, + unsigned short *Low, unsigned short *High); +/* +static void SetBlock(CARD16 port, CARD8 from, CARD8 to, CARD8 *DataPtr); +*/ +int +XGI_compute_vclk( + int Clock, + int *out_n, + int *out_dn, + int *out_div, + int *out_sbit, + int *out_scale) +{ + float f,x,y,t, error, min_error; + int n, dn, best_n=0, best_dn=0; + + /* + * Rules + * + * VCLK = 14.318 * (Divider/Post Scalar) * (Numerator/DeNumerator) + * Factor = (Divider/Post Scalar) + * Divider is 1 or 2 + * Post Scalar is 1, 2, 3, 4, 6 or 8 + * Numberator ranged from 1 to 128 + * DeNumerator ranged from 1 to 32 + * a. VCO = VCLK/Factor, suggest range is 150 to 250 Mhz + * b. Post Scalar selected from 1, 2, 4 or 8 first. + * c. DeNumerator selected from 2. + * + * According to rule a and b, the VCO ranges that can be scaled by + * rule b are: + * 150 - 250 (Factor = 1) + * 75 - 125 (Factor = 2) + * 37.5 - 62.5 (Factor = 4) + * 18.75 - 31.25 (Factor = 8) + * + * The following ranges use Post Scalar 3 or 6: + * 125 - 150 (Factor = 1.5) + * 62.5 - 75 (Factor = 3) + * 31.25 - 37.5 (Factor = 6) + * + * Steps: + * 1. divide the Clock by 2 until the Clock is less or equal to 31.25. + * 2. if the divided Clock is range from 18.25 to 31.25, than + * the Factor is 1, 2, 4 or 8. + * 3. if the divided Clock is range from 15.625 to 18.25, than + * the Factor is 1.5, 3 or 6. + * 4. select the Numberator and DeNumberator with minimum deviation. + * + * ** this function can select VCLK ranged from 18.75 to 250 Mhz + */ + f = (float) Clock; + f /= 1000.0; + if ((f > 250.0) || (f < 18.75)) + return 0; + + min_error = f; + y = 1.0; + x = f; + while (x > 31.25) { + y *= 2.0; + x /= 2.0; + } + if (x >= 18.25) { + x *= 8.0; + y = 8.0 / y; + } else if (x >= 15.625) { + x *= 12.0; + y = 12.0 / y; + } + + t = y; + if (t == (float) 1.5) { + *out_div = 2; + t *= 2.0; + } else { + *out_div = 1; + } + if (t > (float) 4.0) { + *out_sbit = 1; + t /= 2.0; + } else { + *out_sbit = 0; + } + + *out_scale = (int) t; + + for (dn=2;dn<=32;dn++) { + for (n=1;n<=128;n++) { + error = x; + error -= ((float) 14.318 * (float) n / (float) dn); + if (error < (float) 0) + error = -error; + if (error < min_error) { + min_error = error; + best_n = n; + best_dn = dn; + } + } + } + *out_n = best_n; + *out_dn = best_dn; + PDEBUG(ErrorF("compute_vclk: Clock=%d, n=%d, dn=%d, div=%d, sbit=%d," + " scale=%d\n", Clock, best_n, best_dn, *out_div, + *out_sbit, *out_scale)); + return 1; +} + +void +XGICalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, unsigned int *vclk) +{ +/* XGIPtr pXGI = XGIPTR(pScrn); */ + int M, N, P , PSN, VLD , PSNx ; + int bestM=0, bestN=0, bestP=0, bestPSN=0, bestVLD=0; + double abest = 42.0; + double target; + double Fvco, Fout; + double error, aerror; +#ifdef DEBUG + double bestFout; +#endif + + /* + * fd = fref*(Numerator/Denumerator)*(Divider/PostScaler) + * + * M = Numerator [1:128] + * N = DeNumerator [1:32] + * VLD = Divider (Vco Loop Divider) : divide by 1, 2 + * P = Post Scaler : divide by 1, 2, 3, 4 + * PSN = Pre Scaler (Reference Divisor Select) + * + * result in vclk[] + */ +#define Midx 0 +#define Nidx 1 +#define VLDidx 2 +#define Pidx 3 +#define PSNidx 4 +#define Fref 14318180 +/* stability constraints for internal VCO -- MAX_VCO also determines + * the maximum Video pixel clock */ +#define MIN_VCO Fref +#define MAX_VCO 135000000 +#define MAX_VCO_5597 353000000 +#define MAX_PSN 0 /* no pre scaler for this chip */ +#define TOLERANCE 0.01 /* search smallest M and N in this tolerance */ + + int M_min = 2; + int M_max = 128; + + target = clock * 1000; + + for(PSNx = 0; PSNx <= MAX_PSN ; PSNx++) { + + int low_N, high_N; + double FrefVLDPSN; + + PSN = !PSNx ? 1 : 4; + + low_N = 2; + high_N = 32; + + for(VLD = 1 ; VLD <= max_VLD ; VLD++) { + + FrefVLDPSN = (double)Fref * VLD / PSN; + + for(N = low_N; N <= high_N; N++) { + double tmp = FrefVLDPSN / N; + + for(P = 1; P <= 4; P++) { + double Fvco_desired = target * ( P ); + double M_desired = Fvco_desired / tmp; + + /* Which way will M_desired be rounded? + * Do all three just to be safe. + */ + int M_low = M_desired - 1; + int M_hi = M_desired + 1; + + if(M_hi < M_min || M_low > M_max) continue; + + if(M_low < M_min) M_low = M_min; + + if(M_hi > M_max) M_hi = M_max; + + for(M = M_low; M <= M_hi; M++) { + Fvco = tmp * M; + if(Fvco <= MIN_VCO) continue; + if(Fvco > MAX_VCO) break; + + Fout = Fvco / ( P ); + + error = (target - Fout) / target; + aerror = (error < 0) ? -error : error; + if(aerror < abest) { + abest = aerror; + bestM = M; + bestN = N; + bestP = P; + bestPSN = PSN; + bestVLD = VLD; +#ifdef DEBUG + bestFout = Fout; +#endif + } +#ifdef TWDEBUG + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO,3, + "Freq. selected: %.2f MHz, M=%d, N=%d, VLD=%d, P=%d, PSN=%d\n", + (float)(clock / 1000.), M, N, P, VLD, PSN); + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO,3, + "Freq. set: %.2f MHz\n", Fout / 1.0e6); +#endif + } + } + } + } + } + + vclk[Midx] = bestM; + vclk[Nidx] = bestN; + vclk[VLDidx] = bestVLD; + vclk[Pidx] = bestP; + vclk[PSNidx] = bestPSN; + + PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, + "Freq. selected: %.2f MHz, M=%d, N=%d, VLD=%d, P=%d, PSN=%d\n", + (float)(clock / 1000.), vclk[Midx], vclk[Nidx], vclk[VLDidx], + vclk[Pidx], vclk[PSNidx])); + PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, + "Freq. set: %.2f MHz\n", bestFout / 1.0e6)); + PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, + "VCO Freq.: %.2f MHz\n", bestFout*bestP / 1.0e6)); +} + +static void +Volari_Save(ScrnInfoPtr pScrn, XGIRegPtr xgiReg) +{ + XGIPtr pXGI = XGIPTR(pScrn); + int i; + + PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, + "Volari_Save(ScrnInfoPtr pScrn, XGIRegPtr xgiReg)\n")); + + vgaHWGetIOBase(VGAHWPTR(pScrn)); + + outw(VGA_SEQ_INDEX, 0x8605); + + for (i = 0x06; i <= 0x3F; i++) { + outb(VGA_SEQ_INDEX, i); + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4, + "XR%02X Contents - %02X \n", i, inb(VGA_SEQ_DATA)); + xgiReg->xgiRegs3C4[i] = inb(VGA_SEQ_DATA); + } + + for (i=0x19; i<0x5C; i++) { + inXGIIDXREG(XGICR, i, xgiReg->xgiRegs3D4[i]); + } + + /*xgiReg->xgiRegs3C2 = inb(0x3CC);*/ + + xgiReg->xgiRegs3C2 = inb(pXGI->RelIO+0x4c); + + PDEBUG(xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, + "Volari_Save(ScrnInfoPtr pScrn, XGIRegPtr xgiReg) Done\n")); +} + +static void +Volari_Restore(ScrnInfoPtr pScrn, XGIRegPtr xgiReg) +{ + XGIPtr pXGI = XGIPTR(pScrn); + int i; + +PDEBUG(ErrorF("--- Volari_Restore(). \n")) ; + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4, + "Volari_Restore(ScrnInfoPtr pScrn, XGIRegPtr xgiReg)\n"); + + vgaHWGetIOBase(VGAHWPTR(pScrn)); + + outXGIIDXREG(XGISR, 0x05, 0x86); + +#if 1 +/* Volari_DisableAccelerator(pScrn) ; */ + +#ifdef DEBUG + PDEBUG(ErrorF("--- MMIO Info. \n")) ; + for( i = 0x85c0 ;i <= 0x85CC ; i+=4 ) + { + ErrorF("MMIO[0x%04lX] = 0x%08X\n", i, MMIO_IN32(pXGI->IOBase,i)) ; + } +#endif +#else + inXGIIDXREG(XGISR, 0x1E, temp); + + if (temp & 0x42) { + while( (MMIO_IN32(pXGI->IOBase, 0x85CC) & 0x80000000) != 0x80000000){}; + while( (MMIO_IN32(pXGI->IOBase, 0x85CC) & 0x80000000) != 0x80000000){}; + while( (MMIO_IN32(pXGI->IOBase, 0x85CC) & 0x80000000) != 0x80000000){}; + } + + PDEBUG(XGIDumpRegs(pScrn)) ; + temp = MMIO_IN32(pXGI->IOBase,0x85CC) ; +/* ErrorF( "\npXGI->IOBase = 0x%lX, [85CC] = 0x%lX\n", */ + (unsigned long)(pXGI->IOBase), temp ) ; + + + outXGIIDXREG(XGICR, 0x55, 0) ; + andXGIIDXREG(XGISR, 0x1E, ~0xC2) ; + + PDEBUG(XGIDumpRegs(pScrn)) ; +#endif + + for (i = 0x19; i < 0x5C; i++) { + outXGIIDXREG(XGICR, i, xgiReg->xgiRegs3D4[i]); + } + + for (i = 0x06; i <= 0x3F; i++) { + /* if( !(i==0x16 || i==0x18 || i==0x19 || i==0x28 || i==0x29 || i==0x2E || i==0x2F) ) { */ + if( !(i==0x16 ) ) { + outb(VGA_SEQ_INDEX,i); + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO,4, + "XR%X Contents - %02X ", i, inb(VGA_SEQ_DATA)); + + outb(VGA_SEQ_DATA,xgiReg->xgiRegs3C4[i]); + + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO,4, + "Restore to - %02X Read after - %02X\n", + xgiReg->xgiRegs3C4[i], inb(VGA_SEQ_DATA)); + } + } + + /*outb(0x3C2, xgiReg->xgiRegs3C2);*/ + outb(pXGI->RelIO+0x42, xgiReg->xgiRegs3C2); + + /* MemClock needs this to take effect */ + + outw(VGA_SEQ_INDEX, 0x0100); /* Synchronous Reset */ + + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4, + "Volari_Restore(ScrnInfoPtr pScrn, XGIRegPtr xgiReg) Done\n"); +} + +static void +Volari_Threshold(ScrnInfoPtr pScrn, DisplayModePtr mode, + unsigned short *Low, unsigned short *High) +{ + XGIPtr pXGI = XGIPTR(pScrn); +/* XGIRegPtr pReg = &pXGI->ModeReg; + int mclk = pXGI->MemClock; + int vclk = mode->Clock; + int bpp = pScrn->bitsPerPixel/8; + int lowa, lowb, low; + struct funcargc *p; + unsigned int i, j; +*/ + + orXGIIDXREG(XGISR, 0x3D, 0x01) ; +} + +const float magic315[4] = { 1.2, 1.368421, 2.263158, 1.2}; +const float magic640[4] = { 1.441177, 1.441177, 2.588235, 1.441177 }; + +int XG40_MemBandWidth(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + int bus = pXGI->BusWidth; + int mclk = pXGI->MemClock; + int bpp = pScrn->bitsPerPixel; + float magic, total; + + if ( bus > 128 ) bus = 128 ; + + magic = magic315[bus/64]; + + PDEBUG(ErrorF("mclk: %d, bus: %d, magic: %g, bpp: %d\n", + mclk, bus, magic, bpp)); + + total = mclk*bus/bpp; + PDEBUG(ErrorF("Total Adapter Bandwidth is %gM\n", total/1000)); + if (pXGI->VBFlags & CRT2_ENABLE) { + if (total/2 > 540000) + { + total = total - 540000; + } + else + { + total = total/2; + } +/* ErrorF("CRT1 Used Bandwidth is %gM\n", total/1000); */ + } +/* + if( (total/magic) > (float)(MAX_INT)) + { + return MAX_INT ; + } +*/ + return (int)(total/magic); +} + +void +XGILoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, LOCO *colors, + VisualPtr pVisual) +{ + XGIPtr pXGI = XGIPTR(pScrn); + int i, j, index; +/* unsigned char backup = 0; */ + Bool dogamma1 = pXGI->CRT1gamma; +/* Bool resetxvgamma = FALSE; */ +#ifdef XGIDUALHEAD + XGIEntPtr pXGIEnt = pXGI->entityPrivate; + + if(pXGI->DualHeadMode) dogamma1 = pXGIEnt->CRT1gamma; +#endif + + PDEBUG(ErrorF("xgiLoadPalette(%d)\n", numColors)); + +#ifdef XGIDUALHEAD + if((!pXGI->DualHeadMode) || (pXGI->SecondHead)) { +#endif + + switch(pXGI->CurrentLayout.depth) { +#ifdef XGIGAMMA + case 15: + if(dogamma1) { + orXGIIDXREG(XGISR, 0x07, 0x04); + for(i=0; irgbBits)); + outXGIREG(XGICOLDATA, colors[index].green << (8 - pScrn->rgbBits)); + outXGIREG(XGICOLDATA, colors[index].blue << (8 - pScrn->rgbBits)); + } + } + } + } else { + andXGIIDXREG(XGISR, 0x07, ~0x04); + } + break; + case 16: + if(dogamma1) { + orXGIIDXREG(XGISR, 0x07, 0x04); + for(i=0; irgbBits)); + outXGIREG(XGICOLDATA, colors[index].green << (8 - pScrn->rgbBits)); + outXGIREG(XGICOLDATA, colors[index/2].blue << (8 - pScrn->rgbBits)); + } + } + } + } else { + andXGIIDXREG(XGISR, 0x07, ~0x04); + } + break; + case 24: + if(dogamma1) { + orXGIIDXREG(XGISR, 0x07, 0x04); + for(i=0; irgbBits == 8) && (dogamma1)) + orXGIIDXREG(XGISR, 0x07, 0x04); + else + andXGIIDXREG(XGISR, 0x07, ~0x04); + for(i=0; i> (8 - pScrn->rgbBits)); + outXGIREG(XGICOLDATA, colors[index].green >> (8 - pScrn->rgbBits)); + outXGIREG(XGICOLDATA, colors[index].blue >> (8 - pScrn->rgbBits)); + } + } + +#ifdef XGIDUALHEAD + } + + if((!pXGI->DualHeadMode) || (!pXGI->SecondHead)) { +#endif + +#ifdef XGIDUALHEAD + } +#endif +} + +void +XGIDACPreInit(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + +PDEBUG(ErrorF("XGIDACPreInit()\n")); + + switch (pXGI->Chipset) { + case PCI_CHIP_XGIXG40: + case PCI_CHIP_XGIXG20: + default: + pXGI->MaxClock = XG40_MemBandWidth(pScrn); + pXGI->XGISave = Volari_Save; + pXGI->XGIRestore = Volari_Restore; + pXGI->SetThreshold = Volari_Threshold; + break; + } +} + +/* static void +SetBlock(CARD16 port, CARD8 from, CARD8 to, CARD8 *DataPtr) +{ + CARD8 index; + + for(index = from; index <= to; index++, DataPtr++) { + outXGIIDXREG(port, index, *DataPtr); + } +} */ + +int +XG40Mclk(XGIPtr pXGI) +{ + int mclk; + unsigned char Num, Denum; + + /* Numerator */ + switch (pXGI->Chipset) { + case PCI_CHIP_XGIXG40: + default: + /* Numerator */ + read_xr(0x28, Num); + mclk = 14318*((Num &0x7f)+1); + + /* Denumerator */ + read_xr(0x29, Denum); + mclk = mclk/((Denum & 0x1f)+1); + + /* Divider */ + if ((Num & 0x80)!=0) { + mclk = mclk * 2; + } + + /* Post-Scaler */ + if ((Denum & 0x80)==0) { + mclk = mclk / (((Denum & 0x60) >> 5) + 1); + } + else { + mclk = mclk / ((((Denum & 0x60) >> 5) + 1) * 2); + } + break; + /* mclk = 0; */ + } + + return(mclk); +} + +void +XGI_vWaitCRT1VerticalRetrace(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + CARD8 v ; + signed long count = 0x10000 ; + + do { + count -- ; + if ( count <= 0 ) + { + break ; + } + v = inXGIREG(XGI_IS1) ; + }while(!(v & IS_BIT_VERT_ACTIVE)) ; + + do { + count -- ; + if ( count <= 0 ) + { + break ; + } + v = inXGIREG(XGI_IS1) ; + }while(v & IS_BIT_VERT_ACTIVE) ; +} Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.h Mon May 2 09:28:02 2005 @@ -0,0 +1,61 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ +/* + * DAC helper functions (Save/Restore, MemClk, etc) + * Definitions and prototypes + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1) Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2) Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3) The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + +void XGIDACPreInit(ScrnInfoPtr pScrn); +void XGILoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices, + LOCO *colors, VisualPtr pVisual); +void XGICalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, + unsigned int *vclk); +void XGIIODump(ScrnInfoPtr pScrn); +int XG40_MemBandWidth(ScrnInfoPtr pScrn); +int XGIMclk(XGIPtr pXGI); +void XGIRestoreBridge(ScrnInfoPtr pScrn, XGIRegPtr xgiReg); + +extern int XGICalcVRate(DisplayModePtr mode); + +/* Functions from init.c and init301.c */ + +extern void XGI_New_EnableBridge(XGI_Private *XGI_Pr, PXGI_HW_DEVICE_INFO); +extern USHORT XGI_GetCH700x(XGI_Private *XGI_Pr, USHORT tempbx); +extern void XGI_SetCH700x(XGI_Private *XGI_Pr, USHORT tempbx); +extern USHORT XGI_GetCH701x(XGI_Private *XGI_Pr, USHORT tempbx); +extern void XGI_SetCH701x(XGI_Private *XGI_Pr, USHORT tempbx); +extern USHORT XGI_GetCH70xx(XGI_Private *XGI_Pr, USHORT tempbx); +extern void XGI_SetCH70xx(XGI_Private *XGI_Pr, USHORT tempbx); +extern void XGI_SetCH70xxANDOR(XGI_Private *XGI_Pr, USHORT tempax,USHORT tempbh); +extern void XGI_SetTrumpReg(XGI_Private *XGI_Pr, USHORT tempbx); +extern USHORT XGI_GetTrumpReg(XGI_Private *XGI_Pr, USHORT tempbx); +extern void XGI_DDC2Delay(XGI_Private *XGI_Pr, USHORT delaytime); +extern void XGI_SetChrontelGPIO(XGI_Private *XGI_Pr, USHORT myvbinfo); +extern void XGI_New_DisplayOn(XGI_Private *XGI_Pr); +extern unsigned char XGI_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id); +extern void XGI_SetEnableDstn(XGI_Private *XGI_Pr, int enable); +extern void XGI_SetEnableFstn(XGI_Private *XGI_Pr, int enable); Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dga.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dga.c:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dga.c Mon May 2 09:28:02 2005 @@ -0,0 +1,439 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dga.c,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ +/* + * DGA handling + * + * Copyright (C) 2000 by Alan Hourihane, Sychdyn, North Wales, UK. + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria + * + * Portions from radeon_dga.c which is + * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and + * VA Linux Systems Inc., Fremont, California. + * + * Licensed under the following terms: + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appear in all copies and that both that + * copyright notice and this permission notice appear in supporting + * documentation, and that the name of the providers not be used in + * advertising or publicity pertaining to distribution of the software without + * specific, written prior permission. The providers make no representations + * about the suitability of this software for any purpose. It is provided + * "as is" without express or implied warranty. + * + * THE PROVIDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO + * EVENT SHALL THE PROVIDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, + * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER + * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR + * PERFORMANCE OF THIS SOFTWARE. + * + * Authors: Alan Hourihane, + * Thomas Winischhofer + */ + +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86_ansic.h" +#include "xf86Pci.h" +#include "xf86PciInfo.h" +#include "xaa.h" +#include "xaalocal.h" +#include "xgi.h" +#include "regs.h" +#include "dgaproc.h" + +#ifndef NEW_DGAOPENFRAMEBUFFER +static Bool XGI_OpenFramebuffer(ScrnInfoPtr, char **, unsigned char **, + int *, int *, int *); +#else +static Bool XGI_OpenFramebuffer(ScrnInfoPtr, char **, unsigned int *, + unsigned int *, unsigned int *, unsigned int *); +#endif + +static Bool XGI_SetMode(ScrnInfoPtr, DGAModePtr); +static void XGI_Sync(ScrnInfoPtr); +static int XGI_GetViewport(ScrnInfoPtr); +static void XGI_SetViewport(ScrnInfoPtr, int, int, int); +static void XGI_FillRect(ScrnInfoPtr, int, int, int, int, unsigned long); +static void XGI_BlitRect(ScrnInfoPtr, int, int, int, int, int, int); +static void XGI_BlitTransRect(ScrnInfoPtr, int, int, int, int, int, int, + unsigned long); + +static +DGAFunctionRec XGIDGAFuncs = { + XGI_OpenFramebuffer, + NULL, + XGI_SetMode, + XGI_SetViewport, + XGI_GetViewport, + XGI_Sync, + XGI_FillRect, + XGI_BlitRect, + NULL +}; + +static +DGAFunctionRec XGIDGAFuncs3xx = { + XGI_OpenFramebuffer, + NULL, + XGI_SetMode, + XGI_SetViewport, + XGI_GetViewport, + XGI_Sync, + XGI_FillRect, + XGI_BlitRect, + XGI_BlitTransRect +}; + +static DGAModePtr +XGISetupDGAMode( + ScrnInfoPtr pScrn, + DGAModePtr modes, + int *num, + int bitsPerPixel, + int depth, + Bool pixmap, + int secondPitch, + unsigned long red, + unsigned long green, + unsigned long blue, + short visualClass +){ + XGIPtr pXGI = XGIPTR(pScrn); + DGAModePtr newmodes = NULL, currentMode; + DisplayModePtr pMode, firstMode; + int otherPitch, Bpp = bitsPerPixel >> 3; + Bool oneMore; + + pMode = firstMode = pScrn->modes; + + while(pMode) { + + otherPitch = secondPitch ? secondPitch : pMode->HDisplay; + + if(pMode->HDisplay != otherPitch) { + + newmodes = xrealloc(modes, (*num + 2) * sizeof(DGAModeRec)); + oneMore = TRUE; + + } else { + + newmodes = xrealloc(modes, (*num + 1) * sizeof(DGAModeRec)); + oneMore = FALSE; + + } + + if(!newmodes) { + xfree(modes); + return NULL; + } + modes = newmodes; + +SECOND_PASS: + + currentMode = modes + *num; + (*num)++; + + currentMode->mode = pMode; + currentMode->flags = DGA_CONCURRENT_ACCESS; + if(pixmap) + currentMode->flags |= DGA_PIXMAP_AVAILABLE; + if(!pXGI->NoAccel) { + currentMode->flags |= DGA_FILL_RECT | DGA_BLIT_RECT; + if((pXGI->VGAEngine == XGI_300_VGA) || + (pXGI->VGAEngine == XGI_315_VGA) || + (pXGI->VGAEngine == XGI_530_VGA)) { + currentMode->flags |= DGA_BLIT_RECT_TRANS; + } + } + if(pMode->Flags & V_DBLSCAN) + currentMode->flags |= DGA_DOUBLESCAN; + if(pMode->Flags & V_INTERLACE) + currentMode->flags |= DGA_INTERLACED; + currentMode->byteOrder = pScrn->imageByteOrder; + currentMode->depth = depth; + currentMode->bitsPerPixel = bitsPerPixel; + currentMode->red_mask = red; + currentMode->green_mask = green; + currentMode->blue_mask = blue; + currentMode->visualClass = visualClass; + currentMode->viewportWidth = pMode->HDisplay; + currentMode->viewportHeight = pMode->VDisplay; + currentMode->xViewportStep = 1; + currentMode->yViewportStep = 1; + currentMode->viewportFlags = DGA_FLIP_RETRACE; + currentMode->offset = 0; + currentMode->address = pXGI->FbBase; + + if(oneMore) { + + /* first one is narrow width */ + currentMode->bytesPerScanline = (((pMode->HDisplay * Bpp) + 3) & ~3L); + currentMode->imageWidth = pMode->HDisplay; + currentMode->imageHeight = pMode->VDisplay; + currentMode->pixmapWidth = currentMode->imageWidth; + currentMode->pixmapHeight = currentMode->imageHeight; + currentMode->maxViewportX = currentMode->imageWidth - + currentMode->viewportWidth; + /* this might need to get clamped to some maximum */ + currentMode->maxViewportY = (currentMode->imageHeight - + currentMode->viewportHeight); + oneMore = FALSE; + goto SECOND_PASS; + + } else { + + currentMode->bytesPerScanline = ((otherPitch * Bpp) + 3) & ~3L; + currentMode->imageWidth = otherPitch; + currentMode->imageHeight = pMode->VDisplay; + currentMode->pixmapWidth = currentMode->imageWidth; + currentMode->pixmapHeight = currentMode->imageHeight; + currentMode->maxViewportX = (currentMode->imageWidth - + currentMode->viewportWidth); + /* this might need to get clamped to some maximum */ + currentMode->maxViewportY = (currentMode->imageHeight - + currentMode->viewportHeight); + } + + pMode = pMode->next; + if(pMode == firstMode) + break; + } + + return modes; +} + + +Bool +XGIDGAInit(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XGIPtr pXGI = XGIPTR(pScrn); + DGAModePtr modes = NULL; + int num = 0; + + /* 8 */ + /* We don't support 8bpp modes in dual head or MergedFB mode, + * so don't offer them to DGA either. + */ +#ifdef XGIDUALHEAD + if(!pXGI->DualHeadMode) { +#endif +#ifdef XGIMERGED + if(!(pXGI->MergedFB)) { +#endif + modes = XGISetupDGAMode(pScrn, modes, &num, 8, 8, + (pScrn->bitsPerPixel == 8), + ((pScrn->bitsPerPixel != 8) + ? 0 : pScrn->displayWidth), + 0, 0, 0, PseudoColor); +#ifdef XGIMERGED + } +#endif +#ifdef XGIDUALHEAD + } +#endif + + /* 16 */ + modes = XGISetupDGAMode(pScrn, modes, &num, 16, 16, + (pScrn->bitsPerPixel == 16), + ((pScrn->depth != 16) + ? 0 : pScrn->displayWidth), + 0xf800, 0x07e0, 0x001f, TrueColor); + + if((pXGI->VGAEngine == XGI_530_VGA) || (pXGI->VGAEngine == XGI_OLD_VGA)) { + /* 24 */ + modes = XGISetupDGAMode(pScrn, modes, &num, 24, 24, + (pScrn->bitsPerPixel == 24), + ((pScrn->bitsPerPixel != 24) + ? 0 : pScrn->displayWidth), + 0xff0000, 0x00ff00, 0x0000ff, TrueColor); + } + + if(pXGI->VGAEngine != XGI_OLD_VGA) { + /* 32 */ + modes = XGISetupDGAMode(pScrn, modes, &num, 32, 24, + (pScrn->bitsPerPixel == 32), + ((pScrn->bitsPerPixel != 32) + ? 0 : pScrn->displayWidth), + 0xff0000, 0x00ff00, 0x0000ff, TrueColor); + } + + pXGI->numDGAModes = num; + pXGI->DGAModes = modes; + + if((pXGI->VGAEngine == XGI_300_VGA) || + (pXGI->VGAEngine == XGI_315_VGA) || + (pXGI->VGAEngine == XGI_530_VGA)) { + return DGAInit(pScreen, &XGIDGAFuncs3xx, modes, num); + } else { + return DGAInit(pScreen, &XGIDGAFuncs, modes, num); + } +} + + +static Bool +XGI_SetMode( + ScrnInfoPtr pScrn, + DGAModePtr pMode +){ + static XGIFBLayout BackupLayouts[MAXSCREENS]; + int index = pScrn->pScreen->myNum; + XGIPtr pXGI = XGIPTR(pScrn); + + if(!pMode) { /* restore the original mode */ + + if(pXGI->DGAactive) { + /* put the ScreenParameters back */ + memcpy(&pXGI->CurrentLayout, &BackupLayouts[index], sizeof(XGIFBLayout)); + } + + pScrn->currentMode = pXGI->CurrentLayout.mode; + + (*pScrn->SwitchMode)(index, pScrn->currentMode, 0); + (*pScrn->AdjustFrame)(index, pScrn->frameX0, pScrn->frameY0, 0); + pXGI->DGAactive = FALSE; + + } else { /* set new mode */ + + if(!pXGI->DGAactive) { + /* save the old parameters */ + memcpy(&BackupLayouts[index], &pXGI->CurrentLayout, sizeof(XGIFBLayout)); + pXGI->DGAactive = TRUE; + } + + pXGI->CurrentLayout.bitsPerPixel = pMode->bitsPerPixel; + pXGI->CurrentLayout.depth = pMode->depth; + pXGI->CurrentLayout.displayWidth = pMode->bytesPerScanline / (pMode->bitsPerPixel >> 3); + + (*pScrn->SwitchMode)(index, pMode->mode, 0); + /* TW: Adjust viewport to 0/0 after mode switch */ + /* This should fix the vmware-in-dualhead problems */ + (*pScrn->AdjustFrame)(index, 0, 0, 0); + } + + return TRUE; +} + +static int +XGI_GetViewport( + ScrnInfoPtr pScrn +){ + XGIPtr pXGI = XGIPTR(pScrn); + + return pXGI->DGAViewportStatus; +} + +static void +XGI_SetViewport( + ScrnInfoPtr pScrn, + int x, int y, + int flags +){ + XGIPtr pXGI = XGIPTR(pScrn); + + (*pScrn->AdjustFrame)(pScrn->pScreen->myNum, x, y, flags); + pXGI->DGAViewportStatus = 0; /* There are never pending Adjusts */ +} + +static void +XGI_FillRect ( + ScrnInfoPtr pScrn, + int x, int y, int w, int h, + unsigned long color +){ + XGIPtr pXGI = XGIPTR(pScrn); + + if(pXGI->AccelInfoPtr) { + (*pXGI->AccelInfoPtr->SetupForSolidFill)(pScrn, color, GXcopy, ~0); + (*pXGI->AccelInfoPtr->SubsequentSolidFillRect)(pScrn, x, y, w, h); + SET_SYNC_FLAG(pXGI->AccelInfoPtr); + } +} + +static void +XGI_Sync( + ScrnInfoPtr pScrn +){ + XGIPtr pXGI = XGIPTR(pScrn); + + if(pXGI->AccelInfoPtr) { + (*pXGI->AccelInfoPtr->Sync)(pScrn); + } +} + +static void +XGI_BlitRect( + ScrnInfoPtr pScrn, + int srcx, int srcy, + int w, int h, + int dstx, int dsty +){ + XGIPtr pXGI = XGIPTR(pScrn); + + if(pXGI->AccelInfoPtr) { + int xdir = ((srcx < dstx) && (srcy == dsty)) ? -1 : 1; + int ydir = (srcy < dsty) ? -1 : 1; + + (*pXGI->AccelInfoPtr->SetupForScreenToScreenCopy)( + pScrn, xdir, ydir, GXcopy, (CARD32)~0, -1); + (*pXGI->AccelInfoPtr->SubsequentScreenToScreenCopy)( + pScrn, srcx, srcy, dstx, dsty, w, h); + SET_SYNC_FLAG(pXGI->AccelInfoPtr); + } +} + +static void +XGI_BlitTransRect( + ScrnInfoPtr pScrn, + int srcx, int srcy, + int w, int h, + int dstx, int dsty, + unsigned long color +){ + XGIPtr pXGI = XGIPTR(pScrn); + + if(pXGI->AccelInfoPtr) { + int xdir = ((srcx < dstx) && (srcy == dsty)) ? -1 : 1; + int ydir = (srcy < dsty) ? -1 : 1; + + (*pXGI->AccelInfoPtr->SetupForScreenToScreenCopy)( + pScrn, xdir, ydir, GXcopy, ~0, color); + (*pXGI->AccelInfoPtr->SubsequentScreenToScreenCopy)( + pScrn, srcx, srcy, dstx, dsty, w, h); + SET_SYNC_FLAG(pXGI->AccelInfoPtr); + } +} + +static Bool +XGI_OpenFramebuffer( + ScrnInfoPtr pScrn, + char **name, +#ifndef NEW_DGAOPENFRAMEBUFFER + unsigned char **mem, + int *size, + int *offset, + int *flags +#else + unsigned int *mem, + unsigned int *size, + unsigned int *offset, + unsigned int *flags +#endif +){ + XGIPtr pXGI = XGIPTR(pScrn); + + *name = NULL; /* no special device */ +#ifndef NEW_DGAOPENFRAMEBUFFER + *mem = (unsigned char*)pXGI->FbAddress; +#else + *mem = pXGI->FbAddress; +#endif + *size = pXGI->maxxfbmem; + *offset = 0; + *flags = DGA_NEED_ROOT; + + return TRUE; +} Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dri.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dri.c:1.2 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dri.c Sun Aug 28 13:48:03 2005 @@ -0,0 +1,560 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dri.c,v 1.2 2005/08/28 17:48:03 tsi Exp $ */ + +/* modified from tdfx_dri.c, mga_dri.c */ + +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86_ansic.h" +#include "xf86Priv.h" + +#include "xf86PciInfo.h" +#include "xf86Pci.h" +#include "fb.h" + +#include "miline.h" + +#include "GL/glxtokens.h" + +#include "xgi.h" +#include "xgi_dri.h" + + +#include "xgi_accel.h" +#include "xgi_common.h" +/* +#include "xgi_drm.h" +#include "drm.h" +*/ + +extern void GlxSetVisualConfigs( + int nconfigs, + __GLXvisualConfig *configs, + void **configprivs +); + + +#define XGIIdle Volari_Idle + +#define AGP_PAGE_SIZE 4096 /* Texture memory 8M */ +/*#define AGP_PAGE_SIZE 5120*/ /* Texture memory 10M */ +#define AGP_PAGES 2048 +#define AGP_SIZE (AGP_PAGE_SIZE * AGP_PAGES) +#define AGP_VTXBUF_PAGES 512 +#define AGP_VTXBUF_SIZE (AGP_PAGE_SIZE * AGP_VTXBUF_PAGES) + +#ifdef linux +static char XGIKernelDriverName[] = "xgi"; +static char XGIClientDriverName[] = "xgi"; + +static Bool XGICreateContext(ScreenPtr pScreen, VisualPtr visual, + drm_context_t hwContext, void *pVisualConfigPriv, + DRIContextType contextStore); +static void XGIDestroyContext(ScreenPtr pScreen, drm_context_t hwContext, + DRIContextType contextStore); +static void XGIDRISwapContext(ScreenPtr pScreen, DRISyncType syncType, + DRIContextType readContextType, + void *readContextStore, + DRIContextType writeContextType, + void *writeContextStore); +static void XGIDRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index); +static void XGIDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg, + RegionPtr prgnSrc, CARD32 index); + +void xgiLostContext(ScreenPtr pScreen); + +static Bool +XGIInitVisualConfigs(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XGIPtr pXGI = XGIPTR(pScrn); + int numConfigs = 0; + __GLXvisualConfig *pConfigs = 0; + XGIConfigPrivPtr pXGIConfigs = 0; + XGIConfigPrivPtr *pXGIConfigPtrs = 0; + int i, db, z_stencil, accum; + Bool useZ16 = FALSE; + + if(getenv("XGI_FORCE_Z16")){ + useZ16 = TRUE; + } + + switch (pScrn->bitsPerPixel) { + case 8: + case 24: + break; + case 16: + case 32: + numConfigs = (useZ16)?8:16; + + if (!(pConfigs = (__GLXvisualConfig*)xnfcalloc(sizeof(__GLXvisualConfig), + numConfigs))) { + return FALSE; + } + if (!(pXGIConfigs = (XGIConfigPrivPtr)xnfcalloc(sizeof(XGIConfigPrivRec), + numConfigs))) { + xfree(pConfigs); + return FALSE; + } + if (!(pXGIConfigPtrs = (XGIConfigPrivPtr*)xnfcalloc(sizeof(XGIConfigPrivPtr), + numConfigs))) { + xfree(pConfigs); + xfree(pXGIConfigs); + return FALSE; + } + for (i=0; iscrnIndex, X_ERROR, + "[drm] Incorrect initialization of visuals\n"); + return FALSE; + } + break; + } + + pXGI->numVisualConfigs = numConfigs; + pXGI->pVisualConfigs = pConfigs; + pXGI->pVisualConfigsPriv = pXGIConfigs; + GlxSetVisualConfigs(numConfigs, pConfigs, (void**)pXGIConfigPtrs); + + return TRUE; +} +#endif + +Bool XGIDRIScreenInit(ScreenPtr pScreen) +{ +#ifndef linux + return FALSE; +#else /* linux */ + + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XGIPtr pXGI = XGIPTR(pScrn); + DRIInfoPtr pDRIInfo; + XGIDRIPtr pXGIDRI; + + /* Check that the GLX, DRI, and DRM modules have been loaded by testing + * for canonical symbols in each module. */ + if (!xf86LoaderCheckSymbol("GlxSetVisualConfigs")) return FALSE; + if (!xf86LoaderCheckSymbol("DRIScreenInit")) return FALSE; + if (!xf86LoaderCheckSymbol("drmAvailable")) return FALSE; + if (!xf86LoaderCheckSymbol("DRIQueryVersion")) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "XGIDRIScreenInit failed (libdri.a too old)\n"); + return FALSE; + } + + /* Check the DRI version */ + /* { */ + /* int major, minor, patch; */ + /* DRIQueryVersion(&major, &minor, &patch); */ + /* if (major != 3 || minor != 0 || patch < 0) { */ + /* xf86DrvMsg(pScreen->myNum, X_ERROR, */ + /* "[drm] XGIDRIScreenInit failed (DRI version = %d.%d.%d, expected 3.0.x). Disabling DRI.\n", */ + /* major, minor, patch); */ + /* return FALSE; */ + /* } */ + /* } */ + + pDRIInfo = DRICreateInfoRec(); + if (!pDRIInfo) return FALSE; + pXGI->pDRIInfo = pDRIInfo; + + pDRIInfo->drmDriverName = XGIKernelDriverName; + pDRIInfo->clientDriverName = XGIClientDriverName; + pDRIInfo->busIdString = xalloc(64); + sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d", + ((pciConfigPtr)pXGI->PciInfo->thisCard)->busnum, + ((pciConfigPtr)pXGI->PciInfo->thisCard)->devnum, + ((pciConfigPtr)pXGI->PciInfo->thisCard)->funcnum); + pDRIInfo->ddxDriverMajorVersion = 0; + pDRIInfo->ddxDriverMinorVersion = 1; + pDRIInfo->ddxDriverPatchVersion = 0; + pDRIInfo->frameBufferPhysicalAddress = pXGI->FbAddress; + pDRIInfo->frameBufferSize = pXGI->FbMapSize; + + /* ?? */ + pDRIInfo->frameBufferStride = pXGI->scrnOffset; + pDRIInfo->ddxDrawableTableEntry = XGI_MAX_DRAWABLES; + + if (SAREA_MAX_DRAWABLES < XGI_MAX_DRAWABLES) + pDRIInfo->maxDrawableTableEntry = SAREA_MAX_DRAWABLES; + else + pDRIInfo->maxDrawableTableEntry = XGI_MAX_DRAWABLES; + +#ifdef NOT_DONE + /* FIXME need to extend DRI protocol to pass this size back to client + * for SAREA mapping that includes a device private record + */ + pDRIInfo->SAREASize = + ((sizeof(XF86DRISAREARec) + 0xfff) & 0x1000); /* round to page */ + /* + shared memory device private rec */ +#else + /* For now the mapping works by using a fixed size defined + * in the SAREA header + */ + if (sizeof(XF86DRISAREARec)+sizeof(XGISAREAPriv)>SAREA_MAX) { +/* ErrorF("Data does not fit in SAREA\n"); */ + return FALSE; + } + pDRIInfo->SAREASize = SAREA_MAX; +#endif + + if (!(pXGIDRI = (XGIDRIPtr)xnfcalloc(sizeof(XGIDRIRec),1))) { + DRIDestroyInfoRec(pXGI->pDRIInfo); + pXGI->pDRIInfo=0; + return FALSE; + } + pDRIInfo->devPrivate = pXGIDRI; + pDRIInfo->devPrivateSize = sizeof(XGIDRIRec); + pDRIInfo->contextSize = sizeof(XGIDRIContextRec); + + pDRIInfo->CreateContext = XGICreateContext; + pDRIInfo->DestroyContext = XGIDestroyContext; + pDRIInfo->SwapContext = XGIDRISwapContext; + pDRIInfo->InitBuffers = XGIDRIInitBuffers; + pDRIInfo->MoveBuffers = XGIDRIMoveBuffers; + pDRIInfo->bufferRequests = DRI_ALL_WINDOWS; + + if (!DRIScreenInit(pScreen, pDRIInfo, &pXGI->drmSubFD)) { + xfree(pDRIInfo->devPrivate); + pDRIInfo->devPrivate=0; + DRIDestroyInfoRec(pXGI->pDRIInfo); + pXGI->pDRIInfo=0; + pXGI->drmSubFD = -1; + return FALSE; + } + + pXGIDRI->regs.size = XGIIOMAPSIZE; + pXGIDRI->regs.map = 0; + if (drmAddMap(pXGI->drmSubFD, (drm_handle_t)pXGI->IOAddress, + pXGIDRI->regs.size, DRM_REGISTERS, 0, + &pXGIDRI->regs.handle)<0) + { + XGIDRICloseScreen(pScreen); + return FALSE; + } + + xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Registers = 0x%08lx\n", + pXGIDRI->regs.handle); + + /* AGP */ + do{ + pXGI->agpSize = 0; + pXGI->agpVtxBufSize = 0; + pXGIDRI->AGPVtxBufSize = 0; + + if (drmAgpAcquire(pXGI->drmSubFD) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpAcquire failed\n"); + break; + } + + /* TODO: default value is 2x? */ +/* if (drmAgpEnable(pXGI->drmSubFD, drmAgpGetMode(pXGI->drmSubFD)&~0x0) < 0) { +*/ + /* Default to 1X agp mode */ + if (drmAgpEnable(pXGI->drmSubFD, drmAgpGetMode(pXGI->drmSubFD)&~0x00000002) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpEnable failed\n"); + break; + } +/* ErrorF("[drm] drmAgpEnabled succeeded\n"); */ + + if (drmAgpAlloc(pXGI->drmSubFD, AGP_SIZE, 0, NULL, &pXGI->agpHandle) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[drm] drmAgpAlloc failed\n"); + drmAgpRelease(pXGI->drmSubFD); + break; + } + + /* Bind agp-gart table */ + /* fill the phys addr. into gart table */ + /*********************************************/ + if (drmAgpBind(pXGI->drmSubFD, pXGI->agpHandle, 0) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[drm] drmAgpBind failed\n"); + drmAgpFree(pXGI->drmSubFD, pXGI->agpHandle); + drmAgpRelease(pXGI->drmSubFD); + + break; + } + + pXGI->agpSize = AGP_SIZE; + pXGI->agpAddr = drmAgpBase(pXGI->drmSubFD); + /* pXGI->agpBase = */ /* Xserver connot access VtxBuf, bc. not mem-map */ + + /* any client can access this VtxBuf AGP area */ + /* by mem-map pXGIDRI->agp.handle */ + /**********************************************/ + pXGIDRI->agp.size = pXGI->agpSize; + if (drmAddMap(pXGI->drmSubFD, (drm_handle_t)0, + pXGIDRI->agp.size, DRM_AGP, 0, + &pXGIDRI->agp.handle) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[drm] Failed to map public agp area\n"); + pXGIDRI->agp.size = 0; + break; + } + + pXGI->agpVtxBufSize = AGP_VTXBUF_SIZE; /* 2MB */ + pXGI->agpVtxBufAddr = pXGI->agpAddr; + pXGI->agpVtxBufBase = pXGI->agpVtxBufAddr - pXGI->agpAddr + + pXGI->agpBase; + pXGI->agpVtxBufFree = 0; + + pXGIDRI->AGPVtxBufOffset = pXGI->agpVtxBufAddr - pXGI->agpAddr; + pXGIDRI->AGPVtxBufSize = pXGI->agpVtxBufSize; + + /* this AGP area is used for texture */ + /* is managed by drm */ + /*************************************/ + { + drm_xgi_agp_t agp; + + agp.offset = AGP_VTXBUF_SIZE; + agp.size = AGP_SIZE - AGP_VTXBUF_SIZE; +#ifdef DRM_IOCTL_XGI_AGP_INIT + xf86ioctl(pXGI->drmSubFD, DRM_IOCTL_XGI_AGP_INIT, &agp); +/* +#else + xf86ioctl(pXGI->drmSubFD, XGI_IOCTL_AGP_INIT, &agp); +*/ +#endif + } + } + while(0); + + /* enable IRQ */ + pXGI->irq = drmGetInterruptFromBusID(pXGI->drmSubFD, + ((pciConfigPtr)pXGI->PciInfo->thisCard)->busnum, + ((pciConfigPtr)pXGI->PciInfo->thisCard)->devnum, + ((pciConfigPtr)pXGI->PciInfo->thisCard)->funcnum); + + if((drmCtlInstHandler(pXGI->drmSubFD, pXGI->irq)) != 0) + { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "[drm] failure adding irq %d handler, stereo disabled\n", + pXGI->irq); + pXGI->irqEnabled = FALSE; + } + else + { + pXGI->irqEnabled = TRUE; + } + + pXGIDRI->irqEnabled = pXGI->irqEnabled; + + if (!(XGIInitVisualConfigs(pScreen))) { + XGIDRICloseScreen(pScreen); + return FALSE; + } + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "visual configs initialized\n" ); + + return TRUE; +#endif /* linux */ +} + +void +XGIDRICloseScreen(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XGIPtr pXGI = XGIPTR(pScrn); + + DRICloseScreen(pScreen); + + if (pXGI->pDRIInfo) { + if (pXGI->pDRIInfo->devPrivate) { + xfree(pXGI->pDRIInfo->devPrivate); + pXGI->pDRIInfo->devPrivate=0; + } + DRIDestroyInfoRec(pXGI->pDRIInfo); + pXGI->pDRIInfo=0; + } + if (pXGI->pVisualConfigs) xfree(pXGI->pVisualConfigs); + if (pXGI->pVisualConfigsPriv) xfree(pXGI->pVisualConfigsPriv); + + if(pXGI->agpSize){ +/* ErrorF("Freeing agp memory\n"); */ + drmAgpFree(pXGI->drmSubFD, pXGI->agpHandle); +/* ErrorF("releasing agp module\n"); */ + drmAgpRelease(pXGI->drmSubFD); + } +} + +#ifdef linux +/* TODO: xserver receives driver's swapping event and do something + * according the data initialized in this function + */ +static Bool +XGICreateContext(ScreenPtr pScreen, VisualPtr visual, + drm_context_t hwContext, void *pVisualConfigPriv, + DRIContextType contextStore) +{ + return TRUE; +} + +static void +XGIDestroyContext(ScreenPtr pScreen, drm_context_t hwContext, + DRIContextType contextStore) +{ +} +#endif + +Bool +XGIDRIFinishScreenInit(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XGIPtr pXGI = XGIPTR(pScrn); +/* XGIPtr pXGI = XGIPTR(pScrn); */ + XGIDRIPtr pXGIDRI; + + /*pXGI->pDRIInfo->driverSwapMethod = DRI_HIDE_X_CONTEXT;*/ + pXGI->pDRIInfo->driverSwapMethod = DRI_SERVER_SWAP; + + pXGIDRI=(XGIDRIPtr)pXGI->pDRIInfo->devPrivate; + pXGIDRI->deviceID=pXGI->Chipset; + pXGIDRI->revisionID=pXGI->ChipRev; + pXGIDRI->width=pScrn->virtualX; + pXGIDRI->height=pScrn->virtualY; + pXGIDRI->mem=pScrn->videoRam*1024; + pXGIDRI->bytesPerPixel= (pScrn->bitsPerPixel+7) / 8; + /* TODO */ + pXGIDRI->scrnX=pXGIDRI->width; + pXGIDRI->scrnY=pXGIDRI->height; + +/* + pXGIDRI->textureOffset=pXGI->texOffset; + pXGIDRI->textureSize=pXGI->texSize; + pXGIDRI->fbOffset=pXGI->fbOffset; + pXGIDRI->backOffset=pXGI->backOffset; + pXGIDRI->depthOffset=pXGI->depthOffset; +*/ + + /* set SAREA value */ + { + XGISAREAPriv *saPriv; + + saPriv=(XGISAREAPriv*)DRIGetSAREAPrivate(pScreen); + assert(saPriv); + + saPriv->CtxOwner = -1; + saPriv->QueueLength = 0; + pXGI->cmdQueueLenPtr = &(saPriv->QueueLength); + saPriv->AGPVtxBufNext = 0; + + + saPriv->shareWPoffset = pXGI->cmdQueue_shareWP_only2D; + pXGI->pCQ_shareWritePort = &(saPriv->shareWPoffset); + + + + XGIIdle + } + + return DRIFinishScreenInit(pScreen); +} + +#ifdef linux +static void +XGIDRISwapContext(ScreenPtr pScreen, DRISyncType syncType, + DRIContextType oldContextType, void *oldContext, + DRIContextType newContextType, void *newContext) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XGIPtr pXGI = XGIPTR(pScrn); + + /* mEndPrimitive */ + /* + * TODO: do this only if X-Server get lock. If kernel supports delayed + * signal, needless to do this + */ + /* + *(pXGI->IOBase + 0X8B50) = 0xff; + *(unsigned int *)(pXGI->IOBase + 0x8B60) = -1; + */ + + XGIIdle +} + +static void +XGIDRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index) +{ + ScreenPtr pScreen = pWin->drawable.pScreen; + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XGIPtr pXGI = XGIPTR(pScrn); + + XGIIdle +} + +static void +XGIDRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg, + RegionPtr prgnSrc, CARD32 index) +{ + ScreenPtr pScreen = pParent->drawable.pScreen; + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XGIPtr pXGI = XGIPTR(pScrn); + + XGIIdle +} + +#endif Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dri.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dri.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dri.h Mon May 2 09:28:02 2005 @@ -0,0 +1,85 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dri.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ + +/* modified from tdfx_dri.h */ + +#ifndef _XGI_DRI_ +#define _XGI_DRI_ + +#include + +#define XGI_MAX_DRAWABLES 256 +#define XGIIOMAPSIZE (64*1024) + +typedef struct { + int CtxOwner; + int QueueLength; + unsigned long AGPVtxBufNext; + unsigned int FrameCount; + + unsigned long shareWPoffset; + /*CARD16*/ + /*unsigned short RelIO;*/ + + /* 2001/12/16 added by jjtseng for some bala reasons .... */ + unsigned char *AGPCmdBufBase; + unsigned long AGPCmdBufAddr; + unsigned long AGPCmdBufOffset; + unsigned int AGPCmdBufSize; + unsigned long AGPCmdBufNext; + /*~ 2001/12/16 added by jjtseng for some bala reasons .... */ + +} XGISAREAPriv; + +#define XGI_FRONT 0 +#define XGI_BACK 1 +#define XGI_DEPTH 2 + +typedef struct { + drm_handle_t handle; + drmSize size; + drmAddress map; +} xgiRegion, *xgiRegionPtr; + +typedef struct { + xgiRegion regs, agp; + int deviceID; + int revisionID; + int width; + int height; + int mem; + int bytesPerPixel; + int priv1; + int priv2; + int fbOffset; + int backOffset; + int depthOffset; + int textureOffset; + int textureSize; + unsigned int AGPVtxBufOffset; + unsigned int AGPVtxBufSize; + /* 2001/12/16 added by jjtseng for some bala reasons .... */ + unsigned char *AGPCmdBufBase; + unsigned long AGPCmdBufAddr; + unsigned long AGPCmdBufOffset; + unsigned int AGPCmdBufSize; + unsigned long *pAGPCmdBufNext; + /*~ 2001/12/16 added by jjtseng for some bala reasons .... */ + int irqEnabled; + unsigned int scrnX, scrnY; +} XGIDRIRec, *XGIDRIPtr; + +typedef struct { + /* Nothing here yet */ + int dummy; +} XGIConfigPrivRec, *XGIConfigPrivPtr; + +typedef struct { + /* Nothing here yet */ + int dummy; +} XGIDRIContextRec, *XGIDRIContextPtr; + +Bool XGIDRIScreenInit(ScreenPtr pScreen); +void XGIDRICloseScreen(ScreenPtr pScreen); +Bool XGIDRIFinishScreenInit(ScreenPtr pScreen); + +#endif Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.c:1.9 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.c Thu Mar 16 11:50:23 2006 @@ -0,0 +1,6235 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.c,v 1.9 2006/03/16 16:50:23 dawes Exp $ */ +/* + * XGI driver main code + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1) Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2) Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3) The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Thomas Winischhofer + * - driver entirely rewritten since 2001, only basic structure taken from + * old code (except xgi_dri.c, xgi_shadow.c, xgi_accel.c and parts of + * xgi_dga.c; these were mostly taken over; xgi_dri.c was changed for + * new versions of the DRI layer) + * + * This notice covers the entire driver code unless otherwise indicated. + * + * Formerly based on code which is + * Copyright (C) 1998, 1999 by Alan Hourihane, Wigan, England. + * Written by: + * Alan Hourihane , + * Mike Chapman , + * Juanjo Santamarta , + * Mitani Hiroshi , + * David Thomas . + */ + +#include "fb.h" +#include "mibank.h" +#include "micmap.h" +#include "xf86.h" +#include "xf86Priv.h" +#include "xf86_OSproc.h" +#include "xf86Resources.h" +#include "xf86_ansic.h" +#include "dixstruct.h" +#include "xf86Version.h" +#include "xf86PciInfo.h" +#include "xf86Pci.h" +#include "xf86cmap.h" +#include "vgaHW.h" +#include "xf86RAC.h" +#include "shadowfb.h" +#include "vbe.h" +#ifndef xf86LoadVBEModule +# define xf86LoadVBEModule(_pScrn) \ + xf86LoadSubModule(_pScrn, "vbe") +#endif + + +#include "mipointer.h" +#include "mibstore.h" + +#include "xgi.h" +#include "regs.h" +#include "xgi_vb.h" +#include "xgi_dac.h" + +#include "xgi_driver.h" +#include "valid_mode.h" + +#define _XF86DGA_SERVER_ +#include + +#include "globals.h" + +#define DPMS_SERVER +#include + +#include "xf86xv.h" +#include + +#ifdef XF86DRI +#include "dri.h" +#endif + +void Volari_EnableAccelerator(ScrnInfoPtr pScrn) ; +/* Globals (yes, these ARE really required to be global) */ + +#ifdef XGIDUALHEAD +static int XGIEntityIndex = -1; +#endif + + +/* + * This is intentionally screen-independent. It indicates the binding + * choice made in the first PreInit. + */ +static int pix24bpp = 0; +int XGI_FbDevExist; + +#define FBIOGET_FSCREENINFO 0x4602 +#define FB_ACCEL_XGI_GLAMOUR 41 + +struct fb_fix_screeninfo { + char id[16]; /* identification string eg "TT Builtin" */ + unsigned long smem_start; /* Start of frame buffer mem */ + /* (physical address) */ + unsigned long smem_len; /* Length of frame buffer mem */ + unsigned long type; /* see FB_TYPE_* */ + unsigned long type_aux; /* Interleave for interleaved Planes */ + unsigned long visual; /* see FB_VISUAL_* */ + unsigned short xpanstep; /* zero if no hardware panning */ + unsigned short ypanstep; /* zero if no hardware panning */ + unsigned short ywrapstep; /* zero if no hardware ywrap */ + unsigned long line_length; /* length of a line in bytes */ + unsigned long mmio_start; /* Start of Memory Mapped I/O */ + /* (physical address) */ + unsigned long mmio_len; /* Length of Memory Mapped I/O */ + unsigned long accel; /* Type of acceleration available */ + unsigned short reserved[3]; /* Reserved for future compatibility */ +}; + +/* + * This contains the functions needed by the server after loading the driver + * module. It must be supplied, and gets passed back by the SetupProc + * function in the dynamic case. In the static case, a reference to this + * is compiled in, and this requires that the name of this DriverRec be + * an upper-case version of the driver name. + */ + +DriverRec XGI = { + XGI_CURRENT_VERSION, + XGI_DRIVER_NAME, + XGIIdentify, + XGIProbe, + XGIAvailableOptions, + NULL, + 0 +}; + +static SymTabRec XGIChipsets[] = { + { PCI_CHIP_XGIXG40, "Volari V8_V5_V3XT" }, + { PCI_CHIP_XGIXG20, "Volari Z7" }, + { -1, NULL } +}; + +static PciChipsets XGIPciChipsets[] = { + { PCI_CHIP_XGIXG40, PCI_CHIP_XGIXG40, RES_SHARED_VGA }, + { PCI_CHIP_XGIXG20, PCI_CHIP_XGIXG20, RES_SHARED_VGA }, + { -1, -1, RES_UNDEFINED } +}; + +static const char *xaaSymbols[] = { + "XAACopyROP", + "XAACreateInfoRec", + "XAADestroyInfoRec", +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,3,99,0,0) + "XAAFillSolidRects", +#endif + "XAAFillMono8x8PatternRects", + "XAAPatternROP", + "XAAHelpPatternROP", + "XAAInit", + NULL +}; + +static const char *vgahwSymbols[] = { + "vgaHWFreeHWRec", + "vgaHWGetHWRec", + "vgaHWGetIOBase", + "vgaHWGetIndex", + "vgaHWInit", + "vgaHWLock", + "vgaHWMapMem", + "vgaHWUnmapMem", + "vgaHWProtect", + "vgaHWRestore", + "vgaHWSave", + "vgaHWSaveScreen", + "vgaHWUnlock", + NULL +}; + +static const char *fbSymbols[] = { + "fbPictureInit", + "fbScreenInit", + NULL +}; + +static const char *shadowSymbols[] = { + "ShadowFBInit", + NULL +}; + +static const char *ramdacSymbols[] = { + "xf86CreateCursorInfoRec", + "xf86DestroyCursorInfoRec", + "xf86InitCursor", + NULL +}; + + +static const char *ddcSymbols[] = { + "xf86PrintEDID", + "xf86SetDDCproperties", + "xf86InterpretEDID", + NULL +}; + + +/* static const char *i2cSymbols[] = { + "xf86I2CBusInit", + "xf86CreateI2CBusRec", + NULL +}; */ + +static const char *int10Symbols[] = { + "xf86FreeInt10", + "xf86InitInt10", + NULL +}; + +static const char *vbeSymbols[] = { +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + "VBEInit", +#else + "VBEExtendedInit", +#endif + "vbeDoEDID", + "vbeFree", + "VBEGetVBEInfo", + "VBEFreeVBEInfo", + "VBEGetModeInfo", + "VBEFreeModeInfo", + "VBESaveRestore", + "VBESetVBEMode", + "VBEGetVBEMode", + "VBESetDisplayStart", + "VBESetGetLogicalScanlineLength", + NULL +}; + +#ifdef XF86DRI +static const char *drmSymbols[] = { + "drmAddMap", + "drmAgpAcquire", + "drmAgpAlloc", + "drmAgpBase", + "drmAgpBind", + "drmAgpEnable", + "drmAgpFree", + "drmAgpGetMode", + "drmAgpRelease", + "drmCtlInstHandler", + "drmGetInterruptFromBusID", + "drmXGIAgpInit", + NULL +}; + +static const char *driSymbols[] = { + "DRICloseScreen", + "DRICreateInfoRec", + "DRIDestroyInfoRec", + "DRIFinishScreenInit", + "DRIGetSAREAPrivate", + "DRILock", + "DRIQueryVersion", + "DRIScreenInit", + "DRIUnlock", + "GlxSetVisualConfigs", +#ifdef XGINEWDRI2 + "DRICreatePCIBusID", +#endif + NULL +}; +#endif + +#ifdef XFree86LOADER + +static MODULESETUPPROTO(xgiSetup); + +static XF86ModuleVersionInfo xgiVersRec = +{ + XGI_DRIVER_NAME, + MODULEVENDORSTRING, + MODINFOSTRING1, + MODINFOSTRING2, + XF86_VERSION_CURRENT, + XGI_MAJOR_VERSION, XGI_MINOR_VERSION, XGI_PATCHLEVEL, + ABI_CLASS_VIDEODRV, /* This is a video driver */ + 6, + MOD_CLASS_VIDEODRV, + {0,0,0,0} +}; + +XF86ModuleData xgiModuleData = { &xgiVersRec, xgiSetup, NULL }; + +pointer +xgiSetup(ModuleDescPtr module, pointer opts, int *errmaj, int *errmin) +{ + static Bool setupDone = FALSE; + + if(!setupDone) { + setupDone = TRUE; + xf86AddDriver(&XGI, module, 0); + LoaderModRefSymLists(module, vgahwSymbols, fbSymbols, xaaSymbols, + shadowSymbols, ramdacSymbols, ddcSymbols, + vbeSymbols, int10Symbols, +#ifdef XF86DRI + drmSymbols, driSymbols, +#endif + NULL); + return (pointer)TRUE; + } + + if(errmaj) *errmaj = LDR_ONCEONLY; + return NULL; +} + +#endif /* XFree86LOADER */ + + +static Bool +XGIGetRec(ScrnInfoPtr pScrn) +{ + /* + * Allocate an XGIRec, and hook it into pScrn->driverPrivate. + * pScrn->driverPrivate is initialised to NULL, so we can check if + * the allocation has already been done. + */ + if(pScrn->driverPrivate != NULL) return TRUE; + + pScrn->driverPrivate = xnfcalloc(sizeof(XGIRec), 1); + + /* Initialise it to 0 */ + memset(pScrn->driverPrivate, 0, sizeof(XGIRec)); + + return TRUE; +} + +static void +XGIFreeRec(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); +#ifdef XGIDUALHEAD + XGIEntPtr pXGIEnt = NULL; +#endif + + /* Just to make sure... */ + if(!pXGI) return; + +#ifdef XGIDUALHEAD + pXGIEnt = pXGI->entityPrivate; +#endif + + if(pXGI->pstate) xfree(pXGI->pstate); + pXGI->pstate = NULL; + if(pXGI->fonts) xfree(pXGI->fonts); + pXGI->fonts = NULL; + +#ifdef XGIDUALHEAD + if(pXGIEnt) { + if(!pXGI->SecondHead) { + /* Free memory only if we are first head; in case of an error + * during init of the second head, the server will continue - + * and we need the BIOS image and XGI_Private for the first + * head. + */ + if(pXGIEnt->BIOS) xfree(pXGIEnt->BIOS); + pXGIEnt->BIOS = pXGI->BIOS = NULL; + if(pXGIEnt->XGI_Pr) xfree(pXGIEnt->XGI_Pr); + pXGIEnt->XGI_Pr = pXGI->XGI_Pr = NULL; + if(pXGIEnt->RenderAccelArray) xfree(pXGIEnt->RenderAccelArray); + pXGIEnt->RenderAccelArray = pXGI->RenderAccelArray = NULL; + } else { + pXGI->BIOS = NULL; + pXGI->XGI_Pr = NULL; + pXGI->RenderAccelArray = NULL; + } + } else { +#endif + if(pXGI->BIOS) xfree(pXGI->BIOS); + pXGI->BIOS = NULL; + if(pXGI->XGI_Pr) xfree(pXGI->XGI_Pr); + pXGI->XGI_Pr = NULL; + if(pXGI->RenderAccelArray) xfree(pXGI->RenderAccelArray); + pXGI->RenderAccelArray = NULL; +#ifdef XGIDUALHEAD + } +#endif +#ifdef XGIMERGED + + if(pXGI->MetaModes) xfree(pXGI->MetaModes); + pXGI->MetaModes = NULL; + + if(pXGI->CRT1Modes) { + if(pXGI->CRT1Modes != pScrn->modes) { + if(pScrn->modes) { + pScrn->currentMode = pScrn->modes; + do { + DisplayModePtr p = pScrn->currentMode->next; + if(pScrn->currentMode->Private) + xfree(pScrn->currentMode->Private); + xfree(pScrn->currentMode); + pScrn->currentMode = p; + } while(pScrn->currentMode != pScrn->modes); + } + pScrn->currentMode = pXGI->CRT1CurrentMode; + pScrn->modes = pXGI->CRT1Modes; + pXGI->CRT1CurrentMode = NULL; + pXGI->CRT1Modes = NULL; + } + } +#endif + if(pXGI->pVbe) vbeFree(pXGI->pVbe); + pXGI->pVbe = NULL; + if(pScrn->driverPrivate == NULL) + return; + xfree(pScrn->driverPrivate); + pScrn->driverPrivate = NULL; +} + +static void +XGIDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int flags) +{ + XGIPtr pXGI = XGIPTR(pScrn); + BOOLEAN docrt1 = TRUE; + unsigned char sr1=0, cr17=0, pmreg=0; + unsigned char oldpmreg=0; + + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, + "XGIDisplayPowerManagementSet(%d)\n",PowerManagementMode); + +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + if(!pXGI->SecondHead) docrt1 = FALSE; + } +#endif + +#ifdef UNLOCK_ALWAYS + xgiSaveUnlockExtRegisterLock(pXGI, NULL, NULL); +#endif + + switch (PowerManagementMode) { + + case DPMSModeOn: /* HSync: On, VSync: On */ + if(docrt1) pXGI->Blank = FALSE; +#ifdef XGIDUALHEAD + else pXGI->BlankCRT2 = FALSE; +#endif + sr1 = 0x00; + cr17 = 0x80; + pmreg = 0x00; + break; + + case DPMSModeSuspend: /* HSync: On, VSync: Off */ + if(docrt1) pXGI->Blank = TRUE; +#ifdef XGIDUALHEAD + else pXGI->BlankCRT2 = TRUE; +#endif + sr1 = 0x20; + cr17 = 0x80; + pmreg = 0x80; + break; + + case DPMSModeStandby: /* HSync: Off, VSync: On */ + if(docrt1) pXGI->Blank = TRUE; +#ifdef XGIDUALHEAD + else pXGI->BlankCRT2 = TRUE; +#endif + sr1 = 0x20; + cr17 = 0x80; + pmreg = 0x40; + break; + + case DPMSModeOff: /* HSync: Off, VSync: Off */ + if(docrt1) pXGI->Blank = TRUE; +#ifdef XGIDUALHEAD + else pXGI->BlankCRT2 = TRUE; +#endif + sr1 = 0x20; + cr17 = 0x00; + pmreg = 0xc0; + break; + + default: + return; + } + + if(docrt1) { + setXGIIDXREG(XGISR, 0x01, ~0x20, sr1); /* Set/Clear "Display On" bit */ + switch(pXGI->VGAEngine) { + case XGI_OLD_VGA: + inXGIIDXREG(XGISR, 0x11, oldpmreg); + setXGIIDXREG(XGICR, 0x17, 0x7f, cr17); + setXGIIDXREG(XGISR, 0x11, 0x3f, pmreg); + break; + /* fall through */ + default: + if((!(pXGI->VBFlags & CRT1_LCDA)) || (pXGI->VBFlags & VB_301C)) { + inXGIIDXREG(XGISR, 0x1f, oldpmreg); + if(!pXGI->CRT1off) { + setXGIIDXREG(XGISR, 0x1f, 0x3f, pmreg); + } + } + /* TODO: Check if Chrontel TV is active and in slave mode, + * don't go into power-saving mode this in this case! + */ + } + oldpmreg &= 0xc0; + } + + if((docrt1) && (pmreg != oldpmreg) && ((!(pXGI->VBFlags & CRT1_LCDA)) || (pXGI->VBFlags & VB_301C))) { + outXGIIDXREG(XGISR, 0x00, 0x01); /* Synchronous Reset */ + usleep(10000); + outXGIIDXREG(XGISR, 0x00, 0x03); /* End Reset */ + } +} + +/* Mandatory */ +static void +XGIIdentify(int flags) +{ + xf86PrintChipsets(XGI_NAME, "driver for XGI chipsets", XGIChipsets); +} + +static void +XGIErrorLog(ScrnInfoPtr pScrn, const char *format, ...) +{ + va_list ap; + static const char *str = "**************************************************\n"; + + va_start(ap, format); + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, str); + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + " ERROR:\n"); + xf86VDrvMsgVerb(pScrn->scrnIndex, X_ERROR, 1, format, ap); + va_end(ap); + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + " END OF MESSAGE\n"); + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, str); +} + +/* Mandatory */ +static Bool +XGIProbe(DriverPtr drv, int flags) +{ + int i; + GDevPtr *devSections; + int *usedChips; + int numDevSections; + int numUsed; + Bool foundScreen = FALSE; + + /* + * The aim here is to find all cards that this driver can handle, + * and for the ones not already claimed by another driver, claim the + * slot, and allocate a ScrnInfoRec. + * + * This should be a minimal probe, and it should under no circumstances + * change the state of the hardware. Because a device is found, don't + * assume that it will be used. Don't do any initialisations other than + * the required ScrnInfoRec initialisations. Don't allocate any new + * data structures. + * + */ + + /* + * Next we check, if there has been a chipset override in the config file. + * For this we must find out if there is an active device section which + * is relevant, i.e., which has no driver specified or has THIS driver + * specified. + */ + + if((numDevSections = xf86MatchDevice(XGI_DRIVER_NAME, &devSections)) <= 0) { + /* + * There's no matching device section in the config file, so quit + * now. + */ + return FALSE; + } + + /* + * We need to probe the hardware first. We then need to see how this + * fits in with what is given in the config file, and allow the config + * file info to override any contradictions. + */ + + /* + * All of the cards this driver supports are PCI, so the "probing" just + * amounts to checking the PCI data that the server has already collected. + */ + if(xf86GetPciVideoInfo() == NULL) { + /* + * We won't let anything in the config file override finding no + * PCI video cards at all. This seems reasonable now, but we'll see. + */ + return FALSE; + } + + numUsed = xf86MatchPciInstances(XGI_NAME, PCI_VENDOR_XGI, + XGIChipsets, XGIPciChipsets, devSections, + numDevSections, drv, &usedChips); + + /* Free it since we don't need that list after this */ + xfree(devSections); + if(numUsed <= 0) return FALSE; + + if(flags & PROBE_DETECT) { + foundScreen = TRUE; + } else for(i = 0; i < numUsed; i++) { + ScrnInfoPtr pScrn; + + /* Allocate a ScrnInfoRec and claim the slot */ + pScrn = NULL; + + if((pScrn = xf86ConfigPciEntity(pScrn, 0, usedChips[i], + XGIPciChipsets, NULL, NULL, + NULL, NULL, NULL))) { + /* Fill in what we can of the ScrnInfoRec */ + pScrn->driverVersion = XGI_CURRENT_VERSION; + pScrn->driverName = XGI_DRIVER_NAME; + pScrn->name = XGI_NAME; + pScrn->Probe = XGIProbe; + pScrn->PreInit = XGIPreInit; + pScrn->ScreenInit = XGIScreenInit; + pScrn->SwitchMode = XGISwitchMode; + pScrn->AdjustFrame = XGIAdjustFrame; + pScrn->EnterVT = XGIEnterVT; + pScrn->LeaveVT = XGILeaveVT; + pScrn->FreeScreen = XGIFreeScreen; + pScrn->ValidMode = XGIValidMode; + foundScreen = TRUE; + } + } + xfree(usedChips); + + return foundScreen; +} + + +/* If monitor section has no HSync/VRefresh data, + * derive it from DDC data. Done by common layer + * since 4.3.99.14. + */ +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,3,99,14,0) +static void +XGISetSyncRangeFromEdid(ScrnInfoPtr pScrn, int flag) +{ + MonPtr mon = pScrn->monitor; + xf86MonPtr ddc = mon->DDC; + int i,j; + float myhhigh, myhlow; + int myvhigh, myvlow; + unsigned char temp; + const myhddctiming myhtiming[11] = { + { 1, 0x20, 31.6 }, /* rounded up by .1 */ + { 1, 0x02, 35.3 }, + { 1, 0x04, 37.6 }, + { 1, 0x08, 38.0 }, + { 1, 0x01, 38.0 }, + { 2, 0x40, 47.0 }, + { 2, 0x80, 48.2 }, + { 2, 0x08, 48.5 }, + { 2, 0x04, 56.6 }, + { 2, 0x02, 60.1 }, + { 2, 0x01, 80.1 } + }; + const myvddctiming myvtiming[10] = { + { 1, 0x02, 56 }, + { 1, 0x01, 60 }, + { 2, 0x08, 60 }, + { 2, 0x04, 70 }, + { 1, 0x08, 72 }, + { 2, 0x80, 72 }, + { 1, 0x04, 75 }, + { 2, 0x40, 75 }, + { 2, 0x02, 75 }, + { 2, 0x01, 75 } + }; + /* "Future modes"; we only check the really high ones */ + const myddcstdmodes mystdmodes[8] = { + { 1280, 1024, 85, 91.1 }, + { 1600, 1200, 60, 75.0 }, + { 1600, 1200, 65, 81.3 }, + { 1600, 1200, 70, 87.5 }, + { 1600, 1200, 75, 93.8 }, + { 1600, 1200, 85, 106.3 }, + { 1920, 1440, 60, 90.0 }, + { 1920, 1440, 75, 112.5 } + }; + + if(flag) { /* HSync */ + for(i = 0; i < 4; i++) { + if(ddc->det_mon[i].type == DS_RANGES) { + mon->nHsync = 1; + mon->hsync[0].lo = ddc->det_mon[i].section.ranges.min_h; + mon->hsync[0].hi = ddc->det_mon[i].section.ranges.max_h; + return; + } + } + /* If no sync ranges detected in detailed timing table, we + * derive them from supported VESA modes. */ + myhlow = myhhigh = 0.0; + for(i=0; i<11; i++) { + if(myhtiming[i].whichone == 1) temp = ddc->timings1.t1; + else temp = ddc->timings1.t2; + if(temp & myhtiming[i].mask) { + if((i==0) || (myhlow > myhtiming[i].rate)) + myhlow = myhtiming[i].rate; + } + if(myhtiming[10-i].whichone == 1) temp = ddc->timings1.t1; + else temp = ddc->timings1.t2; + if(temp & myhtiming[10-i].mask) { + if((i==0) || (myhhigh < myhtiming[10-i].rate)) + myhhigh = myhtiming[10-i].rate; + } + } + for(i=0;itimings2[i].hsize > 256) { + for(j=0; j<8; j++) { + if((ddc->timings2[i].hsize == mystdmodes[j].hsize) && + (ddc->timings2[i].vsize == mystdmodes[j].vsize) && + (ddc->timings2[i].refresh == mystdmodes[j].refresh)) { + if(mystdmodes[j].hsync > myhhigh) + myhhigh = mystdmodes[j].hsync; + } + } + } + } + if((myhhigh) && (myhlow)) { + mon->nHsync = 1; + mon->hsync[0].lo = myhlow - 0.1; + mon->hsync[0].hi = myhhigh; + } + + + } else { /* Vrefresh */ + + for(i = 0; i < 4; i++) { + if(ddc->det_mon[i].type == DS_RANGES) { + mon->nVrefresh = 1; + mon->vrefresh[0].lo = ddc->det_mon[i].section.ranges.min_v; + mon->vrefresh[0].hi = ddc->det_mon[i].section.ranges.max_v; + return; + } + } + + myvlow = myvhigh = 0; + for(i=0; i<10; i++) { + if(myvtiming[i].whichone == 1) temp = ddc->timings1.t1; + else temp = ddc->timings1.t2; + if(temp & myvtiming[i].mask) { + if((i==0) || (myvlow > myvtiming[i].rate)) + myvlow = myvtiming[i].rate; + } + if(myvtiming[9-i].whichone == 1) temp = ddc->timings1.t1; + else temp = ddc->timings1.t2; + if(temp & myvtiming[9-i].mask) { + if((i==0) || (myvhigh < myvtiming[9-i].rate)) + myvhigh = myvtiming[9-i].rate; + } + } + for(i=0;itimings2[i].hsize > 256) { + for(j=0; j<8; j++) { + if((ddc->timings2[i].hsize == mystdmodes[j].hsize) && + (ddc->timings2[i].vsize == mystdmodes[j].vsize) && + (ddc->timings2[i].refresh == mystdmodes[j].refresh)) { + if(mystdmodes[j].refresh > myvhigh) + myvhigh = mystdmodes[j].refresh; + } + } + } + } + if((myvhigh) && (myvlow)) { + mon->nVrefresh = 1; + mon->vrefresh[0].lo = myvlow; + mon->vrefresh[0].hi = myvhigh; + } + + } +} +#endif + +/* Some helper functions for MergedFB mode */ + +#ifdef XGIMERGED + +/* Copy and link two modes form mergedfb mode + * (Code base taken from mga driver) + * Copys mode i, links the result to dest, and returns it. + * Links i and j in Private record. + * If dest is NULL, return value is copy of i linked to itself. + * For mergedfb auto-config, we only check the dimension + * against virtualX/Y, if they were user-provided. + */ +static DisplayModePtr +XGICopyModeNLink(ScrnInfoPtr pScrn, DisplayModePtr dest, + DisplayModePtr i, DisplayModePtr j, + XGIScrn2Rel srel) +{ + XGIPtr pXGI = XGIPTR(pScrn); + DisplayModePtr mode; + int dx = 0,dy = 0; + + if(!((mode = xalloc(sizeof(DisplayModeRec))))) return dest; + memcpy(mode, i, sizeof(DisplayModeRec)); + if(!((mode->Private = xalloc(sizeof(XGIMergedDisplayModeRec))))) { + xfree(mode); + return dest; + } + ((XGIMergedDisplayModePtr)mode->Private)->CRT1 = i; + ((XGIMergedDisplayModePtr)mode->Private)->CRT2 = j; + ((XGIMergedDisplayModePtr)mode->Private)->CRT2Position = srel; + mode->PrivSize = 0; + + switch(srel) { + case xgiLeftOf: + case xgiRightOf: + if(!(pScrn->display->virtualX)) { + dx = i->HDisplay + j->HDisplay; + } else { + dx = min(pScrn->virtualX, i->HDisplay + j->HDisplay); + } + dx -= mode->HDisplay; + if(!(pScrn->display->virtualY)) { + dy = max(i->VDisplay, j->VDisplay); + } else { + dy = min(pScrn->virtualY, max(i->VDisplay, j->VDisplay)); + } + dy -= mode->VDisplay; + break; + case xgiAbove: + case xgiBelow: + if(!(pScrn->display->virtualY)) { + dy = i->VDisplay + j->VDisplay; + } else { + dy = min(pScrn->virtualY, i->VDisplay + j->VDisplay); + } + dy -= mode->VDisplay; + if(!(pScrn->display->virtualX)) { + dx = max(i->HDisplay, j->HDisplay); + } else { + dx = min(pScrn->virtualX, max(i->HDisplay, j->HDisplay)); + } + dx -= mode->HDisplay; + break; + case xgiClone: + if(!(pScrn->display->virtualX)) { + dx = max(i->HDisplay, j->HDisplay); + } else { + dx = min(pScrn->virtualX, max(i->HDisplay, j->HDisplay)); + } + dx -= mode->HDisplay; + if(!(pScrn->display->virtualY)) { + dy = max(i->VDisplay, j->VDisplay); + } else { + dy = min(pScrn->virtualY, max(i->VDisplay, j->VDisplay)); + } + dy -= mode->VDisplay; + break; + } + mode->HDisplay += dx; + mode->HSyncStart += dx; + mode->HSyncEnd += dx; + mode->HTotal += dx; + mode->VDisplay += dy; + mode->VSyncStart += dy; + mode->VSyncEnd += dy; + mode->VTotal += dy; + mode->Clock = 0; + + if( ((mode->HDisplay * ((pScrn->bitsPerPixel + 7) / 8) * mode->VDisplay) > pXGI->maxxfbmem) || + (mode->HDisplay > 4088) || + (mode->VDisplay > 4096) ) { + + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Skipped %dx%d, not enough video RAM or beyond hardware specs\n", + mode->HDisplay, mode->VDisplay); + xfree(mode->Private); + xfree(mode); + + return dest; + } + +#ifdef XGIXINERAMA + if(srel != xgiClone) { + pXGI->AtLeastOneNonClone = TRUE; + } +#endif + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Merged %dx%d and %dx%d to %dx%d%s\n", + i->HDisplay, i->VDisplay, j->HDisplay, j->VDisplay, + mode->HDisplay, mode->VDisplay, (srel == xgiClone) ? " (Clone)" : ""); + + mode->next = mode; + mode->prev = mode; + + if(dest) { + mode->next = dest->next; /* Insert node after "dest" */ + dest->next->prev = mode; + mode->prev = dest; + dest->next = mode; + } + + return mode; +} + +/* Helper function to find a mode from a given name + * (Code base taken from mga driver) + */ +static DisplayModePtr +XGIGetModeFromName(char* str, DisplayModePtr i) +{ + DisplayModePtr c = i; + if(!i) return NULL; + do { + if(strcmp(str, c->name) == 0) return c; + c = c->next; + } while(c != i); + return NULL; +} + +static DisplayModePtr +XGIFindWidestTallestMode(DisplayModePtr i, Bool tallest) +{ + DisplayModePtr c = i, d = NULL; + int max = 0; + if(!i) return NULL; + do { + if(tallest) { + if(c->VDisplay > max) { + max = c->VDisplay; + d = c; + } + } else { + if(c->HDisplay > max) { + max = c->HDisplay; + d = c; + } + } + c = c->next; + } while(c != i); + return d; +} + +static DisplayModePtr +XGIGenerateModeListFromLargestModes(ScrnInfoPtr pScrn, + DisplayModePtr i, DisplayModePtr j, + XGIScrn2Rel srel) +{ +#ifdef XGIXINERAMA + XGIPtr pXGI = XGIPTR(pScrn); +#endif + DisplayModePtr mode1 = NULL; + DisplayModePtr mode2 = NULL; + DisplayModePtr result = NULL; + +#ifdef XGIXINERAMA + pXGI->AtLeastOneNonClone = FALSE; +#endif + + switch(srel) { + case xgiLeftOf: + case xgiRightOf: + mode1 = XGIFindWidestTallestMode(i, FALSE); + mode2 = XGIFindWidestTallestMode(j, FALSE); + break; + case xgiAbove: + case xgiBelow: + mode1 = XGIFindWidestTallestMode(i, TRUE); + mode2 = XGIFindWidestTallestMode(j, TRUE); + break; + case xgiClone: + mode1 = i; + mode2 = j; + } + + if(mode1 && mode2) { + return(XGICopyModeNLink(pScrn, result, mode1, mode2, srel)); + } else { + return NULL; + } +} + +/* Generate the merged-fb mode modelist from metamodes + * (Code base taken from mga driver) + */ +static DisplayModePtr +XGIGenerateModeListFromMetaModes(ScrnInfoPtr pScrn, char* str, + DisplayModePtr i, DisplayModePtr j, + XGIScrn2Rel srel) +{ +#ifdef XGIXINERAMA + XGIPtr pXGI = XGIPTR(pScrn); +#endif + char* strmode = str; + char modename[256]; + Bool gotdash = FALSE; + XGIScrn2Rel sr; + DisplayModePtr mode1 = NULL; + DisplayModePtr mode2 = NULL; + DisplayModePtr result = NULL; + +#ifdef XGIXINERAMA + pXGI->AtLeastOneNonClone = FALSE; +#endif + + do { + switch(*str) { + case 0: + case '-': + case ' ': + if((strmode != str)) { + + strncpy(modename, strmode, str - strmode); + modename[str - strmode] = 0; + + if(gotdash) { + if(mode1 == NULL) return NULL; + mode2 = XGIGetModeFromName(modename, j); + if(!mode2) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Mode \"%s\" is not a supported mode for CRT2\n", modename); + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Skipping metamode \"%s-%s\".\n", mode1->name, modename); + mode1 = NULL; + } + } else { + mode1 = XGIGetModeFromName(modename, i); + if(!mode1) { + char* tmps = str; + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Mode \"%s\" is not a supported mode for CRT1\n", modename); + gotdash = FALSE; + while(*tmps == ' ') tmps++; + if(*tmps == '-') { /* skip the next mode */ + tmps++; + while((*tmps == ' ') && (*tmps != 0)) tmps++; /* skip spaces */ + while((*tmps != ' ') && (*tmps != '-') && (*tmps != 0)) tmps++; /* skip modename */ + strncpy(modename,strmode,tmps - strmode); + modename[tmps - strmode] = 0; + str = tmps-1; + } + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Skipping metamode \"%s\".\n", modename); + mode1 = NULL; + } + } + gotdash = FALSE; + } + strmode = str + 1; + gotdash |= (*str == '-'); + + if(*str != 0) break; + /* Fall through otherwise */ + + default: + if(!gotdash && mode1) { + sr = srel; + if(!mode2) { + mode2 = XGIGetModeFromName(mode1->name, j); + sr = xgiClone; + } + if(!mode2) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Mode: \"%s\" is not a supported mode for CRT2\n", mode1->name); + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Skipping metamode \"%s\".\n", modename); + mode1 = NULL; + } else { + result = XGICopyModeNLink(pScrn, result, mode1, mode2, sr); + mode1 = NULL; + mode2 = NULL; + } + } + break; + + } + + } while(*(str++) != 0); + + return result; +} + +static DisplayModePtr +XGIGenerateModeList(ScrnInfoPtr pScrn, char* str, + DisplayModePtr i, DisplayModePtr j, + XGIScrn2Rel srel) +{ + if(str != NULL) { + return(XGIGenerateModeListFromMetaModes(pScrn, str, i, j, srel)); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "No MetaModes given, linking %s modes by default\n", + (srel == xgiClone) ? "first" : + (((srel == xgiLeftOf) || (srel == xgiRightOf)) ? "widest" : "tallest")); + return(XGIGenerateModeListFromLargestModes(pScrn, i, j, srel)); + } +} + +static void +XGIRecalcDefaultVirtualSize(ScrnInfoPtr pScrn) +{ + DisplayModePtr mode, bmode; + int max; + static const char *str = "MergedFB: Virtual %s %d\n"; + + if(!(pScrn->display->virtualX)) { + mode = bmode = pScrn->modes; + max = 0; + do { + if(mode->HDisplay > max) max = mode->HDisplay; + mode = mode->next; + } while(mode != bmode); + pScrn->virtualX = max; + pScrn->displayWidth = max; + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, str, "width", max); + } + if(!(pScrn->display->virtualY)) { + mode = bmode = pScrn->modes; + max = 0; + do { + if(mode->VDisplay > max) max = mode->VDisplay; + mode = mode->next; + } while(mode != bmode); + pScrn->virtualY = max; + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, str, "height", max); + } +} + +static void +XGIMergedFBSetDpi(ScrnInfoPtr pScrn1, ScrnInfoPtr pScrn2, XGIScrn2Rel srel) +{ + XGIPtr pXGI = XGIPTR(pScrn1); + MessageType from = X_DEFAULT; + xf86MonPtr DDC1 = (xf86MonPtr)(pScrn1->monitor->DDC); + xf86MonPtr DDC2 = (xf86MonPtr)(pScrn2->monitor->DDC); + int ddcWidthmm = 0, ddcHeightmm = 0; + const char *dsstr = "MergedFB: Display dimensions: (%d, %d) mm\n"; + + /* This sets the DPI for MergedFB mode. The problem is that + * this can never be exact, because the output devices may + * have different dimensions. This function tries to compromise + * through a few assumptions, and it just calculates an average DPI + * value for both monitors. + */ + + /* Given DisplaySize should regard BOTH monitors */ + pScrn1->widthmm = pScrn1->monitor->widthmm; + pScrn1->heightmm = pScrn1->monitor->heightmm; + + /* Get DDC display size; if only either CRT1 or CRT2 provided these, + * assume equal dimensions for both, otherwise add dimensions + */ + if( (DDC1 && (DDC1->features.hsize > 0 && DDC1->features.vsize > 0)) && + (DDC2 && (DDC2->features.hsize > 0 && DDC2->features.vsize > 0)) ) { + ddcWidthmm = max(DDC1->features.hsize, DDC2->features.hsize) * 10; + ddcHeightmm = max(DDC1->features.vsize, DDC2->features.vsize) * 10; + switch(srel) { + case xgiLeftOf: + case xgiRightOf: + ddcWidthmm = (DDC1->features.hsize + DDC2->features.hsize) * 10; + break; + case xgiAbove: + case xgiBelow: + ddcHeightmm = (DDC1->features.vsize + DDC2->features.vsize) * 10; + default: + break; + } + } else if(DDC1 && (DDC1->features.hsize > 0 && DDC1->features.vsize > 0)) { + ddcWidthmm = DDC1->features.hsize * 10; + ddcHeightmm = DDC1->features.vsize * 10; + switch(srel) { + case xgiLeftOf: + case xgiRightOf: + ddcWidthmm *= 2; + break; + case xgiAbove: + case xgiBelow: + ddcHeightmm *= 2; + default: + break; + } + } else if(DDC2 && (DDC2->features.hsize > 0 && DDC2->features.vsize > 0) ) { + ddcWidthmm = DDC2->features.hsize * 10; + ddcHeightmm = DDC2->features.vsize * 10; + switch(srel) { + case xgiLeftOf: + case xgiRightOf: + ddcWidthmm *= 2; + break; + case xgiAbove: + case xgiBelow: + ddcHeightmm *= 2; + default: + break; + } + } + + if(monitorResolution > 0) { + + /* Set command line given values (overrules given options) */ + pScrn1->xDpi = monitorResolution; + pScrn1->yDpi = monitorResolution; + from = X_CMDLINE; + + } else if(pXGI->MergedFBXDPI) { + + /* Set option-wise given values (overrule DisplaySize) */ + pScrn1->xDpi = pXGI->MergedFBXDPI; + pScrn1->yDpi = pXGI->MergedFBYDPI; + from = X_CONFIG; + + } else if(pScrn1->widthmm > 0 || pScrn1->heightmm > 0) { + + /* Set values calculated from given DisplaySize */ + from = X_CONFIG; + if(pScrn1->widthmm > 0) { + pScrn1->xDpi = (int)((double)pScrn1->virtualX * 25.4 / pScrn1->widthmm); + } + if(pScrn1->heightmm > 0) { + pScrn1->yDpi = (int)((double)pScrn1->virtualY * 25.4 / pScrn1->heightmm); + } + xf86DrvMsg(pScrn1->scrnIndex, from, dsstr, pScrn1->widthmm, pScrn1->heightmm); + + } else if(ddcWidthmm && ddcHeightmm) { + + /* Set values from DDC-provided display size */ + from = X_PROBED; + xf86DrvMsg(pScrn1->scrnIndex, from, dsstr, ddcWidthmm, ddcHeightmm ); + pScrn1->widthmm = ddcWidthmm; + pScrn1->heightmm = ddcHeightmm; + if(pScrn1->widthmm > 0) { + pScrn1->xDpi = (int)((double)pScrn1->virtualX * 25.4 / pScrn1->widthmm); + } + if(pScrn1->heightmm > 0) { + pScrn1->yDpi = (int)((double)pScrn1->virtualY * 25.4 / pScrn1->heightmm); + } + + } else { + + pScrn1->xDpi = pScrn1->yDpi = DEFAULT_DPI; + + } + + /* Sanity check */ + if(pScrn1->xDpi > 0 && pScrn1->yDpi <= 0) + pScrn1->yDpi = pScrn1->xDpi; + if(pScrn1->yDpi > 0 && pScrn1->xDpi <= 0) + pScrn1->xDpi = pScrn1->yDpi; + + pScrn2->xDpi = pScrn1->xDpi; + pScrn2->yDpi = pScrn1->yDpi; + + xf86DrvMsg(pScrn1->scrnIndex, from, "MergedFB: DPI set to (%d, %d)\n", + pScrn1->xDpi, pScrn1->yDpi); +} + +static void +XGIFreeCRT2Structs(XGIPtr pXGI) +{ + if(pXGI->CRT2pScrn) { + if(pXGI->CRT2pScrn->modes) { + while(pXGI->CRT2pScrn->modes) + xf86DeleteMode(&pXGI->CRT2pScrn->modes, pXGI->CRT2pScrn->modes); + } + if(pXGI->CRT2pScrn->monitor) { + if(pXGI->CRT2pScrn->monitor->Modes) { + while(pXGI->CRT2pScrn->monitor->Modes) + xf86DeleteMode(&pXGI->CRT2pScrn->monitor->Modes, pXGI->CRT2pScrn->monitor->Modes); + } + if(pXGI->CRT2pScrn->monitor->DDC) xfree(pXGI->CRT2pScrn->monitor->DDC); + xfree(pXGI->CRT2pScrn->monitor); + } + xfree(pXGI->CRT2pScrn); + pXGI->CRT2pScrn = NULL; + } +} + +#endif /* End of MergedFB helpers */ + +static xf86MonPtr +XGIInternalDDC(ScrnInfoPtr pScrn, int crtno) +{ + XGIPtr pXGI = XGIPTR(pScrn); + USHORT temp = 0xffff; + unsigned char buffer[256]; + xf86MonPtr pMonitor = NULL; + + /* If CRT1 is off, skip DDC */ + if((pXGI->CRT1off) && (!crtno)) return NULL; + + if(crtno) { + if(!(pXGI->VBFlags & (CRT2_LCD|CRT2_VGA))) + return NULL; + } else { + /* If CRT1 is LCDA, skip DDC (except 301C: DDC allowed, but uses CRT2 port!) */ + if(pXGI->VBFlags & CRT1_LCDA) { + if(!(pXGI->VBFlags & VB_301C)) + return NULL; + } + } + + if(temp != 0xffff) { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "CRT%d DDC supported\n", crtno + 1); + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "CRT%d DDC level: %s%s%s%s\n", + crtno + 1, + (temp & 0x1a) ? "" : "[none of the supported]", + (temp & 0x02) ? "2 " : "", + (temp & 0x08) ? "D&P" : "", + (temp & 0x10) ? "FPDI-2" : ""); + if(temp & 0x02) { + if(!temp) { + if((pMonitor = xf86InterpretEDID(pScrn->scrnIndex, &buffer[0]))) { + return(pMonitor); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "CRT%d DDC EDID corrupt\n", crtno + 1); + return(NULL); + } + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "CRT%d DDC reading failed\n", crtno + 1); + return(NULL); + } + } else if(!crtno) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "DDC for VESA D&P and FPDI-2 not supported for CRT1.\n"); + return(NULL); + } else if(temp & 0x18) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "DDC for VESA D&P and FPDI-2 not supported for CRT2 yet.\n"); + return(NULL); + } + return(NULL); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "CRT%d DDC probing failed\n", crtno + 1); + return(NULL); + } +} + +/* static xf86MonPtr +XGIDoPrivateDDC(ScrnInfoPtr pScrn, int *crtnum) +{ + XGIPtr pXGI = XGIPTR(pScrn); + +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + if(pXGI->SecondHead) { + *crtnum = 1; + return(XGIInternalDDC(pScrn, 0)); + } else { + *crtnum = 2; + return(XGIInternalDDC(pScrn, 1)); + } + } else +#endif + if(pXGI->CRT1off) { + *crtnum = 2; + return(XGIInternalDDC(pScrn, 1)); + } else { + *crtnum = 1; + return(XGIInternalDDC(pScrn, 0)); + } +} */ + +/* Mandatory */ +static Bool +XGIPreInit(ScrnInfoPtr pScrn, int flags) +{ + XGIPtr pXGI; + MessageType from; +/* unsigned char usScratchCR17, CR5F; + unsigned char usScratchCR32, usScratchCR63; + unsigned char usScratchSR1F; */ + unsigned long int i; + int temp; + ClockRangePtr clockRanges; + int pix24flags; + int fd; + struct fb_fix_screeninfo fix; + +#ifdef XGIDUALHEAD + XGIEntPtr pXGIEnt = NULL; +#endif +#if defined(XGIMERGED) || defined(XGIDUALHEAD) + DisplayModePtr first, p, n; +#endif + unsigned char srlockReg,crlockReg; +/* unsigned char tempreg; */ + xf86MonPtr pMonitor = NULL; + Bool didddc2; + + vbeInfoPtr pVbe; + VbeInfoBlock *vbe; + ModuleDescPtr pVBEModule = NULL, pMod, pDDCModule; + + static const char *ddcsstr = "CRT%d DDC monitor info: ************************************\n"; + static const char *ddcestr = "End of CRT%d DDC monitor info ******************************\n"; +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,3,99,14,0) + static const char *subshstr = "Substituting missing CRT%d monitor HSync data by DDC data\n"; + static const char *subsvstr = "Substituting missing CRT%d monitor VRefresh data by DDC data\n"; +#endif +#ifdef XGIMERGED + static const char *mergednocrt1 = "CRT1 not detected or forced off. %s.\n"; + static const char *mergednocrt2 = "No CRT2 output selected or no bridge detected. %s.\n"; + static const char *mergeddisstr = "MergedFB mode disabled"; + static const char *modesforstr = "Modes for CRT%d: *********************************************\n"; + static const char *crtsetupstr = "------------------------ CRT%d setup -------------------------\n"; +#endif +/* #if defined(XGIDUALHEAD) || defined(XGIMERGED) + static const char *notsuitablestr = "Not using mode \"%s\" (not suitable for %s mode)\n"; +#endif */ + + if(flags & PROBE_DETECT) { + if((pVBEModule = xf86LoadVBEModule(pScrn))) { + int index = xf86GetEntityInfo(pScrn->entityList[0])->index; + + xf86LoaderModReqSymLists(pVBEModule, vbeSymbols, NULL); +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + if((pVbe = VBEInit(NULL,index))) { +#else + if((pVbe = VBEExtendedInit(NULL,index,0))) { +#endif + ConfiguredMonitor = vbeDoEDID(pVbe, NULL); + vbeFree(pVbe); + } + } + return TRUE; + } + + /* + * Note: This function is only called once at server startup, and + * not at the start of each server generation. This means that + * only things that are persistent across server generations can + * be initialised here. xf86Screens[] is the array of all screens, + * (pScrn is a pointer to one of these). Privates allocated using + * xf86AllocateScrnInfoPrivateIndex() are too, and should be used + * for data that must persist across server generations. + * + * Per-generation data should be allocated with + * AllocateScreenPrivateIndex() from the ScreenInit() function. + */ + + /* Check the number of entities, and fail if it isn't one. */ + if(pScrn->numEntities != 1) { + XGIErrorLog(pScrn, "Number of entities is not 1\n"); + return FALSE; + } + + /* The vgahw module should be loaded here when needed */ + if(!(pMod = xf86LoadSubModule(pScrn, "vgahw"))) { + XGIErrorLog(pScrn, "Could not load vgahw module\n"); + return FALSE; + } + + xf86LoaderModReqSymLists(pMod, vgahwSymbols, NULL); + + /* Due to the liberal license terms this is needed for + * keeping the copyright notice readable and intact in + * binary distributions. Removing this is a copyright + * infringement. Please read the license terms above. + */ + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "XGI driver (%d/%02d/%02d-%d)\n", + XGIDRIVERVERSIONYEAR + 2000, XGIDRIVERVERSIONMONTH, + XGIDRIVERVERSIONDAY, XGIDRIVERREVISION); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Copyright (C) 2001-2004 Thomas Winischhofer and others\n"); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Compiled for XFree86 %d.%d.%d.%d\n", + XF86_VERSION_MAJOR, XF86_VERSION_MINOR, + XF86_VERSION_PATCH, XF86_VERSION_SNAP); +#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,2,99,0,0) + if(xf86GetVersion() != XF86_VERSION_CURRENT) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "This version of the driver is not compiled for this version of XFree86!\n"); + } +#endif + + /* Allocate a vgaHWRec */ + if(!vgaHWGetHWRec(pScrn)) { + XGIErrorLog(pScrn, "Could not allocate VGA private\n"); + return FALSE; + } + + /* Allocate the XGIRec driverPrivate */ + if(!XGIGetRec(pScrn)) { + XGIErrorLog(pScrn, "Could not allocate memory for pXGI private\n"); + return FALSE; + } + pXGI = XGIPTR(pScrn); + pXGI->pScrn = pScrn; + +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + pXGI->IODBase = 0; +#else + pXGI->IODBase = pScrn->domainIOBase; +#endif + + /* Get the entity, and make sure it is PCI. */ + pXGI->pEnt = xf86GetEntityInfo(pScrn->entityList[0]); + if(pXGI->pEnt->location.type != BUS_PCI) { + XGIErrorLog(pScrn, "Entity's bus type is not PCI\n"); + XGIFreeRec(pScrn); + return FALSE; + } + +#ifdef XGIDUALHEAD + /* Allocate an entity private if necessary */ + if(xf86IsEntityShared(pScrn->entityList[0])) { + pXGIEnt = xf86GetEntityPrivate(pScrn->entityList[0], + XGIEntityIndex)->ptr; + pXGI->entityPrivate = pXGIEnt; + + /* If something went wrong, quit here */ + if((pXGIEnt->DisableDual) || (pXGIEnt->ErrorAfterFirst)) { + XGIErrorLog(pScrn, "First head encountered fatal error, can't continue\n"); + XGIFreeRec(pScrn); + return FALSE; + } + } +#endif + + /* Find the PCI info for this screen */ + pXGI->PciInfo = xf86GetPciInfoForEntity(pXGI->pEnt->index); + pXGI->PciTag = pXGI->xgi_HwDevExt.PciTag = pciTag(pXGI->PciInfo->bus, + pXGI->PciInfo->device, pXGI->PciInfo->func); + + pXGI->Primary = xf86IsPrimaryPci(pXGI->PciInfo); + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "This adapter is %s display adapter\n", + (pXGI->Primary ? "primary" : "secondary")); + + if(pXGI->Primary) { + VGAHWPTR(pScrn)->MapSize = 0x10000; /* Standard 64k VGA window */ + if(!vgaHWMapMem(pScrn)) { + XGIErrorLog(pScrn, "Could not map VGA memory\n"); + XGIFreeRec(pScrn); + return FALSE; + } + } + vgaHWGetIOBase(VGAHWPTR(pScrn)); + + /* We "patch" the PIOOffset inside vgaHW in order to force + * the vgaHW module to use our relocated i/o ports. + */ + VGAHWPTR(pScrn)->PIOOffset = pXGI->IODBase + (pXGI->PciInfo->ioBase[2] & 0xFFFC) - 0x380; + + pXGI->pInt = NULL; + if(!pXGI->Primary) { +#if !defined(__alpha__) + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Initializing display adapter through int10\n"); +#endif + if((pMod = xf86LoadSubModule(pScrn, "int10"))) { + xf86LoaderModReqSymLists(pMod, int10Symbols, NULL); +#if !defined(__alpha__) + pXGI->pInt = xf86InitInt10(pXGI->pEnt->index); +#endif + } else { + XGIErrorLog(pScrn, "Could not load int10 module\n"); + } + } + +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + { + resRange vgamem[] = { {ResShrMemBlock,0xA0000,0xAFFFF}, + {ResShrMemBlock,0xB0000,0xB7FFF}, + {ResShrMemBlock,0xB8000,0xBFFFF}, + _END }; + xf86SetOperatingState(vgamem, pXGI->pEnt->index, ResUnusedOpr); + } +#else + xf86SetOperatingState(resVgaMem, pXGI->pEnt->index, ResUnusedOpr); +#endif + + /* Operations for which memory access is required */ + pScrn->racMemFlags = RAC_FB | RAC_COLORMAP | RAC_CURSOR | RAC_VIEWPORT; + /* Operations for which I/O access is required */ + pScrn->racIoFlags = RAC_COLORMAP | RAC_CURSOR | RAC_VIEWPORT; + + /* The ramdac module should be loaded here when needed */ + if(!(pMod = xf86LoadSubModule(pScrn, "ramdac"))) { + XGIErrorLog(pScrn, "Could not load ramdac module\n"); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + XGIFreeRec(pScrn); + return FALSE; + } + + xf86LoaderModReqSymLists(pMod, ramdacSymbols, NULL); + + /* Set pScrn->monitor */ + pScrn->monitor = pScrn->confScreen->monitor; + + /* + * Set the Chipset and ChipRev, allowing config file entries to + * override. DANGEROUS! + */ + if(pXGI->pEnt->device->chipset && *pXGI->pEnt->device->chipset) { +PDEBUG(ErrorF(" --- Chipset 1 \n")); + pScrn->chipset = pXGI->pEnt->device->chipset; + pXGI->Chipset = xf86StringToToken(XGIChipsets, pScrn->chipset); + from = X_CONFIG; + } else if(pXGI->pEnt->device->chipID >= 0) { +PDEBUG(ErrorF(" --- Chipset 2 \n")); + pXGI->Chipset = pXGI->pEnt->device->chipID; + pScrn->chipset = (char *)xf86TokenToString(XGIChipsets, pXGI->Chipset); + + from = X_CONFIG; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n", + pXGI->Chipset); + } else { +PDEBUG(ErrorF(" --- Chipset 3 \n")); + from = X_PROBED; + pXGI->Chipset = pXGI->PciInfo->chipType; + pScrn->chipset = (char *)xf86TokenToString(XGIChipsets, pXGI->Chipset); + } + if(pXGI->pEnt->device->chipRev >= 0) { + pXGI->ChipRev = pXGI->pEnt->device->chipRev; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n", + pXGI->ChipRev); + } else { + pXGI->ChipRev = pXGI->PciInfo->chipRev; + } + pXGI->xgi_HwDevExt.jChipRevision = pXGI->ChipRev; + +PDEBUG(ErrorF(" --- Chipset : %s \n", pScrn->chipset)); + + + pXGI->XGI6326Flags = 0; + + /* + * This shouldn't happen because such problems should be caught in + * XGIProbe(), but check it just in case. + */ + if(pScrn->chipset == NULL) { + XGIErrorLog(pScrn, "ChipID 0x%04X is not recognised\n", pXGI->Chipset); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + XGIFreeRec(pScrn); + return FALSE; + } + if(pXGI->Chipset < 0) { + XGIErrorLog(pScrn, "Chipset \"%s\" is not recognised\n", pScrn->chipset); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + XGIFreeRec(pScrn); + return FALSE; + } + + /* Determine chipset and VGA engine type */ + pXGI->ChipFlags = 0; + pXGI->XGI_SD_Flags = 0; + pXGI->HWCursorMBufNum = pXGI->HWCursorCBufNum = 0; + + switch(pXGI->Chipset) { + + case PCI_CHIP_XGIXG40: + case PCI_CHIP_XGIXG20: + pXGI->xgi_HwDevExt.jChipType = XG40; + pXGI->VGAEngine = XGI_XGX_VGA; + pXGI->myCR63 = 0x63; + pXGI->mmioSize = 64; + break; + default: + pXGI->xgi_HwDevExt.jChipType = XGI_OLD; + pXGI->VGAEngine = XGI_OLD_VGA; + pXGI->mmioSize = 64; + break; + } + +/* load frame_buffer */ + + XGI_FbDevExist = FALSE; + if( pXGI->Chipset != PCI_CHIP_XGIXG20 ) + { + if( (fd = open("/dev/fb", 'r')) != -1) + { + PDEBUG(ErrorF("--- open /dev/fb.... \n")); + ioctl(fd,FBIOGET_FSCREENINFO, &fix); + if (fix.accel == FB_ACCEL_XGI_GLAMOUR) + { + PDEBUG(ErrorF("--- fix.accel.... \n")); + XGI_FbDevExist = TRUE; + } + else + PDEBUG(ErrorF("--- no fix.accel.... 0x%08lx \n", fix.accel)); + close(fd); + } + } + + /* Now check if xgifb is loaded. Since xgifb only supports + * the 300 and 315 series, we only do this for these chips. + * We use this for checking where xgifb starts its memory + * heap in order to automatically detect the correct MaxXFBMem + * setting (which normally is given by the option of the same name). + * Under kernel 2.4.y, that only works if xgifb is completely + * running, ie with a video mode because the fbdev will not be + * installed otherwise. Under 2.5 and later, xgifb will install + * the framebuffer device in any way and running it with mode=none + * is no longer supported (or necessary). + */ + + pXGI->donttrustpdc = FALSE; + pXGI->xgifbpdc = 0xff; + pXGI->xgifbpdca = 0xff; + pXGI->xgifblcda = 0xff; + pXGI->xgifbscalelcd = -1; + pXGI->xgifbspecialtiming = CUT_NONE; + pXGI->xgifb_haveemi = FALSE; + pXGI->OldMode = 0; + pXGI->xgifbfound = FALSE; + + /* + * The first thing we should figure out is the depth, bpp, etc. + * Additionally, determine the size of the HWCursor memory area. + */ + switch(pXGI->VGAEngine) { + case XGI_XGX_VGA: + pXGI->CursorSize = 4096; + pix24flags = Support32bppFb; + break; + default: + pXGI->CursorSize = 2048; + pix24flags = Support24bppFb; + break; + } + +#ifdef XGIDUALHEAD + /* In case of Dual Head, we need to determine if we are the "master" head or + * the "slave" head. In order to do that, we set PrimInit to DONE in the + * shared entity at the end of the first initialization. The second + * initialization then knows that some things have already been done. THIS + * ALWAYS ASSUMES THAT THE FIRST DEVICE INITIALIZED IS THE MASTER! + */ + + if(xf86IsEntityShared(pScrn->entityList[0])) { + if(pXGIEnt->lastInstance > 0) { + if(!xf86IsPrimInitDone(pScrn->entityList[0])) { + /* First Head (always CRT2) */ + pXGI->SecondHead = FALSE; + pXGIEnt->pScrn_1 = pScrn; + pXGIEnt->CRT1ModeNo = pXGIEnt->CRT2ModeNo = -1; + pXGIEnt->CRT2ModeSet = FALSE; + pXGI->DualHeadMode = TRUE; + pXGIEnt->DisableDual = FALSE; + pXGIEnt->BIOS = NULL; + pXGIEnt->ROM661New = FALSE; + pXGIEnt->XGI_Pr = NULL; + pXGIEnt->RenderAccelArray = NULL; + } else { + /* Second Head (always CRT1) */ + pXGI->SecondHead = TRUE; + pXGIEnt->pScrn_2 = pScrn; + pXGI->DualHeadMode = TRUE; + } + } else { + /* Only one screen in config file - disable dual head mode */ + pXGI->SecondHead = FALSE; + pXGI->DualHeadMode = FALSE; + pXGIEnt->DisableDual = TRUE; + } + } else { + /* Entity is not shared - disable dual head mode */ + pXGI->SecondHead = FALSE; + pXGI->DualHeadMode = FALSE; + } +#endif + + pXGI->ForceCursorOff = FALSE; + + /* Allocate XGI_Private (for mode switching code) and initialize it */ + pXGI->XGI_Pr = NULL; +#ifdef XGIDUALHEAD + if(pXGIEnt) { + if(pXGIEnt->XGI_Pr) pXGI->XGI_Pr = pXGIEnt->XGI_Pr; + } +#endif + if(!pXGI->XGI_Pr) { + if(!(pXGI->XGI_Pr = xnfcalloc(sizeof(XGI_Private), 1))) { + XGIErrorLog(pScrn, "Could not allocate memory for XGI_Pr private\n"); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + XGIFreeRec(pScrn); + return FALSE; + } +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->XGI_Pr = pXGI->XGI_Pr; +#endif + memset(pXGI->XGI_Pr, 0, sizeof(XGI_Private)); + pXGI->XGI_Pr->XGI_Backup70xx = 0xff; + pXGI->XGI_Pr->XGI_CHOverScan = -1; + pXGI->XGI_Pr->XGI_ChSW = FALSE; + pXGI->XGI_Pr->XGI_CustomT = CUT_NONE; + pXGI->XGI_Pr->PanelSelfDetected = FALSE; + pXGI->XGI_Pr->UsePanelScaler = -1; + pXGI->XGI_Pr->CenterScreen = -1; + pXGI->XGI_Pr->CRT1UsesCustomMode = FALSE; + pXGI->XGI_Pr->PDC = pXGI->XGI_Pr->PDCA = -1; + pXGI->XGI_Pr->LVDSHL = -1; + pXGI->XGI_Pr->HaveEMI = FALSE; + pXGI->XGI_Pr->HaveEMILCD = FALSE; + pXGI->XGI_Pr->OverruleEMI = FALSE; + pXGI->XGI_Pr->XGI_SensibleSR11 = FALSE; + if(pXGI->xgi_HwDevExt.jChipType >= XGI_661) { + pXGI->XGI_Pr->XGI_SensibleSR11 = TRUE; + } + pXGI->XGI_Pr->XGI_MyCR63 = pXGI->myCR63; + } + + /* Get our relocated IO registers */ + pXGI->RelIO = (XGIIOADDRESS)((pXGI->PciInfo->ioBase[2] & 0xFFFC) + pXGI->IODBase); + pXGI->xgi_HwDevExt.pjIOAddress = (XGIIOADDRESS)(pXGI->RelIO + 0x30); + xf86DrvMsg(pScrn->scrnIndex, from, "Relocated IO registers at 0x%lX\n", + (unsigned long)pXGI->RelIO); + + /* Initialize XGI Port Reg definitions for externally used + * init.c/init301.c functions. + */ + XGIRegInit(pXGI->XGI_Pr, pXGI->RelIO + 0x30); + + if(!xf86SetDepthBpp(pScrn, 0, 0, 0, pix24flags)) { + XGIErrorLog(pScrn, "xf86SetDepthBpp() error\n"); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + XGIFreeRec(pScrn); + return FALSE; + } + + /* Check that the returned depth is one we support */ + temp = 0; + switch(pScrn->depth) { + case 8: + case 16: + case 24: + case 15: + break; + default: + temp = 1; + } + + if(temp) { + XGIErrorLog(pScrn, + "Given color depth (%d) is not supported by this driver/chipset\n", + pScrn->depth); + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + XGIFreeRec(pScrn); + return FALSE; + } + + xf86PrintDepthBpp(pScrn); + + /* Get the depth24 pixmap format */ + if(pScrn->depth == 24 && pix24bpp == 0) { + pix24bpp = xf86GetBppFromDepth(pScrn, 24); + } + + /* + * This must happen after pScrn->display has been set because + * xf86SetWeight references it. + */ + if(pScrn->depth > 8) { + /* The defaults are OK for us */ + rgb zeros = {0, 0, 0}; + + if(!xf86SetWeight(pScrn, zeros, zeros)) { + XGIErrorLog(pScrn, "xf86SetWeight() error\n"); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + XGIFreeRec(pScrn); + return FALSE; + } else { + Bool ret = FALSE; + switch(pScrn->depth) { + case 15: + if((pScrn->weight.red != 5) || + (pScrn->weight.green != 5) || + (pScrn->weight.blue != 5)) ret = TRUE; + break; + case 16: + if((pScrn->weight.red != 5) || + (pScrn->weight.green != 6) || + (pScrn->weight.blue != 5)) ret = TRUE; + break; + case 24: + if((pScrn->weight.red != 8) || + (pScrn->weight.green != 8) || + (pScrn->weight.blue != 8)) ret = TRUE; + break; + } + if(ret) { + XGIErrorLog(pScrn, + "RGB weight %d%d%d at depth %d not supported by hardware\n", + (int)pScrn->weight.red, (int)pScrn->weight.green, + (int)pScrn->weight.blue, pScrn->depth); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + XGIFreeRec(pScrn); + return FALSE; + } + } + } + + /* Set the current layout parameters */ + pXGI->CurrentLayout.bitsPerPixel = pScrn->bitsPerPixel; + pXGI->CurrentLayout.depth = pScrn->depth; + /* (Inside this function, we can use pScrn's contents anyway) */ + + if(!xf86SetDefaultVisual(pScrn, -1)) { + XGIErrorLog(pScrn, "xf86SetDefaultVisual() error\n"); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + XGIFreeRec(pScrn); + return FALSE; + } else { + /* We don't support DirectColor at > 8bpp */ + if(pScrn->depth > 8 && pScrn->defaultVisual != TrueColor) { + XGIErrorLog(pScrn, + "Given default visual (%s) is not supported at depth %d\n", + xf86GetVisualName(pScrn->defaultVisual), pScrn->depth); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + XGIFreeRec(pScrn); + return FALSE; + } + } + +#ifdef XGIDUALHEAD + /* Due to palette & timing problems we don't support 8bpp in DHM */ + if((pXGI->DualHeadMode) && (pScrn->bitsPerPixel == 8)) { + XGIErrorLog(pScrn, "Color depth 8 not supported in Dual Head mode.\n"); + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + XGIFreeRec(pScrn); + return FALSE; + } +#endif + + /* + * The cmap layer needs this to be initialised. + */ + { + Gamma zeros = {0.0, 0.0, 0.0}; + + if(!xf86SetGamma(pScrn, zeros)) { + XGIErrorLog(pScrn, "xf86SetGamma() error\n"); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + XGIFreeRec(pScrn); + return FALSE; + } + } + + /* We use a programamble clock */ + pScrn->progClock = TRUE; + + /* Set the bits per RGB for 8bpp mode */ + if(pScrn->depth == 8) { + pScrn->rgbBits = 6; + } + + from = X_DEFAULT; + + /* Unlock registers */ + xgiSaveUnlockExtRegisterLock(pXGI, &srlockReg, &crlockReg); + + /* Read BIOS for 300 and 315/330 series customization */ + pXGI->xgi_HwDevExt.pjVirtualRomBase = NULL; + pXGI->BIOS = NULL; + pXGI->xgi_HwDevExt.UseROM = FALSE; + pXGI->ROM661New = FALSE; + + /* Evaluate options */ + xgiOptions(pScrn); + +#ifdef XGIMERGED + /* Due to palette & timing problems we don't support 8bpp in MFBM */ + if((pXGI->MergedFB) && (pScrn->bitsPerPixel == 8)) { + XGIErrorLog(pScrn, "MergedFB: Color depth 8 not supported, %s\n", mergeddisstr); + pXGI->MergedFB = pXGI->MergedFBAuto = FALSE; + } +#endif + + /* Do basic configuration */ + XGISetup(pScrn); + + from = X_PROBED; + if(pXGI->pEnt->device->MemBase != 0) { + /* + * XXX Should check that the config file value matches one of the + * PCI base address values. + */ + pXGI->FbAddress = pXGI->pEnt->device->MemBase; + from = X_CONFIG; + } else { + pXGI->FbAddress = pXGI->PciInfo->memBase[0] & 0xFFFFFFF0; + } + + pXGI->realFbAddress = pXGI->FbAddress; + +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) + xf86DrvMsg(pScrn->scrnIndex, from, "Global linear framebuffer at 0x%lX\n", + (unsigned long)pXGI->FbAddress); + else +#endif + xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n", + (unsigned long)pXGI->FbAddress); + + if(pXGI->pEnt->device->IOBase != 0) { + /* + * XXX Should check that the config file value matches one of the + * PCI base address values. + */ + pXGI->IOAddress = pXGI->pEnt->device->IOBase; + from = X_CONFIG; + } else { + pXGI->IOAddress = pXGI->PciInfo->memBase[1] & 0xFFFFFFF0; + } + + xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%lX (size %ldK)\n", + (unsigned long)pXGI->IOAddress, pXGI->mmioSize); + pXGI->xgi_HwDevExt.bIntegratedMMEnabled = TRUE; + + /* Register the PCI-assigned resources. */ + if(xf86RegisterResources(pXGI->pEnt->index, NULL, ResExclusive)) { + XGIErrorLog(pScrn, "xf86RegisterResources() found resource conflicts\n"); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + xgiRestoreExtRegisterLock(pXGI,srlockReg,crlockReg); + XGIFreeRec(pScrn); + return FALSE; + } + + from = X_PROBED; + if(pXGI->pEnt->device->videoRam != 0) { + + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Option \"VideoRAM\" ignored\n"); + } + + pXGI->RealVideoRam = pScrn->videoRam; + + xf86DrvMsg(pScrn->scrnIndex, from, "VideoRAM: %d KB\n", + pScrn->videoRam); + + pXGI->FbMapSize = pXGI->availMem = pScrn->videoRam * 1024; + pXGI->xgi_HwDevExt.ulVideoMemorySize = pScrn->videoRam * 1024; + pXGI->xgi_HwDevExt.bSkipDramSizing = TRUE; + + /* Calculate real availMem according to Accel/TurboQueue and + * HWCursur setting. Also, initialize some variables used + * in other modules. + */ + + pXGI->cursorOffset = 0; + pXGI->CurARGBDest = NULL; + pXGI->CurMonoSrc = NULL; + pXGI->CurFGCol = pXGI->CurBGCol = 0; + + switch(pXGI->VGAEngine) { + default: + /* cursorOffset not used in cursor functions for 530 and + * older chips, because the cursor is *above* the TQ. + * On 5597 and older revisions of the 6326, the TQ is + * max 32K, on newer 6326 revisions and the 530 either 30 + * (or 32?) or 62K (or 64?). However, to make sure, we + * use only 30K (or 32?), but reduce the available memory + * by 64, and locate the TQ at the beginning of this last + * 64K block. (We do this that way even when using the + * HWCursor, because the cursor only takes 2K and the + * queue does not seem to last that far anyway.) + * The TQ must be located at 32KB boundaries. + */ + if(pXGI->RealVideoRam < 3072) { + if(pXGI->TurboQueue) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Not enough video RAM for TurboQueue. TurboQueue disabled\n"); + pXGI->TurboQueue = FALSE; + } + } + pXGI->CmdQueMaxLen = 32; + if(pXGI->TurboQueue) { + pXGI->availMem -= (64*1024); + pXGI->CmdQueMaxLen = 900; /* To make sure; should be 992 */ + } else if(pXGI->HWCursor) { + pXGI->availMem -= pXGI->CursorSize; + } + + pXGI->CmdQueLenMask = (pXGI->TurboQueue) ? 0x7FFF : 0x003F; + + /* This is to be subtracted from MMIO queue length register contents + * for getting the real Queue length. + */ + pXGI->CmdQueLenFix = (pXGI->TurboQueue) ? 32 : 0; + } + +#ifdef XGIDUALHEAD + /* In dual head mode, we share availMem equally - so align it + * to 8KB; this way, the address of the FB of the second + * head is aligned to 4KB for mapping. + */ + if(pXGI->DualHeadMode) + pXGI->availMem &= 0xFFFFE000; +#endif + + /* Check MaxXFBMem setting */ +#ifdef XGIDUALHEAD + /* Since DRI is not supported in dual head mode, we + don't need the MaxXFBMem setting. */ + if(pXGI->DualHeadMode) { + if(pXGI->maxxfbmem) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "MaxXFBMem not used in Dual Head mode. Using all VideoRAM.\n"); + } + pXGI->maxxfbmem = pXGI->availMem; + } else +#endif + if(pXGI->maxxfbmem) { + if(pXGI->maxxfbmem > pXGI->availMem) { + if(pXGI->xgifbMem) { + pXGI->maxxfbmem = pXGI->xgifbMem * 1024; + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Invalid MaxXFBMem setting. Using xgifb heap start information\n"); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Invalid MaxXFBMem setting. Using all VideoRAM for framebuffer\n"); + pXGI->maxxfbmem = pXGI->availMem; + } + } else if(pXGI->xgifbMem) { + if(pXGI->maxxfbmem > pXGI->xgifbMem * 1024) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "MaxXFBMem beyond xgifb heap start. Using xgifb heap start\n"); + pXGI->maxxfbmem = pXGI->xgifbMem * 1024; + } + } + } else if(pXGI->xgifbMem) { + pXGI->maxxfbmem = pXGI->xgifbMem * 1024; + } + else pXGI->maxxfbmem = pXGI->availMem; + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using %ldK of framebuffer memory\n", + pXGI->maxxfbmem / 1024); + + /* There are some machines out there which require a special + * setup of the GPIO registers in order to make the Chrontel + * work. Try to find out if we're running on such a machine. + * Furthermore, there is some highly customized hardware, + * which requires some non-standard LVDS timing. Since the + * vendors don't seem to care about PCI subsystem ID's we + * need to find out using the BIOS version and date strings. + */ + pXGI->XGI_Pr->XGI_ChSW = FALSE; + + if(pXGI->XGI_Pr->XGI_CustomT == CUT_NONE) { + int i = 0, j; + unsigned short bversptr = 0; + BOOLEAN footprint; + unsigned long chksum = 0; + + if(pXGI->xgi_HwDevExt.UseROM) { + bversptr = pXGI->BIOS[0x16] | (pXGI->BIOS[0x17] << 8); + for(i=0; i<32768; i++) chksum += pXGI->BIOS[i]; + } + + i = 0; + do { + if( (mycustomttable[i].chipID == pXGI->xgi_HwDevExt.jChipType) && + ((!strlen(mycustomttable[i].biosversion)) || + (pXGI->xgi_HwDevExt.UseROM && + (!strncmp(mycustomttable[i].biosversion, (char *)&pXGI->BIOS[bversptr], + strlen(mycustomttable[i].biosversion))))) && + ((!strlen(mycustomttable[i].biosdate)) || + (pXGI->xgi_HwDevExt.UseROM && + (!strncmp(mycustomttable[i].biosdate, (char *)&pXGI->BIOS[0x2c], + strlen(mycustomttable[i].biosdate))))) && + ((!mycustomttable[i].bioschksum) || + (pXGI->xgi_HwDevExt.UseROM && + (mycustomttable[i].bioschksum == chksum))) && + (mycustomttable[i].pcisubsysvendor == pXGI->PciInfo->subsysVendor) && + (mycustomttable[i].pcisubsyscard == pXGI->PciInfo->subsysCard) ) { + footprint = TRUE; + for(j=0; j<5; j++) { + if(mycustomttable[i].biosFootprintAddr[j]) { + if(pXGI->xgi_HwDevExt.UseROM) { + if(pXGI->BIOS[mycustomttable[i].biosFootprintAddr[j]] != + mycustomttable[i].biosFootprintData[j]) + footprint = FALSE; + } else footprint = FALSE; + } + } + if(footprint) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Identified %s %s, special timing applies\n", + mycustomttable[i].vendorName, mycustomttable[i].cardName); + pXGI->XGI_Pr->XGI_CustomT = mycustomttable[i].SpecialID; + break; + } + } + i++; + } while(mycustomttable[i].chipID); + } + + /* Handle ForceCRT1 option */ + if(pXGI->forceCRT1 != -1) { + if(pXGI->forceCRT1) pXGI->CRT1off = 0; + else pXGI->CRT1off = 1; + } else pXGI->CRT1off = -1; + + /* Detect video bridge and sense TV/VGA2 */ + XGIVGAPreInit(pScrn); + + /* Detect CRT1 (via DDC1 and DDC2, hence via VGA port; regardless of LCDA) */ + XGICRT1PreInit(pScrn); + + /* Detect LCD (connected via CRT2, regardless of LCDA) and LCD resolution */ + XGILCDPreInit(pScrn); + + /* LCDA only supported under these conditions: */ + if(pXGI->ForceCRT1Type == CRT1_LCDA) { + if( ((pXGI->xgi_HwDevExt.jChipType != XGI_650) && + (pXGI->xgi_HwDevExt.jChipType < XGI_661)) || + (!(pXGI->VBFlags & (VB_301C | VB_302B | VB_301LV | VB_302LV))) ) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Chipset/Video bridge does not support LCD-via-CRT1\n"); + pXGI->ForceCRT1Type = CRT1_VGA; + } else if(!(pXGI->VBFlags & CRT2_LCD)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "No digitally connected LCD panel found, LCD-via-CRT1 disabled\n"); + pXGI->ForceCRT1Type = CRT1_VGA; + } + } + + /* Setup SD flags */ + pXGI->XGI_SD_Flags |= XGI_SD_ADDLSUPFLAG; + + if(pXGI->VBFlags & (VB_XGITVBRIDGE | VB_CHRONTEL)) { + pXGI->XGI_SD_Flags |= XGI_SD_SUPPORTTV; + } + +#ifdef ENABLE_YPBPR + if(pXGI->VBFlags & (VB_301|VB_301B|VB_302B)) { + pXGI->XGI_SD_Flags |= XGI_SD_SUPPORTHIVISION; + } +#endif + +#ifdef TWDEBUG /* @@@ TEST @@@ */ + pXGI->XGI_SD_Flags |= XGI_SD_SUPPORTYPBPRAR; + xf86DrvMsg(0, X_INFO, "TEST: Support Aspect Ratio\n"); +#endif + + /* Detect CRT2-TV and PAL/NTSC mode */ + XGITVPreInit(pScrn); + + /* Detect CRT2-VGA */ + /* XGICRT2PreInit(pScrn); */ + + /* Backup detected CRT2 devices */ + pXGI->detectedCRT2Devices = pXGI->VBFlags & (CRT2_LCD|CRT2_TV|CRT2_VGA|TV_AVIDEO|TV_SVIDEO|TV_SCART|TV_HIVISION|TV_YPBPR); + + if(!(pXGI->XGI_SD_Flags & XGI_SD_SUPPORTYPBPR)) { + if((pXGI->ForceTVType != -1) && (pXGI->ForceTVType & TV_YPBPR)) { + pXGI->ForceTVType = -1; + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "YPbPr TV output not supported\n"); + } + } + + if(!(pXGI->XGI_SD_Flags & XGI_SD_SUPPORTHIVISION)) { + if((pXGI->ForceTVType != -1) && (pXGI->ForceTVType & TV_HIVISION)) { + pXGI->ForceTVType = -1; + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "HiVision TV output not supported\n"); + } + } + + if((pXGI->VBFlags & VB_XGITVBRIDGE) || + ((pXGI->VBFlags & VB_CHRONTEL) && (pXGI->ChrontelType == CHRONTEL_701x))) { + pXGI->XGI_SD_Flags |= (XGI_SD_SUPPORTPALMN | XGI_SD_SUPPORTNTSCJ); + } + if((pXGI->VBFlags & VB_XGITVBRIDGE) || + ((pXGI->VBFlags & VB_CHRONTEL) && (pXGI->ChrontelType == CHRONTEL_700x))) { + pXGI->XGI_SD_Flags |= XGI_SD_SUPPORTTVPOS; + } + if(pXGI->VBFlags & (VB_301|VB_301B|VB_301C|VB_302B)) { + pXGI->XGI_SD_Flags |= (XGI_SD_SUPPORTSCART | XGI_SD_SUPPORTVGA2); + } + if(pXGI->VBFlags & VB_CHRONTEL) { + pXGI->XGI_SD_Flags |= XGI_SD_SUPPORTOVERSCAN; + if(pXGI->ChrontelType == CHRONTEL_700x) { + pXGI->XGI_SD_Flags |= XGI_SD_SUPPORTSOVER; + } + } + + if( ((pXGI->xgi_HwDevExt.jChipType == XGI_650) || + (pXGI->xgi_HwDevExt.jChipType >= XGI_661)) && + (pXGI->VBFlags & (VB_301C | VB_302B | VB_301LV | VB_302LV)) && + (pXGI->VBFlags & CRT2_LCD) && + (pXGI->VESA != 1) ) { + pXGI->XGI_SD_Flags |= XGI_SD_SUPPORTLCDA; + } else { + /* Paranoia */ + pXGI->ForceCRT1Type = CRT1_VGA; + } + + pXGI->VBFlags |= pXGI->ForceCRT1Type; + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "SDFlags %lx\n", pXGI->XGI_SD_Flags); +#endif + + +#ifdef XGIDUALHEAD + if((!pXGI->DualHeadMode) || (pXGI->SecondHead)) { +#endif + xf86DrvMsg(pScrn->scrnIndex, pXGI->CRT1gammaGiven ? X_CONFIG : X_INFO, + "CRT1 gamma correction is %s\n", + pXGI->CRT1gamma ? "enabled" : "disabled"); + +#ifdef XGIDUALHEAD + } +#endif + + /* Eventually overrule TV Type (SVIDEO, COMPOSITE, SCART, HIVISION, YPBPR) */ + if(pXGI->VBFlags & VB_XGITVBRIDGE) { + if(pXGI->ForceTVType != -1) { + pXGI->VBFlags &= ~(TV_INTERFACE); + if(!(pXGI->VBFlags & VB_CHRONTEL)) { + pXGI->VBFlags &= ~(TV_CHSCART | TV_CHYPBPR525I); + } + pXGI->VBFlags |= pXGI->ForceTVType; + if(pXGI->VBFlags & TV_YPBPR) { + pXGI->VBFlags &= ~(TV_STANDARD); + pXGI->VBFlags &= ~(TV_YPBPRAR); + pXGI->VBFlags |= pXGI->ForceYPbPrType; + pXGI->VBFlags |= pXGI->ForceYPbPrAR; + } + } + } + + /* Handle ForceCRT1 option (part 2) */ + pXGI->CRT1changed = FALSE; + + /* Check if CRT1 used (or needed; this eg. if no CRT2 detected) */ + if(pXGI->VBFlags & VB_VIDEOBRIDGE) { + + /* No CRT2 output? Then we NEED CRT1! + * We also need CRT1 if depth = 8 and bridge=LVDS|301B-DH + */ + if( (!(pXGI->VBFlags & (CRT2_VGA | CRT2_LCD | CRT2_TV))) || + ( (pScrn->bitsPerPixel == 8) && + ( (pXGI->VBFlags & (VB_LVDS | VB_CHRONTEL)) || + ((pXGI->VBFlags & VB_30xBDH) && (pXGI->VBFlags & CRT2_LCD)) ) ) ) { + pXGI->CRT1off = 0; + } + /* No CRT2 output? Then we can't use Xv on CRT2 */ + if(!(pXGI->VBFlags & (CRT2_VGA | CRT2_LCD | CRT2_TV))) + pXGI->XvOnCRT2 = FALSE; + + } else { /* no video bridge? */ + + /* Then we NEED CRT1... */ + pXGI->CRT1off = 0; + /* ... and can't use CRT2 for Xv output */ + pXGI->XvOnCRT2 = FALSE; + } + + /* LCDA? Then we don't switch off CRT1 */ + if(pXGI->VBFlags & CRT1_LCDA) pXGI->CRT1off = 0; + + /* Handle TVStandard option */ + if((pXGI->NonDefaultPAL != -1) || (pXGI->NonDefaultNTSC != -1)) { + if( (!(pXGI->VBFlags & VB_XGITVBRIDGE)) && + (!((pXGI->VBFlags & VB_CHRONTEL)) && (pXGI->ChrontelType == CHRONTEL_701x)) ) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "PALM, PALN and NTSCJ not supported on this hardware\n"); + pXGI->NonDefaultPAL = pXGI->NonDefaultNTSC = -1; + pXGI->VBFlags &= ~(TV_PALN | TV_PALM | TV_NTSCJ); + pXGI->XGI_SD_Flags &= ~(XGI_SD_SUPPORTPALMN | XGI_SD_SUPPORTNTSCJ); + } + } + +#ifdef XGI_CP + XGI_CP_DRIVER_RECONFIGOPT +#endif + + /* Do some checks */ + if(pXGI->OptTVOver != -1) { + if(pXGI->VBFlags & VB_CHRONTEL) { + pXGI->UseCHOverScan = pXGI->OptTVOver; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "CHTVOverscan only supported on CHRONTEL 70xx\n"); + pXGI->UseCHOverScan = -1; + } + } else pXGI->UseCHOverScan = -1; + + if(pXGI->xgitvedgeenhance != -1) { + if(!(pXGI->VBFlags & VB_301)) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "XGITVEdgeEnhance only supported on XGI301\n"); + pXGI->xgitvedgeenhance = -1; + } + } + if(pXGI->xgitvsaturation != -1) { + if(pXGI->VBFlags & VB_301) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "XGITVSaturation not supported on XGI301\n"); + pXGI->xgitvsaturation = -1; + } + } + + /* Do some MergedFB mode initialisation */ +#ifdef XGIMERGED + if(pXGI->MergedFB) { + pXGI->CRT2pScrn = xalloc(sizeof(ScrnInfoRec)); + if(!pXGI->CRT2pScrn) { + XGIErrorLog(pScrn, "Failed to allocate memory for 2nd pScrn, %s\n", mergeddisstr); + pXGI->MergedFB = FALSE; + } else { + memcpy(pXGI->CRT2pScrn, pScrn, sizeof(ScrnInfoRec)); + } + } +#endif + + + /* Determine CRT1<>CRT2 mode + * Note: When using VESA or if the bridge is in slavemode, display + * is ALWAYS in MIRROR_MODE! + * This requires extra checks in functions using this flag! + * (see xgi_video.c for example) + */ + if(pXGI->VBFlags & DISPTYPE_DISP2) { + if(pXGI->CRT1off) { /* CRT2 only ------------------------------- */ +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + XGIErrorLog(pScrn, + "CRT1 not detected or forced off. Dual Head mode can't initialize.\n"); + if(pXGIEnt) pXGIEnt->DisableDual = TRUE; + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + pXGI->pInt = NULL; + xgiRestoreExtRegisterLock(pXGI,srlockReg,crlockReg); + XGIFreeRec(pScrn); + return FALSE; + } +#endif +#ifdef XGIMERGED + if(pXGI->MergedFB) { + if(pXGI->MergedFBAuto) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, mergednocrt1, mergeddisstr); + } else { + XGIErrorLog(pScrn, mergednocrt1, mergeddisstr); + } + if(pXGI->CRT2pScrn) xfree(pXGI->CRT2pScrn); + pXGI->CRT2pScrn = NULL; + pXGI->MergedFB = FALSE; + } +#endif + pXGI->VBFlags |= VB_DISPMODE_SINGLE; + /* No CRT1? Then we use the video overlay on CRT2 */ + pXGI->XvOnCRT2 = TRUE; + } else /* CRT1 and CRT2 - mirror or dual head ----- */ +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + pXGI->VBFlags |= (VB_DISPMODE_DUAL | DISPTYPE_CRT1); + if(pXGI->VESA != -1) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "VESA option not used in Dual Head mode. VESA disabled.\n"); + } + if(pXGIEnt) pXGIEnt->DisableDual = FALSE; + pXGI->VESA = 0; + } else +#endif +#ifdef XGIMERGED + if(pXGI->MergedFB) { + pXGI->VBFlags |= (VB_DISPMODE_MIRROR | DISPTYPE_CRT1); + if(pXGI->VESA != -1) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "VESA option not used in MergedFB mode. VESA disabled.\n"); + } + pXGI->VESA = 0; + } else +#endif + pXGI->VBFlags |= (VB_DISPMODE_MIRROR | DISPTYPE_CRT1); + } else { /* CRT1 only ------------------------------- */ +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + XGIErrorLog(pScrn, + "No CRT2 output selected or no bridge detected. " + "Dual Head mode can't initialize.\n"); + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + pXGI->pInt = NULL; + xgiRestoreExtRegisterLock(pXGI,srlockReg,crlockReg); + XGIFreeRec(pScrn); + return FALSE; + } +#endif +#ifdef XGIMERGED + if(pXGI->MergedFB) { + if(pXGI->MergedFBAuto) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, mergednocrt2, mergeddisstr); + } else { + XGIErrorLog(pScrn, mergednocrt2, mergeddisstr); + } + if(pXGI->CRT2pScrn) xfree(pXGI->CRT2pScrn); + pXGI->CRT2pScrn = NULL; + pXGI->MergedFB = FALSE; + } +#endif + pXGI->VBFlags |= (VB_DISPMODE_SINGLE | DISPTYPE_CRT1); + } + + /* Init Ptrs for Save/Restore functions and calc MaxClock */ + XGIDACPreInit(pScrn); + + /* ********** end of VBFlags setup ********** */ + + /* VBFlags are initialized now. Back them up for SlaveMode modes. */ + pXGI->VBFlags_backup = pXGI->VBFlags; + + /* Find out about paneldelaycompensation and evaluate option */ +#ifdef XGIDUALHEAD + if((!pXGI->DualHeadMode) || (!pXGI->SecondHead)) { +#endif + + +#ifdef XGIDUALHEAD + } +#endif + +#ifdef XGIDUALHEAD + /* In dual head mode, both heads (currently) share the maxxfbmem equally. + * If memory sharing is done differently, the following has to be changed; + * the other modules (eg. accel and Xv) use dhmOffset for hardware + * pointer settings relative to VideoRAM start and won't need to be changed. + */ + if(pXGI->DualHeadMode) { + if(pXGI->SecondHead == FALSE) { + /* ===== First head (always CRT2) ===== */ + /* We use only half of the memory available */ + pXGI->maxxfbmem /= 2; + /* Initialize dhmOffset */ + pXGI->dhmOffset = 0; + /* Copy framebuffer addresses & sizes to entity */ + pXGIEnt->masterFbAddress = pXGI->FbAddress; + pXGIEnt->masterFbSize = pXGI->maxxfbmem; + pXGIEnt->slaveFbAddress = pXGI->FbAddress + pXGI->maxxfbmem; + pXGIEnt->slaveFbSize = pXGI->maxxfbmem; + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "%ldKB video RAM at 0x%lx available for master head (CRT2)\n", + pXGI->maxxfbmem/1024, pXGI->FbAddress); + } else { + /* ===== Second head (always CRT1) ===== */ + /* We use only half of the memory available */ + pXGI->maxxfbmem /= 2; + /* Adapt FBAddress */ + pXGI->FbAddress += pXGI->maxxfbmem; + /* Initialize dhmOffset */ + pXGI->dhmOffset = pXGI->availMem - pXGI->maxxfbmem; + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "%ldKB video RAM at 0x%lx available for slave head (CRT1)\n", + pXGI->maxxfbmem/1024, pXGI->FbAddress); + } + } else + pXGI->dhmOffset = 0; +#endif + + /* Note: Do not use availMem for anything from now. Use + * maxxfbmem instead. (availMem does not take dual head + * mode into account.) + */ + + pXGI->DRIheapstart = pXGI->maxxfbmem; + pXGI->DRIheapend = pXGI->availMem; +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + pXGI->DRIheapstart = pXGI->DRIheapend = 0; + } else +#endif + if(pXGI->DRIheapstart == pXGI->DRIheapend) { + + pXGI->DRIheapstart = pXGI->DRIheapend = 0; + } + + /* Now for something completely different: DDC. + * For 300 and 315/330 series, we provide our + * own functions (in order to probe CRT2 as well) + * If these fail, use the VBE. + * All other chipsets will use VBE. No need to re-invent + * the wheel there. + */ + + pXGI->pVbe = NULL; + didddc2 = FALSE; + +#ifdef XGIDUALHEAD + /* In dual head mode, probe DDC using VBE only for CRT1 (second head) */ + if((pXGI->DualHeadMode) && (!didddc2) && (!pXGI->SecondHead)) + didddc2 = TRUE; +#endif + + if(!didddc2) { + /* If CRT1 is off or LCDA, skip DDC via VBE */ + if((pXGI->CRT1off) || (pXGI->VBFlags & CRT1_LCDA)) + didddc2 = TRUE; + } + + /* Now (re-)load and initialize the DDC module */ + if(!didddc2) { + + if((pDDCModule = xf86LoadSubModule(pScrn, "ddc"))) { + + xf86LoaderModReqSymLists(pDDCModule, ddcSymbols, NULL); + + /* Now load and initialize VBE module. */ + if((pVBEModule = xf86LoadVBEModule(pScrn))) { + xf86LoaderModReqSymLists(pVBEModule, vbeSymbols, NULL); +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + pXGI->pVbe = VBEInit(pXGI->pInt,pXGI->pEnt->index); +#else + pXGI->pVbe = VBEExtendedInit(pXGI->pInt, pXGI->pEnt->index, + SET_BIOS_SCRATCH | RESTORE_BIOS_SCRATCH); +#endif + if(!pXGI->pVbe) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Could not initialize VBE module for DDC\n"); + } + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Could not load VBE module for DDC\n"); + } + + if(pXGI->pVbe) { + if((pMonitor = vbeDoEDID(pXGI->pVbe,pDDCModule))) { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "VBE CRT1 DDC monitor info:\n"); + xf86SetDDCproperties(pScrn, xf86PrintEDID(pMonitor)); + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "End of VBE CRT1 DDC monitor info:\n"); + pScrn->monitor->DDC = pMonitor; + } + } else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Could not retrieve DDC data\n"); + } + } + } + +#ifdef XGIMERGED + if(pXGI->MergedFB) { + pXGI->CRT2pScrn->monitor = xalloc(sizeof(MonRec)); + if(pXGI->CRT2pScrn->monitor) { + DisplayModePtr tempm = NULL, currentm = NULL, newm = NULL; + memcpy(pXGI->CRT2pScrn->monitor, pScrn->monitor, sizeof(MonRec)); + pXGI->CRT2pScrn->monitor->DDC = NULL; + pXGI->CRT2pScrn->monitor->Modes = NULL; + tempm = pScrn->monitor->Modes; + while(tempm) { + if(!(newm = xalloc(sizeof(DisplayModeRec)))) break; + memcpy(newm, tempm, sizeof(DisplayModeRec)); + if(!(newm->name = xalloc(strlen(tempm->name) + 1))) { + xfree(newm); + break; + } + strcpy(newm->name, tempm->name); + if(!pXGI->CRT2pScrn->monitor->Modes) pXGI->CRT2pScrn->monitor->Modes = newm; + if(currentm) { + currentm->next = newm; + newm->prev = currentm; + } + currentm = newm; + tempm = tempm->next; + } + if((pMonitor = XGIInternalDDC(pXGI->CRT2pScrn, 1))) { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, ddcsstr, 2); + xf86PrintEDID(pMonitor); + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, ddcestr, 2); + xf86SetDDCproperties(pXGI->CRT2pScrn, pMonitor); + pXGI->CRT2pScrn->monitor->DDC = pMonitor; + /* use DDC data if no ranges in config file */ + if(!pXGI->CRT2HSync) { + pXGI->CRT2pScrn->monitor->nHsync = 0; + } + if(!pXGI->CRT2VRefresh) { + pXGI->CRT2pScrn->monitor->nVrefresh = 0; + } + } else { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Failed to read DDC data for CRT2\n"); + } + } else { + XGIErrorLog(pScrn, "Failed to allocate memory for CRT2 monitor, %s.\n", + mergeddisstr); + if(pXGI->CRT2pScrn) xfree(pXGI->CRT2pScrn); + pXGI->CRT2pScrn = NULL; + pXGI->MergedFB = FALSE; + } + } +#endif + + /* If there is no HSync or VRefresh data for the monitor, + * derive it from DDC data. Done by common layer since + * 4.3.99.14. + */ +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,3,99,14,0) + if(pScrn->monitor->DDC) { + if(pScrn->monitor->nHsync <= 0) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, subshstr, +#ifdef XGIDUALHEAD + pXGI->DualHeadMode ? (pXGI->SecondHead ? 1 : 2) : +#endif + pXGI->CRT1off ? 2 : 1); + XGISetSyncRangeFromEdid(pScrn, 1); + } + if(pScrn->monitor->nVrefresh <= 0) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, subsvstr, +#ifdef XGIDUALHEAD + pXGI->DualHeadMode ? (pXGI->SecondHead ? 1 : 2) : +#endif + pXGI->CRT1off ? 2 : 1); + XGISetSyncRangeFromEdid(pScrn, 0); + } + } +#endif + +#ifdef XGIMERGED + if(pXGI->MergedFB) { +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,3,99,14,0) + if(pXGI->CRT2pScrn->monitor->DDC) { + if(pXGI->CRT2pScrn->monitor->nHsync <= 0) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, subshstr, 2); + XGISetSyncRangeFromEdid(pXGI->CRT2pScrn, 1); + } + if(pXGI->CRT2pScrn->monitor->nVrefresh <= 0) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, subsvstr, 2); + XGISetSyncRangeFromEdid(pXGI->CRT2pScrn, 0); + } + } +#endif + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, crtsetupstr, 1); + } +#endif + /* end of DDC */ + + /* From here, we mainly deal with clocks and modes */ + + /* Set the min pixel clock */ + pXGI->MinClock = 5000; + + xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Min pixel clock is %d MHz\n", + pXGI->MinClock / 1000); + + from = X_PROBED; + /* + * If the user has specified ramdac speed in the XF86Config + * file, we respect that setting. + */ + if(pXGI->pEnt->device->dacSpeeds[0]) { + int speed = 0; + switch(pScrn->bitsPerPixel) { + case 8: + speed = pXGI->pEnt->device->dacSpeeds[DAC_BPP8]; + break; + case 16: + speed = pXGI->pEnt->device->dacSpeeds[DAC_BPP16]; + break; + case 24: + speed = pXGI->pEnt->device->dacSpeeds[DAC_BPP24]; + break; + case 32: + speed = pXGI->pEnt->device->dacSpeeds[DAC_BPP32]; + break; + } + if(speed == 0) + pXGI->MaxClock = pXGI->pEnt->device->dacSpeeds[0]; + else + pXGI->MaxClock = speed; + from = X_CONFIG; + } + xf86DrvMsg(pScrn->scrnIndex, from, "Max pixel clock is %d MHz\n", + pXGI->MaxClock / 1000); + + /* + * Setup the ClockRanges, which describe what clock ranges are available, + * and what sort of modes they can be used for. + */ + clockRanges = xnfcalloc(sizeof(ClockRange), 1); + clockRanges->next = NULL; + clockRanges->minClock = pXGI->MinClock; + clockRanges->maxClock = pXGI->MaxClock; + clockRanges->clockIndex = -1; /* programmable */ + clockRanges->interlaceAllowed = TRUE; + clockRanges->doubleScanAllowed = TRUE; + + /* + * xf86ValidateModes will check that the mode HTotal and VTotal values + * don't exceed the chipset's limit if pScrn->maxHValue and + * pScrn->maxVValue are set. Since our XGIValidMode() already takes + * care of this, we don't worry about setting them here. + */ + + /* Select valid modes from those available */ + /* + * Assuming min pitch 256, min height 128 + */ + { + int minpitch, maxpitch, minheight, maxheight; + minpitch = 256; + minheight = 128; + switch(pXGI->VGAEngine) { + case XGI_OLD_VGA: + maxpitch = 2040; + maxheight = 2048; + break; + default: + maxpitch = 2048; + maxheight = 2048; + break; + } +#ifdef XGIMERGED + pXGI->CheckForCRT2 = FALSE; +#endif + i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, + pScrn->display->modes, clockRanges, NULL, + minpitch, maxpitch, + pScrn->bitsPerPixel * 8, + minheight, maxheight, + pScrn->display->virtualX, + pScrn->display->virtualY, + pXGI->maxxfbmem, + LOOKUP_BEST_REFRESH); + } + + if(i == -1) { + XGIErrorLog(pScrn, "xf86ValidateModes() error\n"); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + xgiRestoreExtRegisterLock(pXGI,srlockReg,crlockReg); + XGIFreeRec(pScrn); + return FALSE; + } + + /* Check the virtual screen against the available memory */ + { + unsigned long memreq = (pScrn->virtualX * ((pScrn->bitsPerPixel + 7) / 8)) * pScrn->virtualY; + + if(memreq > pXGI->maxxfbmem) { + XGIErrorLog(pScrn, + "Virtual screen too big for memory; %ldK needed, %ldK available\n", + memreq/1024, pXGI->maxxfbmem/1024); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + pXGI->pInt = NULL; + xgiRestoreExtRegisterLock(pXGI,srlockReg,crlockReg); + XGIFreeRec(pScrn); + return FALSE; + } + } + + /* Dual Head: + * -) Go through mode list and mark all those modes as bad, + * which are unsuitable for dual head mode. + * -) Find the highest used pixelclock on the master head. + */ +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + + if(!pXGI->SecondHead) { + + pXGIEnt->maxUsedClock = 0; + + if((p = first = pScrn->modes)) { + do { + n = p->next; + + /* Modes that require the bridge to operate in SlaveMode + * are not suitable for Dual Head mode. + */ + + /* Search for the highest clock on first head in order to calculate + * max clock for second head (CRT1) + */ + if((p->status == MODE_OK) && (p->Clock > pXGIEnt->maxUsedClock)) { + pXGIEnt->maxUsedClock = p->Clock; + } + + p = n; + + } while (p != NULL && p != first); + } + } + } +#endif + + /* Prune the modes marked as invalid */ + xf86PruneDriverModes(pScrn); + + if(i == 0 || pScrn->modes == NULL) { + XGIErrorLog(pScrn, "No valid modes found\n"); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + xgiRestoreExtRegisterLock(pXGI,srlockReg,crlockReg); + XGIFreeRec(pScrn); + return FALSE; + } + + xf86SetCrtcForModes(pScrn, INTERLACE_HALVE_V); + + /* Set the current mode to the first in the list */ + pScrn->currentMode = pScrn->modes; + + /* Copy to CurrentLayout */ + pXGI->CurrentLayout.mode = pScrn->currentMode; + pXGI->CurrentLayout.displayWidth = pScrn->displayWidth; + +#ifdef XGIMERGED + if(pXGI->MergedFB) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, modesforstr, 1); + } +#endif + + /* Print the list of modes being used */ + xf86PrintModes(pScrn); + +#ifdef XGIMERGED + if(pXGI->MergedFB) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, crtsetupstr, 2); + + clockRanges->next = NULL; + clockRanges->minClock = pXGI->MinClock; + clockRanges->clockIndex = -1; + clockRanges->interlaceAllowed = FALSE; + clockRanges->doubleScanAllowed = FALSE; + + xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Min pixel clock for CRT2 is %d MHz\n", + clockRanges->minClock / 1000); + xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, "Max pixel clock for CRT2 is %d MHz\n", + clockRanges->maxClock / 1000); + + pXGI->HaveCustomModes2 = FALSE; + } + + if(pXGI->MergedFB) { + + pXGI->CheckForCRT2 = TRUE; + i = xf86ValidateModes(pXGI->CRT2pScrn, pXGI->CRT2pScrn->monitor->Modes, + pXGI->CRT2pScrn->display->modes, clockRanges, + NULL, 256, 4088, + pXGI->CRT2pScrn->bitsPerPixel * 8, 128, 4096, + pScrn->display->virtualX ? pScrn->virtualX : 0, + pScrn->display->virtualY ? pScrn->virtualY : 0, + pXGI->maxxfbmem, + LOOKUP_BEST_REFRESH); + pXGI->CheckForCRT2 = FALSE; + + if(i == -1) { + XGIErrorLog(pScrn, "xf86ValidateModes() error, %s.\n", mergeddisstr); + XGIFreeCRT2Structs(pXGI); + pXGI->MergedFB = FALSE; + } + + } + + if(pXGI->MergedFB) { + + if((p = first = pXGI->CRT2pScrn->modes)) { + do { + n = p->next; + p = n; + } while (p != NULL && p != first); + } + + xf86PruneDriverModes(pXGI->CRT2pScrn); + + if(i == 0 || pXGI->CRT2pScrn->modes == NULL) { + XGIErrorLog(pScrn, "No valid modes found for CRT2; %s\n", mergeddisstr); + XGIFreeCRT2Structs(pXGI); + pXGI->MergedFB = FALSE; + } + + } + + if(pXGI->MergedFB) { + + xf86SetCrtcForModes(pXGI->CRT2pScrn, INTERLACE_HALVE_V); + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, modesforstr, 2); + + xf86PrintModes(pXGI->CRT2pScrn); + + pXGI->CRT1Modes = pScrn->modes; + pXGI->CRT1CurrentMode = pScrn->currentMode; + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Generating MergedFB mode list\n"); + + pScrn->modes = XGIGenerateModeList(pScrn, pXGI->MetaModes, + pXGI->CRT1Modes, pXGI->CRT2pScrn->modes, + pXGI->CRT2Position); + + if(!pScrn->modes) { + + XGIErrorLog(pScrn, "Failed to parse MetaModes or no modes found. %s.\n", + mergeddisstr); + XGIFreeCRT2Structs(pXGI); + pScrn->modes = pXGI->CRT1Modes; + pXGI->CRT1Modes = NULL; + pXGI->MergedFB = FALSE; + + } + + } + + if(pXGI->MergedFB) { + + /* If no virtual dimension was given by the user, + * calculate a sane one now. Adapts pScrn->virtualX, + * pScrn->virtualY and pScrn->displayWidth. + */ + XGIRecalcDefaultVirtualSize(pScrn); + + pScrn->modes = pScrn->modes->next; /* We get the last from GenerateModeList(), skip to first */ + pScrn->currentMode = pScrn->modes; + + /* Update CurrentLayout */ + pXGI->CurrentLayout.mode = pScrn->currentMode; + pXGI->CurrentLayout.displayWidth = pScrn->displayWidth; + + } +#endif + + /* Set display resolution */ +#ifdef XGIMERGED + if(pXGI->MergedFB) { + XGIMergedFBSetDpi(pScrn, pXGI->CRT2pScrn, pXGI->CRT2Position); + } else +#endif + xf86SetDpi(pScrn, 0, 0); + + /* Load fb module */ + switch(pScrn->bitsPerPixel) { + case 8: + case 16: + case 24: + case 32: + if(!(pMod = xf86LoadSubModule(pScrn, "fb"))) { + XGIErrorLog(pScrn, "Failed to load fb module"); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + xgiRestoreExtRegisterLock(pXGI,srlockReg,crlockReg); + XGIFreeRec(pScrn); + return FALSE; + } + break; + default: + XGIErrorLog(pScrn, "Unsupported framebuffer bpp (%d)\n", pScrn->bitsPerPixel); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + xgiRestoreExtRegisterLock(pXGI,srlockReg,crlockReg); + XGIFreeRec(pScrn); + return FALSE; + } + xf86LoaderModReqSymLists(pMod, fbSymbols, NULL); + + /* Load XAA if needed */ + if(!pXGI->NoAccel) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Accel enabled\n"); + if(!(pMod = xf86LoadSubModule(pScrn, "xaa"))) { + XGIErrorLog(pScrn, "Could not load xaa module\n"); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + xgiRestoreExtRegisterLock(pXGI,srlockReg,crlockReg); + XGIFreeRec(pScrn); + return FALSE; + } + xf86LoaderModReqSymLists(pMod, xaaSymbols, NULL); + } + + /* Load shadowfb if needed */ + if(pXGI->ShadowFB) { + if(!(pMod = xf86LoadSubModule(pScrn, "shadowfb"))) { + XGIErrorLog(pScrn, "Could not load shadowfb module\n"); +#ifdef XGIDUALHEAD + if(pXGIEnt) pXGIEnt->ErrorAfterFirst = TRUE; +#endif + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + xgiRestoreExtRegisterLock(pXGI,srlockReg,crlockReg); + XGIFreeRec(pScrn); + return FALSE; + } + xf86LoaderModReqSymLists(pMod, shadowSymbols, NULL); + } + + /* Load the dri module if requested. */ +#ifdef XF86DRI +/* if(pXGI->loadDRI) { */ + if((pMod = xf86LoadSubModule(pScrn, "dri"))) { + xf86LoaderModReqSymLists(pMod, driSymbols, drmSymbols, NULL); + } else { +#ifdef XGIDUALHEAD + if(!pXGI->DualHeadMode) +#endif + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Remove >Load \"dri\"< from the Module section of your XF86Config file\n"); + } +/* } */ +#endif + + /* Now load and initialize VBE module for VESA and mode restoring. */ + pXGI->UseVESA = 0; + if(pXGI->VESA == 1) { + if(!pXGI->pVbe) { + if(pVBEModule || (pVBEModule = xf86LoadVBEModule(pScrn))) { + xf86LoaderModReqSymLists(pVBEModule, vbeSymbols, NULL); +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + pXGI->pVbe = VBEInit(pXGI->pInt,pXGI->pEnt->index); +#else + pXGI->pVbe = VBEExtendedInit(pXGI->pInt, pXGI->pEnt->index, + SET_BIOS_SCRATCH | RESTORE_BIOS_SCRATCH); +#endif + } + } + if(pXGI->pVbe) { + vbe = VBEGetVBEInfo(pXGI->pVbe); + pXGI->vesamajor = (unsigned)(vbe->VESAVersion >> 8); + pXGI->vesaminor = vbe->VESAVersion & 0xff; + if(pXGI->VESA == 1) { + XGIBuildVesaModeList(pScrn, pXGI->pVbe, vbe); + pXGI->UseVESA = 1; + } + VBEFreeVBEInfo(vbe); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Could not load and initialize VBE module.%s\n", + (pXGI->VESA == 1) ? " VESA disabled." : ""); + } + } + + if(pXGI->pVbe) { + vbeFree(pXGI->pVbe); + pXGI->pVbe = NULL; + } + +#ifdef XGIDUALHEAD + xf86SetPrimInitDone(pScrn->entityList[0]); +#endif + + xgiRestoreExtRegisterLock(pXGI,srlockReg,crlockReg); + + if(pXGI->pInt) xf86FreeInt10(pXGI->pInt); + pXGI->pInt = NULL; + +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + pXGI->XGI_SD_Flags |= XGI_SD_ISDUALHEAD; + if(pXGI->SecondHead) pXGI->XGI_SD_Flags |= XGI_SD_ISDHSECONDHEAD; + else pXGI->XGI_SD_Flags &= ~(XGI_SD_SUPPORTXVGAMMA1); +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,5,99,22,0) +#ifdef PANORAMIX + if(!noPanoramiXExtension) { + pXGI->XGI_SD_Flags |= XGI_SD_ISDHXINERAMA; + pXGI->XGI_SD_Flags &= ~(XGI_SD_SUPPORTXVGAMMA1); + } +#endif +#else + if(IsXineramaActive()) { + pXGI->XGI_SD_Flags |= XGI_SD_ISDHXINERAMA; + pXGI->XGI_SD_Flags &= ~(XGI_SD_SUPPORTXVGAMMA1); + } +#endif + } +#endif + +#ifdef XGIMERGED + if(pXGI->MergedFB) pXGI->XGI_SD_Flags |= XGI_SD_ISMERGEDFB; +#endif + + if(pXGI->enablexgictrl) pXGI->XGI_SD_Flags |= XGI_SD_ENABLED; + + return TRUE; +} + + +/* + * Map the framebuffer and MMIO memory. + */ + +static Bool +XGIMapMem(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI; + int mmioFlags; + + pXGI = XGIPTR(pScrn); + + /* + * Map IO registers to virtual address space + */ +#if !defined(__alpha__) + mmioFlags = VIDMEM_MMIO; +#else + /* + * For Alpha, we need to map SPARSE memory, since we need + * byte/short access. + */ + mmioFlags = VIDMEM_MMIO | VIDMEM_SPARSE; +#endif + pXGI->IOBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags, + pXGI->PciTag, pXGI->IOAddress, 0x10000); + if (pXGI->IOBase == NULL) + return FALSE; + +#ifdef __alpha__ + /* + * for Alpha, we need to map DENSE memory as well, for + * setting CPUToScreenColorExpandBase. + */ + pXGI->IOBaseDense = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_MMIO, + pXGI->PciTag, pXGI->IOAddress, 0x10000); + + if (pXGI->IOBaseDense == NULL) + return FALSE; +#endif /* __alpha__ */ + + pXGI->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER, + pXGI->PciTag, + (unsigned long)pXGI->FbAddress, + pXGI->FbMapSize); + + PDEBUG(ErrorF("pXGI->FbBase = 0x%08lx\n",(ULONG)(pXGI->FbBase))) ; + + if (pXGI->FbBase == NULL) + return FALSE; + + return TRUE; +} + + +/* + * Unmap the framebuffer and MMIO memory. + */ + +static Bool +XGIUnmapMem(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI; +#ifdef XGIDUALHEAD + XGIEntPtr pXGIEnt = NULL; +#endif + + pXGI = XGIPTR(pScrn); + +#ifdef XGIDUALHEAD + pXGIEnt = pXGI->entityPrivate; +#endif + +/* In dual head mode, we must not unmap if the other head still + * assumes memory as mapped + */ +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + if(pXGIEnt->MapCountIOBase) { + pXGIEnt->MapCountIOBase--; + if((pXGIEnt->MapCountIOBase == 0) || (pXGIEnt->forceUnmapIOBase)) { + xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pXGIEnt->IOBase, (pXGI->mmioSize * 1024)); + pXGIEnt->IOBase = NULL; + pXGIEnt->MapCountIOBase = 0; + pXGIEnt->forceUnmapIOBase = FALSE; + } + pXGI->IOBase = NULL; + } +#ifdef __alpha__ + if(pXGIEnt->MapCountIOBaseDense) { + pXGIEnt->MapCountIOBaseDense--; + if((pXGIEnt->MapCountIOBaseDense == 0) || (pXGIEnt->forceUnmapIOBaseDense)) { + xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pXGIEnt->IOBaseDense, (pXGI->mmioSize * 1024)); + pXGIEnt->IOBaseDense = NULL; + pXGIEnt->MapCountIOBaseDense = 0; + pXGIEnt->forceUnmapIOBaseDense = FALSE; + } + pXGI->IOBaseDense = NULL; + } +#endif /* __alpha__ */ + if(pXGIEnt->MapCountFbBase) { + pXGIEnt->MapCountFbBase--; + if((pXGIEnt->MapCountFbBase == 0) || (pXGIEnt->forceUnmapFbBase)) { + xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pXGIEnt->FbBase, pXGI->FbMapSize); + pXGIEnt->FbBase = NULL; + pXGIEnt->MapCountFbBase = 0; + pXGIEnt->forceUnmapFbBase = FALSE; + + } + pXGI->FbBase = NULL; + } + } else { +#endif + xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pXGI->IOBase, (pXGI->mmioSize * 1024)); + pXGI->IOBase = NULL; +#ifdef __alpha__ + xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pXGI->IOBaseDense, (pXGI->mmioSize * 1024)); + pXGI->IOBaseDense = NULL; +#endif + xf86UnMapVidMem(pScrn->scrnIndex, (pointer)pXGI->FbBase, pXGI->FbMapSize); + pXGI->FbBase = NULL; +#ifdef XGIDUALHEAD + } +#endif + return TRUE; +} + +/* + * This function saves the video state. + */ +static void +XGISave(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI; + vgaRegPtr vgaReg; + XGIRegPtr xgiReg; + + pXGI = XGIPTR(pScrn); + +#ifdef XGIDUALHEAD + /* We always save master & slave */ + if(pXGI->DualHeadMode && pXGI->SecondHead) return; +#endif + + vgaReg = &VGAHWPTR(pScrn)->SavedReg; + xgiReg = &pXGI->SavedReg; + + vgaHWSave(pScrn, vgaReg, VGA_SR_ALL); + + xgiSaveUnlockExtRegisterLock(pXGI,&xgiReg->xgiRegs3C4[0x05],&xgiReg->xgiRegs3D4[0x80]); + + (*pXGI->XGISave)(pScrn, xgiReg); + + if(pXGI->UseVESA) XGIVESASaveRestore(pScrn, MODE_SAVE); + + /* "Save" these again as they may have been changed prior to XGISave() call */ +} + +static void +XGI_WriteAttr(XGIPtr pXGI, int index, int value) +{ + (void) inb(pXGI->IODBase + VGA_IOBASE_COLOR + VGA_IN_STAT_1_OFFSET); + index |= 0x20; + outb(pXGI->IODBase + VGA_ATTR_INDEX, index); + outb(pXGI->IODBase + VGA_ATTR_DATA_W, value); +} + +static int +XGI_ReadAttr(XGIPtr pXGI, int index) +{ + (void) inb(pXGI->IODBase + VGA_IOBASE_COLOR + VGA_IN_STAT_1_OFFSET); + index |= 0x20; + outb(pXGI->IODBase + VGA_ATTR_INDEX, index); + return(inb(pXGI->IODBase + VGA_ATTR_DATA_R)); +} + +#define XGI_FONTS_SIZE (8 * 8192) + +static void +XGI_SaveFonts(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + unsigned char miscOut, attr10, gr4, gr5, gr6, seq2, seq4, scrn; +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + CARD8 *vgaIOBase = (CARD8 *)VGAHWPTR(pScrn)->IOBase; +#else + pointer vgaIOBase = VGAHWPTR(pScrn)->Base; +#endif + + if(pXGI->fonts) return; + + /* If in graphics mode, don't save anything */ + attr10 = XGI_ReadAttr(pXGI, 0x10); + if(attr10 & 0x01) return; + + if(!(pXGI->fonts = xalloc(XGI_FONTS_SIZE * 2))) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Could not save console fonts, mem allocation failed\n"); + return; + } + + /* save the registers that are needed here */ + miscOut = inXGIREG(XGIMISCR); + inXGIIDXREG(XGIGR, 0x04, gr4); + inXGIIDXREG(XGIGR, 0x05, gr5); + inXGIIDXREG(XGIGR, 0x06, gr6); + inXGIIDXREG(XGISR, 0x02, seq2); + inXGIIDXREG(XGISR, 0x04, seq4); + + /* Force into color mode */ + outXGIREG(XGIMISCW, miscOut | 0x01); + + inXGIIDXREG(XGISR, 0x01, scrn); + outXGIIDXREG(XGISR, 0x00, 0x01); + outXGIIDXREG(XGISR, 0x01, scrn | 0x20); + outXGIIDXREG(XGISR, 0x00, 0x03); + + XGI_WriteAttr(pXGI, 0x10, 0x01); /* graphics mode */ + + /*font1 */ + outXGIIDXREG(XGISR, 0x02, 0x04); /* write to plane 2 */ + outXGIIDXREG(XGISR, 0x04, 0x06); /* enable plane graphics */ + outXGIIDXREG(XGIGR, 0x04, 0x02); /* read plane 2 */ + outXGIIDXREG(XGIGR, 0x05, 0x00); /* write mode 0, read mode 0 */ + outXGIIDXREG(XGIGR, 0x06, 0x05); /* set graphics */ + slowbcopy_frombus(vgaIOBase, pXGI->fonts, XGI_FONTS_SIZE); + + /* font2 */ + outXGIIDXREG(XGISR, 0x02, 0x08); /* write to plane 3 */ + outXGIIDXREG(XGISR, 0x04, 0x06); /* enable plane graphics */ + outXGIIDXREG(XGIGR, 0x04, 0x03); /* read plane 3 */ + outXGIIDXREG(XGIGR, 0x05, 0x00); /* write mode 0, read mode 0 */ + outXGIIDXREG(XGIGR, 0x06, 0x05); /* set graphics */ + slowbcopy_frombus(vgaIOBase, pXGI->fonts + XGI_FONTS_SIZE, XGI_FONTS_SIZE); + + inXGIIDXREG(XGISR, 0x01, scrn); + outXGIIDXREG(XGISR, 0x00, 0x01); + outXGIIDXREG(XGISR, 0x01, scrn & ~0x20); + outXGIIDXREG(XGISR, 0x00, 0x03); + + /* Restore clobbered registers */ + XGI_WriteAttr(pXGI, 0x10, attr10); + outXGIIDXREG(XGISR, 0x02, seq2); + outXGIIDXREG(XGISR, 0x04, seq4); + outXGIIDXREG(XGIGR, 0x04, gr4); + outXGIIDXREG(XGIGR, 0x05, gr5); + outXGIIDXREG(XGIGR, 0x06, gr6); + outXGIREG(XGIMISCW, miscOut); +} + +static void +XGI_RestoreFonts(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + unsigned char miscOut, attr10, gr1, gr3, gr4, gr5, gr6, gr8, seq2, seq4, scrn; +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + CARD8 *vgaIOBase = (CARD8 *)VGAHWPTR(pScrn)->IOBase; +#else + pointer vgaIOBase = VGAHWPTR(pScrn)->Base; +#endif + + if(!pXGI->fonts) return; + + /* save the registers that are needed here */ + miscOut = inXGIREG(XGIMISCR); + attr10 = XGI_ReadAttr(pXGI, 0x10); + inXGIIDXREG(XGIGR, 0x01, gr1); + inXGIIDXREG(XGIGR, 0x03, gr3); + inXGIIDXREG(XGIGR, 0x04, gr4); + inXGIIDXREG(XGIGR, 0x05, gr5); + inXGIIDXREG(XGIGR, 0x06, gr6); + inXGIIDXREG(XGIGR, 0x08, gr8); + inXGIIDXREG(XGISR, 0x02, seq2); + inXGIIDXREG(XGISR, 0x04, seq4); + + /* Force into color mode */ + outXGIREG(XGIMISCW, miscOut | 0x01); + inXGIIDXREG(XGISR, 0x01, scrn); + outXGIIDXREG(XGISR, 0x00, 0x01); + outXGIIDXREG(XGISR, 0x01, scrn | 0x20); + outXGIIDXREG(XGISR, 0x00, 0x03); + + XGI_WriteAttr(pXGI, 0x10, 0x01); /* graphics mode */ + if(pScrn->depth == 4) { + outXGIIDXREG(XGIGR, 0x03, 0x00); /* don't rotate, write unmodified */ + outXGIIDXREG(XGIGR, 0x08, 0xFF); /* write all bits in a byte */ + outXGIIDXREG(XGIGR, 0x01, 0x00); /* all planes come from CPU */ + } + + outXGIIDXREG(XGISR, 0x02, 0x04); /* write to plane 2 */ + outXGIIDXREG(XGISR, 0x04, 0x06); /* enable plane graphics */ + outXGIIDXREG(XGIGR, 0x04, 0x02); /* read plane 2 */ + outXGIIDXREG(XGIGR, 0x05, 0x00); /* write mode 0, read mode 0 */ + outXGIIDXREG(XGIGR, 0x06, 0x05); /* set graphics */ + slowbcopy_tobus(pXGI->fonts, vgaIOBase, XGI_FONTS_SIZE); + + outXGIIDXREG(XGISR, 0x02, 0x08); /* write to plane 3 */ + outXGIIDXREG(XGISR, 0x04, 0x06); /* enable plane graphics */ + outXGIIDXREG(XGIGR, 0x04, 0x03); /* read plane 3 */ + outXGIIDXREG(XGIGR, 0x05, 0x00); /* write mode 0, read mode 0 */ + outXGIIDXREG(XGIGR, 0x06, 0x05); /* set graphics */ + slowbcopy_tobus(pXGI->fonts + XGI_FONTS_SIZE, vgaIOBase, XGI_FONTS_SIZE); + + inXGIIDXREG(XGISR, 0x01, scrn); + outXGIIDXREG(XGISR, 0x00, 0x01); + outXGIIDXREG(XGISR, 0x01, scrn & ~0x20); + outXGIIDXREG(XGISR, 0x00, 0x03); + + /* restore the registers that were changed */ + outXGIREG(XGIMISCW, miscOut); + XGI_WriteAttr(pXGI, 0x10, attr10); + outXGIIDXREG(XGIGR, 0x01, gr1); + outXGIIDXREG(XGIGR, 0x03, gr3); + outXGIIDXREG(XGIGR, 0x04, gr4); + outXGIIDXREG(XGIGR, 0x05, gr5); + outXGIIDXREG(XGIGR, 0x06, gr6); + outXGIIDXREG(XGIGR, 0x08, gr8); + outXGIIDXREG(XGISR, 0x02, seq2); + outXGIIDXREG(XGISR, 0x04, seq4); +} + +#undef XGI_FONTS_SIZE + +/* VESASaveRestore taken from vesa driver */ +static void +XGIVESASaveRestore(ScrnInfoPtr pScrn, vbeSaveRestoreFunction function) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + /* Query amount of memory to save state */ + if((function == MODE_QUERY) || + (function == MODE_SAVE && pXGI->state == NULL)) { + + /* Make sure we save at least this information in case of failure */ + (void)VBEGetVBEMode(pXGI->pVbe, &pXGI->stateMode); + XGI_SaveFonts(pScrn); + + if(pXGI->vesamajor > 1) { + if(!VBESaveRestore(pXGI->pVbe, function, (pointer)&pXGI->state, + &pXGI->stateSize, &pXGI->statePage)) { + return; + } + } + } + + /* Save/Restore Super VGA state */ + if(function != MODE_QUERY) { + + if(pXGI->vesamajor > 1) { + if(function == MODE_RESTORE) { + memcpy(pXGI->state, pXGI->pstate, pXGI->stateSize); + } + + if(VBESaveRestore(pXGI->pVbe,function,(pointer)&pXGI->state, + &pXGI->stateSize,&pXGI->statePage) && + (function == MODE_SAVE)) { + /* don't rely on the memory not being touched */ + if(!pXGI->pstate) { + pXGI->pstate = xalloc(pXGI->stateSize); + } + memcpy(pXGI->pstate, pXGI->state, pXGI->stateSize); + } + } + + if(function == MODE_RESTORE) { + VBESetVBEMode(pXGI->pVbe, pXGI->stateMode, NULL); + XGI_RestoreFonts(pScrn); + } + + } +} + +/* + * Initialise a new mode. This is currently done using the + * "initialise struct, restore/write struct to HW" model for + * the old chipsets (5597/530/6326). For newer chipsets, + * we use our own mode switching code (or VESA). + */ + +static Bool +XGIModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode) +{ + vgaHWPtr hwp = VGAHWPTR(pScrn); + vgaRegPtr vgaReg; + XGIPtr pXGI = XGIPTR(pScrn); + XGIRegPtr xgiReg; +#ifdef XGIDUALHEAD + XGIEntPtr pXGIEnt = NULL; +#endif +PDEBUG(ErrorF("XGIModeInit(). \n")); + andXGIIDXREG(XGICR,0x11,0x7f); /* Unlock CRTC registers */ + + XGIModifyModeInfo(mode); /* Quick check of the mode parameters */ + + if(pXGI->UseVESA) { /* With VESA: */ + +#ifdef XGIDUALHEAD + /* No dual head mode when using VESA */ + if(pXGI->SecondHead) return TRUE; +#endif + +PDEBUG(ErrorF("XGIModeInit() VESA. \n")); + pScrn->vtSema = TRUE; + + /* + * This order is required: + * The video bridge needs to be adjusted before the + * BIOS is run as the BIOS sets up CRT2 according to + * these register settings. + * After the BIOS is run, the bridges and turboqueue + * registers need to be readjusted as the BIOS may + * very probably have messed them up. + */ + + if(!XGISetVESAMode(pScrn, mode)) { + XGIErrorLog(pScrn, "XGISetVESAMode() failed\n"); + return FALSE; + } + xgiSaveUnlockExtRegisterLock(pXGI,NULL,NULL); + +#ifdef TWDEBUG + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "REAL REGISTER CONTENTS AFTER SETMODE:\n"); +#endif + if(!(*pXGI->ModeInit)(pScrn, mode)) { + XGIErrorLog(pScrn, "ModeInit() failed\n"); + return FALSE; + } + + vgaHWProtect(pScrn, TRUE); + (*pXGI->XGIRestore)(pScrn, &pXGI->ModeReg); + vgaHWProtect(pScrn, FALSE); + + } else { /* Without VESA: */ + +PDEBUG(ErrorF("XGIModeInit(). none VESA\n")); +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + + if(!(*pXGI->ModeInit)(pScrn, mode)) { + XGIErrorLog(pScrn, "ModeInit() failed\n"); + return FALSE; + } + + pScrn->vtSema = TRUE; + + pXGIEnt = pXGI->entityPrivate; + + /* Head 2 (slave) is always CRT1 */ + XGIPreSetMode(pScrn, mode, XGI_MODE_CRT1); + if(!XGIBIOSSetModeCRT1(pXGI->XGI_Pr, &pXGI->xgi_HwDevExt, pScrn, mode, pXGI->IsCustom)) { + XGIErrorLog(pScrn, "XGIBIOSSetModeCRT1() failed\n"); + return FALSE; + } + XGIPostSetMode(pScrn, &pXGI->ModeReg); + XGIAdjustFrame(pXGIEnt->pScrn_1->scrnIndex, + pXGIEnt->pScrn_1->frameX0, + pXGIEnt->pScrn_1->frameY0, 0); + + } else { +#endif + /* For other chipsets, use the old method */ + + /* Initialise the ModeReg values */ + if(!vgaHWInit(pScrn, mode)) { + XGIErrorLog(pScrn, "vgaHWInit() failed\n"); + return FALSE; + } + + /* Reset our PIOOffset as vgaHWInit might have reset it */ + VGAHWPTR(pScrn)->PIOOffset = pXGI->IODBase + (pXGI->PciInfo->ioBase[2] & 0xFFFC) - 0x380; + + /* Prepare the register contents */ + if(!(*pXGI->ModeInit)(pScrn, mode)) { + XGIErrorLog(pScrn, "ModeInit() failed\n"); + return FALSE; + } + + pScrn->vtSema = TRUE; + + /* Program the registers */ + vgaHWProtect(pScrn, TRUE); + vgaReg = &hwp->ModeReg; + xgiReg = &pXGI->ModeReg; + + vgaReg->Attribute[0x10] = 0x01; + if(pScrn->bitsPerPixel > 8) { + vgaReg->Graphics[0x05] = 0x00; + } + + vgaHWRestore(pScrn, vgaReg, VGA_SR_MODE); + + (*pXGI->XGIRestore)(pScrn, xgiReg); + +#ifdef TWDEBUG + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "REAL REGISTER CONTENTS AFTER SETMODE:\n"); + (*pXGI->ModeInit)(pScrn, mode); +#endif + + vgaHWProtect(pScrn, FALSE); + +#ifdef XGIDUALHEAD + } +#endif + } + +if(pXGI->Chipset == PCI_CHIP_XGIXG40 || pXGI->Chipset == PCI_CHIP_XGIXG20) { + /* PDEBUG(XGIDumpRegs(pScrn)) ; */ + PDEBUG(ErrorF(" *** PreSetMode(). \n")); + XGIPreSetMode(pScrn, mode, XGI_MODE_SIMU); + /* PDEBUG(XGIDumpRegs(pScrn)) ; */ + PDEBUG(ErrorF(" *** Start SetMode() \n")); + + if(!XGIBIOSSetMode(pXGI->XGI_Pr, &pXGI->xgi_HwDevExt, pScrn, + mode, pXGI->IsCustom, TRUE)) { + XGIErrorLog(pScrn, "XGIBIOSSetModeCRT() failed\n"); + return FALSE; + } + Volari_EnableAccelerator(pScrn); + /* XGIPostSetMode(pScrn, &pXGI->ModeReg); */ + /* outXGIIDXREG(XGISR, 0x20, 0xA1) ; */ + /* outXGIIDXREG(XGISR, 0x1E, 0xDA) ; */ + /* PDEBUG(XGIDumpRegs(pScrn)) ; */ +} + + /* Update Currentlayout */ + pXGI->CurrentLayout.mode = mode; + + return TRUE; +} + +static Bool +XGISetVESAMode(ScrnInfoPtr pScrn, DisplayModePtr pMode) +{ + XGIPtr pXGI; + int mode; + + pXGI = XGIPTR(pScrn); + + if(!(mode = XGICalcVESAModeIndex(pScrn, pMode))) return FALSE; + + mode |= (1 << 15); /* Don't clear framebuffer */ + mode |= (1 << 14); /* Use linear adressing */ + + if(VBESetVBEMode(pXGI->pVbe, mode, NULL) == FALSE) { + XGIErrorLog(pScrn, "Setting VESA mode 0x%x failed\n", + mode & 0x0fff); + return (FALSE); + } + + if(pMode->HDisplay != pScrn->virtualX) { + VBESetLogicalScanline(pXGI->pVbe, pScrn->virtualX); + } + + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Setting VESA mode 0x%x succeeded\n", + mode & 0x0fff); + + return (TRUE); +} + +/* static void +XGISpecialRestore(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + XGIRegPtr xgiReg = &pXGI->SavedReg; + unsigned char temp; + int i; + + + + + + + + + + + + + + + + if(!(pXGI->ChipFlags & XGICF_Is65x)) return; + inXGIIDXREG(XGICR, 0x34, temp); + temp &= 0x7f; + if(temp > 0x13) return; + +#ifdef UNLOCK_ALWAYS + xgiSaveUnlockExtRegisterLock(pXGI, NULL,NULL); +#endif + + outXGIIDXREG(XGICAP, 0x3f, xgiReg->xgiCapt[0x3f]); + outXGIIDXREG(XGICAP, 0x00, xgiReg->xgiCapt[0x00]); + for(i = 0; i < 0x4f; i++) { + outXGIIDXREG(XGICAP, i, xgiReg->xgiCapt[i]); + } + outXGIIDXREG(XGIVID, 0x32, (xgiReg->xgiVid[0x32] & ~0x05)); + outXGIIDXREG(XGIVID, 0x30, xgiReg->xgiVid[0x30]); + outXGIIDXREG(XGIVID, 0x32, ((xgiReg->xgiVid[0x32] & ~0x04) | 0x01)); + outXGIIDXREG(XGIVID, 0x30, xgiReg->xgiVid[0x30]); + + if(!(pXGI->ChipFlags & XGICF_Is651)) return; + if(!(pXGI->VBFlags & VB_XGIBRIDGE)) return; + + inXGIIDXREG(XGICR, 0x30, temp); + if(temp & 0x40) { + unsigned char myregs[] = { + 0x2f, 0x08, 0x09, 0x03, 0x0a, 0x0c, + 0x0b, 0x0d, 0x0e, 0x12, 0x0f, 0x10, + 0x11, 0x04, 0x05, 0x06, 0x07, 0x00, + 0x2e + }; + for(i = 0; i <= 18; i++) { + outXGIIDXREG(XGIPART1, myregs[i], xgiReg->VBPart1[myregs[i]]); + } + } else if((temp & 0x20) || (temp & 0x9c)) { + unsigned char myregs[] = { + 0x04, 0x05, 0x06, 0x07, 0x00, 0x2e + }; + for(i = 0; i <= 5; i++) { + outXGIIDXREG(XGIPART1, myregs[i], xgiReg->VBPart1[myregs[i]]); + } + } +} */ + +/* + * Restore the initial mode. To be used internally only! + */ +static void +XGIRestore(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + XGIRegPtr xgiReg = &pXGI->SavedReg; + vgaHWPtr hwp = VGAHWPTR(pScrn); + vgaRegPtr vgaReg = &hwp->SavedReg; +/* Bool doit = FALSE, doitlater = FALSE; + Bool vesasuccess = FALSE; */ + + /* WARNING: Don't ever touch this. It now seems to work on + * all chipset/bridge combinations - but finding out the + * correct combination was pure hell. + */ + + /* Wait for the accelerators */ + if(pXGI->AccelInfoPtr) { + (*pXGI->AccelInfoPtr->Sync)(pScrn); + } + + vgaHWProtect(pScrn, TRUE); + +#ifdef UNLOCK_ALWAYS + xgiSaveUnlockExtRegisterLock(pXGI, NULL,NULL); +#endif + + (*pXGI->XGIRestore)(pScrn, xgiReg); + + vgaHWProtect(pScrn, TRUE); + if(pXGI->Primary) { + vgaHWRestore(pScrn, vgaReg, VGA_SR_ALL); + } + + /* Restore TV. This is rather complicated, but if we don't do it, + * TV output will flicker terribly + */ + + + xgiRestoreExtRegisterLock(pXGI,xgiReg->xgiRegs3C4[5],xgiReg->xgiRegs3D4[0x80]); + + vgaHWProtect(pScrn, FALSE); +} + +static void +XGIVESARestore(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + if(pXGI->UseVESA) { + XGIVESASaveRestore(pScrn, MODE_RESTORE); +#ifdef XGIVRAMQ + /* Restore queue mode registers on 315/330 series */ + /* (This became necessary due to the switch to VRAM queue) */ +#endif + } +} + +/* Restore bridge config registers - to be called BEFORE VESARestore */ +static void +XGIBridgeRestore(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + +#ifdef XGIDUALHEAD + /* We only restore for master head */ + if(pXGI->DualHeadMode && pXGI->SecondHead) return; +#endif + +} + +/* Our generic BlockHandler for Xv */ +static void +XGIBlockHandler(int i, pointer blockData, pointer pTimeout, pointer pReadmask) +{ + ScreenPtr pScreen = screenInfo.screens[i]; + ScrnInfoPtr pScrn = xf86Screens[i]; + XGIPtr pXGI = XGIPTR(pScrn); + + pScreen->BlockHandler = pXGI->BlockHandler; + (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask); + pScreen->BlockHandler = XGIBlockHandler; + + if(pXGI->VideoTimerCallback) { + (*pXGI->VideoTimerCallback)(pScrn, currentTime.milliseconds); + } + + if(pXGI->RenderCallback) { + (*pXGI->RenderCallback)(pScrn); + } +} + +/* Mandatory + * This gets called at the start of each server generation + * + * We use pScrn and not CurrentLayout here, because the + * properties we use have not changed (displayWidth, + * depth, bitsPerPixel) + */ +static Bool +XGIScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) +{ + ScrnInfoPtr pScrn; + vgaHWPtr hwp; + XGIPtr pXGI; + int ret; + VisualPtr visual; + unsigned long OnScreenSize; + int height, width, displayWidth; + unsigned char *FBStart; + ModuleDescPtr pVBEModule; +#ifdef XGIDUALHEAD + XGIEntPtr pXGIEnt = NULL; +#endif +PDEBUG(ErrorF("XGIScreenInit(). \n")); + pScrn = xf86Screens[pScreen->myNum]; + + hwp = VGAHWPTR(pScrn); + + pXGI = XGIPTR(pScrn); + +#ifdef XGIDUALHEAD + if((!pXGI->DualHeadMode) || (!pXGI->SecondHead)) { +#endif + if((pVBEModule = xf86LoadVBEModule(pScrn))) { + xf86LoaderModReqSymLists(pVBEModule, vbeSymbols, NULL); +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + pXGI->pVbe = VBEInit(NULL, pXGI->pEnt->index); +#else + pXGI->pVbe = VBEExtendedInit(NULL, pXGI->pEnt->index, + SET_BIOS_SCRATCH | RESTORE_BIOS_SCRATCH); +#endif + } else { + XGIErrorLog(pScrn, "Failed to load VBE submodule\n"); + } +#ifdef XGIDUALHEAD + } +#endif + +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + pXGIEnt = pXGI->entityPrivate; + pXGIEnt->refCount++; + } +#endif + + /* Map the VGA memory and get the VGA IO base */ + if(pXGI->Primary) { + hwp->MapSize = 0x10000; /* Standard 64k VGA window */ + if(!vgaHWMapMem(pScrn)) { + XGIErrorLog(pScrn, "Could not map VGA memory window\n"); + return FALSE; + } + } + vgaHWGetIOBase(hwp); + + /* Patch the PIOOffset inside vgaHW to use + * our relocated IO ports. + */ + VGAHWPTR(pScrn)->PIOOffset = pXGI->IODBase + (pXGI->PciInfo->ioBase[2] & 0xFFFC) - 0x380; + + /* Map the XGI memory and MMIO areas */ + if(!XGIMapMem(pScrn)) { + XGIErrorLog(pScrn, "XGIMapMem() failed\n"); + return FALSE; + } + +#ifdef UNLOCK_ALWAYS + xgiSaveUnlockExtRegisterLock(pXGI, NULL, NULL); +#endif + + /* Enable TurboQueue so that XGISave() saves it in enabled + * state. If we don't do this, X will hang after a restart! + * (Happens for some unknown reason only when using VESA + * for mode switching; assumingly a BIOS issue.) + * This is done on 300 and 315 series only. + */ + if(pXGI->UseVESA) { +#ifdef XGIVRAMQ + if(pXGI->VGAEngine != XGI_315_VGA) +#endif + XGIEnableTurboQueue(pScrn); + + } + + /* Save the current state */ + XGISave(pScrn); + + XGI_InitHwDevInfo(pScrn); + + PDEBUG(ErrorF("--- ScreenInit --- \n")) ; + PDEBUG(XGIDumpRegs(pScrn)) ; + + /* Initialise the first mode */ + if(!XGIModeInit(pScrn, pScrn->currentMode)) { + XGIErrorLog(pScrn, "XGIModeInit() failed\n"); + return FALSE; + } + + PDEBUG(ErrorF("--- XGIModeInit --- \n")) ; + PDEBUG(XGIDumpRegs(pScrn)) ; + + /* Darken the screen for aesthetic reasons */ + /* Not using Dual Head variant on purpose; we darken + * the screen for both displays, and un-darken + * it when the second head is finished + */ + XGISaveScreen(pScreen, SCREEN_SAVER_ON); + + /* Set the viewport */ + XGIAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); + + /* + * The next step is to setup the screen's visuals, and initialise the + * framebuffer code. In cases where the framebuffer's default + * choices for things like visual layouts and bits per RGB are OK, + * this may be as simple as calling the framebuffer's ScreenInit() + * function. If not, the visuals will need to be setup before calling + * a fb ScreenInit() function and fixed up after. + * + * For most PC hardware at depths >= 8, the defaults that fb uses + * are not appropriate. In this driver, we fixup the visuals after. + */ + + /* + * Reset visual list. + */ + miClearVisualTypes(); + + /* Setup the visuals we support. */ + + /* + * For bpp > 8, the default visuals are not acceptable because we only + * support TrueColor and not DirectColor. + */ + if(!miSetVisualTypes(pScrn->depth, + (pScrn->bitsPerPixel > 8) ? + TrueColorMask : miGetDefaultVisualMask(pScrn->depth), + pScrn->rgbBits, pScrn->defaultVisual)) { + XGISaveScreen(pScreen, SCREEN_SAVER_OFF); + XGIErrorLog(pScrn, "miSetVisualTypes() failed (bpp %d)\n", + pScrn->bitsPerPixel); + return FALSE; + } + + width = pScrn->virtualX; + height = pScrn->virtualY; + displayWidth = pScrn->displayWidth; + + if(pXGI->Rotate) { + height = pScrn->virtualX; + width = pScrn->virtualY; + } + + if(pXGI->ShadowFB) { + pXGI->ShadowPitch = BitmapBytePad(pScrn->bitsPerPixel * width); + pXGI->ShadowPtr = xalloc(pXGI->ShadowPitch * height); + displayWidth = pXGI->ShadowPitch / (pScrn->bitsPerPixel >> 3); + FBStart = pXGI->ShadowPtr; + } else { + pXGI->ShadowPtr = NULL; + FBStart = pXGI->FbBase; + } + + if(!miSetPixmapDepths()) { + XGISaveScreen(pScreen, SCREEN_SAVER_OFF); + XGIErrorLog(pScrn, "miSetPixmapDepths() failed\n"); + return FALSE; + } + + /* Point cmdQueuePtr to pXGIEnt for shared usage + * (same technique is then eventually used in DRIScreeninit) + * For 315/330 series, this is done in EnableTurboQueue + * which has already been called during ModeInit(). + */ +#ifdef XGIDUALHEAD + if(pXGI->SecondHead) + pXGI->cmdQueueLenPtr = &(XGIPTR(pXGIEnt->pScrn_1)->cmdQueueLen); + else +#endif + pXGI->cmdQueueLenPtr = &(pXGI->cmdQueueLen); + + pXGI->cmdQueueLen = 0; /* Force an EngineIdle() at start */ + +#ifdef XF86DRI +/* if(pXGI->loadDRI) { */ +#ifdef XGIDUALHEAD + /* No DRI in dual head mode */ + if(pXGI->DualHeadMode) { + pXGI->directRenderingEnabled = FALSE; + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "DRI not supported in Dual Head mode\n"); + } else +#endif + /* Force the initialization of the context */ +/* if(pXGI->VGAEngine != XGI_315_VGA) { */ + if( (XGI_FbDevExist) && (pXGI->Chipset != PCI_CHIP_XGIXG20) ) { + pXGI->directRenderingEnabled = XGIDRIScreenInit(pScreen); + PDEBUG(ErrorF("--- DRI supported \n")); + } else { + PDEBUG(ErrorF("--- DRI not supported \n")); + xf86DrvMsg(pScrn->scrnIndex, X_NOT_IMPLEMENTED, + "DRI not supported on this chipset\n"); + pXGI->directRenderingEnabled = FALSE; + } +/* } */ +#endif + + /* + * Call the framebuffer layer's ScreenInit function, and fill in other + * pScreen fields. + */ + switch(pScrn->bitsPerPixel) { + case 24: + case 8: + case 16: + case 32: + ret = fbScreenInit(pScreen, FBStart, width, + height, pScrn->xDpi, pScrn->yDpi, + displayWidth, pScrn->bitsPerPixel); + break; + default: + ret = FALSE; + break; + } + if(!ret) { + XGIErrorLog(pScrn, "Unsupported bpp (%d) or fbScreenInit() failed\n", + pScrn->bitsPerPixel); + XGISaveScreen(pScreen, SCREEN_SAVER_OFF); + return FALSE; + } + + if(pScrn->bitsPerPixel > 8) { + /* Fixup RGB ordering */ + visual = pScreen->visuals + pScreen->numVisuals; + while (--visual >= pScreen->visuals) { + if((visual->class | DynamicClass) == DirectColor) { + visual->offsetRed = pScrn->offset.red; + visual->offsetGreen = pScrn->offset.green; + visual->offsetBlue = pScrn->offset.blue; + visual->redMask = pScrn->mask.red; + visual->greenMask = pScrn->mask.green; + visual->blueMask = pScrn->mask.blue; + } + } + } + + /* Initialize RENDER ext; must be after RGB ordering fixed */ + fbPictureInit(pScreen, 0, 0); + + /* hardware cursor needs to wrap this layer <-- TW: what does that mean? */ + if(!pXGI->ShadowFB) XGIDGAInit(pScreen); + + xf86SetBlackWhitePixels(pScreen); + + if(!pXGI->NoAccel) { + switch(pXGI->VGAEngine) { + case XGI_XGX_VGA: +/* Volari_EnableAccelerator(pScrn); */ + PDEBUG(ErrorF("---Volari Accel.. \n")); + default: + Volari_AccelInit(pScreen); + break; + } + } + + PDEBUG(ErrorF("--- AccelInit --- \n")) ; + PDEBUG(XGIDumpRegs(pScrn)) ; + + miInitializeBackingStore(pScreen); + xf86SetBackingStore(pScreen); + xf86SetSilkenMouse(pScreen); + + /* Initialise cursor functions */ + miDCInitialize(pScreen, xf86GetPointerScreenFuncs()); + + if(pXGI->HWCursor) { + XGIHWCursorInit(pScreen); + } + + /* Initialise default colourmap */ + if(!miCreateDefColormap(pScreen)) { + XGISaveScreen(pScreen, SCREEN_SAVER_OFF); + XGIErrorLog(pScrn, "miCreateDefColormap() failed\n"); + return FALSE; + } + + if(!xf86HandleColormaps(pScreen, 256, (pScrn->depth == 8) ? 8 : pScrn->rgbBits, + XGILoadPalette, NULL, + CMAP_PALETTED_TRUECOLOR | CMAP_RELOAD_ON_MODE_SWITCH)) { +PDEBUG(ErrorF("XGILoadPalette() check-return. \n")); + XGISaveScreen(pScreen, SCREEN_SAVER_OFF); + XGIErrorLog(pScrn, "xf86HandleColormaps() failed\n"); + return FALSE; + } + +/* + if (!xf86HandleColormaps(pScreen, 256, 8, XGILoadPalette, NULL, + CMAP_RELOAD_ON_MODE_SWITCH)) + { + return FALSE; + } +*/ + xf86DPMSInit(pScreen, (DPMSSetProcPtr)XGIDisplayPowerManagementSet, 0); + + /* Init memPhysBase and fbOffset in pScrn */ + pScrn->memPhysBase = pXGI->FbAddress; + pScrn->fbOffset = 0; + + pXGI->ResetXv = pXGI->ResetXvGamma = NULL; + + if(!pXGI->NoXvideo) { + if(pXGI->VGAEngine == XGI_XGX_VGA) { + XGIInitVideo(pScreen); + } + } + +#ifdef XF86DRI +/* if(pXGI->loadDRI) { */ + if(pXGI->directRenderingEnabled) { + /* Now that mi, drm and others have done their thing, + * complete the DRI setup. + */ + pXGI->directRenderingEnabled = XGIDRIFinishScreenInit(pScreen); + } + if(pXGI->directRenderingEnabled) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering enabled\n"); + /* TODO */ + /* XGISetLFBConfig(pXGI); */ + } else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering disabled\n"); + } +/* } */ +#endif + + /* Wrap some funcs and setup remaining SD flags */ + + pXGI->XGI_SD_Flags &= ~(XGI_SD_PSEUDOXINERAMA); + + pXGI->CloseScreen = pScreen->CloseScreen; + pScreen->CloseScreen = XGICloseScreen; +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) + pScreen->SaveScreen = XGISaveScreenDH; + else +#endif + pScreen->SaveScreen = XGISaveScreen; + + /* Install BlockHandler */ + pXGI->BlockHandler = pScreen->BlockHandler; + pScreen->BlockHandler = XGIBlockHandler; + + /* Report any unused options (only for the first generation) */ + if(serverGeneration == 1) { + xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); + } + + /* Clear frame buffer */ + /* For CRT2, we don't do that at this point in dual head + * mode since the mode isn't switched at this time (it will + * be reset when setting the CRT1 mode). Hence, we just + * save the necessary data and clear the screen when + * going through this for CRT1. + */ + + OnScreenSize = pScrn->displayWidth * pScrn->currentMode->VDisplay + * (pScrn->bitsPerPixel >> 3); + + /* Turn on the screen now */ + /* We do this in dual head mode after second head is finished */ +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + if(pXGI->SecondHead) { + bzero(pXGI->FbBase, OnScreenSize); + bzero(pXGIEnt->FbBase1, pXGIEnt->OnScreenSize1); + XGISaveScreen(pScreen, SCREEN_SAVER_OFF); + } else { + pXGIEnt->FbBase1 = pXGI->FbBase; + pXGIEnt->OnScreenSize1 = OnScreenSize; + } + } else { +#endif + XGISaveScreen(pScreen, SCREEN_SAVER_OFF); + bzero(pXGI->FbBase, OnScreenSize); +#ifdef XGIDUALHEAD + } +#endif + + pXGI->XGI_SD_Flags &= ~XGI_SD_ISDEPTH8; + if(pXGI->CurrentLayout.bitsPerPixel == 8) { + pXGI->XGI_SD_Flags |= XGI_SD_ISDEPTH8; + pXGI->XGI_SD_Flags &= ~XGI_SD_SUPPORTXVGAMMA1; + } +PDEBUG(ErrorF("XGIScreenInit() End. \n")); + return TRUE; +} + +/* Usually mandatory */ +Bool +XGISwitchMode(int scrnIndex, DisplayModePtr mode, int flags) +{ + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + XGIPtr pXGI = XGIPTR(pScrn); + + if(!pXGI->NoAccel) { + if(pXGI->AccelInfoPtr) { + (*pXGI->AccelInfoPtr->Sync)(pScrn); +PDEBUG(ErrorF("XGISwitchMode Accel Enabled. \n")); + } + } +PDEBUG(ErrorF("XGISwitchMode (%d, %d) \n", mode->HDisplay, mode->VDisplay)); + + if(!(XGIModeInit(xf86Screens[scrnIndex], mode))) return FALSE; + + /* Since RandR (indirectly) uses SwitchMode(), we need to + * update our Xinerama info here, too, in case of resizing + */ + return TRUE; +} + +Bool +XGISwitchCRT1Status(ScrnInfoPtr pScrn, int onoff) +{ + XGIPtr pXGI = XGIPTR(pScrn); + DisplayModePtr mode = pScrn->currentMode; + unsigned long vbflags = pXGI->VBFlags; + int crt1off; + + /* onoff: 0=OFF, 1=ON(VGA), 2=ON(LCDA) */ + /* Switching to LCDA will disable CRT2 if previously LCD */ + + /* Do NOT use this to switch from CRT1_LCDA to CRT2_LCD */ + + return FALSE; + + /* Off only if at least one CRT2 device is active */ + if((!onoff) && (!(vbflags & CRT2_ENABLE))) return FALSE; + +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) return FALSE; +#endif + + /* Can't switch to LCDA of not supported (duh!) */ + if(!(pXGI->XGI_SD_Flags & XGI_SD_SUPPORTLCDA)) { + if(onoff == 2) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "LCD-via-CRT1 not supported on this hardware\n"); + return FALSE; + } + } + +#ifdef XGIMERGED + if(pXGI->MergedFB) { + if(!onoff) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "CRT1 can't be switched off in MergedFB mode\n"); + return FALSE; + } else if(onoff == 2) { + if(vbflags & CRT2_LCD) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "CRT2 type can't be LCD while CRT1 is LCD-via-CRT1\n"); + return FALSE; + } + } + if(mode->Private) { + mode = ((XGIMergedDisplayModePtr)mode->Private)->CRT1; + } + } +#endif + + vbflags &= ~(DISPTYPE_CRT1 | SINGLE_MODE | MIRROR_MODE | CRT1_LCDA); + crt1off = 1; + if(onoff > 0) { + vbflags |= DISPTYPE_CRT1; + crt1off = 0; + if(onoff == 2) { + vbflags |= CRT1_LCDA; + vbflags &= ~CRT2_LCD; + } + /* Remember: Dualhead not supported */ + if(vbflags & CRT2_ENABLE) vbflags |= MIRROR_MODE; + else vbflags |= SINGLE_MODE; + } else { + vbflags |= SINGLE_MODE; + } + + if(vbflags & CRT1_LCDA) { + if(!XGI_CalcModeIndex(pScrn, mode, vbflags, pXGI->HaveCustomModes)) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Current mode not suitable for LCD-via-CRT1\n"); + return FALSE; + } + } + + pXGI->CRT1off = crt1off; + pXGI->VBFlags = pXGI->VBFlags_backup = vbflags; + + /* Sync the accelerators */ + if(!pXGI->NoAccel) { + if(pXGI->AccelInfoPtr) { + (*pXGI->AccelInfoPtr->Sync)(pScrn); + } + } + + if(!(pScrn->SwitchMode(pScrn->scrnIndex, pScrn->currentMode, 0))) return FALSE; + XGIAdjustFrame(pScrn->scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); + return TRUE; +} + +/* static void +XGISetStartAddressCRT1(XGIPtr pXGI, unsigned long base) +{ + unsigned char cr11backup; + + inXGIIDXREG(XGICR, 0x11, cr11backup); + andXGIIDXREG(XGICR, 0x11, 0x7F); + outXGIIDXREG(XGICR, 0x0D, base & 0xFF); + outXGIIDXREG(XGICR, 0x0C, (base >> 8) & 0xFF); + outXGIIDXREG(XGISR, 0x0D, (base >> 16) & 0xFF); + + + setXGIIDXREG(XGICR, 0x11, 0x7F,(cr11backup & 0x80)); +} */ + +#ifdef XGIMERGED +/* static Bool +InRegion(int x, int y, region r) +{ + return (r.x0 <= x) && (x <= r.x1) && (r.y0 <= y) && (y <= r.y1); +} */ + +/* static void +XGIAdjustFrameHW_CRT1(ScrnInfoPtr pScrn, int x, int y) +{ + XGIPtr pXGI = XGIPTR(pScrn); + unsigned long base; + + base = y * pXGI->CurrentLayout.displayWidth + x; + switch(pXGI->CurrentLayout.bitsPerPixel) { + case 16: base >>= 1; break; + case 32: break; + default: base >>= 2; + } + XGISetStartAddressCRT1(pXGI, base); +} */ + +/* static void +XGIMergePointerMoved(int scrnIndex, int x, int y) +{ + ScrnInfoPtr pScrn1 = xf86Screens[scrnIndex]; + XGIPtr pXGI = XGIPTR(pScrn1); + ScrnInfoPtr pScrn2 = pXGI->CRT2pScrn; + region out, in1, in2, f2, f1; + int deltax, deltay; + + f1.x0 = pXGI->CRT1frameX0; + f1.x1 = pXGI->CRT1frameX1; + f1.y0 = pXGI->CRT1frameY0; + f1.y1 = pXGI->CRT1frameY1; + f2.x0 = pScrn2->frameX0; + f2.x1 = pScrn2->frameX1; + f2.y0 = pScrn2->frameY0; + f2.y1 = pScrn2->frameY1; + + out.x0 = pScrn1->frameX0; + out.x1 = pScrn1->frameX1; + out.y0 = pScrn1->frameY0; + out.y1 = pScrn1->frameY1; + + in1 = out; + in2 = out; + switch(((XGIMergedDisplayModePtr)pXGI->CurrentLayout.mode->Private)->CRT2Position) { + case xgiLeftOf: + in1.x0 = f1.x0; + in2.x1 = f2.x1; + break; + case xgiRightOf: + in1.x1 = f1.x1; + in2.x0 = f2.x0; + break; + case xgiBelow: + in1.y1 = f1.y1; + in2.y0 = f2.y0; + break; + case xgiAbove: + in1.y0 = f1.y0; + in2.y1 = f2.y1; + break; + case xgiClone: + break; + } + + deltay = 0; + deltax = 0; + + if(InRegion(x, y, out)) { + + if(InRegion(x, y, in1) && !InRegion(x, y, f1)) { + REBOUND(f1.x0, f1.x1, x); + REBOUND(f1.y0, f1.y1, y); + deltax = 1; + } + if(InRegion(x, y, in2) && !InRegion(x, y, f2)) { + REBOUND(f2.x0, f2.x1, x); + REBOUND(f2.y0, f2.y1, y); + deltax = 1; + } + + } else { + + if(out.x0 > x) { + deltax = x - out.x0; + } + if(out.x1 < x) { + deltax = x - out.x1; + } + if(deltax) { + pScrn1->frameX0 += deltax; + pScrn1->frameX1 += deltax; + f1.x0 += deltax; + f1.x1 += deltax; + f2.x0 += deltax; + f2.x1 += deltax; + } + + if(out.y0 > y) { + deltay = y - out.y0; + } + if(out.y1 < y) { + deltay = y - out.y1; + } + if(deltay) { + pScrn1->frameY0 += deltay; + pScrn1->frameY1 += deltay; + f1.y0 += deltay; + f1.y1 += deltay; + f2.y0 += deltay; + f2.y1 += deltay; + } + + switch(((XGIMergedDisplayModePtr)pXGI->CurrentLayout.mode->Private)->CRT2Position) { + case xgiLeftOf: + if(x >= f1.x0) { REBOUND(f1.y0, f1.y1, y); } + if(x <= f2.x1) { REBOUND(f2.y0, f2.y1, y); } + break; + case xgiRightOf: + if(x <= f1.x1) { REBOUND(f1.y0, f1.y1, y); } + if(x >= f2.x0) { REBOUND(f2.y0, f2.y1, y); } + break; + case xgiBelow: + if(y <= f1.y1) { REBOUND(f1.x0, f1.x1, x); } + if(y >= f2.y0) { REBOUND(f2.x0, f2.x1, x); } + break; + case xgiAbove: + if(y >= f1.y0) { REBOUND(f1.x0, f1.x1, x); } + if(y <= f2.y1) { REBOUND(f2.x0, f2.x1, x); } + break; + case xgiClone: + break; + } + + } + + if(deltax || deltay) { + pXGI->CRT1frameX0 = f1.x0; + pXGI->CRT1frameY0 = f1.y0; + pScrn2->frameX0 = f2.x0; + pScrn2->frameY0 = f2.y0; + + pXGI->CRT1frameX1 = pXGI->CRT1frameX0 + CDMPTR->CRT1->HDisplay - 1; + pXGI->CRT1frameY1 = pXGI->CRT1frameY0 + CDMPTR->CRT1->VDisplay - 1; + pScrn2->frameX1 = pScrn2->frameX0 + CDMPTR->CRT2->HDisplay - 1; + pScrn2->frameY1 = pScrn2->frameY0 + CDMPTR->CRT2->VDisplay - 1; + pScrn1->frameX1 = pScrn1->frameX0 + pXGI->CurrentLayout.mode->HDisplay - 1; + pScrn1->frameY1 = pScrn1->frameY0 + pXGI->CurrentLayout.mode->VDisplay - 1; + + XGIAdjustFrameHW_CRT1(pScrn1, pXGI->CRT1frameX0, pXGI->CRT1frameY0); + } +} */ + + +/* static void +XGIAdjustFrameMerged(int scrnIndex, int x, int y, int flags) +{ + ScrnInfoPtr pScrn1 = xf86Screens[scrnIndex]; + XGIPtr pXGI = XGIPTR(pScrn1); + ScrnInfoPtr pScrn2 = pXGI->CRT2pScrn; + int VTotal = pXGI->CurrentLayout.mode->VDisplay; + int HTotal = pXGI->CurrentLayout.mode->HDisplay; + int VMax = VTotal; + int HMax = HTotal; + + BOUND(x, 0, pScrn1->virtualX - HTotal); + BOUND(y, 0, pScrn1->virtualY - VTotal); + + switch(SDMPTR(pScrn1)->CRT2Position) { + case xgiLeftOf: + pScrn2->frameX0 = x; + BOUND(pScrn2->frameY0, y, y + VMax - CDMPTR->CRT2->VDisplay); + pXGI->CRT1frameX0 = x + CDMPTR->CRT2->HDisplay; + BOUND(pXGI->CRT1frameY0, y, y + VMax - CDMPTR->CRT1->VDisplay); + break; + case xgiRightOf: + pXGI->CRT1frameX0 = x; + BOUND(pXGI->CRT1frameY0, y, y + VMax - CDMPTR->CRT1->VDisplay); + pScrn2->frameX0 = x + CDMPTR->CRT1->HDisplay; + BOUND(pScrn2->frameY0, y, y + VMax - CDMPTR->CRT2->VDisplay); + break; + case xgiAbove: + BOUND(pScrn2->frameX0, x, x + HMax - CDMPTR->CRT2->HDisplay); + pScrn2->frameY0 = y; + BOUND(pXGI->CRT1frameX0, x, x + HMax - CDMPTR->CRT1->HDisplay); + pXGI->CRT1frameY0 = y + CDMPTR->CRT2->VDisplay; + break; + case xgiBelow: + BOUND(pXGI->CRT1frameX0, x, x + HMax - CDMPTR->CRT1->HDisplay); + pXGI->CRT1frameY0 = y; + BOUND(pScrn2->frameX0, x, x + HMax - CDMPTR->CRT2->HDisplay); + pScrn2->frameY0 = y + CDMPTR->CRT1->VDisplay; + break; + case xgiClone: + BOUND(pXGI->CRT1frameX0, x, x + HMax - CDMPTR->CRT1->HDisplay); + BOUND(pXGI->CRT1frameY0, y, y + VMax - CDMPTR->CRT1->VDisplay); + BOUND(pScrn2->frameX0, x, x + HMax - CDMPTR->CRT2->HDisplay); + BOUND(pScrn2->frameY0, y, y + VMax - CDMPTR->CRT2->VDisplay); + break; + } + + BOUND(pXGI->CRT1frameX0, 0, pScrn1->virtualX - CDMPTR->CRT1->HDisplay); + BOUND(pXGI->CRT1frameY0, 0, pScrn1->virtualY - CDMPTR->CRT1->VDisplay); + BOUND(pScrn2->frameX0, 0, pScrn1->virtualX - CDMPTR->CRT2->HDisplay); + BOUND(pScrn2->frameY0, 0, pScrn1->virtualY - CDMPTR->CRT2->VDisplay); + + pScrn1->frameX0 = x; + pScrn1->frameY0 = y; + + pXGI->CRT1frameX1 = pXGI->CRT1frameX0 + CDMPTR->CRT1->HDisplay - 1; + pXGI->CRT1frameY1 = pXGI->CRT1frameY0 + CDMPTR->CRT1->VDisplay - 1; + pScrn2->frameX1 = pScrn2->frameX0 + CDMPTR->CRT2->HDisplay - 1; + pScrn2->frameY1 = pScrn2->frameY0 + CDMPTR->CRT2->VDisplay - 1; + pScrn1->frameX1 = pScrn1->frameX0 + pXGI->CurrentLayout.mode->HDisplay - 1; + pScrn1->frameY1 = pScrn1->frameY0 + pXGI->CurrentLayout.mode->VDisplay - 1; + + XGIAdjustFrameHW_CRT1(pScrn1, pXGI->CRT1frameX0, pXGI->CRT1frameY0); +} */ +#endif + +/* + * This function is used to initialize the Start Address - the first + * displayed location in the video memory. + * + * Usually mandatory + */ +void +XGIAdjustFrame(int scrnIndex, int x, int y, int flags) +{ + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + XGIPtr pXGI = XGIPTR(pScrn) ; + unsigned long base ; + unsigned char ucSR5Stat, ucTemp ; + + inXGIIDXREG(XGISR, 0x05, ucSR5Stat ) ; + if( ucSR5Stat == 0xA1 ) ucSR5Stat = 0x86 ; + outXGIIDXREG(XGISR, 0x05, 0x86) ; + + base = (pScrn->bitsPerPixel + 7 )/8 ; + base *= x ; + base += pXGI->scrnOffset * y ; + base >>= 2 ; + + switch( pXGI->Chipset ) + { + case PCI_CHIP_XGIXG40: + default: + + ucTemp = base & 0xFF ; outXGIIDXREG( XGICR, 0x0D, ucTemp ) ; + ucTemp = (base>>8) & 0xFF ; outXGIIDXREG( XGICR, 0x0C, ucTemp ) ; + ucTemp = (base>>16) & 0xFF ; outXGIIDXREG( XGISR, 0x0D, ucTemp ) ; + ucTemp = (base>>24) & 0x01 ; setXGIIDXREG( XGISR, 0x37, 0xFE, ucTemp ) ; + +/* if (pXGI->VBFlags) { + XGI_UnLockCRT2(&(pXGI->xgi_HwDevExt),pXGI->pVBInfo); + ucTemp = base & 0xFF ; outXGIIDXREG( XGIPART1, 6 , ucTemp ) ; + ucTemp = (base>>8) & 0xFF ; outXGIIDXREG( XGIPART1, 5 , ucTemp ) ; + ucTemp = (base>>16) & 0xFF ; outXGIIDXREG( XGIPART1, 4 , ucTemp ) ; + ucTemp = (base>>24) & 0x01 ; ucTemp <<= 7 ; + setXGIIDXREG( XGIPART1, 0x2, 0x7F, ucTemp ) ; + + XGI_LockCRT2(&(pXGI->xgi_HwDevExt),pXGI->pVBInfo); + } */ + break ; + + } + + outXGIIDXREG(XGISR, 0x05, ucSR5Stat ) ; + +} + +/* + * This is called when VT switching back to the X server. Its job is + * to reinitialise the video mode. + * Mandatory! + */ +static Bool +XGIEnterVT(int scrnIndex, int flags) +{ + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + XGIPtr pXGI = XGIPTR(pScrn); + + xgiSaveUnlockExtRegisterLock(pXGI, NULL, NULL); + + if(!XGIModeInit(pScrn, pScrn->currentMode)) { + XGIErrorLog(pScrn, "XGIEnterVT: XGIModeInit() failed\n"); + return FALSE; + } + + XGIAdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); + +#ifdef XF86DRI +/* ScreenPtr pScreen; */ + if(pXGI->directRenderingEnabled) { + DRIUnlock(screenInfo.screens[scrnIndex]); + } +#endif + +#ifdef XGIDUALHEAD + if((!pXGI->DualHeadMode) || (!pXGI->SecondHead)) +#endif + if(pXGI->ResetXv) { + (pXGI->ResetXv)(pScrn); + } + + return TRUE; +} + +/* + * This is called when VT switching away from the X server. Its job is + * to restore the previous (text) mode. + * Mandatory! + */ +static void +XGILeaveVT(int scrnIndex, int flags) +{ + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + vgaHWPtr hwp = VGAHWPTR(pScrn); + XGIPtr pXGI = XGIPTR(pScrn); +#ifdef XF86DRI + ScreenPtr pScreen; + + if(pXGI->directRenderingEnabled) { + pScreen = screenInfo.screens[scrnIndex]; + DRILock(pScreen, 0); + } +#endif + +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode && pXGI->SecondHead) return; +#endif + + if(pXGI->CursorInfoPtr) { +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + if(!pXGI->SecondHead) { + pXGI->ForceCursorOff = TRUE; + pXGI->CursorInfoPtr->HideCursor(pScrn); + XGIWaitVBRetrace(pScrn); + pXGI->ForceCursorOff = FALSE; + } + } else { +#endif + pXGI->CursorInfoPtr->HideCursor(pScrn); + XGIWaitVBRetrace(pScrn); +#ifdef XGIDUALHEAD + } +#endif + } + + XGIBridgeRestore(pScrn); + + if(pXGI->UseVESA) { + + /* This is a q&d work-around for a BIOS bug. In case we disabled CRT2, + * VBESaveRestore() does not restore CRT1. So we set any mode now, + * because VBESetVBEMode correctly restores CRT1. Afterwards, we + * can call VBESaveRestore to restore original mode. + */ + if((pXGI->VBFlags & VB_VIDEOBRIDGE) && (!(pXGI->VBFlags & DISPTYPE_DISP2))) + VBESetVBEMode(pXGI->pVbe, (pXGI->XGIVESAModeList->n) | 0xc000, NULL); + + XGIVESARestore(pScrn); + + } else { + + XGIRestore(pScrn); + + } + + /* We use (otherwise unused) bit 7 to indicate that we are running + * to keep xgifb to change the displaymode (this would result in + * lethal display corruption upon quitting X or changing to a VT + * until a reboot) + */ + + vgaHWLock(hwp); +} + + +/* + * This is called at the end of each server generation. It restores the + * original (text) mode. It should really also unmap the video memory too. + * Mandatory! + */ +static Bool +XGICloseScreen(int scrnIndex, ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + vgaHWPtr hwp = VGAHWPTR(pScrn); + XGIPtr pXGI = XGIPTR(pScrn); +#ifdef XGIDUALHEAD + XGIEntPtr pXGIEnt = pXGI->entityPrivate; +#endif + +#ifdef XF86DRI + if(pXGI->directRenderingEnabled) { + XGIDRICloseScreen(pScreen); + pXGI->directRenderingEnabled = FALSE; + } +#endif + + if(pScrn->vtSema) { + + if(pXGI->CursorInfoPtr) { +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + if(!pXGI->SecondHead) { + pXGI->ForceCursorOff = TRUE; + pXGI->CursorInfoPtr->HideCursor(pScrn); + XGIWaitVBRetrace(pScrn); + pXGI->ForceCursorOff = FALSE; + } + } else { +#endif + pXGI->CursorInfoPtr->HideCursor(pScrn); + XGIWaitVBRetrace(pScrn); +#ifdef XGIDUALHEAD + } +#endif + } + + XGIBridgeRestore(pScrn); + + if(pXGI->UseVESA) { + + /* This is a q&d work-around for a BIOS bug. In case we disabled CRT2, + * VBESaveRestore() does not restore CRT1. So we set any mode now, + * because VBESetVBEMode correctly restores CRT1. Afterwards, we + * can call VBESaveRestore to restore original mode. + */ + if((pXGI->VBFlags & VB_VIDEOBRIDGE) && (!(pXGI->VBFlags & DISPTYPE_DISP2))) + VBESetVBEMode(pXGI->pVbe, (pXGI->XGIVESAModeList->n) | 0xc000, NULL); + + XGIVESARestore(pScrn); + + } else { + + XGIRestore(pScrn); + + } + + vgaHWLock(hwp); + + } + + /* We should restore the mode number in case vtsema = false as well, + * but since we haven't register access then we can't do it. I think + * I need to rework the save/restore stuff, like saving the video + * status when returning to the X server and by that save me the + * trouble if xgifb was started from a textmode VT while X was on. + */ + + XGIUnmapMem(pScrn); + vgaHWUnmapMem(pScrn); + +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + pXGIEnt = pXGI->entityPrivate; + pXGIEnt->refCount--; + } +#endif + + if(pXGI->pInt) { + xf86FreeInt10(pXGI->pInt); + pXGI->pInt = NULL; + } + + if(pXGI->AccelLinearScratch) { + xf86FreeOffscreenLinear(pXGI->AccelLinearScratch); + pXGI->AccelLinearScratch = NULL; + } + + if(pXGI->AccelInfoPtr) { + XAADestroyInfoRec(pXGI->AccelInfoPtr); + pXGI->AccelInfoPtr = NULL; + } + + if(pXGI->CursorInfoPtr) { + xf86DestroyCursorInfoRec(pXGI->CursorInfoPtr); + pXGI->CursorInfoPtr = NULL; + } + + if(pXGI->ShadowPtr) { + xfree(pXGI->ShadowPtr); + pXGI->ShadowPtr = NULL; + } + + if(pXGI->DGAModes) { + xfree(pXGI->DGAModes); + pXGI->DGAModes = NULL; + } + + if(pXGI->adaptor) { + xfree(pXGI->adaptor); + pXGI->adaptor = NULL; + pXGI->ResetXv = pXGI->ResetXvGamma = NULL; + } + + pScrn->vtSema = FALSE; + + /* Restore Blockhandler */ + pScreen->BlockHandler = pXGI->BlockHandler; + + pScreen->CloseScreen = pXGI->CloseScreen; + + return(*pScreen->CloseScreen)(scrnIndex, pScreen); +} + + +/* Free up any per-generation data structures */ + +/* Optional */ +static void +XGIFreeScreen(int scrnIndex, int flags) +{ + if(xf86LoaderCheckSymbol("vgaHWFreeHWRec")) { + vgaHWFreeHWRec(xf86Screens[scrnIndex]); + } + + XGIFreeRec(xf86Screens[scrnIndex]); +} + + +/* Checks if a mode is suitable for the selected chipset. */ + +static ModeStatus +XGIValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags) +{ + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + XGIPtr pXGI = XGIPTR(pScrn); + int HDisplay = mode->HDisplay ; + int VDisplay = mode->VDisplay ; + int Clock = mode->Clock; + int i = 0; +PDEBUG(ErrorF(" XGIValidMode(). HD: %d, VD:%d, Clock: %d \n", HDisplay, VDisplay, Clock)); + if( (pXGI->VBFlags & CRT2_LCD)||(pXGI->VBFlags & CRT2_TV)) + { + if( HDisplay > 1024 && VDisplay > 768 ) return(MODE_NOMODE) ; + if( HDisplay < 640 && VDisplay < 480 ) return(MODE_NOMODE) ; + } + else if( pXGI->VBFlags & CRT2_VGA ) + { + if( HDisplay > 1280 && VDisplay > 1280 ) return(MODE_NOMODE) ; + if( HDisplay < 640 && VDisplay < 480 ) return(MODE_NOMODE) ; + + if( HDisplay == 1280 && VDisplay == 1280 && mode->VRefresh > 75 ) + { + return(MODE_NOMODE) ; + } + + } + if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) + { + XgiMode = XG20_Mode ; + PDEBUG(ErrorF(" ---XG20_Mode \n")); + } + else + { + XgiMode = XGI_Mode ; + PDEBUG(ErrorF(" ---XGI_Mode \n")); + } + while ( (XgiMode[i].Clock != Clock) || (XgiMode[i].HDisplay != HDisplay) || (XgiMode[i].VDisplay != VDisplay) ) + { + if (XgiMode[i].Clock == 0) { + PDEBUG(ErrorF("--- NO_Mode support \n")); + return(MODE_NOMODE) ; + } + else + i++; + } + + return(MODE_OK); +} + +/* Do screen blanking + * + * Mandatory + */ +static Bool +XGISaveScreen(ScreenPtr pScreen, int mode) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + + if((pScrn != NULL) && pScrn->vtSema) { + + XGIPtr pXGI = XGIPTR(pScrn); + +#ifdef UNLOCK_ALWAYS + xgiSaveUnlockExtRegisterLock(pXGI, NULL, NULL); +#endif + } + + return vgaHWSaveScreen(pScreen, mode); +} + +#ifdef XGIDUALHEAD +/* SaveScreen for dual head mode */ +static Bool +XGISaveScreenDH(ScreenPtr pScreen, int mode) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + Bool checkit = FALSE; + + if((pScrn != NULL) && pScrn->vtSema) { + + XGIPtr pXGI = XGIPTR(pScrn); + + if((pXGI->SecondHead) && ((!(pXGI->VBFlags & CRT1_LCDA)) || (pXGI->VBFlags & VB_301C))) { + + /* Slave head is always CRT1 */ + if(pXGI->VBFlags & CRT1_LCDA) pXGI->Blank = xf86IsUnblank(mode) ? FALSE : TRUE; + + return vgaHWSaveScreen(pScreen, mode); + + } else { + + /* Master head is always CRT2 */ + /* But we land here if CRT1 is LCDA, too */ + + /* We can only blank LCD, not other CRT2 devices */ + if(!(pXGI->VBFlags & (CRT2_LCD|CRT1_LCDA))) return TRUE; + + /* enable access to extended sequencer registers */ +#ifdef UNLOCK_ALWAYS + xgiSaveUnlockExtRegisterLock(pXGI, NULL, NULL); +#endif + if(checkit) { + if(!pXGI->SecondHead) pXGI->BlankCRT2 = xf86IsUnblank(mode) ? FALSE : TRUE; + else if(pXGI->VBFlags & CRT1_LCDA) pXGI->Blank = xf86IsUnblank(mode) ? FALSE : TRUE; + } + + } + } + return TRUE; +} +#endif + +#ifdef DEBUG +static void +XGIDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode) +{ + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Clock : %x\n", mode->Clock); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Display : %x\n", mode->CrtcHDisplay); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Blank Start : %x\n", mode->CrtcHBlankStart); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Sync Start : %x\n", mode->CrtcHSyncStart); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Sync End : %x\n", mode->CrtcHSyncEnd); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Blank End : %x\n", mode->CrtcHBlankEnd); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Total : %x\n", mode->CrtcHTotal); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz Skew : %x\n", mode->CrtcHSkew); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Hz HAdjusted : %x\n", mode->CrtcHAdjusted); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Display : %x\n", mode->CrtcVDisplay); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Blank Start : %x\n", mode->CrtcVBlankStart); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Sync Start : %x\n", mode->CrtcVSyncStart); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Sync End : %x\n", mode->CrtcVSyncEnd); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Blank End : %x\n", mode->CrtcVBlankEnd); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt Total : %x\n", mode->CrtcVTotal); + xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Vt VAdjusted : %x\n", mode->CrtcVAdjusted); +} +#endif + +static void +XGIModifyModeInfo(DisplayModePtr mode) +{ + if(mode->CrtcHBlankStart == mode->CrtcHDisplay) + mode->CrtcHBlankStart++; + if(mode->CrtcHBlankEnd == mode->CrtcHTotal) + mode->CrtcHBlankEnd--; + if(mode->CrtcVBlankStart == mode->CrtcVDisplay) + mode->CrtcVBlankStart++; + if(mode->CrtcVBlankEnd == mode->CrtcVTotal) + mode->CrtcVBlankEnd--; +} + +/* Enable the Turboqueue/Commandqueue (For 300 and 315/330 series only) */ +void +XGIEnableTurboQueue(ScrnInfoPtr pScrn) +{ +/* XGIPtr pXGI = XGIPTR(pScrn); + unsigned short SR26, SR27; + unsigned long temp; */ +} + +/* Things to do before a ModeSwitch. We set up the + * video bridge configuration and the TurboQueue. + */ +void XGIPreSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int viewmode) +{ + XGIPtr pXGI = XGIPTR(pScrn); + unsigned char CR30, CR31, CR32, CR33; + unsigned char CR3B = 0; + unsigned char CR17, CR38 = 0; + unsigned char CR35 = 0, CR79 = 0; + unsigned long vbflag; + int temp = 0, i; + int crt1rateindex = 0; + DisplayModePtr mymode; +#ifdef XGIMERGED + DisplayModePtr mymode2 = NULL; +#endif + +#ifdef XGIMERGED + if(pXGI->MergedFB) { + mymode = ((XGIMergedDisplayModePtr)mode->Private)->CRT1; + mymode2 = ((XGIMergedDisplayModePtr)mode->Private)->CRT2; + } else +#endif + mymode = mode; + + vbflag = pXGI->VBFlags; + pXGI->IsCustom = FALSE; +#ifdef XGIMERGED + pXGI->IsCustomCRT2 = FALSE; + + if(pXGI->MergedFB) { + /* CRT2 */ + if(vbflag & CRT2_LCD) { + if(pXGI->XGI_Pr->CP_HaveCustomData) { + for(i=0; i<7; i++) { + if(pXGI->XGI_Pr->CP_DataValid[i]) { + if((mymode2->HDisplay == pXGI->XGI_Pr->CP_HDisplay[i]) && + (mymode2->VDisplay == pXGI->XGI_Pr->CP_VDisplay[i])) { + if(mymode2->type & M_T_BUILTIN) { + pXGI->IsCustomCRT2 = TRUE; + } + } + } + } + } + } + if(vbflag & (CRT2_VGA|CRT2_LCD)) { + if(pXGI->AddedPlasmaModes) { + if(mymode2->type & M_T_BUILTIN) { + pXGI->IsCustomCRT2 = TRUE; + } + } + if(pXGI->HaveCustomModes2) { + if(!(mymode2->type & M_T_DEFAULT)) { + pXGI->IsCustomCRT2 = TRUE; + } + } + } + /* CRT1 */ + if(pXGI->HaveCustomModes) { + if(!(mymode->type & M_T_DEFAULT)) { + pXGI->IsCustom = TRUE; + } + } + } else +#endif +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + if(!pXGI->SecondHead) { + /* CRT2 */ + if(vbflag & CRT2_LCD) { + if(pXGI->XGI_Pr->CP_HaveCustomData) { + for(i=0; i<7; i++) { + if(pXGI->XGI_Pr->CP_DataValid[i]) { + if((mymode->HDisplay == pXGI->XGI_Pr->CP_HDisplay[i]) && + (mymode->VDisplay == pXGI->XGI_Pr->CP_VDisplay[i])) { + if(mymode->type & M_T_BUILTIN) { + pXGI->IsCustom = TRUE; + } + } + } + } + } + } + if(vbflag & (CRT2_VGA|CRT2_LCD)) { + if(pXGI->AddedPlasmaModes) { + if(mymode->type & M_T_BUILTIN) { + pXGI->IsCustom = TRUE; + } + } + if(pXGI->HaveCustomModes) { + if(!(mymode->type & M_T_DEFAULT)) { + pXGI->IsCustom = TRUE; + } + } + } + } else { + /* CRT1 */ + if(pXGI->HaveCustomModes) { + if(!(mymode->type & M_T_DEFAULT)) { + pXGI->IsCustom = TRUE; + } + } + } + } else +#endif + { + if(vbflag & CRT2_LCD) { + if(pXGI->XGI_Pr->CP_HaveCustomData) { + for(i=0; i<7; i++) { + if(pXGI->XGI_Pr->CP_DataValid[i]) { + if((mymode->HDisplay == pXGI->XGI_Pr->CP_HDisplay[i]) && + (mymode->VDisplay == pXGI->XGI_Pr->CP_VDisplay[i])) { + if(mymode->type & M_T_BUILTIN) { + pXGI->IsCustom = TRUE; + } + } + } + } + } + } + if(vbflag & (CRT2_LCD|CRT2_VGA)) { + if(pXGI->AddedPlasmaModes) { + if(mymode->type & M_T_BUILTIN) { + pXGI->IsCustom = TRUE; + } + } + } + if((pXGI->HaveCustomModes) && (!(vbflag & CRT2_TV))) { + if(!(mymode->type & M_T_DEFAULT)) { + pXGI->IsCustom = TRUE; + } + } + } + +#ifdef UNLOCK_ALWAYS + xgiSaveUnlockExtRegisterLock(pXGI, NULL, NULL); /* Unlock Registers */ +#endif + + inXGIIDXREG(XGICR, 0x30, CR30); + inXGIIDXREG(XGICR, 0x31, CR31); + CR32 = pXGI->newCR32; + inXGIIDXREG(XGICR, 0x33, CR33); + + inXGIIDXREG(XGICR, 0x3b, CR3B); + xf86DrvMsgVerb(pScrn->scrnIndex, X_PROBED, 4, + "Before: CR30=0x%02x, CR31=0x%02x, CR32=0x%02x, CR33=0x%02x, CR%02x=0x%02x\n", + CR30, CR31, CR32, CR33, temp, CR38); + + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4, "VBFlags=0x%lx\n", pXGI->VBFlags); + + CR30 = 0x00; + CR31 &= ~0x60; /* Clear VB_Drivermode & VB_OutputDisable */ + CR31 |= 0x04; /* Set VB_NotSimuMode (not for 30xB/1400x1050?) */ + CR35 = 0x00; + + + if(!pXGI->AllowHotkey) { + CR31 |= 0x80; /* Disable hotkey-switch */ + } + CR79 &= ~0x10; /* Enable Backlight control on 315 series */ + + XGI_SetEnableDstn(pXGI->XGI_Pr, FALSE); + XGI_SetEnableFstn(pXGI->XGI_Pr, FALSE); + + if((vbflag & CRT1_LCDA) && (viewmode == XGI_MODE_CRT1)) { + + CR38 |= 0x02; + + } else { + + switch(vbflag & (CRT2_TV|CRT2_LCD|CRT2_VGA)) { + + case CRT2_TV: + + CR38 &= ~0xC0; /* Clear Pal M/N bits */ + + if((vbflag & VB_CHRONTEL) && (vbflag & TV_CHSCART)) { /* Chrontel */ + CR30 |= 0x10; + CR38 |= 0x04; + CR38 &= ~0x08; + CR31 |= 0x01; + } else if((vbflag & VB_CHRONTEL) && (vbflag & TV_CHYPBPR525I)) { /* Chrontel */ + CR38 |= 0x08; + CR38 &= ~0x04; + CR31 &= ~0x01; + } else if(vbflag & TV_HIVISION) { /* Video bridge */ + CR30 |= 0x80; + CR31 |= 0x01; + CR35 |= 0x01; + } else if(vbflag & TV_YPBPR) { /* Video bridge */ + if(pXGI->XGI_SD_Flags & XGI_SD_SUPPORTYPBPR) { + CR30 |= 0x80; + CR38 |= 0x08; + if(vbflag & TV_YPBPR525P) CR38 |= 0x10; + else if(vbflag & TV_YPBPR750P) CR38 |= 0x20; + else if(vbflag & TV_YPBPR1080I) CR38 |= 0x30; + CR31 &= ~0x01; + if(pXGI->XGI_SD_Flags & XGI_SD_SUPPORTYPBPRAR) { + CR3B &= ~0x03; + if((vbflag & TV_YPBPRAR) == TV_YPBPR43LB) CR3B |= 0x00; + else if((vbflag & TV_YPBPRAR) == TV_YPBPR43) CR3B |= 0x03; + else if((vbflag & TV_YPBPRAR) == TV_YPBPR169) CR3B |= 0x01; + else CR3B |= 0x03; + } + } + } else { /* All */ + if(vbflag & TV_SCART) CR30 |= 0x10; + if(vbflag & TV_SVIDEO) CR30 |= 0x08; + if(vbflag & TV_AVIDEO) CR30 |= 0x04; + if(!(CR30 & 0x1C)) CR30 |= 0x08; /* default: SVIDEO */ + + if(vbflag & TV_PAL) { + CR31 |= 0x01; + CR35 |= 0x01; + if( (vbflag & VB_XGIBRIDGE) || + ((vbflag & VB_CHRONTEL) && (pXGI->ChrontelType == CHRONTEL_701x)) ) { + if(vbflag & TV_PALM) { + CR38 |= 0x40; + CR35 |= 0x04; + } else if(vbflag & TV_PALN) { + CR38 |= 0x80; + CR35 |= 0x08; + } + } + } else { + CR31 &= ~0x01; + CR35 &= ~0x01; + if(vbflag & TV_NTSCJ) { + CR38 |= 0x40; /* TW, not BIOS */ + CR35 |= 0x02; + } + } + if(vbflag & TV_SCART) { + CR31 |= 0x01; + CR35 |= 0x01; + } + } + + CR31 &= ~0x04; /* Clear NotSimuMode */ + pXGI->XGI_Pr->XGI_CHOverScan = pXGI->UseCHOverScan; + if((pXGI->OptTVSOver == 1) && (pXGI->ChrontelType == CHRONTEL_700x)) { + pXGI->XGI_Pr->XGI_CHSOverScan = TRUE; + } else { + pXGI->XGI_Pr->XGI_CHSOverScan = FALSE; + } +#ifdef XGI_CP + XGI_CP_DRIVER_CONFIG +#endif + break; + + case CRT2_LCD: + CR30 |= 0x20; + XGI_SetEnableDstn(pXGI->XGI_Pr, pXGI->DSTN); + XGI_SetEnableFstn(pXGI->XGI_Pr, pXGI->FSTN); + break; + + case CRT2_VGA: + CR30 |= 0x40; + break; + + default: + CR30 |= 0x00; + CR31 |= 0x20; /* VB_OUTPUT_DISABLE */ + if(pXGI->UseVESA) { + crt1rateindex = XGISearchCRT1Rate(pScrn, mymode); + } + } + + } + + if(vbflag & CRT1_LCDA) { + switch(viewmode) { + case XGI_MODE_CRT1: + CR38 |= 0x01; + break; + case XGI_MODE_CRT2: + if(vbflag & (CRT2_TV|CRT2_VGA)) { + CR30 |= 0x02; + CR38 |= 0x01; + } else { + CR38 |= 0x03; + } + break; + case XGI_MODE_SIMU: + default: + if(vbflag & (CRT2_TV|CRT2_LCD|CRT2_VGA)) { + CR30 |= 0x01; + } + break; + } + } else { + if(vbflag & (CRT2_TV|CRT2_LCD|CRT2_VGA)) { + CR30 |= 0x01; + } + } + + /* for VESA: no DRIVERMODE, otherwise + * -) CRT2 will not be initialized correctly when using mode + * where LCD has to scale, and + * -) CRT1 will have too low rate + */ + if(pXGI->UseVESA) { + CR31 &= ~0x40; /* Clear Drivermode */ + CR31 |= 0x06; /* Set SlaveMode, Enable SimuMode in Slavemode */ +#ifdef TWDEBUG + CR31 |= 0x40; /* DEBUG (for non-slave mode VESA) */ + crt1rateindex = XGISearchCRT1Rate(pScrn, mymode); +#endif + } else { + CR31 |= 0x40; /* Set Drivermode */ + CR31 &= ~0x06; /* Disable SlaveMode, disable SimuMode in SlaveMode */ + if(!pXGI->IsCustom) { + crt1rateindex = XGISearchCRT1Rate(pScrn, mymode); + } else { + crt1rateindex = CR33; + } + } + +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + if(pXGI->SecondHead) { + /* CRT1 */ + CR33 &= 0xf0; + if(!(vbflag & CRT1_LCDA)) { + CR33 |= (crt1rateindex & 0x0f); + } + } else { + /* CRT2 */ + CR33 &= 0x0f; + if(vbflag & CRT2_VGA) { + CR33 |= ((crt1rateindex << 4) & 0xf0); + } + } + } else +#endif +#ifdef XGIMERGED + if(pXGI->MergedFB) { + CR33 = 0; + if(!(vbflag & CRT1_LCDA)) { + CR33 |= (crt1rateindex & 0x0f); + } + if(vbflag & CRT2_VGA) { + if(!pXGI->IsCustomCRT2) { + CR33 |= (XGISearchCRT1Rate(pScrn, mymode2) << 4); + } + } + } else +#endif + { + CR33 = 0; + if(!(vbflag & CRT1_LCDA)) { + CR33 |= (crt1rateindex & 0x0f); + } + if(vbflag & CRT2_VGA) { + CR33 |= ((crt1rateindex & 0x0f) << 4); + } + if((!(pXGI->UseVESA)) && (vbflag & CRT2_ENABLE)) { + if(pXGI->CRT1off) CR33 &= 0xf0; + } + } + outXGIIDXREG(XGICR, 0x30, CR30); + outXGIIDXREG(XGICR, 0x31, CR31); + outXGIIDXREG(XGICR, 0x33, CR33); + if(temp) { + outXGIIDXREG(XGICR, temp, CR38); + } + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4, + "After: CR30=0x%02x,CR31=0x%02x,CR33=0x%02x,CR%02x=%02x\n", + CR30, CR31, CR33, temp, CR38); + + pXGI->XGI_Pr->XGI_UseOEM = pXGI->OptUseOEM; + + /* Enable TurboQueue */ +#ifdef XGIVRAMQ + if(pXGI->VGAEngine != XGI_315_VGA) +#endif + XGIEnableTurboQueue(pScrn); + + if((!pXGI->UseVESA) && (pXGI->VBFlags & CRT2_ENABLE)) { + /* Switch on CRT1 for modes that require the bridge in SlaveMode */ + andXGIIDXREG(XGISR,0x1f,0x3f); + inXGIIDXREG(XGICR, 0x17, CR17); + if(!(CR17 & 0x80)) { + orXGIIDXREG(XGICR, 0x17, 0x80); + outXGIIDXREG(XGISR, 0x00, 0x01); + usleep(10000); + outXGIIDXREG(XGISR, 0x00, 0x03); + } + } +} + +/* PostSetMode: + * -) Disable CRT1 for saving bandwidth. This doesn't work with VESA; + * VESA uses the bridge in SlaveMode and switching CRT1 off while + * the bridge is in SlaveMode not that clever... + * -) Check if overlay can be used (depending on dotclock) + * -) Check if Panel Scaler is active on LVDS for overlay re-scaling + * -) Save TV registers for further processing + * -) Apply TV settings + */ +static void +XGIPostSetMode(ScrnInfoPtr pScrn, XGIRegPtr xgiReg) +{ + XGIPtr pXGI = XGIPTR(pScrn); +/* #ifdef XGIDUALHEAD + XGIEntPtr pXGIEnt = pXGI->entityPrivate; +#endif */ +/* unsigned char usScratchCR17; + Bool flag = FALSE; + Bool doit = TRUE; */ + int myclock; + unsigned char sr2b, sr2c, tmpreg; + float num, denum, postscalar, divider; +PDEBUG(ErrorF(" XGIPostSetMode(). \n")); +#ifdef TWDEBUG + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "CRT1off is %d\n", pXGI->CRT1off); +#endif + pXGI->CRT1isoff = pXGI->CRT1off; + +#ifdef UNLOCK_ALWAYS + xgiSaveUnlockExtRegisterLock(pXGI, NULL, NULL); +#endif + + /* Determine if the video overlay can be used */ + if(!pXGI->NoXvideo) { + inXGIIDXREG(XGISR,0x2b,sr2b); + inXGIIDXREG(XGISR,0x2c,sr2c); + divider = (sr2b & 0x80) ? 2.0 : 1.0; + postscalar = (sr2c & 0x80) ? + ( (((sr2c >> 5) & 0x03) == 0x02) ? 6.0 : 8.0 ) : + ( ((sr2c >> 5) & 0x03) + 1.0 ); + num = (sr2b & 0x7f) + 1.0; + denum = (sr2c & 0x1f) + 1.0; + myclock = (int)((14318 * (divider / postscalar) * (num / denum)) / 1000); + + pXGI->MiscFlags &= ~(MISC_CRT1OVERLAY | MISC_CRT1OVERLAYGAMMA); +/* switch(pXGI->xgi_HwDevExt.jChipType) { + break; + } */ + if(!(pXGI->MiscFlags & MISC_CRT1OVERLAY)) { +#ifdef XGIDUALHEAD + if((!pXGI->DualHeadMode) || (pXGI->SecondHead)) +#endif + xf86DrvMsgVerb(pScrn->scrnIndex, X_WARNING, 3, + "Current dotclock (%dMhz) too high for video overlay on CRT1\n", + myclock); + } + } + + /* Determine if the Panel Link scaler is active */ + pXGI->MiscFlags &= ~MISC_PANELLINKSCALER; + if(pXGI->VBFlags & (CRT2_LCD | CRT1_LCDA)) { + if(pXGI->VBFlags & (VB_LVDS | VB_30xBDH | CRT1_LCDA)) { + inXGIIDXREG(XGIPART1,0x35,tmpreg); + tmpreg &= 0x04; + if(!tmpreg) pXGI->MiscFlags |= MISC_PANELLINKSCALER; + } + } + + /* Determine if our very special TV mode is active */ + pXGI->MiscFlags &= ~MISC_TVNTSC1024; + if((pXGI->VBFlags & VB_XGIBRIDGE) && (pXGI->VBFlags & CRT2_TV) && (!(pXGI->VBFlags & TV_HIVISION))) { + if( ((pXGI->VBFlags & TV_YPBPR) && (pXGI->VBFlags & TV_YPBPR525I)) || + ((!(pXGI->VBFlags & TV_YPBPR)) && (pXGI->VBFlags & (TV_NTSC | TV_PALM))) ) { + inXGIIDXREG(XGICR,0x34,tmpreg); + tmpreg &= 0x7f; + if((tmpreg == 0x64) || (tmpreg == 0x4a) || (tmpreg == 0x38)) { + pXGI->MiscFlags |= MISC_TVNTSC1024; + } + } + } + + /* Reset XV gamma correction */ + if(pXGI->ResetXvGamma) { + (pXGI->ResetXvGamma)(pScrn); + } + + /* Apply TV settings given by options + Do this even in DualHeadMode: + - if this is called by SetModeCRT1, CRT2 mode has been reset by SetModeCRT1 + - if this is called by SetModeCRT2, CRT2 mode has changed (duh!) + -> Hence, in both cases, the settings must be re-applied. + */ +} + +/* Build a list of the VESA modes the BIOS reports as valid */ +static void +XGIBuildVesaModeList(ScrnInfoPtr pScrn, vbeInfoPtr pVbe, VbeInfoBlock *vbe) +{ + XGIPtr pXGI = XGIPTR(pScrn); + int i = 0; + + while(vbe->VideoModePtr[i] != 0xffff) { + xgiModeInfoPtr m; + VbeModeInfoBlock *mode; + int id = vbe->VideoModePtr[i++]; + int bpp; + + if((mode = VBEGetModeInfo(pVbe, id)) == NULL) + continue; + + bpp = mode->BitsPerPixel; + + m = xnfcalloc(sizeof(xgiModeInfoRec),1); + m->width = mode->XResolution; + m->height = mode->YResolution; + m->bpp = bpp; + m->n = id; + m->next = pXGI->XGIVESAModeList; + + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "BIOS supports VESA mode 0x%x: x:%i y:%i bpp:%i\n", + m->n, m->width, m->height, m->bpp); + + pXGI->XGIVESAModeList = m; + + VBEFreeModeInfo(mode); + } +} + +/* Calc VESA mode from given resolution/depth */ +static UShort +XGICalcVESAModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode) +{ + XGIPtr pXGI = XGIPTR(pScrn); + xgiModeInfoPtr m = pXGI->XGIVESAModeList; + UShort i = (pScrn->bitsPerPixel+7)/8 - 1; + UShort ModeIndex = 0; + + while(m) { + if(pScrn->bitsPerPixel == m->bpp && + mode->HDisplay == m->width && + mode->VDisplay == m->height) + return m->n; + m = m->next; + } + + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "No valid BIOS VESA mode found for %dx%dx%d; searching built-in table.\n", + mode->HDisplay, mode->VDisplay, pScrn->bitsPerPixel); + + switch(mode->HDisplay) { + case 320: + if(mode->VDisplay == 200) + ModeIndex = VESAModeIndex_320x200[i]; + else if(mode->VDisplay == 240) + ModeIndex = VESAModeIndex_320x240[i]; + break; + case 400: + if(mode->VDisplay == 300) + ModeIndex = VESAModeIndex_400x300[i]; + break; + case 512: + if(mode->VDisplay == 384) + ModeIndex = VESAModeIndex_512x384[i]; + break; + case 640: + if(mode->VDisplay == 480) + ModeIndex = VESAModeIndex_640x480[i]; + else if(mode->VDisplay == 400) + ModeIndex = VESAModeIndex_640x400[i]; + break; + case 800: + if(mode->VDisplay == 600) + ModeIndex = VESAModeIndex_800x600[i]; + break; + case 1024: + if(mode->VDisplay == 768) + ModeIndex = VESAModeIndex_1024x768[i]; + break; + case 1280: + if(mode->VDisplay == 1024) + ModeIndex = VESAModeIndex_1280x1024[i]; + break; + case 1600: + if(mode->VDisplay == 1200) + ModeIndex = VESAModeIndex_1600x1200[i]; + break; + case 1920: + if(mode->VDisplay == 1440) + ModeIndex = VESAModeIndex_1920x1440[i]; + break; + } + + if(!ModeIndex) xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "No valid mode found for %dx%dx%d in built-in table either.\n", + mode->HDisplay, mode->VDisplay, pScrn->bitsPerPixel); + + return(ModeIndex); +} + +USHORT +XGI_CalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode, unsigned long VBFlags, BOOLEAN havecustommodes) +{ + XGIPtr pXGI = XGIPTR(pScrn); + UShort i = (pXGI->CurrentLayout.bitsPerPixel+7)/8 - 1; + + if(!(VBFlags & CRT1_LCDA)) { + if((havecustommodes) && (!(mode->type & M_T_DEFAULT))) { + return 0xfe; + } + } else { + if((mode->HDisplay > pXGI->LCDwidth) || + (mode->VDisplay > pXGI->LCDheight)) { + return 0; + } + } + + return(XGI_GetModeID(pXGI->VGAEngine, VBFlags, mode->HDisplay, mode->VDisplay, + i, pXGI->FSTN, pXGI->LCDwidth, pXGI->LCDheight)); +} + +USHORT +XGI_CheckCalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode, unsigned long VBFlags, BOOLEAN havecustommodes) +{ + XGIPtr pXGI = XGIPTR(pScrn); +/* UShort i = (pXGI->CurrentLayout.bitsPerPixel+7)/8 - 1; */ + UShort ModeIndex = 0; + int j; + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "Inside CheckCalcModeIndex (VBFlags %x, mode %dx%d)\n", + VBFlags,mode->HDisplay, mode->VDisplay); +#endif + + if(VBFlags & CRT2_LCD) { /* CRT2 is LCD */ + + if(pXGI->XGI_Pr->CP_HaveCustomData) { + for(j=0; j<7; j++) { + if((pXGI->XGI_Pr->CP_DataValid[j]) && + (mode->HDisplay == pXGI->XGI_Pr->CP_HDisplay[j]) && + (mode->VDisplay == pXGI->XGI_Pr->CP_VDisplay[j]) && + (mode->type & M_T_BUILTIN)) + return 0xfe; + } + } + + if((pXGI->AddedPlasmaModes) && (mode->type & M_T_BUILTIN)) + return 0xfe; + + if((havecustommodes) && + (pXGI->LCDwidth) && /* = test if LCD present */ + (!(mode->type & M_T_DEFAULT)) && + (!(mode->Flags & V_INTERLACE))) + return 0xfe; + + if( ((mode->HDisplay <= pXGI->LCDwidth) && + (mode->VDisplay <= pXGI->LCDheight)) || + ((pXGI->XGI_Pr->XGI_CustomT == CUT_PANEL848) && + (((mode->HDisplay == 1360) && (mode->HDisplay == 768)) || + ((mode->HDisplay == 1024) && (mode->HDisplay == 768)) || + ((mode->HDisplay == 800) && (mode->HDisplay == 600)))) ) { + + } + + } else if(VBFlags & CRT2_TV) { /* CRT2 is TV */ + + } else if(VBFlags & CRT2_VGA) { /* CRT2 is VGA2 */ + + if((pXGI->AddedPlasmaModes) && (mode->type & M_T_BUILTIN)) + return 0xfe; + + if((havecustommodes) && + (!(mode->type & M_T_DEFAULT)) && + (!(mode->Flags & V_INTERLACE))) + return 0xfe; + + } else { /* CRT1 only, no CRT2 */ + + ModeIndex = XGI_CalcModeIndex(pScrn, mode, VBFlags, havecustommodes); + + } + + return(ModeIndex); +} + +/* Calculate the vertical refresh rate from a mode */ +int +XGICalcVRate(DisplayModePtr mode) +{ + float hsync, refresh = 0; + + if(mode->HSync > 0.0) + hsync = mode->HSync; + else if(mode->HTotal > 0) + hsync = (float)mode->Clock / (float)mode->HTotal; + else + hsync = 0.0; + + if(mode->VTotal > 0) + refresh = hsync * 1000.0 / mode->VTotal; + + if(mode->Flags & V_INTERLACE) + refresh *= 2.0; + + if(mode->Flags & V_DBLSCAN) + refresh /= 2.0; + + if(mode->VScan > 1) + refresh /= mode->VScan; + + if(mode->VRefresh > 0.0) + refresh = mode->VRefresh; + + if(hsync == 0 || refresh == 0) return(0); + + return((int)(refresh)); +} + +/* Calculate CR33 (rate index) for CRT1. + * Calculation is done using currentmode, therefore it is + * recommended to set VertRefresh and HorizSync to correct + * values in config file. + */ +unsigned char +XGISearchCRT1Rate(ScrnInfoPtr pScrn, DisplayModePtr mode) +{ +/* XGIPtr pXGI = XGIPTR(pScrn); */ + int i = 0; + int irefresh; + unsigned short xres = mode->HDisplay; + unsigned short yres = mode->VDisplay; + unsigned char index; + BOOLEAN checkxgi730 = FALSE; + + irefresh = XGICalcVRate(mode); + if(!irefresh) { + if(xres == 800 || xres == 1024 || xres == 1280) return 0x02; + else return 0x01; + } + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "Debug: CalcVRate returned %d\n", irefresh); +#endif + + /* We need the REAL refresh rate here */ + if(mode->Flags & V_INTERLACE) + irefresh /= 2; + + /* Do not multiply by 2 when DBLSCAN! */ + +#ifdef TWDEBUG + xf86DrvMsg(0, X_INFO, "Debug: Rate after correction = %d\n", irefresh); +#endif + + index = 0; + while((xgix_vrate[i].idx != 0) && (xgix_vrate[i].xres <= xres)) { + if((xgix_vrate[i].xres == xres) && (xgix_vrate[i].yres == yres)) { + if((checkxgi730 == FALSE) || (xgix_vrate[i].XGI730valid32bpp == TRUE)) { + if(xgix_vrate[i].refresh == irefresh) { + index = xgix_vrate[i].idx; + break; + } else if(xgix_vrate[i].refresh > irefresh) { + if((xgix_vrate[i].refresh - irefresh) <= 3) { + index = xgix_vrate[i].idx; + } else if( ((checkxgi730 == FALSE) || (xgix_vrate[i - 1].XGI730valid32bpp == TRUE)) && + ((irefresh - xgix_vrate[i - 1].refresh) <= 2) && + (xgix_vrate[i].idx != 1) ) { + index = xgix_vrate[i - 1].idx; + } + break; + } else if((irefresh - xgix_vrate[i].refresh) <= 2) { + index = xgix_vrate[i].idx; + break; + } + } + } + i++; + } + if(index > 0) + return index; + else { + /* Default Rate index */ + if(xres == 800 || xres == 1024 || xres == 1280) return 0x02; + else return 0x01; + } +} + +void +XGIWaitRetraceCRT1(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + int watchdog; + unsigned char temp; + + inXGIIDXREG(XGICR,0x17,temp); + if(!(temp & 0x80)) return; + + inXGIIDXREG(XGISR,0x1f,temp); + if(temp & 0xc0) return; + + watchdog = 65536; + while((inXGIREG(XGIINPSTAT) & 0x08) && --watchdog); + watchdog = 65536; + while((!(inXGIREG(XGIINPSTAT) & 0x08)) && --watchdog); +} + +static void +XGIWaitVBRetrace(ScrnInfoPtr pScrn) +{ +/* XGIPtr pXGI = XGIPTR(pScrn); */ + + XGIWaitRetraceCRT1(pScrn); +} + +#define MODEID_OFF 0x449 + +unsigned char +XGI_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id) +{ + return(XGI_GetSetBIOSScratch(pScrn, MODEID_OFF, id)); +} + +unsigned char +XGI_GetSetBIOSScratch(ScrnInfoPtr pScrn, USHORT offset, unsigned char value) +{ + unsigned char ret = 0; +#if defined(i386) || defined(__i386) || defined(__i386__) || defined(__amd64__) || defined(__x86_64__) + unsigned char *base; + + base = xf86MapVidMem(pScrn->scrnIndex, VIDMEM_MMIO, 0, 0x2000); + if(!base) { + XGIErrorLog(pScrn, "(Could not map BIOS scratch area)\n"); + return 0; + } + + ret = *(base + offset); + + /* value != 0xff means: set register */ + if(value != 0xff) + *(base + offset) = value; + + xf86UnMapVidMem(pScrn->scrnIndex, base, 0x2000); +#endif + return ret; +} + +void +xgiSaveUnlockExtRegisterLock(XGIPtr pXGI, unsigned char *reg1, unsigned char *reg2) +{ + register unsigned char val; + unsigned long mylockcalls; + + pXGI->lockcalls++; + mylockcalls = pXGI->lockcalls; + + /* check if already unlocked */ + inXGIIDXREG(XGISR, 0x05, val); + if(val != 0xa1) { + /* save State */ + if(reg1) *reg1 = val; + /* unlock */ +/* + outb (0x3c4, 0x20); + val4 = inb (0x3c5); + val4 |= 0x20; + outb (0x3c5, val4); +*/ + outXGIIDXREG(XGISR, 0x05, 0x86); + inXGIIDXREG(XGISR, 0x05, val); + if(val != 0xA1) { +#ifdef TWDEBUG + unsigned char val1, val2; + int i; +#endif + XGIErrorLog(pXGI->pScrn, + "Failed to unlock sr registers (%p, %lx, 0x%02x; %ld)\n", + (void *)pXGI, (unsigned long)pXGI->RelIO, val, mylockcalls); +#ifdef TWDEBUG + for(i = 0; i <= 0x3f; i++) { + inXGIIDXREG(XGISR, i, val1); + inXGIIDXREG(0x3c4, i, val2); + xf86DrvMsg(pXGI->pScrn->scrnIndex, X_INFO, + "SR%02d: RelIO=0x%02x 0x3c4=0x%02x (%d)\n", + i, val1, val2, mylockcalls); + } +#endif + if((pXGI->VGAEngine == XGI_OLD_VGA) || (pXGI->VGAEngine == XGI_530_VGA)) { + /* Emergency measure: unlock at 0x3c4, and try to enable Relocated IO ports */ + outXGIIDXREG(0x3c4,0x05,0x86); + andXGIIDXREG(0x3c4,0x33,~0x20); + outXGIIDXREG(XGISR, 0x05, 0x86); + } + } + } +/* + if((pXGI->VGAEngine == XGI_OLD_VGA) || (pXGI->VGAEngine == XGI_530_VGA)) { + inXGIIDXREG(XGICR, 0x80, val); + if(val != 0xa1) { + / * save State * / + if(reg2) *reg2 = val; + outXGIIDXREG(XGICR, 0x80, 0x86); + inXGIIDXREG(XGICR, 0x80, val); + if(val != 0xA1) { + XGIErrorLog(pXGI->pScrn, + "Failed to unlock cr registers (%p, %lx, 0x%02x)\n", + (void *)pXGI, (unsigned long)pXGI->RelIO, val); + } + } + } +*/ +} + +void +xgiRestoreExtRegisterLock(XGIPtr pXGI, unsigned char reg1, unsigned char reg2) +{ + /* restore lock */ +#ifndef UNLOCK_ALWAYS + outXGIIDXREG(XGISR, 0x05, reg1 == 0xA1 ? 0x86 : 0x00); + if((pXGI->VGAEngine == XGI_OLD_VGA) || (pXGI->VGAEngine == XGI_530_VGA)) { + outXGIIDXREG(XGICR, 0x80, reg2 == 0xA1 ? 0x86 : 0x00); + } +#endif +} + +void +XGIDelayUS(int us) +{ + int i , j ; + + for( i = 0 ; i < us ; i++ ) + { + for( j = 0 ; j < 100 ; j++ ) + { + inb(VGA_SEQ_INDEX) ; + } + } +} + +#ifdef DEBUG +void +XGIDumpRegs(ScrnInfoPtr pScrn) +{ + + XGIPtr pXGI = XGIPTR(pScrn); + + int i ; + unsigned long temp ; + + + ErrorF("----------------------------------------------------------------------\n") ; + ErrorF("SR xx\n") ; + ErrorF("----------------------------------------------------------------------\n") ; + for( i = 0 ; i < 0x40 ; i++ ){ + inXGIIDXREG(XGISR, i, temp ) ; + ErrorF("SR%02X = 0x%02X ", i, temp ) ; + if( ((i+1) % 4) == 0 ) + { + ErrorF("\n") ; + } + if( ((i+1) % 16) == 0 ) + { + ErrorF("\n") ; + } + } + ErrorF( "\n" ) ; + ErrorF("----------------------------------------------------------------------\n") ; + ErrorF("CR xx\n") ; + ErrorF("----------------------------------------------------------------------\n") ; + for( i = 0 ; i < 0x80 ; i++ ){ + inXGIIDXREG(XGICR, i, temp ) ; + ErrorF("CR%02X = 0x%02X ", i, temp ) ; + if( ((i+1) % 4) == 0 ) + { + ErrorF("\n") ; + } + if( ((i+1) % 16) == 0 ) + { + ErrorF("\n") ; + } + } + ErrorF( "\n" ) ; + ErrorF("----------------------------------------------------------------------\n") ; + ErrorF("GR xx\n") ; + ErrorF("----------------------------------------------------------------------\n") ; + for( i = 0 ; i < 0x9 ; i++ ){ + inXGIIDXREG(XGIGR, i, temp ) ; + ErrorF("GR%02X = 0x%02X ", i, temp ) ; + if( ((i+1) % 4) == 0 ) + { + ErrorF("\n") ; + } + if( ((i+1) % 16) == 0 ) + { + ErrorF("\n") ; + } + } + ErrorF( "\n" ) ; + + ErrorF("----------------------------------------------------------------------\n") ; + ErrorF("PART1 xx\n") ; + ErrorF("----------------------------------------------------------------------\n") ; + for( i = 0 ; i < 0x100 ; i++ ){ + inXGIIDXREG(XGIPART1, i, temp ) ; + ErrorF("PART1_%02X = 0x%02X ", i, temp ) ; + if( ((i+1) % 4) == 0 ) + { + ErrorF("\n") ; + } + if( ((i+1) % 16) == 0 ) + { + ErrorF("\n") ; + } + } + ErrorF( "\n" ) ; + + ErrorF("----------------------------------------------------------------------\n") ; + ErrorF("PART2 xx\n") ; + ErrorF("----------------------------------------------------------------------\n") ; + for( i = 0 ; i < 0x100 ; i++ ){ + inXGIIDXREG(XGIPART2, i, temp ) ; + ErrorF("PART2_%02X = 0x%02X ", i, temp ) ; + if( ((i+1) % 4) == 0 ) + { + ErrorF("\n") ; + } + if( ((i+1) % 16) == 0 ) + { + ErrorF("\n") ; + } + } + ErrorF( "\n" ) ; + + ErrorF("----------------------------------------------------------------------\n") ; + ErrorF("PART3 xx\n") ; + ErrorF("----------------------------------------------------------------------\n") ; + for( i = 0 ; i < 0x100 ; i++ ){ + inXGIIDXREG(XGIPART3, i, temp ) ; + ErrorF("PART3_%02X = 0x%02X ", i, temp ) ; + if( ((i+1) % 4) == 0 ) + { + ErrorF("\n") ; + } + if( ((i+1) % 16) == 0 ) + { + ErrorF("\n") ; + } + } + ErrorF( "\n" ) ; + + ErrorF("----------------------------------------------------------------------\n") ; + ErrorF("PART4 xx\n") ; + ErrorF("----------------------------------------------------------------------\n") ; + for( i = 0 ; i < 0x100 ; i++ ){ + inXGIIDXREG(XGIPART4, i, temp ) ; + ErrorF("PART4_%02X = 0x%02X ", i, temp ) ; + if( ((i+1) % 4) == 0 ) + { + ErrorF("\n") ; + } + if( ((i+1) % 16) == 0 ) + { + ErrorF("\n") ; + } + } + ErrorF( "\n" ) ; + +} +#endif Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.h:1.2 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.h Mon Jun 6 21:33:39 2005 @@ -0,0 +1,965 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.h,v 1.2 2005/06/07 01:33:39 tsi Exp $ */ +/* + * Global data and definitions + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1) Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2) Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3) The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Thomas Winischhofer + * + */ + +/* VESA */ +/* The following is included because there are BIOSes out there that + * report incomplete mode lists. These are 630 BIOS versions <2.01.2x + * + + */ + /* 8 16 (24) 32 */ +static const UShort VESAModeIndex_320x200[] = {0x138, 0x10e, 0x000, 0x000}; +static const UShort VESAModeIndex_320x240[] = {0x132, 0x135, 0x000, 0x000}; +static const UShort VESAModeIndex_400x300[] = {0x133, 0x136, 0x000, 0x000}; +static const UShort VESAModeIndex_512x384[] = {0x134, 0x137, 0x000, 0x000}; +static const UShort VESAModeIndex_640x400[] = {0x100, 0x139, 0x000, 0x000}; +static const UShort VESAModeIndex_640x480[] = {0x101, 0x111, 0x000, 0x13a}; +static const UShort VESAModeIndex_800x600[] = {0x103, 0x114, 0x000, 0x13b}; +static const UShort VESAModeIndex_1024x768[] = {0x105, 0x117, 0x000, 0x13c}; +static const UShort VESAModeIndex_1280x1024[] = {0x107, 0x11a, 0x000, 0x13d}; +static const UShort VESAModeIndex_1600x1200[] = {0x130, 0x131, 0x000, 0x13e}; +static const UShort VESAModeIndex_1920x1440[] = {0x13f, 0x140, 0x000, 0x141}; + +/* For calculating refresh rate index (CR33) */ +static const struct _xgi_vrate { + CARD16 idx; + CARD16 xres; + CARD16 yres; + CARD16 refresh; + BOOLEAN XGI730valid32bpp; +} xgix_vrate[] = { + {1, 320, 200, 70, TRUE}, + {1, 320, 240, 60, TRUE}, + {1, 400, 300, 60, TRUE}, + {1, 512, 384, 60, TRUE}, + {1, 640, 400, 72, TRUE}, + {1, 640, 480, 60, TRUE}, {2, 640, 480, 72, TRUE}, {3, 640, 480, 75, TRUE}, + {4, 640, 480, 85, TRUE}, {5, 640, 480, 100, TRUE}, {6, 640, 480, 120, TRUE}, + {7, 640, 480, 160, FALSE}, {8, 640, 480, 200, FALSE}, + {1, 720, 480, 60, TRUE}, + {1, 720, 576, 58, TRUE}, + {1, 768, 576, 58, TRUE}, + {1, 800, 480, 60, TRUE}, {2, 800, 480, 75, TRUE}, {3, 800, 480, 85, TRUE}, + {1, 800, 600, 56, TRUE}, {2, 800, 600, 60, TRUE}, {3, 800, 600, 72, TRUE}, + {4, 800, 600, 75, TRUE}, {5, 800, 600, 85, TRUE}, {6, 800, 600, 105, TRUE}, + {7, 800, 600, 120, FALSE}, {8, 800, 600, 160, FALSE}, + {1, 848, 480, 39, TRUE}, {2, 848, 480, 60, TRUE}, + {1, 856, 480, 39, TRUE}, {2, 856, 480, 60, TRUE}, + {1, 1024, 576, 60, TRUE}, {2, 1024, 576, 75, TRUE}, {3, 1024, 576, 85, TRUE}, + {1, 1024, 600, 60, TRUE}, + {1, 1024, 768, 43, TRUE}, {2, 1024, 768, 60, TRUE}, {3, 1024, 768, 70, FALSE}, + {4, 1024, 768, 75, FALSE}, {5, 1024, 768, 85, TRUE}, {6, 1024, 768, 100, TRUE}, + {7, 1024, 768, 120, TRUE}, + {1, 1152, 768, 60, TRUE}, + {1, 1152, 864, 75, TRUE}, {2, 1152, 864, 84, FALSE}, + {1, 1280, 720, 60, TRUE}, {2, 1280, 720, 75, FALSE}, {3, 1280, 720, 85, TRUE}, + {1, 1280, 768, 60, TRUE}, + {1, 1280, 800, 60, TRUE}, + {1, 1280, 960, 60, TRUE}, {2, 1280, 960, 85, TRUE}, + {1, 1280, 1024, 43, FALSE}, {2, 1280, 1024, 60, TRUE}, {3, 1280, 1024, 75, FALSE}, + {4, 1280, 1024, 85, TRUE}, + {1, 1360, 768, 60, TRUE}, + {1, 1400, 1050, 60, TRUE}, {2, 1400, 1050, 75, TRUE}, + {1, 1600, 1200, 60, TRUE}, {2, 1600, 1200, 65, TRUE}, {3, 1600, 1200, 70, TRUE}, + {4, 1600, 1200, 75, TRUE}, {5, 1600, 1200, 85, TRUE}, {6, 1600, 1200, 100, TRUE}, + {7, 1600, 1200, 120, TRUE}, + {1, 1680, 1050, 60, TRUE}, + {1, 1920, 1440, 60, TRUE}, {2, 1920, 1440, 65, TRUE}, {3, 1920, 1440, 70, TRUE}, + {4, 1920, 1440, 75, TRUE}, {5, 1920, 1440, 85, TRUE}, {6, 1920, 1440, 100, TRUE}, + {1, 2048, 1536, 60, TRUE}, {2, 2048, 1536, 65, TRUE}, {3, 2048, 1536, 70, TRUE}, + {4, 2048, 1536, 75, TRUE}, {5, 2048, 1536, 85, TRUE}, + {0, 0, 0, 0, FALSE} +}; + +/* Some 300-series laptops have a badly designed BIOS and make it + * impossible to detect the correct panel delay compensation. This + * table used to detect such machines by their PCI subsystem IDs; + * however, I don't know how reliable this method is. (With Asus + * machines, it is to general, ASUS uses the same ID for different + * boxes) + */ +static const pdctable mypdctable[] = { + { 0x1071, 0x7522, 32, "Mitac", "7521T" }, + { 0, 0, 0, "" , "" } +}; + +/* These machines require setting/clearing a GPIO bit for enabling/ + * disabling communication with the Chrontel TV encoder + */ +static const chswtable mychswtable[] = { + { 0x1631, 0x1002, "Mitachi", "0x1002" }, + { 0x1071, 0x7521, "Mitac" , "7521P" }, + { 0, 0, "" , "" } +}; + +/* These machines require special timing/handling + */ +const customttable mycustomttable[] = { + { XGI_630, "2.00.07", "09/27/2002-13:38:25", + 0x3240A8, + { 0x220, 0x227, 0x228, 0x229, 0x0ee }, + { 0x01, 0xe3, 0x9a, 0x6a, 0xef }, + 0x1039, 0x6300, + "Barco", "iQ R200L/300/400", CUT_BARCO1366, "BARCO_1366" + }, + { XGI_630, "2.00.07", "09/27/2002-13:38:25", + 0x323FBD, + { 0x220, 0x227, 0x228, 0x229, 0x0ee }, + { 0x00, 0x5a, 0x64, 0x41, 0xef }, + 0x1039, 0x6300, + "Barco", "iQ G200L/300/400/500", CUT_BARCO1024, "BARCO_1024" + }, + { XGI_650, "", "", + 0, + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0x0e11, 0x083c, + "Inventec (Compaq)", "3017cl/3045US", CUT_COMPAQ12802, "COMPAQ_1280" + }, + { XGI_650, "", "", + 0, /* Special 1024x768 / dual link */ + { 0x00c, 0, 0, 0, 0 }, + { 'e' , 0, 0, 0, 0 }, + 0x1558, 0x0287, + "Clevo", "L285/L287 (Version 1)", CUT_CLEVO1024, "CLEVO_L28X_1" + }, + { XGI_650, "", "", + 0, /* Special 1024x768 / single link */ + { 0x00c, 0, 0, 0, 0 }, + { 'y' , 0, 0, 0, 0 }, + 0x1558, 0x0287, + "Clevo", "L285/L287 (Version 2)", CUT_CLEVO10242, "CLEVO_L28X_2" + }, + { XGI_650, "", "", + 0, /* Special 1400x1050 */ + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0x1558, 0x0400, /* possibly 401 and 402 as well; not panelsize specific? */ + "Clevo", "D400S/D410S/D400H/D410H", CUT_CLEVO1400, "CLEVO_D4X0" + }, + { XGI_650, "", "", + 0, /* Shift LCD in LCD-via-CRT1 mode */ + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0x1558, 0x2263, + "Clevo", "D22ES/D27ES", CUT_UNIWILL1024, "CLEVO_D2X0ES" + }, + { XGI_650, "", "", + 0, /* Shift LCD in LCD-via-CRT1 mode */ + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0x1734, 0x101f, + "Uniwill", "N243S9", CUT_UNIWILL1024, "UNIWILL_N243S9" + }, + { XGI_650, "", "", + 0, /* Shift LCD in LCD-via-CRT1 mode */ + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0x1584, 0x5103, + "Uniwill", "N35BS1", CUT_UNIWILL10242, "UNIWILL_N35BS1" + }, + { XGI_650, "1.09.2c", "", /* Other versions, too? */ + 0, /* Shift LCD in LCD-via-CRT1 mode */ + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0x1019, 0x0f05, + "ECS", "A928", CUT_UNIWILL1024, "ECS_A928" + }, + { XGI_740, "1.11.27a", "", + 0, + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0x1043, 0x1612, + "Asus", "L3000D/L3500D", CUT_ASUSL3000D, "ASUS_L3X00" + }, + { XGI_650, "1.10.9k", "", + 0, /* For EMI */ + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0x1025, 0x0028, + "Acer", "Aspire 1700", CUT_ACER1280, "ACER_ASPIRE1700" + }, + { XGI_650, "1.10.7w", "", + 0, /* For EMI */ + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0x14c0, 0x0012, + "Compal", "??? (V1)", CUT_COMPAL1400_1, "COMPAL_1400_1" + }, + { XGI_650, "1.10.7x", "", /* New BIOS on its way (from BG.) */ + 0, /* For EMI */ + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0x14c0, 0x0012, + "Compal", "??? (V2)", CUT_COMPAL1400_2, "COMPAL_1400_2" + }, + { XGI_650, "1.10.8o", "", + 0, /* For EMI (unknown) */ + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0x1043, 0x1612, + "Asus", "A2H (V1)", CUT_ASUSA2H_1, "ASUS_A2H_1" + }, + { XGI_650, "1.10.8q", "", + 0, /* For EMI */ + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0x1043, 0x1612, + "Asus", "A2H (V2)", CUT_ASUSA2H_2, "ASUS_A2H_2" + }, + { 4321, "", "", /* never autodetected */ + 0, + { 0, 0, 0, 0, 0 }, + { 0, 0, 0, 0, 0 }, + 0, 0, + "Generic", "LVDS/Parallel 848x480", CUT_PANEL848, "PANEL848x480" + }, + { 0, "", "", + 0, + { 0, 0, 0, 0 }, + { 0, 0, 0, 0 }, + 0, 0, + "", "", CUT_NONE, "" + } +}; + +/* Our TV modes for the 6326. The data in these structures + * is mainly correct, but since we use our private CR and + * clock values anyway, small errors do no matter. + */ + +/* Due to the scaling method this mode uses, the vertical data here + * does not match the CR data. But this does not matter, we use our + * private CR data anyway. + */ + +/* Due to the scaling method this mode uses, the vertical data here + * does not match the CR data. But this does not matter, we use our + * private CR data anyway. + */ + +/* Built-in hi-res modes for the 6326. + * For some reason, our default mode lines and the + * clock calculation functions in xgi_dac.c do no + * good job on higher clocks. It seems, the hardware + * needs some tricks so make mode with higher clock + * rates than ca. 120MHz work. I didn't bother trying + * to find out what exactly is going wrong, so I + * implemented two special modes instead for 1280x1024 + * and 1600x1200. These two are automatically added + * to the list if they are supported with the current + * depth. + * The data in the strucures below is a proximation, + * in xgi_vga.c the register contents are fetched from + * fixed tables anyway. + */ + +/* TV filters for video bridges + */ +static const struct _XGITVFilter301 { + unsigned char filter[7][4]; +} XGITVFilter301[] = { + {{ {0x00,0xE0,0x10,0x60}, /* NTSCFilter - 320 */ + {0x00,0xEE,0x10,0x44}, + {0x00,0xF4,0x10,0x38}, + {0xF8,0xF4,0x18,0x38}, + {0xFC,0xFB,0x14,0x2A}, + {0x00,0x00,0x10,0x20}, + {0x00,0x04,0x10,0x18} }}, + {{ {0xF5,0xEE,0x1B,0x44}, /* NTSCFilter - 640 */ + {0xF8,0xF4,0x18,0x38}, + {0xEB,0x04,0x25,0x18}, + {0xF1,0x05,0x1F,0x16}, + {0xF6,0x06,0x1A,0x14}, + {0xFA,0x06,0x16,0x14}, + {0x00,0x04,0x10,0x18} }}, + {{ {0xEB,0x04,0x25,0x18}, /* NTSCFilter - 720 */ + {0xE7,0x0E,0x29,0x04}, + {0xEE,0x0C,0x22,0x08}, + {0xF6,0x0B,0x1A,0x0A}, + {0xF9,0x0A,0x17,0x0C}, + {0xFC,0x0A,0x14,0x0C}, + {0x00,0x08,0x10,0x10} }}, + {{ {0xEC,0x02,0x24,0x1C}, /* NTSCFilter - 800/400 */ + {0xF2,0x04,0x1E,0x18}, + {0xEB,0x15,0x25,0xF6}, + {0xF4,0x10,0x1C,0x00}, + {0xF8,0x0F,0x18,0x02}, + {0x00,0x04,0x10,0x18}, + {0x01,0x06,0x0F,0x14} }}, + {{ {0x00,0xE0,0x10,0x60}, /* PALFilter - 320 */ + {0x00,0xEE,0x10,0x44}, + {0x00,0xF4,0x10,0x38}, + {0xF8,0xF4,0x18,0x38}, + {0xFC,0xFB,0x14,0x2A}, + {0x00,0x00,0x10,0x20}, + {0x00,0x04,0x10,0x18} }}, + {{ {0xF5,0xEE,0x1B,0x44}, /* PALFilter - 640 */ + {0xF8,0xF4,0x18,0x38}, + {0xF1,0xF7,0x1F,0x32}, + {0xF5,0xFB,0x1B,0x2A}, + {0xF9,0xFF,0x17,0x22}, + {0xFB,0x01,0x15,0x1E}, + {0x00,0x04,0x10,0x18} }}, + {{ {0xF5,0xEE,0x1B,0x2A}, /* PALFilter - 720 */ + {0xEE,0xFE,0x22,0x24}, + {0xF3,0x00,0x1D,0x20}, + {0xF9,0x03,0x17,0x1A}, + {0xFB,0x02,0x14,0x1E}, + {0xFB,0x04,0x15,0x18}, + {0x00,0x06,0x10,0x14} }}, + {{ {0xF5,0xEE,0x1B,0x44}, /* PALFilter - 800/400 */ + {0xF8,0xF4,0x18,0x38}, + {0xFC,0xFB,0x14,0x2A}, + {0xEB,0x05,0x25,0x16}, + {0xF1,0x05,0x1F,0x16}, + {0xFA,0x07,0x16,0x12}, + {0x00,0x07,0x10,0x12} }} +}; + +static const struct _XGITVFilter301B { + unsigned char filter[7][7]; +} XGITVFilter301B[] = { + {{ {0x01,0x02,0xfb,0xf8,0x06,0x27,0x3a}, /* NTSC - 640 */ + {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c}, + {0x01,0x01,0x00,0xf6,0x00,0x28,0x40}, + {0xff,0x03,0x02,0xf6,0xfc,0x27,0x46}, + {0xff,0x01,0x04,0xf8,0xfa,0x27,0x46}, + {0xff,0x01,0x05,0xf9,0xf7,0x26,0x4a}, + {0xff,0xff,0x05,0xfc,0xf4,0x24,0x52} }}, + {{ {0x01,0x00,0xfb,0xfb,0x0b,0x25,0x32}, /* NTSC - 720 (?) */ + {0x01,0x01,0xfb,0xf9,0x09,0x26,0x36}, + {0x01,0x02,0xfc,0xf8,0x06,0x27,0x38}, + {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c}, + {0x01,0x03,0xff,0xf6,0x00,0x27,0x40}, + {0xff,0x03,0x02,0xf6,0xfe,0x27,0x42}, + {0xff,0x02,0x03,0xf7,0xfb,0x27,0x46} }}, + {{ {0x01,0xfe,0xfb,0xfe,0x0e,0x23,0x2e}, /* NTSC - 800 */ + {0x01,0xff,0xfb,0xfc,0x0c,0x25,0x30}, + {0x01,0x00,0xfb,0xfa,0x0a,0x26,0x34}, + {0x01,0x01,0xfc,0xf8,0x08,0x26,0x38}, + {0x01,0x02,0xfd,0xf7,0x06,0x27,0x38}, + {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c}, + {0xff,0x03,0x00,0xf6,0x00,0x27,0x42} }}, + {{ {0xff,0xfd,0xfe,0x05,0x11,0x1e,0x24}, /* NTSC - 1024 */ + {0xff,0xfd,0xfd,0x04,0x11,0x1f,0x26}, + {0xff,0xfd,0xfc,0x02,0x10,0x22,0x28}, + {0xff,0xff,0xfc,0x00,0x0f,0x22,0x28}, + {0x01,0xfe,0xfb,0xff,0x0e,0x23,0x2c}, + {0x01,0xff,0xfb,0xfd,0x0d,0x24,0x2e}, + {0x01,0xff,0xfb,0xfb,0x0c,0x25,0x32} }}, + {{ {0x01,0x02,0xfb,0xf8,0x06,0x27,0x3a}, /* PAL - 640 */ + {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c}, + {0x01,0x01,0x00,0xf6,0x00,0x28,0x40}, + {0xff,0x03,0x02,0xf6,0xfc,0x27,0x46}, + {0xff,0x01,0x04,0xf8,0xfa,0x27,0x46}, + {0xff,0x01,0x05,0xf9,0xf7,0x26,0x4a}, + {0xff,0xff,0x05,0xfc,0xf4,0x24,0x52} }}, + {{ {0x01,0x00,0xfb,0xfb,0x0b,0x25,0x32}, /* PAL - 720/768 */ + {0x01,0x01,0xfb,0xf9,0x09,0x26,0x36}, + {0x01,0x02,0xfc,0xf8,0x06,0x27,0x38}, + {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c}, + {0x01,0x03,0xff,0xf6,0x00,0x27,0x40}, + {0xff,0x03,0x02,0xf6,0xfe,0x27,0x42}, + {0xff,0x02,0x03,0xf7,0xfb,0x27,0x46} }}, + {{ {0x01,0xfe,0xfb,0xfe,0x0e,0x23,0x2e}, /* PAL - 800 */ + {0x01,0xff,0xfb,0xfc,0x0c,0x25,0x30}, + {0x01,0x00,0xfb,0xfa,0x0a,0x26,0x34}, + {0x01,0x01,0xfc,0xf8,0x08,0x26,0x38}, + {0x01,0x02,0xfd,0xf7,0x06,0x27,0x38}, + {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c}, + {0xff,0x03,0x00,0xf6,0x00,0x27,0x42} }}, + {{ {0xff,0xfd,0xfe,0x05,0x11,0x1e,0x24}, /* PAL - 1024 */ + {0xff,0xfd,0xfd,0x04,0x11,0x1f,0x26}, + {0xff,0xfd,0xfc,0x02,0x10,0x22,0x28}, + {0xff,0xff,0xfc,0x00,0x0f,0x22,0x28}, + {0x01,0xfe,0xfb,0xff,0x0e,0x23,0x2c}, + {0x01,0xff,0xfb,0xfd,0x0d,0x24,0x2e}, + {0x01,0xff,0xfb,0xfb,0x0c,0x25,0x32} }} +}; + +/* TV scaling data for video bridges + */ +typedef struct _XGITVVScale { + unsigned short ScaleVDE; + int sindex; + unsigned short RealVDE; + unsigned short reg[24]; +} MyXGITVVScale, *MyXGITVVScalePtr; + +static const MyXGITVVScale XGITVVScale[] = { + { 0x01D6, 3, 480, /* NTSC 640 */ + { 0x037C, 0x02B0, 0x00EF, 0x01FA, 0x01E7, 0x01E9, + 0x0000, 0x004C, 0x008F, 0x037C, 0x01FB, 0x00D4, + 0x037C, 0x02CB, 0x0049, 0x01FB, 0x01EE, 0x01F0, + 0x0000, 0x004C, 0x008F, 0x037C, 0x01FB, 0x00E0 } + }, + { 0x01CC, 2, 480, + { 0x0369, 0x02AD, 0x00E7, 0x01FF, 0x01E8, 0x01EB, + 0x0000, 0x004C, 0x008F, 0x0369, 0x0200, 0x00D4, + 0x0369, 0x02C6, 0x003A, 0x0200, 0x01F0, 0x01F3, + 0x0000, 0x004C, 0x008F, 0x0369, 0x0200, 0x00E0 } + }, + { 0x01C2, 1, 480, + { 0x0356, 0x02AB, 0x00E0, 0x0204, 0x01E9, 0x01EC, + 0x0000, 0x004C, 0x008F, 0x0356, 0x0205, 0x00D4, + 0x0356, 0x02C1, 0x002B, 0x0205, 0x01F3, 0x01F6, + 0x0000, 0x004C, 0x008F, 0x0356, 0x0205, 0x00E0 } + }, + { 0x01B8, 0, 480, /* default */ + { 0x0343, 0x02A9, 0x00DA, 0x0209, 0x01EA, 0x01ED, + 0x0000, 0x004C, 0x008F, 0x0343, 0x020A, 0x00D4, + 0x0343, 0x02BD, 0x001F, 0x020A, 0x01F5, 0x01F8, + 0x0000, 0x004C, 0x008F, 0x0343, 0x020A, 0x00E0 } + }, + { 0x01AE, -1, 480, + { 0x035B, 0x02AC, 0x00E3, 0x020E, 0x01EC, 0x01F0, + 0x0000, 0x0050, 0x008F, 0x035B, 0x020F, 0x0152, + 0x035B, 0x02C3, 0x0031, 0x020F, 0x01F8, 0x01FC, + 0x0000, 0x0050, 0x008F, 0x035B, 0x020F, 0x015E } + }, + { 0x01A4, -2, 480, + { 0x0347, 0x02A9, 0x00DB, 0x0213, 0x01ED, 0x01F1, + 0x0000, 0x0050, 0x008F, 0x0347, 0x0214, 0x0102, + 0x0347, 0x02BE, 0x0022, 0x0214, 0x01FA, 0x01FE, + 0x0000, 0x0050, 0x008F, 0x0347, 0x0214, 0x010E } + }, + { 0x019A, -3, 480, + { 0x0333, 0x02A7, 0x00D4, 0x0218, 0x01EE, 0x01F2, + 0x0000, 0x0050, 0x008F, 0x0333, 0x0219, 0x016A, + 0x0333, 0x02B9, 0x0013, 0x0219, 0x01FD, 0x0201, + 0x0000, 0x0050, 0x008F, 0x0333, 0x0219, 0x016A } + }, + { 0x01D6, 3, 480, /* NTSC 720 */ + { 0x037C, 0x0307, 0x005D, 0x01FB, 0x01EE, 0x01F0, + 0x0000, 0x004C, 0x008F, 0x037C, 0x01FB, 0x0090 } + }, + { 0x01CC, 2, 480, + { 0x0369, 0x0302, 0x004E, 0x0200, 0x01F0, 0x01F3, + 0x0000, 0x004C, 0x008F, 0x0369, 0x0200, 0x0090 } + }, + { 0x01C2, 1, 480, + { 0x0356, 0x02FD, 0x003F, 0x0205, 0x01F3, 0x01F6, + 0x0000, 0x004C, 0x008F, 0x0356, 0x0205, 0x0090 } + }, + { 0x01B8, 0, 480, /* default */ + { 0x0343, 0x02F9, 0x0033, 0x020A, 0x01F5, 0x01F8, + 0x0000, 0x004C, 0x008F, 0x0343, 0x020A, 0x0090 } + }, + { 0x01AE, -1, 480, + { 0x035B, 0x02FF, 0x0045, 0x020F, 0x01F8, 0x01FC, + 0x0000, 0x0050, 0x008F, 0x035B, 0x020F, 0x010E } + }, + { 0x01A4, -2, 480, + { 0x0347, 0x02FA, 0x0036, 0x0214, 0x01FA, 0x01FE, + 0x0000, 0x0050, 0x008F, 0x0347, 0x0214, 0x00BE } + }, + { 0x019A, -3, 480, + { 0x0333, 0x02F5, 0x0027, 0x0219, 0x01FD, 0x0201, + 0x0000, 0x0050, 0x008F, 0x0333, 0x0219, 0x0136 } + }, + { 0x01D6, 3, 600, /* NTSC 800 */ + { 0x0438, 0x0353, 0x0099, 0x0272, 0x025F, 0x0261, + 0x0000, 0x0073, 0x008F, 0x0438, 0x0273, 0x020A, + 0x0438, 0x0372, 0x00FE, 0x0273, 0x0266, 0x0268, + 0x0000, 0x0073, 0x008F, 0x0438, 0x0273, 0x020A } + }, + { 0x01CC, 2, 600, + { 0x0421, 0x0350, 0x0090, 0x0277, 0x0260, 0x0263, + 0x0000, 0x0073, 0x008F, 0x0421, 0x0278, 0x020A, + 0x0421, 0x036C, 0x00EC, 0x0278, 0x0268, 0x026B, + 0x0000, 0x0073, 0x008F, 0x0421, 0x0278, 0x020A } + }, + { 0x01C2, 1, 600, + { 0x0413, 0x034F, 0x008C, 0x027C, 0x0261, 0x0264, + 0x0000, 0x0074, 0x008F, 0x0413, 0x027D, 0x01FE, + 0x0413, 0x0369, 0x00E3, 0x027D, 0x026B, 0x026E, + 0x0000, 0x0074, 0x008F, 0x0413, 0x027D, 0x020C } + }, + { 0x01B8, 0, 600, /* default */ + { 0x041F, 0x0350, 0x0090, 0x0281, 0x0262, 0x0265, + 0x0000, 0x0078, 0x008F, 0x041F, 0x0282, 0x0220, + 0x041F, 0x036C, 0x00EC, 0x0282, 0x026D, 0x0270, + 0x0001, 0x0078, 0x008F, 0x041F, 0x0282, 0x0220 } + }, + { 0x01AE, -1, 600, + { 0x0407, 0x034D, 0x0087, 0x0286, 0x0264, 0x0268, + 0x0000, 0x0078, 0x008F, 0x0407, 0x0287, 0x0220, + 0x0407, 0x0366, 0x00DA, 0x0287, 0x0270, 0x0274, + 0x0001, 0x0078, 0x008F, 0x0407, 0x0287, 0x0220 } + }, + { 0x01A4, -2, 600, + { 0x03EF, 0x034A, 0x007E, 0x028B, 0x0265, 0x0269, + 0x0000, 0x0078, 0x008F, 0x03EF, 0x028C, 0x0220, + 0x03EF, 0x0360, 0x00C8, 0x028C, 0x0272, 0x0276, + 0x0001, 0x0078, 0x008F, 0x03EF, 0x028C, 0x0220 } + }, + { 0x019A, -3, 600, + { 0x0429, 0x0351, 0x0093, 0x0290, 0x0266, 0x026A, + 0x0000, 0x0082, 0x008F, 0x0429, 0x0291, 0x024E, + 0x0429, 0x036E, 0x00F2, 0x0291, 0x0275, 0x0279, + 0x0001, 0x0082, 0x008F, 0x0429, 0x0291, 0x024E } + }, + { 0x0230, 3, 480, /* PAL 640 */ + { 0x0371, 0x02AE, 0x00EA, 0x01FF, 0x01E8, 0x01EB, + 0x0000, 0x0007, 0x0010, 0x0371, 0x0200, 0x0032, + 0x0371, 0x02C8, 0x0040, 0x0200, 0x01F0, 0x01F3, + 0x0000, 0x000E, 0x0020, 0x0371, 0x0200, 0x0032 } + }, + { 0x0226, 2, 480, + { 0x0383, 0x02B1, 0x00F2, 0x0204, 0x01E9, 0x01EC, + 0x0000, 0x0005, 0x000B, 0x0383, 0x0205, 0x0032, + 0x0383, 0x02CD, 0x004F, 0x0205, 0x01F3, 0x01F6, + 0x0000, 0x0005, 0x000B, 0x0383, 0x0205, 0x0032 } + }, + { 0x021C, 1, 480, + { 0x035F, 0x02AC, 0x00E4, 0x0209, 0x01EA, 0x01ED, + 0x0000, 0x0004, 0x0009, 0x035F, 0x020A, 0x0032, + 0x035F, 0x02C4, 0x0034, 0x020A, 0x01F5, 0x01F8, + 0x0000, 0x0004, 0x0009, 0x035F, 0x020A, 0x0032 } + }, + { 0x0212, 0, 480, /* default */ + { 0x034F, 0x02AA, 0x00DE, 0x020E, 0x01EC, 0x01F0, + 0x0000, 0x0004, 0x0009, 0x034F, 0x020F, 0x0032, + 0x034F, 0x02C0, 0x0028, 0x020F, 0x01F8, 0x01FC, + 0x0000, 0x0004, 0x0009, 0x034F, 0x020F, 0x0032 } + }, + { 0x0208, -1, 480, + { 0x033F, 0x02A8, 0x00D8, 0x0213, 0x01ED, 0x01F1, + 0x0000, 0x0004, 0x0009, 0x033F, 0x0214, 0x0032, + 0x033F, 0x02BC, 0x001C, 0x0214, 0x01FA, 0x01FE, + 0x0000, 0x0004, 0x0009, 0x033F, 0x0214, 0x0032 } + }, + { 0x01FE, -2, 480, + { 0x0395, 0x02B3, 0x00F8, 0x0218, 0x01EE, 0x01F2, + 0x0000, 0x0001, 0x0002, 0x0395, 0x0219, 0x0032, + 0x0395, 0x02D1, 0x005B, 0x0219, 0x01FD, 0x0201, + 0x0000, 0x0001, 0x0002, 0x0395, 0x0219, 0x0032 } + }, + { 0x01F4, -3, 480, + { 0x0383, 0x02B1, 0x00F2, 0x021D, 0x01EF, 0x01F3, + 0x0000, 0x0001, 0x0002, 0x0383, 0x021E, 0x0032, + 0x0383, 0x02CD, 0x004F, 0x021E, 0x01FF, 0x0203, + 0x0000, 0x0001, 0x0002, 0x0383, 0x021E, 0x0032 } + }, + { 0x0230, 2, 576, /* PAL 720 */ + { 0x03BF, 0x0318, 0x0090, 0x0260, 0x0250, 0x0253, + 0x0000, 0x0004, 0x0007, 0x03BF, 0x0260, 0x00E0, + 0x6954, 0x6C6C, 0x5320, 0x666F, 0x6169, 0x4220, + 0x7265, 0x746E, 0x7373, 0x6E6F, 0x0260, 0x00E0 } + }, + { 0x0226, 1, 576, + { 0x03DD, 0x031F, 0x00A5, 0x0265, 0x0253, 0x0256, + 0x0000, 0x0003, 0x0005, 0x03DD, 0x0265, 0x013B, + 0x7242, 0x756F, 0x6867, 0x2074, 0x6F74, 0x7920, + 0x756F, 0x6220, 0x2079, 0x6F6E, 0x2074, 0x2061 } + }, + { 0x021C, 0, 576, /* default */ + { 0x0437, 0x0336, 0x00EA, 0x026A, 0x0255, 0x0258, + 0x0000, 0x0002, 0x0003, 0x0437, 0x026A, 0x0180, + 0x656D, 0x6572, 0x5720, 0x7A69, 0x7261, 0x2064, + 0x7562, 0x2074, 0x6874, 0x2065, 0x0274, 0x01CE } + }, + { 0x0212, -1, 576, + { 0x0423, 0x0331, 0x00DB, 0x026F, 0x0258, 0x025C, + 0x0001, 0x0002, 0x0003, 0x0423, 0x026F, 0x01CA, + 0x6957, 0x617A, 0x6472, 0x4520, 0x7478, 0x6172, + 0x726F, 0x6964, 0x616E, 0x7269, 0x3A65, 0x01CE } + }, + { 0x0208, -2, 576, + { 0x040F, 0x032C, 0x00CC, 0x0274, 0x025A, 0x025E, + 0x0000, 0x0002, 0x0003, 0x040F, 0x0274, 0x01CA, + 0x6854, 0x6D6F, 0x7361, 0x5720, 0x6E69, 0x7369, + 0x6863, 0x6F68, 0x6566, 0x2172, 0x027E, 0x01CA } + }, + { 0x01FE, -3, 576, + { 0x03FB, 0x0327, 0x00BD, 0x0279, 0x025D, 0x0261, + 0x0000, 0x0002, 0x0003, 0x03FB, 0x0279, 0x01CA, + } + }, + { 0x01F4, -4, 576, + { 0x03E7, 0x0322, 0x00AE, 0x027E, 0x025F, 0x0263, + 0x0000, 0x0002, 0x0003, 0x03E7, 0x027E, 0x01CA, + 0x6854, 0x7369, 0x7320, 0x6170, 0x6563, 0x6620, + 0x726F, 0x7320, 0x6C61, 0x0365, 0x027F, 0x01FE } + }, + { 0x0230, 3, 600, /* PAL 800 */ + { 0x047F, 0x035C, 0x00B4, 0x0277, 0x0260, 0x0263, + 0x0000, 0x0005, 0x0007, 0x047F, 0x0278, 0x0170, + 0x047F, 0x0384, 0x0034, 0x0278, 0x0268, 0x026B, + 0x0000, 0x0005, 0x0007, 0x047F, 0x0278, 0x017E } + }, + { 0x0226, 2, 600, + { 0x044B, 0x0356, 0x00A1, 0x027C, 0x0261, 0x0264, + 0x0000, 0x0019, 0x0024, 0x044B, 0x027D, 0x0150, + 0x044B, 0x0377, 0x000D, 0x027D, 0x026B, 0x026E, + 0x0000, 0x0019, 0x0024, 0x044B, 0x027D, 0x015E } + }, + { 0x021C, 1, 600, + { 0x0437, 0x0353, 0x0099, 0x0281, 0x0262, 0x0265, + 0x0000, 0x0019, 0x0024, 0x0437, 0x0282, 0x0150, + 0x0437, 0x0372, 0x00FE, 0x0282, 0x026D, 0x0270, + 0x0000, 0x0019, 0x0024, 0x0437, 0x0282, 0x015E } + }, + { 0x0212, 0, 600, /* default */ + { 0x0423, 0x0351, 0x0092, 0x0286, 0x0264, 0x0268, + 0x0000, 0x0019, 0x0024, 0x0423, 0x0287, 0x01C8, + 0x0423, 0x036D, 0x00EF, 0x0287, 0x0270, 0x0274, + 0x0000, 0x0019, 0x0024, 0x0423, 0x0287, 0x01D6 } + }, + { 0x0208, -1, 600, + { 0x040F, 0x034E, 0x008A, 0x028B, 0x0265, 0x0269, + 0x0000, 0x0019, 0x0024, 0x040F, 0x028C, 0x01A0, + 0x040F, 0x0368, 0x00E0, 0x028C, 0x0272, 0x0276, + 0x0000, 0x0019, 0x0024, 0x040F, 0x028C, 0x01AE } + }, + { 0x01FE, -2, 600, + { 0x03FB, 0x034C, 0x0083, 0x0290, 0x0266, 0x026A, + 0x0000, 0x0019, 0x0024, 0x03FB, 0x0291, 0x01C8, + 0x03FB, 0x0363, 0x00D1, 0x0291, 0x0275, 0x0279, + 0x0000, 0x0019, 0x0024, 0x03FB, 0x0291, 0x01D6 } + }, + { 0x01F4, -3, 600, + { 0x0437, 0x0353, 0x0099, 0x0295, 0x0267, 0x026B, + 0x0000, 0x0003, 0x0004, 0x0437, 0x0296, 0x01BF, + 0x0437, 0x0372, 0x00FE, 0x0296, 0x0277, 0x027B, + 0x0000, 0x0003, 0x0004, 0x0437, 0x0296, 0x01BA } + }, +}; + +unsigned const char XGIScalingP1Regs[] = { + 0x08,0x09,0x0b,0x0c,0x0d,0x0e,0x10,0x11,0x12 +}; +unsigned const char XGIScalingP4Regs[] = { + 0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b +}; + +static const unsigned char XGI301CScaling[] = { + + /* NTSC/PAL-M/525ip 640x480 */ + + 0x03,0x1C,0x03,0x7E,0x01,0x1C,0x05,0x7E,0x00,0x1C,0x06,0x7E,0x7F,0x1B,0x09,0x7D, + 0x7E,0x1A,0x0B,0x7D,0x7D,0x19,0x0D,0x7D,0x7D,0x18,0x0F,0x7C,0x7C,0x16,0x12,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x16,0x7C,0x7C,0x0F,0x18,0x7D,0x7C,0x0D,0x19,0x7E, + 0x7D,0x0B,0x1A,0x7E,0x7D,0x09,0x1B,0x7F,0x7E,0x06,0x1C,0x00,0x7E,0x05,0x1C,0x01, + + 0x03,0x1B,0x03,0x7F,0x02,0x1B,0x05,0x7E,0x00,0x1B,0x07,0x7E,0x7F,0x1B,0x09,0x7D, + 0x7E,0x1A,0x0B,0x7D,0x7D,0x19,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7C,0x16,0x12,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x16,0x7C,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x19,0x7E, + 0x7D,0x0B,0x1A,0x7E,0x7D,0x09,0x1B,0x7F,0x7E,0x07,0x1B,0x00,0x7E,0x05,0x1B,0x02, + + 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D, + 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F, + 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02, + + 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D, + 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C, + 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E, + 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02, + + 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x19,0x0A,0x7C, + 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x10,0x7C,0x7D,0x15,0x11,0x7D, + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x15,0x7D,0x7D,0x10,0x16,0x7D,0x7D,0x0E,0x17,0x7E, + 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04, + + 0x05,0x18,0x05,0x7E,0x04,0x19,0x07,0x7C,0x02,0x18,0x08,0x7E,0x01,0x18,0x0A,0x7D, + 0x00,0x17,0x0C,0x7D,0x7F,0x17,0x0E,0x7C,0x7E,0x15,0x0F,0x7E,0x7E,0x14,0x11,0x7D, + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x17,0x7E, + 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x18,0x03,0x7D,0x07,0x19,0x03, + + 0x05,0x18,0x05,0x7E,0x04,0x18,0x07,0x7D,0x03,0x18,0x09,0x7C,0x02,0x17,0x0A,0x7D, + 0x01,0x17,0x0C,0x7C,0x00,0x16,0x0E,0x7C,0x7F,0x15,0x0F,0x7D,0x7E,0x14,0x11,0x7D, + 0x7E,0x12,0x12,0x7E,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x16,0x7F, + 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x17,0x02,0x7D,0x09,0x18,0x02,0x7D,0x07,0x18,0x04, + + /* NTSC/PAL-M/525ip 720x480 */ + + 0x03,0x1C,0x03,0x7E,0x01,0x1C,0x05,0x7E,0x00,0x1C,0x06,0x7E,0x7F,0x1B,0x09,0x7D, + 0x7E,0x1A,0x0B,0x7D,0x7D,0x19,0x0D,0x7D,0x7D,0x18,0x0F,0x7C,0x7C,0x16,0x12,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x16,0x7C,0x7C,0x0F,0x18,0x7D,0x7C,0x0D,0x19,0x7E, + 0x7D,0x0B,0x1A,0x7E,0x7D,0x09,0x1B,0x7F,0x7E,0x06,0x1C,0x00,0x7E,0x05,0x1C,0x01, + + 0x03,0x1B,0x03,0x7F,0x02,0x1B,0x05,0x7E,0x00,0x1B,0x07,0x7E,0x7F,0x1B,0x09,0x7D, + 0x7E,0x1A,0x0B,0x7D,0x7D,0x19,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7C,0x16,0x12,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x16,0x7C,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x19,0x7E, + 0x7D,0x0B,0x1A,0x7E,0x7D,0x09,0x1B,0x7F,0x7E,0x07,0x1B,0x00,0x7E,0x05,0x1B,0x02, + + 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D, + 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F, + 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02, + + 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D, + 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C, + 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E, + 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02, + + 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x19,0x0A,0x7C, + 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x10,0x7C,0x7D,0x15,0x11,0x7D, + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x15,0x7D,0x7D,0x10,0x16,0x7D,0x7D,0x0E,0x17,0x7E, + 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04, + + 0x05,0x18,0x05,0x7E,0x04,0x19,0x07,0x7C,0x02,0x18,0x08,0x7E,0x01,0x18,0x0A,0x7D, + 0x00,0x17,0x0C,0x7D,0x7F,0x17,0x0E,0x7C,0x7E,0x15,0x0F,0x7E,0x7E,0x14,0x11,0x7D, + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x17,0x7E, + 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x18,0x03,0x7D,0x07,0x19,0x03, + + 0x05,0x18,0x05,0x7E,0x04,0x18,0x07,0x7D,0x03,0x18,0x09,0x7C,0x02,0x17,0x0A,0x7D, + 0x01,0x17,0x0C,0x7C,0x00,0x16,0x0E,0x7C,0x7F,0x15,0x0F,0x7D,0x7E,0x14,0x11,0x7D, + 0x7E,0x12,0x12,0x7E,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x16,0x7F, + 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x17,0x02,0x7D,0x09,0x18,0x02,0x7D,0x07,0x18,0x04, + + /* NTSC/PAL-M/525i 800x600 */ + + 0x07,0x15,0x07,0x7D,0x05,0x15,0x08,0x7E,0x04,0x15,0x09,0x7E,0x03,0x15,0x0B,0x7D, + 0x02,0x14,0x0C,0x7E,0x01,0x14,0x0D,0x7E,0x00,0x13,0x0F,0x7E,0x00,0x12,0x10,0x7E, + 0x7F,0x11,0x11,0x7F,0x7E,0x10,0x12,0x00,0x7E,0x0F,0x13,0x00,0x7E,0x0D,0x14,0x01, + 0x7D,0x0C,0x14,0x03,0x7D,0x0B,0x15,0x03,0x7D,0x09,0x15,0x05,0x7D,0x08,0x15,0x06, + + 0x07,0x15,0x07,0x7D,0x06,0x15,0x08,0x7D,0x05,0x15,0x09,0x7D,0x04,0x14,0x0B,0x7D, + 0x03,0x14,0x0C,0x7D,0x02,0x13,0x0D,0x7E,0x01,0x13,0x0E,0x7E,0x00,0x12,0x10,0x7E, + 0x7F,0x11,0x11,0x7F,0x7F,0x10,0x12,0x7F,0x7E,0x0E,0x13,0x01,0x7E,0x0D,0x13,0x02, + 0x7E,0x0C,0x14,0x02,0x7D,0x0B,0x14,0x04,0x7D,0x09,0x15,0x05,0x7D,0x08,0x15,0x06, + + 0x07,0x14,0x07,0x7E,0x06,0x14,0x08,0x7E,0x05,0x14,0x0A,0x7D,0x04,0x14,0x0B,0x7D, + 0x03,0x13,0x0C,0x7E,0x02,0x13,0x0D,0x7E,0x01,0x12,0x0E,0x7F,0x00,0x11,0x0F,0x00, + 0x00,0x10,0x10,0x00,0x7F,0x0F,0x11,0x01,0x7F,0x0E,0x12,0x01,0x7E,0x0D,0x13,0x02, + 0x7E,0x0C,0x13,0x03,0x7E,0x0B,0x14,0x03,0x7D,0x0A,0x14,0x05,0x7D,0x08,0x14,0x07, + + 0x07,0x14,0x07,0x7E,0x06,0x14,0x09,0x7D,0x05,0x14,0x0A,0x7D,0x04,0x13,0x0B,0x7E, + 0x03,0x13,0x0C,0x7E,0x02,0x12,0x0D,0x7F,0x01,0x12,0x0E,0x7F,0x01,0x11,0x0F,0x7F, + 0x00,0x10,0x10,0x00,0x7F,0x0F,0x11,0x01,0x7F,0x0E,0x12,0x01,0x7E,0x0D,0x12,0x03, + 0x7E,0x0C,0x13,0x03,0x7E,0x0B,0x13,0x04,0x7E,0x0A,0x14,0x04,0x7D,0x09,0x14,0x06, + + 0x08,0x13,0x08,0x7D,0x07,0x13,0x09,0x7D,0x05,0x13,0x0A,0x7E,0x04,0x13,0x0B,0x7E, + 0x04,0x12,0x0C,0x7E,0x03,0x12,0x0D,0x7E,0x02,0x11,0x0E,0x7F,0x01,0x10,0x0F,0x00, + 0x00,0x10,0x10,0x00,0x00,0x0F,0x10,0x01,0x7F,0x0E,0x11,0x02,0x7F,0x0D,0x12,0x02, + 0x7E,0x0C,0x12,0x04,0x7E,0x0B,0x13,0x04,0x7E,0x0A,0x13,0x05,0x7E,0x09,0x13,0x06, + + 0x08,0x13,0x08,0x7D,0x07,0x13,0x09,0x7D,0x06,0x12,0x0A,0x7E,0x05,0x12,0x0B,0x7E, + 0x04,0x12,0x0C,0x7E,0x03,0x11,0x0D,0x7F,0x02,0x11,0x0E,0x7F,0x01,0x10,0x0E,0x01, + 0x01,0x0F,0x0F,0x01,0x00,0x0E,0x10,0x02,0x00,0x0E,0x11,0x01,0x7F,0x0D,0x11,0x03, + 0x7F,0x0C,0x12,0x03,0x7E,0x0B,0x12,0x05,0x7E,0x0A,0x12,0x06,0x7E,0x09,0x13,0x06, + + 0x08,0x12,0x08,0x7E,0x07,0x12,0x09,0x7E,0x06,0x12,0x0A,0x7E,0x05,0x12,0x0B,0x7E, + 0x04,0x11,0x0C,0x7F,0x03,0x11,0x0D,0x7F,0x02,0x10,0x0D,0x01,0x02,0x10,0x0E,0x00, + 0x01,0x0F,0x0F,0x01,0x00,0x0E,0x10,0x02,0x00,0x0D,0x10,0x03,0x7F,0x0D,0x11,0x03, + 0x7F,0x0C,0x11,0x04,0x7F,0x0B,0x12,0x04,0x7E,0x0A,0x12,0x06,0x7E,0x09,0x12,0x07, + + /* PAL/PAL-N 640x480 */ + + 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, + 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, + 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E, + + 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, + 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, + 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E, + + 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, + 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, + 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E, + + 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, + 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, + 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E, + + 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, + 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, + 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E, + + 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, + 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, + 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E, + + 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, + 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x11,0x17,0x7C,0x7D,0x0E,0x19,0x7C,0x7E,0x0B,0x1B,0x7C, + 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E, + + /* PAL/PAL-N 720x576, 768x576 */ + + 0x03,0x1C,0x03,0x7E,0x01,0x1C,0x05,0x7E,0x00,0x1C,0x07,0x7D,0x7F,0x1B,0x09,0x7D, + 0x7E,0x1A,0x0B,0x7D,0x7D,0x19,0x0D,0x7D,0x7D,0x18,0x0F,0x7C,0x7C,0x16,0x12,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x16,0x7C,0x7C,0x0F,0x18,0x7D,0x7C,0x0D,0x19,0x7E, + 0x7D,0x0B,0x1A,0x7E,0x7D,0x09,0x1B,0x7F,0x7E,0x07,0x1C,0x7F,0x7E,0x05,0x1C,0x01, + + 0x03,0x1B,0x03,0x7F,0x02,0x1B,0x05,0x7E,0x01,0x1B,0x07,0x7D,0x7F,0x1B,0x09,0x7D, + 0x7E,0x1A,0x0B,0x7D,0x7E,0x19,0x0D,0x7C,0x7D,0x17,0x10,0x7C,0x7C,0x16,0x12,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x16,0x7C,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x19,0x7E, + 0x7D,0x0B,0x1A,0x7E,0x7D,0x09,0x1B,0x7F,0x7D,0x07,0x1B,0x01,0x7E,0x05,0x1B,0x02, + + 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D, + 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F, + 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1B,0x02, + + 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x1A,0x09,0x7D, + 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C, + 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E, + 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02, + + 0x04,0x19,0x04,0x7F,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x19,0x0A,0x7C, + 0x7F,0x18,0x0C,0x7D,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x10,0x7C,0x7D,0x15,0x11,0x7D, + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x15,0x7D,0x7C,0x10,0x16,0x7E,0x7C,0x0E,0x17,0x7F, + 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04, + + 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D, + 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D, + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E, + 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04, + + 0x05,0x18,0x05,0x7E,0x04,0x18,0x07,0x7D,0x03,0x18,0x08,0x7D,0x01,0x18,0x0A,0x7D, + 0x00,0x17,0x0C,0x7D,0x7F,0x16,0x0E,0x7D,0x7F,0x15,0x0F,0x7D,0x7E,0x14,0x11,0x7D, + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x16,0x7F, + 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x18,0x03,0x7D,0x07,0x18,0x04, + + /* PAL/PAL-N 800x600 */ + + 0x04,0x1A,0x04,0x7E,0x02,0x1A,0x05,0x7F,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D, + 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C, + 0x7C,0x14,0x14,0x7C,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0D,0x18,0x7F, + 0x7D,0x0B,0x19,0x7F,0x7D,0x09,0x1A,0x00,0x7D,0x07,0x1A,0x02,0x7E,0x05,0x1A,0x03, + + 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D, + 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C, + 0x7D,0x13,0x13,0x7D,0x7C,0x12,0x15,0x7D,0x7C,0x10,0x17,0x7D,0x7C,0x0E,0x18,0x7E, + 0x7D,0x0C,0x19,0x7E,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x1A,0x01,0x7E,0x06,0x1A,0x02, + + 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x19,0x0A,0x7C, + 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x10,0x7C,0x7D,0x15,0x11,0x7D, + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x15,0x7D,0x7C,0x10,0x16,0x7E,0x7C,0x0E,0x17,0x7F, + 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x19,0x00,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04, + + 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D, + 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D, + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x16,0x7E,0x7D,0x0E,0x17,0x7E, + 0x7D,0x0C,0x18,0x7F,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x19,0x02,0x7D,0x06,0x19,0x04, + + 0x05,0x18,0x05,0x7E,0x04,0x18,0x07,0x7D,0x03,0x18,0x08,0x7D,0x01,0x18,0x0A,0x7D, + 0x00,0x17,0x0C,0x7D,0x7F,0x16,0x0E,0x7D,0x7F,0x15,0x0F,0x7D,0x7E,0x14,0x11,0x7D, + 0x7D,0x13,0x13,0x7D,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x16,0x7F, + 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x18,0x01,0x7D,0x08,0x18,0x03,0x7D,0x07,0x18,0x04, + + 0x06,0x18,0x06,0x7C,0x04,0x18,0x07,0x7D,0x03,0x18,0x09,0x7C,0x02,0x17,0x0A,0x7D, + 0x01,0x17,0x0C,0x7C,0x00,0x16,0x0E,0x7C,0x7F,0x15,0x0F,0x7D,0x7E,0x14,0x11,0x7D, + 0x7E,0x12,0x12,0x7E,0x7D,0x11,0x14,0x7E,0x7D,0x0F,0x15,0x7F,0x7D,0x0E,0x16,0x7F, + 0x7D,0x0C,0x17,0x00,0x7D,0x0A,0x17,0x02,0x7D,0x09,0x18,0x02,0x7D,0x07,0x18,0x04, + + 0x06,0x17,0x06,0x7D,0x05,0x17,0x07,0x7D,0x03,0x17,0x09,0x7D,0x02,0x17,0x0A,0x7D, + 0x01,0x16,0x0C,0x7D,0x00,0x15,0x0E,0x7D,0x7F,0x14,0x0F,0x7E,0x7F,0x13,0x11,0x7D, + 0x7E,0x12,0x12,0x7E,0x7E,0x11,0x13,0x7E,0x7D,0x0F,0x14,0x00,0x7D,0x0E,0x15,0x00, + 0x7D,0x0C,0x16,0x01,0x7D,0x0A,0x17,0x02,0x7D,0x09,0x17,0x03,0x7D,0x07,0x17,0x05 +}; + + +/* Mandatory functions */ +static void XGIIdentify(int flags); +static Bool XGIProbe(DriverPtr drv, int flags); +static Bool XGIPreInit(ScrnInfoPtr pScrn, int flags); +static Bool XGIScreenInit(int Index, ScreenPtr pScreen, int argc, char **argv); +static Bool XGIEnterVT(int scrnIndex, int flags); +static void XGILeaveVT(int scrnIndex, int flags); +static Bool XGICloseScreen(int scrnIndex, ScreenPtr pScreen); +static Bool XGISaveScreen(ScreenPtr pScreen, int mode); +static Bool XGISwitchMode(int scrnIndex, DisplayModePtr mode, int flags); +static void XGIAdjustFrame(int scrnIndex, int x, int y, int flags); +#ifdef XGIDUALHEAD +static Bool XGISaveScreenDH(ScreenPtr pScreen, int mode); +#endif + +/* Optional functions */ +static void XGIFreeScreen(int scrnIndex, int flags); + +static ModeStatus XGIValidMode(int scrnIndex, DisplayModePtr mode, + Bool verbose, int flags); +/* Internally used functions */ +static Bool XGIMapMem(ScrnInfoPtr pScrn); +static Bool XGIUnmapMem(ScrnInfoPtr pScrn); +static void XGISave(ScrnInfoPtr pScrn); +static void XGIRestore(ScrnInfoPtr pScrn); +static void XGIVESARestore(ScrnInfoPtr pScrn); +static Bool XGIModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode); +static void XGIModifyModeInfo(DisplayModePtr mode); +static void XGIPreSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int viewmode); +static void XGIPostSetMode(ScrnInfoPtr pScrn, XGIRegPtr xgiReg); + +static Bool XGISetVESAMode(ScrnInfoPtr pScrn, DisplayModePtr pMode); +static void XGIBuildVesaModeList(ScrnInfoPtr pScrn, vbeInfoPtr pVbe, VbeInfoBlock *vbe); +static UShort XGICalcVESAModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode); +static void XGIVESASaveRestore(ScrnInfoPtr pScrn, vbeSaveRestoreFunction function); +static void XGIBridgeRestore(ScrnInfoPtr pScrn); +static void XGIEnableTurboQueue(ScrnInfoPtr pScrn); +unsigned char XGISearchCRT1Rate(ScrnInfoPtr pScrn, DisplayModePtr mode); +static void XGIWaitVBRetrace(ScrnInfoPtr pScrn); +void XGIWaitRetraceCRT1(ScrnInfoPtr pScrn); +void XGIWaitRetraceCRT2(ScrnInfoPtr pScrn); +/* static Bool InRegion(int x, int y, region r); */ +/* #ifdef XGIMERGED +static void XGIMergePointerMoved(int scrnIndex, int x, int y); +#endif */ +USHORT XGI_CalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode, + unsigned long VBFlags, BOOLEAN hcm); +USHORT XGI_CheckCalcModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode, + unsigned long VBFlags, BOOLEAN hcm); +unsigned char XGI_GetSetBIOSScratch(ScrnInfoPtr pScrn, USHORT offset, unsigned char value); +#ifdef DEBUG +static void XGIDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode); +#endif + +extern USHORT XGI_GetModeID(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, + int Depth, BOOL FSTN, int LCDwith, int LCDheight); + +extern BOOLEAN XGIBIOSSetMode(XGI_Private *XGI_Pr, PXGI_HW_DEVICE_INFO HwDeviceExtension, + ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom, BOOLEAN dosetpitch); +extern BOOLEAN XGISetMode(XGI_Private *XGI_Pr, PXGI_HW_DEVICE_INFO HwDeviceExtension, + ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch); +extern void XGIRegInit(XGI_Private *XGI_Pr, USHORT BaseAddr); +extern void XGI_New_GetVBType(XGI_Private *XGI_Pr, PXGI_HW_DEVICE_INFO); + +extern BOOLEAN XGIBIOSSetModeCRT1(XGI_Private *XGI_Pr, PXGI_HW_DEVICE_INFO HwDeviceExtension, + ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom); + +/* For power management for 315 series */ +extern void XGI_Chrontel701xBLOn(XGI_Private *XGI_Pr, PXGI_HW_DEVICE_INFO HwDeviceExtension); +extern void XGI_Chrontel701xBLOff(XGI_Private *XGI_Pr); +extern void XGI_XGI30xBLOn(XGI_Private *XGI_Pr, PXGI_HW_DEVICE_INFO HwDeviceExtension); +extern void XGI_XGI30xBLOff(XGI_Private *XGI_Pr, PXGI_HW_DEVICE_INFO HwDeviceExtension); + + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_opt.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_opt.c:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_opt.c Mon May 2 09:28:02 2005 @@ -0,0 +1,807 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_opt.c,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ +/* + * Video driver option evaluation + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1) Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2) Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3) The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * "NoAccel", "NoXVideo", "SWCursor", "HWCursor" and "Rotate" option portions + * Copyright (C) 1999-2004 The XFree86 Project, Inc. Licensed under the terms + * of the XFree86 license (http://www.xfree86.org/current/LICENSE1.html). + * + * Authors: Thomas Winischhofer + * ? + */ + +#include "xf86.h" +#include "xf86PciInfo.h" +#include "xf86str.h" +#include "xf86Cursor.h" + +#include "xgi.h" + +extern const customttable mycustomttable[]; + +typedef enum { + OPTION_SW_CURSOR, + OPTION_HW_CURSOR, + OPTION_NOACCEL, + OPTION_TURBOQUEUE, + OPTION_FAST_VRAM, + OPTION_NOHOSTBUS, + OPTION_RENDER, + OPTION_FORCE_CRT1TYPE, + OPTION_FORCE_CRT2TYPE, + OPTION_YPBPRAR, + OPTION_SHADOW_FB, + OPTION_DRI, + OPTION_AGP_SIZE, + OPTION_AGP_SIZE2, + OPTION_ROTATE, + OPTION_NOXVIDEO, + OPTION_VESA, + OPTION_MAXXFBMEM, + OPTION_FORCECRT1, + OPTION_XVONCRT2, + OPTION_PDC, + OPTION_PDCA, + OPTION_PDCS, + OPTION_PDCAS, + OPTION_EMI, + OPTION_TVSTANDARD, + OPTION_USEROMDATA, + OPTION_NOINTERNALMODES, + OPTION_USEOEM, + OPTION_NOYV12, + OPTION_CHTVOVERSCAN, + OPTION_CHTVSOVERSCAN, + OPTION_CHTVLUMABANDWIDTHCVBS, + OPTION_CHTVLUMABANDWIDTHSVIDEO, + OPTION_CHTVLUMAFLICKERFILTER, + OPTION_CHTVCHROMABANDWIDTH, + OPTION_CHTVCHROMAFLICKERFILTER, + OPTION_CHTVCVBSCOLOR, + OPTION_CHTVTEXTENHANCE, + OPTION_CHTVCONTRAST, + OPTION_XGITVEDGEENHANCE, + OPTION_XGITVANTIFLICKER, + OPTION_XGITVSATURATION, + OPTION_XGITVCHROMAFILTER, + OPTION_XGITVLUMAFILTER, + OPTION_XGITVCOLCALIBFINE, + OPTION_XGITVCOLCALIBCOARSE, + OPTION_TVXPOSOFFSET, + OPTION_TVYPOSOFFSET, + OPTION_TVXSCALE, + OPTION_TVYSCALE, + OPTION_XGI6326ANTIFLICKER, + OPTION_XGI6326ENABLEYFILTER, + OPTION_XGI6326YFILTERSTRONG, + OPTION_XGI6326FORCETVPPLUG, + OPTION_XGI6326FSCADJUST, + OPTION_CHTVTYPE, + OPTION_USERGBCURSOR, + OPTION_USERGBCURSORBLEND, + OPTION_USERGBCURSORBLENDTH, + OPTION_RESTOREBYSET, + OPTION_NODDCFORCRT2, + OPTION_FORCECRT2REDETECTION, + OPTION_SENSEYPBPR, + OPTION_CRT1GAMMA, + OPTION_CRT2GAMMA, + OPTION_XVGAMMA, + OPTION_XVDEFCONTRAST, + OPTION_XVDEFBRIGHTNESS, + OPTION_XVDEFHUE, + OPTION_XVDEFSATURATION, + OPTION_XVDEFDISABLEGFX, + OPTION_XVDEFDISABLEGFXLR, + OPTION_XVMEMCPY, + OPTION_XVUSECHROMAKEY, + OPTION_XVCHROMAMIN, + OPTION_XVCHROMAMAX, + OPTION_XVDISABLECOLORKEY, + OPTION_XVINSIDECHROMAKEY, + OPTION_XVYUVCHROMAKEY, + OPTION_SCALELCD, + OPTION_CENTERLCD, + OPTION_SPECIALTIMING, + OPTION_LVDSHL, + OPTION_ENABLEHOTKEY, + OPTION_MERGEDFB, + OPTION_MERGEDFBAUTO, + OPTION_CRT2HSYNC, + OPTION_CRT2VREFRESH, + OPTION_CRT2POS, + OPTION_METAMODES, + OPTION_MERGEDFB2, + OPTION_CRT2HSYNC2, + OPTION_CRT2VREFRESH2, + OPTION_CRT2POS2, + OPTION_NOXGIXINERAMA, + OPTION_NOXGIXINERAMA2, + OPTION_CRT2ISSCRN0, + OPTION_MERGEDDPI, + OPTION_ENABLEXGICTRL, + OPTION_STOREDBRI, + OPTION_STOREDPBRI, +#ifdef XGI_CP + XGI_CP_OPT_OPTIONS +#endif + OPTION_PSEUDO +} XGIOpts; + +static const OptionInfoRec XGIOptions[] = { + { OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_TURBOQUEUE, "TurboQueue", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_FAST_VRAM, "FastVram", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_NOHOSTBUS, "NoHostBus", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_RENDER, "RenderAcceleration", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_FORCE_CRT1TYPE, "ForceCRT1Type", OPTV_STRING, {0}, FALSE }, + { OPTION_FORCE_CRT2TYPE, "ForceCRT2Type", OPTV_STRING, {0}, FALSE }, + { OPTION_YPBPRAR, "YPbPrAspectRatio", OPTV_STRING, {0}, FALSE }, + { OPTION_SHADOW_FB, "ShadowFB", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_DRI, "DRI", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_AGP_SIZE, "AGPSize", OPTV_INTEGER, {0}, FALSE }, + { OPTION_AGP_SIZE2, "GARTSize", OPTV_INTEGER, {0}, FALSE }, + { OPTION_ROTATE, "Rotate", OPTV_STRING, {0}, FALSE }, + { OPTION_NOXVIDEO, "NoXvideo", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_VESA, "Vesa", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_MAXXFBMEM, "MaxXFBMem", OPTV_INTEGER, {0}, -1 }, + { OPTION_FORCECRT1, "ForceCRT1", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_XVONCRT2, "XvOnCRT2", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_PDC, "PanelDelayCompensation", OPTV_INTEGER, {0}, -1 }, + { OPTION_PDCA, "PanelDelayCompensation1",OPTV_INTEGER, {0}, -1 }, + { OPTION_PDCS, "PDC", OPTV_INTEGER, {0}, -1 }, + { OPTION_PDCAS, "PDC1", OPTV_INTEGER, {0}, -1 }, + { OPTION_EMI, "EMI", OPTV_INTEGER, {0}, -1 }, + { OPTION_LVDSHL, "LVDSHL", OPTV_INTEGER, {0}, -1 }, + { OPTION_SPECIALTIMING, "SpecialTiming", OPTV_STRING, {0}, -1 }, + { OPTION_TVSTANDARD, "TVStandard", OPTV_STRING, {0}, -1 }, + { OPTION_USEROMDATA, "UseROMData", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_NOINTERNALMODES, "NoInternalModes", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_USEOEM, "UseOEMData", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_NOYV12, "NoYV12", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_CHTVTYPE, "CHTVType", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_CHTVOVERSCAN, "CHTVOverscan", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_CHTVSOVERSCAN, "CHTVSuperOverscan", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_CHTVLUMABANDWIDTHCVBS, "CHTVLumaBandwidthCVBS", OPTV_INTEGER, {0}, -1 }, + { OPTION_CHTVLUMABANDWIDTHSVIDEO, "CHTVLumaBandwidthSVIDEO",OPTV_INTEGER, {0}, -1 }, + { OPTION_CHTVLUMAFLICKERFILTER, "CHTVLumaFlickerFilter", OPTV_INTEGER, {0}, -1 }, + { OPTION_CHTVCHROMABANDWIDTH, "CHTVChromaBandwidth", OPTV_INTEGER, {0}, -1 }, + { OPTION_CHTVCHROMAFLICKERFILTER, "CHTVChromaFlickerFilter",OPTV_INTEGER, {0}, -1 }, + { OPTION_CHTVCVBSCOLOR, "CHTVCVBSColor", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_CHTVTEXTENHANCE, "CHTVTextEnhance", OPTV_INTEGER, {0}, -1 }, + { OPTION_CHTVCONTRAST, "CHTVContrast", OPTV_INTEGER, {0}, -1 }, + { OPTION_XGITVEDGEENHANCE, "XGITVEdgeEnhance", OPTV_INTEGER, {0}, -1 }, + { OPTION_XGITVANTIFLICKER, "XGITVAntiFlicker", OPTV_STRING, {0}, FALSE }, + { OPTION_XGITVSATURATION, "XGITVSaturation", OPTV_INTEGER, {0}, -1 }, + { OPTION_XGITVCHROMAFILTER, "XGITVCFilter", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_XGITVLUMAFILTER, "XGITVYFilter", OPTV_INTEGER, {0}, -1 }, + { OPTION_XGITVCOLCALIBFINE, "XGITVColorCalibFine", OPTV_INTEGER, {0}, -1 }, + { OPTION_XGITVCOLCALIBCOARSE, "XGITVColorCalibCoarse", OPTV_INTEGER, {0}, -1 }, + { OPTION_TVXSCALE, "XGITVXScale", OPTV_INTEGER, {0}, -1 }, + { OPTION_TVYSCALE, "XGITVYScale", OPTV_INTEGER, {0}, -1 }, + { OPTION_TVXPOSOFFSET, "TVXPosOffset", OPTV_INTEGER, {0}, -1 }, + { OPTION_TVYPOSOFFSET, "TVYPosOffset", OPTV_INTEGER, {0}, -1 }, + { OPTION_XGI6326ANTIFLICKER, "XGI6326TVAntiFlicker", OPTV_STRING, {0}, FALSE }, + { OPTION_XGI6326ENABLEYFILTER, "XGI6326TVEnableYFilter", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_XGI6326YFILTERSTRONG, "XGI6326TVYFilterStrong", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_XGI6326FORCETVPPLUG, "XGI6326TVForcePlug", OPTV_STRING, {0}, -1 }, + { OPTION_XGI6326FSCADJUST, "XGI6326FSCAdjust", OPTV_INTEGER, {0}, -1 }, + { OPTION_USERGBCURSOR, "UseColorHWCursor", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_USERGBCURSORBLEND, "ColorHWCursorBlending", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_USERGBCURSORBLENDTH, "ColorHWCursorBlendThreshold", OPTV_INTEGER,{0},-1 }, + { OPTION_RESTOREBYSET, "RestoreBySetMode", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_NODDCFORCRT2, "NoCRT2Detection", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_FORCECRT2REDETECTION, "ForceCRT2ReDetection", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_SENSEYPBPR, "SenseYPbPr", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_CRT1GAMMA, "CRT1Gamma", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_CRT2GAMMA, "CRT2Gamma", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_STOREDBRI, "StoredGammaBrightness", OPTV_STRING, {0}, -1 }, + { OPTION_STOREDPBRI, "StoredGammaPreBrightness",OPTV_STRING, {0}, -1 }, + { OPTION_XVGAMMA, "XvGamma", OPTV_STRING, {0}, -1 }, + { OPTION_XVDEFCONTRAST, "XvDefaultContrast", OPTV_INTEGER, {0}, -1 }, + { OPTION_XVDEFBRIGHTNESS, "XvDefaultBrightness", OPTV_INTEGER, {0}, -1 }, + { OPTION_XVDEFHUE, "XvDefaultHue", OPTV_INTEGER, {0}, -1 }, + { OPTION_XVDEFSATURATION, "XvDefaultSaturation", OPTV_INTEGER, {0}, -1 }, + { OPTION_XVDEFDISABLEGFX, "XvDefaultDisableGfx", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_XVDEFDISABLEGFXLR, "XvDefaultDisableGfxLR", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_XVCHROMAMIN, "XvChromaMin", OPTV_INTEGER, {0}, -1 }, + { OPTION_XVCHROMAMAX, "XvChromaMax", OPTV_INTEGER, {0}, -1 }, + { OPTION_XVUSECHROMAKEY, "XvUseChromaKey", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_XVINSIDECHROMAKEY, "XvInsideChromaKey", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_XVYUVCHROMAKEY, "XvYUVChromaKey", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_XVDISABLECOLORKEY, "XvDisableColorKey", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_XVMEMCPY, "XvUseMemcpy", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_SCALELCD, "ScaleLCD", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_CENTERLCD, "CenterLCD", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_ENABLEHOTKEY, "EnableHotkey", OPTV_BOOLEAN, {0}, -1 }, + { OPTION_ENABLEXGICTRL, "EnableXGICtrl", OPTV_BOOLEAN, {0}, -1 }, +#ifdef XGIMERGED + { OPTION_MERGEDFB, "MergedFB", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_MERGEDFB2, "TwinView", OPTV_BOOLEAN, {0}, FALSE }, /* alias */ + { OPTION_MERGEDFBAUTO, "MergedFBAuto", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_CRT2HSYNC, "CRT2HSync", OPTV_STRING, {0}, FALSE }, + { OPTION_CRT2HSYNC2, "SecondMonitorHorizSync", OPTV_STRING, {0}, FALSE }, /* alias */ + { OPTION_CRT2VREFRESH, "CRT2VRefresh", OPTV_STRING, {0}, FALSE }, + { OPTION_CRT2VREFRESH2, "SecondMonitorVertRefresh", OPTV_STRING, {0}, FALSE }, /* alias */ + { OPTION_CRT2POS, "CRT2Position", OPTV_STRING, {0}, FALSE }, + { OPTION_CRT2POS2, "TwinViewOrientation", OPTV_STRING, {0}, FALSE }, /* alias */ + { OPTION_METAMODES, "MetaModes", OPTV_STRING, {0}, FALSE }, + { OPTION_MERGEDDPI, "MergedDPI", OPTV_STRING, {0}, FALSE }, +#ifdef XGIXINERAMA + { OPTION_NOXGIXINERAMA, "NoMergedXinerama", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_NOXGIXINERAMA2, "NoTwinviewXineramaInfo", OPTV_BOOLEAN, {0}, FALSE }, /* alias */ + { OPTION_CRT2ISSCRN0, "MergedXineramaCRT2IsScreen0",OPTV_BOOLEAN,{0},FALSE }, +#endif +#endif +#ifdef XGI_CP + XGI_CP_OPTION_DETAIL +#endif + { -1, NULL, OPTV_NONE, {0}, FALSE } +}; + +void +xgiOptions(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + MessageType from; + char *strptr; + static const char *mybadparm = "\"%s\" is is not a valid parameter for option \"%s\"\n"; + static const char *disabledstr = "disabled"; + static const char *enabledstr = "enabled"; + static const char *ilrangestr = "Illegal %s parameter. Valid range is %d through %d\n"; + + /* Collect all of the relevant option flags (fill in pScrn->options) */ + xf86CollectOptions(pScrn, NULL); + + /* Process the options */ + if(!(pXGI->Options = xalloc(sizeof(XGIOptions)))) return; + + memcpy(pXGI->Options, XGIOptions, sizeof(XGIOptions)); + + xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pXGI->Options); + + /* Set defaults */ + + pXGI->newFastVram = -1; + pXGI->NoHostBus = FALSE; + pXGI->TurboQueue = TRUE; +#ifdef XGIVRAMQ + /* TODO: Option (315 series VRAM command queue) */ + /* But beware: xgifb does not know about this!!! */ + pXGI->cmdQueueSize = 512*1024; +#endif + pXGI->doRender = TRUE; + pXGI->HWCursor = TRUE; + pXGI->Rotate = FALSE; + pXGI->ShadowFB = FALSE; + pXGI->loadDRI = FALSE; + pXGI->agpWantedPages = AGP_PAGES; + pXGI->VESA = -1; + pXGI->NoXvideo = FALSE; + pXGI->maxxfbmem = 0; + pXGI->forceCRT1 = -1; + pXGI->DSTN = FALSE; + pXGI->FSTN = FALSE; + pXGI->XvOnCRT2 = FALSE; + pXGI->NoYV12 = -1; + pXGI->PDC = -1; + pXGI->PDCA = -1; + pXGI->EMI = -1; + pXGI->OptTVStand = -1; + pXGI->OptROMUsage = -1; + pXGI->noInternalModes = FALSE; + pXGI->OptUseOEM = -1; + pXGI->OptTVOver = -1; + pXGI->OptTVSOver = -1; + pXGI->chtvlumabandwidthcvbs = -1; + pXGI->chtvlumabandwidthsvideo = -1; + pXGI->chtvlumaflickerfilter = -1; + pXGI->chtvchromabandwidth = -1; + pXGI->chtvchromaflickerfilter = -1; + pXGI->chtvcvbscolor = -1; + pXGI->chtvtextenhance = -1; + pXGI->chtvcontrast = -1; + pXGI->xgitvedgeenhance = -1; + pXGI->xgitvantiflicker = -1; + pXGI->xgitvsaturation = -1; + pXGI->xgitvcfilter = -1; + pXGI->xgitvyfilter = 1; /* 0 = off, 1 = default, 2-8 = filter no */ + pXGI->xgitvcolcalibc = 0; + pXGI->xgitvcolcalibf = 0; + pXGI->xgi6326enableyfilter = -1; + pXGI->xgi6326yfilterstrong = -1; + pXGI->xgi6326tvplug = -1; + pXGI->xgi6326fscadjust = 0; + pXGI->tvxpos = 0; + pXGI->tvypos = 0; + pXGI->tvxscale = 0; + pXGI->tvyscale = 0; + pXGI->NonDefaultPAL = pXGI->NonDefaultNTSC = -1; + pXGI->chtvtype = -1; + pXGI->restorebyset = TRUE; + pXGI->nocrt2ddcdetection = FALSE; + pXGI->forcecrt2redetection = TRUE; /* default changed since 13/09/2003 */ + pXGI->SenseYPbPr = TRUE; + pXGI->ForceCRT1Type = CRT1_VGA; + pXGI->ForceCRT2Type = CRT2_DEFAULT; + pXGI->ForceYPbPrAR = TV_YPBPR169; + pXGI->ForceTVType = -1; + pXGI->CRT1gamma = TRUE; + pXGI->CRT1gammaGiven = FALSE; + pXGI->CRT2gamma = TRUE; + pXGI->XvGamma = FALSE; + pXGI->XvGammaGiven = FALSE; + pXGI->enablexgictrl = FALSE; + + pXGI->XvDefBri = 0; + pXGI->XvDefCon = 4; + + pXGI->XvDefHue = 0; + pXGI->XvDefSat = 0; + pXGI->XvDefDisableGfx = FALSE; + pXGI->XvDefDisableGfxLR = FALSE; + pXGI->UsePanelScaler = -1; + pXGI->CenterLCD = -1; + pXGI->XvUseMemcpy = TRUE; + pXGI->XvUseChromaKey = FALSE; + pXGI->XvDisableColorKey = FALSE; + pXGI->XvInsideChromaKey = FALSE; + pXGI->XvYUVChromaKey = FALSE; + pXGI->XvChromaMin = 0x000101fe; + pXGI->XvChromaMax = 0x000101ff; + pXGI->XvGammaRed = pXGI->XvGammaGreen = pXGI->XvGammaBlue = + pXGI->XvGammaRedDef = pXGI->XvGammaGreenDef = pXGI->XvGammaBlueDef = 1000; + pXGI->GammaBriR = pXGI->GammaBriG = pXGI->GammaBriB = 1000; + pXGI->GammaPBriR = pXGI->GammaPBriG = pXGI->GammaPBriB = 1000; + pXGI->HideHWCursor = FALSE; + pXGI->HWCursorIsVisible = FALSE; +#ifdef XGIMERGED + pXGI->MergedFB = pXGI->MergedFBAuto = FALSE; + pXGI->CRT2Position = xgiRightOf; + pXGI->CRT2HSync = NULL; + pXGI->CRT2VRefresh = NULL; + pXGI->MetaModes = NULL; + pXGI->MergedFBXDPI = pXGI->MergedFBYDPI = 0; +#ifdef XGIXINERAMA + pXGI->UsexgiXinerama = TRUE; + pXGI->CRT2IsScrn0 = FALSE; +#endif +#endif +#ifdef XGI_CP + XGI_CP_OPT_DEFAULT +#endif + +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + pXGI->OptUseColorCursor = 0; +#endif + + /* Collect the options */ + + /* FastVRAM (5597/5598, 6326 and 530/620 only) + */ + if((pXGI->VGAEngine == XGI_OLD_VGA) || (pXGI->VGAEngine == XGI_530_VGA)) { + from = X_DEFAULT; + if(xf86GetOptValBool(pXGI->Options, OPTION_FAST_VRAM, &pXGI->newFastVram)) { + from = X_CONFIG; + } + xf86DrvMsg(pScrn->scrnIndex, from, "Fast VRAM %s\n", + (pXGI->newFastVram == -1) ? + ((pXGI->oldChipset == OC_XGI620) ? "enabled (for read only)" : + "enabled (for write only)") : + (pXGI->newFastVram ? "enabled (for read and write)" : disabledstr)); + } + + /* MaxXFBMem + * This options limits the amount of video memory X uses for screen + * and off-screen buffers. This option should be used if using DRI + * is intended. The kernel framebuffer driver required for DRM will + * start its memory heap at 12MB if it detects more than 16MB, at 8MB if + * between 8 and 16MB are available, otherwise at 4MB. So, if the amount + * of memory X uses, a clash between the framebuffer's memory heap + * and X is avoided. The amount is to be specified in KB. + */ + if(xf86GetOptValULong(pXGI->Options, OPTION_MAXXFBMEM, + &pXGI->maxxfbmem)) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "MaxXFBMem: Framebuffer memory shall be limited to %ld KB\n", + pXGI->maxxfbmem); + pXGI->maxxfbmem *= 1024; + } + + /* NoAccel + * Turns off 2D acceleration + */ + if(xf86ReturnOptValBool(pXGI->Options, OPTION_NOACCEL, FALSE)) { + pXGI->NoAccel = TRUE; +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + pXGI->NoXvideo = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "2D Acceleration and Xv disabled\n"); +#else + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "2D Acceleration disabled\n"); +#endif + + } + + /* Disable XV support for XGI Z1 chip */ + if (PCI_CHIP_XGIXG20 == pXGI->Chipset) + pXGI->NoXvideo = TRUE; + + /* SWCursor + * HWCursor + * Chooses whether to use the hardware or software cursor + */ + from = X_DEFAULT; + if(xf86GetOptValBool(pXGI->Options, OPTION_HW_CURSOR, &pXGI->HWCursor)) { + from = X_CONFIG; + } + if(xf86ReturnOptValBool(pXGI->Options, OPTION_SW_CURSOR, FALSE)) { + from = X_CONFIG; + pXGI->HWCursor = FALSE; + pXGI->OptUseColorCursor = 0; + } + xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n", + pXGI->HWCursor ? "HW" : "SW"); + + /* + * MergedFB + * + * Enable/disable and configure merged framebuffer mode + * + */ +#ifdef XGIMERGED +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + Bool val; + if(xf86GetOptValBool(pXGI->Options, OPTION_MERGEDFB, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Option \"MergedFB\" cannot be used in Dual Head mode\n"); + } + } else +#endif +#endif + + /* Some options can only be specified in the Master Head's Device + * section. Here we give the user a hint in the log. + */ +#ifdef XGIDUALHEAD + if((pXGI->DualHeadMode) && (pXGI->SecondHead)) { + static const char *mystring = "Option \"%s\" is only accepted in Master Head's device section\n"; + Bool val; + int vali; + if(pXGI->VGAEngine != XGI_315_VGA) { + if(xf86GetOptValBool(pXGI->Options, OPTION_TURBOQUEUE, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "TurboQueue"); + } + } + if(xf86GetOptValBool(pXGI->Options, OPTION_RESTOREBYSET, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "RestoreBySetMode"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_ENABLEHOTKEY, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "EnableHotKey"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_ENABLEXGICTRL, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "EnableXGICtrl"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_USEROMDATA, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "UseROMData"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_USEOEM, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "UseOEMData"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_FORCECRT1, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "ForceCRT1"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_NODDCFORCRT2, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "NoCRT2Detection"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_FORCECRT2REDETECTION, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "ForceCRT2ReDetection"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_SENSEYPBPR, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "SenseYPbPr"); + } + if(xf86GetOptValString(pXGI->Options, OPTION_FORCE_CRT1TYPE)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "ForceCRT1Type"); + } + if(xf86GetOptValString(pXGI->Options, OPTION_FORCE_CRT2TYPE)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "ForceCRT2Type"); + } + if(xf86GetOptValString(pXGI->Options, OPTION_YPBPRAR)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "YPbPrAspectRatio"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_SCALELCD, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "ScaleLCD"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_CENTERLCD, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "CenterLCD"); + } + if((xf86GetOptValInteger(pXGI->Options, OPTION_PDC, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_PDCS, &vali))) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "PanelDelayCompensation (PDC)"); + } + if((xf86GetOptValInteger(pXGI->Options, OPTION_PDCA, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_PDCAS, &vali))) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "PanelDelayCompensation1 (PDC1)"); + } + if(xf86GetOptValInteger(pXGI->Options, OPTION_EMI, &vali)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "EMI"); + } + if(xf86GetOptValString(pXGI->Options, OPTION_SPECIALTIMING)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "SpecialTiming"); + } + if(xf86GetOptValString(pXGI->Options, OPTION_LVDSHL)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "LVDSHL"); + } + if(xf86GetOptValString(pXGI->Options, OPTION_TVSTANDARD)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "TVStandard"); + } + if(xf86GetOptValString(pXGI->Options, OPTION_CHTVTYPE)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "CHTVType"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_CHTVOVERSCAN, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "CHTVOverscan"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_CHTVSOVERSCAN, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "CHTVSuperOverscan"); + } + if((xf86GetOptValInteger(pXGI->Options, OPTION_CHTVLUMABANDWIDTHCVBS, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_CHTVLUMABANDWIDTHSVIDEO, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_CHTVLUMAFLICKERFILTER, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_CHTVCHROMABANDWIDTH, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_CHTVCHROMAFLICKERFILTER, &vali)) || + (xf86GetOptValBool(pXGI->Options, OPTION_CHTVCVBSCOLOR, &val)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_CHTVTEXTENHANCE, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_CHTVCONTRAST, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_XGITVEDGEENHANCE, &vali)) || + (xf86GetOptValString(pXGI->Options, OPTION_XGITVANTIFLICKER)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_XGITVSATURATION, &vali)) || + (xf86GetOptValBool(pXGI->Options, OPTION_XGITVCHROMAFILTER, &val)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_XGITVLUMAFILTER, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_XGITVCOLCALIBCOARSE, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_XGITVCOLCALIBFINE, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_TVXPOSOFFSET, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_TVYPOSOFFSET, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_TVXSCALE, &vali)) || + (xf86GetOptValInteger(pXGI->Options, OPTION_TVYSCALE, &vali))) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "TV related options are only accepted in Master Head's device section"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_CRT2GAMMA, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "CRT2Gamma"); + } + if(xf86GetOptValBool(pXGI->Options, OPTION_XVONCRT2, &val)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mystring, "XvOnCRT2"); + } +#ifdef XGI_CP + XGI_CP_OPT_DH_WARN +#endif + } else +#endif + { + /* TurboQueue */ + + from = X_DEFAULT; + if(xf86GetOptValBool(pXGI->Options, OPTION_TURBOQUEUE, &pXGI->TurboQueue)) { + from = X_CONFIG; + } + xf86DrvMsg(pScrn->scrnIndex, from, "TurboQueue %s\n", + pXGI->TurboQueue ? enabledstr : disabledstr); + +#ifdef XGI_CP + XGI_CP_OPT_DOOPT +#endif + + } /* DualHead */ + + /* CRT1Gamma - enable/disable gamma correction for CRT1 + */ + { + Bool val; + if(xf86GetOptValBool(pXGI->Options, OPTION_CRT1GAMMA, &val)) { + pXGI->CRT1gamma = val; + pXGI->CRT1gammaGiven = TRUE; + } + } + + /* VESA - DEPRECATED + * This option is for forcing the driver to use + * the VESA BIOS extension for mode switching. + */ + { + Bool val; + if(xf86GetOptValBool(pXGI->Options, OPTION_VESA, &val)) { + pXGI->VESA = val ? 1 : 0; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "VESA: VESA usage shall be %s\n", + val ? enabledstr : disabledstr); + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "*** Option \"VESA\" is deprecated. *** \n"); + if(pXGI->VESA) pXGI->ForceCRT1Type = CRT1_VGA; + } + } + + /* ShadowFB */ + from = X_DEFAULT; + if(xf86GetOptValBool(pXGI->Options, OPTION_SHADOW_FB, &pXGI->ShadowFB)) { +#ifdef XGIMERGED + if(pXGI->MergedFB) { + pXGI->ShadowFB = FALSE; + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Shadow Frame Buffer not supported in MergedFB mode\n"); + } else +#endif + from = X_CONFIG; + } + if(pXGI->ShadowFB) { + pXGI->NoAccel = TRUE; +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + pXGI->NoXvideo = TRUE; + xf86DrvMsg(pScrn->scrnIndex, from, + "Using \"Shadow Frame Buffer\" - 2D acceleration and Xv disabled\n"); +#else + xf86DrvMsg(pScrn->scrnIndex, from, + "Using \"Shadow Frame Buffer\" - 2D acceleration disabled\n"); +#endif + } + + /* Rotate */ + if((strptr = (char *)xf86GetOptValString(pXGI->Options, OPTION_ROTATE))) { +#ifdef XGIMERGED + if(pXGI->MergedFB) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Screen rotation not supported in MergedFB mode\n"); + } else +#endif + if(!xf86NameCmp(strptr, "CW")) { + pXGI->Rotate = 1; + } else if(!xf86NameCmp(strptr, "CCW")) { + pXGI->Rotate = -1; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, mybadparm, strptr, "Rotate"); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Valid parameters are \"CW\" or \"CCW\"\n"); + } + + if(pXGI->Rotate) { + pXGI->ShadowFB = TRUE; + pXGI->NoAccel = TRUE; + pXGI->HWCursor = FALSE; +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + pXGI->NoXvideo = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Rotating screen %sclockwise; (2D acceleration and Xv disabled)\n", + (pXGI->Rotate == -1) ? "counter " : ""); +#else + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Rotating screen %sclockwise (2D acceleration %sdisabled)\n", + (pXGI->Rotate == -1) ? "counter " : "", +#if XF86_VERSION_CURRENT >= XF86_VERSION_NUMERIC(4,3,0,0,0) + "and RandR extension " +#else + "" +#endif + ); + +#endif + + } + } + +#ifdef XF86DRI + /* DRI */ + from = X_DEFAULT; + if(xf86GetOptValBool(pXGI->Options, OPTION_DRI, &pXGI->loadDRI)) { + from = X_CONFIG; + } + xf86DrvMsg(pScrn->scrnIndex, from, "DRI %s\n", + pXGI->loadDRI ? enabledstr : disabledstr); + + /* AGPSize */ + { + int vali; + Bool gotit = FALSE; + if(xf86GetOptValInteger(pXGI->Options, OPTION_AGP_SIZE, &vali)) { + gotit = TRUE; + } else if(xf86GetOptValInteger(pXGI->Options, OPTION_AGP_SIZE2, &vali)) { + gotit = TRUE; + } + if(gotit) { + if((vali >= 8) && (vali <= 512)) { + pXGI->agpWantedPages = (vali * 1024 * 1024) / AGP_PAGE_SIZE; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, ilrangestr, "AGPSize (alias GARTSize)", 8, 512); + } + } + } +#endif + + /* NoXVideo + * Set this to TRUE to disable Xv hardware video acceleration + */ +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + if((!pXGI->NoAccel) && (!pXGI->NoXvideo)) { +#else + if(!pXGI->NoXvideo) { +#endif + if(xf86ReturnOptValBool(pXGI->Options, OPTION_NOXVIDEO, FALSE)) { + pXGI->NoXvideo = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "XVideo extension disabled\n"); + } + + if(!pXGI->NoXvideo) { + Bool val; + int tmp; + + if((pXGI->VGAEngine == XGI_OLD_VGA) || (pXGI->VGAEngine == XGI_530_VGA)) { + /* NoYV12 (for 5597/5598, 6326 and 530/620 only) + * YV12 has problems with videos larger than 384x288. So + * allow the user to disable YV12 support to force the + * application to use YUV2 instead. + */ + if(xf86GetOptValBool(pXGI->Options, OPTION_NOYV12, &val)) { + pXGI->NoYV12 = val ? 1 : 0; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Xv YV12/I420 support is %s\n", + pXGI->NoYV12 ? disabledstr : enabledstr); + } + } + + /* Some Xv properties' defaults can be set by options */ + if(xf86GetOptValInteger(pXGI->Options, OPTION_XVDEFCONTRAST, &tmp)) { + if((tmp >= 0) && (tmp <= 7)) pXGI->XvDefCon = tmp; + else xf86DrvMsg(pScrn->scrnIndex, X_WARNING, ilrangestr, + "XvDefaultContrast" ,0, 7); + } + if(xf86GetOptValInteger(pXGI->Options, OPTION_XVDEFBRIGHTNESS, &tmp)) { + if((tmp >= -128) && (tmp <= 127)) pXGI->XvDefBri = tmp; + else xf86DrvMsg(pScrn->scrnIndex, X_WARNING, ilrangestr, + "XvDefaultBrightness", -128, 127); + } + + if(xf86GetOptValBool(pXGI->Options, OPTION_XVDEFDISABLEGFX, &val)) { + if(val) pXGI->XvDefDisableGfx = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Graphics display will be %s during Xv usage\n", + val ? disabledstr : enabledstr); + } + + if(xf86GetOptValBool(pXGI->Options, OPTION_XVMEMCPY, &val)) { + pXGI->XvUseMemcpy = val ? TRUE : FALSE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Xv will %suse memcpy()\n", + val ? "" : "not "); + } + } + } +} + +const OptionInfoRec * +XGIAvailableOptions(int chipid, int busid) +{ + return XGIOptions; +} Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_pci.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_pci.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_pci.h Mon May 2 09:28:02 2005 @@ -0,0 +1,10 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_pci.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ + +/****************************************************************** + * Define XGI new PCI device ID. + ******************************************************************/ + + +#define PCI_VENDOR_XGI 0x18CA +#define PCI_CHIP_XGIXG40 0x0040 +#define PCI_CHIP_XGIXG20 0x0020 Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_regs.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_regs.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_regs.h Mon May 2 09:28:02 2005 @@ -0,0 +1,345 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_regs.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ +/* + * Copyright 1998,1999 by Alan Hourihane, Wigan, England. + * + * Permission to use, copy, modify, distribute, and sell this software and its + * documentation for any purpose is hereby granted without fee, provided that + * the above copyright notice appear in all copies and that both that + * copyright notice and this permission notice appear in supporting + * documentation, and that the name of Alan Hourihane not be used in + * advertising or publicity pertaining to distribution of the software without + * specific, written prior permission. Alan Hourihane makes no representations + * about the suitability of this software for any purpose. It is provided + * "as is" without express or implied warranty. + * + * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, + * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO + * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR + * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, + * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER + * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR + * PERFORMANCE OF THIS SOFTWARE. + * + * Authors: Alan Hourihane, alanh@fairlite.demon.co.uk + * Mike Chapman , + * Juanjo Santamarta , + * Mitani Hiroshi + * David Thomas . + */ + +#ifndef _XGI_REGS_H_ +#define _XGI_REGS_H_ + +#include "vgaHW.h" + +#define inXGIREG(base) inb(base) +#define outXGIREG(base,val) outb(base,val) +#define orXGIREG(base,val) do { \ + unsigned char temp = inb(base); \ + outXGIREG(base, temp | (val)); \ + } while (0) + +#define andXGIREG(base,val) do { \ + unsigned char temp = inb(base); \ + outXGIREG(base, temp & (val)); \ + } while (0) + +#define inXGIIDXREG(base,idx,var)\ + do { \ + outb(base,idx); var=inb((base)+1); \ + } while (0) + +#define outXGIIDXREG(base,idx,val)\ + do { \ + outb(base,idx); outb((base)+1,val); \ + } while (0) + +#define orXGIIDXREG(base,idx,val)\ + do { \ + unsigned char temp; \ + outb(base,idx); \ + temp = inb((base)+1)|(val); \ + outXGIIDXREG(base,idx,temp); \ + } while (0) +#define andXGIIDXREG(base,idx,and)\ + do { \ + unsigned char temp; \ + outb(base,idx); \ + temp = inb((base)+1)&(and); \ + outXGIIDXREG(base,idx,temp); \ + } while (0) +#define setXGIIDXREG(base,idx,and,or)\ + do { \ + unsigned char temp; \ + outb(base,idx); \ + temp = (inb((base)+1)&(and))|(or); \ + outXGIIDXREG(base,idx,temp); \ + } while (0) + +#define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l)) +#define GENMASK(mask) BITMASK(1?mask,0?mask) + +#define GETBITS(var,mask) (((var) & GENMASK(mask)) >> (0?mask)) +#define SETBITS(val,mask) ((val) << (0?mask)) +#define SETBIT(n) (1<<(n)) + +#define GETBITSTR(val,from,to) ((GETBITS(val,from)) << (0?to)) +#define SETVARBITS(var,val,from,to)\ + (((var)&(~(GENMASK(to)))) | GETBITSTR(val,from,to)) + +#define GETVAR8(var) ((var)&0xFF) +#define SETVAR8(var,val) (var) = GETVAR8(val) + +#define VGA_RELIO_BASE 0x380 + +#define AROFFSET VGA_ATTR_INDEX - VGA_RELIO_BASE +#define ARROFFSET VGA_ATTR_DATA_R - VGA_RELIO_BASE +#define GROFFSET VGA_GRAPH_INDEX - VGA_RELIO_BASE +#define SROFFSET VGA_SEQ_INDEX - VGA_RELIO_BASE +#define CROFFSET VGA_CRTC_INDEX_OFFSET + VGA_IOBASE_COLOR-VGA_RELIO_BASE +#define MISCROFFSET VGA_MISC_OUT_R - VGA_RELIO_BASE +#define MISCWOFFSET VGA_MISC_OUT_W - VGA_RELIO_BASE +#define DACROFFSET VGA_DAC_READ_ADDR - VGA_RELIO_BASE +#define DACWOFFSET VGA_DAC_WRITE_ADDR - VGA_RELIO_BASE +#define DACDOFFSET VGA_DAC_DATA - VGA_RELIO_BASE +#define IS1OFFSET VGA_IOBASE_COLOR - VGA_RELIO_BASE + VGA_IN_STAT_1_OFFSET + +#define XGI_IS1 (pXGI->RelIO+IS1OFFSET) + +/**********************************************************************/ +#define IS_BIT_DIAGNOSTIC_RB (3<<4) +#define IS_BIT_VERT_ACTIVE (1<<3) +#define IS_BIT_HORZ_NACTIVE (1) +/**********************************************************************/ + +#define XGIARR (pXGI->RelIO+ARROFFSET) +#define XGIGR (pXGI->RelIO+GROFFSET) +#define XGISR (pXGI->RelIO+SROFFSET) +#define XGICR (pXGI->RelIO+CROFFSET) +#define XGIMISCR (pXGI->RelIO+MISCROFFSET) +#define XGIMISCW (pXGI->RelIO+MISCWOFFSET) +#define XGIDACREAD (pXGI->RelIO+DACROFFSET) +#define XGIDACWRITE (pXGI->RelIO+DACWOFFSET) +#define XGIDACDATA (pXGI->RelIO+DACDOFFSET) +#define XGIVIDEO (pXGI->RelIO+0x02) +#define XGIPART1 (pXGI->RelIO+0x04) +#define XGIPART2 (pXGI->RelIO+0x10) +#define XGIPART3 (pXGI->RelIO+0x12) +#define XGIPART4 (pXGI->RelIO+0x14) +#define XGIPART5 (pXGI->RelIO+0x16) + + +/* 3C4 */ +#define BankReg 0x06 +#define ClockReg 0x07 +#define CPUThreshold 0x08 +#define CRTThreshold 0x09 +#define CRTCOff 0x0A +#define DualBanks 0x0B +#define MMIOEnable 0x0B +#define RAMSize 0x0C +#define Mode64 0x0C +#define ExtConfStatus1 0x0E +#define ClockBase 0x13 +#define LinearAdd0 0x20 +#define LinearAdd1 0x21 +#define GraphEng 0x27 +#define MemClock0 0x28 +#define MemClock1 0x29 +#define XR2A 0x2A +#define XR2B 0x2B +#define TurboQueueBase 0x2C +#define FBSize 0x2F +#define ExtMiscCont5 0x34 +#define ExtMiscCont9 0x3C + +/* 3x4 */ +#define Offset 0x13 + +#define read_xr(num,var) do {outb(0x3c4, num);var=inb(0x3c5);} while (0) + +/* PART1 */ +#define xgiPART1_FUNCTION 0x00 +#define xgiPART1_THRESHOLD_HIGH 0x01 +#define xgiPART1_THRESHOLD_LOW 0x02 +#define xgiPART1_FIFO_STOP 0x03 +#define xgiPART1_MEM_ADDR_HIGH 0x04 +#define xgiPART1_MEM_ADDR_MID 0x05 +#define xgiPART1_MEM_ADDR_LOW 0x06 +#define xgiPART1_SCR_PITCH_LOW 0x07 +#define xgiPART1_HORZ_TOTAL_LOW 0x08 +#define xgiPART1_SCR_HTOTAL_OVERFLOW 0x09 +#define xgiPART1_HORZ_DISP_END 0x0A +#define xgiPART1_HORZ_RETRACE_START 0x0B +#define xgiPART1_HORZ_OVERFLOW 0x0C +#define xgiPART1_HORZ_RETRACE_END 0x0D + +#define xgiPART1_VERT_TOTAL_LOW 0x0E +#define xgiPART1_VERT_DISP_END 0x0F +#define xgiPART1_VERT_RETRACE_START 0x10 +#define xgiPART1_VERT_RETRACE_END 0x11 +#define xgiPART1_VERT_OVERFLOW 0x12 + +/* 2000/04/10 added by jjtseng */ +/* [VBCTL_000410] */ +#define xgiPART1_CRT2_FLIP 0x24 +#define xgiPART1_LOWRES_DUALVB_MODE 0x2c +/* ~jjtseng 2000/04/10 */ + +#define xgiPART1_ENABLEWRITE 0x2f +#define xgiPART1_VERTRETRACE 0x30 +#define xgiPART1_HORZRETRACE 0x33 + +/* Definitions for the XGI engine communication. */ + +extern int xgiReg32MMIO[]; +#define BR(x) xgiReg32MMIO[x] + +/* These are done using Memory Mapped IO, of the registers */ +/* + * Modified by Xavier Ducoin (xavier@rd.lectra.fr) + */ + + +#define xgiLEFT2RIGHT 0x10 +#define xgiRIGHT2LEFT 0x00 +#define xgiTOP2BOTTOM 0x20 +#define xgiBOTTOM2TOP 0x00 + +#define xgiSRCSYSTEM 0x03 +#define xgiSRCVIDEO 0x02 +#define xgiSRCFG 0x01 +#define xgiSRCBG 0x00 + +#define xgiCMDBLT 0x0000 +#define xgiCMDBLTMSK 0x0100 +#define xgiCMDCOLEXP 0x0200 +#define xgiCMDLINE 0x0300 + +#define xgiCMDENHCOLEXP 0x2000 + +#define xgiXINCREASE 0x10 +#define xgiYINCREASE 0x20 +#define xgiCLIPENABL 0x40 +#define xgiCLIPINTRN 0x80 +#define xgiCLIPEXTRN 0x00 + + +#define xgiPATREG 0x08 +#define xgiPATFG 0x04 +#define xgiPATBG 0x00 + +#define xgiLASTPIX 0x0800 +#define xgiXMAJOR 0x0400 + + +/* Macros to do useful things with the XGI BitBLT engine */ + +#define xgiBLTSync \ + while(*(volatile unsigned short *)(pXGI->IOBase + BR(10)+2) & \ + (0x4000)){} + +/* According to 6326 2D programming guide, 16 bits position at */ +/* 0x82A8 returns queue free. But this don't work, so don't wait */ +/* anything when turbo-queue is enabled. If there are frequent syncs */ +/* this should work. But not for xaa_benchmark :-( */ + +#define xgiBLTWAIT \ + if (!pXGI->TurboQueue) {\ + while(*(volatile unsigned short *)(pXGI->IOBase + BR(10)+2) & \ + (0x4000)){}} /* \ + else {while(*(volatile unsigned short *)(pXGI->IOBase + BR(10)) < \ + 63){}} */ + +#define xgiSETPATREG()\ + ((unsigned char *)(pXGI->IOBase + BR(11))) + +#define xgiSETPATREGL()\ + ((unsigned long *)(pXGI->IOBase + BR(11))) + +#define xgiSETCMD(op) \ + *(volatile unsigned short *)(pXGI->IOBase + BR(10) +2 ) = op + +#define xgiSETROPFG(op) \ + *(volatile unsigned int *)(pXGI->IOBase + BR(4)) = ((*(volatile unsigned int *)(pXGI->IOBase + BR(4)))&0xffffff) | (op<<24) + +#define xgiSETROPBG(op) \ + *(volatile unsigned int *)(pXGI->IOBase + BR(5)) = ((*(volatile unsigned int *)(pXGI->IOBase + BR(5)))&0xffffff) | (op<<24) + +#define xgiSETROP(op) \ + xgiSETROPFG(op);xgiSETROPBG(op); + + +#define xgiSETSRCADDR(srcAddr) \ + *(volatile unsigned int *)(pXGI->IOBase + BR(0)) = srcAddr&0x3FFFFFL + +#define xgiSETDSTADDR(dstAddr) \ + *(volatile unsigned int *)(pXGI->IOBase + BR(1)) = dstAddr&0x3FFFFFL + +#define xgiSETPITCH(srcPitch,dstPitch) \ + *(volatile unsigned int *)(pXGI->IOBase + BR(2)) = ((dstPitch&0xFFFF)<<16)| \ + (srcPitch&0xFFFF) + +/* according to XGI 2D Engine Programming Guide + * width -1 independant of Bpp + */ +#define xgiSETHEIGHTWIDTH(Height,Width)\ + *(volatile unsigned int *)(pXGI->IOBase + BR(3)) = (((Height)&0xFFFF)<<16)| \ + ((Width)&0xFFFF) + +#define xgiSETCLIPTOP(x,y)\ + *(volatile unsigned int *)(pXGI->IOBase + BR(8)) = (((y)&0xFFFF)<<16)| \ + ((x)&0xFFFF) + +#define xgiSETCLIPBOTTOM(x,y)\ + *(volatile unsigned int *)(pXGI->IOBase + BR(9)) = (((y)&0xFFFF)<<16)| \ + ((x)&0xFFFF) + +#define xgiSETBGCOLOR(bgColor)\ + *(volatile unsigned int *)(pXGI->IOBase + BR(5)) = (bgColor) + +#define xgiSETBGCOLOR8(bgColor)\ + *(volatile unsigned int *)(pXGI->IOBase + BR(5)) = (bgColor&0xFF) + +#define xgiSETBGCOLOR16(bgColor)\ + *(volatile unsigned int *)(pXGI->IOBase + BR(5)) = (bgColor&0xFFFF) + +#define xgiSETBGCOLOR24(bgColor)\ + *(volatile unsigned int *)(pXGI->IOBase + BR(5)) = (bgColor&0xFFFFFF) + + +#define xgiSETFGCOLOR(fgColor)\ + *(volatile unsigned int *)(pXGI->IOBase + BR(4)) = (fgColor) + +#define xgiSETFGCOLOR8(fgColor)\ + *(volatile unsigned int *)(pXGI->IOBase + BR(4)) = (fgColor&0xFF) + +#define xgiSETFGCOLOR16(fgColor)\ + *(volatile unsigned int *)(pXGI->IOBase + BR(4)) = (fgColor&0xFFFF) + +#define xgiSETFGCOLOR24(fgColor)\ + *(volatile unsigned int *)(pXGI->IOBase + BR(4)) = (fgColor&0xFFFFFF) + +/* Line drawing */ + +#define xgiSETXStart(XStart) \ + *(volatile unsigned int *)(pXGI->IOBase + BR(0)) = XStart&0xFFFF + +#define xgiSETYStart(YStart) \ + *(volatile unsigned int *)(pXGI->IOBase + BR(1)) = YStart&0xFFFF + +#define xgiSETLineMajorCount(MajorAxisCount) \ + *(volatile unsigned int *)(pXGI->IOBase + BR(3)) = MajorAxisCount&0xFFFF + +#define xgiSETLineSteps(K1,K2) \ + *(volatile unsigned int *)(pXGI->IOBase + BR(6)) = (((K1)&0xFFFF)<<16)| \ + ((K2)&0xFFFF) + +#define xgiSETLineErrorTerm(ErrorTerm) \ + *(volatile unsigned short *)(pXGI->IOBase + BR(7)) = ErrorTerm + +#define XGIMMIOLONG(offset) *(volatile unsigned long *)(pXGI->IOBase+(offset)) +#define XGIMMIOSHORT(offset) *(volatile unsigned short *)(pXGI->IOBase+(offset)) +#define XGIMMIOBYTE(offset) *(volatile unsigned char *)(pXGI->IOBase+(offset)) + +#endif /* _XGI_REGS_H_ */ Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_setup.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_setup.c:1.4 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_setup.c Fri Oct 14 11:16:49 2005 @@ -0,0 +1,449 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_setup.c,v 1.4 2005/10/14 15:16:49 tsi Exp $ */ +/* + * Basic hardware and memory detection + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1) Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2) Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3) The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Thomas Winischhofer + * + * Ideas and methods for old series based on code by Can-Ru Yeou, XGI Inc. + * + */ +#include "xf86PciInfo.h" +#include "xf86Pci.h" +#include "xf86.h" +#include "fb.h" +#include "xf86_OSproc.h" +#include "xf86Resources.h" +#include "xf86_ansic.h" +#include "xf86Version.h" + +#include "xf86cmap.h" + +#include "xgi.h" +#include "regs.h" +#include "xgi_dac.h" +/* #include "valid_mode.h" */ + +#define _XF86DGA_SERVER_ +#include + +#include "globals.h" +#define DPMS_SERVER +#include + +extern int XGI_FbDevExist; +/* +static const char *dramTypeStr[] = { + "Fast Page DRAM", + "2 cycle EDO RAM", + "1 cycle EDO RAM", + "SDRAM/SGRAM", + "SDR SDRAM", + "SGRAM", + "ESDRAM", + "DDR SDRAM", + "DDR SDRAM", + "VCM" + "" }; +*/ + +static BOOLEAN +bAccessNBridgePCIInfo(PXGI_HW_DEVICE_INFO pHwDevInfo, ULONG ulOffset, ULONG ulSet, ULONG *pulValue); +static BOOLEAN +bAccessVGAPCIInfo(PXGI_HW_DEVICE_INFO pHwDevInfo, ULONG ulOffset, ULONG ulSet, ULONG *pulValue); + +static void +xgiXG40_Setup(ScrnInfoPtr pScrn) +{ + +/********************************************************************* + * Setup + * Decide the following item of execution data: + * + * pXGI->BusWidth + * pXGI->videoRam (with KB unit) + * pXGI->CursorOffset (with Byte Unit) + * pXGI->cmdQueueSize (with Byte Unit) + * pXGI->cmdQueueSizeMask (with Byte Unit) + * pXGI->cmdQueueOffset (with Byte Unit) + * pXGI->cmdQueueLen = 0 ; // init value + * pXGI->cmdQueueLenMin = 0x200 ; // init value + * pXGI->cmdQueueLenMax = pXGI->cmdQueueSize - pXGI->cmdQueueLenMin ; + *********************************************************************/ + + XGIPtr pXGI = XGIPTR(pScrn); + unsigned int ulMemConfig = 0; + unsigned long ulMemSize = 0; + unsigned long ulDramType = 0; + char *dramTypeStr ; + + PDEBUG4(ErrorF("xgiXG40_Setup()\n")) ; + + dramTypeStr = "" ; + + pXGI->MemClock = XG40Mclk(pXGI); + + /********************************************************************************************************* + * SR14 DRAM Size Register + * Default value: XXh + * D[7:4] Memory size per channel {BChMemSize} + * 0011: 8 MB + * 0100: 16 MB + * 0101: 32 MB + * 0110: 64 MB + * 0111: 128 MB + * 1000: 256MB + * others: reserved + * D[3:2] Number of dram channels [1:0] {BChNum} + * 00: uni-channel + * 01: reserved + * 10: dual-channel. + * 11: quad-channel + * D1 Data width per channel selection {BDataWidth} + * 0: 32-bits + * 1: 64-bits + * D0 Dram channel mapping {BReverseChMapping} + * 0: Normal mapping + * 1: Reversal mapping + * Dual-channel: Logical channel A/B to physical channel B/A + * Quad-channel: Logical channel A/B/C/D to physical channel C/D/A/B + * + *********************************************************************************************************/ + + outXGIIDXREG(XGISR, 0x5, 0x86) ; + inXGIIDXREG(XGISR, 0x14, ulMemConfig) ; + inXGIIDXREG(XGISR, 0x3A, ulDramType) ; + + PDEBUG(ErrorF("xg40_Setup(): ulMemConfig = %02X\n",ulMemConfig)) ; + PDEBUG(ErrorF("xg40_Setup(): ulDramType = %02X\n",ulDramType)) ; + (void)ulDramType; + + pXGI->BusWidth = (ulMemConfig & (1<<1) )?64:32 ; + + switch(ulMemConfig>>4) + { + case 8: + ulMemSize = 256*1024 ; + break ; + case 7: + ulMemSize = 128*1024 ; + break ; + case 6: + ulMemSize = 64*1024 ; + break ; + case 5: + ulMemSize = 32*1024 ; + break ; + case 4: + ulMemSize = 16*1024 ; + break ; + case 3: + ulMemSize = 8*1024 ; + break ; + default: + ulMemSize = 8*1024 ; + } + + if( pXGI->Chipset == PCI_CHIP_XGIXG40) + { + if ( (pciReadLong(pXGI->PciTag, 0x08) & 0xFF ) == 2 ) + { + switch((ulMemConfig>>2)&0x1) + { + case 0: + /* Uni channel */ + ulMemSize *= 1 ; + break ; + case 1: + /* Dual channel */ + ulMemSize *= 2 ; + break ; + } + } + else + { + switch((ulMemConfig>>2)&0x3) + { + case 2: + /* Dual channel */ + ulMemSize *= 2 ; + break ; + case 3: + /* Quad channel */ + ulMemSize *= 4 ; + break ; + } + } + } + + pScrn->videoRam = ulMemSize ; + + /********************************************************************************************************* + * SR15 DRAM Address Mapping Register + * Default value: XXh + * D7 Channel interleaving configuration { BChConfig } + * 0: Divide the whole memory into 2/4 equal-sized regions , each mapped to one channel + * 1: Divide the whole memory into 2 regions according to BTilingSize[1:0] . The low-address region + * will be channel-interleaved as per BFineGranSize; the high-address region will be channel- + * interleaved as per BCoarseGranSize[1:0] + * D[6:5] Memory size of tile-mapped region {BTilingSize} + * 00: 4 MB + * 01: 8 MB + * 10: 16 MB + * 11: 32 MB + * The following bits are effective only when D7=1 + * D4 Channel-interleaving granularity for tile-mapped region {BFineGranSize} + * 0: 64 B + * 1: 128 B + * D[3:2] Channel-interleaving granularity for linearly mapped region {BCoarseGranSize} + * 00: 1KB + * 01: 2KB + * 10: 4KB + * 11: 1MB + * D[1:0] reserved + *********************************************************************************************************/ + + /* Accelerator parameter Initialization */ + if( pXGI->Chipset == PCI_CHIP_XGIXG20 ) + { + pXGI->cmdQueueSize = VOLARI_CQSIZEXG20; + /* XgiMode = XG20_Mode ; */ + PDEBUG(ErrorF(" ---XG20_Mode \n")); + } + else + { + pXGI->cmdQueueSize = VOLARI_CQSIZE; + /* XgiMode = XGI_Mode ; */ + PDEBUG(ErrorF(" ---XGI_Mode \n")); + } + + pXGI->cmdQueueSizeMask = pXGI->cmdQueueSize - 1 ; + pXGI->pCQ_shareWritePort = &(pXGI->cmdQueue_shareWP_only2D); + + + /* + If XGI_FbDevExist, XFree86 driver use the 8MB only. The rest + frame buffer is used by other AP. + */ + + if( XGI_FbDevExist ) + { + if( pScrn->videoRam < 8*1024 ) + { + pXGI->cmdQueueOffset = 4*1024*1024 - pXGI->cmdQueueSize ; + } + else + { + pXGI->cmdQueueOffset = 8*1024*1024 - pXGI->cmdQueueSize ; + } + } + else + { + pXGI->cmdQueueOffset = (pScrn->videoRam)*1024 - pXGI->cmdQueueSize ; + } + + pXGI->CursorOffset = pXGI->cmdQueueOffset - 64*1024 ; + PDEBUG4(ErrorF("pScrn->videoRam = %08lX pXGI->cmdQueueSize = %08lX\n", + pScrn->videoRam, pXGI->cmdQueueSize)) ; + PDEBUG4(ErrorF("pXGI->cmdQueueOffset = %08lX pXGI->CursorOffset = %08lX\n", + pXGI->cmdQueueOffset, pXGI->CursorOffset)) ; + + pXGI->cmdQueueLen = 0 ; + pXGI->cmdQueueLenMin = 0x200 ; + pXGI->cmdQueueLenMax = pXGI->cmdQueueSize - pXGI->cmdQueueLenMin ; + + /***************************************************************** + * Dual Chip support put here * + *****************************************************************/ + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Detected DRAM type : %s\n", dramTypeStr); + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Detected memory clock : %3.3fMHz\n", + pXGI->MemClock/1000.0); + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Detected VRAM bus width is %d\n", pXGI->BusWidth); + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Detected Cmd Queue size is %d KB\n", pXGI->cmdQueueSize / 1024); + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Detected Cmd Queue Offset is %d\n", pXGI->cmdQueueOffset ) ; +} + +void +XGISetup(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + pXGI->Flags = 0; + pXGI->VBFlags = 0; + + switch (XGIPTR(pScrn)->Chipset) { + + case PCI_CHIP_XGIXG40: + case PCI_CHIP_XGIXG20: + default: + xgiXG40_Setup(pScrn) ; + break ; + } +} + +Bool +XGI_InitHwDevInfo(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI ; + PXGI_HW_DEVICE_INFO pHwDevInfo ; + ULONG ulTemp ; + int i ; + + pXGI = XGIPTR(pScrn ) ; + pHwDevInfo = &pXGI->xgi_HwDevExt ; + pXGI->pVBInfo = &(pXGI->VBInfo) ; + + pHwDevInfo->pDevice = pXGI ; + pHwDevInfo->pjVirtualRomBase = pXGI->BIOS ; + pHwDevInfo->pjCustomizedROMImage = NULL ; + pHwDevInfo->pjVideoMemoryAddress = (UCHAR*)(pXGI->FbBase) ; + PDEBUG(ErrorF("pXGI->FbBase = 0x%08lx\n",(ULONG)(pXGI->FbBase))) ; + PDEBUG(ErrorF("pHwDevInfo->pjVideoMemoryAddress = 0x%08lx\n",(ULONG)(pHwDevInfo->pjVideoMemoryAddress))) ; + pHwDevInfo->ulVideoMemorySize = pXGI->FbMapSize ; +/* pHwDevInfo->pjIOAddress = (PUCHAR)((ULONG)(pXGI->RelIO) + 0x30) ; */ + pHwDevInfo->pjIOAddress = pXGI->RelIO + 0x30 ; + pHwDevInfo->jChipType = XGI_VGALegacy ; + + + switch( pXGI->Chipset ){ + case PCI_CHIP_XGIXG40: + pHwDevInfo->jChipType = XG40 ; + break ; + case PCI_CHIP_XGIXG20: + pHwDevInfo->jChipType = XG20 ; + break ; + default: + pHwDevInfo->jChipType = XG40 ; + break ; + } + + ulTemp = pciReadLong(pXGI->PciTag, 0x08) ; + pHwDevInfo->jChipRevision = (UCHAR)(ulTemp & 0xff) ; + pHwDevInfo->ujVBChipID = VB_CHIP_UNKNOWN ; + pHwDevInfo->ulExternalChip = 0 ; + + if( pXGI->VBFlags & VB_301 ) + { + pHwDevInfo->ujVBChipID = VB_CHIP_301 ; + } + else if( pXGI->VBFlags & VB_302 ) + { + pHwDevInfo->ujVBChipID = VB_CHIP_302 ; + } + else + { + if( pXGI->VBFlags & VB_LVDS ) + { + pHwDevInfo->ulExternalChip |= 0x01 ; + } + + if( pXGI->VBFlags & VB_CHRONTEL ) + { + pHwDevInfo->ulExternalChip |= 0x02 ; + } + + } + + pHwDevInfo->ulCRT2LCDType = LCD_1024x768 ; + pHwDevInfo->bIntegratedMMEnabled = FALSE ; + pHwDevInfo->bSkipDramSizing = TRUE ; + + pHwDevInfo->pSR = pXGI->SRList ; + pHwDevInfo->pCR = pXGI->CRList ; + pHwDevInfo->pQueryVGAConfigSpace = bAccessVGAPCIInfo ; + pHwDevInfo->pQueryNorthBridgeSpace = bAccessNBridgePCIInfo ; + + for( i = 0 ; i < ExtRegSize ; i++ ){ + pHwDevInfo->pSR[i].jIdx = 0xFF ; + pHwDevInfo->pSR[i].jVal = 0xFF ; + pHwDevInfo->pCR[i].jIdx = 0xFF ; + pHwDevInfo->pCR[i].jVal = 0xFF ; + } + + + for( i = 0 ; i < VBIOS_VER_MAX_LENGTH ; i++ ){ + pHwDevInfo -> szVBIOSVer[i] = '\0' ; + } + + PDEBUG(ErrorF("pHwDevInfo->jChipType = %08lX done\n",pHwDevInfo->jChipType)) ; + XGINew_InitVBIOSData(pHwDevInfo,pXGI->pVBInfo) ; + PDEBUG(ErrorF("XGINew_InitVBIOSData(pHwDevInfo) done\n")) ; + return TRUE ; +} + +static BOOLEAN +bAccessVGAPCIInfo(PXGI_HW_DEVICE_INFO pHwDevInfo, ULONG ulOffset, ULONG ulSet, ULONG *pulValue) +{ + XGIPtr pXGI ; + PCITAG pciDev ; + + if( (!pHwDevInfo) || (!pulValue) ) + { + return FALSE ; + } + + pXGI = (XGIPtr)pHwDevInfo->pDevice ; + pciDev = pXGI->PciTag ; + + if( ulSet ) + { + pciWriteLong(pciDev, ulOffset&0xFFFFFFFc, *pulValue ) ; + } + else + { + *pulValue = pciReadLong(pciDev, ulOffset&0xFFFFFFFc ) ; + } + + return TRUE ; +} + + +static BOOLEAN +bAccessNBridgePCIInfo(PXGI_HW_DEVICE_INFO pHwDevInfo, ULONG ulOffset, ULONG ulSet, ULONG *pulValue) +{ + PCITAG pciDev = pciTag(0,0,0); + + if( (!pulValue) ) + { + return FALSE ; + } + + if( ulSet ) + { + pciWriteLong(pciDev, ulOffset&0xFFFFFFFc, *pulValue ) ; + } + else + { + *pulValue = pciReadLong(pciDev, ulOffset&0xFFFFFFFc ) ; + } + + return TRUE ; +} Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vb.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vb.c:1.2 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vb.c Mon Jun 6 21:33:39 2005 @@ -0,0 +1,297 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vb.c,v 1.2 2005/06/07 01:33:39 tsi Exp $ */ +/* + * Video bridge detection and configuration for 300, 315 and 330 series + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1) Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2) Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3) The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Thomas Winischhofer + * + */ + +#include "xf86.h" +#include "xf86_ansic.h" +#include "compiler.h" +#include "xf86PciInfo.h" + +#include "xgi.h" +#include "regs.h" +#include "xgi_vb.h" +#include "xgi_dac.h" + +extern void XGIWaitRetraceCRT1(ScrnInfoPtr pScrn); +extern unsigned char XGI_GetSetBIOSScratch(ScrnInfoPtr pScrn, USHORT offset, unsigned char value); + +static Bool +TestDDC1(ScrnInfoPtr pScrn) +{ +/* XGIPtr pXGI = XGIPTR(pScrn); + unsigned short old; */ + int count = 48; +/* + old = XGI_ReadDDC1Bit(pXGI->XGI_Pr); + do { + if(old != XGI_ReadDDC1Bit(pXGI->XGI_Pr)) break; + } while(count--); +*/ + return (count == -1) ? FALSE : TRUE; +} + +static int +XGI_XGIDetectCRT1(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + unsigned short temp = 0xffff; + unsigned char SR1F, CR17; + int i, ret = 0; + Bool mustwait = FALSE; + + inXGIIDXREG(XGISR,0x1F,SR1F); + orXGIIDXREG(XGISR,0x1F,0x04); + andXGIIDXREG(XGISR,0x1F,0x3F); + if(SR1F & 0xc0) mustwait = TRUE; + + inXGIIDXREG(XGICR,0x17,CR17); + CR17 &= 0x80; + if(!CR17) { + orXGIIDXREG(XGICR,0x17,0x80); + mustwait = TRUE; + outXGIIDXREG(XGISR, 0x00, 0x01); + outXGIIDXREG(XGISR, 0x00, 0x03); + } + + if(mustwait) { + for(i=0; i < 10; i++) XGIWaitRetraceCRT1(pScrn); + } + + if((temp == 0) || (temp == 0xffff)) { + if(TestDDC1(pScrn)) temp = 1; + } + + if((temp) && (temp != 0xffff)) { + orXGIIDXREG(XGICR,0x32,0x20); + ret = 1; + } + + setXGIIDXREG(XGICR,0x17,0x7F,CR17); + + outXGIIDXREG(XGISR,0x1F,SR1F); + + return ret; +} + +/* Detect CRT1 */ +void XGICRT1PreInit(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + unsigned char CR32; + unsigned char CRT1Detected = 0; + unsigned char OtherDevices = 0; + + if(!(pXGI->VBFlags & VB_VIDEOBRIDGE)) { + pXGI->CRT1off = 0; + return; + } + +#ifdef XGIDUALHEAD + if(pXGI->DualHeadMode) { + pXGI->CRT1off = 0; + return; + } +#endif + +#ifdef XGIMERGED + if((pXGI->MergedFB) && (!(pXGI->MergedFBAuto))) { + pXGI->CRT1off = 0; + return; + } +#endif + + inXGIIDXREG(XGICR, 0x32, CR32); + + if(CR32 & 0x20) CRT1Detected = 1; + else CRT1Detected = XGI_XGIDetectCRT1(pScrn); + + if(CR32 & 0x5F) OtherDevices = 1; + + if(pXGI->CRT1off == -1) { + if(!CRT1Detected) { + + /* No CRT1 detected. */ + /* If other devices exist, switch it off */ + if(OtherDevices) pXGI->CRT1off = 1; + else pXGI->CRT1off = 0; + + } else { + + /* CRT1 detected, leave/switch it on */ + pXGI->CRT1off = 0; + + } + } + + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "%sCRT1 (VGA) connection detected\n", + CRT1Detected ? "" : "No "); +} + +/* Detect CRT2-LCD and LCD size */ +void XGILCDPreInit(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + unsigned char CR32; + + pXGI->LCDwidth = 0; + + if(!(pXGI->VBFlags & VB_VIDEOBRIDGE)) return; + + inXGIIDXREG(XGICR, 0x32, CR32); + + if(CR32 & 0x08) pXGI->VBFlags |= CRT2_LCD; + + /* If no panel has been detected by the BIOS during booting, + * we try to detect it ourselves at this point. We do that + * if forcecrt2redetection was given, too. + * This is useful on machines with DVI connectors where the + * panel was connected after booting. This is only supported + * on the 315/330 series and the 301/30xB/C bridge (because the + * 30xLV don't seem to have a DDC port and operate only LVDS + * panels which mostly don't support DDC). We only do this if + * there was no secondary VGA detected by the BIOS, because LCD + * and VGA2 share the same DDC channel and might be misdetected + * as the wrong type (especially if the LCD panel only supports + * EDID Version 1). + * + * By default, CRT2 redetection is forced since 12/09/2003, as + * I encountered numerous panels which deliver more or less + * bogus DDC data confusing the BIOS. Since our DDC detection + * is waaaay better, we prefer it instead of the primitive + * and buggy BIOS method. + */ +#ifdef XGIDUALHEAD + if((!pXGI->DualHeadMode) || (!pXGI->SecondHead)) { +#endif + +#ifdef XGIDUALHEAD + } +#endif +} + +/* Detect CRT2-TV connector type and PAL/NTSC flag */ +void XGITVPreInit(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + unsigned char SR16, SR38, CR32, CR35=0, CR38=0, CR39; + int temp = 0; + + if(!(pXGI->VBFlags & VB_VIDEOBRIDGE)) return; + + inXGIIDXREG(XGICR, 0x32, CR32); + inXGIIDXREG(XGICR, 0x35, CR35); + inXGIIDXREG(XGISR, 0x16, SR16); + inXGIIDXREG(XGISR, 0x38, SR38); + + if(temp) { + inXGIIDXREG(XGICR, temp, CR38); + } + +#ifdef TWDEBUG + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "(vb.c: CR32=%02x SR16=%02x SR38=%02x)\n", + CR32, SR16, SR38); +#endif + (void)SR16; + (void)SR38; + (void)CR35; + + if(CR32 & 0x47) pXGI->VBFlags |= CRT2_TV; + + if(pXGI->XGI_SD_Flags & XGI_SD_SUPPORTYPBPR) { + if(CR32 & 0x80) pXGI->VBFlags |= CRT2_TV; + } else { + CR32 &= 0x7f; + } + + if(CR32 & 0x01) + pXGI->VBFlags |= TV_AVIDEO; + else if(CR32 & 0x02) + pXGI->VBFlags |= TV_SVIDEO; + else if(CR32 & 0x04) + pXGI->VBFlags |= TV_SCART; + else if((CR32 & 0x40) && (pXGI->XGI_SD_Flags & XGI_SD_SUPPORTHIVISION)) + pXGI->VBFlags |= (TV_HIVISION | TV_PAL); + else if((CR32 & 0x80) && (pXGI->XGI_SD_Flags & XGI_SD_SUPPORTYPBPR)) { + pXGI->VBFlags |= TV_YPBPR; + if(pXGI->XGI_SD_Flags & XGI_SD_SUPPORTYPBPR) { + if(CR38 & 0x08) { + switch(CR38 & 0x30) { + case 0x10: pXGI->VBFlags |= TV_YPBPR525P; break; + case 0x20: pXGI->VBFlags |= TV_YPBPR750P; break; + case 0x30: pXGI->VBFlags |= TV_YPBPR1080I; break; + default: pXGI->VBFlags |= TV_YPBPR525I; + } + } else pXGI->VBFlags |= TV_YPBPR525I; + if(pXGI->XGI_SD_Flags & XGI_SD_SUPPORTYPBPRAR) { + inXGIIDXREG(XGICR,0x3B,CR39); + CR39 &= 0x03; + if(CR39 == 0x00) pXGI->VBFlags |= TV_YPBPR43LB; + else if(CR39 == 0x01) pXGI->VBFlags |= TV_YPBPR169; + else if(CR39 == 0x03) pXGI->VBFlags |= TV_YPBPR43; + } + } + } else if((CR38 & 0x04) && (pXGI->VBFlags & VB_CHRONTEL)) + pXGI->VBFlags |= (TV_CHSCART | TV_PAL); + else if((CR38 & 0x08) && (pXGI->VBFlags & VB_CHRONTEL)) + pXGI->VBFlags |= (TV_CHYPBPR525I | TV_NTSC); + + + if(pXGI->VBFlags & (TV_SCART|TV_SVIDEO|TV_AVIDEO)) { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Detected default TV standard %s\n", + (pXGI->VBFlags & TV_NTSC) ? + ((pXGI->VBFlags & TV_NTSCJ) ? "NTSCJ" : "NTSC") : + ((pXGI->VBFlags & TV_PALM) ? "PALM" : + ((pXGI->VBFlags & TV_PALN) ? "PALN" : "PAL"))); + } + + if(pXGI->VBFlags & TV_HIVISION) { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "BIOS reports HiVision TV\n"); + } + + if((pXGI->VBFlags & VB_CHRONTEL) && (pXGI->VBFlags & (TV_CHSCART|TV_CHYPBPR525I))) { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Chrontel: %s forced\n", + (pXGI->VBFlags & TV_CHSCART) ? "SCART (PAL)" : "YPbPr (480i)"); + } + + if(pXGI->VBFlags & TV_YPBPR) { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Detected YPbPr TV (by default %s)\n", + (pXGI->VBFlags & TV_YPBPR525I) ? "480i" : + ((pXGI->VBFlags & TV_YPBPR525P) ? "480p" : + ((pXGI->VBFlags & TV_YPBPR750P) ? "720p" : "1080i"))); + } +} + + + + + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vb.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vb.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vb.h Mon May 2 09:28:02 2005 @@ -0,0 +1,50 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vb.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ +/* + * Video bridge detection and configuration for 300, 315 and 330 series + * Data and prototypes + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1) Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2) Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3) The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Thomas Winischhofer + * + */ + +typedef struct _XGI_LCD_StStruct +{ + ULONG VBLCD_lcdflag; + USHORT LCDwidth; + USHORT LCDheight; + USHORT LCDtype; +} XGI_LCD_StStruct; + +#define SET_IN_SLAVE_MODE 0x0200 +#define SET_CRT2_TO_RAMDAC 0x0400 + +void XGICRT1PreInit(ScrnInfoPtr pScrn); +void XGILCDPreInit(ScrnInfoPtr pScrn); +void XGITVPreInit(ScrnInfoPtr pScrn); + +extern USHORT XGI_SenseLCDDDC(XGI_Private *XGI_Pr, XGIPtr pXGI); +extern USHORT XGI_SenseVGA2DDC(XGI_Private *XGI_Pr, XGIPtr pXGI); Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_ver.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_ver.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_ver.h Mon May 2 09:28:02 2005 @@ -0,0 +1,21 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_ver.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ + +/***************************************************** + * xgi_ver.h + * Generated from mkdrv shell script. + * + * + * + * Generate by 2004/12/20 + *****************************************************/ + + + +#define XGI_MAJOR_VERSION 1 +#define XGI_MINOR_VERSION 2 +#define XGI_PATCHLEVEL 2 + +#define XGIDRIVERVERSIONYEAR 5 +#define XGIDRIVERVERSIONMONTH 2 +#define XGIDRIVERVERSIONDAY 16 +#define XGIDRIVERREVISION 1 Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vga.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vga.c:1.2 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vga.c Mon Jun 6 21:33:39 2005 @@ -0,0 +1,260 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vga.c,v 1.2 2005/06/07 01:33:39 tsi Exp $ */ +/* + * Mode setup and basic video bridge detection + * + * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1) Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2) Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3) The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Author: Thomas Winischhofer + * + * Init() function for old series (except for TV and FIFO calculation) + * previously based on code which is Copyright (C) 1998,1999 by Alan + * Hourihane, Wigan, England + */ + +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86_ansic.h" +#include "xf86Version.h" +#include "xf86PciInfo.h" +#include "xf86Pci.h" + +#include "xgi.h" +#include "regs.h" +#include "xgi_dac.h" + +Bool XG40Init(ScrnInfoPtr pScrn, DisplayModePtr mode); + +#define Midx 0 +#define Nidx 1 +#define VLDidx 2 +#define Pidx 3 + +Bool +XG40Init(ScrnInfoPtr pScrn, DisplayModePtr mode) +{ + XGIPtr pXGI = XGIPTR(pScrn); + XGIRegPtr pReg = &pXGI->ModeReg; + vgaRegPtr vgaReg = &VGAHWPTR(pScrn)->ModeReg; + unsigned short temp; + int offset; + int clock = mode->Clock; + unsigned int vclk[5]; + + int num, denum, div, sbit, scale; + unsigned short Threshold_Low, Threshold_High; + +PDEBUG(ErrorF("XG40Init()\n")); + + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4, "XG40Init()\n"); + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 4, + "virtualX = %d depth = %d Logical width = %d\n", + pScrn->virtualX, pScrn->bitsPerPixel, + pScrn->virtualX * pScrn->bitsPerPixel/8); + + vgaHWGetIOBase(VGAHWPTR(pScrn)); + + (*pXGI->XGISave)(pScrn, pReg); + + outw(VGA_SEQ_INDEX, 0x8605); + + pReg->xgiRegs3C4[6] &= ~GENMASK(4:2); + + switch (pScrn->bitsPerPixel) { + case 8: + pXGI->DstColor = 0 ; + pReg->xgiRegs3C4[6] |= 0x03; + PDEBUG(ErrorF("8: pXGI->DstColor = %08lX\n",pXGI->DstColor)) ; + break; + case 16: + pXGI->DstColor = 1 << 16 ; + PDEBUG(ErrorF("16: pXGI->DstColor = %08lX\n",pXGI->DstColor)) ; + if (pScrn->depth==15) { + pReg->xgiRegs3C4[6] |= ((1 << 2) | 0x03); + } else { + pReg->xgiRegs3C4[6] |= ((2 << 2) | 0x03); + } + break; + case 24: + pReg->xgiRegs3C4[6] |= ((3 << 2) | 0x03); + break; + case 32: + PDEBUG(ErrorF("32: pXGI->DstColor = %08lX\n",pXGI->DstColor)) ; + pXGI->DstColor = 2 << 16 ; + pReg->xgiRegs3C4[6] |= ((4 << 2) | 0x03); + break; + } + + pXGI->scrnOffset = pScrn->displayWidth * ((pScrn->bitsPerPixel+7)/8); + pXGI->scrnOffset += 15 ; + pXGI->scrnOffset >>= 4 ; + pXGI->scrnOffset <<= 4 ; + + PDEBUG(ErrorF("XG40Init: pScrn->displayWidth = %ld\n",pScrn->displayWidth )) ; + PDEBUG(ErrorF("XG40Init: pScrn->bitsPerPixel = %ld\n",pScrn->bitsPerPixel )) ; + PDEBUG(ErrorF("XG40Init: pXGI->scrnOffset = %ld\n",pXGI->scrnOffset )) ; + + pReg->xgiRegs3D4[0x19] = 0; + pReg->xgiRegs3D4[0x1A] &= 0xFC; + + if (mode->Flags & V_INTERLACE) { + offset = pXGI->scrnOffset >> 2; + pReg->xgiRegs3C4[0x06] |= 0x20; + + temp = (mode->CrtcHSyncStart >> 3) - + (mode->CrtcHTotal >> 3)/2; + pReg->xgiRegs3D4[0x19] = GETVAR8(temp); + pReg->xgiRegs3D4[0x1A] |= GETBITS(temp, 9:8); + } else { + offset = pXGI->scrnOffset >> 3; + pReg->xgiRegs3C4[0x06] &= ~0x20; + } + + pReg->xgiRegs3C4[0x07] |= 0x10; /* enable High Speed DAC */ + pReg->xgiRegs3C4[0x07] &= 0xFC; + if (clock < 100000) + pReg->xgiRegs3C4[0x07] |= 0x03; + else if (clock < 200000) + pReg->xgiRegs3C4[0x07] |= 0x02; + else if (clock < 250000) + pReg->xgiRegs3C4[0x07] |= 0x01; + + /* Extended Vertical Overflow */ + pReg->xgiRegs3C4[0x0A] = + GETBITSTR(mode->CrtcVTotal -2, 10:10, 0:0) | + GETBITSTR(mode->CrtcVDisplay -1, 10:10, 1:1) | + GETBITSTR(mode->CrtcVBlankStart , 10:10, 2:2) | + GETBITSTR(mode->CrtcVSyncStart , 10:10, 3:3) | + GETBITSTR(mode->CrtcVBlankEnd , 8:8, 4:4) | + GETBITSTR(mode->CrtcVSyncEnd , 4:4, 5:5) ; + + /* Extended Horizontal Overflow */ + pReg->xgiRegs3C4[0x0B] = + GETBITSTR((mode->CrtcHTotal >> 3) - 5, 9:8, 1:0) | + GETBITSTR((mode->CrtcHDisplay >> 3) - 1, 9:8, 3:2) | + GETBITSTR((mode->CrtcHBlankStart >> 3) , 9:8, 5:4) | + GETBITSTR((mode->CrtcHSyncStart >> 3) , 9:8, 7:6) ; + + pReg->xgiRegs3C4[0x0C] &= 0xF8; + pReg->xgiRegs3C4[0x0C] |= + GETBITSTR(mode->CrtcHBlankEnd >> 3, 7:6, 1:0) | + GETBITSTR(mode->CrtcHSyncEnd >> 3, 5:5, 2:2) ; + + /* Screen Offset */ + vgaReg->CRTC[0x13] = GETVAR8(offset); + pReg->xgiRegs3C4[0x0E] &= 0xF0; + pReg->xgiRegs3C4[0x0E] |= GETBITS(offset, 11:8); + + /* line compare */ + if (mode->CrtcHDisplay > 0) + pReg->xgiRegs3C4[0x0F] |= 0x08; + else + pReg->xgiRegs3C4[0x0F] &= 0xF7; + + pReg->xgiRegs3C4[0x10] = + ((mode->CrtcHDisplay *((pScrn->bitsPerPixel+7)/8) + 63) >> 6)+1; + + /* Enable Linear */ + pReg->xgiRegs3C4[0x20] |= 0x81; + + + /* Set vclk */ + if (XGI_compute_vclk(clock, &num, &denum, &div, &sbit, &scale)) { + pReg->xgiRegs3C4[0x2B] = (num -1) & 0x7f; + if (div == 2) + pReg->xgiRegs3C4[0x2B] |= 0x80; + pReg->xgiRegs3C4[0x2C] = ((denum -1) & 0x1f); + pReg->xgiRegs3C4[0x2C] |= (((scale-1)&3) << 5); + if (sbit) + pReg->xgiRegs3C4[0x2C] |= 0x80; + pReg->xgiRegs3C4[0x2D] = 0x80; + } + else { + /* if XGI_compute_vclk cannot handle the request clock try XGICalcClock! */ + XGICalcClock(pScrn, clock, 2, vclk); + pReg->xgiRegs3C4[0x2B] = (vclk[Midx] - 1) & 0x7f ; + pReg->xgiRegs3C4[0x2B] |= ((vclk[VLDidx] == 2 ) ? 1 : 0 ) << 7 ; + + /* bits [4:0] contain denumerator -MC */ + pReg->xgiRegs3C4[0x2C] = (vclk[Nidx] -1) & 0x1f ; + + if (vclk[Pidx] <= 4) { + /* postscale 1,2,3,4 */ + pReg->xgiRegs3C4[0x2C] |= (vclk[Pidx] -1 ) << 5 ; + pReg->xgiRegs3C4[0x2C] &= 0x7F; + } else { + /* postscale 6,8 */ + pReg->xgiRegs3C4[0x2C] |= ((vclk[Pidx] / 2) -1 ) << 5 ; + pReg->xgiRegs3C4[0x2C] |= 0x80; + } + pReg->xgiRegs3C4[0x2D] = 0x80; + } /* end of set vclk */ + + if (clock > 150000) { /* enable two-pixel mode */ + pReg->xgiRegs3C4[0x07] |= 0x80; + pReg->xgiRegs3C4[0x32] |= 0x08; + } else { + pReg->xgiRegs3C4[0x07] &= 0x7F; + pReg->xgiRegs3C4[0x32] &= 0xF7; + } + + /*pReg->xgiRegs3C2 = inb(0x3CC) | 0x0C;*/ /* Programmable Clock */ + pReg->xgiRegs3C2 = inb(pXGI->RelIO+0x4c) | 0x0C; /*Programmable Clock*/ + + if (!pXGI->NoAccel) { + pReg->xgiRegs3C4[0x1E] |= 0x42; + if (pXGI->TurboQueue) { /* set Turbo Queue as 512k */ + temp = ((pScrn->videoRam/64)-4); + pReg->xgiRegs3C4[0x26] = temp & 0xFF; + pReg->xgiRegs3C4[0x27] = ((temp >> 8) & 3) || 0xF0; + } + } + + /* set threshold value */ + (*pXGI->SetThreshold)(pScrn, mode, &Threshold_Low, &Threshold_High); + pReg->xgiRegs3C4[0x08] = GETBITSTR(Threshold_Low, 3:0, 7:4) | 0xF; + pReg->xgiRegs3C4[0x0F] &= ~GENMASK(5:5); + pReg->xgiRegs3C4[0x0F] |= GETBITSTR(Threshold_Low, 4:4, 5:5); + pReg->xgiRegs3C4[0x09] &= ~GENMASK(3:0); + pReg->xgiRegs3C4[0x09] |= GETBITS(Threshold_High, 3:0); + + return(TRUE); +} + +/* Detect video bridge and set VBFlags accordingly */ +void XGIVGAPreInit(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + switch (pXGI->Chipset) { + case PCI_CHIP_XGIXG40: + case PCI_CHIP_XGIXG20: + default: + pXGI->ModeInit = XG40Init; + break; + } + + +} + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_video.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_video.c:1.4 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_video.c Fri Oct 14 11:16:49 2005 @@ -0,0 +1,1235 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_video.c,v 1.4 2005/10/14 15:16:49 tsi Exp $ */ +/*************************************************************************** + +Copyright 2004 eXtreme Graphics Innovation Corp, Inc., HsinChu, Taiwan. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sub license, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial portions +of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. +IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR +THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Formerly based on Xv driver for SiS 300, 315 and 330 series by + * Thomas Winischhofer + * + * Basic structure based on the mga Xv driver by Mark Vojkovich + * and i810 Xv driver by Jonathan Bian . + * + * Authors: + * Nan-Hsing Chang + * + * This supports the following chipsets: + * XGI340, XGI342: Full register range, one overlay (used for both CRT1 and CRT2 alt.) + * + */ + +#include "xf86.h" +#include "xf86_OSproc.h" +#include "xf86Resources.h" +#include "xf86_ansic.h" +#include "compiler.h" +#include "xf86PciInfo.h" +#include "xf86Pci.h" +#include "xf86fbman.h" +#include "regionstr.h" + +#include "xgi.h" +#include "xf86xv.h" +#include +#include "xaa.h" +#include "xaalocal.h" +#include "dixstruct.h" +#include "fourcc.h" + +/* TODO: move to xgi_regs.h */ +#include "xgi_videohw.h" +#include "xgi_video.h" + +static XF86VideoAdaptorPtr XGISetupImageVideo(ScreenPtr); +static int XGISetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer); +static int XGIGetPortAttribute(ScrnInfoPtr, Atom ,INT32 *, pointer); +static void XGIQueryBestSize(ScrnInfoPtr, Bool, + short, short, short, short, unsigned int *, unsigned int *, pointer); +static int XGIPutImage( ScrnInfoPtr, + short, short, short, short, short, short, short, short, + int, unsigned char*, short, short, Bool, RegionPtr, pointer); +static int XGIQueryImageAttributes(ScrnInfoPtr, + int, unsigned short *, unsigned short *, int *, int *); +static void XGIStopVideo(ScrnInfoPtr, pointer, Bool); +/* static void XGIFreeOverlayMemory(ScrnInfoPtr pScrn); */ + +#define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE) + +void XGIInitVideo(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL; + XF86VideoAdaptorPtr newAdaptor = NULL; + int num_adaptors; + + newAdaptor = XGISetupImageVideo(pScreen); + + num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors); + + if(newAdaptor) { + if(!num_adaptors) { + num_adaptors = 1; + adaptors = &newAdaptor; + } else { + newAdaptors = /* need to free this someplace */ + xalloc((num_adaptors + 1) * sizeof(XF86VideoAdaptorPtr*)); + if(newAdaptors) { + memcpy(newAdaptors, adaptors, num_adaptors * + sizeof(XF86VideoAdaptorPtr)); + newAdaptors[num_adaptors] = newAdaptor; + adaptors = newAdaptors; + num_adaptors++; + } + } + } + + if(num_adaptors) + xf86XVScreenInit(pScreen, adaptors, num_adaptors); + + if(newAdaptors) + xfree(newAdaptors); + +} + + +/* client libraries expect an encoding */ +static XF86VideoEncodingRec DummyEncoding = +{ + 0, + "XV_IMAGE", + 0, 0, /* Will be filled in */ + {1, 1} +}; + +#define NUM_FORMATS 3 + +static XF86VideoFormatRec XGIFormats[NUM_FORMATS] = +{ + { 8, PseudoColor}, + {16, TrueColor}, + {24, TrueColor} +}; + +static char xgixvcolorkey[] = "XV_COLORKEY"; +static char xgixvbrightness[] = "XV_BRIGHTNESS"; +static char xgixvcontrast[] = "XV_CONTRAST"; +static char xgixvsaturation[] = "XV_SATURATION"; +static char xgixvhue[] = "XV_HUE"; +static char xgixvgammared[] = "XV_GAMMA_RED"; +static char xgixvgammagreen[] = "XV_GAMMA_GREEN"; +static char xgixvgammablue[] = "XV_GAMMA_BLUE"; + +#define NUM_ATTRIBUTES 8 + +static XF86AttributeRec XGIAttributes[NUM_ATTRIBUTES] = +{ + {XvSettable | XvGettable, 0, (1 << 24) - 1, xgixvcolorkey}, + {XvSettable | XvGettable, -128, 127, xgixvbrightness}, + {XvSettable | XvGettable, 0, 255, xgixvcontrast}, + {XvSettable | XvGettable, -180, 180, xgixvsaturation}, + {XvSettable | XvGettable, -180, 180, xgixvhue}, + {XvSettable | XvGettable, 100, 10000, xgixvgammared}, + {XvSettable | XvGettable, 100, 10000, xgixvgammagreen}, + {XvSettable | XvGettable, 100, 10000, xgixvgammablue}, +}; + +#define NUM_IMAGES 8 + +static XF86ImageRec XGIImages[NUM_IMAGES] = + { + XVIMAGE_YUY2, /* If order is changed, XGIOffscreenImages must be adapted */ + XVIMAGE_YV12, + XVIMAGE_UYVY, + { /* RGB 555 */ + PIXEL_FMT_RGB5, + XvRGB, + LSBFirst, + {'R','V','1','5', + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, + 16, + XvPacked, + 1, + 15, 0x7C00, 0x03E0, 0x001F, + 0, 0, 0, + 0, 0, 0, + 0, 0, 0, + {'R', 'V', 'B',0, + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, + XvTopToBottom + }, + { /* RGB 565 */ + PIXEL_FMT_RGB6, + XvRGB, + LSBFirst, + {'R','V','1','6', + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, + 16, + XvPacked, + 1, + 16, 0xF800, 0x07E0, 0x001F, + 0, 0, 0, + 0, 0, 0, + 0, 0, 0, + {'R', 'V', 'B',0, + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, + XvTopToBottom + }, + { /* YVYU */ + PIXEL_FMT_YVYU, \ + XvYUV, \ + LSBFirst, \ + {'Y','V','Y','U', + 0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, + 16, + XvPacked, + 1, + 0, 0, 0, 0 , + 8, 8, 8, + 1, 2, 2, + 1, 1, 1, + {'Y','V','Y','U', + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, + XvTopToBottom + }, + { /* NV12 */ + PIXEL_FMT_NV12, + XvYUV, + LSBFirst, + {'N','V','1','2', + 0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, + 12, + XvPlanar, + 2, + 0, 0, 0, 0 , + 8, 8, 8, + 1, 2, 2, + 1, 2, 2, + {'Y','U','V',0, + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, + XvTopToBottom + }, + { /* NV21 */ + PIXEL_FMT_NV21, + XvYUV, + LSBFirst, + {'N','V','2','1', + 0x00,0x00,0x00,0x10,0x80,0x00,0x00,0xAA,0x00,0x38,0x9B,0x71}, + 12, + XvPlanar, + 2, + 0, 0, 0, 0, + 8, 8, 8, + 1, 2, 2, + 1, 2, 2, + {'Y','V','U',0, + 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, + XvTopToBottom + }, +}; + +static void +set_maxencoding(XGIPtr pXGI, XGIPortPrivPtr pPriv) +{ + DummyEncoding.width = IMAGE_MAX_WIDTH; + DummyEncoding.height = IMAGE_MAX_HEIGHT; +} + +static void +XGIResetXvGamma(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + XGIPortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn); + + XGIUpdateXvGamma(pXGI, pPriv); +} + +static void +XGISetPortDefaults(ScrnInfoPtr pScrn, XGIPortPrivPtr pPriv) +{ + pPriv->colorKey = 0x000101fe; + pPriv->brightness = 0; + pPriv->contrast = 128; + pPriv->saturation = 0; + pPriv->hue = 0; +} + +static XF86VideoAdaptorPtr +XGISetupImageVideo(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + XGIPtr pXGI = XGIPTR(pScrn); + XF86VideoAdaptorPtr adapt; + XGIPortPrivPtr pPriv; + + if(!(adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec) + + sizeof(XGIPortPrivRec) + + sizeof(DevUnion)))) + return NULL; + + adapt->type = XvWindowMask | XvInputMask | XvImageMask; + adapt->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT; + /*adapt->name = "XGI Video Overlay"; */ + adapt->name = "XGI Video"; + adapt->nEncodings = 1; + adapt->pEncodings = &DummyEncoding; + adapt->nFormats = NUM_FORMATS; + adapt->pFormats = XGIFormats; + adapt->nPorts = 1; + adapt->pPortPrivates = (DevUnion*)(&adapt[1]); + + pPriv = (XGIPortPrivPtr)(&adapt->pPortPrivates[1]); + + adapt->pPortPrivates[0].ptr = (pointer)(pPriv); + adapt->pAttributes = XGIAttributes; + adapt->nAttributes = NUM_ATTRIBUTES; + adapt->nImages = NUM_IMAGES; + adapt->pImages = XGIImages; + adapt->PutVideo = NULL; + adapt->PutStill = NULL; + adapt->GetVideo = NULL; + adapt->GetStill = NULL; + adapt->StopVideo = XGIStopVideo; + adapt->SetPortAttribute = XGISetPortAttribute; + adapt->GetPortAttribute = XGIGetPortAttribute; + adapt->QueryBestSize = XGIQueryBestSize; + adapt->PutImage = XGIPutImage; + adapt->QueryImageAttributes = XGIQueryImageAttributes; + + pPriv->currentBuf = 0; + pPriv->linear = NULL; + pPriv->fbAreaPtr = NULL; + pPriv->fbSize = 0; + pPriv->videoStatus = 0; + pPriv->linebufMergeLimit = 1280; + + /* gotta uninit this someplace */ +#if defined(REGION_NULL) + REGION_NULL(pScreen, &pPriv->clip); +#else + REGION_INIT(pScreen, &pPriv->clip, NullBox, 0); +#endif + + /* Reset the properties to their defaults */ + XGISetPortDefaults(pScrn, pPriv); + + pXGI->adaptor = adapt; + pXGI->xvBrightness = MAKE_ATOM(xgixvbrightness); + pXGI->xvContrast = MAKE_ATOM(xgixvcontrast); + pXGI->xvColorKey = MAKE_ATOM(xgixvcolorkey); + pXGI->xvSaturation = MAKE_ATOM(xgixvsaturation); + pXGI->xvHue = MAKE_ATOM(xgixvhue); + pXGI->xvGammaRed = MAKE_ATOM(xgixvgammared); + pXGI->xvGammaGreen = MAKE_ATOM(xgixvgammagreen); + pXGI->xvGammaBlue = MAKE_ATOM(xgixvgammablue); + + /* set display register */ + if(pXGI->VBFlags) { + pPriv->displayMode = DISPMODE_MIRROR; + XGI_SetSRRegMask(pXGI, Index_SR_Graphic_Mode, 0x00, 0xc0); /* Only ovelray in CRT1*/ + XGI_SetSRRegMask(pXGI, Index_SR_Ext_Clock_Sel, 0x00, 0xc0); + } + else { + pPriv->displayMode = DISPMODE_SINGLE1; + XGI_SetSRRegMask(pXGI, Index_SR_Graphic_Mode, 0x00, 0xc0); + XGI_SetSRRegMask(pXGI, Index_SR_Ext_Clock_Sel, 0x00, 0xc0); + } + + set_maxencoding(pXGI, pPriv); + + XGIResetVideo(pScrn); + + pXGI->ResetXv = XGIResetVideo; + pXGI->ResetXvGamma = XGIResetXvGamma; + + return adapt; +} + +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,3,99,0,0) +static Bool +RegionsEqual(RegionPtr A, RegionPtr B) +{ + int *dataA, *dataB; + int num; + + num = REGION_NUM_RECTS(A); + if(num != REGION_NUM_RECTS(B)) + return FALSE; + + if((A->extents.x1 != B->extents.x1) || + (A->extents.x2 != B->extents.x2) || + (A->extents.y1 != B->extents.y1) || + (A->extents.y2 != B->extents.y2)) + return FALSE; + + dataA = (int*)REGION_RECTS(A); + dataB = (int*)REGION_RECTS(B); + + while(num--) { + if((dataA[0] != dataB[0]) || (dataA[1] != dataB[1])) + return FALSE; + dataA += 2; + dataB += 2; + } + + return TRUE; +} +#endif + + +static int +XGISetPortAttribute( + ScrnInfoPtr pScrn, + Atom attribute, + INT32 value, + pointer data +){ + XGIPortPrivPtr pPriv = (XGIPortPrivPtr)data; + XGIPtr pXGI = XGIPTR(pScrn); + + if (attribute == pXGI->xvBrightness) { + if((value < -128) || (value > 127)) + return BadValue; + + pPriv->brightness = value; + XGI_SetVideoBrightnessReg(pXGI, value); + } + else if (attribute == pXGI->xvContrast) { + if ((value < 0) || (value > 255)) + return BadValue; + + pPriv->contrast = value; + XGI_SetVideoContrastReg(pXGI, value); + } + else if (attribute == pXGI->xvSaturation){ + if ((value < -180) || (value > 180)) + return BadValue; + + pPriv->saturation = value; + XGI_SetVideoSaturationReg(pXGI, value); + } + else if (attribute == pXGI->xvHue){ + if ((value < -180) || (value > 180)) + return BadValue; + + pPriv->hue = value; + XGI_SetVideoHueReg(pXGI, value); + } + else if (attribute == pXGI->xvColorKey) { + pPriv->colorKey = value; + REGION_EMPTY(pScrn->pScreen, &pPriv->clip); + } else if(attribute == pXGI->xvGammaRed) { + if((value < 100) || (value > 10000)) + return BadValue; + + pXGI->XvGammaRed = value; + XGIUpdateXvGamma(pXGI, pPriv); + } else if(attribute == pXGI->xvGammaGreen) { + if((value < 100) || (value > 10000)) + return BadValue; + + pXGI->XvGammaGreen = value; + XGIUpdateXvGamma(pXGI, pPriv); + } else if(attribute == pXGI->xvGammaBlue) { + if((value < 100) || (value > 10000)) + return BadValue; + + pXGI->XvGammaBlue = value; + XGIUpdateXvGamma(pXGI, pPriv); + } else + return BadMatch; + + return Success; +} + +static int +XGIGetPortAttribute( + ScrnInfoPtr pScrn, + Atom attribute, + INT32 *value, + pointer data +){ + XGIPortPrivPtr pPriv = (XGIPortPrivPtr)data; + XGIPtr pXGI = XGIPTR(pScrn); + + if (attribute == pXGI->xvBrightness) { + *value = pPriv->brightness; + } + else if (attribute == pXGI->xvContrast) { + *value = pPriv->contrast; + } + else if (attribute == pXGI->xvSaturation) { + *value = pPriv->saturation; + } + else if (attribute == pXGI->xvHue) { + *value = pPriv->hue; + + } else if(attribute == pXGI->xvGammaRed) { + *value = pXGI->XvGammaRed; + + } else if(attribute == pXGI->xvGammaGreen) { + *value = pXGI->XvGammaGreen; + + } else if(attribute == pXGI->xvGammaBlue) { + *value = pXGI->XvGammaBlue; + + } + else if (attribute == pXGI->xvColorKey) { + *value = pPriv->colorKey; + + } + else + return BadMatch; + + return Success; +} + +static void +XGIQueryBestSize( + ScrnInfoPtr pScrn, + Bool motion, + short vid_w, short vid_h, + short drw_w, short drw_h, + unsigned int *p_w, unsigned int *p_h, + pointer data +){ + *p_w = drw_w; + *p_h = drw_h; + + /* TODO: report the HW limitation */ +} + + +static void +set_scale_factor(XGIOverlayPtr pOverlay) +{ + float f_temp; + int NewPitch, srcPitch; + + CARD32 I=0; + + int dstW = pOverlay->dstBox.x2 - pOverlay->dstBox.x1; + int dstH = pOverlay->dstBox.y2 - pOverlay->dstBox.y1; + int srcW = pOverlay->srcW; + int srcH = pOverlay->srcH; + + NewPitch = srcPitch = pOverlay->pitch; + + /*Set 1 as default, because we don't need change 4-tap DDA scale value in the upscale case*/ + pOverlay->f_scale = 1.0; + + if (dstW == srcW) { + pOverlay->HUSF = 0x00; + pOverlay->IntBit = 0x05; + } + else if (dstW > srcW) { + + /*pOverlay->HUSF = (srcW << 16) / dstW; */ + + if ((dstW > 2) && (srcW > 2)) { + pOverlay->HUSF = (((srcW - 2) << 16) + dstW - 3) / (dstW - 2); + } + else { + pOverlay->HUSF = ((srcW << 16) + dstW - 1) / dstW; + } + pOverlay->IntBit = 0x04; + } + /* downscale in horizontal */ + else { + + int tmpW = dstW; + + I = 0x00; + + pOverlay->IntBit = 0x01; + + /* */ + while (srcW >= tmpW) + { + tmpW <<= 1; + I++; + } + + pOverlay->wHPre = (CARD8)(I - 1); + dstW <<= (I - 1); + + f_temp = srcW/dstW; + + /* we don't need to change 4-tap DDA scale if upscale */ + if (f_temp < 1.0) + f_temp = 1.0; + + pOverlay->f_scale = f_temp; + + if ((srcW % dstW)) + pOverlay->HUSF = ((srcW - dstW) << 16) / dstW; + else + pOverlay->HUSF = 0x00; + } + + if (dstH == srcH) { + pOverlay->VUSF = 0x00; + pOverlay->IntBit |= 0x0A; + } + else if (dstH > srcH) { + dstH += 0x02; + /*pOverlay->VUSF = (srcH << 16) / dstH;*/ + if ((dstH > 2) && (srcH > 2)) { + pOverlay->VUSF = (((srcH - 2) << 16) - 32768 + dstH - 3) / (dstH - 2); + } + else { + pOverlay->VUSF = ((srcH << 16) + dstH - 1) / dstH; + } + + pOverlay->IntBit |= 0x08; + } + /* downscale in vertical */ + else { + I = srcH / dstH; + pOverlay->IntBit |= 0x02; + + if (I < 2) + { + pOverlay->VUSF = ((srcH - dstH)<<16)/dstH; + } + else + { + if (((srcPitch * I)>>2) > 0xFFF) + { + I = (0xFFF*2/srcPitch); + pOverlay->VUSF = 0xFFFF; + } + else + { + dstH = I * dstH; + + if (srcH % dstH) + pOverlay->VUSF = ((srcH - dstH) << 16) / dstH; + else + pOverlay->VUSF = 0x00; + } + + /* set video frame buffer offset */ + NewPitch = (srcPitch*I); + } + } + + pOverlay->pitch = (CARD16)(NewPitch); + } + +static void +set_contrast_factor(XGIPtr pXGI, XGIOverlayPtr pOverlay) +{ + ScrnInfoPtr pScrn = pXGI->pScrn; + CARD16 screenX = pScrn->currentMode->HDisplay; + CARD16 screenY = pScrn->currentMode->VDisplay; + + CARD32 value, SamplePixel, dwTotalPixel; + + CARD16 top, left; + CARD16 bottom, right; + + top = pOverlay->dstBox.y1; + bottom = pOverlay->dstBox.y2; + + if (bottom > screenY) + bottom = screenY; + + left = pOverlay->dstBox.x1; + right = pOverlay->dstBox.x2; + + if (right > screenX) + right = screenX; + + dwTotalPixel = (bottom - top) * (right - left); + + value = (dwTotalPixel - 10000) / 20000; + + if (value > 3 ) + value = 3; + + pOverlay->dwContrastFactor = value; + + switch (value) { + case 1: SamplePixel = 4096; break; + case 2: SamplePixel = 8192; break; + case 3: SamplePixel = 8192; break; + + default: + SamplePixel = 2048; + break; + } + + pOverlay->SamplePixel = (SamplePixel << 10) / dwTotalPixel; + +} + +static void +set_line_buf_size(XGIOverlayPtr pOverlay) +{ + CARD8 preHIDF; + CARD32 dwI; + CARD32 dwSrcWidth = pOverlay->srcW; + int pixelFormat = pOverlay->pixelFormat; + + if ((pixelFormat == PIXEL_FMT_YV12) || + (pixelFormat == PIXEL_FMT_NV12) || + (pixelFormat == PIXEL_FMT_NV21)) + { + preHIDF = pOverlay->wHPre & 0x07; + + if (preHIDF < 2) + { + preHIDF = 2; + } + + if (dwSrcWidth & ~(0xffffff80 << (preHIDF - 2))) + { + dwI = (dwSrcWidth >> (preHIDF + 5)) + 1; + } + else + { + dwI = dwSrcWidth >> (preHIDF + 5); + } + + pOverlay->lineBufSize = dwI * (0x01 << (preHIDF + 2)) - 1; + + } + /* not plane format */ + else + { + if (dwSrcWidth & 0x07) + dwI = (dwSrcWidth >> 3) + 1; + else + dwI = (dwSrcWidth >> 3); + + pOverlay->lineBufSize = dwI; + } +} + +static void +XGIDisplayVideo(ScrnInfoPtr pScrn, XGIPortPrivPtr pPriv) +{ + XGIPtr pXGI = XGIPTR(pScrn); + + short srcPitch = pPriv->srcPitch; + short height = pPriv->height; + XGIOverlayRec overlay; + int srcOffsetX=0, srcOffsetY=0; + int sx=0, sy=0; + + memset(&overlay, 0, sizeof(overlay)); + overlay.pixelFormat = pPriv->id; + overlay.pitch = srcPitch; + overlay.keyOP = 0x03; /* destination colorkey */ + overlay.bobEnable = 0x00; + + overlay.dstBox.x1 = pPriv->drw_x - pScrn->frameX0; + overlay.dstBox.x2 = pPriv->drw_x + pPriv->drw_w - pScrn->frameX0; + overlay.dstBox.y1 = pPriv->drw_y - pScrn->frameY0; + overlay.dstBox.y2 = pPriv->drw_y + pPriv->drw_h - pScrn->frameY0; + + if((overlay.dstBox.x2 < 0) || (overlay.dstBox.y2 < 0)) + return; + + if(overlay.dstBox.x1 < 0) { + srcOffsetX = pPriv->src_w * (-overlay.dstBox.x1) / pPriv->drw_w; + overlay.dstBox.x1 = 0; + } + if(overlay.dstBox.y1 < 0) { + srcOffsetY = pPriv->src_h * (-overlay.dstBox.y1) / pPriv->drw_h; + overlay.dstBox.y1 = 0; + } + + if (pPriv->videoStatus & CLIENT_CAPTURE_ON) + { + /* We use AutoFlip for capture, not need buffer address */ + overlay.PSY = 0x0000; + } + else + { + switch(pPriv->id){ + case PIXEL_FMT_YV12: + sx = (pPriv->src_x + srcOffsetX) & ~7; + sy = (pPriv->src_y + srcOffsetY) & ~1; + + overlay.PSY = pPriv->bufAddr[pPriv->currentBuf] + sx + sy*srcPitch; + overlay.PSV = pPriv->bufAddr[pPriv->currentBuf] + height*srcPitch + ((sx + sy*srcPitch/2) >> 1); + overlay.PSU = pPriv->bufAddr[pPriv->currentBuf] + height*srcPitch*5/4 + ((sx + sy*srcPitch/2) >> 1); + break; + + case PIXEL_FMT_NV12: + case PIXEL_FMT_NV21: + sx = (pPriv->src_x + srcOffsetX) & ~7; + sy = (pPriv->src_y + srcOffsetY) & ~1; + overlay.PSY = pPriv->bufAddr[pPriv->currentBuf] + sx + sy*srcPitch; + overlay.PSV = pPriv->bufAddr[pPriv->currentBuf] + height*srcPitch + ((sx + sy*srcPitch/2) >> 1); + overlay.PSU = overlay.PSV; + break; + + case PIXEL_FMT_YUY2: + case PIXEL_FMT_UYVY: + case PIXEL_FMT_YVYU: + case PIXEL_FMT_RGB6: + case PIXEL_FMT_RGB5: + sx = (pPriv->src_x + srcOffsetX) & ~1; + sy = (pPriv->src_y + srcOffsetY); + + overlay.PSY = pPriv->bufAddr[pPriv->currentBuf] + sx*2 + sy*srcPitch; + break; + + default: + /* ErrorF("UnSurpported Format"); */ + break; + } + + } + + overlay.srcW = pPriv->src_w - (sx - pPriv->src_x); + overlay.srcH = pPriv->src_h - (sy - pPriv->src_y); + + /* set line buffer length */ + set_line_buf_size (&overlay); + + /* set scale factor */ + set_scale_factor (&overlay); + + /* contrast factor */ + set_contrast_factor(pXGI, &overlay); + + XGI_SetSelectOverlayReg(pXGI, 0x00); + + XGI_SetColorkeyReg(pXGI, pPriv->colorKey); + + /* set overlay */ + XGI_SetOverlayReg(pXGI, &overlay); + + /* enable overlay */ + XGI_SetEnableOverlayReg(pXGI, TRUE); +} + + +static void +XGIStopVideo(ScrnInfoPtr pScrn, pointer data, Bool exit) +{ + XGIPortPrivPtr pPriv = (XGIPortPrivPtr)data; + XGIPtr pXGI = XGIPTR(pScrn); + + REGION_EMPTY(pScrn->pScreen, &pPriv->clip); + + if(exit) { + + if(pPriv->videoStatus & CLIENT_VIDEO_ON) { + XGI_SetEnableOverlayReg(pXGI, FALSE); + } + + if (pPriv->videoStatus & CLIENT_CAPTURE_ON) { + XGI_EnableCaptureAutoFlip(pXGI, FALSE); + } + + if(pPriv->fbAreaPtr) { + xf86FreeOffscreenArea(pPriv->fbAreaPtr); + pPriv->fbAreaPtr = NULL; + pPriv->fbSize = 0; + } + + + /* clear all flag */ + pPriv->videoStatus = 0; + + } else { + if(pPriv->videoStatus & CLIENT_VIDEO_ON) { + pPriv->videoStatus |= OFF_TIMER; + pPriv->offTime = currentTime.milliseconds + OFF_DELAY; + } + } +} + + +static int +XGIPutImage( + ScrnInfoPtr pScrn, + short src_x, short src_y, + short drw_x, short drw_y, + short src_w, short src_h, + short drw_w, short drw_h, + int id, unsigned char* buf, + short width, short height, + Bool sync, + RegionPtr clipBoxes, pointer data +){ + XGIPtr pXGI = XGIPTR(pScrn); + XGIPortPrivPtr pPriv = (XGIPortPrivPtr)data; + + int i; + + int totalSize=0; +/* int depth = pXGI->CurrentLayout.bitsPerPixel >> 3; */ + + pPriv->drw_x = drw_x; + pPriv->drw_y = drw_y; + pPriv->drw_w = drw_w; + pPriv->drw_h = drw_h; + pPriv->src_x = src_x; + pPriv->src_y = src_y; + pPriv->src_w = src_w; + pPriv->src_h = src_h; + pPriv->id = id; + pPriv->height = height; + + /* Pixel formats: + 1. YU12: 3 planes: H V + Y sample period 1 1 (8 bit per pixel) + V sample period 2 2 (8 bit per pixel, subsampled) + U sample period 2 2 (8 bit per pixel, subsampled) + + Y plane is fully sampled (width*height), U and V planes + are sampled in 2x2 blocks, hence a group of 4 pixels requires + 4 + 1 + 1 = 6 bytes. The data is planar, ie in single planes + for Y, U and V. + 2. UYVY: 3 planes: H V + Y sample period 1 1 (8 bit per pixel) + V sample period 2 1 (8 bit per pixel, subsampled) + U sample period 2 1 (8 bit per pixel, subsampled) + Y plane is fully sampled (width*height), U and V planes + are sampled in 2x1 blocks, hence a group of 4 pixels requires + 4 + 2 + 2 = 8 bytes. The data is bit packed, there are no separate + Y, U or V planes. + Bit order: U0 Y0 V0 Y1 U2 Y2 V2 Y3 ... + 3. I420: Like YU12, but planes U and V are in reverse order. + 4. YUY2: Like UYVY, but order is + Y0 U0 Y1 V0 Y2 U2 Y3 V2 ... + 5. YVYU: Like YUY2, but order is + Y0 V0 Y1 U0 Y2 V2 Y3 U2 ... + */ + switch(id){ + case PIXEL_FMT_YV12: + case PIXEL_FMT_NV12: + case PIXEL_FMT_NV21: + pPriv->srcPitch = (width + 7) & ~7; + totalSize = (pPriv->srcPitch * height * 3) >> 1; /* Verified */ + break; + case PIXEL_FMT_YUY2: + case PIXEL_FMT_UYVY: + case PIXEL_FMT_YVYU: + case PIXEL_FMT_RGB6: + case PIXEL_FMT_RGB5: + default: + pPriv->srcPitch = ((width << 1) + 3) & ~3; /* Verified */ + totalSize = pPriv->srcPitch * height; + } + + /* make it a multiple of 16 to simplify to copy loop */ + totalSize += 15; + totalSize &= ~15; + + /* allocate memory */ + do { + int lines, pitch, depth; + BoxPtr pBox; + + if(totalSize == pPriv->fbSize) + break; + + pPriv->fbSize = totalSize; + + if(pPriv->fbAreaPtr) { + xf86FreeOffscreenArea(pPriv->fbAreaPtr); + } + + depth = (pScrn->bitsPerPixel + 7 ) / 8; + pitch = pScrn->displayWidth * depth; + lines = ((totalSize * 2) / pitch) + 1; + + pPriv->fbAreaPtr = xf86AllocateOffscreenArea(pScrn->pScreen, + pScrn->displayWidth, + lines, 0, NULL, NULL, NULL); + + if(!pPriv->fbAreaPtr) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Allocate video memory fails\n"); + return BadAlloc; + } + + pBox = &(pPriv->fbAreaPtr->box); + pPriv->bufAddr[0] = (pBox->x1 * depth) + (pBox->y1 * pitch); + pPriv->bufAddr[1] = pPriv->bufAddr[0] + totalSize; + + } while(0); + + /* copy data */ + if((pXGI->XvUseMemcpy) || (totalSize < 16)) { +#ifndef NewPath + memcpy(pXGI->FbBase + pPriv->bufAddr[pPriv->currentBuf], buf, totalSize); +#else + switch(id){ + case PIXEL_FMT_YV12: + { + BYTE *Y, *V, *U, *srcY, *srcV, *srcU; + + short srcPitch2 = pPriv->srcPitch >> 1; + short height2 = height >> 1; + short width2 = width >> 1; + + Y = (BYTE *)(pXGI->FbBase + pPriv->bufAddr[pPriv->currentBuf]); + V = Y + pPriv->srcPitch * height; + U = V + pPriv->srcPitch * height / 4 ; + + srcY = buf; + srcV = srcY + width * height; + srcU = srcV + width * height / 4; + + for(i=0; isrcPitch, srcY + i*width, width); + + for(i=0; i> 1; + + Y = (BYTE *)(pXGI->FbBase + pPriv->bufAddr[pPriv->currentBuf]); + VU = Y + pPriv->srcPitch * height; + + srcY = buf; + srcVU = srcY + width * height; + + for(i=0; isrcPitch, srcY + i*width, width); + + for(i=0; isrcPitch, srcVU + i*width, width); + break; + } + case PIXEL_FMT_YUY2: + case PIXEL_FMT_UYVY: + case PIXEL_FMT_YVYU: + case PIXEL_FMT_RGB6: + case PIXEL_FMT_RGB5: + { + BYTE *Base = (BYTE *)(pXGI->FbBase + pPriv->bufAddr[pPriv->currentBuf]); + for(i=0; isrcPitch, buf + i*width*2, width*2); + break; + } + default: + memcpy(pXGI->FbBase + pPriv->bufAddr[pPriv->currentBuf], buf, totalSize); + break; + } +#endif + + } else { + +#ifndef NewPath + BYTE *Base = (BYTE *)(pXGI->FbBase + pPriv->bufAddr[pPriv->currentBuf]); + + for(i=0; isrcPitch >> 1; + short height2 = height >> 1; + short width2 = width >> 1; + + Y = (BYTE *)(pXGI->FbBase + pPriv->bufAddr[pPriv->currentBuf]); + V = Y + pPriv->srcPitch * height; + U = V + pPriv->srcPitch * height / 4 ; + srcY = buf; + srcV = srcY + width * height; + srcU = srcV + width * height / 4; + + for(i=0; isrcPitch*i + j); + + for(i=0; i> 1; + + Y = (BYTE *)(pXGI->FbBase + pPriv->bufAddr[pPriv->currentBuf]); + VU = Y + pPriv->srcPitch * height; + + srcY = buf; + srcVU = srcY + width * height; + + for(i=0; isrcPitch*i + j); + + for(i=0; isrcPitch*i + j); + + break; + } + case PIXEL_FMT_YUY2: + case PIXEL_FMT_UYVY: + case PIXEL_FMT_YVYU: + case PIXEL_FMT_RGB6: + case PIXEL_FMT_RGB5: + { + BYTE *Base = (BYTE *)(pXGI->FbBase + pPriv->bufAddr[pPriv->currentBuf]); + + for(i=0; isrcPitch * i + j); + break; + } + default: + { + BYTE *Base = (BYTE *)(pXGI->FbBase + pPriv->bufAddr[pPriv->currentBuf]); + + for(i=0; iclip, clipBoxes)) +#else + if(!REGION_EQUAL(pScrn->pScreen, &pPriv->clip, clipBoxes)) +#endif + { + REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes); + + /* draw these */ + } else { +#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,99,0,0) + XAAFillSolidRects(pScrn, pPriv->colorKey, GXcopy, ~0, + REGION_NUM_RECTS(clipBoxes), + REGION_RECTS(clipBoxes)); +#else + xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey, clipBoxes); +#endif + } /* update cliplist */ + + pPriv->currentBuf ^= 1; + pPriv->videoStatus = CLIENT_VIDEO_ON; + + return Success; +} + + +static int +XGIQueryImageAttributes( + ScrnInfoPtr pScrn, + int id, + unsigned short *w, unsigned short *h, + int *pitches, int *offsets +){ + int pitchY, pitchUV; + int size, sizeY, sizeUV; + + if(*w < IMAGE_MIN_WIDTH) *w = IMAGE_MIN_WIDTH; + if(*h < IMAGE_MIN_HEIGHT) *h = IMAGE_MIN_HEIGHT; + + if(*w > DummyEncoding.width) *w = DummyEncoding.width; + if(*h > DummyEncoding.height) *h = DummyEncoding.height; + + switch(id) { + case PIXEL_FMT_YV12: + *w = (*w + 7) & ~7; + *h = (*h + 1) & ~1; + pitchY = *w; + pitchUV = *w >> 1; + if(pitches) { + pitches[0] = pitchY; + pitches[1] = pitches[2] = pitchUV; + } + sizeY = pitchY * (*h); + sizeUV = pitchUV * ((*h) >> 1); + if(offsets) { + offsets[0] = 0; + offsets[1] = sizeY; + offsets[2] = sizeY + sizeUV; + } + size = sizeY + (sizeUV << 1); + break; + case PIXEL_FMT_NV12: + case PIXEL_FMT_NV21: + *w = (*w + 7) & ~7; + *h = (*h + 1) & ~1; + pitchY = *w; + pitchUV = *w; + if(pitches) { + pitches[0] = pitchY; + pitches[1] = pitchUV; + } + sizeY = pitchY * (*h); + sizeUV = pitchUV * ((*h) >> 1); + if(offsets) { + offsets[0] = 0; + offsets[1] = sizeY; + } + size = sizeY + (sizeUV << 1); + break; + case PIXEL_FMT_YUY2: + case PIXEL_FMT_UYVY: + case PIXEL_FMT_YVYU: + case PIXEL_FMT_RGB6: + case PIXEL_FMT_RGB5: + default: + *w = (*w + 1) & ~1; + pitchY = *w << 1; + if(pitches) pitches[0] = pitchY; + if(offsets) offsets[0] = 0; + size = pitchY * (*h); + break; + } + + return size; +} Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_video.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_video.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_video.h Mon May 2 09:28:02 2005 @@ -0,0 +1,76 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_video.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ + +#ifndef _XGI_VIDEO_H_ +#define _XGI_VIDEO_H_ + +#define PIXEL_FMT_YV12 FOURCC_YV12 /* 0x32315659 */ +#define PIXEL_FMT_UYVY FOURCC_UYVY /* 0x59565955 */ +#define PIXEL_FMT_YUY2 FOURCC_YUY2 /* 0x32595559 */ +#define PIXEL_FMT_RGB5 0x35315652 +#define PIXEL_FMT_RGB6 0x36315652 +#define PIXEL_FMT_YVYU 0x55595659 +#define PIXEL_FMT_NV12 0x3231564e +#define PIXEL_FMT_NV21 0x3132564e + +#define IMAGE_MIN_WIDTH 32 +#define IMAGE_MIN_HEIGHT 24 +#define IMAGE_MAX_WIDTH 1920 +#define IMAGE_MAX_HEIGHT 1080 + +#define DISPMODE_SINGLE1 0x1 +#define DISPMODE_SINGLE2 0x2 +#define DISPMODE_MIRROR 0x4 + +#define OFF_DELAY 200 /* milliseconds */ +#define FREE_DELAY 60000 + +#define OFF_TIMER 0x01 +#define FREE_TIMER 0x02 +#define CLIENT_VIDEO_ON 0x04 +#define CLIENT_CAPTURE_ON 0x08 +#define TIMER_MASK (OFF_TIMER | FREE_TIMER) + +typedef struct { + FBLinearPtr linear; + FBAreaPtr fbAreaPtr; + int fbSize; + CARD32 bufAddr[2]; + + unsigned char currentBuf; + + short drw_x, drw_y, drw_w, drw_h; + short src_x, src_y, src_w, src_h; + int id; + short srcPitch, height; + + INT32 brightness; + INT32 contrast; + INT32 saturation; + INT32 hue; + + RegionRec clip; + CARD32 colorKey; + + CARD32 videoStatus; + Time offTime; + Time freeTime; + + short linebufMergeLimit; + + CARD32 displayMode; + + Bool grabbedByV4L; /*V4L stuff*/ + int pitch; + int offset; + +} XGIPortPrivRec, *XGIPortPrivPtr; + +#define GET_PORT_PRIVATE(pScrn) \ + (XGIPortPrivPtr)((XGIPTR(pScrn))->adaptor->pPortPrivates[0].ptr) + +extern void XGI_SetSRRegMask(XGIPtr, CARD8, CARD8, CARD8); +extern void XGIUpdateXvGamma(XGIPtr, XGIPortPrivPtr); + + +#endif /* _XGI_VIDEO_H_ */ + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_videohw.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_videohw.c:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_videohw.c Mon May 2 09:28:02 2005 @@ -0,0 +1,771 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_videohw.c,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ + +/**************************************************************************** +* raw register access : these routines directly interact with the xgi's +* control aperature. must not be called until after +* the board's pci memory has been mapped. +****************************************************************************/ + +#include "xgi.h" +#include "xgi_videohw.h" +#include "xgi_video.h" +#include "fourcc.h" + +#define CAPTURE_340A1 +/* +static CARD32 _XGIRead(XGIPtr pXGI, CARD32 reg) +{ + return *(pXGI->IOBase + reg); +} + +staticvoid _XGIWrite(XGIPtr pXGI, CARD32 reg, CARD32 data) +{ + *(pXGI->IOBase + reg) = data; +} +*/ +static CARD8 GetVideoReg(XGIPtr pXGI, CARD8 reg) +{ + outb (pXGI->RelIO + vi_index_offset, reg); + return inb(pXGI->RelIO + vi_data_offset); +} + +static void SetVideoReg(XGIPtr pXGI, CARD8 reg, CARD8 data) +{ + outb (pXGI->RelIO + vi_index_offset, reg); + outb (pXGI->RelIO + vi_data_offset, data); +} + +static void SetVideoRegMask(XGIPtr pXGI, CARD8 reg, CARD8 data, CARD8 mask) +{ + CARD8 old; + + outb (pXGI->RelIO + vi_index_offset, reg); + old = inb(pXGI->RelIO + vi_data_offset); + data = (data & mask) | (old & (~mask)); + outb (pXGI->RelIO + vi_data_offset, data); +} + +static CARD8 GetSRReg(XGIPtr pXGI, CARD8 reg) +{ + outb (pXGI->RelIO + sr_index_offset, 0x05); + if (inb (pXGI->RelIO + sr_data_offset) != 0xa1) + outb (pXGI->RelIO + sr_data_offset, 0x86); + outb (pXGI->RelIO + sr_index_offset, reg); + return inb(pXGI->RelIO + sr_data_offset); +} + +static void SetSRReg(XGIPtr pXGI, CARD8 reg, CARD8 data) +{ + outb (pXGI->RelIO + sr_index_offset, 0x05); + if (inb (pXGI->RelIO + sr_data_offset) != 0xa1) + outb (pXGI->RelIO + sr_data_offset, 0x86); + outb (pXGI->RelIO + sr_index_offset, reg); + outb (pXGI->RelIO + sr_data_offset, data); +} + +void XGI_SetSRRegMask(XGIPtr pXGI, CARD8 reg, CARD8 data, CARD8 mask) +{ + CARD8 old; + + outb (pXGI->RelIO + sr_index_offset, 0x05); + if (inb (pXGI->RelIO + sr_data_offset) != 0xa1) + outb (pXGI->RelIO + sr_data_offset, 0x86); + outb (pXGI->RelIO + sr_index_offset, reg); + old = inb(pXGI->RelIO + sr_data_offset); + data = (data & mask) | (old & (~mask)); + outb (pXGI->RelIO + sr_data_offset, data); +} +/* +static void SetVCReg(XGIPtr pXGI, CARD8 reg, CARD8 data) +{ + outb (pXGI->RelIO + vc_index_offset, reg); + outb (pXGI->RelIO + vc_data_offset, data); +} +*/ +static void SetVCRegMask(XGIPtr pXGI, CARD8 reg, CARD8 data, CARD8 mask) +{ + CARD8 old; + + outb (pXGI->RelIO + vc_index_offset, reg); + old = inb(pXGI->RelIO + vc_data_offset); + data = (data & mask) | (old & (~mask)); + outb (pXGI->RelIO + vc_data_offset, data); +} +/* +static CARD8 GetXGIReg(XGIPtr pXGI, CARD8 index_offset, CARD8 reg) +{ + outb (pXGI->RelIO + index_offset, reg); + return inb(pXGI->RelIO + index_offset+1); +} + +static void SetXGIReg(XGIPtr pXGI, CARD8 index_offset, CARD8 reg, CARD8 data) +{ + outb (pXGI->RelIO + index_offset, reg); + outb (pXGI->RelIO + index_offset+1, data); +} +*/ +static float tap_dda_func(float x) +{ + double pi = 3.14159265358979; + float r = 0.5; + float y; + + if (x == 0) + y = 1.0; + else if ((x == -1.0/(2.0*r)) || (x == 1.0/(2.0*r))) + y = (float) (r/2.0 * sin(pi/(2.0*r))); + else + y = (float) (sin(pi*x)/(pi*x)*cos(r*pi*x)/(1-4*r*r*x*x)); + + return y; +} + +/* ----------------T05_EnableCapture()---------------- */ +#ifdef CAPTURE_340A1 +static void SetEnableCaptureReg(XGIPtr pXGI, Bool bEnable, Bool bFlip) +{ + if (bEnable) + { + SetVCRegMask(pXGI, Index_VC_Ver_Down_Scale_Factor_Over, 0x00, 0x10); + + if (pXGI->Chipset == PCI_CHIP_XGIXG40) + SetVideoRegMask(pXGI, Index_VI_Key_Overlay_OP, 0x20, 0x20); + else + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, 0x01, 0x01); + } + else + { + SetVCRegMask(pXGI, Index_VC_Ver_Down_Scale_Factor_Over, 0x10, 0x10); + + if (pXGI->Chipset == PCI_CHIP_XGIXG40) + SetVideoRegMask(pXGI, Index_VI_Key_Overlay_OP, 0x00, 0x20); + else + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, 0x00, 0x01); + } + + + if (pXGI->Chipset == PCI_CHIP_XGIXG40) + { + if(bFlip) + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, 0x01, 0x01); + else + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, 0x00, 0x01); + } +} +#else +void T05_EnableCapture(XGIPtr pXGI, Bool bEnable) +{ + if (bEnable) + { + SetVCRegMask(pXGI, Index_VC_Ver_Down_Scale_Factor_Over, 0x00, 0x10); + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, 0x01, 0x01); + } + else + { + SetVCRegMask(pXGI, Index_VC_Ver_Down_Scale_Factor_Over, 0x10, 0x10); + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, 0x00, 0x01); + } +} +#endif + +static void +XGIComputeXvGamma(XGIPtr pXGI) +{ + int num = 255, i; + double red = 1.0 / (double)((double)pXGI->XvGammaRed / 1000); + double green = 1.0 / (double)((double)pXGI->XvGammaGreen / 1000); + double blue = 1.0 / (double)((double)pXGI->XvGammaBlue / 1000); + + for(i = 0; i <= num; i++) { + pXGI->XvGammaRampRed[i] = + (red == 1.0) ? i : (CARD8)(pow((double)i / (double)num, red) * (double)num + 0.5); + + pXGI->XvGammaRampGreen[i] = + (green == 1.0) ? i : (CARD8)(pow((double)i / (double)num, green) * (double)num + 0.5); + + pXGI->XvGammaRampBlue[i] = + (blue == 1.0) ? i : (CARD8)(pow((double)i / (double)num, blue) * (double)num + 0.5); + } +} + +static void +XGISetXvGamma(XGIPtr pXGI) +{ + int i; + unsigned char backup = GetSRReg(pXGI, Index_SR_Power_Management); + /* SR1F[4:3] + * 10: disable gamma1, enable gamma0 + */ + XGI_SetSRRegMask(pXGI, Index_SR_Power_Management, 0x08, 0x18); + for(i = 0; i <= 255; i++) { + MMIO_OUT32(pXGI->IOBase, REG_GAMMA_PALETTE, + (i << 24) | + (pXGI->XvGammaRampBlue[i] << 16) | + (pXGI->XvGammaRampGreen[i] << 8) | + pXGI->XvGammaRampRed[i]); + } + XGI_SetSRRegMask(pXGI, Index_SR_Power_Management, backup, 0xff); +} + +void +XGIUpdateXvGamma(XGIPtr pXGI, XGIPortPrivPtr pPriv) +{ + unsigned char sr7 = GetSRReg(pXGI, Index_SR_RAMDAC_Ctrl); + + /* SR7 [2]: 24-bit palette RAM and Gamma correction enable */ + if(!(sr7 & 0x04)) return; + + XGIComputeXvGamma(pXGI); + XGISetXvGamma(pXGI); +} + +/* ----------------SetDDAReg()------------------------------------ */ +static VOID SetDDAReg (XGIPtr pXGI, float scale) +{ + float WW, W[4], tempW[4]; + int i, j, w, WeightMat[16][4]; + int *wm1, *wm2, *wm3, *wm4, *temp1, *temp2, *temp3, *temp4; + + for (i=0; i<16; i++) + { + /* The order of weights are inversed for convolution */ + W[0] = tap_dda_func((float)((1.0+(i/16.0))/scale)); + W[1] = tap_dda_func((float)((0.0+(i/16.0))/scale)); + W[2] = tap_dda_func((float)((-1.0+(i/16.0))/scale)); + W[3] = tap_dda_func((float)((-2.0+(i/16.0))/scale)); + + /* Normalize the weights */ + WW = W[0]+W[1]+W[2]+W[3]; + + /* for rouding */ + for(j=0; j<4; j++) + tempW[j] = (float)((W[j]/WW*16)+0.5); + + WeightMat[i][0] = (int) tempW[0]; + WeightMat[i][1] = (int) tempW[1]; + WeightMat[i][2] = (int) tempW[2]; + WeightMat[i][3] = (int) tempW[3]; + + /* check for display abnormal caused by rounding */ + w = WeightMat[i][0] + WeightMat[i][1] + WeightMat[i][2] + WeightMat[i][3]; + if( w != 16 ) + { + temp1 = ( WeightMat[i][0] > WeightMat[i][1] ) ? &WeightMat[i][0] : &WeightMat[i][1]; + temp2 = ( WeightMat[i][0] > WeightMat[i][1] ) ? &WeightMat[i][1] : &WeightMat[i][0]; + temp3 = ( WeightMat[i][2] > WeightMat[i][3] ) ? &WeightMat[i][2] : &WeightMat[i][3]; + temp4 = ( WeightMat[i][2] > WeightMat[i][3] ) ? &WeightMat[i][3] : &WeightMat[i][2]; + wm1 = ( *temp1 > *temp3) ? temp1 : temp3; + wm4 = ( *temp2 > *temp4) ? temp4 : temp2; + wm2 = ( wm1 == temp1 ) ? temp3 : temp1; + wm3 = ( wm4 == temp2 ) ? temp4 : temp2; + + switch(w) + { + case 12: + WeightMat[i][0]++; + WeightMat[i][1]++; + WeightMat[i][2]++; + WeightMat[i][3]++; + break; + + case 13: + (*wm1)++; + (*wm4)++; + if( *wm2 > *wm3 ) + (*wm2)++; + else + (*wm3)++; + break; + + case 14: + (*wm1)++; + (*wm4)++; + break; + + case 15: + (*wm1)++; + break; + + case 17: + (*wm4)--; + break; + + case 18: + (*wm1)--; + (*wm4)--; + break; + + case 19: + (*wm1)--; + (*wm4)--; + if( *wm2 > *wm3 ) + (*wm3)--; + else + (*wm2)--; + break; + case 20: + WeightMat[i][0]--; + WeightMat[i][1]--; + WeightMat[i][2]--; + WeightMat[i][3]--; + break; + default: + /* ErrorF("Invalid WeightMat value!\n"); */ + break; + } + } + } + + /* set DDA registers */ + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_A0, WeightMat[0][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_A1, WeightMat[0][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_A2, WeightMat[0][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_A3, WeightMat[0][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_B0, WeightMat[1][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_B1, WeightMat[1][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_B2, WeightMat[1][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_B3, WeightMat[1][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_C0, WeightMat[2][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_C1, WeightMat[2][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_C2, WeightMat[2][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_C3, WeightMat[2][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_D0, WeightMat[3][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_D1, WeightMat[3][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_D2, WeightMat[3][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_D3, WeightMat[3][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_E0, WeightMat[4][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_E1, WeightMat[4][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_E2, WeightMat[4][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_E3, WeightMat[4][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_F0, WeightMat[5][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_F1, WeightMat[5][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_F2, WeightMat[5][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_F3, WeightMat[5][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_G0, WeightMat[6][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_G1, WeightMat[6][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_G2, WeightMat[6][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_G3, WeightMat[6][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_H0, WeightMat[7][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_H1, WeightMat[7][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_H2, WeightMat[7][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_H3, WeightMat[7][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_I0, WeightMat[8][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_I1, WeightMat[8][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_I2, WeightMat[8][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_I3, WeightMat[8][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_J0, WeightMat[9][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_J1, WeightMat[9][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_J2, WeightMat[9][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_J3, WeightMat[9][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_K0, WeightMat[10][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_K1, WeightMat[10][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_K2, WeightMat[10][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_K3, WeightMat[10][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_L0, WeightMat[11][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_L1, WeightMat[11][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_L2, WeightMat[11][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_L3, WeightMat[11][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_M0, WeightMat[12][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_M1, WeightMat[12][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_M2, WeightMat[12][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_M3, WeightMat[12][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_N0, WeightMat[13][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_N1, WeightMat[13][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_N2, WeightMat[13][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_N3, WeightMat[13][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_O0, WeightMat[14][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_O1, WeightMat[14][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_O2, WeightMat[14][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_O3, WeightMat[14][3], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_P0, WeightMat[15][0], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_P1, WeightMat[15][1], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_P2, WeightMat[15][2], 0x3F); + SetVideoRegMask(pXGI, Index_DDA_Weighting_Matrix_P3, WeightMat[15][3], 0x3F); +} + +void +XGIResetVideo(ScrnInfoPtr pScrn) +{ + XGIPtr pXGI = XGIPTR(pScrn); + XGIPortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn); + + /* Reset Xv gamma correction */ + XGIUpdateXvGamma(pXGI, pPriv); + + if (GetSRReg (pXGI, 0x05) != 0xa1) + { + SetSRReg (pXGI, 0x05, 0x86); + if (GetSRReg (pXGI, 0x05) != 0xa1) + {} + /* xf86DrvMsg(pScrn->scrnIndex, X_ERROR, */ + /* "Standard password not initialize\n"); */ + } + if (GetVideoReg (pXGI, Index_VI_Passwd) != 0xa1) + { + SetVideoReg (pXGI, Index_VI_Passwd, 0x86); + if (GetVideoReg (pXGI, Index_VI_Passwd) != 0xa1) + {} + /* xf86DrvMsg(pScrn->scrnIndex, X_ERROR, */ + /* "Video password not initialize\n"); */ + } + + /* Initial Overlay 1 */ + SetVideoRegMask(pXGI, Index_VI_Control_Misc2, 0x00, 0x81); + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, 0x00, 0x03); + /* Turn on Bob mode and digital video data transform bit */ + SetVideoRegMask(pXGI, Index_VI_Control_Misc1, 0x82, 0x82); + SetVideoRegMask(pXGI, Index_VI_Scale_Control, 0x60, 0x60); + SetVideoRegMask(pXGI, Index_VI_Contrast_Enh_Ctrl, 0x04, 0x1F); + + SetVideoReg(pXGI, Index_VI_Disp_Y_Buf_Preset_Low, 0x00); + SetVideoReg(pXGI, Index_VI_Disp_Y_Buf_Preset_Middle, 0x00); + SetVideoReg(pXGI, Index_VI_Disp_UV_Buf_Preset_Low, 0x00); + SetVideoReg(pXGI, Index_VI_Disp_UV_Buf_Preset_Middle, 0x00); + SetVideoReg(pXGI, Index_VI_Disp_Y_UV_Buf_Preset_High, 0x00); + SetVideoReg(pXGI, Index_VI_Play_Threshold_Low, 0x00); + SetVideoRegMask(pXGI, Index_VI_Play_Threshold_Low_Ext, 0x00, 0x01); + SetVideoReg(pXGI, Index_VI_Play_Threshold_High, 0x00); + SetVideoRegMask(pXGI, Index_VI_Play_Threshold_High_Ext, 0x00, 0x01); + + /* Disable fast page flip */ + XGI_SetSRRegMask(pXGI, Index_SR_CRT_Misc_Ctrl, 0x00, 0x02); + +#ifdef CAPTURE_340A1 + SetEnableCaptureReg(pXGI, FALSE, FALSE); +#else + SetEnableCaptureReg(pXGI, FALSE); +#endif + + /* Disable video processor */ + XGI_SetSRRegMask(pXGI, Index_Video_Process, 0x00, 0x02); + + /* Enable Horizontal 4-tap DDA mode */ + SetVideoRegMask(pXGI, Index_VI_Key_Overlay_OP, 0x40, 0x40); + /* Disable Vertical 4-tap DDA mode -- not surport not */ + SetVideoRegMask(pXGI, Index_VI_Key_Overlay_OP, 0x00, 0x80); + /* The DDA registers should set scale to 1 as default */ + SetDDAReg (pXGI, 1.0); + + /*for 341, Init VR 2F [D5] to be 1,to set software flip as default*/ + SetVideoRegMask(pXGI, Index_VI_Key_Overlay_OP, 0x20, 0x20); + + /*Disable Contrast enhancement*/ + SetVideoRegMask(pXGI, Index_VI_Key_Overlay_OP, 0x00, 0x10); + + /* Default Color */ + SetVideoReg(pXGI, Index_VI_Brightness, Default_Brightness); + SetVideoRegMask(pXGI, Index_VI_Contrast_Enh_Ctrl, Default_Contrast, 0x07); + SetVideoReg(pXGI, Index_VI_Saturation, Default_Saturation); + SetVideoRegMask(pXGI, Index_VI_Hue, Default_Hue, 0x07); +} + +static void +SetMergeLineBufReg(XGIPtr pXGI, Bool enable) +{ + if (enable) { + /* select video 1 and disable All line buffer Merge */ + SetVideoRegMask(pXGI, Index_VI_Control_Misc2, 0x00, 0x11); + /* set Individual Line buffer Merge */ + SetVideoRegMask(pXGI, Index_VI_Control_Misc1, 0x04, 0x04); + } + else { + /* select video 1 and disable All line buffer Merge */ + SetVideoRegMask(pXGI, Index_VI_Control_Misc2, 0x00, 0x11); + /* disable Individual Line buffer Merge */ + SetVideoRegMask(pXGI, Index_VI_Control_Misc1, 0x00, 0x04); + } +} + +static void +SetVideoFormatReg(XGIPtr pXGI, int format) +{ + CARD8 fmt; + + switch (format) + { + case PIXEL_FMT_YV12: + fmt = 0x0c; + break; + + case PIXEL_FMT_YUY2: + fmt = 0x28; + break; + + case PIXEL_FMT_UYVY: + fmt = 0x08; + break; + + case PIXEL_FMT_YVYU: + fmt = 0x38; + break; + + case PIXEL_FMT_NV12: + fmt = 0x4c; + break; + + case PIXEL_FMT_NV21: + fmt = 0x5c; + break; + + case PIXEL_FMT_RGB5: /* D[5:4] : 00 RGB555, 01 RGB 565 */ + fmt = 0x00; + break; + + case PIXEL_FMT_RGB6: + fmt = 0x10; + break; + + default: + fmt = 0x00; + break; + } + + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, fmt, 0x7c); +} + +void +XGI_SetColorkeyReg(XGIPtr pXGI, CARD32 colorkey) +{ + CARD8 r, g, b; + + b = LOBYTE(LOWORD(colorkey)); + g = HIBYTE(LOWORD(colorkey)); + r = LOBYTE(HIWORD(colorkey)); + + /* Activate the colorkey mode */ + SetVideoReg(pXGI, Index_VI_Overlay_ColorKey_Blue_Min , b); + SetVideoReg(pXGI, Index_VI_Overlay_ColorKey_Green_Min , g); + SetVideoReg(pXGI, Index_VI_Overlay_ColorKey_Red_Min , r); + + SetVideoReg(pXGI, Index_VI_Overlay_ColorKey_Blue_Max , b); + SetVideoReg(pXGI, Index_VI_Overlay_ColorKey_Green_Max , g); + SetVideoReg(pXGI, Index_VI_Overlay_ColorKey_Red_Max , r); +} + +void +XGI_SetVideoBrightnessReg(XGIPtr pXGI, INT32 value) +{ + CARD8 brightness; + + brightness = LOBYTE(value); + + SetVideoReg(pXGI, Index_VI_Brightness ,brightness); +} + +void +XGI_SetVideoContrastReg(XGIPtr pXGI, INT32 value) +{ + CARD8 contrast; + + contrast = (CARD8)(((value * 7) / 255) & 0x000F); + + SetVideoRegMask(pXGI, Index_VI_Contrast_Enh_Ctrl, contrast, 0x07); +} + +void +XGI_SetVideoHueReg(XGIPtr pXGI, INT32 value) +{ + CARD8 hue; + + if ( value > 0 ) + { + SetVideoRegMask(pXGI, Index_VI_Hue, 0x00, 0x08); + } + else + { + SetVideoRegMask(pXGI, Index_VI_Hue, 0x08, 0x08); + + value = -value; + } + + hue = (CARD8)(((value * 7) / 180) & 0x0007); + + + SetVideoRegMask(pXGI, Index_VI_Hue, hue, 0x07); +} + +void +XGI_SetVideoSaturationReg(XGIPtr pXGI, INT32 value) +{ + CARD8 saturation; + + if ( value > 0 ) + { + SetVideoRegMask(pXGI, Index_VI_Saturation, 0x00, 0x08); + SetVideoRegMask(pXGI, Index_VI_Saturation, 0x00, 0x80); + } + else + { + SetVideoRegMask(pXGI, Index_VI_Saturation, 0x08, 0x08); + SetVideoRegMask(pXGI, Index_VI_Saturation, 0x80, 0x80); + + value = -value; + } + + saturation = (CARD8)(((value * 7) / 180) & 0x000F); + + SetVideoRegMask(pXGI, Index_VI_Saturation, saturation, 0x07); + SetVideoRegMask(pXGI, Index_VI_Saturation, saturation << 4, 0x70); +} + +void +XGI_SetOverlayReg(XGIPtr pXGI, XGIOverlayPtr pOverlay) +{ + + ScrnInfoPtr pScrn = pXGI->pScrn; + XGIPortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn); + + CARD32 tmpYPitch; + CARD16 top, left; + CARD16 bottom, right; + CARD32 PSY, PSU, PSV; + CARD16 screenX = pScrn->currentMode->HDisplay; + CARD16 screenY = pScrn->currentMode->VDisplay; + + top = pOverlay->dstBox.y1; + bottom = pOverlay->dstBox.y2; + + if (bottom > screenY) + bottom = screenY; + + left = pOverlay->dstBox.x1; + right = pOverlay->dstBox.x2; + + if (right > screenX) + right = screenX; + + SetVideoReg(pXGI, Index_VI_Win_Hor_Disp_Start_Low, LOBYTE(left)); + SetVideoReg(pXGI, Index_VI_Win_Hor_Disp_End_Low, LOBYTE(right)); + SetVideoReg(pXGI, Index_VI_Win_Hor_Over, (HIBYTE(right)<<4)|HIBYTE(left)); + + SetVideoReg(pXGI, Index_VI_Win_Ver_Disp_Start_Low, LOBYTE(top)); + SetVideoReg(pXGI, Index_VI_Win_Ver_Disp_End_Low, LOBYTE(bottom)); + SetVideoReg(pXGI, Index_VI_Win_Ver_Over, (HIBYTE(bottom)<<4)|HIBYTE(top)); + + /* Set ContrastFactor */ + SetVideoRegMask(pXGI, Index_VI_Contrast_Enh_Ctrl, pOverlay->dwContrastFactor << 6, 0xc0); + SetVideoReg(pXGI, Index_VI_Contrast_Factor, pOverlay->SamplePixel); + + /* SetVideoRegMask(pXGI, Index_VI_Control_Misc3, 0x00, 0x03); */ + + /* Does need to merge line buffer*/ + SetMergeLineBufReg(pXGI, pOverlay->pitch > pPriv->linebufMergeLimit); + + /* set video format */ + SetVideoFormatReg(pXGI, pOverlay->pixelFormat); + + /* set line buffer size */ + SetVideoReg(pXGI, Index_VI_Line_Buffer_Size, LOBYTE(LOWORD(pOverlay->lineBufSize))); + SetVideoReg(pXGI, Index_VI_Line_Buffer_Size_Ext, HIBYTE(LOWORD(pOverlay->lineBufSize))); + + /* set Key Overlay Operation Mode */ + SetVideoRegMask (pXGI, Index_VI_Key_Overlay_OP, pOverlay->keyOP, 0x0f); + + + /* set scale factor */ + SetVideoReg (pXGI, Index_VI_Hor_Post_Up_Scale_Low, LOBYTE(pOverlay->HUSF)); + SetVideoReg (pXGI, Index_VI_Hor_Post_Up_Scale_High, HIBYTE(pOverlay->HUSF)); + + SetVideoReg (pXGI, Index_VI_Ver_Up_Scale_Low, LOBYTE(pOverlay->VUSF)); + SetVideoReg (pXGI, Index_VI_Ver_Up_Scale_High, HIBYTE(pOverlay->VUSF)); + + SetVideoRegMask (pXGI, Index_VI_Scale_Control, (pOverlay->IntBit << 3)|(pOverlay->wHPre), 0x7f); + + /* for 340 4-tap DDA */ + SetDDAReg(pXGI, pOverlay->f_scale); + + /* set frame or field mode */ + SetVideoRegMask(pXGI, Index_VI_Control_Misc1, pOverlay->bobEnable, 0x1a); + + /* set Y start address */ + PSY = pOverlay->PSY >>1; /* in unit of word */ + + SetVideoReg (pXGI, Index_VI_Disp_Y_Buf_Start_Low, LOBYTE(LOWORD(PSY))); + SetVideoReg (pXGI, Index_VI_Disp_Y_Buf_Start_Middle, HIBYTE(LOWORD(PSY))); + SetVideoReg (pXGI, Index_VI_Disp_Y_Buf_Start_High, LOBYTE(HIWORD(PSY))); + SetVideoRegMask(pXGI, Index_VI_Disp_Y_Buf_EXT_High, HIBYTE(HIWORD(PSY)), 0x03); + tmpYPitch = pOverlay->pitch >> 1 ; /* in unit of word */ + + if ((pOverlay->pixelFormat == PIXEL_FMT_YV12) || + (pOverlay->pixelFormat == PIXEL_FMT_NV12) || + (pOverlay->pixelFormat == PIXEL_FMT_NV21)) + { + /* set UV pitch */ + CARD32 uvpitch = tmpYPitch; + BYTE bYUV_Pitch_High; + + if(pOverlay->pixelFormat == PIXEL_FMT_YV12) + uvpitch >>= 1; +/* + bYUV_Pitch_High = (HIBYTE(LOWORD(uvpitch))<<4) & 0xf0 | + (HIBYTE(LOWORD(tmpYPitch))) & 0x0f; */ + bYUV_Pitch_High = ((HIBYTE(LOWORD(uvpitch))<<4) & 0xf0) | ((HIBYTE(LOWORD(tmpYPitch))) & 0x0f); + SetVideoReg (pXGI, Index_VI_Disp_UV_Buf_Pitch_Low, LOBYTE(LOWORD(uvpitch))); + SetVideoReg (pXGI, Index_VI_Disp_Y_UV_Buf_Pitch_High, bYUV_Pitch_High); + SetVideoRegMask(pXGI, Index_VI_Disp_UV_Buf_Pitch_EXT_High, uvpitch >> 12, 0x1f); + + /* set U/V start address */ + PSU = pOverlay->PSU >> 1; /* in unit of word; */ + PSV = pOverlay->PSV >> 1; /* in unit of word;; */ + + SetVideoReg(pXGI, Index_VI_Disp_U_Buf_Start_Low, LOBYTE(LOWORD(PSU))); + SetVideoReg(pXGI, Index_VI_Disp_U_Buf_Start_Middle, HIBYTE(LOWORD(PSU))); + SetVideoReg(pXGI, Index_VI_Disp_U_Buf_Start_High, LOBYTE(HIWORD(PSU))); + /* [26:24] save in the D[2:0] */ + SetVideoRegMask(pXGI, Index_VI_Disp_U_Buf_EXT_High, HIBYTE(HIWORD(PSU)), 0x03); + + SetVideoReg(pXGI, Index_VI_Disp_V_Buf_Start_Low, LOBYTE(LOWORD(PSV))); + SetVideoReg(pXGI, Index_VI_Disp_V_Buf_Start_Middle, HIBYTE(LOWORD(PSV))); + SetVideoReg(pXGI, Index_VI_Disp_V_Buf_Start_High, LOBYTE(HIWORD(PSV))); + /* [26:24] save in the D[2:0] */ + SetVideoRegMask(pXGI, Index_VI_Disp_V_Buf_EXT_High, HIBYTE(HIWORD(PSV)), 0x03); + tmpYPitch = pOverlay->pitch >> 1; /* in unit of word */ + } + else + SetVideoRegMask(pXGI, Index_VI_Disp_Y_UV_Buf_Pitch_High, HIBYTE(LOWORD(tmpYPitch)), 0x0f); + + /* set Y pitch */ + + SetVideoReg(pXGI, Index_VI_Disp_Y_Buf_Pitch_Low, LOBYTE(LOWORD(tmpYPitch))); + /* [16:12] save in the D[4:0] */ + SetVideoRegMask(pXGI, Index_VI_Disp_Y_Buf_Pitch_EXT_High, (tmpYPitch>>12)&0x1f , 0x1f); + + + /* start address ready */ + SetVideoRegMask(pXGI, Index_VI_Control_Misc3, 0x03, 0x03); + + /* set contrast factor */ + /* SetVideoRegMask(pXGI, Index_VI_Contrast_Enh_Ctrl, pOverlay->contrastCtrl<<6, 0xc0); */ + /* SetVideoReg (pXGI, Index_VI_Contrast_Factor, pOverlay->contrastFactor); */ +} + +void +XGI_SetCloseOverlayReg(XGIPtr pXGI) +{ + SetVideoRegMask (pXGI, Index_VI_Control_Misc2, 0x00, 0x01); + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, 0x00, 0x02); +} + +void +XGI_SetSelectOverlayReg(XGIPtr pXGI, CARD8 index) +{ + SetVideoRegMask(pXGI, Index_VI_Control_Misc2, index, 0x01); +} + +void +XGI_SetEnableOverlayReg(XGIPtr pXGI, Bool bEnable) +{ + if (bEnable) + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, 0x02, 0x02); + else + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, 0x00, 0x02); +} + +void +XGI_EnableCaptureAutoFlip(XGIPtr pXGI, Bool bEnable) +{ + if (bEnable) + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, 0x01, 0x01); + else + SetVideoRegMask(pXGI, Index_VI_Control_Misc0, 0x00, 0x01); +} Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_videohw.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_videohw.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_videohw.h Mon May 2 09:28:02 2005 @@ -0,0 +1,334 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_videohw.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ + +#ifndef _XGI_VIDEOHW_H_ +#define _XGI_VIDEOHW_H_ + +#include "xgi_video.h" + +typedef struct { + + int pixelFormat; + + CARD32 pitch; + + CARD8 keyOP; + CARD16 HUSF; + CARD16 VUSF; + CARD8 IntBit; + CARD8 wHPre; + float f_scale; + + CARD16 srcW; + CARD16 srcH; + + BoxRec dstBox; + + CARD32 PSY; + CARD32 PSV; + CARD32 PSU; + CARD8 bobEnable; + + CARD32 lineBufSize; + + CARD32 dwContrastFactor; + CARD32 SamplePixel; + +} XGIOverlayRec, *XGIOverlayPtr; + +/******************************************************************************/ +/* BIT OPERATION */ +/******************************************************************************/ +#define LOBYTE(x) ((CARD8)(x&0xFF)) +#define HIBYTE(x) ((CARD8)((x>>8)&0xFF)) +#define LOWORD(x) ((CARD16)(x&0xFFFF)) +#define HIWORD(x) ((CARD16)((x>>16)&0xFFFF)) + +/******************************************************************************/ +/* DEFINITIONS FOR VIDEO PORT */ +/******************************************************************************/ +#define Index_VI_Passwd 0x00 +#define Index_VI_Win_Hor_Disp_Start_Low 0x01 +#define Index_VI_Win_Hor_Disp_End_Low 0x02 +#define Index_VI_Win_Hor_Over 0x03 + +#define Index_VI_Win_Ver_Disp_Start_Low 0x04 +#define Index_VI_Win_Ver_Disp_End_Low 0x05 +#define Index_VI_Win_Ver_Over 0x06 + +#define Index_VI_Disp_Y_Buf_Start_Low 0x07 +#define Index_VI_Disp_Y_Buf_Start_Middle 0x08 +#define Index_VI_Disp_Y_Buf_Start_High 0x09 + +#define Index_VI_Disp_U_Buf_Start_Low 0x0A +#define Index_VI_Disp_U_Buf_Start_Middle 0x0B +#define Index_VI_Disp_U_Buf_Start_High 0x0C + +#define Index_VI_Disp_V_Buf_Start_Low 0x0D +#define Index_VI_Disp_V_Buf_Start_Middle 0x0E +#define Index_VI_Disp_V_Buf_Start_High 0x0F + +#define Index_VI_Disp_Y_Buf_Pitch_Low 0x10 +#define Index_VI_Disp_UV_Buf_Pitch_Low 0x11 +#define Index_VI_Disp_Y_UV_Buf_Pitch_High 0x12 + +#define Index_VI_Disp_Y_Buf_Preset_Low 0x13 +#define Index_VI_Disp_Y_Buf_Preset_Middle 0x14 +#define Index_VI_Disp_UV_Buf_Preset_Low 0x15 +#define Index_VI_Disp_UV_Buf_Preset_Middle 0x16 +#define Index_VI_Disp_Y_UV_Buf_Preset_High 0x17 + +#define Index_VI_Hor_Post_Up_Scale_Low 0x18 +#define Index_VI_Hor_Post_Up_Scale_High 0x19 +#define Index_VI_Ver_Up_Scale_Low 0x1A +#define Index_VI_Ver_Up_Scale_High 0x1B +#define Index_VI_Scale_Control 0x1C + +#define Index_VI_Play_Threshold_Low 0x1D +#define Index_VI_Play_Threshold_High 0x1E +#define Index_VI_Line_Buffer_Size 0x1F + +/* Destination color key */ +#define Index_VI_Overlay_ColorKey_Red_Min 0x20 +#define Index_VI_Overlay_ColorKey_Green_Min 0x21 +#define Index_VI_Overlay_ColorKey_Blue_Min 0x22 +#define Index_VI_Overlay_ColorKey_Red_Max 0x23 +#define Index_VI_Overlay_ColorKey_Green_Max 0x24 +#define Index_VI_Overlay_ColorKey_Blue_Max 0x25 + +/* Source color key */ +#define Index_VI_Overlay_ChromaKey_Red_Y_Min 0x26 +#define Index_VI_Overlay_ChromaKey_Green_U_Min 0x27 +#define Index_VI_Overlay_ChromaKey_Blue_V_Min 0x28 +#define Index_VI_Overlay_ChromaKey_Red_Y_Max 0x29 +#define Index_VI_Overlay_ChromaKey_Green_U_Max 0x2A +#define Index_VI_Overlay_ChromaKey_Blue_V_Max 0x2B + +#define Index_VI_Contrast_Factor 0x2C + +#define Index_VI_Brightness 0x2D +#define Index_VI_Contrast_Enh_Ctrl 0x2E + +#define Index_VI_Key_Overlay_OP 0x2F + +#define Index_VI_Control_Misc0 0x30 +#define Index_VI_Control_Misc1 0x31 +#define Index_VI_Control_Misc2 0x32 +#define Index_SP_Buf_Preset_High 0x35 +#define Index_SP_Buf_Preset_Low 0x36 +#define Index_SP_Buf_Preset_Middle 0x37 +#define Index_SP_FIFO_Max_Size 0x3F +#define Index_MPEG_Flip_Ctrl_Reg0 0x60 +#define Index_MPEG_Ver_Up_Scale_Low 0x64 +#define Index_MPEG_Ver_Up_Scale_High 0x65 + +/* For MPEG AutoFlip preset in SiS630 and SiS540 */ +#define Index_MPEG_Y_Buf_Preset_Low 0x66 +#define Index_MPEG_Y_Buf_Preset_Middle 0x67 +#define Index_MPEG_UV_Buf_Preset_Low 0x68 +#define Index_MPEG_UV_Buf_Preset_Middle 0x69 +#define Index_MPEG_Y_UV_Buf_Preset_High 0x6A + +/* For Chip higher than 325 */ +#define Index_VI_Disp_Y_Buf_EXT_High 0x6B +#define Index_VI_Disp_U_Buf_EXT_High 0x6C +#define Index_VI_Disp_V_Buf_EXT_High 0x6D +#define Index_VI_Disp_Y_Buf_Pitch_EXT_High 0x6E +#define Index_VI_Disp_UV_Buf_Pitch_EXT_High 0x6F + +#define Index_VI_Hue 0x70 +#define Index_VI_Saturation 0x71 +#define Index_VI_Control_Misc3 0x74 + +/* 4_tap_dda Weighting Matrix in XGI340 */ +#define Index_DDA_Weighting_Matrix_A0 0x75 +#define Index_DDA_Weighting_Matrix_A1 0x76 +#define Index_DDA_Weighting_Matrix_A2 0x77 +#define Index_DDA_Weighting_Matrix_A3 0x78 +#define Index_DDA_Weighting_Matrix_B0 0x79 +#define Index_DDA_Weighting_Matrix_B1 0x7A +#define Index_DDA_Weighting_Matrix_B2 0x7B +#define Index_DDA_Weighting_Matrix_B3 0x7C +#define Index_DDA_Weighting_Matrix_C0 0x7D +#define Index_DDA_Weighting_Matrix_C1 0x7E +#define Index_DDA_Weighting_Matrix_C2 0x7F +#define Index_DDA_Weighting_Matrix_C3 0x80 +#define Index_DDA_Weighting_Matrix_D0 0x81 +#define Index_DDA_Weighting_Matrix_D1 0x82 +#define Index_DDA_Weighting_Matrix_D2 0x83 +#define Index_DDA_Weighting_Matrix_D3 0x84 +#define Index_DDA_Weighting_Matrix_E0 0x85 +#define Index_DDA_Weighting_Matrix_E1 0x86 +#define Index_DDA_Weighting_Matrix_E2 0x87 +#define Index_DDA_Weighting_Matrix_E3 0x88 +#define Index_DDA_Weighting_Matrix_F0 0x89 +#define Index_DDA_Weighting_Matrix_F1 0x8A +#define Index_DDA_Weighting_Matrix_F2 0x8B +#define Index_DDA_Weighting_Matrix_F3 0x8C +#define Index_DDA_Weighting_Matrix_G0 0x8D +#define Index_DDA_Weighting_Matrix_G1 0x8E +#define Index_DDA_Weighting_Matrix_G2 0x8F +#define Index_DDA_Weighting_Matrix_G3 0x90 +#define Index_DDA_Weighting_Matrix_H0 0x91 +#define Index_DDA_Weighting_Matrix_H1 0x92 +#define Index_DDA_Weighting_Matrix_H2 0x93 +#define Index_DDA_Weighting_Matrix_H3 0x94 +#define Index_DDA_Weighting_Matrix_I0 0x95 +#define Index_DDA_Weighting_Matrix_I1 0x96 +#define Index_DDA_Weighting_Matrix_I2 0x97 +#define Index_DDA_Weighting_Matrix_I3 0x98 +#define Index_DDA_Weighting_Matrix_J0 0x99 +#define Index_DDA_Weighting_Matrix_J1 0x9A +#define Index_DDA_Weighting_Matrix_J2 0x9B +#define Index_DDA_Weighting_Matrix_J3 0x9C +#define Index_DDA_Weighting_Matrix_K0 0x9D +#define Index_DDA_Weighting_Matrix_K1 0x9E +#define Index_DDA_Weighting_Matrix_K2 0x9F +#define Index_DDA_Weighting_Matrix_K3 0xA0 +#define Index_DDA_Weighting_Matrix_L0 0xA1 +#define Index_DDA_Weighting_Matrix_L1 0xA2 +#define Index_DDA_Weighting_Matrix_L2 0xA3 +#define Index_DDA_Weighting_Matrix_L3 0xA4 +#define Index_DDA_Weighting_Matrix_M0 0xA5 +#define Index_DDA_Weighting_Matrix_M1 0xA6 +#define Index_DDA_Weighting_Matrix_M2 0xA7 +#define Index_DDA_Weighting_Matrix_M3 0xA8 +#define Index_DDA_Weighting_Matrix_N0 0xA9 +#define Index_DDA_Weighting_Matrix_N1 0xAA +#define Index_DDA_Weighting_Matrix_N2 0xAB +#define Index_DDA_Weighting_Matrix_N3 0xAC +#define Index_DDA_Weighting_Matrix_O0 0xAD +#define Index_DDA_Weighting_Matrix_O1 0xAE +#define Index_DDA_Weighting_Matrix_O2 0xAF +#define Index_DDA_Weighting_Matrix_O3 0xB0 +#define Index_DDA_Weighting_Matrix_P0 0xB1 +#define Index_DDA_Weighting_Matrix_P1 0xB2 +#define Index_DDA_Weighting_Matrix_P2 0xB3 +#define Index_DDA_Weighting_Matrix_P3 0xB4 + +#define Index_VI_Play_Threshold_Low_Ext 0xB5 +#define Index_VI_Play_Threshold_High_Ext 0xB6 +#define Index_VI_Line_Buffer_Size_Ext 0xB7 + +/******************************************************************************/ +/* DEFINITIONS FOR SEQUENCER */ +/******************************************************************************/ +#define Index_SR_Graphic_Mode 0x06 +#define Index_SR_RAMDAC_Ctrl 0x07 +#define Index_SR_Threshold_Ctrl1 0x08 +#define Index_SR_Threshold_Ctrl2 0x09 +#define Index_SR_FC_SCREEN_HIGH 0x0D +#define Index_SR_CRT_Misc_Ctrl 0x0F +#define Index_SR_DDC 0x11 +#define Index_SR_Feature_Connector_Ctrl 0x12 +#define Index_SR_DRAM_Sizing 0x14 +#define Index_SR_DRAM_State_Machine_Ctrl 0x15 + +#define Index_SR_Module_Enable 0x1E +#define Index_SR_Power_Management 0x1F +#define Index_SR_AGP_PCI_State_Machine 0x21 +#define Index_SR_Internal_MCLK0 0x28 +#define Index_SR_Internal_MCLK1 0x29 +#define Index_SR_Internal_DCLK1 0x2B +#define Index_SR_Internal_DCLK2 0x2C +#define Index_SR_Internal_DCLK3 0x2D +#define Index_SR_Internal_ECLK0 0x2E +#define Index_SR_Internal_ECLK1 0x2F +#define Index_SR_Ext_Clock_Sel 0x32 +#define Index_SR_Int_Status 0x34 +#define Index_SR_Int_Enable 0x35 +#define Index_SR_Int_Reset 0x36 + +#define INDEX_SR_Synchronous_Reset 0x3C +#define Index_SR_SW_Flip_1 0x3E +#define Index_Video_Process 0x3F + +/******************************************************************************/ +/* DEFINITIONS FOR Default Color in HW */ +/******************************************************************************/ +#define Default_Brightness 0x00 +#define Default_Contrast 0x04 +#define Default_Hue 0x00 +#define Default_Saturation 0x00 + +/******************************************************************************/ +/* DEFINITIONS FOR Capture Register */ +/******************************************************************************/ +#define Index_VC_Ver_Down_Scale_Factor_Over 0x10 + +/******************************************************************************/ +/* DEFINITIONS FOR MMIO Register */ +/******************************************************************************/ + +#define REG_PRIM_CRT_COUNTER 0x8514 +#define REG_LEFT_FLIP_1 0x8540 +#define REG_STATUS0 0x8240 +#define REG_GAMMA_PALETTE 0x8570 + +/* + CRT_2 function control register + */ +#define Index_CRT2_FC_CONTROL 0x00 +#define Index_CRT2_FC_SCREEN_HIGH 0x04 +#define Index_CRT2_FC_SCREEN_MID 0x05 +#define Index_CRT2_FC_SCREEN_LOW 0x06 +#define Index_CRT2_FC_ENABLE_WRITE 0x24 +#define Index_CRT2_FC_VR 0x25 +#define Index_CRT2_FC_VCount 0x27 +#define Index_CRT2_FC_VCount1 0x28 + +/* video attributes - these should probably be configurable on the fly + * so users with different desktop sizes can keep + * captured data off the desktop + */ +#define _VINWID 704 +#define _VINHGT _VINHGT_NTSC +#define _VINHGT_NTSC 240 +#define _VINHGT_PAL 290 +#define _VIN_WINDOW (704 * 291 * 2) +#define _VBI_WINDOW (704 * 64 * 2) + +#define _VIN_FIELD_EVEN 1 +#define _VIN_FIELD_ODD 2 +#define _VIN_FIELD_BOTH 4 + +#define vc_index_offset 0x00 +#define vc_data_offset 0x01 +#define vi_index_offset 0x02 +#define vi_data_offset 0x03 +#define crt2_index_offset 0x04 +#define crt2_port_offset 0x05 +#define sr_index_offset 0x44 +#define sr_data_offset 0x45 +#define cr_index_offset 0x54 +#define cr_data_offset 0x55 +#define input_stat 0x5A + +/* i2c registers */ +#define X_INDEXREG 0x14 +#define X_PORTREG 0x15 +#define X_DATA 0x0f +#define I2C_SCL 0x00 + +#define I2C_SDA 0x01 +#define I2C_DELAY 10 + +/******************************* +* Function * +*******************************/ +/* static CARD8 vblank_active_CRT1(XGIPtr); */ +void XGI_SetOverlayReg(XGIPtr, XGIOverlayPtr); +void XGI_SetColorkeyReg(XGIPtr, CARD32); +void XGI_SetSelectOverlayReg(XGIPtr, CARD8); +void XGI_SetCloseOverlayReg(XGIPtr pXGI); +void XGI_SetEnableOverlayReg(XGIPtr, Bool); + +void XGIResetVideo(ScrnInfoPtr); + +void XGI_SetVideoContrastReg(XGIPtr, INT32); +void XGI_SetVideoBrightnessReg(XGIPtr, INT32); +void XGI_SetVideoSaturationReg(XGIPtr, INT32); +void XGI_SetVideoHueReg(XGIPtr, INT32); + +void XGI_EnableCaptureAutoFlip(XGIPtr, Bool); +#endif /* _XGI_VIDEOHW_H_ */ + Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vidregs.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vidregs.h:1.1 --- /dev/null Tue May 9 21:57:02 2006 +++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vidregs.h Mon May 2 09:28:02 2005 @@ -0,0 +1,156 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vidregs.h,v 1.1 2005/05/02 13:28:02 dawes Exp $ */ + +#ifndef _SIS_VIDREG_H_ +#define _SIS_VIDREG_H_ + +/* VGA standard register */ +#define Index_SR_Graphic_Mode 0x06 +#define Index_SR_RAMDAC_Ctrl 0x07 +#define Index_SR_Threshold_Ctrl1 0x08 +#define Index_SR_Threshold_Ctrl2 0x09 +#define Index_SR_Misc_Ctrl 0x0F +#define Index_SR_DDC 0x11 +#define Index_SR_Feature_Connector_Ctrl 0x12 +#define Index_SR_DRAM_Sizing 0x14 +#define Index_SR_DRAM_State_Machine_Ctrl 0x15 +#define Index_SR_AGP_PCI_State_Machine 0x21 +#define Index_SR_Internal_MCLK0 0x28 +#define Index_SR_Internal_MCLK1 0x29 +#define Index_SR_Internal_DCLK1 0x2B +#define Index_SR_Internal_DCLK2 0x2C +#define Index_SR_Internal_DCLK3 0x2D +#define Index_SR_Ext_Clock_Sel 0x32 +#define Index_SR_Int_Status 0x34 +#define Index_SR_Int_Enable 0x35 +#define Index_SR_Int_Reset 0x36 +#define Index_SR_Power_On_Trap 0x38 +#define Index_SR_Power_On_Trap2 0x39 +#define Index_SR_Power_On_Trap3 0x3A + +/* video registers */ +#define Index_VI_Passwd 0x00 +#define Index_VI_Win_Hor_Disp_Start_Low 0x01 +#define Index_VI_Win_Hor_Disp_End_Low 0x02 +#define Index_VI_Win_Hor_Over 0x03 + +#define Index_VI_Win_Ver_Disp_Start_Low 0x04 +#define Index_VI_Win_Ver_Disp_End_Low 0x05 +#define Index_VI_Win_Ver_Over 0x06 + +#define Index_VI_Disp_Y_Buf_Start_Low 0x07 +#define Index_VI_Disp_Y_Buf_Start_Middle 0x08 +#define Index_VI_Disp_Y_Buf_Start_High 0x09 + +#define Index_VI_U_Buf_Start_Low 0x0A +#define Index_VI_U_Buf_Start_Middle 0x0B +#define Index_VI_U_Buf_Start_High 0x0C + +#define Index_VI_V_Buf_Start_Low 0x0D +#define Index_VI_V_Buf_Start_Middle 0x0E +#define Index_VI_V_Buf_Start_High 0x0F + +#define Index_VI_Disp_Y_Buf_Pitch_Low 0x10 +#define Index_VI_Disp_UV_Buf_Pitch_Low 0x11 +#define Index_VI_Disp_Y_UV_Buf_Pitch_High 0x12 + +#define Index_VI_Disp_Y_Buf_Preset_Low 0x13 +#define Index_VI_Disp_Y_Buf_Preset_Middle 0x14 +#define Index_VI_UV_Buf_Preset_Low 0x15 +#define Index_VI_UV_Buf_Preset_Middle 0x16 +#define Index_VI_Disp_Y_UV_Buf_Preset_High 0x17 + +#define Index_VI_Hor_Post_Up_Scale_Low 0x18 +#define Index_VI_Hor_Post_Up_Scale_High 0x19 +#define Index_VI_Ver_Up_Scale_Low 0x1A +#define Index_VI_Ver_Up_Scale_High 0x1B +#define Index_VI_Scale_Control 0x1C + +#define Index_VI_Play_Threshold_Low 0x1D +#define Index_VI_Play_Threshold_High 0x1E +#define Index_VI_Line_Buffer_Size 0x1F + +/* Destination color key */ +#define Index_VI_Overlay_ColorKey_Red_Min 0x20 +#define Index_VI_Overlay_ColorKey_Green_Min 0x21 +#define Index_VI_Overlay_ColorKey_Blue_Min 0x22 +#define Index_VI_Overlay_ColorKey_Red_Max 0x23 +#define Index_VI_Overlay_ColorKey_Green_Max 0x24 +#define Index_VI_Overlay_ColorKey_Blue_Max 0x25 + +/* Source color key */ +#define Index_VI_Overlay_ChromaKey_Red_Y_Min 0x26 +#define Index_VI_Overlay_ChromaKey_Green_U_Min 0x27 +#define Index_VI_Overlay_ChromaKey_Blue_V_Min 0x28 +#define Index_VI_Overlay_ChromaKey_Red_Y_Max 0x29 +#define Index_VI_Overlay_ChromaKey_Green_U_Max 0x2A +#define Index_VI_Overlay_ChromaKey_Blue_V_Max 0x2B + +#define Index_VI_Contrast_Factor 0x2C + +#define Index_VI_Brightness 0x2D +#define Index_VI_Contrast_Enh_Ctrl 0x2E + +#define Index_VI_Key_Overlay_OP 0x2F + +#define Index_VI_Control_Misc0 0x30 +#define Index_VI_Control_Misc1 0x31 +#define Index_VI_Control_Misc2 0x32 + +#define Index_MPEG_Read_Ctrl0 0x60 +#define Index_MPEG_Read_Ctrl1 0x61 +#define Index_MPEG_Read_Ctrl2 0x62 +#define Index_MPEG_Read_Ctrl3 0x63 +#define Index_MPEG_Ver_Up_Scale_Low 0x64 +#define Index_MPEG_Ver_Up_Scale_High 0x65 + +/* + CRT_2 function control register + */ +#define Index_CRT2_FC_CONTROL 0x00 +#define Index_CRT2_FC_SCREEN_HIGH 0x04 +#define Index_CRT2_FC_SCREEN_MID 0x05 +#define Index_CRT2_FC_SCREEN_LOW 0x06 +#define Index_CRT2_FC_ENABLE_WRITE 0x24 +#define Index_CRT2_FC_VR 0x25 +#define Index_CRT2_FC_VCount 0x27 +#define Index_CRT2_FC_VCount1 0x28 + +/* video attributes - these should probably be configurable on the fly + * so users with different desktop sizes can keep + * captured data off the desktop + */ +#define _VINWID 704 +#define _VINHGT _VINHGT_NTSC +#define _VINHGT_NTSC 240 +#define _VINHGT_PAL 290 +#define _VIN_WINDOW (704 * 291 * 2) +#define _VBI_WINDOW (704 * 64 * 2) + +#define _VIN_FIELD_EVEN 1 +#define _VIN_FIELD_ODD 2 +#define _VIN_FIELD_BOTH 4 + +#define vc_index_offset 0x00 +#define vc_data_offset 0x01 +#define vi_index_offset 0x02 +#define vi_data_offset 0x03 +#define crt2_index_offset 0x04 +#define crt2_port_offset 0x05 +#define sr_index_offset 0x44 +#define sr_data_offset 0x45 +#define cr_index_offset 0x54 +#define cr_data_offset 0x55 +#define input_stat 0x5A + +/* i2c registers */ +#define X_INDEXREG 0x14 +#define X_PORTREG 0x15 +#define X_DATA 0x0f +#define I2C_SCL 0x00 +#define I2C_SDA 0x01 +#define I2C_DELAY 10 + +/* mmio registers */ +#define REG_PRIM_CRT_COUNTER 0x8514 + +#endif /* _SIS_VIDREG_H_ */ Index: xc/programs/Xserver/hw/xfree86/dummylib/Imakefile diff -u xc/programs/Xserver/hw/xfree86/dummylib/Imakefile:1.6 xc/programs/Xserver/hw/xfree86/dummylib/Imakefile:1.8 --- xc/programs/Xserver/hw/xfree86/dummylib/Imakefile:1.6 Mon Feb 28 22:48:53 2005 +++ xc/programs/Xserver/hw/xfree86/dummylib/Imakefile Sun Jan 8 17:50:30 2006 @@ -1,9 +1,9 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/Imakefile,v 1.6 2005/03/01 03:48:53 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/Imakefile,v 1.8 2006/01/08 22:50:30 dawes Exp $ #include -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(DRMINCLUDESDIR) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(DRMINCLUDESDIR) SRCS = \ fatalerror.c \ @@ -53,6 +53,12 @@ xf86verbose.o \ sigiostubs.o +#if HasAsprintf +ASPRINTF_DEFINES = -DHAS_ASPRINTF +#endif + +DEFINES = $(ASPRINTF_DEFINES) + LinkSourceFile(sigiostubs.c,../os-support/shared) NormalLibraryObjectRule() NormalLibraryTarget(dummy,$(OBJS)) Index: xc/programs/Xserver/hw/xfree86/dummylib/fatalerror.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/fatalerror.c:1.1 xc/programs/Xserver/hw/xfree86/dummylib/fatalerror.c:1.2 --- xc/programs/Xserver/hw/xfree86/dummylib/fatalerror.c:1.1 Sat Feb 12 22:06:38 2000 +++ xc/programs/Xserver/hw/xfree86/dummylib/fatalerror.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/fatalerror.c,v 1.1 2000/02/13 03:06:38 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/fatalerror.c,v 1.2 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/getvalidbios.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/getvalidbios.c:1.3 xc/programs/Xserver/hw/xfree86/dummylib/getvalidbios.c:1.4 --- xc/programs/Xserver/hw/xfree86/dummylib/getvalidbios.c:1.3 Tue May 15 06:19:41 2001 +++ xc/programs/Xserver/hw/xfree86/dummylib/getvalidbios.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/getvalidbios.c,v 1.3 2001/05/15 10:19:41 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/getvalidbios.c,v 1.4 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/logvwrite.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/logvwrite.c:1.1 xc/programs/Xserver/hw/xfree86/dummylib/logvwrite.c:1.2 --- xc/programs/Xserver/hw/xfree86/dummylib/logvwrite.c:1.1 Mon Sep 8 23:20:38 2003 +++ xc/programs/Xserver/hw/xfree86/dummylib/logvwrite.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/logvwrite.c,v 1.1 2003/09/09 03:20:38 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/logvwrite.c,v 1.2 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/pcitestmulti.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/pcitestmulti.c:1.1 xc/programs/Xserver/hw/xfree86/dummylib/pcitestmulti.c:1.2 --- xc/programs/Xserver/hw/xfree86/dummylib/pcitestmulti.c:1.1 Sat Feb 12 22:06:39 2000 +++ xc/programs/Xserver/hw/xfree86/dummylib/pcitestmulti.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/pcitestmulti.c,v 1.1 2000/02/13 03:06:39 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/pcitestmulti.c,v 1.2 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/verrorf.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/verrorf.c:1.1 xc/programs/Xserver/hw/xfree86/dummylib/verrorf.c:1.2 --- xc/programs/Xserver/hw/xfree86/dummylib/verrorf.c:1.1 Sat Feb 12 22:06:39 2000 +++ xc/programs/Xserver/hw/xfree86/dummylib/verrorf.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/verrorf.c,v 1.1 2000/02/13 03:06:39 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/verrorf.c,v 1.2 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c:1.3 xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c:1.5 --- xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c:1.3 Wed Nov 24 16:54:39 2004 +++ xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c Sun Jan 8 17:50:30 2006 @@ -1,12 +1,12 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c,v 1.3 2004/11/24 21:54:39 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xalloc.c,v 1.5 2006/01/08 22:50:30 dawes Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" /* - * Utility functions required by libxf86_os. + * Utility functions required by libxf86_os, the loader, and others. */ pointer @@ -103,3 +103,50 @@ strcpy(sd, s); return sd; } + +int +Xasprintf(char **ret, const char *format, ...) +{ + char *s; + va_list args; + int status; + + if (!ret || !format) + return -1; + +#ifdef HAS_ASPRINTF + va_start(args, format); + status = vasprintf(&s, format, args); + va_end(args); + if (status != -1 && s) { + *ret = Xstrdup(s); + free(s); + if (!*ret) + status = -1; + } else + *ret = NULL; + return status; +#else +#define TMP_SIZE 4000 + s = xcalloc(1, TMP_SIZE); + if (!s) { + *ret = NULL; + return -1; + } + va_start(args, format); + status = vsnprintf(s, TMP_SIZE, format, args); + va_end(args); + if (status > TMP_SIZE - 1) + status = TMP_SIZE - 1; + if (status < TMP_SIZE - 1) { + *ret = xrealloc(s, status + 1); + if (!*ret) { + xfree(s); + status = -1; + } + } else + *ret = s; + return status; +#endif +} + Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86allocscripi.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86allocscripi.c:1.1 xc/programs/Xserver/hw/xfree86/dummylib/xf86allocscripi.c:1.2 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86allocscripi.c:1.1 Sat Feb 12 22:06:40 2000 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86allocscripi.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86allocscripi.c,v 1.1 2000/02/13 03:06:40 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86allocscripi.c,v 1.2 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsg.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsg.c:1.2 xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsg.c:1.3 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsg.c:1.2 Mon Sep 8 23:20:38 2003 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsg.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsg.c,v 1.2 2003/09/09 03:20:38 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsg.c,v 1.3 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsgverb.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsgverb.c:1.2 xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsgverb.c:1.3 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsgverb.c:1.2 Mon Sep 8 23:20:38 2003 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsgverb.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsgverb.c,v 1.2 2003/09/09 03:20:38 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86drvmsgverb.c,v 1.3 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86errorf.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86errorf.c:1.3 xc/programs/Xserver/hw/xfree86/dummylib/xf86errorf.c:1.4 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86errorf.c:1.3 Mon Sep 8 23:20:38 2003 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86errorf.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86errorf.c,v 1.3 2003/09/09 03:20:38 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86errorf.c,v 1.4 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86errorfverb.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86errorfverb.c:1.2 xc/programs/Xserver/hw/xfree86/dummylib/xf86errorfverb.c:1.3 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86errorfverb.c:1.2 Mon Sep 8 23:20:38 2003 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86errorfverb.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86errorfverb.c,v 1.2 2003/09/09 03:20:38 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86errorfverb.c,v 1.3 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c:1.1 xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c:1.2 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c:1.1 Sat Feb 12 22:06:41 2000 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c,v 1.1 2000/02/13 03:06:41 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c,v 1.2 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86getverb.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86getverb.c:1.1 xc/programs/Xserver/hw/xfree86/dummylib/xf86getverb.c:1.2 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86getverb.c:1.1 Sat Feb 12 22:06:41 2000 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86getverb.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86getverb.c,v 1.1 2000/02/13 03:06:41 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86getverb.c,v 1.2 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86info.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86info.c:1.1 xc/programs/Xserver/hw/xfree86/dummylib/xf86info.c:1.2 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86info.c:1.1 Sat Feb 12 22:06:41 2000 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86info.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86info.c,v 1.1 2000/02/13 03:06:41 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86info.c,v 1.2 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86msg.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86msg.c:1.2 xc/programs/Xserver/hw/xfree86/dummylib/xf86msg.c:1.3 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86msg.c:1.2 Mon Sep 8 23:20:38 2003 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86msg.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86msg.c,v 1.2 2003/09/09 03:20:38 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86msg.c,v 1.3 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86msgverb.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86msgverb.c:1.2 xc/programs/Xserver/hw/xfree86/dummylib/xf86msgverb.c:1.3 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86msgverb.c:1.2 Mon Sep 8 23:20:38 2003 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86msgverb.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86msgverb.c,v 1.2 2003/09/09 03:20:38 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86msgverb.c,v 1.3 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86opt.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86opt.c:1.2 xc/programs/Xserver/hw/xfree86/dummylib/xf86opt.c:1.3 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86opt.c:1.2 Fri May 4 15:05:50 2001 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86opt.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86opt.c,v 1.2 2001/05/04 19:05:50 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86opt.c,v 1.3 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86screens.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86screens.c:1.1 xc/programs/Xserver/hw/xfree86/dummylib/xf86screens.c:1.2 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86screens.c:1.1 Sat Feb 12 22:06:42 2000 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86screens.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86screens.c,v 1.1 2000/02/13 03:06:42 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86screens.c,v 1.2 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86servisinit.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86servisinit.c:1.1 xc/programs/Xserver/hw/xfree86/dummylib/xf86servisinit.c:1.2 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86servisinit.c:1.1 Sat Feb 12 22:06:43 2000 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86servisinit.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86servisinit.c,v 1.1 2000/02/13 03:06:43 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86servisinit.c,v 1.2 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86verbose.c diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86verbose.c:1.1 xc/programs/Xserver/hw/xfree86/dummylib/xf86verbose.c:1.2 --- xc/programs/Xserver/hw/xfree86/dummylib/xf86verbose.c:1.1 Sat Feb 12 22:06:43 2000 +++ xc/programs/Xserver/hw/xfree86/dummylib/xf86verbose.c Fri Oct 14 11:16:50 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86verbose.c,v 1.1 2000/02/13 03:06:43 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86verbose.c,v 1.2 2005/10/14 15:16:50 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/etc/2key.c diff -u xc/programs/Xserver/hw/xfree86/etc/2key.c:3.5 xc/programs/Xserver/hw/xfree86/etc/2key.c:3.6 --- xc/programs/Xserver/hw/xfree86/etc/2key.c:3.5 Thu May 6 22:56:17 1999 +++ xc/programs/Xserver/hw/xfree86/etc/2key.c Mon Jan 9 10:00:15 2006 @@ -1,5 +1,5 @@ /* - * $XFree86: xc/programs/Xserver/hw/xfree86/etc/2key.c,v 3.5 1999/05/07 02:56:17 dawes Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/etc/2key.c,v 3.6 2006/01/09 15:00:15 dawes Exp $ * * Enable/disable the 2-key VT switching sequences for Esix SVR4 * Note that is program *only* works for Esix SVR4. To use this program @@ -12,7 +12,6 @@ * David Dawes October 1992 * */ -/* $XConsortium: 2key.c /main/3 1996/02/21 17:47:02 kaleb $ */ #include #include Index: xc/programs/Xserver/hw/xfree86/etc/Imakefile diff -u xc/programs/Xserver/hw/xfree86/etc/Imakefile:3.53 xc/programs/Xserver/hw/xfree86/etc/Imakefile:3.55 --- xc/programs/Xserver/hw/xfree86/etc/Imakefile:3.53 Mon Mar 7 11:39:18 2005 +++ xc/programs/Xserver/hw/xfree86/etc/Imakefile Mon Jan 9 10:00:15 2006 @@ -1,10 +1,5 @@ -XCOMM $XConsortium: Imakefile /main/24 1996/10/28 04:24:12 kaleb $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/etc/Imakefile,v 3.55 2006/01/09 15:00:15 dawes Exp $ - - - - -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/etc/Imakefile,v 3.53 2005/03/07 16:39:18 tsi Exp $ #include #if SystemV @@ -54,8 +49,8 @@ FILES = $(CONFIGFILES) $(TERMFILES) \ $(PATCHFILES) $(XDMCONF) \ xmodmap.std $(MISCFILES) $(XINST) - INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(XF86SRC)/scanpci \ + INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(XF86SRC)/scanpci \ -I$(XF86SRC)/dummylib -I$(XF86OSSRC)/bus #ifdef ServerExtraSysLibs Index: xc/programs/Xserver/hw/xfree86/etc/XdmConf.svr4 diff -u xc/programs/Xserver/hw/xfree86/etc/XdmConf.svr4:3.3 xc/programs/Xserver/hw/xfree86/etc/XdmConf.svr4:3.4 --- xc/programs/Xserver/hw/xfree86/etc/XdmConf.svr4:3.3 Mon Dec 23 01:47:05 1996 +++ xc/programs/Xserver/hw/xfree86/etc/XdmConf.svr4 Mon Jan 9 10:00:15 2006 @@ -1,5 +1,5 @@ #!/bin/sh -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/XdmConf.svr4,v 3.3 1996/12/23 06:47:05 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/XdmConf.svr4,v 3.4 2006/01/09 15:00:15 dawes Exp $ # This is a shell archive (produced by shar 3.49) # To extract the files from this archive, save it to a file, remove # everything above the "!/bin/sh" line above, and type "sh file_name". @@ -7,8 +7,6 @@ # made 06/05/1994 05:08 UTC by root@gamma # Source directory /home5/x/XdmConf.svr4 # -# $XConsortium: XdmConf.svr4 /main/3 1996/02/21 17:47:15 kaleb $ -# # existing files will NOT be overwritten unless -c is specified # # This shar contains: Index: xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh diff -u xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh:1.89 xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh:1.96 --- xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh:1.89 Wed Mar 16 20:11:56 2005 +++ xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh Tue May 9 20:25:38 2006 @@ -1,7 +1,7 @@ #!/bin/sh # -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh,v 1.89 2005/03/17 01:11:56 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh,v 1.96 2006/05/10 00:25:38 dawes Exp $ # # Copyright © 2000 by Precision Insight, Inc. # Copyright © 2000, 2001 by VA Linux Systems, Inc. @@ -31,7 +31,7 @@ # # -# Copyright © 1996-2005 by The XFree86 Project, Inc. +# Copyright © 1996-2006 by The XFree86 Project, Inc. # All rights reserved. # # Permission is hereby granted, free of charge, to any person obtaining @@ -78,7 +78,7 @@ # # -# This script should be used to install XFree86 4.5.0. +# This script should be used to install XFree86 4.5.99.903 # # Parts of this script are based on the old preinst.sh and postinst.sh # scripts. @@ -114,11 +114,11 @@ if [ $SNAPSHOT = y ]; then FULLPREFIX=XXX - VERSION=4.4.99.XXX + VERSION=4.x.xx.xxx PATCHLEVEL=0 FULLVERSION=$VERSION else - FULLPREFIX=4.5 + FULLPREFIX=4.6 PATCHLEVEL=0 VERSION=$FULLPREFIX.$PATCHLEVEL FULLVERSION=$FULLPREFIX.0 @@ -180,6 +180,11 @@ $RUNDIR/lib/X11/fonts/misc/7x14rk.pcf.gz \ $RUNDIR/lib/X11/fonts/misc/7x13euro.pcf.gz \ $RUNDIR/lib/X11/fonts/misc/7x13euroB.pcf.gz \ + $RUNDIR/lib/modules/drivers/ati2_drv.o \ + $RUNDIR/lib/modules/drivers/ati2_drv.so \ + $RUNDIR/lib/modules/drivers/sunffb_drv.o \ + $RUNDIR/lib/modules/drivers/sunffb_drv.so \ + $RUNDIR/lib/modules/drivers/ast_drv.o \ " OLDDIRS=" \ @@ -273,6 +278,7 @@ NoEtcX11= DOUPDATE= DOBASE= +NEEDSOMETHING= OPTS="" @@ -750,8 +756,11 @@ 3) DistName="Linux-ix86-glibc23" ;; + 4) + DistName="Linux-ix86-glibc24" + ;; *) - Message="No dist available for glibc 2.$OsLibcMinor. Try Linux-ix86-glibc23" + Message="No dist available for glibc 2.$OsLibcMinor. Try Linux-ix86-glibc24" ;; esac ;; @@ -781,8 +790,11 @@ 6.2) DistName="Linux-alpha-glibc22" ;; + 6.3) + DistName="Linux-alpha-glibc23" + ;; 6.*) - Message="No Linux/alpha binaries for glibc 2.$OsLibcMinor. Try Linux-alpha-glibc22" + Message="No Linux/alpha binaries for glibc 2.$OsLibcMinor. Try Linux-alpha-glibc23" ;; *) Message="No Linux/alpha binaries for this libc version" @@ -804,8 +816,11 @@ 6.2) DistName="Linux-amd64-glibc22" ;; + 6.3) + DistName="Linux-amd64-glibc23" + ;; 6.[3-9]*) - Message="No dist available for glibc 2.$OsLibcMinor. Try Linux-amd64-glibc22" + Message="No dist available for glibc 2.$OsLibcMinor. Try Linux-amd64-glibc23" ;; *) Message="No Linux/AMD64 binaries for this libc version" @@ -838,6 +853,9 @@ 2.*) DistName="NetBSD-2.0" ;; + 3.*) + DistName="NetBSD-3.0" + ;; *) Message="No NetBSD/i386 binaries available for this version" ;; @@ -1038,6 +1056,45 @@ GetBindistVersion } +ModifyXterm() +{ + # Make xterm setgid or setuid depending on utmp permissions. This might + # not be entirely portable. + + if [ -w /var/run/utmp ]; then + + CheckUtil ls + CheckUtil awk + CheckUtil cut + CheckUtil chmod + + LS="`ls -l /var/run/utmp`" + if [ "`echo ${LS} | cut -b 1`" = "l" ]; then + LS="`ls -lL /var/run/utmp`" + fi + UA="`echo ${LS} | cut -b 3`" + GA="`echo ${LS} | cut -b 6`" + USR="`echo ${LS} | awk '{print $3}'`" + GRP="`echo ${LS} | awk '{print $4}'`" + + if [ "${GA}" = "w" ]; then + + CheckUtil chgrp + + chgrp ${GRP} ${RUNDIR}/bin/xterm + chmod 2755 ${RUNDIR}/bin/xterm + + elif [ "${UA}" = "w" ]; then + + CheckUtil chown + + chown ${USR} ${RUNDIR}/bin/xterm + chmod 4711 ${RUNDIR}/bin/xterm + + fi + fi +} + InstallUpdate() { # Check that there's an existing installation. @@ -1114,7 +1171,9 @@ done # update Fontconfig cache Echo "Updating the index of Freetype fonts..." - $RUNDIR/bin/fc-cache -v + $RUNDIR/bin/fc-cache -v -f + + ModifyXterm echo "" echo "Update installation complete." @@ -1692,9 +1751,13 @@ echo "" echo "Installing the mandatory parts of the binary distribution" echo "" + for i in $BASEDIST $SERVDIST; do (cd $RUNDIR; "$EXTRACT" "$WDIR"/$i) done + +ModifyXterm + if [ X"$VARDIST" != X ]; then (cd $VARDIR; "$EXTRACT" "$WDIR"/$VARDIST) fi @@ -1745,7 +1808,7 @@ TERMCAP1DIR=$ROOTDIR/usr/share TERMCAP2=$ROOTDIR/etc/termcap if [ -d $TERMCAP1DIR ]; then - TERMCAP1=`find $TERMCAP1DIR -type f -name termcap -print 2> /dev/null` + TERMCAP1=`find $TERMCAP1DIR -type f -name termcap -print | fgrep -v doc 2> /dev/null` if [ x"$TERMCAP1" != x ]; then TERMCAPFILE="$TERMCAP1" fi @@ -1954,6 +2017,11 @@ fi done +# update Fontconfig cache +Echo "Updating the index of Freetype fonts..." +$RUNDIR/bin/fc-cache -v -f + + if [ -f $RUNDIR/bin/rstartd ]; then echo "" Index: xc/programs/Xserver/hw/xfree86/etc/dmmap.shar diff -u xc/programs/Xserver/hw/xfree86/etc/dmmap.shar:3.2 xc/programs/Xserver/hw/xfree86/etc/dmmap.shar:3.3 --- xc/programs/Xserver/hw/xfree86/etc/dmmap.shar:3.2 Mon Dec 23 01:47:08 1996 +++ xc/programs/Xserver/hw/xfree86/etc/dmmap.shar Mon Jan 9 10:00:15 2006 @@ -1,5 +1,5 @@ #!/bin/sh -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/dmmap.shar,v 3.2 1996/12/23 06:47:08 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/dmmap.shar,v 3.3 2006/01/09 15:00:15 dawes Exp $ # This is a shell archive (produced by shar 3.49) # To extract the files from this archive, save it to a file, remove # everything above the "!/bin/sh" line above, and type "sh file_name". @@ -7,8 +7,6 @@ # made 10/02/1993 09:11 UTC by root@gamma # Source directory /home1/tmp/x11r5 # -# $XConsortium: dmmap.shar /main/4 1996/02/21 17:47:27 kaleb $ -# # existing files will NOT be overwritten unless -c is specified # # This shar contains: Index: xc/programs/Xserver/hw/xfree86/etc/extrapci.ids diff -u xc/programs/Xserver/hw/xfree86/etc/extrapci.ids:1.15 xc/programs/Xserver/hw/xfree86/etc/extrapci.ids:1.16 --- xc/programs/Xserver/hw/xfree86/etc/extrapci.ids:1.15 Sun Feb 6 20:15:54 2005 +++ xc/programs/Xserver/hw/xfree86/etc/extrapci.ids Tue Apr 11 21:07:29 2006 @@ -14,7 +14,7 @@ # changes/additions that aren't XFree86-specific to the pciids # project (http://pciids.sf.net/). # -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/extrapci.ids,v 1.15 2005/02/07 01:15:54 tsi Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/extrapci.ids,v 1.16 2006/04/12 01:07:29 dawes Exp $ # # Vendors, devices and subsystems. Please keep sorted. @@ -41,3 +41,7 @@ 1274 " 5880 " C 0401 + +1a03 Aspeed Technology Co., Ltd + 2000 AST2000 + Index: xc/programs/Xserver/hw/xfree86/etc/install.sv3 diff -u xc/programs/Xserver/hw/xfree86/etc/install.sv3:3.8 xc/programs/Xserver/hw/xfree86/etc/install.sv3:3.9 --- xc/programs/Xserver/hw/xfree86/etc/install.sv3:3.8 Sun Mar 28 10:32:51 1999 +++ xc/programs/Xserver/hw/xfree86/etc/install.sv3 Mon Jan 9 10:00:16 2006 @@ -1,6 +1,6 @@ #!/bin/sh # -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/install.sv3,v 3.8 1999/03/28 15:32:51 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/install.sv3,v 3.9 2006/01/09 15:00:16 dawes Exp $ # # Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany. # @@ -35,8 +35,6 @@ # Changed Device generation for more flexibility # (michael.rohleder@stadt-frankfurt.de) -# $XConsortium: install.sv3 /main/4 1996/02/21 17:47:34 kaleb $ - # # XFree86 version # Index: xc/programs/Xserver/hw/xfree86/etc/install.sv4 diff -u xc/programs/Xserver/hw/xfree86/etc/install.sv4:3.3 xc/programs/Xserver/hw/xfree86/etc/install.sv4:3.4 --- xc/programs/Xserver/hw/xfree86/etc/install.sv4:3.3 Mon Dec 23 01:47:11 1996 +++ xc/programs/Xserver/hw/xfree86/etc/install.sv4 Mon Jan 9 10:00:16 2006 @@ -1,5 +1,5 @@ #!/bin/sh -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/install.sv4,v 3.3 1996/12/23 06:47:11 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/install.sv4,v 3.4 2006/01/09 15:00:16 dawes Exp $ # # Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany. # @@ -24,8 +24,6 @@ # Author: Thomas Roell, roell@informatik.tu-muenchen.de # -# $XConsortium: install.sv4 /main/3 1996/02/21 17:47:37 kaleb $ - # # install addtional termcap & terminfo entries # Index: xc/programs/Xserver/hw/xfree86/etc/ioport.c diff -u xc/programs/Xserver/hw/xfree86/etc/ioport.c:1.6 xc/programs/Xserver/hw/xfree86/etc/ioport.c:1.7 --- xc/programs/Xserver/hw/xfree86/etc/ioport.c:1.6 Fri Dec 31 11:07:09 2004 +++ xc/programs/Xserver/hw/xfree86/etc/ioport.c Thu Jan 5 13:55:33 2006 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/ioport.c,v 1.6 2004/12/31 16:07:09 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/ioport.c,v 1.7 2006/01/05 18:55:33 tsi Exp $ */ /* - * Copyright 2002 through 2005 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2002 through 2006 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that Index: xc/programs/Xserver/hw/xfree86/etc/kbd_mode.c diff -u xc/programs/Xserver/hw/xfree86/etc/kbd_mode.c:3.6 xc/programs/Xserver/hw/xfree86/etc/kbd_mode.c:3.8 --- xc/programs/Xserver/hw/xfree86/etc/kbd_mode.c:3.6 Sun Jul 26 05:56:17 1998 +++ xc/programs/Xserver/hw/xfree86/etc/kbd_mode.c Fri Oct 14 11:16:51 2005 @@ -1,11 +1,7 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/kbd_mode.c,v 3.6 1998/07/26 09:56:17 dawes Exp $ */ - +/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/kbd_mode.c,v 3.8 2005/10/14 15:16:51 tsi Exp $ */ /* Keyboard mode control program for 386BSD */ - -/* $XConsortium: kbd_mode.c /main/7 1996/03/11 10:46:12 kaleb $ */ - #include #include #include @@ -15,7 +11,7 @@ #include #include -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" @@ -25,8 +21,8 @@ static int fd; -void -msg (char* s) +static void +msg(const char* s) { perror (s); close (fd); Index: xc/programs/Xserver/hw/xfree86/etc/kbd_mode.man diff -u xc/programs/Xserver/hw/xfree86/etc/kbd_mode.man:3.5 xc/programs/Xserver/hw/xfree86/etc/kbd_mode.man:3.6 --- xc/programs/Xserver/hw/xfree86/etc/kbd_mode.man:3.5 Sat Jan 27 13:20:56 2001 +++ xc/programs/Xserver/hw/xfree86/etc/kbd_mode.man Mon Jan 9 10:00:16 2006 @@ -1,4 +1,4 @@ -.\" $XFree86: xc/programs/Xserver/hw/xfree86/etc/kbd_mode.man,v 3.5 2001/01/27 18:20:56 dawes Exp $ +.\" $XFree86: xc/programs/Xserver/hw/xfree86/etc/kbd_mode.man,v 3.6 2006/01/09 15:00:16 dawes Exp $ .TH KBD_MODE 1 __vendorversion__ .SH NAME kbd_mode \- recover the PC console keyboard @@ -33,4 +33,3 @@ kbd_mode -u .sp -.\" $TOG: kbd_mode.man /main/6 1997/07/19 10:37:14 kaleb $ Index: xc/programs/Xserver/hw/xfree86/etc/mmapSVR3.shar diff -u xc/programs/Xserver/hw/xfree86/etc/mmapSVR3.shar:3.3 xc/programs/Xserver/hw/xfree86/etc/mmapSVR3.shar:3.4 --- xc/programs/Xserver/hw/xfree86/etc/mmapSVR3.shar:3.3 Tue Oct 8 19:07:43 2002 +++ xc/programs/Xserver/hw/xfree86/etc/mmapSVR3.shar Mon Jan 9 10:00:16 2006 @@ -1,5 +1,5 @@ #!/bin/sh -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapSVR3.shar,v 3.3 2002/10/08 23:07:43 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapSVR3.shar,v 3.4 2006/01/09 15:00:16 dawes Exp $ # This is a shell archive (produced by shar 3.49) # To extract the files from this archive, save it to a file, remove # everything above the "!/bin/sh" line above, and type "sh file_name". @@ -7,8 +7,6 @@ # made 02/26/1994 03:10 UTC by root@gamma # Source directory /home1/tmp/x11r5 # -# $XConsortium: mmapSVR3.shar /main/4 1996/02/21 17:48:01 kaleb $ -# # existing files will NOT be overwritten unless -c is specified # # This shar contains: Index: xc/programs/Xserver/hw/xfree86/etc/mmapr.c diff -u xc/programs/Xserver/hw/xfree86/etc/mmapr.c:1.10 xc/programs/Xserver/hw/xfree86/etc/mmapr.c:1.15 --- xc/programs/Xserver/hw/xfree86/etc/mmapr.c:1.10 Fri Dec 31 11:07:09 2004 +++ xc/programs/Xserver/hw/xfree86/etc/mmapr.c Tue Apr 18 11:52:57 2006 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapr.c,v 1.10 2004/12/31 16:07:09 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapr.c,v 1.15 2006/04/18 15:52:57 tsi Exp $ */ /* - * Copyright 2002 through 2005 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2002 through 2006 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -21,12 +21,17 @@ * OF THIS SOFTWARE. */ +#undef _LARGEFILE_SOURCE +#undef _FILE_OFFSET_BITS +#undef __STRICT_ANSI__ + #define _LARGEFILE_SOURCE 1 #define _FILE_OFFSET_BITS 64 -#undef __STRICT_ANSI__ + #include #include #include +#include #include #include #include @@ -35,12 +40,14 @@ #include #include +typedef void *ptr; + #ifndef MAP_FAILED -# define MAP_FAILED ((void *)(-1)) +# define MAP_FAILED ((ptr)(-1)) #endif #if defined(_SCO_DS) && !defined(_SCO_DS_LL) -#define strtoull (unsigned long long)strtoul +# define strtoull (unsigned long long)strtoul #endif #if !defined(strtoull) && \ @@ -50,6 +57,24 @@ # define strtoull strtouq #endif +#ifdef linux +# include + /* Workaround for kernel header breakage since 2.5.62 */ +# undef LINUX_MOD_DEVICETABLE_H +# define LINUX_MOD_DEVICETABLE_H 1 +# include + +# ifndef PCIIOC_BASE + /* Selected ioctls for /proc/bus/pci// nodes */ +# define PCIIOC_BASE (('P' << 24) | ('C' << 16) | ('I' << 8)) + + /* Set mmap state to I/O space */ +# define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) + /* Set mmap state to memory space */ +# define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) +# endif +#endif + static unsigned char datab; static unsigned short dataw; static unsigned int datal; @@ -62,39 +87,63 @@ usage(void) { fprintf(stderr, "\n" - "mmapr [-p] [-{bwlqL}] \n\n" - " -p pretty-print output\n\n" - "access size flags:\n\n" - " -b output one byte at a time\n" - " -w output up to two aligned bytes at a time\n" - " -l output up to four aligned bytes at a time (default)\n" - " -q output up to eight aligned bytes at a time\n"); +#ifdef linux + "mmapr [-p] [-{im}] [-{bwlqL}] [-{au}] \n\n" + " -i select /proc/bus/pci// I/O space\n" + " -m select /proc/bus/pci// memory space\n\n" +#else + "mmapr [-p] [-{bwlqL}] [-{au}] \n\n" +#endif + " -p pretty-print output\n\n" + " access size flags:\n\n" + " -b output one byte at a time\n" + " -w output up to two aligned bytes at a time\n" + " -l output up to four aligned bytes at a time (default)\n" + " -q output up to eight aligned bytes at a time\n"); + switch (sizeof(dataL)) { - case sizeof(datab): - fprintf(stderr, " -L same as -b\n\n"); - break; - - case sizeof(dataw): - fprintf(stderr, " -L same as -w\n\n"); - break; - - case sizeof(datal): - fprintf(stderr, " -L same as -l\n\n"); - break; - - case sizeof(dataq): - fprintf(stderr, " -L same as -q\n\n"); - break; - - default: - fprintf(stderr, "\n"); - break; + case sizeof(datab): + fprintf(stderr, " -L same as -b\n\n"); + break; + + case sizeof(dataw): + fprintf(stderr, " -L same as -w\n\n"); + break; + + case sizeof(datal): + fprintf(stderr, " -L same as -l\n\n"); + break; + + case sizeof(dataq): + fprintf(stderr, " -L same as -q\n\n"); + break; + + default: + fprintf(stderr, "\n"); + break; } + fprintf(stderr, + " -u as above but allow unaligned accesses (might crash)\n" + " -a only use aligned accesses (default)\n\n"); + exit(1); } +#ifdef SIGBUS +/* + * Signal handler to catch unaligned accesses and print a meaningful message. + */ +static void +sigbus(int signum) +{ + fprintf(stderr, + "The architecture or OS does not allow unaligned accesses\n"); + exit(128 + SIGBUS); +} +#endif + int main(int argc, char **argv) { @@ -102,72 +151,97 @@ size_t Length = 0, length, size; char *BadString, *data; void *buffer; - int fd, pagesize, prettyprint = 0; + int fd, pagesize, prettyprint = 0, aligned = 1; +#ifdef linux + int mmap_ioctl = 0; +#endif char Address[20], Hex[36], Glyph[17]; char Size = sizeof(datal), Format = 0; while (argv[1] && (argv[1][0] == '-') && argv[1][1]) { - for (; argv[1][1]; argv[1]++) - { - switch (argv[1][1]) - { - case 'p': - prettyprint = 1; - break; - - case 'b': - Size = sizeof(datab); - break; - - case 'w': - Size = sizeof(dataw); - break; - - case 'l': - Size = sizeof(datal); - break; - - case 'L': - Size = sizeof(dataL); - break; - - case 'q': - Size = sizeof(dataq); - break; - - default: - usage(); - } - } + for (; argv[1][1]; argv[1]++) + { + switch (argv[1][1]) + { + case 'p': + prettyprint = 1; + break; + + case 'b': + Size = sizeof(datab); + break; + + case 'w': + Size = sizeof(dataw); + break; + + case 'l': + Size = sizeof(datal); + break; + + case 'L': + Size = sizeof(dataL); + break; + + case 'q': + Size = sizeof(dataq); + break; + + case 'u': + aligned = 0; + break; + + case 'a': + aligned = 1; + break; +#ifdef linux + case 'i': + mmap_ioctl = PCIIOC_MMAP_IS_IO; + break; + + case 'm': + mmap_ioctl = PCIIOC_MMAP_IS_MEM; + break; +#endif + default: + usage(); + } + } - argc--; - argv++; + argc--; + argv++; } if (argc != 4) - usage(); + usage(); - BadString = (char *)0; + BadString = (ptr)0; Offset = strtoull(argv[2], &BadString, 0); if (errno || (BadString && *BadString)) - usage(); + usage(); - BadString = (char *)0; + BadString = (ptr)0; Length = strtoul(argv[3], &BadString, 0); if (errno || (BadString && *BadString)) - usage(); + usage(); if (Length <= 0) - return 0; + return 0; if ((fd = open(argv[1], O_RDONLY)) < 0) { - fprintf(stderr, "mmapr: Unable to open \"%s\": %s.\n", - argv[1], strerror(errno)); - exit(1); + fprintf(stderr, "mmapr: Unable to open \"%s\": %s.\n", + argv[1], strerror(errno)); + exit(1); } +#ifdef linux + if (mmap_ioctl && (ioctl(fd, mmap_ioctl, 0) < 0)) + fprintf(stderr, "mmapr: ioctl error: \"%s\"; Ignored.\n", + strerror(errno)); +#endif + pagesize = getpagesize(); offset = Offset & (off_t)(-pagesize); length = ((Offset + Length + pagesize - 1) & (off_t)(-pagesize)) - offset; @@ -175,153 +249,159 @@ close(fd); if (buffer == MAP_FAILED) { - fprintf(stderr, "mmapr: Unable to mmap \"%s\": %s.\n", - argv[1], strerror(errno)); - exit(1); + fprintf(stderr, "mmapr: Unable to mmap \"%s\": %s.\n", + argv[1], strerror(errno)); + exit(1); } if (prettyprint) { - End = Offset + Length - 1; + End = Offset + Length - 1; - if ((sizeof(Offset) > sizeof(dataL)) && - ((unsigned long long)End != (unsigned long)End)) - { - sprintf(Address, "0x%015llX0", (unsigned long long)Offset >> 4); - Format = 3; - } - else - if ((sizeof(Offset) > sizeof(dataw)) && - ((unsigned long long)End != (unsigned short)End)) - { - sprintf(Address, "0x%07lX0", (unsigned long)Offset >> 4); - Format = 2; - } - else - if ((sizeof(Offset) > sizeof(datab)) && - ((unsigned long long)End != (unsigned char)End)) - { - sprintf(Address, "0x%03X0", (unsigned short)Offset >> 4); - Format = 1; - } - else - { - sprintf(Address, "0x%01X0", (unsigned char)Offset >> 4); - /* Format = 0; */ - } - - memset(Hex, ' ', 35); - Hex[35] = 0; - memset(Glyph, ' ', 16); - Glyph[16] = 0; + if ((sizeof(Offset) > sizeof(dataL)) && + ((unsigned long long)End != (unsigned long)End)) + { + sprintf(Address, "0x%015llX0", (unsigned long long)Offset >> 4); + Format = 3; + } + else + if ((sizeof(Offset) > sizeof(dataw)) && + ((unsigned long long)End != (unsigned short)End)) + { + sprintf(Address, "0x%07lX0", (unsigned long)Offset >> 4); + Format = 2; + } + else + if ((sizeof(Offset) > sizeof(datab)) && + ((unsigned long long)End != (unsigned char)End)) + { + sprintf(Address, "0x%03X0", (unsigned short)Offset >> 4); + Format = 1; + } + else + { + sprintf(Address, "0x%01X0", (unsigned char)Offset >> 4); + /* Format = 0; */ + } + + memset(Hex, ' ', 35); + Hex[35] = 0; + memset(Glyph, ' ', 16); + Glyph[16] = 0; } +#ifdef SIGBUS + if (!aligned) + signal(SIGBUS, sigbus); +#endif + Offset -= offset; while (Length > 0) { - if ((Offset & sizeof(datab)) || - (Length < sizeof(dataw)) || - (Size < sizeof(dataw))) - { - datab = *(volatile unsigned char *)((char *)buffer + Offset); - data = (char *)&datab; - size = sizeof(datab); - } - else - if ((Offset & sizeof(dataw)) || - (Length < sizeof(datal)) || - (Size < sizeof(datal))) - { - dataw = *(volatile unsigned short *)((char *)buffer + Offset); - data = (char *)&dataw; - size = sizeof(dataw); - } - else - if ((Offset & sizeof(datal)) || - (Length < sizeof(dataL)) || - (Size < sizeof(dataL))) - { - datal = *(volatile unsigned int *)((char *)buffer + Offset); - data = (char *)&datal; - size = sizeof(datal); - } - else - if ((Offset & sizeof(dataL)) || - (Length < sizeof(dataq)) || - (Size < sizeof(dataq))) - { - dataL = *(volatile unsigned long *)((char *)buffer + Offset); - data = (char *)&dataL; - size = sizeof(dataL); - } - else - { - dataq = *(volatile unsigned long long *)((char *)buffer + Offset); - data = (char *)&dataq; - size = sizeof(dataq); - } - - if (prettyprint) - { - unsigned int i = (offset + Offset) & 15; - - Offset += size; - Length -= size; - - for (; size > 0; --size, ++i, ++data) - { - Hex[((i >> 2) * 9) + ((i & 3) << 1)] = - hextab[(unsigned char)*data >> 4]; - Hex[((i >> 2) * 9) + ((i & 3) << 1) + 1] = - hextab[(unsigned char)*data & 15]; - - if (isprint(*data)) - Glyph[i] = *data; - else - Glyph[i] = '.'; - } - - if (!Length || !(Offset & 15)) - { - printf("%s: %s |%s|\n", Address, Hex, Glyph); - - if (!Length) - break; - - switch(Format) - { - case 0: - sprintf(Address, "0x%02X", - (unsigned char)(Offset + offset)); - break; - - case 1: - sprintf(Address, "0x%04X", - (unsigned short)(Offset + offset)); - break; - - case 2: - sprintf(Address, "0x%08lX", - (unsigned long)(Offset + offset)); - break; - - case 3: default: - sprintf(Address, "0x%016llX", - (unsigned long long)(Offset + offset)); - break; - } - - memset(Hex, ' ', 35); - memset(Glyph, ' ', 16); - } - } - else - { - Offset += size; - Length -= size; + if ((Length < sizeof(dataw)) || + (Size < sizeof(dataw)) || + (aligned && (Offset & sizeof(datab)))) + { + datab = *(volatile unsigned char *)(ptr)((char *)buffer + Offset); + data = (ptr)&datab; + size = sizeof(datab); + } + else + if ((Length < sizeof(datal)) || + (Size < sizeof(datal)) || + (aligned && (Offset & sizeof(dataw)))) + { + dataw = *(volatile unsigned short *)(ptr)((char *)buffer + Offset); + data = (ptr)&dataw; + size = sizeof(dataw); + } + else + if ((Length < sizeof(dataL)) || + (Size < sizeof(dataL)) || + (aligned && (Offset & sizeof(datal)))) + { + datal = *(volatile unsigned int *)(ptr)((char *)buffer + Offset); + data = (ptr)&datal; + size = sizeof(datal); + } + else + if ((Length < sizeof(dataq)) || + (Size < sizeof(dataq)) || + (aligned && (Offset & sizeof(dataL)))) + { + dataL = *(volatile unsigned long *)(ptr)((char *)buffer + Offset); + data = (ptr)&dataL; + size = sizeof(dataL); + } + else + { + dataq = + *(volatile unsigned long long *)(ptr)((char *)buffer + Offset); + data = (ptr)&dataq; + size = sizeof(dataq); + } + + if (prettyprint) + { + unsigned int i = (offset + Offset) & 15; + + Offset += size; + Length -= size; + + for (; size > 0; --size, ++i, ++data) + { + Hex[((i >> 2) * 9) + ((i & 3) << 1)] = + hextab[(unsigned char)*data >> 4]; + Hex[((i >> 2) * 9) + ((i & 3) << 1) + 1] = + hextab[(unsigned char)*data & 15]; + + if ((*data >= 0x20) && (*data < 0x7F)) + Glyph[i] = *data; + else + Glyph[i] = '.'; + } + + if (!Length || !(Offset & 15)) + { + printf("%s: %s |%s|\n", Address, Hex, Glyph); + + if (!Length) + break; + + switch(Format) + { + case 0: + sprintf(Address, "0x%02X", + (unsigned char)(Offset + offset)); + break; + + case 1: + sprintf(Address, "0x%04X", + (unsigned short)(Offset + offset)); + break; + + case 2: + sprintf(Address, "0x%08lX", + (unsigned long)(Offset + offset)); + break; + + case 3: default: + sprintf(Address, "0x%016llX", + (unsigned long long)(Offset + offset)); + break; + } + + memset(Hex, ' ', 35); + memset(Glyph, ' ', 16); + } + } + else + { + Offset += size; + Length -= size; - fwrite(data, size, 1, stdout); - } + fwrite(data, size, 1, stdout); + } } munmap(buffer, length); Index: xc/programs/Xserver/hw/xfree86/etc/mmapw.c diff -u xc/programs/Xserver/hw/xfree86/etc/mmapw.c:1.8 xc/programs/Xserver/hw/xfree86/etc/mmapw.c:1.13 --- xc/programs/Xserver/hw/xfree86/etc/mmapw.c:1.8 Fri Jan 28 11:56:43 2005 +++ xc/programs/Xserver/hw/xfree86/etc/mmapw.c Thu Jan 5 13:55:33 2006 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapw.c,v 1.8 2005/01/28 16:56:43 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapw.c,v 1.13 2006/01/05 18:55:33 tsi Exp $ */ /* - * Copyright 2002 through 2005 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org + * Copyright 2002 through 2006 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that @@ -21,11 +21,16 @@ * OF THIS SOFTWARE. */ +#undef _LARGEFILE_SOURCE +#undef _FILE_OFFSET_BITS +#undef __STRICT_ANSI__ + #define _LARGEFILE_SOURCE 1 #define _FILE_OFFSET_BITS 64 -#undef __STRICT_ANSI__ + #include #include +#include #include #include #include @@ -34,12 +39,14 @@ #include #include +typedef void *ptr; + #ifndef MAP_FAILED -# define MAP_FAILED ((void *)(-1)) +# define MAP_FAILED ((ptr)(-1)) #endif #if defined(_SCO_DS) && !defined(_SCO_DS_LL) -#define strtoull (unsigned long long)strtoul +# define strtoull (unsigned long long)strtoul #endif #if !defined(strtoull) && \ @@ -49,6 +56,24 @@ # define strtoull strtouq #endif +#ifdef linux +# include + /* Workaround for kernel header breakage since 2.5.62 */ +# undef LINUX_MOD_DEVICETABLE_H +# define LINUX_MOD_DEVICETABLE_H 1 +# include + +# ifndef PCIIOC_BASE + /* Selected ioctls for /proc/bus/pci// nodes */ +# define PCIIOC_BASE (('P' << 24) | ('C' << 16) | ('I' << 8)) + + /* Set mmap state to I/O space */ +# define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) + /* Set mmap state to memory space */ +# define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) +# endif +#endif + #define datab unsigned char #define dataw unsigned short #define datal unsigned int @@ -59,38 +84,62 @@ usage(void) { fprintf(stderr, "\n" - "mmapw [-{bwlqL}] \n\n" - "access size flags:\n\n" - " -b write one byte\n" - " -w write two aligned bytes\n" - " -l write four aligned bytes (default)\n" - " -q write eight aligned bytes\n"); +#ifdef linux + "mmapw [-{im}] [-{bwlqL}] [-{au}] \n\n" + " -i select /proc/bus/pci// I/O space\n" + " -m select /proc/bus/pci// memory space\n\n" +#else + "mmapw [-{bwlqL}] [-{au}] \n\n" +#endif + "access size flags:\n\n" + " -b write one byte\n" + " -w write two aligned bytes\n" + " -l write four aligned bytes (default)\n" + " -q write eight aligned bytes\n"); + switch (sizeof(dataL)) { - case sizeof(datab): - fprintf(stderr, " -L same as -b\n\n"); - break; - - case sizeof(dataw): - fprintf(stderr, " -L same as -w\n\n"); - break; - - case sizeof(datal): - fprintf(stderr, " -L same as -l\n\n"); - break; - - case sizeof(dataq): - fprintf(stderr, " -L same as -q\n\n"); - break; - - default: - fprintf(stderr, "\n"); - break; + case sizeof(datab): + fprintf(stderr, " -L same as -b\n\n"); + break; + + case sizeof(dataw): + fprintf(stderr, " -L same as -w\n\n"); + break; + + case sizeof(datal): + fprintf(stderr, " -L same as -l\n\n"); + break; + + case sizeof(dataq): + fprintf(stderr, " -L same as -q\n\n"); + break; + + default: + fprintf(stderr, "\n"); + break; } + fprintf(stderr, + " -u as above but allow unaligned accesses (might crash)\n" + " -a only use aligned accesses (default)\n\n"); + exit(1); } +#ifdef SIGBUS +/* + * Signal handler to catch unaligned access and print a meaningful message. + */ +static void +sigbus(int signum) +{ + fprintf(stderr, + "The architecture or OS does not allow unaligned accesses\n"); + exit (128 + SIGBUS); +} +#endif + int main(int argc, char **argv) { @@ -99,72 +148,95 @@ size_t length; char *BadString; void *buffer; - int fd, pagesize; + int fd, pagesize, aligned = 1; +#ifdef linux + int mmap_ioctl = 0; +#endif char size = sizeof(datal); - switch (argc) + while (argv[1] && (argv[1][0] == '-') && argv[1][1]) { - case 4: - break; - - case 5: - if (argv[1][0] != '-') - usage(); - - switch (argv[1][1]) - { - case 'b': - size = sizeof(datab); - break; - - case 'w': - size = sizeof(dataw); - break; - - case 'l': - size = sizeof(datal); - break; - - case 'L': - size = sizeof(dataL); - break; - - case 'q': - size = sizeof(dataq); - break; - - default: - usage(); - } - - if (argv[1][2]) - usage(); - - argc--; - argv++; - break; + for (; argv[1][1]; argv[1]++) + { + switch (argv[1][1]) + { + case 'b': + size = sizeof(datab); + break; + + case 'w': + size = sizeof(dataw); + break; + + case 'l': + size = sizeof(datal); + break; + + case 'L': + size = sizeof(dataL); + break; + + case 'q': + size = sizeof(dataq); + break; + + case 'u': + aligned = 0; + break; + + case 'a': + aligned = 1; + break; +#ifdef linux + case 'i': + mmap_ioctl = PCIIOC_MMAP_IS_IO; + break; + + case 'm': + mmap_ioctl = PCIIOC_MMAP_IS_MEM; + break; +#endif + default: + usage(); + } + } - default: - usage(); + argc--; + argv++; } - BadString = (char *)0; + if (argc != 4) + usage(); + + BadString = (ptr)0; Offset = strtoull(argv[2], &BadString, 0); if (errno || (BadString && *BadString) || (Offset & (size - 1))) - usage(); + usage(); - BadString = (char *)0; + BadString = (ptr)0; data = strtoull(argv[3], &BadString, 0); if (errno || (BadString && *BadString)) - usage(); + usage(); + + if (data & ((unsigned long long)(-1LL) << (size * 8))) + { + fprintf(stderr, "Value too large for access size\n"); + exit(1); + } if ((fd = open(argv[1], O_RDWR)) < 0) { - fprintf(stderr, "mmapr: Unable to open \"%s\": %s.\n", - argv[1], strerror(errno)); - exit(1); + fprintf(stderr, "mmapw: Unable to open \"%s\": %s.\n", + argv[1], strerror(errno)); + exit(1); } +#ifdef linux + if (mmap_ioctl && (ioctl(fd, mmap_ioctl, 0) < 0)) + fprintf(stderr, "mmapw: ioctl error: \"%s\"; Ignored.\n", + strerror(errno)); +#endif + pagesize = getpagesize(); offset = Offset & (off_t)(-pagesize); length = ((Offset + size + pagesize - 1) & (off_t)(-pagesize)) - offset; @@ -172,27 +244,69 @@ close(fd); if (buffer == MAP_FAILED) { - fprintf(stderr, "mmapr: Unable to mmap \"%s\": %s.\n", - argv[1], strerror(errno)); - exit(1); + fprintf(stderr, "mmapw: Unable to mmap \"%s\": %s.\n", + argv[1], strerror(errno)); + exit(1); } +#ifdef SIGBUS + if (!aligned) + signal(SIGBUS, sigbus); +#endif + Offset -= offset; - if (size == sizeof(datab)) - *(volatile unsigned char *)((char *)buffer + Offset) = - (unsigned char)data; - else if (size == sizeof(dataw)) - *(volatile unsigned short *)((char *)buffer + Offset) = - (unsigned short)data; - else if (size == sizeof(datal)) - *(volatile unsigned int *)((char *)buffer + Offset) = - (unsigned int)data; - else if (size == sizeof(dataL)) - *(volatile unsigned long *)((char *)buffer + Offset) = - (unsigned long)data; - else if (size == sizeof(dataq)) - *(volatile unsigned long long *)((char *)buffer + Offset) = + if ((size == sizeof(datab)) || (aligned && (Offset & sizeof(datab)))) + { + do + { + *(volatile unsigned char *)(ptr)((char *)buffer + Offset) = + (unsigned char)data; + data >>= 8 * (sizeof(datab) & (sizeof(data) - 1)); + Offset += sizeof(datab); + size -= sizeof(datab); + } while (size); + } + else + if ((size == sizeof(dataw)) || (aligned && (Offset & sizeof(dataw)))) + { + do + { + *(volatile unsigned short *)(ptr)((char *)buffer + Offset) = + (unsigned short)data; + data >>= 8 * (sizeof(dataw) & (sizeof(data) - 1)); + Offset += sizeof(dataw); + size -= sizeof(dataw); + } while (size); + } + else + if ((size == sizeof(datal)) || (aligned && (Offset & sizeof(datal)))) + { + do + { + *(volatile unsigned int *)(ptr)((char *)buffer + Offset) = + (unsigned int)data; + data >>= 8 * (sizeof(datal) & (sizeof(data) - 1)); + Offset += sizeof(datal); + size -= sizeof(datal); + } while (size); + } + else + if ((size == sizeof(dataL)) || (aligned && (Offset & sizeof(dataL)))) + { + do + { + *(volatile unsigned long *)(ptr)((char *)buffer + Offset) = + (unsigned long)data; + data >>= 8 * (sizeof(dataL) & (sizeof(data) - 1)); + Offset += sizeof(dataL); + size -= sizeof(dataL); + } while (size); + } + else + { + *(volatile unsigned long long *)(ptr)((char *)buffer + Offset) = (unsigned long long)data; + } munmap(buffer, length); Index: xc/programs/Xserver/hw/xfree86/etc/pci.ids diff -u xc/programs/Xserver/hw/xfree86/etc/pci.ids:1.10 xc/programs/Xserver/hw/xfree86/etc/pci.ids:1.12 --- xc/programs/Xserver/hw/xfree86/etc/pci.ids:1.10 Sat Jan 8 16:57:56 2005 +++ xc/programs/Xserver/hw/xfree86/etc/pci.ids Tue Apr 11 21:07:29 2006 @@ -1,14 +1,17 @@ -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/pci.ids,v 1.10 2005/01/08 21:57:56 tsi Exp $ # # List of PCI ID's # # Maintained by Martin Mares and other volunteers from the -# Linux PCI ID's Project at http://pciids.sf.net/. New data are always -# welcome (if they are accurate), we're eagerly expecting new entries, -# so if you have anything to contribute, please visit the home page or -# send a diff -u against the most recent pci.ids to pci-ids@ucw.cz. +# Linux PCI ID's Project at http://pciids.sf.net/. # -# Daily snapshot on Mon 2004-11-29 21:06:40 +# New data are always welcome, especially if accurate. If you have +# anything to contribute, please follow the instructions at the web site +# or send a diff -u against the most recent pci.ids to pci-ids@ucw.cz. +# +# This file can be distributed under either the GNU General Public License +# (version 2 or higher) or the 3-clause BSD License. +# +# Daily snapshot on Tue 2006-04-11 01:05:02 # # Vendors, devices and subsystems. Please keep sorted. @@ -25,13 +28,11 @@ # Real TJN ID is e159, but they got it wrong several times --mj 0059 Tiger Jet Network Inc. (Wrong ID) 0070 Hauppauge computer works Inc. - 4000 WinTV PVR-350 - 4001 WinTV PVR-250 (v1) - 4009 WinTV PVR-250 - 4801 WinTV PVR-250 MCE 0071 Nebula Electronics Ltd. 0095 Silicon Image, Inc. (Wrong ID) 0680 Ultra ATA/133 IDE RAID CONTROLLER CARD +# Wrong ID used in subsystem ID of the TELES.S0/PCI 2.x ISDN adapter +00a7 Teles AG (Wrong ID) 0100 Ncipher Corp Ltd # 018a is not LevelOne but there is a board misprogrammed 018a LevelOne @@ -39,7 +40,7 @@ # 021b is not Compaq but there is a board misprogrammed 021b Compaq Computer Corporation 8139 HNE-300 (RealTek RTL8139c) [iPaq Networking] -# http://www.davicom.com.tw/ +0270 Hauppauge computer works Inc. (Wrong ID) 0291 Davicom Semiconductor, Inc. 8212 DM9102A(DM9102AE, SM9102AF) Ethernet 100/10 MBit(Rev 40) # SpeedStream is Efficient Networks, Inc, a Siemens Company @@ -47,18 +48,34 @@ 1012 1012 PCMCIA 10/100 Ethernet Card [RTL81xx] 0357 TTTech AG 000a TTP-Monitoring Card V2.0 +0432 SCM Microsystems, Inc. + 0001 Pluto2 DVB-T Receiver for PCMCIA [EasyWatch MobilSet] +045e Microsoft + 006e MN-510 802.11b wireless USB paddle + 00c2 MN-710 wireless USB paddle +04cf Myson Century, Inc + 8818 CS8818 USB2.0-to-ATAPI Bridge Controller with Embedded PHY +050d Belkin + 7050 F5D7050 802.11g Wireless USB Adapter 05e3 CyberDoor 0701 CBD516 +066f Sigmatel Inc. 0675 Dynalink 1700 IS64PH ISDN Adapter 1702 IS64PH ISDN Adapter + 1703 ISDN Adapter (PCI Bus, DV, W) + 1704 ISDN Adapter (PCI Bus, D, C) +067b Prolific Technology, Inc. + 3507 PL-3507 Hi-Speed USB & IEEE 1394 Combo to IDE Bridge Controller +# Found on Sapphire Radeon X700 (www.saphiretech.com) +0721 Sapphire, Inc. +07e2 ELMEG Communication Systems GmbH # Wrong ID used in subsystem ID of VIA USB controllers. 0925 VIA Technologies, Inc. (Wrong ID) 09c1 Arris 0704 CM 200E Cable Modem 0a89 BREA Technologies Inc 0b49 ASCII Corporation -# see http://homepage1.nifty.com/mcn/lab/machines/trance_vibrator/usbview.vib.txt 064f Trance Vibrator 0e11 Compaq Computer Corporation 0001 PCI to EISA Bridge @@ -70,9 +87,11 @@ 0e11 409d Smart Array 6400 EM 0049 NC7132 Gigabit Upgrade Module 004a NC6136 Gigabit Server Adapter + 005a Remote Insight II board - Lights-Out 007c NC7770 1000BaseTX 007d NC6770 1000BaseTX 0085 NC7780 1000BaseTX + 00b1 Remote Insight II board - PCI device 00bb NC7760 00ca NC7771 00cb NC7781 @@ -222,10 +241,14 @@ 4c53 1300 P017 mezzanine (32-bit PMC) 4c53 1310 P017 mezzanine (64-bit PMC) 0030 53c1030 PCI-X Fusion-MPT Dual Ultra320 SCSI + 0e11 00da ProLiant ML 350 1028 0123 PowerEdge 2600 1028 014a PowerEdge 1750 1028 016c PowerEdge 1850 MPT Fusion SCSI/RAID (Perc 4) + 1028 0183 PowerEdge 1800 1028 1010 LSI U320 SCSI Controller + 124b 1170 PMC-USCSI320 + 1734 1052 Primergy RX300 S2 0031 53c1030ZC PCI-X Fusion-MPT Dual Ultra320 SCSI 0032 53c1035 PCI-X Fusion-MPT Dual Ultra320 SCSI 1000 1000 LSI53C1020/1030 PCI-X to Ultra320 SCSI Controller @@ -234,6 +257,16 @@ 1000 0033 MegaRAID SCSI 320-2XR 1000 0066 MegaRAID SCSI 320-2XRWS 0041 53C1035ZC PCI-X Fusion-MPT Dual Ultra320 SCSI + 0050 SAS1064 PCI-X Fusion-MPT SAS + 0054 SAS1068 PCI-X Fusion-MPT SAS + 0056 SAS1064E PCI-Express Fusion-MPT SAS + 0058 SAS1068E PCI-Express Fusion-MPT SAS + 005a SAS1066E PCI-Express Fusion-MPT SAS + 005c SAS1064A PCI-X Fusion-MPT SAS + 005e SAS1066 PCI-X Fusion-MPT SAS + 0060 SAS1078 PCI-X Fusion-MPT SAS + 0062 SAS1078 PCI-Express Fusion-MPT SAS + 1000 0062 SAS1078 PCI-Express Fusion-MPT SAS 008f 53c875J 1092 8000 FirePort 40 SCSI Controller 1092 8760 FirePort 40 Dual SCSI Host Adapter @@ -270,6 +303,9 @@ 0627 FC929X LAN 0628 FC919X Fibre Channel Adapter 0629 FC919X LAN + 0640 FC949X Fibre Channel Adapter + 0642 FC939X Fibre Channel Adapter + 0646 FC949ES Fibre Channel Adapter 0701 83C885 NT50 DigitalScape Fast Ethernet 0702 Yellowfin G-NIC gigabit ethernet 1318 0000 PEI100X @@ -304,6 +340,7 @@ 9100 INI-9100/9100W SCSI Host 1002 ATI Technologies Inc 3150 M24 1P [Radeon Mobility X600] + 3152 M22 [Radeon Mobility X300] 3154 M24 1T [FireGL M24 GL] 3e50 RV380 0x3e50 [Radeon X600] 3e54 RV380 0x3e54 [FireGL V3200] @@ -311,19 +348,17 @@ 4136 Radeon IGP 320 M 4137 Radeon IGP330/340/350 4144 R300 AD [Radeon 9500 Pro] -# New PCI ID provided by ATI developer relations (correction to above) 4145 R300 AE [Radeon 9700 Pro] -# New PCI ID provided by ATI developer relations (oops, correction to above) 4146 R300 AF [Radeon 9700 Pro] 4147 R300 AG [FireGL Z1/X1] 4148 R350 AH [Radeon 9800] 4149 R350 AI [Radeon 9800] 414a R350 AJ [Radeon 9800] 414b R350 AK [Fire GL X2] -# New PCI ID provided by ATI developer relations 4150 RV350 AP [Radeon 9600] 1002 0002 R9600 Pro primary (Asus OEM for HP) 1002 0003 R9600 Pro secondary (Asus OEM for HP) + 1002 4722 All-in-Wonder 2006 AGP Edition 1458 4024 Giga-Byte GV-R96128D Primary 148c 2064 PowerColor R96A-C3N 148c 2066 PowerColor R96A-C3N @@ -331,48 +366,52 @@ 174b 7c29 GC-R9600PRO Primary [Sapphire] 17ee 2002 Radeon 9600 256Mb Primary 18bc 0101 GC-R9600PRO Primary -# New PCI ID provided by ATI developer relations 4151 RV350 AQ [Radeon 9600] 1043 c004 A9600SE -# New PCI ID provided by ATI developer relations 4152 RV350 AR [Radeon 9600] 1002 0002 Radeon 9600XT + 1002 4772 All-in-Wonder 9600 XT 1043 c002 Radeon 9600 XT TVD - 4153 RV350 AS [Radeon 9600 AS] + 1043 c01a A9600XT/TD + 174b 7c29 Sapphire Radeon 9600XT + 1787 4002 Radeon 9600 XT + 4153 RV350 AS [Radeon 9550] + 1462 932c 865PE Neo2-V (MS-6788) mainboard 4154 RV350 AT [Fire GL T2] 4155 RV350 AU [Fire GL T2] 4156 RV350 AV [Fire GL T2] 4157 RV350 AW [Fire GL T2] 4158 68800AX [Mach32] -# The PCI ID is unrelated to any DVI output. 4164 R300 AD [Radeon 9500 Pro] (Secondary) -# New PCI ID info provided by ATI developer relations 4165 R300 AE [Radeon 9700 Pro] (Secondary) -# New PCI ID info provided by ATI developer relations 4166 R300 AF [Radeon 9700 Pro] (Secondary) -# New PCI ID provided by ATI developer relations 4168 Radeon R350 [Radeon 9800] (Secondary) -# New PCI ID provided by ATI developer relations (correction to above) 4170 RV350 AP [Radeon 9600] (Secondary) + 1002 0003 R9600 Pro secondary (Asus OEM for HP) + 1002 4723 All-in-Wonder 2006 AGP Edition (Secondary) 1458 4025 Giga-Byte GV-R96128D Secondary 148c 2067 PowerColor R96A-C3N (Secondary) 174b 7c28 GC-R9600PRO Secondary [Sapphire] 17ee 2003 Radeon 9600 256Mb Secondary 18bc 0100 GC-R9600PRO Secondary -# New PCI ID provided by ATI developer relations (correction to above) 4171 RV350 AQ [Radeon 9600] (Secondary) 1043 c005 A9600SE (Secondary) -# New PCI ID provided by ATI developer relations (correction to above) 4172 RV350 AR [Radeon 9600] (Secondary) 1002 0003 Radeon 9600XT (Secondary) + 1002 4773 All-in-Wonder 9600 XT (Secondary) 1043 c003 A9600XT (Secondary) + 1043 c01b A9600XT/TD (Secondary) + 174b 7c28 Sapphire Radeon 9600XT (Secondary) + 1787 4003 Radeon 9600 XT (Secondary) 4173 RV350 ?? [Radeon 9550] (Secondary) 4237 Radeon 7000 IGP 4242 R200 BB [Radeon All in Wonder 8500DV] 1002 02aa Radeon 8500 AIW DV Edition 4243 R200 BC [Radeon All in Wonder 8500] 4336 Radeon Mobility U1 + 1002 4336 Pavilion ze4300 ATI Radeon Mobility U1 (IGP 320 M) 103c 0024 Pavilion ze4400 builtin Video + 161f 2029 eMachines M5312 builtin Video 4337 Radeon IGP 330M/340M/350M 1014 053a ThinkPad R40e (2684-HVG) builtin VGA controller 103c 0850 Radeon IGP 345M @@ -380,11 +419,33 @@ 4345 EHCI USB Controller 4347 OHCI USB Controller #1 4348 OHCI USB Controller #2 + 4349 ATI Dual Channel Bus Master PCI IDE Controller 434d IXP AC'97 Modem -# Radeon 9100 IGP integrated 4353 ATI SMBus 4354 215CT [Mach64 CT] 4358 210888CX [Mach64 CX] + 4363 ATI SMBus + 436e ATI 436E Serial ATA Controller + 4370 IXP SB400 AC'97 Audio Controller + 103c 308b nx6125 + 4371 IXP SB400 PCI-PCI Bridge + 103c 308b nx6125 + 4372 IXP SB400 SMBus Controller + 103c 308b nx6125 + 4373 IXP SB400 USB2 Host Controller + 103c 308b nx6125 + 4374 IXP SB400 USB Host Controller + 103c 308b nx6125 + 4375 IXP SB400 USB Host Controller + 103c 308b nx6125 + 4376 Standard Dual Channel PCI IDE Controller ATI + 103c 308b nx6125 + 4377 IXP SB400 PCI-ISA Bridge + 103c 308b nx6125 + 4378 ATI SB400 - AC'97 Modem Controller + 103c 308b nx6125 + 4379 ATI 4379 Serial ATA Controller + 437a ATI 437A Serial ATA Controller 4437 Radeon Mobility 7000 IGP 4554 210888ET [Mach64 ET] 4654 Mach64 VT @@ -437,6 +498,8 @@ 1028 00ce PowerEdge 1400 1028 00d1 PowerEdge 2550 1028 00d9 PowerEdge 2500 + 1028 0134 Poweredge SC600 + 1734 007a Primergy RX300 8086 3411 SDS2 Mainboard 8086 3427 S875WP1-E mainboard 4753 Rage XC @@ -480,6 +543,12 @@ 4a4e M18 JN [Radeon Mobility 9800] 4a50 R420 JP [Radeon X800XT] 4a70 R420 [X800XT-PE] (Secondary) + 4b49 R480 [Radeon X850XT] + 4b4b R480 [Radeon X850Pro] + 4b4c R481 [Radeon X850XT-PE] + 4b69 R480 [Radeon X850XT secondary] + 4b6b R480 [Radeon X850Pro] (Secondary) + 4b6c R481 [Radeon X850XT-PE] Secondary 4c42 3D Rage LT Pro AGP-133 0e11 b0e7 Rage LT Pro (Compaq Presario 5240) 0e11 b0e8 Rage 3D LT Pro @@ -503,8 +572,12 @@ 0e11 b111 Armada M700 0e11 b160 Armada E500 1002 0084 Xpert 98 AGP 2X (Mobility) - 1014 0154 ThinkPad A20m + 1014 0154 ThinkPad A20m/A21m 1028 00aa Latitude CPt + 1028 00bb Latitude CPx + 10e1 10cf Fujitsu Siemens LifeBook C Series + 1179 ff00 Satellite 1715XCDS laptop + 13bd 1019 PC-AR10 4c4e Rage Mobility L AGP 2x 4c50 3D Rage LT Pro 1002 4c50 Rage LT Pro @@ -520,9 +593,11 @@ 144d c006 Radeon Mobility M7 LW in vpr Matrix 170B4 4c58 Radeon RV200 LX [Mobility FireGL 7800 M7] 4c59 Radeon Mobility M6 LY + 0e11 b111 Evo N600c 1014 0235 ThinkPad A30/A30p (2652/2653) 1014 0239 ThinkPad X22/X23/X24 104d 80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP + 1509 1930 Medion MD9703 4c5a Radeon Mobility M6 LZ 4c64 Radeon R250 Ld [Radeon Mobility 9000 M9] 4c65 Radeon R250 Le [Radeon Mobility 9000 M9] @@ -533,22 +608,21 @@ 4d46 Rage Mobility M4 AGP 4d4c Rage Mobility M4 AGP 4e44 Radeon R300 ND [Radeon 9700 Pro] + 1002 515e Radeon ES1000 + 1002 5965 Radeon ES1000 4e45 Radeon R300 NE [Radeon 9500 Pro] 1002 0002 Radeon R300 NE [Radeon 9500 Pro] 1681 0002 Hercules 3D Prophet 9500 PRO [Radeon 9500 Pro] -# New PCI ID provided by ATI developer relations (correction to above) 4e46 RV350 NF [Radeon 9600] 4e47 Radeon R300 NG [FireGL X1] -# (added pro) 4e48 Radeon R350 [Radeon 9800 Pro] -# New PCI ID provided by ATI developer relations 4e49 Radeon R350 [Radeon 9800] 4e4a RV350 NJ [Radeon 9800 XT] 4e4b R350 NK [Fire GL X2] -# New PCI ID provided by ATI developer relations 4e50 RV350 [Mobility Radeon 9600 M10] 1025 005a TravelMate 290 - 103c 0890 NC6000 laptop + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop 1734 1055 Amilo M1420W 4e51 M10 NQ [Radeon Mobility 9600] 4e52 RV350 [Mobility Radeon 9600 M10] @@ -559,14 +633,13 @@ 4e65 Radeon R300 [Radeon 9500 Pro] (Secondary) 1002 0003 Radeon R300 NE [Radeon 9500 Pro] 1681 0003 Hercules 3D Prophet 9500 PRO [Radeon 9500 Pro] (Secondary) -# New PCI ID provided by ATI developer relations (correction to above) 4e66 RV350 NF [Radeon 9600] (Secondary) 4e67 Radeon R300 [FireGL X1] (Secondary) -# (added pro) 4e68 Radeon R350 [Radeon 9800 Pro] (Secondary) -# New PCI ID provided by ATI developer relations 4e69 Radeon R350 [Radeon 9800] (Secondary) 4e6a RV350 NJ [Radeon 9800 XT] (Secondary) + 1002 4e71 ATI Technologies Inc M10 NQ [Radeon Mobility 9600] + 4e71 M10 NQ [Radeon Mobility 9600] (secondary) 5041 Rage 128 PA/PRO 5042 Rage 128 PB/PRO AGP 2x 5043 Rage 128 PC/PRO AGP 4x @@ -658,6 +731,10 @@ 1002 003a Radeon 7000/Radeon VE 1002 00ba Radeon 7000/Radeon VE 1002 013a Radeon 7000/Radeon VE +# The IBM card doubles as an ATI PCI video adapter + 1014 029a Remote Supervisor Adapter II (RSA2) + 1014 02c8 IBM eServer xSeries server mainboard + 1028 019a PowerEdge SC1425 1458 4002 RV100 QY [RADEON 7000 PRO MAYA AV Series] 148c 2003 RV100 QY [Radeon 7000 Multi-Display Edition] 148c 2023 RV100 QY [Radeon 7000 Evil Master Multi-Display] @@ -665,6 +742,7 @@ 174b 7c28 Sapphire Radeon VE 7000 DDR 1787 0202 RV100 QY [Excalibur Radeon 7000] 515a Radeon RV100 QZ [Radeon 7000/VE] + 515e ES1000 5168 Radeon R200 Qh 5169 Radeon R200 Qi 516a Radeon R200 Qj @@ -718,15 +796,25 @@ 5454 Rage 128 Pro Ultra TT 5455 Rage 128 Pro Ultra TU 5460 M22 [Radeon Mobility M300] + 5462 M24 [Radeon Mobility X600] 5464 M22 [FireGL GL] 5548 R423 UH [Radeon X800 (PCIE)] 5549 R423 UI [Radeon X800PRO (PCIE)] 554a R423 UJ [Radeon X800LE (PCIE)] 554b R423 UK [Radeon X800SE (PCIE)] + 554d R430 [Radeon X800 XL] (PCIe) + 554f R430 [Radeon X800 (PCIE)] + 5550 R423 [Fire GL V7100] 5551 R423 UQ [FireGL V7200 (PCIE)] 5552 R423 UR [FireGL V5100 (PCIE)] 5554 R423 UT [FireGL V7100 (PCIE)] 556b Radeon R423 UK (PCIE) [X800 SE] (Secondary) + 556d R430 [Radeon X800 XL] (PCIe) Secondary + 556f R430 [Radeon X800 (PCIE) Secondary] + 564a M26 [Mobility FireGL V5000] + 564b M26 [Mobility FireGL V5000] + 5652 M26 [Radeon Mobility X700] + 5653 Radeon Mobility X700 (PCIE) 5654 264VT [Mach64 VT] 1002 5654 Mach64VT Reference 5655 264VT3 [Mach64 VT3] @@ -738,19 +826,28 @@ 5834 Radeon 9100 IGP 5835 RS300M AGP [Radeon Mobility 9100IGP] 5838 Radeon 9100 IGP AGP Bridge + 5940 RV280 [Radeon 9200 PRO] (Secondary) 5941 RV280 [Radeon 9200] (Secondary) + 1458 4019 Gigabyte Radeon 9200 174b 7c12 Sapphire Radeon 9200 -# http://www.hightech.com.hk/html/9200.htm 17af 200d Excalibur Radeon 9200 18bc 0050 GeXcube GC-R9200-C3 (Secondary) 5944 RV280 [Radeon 9200 SE (PCI)] + 5950 RS480 Host Bridge + 103c 308b nx6125 + 5951 ATI Radeon Xpress 200 (RS480/RS482/RX480/RX482) Chipset - Host bridge + 5954 RS480 [Radeon Xpress 200G Series] + 1002 5954 RV370 [Radeon Xpress 200G Series] + 5955 ATI Radeon XPRESS 200M 5955 (PCIE) + 1002 5955 RS480 0x5955 [ATI Radeon XPRESS 200M 5955 (PCIE)] + 103c 308b nx6125 5960 RV280 [Radeon 9200 PRO] 5961 RV280 [Radeon 9200] 1002 2f72 All-in-Wonder 9200 Series + 1019 4c30 Radeon 9200 VIVO 12ab 5961 YUAN SMARTVGA Radeon 9200 1458 4018 Gigabyte Radeon 9200 174b 7c13 Sapphire Radeon 9200 -# http://www.hightech.com.hk/html/9200.htm 17af 200c Excalibur Radeon 9200 18bc 0050 Radeon 9200 Game Buster 18bc 0051 GeXcube GC-R9200-C3 @@ -759,20 +856,39 @@ 5964 RV280 [Radeon 9200 SE] 1043 c006 ASUS Radeon 9200 SE / TD / 128M 1458 4018 Radeon 9200 SE + 147b 6191 R9200SE-DT 148c 2073 CN-AG92E 174b 7c13 Sapphire Radeon 9200 SE 1787 5964 Excalibur 9200SE VIVO 128M 17af 2012 Radeon 9200 SE Excalibur 18bc 0170 Sapphire Radeon 9200 SE 128MB Game Buster -# 128MB DDR, DVI/VGA/TV out 18bc 0173 GC-R9200L(SE)-C3H [Radeon 9200 Game Buster] + 5969 ES1000 + 5974 RS482 [Radeon Xpress 200] + 5975 RS482 [Radeon Xpress 200M] + 5a34 RS480 PCI-X Root Port + 5a38 RS480 PCI Bridge + 5a3f RS480 PCI Bridge + 5a41 RS400 [Radeon Xpress 200] + 5a42 RS400 [Radeon Xpress 200M] + 5a61 RC410 [Radeon Xpress 200] + 5a62 RC410 [Radeon Xpress 200M] 5b60 RV370 5B60 [Radeon X300 (PCIE)] - 1043 002a EAX300SE + 1043 002a Extreme AX300SE-X + 1043 032e Extreme AX300/TD + 1462 0402 RX300SE-TD128E (MS-8940) 5b62 RV370 5B62 [Radeon X600 (PCIE)] + 5b63 RV370 [ATI Sapphire X550 Silent] 5b64 RV370 5B64 [FireGL V3100 (PCIE)] 5b65 RV370 5B65 [FireGL D1100 (PCIE)] + 5b70 RV370 [Radeon X300SE] + 1462 0403 RX300SE-TD128E (MS-8940) (secondary display) + 5b72 Radeon X600(RV380) + 5b73 RV370 secondary [ATI Sapphire X550 Silent] + 5b74 RV370 5B64 [FireGL V3100 (PCIE)] (Secondary) 5c61 M9+ 5C61 [Radeon Mobility 9200 (AGP)] 5c63 M9+ 5C63 [Radeon Mobility 9200 (AGP)] + 1002 5c63 Apple iBook G4 2004 5d44 RV280 [Radeon 9200 SE] (Secondary) 1458 4019 Radeon 9200 SE (Secondary) 174b 7c12 Sapphire Radeon 9200 SE (Secondary) @@ -780,14 +896,61 @@ 17af 2013 Radeon 9200 SE Excalibur (Secondary) 18bc 0171 Radeon 9200 SE 128MB Game Buster (Secondary) 18bc 0172 GC-R9200L(SE)-C3H [Radeon 9200 Game Buster] + 5d48 M28 [Radeon Mobility X800XT] + 5d49 M28 [Mobility FireGL V5100] + 5d4a Mobility Radeon X800 + 5d4d R480 [Radeon X850XT Platinum (PCIE)] + 5d4f R480 [Radeon X800 GTO (PCIE)] + 5d52 R480 [Radeon X850XT (PCIE)] (Primary) + 1002 0b12 PowerColor X850XT PCIe Primary + 1002 0b13 PowerColor X850XT PCIe Secondary 5d57 R423 5F57 [Radeon X800XT (PCIE)] + 5d6d R480 [Radeon X850XT Platinum (PCIE)] (Secondary) + 5d6f R480 [Radeon X800 GTO (PCIE)] (Secondary) + 5d72 R480 [Radeon X850XT (PCIE)] (Secondary) + 5d77 R423 5F57 [Radeon X800XT (PCIE)] (Secondary) + 5e48 RV410 [FireGL V5000] + 5e49 RV410 [FireGL V3300] + 5e4a RV410 [Radeon X700XT] + 5e4b RV410 [Radeon X700 Pro (PCIE)] + 5e4c RV410 [Radeon X700SE] + 5e4d RV410 [Radeon X700 (PCIE)] + 148c 2116 PowerColor Bravo X700 + 5e4f RV410 [Radeon X700] + 5e6b RV410 [Radeon X700 Pro (PCIE)] Secondary + 5e6d RV410 [Radeon X700 (PCIE)] (Secondary) + 148c 2117 PowerColor Bravo X700 700f PCI Bridge [IGP 320M] 7010 PCI Bridge [IGP 340M] + 7100 R520 [Radeon X1800] + 7105 R520 [FireGL] + 7109 R520 [Radeon X1800] + 1002 0322 All-in-Wonder X1800XL + 1002 0d02 Radeon X1800 CrossFire Edition + 7120 R520 [Radeon X1800] (Secondary) + 7129 R520 [Radeon X1800] (Secondary) + 1002 0323 All-in-Wonder X1800XL (Secondary) + 1002 0d03 Radeon X1800 CrossFire Edition (Secondary) + 7142 RV515 [Radeon X1300] + 1002 0322 All-in-Wonder 2006 PCI-E Edition + 7146 RV515 [Radeon X1300] + 1002 0322 All-in-Wonder 2006 PCI-E Edition + 7162 RV515 [Radeon X1300] (Secondary) + 1002 0323 All-in-Wonder 2006 PCI-E Edition (Secondary) + 7166 RV515 [Radeon X1300] (Secondary) + 1002 0323 All-in-Wonder 2006 PCI-E Edition (Secondary) + 71c0 RV530 [Radeon X1600] + 71c2 RV530 [Radeon X1600] + 71e0 RV530 [Radeon X1600] (Secondary) + 71e2 RV530 [Radeon X1600] (Secondary) + 7833 Radeon 9100 IGP Host Bridge 7834 Radeon 9100 PRO IGP 7835 Radeon Mobility 9200 IGP + 7838 Radeon 9100 IGP PCI/AGP Bridge 7c37 RV350 AQ [Radeon 9600 SE] cab0 AGP Bridge [IGP 320M] cab2 RS200/RS200M AGP Bridge [IGP 340M] + cab3 R200 AGP Bridge [Mobility Radeon 7000 IGP] cbb2 RS200/RS200M AGP Bridge [IGP 340M] 1003 ULSI Systems 0201 US201 @@ -843,14 +1006,17 @@ 0012 USB Controller 0020 DP83815 (MacPhyter) Ethernet Controller 103c 0024 Pavilion ze4400 builtin Network + 12d9 000c Aculab E1/T1 PMXc cPCI carrier card 1385 f311 FA311 / FA312 (FA311 with WoL HW) + 0021 PC87200 PCI to ISA Bridge 0022 DP83820 10/100/1000 Ethernet Controller - 0028 CS5535 Host bridge + 0028 Geode GX2 Host Bridge + 002a CS5535 South Bridge 002b CS5535 ISA bridge 002d CS5535 IDE 002e CS5535 Audio 002f CS5535 USB - 0030 CS5535 Video + 0030 Geode GX2 Graphics Processor 0035 DP83065 [Saturn] 10/100/1000 Ethernet Controller 0500 SCx200 Bridge 0501 SCx200 SMI @@ -997,11 +1163,13 @@ 1200 GD 7542 [Nordic] 1202 GD 7543 [Viking] 1204 GD 7541 [Nordic Light] + 4000 MD 5620 [CLM Data Fax Voice] 4400 CD 4400 6001 CS 4610/11 [CrystalClear SoundFusion Audio Accelerator] 1014 1010 CS4610 SoundFusion Audio Accelerator 6003 CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator] 1013 4280 Crystal SoundFusion PCI Audio Accelerator + 153b 1136 SiXPack 5.1+ 1681 0050 Game Theater XP 1681 a011 Fortissimo III 7.1 6004 CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator] @@ -1121,8 +1289,19 @@ 0266 PCI-X Dual Channel SCSI 0268 Gigabit Ethernet-SX Adapter (PCI-X) 0269 10/100/1000 Base-TX Ethernet Adapter (PCI-X) + 028c Citrine chipset SCSI controller + 1014 028d Dual Channel PCI-X DDR SAS RAID Adapter (572E) + 1014 02be Dual Channel PCI-X DDR U320 SCSI RAID Adapter (571B) + 1014 02c0 Dual Channel PCI-X DDR U320 SCSI Adapter (571A) + 1014 030d PCI-X DDR Auxiliary Cache Adapter (575B) + 02a1 Calgary PCI-X Host Bridge + 02bd Obsidian chipset SCSI controller + 1014 02c1 PCI-X DDR 3Gb SAS Adapter (572A/572C) + 1014 02c2 PCI-X DDR 3Gb SAS RAID Adapter (572B/571D) 0302 Winnipeg PCI-X Host Bridge 0314 ZISC 036 Neural accelerator card + 3022 QLA3022 Network Adapter + 4022 QLA3022 Network Adapter ffff MPIC-2 interrupt controller 1015 LSI Logic Corp of Canada 1016 ICL Personal Systems @@ -1146,6 +1325,7 @@ 9712 Pipeline 9712 c24a 90C 101e American Megatrends Inc. + 0009 MegaRAID 428 Ultra RAID Controller (rev 03) 1960 MegaRAID 101e 0471 MegaRAID 471 Enterprise 1600 RAID Controller 101e 0475 MegaRAID 475 Express 500/500LC RAID Controller @@ -1159,6 +1339,7 @@ 1028 0475 PowerEdge RAID Controller 3/SC 1028 0493 PowerEdge RAID Controller 3/DC 1028 0511 PowerEdge Cost Effective RAID Controller ATA100/4Ch + 103c 60e7 NetRAID-1M 9010 MegaRAID 428 Ultra RAID Controller 9030 EIDE Controller 9031 EIDE Controller @@ -1190,6 +1371,8 @@ 1259 2454 AT-2450v4 10Mb Ethernet Adapter 1259 2700 AT-2700TX 10/100 Fast Ethernet 1259 2701 AT-2700FX 100Mb Ethernet + 1259 2702 AT-2700FTX 10/100 Mb Fiber/Copper Fast Ethernet + 1259 2703 AT-2701FX 4c53 1000 CC7/CR7/CP7/VC7/VP7/VR7 mainboard 4c53 1010 CP5/CR6 mainboard 4c53 1020 VR6 mainboard @@ -1202,6 +1385,17 @@ 2003 Am 1771 MBW [Alchemy] 2020 53c974 [PCscsi] 2040 79c974 + 2081 Geode LX Video + 2082 Geode LX AES Security Block + 208f CS5536 GeodeLink PCI South Bridge + 2090 CS5536 [Geode companion] ISA + 2091 CS5536 [Geode companion] FLASH + 2093 CS5536 [Geode companion] Audio + 2094 CS5536 [Geode companion] OHC + 2095 CS5536 [Geode companion] EHC + 2096 CS5536 [Geode companion] UDC + 2097 CS5536 [Geode companion] UOC + 209a CS5536 [Geode companion] IDE 3000 ELanSC520 Microcontroller 7006 AMD-751 [Irongate] System Controller 7007 AMD-751 [Irongate] AGP Bridge @@ -1233,9 +1427,11 @@ 7448 AMD-768 [Opus] PCI 7449 AMD-768 [Opus] USB 7450 AMD-8131 PCI-X Bridge - 7451 AMD-8131 PCI-X APIC + 7451 AMD-8131 PCI-X IOAPIC 7454 AMD-8151 System Controller 7455 AMD-8151 AGP Bridge + 7458 AMD-8132 PCI-X Bridge + 7459 AMD-8132 PCI-X IOAPIC 7460 AMD-8111 PCI 161f 3017 HDAMB 7461 AMD-8111 USB @@ -1245,6 +1441,7 @@ 7468 AMD-8111 LPC 161f 3017 HDAMB 7469 AMD-8111 IDE + 1022 2b80 AMD-8111 IDE [Quartet] 161f 3017 HDAMB 746a AMD-8111 SMBus 2.0 746b AMD-8111 ACPI @@ -1259,6 +1456,7 @@ 2001 4DWave NX 122d 1400 Trident PCI288-Q3DII (NX) 2100 CyberBlade XP4m32 + 2200 XGI Volari XP5 8400 CyberBlade/i7 1023 8400 CyberBlade i7 AGP 8420 CyberBlade/i7d @@ -1269,6 +1467,7 @@ 1023 8520 CyberBlade i1 AGP 8620 CyberBlade/i1 1014 0502 ThinkPad R30/T30 + 1014 1025 Travelmate 352TE 8820 CyberBlade XPAi1 9320 TGUI 9320 9350 GUI Accelerator @@ -1392,6 +1591,7 @@ 1028 016f PowerEdge Expandable RAID Controller 4e/Di 1028 0170 PowerEdge Expandable RAID Controller 4e/Di 0014 Remote Access Card 4 Daughter Card SMIC interface + 0015 PowerEdge Expandable RAID controller 5 1029 Siemens Nixdorf IS 102a LSI Logic 0000 HYDRA @@ -1466,7 +1666,7 @@ 102b ff03 Millennium G200 AGP 102b ff04 Marvel G200 AGP 110a 0032 MGA-G200 AGP - 0525 MGA G400 AGP + 0525 G400/G450 0e11 b16f MGA-G400 AGP 102b 0328 Millennium G400 16Mb SDRAM 102b 0338 Millennium G400 16Mb SDRAM @@ -1514,6 +1714,12 @@ 1705 0004 Millennium G450 16MB 0527 MGA Parhelia AGP 102b 0840 Parhelia 128Mb + 102b 0850 Parhelia 256MB AGP 4X + 0528 Parhelia 8X + 102b 1020 Parhelia 128MB + 102b 1030 Parhelia 256 MB Dual DVI + 102b 14e1 Parhelia PCI 256MB + 102b 2021 QID Pro 0d10 MGA Ultima/Impression 1000 MGA G100 [Productiva] 102b ff01 Productiva G100 @@ -1531,7 +1737,19 @@ 102b 0f83 Millennium G550 102b 0f84 Millennium G550 Dual Head DDR 32Mb 102b 1e41 Millennium G550 - 2537 MGA G650 AGP + 2537 Millenium P650/P750 + 102b 1820 Millennium P750 64MB + 102b 1830 Millennium P650 64MB + 102b 1c10 QID 128MB + 102b 2811 Millennium P650 Low-profile PCI 64MB + 102b 2c11 QID Low-profile PCI + 2538 Millenium P650 PCIe + 102b 08c7 Millennium P650 PCIe 128MB + 102b 0907 Millennium P650 PCIe 64MB + 102b 1047 Millennium P650 LP PCIe 128MB + 102b 1087 Millennium P650 LP PCIe 64MB + 102b 2538 Parhelia APVe + 102b 3007 QID Low-profile PCIe 4536 VIA Framegrabber 6573 Shark 10/100 Multiport SwitchNIC 102c Chips and Technologies @@ -1551,6 +1769,7 @@ 00e4 F65554 00e5 F65555 HiQVPro 0e11 b049 Armada 1700 Laptop Display Controller + 1179 0001 Satellite Pro 00f0 F68554 00f4 F68554 HiQVision 00f5 F68555 @@ -1558,7 +1777,6 @@ 4c53 1000 CC7/CR7/CP7/VC7/VP7/VR7 mainboard 4c53 1050 CT7 mainboard 4c53 1051 CE7 mainboard -# C5C project cancelled 4c53 1080 CT8 mainboard 102d Wyse Technology Inc. 50dc 3328 Audio @@ -1603,9 +1821,13 @@ 002c Star Alpha 2 002d PCI to C-bus Bridge 0035 USB + 1033 0035 Hama USB 2.0 CardBus 1179 0001 USB 12ee 7000 Root Hub + 14c2 0105 PTI-205N USB 2.0 Host Controller 1799 0001 Root Hub + 1931 000a GlobeTrotter Fusion Quad Lite (PPP data) + 1931 000b GlobeTrotter Fusion Quad Lite (GSM data) 807d 0035 PCI-USB2 (OHCI subsystem) 003b PCI to C-bus Bridge 003e NAPCCARD Cardbus Controller @@ -1621,6 +1843,7 @@ 1010 00a0 PowerVR Neon 250 AGP 32Mb 1010 00a8 PowerVR Neon 250 32Mb 1010 0120 PowerVR Neon 250 AGP 32Mb + 0072 uPD72874 IEEE1394 OHCI 1.1 3-port PHY-Link Ctrlr 0074 56k Voice Modem 1033 8014 RCV56ACF 56k Voice Modem 009b Vrc5476 @@ -1631,8 +1854,8 @@ 00ce IEEE 1394 Host Controller 00df Vr4131 00e0 USB 2.0 - 0ee4 3383 Sitecom IEEE 1394 / USB2.0 Combo Card 12ee 7001 Root hub + 14c2 0205 PTI-205N USB 2.0 Host Controller 1799 0002 Root Hub 807d 1043 PCI-USB2 (EHCI subsystem) 00e7 IEEE 1394 Host Controller @@ -1648,15 +1871,19 @@ 1039 Silicon Integrated Systems [SiS] 0001 Virtual PCI-to-PCI bridge (AGP) 0002 SG86C202 + 0003 SiS AGP Port (virtual PCI-to-PCI bridge) + 0004 PCI-to-PCI bridge 0006 85C501/2/3 0008 SiS85C503/5513 (LPC Bridge) 0009 ACPI -# source: http://members.datafast.net.au/dft0802/downloads/pcidevs.txt + 000a PCI-to-PCI bridge 0016 SiS961/2 SMBus Controller 0018 SiS85C503/5513 (LPC Bridge) -# Controller for 2 PATA and 2 SATA channels 0180 RAID bus controller 180 SATA/PATA [SiS] - 0181 SiS SATA + 0181 SATA + 0182 182 SATA/RAID Controller + 0190 190 Gigabit Ethernet Adapter + 0191 191 Gigabit Ethernet Adapter 0200 5597/5598/6326 VGA 1039 0000 SiS5597 SVGA (Shared RAM) 0204 82C204 @@ -1680,7 +1907,7 @@ 0635 635 Host 0645 SiS645 Host & Memory & AGP Controller 0646 SiS645DX Host & Memory & AGP Controller - 0648 SiS 645xx + 0648 645xx 0650 650/M650 Host 0651 651 Host 0655 655 Host @@ -1695,6 +1922,7 @@ 0746 746 Host 0755 755 Host 0760 760/M760 Host + 0761 761/M761 Host 0900 SiS900 PCI Fast Ethernet 1019 0a14 K7S5A motherboard 1039 0900 SiS900 10/100 Ethernet Adapter @@ -1738,15 +1966,17 @@ 1092 4910 SpeedStar A70 1092 4920 SpeedStar A70 1569 6326 SiS6326 GUI Accelerator - 6330 661/741/760 PCI/AGP VGA Display Adapter + 6330 661/741/760/761 PCI/AGP VGA Display Adapter 1039 6330 [M]661xX/[M]741[GX]/[M]760 PCI/AGP VGA Adapter 7001 USB 1.0 Controller 1019 0a14 K7S5A motherboard 1039 7000 Onboard USB Controller + 1462 5470 K7SOM+ 5.2C Motherboard 7002 USB 2.0 Controller 1509 7002 Onboard USB Controller 7007 FireWire Controller - 7012 Sound Controller + 7012 AC'97 Sound Controller + 15bd 1001 DFI 661FX motherboard # There are may be different modem codecs here (Intel537 compatible and incompatible) 7013 AC'97 Modem Controller 7016 SiS7016 PCI Fast Ethernet Adapter @@ -1807,13 +2037,14 @@ 103c 1226 Keystone SP2 103c 1227 Powerbar SP2 103c 1282 Everest SP2 + 103c 1301 Diva RMP3 1054 PCI Local Bus Adapter 1064 79C970 PCnet Ethernet Controller 108b Visualize FXe 10c1 NetServer Smart IRQ Router 10ed TopTools Remote Control - 10f0 reo System Bus Adapter - 10f1 reo I/O Controller + 10f0 rio System Bus Adapter + 10f1 rio I/O Controller 1200 82557B 10/100 NIC 1219 NetServer PCI Hot-Plug Controller 121a NetServer SMIC Controller @@ -1824,9 +2055,14 @@ 122e zx1 Local Bus Adapter 127c sx1000 I/O Controller 1290 Auxiliary Diva Serial Port + 1291 Auxiliary Diva Serial Port 12b4 zx1 QuickSilver AGP8x Local Bus Adapter + 12fa BCM4306 802.11b/g Wireless LAN Controller 2910 E2910A PCIBus Exerciser 2925 E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer + 3080 Pavilion ze2028ea + 3220 Hewlett-Packard Smart Array P600 + 3230 Hewlett-Packard Smart Array Controller 103e Solliday Engineering 103f Synopsys/Logic Modeling Group 1040 Accelgraphics Inc. @@ -1839,12 +2075,19 @@ 3020 Samurai_IDE 1043 ASUSTeK Computer Inc. 0675 ISDNLink P-IN100-ST-D + 0675 1704 ISDN Adapter (PCI Bus, D, C) + 0675 1707 ISDN Adapter (PCI Bus, DV, W) + 10cf 105e ISDN Adapter (PCI Bus, DV, W) 4015 v7100 SDRAM [GeForce2 MX] 4021 v7100 Combo Deluxe [GeForce2 MX + TV tuner] 4057 v8200 GeForce 3 8043 v8240 PAL 128M [P4T] Motherboard 807b v9280/TD [Geforce4 TI4200 8X With TV-Out and DVI] 80bb v9180 Magic/T [GeForce4 MX440 AGP 8x 64MB TV-out] + 80c5 nForce3 chipset motherboard [SK8N] + 80df v9520 Magic/T + 8187 802.11a/b/g Wireless LAN Card + 8188 Tiger Hybrid TV Capture Device 1044 Adaptec (formerly DPT) 1012 Domino RAID Engine a400 SmartCache/Raid I-IV Controller @@ -1883,10 +2126,11 @@ 1044 c05a 2400A UDMA Four Channel 1044 c05b 2400A UDMA Four Channel DAC 1044 c064 3010S Ultra3 Dual Channel - 1044 c065 3010S Ultra3 Four Channel + 1044 c065 3410S Ultra160 Four Channel 1044 c066 3010S Fibre Channel a511 SmartRAID V Controller 1044 c032 ASR-2005S I2O Zero Channel + 1044 c035 ASR-2010S I2O Zero Channel 1045 OPTi Inc. a0f8 82C750 [Vendetta] USB Controller c101 92C264 @@ -1918,6 +2162,7 @@ 1000 QuickStep 1000 3000 QuickStep 3000 8901 Gloria XL + 1048 0935 GLoria XL (Virge) 1049 Fountain Technologies, Inc. # # nee SGS Thomson Microelectronics 104a STMicroelectronics @@ -1926,7 +2171,6 @@ 0010 STG4000 [3D Prophet Kyro Series] 0209 STPC Consumer/Industrial North- and Southbridge 020a STPC Atlas/ConsumerS/Consumer IIA Northbridge -# From 0210 STPC Atlas ISA Bridge 021a STPC Consumer S Southbridge 021b STPC Consumer IIA Southbridge @@ -1953,7 +2197,11 @@ 1040 0011 AccelStar II 1048 0a31 WINNER 2000 1048 0a32 GLoria Synergy + 1048 0a34 GLoria Synergy 1048 0a35 GLoria Synergy + 1048 0a36 GLoria Synergy + 1048 0a43 GLoria Synergy + 1048 0a44 GLoria Synergy 107d 2633 WinFast 3D L2300 1092 0127 FIRE GL 1000 PRO 1092 0136 FIRE GL 1000 PRO @@ -1980,36 +2228,70 @@ 11bd 000e Studio DV e4bf 1010 CF2-1-CYMBAL 8020 TSB12LV26 IEEE-1394 Controller (Link) + 11bd 000f Studio DV500-1394 8021 TSB43AA22 IEEE-1394 Controller (PHY/Link Integrated) 104d 80df Vaio PCG-FX403 104d 80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 8022 TSB43AB22 IEEE-1394a-2000 Controller (PHY/Link) 8023 TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) + 103c 088c nc8000 laptop + 1043 808b K8N4-E Mainboard 8024 TSB43AB23 IEEE-1394a-2000 Controller (PHY/Link) 8025 TSB82AA2 IEEE-1394b Link Layer Controller - 55aa 55aa FireWire 800 PCI Card + 1458 1000 GA-K8N Ultra-9 Mainboard 8026 TSB43AB21 IEEE-1394a-2000 Controller (PHY/Link) + 103c 006a nx9500 + 1043 808d A7V333 mainboard. 8027 PCI4451 IEEE-1394 Controller 1028 00e6 PCI4451 IEEE-1394 Controller (Dell Inspiron 8100) 8029 PCI4510 IEEE-1394 Controller 1028 0163 Latitude D505 + 1028 0196 Inspiron 5160 1071 8160 MIM2900 + 802b PCI7410,7510,7610 OHCI-Lynx Controller + 1028 0139 Latitude D400 + 1028 014e PCI7410,7510,7610 OHCI-Lynx Controller (Dell Latitude D800) 802e PCI7x20 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller + 8031 PCIxx21/x515 Cardbus Controller + 103c 099c nx6110/nc6120 + 103c 308b nx6125 + 8032 OHCI Compliant IEEE 1394 Host Controller + 103c 099c nx6110/nc6120 + 103c 308b nx6125 + 8033 PCIxx21 Integrated FlashMedia Controller + 103c 099c nx6110/nc6120 +# Turion Notebook nx6125 + 103c 308b nx6125 + 8034 PCI6411, PCI6421, PCI6611, PCI6621, PCI7411, PCI7421, PCI7611, PCI7621 Secure Digital (SD) Controller + 103c 099c nx6110/nc6120 + 103c 308b nx6125 + 8035 PCI6411, PCI6421, PCI6611, PCI6621, PCI7411, PCI7421, PCI7611, PCI7621 Smart Card Controller (SMC) + 103c 099c nx6110/nc6120 + 8036 PCI6515 Cardbus Controller + 8038 PCI6515 SmartCard Controller 8201 PCI1620 Firmware Loading Function + 8204 PCI7410,7510,7610 PCI Firmware Loading Function + 1028 0139 Latitude D400 + 1028 014e Latitude D800 8400 ACX 100 22Mbps Wireless Interface - 00fc 16ec U.S. Robotics 22 Mbps Wireless PC Card (model 2210) - 00fd 16ec U.S. Robotics 22Mbps Wireless PCI Adapter (model 2216) 1186 3b00 DWL-650+ PC Card cardbus 22Mbs Wireless Adapter [AirPlus] 1186 3b01 DWL-520+ 22Mbps PCI Wireless Adapter + 16ab 8501 WL-8305 IEEE802.11b+ Wireless LAN PCI Adapter 8401 ACX 100 22Mbps Wireless Interface -# OK, this info is almost useless as is, but at least it's known that it's a wireless card. More info requested from reporter (whi +# OK, this info is almost useless as is, but at least it's known that it's a wireless card. More info requested from reporter. 9000 Wireless Interface (of unknown type) + 9065 TMS320DM642 9066 ACX 111 54Mbps Wireless Interface + 104c 9066 DWL-G520+ Wireless PCI Adapter + 1186 3b04 DWL-G520+ Wireless PCI Adapter + 1186 3b05 DWL-G650+ AirPlusG+ CardBus Wireless LAN + 13d1 aba0 SWLMP-54108 108Mbps Wireless mini PCI card 802.11g+ a001 TDC1570 a100 TDC1561 a102 TNETA1575 HyperSAR Plus w/PCI Host i/f & UTOPIA i/f - a106 TMS320C6205 Fixed Point DSP + a106 TMS320C6414 TMS320C6415 TMS320C6416 175c 5000 ASI50xx Audio Adapter + 175c 6400 ASI6400 Cobranet series 175c 8700 ASI87xx Radio Tuner card ac10 PCI1050 ac11 PCI1053 @@ -2024,9 +2306,10 @@ ac1a PCI1210 ac1b PCI1450 0e11 b113 Armada M700 + 1014 0130 Thinkpad T20/T22/A21m ac1c PCI1225 0e11 b121 Armada E500 - 1028 0088 Dell Computer Corporation Latitude CPi A400XT + 1028 0088 Latitude CPi A400XT ac1d PCI1251A ac1e PCI1211 ac1f PCI1251B @@ -2042,15 +2325,24 @@ 1028 00e6 PCI4451 PC card CardBus Controller (Dell Inspiron 8100) ac44 PCI4510 PC card Cardbus Controller 1028 0163 Latitude D505 + 1028 0196 Inspiron 5160 1071 8160 MIM2000 ac46 PCI4520 PC card Cardbus Controller + ac47 PCI7510 PC card Cardbus Controller + 1028 0139 Latitude D400 + 1028 014e Latitude D800 + ac4a PCI7510,7610 PC card Cardbus Controller + 1028 0139 Latitude D400 + 1028 014e Latitude D800 ac50 PCI1410 PC card Cardbus Controller ac51 PCI1420 + 0e11 004e Evo N600c 1014 023b ThinkPad T23 (2647-4MG) 1028 00b1 Latitude C600 1028 012a Latitude C640 1033 80cd Versa Note VXi - 10cf 1095 Lifebook C6155 + 1095 10cf Fujitsu-Siemens LifeBook C Series + 10cf 1095 Lifebook S-4510/C6155 e4bf 1000 CP2-2-HIPHOP ac52 PCI1451 PC card Cardbus Controller ac53 PCI1421 PC card Cardbus Controller @@ -2063,12 +2355,14 @@ 175c 5100 ASI51xx Audio Adapter 175c 6100 ASI61xx Audio Adapter 175c 6200 ASI62xx Audio Adapter + 175c 8800 ASI88xx Audio Adapter ac8d PCI 7620 ac8e PCI7420 CardBus Controller ac8f PCI7420/PCI7620 Dual Socket CardBus and Smart Card Cont. w/ 1394a-2000 OHCI Two-Port PHY/Link-Layer Cont. and SD/MS-Pro Sockets fe00 FireWire Host Controller fe03 12C01A FireWire Host Controller 104d Sony Corporation + 8004 DTL-H2500 [Playstation development board] 8009 CXD1947Q i.LINK Controller 8039 CXD3222 i.LINK Controller 8056 Rockwell HCF 56K modem @@ -2091,6 +2385,12 @@ 0940 W89C940 5a5a W89C940F 6692 W6692 + 1043 1702 ISDN Adapter (PCI Bus, D, W) + 1043 1703 ISDN Adapter (PCI Bus, DV, W) + 1043 1707 ISDN Adapter (PCI Bus, DV, W) + 144f 1702 ISDN Adapter (PCI Bus, D, W) + 144f 1703 ISDN Adapter (PCI Bus, DV, W) + 144f 1707 ISDN Adapter (PCI Bus, DV, W) 9921 W99200F MPEG-1 Video Encoder 9922 W99200F/W9922PF MPEG-1/2 Video Encoder 9970 W9970CF @@ -2129,9 +2429,32 @@ 175c 4200 ASI4215 Audio Adapter 175c 4300 ASI43xx Audio Adapter 175c 4400 ASI4401 Audio Adapter - ecc0 0030 Layla - 18c0 MPC8265A/MPC8266 + ecc0 0010 Darla + ecc0 0020 Gina + ecc0 0030 Layla rev.0 + ecc0 0031 Layla rev.1 + ecc0 0040 Darla24 rev.0 + ecc0 0041 Darla24 rev.1 + ecc0 0050 Gina24 rev.0 + ecc0 0051 Gina24 rev.1 + ecc0 0070 Mona rev.0 + ecc0 0071 Mona rev.1 + ecc0 0072 Mona rev.2 + 18c0 MPC8265A/8266/8272 18c1 MPC8271/MPC8272 + 3410 DSP56361 Digital Signal Processor + ecc0 0050 Gina24 rev.0 + ecc0 0051 Gina24 rev.1 + ecc0 0060 Layla24 + ecc0 0070 Mona rev.0 + ecc0 0071 Mona rev.1 + ecc0 0072 Mona rev.2 + ecc0 0080 Mia rev.0 + ecc0 0081 Mia rev.1 + ecc0 0090 Indigo + ecc0 00a0 Indigo IO + ecc0 00b0 Indigo DJ + ecc0 0100 3G 4801 Raven 4802 Falcon 4803 Hawk @@ -2155,13 +2478,15 @@ 14c8 0302 SM56 PCI Fax Modem 1668 0300 SM56 PCI Speakerphone Modem 1668 0302 SM56 PCI Fax Modem + 5608 Wildcard X100P 5803 MPC5200 + 5806 MCF54 Coldfire + 5808 MPC8220 6400 MPC190 Security Processor (S1 family, encryption) 6405 MPC184 Security Processor (S1 family) 1058 Electronics & Telecommunications RSH 1059 Teknor Industrial Computers Inc 105a Promise Technology, Inc. -# more correct description from promise linux sources 0d30 PDC20265 (FastTrak100 Lite/Ultra100) 105a 4d33 Ultra100 0d38 20263 @@ -2172,13 +2497,21 @@ 8086 3427 S875WP1-E mainboard 3371 PDC20371 (FastTrak S150 TX2plus) 3373 PDC20378 (FastTrak 378/SATA 378) - 1043 80f5 PC-DL Deluxe motherboard + 1043 80f5 K8V Deluxe/PC-DL Deluxe motherboard 1462 702e K8T NEO FIS2R motherboard 3375 PDC20375 (SATA150 TX2plus) 3376 PDC20376 (FastTrak 376) 1043 809e A7V8X motherboard + 3515 PDC40719 + 3519 PDC40519 (FastTrak TX4200) + 3570 20771 (FastTrak TX2300) + 3571 PDC20571 (FastTrak TX2200) 3574 PDC20579 SATAII 150 IDE Controller - 3d18 PDC20518 SATAII 150 IDE Controller + 3577 PDC40779 (SATA 300 779) + 3d17 PDC20718 (SATA 300 TX4) + 3d18 PDC20518/PDC40518 (SATAII 150 TX4) + 3d73 PDC40775 (SATA 300 TX2plus) + 3d75 PDC20575 (SATAII150 TX2plus) 4d30 PDC20267 (FastTrak100/Ultra100) 105a 4d33 Ultra100 105a 4d39 FastTrak100 @@ -2193,6 +2526,7 @@ 4d69 20269 105a 4d68 Ultra133TX2 5275 PDC20276 (MBFastTrak133 Lite) + 1043 807e A7V333 motherboard. 105a 0275 SuperTrak SX6000 IDE 105a 1275 MBFastTrak133 Lite (tm) Controller (RAID mode) 1458 b001 MBUltra 133 @@ -2203,9 +2537,11 @@ 105a 6269 FastTrak TX2/TX2000 6621 PDC20621 (FastTrak S150 SX4/FastTrak SX4000 lite) 6622 PDC20621 [SATA150 SX4] 4 Channel IDE RAID Controller + 6624 PDC20621 [FastTrak SX4100] 6626 PDC20618 (Ultra 618) 6629 PDC20619 (FastTrak TX4000) 7275 PDC20277 (SBFastTrak133 Lite) + 8002 SATAII150 SX8 105b Foxconn International, Inc. 105c Wipro Infotech Limited 105d Number 9 Computer Company @@ -2295,12 +2631,25 @@ 0010 DAC960PG 0020 DAC960LA 0050 AcceleRAID 352/170/160 support Device - b166 Gemstone chipset SCSI controller + 1069 0050 AcceleRAID 352 support Device + 1069 0052 AcceleRAID 170 support Device + 1069 0054 AcceleRAID 160 support Device + b166 AcceleRAID 600/500/400/Sapphire support Device 1014 0242 iSeries 2872 DASD IOA 1014 0266 Dual Channel PCI-X U320 SCSI Adapter 1014 0278 Dual Channel PCI-X U320 SCSI RAID Adapter + 1014 02d3 Dual Channel PCI-X U320 SCSI Adapter + 1014 02d4 Dual Channel PCI-X U320 SCSI RAID Adapter + 1069 0200 AcceleRAID 400, Single Channel, PCI-X, U320, SCSI RAID + 1069 0202 AcceleRAID Sapphire, Dual Channel, PCI-X, U320, SCSI RAID + 1069 0204 AcceleRAID 500, Dual Channel, Low-Profile, PCI-X, U320, SCSI RAID + 1069 0206 AcceleRAID 600, Dual Channel, PCI-X, U320, SCSI RAID ba55 eXtremeRAID 1100 support Device ba56 eXtremeRAID 2000/3000 support Device + 1069 0030 eXtremeRAID 3000 support Device + 1069 0040 eXtremeRAID 2000 support Device + ba57 eXtremeRAID 4000/5000 support Device + 1069 0072 eXtremeRAID 5000 support Device 106a Aten Research Inc 106b Apple Computer Inc. 0001 Bandit PowerPC host bridge @@ -2308,6 +2657,7 @@ 0003 Control Video 0004 PlanB Video-In 0007 O'Hare I/O + 000c DOS on Mac 000e Hydra Mac I/O 0010 Heathrow Mac I/O 0017 Paddington Mac I/O @@ -2329,6 +2679,7 @@ 002f UniNorth 1.5 Internal PCI 0030 UniNorth/Pangea FireWire 0031 UniNorth 2 FireWire + 106b 5811 iBook G4 2004 0032 UniNorth 2 GMAC (Sun GEM) 0033 UniNorth 2 ATA/100 0034 UniNorth 2 AGP @@ -2356,6 +2707,13 @@ 0054 Shasta PCI Bridge 0055 Shasta PCI Bridge 0058 U3L AGP Bridge + 0059 U3H AGP Bridge + 0066 Intrepid2 AGP Bridge + 0067 Intrepid2 PCI Bridge + 0068 Intrepid2 PCI Bridge + 0069 Intrepid2 ATA/100 + 006a Intrepid2 Firewire + 006b Intrepid2 GMAC (Sun GEM) 1645 Tigon3 Gigabit Ethernet NIC (BCM5701) 106c Hynix Semiconductor 8801 Dual Pentium ISA/PCI Motherboard @@ -2417,6 +2775,15 @@ 1077 0002 QLA2200 2300 QLA2300 64-bit Fibre Channel Adapter 2312 QLA2312 Fibre Channel Adapter + 2322 QLA2322 Fibre Channel Adapter + 2422 QLA2422 Fibre Channel Adapter + 2432 QLA2432 Fibre Channel Adapter + 3010 QLA3010 Network Adapter + 3022 QLA3022 Network Adapter + 4010 QLA4010 iSCSI TOE Adapter + 4022 QLA4022 iSCSI TOE Adapter + 6312 QLA6312 Fibre Channel Adapter + 6322 QLA6322 Fibre Channel Adapter 1078 Cyrix Corporation 0000 5510 [Grappa] 0001 PCI Master @@ -2507,6 +2874,7 @@ 1101 RIO GEM 1102 RIO 1394 1103 RIO USB + 1648 [bge] Gigabit Ethernet 2bad GEM 5000 Simba Advanced PCI Bridge 5043 SunPCI Co-processor @@ -2518,7 +2886,7 @@ a801 Tomatillo PCI Bus Module abba Cassini 10/100/1000 108f Systemsoft -1090 Encore Computer Corporation +1090 Compro Computer Services, Inc. 1091 Intergraph Corporation 0020 3D graphics processor 0021 3D graphics processor w/Texturing @@ -2556,6 +2924,7 @@ 1170 PCI-MIO-16XE-10 1180 PCI-MIO-16E-1 1190 PCI-MIO-16E-4 + 1310 PCI-6602 1330 PCI-6031E 1350 PCI-6071E 14e0 PCI-6110 @@ -2571,6 +2940,9 @@ 2a80 PCI-6025E 2c80 PCI-6035E 2ca0 PCI-6034E +# Low-Cost Industrial Digital I/O at 60 V, Channel-to-Channel Isolated + 70a9 PCI-6528 + 70b8 PCI-6251 [M Series - High Speed Multifunction DAQ] b001 IMAQ-PCI-1408 b011 IMAQ-PXI-1408 b021 IMAQ-PCI-1424 @@ -2584,13 +2956,15 @@ c801 PCI-GPIB c831 PCI-GPIB bridge 1094 First International Computers [FIC] -1095 Silicon Image, Inc. (formerly CMD Technology Inc) +# nee CMD Technology Inc +1095 Silicon Image, Inc. 0240 Adaptec AAR-1210SA SATA HostRAID Controller 0640 PCI0640 0643 PCI0643 0646 PCI0646 0647 PCI0647 0648 PCI0648 + 1043 8025 CUBX motherboard 0649 SiI 0649 Ultra ATA/100 PCI to ATA Host Controller 0e11 005d Integrated Ultra ATA-100 Dual Channel Controller 0e11 007e Integrated Ultra ATA-100 IDE RAID Controller @@ -2604,11 +2978,13 @@ 3112 SiI 3112 [SATALink/SATARaid] Serial ATA Controller 1095 3112 SiI 3112 SATALink Controller 1095 6112 SiI 3112 SATARaid Controller + 9005 0250 SATAConnect 1205SA Host Controller 3114 SiI 3114 [SATALink/SATARaid] Serial ATA Controller 1095 3114 SiI 3114 SATALink Controller 1095 6114 SiI 3114 SATARaid Controller 3124 SiI 3124 PCI-X Serial ATA Controller 1095 3124 SiI 3124 PCI-X Serial ATA Controller + 3132 SiI 3132 Serial ATA Raid II Controller 3512 SiI 3512 [SATALink/SATARaid] Serial ATA Controller 1095 3512 SiI 3512 SATALink Controller 1095 6512 SiI 3512 SATARaid Controller @@ -2623,6 +2999,7 @@ 109c Megachips Corporation 109d Zida Technologies Ltd. 109e Brooktree Corporation + 032e Bt878 Video Capture 0350 Bt848 Video Capture 0351 Bt849A Video capture 0369 Bt878 Video Capture @@ -2643,6 +3020,7 @@ 127a 0048 Bt878/832 Mediastream Controller 144f 3000 MagicTView CPH060 - Video 1461 0002 TV98 Series (TV/No FM/Remote) + 1461 0003 AverMedia UltraTV PCI 350 1461 0004 AVerTV WDM Video Capture 1461 0761 AverTV DVB-T 14f1 0001 Bt878 Mediastream Controller NTSC @@ -2653,6 +3031,7 @@ 1851 1850 FlyVideo'98 - Video 1851 1851 FlyVideo II 1852 1852 FlyVideo'98 - Video (with FM Tuner) + 18ac d500 DViCO FusionHDTV5 Lite 270f fc00 Digitop DTT-1000 bd11 1200 PCTV pro (TV + FM stereo receiver) 036f Bt879 Video Capture @@ -2703,6 +3082,7 @@ 127a 0048 Bt878 Video Capture (Audio Section) 13e9 0070 Win/TV (Audio Section) 144f 3000 MagicTView CPH060 - Audio + 1461 0002 Avermedia PCTV98 Audio Capture 1461 0004 AVerTV WDM Audio Capture 1461 0761 AVerTV DVB-T 14f1 0001 Bt878 Video Capture (Audio Section) @@ -2710,6 +3090,7 @@ 14f1 0003 Bt878 Video Capture (Audio Section) 14f1 0048 Bt878 Video Capture (Audio Section) 1822 0001 VisionPlus DVB Card + 18ac d500 DViCO FusionHDTV5 Lite 270f fc00 Digitop DTT-1000 bd11 1200 PCTV pro (TV + FM stereo receiver, audio section) 0879 Bt879 Audio Capture @@ -2785,8 +3166,12 @@ 100a IOC4 I/O controller 2001 Fibre Channel 2002 ASDE + 4001 TIO-CE PCI Express Bridge + 4002 TIO-CE PCI Express Port 8001 O2 1394 8002 G-net NT + 8010 Broadcom e-net [SGI IO9/IO10 BaseIO] + 8018 Broadcom e-net [SGI A330 Server BaseIO] 10aa ACC Microelectronics 0000 ACCM 2188 10ab Digicom @@ -2811,17 +3196,36 @@ 10b4 237e Velocity 4400 10b5 PLX Technology, Inc. 0001 i960 PCI bus interface + 1042 Brandywine / jxi2, Inc. - PMC-SyncClock32, IRIG A & B, Nasa 36 1076 VScom 800 8 port serial adaptor 1077 VScom 400 4 port serial adaptor 1078 VScom 210 2 port serial and 1 port parallel adaptor 1103 VScom 200 2 port serial adaptor 1146 VScom 010 1 port parallel adaptor 1147 VScom 020 2 port parallel adaptor + 2540 IXXAT CAN-Interface PC-I 04/PCI 2724 Thales PCSM Security Card + 6540 PCI6540/6466 PCI-PCI bridge (transparent mode) + 4c53 10e0 PSL09 PrPMC + 6541 PCI6540/6466 PCI-PCI bridge (non-transparent mode, primary side) + 4c53 10e0 PSL09 PrPMC + 6542 PCI6540/6466 PCI-PCI bridge (non-transparent mode, secondary side) + 4c53 10e0 PSL09 PrPMC + 8111 PEX 8111 PCI Express-to-PCI Bridge + 8114 PEX 8114 PCI Express-to-PCI/PCI-X Bridge + 8516 PEX 8516 Versatile PCI Express Switch + 8532 PEX 8532 Versatile PCI Express Switch 9030 PCI <-> IOBus Bridge Hot Swap 10b5 2862 Alpermann+Velte PCL PCI LV (3V/5V): Timecode Reader Board 10b5 2906 Alpermann+Velte PCI TS (3V/5V): Time Synchronisation Board 10b5 2940 Alpermann+Velte PCL PCI D (3V/5V): Timecode Reader Board + 10b5 2977 IXXAT iPC-I XC16/PCI CAN Board + 10b5 2978 SH ARC-PCIu SOHARD ARCNET card + 10b5 3025 Alpermann+Velte PCL PCI L (3V/5V): Timecode Reader Board + 10b5 3068 Alpermann+Velte PCL PCI HD (3V/5V): Timecode Reader Board + 1397 3136 4xS0-ISDN PCI Adapter + 1397 3137 S2M-E1-ISDN PCI Adapter + 1518 0200 Kontron ThinkIO-C 15ed 1002 MCCS 8-port Serial Hot Swap 15ed 1003 MCCS 16-port Serial Hot Swap 9036 9036 @@ -2830,7 +3234,7 @@ 10b5 1172 IK220 (Heidenhain) 10b5 2036 SatPak GPS 10b5 2221 Alpermann+Velte PCL PCI LV: Timecode Reader Board - 10b5 2273 SH-ARC SoHard ARCnet card + 10b5 2273 SH ARC-PCI SOHARD ARCNET card 10b5 2431 Alpermann+Velte PCL PCI D: Timecode Reader Board 10b5 2905 Alpermann+Velte PCI TS: Time Synchronisation Board 10b5 9050 MP9050 @@ -2845,9 +3249,7 @@ 15ed 1001 Macrolink MCCS 16-port Serial 15ed 1002 Macrolink MCCS 8-port Serial Hot Swap 15ed 1003 Macrolink MCCS 16-port Serial Hot Swap -# Sorry, there was a typo 5654 2036 OpenSwitch 6 Telephony card -# Sorry, there was a typo 5654 3132 OpenSwitch 12 Telephony card 5654 5634 OpenLine4 Telephony Card d531 c002 PCIntelliCAN 2xSJA1000 CAN bus @@ -2873,10 +3275,11 @@ 10b5 2696 Innes Corp AM Radcap card 10b5 2717 Innes Corp Auricon card 10b5 2844 Innes Corp TVS Encoder card + 12c7 4001 Intel Dialogic DM/V960-4T1 PCI 12d9 0002 PCI Prosody Card rev 1.5 16df 0011 PIKA PrimeNet MM PCI 16df 0012 PIKA PrimeNet MM cPCI 8 - 16df 0013 PIKA PrimeNet MM cPCI 8 (without CAS Signaling Option) + 16df 0013 PIKA PrimeNet MM cPCI 8 (without CAS Signaling) 16df 0014 PIKA PrimeNet MM cPCI 4 16df 0015 PIKA Daytona MM 16df 0016 PIKA InLine MM @@ -2887,7 +3290,7 @@ 125c 0640 Aries 16000P 906e 9060ES 9080 9080 - 103c 10eb (Agilent) E2777B 83K Series PCI based Optical Communication Interface + 103c 10eb (Agilent) E2777B 83K Series Optical Communication Interface 103c 10ec (Agilent) E6978-66442 PCI CIC 10b5 9080 9080 [real subsystem ID not set] 129d 0002 Aculab PCI Prosidy card @@ -2930,7 +3333,7 @@ 1201 3c982-TXM 10/100baseTX Dual Port A [Hydra] 1202 3c982-TXM 10/100baseTX Dual Port B [Hydra] 1700 3c940 10/100/1000Base-T [Marvell] - 1043 80eb P4P800 Mainboard + 1043 80eb A7V600/P4P800/K8V motherboard 10b7 0010 3C940 Gigabit LOM Ethernet Adapter 10b7 0020 3C941 Gigabit LOM Ethernet Adapter 147b 1407 KV8-MAX3 motherboard @@ -3063,7 +3466,6 @@ 13a2 8006 LANEPIC Cardbus Fast Ethernet Adapter 1000 FDC 37c665 1001 FDC 37C922 -# 802.11g card 2802 SMC2802W [EZ Connect g] a011 83C170QF b106 SMC34C90 @@ -3087,13 +3489,14 @@ 1523 M1523 10b9 1523 ALI M1523 ISA Bridge 1531 M1531 [Aladdin IV] - 1533 M1533 PCI to ISA Bridge [Aladdin IV] + 1533 M1533/M1535 PCI to ISA Bridge [Aladdin IV/V/V+] 1014 053b ThinkPad R40e (2684-HVG) PCI to ISA Bridge - 10b9 1533 ALI M1533 Aladdin IV ISA Bridge + 10b9 1533 ALi M1533 Aladdin IV/V ISA Bridge 1541 M1541 10b9 1541 ALI M1541 Aladdin V/V+ AGP System Controller 1543 M1543 1563 M1563 HyperTransport South Bridge + 1573 PCI to LPC Controller 1621 M1621 1631 ALI M1631 PCI North Bridge Aladdin Pro III 1632 M1632M Northbridge+Trident @@ -3107,6 +3510,8 @@ 1681 M1681 P4 Northbridge [AGP8X,HyperTransport and SDR/DDR] 1687 M1687 K8 Northbridge [AGP8X and HyperTransport] 1689 M1689 K8 Northbridge [Super K8 Single Chip] + 1695 M1695 K8 Northbridge [PCI Express and HyperTransport] + 1697 M1697 HTT Host Bridge 3141 M3141 3143 M3143 3145 M3145 @@ -3121,6 +3526,7 @@ 5217 M5217H 5219 M5219 5225 M5225 + 5228 M5228 ALi ATA/RAID Controller 5229 M5229 IDE 1014 050f ThinkPad R30 1014 053d ThinkPad R40e (2684-HVG) builtin IDE @@ -3130,16 +3536,24 @@ 5237 USB 1.1 Controller 1014 0540 ThinkPad R40e (2684-HVG) builtin USB 103c 0024 Pavilion ze4400 builtin USB + 104d 810f VAIO PCG-U1 USB/OHCI Revision 1.0 5239 USB 2.0 Controller 5243 M1541 PCI to AGP Controller 5246 AGP8X Controller 5247 PCI to AGP Controller 5249 M5249 HTT to PCI Bridge + 524b PCI Express Root Port + 524c PCI Express Root Port + 524d PCI Express Root Port + 524e PCI Express Root Port 5251 M5251 P1394 OHCI 1.0 Controller 5253 M5253 P1394 OHCI 1.1 Controller 5261 M5261 Ethernet Controller 5263 M5263 Ethernet Controller 5281 ALi M5281 Serial ATA / RAID Host Controller + 5287 ULi 5287 SATA + 5288 ULi M5288 SATA + 5289 ULi 5289 SATA 5450 Lucent Technologies Soft Modem AMR 5451 M5451 PCI AC-Link Controller Audio Device 1014 0506 ThinkPad R30 @@ -3151,10 +3565,9 @@ 5457 M5457 AC'97 Modem Controller 1014 0535 ThinkPad R40e (2684-HVG) builtin modem 103c 0024 Pavilion ze4400 builtin Modem Device -# Same but more usefull for driver's lookup 5459 SmartLink SmartPCI561 56K Modem -# SmartLink PCI SoftModem 545a SmartLink SmartPCI563 56K Modem + 5461 High Definition Audio/AC'97 Host Controller 5471 M5471 Memory Stick Controller 5473 M5473 SD-MMC Controller 7101 M7101 Power Management Controller [PMU] @@ -3254,10 +3667,12 @@ 10d7 BCM Advanced Research 10d8 Advanced Peripherals Labs 10d9 Macronix, Inc. [MXIC] + 0431 MX98715 0512 MX98713 0531 MX987x5 1186 1200 DFE-540TX ProFAST 10/100 Adapter 8625 MX86250 + 8626 Macronix MX86251 + 3Dfx Voodoo Rush 8888 MX86200 10da Compaq IPG-Austin 0508 TC4048 Token Ring 4/16 @@ -3270,6 +3685,7 @@ 0022 HIPPI source 10dc ATT2C15-3 FPGA 10dd Evans & Sutherland + 0100 Lightning 1200 10de nVidia Corporation 0008 NV1 [EDGE 3D] 0009 NV1 [EDGE 3D] @@ -3277,7 +3693,9 @@ 0020 NV4 [RIVA TNT] 1043 0200 V3400 TNT 1048 0c18 Erazor II SGRAM + 1048 0c19 Erazor II 1048 0c1b Erazor II + 1048 0c1c Erazor II 1092 0550 Viper V550 1092 0552 Viper V550 1092 4804 Viper V550 @@ -3302,7 +3720,14 @@ 1043 0205 PCI-V3800 1043 4000 AGP-V3800PRO 1048 0c21 Synergy II - 1048 0c31 Erazor III + 1048 0c28 Erazor III + 1048 0c29 Erazor III + 1048 0c2a Erazor III + 1048 0c2b Erazor III + 1048 0c31 Erazor III Pro + 1048 0c32 Erazor III Pro + 1048 0c33 Erazor III Pro + 1048 0c34 Erazor III Pro 107d 2134 WinFast 3D S320 II + TV-Out 1092 4804 Viper V770 1092 4a00 Viper V770 @@ -3319,6 +3744,9 @@ 1043 0200 AGP-V3800 Deluxe 1043 0201 AGP-V3800 Ultra SDRAM 1043 0205 PCI-V3800 Ultra + 1048 0c2e Erazor III Ultra + 1048 0c2f Erazor III Ultra + 1048 0c30 Erazor III Ultra 1102 1021 3D Blaster RIVA TNT2 Ultra 1102 1029 3D Blaster RIVA TNT2 Ultra 1102 102f 3D Blaster RIVA TNT2 Ultra @@ -3328,6 +3756,8 @@ 002c NV6 [Vanta/Vanta LT] 1043 0200 AGP-V3800 Combat SDRAM 1043 0201 AGP-V3800 Combat + 1048 0c20 TNT2 Vanta + 1048 0c21 TNT2 Vanta 1092 6820 Viper V730 1102 1031 CT6938 VANTA 8MB 1102 1034 CT6894 VANTA 16MB @@ -3336,12 +3766,14 @@ 1043 0200 AGP-V3800M 1043 0201 AGP-V3800M 1048 0c3a Erazor III LT + 1048 0c3b Erazor III LT 10de 001e M64 AGP4x 1102 1023 CT6892 RIVA TNT2 Value 1102 1024 CT6932 RIVA TNT2 Value 32Mb 1102 102c CT6931 RIVA TNT2 Value [Jumper] 1462 8808 MSI-8808 1554 1041 Pixelview RIVA TNT2 M64 + 1569 002d Palit Microsystems Daytona TNT2 M64 002e NV6 [Vanta] 002f NV6 [Vanta] 0034 MCP04 SMBus @@ -3354,25 +3786,57 @@ 003c MCP04 USB Controller 003d MCP04 PCI Bridge 003e MCP04 Serial ATA Controller - 0040 nv40 [GeForce 6800 Ultra] + 0040 NV40 [GeForce 6800 Ultra] 0041 NV40 [GeForce 6800] - 0042 NV40.2 + 1043 817b V9999 Gamer Edition + 0042 NV40.2 [GeForce 6800 LE] 0043 NV40.3 0045 NV40 [GeForce 6800 GT] + 0047 NV40 [GeForce 6800 GS] + 1682 2109 GeForce 6800 GS 0049 NV40GL 004e NV40GL [Quadro FX 4000] + 0050 CK804 ISA Bridge + 1043 815a K8N4-E Mainboard + 1458 0c11 GA-K8N Ultra-9 Mainboard + 1462 7100 MSI K8N Diamond + 0051 CK804 ISA Bridge 0052 CK804 SMBus + 1043 815a K8N4-E Mainboard + 1458 0c11 GA-K8N Ultra-9 Mainboard + 1462 7100 MSI K8N Diamond 0053 CK804 IDE + 1043 815a K8N4-E Mainboard + 1458 5002 GA-K8N Ultra-9 Mainboard + 1462 7100 MSI K8N Diamond 0054 CK804 Serial ATA Controller + 1458 b003 GA-K8N Ultra-9 Mainboard + 1462 7100 MSI K8N Diamond 0055 CK804 Serial ATA Controller + 1043 815a K8N4-E Mainboard + 1458 b003 GA-K8N Ultra-9 Mainboard 0056 CK804 Ethernet Controller 0057 CK804 Ethernet Controller + 1043 8141 K8N4-E Mainboard + 1458 e000 GA-K8N Ultra-9 Mainboard + 1462 7100 MSI K8N Diamond + 0058 CK804 AC'97 Modem 0059 CK804 AC'97 Audio Controller + 1043 812a K8N4-E Mainboard 005a CK804 USB Controller + 1043 815a K8N4-E Mainboard + 1458 5004 GA-K8N Ultra-9 Mainboard + 1462 7100 MSI K8N Diamond 005b CK804 USB Controller + 1043 815a K8N4-E Mainboard + 1458 5004 GA-K8N Ultra-9 Mainboard + 1462 7100 MSI K8N Diamond 005c CK804 PCI Bridge 005d CK804 PCIE Bridge 005e CK804 Memory Controller + 1458 5000 GA-K8N Ultra-9 Mainboard + 1462 7100 MSI K8N Diamond + 005f CK804 Memory Controller 0060 nForce2 ISA Bridge 1043 80ad A7N8X Mainboard 0064 nForce2 SMBus (MCP) @@ -3384,27 +3848,40 @@ 0068 nForce2 USB Controller 1043 0c11 A7N8X Mainboard 006a nForce2 AC97 Audio Controler (MCP) - 006b nForce MultiMedia audio [Via VT82C686B] + 006b nForce Audio Processing Unit 10de 006b nForce2 MCP Audio Processing Unit 006c nForce2 External PCI Bridge 006d nForce2 PCI Bridge 006e nForce2 FireWire (IEEE 1394) Controller + 0080 MCP2A ISA bridge + 147b 1c09 NV7 Motherboard 0084 MCP2A SMBus + 147b 1c09 NV7 Motherboard 0085 MCP2A IDE + 147b 1c09 NV7 Motherboard 0086 MCP2A Ethernet Controller 0087 MCP2A USB Controller + 147b 1c09 NV7 Motherboard 0088 MCP2A USB Controller + 147b 1c09 NV7 Motherboard 008a MCP2S AC'97 Audio Controller + 147b 1c09 NV7 Motherboard 008b MCP2A PCI Bridge 008c MCP2A Ethernet Controller 008e nForce2 Serial ATA Controller + 0091 GeForce 7800 GTX + 0092 GeForce 7800 GT + 0099 GE Force Go 7800 GTX 00a0 NV5 [Aladdin TNT2] 14af 5810 Maxi Gamer Xentor 00c0 NV41.0 - 00c1 NV41.1 - 00c2 NV41.2 - 00c8 NV41.8 - 00ce NV41GL + 00c1 NV41.1 [GeForce 6800] + 00c2 NV41.2 [GeForce 6800 LE] + 00c8 NV41.8 [GeForce Go 6800] + 00c9 NV41.9 [GeForce Go 6800 Ultra] + 00cc NV41 [Quadro FX Go1400] + 00cd NV41 [Quadro FX 3450/4000 SDI] + 00ce NV41GL [Quadro FX 1400] 00d0 nForce3 LPC Bridge 00d1 nForce3 Host Bridge 00d2 nForce3 AGP Bridge @@ -3414,29 +3891,44 @@ 00d6 nForce3 Ethernet 00d7 nForce3 USB 1.1 00d8 nForce3 USB 2.0 + 00d9 nForce3 Audio 00da nForce3 Audio 00dd nForce3 PCI Bridge 00df CK8S Ethernet Controller + 147b 1c0b NF8 Mainboard + 00e0 nForce3 250Gb LPC Bridge + 147b 1c0b NF8 Mainboard 00e1 nForce3 250Gb Host Bridge + 147b 1c0b NF8 Mainboard 00e2 nForce3 250Gb AGP Host to PCI Bridge 00e3 CK8S Serial ATA Controller (v2.5) + 147b 1c0b NF8 Mainboard 00e4 nForce 250Gb PCI System Management + 147b 1c0b NF8 Mainboard 00e5 CK8S Parallel ATA Controller (v2.5) + 147b 1c0b NF8 Mainboard 00e6 CK8S Ethernet Controller 00e7 CK8S USB Controller - 00e8 CK8S USB Controller + 147b 1c0b NF8 Mainboard + 00e8 nForce3 EHCI USB 2.0 Controller + 147b 1c0b NF8 Mainboard 00ea nForce3 250Gb AC'97 Audio Controller + 147b 1c0b NF8 Mainboard 00ed nForce3 250Gb PCI-to-PCI Bridge 00ee CK8S Serial ATA Controller (v2.5) 00f0 NV40 [GeForce 6800/GeForce 6800 Ultra] 00f1 NV43 [GeForce 6600/GeForce 6600 GT] - 00f2 NV43 [GeForce 6600 GT] - 00f8 NV45GL [Quadro FX 3400] - 00f9 NV40 [GeForce 6800 Ultra] + 1043 81a6 N6600GT TD 128M AGP + 00f2 NV43 [GeForce 6600/GeForce 6600 GT] + 1682 211c GeForce 6600 256MB DDR DUAL DVI TV + 00f3 NV43 [GeForce 6200] + 00f8 NV45GL [Quadro FX 3400/4400] + 00f9 NV40 [GeForce 6800 Ultra/GeForce 6800 GT] + 1682 2120 GEFORCE 6800 GT PCI-E 00fa NV36 [GeForce PCX 5750] 00fb NV35 [GeForce PCX 5900] 00fc NV37GL [Quadro FX 330/GeForce PCX 5300] - 00fd NV37GL [Quadro FX 330] + 00fd NV37GL [Quadro FX 330/Quadro NVS280] 00fe NV38GL [Quadro FX 1300] 00ff NV18 [GeForce PCX 4300] 0100 NV10 [GeForce 256 SDR] @@ -3444,28 +3936,56 @@ 1043 0201 AGP-V6600 SDRAM 1043 4008 AGP-V6600 SGRAM 1043 4009 AGP-V6600 SDRAM + 1048 0c41 Erazor X + 1048 0c43 ERAZOR X PCI + 1048 0c48 Synergy Force 1102 102d CT6941 GeForce 256 14af 5022 3D Prophet SE 0101 NV10DDR [GeForce 256 DDR] 1043 0202 AGP-V6800 DDR 1043 400a AGP-V6800 DDR SGRAM 1043 400b AGP-V6800 DDR SDRAM + 1048 0c42 Erazor X 107d 2822 WinFast GeForce 256 1102 102e CT6971 GeForce 256 DDR 14af 5021 3D Prophet DDR-DVI 0103 NV10GL [Quadro] + 1048 0c40 GLoria II-64 + 1048 0c44 GLoria II + 1048 0c45 GLoria II + 1048 0c4a GLoria II-64 Pro + 1048 0c4b GLoria II-64 Pro DVII 0110 NV11 [GeForce2 MX/MX 400] 1043 4015 AGP-V7100 Pro 1043 4031 V7100 Pro with TV output + 1048 0c60 Gladiac MX + 1048 0c61 Gladiac 511PCI + 1048 0c63 Gladiac 511TV-OUT 32MB + 1048 0c64 Gladiac 511TV-OUT 64MB + 1048 0c65 Gladiac 511TWIN + 1048 0c66 Gladiac 311 10de 0091 Dell OEM GeForce 2 MX 400 + 10de 00a1 Apple OEM GeForce2 MX 1462 8817 MSI GeForce2 MX400 Pro32S [MS-8817] 14af 7102 3D Prophet II MX 14af 7103 3D Prophet II MX Dual-Display 0111 NV11DDR [GeForce2 MX 100 DDR/200 DDR] 0112 NV11 [GeForce2 Go] - 0113 NV11GL [Quadro2 MXR/EX] + 0113 NV11GL [Quadro2 MXR/EX/Go] + 0140 NV43 [GeForce 6600 GT] + 0141 NV43 [GeForce 6600] + 1458 3124 GV-NX66128DP Turbo Force Edition + 0142 NV43 [GeForce 6600 PCIe] + 0144 NV43 [GeForce Go 6600] + 0145 NV43 [GeForce 6610 XL] + 0146 NV43 [Geforce Go 6600TE/6200TE] + 0148 NV43 [GeForce Go 6600] + 014e NV43GL [Quadro FX 540] + 014f NV43 [GeForce 6200] 0150 NV15 [GeForce2 GTS/Pro] 1043 4016 V7700 AGP Video Card + 1048 0c50 Gladiac + 1048 0c52 Gladiac-64 107d 2840 WinFast GeForce2 GTS with TV output 107d 2842 WinFast GeForce 2 Pro 1462 8831 Creative GeForce2 Pro @@ -3475,11 +3995,17 @@ 0152 NV15BR [GeForce2 Ultra, Bladerunner] 1048 0c56 GLADIAC Ultra 0153 NV15GL [Quadro2 Pro] + 0161 GeForce 6200 TurboCache(TM) + 0164 NV44 [GeForce Go 6200] + 0165 NV44 [Quadro NVS 285] + 0167 GeForce Go 6200 TurboCache 0170 NV17 [GeForce4 MX 460] 0171 NV17 [GeForce4 MX 440] 10b0 0002 Gainward Pro/600 TV + 10de 0008 Apple OEM GeForce4 MX 440 1462 8661 G4MX440-VTP 1462 8730 MX440SES-T (MS-8873) + 1462 8852 GeForce4 MX440 PCI 147b 8f00 Abit Siluro GeForce4MX440 0172 NV17 [GeForce4 MX 420] 0173 NV17 [GeForce4 MX 440-SE] @@ -3489,11 +4015,11 @@ 4c53 1090 Cx9 / Vx9 mainboard 0177 NV17 [GeForce4 460 Go] 0178 NV17GL [Quadro4 550 XGL] - 0179 NV17 [GeForce4 440 Go 64M] + 0179 NV17 [GeForce4 420 Go 32M] 10de 0179 GeForce4 MX (Mac) 017a NV17GL [Quadro4 200/400 NVS] 017b NV17GL [Quadro4 550 XGL] - 017c NV17GL [Quadro4 550 GoGL] + 017c NV17GL [Quadro4 500 GoGL] 017d NV17 [GeForce4 410 Go 16M] 0181 NV18 [GeForce4 MX 440 AGP 8x] 1043 806f V9180 Magic @@ -3526,6 +4052,7 @@ 01c2 nForce USB Controller 01c3 nForce Ethernet Controller 01e0 nForce2 AGP (different version?) + 147b 1c09 NV7 Motherboard 01e8 nForce2 AGP 01ea nForce2 Memory Controller 0 01eb nForce2 Memory Controller 1 @@ -3536,11 +4063,29 @@ 01f0 NV18 [GeForce4 MX - nForce GPU] 0200 NV20 [GeForce3] 1043 402f AGP-V8200 DDR + 1048 0c70 GLADIAC 920 0201 NV20 [GeForce3 Ti 200] 0202 NV20 [GeForce3 Ti 500] 1043 405b V8200 T5 1545 002f Xtasy 6964 0203 NV20DCC [Quadro DCC] + 0221 GeForce 6200 + 0240 C51PV [GeForce 6150] + 0241 C51 PCI Express Bridge + 0242 C51G [GeForce 6100] + 0243 C51 PCI Express Bridge + 0244 C51 PCI Express Bridge + 0245 C51 PCI Express Bridge + 0246 C51 PCI Express Bridge + 0247 C51 PCI Express Bridge + 0248 C51 PCI Express Bridge + 0249 C51 PCI Express Bridge + 024a C51 PCI Express Bridge + 024b C51 PCI Express Bridge + 024c C51 PCI Express Bridge + 024d C51 PCI Express Bridge + 024e C51 PCI Express Bridge + 024f C51 PCI Express Bridge 0250 NV25 [GeForce4 Ti 4600] 0251 NV25 [GeForce4 Ti 4400] 1043 8023 v8440 GeForce 4 Ti4400 @@ -3551,6 +4096,27 @@ 0258 NV25GL [Quadro4 900 XGL] 0259 NV25GL [Quadro4 750 XGL] 025b NV25GL [Quadro4 700 XGL] + 0260 MCP51 LPC Bridge + 0261 MCP51 LPC Bridge + 0262 MCP51 LPC Bridge + 0263 MCP51 LPC Bridge + 0264 MCP51 SMBus + 0265 MCP51 IDE + 0266 MCP51 Serial ATA Controller + 0267 MCP51 Serial ATA Controller + 0268 MCP51 Ethernet Controller + 0269 MCP51 Ethernet Controller + 026a MCP51 MCI + 026b MCP51 AC97 Audio Controller + 026c MCP51 High Definition Audio + 026d MCP51 USB Controller + 026e MCP51 USB Controller + 026f MCP51 PCI Bridge + 0270 MCP51 Host Bridge + 0271 MCP51 PMU + 0272 MCP51 Memory Controller 0 + 027e C51 Memory Controller 2 + 027f C51 Memory Controller 3 0280 NV28 [GeForce4 Ti 4800] 0281 NV28 [GeForce4 Ti 4200 AGP 8x] 0282 NV28 [GeForce4 Ti 4800 SE] @@ -3558,6 +4124,24 @@ 0288 NV28GL [Quadro4 980 XGL] 0289 NV28GL [Quadro4 780 XGL] 028c NV28GLM [Quadro4 700 GoGL] +# NV2A Xbox Graphics Processing Unit (Intergrated). GeForce3 derivative (NV20 < NV2A < NV25) + 02a0 NV2A [XGPU] + 02f0 C51 Host Bridge + 02f1 C51 Host Bridge + 02f2 C51 Host Bridge + 02f3 C51 Host Bridge + 02f4 C51 Host Bridge + 02f5 C51 Host Bridge + 02f6 C51 Host Bridge + 02f7 C51 Host Bridge + 02f8 C51 Memory Controller 5 + 02f9 C51 Memory Controller 4 + 02fa C51 Memory Controller 0 + 02fb C51 PCI Express Bridge + 02fc C51 PCI Express Bridge + 02fd C51 PCI Express Bridge + 02fe C51 Memory Controller 1 + 02ff C51 Host Bridge 0300 NV30 [GeForce FX] 0301 NV30 [GeForce FX 5800 Ultra] 0302 NV30 [GeForce FX 5800] @@ -3568,31 +4152,33 @@ 0313 NV31 0314 NV31 [GeForce FX 5600XT] 1043 814a V9560XT/TD - 0316 NV31 - 0317 NV31 - 031a NV31M [GeForce FX Go 5600] + 0316 NV31M + 0317 NV31M Pro + 031a NV31M [GeForce FX Go5600] 031b NV31M [GeForce FX Go5650] - 031c NVIDIA Quadro FX 700 Go - 031d NV31 - 031e NV31 - 031f NV31 + 031c NVIDIA Quadro FX Go700 + 031d NV31GLM + 031e NV31GLM Pro + 031f NV31GLM Pro 0320 NV34 [GeForce FX 5200] 0321 NV34 [GeForce FX 5200 Ultra] 0322 NV34 [GeForce FX 5200] 1462 9171 MS-8917 (FX5200-T128) + 1462 9360 MS-8936 (FX5200-T128) 0323 NV34 [GeForce FX 5200LE] - 0324 NV34M [GeForce FX Go 5200] + 0324 NV34M [GeForce FX Go5200] + 1028 0196 Inspiron 5160 1071 8160 MIM2000 0325 NV34M [GeForce FX Go5250] 0326 NV34 [GeForce FX 5500] 0327 NV34 [GeForce FX 5100] - 0328 NV34M [GeForce FX Go 5200] + 0328 NV34M [GeForce FX Go5200 32M/64M] 0329 NV34M [GeForce FX Go5200] 032a NV34GL [Quadro NVS 280 PCI] 032b NV34GL [Quadro FX 500/600 PCI] 032c NV34GLM [GeForce FX Go 5300] 032d NV34 [GeForce FX Go5100] - 032f NV34 + 032f NV34GL 0330 NV35 [GeForce FX 5900 Ultra] 0331 NV35 [GeForce FX 5900] 1043 8145 V9950GE @@ -3607,37 +4193,63 @@ 0344 NV36.4 [GeForce FX 5700VE] 0345 NV36.5 0347 NV36 [GeForce FX Go5700] + 103c 006a nx9500 0348 NV36 [GeForce FX Go5700] - 0349 NV36 - 034b NV36 + 0349 NV36M Pro + 034b NV36MAP 034c NV36 [Quadro FX Go1000] 034e NV36GL [Quadro FX 1100] 034f NV36GL + 0360 MCP55 LPC Bridge + 0361 MCP55 LPC Bridge + 0362 MCP55 LPC Bridge + 0363 MCP55 LPC Bridge + 0364 MCP55 LPC Bridge + 0365 MCP55 LPC Bridge + 0366 MCP55 LPC Bridge + 0367 MCP55 LPC Bridge + 0368 MCP55 SMBus + 0369 MCP55 Memory Controller + 036a MCP55 Memory Controller + 036c MCP55 USB Controller + 036d MCP55 USB Controller + 036e MCP55 IDE + 0371 MCP55 High Definition Audio + 0372 MCP55 Ethernet + 0373 MCP55 Ethernet + 037a MCP55 Memory Controller + 037e MCP55 SATA Controller + 037f MCP55 SATA Controller 10df Emulex Corporation 1ae5 LP6000 Fibre Channel Host Adapter - 1ae6 LP 8000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2) - 1ae7 LP 8000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:2-3) - f015 LP1150e - f085 LP850 Fibre Channel Adapter - f095 LP952 Fibre Channel Adapter - f098 LP982 Fibre Channel Adapter - f0a1 LightPulse Fibre Channel Adapter - f0a5 LP1050 - f0d5 LP1150 - f100 LP11000e + f085 LP850 Fibre Channel Host Adapter + f095 LP952 Fibre Channel Host Adapter + f098 LP982 Fibre Channel Host Adapter + f0a1 Thor LightPulse Fibre Channel Host Adapter + f0a5 Thor LightPulse Fibre Channel Host Adapter + f0b5 Viper LightPulse Fibre Channel Host Adapter + f0d1 Helios LightPulse Fibre Channel Host Adapter + f0d5 Helios LightPulse Fibre Channel Host Adapter + f0e1 Zephyr LightPulse Fibre Channel Host Adapter + f0e5 Zephyr LightPulse Fibre Channel Host Adapter + f0f5 Neptune LightPulse Fibre Channel Host Adapter f700 LP7000 Fibre Channel Host Adapter - f701 LP 7000EFibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2) + f701 LP7000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2) f800 LP8000 Fibre Channel Host Adapter - f801 LP 8000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2) + f801 LP8000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2) f900 LP9000 Fibre Channel Host Adapter - f901 LP 9000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2) - f980 LP9802 Fibre Channel Adapter - f981 LP 9802 Fibre Channel Host Adapter Alternate ID - f982 LP 9802 Fibre Channel Host Adapter Alternate ID - fa00 LP10000 Fibre Channel Host Adapter - fa01 LP101 - fb00 LightPulse Fibre Channel Adapter - fd00 LP11000 + f901 LP9000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2) + f980 LP9802 Fibre Channel Host Adapter + f981 LP9802 Fibre Channel Host Adapter Alternate ID + f982 LP9802 Fibre Channel Host Adapter Alternate ID + fa00 Thor-X LightPulse Fibre Channel Host Adapter + fb00 Viper LightPulse Fibre Channel Host Adapter + fc00 Thor-X LightPulse Fibre Channel Host Adapter + fc10 Helios-X LightPulse Fibre Channel Host Adapter + fc20 Zephyr-X LightPulse Fibre Channel Host Adapter + fd00 Helios-X LightPulse Fibre Channel Host Adapter + fe00 Zephyr-X LightPulse Fibre Channel Host Adapter + ff00 Neptune LightPulse Fibre Channel Host Adapter 10e0 Integrated Micro Solutions Inc. 5026 IMS5026/27/28 5027 IMS5027 @@ -3653,11 +4265,13 @@ 10e2 Aptix Corporation 10e3 Tundra Semiconductor Corp. 0000 CA91C042 [Universe] + 0148 Tsi148 [Tempe] 0860 CA91C860 [QSpan] 0862 CA91C862A [QSpan-II] 8260 CA91L8200B [Dual PCI PowerSpan II] 8261 CA91L8260B [Single PCI PowerSpan II] 10e4 Tandem Computers + 8029 Realtek 8029 Network Card 10e5 Micro Industries Corporation 10e6 Gainbery Computer Products Inc. 10e7 Vadem @@ -3705,6 +4319,7 @@ 0101 3GA 8111 Twist3 Frame Grabber 10ec Realtek Semiconductor Co., Ltd. + 0139 Zonet Zen3200 8029 RTL-8029(AS) 10b8 2011 EZ-Card (SMC1208) 10ec 8029 RTL-8029(AS) @@ -3720,6 +4335,8 @@ 1025 005a TravelMate 290 1025 8920 ALN-325 1025 8921 ALN-325 + 103c 006a nx9500 + 1043 8109 P5P800-MX Mainboard 1071 8160 MIM2000 10bd 0320 EP-320X-R 10ec 8139 RT8139 @@ -3734,6 +4351,7 @@ 1432 9130 EN-9130TX 1436 8139 RT8139 1458 e000 GA-7VM400M/7VT600 Motherboard + 1462 788c 865PE Neo2-V Mainboard 146c 1439 FE-1439TX 1489 6001 GF100TXRII 1489 6002 GF100TXRA @@ -3741,20 +4359,27 @@ 149c 8139 LFE-8139TX 14cb 0200 LNR-100 Family 10/100 Base-TX Ethernet 1799 5000 F5D5000 PCI Card/Desktop Network PCI Card + 1904 8139 RTL8139D Fast Ethernet Adapter 2646 0001 EtheRx 8e2e 7000 KF-230TX 8e2e 7100 KF-230TX/2 + 9001 1695 Onboard RTL8101L 10/100 MBit a0a0 0007 ALN-325C 8169 RTL-8169 Gigabit Ethernet 1259 c107 CG-LAPCIGT 1371 434e ProG-2000L - 1458 e000 GA-K8VT800 Pro Motherboard + 1458 e000 GA-8I915ME-G Mainboard 1462 702c K8T NEO 2 motherboard 8180 RTL8180L 802.11b MAC 8197 SmartLAN56 56K Modem 10ed Ascii Corporation 7310 V7310 10ee Xilinx Corporation + 0205 Wildcard TE205P + 0210 Wildcard TE210P + 0314 Wildcard TE405P/TE410P (1st Gen) + 0405 Wildcard TE405P (2nd Gen) + 0410 Wildcard TE410P (2nd Gen) 3fc0 RME Digi96 3fc1 RME Digi96/8 3fc2 RME Digi96/8 Pro @@ -3778,7 +4403,7 @@ 10f9 PC Direct 10fa Truevision 000c TARGA 1000 -10fb Thesys Gesellschaft für Mikroelektronik mbH +10fb Thesys Gesellschaft fuer Mikroelektronik mbH 186f TH 6255 10fc I-O Data Device, Inc. # What's in the cardbus end of a Sony ACR-A01 card, comes with newer Vaio CD-RW drives @@ -3800,6 +4425,7 @@ 1102 0020 CT4850 SBLive! Value 1102 0021 CT4620 SBLive! 1102 002f SBLive! mainboard implementation + 1102 100a SB Live! 5.1 Digital OEM [SB0220] 1102 4001 E-mu APS 1102 8022 CT4780 SBLive! Value 1102 8023 CT4790 SoundBlaster PCI512 @@ -3812,19 +4438,24 @@ 1102 8040 CT4760 SBLive! 1102 8051 CT4850 SBLive! Value 1102 8061 SBLive! Player 5.1 - 1102 8064 SB Live! 5.1 Model SB0100 + 1102 8064 SBLive! 5.1 Model SB0100 1102 8065 SBLive! 5.1 Digital Model SB0220 1102 8067 SBLive! 5.1 eMicro 28028 0004 SB Audigy 1102 0051 SB0090 Audigy Player 1102 0053 SB0090 Audigy Player/OEM 1102 0058 SB0090 Audigy Player/OEM + 1102 1007 SB0240 Audigy 2 Platinum 6.1 1102 2002 SB Audigy 2 ZS (SB0350) 0006 [SB Live! Value] EMU10k1X 0007 SB Audigy LS + 1102 0007 SBLive! 24bit 1102 1001 SB0310 Audigy LS 1102 1002 SB0312 Audigy LS + 1102 1006 SB0410 SBLive! 24-bit + 1462 1009 K8N Diamond 0008 SB0400 Audigy2 Value + 1102 0008 EMU0404 Digital Audio System 4001 SB Audigy FireWire Port 1102 0010 SB Audigy FireWire Port 7002 SB Live! MIDI/Game Port @@ -3837,10 +4468,24 @@ 1102 1002 SB0312 Audigy LS MIDI/Game port 8064 SB0100 [SBLive! 5.1 OEM] 8938 Ectiva EV1938 + 1033 80e5 SlimTower-Jim (NEC) + 1071 7150 Mitac 7150 + 110a 5938 Siemens Scenic Mobile 510PIII + 13bd 100c Ceres-C (Sharp, Intel BX) + 13bd 100d Sharp, Intel Banister + 13bd 100e TwinHead P09S/P09S3 (Sharp) + 13bd f6f1 Marlin (Sharp) + 14ff 0e70 P88TE (TWINHEAD INTERNATIONAL Corp) + 14ff c401 Notebook 9100/9200/2000 (TWINHEAD INTERNATIONAL Corp) + 156d b400 G400 - Geo (AlphaTop (Taiwan)) + 156d b550 G560 (AlphaTop (Taiwan)) + 156d b560 G560 (AlphaTop (Taiwan)) + 156d b700 G700/U700 (AlphaTop (Taiwan)) + 156d b795 G795 (AlphaTop (Taiwan)) + 156d b797 G797 (AlphaTop (Taiwan)) 1103 Triones Technologies, Inc. 0003 HPT343 -# Revisions: 01=HPT366, 03=HPT370, 04=HPT370A, 05=HPT372 - 0004 HPT366/368/370/370A/372 + 0004 HPT366/368/370/370A/372/372N 1103 0001 HPT370A 1103 0003 HPT343 / HPT345 / HPT363 UDMA33 1103 0004 HPT366 UDMA66 (r1) / HPT368 UDMA66 (r2) / HPT370 UDMA100 (r3) / HPT370 UDMA100 RAID (r4) @@ -3848,9 +4493,9 @@ 1103 0006 HPT302 1103 0007 HPT371 UDMA133 1103 0008 HPT374 UDMA/ATA133 RAID Controller - 0005 HPT372A + 0005 HPT372A/372N 0006 HPT302 - 0007 HPT371 + 0007 HPT371/371N 0008 HPT374 0009 HPT372N 1104 RasterOps Corp. @@ -3862,17 +4507,32 @@ 8470 EM8470 REALmagic DVD/MPEG-4 A/V Decoder 8471 EM8471 REALmagic DVD/MPEG-4 A/V Decoder 8475 EM8475 REALmagic DVD/MPEG-4 A/V Decoder + 1105 0001 REALmagic X-Card 8476 EM8476 REALmagic DVD/MPEG-4 A/V Decoder + 127d 0000 CineView II 8485 EM8485 REALmagic DVD/MPEG-4 A/V Decoder 8486 EM8486 REALmagic DVD/MPEG-4 A/V Decoder 1106 VIA Technologies, Inc. 0102 Embedded VIA Ethernet Controller 0130 VT6305 1394.A Controller +# Wrong ID found on Jetway K8M8MS + 0204 K8M800 Host Bridge + 0238 K8T890 Host Bridge + 0258 PT880 Host Bridge + 0259 CN400/PM880 Host Bridge + 0269 KT880 Host Bridge + 0282 K8T800Pro Host Bridge + 1043 80a3 A8V Deluxe + 0290 K8M890 Host Bridge + 0296 P4M800 Host Bridge 0305 VT8363/8365 [KT133/KM133] + 1019 0987 K7VZA (Rev. 1.0) Mainboard 1043 8033 A7V Mainboard 1043 803e A7V-E Mainboard 1043 8042 A7V133/A7V133-C Mainboard 147b a401 KT7/KT7-RAID/KT7A/KT7A-RAID Mainboard + 0308 PT894 Host Bridge + 0314 P4M800CE Host Bridge 0391 VT8371 [KX133] 0501 VT8501 [Apollo MVP4] 0505 VT82C505 @@ -3882,20 +4542,21 @@ 1019 0985 P6VXA Motherboard 1019 0a81 L7VTA v1.0 Motherboard (KT400-8235) 1043 8052 VT8233A Bus Master ATA100/66/33 IDE - 1043 808c A7V8X motherboard + 1043 808c A7V8X / A7V333 motherboard 1043 80a1 A7V8X-X motherboard rev. 1.01 - 1043 80ed A7V600 motherboard + 1043 80ed A7V600/K8V-X/A8V Deluxe motherboard 1106 0571 VT82C586/B/VT82C686/A/B/VT8233/A/C/VT8235 PIPC Bus Master IDE 1179 0001 Magnia Z310 1297 f641 FX41 motherboard 1458 5002 GA-7VAX Mainboard 1462 7020 K8T NEO 2 motherboard 147b 1407 KV8-MAX3 motherboard - 1849 0571 K7VT2 motherboard + 1849 0571 K7VT2 / K7VT6 motherboard 0576 VT82C576 3V [Apollo Master] 0585 VT82C585VP [Apollo VP1/VPX] 0586 VT82C586/A/B PCI-to-ISA [Apollo VP] 1106 0000 MVP3 ISA Bridge + 0591 VT8237A SATA 2-Port Controller 0595 VT82C595 [Apollo VP2] 0596 VT82C596 ISA [Mobile South] 1106 0000 VT82C596/A/B PCI to ISA Bridge @@ -3926,35 +4587,68 @@ 0926 VT82C926 [Amazon] 1000 VT82C570MV 1106 VT82C570MV + 1204 K8M800 Host Bridge + 1208 PT890 Host Bridge + 1238 K8T890 Host Bridge + 1258 PT880 Host Bridge + 1259 CN400/PM880 Host Bridge + 1269 KT880 Host Bridge + 1282 K8T800Pro Host Bridge + 1290 K8M890 Host Bridge + 1296 P4M800 Host Bridge + 1308 PT894 Host Bridge + 1314 P4M800CE Host Bridge 1571 VT82C576M/VT82C586 1595 VT82C595/97 [Apollo VP2/97] + 2204 K8M800 Host Bridge + 2208 PT890 Host Bridge + 2238 K8T890 Host Bridge + 2258 PT880 Host Bridge + 2259 CN400/PM880 Host Bridge + 2269 KT880 Host Bridge + 2282 K8T800Pro Host Bridge + 2290 K8M890 Host Bridge + 2296 P4M800 Host Bridge + 2308 PT894 Host Bridge + 2314 P4M800CE Host Bridge + 287a VT8251 PCI to PCI Bridge + 287b VT8251 PCI to PCIE Bridge + 287c VT8251 PCIE Root Port + 287d VT8251 PCIE Root Port + 287e VT8251 Ultra VLINK Controller 3022 CLE266 -# This is *not* USB 2.0 as the existing entry suggests 3038 VT82xxxxx UHCI USB 1.1 Controller 0925 1234 USB Controller 1019 0985 P6VXA Motherboard 1019 0a81 L7VTA v1.0 Motherboard (KT400-8235) + 1043 8080 A7V333 motherboard 1043 808c VT6202 USB2.0 4 port controller 1043 80a1 A7V8X-X motherboard - 1043 80ed A7V600 motherboard + 1043 80ed A7V600/K8V-X/A8V Deluxe motherboard 1179 0001 Magnia Z310 1458 5004 GA-7VAX Mainboard 1462 7020 K8T NEO 2 motherboard 147b 1407 KV8-MAX3 motherboard + 182d 201d CN-029 USB2.0 4 port PCI Card + 1849 3038 K7VT6 3040 VT82C586B ACPI 3043 VT86C100A [Rhine] 10bd 0000 VT86C100A Fast Ethernet Adapter 1106 0100 VT86C100A Fast Ethernet Adapter 1186 1400 DFE-530TX rev A 3044 IEEE 1394 Host Controller + 0574 086c K8N Diamond 1025 005a TravelMate 290 + 1043 808a A8V Deluxe 1458 1000 GA-7VT600-1394 Motherboard 1462 702d K8T NEO 2 motherboard + 1462 971d MS-6917 3050 VT82C596 Power Management 3051 VT82C596 Power Management 3053 VT6105M [Rhine-III] 3057 VT82C686 [Apollo Super ACPI] 1019 0985 P6VXA Motherboard + 1019 0987 K7VZA (Rev. 1.0) Motherboard 1043 8033 A7V Mainboard 1043 803e A7V-E Mainboard 1043 8040 A7M266 Mainboard @@ -3964,6 +4658,7 @@ 0e11 0097 SoundMax Digital Integrated Audio 0e11 b194 Soundmax integrated digital audio 1019 0985 P6VXA Motherboard + 1019 0987 K7VZA (Rev. 1.0) Motherboard 1043 1106 A7V133/A7V133-C Mainboard 1106 4511 Onboard Audio on EP7KXA 1458 7600 Onboard Audio @@ -3974,7 +4669,8 @@ 1019 0a81 L7VTA v1.0 Motherboard (KT400-8235) 1043 8095 A7V8X Motherboard (Realtek ALC650 codec) 1043 80a1 A7V8X-X Motherboard - 1043 80b0 A7V600 motherboard (ADI AD1980 codec [SoundMAX]) + 1043 80b0 A7V600/K8V Deluxe motherboard (ADI AD1980 codec [SoundMAX]) + 1043 812a A8V Deluxe motherboard (Realtek ALC850 codec) 1106 3059 L7VMM2 Motherboard 1106 4161 K7VT2 motherboard 1297 c160 FX41 motherboard (Realtek ALC650 codec) @@ -3982,12 +4678,21 @@ 1462 0080 K8T NEO 2 motherboard 1462 3800 KT266 onboard audio 147b 1407 KV8-MAX3 motherboard + 1849 9761 K7VT6 motherboard + 4005 4710 MSI K7T266 Pro2-RU (MSI-6380 v2) onboard audio (Realtek/ALC 200/200P) + 4170 1106 PCPartner P4M800-8237R Motherboard + 4552 1106 Soyo KT-600 Dragon Plus (Realtek ALC 650) + a0a0 01b6 AK77-8XN onboard audio 3065 VT6102 [Rhine-II] 1043 80a1 A7V8X-X Motherboard 1106 0102 VT6102 [Rhine II] Embeded Ethernet Controller on VT8235 1186 1400 DFE-530TX rev A 1186 1401 DFE-530TX rev B 13b9 1421 LD-10/100AL PCI Fast Ethernet Adapter (rev.B) + 147b 1c09 NV7 Motherboard + 1695 3005 VT6103 + 1695 300c Realtek ALC655 sound chip + 1849 3065 K7VT6 motherboard # This hosts more than just the Intel 537 codec, it also hosts PCtel (SIL33) and SmartLink (SIL34) codecs 3068 AC'97 Modem Controller 1462 309e MS-6309 Saturn Motherboard @@ -4005,35 +4710,41 @@ 1019 0a81 L7VTA v1.0 Motherboard (KT400-8235) 1043 808c A7V8X motherboard 1043 80a1 A7V8X-X motherboard rev 1.01 - 1043 80ed A7V600 motherboard + 1043 80ed A7V600/K8V-X/A8V Deluxe motherboard 1297 f641 FX41 motherboard 1458 5004 GA-7VAX Mainboard 1462 7020 K8T NEO 2 motherboard 147b 1407 KV8-MAX3 motherboard + 182d 201d CN-029 USB 2.0 4 port PCI Card + 1849 3104 K7VT6 motherboard 3106 VT6105 [Rhine-III] 1186 1403 DFE-530TX rev C 3108 S3 Unichrome Pro VGA Adapter 3109 VT8233C PCI to ISA Bridge 3112 VT8361 [KLE133] Host Bridge + 3113 VPX/VPX2 PCI to PCI Bridge Controller 3116 VT8375 [KM266/KL266] Host Bridge 1297 f641 FX41 motherboard 3118 S3 Unichrome Pro VGA Adapter 3119 VT6120/VT6121/VT6122 Gigabit Ethernet Adapter -# found on EPIA M6000/9000 mainboard 3122 VT8623 [Apollo CLE266] integrated CastleRock graphics -# found on EPIA M6000/9000 mainboard 3123 VT8623 [Apollo CLE266] 3128 VT8753 [P4X266 AGP] 3133 VT3133 Host Bridge 3147 VT8233A ISA Bridge + 1043 808c A7V333 motherboard 3148 P4M266 Host Bridge 3149 VIA VT6420 SATA RAID Controller - 1043 80ed A7V600 motherboard + 1043 80ed A7V600/K8V Deluxe/K8V-X/A8V Deluxe motherboard 1458 b003 GA-7VM400AM(F) Motherboard 1462 7020 K8T Neo 2 Motherboard + 147b 1407 KV8-MAX3 motherboard + 147b 1408 KV7 + 1849 3149 K7VT6 motherboard 3156 P/KN266 Host Bridge -# on ASUS P4P800 3164 VT6410 ATA133 RAID controller + 1043 80f4 P4P800 Mainboard Deluxe ATX + 1462 7028 915P/G Neo2 3168 VT8374 P4X400 Host Controller/AGP Bridge 3177 VT8235 ISA Bridge 1019 0a81 L7VTA v1.0 Motherboard (KT400-8235) @@ -4042,26 +4753,72 @@ 1297 f641 FX41 motherboard 1458 5001 GA-7VAX Mainboard 1849 3177 K7VT2 motherboard + 3178 ProSavageDDR P4N333 Host Bridge 3188 VT8385 [K8T800 AGP] Host Bridge + 1043 80a3 K8V Deluxe/K8V-X motherboard 147b 1407 KV8-MAX3 motherboard 3189 VT8377 [KT400/KT600 AGP] Host Bridge 1043 807f A7V8X motherboard 1458 5000 GA-7VAX Mainboard - 3204 K8M800 + 1849 3189 K7VT6 motherboard + 3204 K8M800 Host Bridge 3205 VT8378 [KM400/A] Chipset Host Bridge 1458 5000 GA-7VM400M Motherboard - 3227 VT8237 ISA bridge [KT600/K8T800 South] - 1043 80ed A7V600 motherboard + 3208 PT890 Host Bridge + 3213 VPX/VPX2 PCI to PCI Bridge Controller + 3218 K8T800M Host Bridge + 3227 VT8237 ISA bridge [KT600/K8T800/K8T890 South] + 1043 80ed A7V600/K8V-X/A8V Deluxe motherboard 1106 3227 DFI KT600-AL Motherboard 1458 5001 GA-7VT600 Motherboard 147b 1407 KV8-MAX3 motherboard + 1849 3227 K7VT4 motherboard + 3238 K8T890 Host Bridge + 3249 VT6421 IDE RAID Controller + 3258 PT880 Host Bridge + 3259 CN400/PM880 Host Bridge + 3269 KT880 Host Bridge + 3282 K8T800Pro Host Bridge + 3287 VT8251 PCI to ISA Bridge + 3288 VIA High Definition Audio Controller + 3290 K8M890 Host Bridge + 3296 P4M800 Host Bridge + 3337 VT8237A PCI to ISA Bridge + 3344 UniChrome Pro IGP + 3349 VT8251 AHCI/SATA 4-Port Controller + 337a VT8237A PCI to PCI Bridge + 337b VT8237A PCI to PCIE Bridge 4149 VIA VT6420 (ATA133) Controller + 4204 K8M800 Host Bridge + 4208 PT890 Host Bridge + 4238 K8T890 Host Bridge + 4258 PT880 Host Bridge + 4259 CN400/PM880 Host Bridge + 4269 KT880 Host Bridge + 4282 K8T800Pro Host Bridge + 4290 K8M890 Host Bridge + 4296 P4M800 Host Bridge + 4308 PT894 Host Bridge + 4314 P4M800CE Host Bridge 5030 VT82C596 ACPI [Apollo PRO] + 5208 PT890 I/O APIC Interrupt Controller + 5238 K8T890 I/O APIC Interrupt Controller + 5290 K8M890 I/O APIC Interrupt Controller + 5308 PT894 I/O APIC Interrupt Controller 6100 VT85C100A [Rhine II] - 7204 K8M800 -# S3 Graphics UniChromeâ„¢ 2D/3D Graphics with motion compensation + 7204 K8M800 Host Bridge 7205 VT8378 [S3 UniChrome] Integrated Video 1458 d000 Gigabyte GA-7VM400(A)M(F) Motherboard + 7208 PT890 Host Bridge + 7238 K8T890 Host Bridge + 7258 PT880 Host Bridge + 7259 CN400/PM880 Host Bridge + 7269 KT880 Host Bridge + 7282 K8T800Pro Host Bridge + 7290 K8M890 Host Bridge + 7296 P4M800 Host Bridge + 7308 PT894 Host Bridge + 7314 P4M800CE Host Bridge 8231 VT8231 [PCI-to-ISA Bridge] 8235 VT8235 ACPI 8305 VT8363/8365 [KT133/KM133 AGP] @@ -4075,18 +4832,31 @@ 8605 VT8605 [PM133 AGP] 8691 VT82C691 [Apollo Pro] 8693 VT82C693 [Apollo Pro Plus] PCI Bridge + a208 PT890 PCI to PCI Bridge Controller + a238 K8T890 PCI to PCI Bridge Controller b091 VT8633 [Apollo Pro266 AGP] b099 VT8366/A/7 [Apollo KT266/A/333 AGP] b101 VT8653 AGP Bridge b102 VT8362 AGP Bridge b103 VT8615 AGP Bridge b112 VT8361 [KLE133] AGP Bridge + b113 VPX/VPX2 I/O APIC Interrupt Controller + b115 VT8363/8365 [KT133/KM133] PCI Bridge b168 VT8235 PCI Bridge - b188 VT8237 PCI bridge [K8T800 South] + b188 VT8237 PCI bridge [K8T800/K8T890 South] 147b 1407 KV8-MAX3 motherboard b198 VT8237 PCI Bridge -# 32-Bit PCI bus master Ethernet MAC with standard MII interface + b213 VPX/VPX2 I/O APIC Interrupt Controller + c208 PT890 PCI to PCI Bridge Controller + c238 K8T890 PCI to PCI Bridge Controller d104 VT8237 Integrated Fast Ethernet Controller + d208 PT890 PCI to PCI Bridge Controller + d213 VPX/VPX2 PCI to PCI Bridge Controller + d238 K8T890 PCI to PCI Bridge Controller + e208 PT890 PCI to PCI Bridge Controller + e238 K8T890 PCI to PCI Bridge Controller + f208 PT890 PCI to PCI Bridge Controller + f238 K8T890 PCI to PCI Bridge Controller 1107 Stratus Computers 0576 VIA VT82C570MV [Apollo] (Wrong vendor ID!) 1108 Proteon, Inc. @@ -4109,7 +4879,9 @@ 007b FSC Remote Service Controller, mailbox device 007c FSC Remote Service Controller, shared memory device 007d FSC Remote Service Controller, SMIC device - 2102 DSCC4 WAN adapter + 2101 HST SAPHIR V Primary PCI (ISDN/PMx) +# Superfastcom-PCI (Commtech, Inc.) or DSCC4 WAN Adapter + 2102 DSCC4 PEB/PEF 20534 DMA Supported Serial Communication Controller with 4 Channels 2104 Eicon Diva 2.02 compatible passive ISDN card 3142 SIMATIC NET CP 5613A1 (Profibus Adapter) 4021 SIMATIC NET CP 5512 (Profibus and MPI Cardbus Adapter) @@ -4148,7 +4920,7 @@ d301 CPWNA100 (Philips wireless PCMCIA) ec02 SMC 1244TX v3 1114 Atmel Corporation - 0506 802.11b Wireless Network Adaptor (at76c506) + 0506 at76c506 802.11b Wireless Network Adaptor 1115 3D Labs 1116 Data Translation 0022 DT3001 @@ -4289,6 +5061,7 @@ 112f Imaging Technology Inc 0000 MVC IC-PCI 0001 MVC IM-PCI Video frame grabber/processor + 0008 PC-CamLink PCI framegrabber 1130 Computervision 1131 Philips Semiconductors 1561 USB 1.1 Host Controller @@ -4296,23 +5069,88 @@ 3400 SmartPCI56(UCB1500) 56K Modem 5400 TriMedia TM1000/1100 5402 TriMedia TM-1300 + 1244 0f00 Fritz!Card DSL + 5405 TriMedia TM1500 + 5406 TriMedia TM1700 7130 SAA7130 Video Broadcast Decoder - 5168 0138 LiveView FlyVideo 2000 - 7133 SAA713X Audio+video broadcast decoder - 5168 0138 LifeView FlyVideo 3000 - 5168 0212 LifeView FlyTV Platinum mini -# PCI audio and video broadcast decoder (http://www.semiconductors.philips.com/pip/saa7134hl) - 7134 SAA7134 - 7135 SAA7135 Audio+video broadcast decoder + 102b 48d0 Matrox CronosPlus + 1048 226b ELSA EX-VISION 300TV + 1131 2001 10MOONS PCI TV CAPTURE CARD + 1131 2005 Techcom (India) TV Tuner Card (SSD-TV-670) + 1461 050c Nagase Sangyo TransGear 3000TV + 1461 10ff AVerMedia DVD EZMaker + 1461 2108 AverMedia AverTV/305 + 1461 2115 AverMedia AverTV Studio 305 + 153b 1152 Terratec Cinergy 200 TV + 185b c100 Compro VideoMate TV PVR/FM + 185b c901 Videomate DVB-T200 + 5168 0138 LifeView FlyVIDEO2000 + 7133 SAA7133/SAA7135 Video Broadcast Decoder + 0000 4091 Beholder BeholdTV 409 FM + 002b 11bd Pinnacle PCTV Stereo + 1019 4cb5 Elitegroup ECS TVP3XP FM1236 Tuner Card (NTSC,FM) + 1043 0210 FlyTV mini Asus Digimatrix + 1043 4843 ASUS TV-FM 7133 + 1043 4845 TV-FM 7135 + 1043 4862 P7131 Dual + 1131 2001 Proteus Pro [philips reference design] + 1131 2018 Tiger reference design + 1131 4ee9 MonsterTV Mobile + 11bd 002e PCTV 110i (saa7133) + 12ab 0800 PURPLE TV + 1421 1370 Instant TV (saa7135) + 1435 7330 VFG7330 + 1435 7350 VFG7350 + 1461 1044 AVerTVHD MCE A180 + 1461 f31f Avermedia AVerTV GO 007 FM + 1462 6231 TV@Anywhere plus + 1489 0214 LifeView FlyTV Platinum FM + 14c0 1212 LifeView FlyTV Platinum Mini2 + 153b 1160 Cinergy 250 PCI TV + 153b 1162 Terratec Cinergy 400 mobile + 185b c100 VideoMate TV + 4e42 0212 LifeView FlyTV Platinum Mini + 4e42 0502 Typhoon DVB-T Duo Digital/Analog Cardbus + 5168 0306 LifeView FlyDVB-T DUO + 5168 0319 LifeView FlyDVB Trio + 5456 7135 GoTView 7135 PCI + 7134 SAA7134 Video Broadcast Decoder + 1019 4cb4 Elitegroup ECS TVP3XP FM1216 Tuner Card(PAL-BG,FM) + 1043 0210 Digimatrix TV + 1043 4840 ASUS TV-FM 7134 + 1131 2004 EUROPA V3 reference design + 1131 4e85 SKNet Monster TV + 1131 6752 EMPRESS + 11bd 002b Pinnacle PCTV Stereo (saa7134) + 11bd 002d Pinnacle PCTV 300i DVB-T + PAL + 1461 9715 AVerTV Studio 307 + 1461 a70a Avermedia AVerTV 307 + 1461 a70b AverMedia M156 / Medion 2819 + 1461 d6ee Cardbus TV/Radio (E500) + 1471 b7e9 AVerTV Cardbus plus + 153b 1142 Terratec Cinergy 400 TV + 153b 1143 Terratec Cinergy 600 TV + 153b 1158 Terratec Cinergy 600 TV MK3 + 1540 9524 ProVideo PV952 + 16be 0003 Medion 7134 + 185b c200 Compro VideoMate Gold+ Pal + 185b c900 Videomate DVB-T300 + 1894 a006 KNC One TV-Station DVR + 1894 fe01 KNC One TV-Station RDS / Typhoon TV Tuner RDS + 4e42 0138 LifeView FlyVIDEO3000 7145 SAA7145 7146 SAA7146 110a 0000 Fujitsu/Siemens DVB-C card rev1.5 110a ffff Fujitsu/Siemens DVB-C card rev1.5 1131 4f56 KNC1 DVB-S Budget - 1131 4f61 Fujitsu-Siemens Activy DVB-S Budget + 1131 4f60 Fujitsu-Siemens Activy DVB-S Budget Rev AL + 1131 4f61 Activy DVB-S Budget Rev GR +# It has an LSI companion chip. + 1131 5f61 Activy DVB-T Budget 114b 2003 DVRaptor Video Edit/Capture Card 11bd 0006 DV500 Overlay 11bd 000a DV500 Overlay + 11bd 000f DV500 Overlay 13c2 0000 Siemens/Technotrend/Hauppauge DVB card rev1.3 or rev1.5 13c2 0001 Technotrend/Hauppauge DVB card rev1.3 or rev1.6 13c2 0002 Technotrend/Hauppauge DVB card rev2.1 @@ -4328,9 +5166,10 @@ 13c2 100f Technotrend-Budget / Hauppauge WinTV-NOVA-CI DVB card 13c2 1011 Technotrend-Budget / Hauppauge WinTV-NOVA-T DVB card 13c2 1013 SATELCO Multimedia DVB + 13c2 1016 WinTV-NOVA-SE DVB card 13c2 1102 Technotrend/Hauppauge DVB card rev2.1 + 9730 SAA9730 Integrated Multimedia and Peripheral Controller 1132 Mitel Corp. -# This is the new official company name. See disclaimer on www.eicon.com for details! 1133 Eicon Networks Corporation 7901 EiconCard S90 7902 EiconCard S90 @@ -4359,36 +5198,25 @@ e00e Diva ISDN+CT S/T PCI Rev 2 e010 Diva Server BRI-2M PCI 110a 0021 Fujitsu Siemens ISDN S0 - 8001 0014 Diva Server BRI-2M PCI Cornet NQ e011 Diva Server BRI S/T Rev 2 e012 Diva Server 4BRI-8M PCI - 8001 0014 Diva Server 4BRI-8M PCI Cornet NQ e013 Diva Server 4BRI Rev 2 1133 1300 Diva Server V-4BRI-8 1133 e013 Diva Server 4BRI-8M 2.0 PCI - 8001 0014 Diva Server 4BRI-8M 2.0 PCI Cornet NQ e014 Diva Server PRI-30M PCI - 0008 0100 Diva Server PRI-30M PCI - 8001 0014 Diva Server PRI-30M PCI Cornet NQ e015 DIVA Server PRI Rev 2 1133 e015 Diva Server PRI 2.0 PCI - 8001 0014 Diva Server PRI 2.0 PCI Cornet NQ e016 Diva Server Voice 4BRI PCI - 8001 0014 Diva Server PRI Cornet NQ e017 Diva Server Voice 4BRI Rev 2 1133 e017 Diva Server Voice 4BRI-8M 2.0 PCI - 8001 0014 Diva Server Voice 4BRI-8M 2.0 PCI Cornet NQ e018 Diva Server BRI-2M 2.0 PCI 1133 1800 Diva Server V-BRI-2 1133 e018 Diva Server BRI-2M 2.0 PCI - 8001 0014 Diva Server BRI-2M 2.0 PCI Cornet NQ e019 Diva Server Voice PRI Rev 2 1133 e019 Diva Server Voice PRI 2.0 PCI - 8001 0014 Diva Server Voice PRI 2.0 PCI Cornet NQ e01a Diva Server 2FX e01b Diva Server Voice BRI-2M 2.0 PCI 1133 e01b Diva Server Voice BRI-2M 2.0 PCI - 8001 0014 Diva Server Voice BRI-2M 2.0 PCI Cornet NQ e01c Diva Server PRI Rev 3 1133 1c01 Diva Server PRI/E1/T1-8 1133 1c02 Diva Server PRI/T1-24 @@ -4403,21 +5231,15 @@ 1133 1c0b Diva Server V-PRI/T1-24 Cornet NQ 1133 1c0c Diva Server V-PRI/E1-30 Cornet NQ e01e Diva Server 2PRI - 1133 1e00 Diva Server V-2PRI/E1-60 - 1133 1e01 Diva Server V-2PRI/T1-48 - 1133 1e02 Diva Server 2PRI/E1-60 - 1133 1e03 Diva Server 2PRI/T1-48 e020 Diva Server 4PRI - 1133 2000 Diva Server V-4PRI/E1-120 - 1133 2001 Diva Server V-4PRI/T1-96 - 1133 2002 Diva Server 4PRI/E1-120 - 1133 2003 Diva Server 4PRI/T1-96 e024 Diva Server Analog-4P 1133 2400 Diva Server V-Analog-4P 1133 e024 Diva Server Analog-4P e028 Diva Server Analog-8P 1133 2800 Diva Server V-Analog-8P 1133 e028 Diva Server Analog-8P + e02a Diva Server IPM-300 + e02c Diva Server IPM-600 1134 Mercury Computer Systems 0001 Raceway Bridge 0002 Dual PCI to RapidIO Bridge @@ -4466,9 +5288,10 @@ f012 NinjaSCSI-32 Logitec f013 NinjaSCSI-32 Logitec f015 NinjaSCSI-32 Melco + f020 NinjaSCSI-32 Sony PCGA-DVD51 1146 Force Computers 1147 Interface Corp -# Formerly (Schneider & Koch) +# Nee Schneider & Koch 1148 SysKonnect 4000 FDDI Adapter 0e11 b03b Netelligent 100 FDDI DAS Fibre SC @@ -4487,7 +5310,7 @@ 1148 5843 FDDI SK-5843 (SK-NET FDDI-LP64) 1148 5844 FDDI SK-5844 (SK-NET FDDI-LP64 DAS) 4200 Token Ring adapter - 4300 SK-98xx Gigabit Ethernet Server Adapter + 4300 SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link) 1148 9821 SK-9821 Gigabit Ethernet Server Adapter (SK-NET GE-T) 1148 9822 SK-9822 Gigabit Ethernet Server Adapter (SK-NET GE-T dual link) 1148 9841 SK-9841 Gigabit Ethernet Server Adapter (SK-NET GE-LX) @@ -4506,7 +5329,7 @@ 1259 2975 AT-2970SX/2SC Gigabit Ethernet Adapter 1259 2976 AT-2970LX/2SC Gigabit Ethernet Adapter 1259 2977 AT-2970TX/2TX Gigabit Ethernet Adapter - 4320 SK-98xx V2.0 Gigabit Ethernet Adapter + 4320 SysKonnect SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter, PCI64, Fiber ZX/SC 1148 0121 Marvell RDK-8001 Adapter 1148 0221 Marvell RDK-8002 Adapter 1148 0321 Marvell RDK-8003 Adapter @@ -4527,7 +5350,9 @@ 1148 9521 SK-9521 10/100/1000Base-T Adapter 4400 SK-9Dxx Gigabit Ethernet Adapter 4500 SK-9Mxx Gigabit Ethernet Adapter - 9e00 SK-9Exx 10/100/1000Base-T Adapter + 9000 SK-9S21 10/100/1000Base-T Server Adapter, PCI-X, Copper RJ-45 + 9843 [Fujitsu] Gigabit Ethernet + 9e00 SK-9E21D 10/100/1000Base-T Adapter, Copper RJ-45 1148 2100 SK-9E21 Server Adapter 1148 21d0 SK-9E21D 10/100/1000Base-T Adapter 1148 2200 SK-9E22 Server Adapter @@ -4557,7 +5382,6 @@ 000d SyncPort 2-Port (x.25/FR) 0011 AccelePort 8r EIA-232 (IBM) 0012 AccelePort 8r EIA-422 - 0013 AccelePort Xr 0014 AccelePort 8r EIA-422 0015 AccelePort Xem 0016 AccelePort EPC/X @@ -4622,6 +5446,7 @@ 1014 8181 10/100 EtherJet Cardbus Adapter 1014 9181 10/100 EtherJet Cardbus Adapter 115d 0181 Cardbus Ethernet 10/100 + 115d 0182 RealPort2 CardBus Ethernet 10/100 (R2BE-100) 115d 1181 Cardbus Ethernet 10/100 1179 0181 Cardbus Ethernet 10/100 8086 8181 EtherExpress PRO/100 Mobile CardBus 32 Adapter @@ -4663,7 +5488,8 @@ 1164 Advanced Peripherals Technologies 1165 Imagraph Corporation 0001 Motion TPEG Recorder/Player with audio -1166 ServerWorks +# nee ServerWorks +1166 Broadcom 0000 CMIC-LE 0005 CNB20-LE Host Bridge 0006 CNB20HE Host Bridge @@ -4678,27 +5504,42 @@ 0015 CMIC-GC Host Bridge 0016 CMIC-GC Host Bridge 0017 GCNB-LE Host Bridge + 0036 HT1000 PCI/PCI-X bridge 0101 CIOB-X2 PCI-X I/O Bridge + 0104 HT1000 PCI/PCI-X bridge 0110 CIOB-E I/O Bridge with Gigabit Ethernet + 0130 HT1000 PCI-X bridge + 0132 HT1000 PCI-Express bridge 0200 OSB4 South Bridge 0201 CSB5 South Bridge 4c53 1080 CT8 mainboard 0203 CSB6 South Bridge + 1734 1012 Primergy RX300 + 0205 HT1000 Legacy South Bridge 0211 OSB4 IDE Controller 0212 CSB5 IDE Controller 4c53 1080 CT8 mainboard 0213 CSB6 RAID/IDE Controller + 1028 c134 Poweredge SC600 + 1734 1012 Primergy RX300 + 0214 HT1000 Legacy IDE controller 0217 CSB6 IDE Controller + 1028 4134 Poweredge SC600 0220 OSB4/CSB5 OHCI USB Controller 4c53 1080 CT8 mainboard 0221 CSB6 OHCI USB Controller + 1734 1012 Primergy RX300 + 0223 HT1000 USB Controller 0225 CSB5 LPC bridge -# cancelled - 4c53 1080 CT8 mainboard 0227 GCLE-2 Host Bridge + 1734 1012 Primergy RX300 0230 CSB5 LPC bridge 4c53 1080 CT8 mainboard + 0234 HT1000 LPC Bridge 0240 K2 SATA + 0241 RAIDCore RC4000 + 0242 RAIDCore BC4000 + 024a BCM5785 (HT1000) SATA Native SATA Mode 1167 Mutoh Industries Inc 1168 Thine Electronics Inc 1169 Centre for Development of Advanced Computing @@ -4723,13 +5564,16 @@ 1178 Alfa, Inc. afa1 Fast Ethernet Adapter 1179 Toshiba America Info Systems + 0102 Extended IDE Controller 0103 EX-IDE Type-B 0404 DVD Decoder card 0406 Tecra Video Capture device 0407 DVD Decoder card (Version 2) - 0601 601 + 0601 CPU to PCI bridge + 1179 0001 Satellite Pro 0603 ToPIC95 PCI to CardBus Bridge for Notebooks 060a ToPIC95 + 1179 0001 Satellite Pro 060f ToPIC97 0617 ToPIC100 PCI to Cardbus Bridge with ZV Support 0618 CPU to PCI and PCI to ISA bridge @@ -4742,6 +5586,9 @@ 117a A-Trend Technology 117b L G Electronics, Inc. 117c Atto Technology + 0030 Ultra320 SCSI Host Adapter + 117c 8013 ExpressPCI UL4D + 117c 8014 ExpressPCI UL4S 117d Becton & Dickinson 117e T/R Systems 117f Integrated Circuit Systems @@ -4752,18 +5599,38 @@ 144d c006 vpr Matrix 170B4 CardBus bridge 0476 RL5c476 II 1014 0185 ThinkPad A/T/X Series + 1028 0188 Inspiron 6000 laptop + 1043 1967 V6800V + 1043 1987 Asus A4K and Z81K notebooks, possibly others ( mid-2005 machines ) 104d 80df Vaio PCG-FX403 104d 80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 14ef 0220 PCD-RP-220S 0477 RL5c477 0478 RL5c478 1014 0184 ThinkPad A30p (2653-64G) + 0511 R5C511 0522 R5C522 IEEE 1394 Controller 1014 01cf ThinkPad A30p (2653-64G) + 1043 1967 V6800V 0551 R5C551 IEEE 1394 Controller 144d c006 vpr Matrix 170B4 0552 R5C552 IEEE 1394 Controller 1014 0511 ThinkPad A/T/X Series + 1028 0188 Inspiron 6000 laptop + 0554 R5C554 + 0575 R5C575 SD Bus Host Adapter + 0576 R5C576 SD Bus Host Adapter + 0592 R5C592 Memory Stick Bus Host Adapter + 1043 1967 V6800V + 0811 R5C811 + 0822 R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter + 1014 0556 Thinkpad X40 + 1028 0188 Inspiron 6000 laptop + 1028 01a2 Inspiron 9200 + 1043 1967 ASUS V6800V + 0841 R5C841 CardBus/SD/SDIO/MMC/MS/MSPro/xD/IEEE1394 + 0852 xD-Picture Card Controller + 1043 1967 V6800V 1181 Telmatics International 1183 Fujikura Ltd 1184 Forks Inc @@ -4779,6 +5646,7 @@ 1300 RTL8139 Ethernet 1186 1300 DFE-538TX 10/100 Ethernet Adapter 1186 1301 DFE-530TX+ 10/100 Ethernet Adapter + 1186 1303 DFE-528TX 10/100 Fast Ethernet PCI Adapter 1340 DFE-690TXD CardBus PC Card 1541 DFE-680TXD CardBus PC Card 1561 DRP-32TXD Cardbus PC Card @@ -4796,8 +5664,8 @@ 3a13 AirPlus DWL-G520 Wireless PCI Adapter(rev.B) 3a14 AirPremier DWL-AG530 Wireless PCI Adapter 3a63 AirXpert DWL-AG660 Wireless Cardbus Adapter - 3b05 DWL-G650+ CardBus PC Card 4000 DL2000-based Gigabit Ethernet + 4300 DGE-528T Gigabit Ethernet Adapter 4c00 Gigabit Ethernet Adapter 1186 4c00 DGE-530T Gigabit Ethernet Adapter 8400 D-Link DWL-650+ CardBus PC Card @@ -4845,6 +5713,10 @@ 8030 AEC6712S SCSI 8040 AEC6712D SCSI 8050 AEC6712SUW SCSI + 8060 AEC6712 SCSI + 8080 AEC67160 SCSI + 8081 AEC67160S SCSI + 808a AEC67162 2-ch. LVD SCSI 1192 Densan Company Ltd 1193 Zeitnet Inc. 0001 1221 @@ -4877,18 +5749,21 @@ 11a9 InnoSys Inc. 4240 AMCC S933Q Intelligent Serial Card 11aa Actel -# Formerly Galileo Technology, Inc. +# Nee Galileo Technology, Inc. 11ab Marvell Technology Group Ltd. 0146 GT-64010/64010A System Controller 138f W8300 802.11 Adapter (rev 07) 1fa6 Marvell W8300 802.11 Adapter - 4320 Gigabit Ethernet Controller + 1fa7 88W8310 and 88W8000G [Libertas] 802.11g client chipset + 1faa 88w8335 [Libertas] 802.11b/g Wireless + 1385 4e00 WG511 v2 54MBit/ Wireless PC-Card + 4320 88E8001 Gigabit Ethernet Controller 1019 0f38 Marvell 88E8001 Gigabit Ethernet Controller (ECS) 1019 8001 Marvell 88E8001 Gigabit Ethernet Controller (ECS) 1043 173c Marvell 88E8001 Gigabit Ethernet Controller (Asus) 1043 811a Marvell 88E8001 Gigabit Ethernet Controller (Asus) 105b 0c19 Marvell 88E8001 Gigabit Ethernet Controller (Foxconn) - 10b8 b452 SMC EZ Card 1000 (SMC9452TXV.2) + 10b8 b452 EZ Card 1000 (SMC9452TXV.2) 11ab 0121 Marvell RDK-8001 11ab 0321 Marvell RDK-8003 11ab 1021 Marvell RDK-8010 @@ -4900,7 +5775,15 @@ 1695 9025 Marvell 88E8001 Gigabit Ethernet Controller (Epox) 17f2 1c03 Marvell 88E8001 Gigabit Ethernet Controller (Albatron) 270f 2803 Marvell 88E8001 Gigabit Ethernet Controller (Chaintech) - 4350 Fast Ethernet Controller + 4340 88E8021 PCI-X IPMI Gigabit Ethernet Controller + 4341 88E8022 PCI-X IPMI Gigabit Ethernet Controller + 4342 88E8061 PCI-E IPMI Gigabit Ethernet Controller + 4343 88E8062 PCI-E IPMI Gigabit Ethernet Controller + 4344 88E8021 PCI-X IPMI Gigabit Ethernet Controller + 4345 88E8022 PCI-X IPMI Gigabit Ethernet Controller + 4346 88E8061 PCI-E IPMI Gigabit Ethernet Controller + 4347 88E8062 PCI-E IPMI Gigabit Ethernet Controller + 4350 88E8035 PCI-E Fast Ethernet Controller 1179 0001 Marvell 88E8035 Fast Ethernet Controller (Toshiba) 11ab 3521 Marvell RDK-8035 1854 000d Marvell 88E8035 Fast Ethernet Controller (LGE) @@ -4915,7 +5798,7 @@ 1854 001c Marvell 88E8035 Fast Ethernet Controller (LGE) 1854 001e Marvell 88E8035 Fast Ethernet Controller (LGE) 1854 0020 Marvell 88E8035 Fast Ethernet Controller (LGE) - 4351 Fast Ethernet Controller + 4351 88E8036 PCI-E Fast Ethernet Controller 107b 4009 Marvell 88E8036 Fast Ethernet Controller (Wistron) 10f7 8338 Marvell 88E8036 Fast Ethernet Controller (Panasonic) 1179 0001 Marvell 88E8036 Fast Ethernet Controller (Toshiba) @@ -4936,22 +5819,23 @@ 1854 001c Marvell 88E8036 Fast Ethernet Controller (LGE) 1854 001e Marvell 88E8036 Fast Ethernet Controller (LGE) 1854 0020 Marvell 88E8036 Fast Ethernet Controller (LGE) - 4360 Gigabit Ethernet Controller + 4352 88E8038 PCI-E Fast Ethernet Controller + 4360 88E8052 PCI-E ASF Gigabit Ethernet Controller 1043 8134 Marvell 88E8052 Gigabit Ethernet Controller (Asus) 107b 4009 Marvell 88E8052 Gigabit Ethernet Controller (Wistron) 11ab 5221 Marvell RDK-8052 1458 e000 Marvell 88E8052 Gigabit Ethernet Controller (Gigabyte) 1462 052c Marvell 88E8052 Gigabit Ethernet Controller (MSI) 1849 8052 Marvell 88E8052 Gigabit Ethernet Controller (ASRock) - 1940 e000 Marvell 88E8052 Gigabit Ethernet Controller (Gigabyte) a0a0 0509 Marvell 88E8052 Gigabit Ethernet Controller (Aopen) - 4361 Gigabit Ethernet Controller + 4361 88E8050 PCI-E ASF Gigabit Ethernet Controller 107b 3015 Marvell 88E8050 Gigabit Ethernet Controller (Gateway) 11ab 5021 Marvell 88E8050 Gigabit Ethernet Controller (Intel) 8086 3063 D925XCVLK mainboard - 4362 Gigabit Ethernet Controller + 8086 3439 Marvell 88E8050 Gigabit Ethernet Controller (Intel) + 4362 88E8053 PCI-E Gigabit Ethernet Controller 103c 2a0d Marvell 88E8053 Gigabit Ethernet Controller (Asus) - 1043 8142 Marvell 88E8053 Gigabit Ethernet Controller (Asus) + 1043 8142 Marvell 88E8053 Gigabit Ethernet controller PCIe (Asus) 109f 3197 Marvell 88E8053 Gigabit Ethernet Controller (Trigem) 10f7 8338 Marvell 88E8053 Gigabit Ethernet Controller (Panasonic) 10fd a430 Marvell 88E8053 Gigabit Ethernet Controller (SOYO) @@ -4964,7 +5848,7 @@ 1297 c242 Marvell 88E8053 Gigabit Ethernet Controller (Shuttle) 1297 c243 Marvell 88E8053 Gigabit Ethernet Controller (Shuttle) 1297 c244 Marvell 88E8053 Gigabit Ethernet Controller (Shuttle) - 13d1 ac11 Abocom EGE5K - Giga Ethernet Expresscard + 13d1 ac11 EGE5K - Giga Ethernet Expresscard 1458 e000 Marvell 88E8053 Gigabit Ethernet Controller (Gigabyte) 1462 058c Marvell 88E8053 Gigabit Ethernet Controller (MSI) 14c0 0012 Marvell 88E8053 Gigabit Ethernet Controller (Compal) @@ -4988,12 +5872,13 @@ 1854 001f Marvell 88E8053 Gigabit Ethernet Controller (LGE) 1854 0021 Marvell 88E8053 Gigabit Ethernet Controller (LGE) 1854 0022 Marvell 88E8053 Gigabit Ethernet Controller (LGE) - 1940 e000 Marvell 88E8053 Gigabit Ethernet Controller (Gigabyte) 270f 2801 Marvell 88E8053 Gigabit Ethernet Controller (Chaintech) a0a0 0506 Marvell 88E8053 Gigabit Ethernet Controller (Aopen) + 4363 88E8055 PCI-E Gigabit Ethernet Controller 4611 GT-64115 System Controller 4620 GT-64120/64120A/64121A System Controller 4801 GT-48001 + 5005 Belkin F5D5005 Gigabit Desktop Network PCI Card 5040 MV88SX5040 4-port SATA I PCI-X Controller 5041 MV88SX5041 4-port SATA I PCI-X Controller 5080 MV88SX5080 8-port SATA I PCI-X Controller @@ -5001,6 +5886,7 @@ 6041 MV88SX6041 4-port SATA II PCI-X Controller 6081 MV88SX6081 8-port SATA II PCI-X Controller 6460 MV64360/64361/64362 System Controller + 6480 MV64460/64461/64462 System Controller f003 GT-64010 Primary Image Piranha Image Generator 11ac Canon Information Systems Research Aust. 11ad Lite-On Communications Inc @@ -5014,7 +5900,8 @@ 11ad c001 LNE100TX [ver 2.0] 11ae Aztech System Ltd 11af Avid Technology Inc. - 0001 [Cinema] + 0001 Cinema + ee40 Digidesign Audiomedia III 11b0 V3 Semiconductor Inc. 0002 V300PSC 0292 V292PBC [Am29030/40 Bridge] @@ -5036,10 +5923,13 @@ 11bc Network Peripherals Inc 0001 NP-PCI 11bd Pinnacle Systems Inc. + 002e PCTV 40i + bede Pinnacle AV/DV Studio Capture Card 11be International Microcircuits Inc 11bf Astrodesign, Inc. 11c0 Hewlett Packard -11c1 Agere Systems (former Lucent Microelectronics) +# Nee Lucent Microelectronics +11c1 Agere Systems 0440 56k WinModem 1033 8015 LT WinModem 56k Data+Fax+Voice+Dsvd 1033 8047 LT WinModem 56k Data+Fax+Voice+Dsvd @@ -5127,6 +6017,8 @@ 0450 LT WinModem 1033 80a8 Versa Note Vxi 144f 4005 Magnia SG20 + 1468 0450 Evo N600c + 4005 144f LifeBook C Series 0451 LT WinModem 0452 LT WinModem 0453 LT WinModem @@ -5146,11 +6038,12 @@ 048f V.92 56k WinModem 5801 USB 5802 USS-312 USB Controller -# 4 port PCI USB Controller made by Agere (formely Lucent) 5803 USS-344S USB Controller 5811 FW323 8086 524c D865PERL mainboard dead 0800 FireWire Host Bus Adapter + 8110 T8110 H.100/H.110 TDM switch + 12d9 000c E1/T1 PMXc cPCI carrier card ab10 WL60010 Wireless LAN MAC ab11 WL60040 Multimode Wireles LAN MAC 11c1 ab12 WaveLAN 11abg Cardbus card (Model 1102) @@ -5161,6 +6054,7 @@ ab21 Agere Wireless PCI Adapter ab30 Hermes2 Mini-PCI WaveLAN a/b/g 14cd 2012 Hermes2 Mini-PCI WaveLAN a/b/g + ed00 ET-131x PCI-E Ethernet Controller 11c2 Sand Microelectronics 11c3 NEC Corporation 11c4 Document Technologies, Inc @@ -5194,6 +6088,7 @@ 1535 Blackfin BF535 processor 1805 SM56 PCI modem 1889 AD1889 sound chip + 5340 AD1881 sound chip 11d5 Ikon Corporation 0115 10115 0117 10117 @@ -5209,14 +6104,18 @@ 6057 ZR36057PQC Video cutting chipset 1031 7efe DC10 Plus 1031 fc00 MiroVIDEO DC50, Motion JPEG Capture/CODEC Board + 12f8 8a02 Tekram Video Kit 13ca 4231 JPEG/TV Card 6120 ZR36120 1328 f001 Cinemaster C DVD Decoder + 13c2 0000 MediaFocus Satellite TV Card + 1de1 9fff Video Kit C210 11df New Wave PDG 11e0 Cray Communications A/S 11e1 GEC Plessey Semi Inc. 11e2 Samsung Information Systems America 11e3 Quicklogic Corporation + 0001 COM-ON-AIR Dosch&Amand DECT 5030 PC Watchdog 11e4 Second Wave Inc 11e5 IIX Consulting @@ -5283,6 +6182,7 @@ 0805 RocketPort UPCI 8 port w/octa cable 080c RocketModem III 8 port 080d RocketModem III 4 port + 0812 RocketPort UPCI Plus 8 port RS422 0903 RocketPort Compact PCI 16 port w/external I/F 8015 RocketPort 4-port UART 16954 11ff Scion Corporation @@ -5334,25 +6234,29 @@ 1217 O2 Micro, Inc. 6729 OZ6729 673a OZ6730 - 6832 OZ6832/6833 Cardbus Controller - 6836 OZ6836/6860 Cardbus Controller - 6872 OZ6812 Cardbus Controller - 6925 OZ6922 Cardbus Controller - 6933 OZ6933 Cardbus Controller + 6832 OZ6832/6833 CardBus Controller + 6836 OZ6836/6860 CardBus Controller + 6872 OZ6812 CardBus Controller + 6925 OZ6922 CardBus Controller + 6933 OZ6933/711E1 CardBus/SmartCardBus Controller 1025 1016 Travelmate 612 TX - 6972 OZ6912 Cardbus Controller + 6972 OZ601/6912/711E0 CardBus/SmartCardBus Controller 1014 020c ThinkPad R30 1179 0001 Magnia Z310 - 7110 OZ711Mx MultiMediaBay Accelerator - 103c 0890 NC6000 laptop - 7112 OZ711EC1/M1 SmartCardBus MultiMediaBay Controller + 7110 OZ711Mx 4-in-1 MemoryCardBus Accelerator + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop + 7112 OZ711EC1/M1 SmartCardBus/MemoryCardBus Controller 7113 OZ711EC1 SmartCardBus Controller - 7114 OZ711M1 SmartCardBus MultiMediaBay Controller + 7114 OZ711M1/MC1 4-in-1 MemoryCardBus Controller + 7134 OZ711MP1/MS1 MemoryCardBus Controller 71e2 OZ711E2 SmartCardBus Controller - 7212 OZ711M2 SmartCardBus MultiMediaBay Controller + 7212 OZ711M2 4-in-1 MemoryCardBus Controller 7213 OZ6933E CardBus Controller - 7223 OZ711M3 SmartCardBus MultiMediaBay Controller - 103c 0890 NC6000 laptop + 7223 OZ711M3/MC3 4-in-1 MemoryCardBus Controller + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop + 7233 OZ711MP3/MS3 4-in-1 MemoryCardBus Controller 1218 Hybricon Corp. 1219 First Virtual Corporation 121a 3Dfx Interactive, Inc. @@ -5391,6 +6295,7 @@ 121a 004e Voodoo3 AGP 121a 0051 Voodoo3 AGP 121a 0052 Voodoo3 AGP + 121a 0057 Voodoo3 3000 PCI 121a 0060 Voodoo3 3500 TV (NTSC) 121a 0061 Voodoo3 3500 TV (PAL) 121a 0062 Voodoo3 3500 TV (SECAM) @@ -5422,6 +6327,7 @@ 1225 Power I/O, Inc. 1227 Tech-Source 0006 Raptor GFX 8P + 0023 Raptor GFX [1100T] 1228 Norsk Elektro Optikk A/S 1229 Data Kinesis Inc. 122a Integrated Telecom @@ -5440,6 +6346,7 @@ 1231 Woodward McCoach, Inc. 1232 GPT Limited 1233 Bus-Tech, Inc. +# Also Bochs uses this for virtual VGA... 1234 Technical Corp. 1235 Risq Modular Systems, Inc. 1236 Sigma Designs Corporation @@ -5461,6 +6368,8 @@ 8120 E4? 11bd 0006 DV500 E4 11bd 000a DV500 E4 + 11bd 000f DV500 E4 + 1809 0016 Emuzed MAUI-III PCI PVR FM TV 8888 Cinemaster C 3.0 DVD Decoder 1002 0001 Cinemaster C 3.0 DVD Decoder 1002 0002 Cinemaster C 3.0 DVD Decoder @@ -5502,7 +6411,7 @@ 0003 EasyIO 0004 EasyConnection/RA 124e Cylink -124f Infotrend Technology, Inc. +124f Infortrend Technology, Inc. 0041 IFT-2000 Series RAID Controller 1250 Hitachi Microcomputer System Ltd 1251 VLSI Solutions Oy @@ -5527,6 +6436,7 @@ 125a ABB Power Systems 125b Asix Electronics Corporation 1400 ALFA GFC2204 Fast Ethernet + 1186 1100 AX8814X Based PCI Fast Ethernet Adapter 125c Aurora Technologies, Inc. 0101 Saturn 4520P 0640 Aries 16000P @@ -5539,6 +6449,7 @@ 1969 ES1969 Solo-1 Audiodrive 1014 0166 ES1969 SOLO-1 AudioDrive on IBM Aptiva Mainboard 125d 8888 Solo-1 Audio Adapter + 153b 111b Terratec 128i PCI 1978 ES1978 Maestro 2E 0e11 b112 Armada M700/E500 1033 803c ES1978 Maestro-2E Audiodrive @@ -5546,6 +6457,7 @@ 1092 4000 Monster Sound MX400 1179 0001 ES1978 Maestro-2E Audiodrive 1988 ES1988 Allegro-1 + 0e11 0098 Evo N600c 1092 4100 Sonic Impact S100 125d 1988 ESS Allegro-1 Audiodrive 1989 ESS Modem @@ -5582,20 +6494,25 @@ 1737 3874 WMP11 Wireless 802.11b PCI Adapter 8086 2513 Wireless 802.11b MiniPCI Adapter 3886 ISL3886 [Prism Javelin/Prism Xbow] - 17cf 0037 Z-Com XG-901 and clones Wireless Adapter - 3890 Intersil ISL3890 [Prism GT/Prism Duette] + 17cf 0037 XG-901 and clones Wireless Adapter + 3890 ISL3890 [Prism GT/Prism Duette]/ISL3886 [Prism Javelin/Prism Xbow] 10b8 2802 SMC2802W Wireless PCI Adapter 10b8 2835 SMC2835W Wireless Cardbus Adapter 10b8 a835 SMC2835W V2 Wireless Cardbus Adapter - 1113 ee03 SMC2802W V2 Wireless PCI Adapter + 1113 4203 WN4201B + 1113 ee03 SMC2802W V2 Wireless PCI Adapter [ISL3886] + 1113 ee08 SMC2835W V3 EU Wireless Cardbus Adapter 1186 3202 DWL-G650 A1 Wireless Adapter 1259 c104 CG-WLCB54GT Wireless Adapter 1385 4800 WG511 Wireless Adapter 16a5 1605 ALLNET ALL0271 Wireless PCI Adapter - 17cf 0014 Z-Com XG-600 and clones Wireless Adapter - 17cf 0020 Z-Com XG-900 and clones Wireless Adapter + 17cf 0014 XG-600 and clones Wireless Adapter + 17cf 0020 XG-900 and clones Wireless Adapter 8130 HMP8130 NTSC/PAL Video Decoder 8131 HMP8131 NTSC/PAL Video Decoder +# This is probably more likely a HW fault, but I am keeping it for now --mj + ffff ISL3886IK + 1260 0000 Senao 3054MP+ (J) mini-PCI WLAN 802.11g adapter 1261 Matsushita-Kotobuki Electronics Industries, Ltd. 1262 ES Computer Company, Ltd. 1263 Sonic Solutions @@ -5618,7 +6535,8 @@ 126d Splash Technology, Inc. 126e Sumitomo Metal Industries, Ltd. 126f Silicon Motion, Inc. - 0501 SM501 VoyagerGX + 0501 SM501 VoyagerGX Rev. AA + 0510 SM501 VoyagerGX Rev. B 0710 SM710 LynxEM 0712 SM712 LynxEM+ 0720 SM720 Lynx3DM @@ -5641,6 +6559,7 @@ 1042 1854 Tazer 107b 8054 Tabor2 1274 1371 Creative Sound Blaster AudioPCI64V, AudioPCI128 + 1274 8001 CT4751 board 1462 6470 ES1371, ES1373 AudioPCI On Motherboard MS-6147 1.1A 1462 6560 ES1371, ES1373 AudioPCI On Motherboard MS-6156 1.10 1462 6630 ES1371, ES1373 AudioPCI On Motherboard MS-6163BX 1.0A @@ -5680,6 +6599,7 @@ 8086 425a ES1371, ES1373 AudioPCI On Motherboard BZ440ZX 8086 4341 ES1371, ES1373 AudioPCI On Motherboard Cayman 8086 4343 ES1371, ES1373 AudioPCI On Motherboard Cape Cod + 8086 4541 D815EEA Motherboard 8086 4649 ES1371, ES1373 AudioPCI On Motherboard Fire Island 8086 464a ES1371, ES1373 AudioPCI On Motherboard FJ440ZX 8086 4d4f ES1371, ES1373 AudioPCI On Motherboard Montreal @@ -5706,6 +6626,8 @@ 0701 TPE3/TM3 PowerPC Node 0710 TPE5 PowerPC PCI board 1279 Transmeta Corporation + 0060 TM8000 Northbridge + 0061 TM8000 AGP bridge 0295 Northbridge 0395 LongRun Northbridge 0396 SDRAM controller @@ -5737,6 +6659,7 @@ 1048 1500 MicroLink 56k Modem 10cf 1059 Fujitsu 229-DFRT 1005 HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem + 1005 127a AOpen FM56-P 1033 8029 229-DFSV 1033 8054 Modem 10cf 103c Fujitsu @@ -5838,6 +6761,8 @@ 9132 Ethernet 100/10 MBit 1283 Integrated Technology Express, Inc. 673a IT8330G + 8211 ITE 8211F Single Channel UDMA 133 (ASUS 8211 (ITE IT8212 ATA RAID Controller)) + 1043 8138 P5GD1-VW Mainboard 8212 IT/ITE8212 Dual channel ATA RAID controller (PCI version seems to be IT8212, embedded seems to be ITE8212) 1283 0001 IT/ITE8212 Dual channel ATA RAID controller 8330 IT8330G @@ -5919,7 +6844,8 @@ 12b6 Natural Microsystems 12b7 Cognex Modular Vision Systems Div. - Acumen Inc. 12b8 Korg -12b9 3Com Corp, Modem Division (formerly US Robotics) +# Nee US Robotics +12b9 3Com Corp, Modem Division 1006 WinModem 12b9 005c USR 56k Internal Voice WinModem (Model 3472) 12b9 005e USR 56k Internal WinModem (Models 662975) @@ -5954,6 +6880,34 @@ 0058 PCI NE2K Ethernet 5598 PCI NE2K Ethernet 12c4 Connect Tech Inc + 0001 Blue HEAT/PCI 8 (RS232/CL/RJ11) + 0002 Blue HEAT/PCI 4 (RS232) + 0003 Blue HEAT/PCI 2 (RS232) + 0004 Blue HEAT/PCI 8 (UNIV, RS485) + 0005 Blue HEAT/PCI 4+4/6+2 (UNIV, RS232/485) + 0006 Blue HEAT/PCI 4 (OPTO, RS485) + 0007 Blue HEAT/PCI 2+2 (RS232/485) + 0008 Blue HEAT/PCI 2 (OPTO, Tx, RS485) + 0009 Blue HEAT/PCI 2+6 (RS232/485) + 000a Blue HEAT/PCI 8 (Tx, RS485) + 000b Blue HEAT/PCI 4 (Tx, RS485) + 000c Blue HEAT/PCI 2 (20 MHz, RS485) + 000d Blue HEAT/PCI 2 PTM + 0100 NT960/PCI + 0201 cPCI Titan - 2 Port + 0202 cPCI Titan - 4 Port + 0300 CTI PCI UART 2 (RS232) + 0301 CTI PCI UART 4 (RS232) + 0302 CTI PCI UART 8 (RS232) + 0310 CTI PCI UART 1+1 (RS232/485) + 0311 CTI PCI UART 2+2 (RS232/485) + 0312 CTI PCI UART 4+4 (RS232/485) + 0320 CTI PCI UART 2 + 0321 CTI PCI UART 4 + 0322 CTI PCI UART 8 + 0330 CTI PCI UART 2 (RS485) + 0331 CTI PCI UART 4 (RS485) + 0332 CTI PCI UART 8 (RS485) 12c5 Picture Elements Incorporated 007e Imaging/Scanning Subsystem Engine 007f Imaging/Scanning Subsystem Engine @@ -6004,9 +6958,12 @@ 12d4 Ulticom (Formerly DGM&S) 0200 T1 Card 12d5 Equator Technologies Inc + 0003 BSP16 + 1000 BSP15 12d6 Analogic Corp 12d7 Biotronic SRL 12d8 Pericom Semiconductor + 8150 PCI to PCI Bridge 12d9 Aculab PLC 0002 PCI Prosody 0004 cPCI Prosody @@ -6050,7 +7007,6 @@ 1092 3002 Monster Sound II 1092 3003 Monster Sound II 1092 3004 Monster Sound II - 12eb 0001 AU8830 Vortex 3D Digital Audio Processor 12eb 0002 AU8830 Vortex 3D Digital Audio Processor 12eb 0088 AU8830 Vortex 3D Digital Audio Processor 144d 3510 AU8830 Vortex 3D Digital Audio Processor @@ -6083,6 +7039,20 @@ 0002 VideoMaker 12f9 Four Fold Ltd 12fb Spectrum Signal Processing + 0001 PMC-MAI + 00f5 F5 Dakar + 02ad PMC-2MAI + 2adc ePMC-2ADC + 3100 PRO-3100 + 3500 PRO-3500 + 4d4f Modena + 8120 ePMC-8120 + da62 Daytona C6201 PCI (Hurricane) + db62 Ingliston XBIF + dc62 Ingliston PLX9054 + dd62 Ingliston JTAG/ISP + eddc ePMC-MSDDC + fa01 ePMC-FPGA 12fc Capital Equipment Corp 12fd I2S 12fe ESD Electronic System Design GmbH @@ -6093,7 +7063,7 @@ 1304 Juniper Networks 1305 Netphone, Inc 1306 Duet Technologies -# Formerly ComputerBoards +# Nee ComputerBoards 1307 Measurement Computing 0001 PCI-DAS1602/16 000b PCI-DIO48H @@ -6132,6 +7102,7 @@ 004c PCI-DAS1000 004d PCI-QUAD04 0052 PCI-DAS4020/12 + 0054 PCI-DIO96 005e PCI-DAS6025 1308 Jato Technologies Inc. 0001 NetCelerator Adapter @@ -6153,6 +7124,7 @@ 0985 NC100 Network Everywhere Fast Ethernet 10/100 1985 21x4x DEC-Tulip compatible 10/100 Ethernet 2850 HSP MicroModem 56 + 5120 ADMtek ADM5120 OpenGate System-on-Chip 8201 ADMtek ADM8211 802.11b Wireless Interface 10b8 2635 SMC2635W 802.11b (11Mbps) wireless lan pcmcia (cardbus) card 1317 8201 SMC2635W 802.11b (11mbps) wireless lan pcmcia (cardbus) card @@ -6162,7 +7134,9 @@ 0911 GNIC-II PCI Gigabit Ethernet [Hamachi] 1319 Fortemedia, Inc 0801 Xwave QS3000A [FM801] + 1319 1319 FM801 PCI Audio 0802 Xwave QS3000A [FM801 game port] + 1319 1319 FM801 PCI Joystick 1000 FM801 PCI Audio 1001 FM801 PCI Joystick 131a Finisar Corp. @@ -6233,6 +7207,7 @@ 1332 Micro Memory 5415 MM-5415CN PCI Memory Module with Battery Backup 5425 MM-5425CN PCI 64/66 Memory Module with Battery Backup + 6140 MM-6140D 1334 Redcreek Communications, Inc 1335 Videomail, Inc 1337 Third Planet Publishing @@ -6316,7 +7291,8 @@ 0201 GPS167PCI GPS Receiver 0202 GPS168PCI GPS Receiver 0203 GPS169PCI GPS Receiver - 0301 TCR510PCI IRIG Receiver + 0301 TCR510PCI IRIG Timecode Reader + 0302 TCR167PCI IRIG Timecode Reader 1361 Soliton Systems K.K. 1362 Fujifacom Corporation 1363 Phoenix Technology Ltd @@ -6337,7 +7313,33 @@ 434e GigaCard Network Adapter 1371 434e N-Way PCI-Bus Giga-Card 1000/100/10Mbps(L) 1373 Silicon Vision Inc -1374 Silicom Ltd +1374 Silicom Ltd. + 0024 Silicom Dual port Giga Ethernet BGE Bypass Server Adapter + 0025 Silicom Quad port Giga Ethernet BGE Bypass Server Adapter + 0026 Silicom Dual port Fiber Giga Ethernet 546 Bypass Server Adapter + 0027 Silicom Dual port Fiber LX Giga Ethernet 546 Bypass Server Adapter + 0029 Silicom Dual port Copper Giga Ethernet 546GB Bypass Server Adapter + 002a Silicom Dual port Fiber Giga Ethernet 546 TAP/Bypass Server Adapter +# PXE2TBI + 002b Silicom Dual port Copper Fast Ethernet 546 TAP/Bypass Server Adapter +# PXG4BPI + 002c Silicom Quad port Copper Giga Ethernet 546GB Bypass Server Adapter +# PXG4BPFI + 002d Silicom Quad port Fiber-SX Giga Ethernet 546GB Bypass Server Adapter +# PXG4BPFI-LX + 002e Silicom Quad port Fiber-LX Giga Ethernet 546GB Bypass Server Adapter +# PXG2BPFIL + 002f Silicom Dual port Fiber-SX Giga Ethernet 546GB Low profile Bypass Server Adapter + 0030 Silicom Dual port Fiber-LX Giga Ethernet 546GB Low profile Bypass Server Adapter + 0031 Silicom Quad port Copper Giga Ethernet PCI-E Bypass Server Adapter + 0032 Silicom Dual port Copper Fast Ethernet 546 TAP/Bypass Server Adapter + 0034 Silicom Dual port Copper Giga Ethernet PCI-E BGE Bypass Server Adapter + 0035 Silicom Quad port Copper Giga Ethernet PCI-E BGE Bypass Server Adapter + 0036 Silicom Dual port Fiber Giga Ethernet PCI-E BGE Bypass Server Adapter + 0037 Silicom Quad port Copper Ethernet PCI-E Intel based Bypass Server Adapter + 0038 Silicom Quad port Copper Ethernet PCI-E Intel based Bypass Server Adapter + 0039 Silicom Dual port Fiber-SX Ethernet PCI-E Intel based Bypass Server Adapter + 003a Silicom Dual port Fiber-LX Ethernet PCI-E Intel based Bypass Server Adapter 1375 Argosystems Inc 1376 LMC 1377 Electronic Equipment Production & Distribution GmbH @@ -6354,23 +7356,40 @@ 1381 Brains Co. Ltd 1382 Marian - Electronic & Software 0001 ARC88 audio recording card - 2088 Marc-8 MIDI 8 channel audio card + 2008 Prodif 96 Pro sound system + 2088 Marc 8 Midi sound system + 20c8 Marc A sound system + 4008 Marc 2 sound system + 4010 Marc 2 Pro sound system + 4048 Marc 4 MIDI sound system + 4088 Marc 4 Digi sound system + 4248 Marc X sound system + 4424 TRACE D4 Sound System 1383 Controlnet Inc 1384 Reality Simulation Systems Inc 1385 Netgear -# Note: This lists as Atheros Communications, Inc. AR5212 802.11abg NIC because of Madwifi - 0013 WG311T + 0013 WG311T 108 Mbps Wireless PCI Adapter + 311a GA511 Gigabit Ethernet 4100 802.11b Wireless Adapter (MA301) 4105 MA311 802.11b wireless adapter 4400 WAG511 802.11a/b/g Dual Band Wireless PC Card 4600 WAG511 802.11a/b/g Dual Band Wireless PC Card 4601 WAG511 802.11a/b/g Dual Band Wireless PC Card 4610 WAG511 802.11a/b/g Dual Band Wireless PC Card + 4800 WG511(v1) 54 Mbps Wireless PC Card + 4900 WG311v1 54 Mbps Wireless PCI Adapter 4a00 WAG311 802.11a/g Wireless PCI Adapter + 4b00 WG511T 108 Mbps Wireless PC Card 4c00 WG311v2 54 Mbps Wireless PCI Adapter + 4d00 WG311T 108 Mbps Wireless PCI Adapter + 4e00 WG511v2 54 Mbps Wireless PC Card + 4f00 WG511U Double 108 Mbps Wireless PC Card + 5200 GA511 Gigabit PC Card 620a GA620 Gigabit Ethernet 622a GA622 630a GA630 Gigabit Ethernet + 6b00 WG311v3 54 Mbps Wireless PCI Adapter + 6d00 WPNT511 RangeMax™ 240 Mbps Wireless PC Card f004 FA310TX 1386 Video Domain Technologies 1387 Systran Corp @@ -6399,7 +7418,11 @@ 1395 Ambicom Inc 1396 Cipher Systems Inc 1397 Cologne Chip Designs GmbH + 08b4 ISDN network Controller [HFC-4S] + 16b8 ISDN network Controller [HFC-8S] 2bd0 ISDN network controller [HFC-PCI] + 0675 1704 ISDN Adapter (PCI Bus, D, C) + 0675 1708 ISDN Adapter (PCI Bus, D, C, ACPI) 1397 2bd0 ISDN Board e4bf 1000 CI1-1-Harp 1398 Clarion co. Ltd @@ -6425,11 +7448,15 @@ 0016 8065 Security Processor 0017 8165 Security Processor 0018 8154 Security Processor + 001d 7956 Security Processor + 0020 7955 Security Processor + 0026 8155 Security Processor 13a4 Rascom Inc 13a5 Audio Digital Imaging Inc 13a6 Videonics Inc 13a7 Teles AG 13a8 Exar Corp. + 0152 XR17C/D152 Dual PCI UART 0154 XR17C154 Quad UART 0158 XR17C158 Octal UART 13a9 Siemens Medical Systems, Ultrasound Group @@ -6461,10 +7488,11 @@ 0030 SyncLink Multiport Adapter 0210 SyncLink Adapter v2 13c1 3ware Inc - 1000 3ware Inc 3ware 5xxx/6xxx-series PATA-RAID - 1001 3ware Inc 3ware 7xxx/8xxx-series PATA/SATA-RAID - 13c1 1001 3ware Inc 3ware 7xxx/8xxx-series PATA/SATA-RAID - 1002 3ware Inc 3ware 9xxx-series SATA-RAID + 1000 5xxx/6xxx-series PATA-RAID + 1001 7xxx/8xxx-series PATA/SATA-RAID + 13c1 1001 7xxx/8xxx-series PATA/SATA-RAID + 1002 9xxx-series SATA-RAID + 1003 9550SX SATA-RAID 13c2 Technotrend Systemtechnik GmbH 13c3 Janz Computer AG 13c4 Phase Metrics @@ -6522,8 +7550,10 @@ 13ed Raytheion E-Systems 13ee Hayes Microcomputer Products Inc 13ef Coppercom Inc -13f0 Sundance Technology Inc +13f0 Sundance Technology Inc / IC Plus Corp + 0200 IC Plus IP100A Integrated 10/100 Ethernet MAC + PHY 0201 ST201 Sundance Ethernet + 1023 IC Plus IP1000 Family Gigabit Ethernet 13f1 Oce' - Technologies B.V. 13f2 Ford Microelectronics Inc 13f3 Mcdata Corporation @@ -6552,8 +7582,9 @@ 13fc Computer Peripherals International 13fd Micro Science Inc 13fe Advantech Co. Ltd - 1240 PCI-1240 4-channel stepper motor controller card w. Nova Electronics MCX314 - 1600 PCI-1612 4-port RS-232/422/485 PCI Communication Card + 1240 PCI-1240 4-channel stepper motor controller card + 1600 PCI-1612 4-port RS-232/422/485 PCI communication card + 1733 PCI-1733 32-channel isolated digital input card 1752 PCI-1752 1754 PCI-1754 1756 PCI-1756 @@ -6570,6 +7601,8 @@ 0100 Lava Dual Serial 0101 Lava Quatro A 0102 Lava Quatro B + 0110 Lava DSerial-PCI Port A + 0111 Lava DSerial-PCI Port B 0120 Quattro-PCI A 0121 Quattro-PCI B 0180 Lava Octo A @@ -6597,25 +7630,56 @@ 140f Salient Systems Corp 1410 Midas lab Inc 1411 Ikos Systems Inc -# formerly IC Ensemble Inc. +# Nee IC Ensemble Inc. 1412 VIA Technologies Inc. 1712 ICE1712 [Envy24] PCI Multi-Channel I/O Controller + 1412 1712 Hoontech ST Audio DSP 24 + 1412 d630 M-Audio Delta 1010 + 1412 d631 M-Audio Delta DiO + 1412 d632 M-Audio Delta 66 + 1412 d633 M-Audio Delta 44 + 1412 d634 M-Audio Delta Audiophile + 1412 d635 M-Audio Delta TDIF + 1412 d637 M-Audio Delta RBUS 1412 d638 M-Audio Delta 410 + 1412 d63b M-Audio Delta 1010LT + 1412 d63c Digigram VX442 + 1416 1712 Hoontech ST Audio DSP 24 Media 7.1 + 153b 1115 EWS88 MT + 153b 1125 EWS88 MT (Master) + 153b 112b EWS88 D + 153b 112c EWS88 D (Master) + 153b 1130 EWX 24/96 + 153b 1138 DMX 6fire 24/96 + 153b 1151 PHASE88 + 16ce 1040 Edirol DA-2496 1724 VT1720/24 [Envy24PT/HT] PCI Multi-Channel Audio Controller + 1412 1724 Albatron PX865PE 7.1 + 1412 3630 M-Audio Revolution 7.1 + 1412 3631 M-Audio Revolution 5.1 + 153b 1145 Aureon 7.1 Space + 153b 1147 Aureon 5.1 Sky + 153b 1153 Aureon 7.1 Universe + 270f f641 ZNF3-150 + 270f f645 ZNF3-250 1413 Addonics 1414 Microsoft Corporation 1415 Oxford Semiconductor Ltd 8403 VScom 011H-EP1 1 port parallel adaptor 9501 OX16PCI954 (Quad 16950 UART) function 0 131f 2050 CyberPro (4-port) +# Model IO1085, Part No: JJ-P46012 + 131f 2051 CyberSerial 4S Plus 15ed 2000 MCCR Serial p0-3 of 8 15ed 2001 MCCR Serial p0-3 of 16 950a EXSYS EX-41092 Dual 16950 Serial adapter 950b OXCB950 Cardbus 16950 UART + 9510 OX16PCI954 (Quad 16950 UART) function 1 (Disabled) 9511 OX16PCI954 (Quad 16950 UART) function 1 15ed 2000 MCCR Serial p4-7 of 8 15ed 2001 MCCR Serial p4-15 of 16 9521 OX16PCI952 (Dual 16950 UART) + 9523 OX16PCI952 Integrated Parallel Port 1416 Multiwave Innovation pte Ltd 1417 Convergenet Technologies Inc 1418 Kyushu electronics systems Inc @@ -6633,6 +7697,7 @@ 1423 Custom Technology Corp. 1424 Videoserver Connections 1425 Chelsio Communications Inc + 000b T210 Protocol Engine 1426 Storage Technology Corp. 1427 Better On-Line Solutions 1428 Edec Co Ltd @@ -6643,13 +7708,15 @@ 142d Pix stream Inc 142e Vitec Multimedia 4020 VM2-2 [Video Maker 2] MPEG1/2 Encoder + 4337 VM2-2-C7 [Video Maker 2 rev. C7] MPEG1/2 Encoder 142f Radicom Research Inc 1430 ITT Aerospace/Communications Division 1431 Gilat Satellite Networks 1432 Edimax Computer Co. 9130 RTL81xx Fast Ethernet 1433 Eltec Elektronik GmbH -1435 Real Time Devices US Inc. +# Nee Real Time Devices US Inc. +1435 RTD Embedded Technologies, Inc. 1436 CIS Technology Inc 1437 Nissin Inc Co 1438 Atmel-dream @@ -6695,6 +7762,8 @@ 1456 Advanced Hardware Architectures 1457 Nuera Communications Inc 1458 Giga-byte Technology + 0c11 K8NS Pro Mainboard + e911 GN-WIAG02 1459 DOOIN Electronics 145a Escalate Networks Inc 145b PRAIM SRL @@ -6705,12 +7774,18 @@ 0001 NextMove PCI 1460 DYNARC INC 1461 Avermedia Technologies Inc + f436 AVerTV Hybrid+FM 1462 Micro-Star International Co., Ltd. + 5501 nVidia NV15DDR [GeForce2 Ti] +# MSI CB54G Wireless PC Card that seems to use the Broadcom 4306 Chipset + 6819 Broadcom Corporation BCM4306 802.11b/g Wireless LAN Controller [MSI CB54G] 6825 PCI Card wireless 11g [PC54G] + 6834 RaLink RT2500 802.11g [PC54G2] 8725 NVIDIA NV25 [GeForce4 Ti 4600] VGA Adapter -# MSI G4Ti4800, 128MB DDR SDRAM, TV-Out, DVI-I 9000 NVIDIA NV28 [GeForce4 Ti 4800] VGA Adapter + 9110 GeFORCE FX5200 9119 NVIDIA NV31 [GeForce FX 5600XT] VGA Adapter + 9591 nVidia Corporation NV36 [GeForce FX 5700LE] 1463 Fast Corporation 1464 Interactive Circuits & Systems Ltd 1465 GN NETTEST Telecom DIV. @@ -6766,7 +7841,11 @@ 1495 TOKAI Communications Industry Co. Ltd 1496 JOYTECH Computer Co., Ltd. 1497 SMA Regelsysteme GmBH + 1497 SMA Technologie AG 1498 TEWS Datentechnik GmBH + 0330 TPMC816 2 Channel CAN bus controller. + 0385 TPMC901 Extended CAN bus with 2/4/6 CAN controller + 21cd TCP461 CompactPCI 8 Channel Serial Interface RS232/RS422 30c8 TPCI200 1499 EMTEC CO., Ltd 149a ANDOR Technology Ltd @@ -6876,6 +7955,7 @@ 14da National Aerospace Laboratories 14db AFAVLAB Technology Inc 2120 TK9902 + 2182 AFAVLAB Technology Inc. 8-port serial card 14dc Amplicon Liveline Ltd 0000 PCI230 0001 PCI242 @@ -6904,6 +7984,8 @@ 080f Sentry5 DDR/SDR RAM Controller 0811 Sentry5 External Interface Core 0816 BCM3302 Sentry5 MIPS32 CPU + 1600 NetXtreme BCM5752 Gigabit Ethernet PCI Express + 1601 NetXtreme BCM5752M Gigabit Ethernet PCI Express 1644 NetXtreme BCM5700 Gigabit Ethernet 1014 0277 Broadcom Vigil B5700 1000Base-T 1028 00d1 Broadcom BCM5700 @@ -6930,13 +8012,14 @@ 0e11 009a NC7770 Gigabit Server Adapter (PCI-X, 10/100/1000-T) 0e11 00c1 NC6770 Gigabit Server Adapter (PCI-X, 1000-SX) 1028 0121 Broadcom BCM5701 1000Base-T - 103c 128a HP 1000Base-T (PCI) [A7061A] - 103c 128b HP 1000Base-SX (PCI) [A7073A] - 103c 12a4 HP Core Lan 1000Base-T - 103c 12c1 HP IOX Core Lan 1000Base-T [A7109AX] - 10a9 8010 SGI IO9 Gigabit Ethernet (Copper) - 10a9 8011 SGI Gigabit Ethernet (Copper) - 10a9 8012 SGI Gigabit Ethernet (Fiber) + 103c 128a 1000Base-T (PCI) [A7061A] + 103c 128b 1000Base-SX (PCI) [A7073A] + 103c 12a4 Core Lan 1000Base-T + 103c 12c1 IOX Core Lan 1000Base-T [A7109AX] + 103c 1300 Core LAN/SCSI Combo [A6794A] + 10a9 8010 IO9/IO10 Gigabit Ethernet (Copper) + 10a9 8011 Gigabit Ethernet (Copper) + 10a9 8012 Gigabit Ethernet (Fiber) 10b7 1004 3C996-SX 1000Base-SX 10b7 1006 3C996B-T 1000Base-T 10b7 1007 3C1000-T 1000Base-T @@ -6967,26 +8050,47 @@ 10b7 2000 3C998-T Dual Port 10/100/1000 PCI-X 10b7 3000 3C999-T Quad Port 10/100/1000 PCI-X 1166 1648 NetXtreme CIOB-E 1000Base-T + 1734 100b Primergy RX300 164a NetXtreme II BCM5706 Gigabit Ethernet + 103c 3101 NC370T Multifunction Gigabit Server Adapter + 164c NetXtreme II BCM5708 Gigabit Ethernet 164d NetXtreme BCM5702FE Gigabit Ethernet 1653 NetXtreme BCM5705 Gigabit Ethernet 0e11 00e3 NC7761 Gigabit Server Adapter 1654 NetXtreme BCM5705_2 Gigabit Ethernet 0e11 00e3 NC7761 Gigabit Server Adapter 103c 3100 NC1020 HP ProLiant Gigabit Server Adapter 32 PCI + 103c 3226 NC150T 4-port Gigabit Combo Switch & Adapter 1659 NetXtreme BCM5721 Gigabit Ethernet PCI Express + 1014 02c6 eServer xSeries server mainboard + 103c 7031 NC320T PCIe Gigabit Server Adapter + 103c 7032 NC320i PCIe Gigabit Server Adapter + 1734 1061 Primergy RX300 S2 165d NetXtreme BCM5705M Gigabit Ethernet + 1028 865d Latitude D400 165e NetXtreme BCM5705M_2 Gigabit Ethernet - 103c 0890 NC6000 laptop + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop + 103c 099c nx6110/nc6120 + 1668 NetXtreme BCM5714 Gigabit Ethernet + 103c 7039 NC324i PCIe Dual Port Gigabit Server Adapter + 166a NetXtreme BCM5780 Gigabit Ethernet + 166b NetXtreme BCM5780S Gigabit Ethernet 166e 570x 10/100 Integrated Controller 1677 NetXtreme BCM5751 Gigabit Ethernet PCI Express 1028 0179 Optiplex GX280 + 1028 0182 Latitude D610 + 1028 01ad Optiplex GX620 + 1734 105d Scenic W620 + 1678 NetXtreme BCM5715 Gigabit Ethernet 167d NetXtreme BCM5751M Gigabit Ethernet PCI Express 167e NetXtreme BCM5751F Fast Ethernet PCI Express 1696 NetXtreme BCM5782 Gigabit Ethernet 103c 12bc HP d530 CMT (DG746A) 14e4 000d NetXtreme BCM5782 1000Base-T 169c NetXtreme BCM5788 Gigabit Ethernet +# Turion Notebook nx6125 + 103c 308b nx6125 169d NetLink BCM5789 Gigabit Ethernet PCI Express 16a6 NetXtreme BCM5702X Gigabit Ethernet 0e11 00bb NC7760 Gigabit Server Adapter (PCI-X, 10/100/1000-T) @@ -7003,6 +8107,8 @@ 16a8 NetXtreme BCM5704S Gigabit Ethernet 10b7 2001 3C998-SX Dual Port 1000-SX PCI-X 16aa NetXtreme II BCM5706S Gigabit Ethernet + 103c 3102 NC370F Multifunction Gigabit Server Adapter + 16ac NetXtreme II BCM5708S Gigabit Ethernet 16c6 NetXtreme BCM5702A3 Gigabit Ethernet 10b7 1100 3C1000B-T 10/100/1000 PCI 14e4 000c BCM5702 1000Base-T @@ -7010,8 +8116,8 @@ 16c7 NetXtreme BCM5703 Gigabit Ethernet 0e11 00ca NC7771 Gigabit Server Adapter (PCI-X, 10,100,1000-T) 0e11 00cb NC7781 Gigabit Server Adapter (PCI-X, 10,100,1000-T) - 103c 12c3 HP Combo FC/GigE-SX [A9782A] - 103c 12ca HP Combo FC/GigE-T [A9784A] + 103c 12c3 Combo FC/GigE-SX [A9782A] + 103c 12ca Combo FC/GigE-T [A9784A] 14e4 0009 NetXtreme BCM5703 1000Base-T 14e4 000a NetXtreme BCM5703 1000Base-SX 16dd NetLink BCM5781 Gigabit Ethernet PCI Express @@ -7019,6 +8125,9 @@ 16fd NetXtreme BCM5753M Gigabit Ethernet PCI Express 16fe NetXtreme BCM5753F Fast Ethernet PCI Express 170c BCM4401-B0 100Base-TX + 1028 0188 Inspiron 6000 laptop + 1028 0196 Inspiron 5160 + 103c 099c nx6110/nc6120 170d NetXtreme BCM5901 100Base-TX 1014 0545 ThinkPad R40e (2684-HVG) builtin ethernet controller 170e NetXtreme BCM5901 100Base-TX @@ -7037,13 +8146,28 @@ 4312 BCM4310 UART 4313 BCM4310 Ethernet Controller 4315 BCM4310 USB Controller + 4318 BCM4318 [AirForce One 54g] 802.11g Wireless LAN Controller + 103c 1356 nx6125 + 1468 0311 Aspire 3022WLMi + 1468 0312 TravelMate 2410 + 14e4 0449 Gateway 7510GX + 14e4 4318 WPC54G version 3 [Wireless-G Notebook Adapter] 802.11g Wireless Lan Controller + 16ec 0119 U.S.Robotics Wireless MAXg PC Card + 4319 Dell Wireless 1470 DualBand WLAN 4320 BCM4306 802.11b/g Wireless LAN Controller 1028 0001 TrueMobile 1300 WLAN Mini-PCI Card 1028 0003 Wireless 1350 WLAN Mini-PCI Card + 103c 12f4 nx9500 Built-in Wireless + 103c 12fa Presario R3000 802.11b/g 1043 100f WL-100G + 1057 7025 WN825G + 106b 004e AirPort Extreme + 144f 7050 eMachines M6805 802.11g Built-in Wireless 14e4 4320 Linksys WMP54G PCI 1737 4320 WPC54G + 1799 7001 Belkin F5D7001 High-Speed Mode Wireless G Network Card 1799 7010 Belkin F5D7010 54g Wireless Network card + 185f 1220 Acer TravelMate 290E WLAN Mini-PCI Card 4321 BCM4306 802.11a Wireless LAN Controller 4322 BCM4306 UART 4324 BCM4309 802.11a/b/g @@ -7083,6 +8207,7 @@ 4716 BCM47xx Sentry5 USB Host Controller 4717 BCM47xx Sentry5 USB Device Controller 4718 Sentry5 Crypto Accelerator + 4719 BCM47xx/53xx RoboSwitch Core 4720 BCM4712 MIPS CPU 5365 BCM5365P Sentry5 Host Bridge 5600 BCM5600 StrataSwitch 24+2 Ethernet Switch Controller @@ -7094,6 +8219,7 @@ 5680 BCM5680 G-Switch 8 Port Gigabit Ethernet Switch Controller 5690 BCM5690 12-port Multi-Layer Gigabit Ethernet Switch 5691 BCM5691 GE/10GE 8+2 Gigabit Ethernet Switch Controller + 5692 BCM5692 12-port Multi-Layer Gigabit Ethernet Switch 5820 BCM5820 Crypto Accelerator 5821 BCM5821 Crypto Accelerator 5822 BCM5822 Crypto Accelerator @@ -7110,6 +8236,7 @@ 14ea Planex Communications, Inc ab06 FNW-3603-TX CardBus Fast Ethernet ab07 RTL81xx RealTek Ethernet + ab08 FNW-3602-TX CardBus Fast Ethernet 14eb SEIKO EPSON Corp 14ec ACQIRIS 14ed DATAKINETICS Ltd @@ -7169,6 +8296,7 @@ 1065 HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem 1066 HCF 56k Data/Fax/Voice/Spkp Modem 122d 4033 Dell Athena - MDP3900V-U + 1085 HCF V90 56k Data/Fax/Voice/Spkp PCI Modem 1433 HCF 56k Data/Fax Modem 1434 HCF 56k Data/Fax/Voice Modem 1435 HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem @@ -7185,12 +8313,13 @@ 122d 4302 Dell MP3930V-W(C) MiniPCI 1610 ADSL AccessRunner PCI Arbitration Device 1611 AccessRunner PCI ADSL Interface Device - 1620 ADSL AccessRunner V2 PCI Arbitration Device + 1620 AccessRunner V2 PCI ADSL Arbitration Device 1621 AccessRunner V2 PCI ADSL Interface Device 1622 AccessRunner V2 PCI ADSL Yukon WAN Adapter 1803 HCF 56k Modem 0e11 0023 623-LAN Grizzly 0e11 0043 623-LAN Yogi + 1811 Conextant MiniPCI Network Adapter 1815 HCF 56k Modem 0e11 0022 Grizzly 0e11 0042 Yogi @@ -7213,6 +8342,7 @@ 2043 HSF 56k Data/Fax Modem (WorldW SmartDAA) 2044 HSF 56k Data/Fax/Voice Modem (WorldW SmartDAA) 2045 HSF 56k Data/Fax/Voice/Spkp (w/Handset) Modem (WorldW SmartDAA) + 14f1 2045 Generic SoftK56 2046 HSF 56k Data/Fax/Voice/Spkp Modem (WorldW SmartDAA) 2063 HSF 56k Data/Fax Modem (SmartDAA) 2064 HSF 56k Data/Fax/Voice Modem (SmartDAA) @@ -7253,8 +8383,74 @@ 14f1 2004 Dynalink 56PMi 2f02 HSF 56k HSFi Data/Fax 2f11 HSF 56k HSFi Modem + 2f20 HSF 56k Data/Fax Modem 8234 RS8234 ATM SAR Controller [ServiceSAR Plus] - 8800 Winfast TV2000 XP + 8800 CX23880/1/2/3 PCI Video and Audio Decoder + 0070 2801 Hauppauge WinTV 28xxx (Roslyn) models + 0070 3401 Hauppauge WinTV 34xxx models + 0070 9001 Nova-T DVB-T + 0070 9200 Nova-SE2 DVB-S + 0070 9202 Nova-S-Plus DVB-S + 0070 9402 WinTV-HVR1100 DVB-T/Hybrid + 0070 9802 WinTV-HVR1100 DVB-T/Hybrid (Low Profile) + 1002 00f8 ATI TV Wonder Pro + 1002 a101 HDTV Wonder + 1043 4823 ASUS PVR-416 + 107d 6613 Leadtek Winfast 2000XP Expert + 107d 6620 Leadtek Winfast DV2000 + 107d 663c Leadtek PVR 2000 + 107d 665f WinFast DTV1000-T + 10fc d003 IODATA GV-VCP3/PCI + 10fc d035 IODATA GV/BCTV7E + 1421 0334 Instant TV DVB-T PCI + 1461 000a AVerTV 303 (M126) + 1461 000b AverTV Studio 303 (M126) + 1461 8011 UltraTV Media Center PCI 550 + 1462 8606 MSI TV-@nywhere Master + 14c7 0107 GDI Black Gold + 14f1 0187 Conexant DVB-T reference design + 14f1 0342 Digital-Logic MICROSPACE Entertainment Center (MEC) + 153b 1166 Cinergy 1400 DVB-T + 1540 2580 Provideo PV259 + 1554 4811 PixelView + 1554 4813 Club 3D ZAP1000 MCE Edition + 17de 08a1 KWorld/VStream XPert DVB-T with cx22702 + 17de 08a6 KWorld/VStream XPert DVB-T + 17de 08b2 KWorld DVB-S 100 + 17de a8a6 digitalnow DNTV Live! DVB-T + 1822 0025 digitalnow DNTV Live! DVB-T Pro + 18ac d500 FusionHDTV 5 Gold + 18ac d810 FusionHDTV 3 Gold-Q + 18ac d820 FusionHDTV 3 Gold-T + 18ac db00 FusionHDTV DVB-T1 + 18ac db11 FusionHDTV DVB-T Plus + 18ac db50 FusionHDTV DVB-T Dual Digital + 7063 3000 pcHDTV HD3000 HDTV + 8801 CX23880/1/2/3 PCI Video and Audio Decoder [Audio Port] + 0070 2801 Hauppauge WinTV 28xxx (Roslyn) models + 8802 CX23880/1/2/3 PCI Video and Audio Decoder [MPEG Port] + 0070 2801 Hauppauge WinTV 28xxx (Roslyn) models + 0070 9002 Nova-T DVB-T Model 909 + 1043 4823 ASUS PVR-416 + 107d 663c Leadtek PVR 2000 + 14f1 0187 Conexant DVB-T reference design + 17de 08a1 XPert DVB-T PCI BDA DVBT 23880 Transport Stream Capture + 17de 08a6 KWorld/VStream XPert DVB-T + 18ac d500 DViCO FusionHDTV5 Gold + 18ac d810 DViCO FusionHDTV3 Gold-Q + 18ac d820 DViCO FusionHDTV3 Gold-T + 18ac db00 DVICO FusionHDTV DVB-T1 + 18ac db10 DVICO FusionHDTV DVB-T Plus + 7063 3000 pcHDTV HD3000 HDTV + 8804 CX23880/1/2/3 PCI Video and Audio Decoder [IR Port] + 0070 9002 Nova-T DVB-T Model 909 + 8811 CX23880/1/2/3 PCI Video and Audio Decoder [Audio Port] + 0070 3401 Hauppauge WinTV 34xxx models + 1462 8606 MSI TV-@nywhere Master + 18ac d500 DViCO FusionHDTV5 Gold + 18ac d810 DViCO FusionHDTV3 Gold-Q + 18ac d820 DViCO FusionHDTV3 Gold-T + 18ac db00 DVICO FusionHDTV DVB-T1 14f2 MOBILITY Electronics 0120 EV1000 bridge 0121 EV1000 Parallel port @@ -7272,7 +8468,7 @@ 14f8 AUDIOCODES Inc 2077 TP-240 dual span E1 VoIP PCI card 14f9 AG COMMUNICATIONS -14fa WANDEL & GOCHERMANN +14fa WANDEL & GOLTERMANN 14fb TRANSAS MARINE (UK) Ltd 14fc Quadrics Ltd 0000 QsNet Elan3 Network Adapter @@ -7327,6 +8523,8 @@ 1008 PCI-1008 151b COMBOX Ltd 151c DIGITAL AUDIO LABS Inc + 0003 Prodif T 2496 + 4000 Prodif 88 151d Fujitsu Computer Products Of America 151e MATRIX Corp 151f TOPIC SEMICONDUCTOR Corp @@ -7344,17 +8542,29 @@ 1522 0800 RockForceOCTO+ 8 Port V.92/V.44 Data/Fax/Voice Modem 1522 0c00 RockForceDUO+ 2 Port V.92/V.44 Data, V.34 Super-G3 Fax, Voice Modem 1522 0d00 RockForceQUATRO+ 4 Port V.92/V.44 Data, V.34 Super-G3 Fax, Voice Modem -# this is a correction to a recent entry. 1522:0E00 should be 1522:1D00 1522 1d00 RockForceOCTO+ 8 Port V.92/V.44 Data, V.34 Super-G3 Fax, Voice Modem + 1522 2000 RockForceD1 1 Port V.90 Data Modem + 1522 2100 RockForceF1 1 Port V.34 Super-G3 Fax Modem + 1522 2200 RockForceD2 2 Port V.90 Data Modem + 1522 2300 RockForceF2 2 Port V.34 Super-G3 Fax Modem + 1522 2400 RockForceD4 4 Port V.90 Data Modem + 1522 2500 RockForceF4 4 Port V.34 Super-G3 Fax Modem + 1522 2600 RockForceD8 8 Port V.90 Data Modem + 1522 2700 RockForceF8 8 Port V.34 Super-G3 Fax Modem 1523 MUSIC Semiconductors 1524 ENE Technology Inc 0510 CB710 Memory Card Reader Controller + 103c 006a nx9500 + 0520 FLASH memory: ENE Technology Inc: + 0530 ENE PCI Memory Stick Card Reader Controller + 0550 ENE PCI Secure Digital Card Reader Controller 0610 PCI Smart Card Reader Controller 1211 CB1211 Cardbus Controller 1225 CB1225 Cardbus Controller 1410 CB1410 Cardbus Controller 1025 005a TravelMate 290 1411 CB-710/2/4 Cardbus Controller + 103c 006a nx9500 1412 CB-712/4 Cardbus Controller 1420 CB1420 Cardbus Controller 1421 CB-720/2/4 Cardbus Controller @@ -7373,6 +8583,7 @@ 1530 ACQIS Technology Inc 1531 CHRYON Corp 1532 ECHELON Corp + 0020 LonWorks PCLTA-20 PCI LonTalk Adapter 1533 BALTIMORE 1534 ROAD Corp 1535 EVERGREEN Technologies Inc @@ -7389,10 +8600,11 @@ 153c ANTAL Electronic 153d FILANET Corp 153e TECHWELL Inc -153f MIPS DENMARK +153f MIPS Technologies, Inc. + 0001 SOC-it 101 System Controller 1540 PROVIDEO MULTIMEDIA Co Ltd 1541 MACHONE Communications -1542 VIVID Technology Inc +1542 Concurrent Computer Corporation 1543 SILICON Laboratories 3052 Intel 537 [Winmodem] 4c22 Si3036 MC'97 DAA @@ -7467,6 +8679,7 @@ 1575 Voltaire Advanced Data Security Ltd 1576 Viewcast COM 1578 HITT + 5615 VPMK3 [Video Processor Mk III] 1579 Dual Technology Corp 157a Japan Elecronics Ind Inc 157b Star Multimedia Corp @@ -7541,8 +8754,8 @@ 5a44 MT23108 InfiniHost 5a45 MT23108 [Infinihost HCA Flash Recovery] 5a46 MT23108 PCI Bridge - 5e8c MT24204 [InfiniHost III Lx HCA] - 5e8d MT24204 [InfiniHost III Lx HCA Flash Recovery] + 5e8d MT25204 [InfiniHost III Lx HCA Flash Recovery] + 6274 MT25204 [InfiniHost III Lx HCA] 6278 MT25208 InfiniHost III Ex (Tavor compatibility mode) 6279 MT25208 [InfiniHost III Ex HCA Flash Recovery] 6282 MT25208 InfiniHost III Ex @@ -7555,6 +8768,7 @@ 15ba Impacct Technology Corp 15bb Portwell Inc 15bc Agilent Technologies + 1100 E8001-66442 PCI Express CIC 2922 64 Bit, 133MHz PCI-X Exerciser & Protocol Checker 2928 64 Bit, 66MHz PCI Exerciser & Analyzer 2929 64 Bit, 133MHz PCI-X Analyzer & Exerciser @@ -7645,7 +8859,11 @@ 1619 FarSite Communications Ltd 0400 FarSync T2P (2 port X.21/V.35/V.24) 0440 FarSync T4P (4 port X.21/V.35/V.24) -# www.rioworks.com + 0610 FarSync T1U (1 port X.21/V.35/V.24) + 0620 FarSync T2U (1 port X.21/V.35/V.24) + 0640 FarSync T4U (4 port X.21/V.35/V.24) + 1610 FarSync TE1 (T1,E1) + 2610 FarSync DSL-S1 (SHDSL) 161f Rioworks 1626 TDK Semiconductor Corp. 8410 RTL81xx Fast Ethernet @@ -7666,6 +8884,8 @@ d200 PIXCI(R) D2X Digital Video Capture Board [custom QL5232] d300 PIXCI(R) D3X Digital Video Capture Board [custom QL5232] 165d Hsing Tech. Enterprise Co., Ltd. +165f Linux Media Labs, LLC + 1020 LMLM4 MPEG-4 encoder 1661 Worldspace Corp. 1668 Actiontec Electronics Inc 0100 Mini-PCI bridge @@ -7676,9 +8896,12 @@ 1677 Bernecker + Rainer 104e 5LS172.6 B&R Dual CAN Interface Card 12d7 5LS172.61 B&R Dual CAN Interface Card +167b ZyDAS Technology Corp. + 2102 ZyDAS ZD1202 + 187e 3406 ZyAIR B-122 CardBus 11Mbs Wireless LAN Card 1681 Hercules -# More specs, more accurate desc. - 0010 Hercules 3d Prophet II Ultra 64MB [ 350 MHz NV15BR core, 128-bit DDR @ 460 MHz, 1.5v AGP4x ] + 0010 Hercules 3d Prophet II Ultra 64MB (350 MHz NV15BR core) +1682 XFX Pine Group Inc. 1688 CastleNet Technology Inc. 1170 WLAN 802.11b card 168c Atheros Communications, Inc. @@ -7686,34 +8909,64 @@ 0011 AR5210 802.11a NIC 0012 AR5211 802.11ab NIC 0013 AR5212 802.11abg NIC - 1186 3202 D-link DWL-G650 B3 Wireless cardbus adapter + 1113 d301 Philips CPWNA100 Wireless CardBus adapter + 1186 3202 D-link DWL-G650 (Rev B3,B5) Wireless cardbus adapter 1186 3203 DWL-G520 Wireless PCI Adapter - 1186 3a13 DWL-G520 Wireless PCI Adapter rev. B + 1186 3a12 D-Link AirPlus DWL-G650 Wireless Cardbus Adapter(rev.C) + 1186 3a13 D-Link AirPlus DWL-G520 Wireless PCI Adapter(rev.B) + 1186 3a14 D-Link AirPremier DWL-AG530 Wireless PCI Adapter + 1186 3a17 D-Link AirPremier DWL-G680 Wireless Cardbus Adapter + 1186 3a18 D-Link AirPremier DWL-G550 Wireless PCI Adapter + 1186 3a63 D-Link AirPremier DWL-AG660 Wireless Cardbus Adapter 1186 3a94 C54C Wireless 801.11g cardbus 1385 4d00 Netgear WG311T Wireless PCI Adapter + 1458 e911 Gigabyte GN-WIAG02 14b7 0a60 8482-WD ORiNOCO 11a/b/g Wireless PCI Adapter - 168c 0013 WG511T Wireless CardBus Adapter + 168c 0013 AirPlus XtremeG DWL-G650 Wireless PCMCIA Adapter 168c 1025 DWL-G650B2 Wireless CardBus Adapter + 168c 1027 Netgate NL-3054CB ARIES b/g CardBus Adapter 168c 2026 Netgate 5354MP ARIES a(108Mb turbo)/b/g MiniPCI Adapter + 168c 2041 Netgate 5354MP Plus ARIES2 b/g MiniPCI Adapter + 168c 2042 Netgate 5354MP Plus ARIES2 a/b/g MiniPCI Adapter + 16ab 7302 Trust Speedshare Turbo Pro Wireless PCI Adapter + 001a AR5005G 802.11abg NIC + 1186 3a15 D-Link AirPlus G DWL-G630 Wireless Cardbus Adapter(rev.D) + 1186 3a16 D-Link AirPlus G DWL-G510 Wireless PCI Adapter(rev.B) + 1186 3a23 D-Link AirPlus G DWL-G520+A Wireless PCI Adapter + 1186 3a24 D-Link AirPlus G DWL-G650+A Wireless Cardbus Adapter + 168c 1052 TP-Link TL-WN510G Wireless CardBus Adapter + 001b AR5006X 802.11abg NIC + 1186 3a19 D-Link AirPremier AG DWL-AG660 Wireless Cardbus Adapter + 1186 3a22 D-Link AirPremier AG DWL-AG530 Wireless PCI Adapter + 0020 AR5005VL 802.11bg Wireless NIC 1014 AR5212 802.11abg NIC +1695 EPoX Computer Co., Ltd. +169c Netcell Corporation + 0044 Revolution Storage Processing Card 16a5 Tekram Technology Co.,Ltd. 16ab Global Sun Technology Inc 1100 GL24110P 1101 PLX9052 PCMCIA-to-PCI Wireless LAN 1102 PCMCIA-to-PCI Wireless Network Bridge + 8501 WL-8305 Wireless LAN PCI Adapter 16ae Safenet Inc 1141 SafeXcel-1141 +16af SparkLAN Communications, Inc. 16b4 Aspex Semiconductor Ltd +16b8 Sonnet Technologies, Inc. 16be Creatix Polymedia GmbH +16c8 Octasic Inc. +16c9 EONIC B.V. The Netherlands 16ca CENATEK Inc 0001 Rocket Drive DL 16cd Densitron Technologies -# www.pikatechnologies.com +16ce Roland Corp. 16df PIKA Technologies Inc. 16e3 European Space Agency 1e0f LEON2FT Processor 16ec U.S. Robotics 00ff USR997900 10/100 Mbps PCI Network Card + 0116 USR997902 10/100/1000 Mbps PCI Network Card 3685 Wireless Access PCI Adapter Model 022415 16ed Sycron N. V. 1001 UMIO communication card @@ -7721,7 +8974,6 @@ 16f4 Vweb Corp 8000 VW2010 16f6 VideoTele.com, Inc. -# www.internetmachines.com 1702 Internet Machines Corporation (IMC) 1705 Digital First, Inc. 170b NetOctave @@ -7731,12 +8983,14 @@ 1725 Vitesse Semiconductor 7174 VSC7174 PCI/PCI-X Serial ATA Host Bus Controller 172a Accelerated Encryption + 13c8 AEP SureWare Runner 1000V3 1734 Fujitsu Siemens Computer GmbH 1737 Linksys 0013 WMP54G Wireless Pci Card 0015 WMP54GS Wireless Pci Card 1032 Gigabit Network Adapter 1737 0015 EG1032 v2 Instant Gigabit Network Adapter + 1737 0024 EG1032 v3 Instant Gigabit Network Adapter 1064 Gigabit Network Adapter 1737 0016 EG1064 v2 Instant Gigabit Network Adapter ab08 21x4x DEC-Tulip compatible 10/100 Ethernet @@ -7754,6 +9008,7 @@ 174d WellX Telecom SA 175c AudioScience Inc 175e Sanera Systems, Inc. +1775 SBS Technologies 1787 Hightech Information System Ltd. # also used by Struck Innovative Systeme for joint developments 1796 Research Centre Juelich @@ -7769,9 +9024,18 @@ 6020 Wireless PCMCIA Card - F5D6020 6060 Wireless PDA Card - F5D6060 7000 Wireless PCI Card - F5D7000 + 7010 BCM4306 802.11b/g Wireless Lan Controller F5D7010 +179c Data Patterns + 0557 DP-PCI-557 [PCI 1553B] + 0566 DP-PCI-566 [Intelligent PCI 1553B] + 5031 DP-CPCI-5031-Synchro Module + 5121 DP-CPCI-5121-IP Carrier + 5211 DP-CPCI-5211-IP Carrier + 5679 AGE Display Module 17a0 Genesys Logic, Inc 8033 GL880S USB 1.1 controller 8034 GL880S USB 2.0 controller +17aa Lenovo 17af Hightech Information System Ltd. 17b3 Hawking Technologies ab08 PN672TX 10/100 Ethernet @@ -7779,30 +9043,63 @@ 0011 WebEnhance 100 GZIP Compression Card 17c0 Wistron Corp. 17c2 Newisys, Inc. +17cb Airgo Networks Inc 17cc NetChip Technology, Inc 2280 USB 2.0 -# S2io ships 10Gb PCI-X Ethernet adapters www.s2io.com +17cf Z-Com, Inc. +17d3 Areca Technology Corp. + 1110 ARC-1110 4-Port PCI-X to SATA RAID Controller + 1120 ARC-1120 8-Port PCI-X to SATA RAID Controller + 1130 ARC-1130 12-Port PCI-X to SATA RAID Controller + 1160 ARC-1160 16-Port PCI-X to SATA RAID Controller + 1210 ARC-1210 4-Port PCI-Express to SATA RAID Controller + 1220 ARC-1220 8-Port PCI-Express to SATA RAID Controller + 1230 ARC-1230 12-Port PCI-Express to SATA RAID Controller + 1260 ARC-1260 16-Port PCI-Express to SATA RAID Controller 17d5 S2io Inc. -# http://www.connect3d.com + 5831 Xframe 10 Gigabit Ethernet PCI-X + 103c 12d5 HP PCI-X 133MHz 10GbE SR Fiber + 5832 Xframe II 10 Gigabit Ethernet PCI-X +17de KWorld Computer Co. Ltd. 17ee Connect Components Ltd +17f2 Albatron Corp. 17fe Linksys, A Division of Cisco Systems + 2120 WMP11v4 802.11b PCI card 2220 [AirConn] INPROCOMM IPN 2220 Wireless LAN Adapter (rev 01) + 17fe 2220 WPC54G ver. 4 +17ff Benq Corporation 1813 Ambient Technologies Inc 4000 HaM controllerless modem 16be 0001 V9x HAM Data Fax Modem 4100 HaM plus Data Fax Modem 16be 0002 V9x HAM 1394 1814 RaLink - 0101 Wireless PCI Adpator RT2400 / RT2460 - 0201 Ralink RT2500 802.11 Cardbus Reference Card + 0101 Wireless PCI Adapter RT2400 / RT2460 + 1043 0127 WiFi-b add-on Card + 1462 6828 PC11B2 (MS-6828) Wireless 11b PCI Card + 0200 RT2500 802.11g PCI [PC54G2] + 0201 RT2500 802.11g Cardbus/mini-PCI + 1043 130f WL-130g 1371 001e CWC-854 Wireless-G CardBus Adapter 1371 001f CWM-854 Wireless-G Mini PCI Adapter 1371 0020 CWP-854 Wireless-G PCI Adapter + 1458 e381 GN-WMKG 802.11b/g Wireless CardBus Adapter + 1458 e931 GN-WIKG 802.11b/g mini-PCI Adapter + 1462 6835 Wireless 11G CardBus CB54G2 + 1737 0032 WMP54G 2.0 PCI Adapter + 1799 700a F5D7000 Wireless G Desktop Network Card + 1799 701a F5D7010 Wireless G Notebook Network Card + 185f 22a0 CN-WF513 Wireless Cardbus Adapter + 0301 RT2561/RT61 802.11g PCI + 2561 1814 Intellinet Wireless G PCI Adapter + 0401 Ralink RT2600 802.11 MIMO 1820 InfiniCon Systems Inc. 1822 Twinhan Technology Co. Ltd + 4e35 Mantis DTV PCI Bridge Controller [Ver 1.0] 182d SiteCom Europe BV # HFC-based ISDN card 3069 ISDN PCI DC-105V2 + 9790 WL-121 Wireless Network Adapter 100g+ [Ver.3] 1830 Credence Systems Corporation 183b MikroM GmbH 08a7 MVC100 DVI @@ -7811,31 +9108,60 @@ 1849 ASRock Incorporation 1851 Microtune, Inc. 1852 Anritsu Corp. +1854 LG Electronics, Inc. +185b Compro Technology, Inc. +185f Wistron NeWeb Corp. +1864 SilverBack + 2110 ISNAP 2110 1867 Topspin Communications - 5a44 MT23108 PCI-X HCA - 5a45 MT23108 PCI-X HCA flash recovery - 5a46 MT23108 PCI-X HCA bridge + 5a44 MT23108 InfiniHost HCA + 5a45 MT23108 InfiniHost HCA flash recovery + 5a46 MT23108 InfiniHost HCA bridge 6278 MT25208 InfiniHost III Ex (Tavor compatibility mode) 6282 MT25208 InfiniHost III Ex +187e ZyXEL Communication Corporation 1888 Varisys Ltd 0301 VMFX1 FPGA PMC module 0601 VSM2 dual PMC carrier 0710 VS14x series PowerPC PCI board 0720 VS24x series PowerPC PCI board -# found e.g. on KNC DVB-S card +1890 Egenera, Inc. 1894 KNC One 1896 B&B Electronics Manufacturing Company, Inc. 18a1 Astute Networks Inc. 18ac DViCO Corporation + d500 FusionHDTV 5 d810 FusionHDTV 3 Gold + d820 FusionHDTV 3 Gold-T +18b8 Ammasso + b001 AMSO 1100 iWARP/RDMA Gigabit Ethernet Coprocessor 18bc Info-Tek Corp. -# assigned to Octigabay System, which has been acquired by Cray +# Nee Octigabay System 18c8 Cray Inc 18c9 ARVOO Engineering BV 18ca XGI - Xabre Graphics Inc - 0040 Volari V8 + 0020 Volari Z7 + 0040 Volari V3XT/V5/V8 +18d2 Sitecom +# Sitecom HFC-S based ISDN controller card DC-105v2 + 3069 DC-105v2 ISDN controller +18dd Artimi Inc + 4c6f Artimi RTMI-100 UWB adapter 18e6 MPL AG 0001 OSCI [Octal Serial Communication Interface] +18ec Cesnet, z.s.p.o. + c006 COMBO6 + 18ec d001 COMBO-4MTX + 18ec d002 COMBO-4SFP + 18ec d003 COMBO-4SFPRO + 18ec d004 COMBO-2XFP + c045 COMBO6E + c050 COMBO-PTM + c058 COMBO6X + 18ec d001 COMBO-4MTX + 18ec d002 COMBO-4SFP + 18ec d003 COMBO-4SFPRO + 18ec d004 COMBO-2XFP 18f7 Commtech, Inc. 0001 Fastcom ESCC-PCI-335 0002 Fastcom 422/4-PCI-335 @@ -7843,6 +9169,41 @@ 0005 Fastcom IGESCC-PCI-ISO/1 000a Fastcom 232/4-PCI-335 18fb Resilience Corporation +1923 Sangoma Technologies Corp. + 0100 A104d QUAD T1/E1 AFT card +1924 Level 5 Networks Inc. +192e TransDimension +1931 Option N.V. +1942 ClearSpeed Technology plc + e511 CSX600 Advance Accelerator Board +1957 Freescale Semiconductor Inc + 0080 MPC8349E + 0081 MPC8349 + 0082 MPC8347E TBGA + 0083 MPC8347 TBGA + 0084 MPC8347E PBGA + 0085 MPC8347 PBGA + 0086 MPC8343E + 0087 MPC8343 +1958 Faster Technology, LLC. +1966 Orad Hi-Tec Systems + 1975 DVG64 family +196a Sensory Networks Inc. + 0101 NodalCore C-1000 Content Classification Accelerator + 0102 NodalCore C-2000 Content Classification Accelerator +197b JMicron Technologies, Inc. + 2360 JMicron 20360/20363 AHCI Controller + 2363 JMicron 20360/20363 AHCI Controller +1989 Montilio Inc. + 0001 RapidFile Bridge + 8001 RapidFile +1993 Innominate Security Technologies AG +19a8 DAQDATA GmbH +19ac Kasten Chase Applied Research +19ae Progeny Systems Corporation + 0520 4135 HFT Interface Controller +19d4 Quixant Limited +19e2 Vector Informatik GmbH 1a08 Sierra semiconductor 0000 SC15064 1b13 Jaton Corp @@ -7857,6 +9218,10 @@ dc29 DC290 1fc0 Tumsan Oy 0300 E2200 Dual E1/Rawpipe Card +1fc1 PathScale, Inc + 000d InfiniPath HT-400 +1fce Cognio Inc. + 0001 Spectrum Analyzer PC Card (SAgE) 2000 Smart Link Ltd. 2001 Temporal Research Ltd 2003 Smart Link Ltd. @@ -7878,9 +9243,11 @@ 0021 HB6 Universal PCI-PCI bridge (non-transparent mode) 4c53 1050 CT7 mainboard 4c53 1080 CT8 mainboard + 4c53 1090 Cx9 mainboard 4c53 10a0 CA3/CR3 mainboard 4c53 3010 PPCI mezzanine (32-bit PMC) 4c53 3011 PPCI mezzanine (64-bit PMC) + 4c53 4000 PMCCARR1 carrier board 0022 HiNT HB4 PCI-PCI Bridge (PCI6150) 0026 HB2 PCI-PCI Bridge 101a E.Band [AudioTrak Inca88] @@ -7894,18 +9261,25 @@ 3411 Quantum Designs (H.K.) Inc 3513 ARCOM Control Systems Ltd 3842 eVga.com. Corp. + c370 e-GeFORCE 6600 256 DDR PCI-e 38ef 4Links 3d3d 3DLabs 0001 GLINT 300SX 0002 GLINT 500TX + 0000 0000 GLoria L 0003 GLINT Delta + 0000 0000 GLoria XL 0004 Permedia 0005 Permedia 0006 GLINT MX + 0000 0000 GLoria XL + 1048 0a42 GLoria XXL 0007 3D Extreme 0008 GLINT Gamma G1 + 1048 0a42 GLoria XXL 0009 Permedia II 2D+3D 1040 0011 AccelStar II + 1048 0a42 GLoria XXL 13e9 1000 6221L-4U 3d3d 0100 AccelStar II 3D Accelerator 3d3d 0111 Permedia 3:16 @@ -7924,7 +9298,6 @@ 0012 GLint R5 rev A 0013 GLint R5 rev B 0020 VP10 visual processor -# P10 generic II 0022 VP10 visual processor 0024 VP9 visual processor 0100 Permedia II 2D+3D @@ -7954,15 +9327,41 @@ 1360 RTL8139 Ethernet 4143 Digital Equipment Corp 4144 Alpha Data + 0044 ADM-XRCIIPro 416c Aladdin Knowledge Systems 0100 AladdinCARD 0200 CPC +4321 Tata Power Strategic Electronics Division 4444 Internext Compression Inc 0016 iTVC16 (CX23416) MPEG-2 Encoder + 0070 0003 WinTV PVR 250 + 0070 0009 WinTV PVR 150 + 0070 0801 WinTV PVR 150 + 0070 0807 WinTV PVR 150 + 0070 4001 WinTV PVR 250 0070 4009 WinTV PVR 250 + 0070 4801 WinTV PVR 250 + 0070 4803 WinTV PVR 250 + 0070 8003 WinTV PVR 150 + 0070 8801 WinTV PVR 150 + 0070 c801 WinTV PVR 150 + 0070 e807 WinTV PVR 500 (1st unit) + 0070 e817 WinTV PVR 500 (2nd unit) + 0270 0801 WinTV PVR 150 + 12ab fff3 MPG600 + 12ab ffff MPG600 + 4070 8801 WinTV PVR 150 + 9005 0092 VideOh! AVC-2010 + 9005 0093 VideOh! AVC-2410 + ff92 0070 PVR-550 0803 iTVC15 MPEG-2 Encoder 0070 4000 WinTV PVR-350 0070 4001 WinTV PVR-250 + 0070 4800 WinTV PVR-350 (V1) + 12ab 0000 MPG160 + 1461 a3ce M179 +# video capture card + 1461 a3cf M179 4468 Bridgeport machines 4594 Cogetec Informatique Inc 45fb Baldor Electric Company @@ -8016,6 +9415,7 @@ 5145 Ensoniq (Old) 3031 Concert AudioPCI 5168 Animation Technologies Inc. + 0301 FlyDVB-T 5301 Alliance Semiconductor Corp. 0001 ProMotion aT3D 5333 S3 Inc. @@ -8087,7 +9487,7 @@ 8a22 Savage 4 1033 8068 Savage 4 1033 8069 Savage 4 - 1033 8110 Savage4 LT + 1033 8110 Savage 4 LT 105d 0018 SR9 8Mb SDRAM 105d 002a SR9 Pro 16Mb SDRAM 105d 003a SR9 Pro 32Mb SDRAM @@ -8125,7 +9525,8 @@ 8c10 86C270-294 Savage/MX-MV 8c11 82C270-294 Savage/MX 8c12 86C270-294 Savage/IX-MV - 1014 017f ThinkPad T20 + 1014 017f Thinkpad T20/T22 + 1179 0001 86C584 SuperSavage/IXC Toshiba 8c13 86C270-294 Savage/IX 1179 0001 Magnia Z310 8c22 SuperSavage MX/128 @@ -8166,12 +9567,17 @@ 5700 Netpower 5851 Exacq Technologies 6356 UltraStor -6374 c't Magazin für Computertechnik +6374 c't Magazin fuer Computertechnik 6773 GPPCI 6409 Logitec Corp. 6666 Decision Computer International Co. 0001 PCCOM4 0002 PCCOM8 + 0004 PCCOM2 + 0101 PCI 8255/8254 I/O Card +7063 pcHDTV + 2000 HD-2000 + 3000 HD-3000 7604 O.N. Electronic Co Ltd. 7bde MIDAC Corporation 7fed PowerTV @@ -8180,10 +9586,9 @@ 0011 PWDOG2 [PCI-Watchdog 2] # Wrong ID used in subsystem ID of AsusTek PCI-USB2 PCI card. 807d Asustek Computer, Inc. -8086 Intel Corp. +8086 Intel Corporation 0007 82379AB 0008 Extended Express System Support Controller - 0008 1000 WorldMark 4300 INCA ASIC 0039 21145 Fast Ethernet 0122 82437FX 0309 80303 I/O Processor PCI-to-PCI Bridge @@ -8193,24 +9598,20 @@ 0329 6700PXH PCI Express-to-PCI Bridge A 032a 6700PXH PCI Express-to-PCI Bridge B 032c 6702PXH PCI Express-to-PCI Bridge A -# A-segment bridge - 0330 80332 [Dobson] I/O processor -# A-segment IOAPIC - 0331 80332 [Dobson] I/O processor -# B-segment bridge - 0332 80332 [Dobson] I/O processor -# B-segment IOAPIC - 0333 80332 [Dobson] I/O processor -# Address Translation Unit (ATU) - 0334 80332 [Dobson] I/O processor -# PCI-X bridge - 0335 80331 [Lindsay] I/O processor -# Address Translation Unit (ATU) - 0336 80331 [Lindsay] I/O processor -# A-segment bridge - 0340 41210 [Lanai] Serial to Parallel PCI Bridge -# B-segment bridge - 0341 41210 [Lanai] Serial to Parallel PCI Bridge + 0330 80332 [Dobson] I/O processor (A-Segment Bridge) + 0331 80332 [Dobson] I/O processor (A-Segment IOAPIC) + 0332 80332 [Dobson] I/O processor (B-Segment Bridge) + 0333 80332 [Dobson] I/O processor (B-Segment IOAPIC) + 0334 80332 [Dobson] I/O processor (ATU) + 0335 80331 [Lindsay] I/O processor (PCI-X Bridge) + 0336 80331 [Lindsay] I/O processor (ATU) + 0340 41210 [Lanai] Serial to Parallel PCI Bridge (A-Segment Bridge) + 0341 41210 [Lanai] Serial to Parallel PCI Bridge (B-Segment Bridge) + 0370 80333 Segment-A PCI Express-to-PCI Express Bridge + 0371 80333 A-Bus IOAPIC + 0372 80333 Segment-B PCI Express-to-PCI Express Bridge + 0373 80333 B-Bus IOAPIC + 0374 80333 Address Translation Unit 0482 82375EB/SB PCI to EISA Bridge 0483 82424TX/ZX [Saturn] CPU to PCI bridge 0484 82378ZB/IB, 82379AB (SIO, SIO.A) PCI to ISA Bridge @@ -8241,6 +9642,7 @@ # (bi-interleave 1) 0537 E8870SP Interleave registers 2 and 3 0600 RAID Controller + 8086 01af SRCZCR 8086 01c1 ICP Vortex GDT8546RZ 8086 01f7 SCRU32 # uninitialized SRCU32 RAID Controller @@ -8280,6 +9682,7 @@ 1014 0268 iSeries Gigabit Ethernet Adapter 8086 1109 PRO/1000 XF Server Adapter 8086 2109 PRO/1000 XF Server Adapter + 100a 82540EM Gigabit Ethernet Controller 100c 82544GC Gigabit Ethernet Controller (Copper) 8086 1112 PRO/1000 T Desktop Adapter 8086 2112 PRO/1000 T Desktop Adapter @@ -8292,22 +9695,28 @@ 1014 0265 PRO/1000 MT Network Connection 1014 0267 PRO/1000 MT Network Connection 1014 026a PRO/1000 MT Network Connection + 1024 0134 Poweredge SC600 1028 002e Optiplex GX260 1028 0151 PRO/1000 MT Network Connection 107b 8920 PRO/1000 MT Desktop Adapter 8086 001e PRO/1000 MT Desktop Adapter 8086 002e PRO/1000 MT Desktop Adapter + 8086 1376 PRO/1000 GT Desktop Adapter + 8086 1476 PRO/1000 GT Desktop Adapter 100f 82545EM Gigabit Ethernet Controller (Copper) 1014 0269 iSeries 1000/100/10 Ethernet Adapter 1014 028e PRO/1000 MT Network Connection 8086 1000 PRO/1000 MT Network Connection 8086 1001 PRO/1000 MT Server Adapter 1010 82546EB Gigabit Ethernet Controller (Copper) + 0e11 00db NC7170 Gigabit Server Adapter 1014 027c PRO/1000 MT Dual Port Network Adapter 18fb 7872 RESlink-X + 1fc1 0026 Niagara 2260 Bypass Card 4c53 1080 CT8 mainboard 4c53 10a0 CA3/CR3 mainboard 8086 1011 PRO/1000 MT Dual Port Server Adapter + 8086 1012 Primergy RX300 8086 101a PRO/1000 MT Dual Port Network Adapter 8086 3424 SE7501HG2 Mainboard 1011 82545EM Gigabit Ethernet Controller (Fiber) @@ -8315,6 +9724,7 @@ 8086 1002 PRO/1000 MF Server Adapter 8086 1003 PRO/1000 MF Server Adapter (LX) 1012 82546EB Gigabit Ethernet Controller (Fiber) + 0e11 00dc NC6170 Gigabit Server Adapter 8086 1012 PRO/1000 MF Dual Port Server Adapter 1013 82541EI Gigabit Ethernet Controller (Copper) 8086 0013 PRO/1000 MT Network Connection @@ -8328,14 +9738,15 @@ 8086 1016 PRO/1000 MT Mobile Connection 1017 82540EP Gigabit Ethernet Controller (LOM) 8086 1017 PR0/1000 MT Desktop Connection -# Update controller name from 82541EP to 82541EI 1018 82541EI Gigabit Ethernet Controller 8086 1018 PRO/1000 MT Desktop Adapter 1019 82547EI Gigabit Ethernet Controller (LOM) 1458 1019 GA-8IPE1000 Pro2 motherboard (865PE) + 1458 e000 Intel Gigabit Ethernet (Kenai II) 8086 1019 PRO/1000 CT Desktop Connection 8086 301f D865PERL mainboard 8086 3427 S875WP1-E mainboard + 101a 82547EI Gigabit Ethernet Controller (Mobile) 101d 82546EB Gigabit Ethernet Controller 8086 1000 PRO/1000 MT Quad Port Server Adapter 101e 82540EP Gigabit Ethernet Controller (Mobile) @@ -8343,11 +9754,13 @@ 1179 0001 PRO/1000 MT Mobile Connection 8086 101e PRO/1000 MT Mobile Connection 1026 82545GM Gigabit Ethernet Controller + 1028 0169 Precision 470 8086 1000 PRO/1000 MT Server Connection 8086 1001 PRO/1000 MT Server Adapter 8086 1002 PRO/1000 MT Server Adapter 8086 1026 PRO/1000 MT Server Connection 1027 82545GM Gigabit Ethernet Controller + 103c 3103 NC310F PCI-X Gigabit Server Adapter 8086 1001 PRO/1000 MF Server Adapter(LX) 8086 1002 PRO/1000 MF Server Adapter(LX) 8086 1003 PRO/1000 MF Server Adapter(LX) @@ -8365,6 +9778,7 @@ 144d c001 EtherExpress PRO/100 VE 144d c003 EtherExpress PRO/100 VE 144d c006 vpr Matrix 170B4 + 813c 104d Vaio PCG-GRV616G 1032 82801CAM (ICH3) PRO/100 VE Ethernet Controller 1033 82801CAM (ICH3) PRO/100 VM (LOM) Ethernet Controller 1034 82801CAM (ICH3) PRO/100 VM Ethernet Controller @@ -8372,6 +9786,7 @@ 1036 82801CAM (ICH3) 82562EH Ethernet Controller 1037 82801CAM (ICH3) Chipset Ethernet Controller 1038 82801CAM (ICH3) PRO/100 VM (KM) Ethernet Controller + 0e11 0098 Evo N600c 1039 82801DB PRO/100 VE (LOM) Ethernet Controller 1014 0267 NetVista A30p 103a 82801DB PRO/100 VE (CNR) Ethernet Controller @@ -8386,34 +9801,37 @@ 1048 PRO/10GbE LR Server Adapter 8086 a01f PRO/10GbE LR Server Adapter 8086 a11f PRO/10GbE LR Server Adapter + 104b Ethernet Controller 1050 82562EZ 10/100 Ethernet Controller 1462 728c 865PE Neo2 (MS-6728) 1462 758c MS-6758 (875P Neo) + 8086 3020 D865PERL mainboard + 8086 302f Desktop Board D865GBF 8086 3427 S875WP1-E mainboard 1051 82801EB/ER (ICH5/ICH5R) integrated LAN Controller + 1052 PRO/100 VM Network Connection + 1053 PRO/100 VM Network Connection 1059 82551QM Ethernet Controller -# ICH-6 Component + 105e 82571EB Gigabit Ethernet Controller + 1775 6003 Telum GE-QT + 105f 82571EB Gigabit Ethernet Controller + 1060 82571EB Gigabit Ethernet Controller 1064 82562ET/EZ/GT/GZ - PRO/100 VE (LOM) Ethernet Controller -# ICH-6 Component + 1043 80f8 P5GD1-VW Mainboard 1065 82562ET/EZ/GT/GZ - PRO/100 VE Ethernet Controller -# ICH-6 Component 1066 82562 EM/EX/GX - PRO/100 VM (LOM) Ethernet Controller -# ICH-6 Component 1067 82562 EM/EX/GX - PRO/100 VM Ethernet Controller -# ICH-6 Component 1068 82562ET/EZ/GT/GZ - PRO/100 VE (LOM) Ethernet Controller Mobile -# ICH-6 Component - 1069 82562 EM/EX/GX - PRO/100 VM (LOM) Ethernet Controller Mobile -# ICH-6 Component - 106a 82562G \t- PRO/100 VE (LOM) Ethernet Controller -# ICH-6 Component - 106b 82562G \t- PRO/100 VE Ethernet Controller Mobile + 1069 82562EM/EX/GX - PRO/100 VM (LOM) Ethernet Controller Mobile + 106a 82562G - PRO/100 VE (LOM) Ethernet Controller + 106b 82562G - PRO/100 VE Ethernet Controller Mobile 1075 82547GI Gigabit Ethernet Controller 1028 0165 PowerEdge 750 8086 0075 PRO/1000 CT Network Connection 8086 1075 PRO/1000 CT Network Connection 1076 82541GI/PI Gigabit Ethernet Controller 1028 0165 PowerEdge 750 + 1028 019a PowerEdge SC1425 8086 0076 PRO/1000 MT Network Connection 8086 1076 PRO/1000 MT Network Connection 8086 1176 PRO/1000 MT Desktop Adapter @@ -8427,6 +9845,7 @@ 1079 82546GB Gigabit Ethernet Controller 103c 12a6 HP Dual Port 1000Base-T [A9900A] 103c 12cf HP Core Dual Port 1000Base-T [AB352A] + 1fc1 0027 Niagara 2261 Failover NIC 4c53 1090 Cx9 / Vx9 mainboard 4c53 10b0 CL9 mainboard 8086 0079 PRO/1000 MT Dual Port Network Connection @@ -8440,6 +9859,39 @@ 107b 82546GB Gigabit Ethernet Controller 8086 007b PRO/1000 MB Dual Port Server Connection 8086 107b PRO/1000 MB Dual Port Server Connection + 107c 82541PI Gigabit Ethernet Controller + 107d 82572EI Gigabit Ethernet Controller + 107e 82572EI Gigabit Ethernet Controller + 107f 82572EI Gigabit Ethernet Controller + 1080 FA82537EP 56K V.92 Data/Fax Modem PCI + 1081 Enterprise Southbridge LAN Copper + 1082 Enterprise Southbridge LAN fiber + 1083 Enterprise Southbridge LAN SERDES + 1084 Enterprise Southbridge IDE Redirection + 1085 Enterprise Southbridge Serial Port Redirection + 1086 Enterprise Southbridge IPMI/KCS0 + 1087 Enterprise Southbridge UHCI Redirection + 1089 Enterprise Southbridge BT + 108a 82546EB Gigabit Ethernet Controller + 108b 82573V Gigabit Ethernet Controller (Copper) + 108c 82573E Gigabit Ethernet Controller (Copper) +# Intel(R) Active Management Technology - KCS + 108e 82573E KCS + 108f Intel(R) Active Management Technology - SOL + 1092 Intel(R) PRO/100 VE Network Connection + 1096 PRO/1000 EB Network Connection with I/O Acceleration + 1097 Enterprise Southbridge DPT LAN fiber + 1098 PRO/1000 EB Backplane Connection with I/O Acceleration + 1099 82546GB Quad Port Server Adapter + 109a 82573L Gigabit Ethernet Controller + 109b 82546GB PRO/1000 GF Quad Port Server Adapter + 10a0 82571EB PRO/1000 AT Quad Port Bypass Adapter + 10a1 82571EB PRO/1000 AF Quad Port Bypass Adapter + 10b0 82573L PRO/1000 PL Network Connection + 10b2 82573V PRO/1000 PM Network Connection + 10b3 82573E PRO/1000 PM Network Connection + 10b4 82573L PRO/1000 PL Network Connection + 10b5 82546GB PRO/1000 GT Quad Port Server Adapter 1107 PRO/1000 MF Server Adapter (LX) 1130 82815 815 Chipset Host Bridge and Memory Controller Hub 1025 1016 Travelmate 612 TX @@ -8452,6 +9904,7 @@ 1025 1016 Travelmate 612 TX 104d 80df Vaio PCG-FX403 8086 4532 D815EEA2 Mainboard + 8086 4541 D815EEA Motherboard 8086 4557 D815EGEW Mainboard 1161 82806AA PCI64 Hub Advanced Programmable Interrupt Controller 8086 1161 82806AA PCI64 Hub APIC @@ -8524,9 +9977,11 @@ 103c 10e3 NetServer 10/100TX 103c 10e4 NetServer 10/100TX 103c 1200 NetServer 10/100TX + 108e 10cf EtherExpress PRO/100(B) 10c3 1100 SmartEther100 SC1100 10cf 1115 8255x-based Ethernet Adapter (10/100) 10cf 1143 8255x-based Ethernet Adapter (10/100) + 110a 008b 82551QM Fast Ethernet Multifuction PCI/CardBus Controller 1179 0001 8255x-based Ethernet Adapter (10/100) 1179 0002 PCI FastEther LAN on Docker 1179 0003 8255x-based Fast Ethernet @@ -8538,6 +9993,7 @@ 144d 2502 SEM-2100IL MiniPCI LAN Adapter 1668 1100 EtherExpress PRO/100B (TX) (MiniPCI Ethernet+Modem) 4c53 1080 CT8 mainboard + 4c53 10e0 PSL09 PrPMC 8086 0001 EtherExpress PRO/100B (TX) 8086 0002 EtherExpress PRO/100B (T4) 8086 0003 EtherExpress PRO/10+ @@ -8546,7 +10002,6 @@ 8086 0006 82557 10/100 with Wake on LAN 8086 0007 82558 10/100 Adapter 8086 0008 82558 10/100 with Wake on LAN - 8086 0009 EtherExpress PRO/100+ 8086 000a EtherExpress PRO/100+ Management Adapter 8086 000b EtherExpress PRO/100+ 8086 000c EtherExpress PRO/100+ Management Adapter @@ -8647,7 +10102,7 @@ 1460 82870P2 P64H2 Hub PCI Bridge 1461 82870P2 P64H2 I/OxAPIC 15d9 3480 P4DP6 - 4c53 1090 Cx9 / Vx9 mainboard + 4c53 1090 Cx9/Vx9 mainboard 1462 82870P2 P64H2 Hot Plug Controller 1960 80960RP [i960RP Microprocessor] 101e 0431 MegaRAID 431 RAID Controller @@ -8682,15 +10137,19 @@ 1a30 82845 845 (Brookdale) Chipset Host Bridge 1028 010e Optiplex GX240 1a31 82845 845 (Brookdale) Chipset AGP Bridge + 1a38 Server DMA Controller + 1a48 PRO/10GbE SR Server Adapter 2410 82801AA ISA Bridge (LPC) 2411 82801AA IDE 2412 82801AA USB 2413 82801AA SMBus 2415 82801AA AC'97 Audio 1028 0095 Precision Workstation 220 Integrated Digital Audio + 110a 0051 Activy 2xx 11d4 0040 SoundMAX Integrated Digital Audio 11d4 0048 SoundMAX Integrated Digital Audio 11d4 5340 SoundMAX Integrated Digital Audio + 1734 1025 Activy 3xx 2416 82801AA AC'97 Modem 2418 82801AA PCI Bridge 2420 82801AB ISA Bridge (LPC) @@ -8739,6 +10198,8 @@ 1025 1016 Travelmate 612 TX 104d 80df Vaio PCG-FX403 2448 82801 Mobile PCI Bridge + 103c 099c nx6110/nc6120 + 1734 1055 Amilo M1420 2449 82801BA/BAM/CA/CAM Ethernet Controller 0e11 0012 EtherExpress PRO/100 VM 0e11 0091 EtherExpress PRO/100 VE @@ -8792,6 +10253,7 @@ 245e 82801E PCI Bridge 2480 82801CA LPC Interface Controller 2482 82801CA/CAM USB (Hub #1) + 0e11 0030 Evo N600c 1014 0220 ThinkPad A/T/X Series 104d 80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 15d9 3480 P4DP6 @@ -8804,6 +10266,7 @@ 15d9 3480 P4DP6 8086 1958 vpr Matrix 170B4 2484 82801CA/CAM USB (Hub #2) + 0e11 0030 Evo N600c 1014 0220 ThinkPad A/T/X Series 104d 80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 15d9 3480 P4DP6 @@ -8821,16 +10284,17 @@ 1014 051a ThinkPad A/T/X Series 101f 1025 Acer 620 Series 104d 80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP - 1179 0001 Toshiba Satellite 1110 Z15 internal Modem 134d 4c21 Dell Inspiron 2100 internal modem 144d 2115 vpr Matrix 170B4 internal modem 14f1 5421 MD56ORD V.92 MDC Modem 2487 82801CA/CAM USB (Hub #3) + 0e11 0030 Evo N600c 1014 0220 ThinkPad A/T/X Series 104d 80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 15d9 3480 P4DP6 8086 1958 vpr Matrix 170B4 248a 82801CAM IDE U100 + 0e11 0030 Evo N600c 1014 0220 ThinkPad A/T/X Series 104d 80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 8086 1958 vpr Matrix 170B4 @@ -8847,58 +10311,81 @@ 1025 005a TravelMate 290 1028 0126 Optiplex GX260 1028 0163 Latitude D505 - 103c 0890 NC6000 laptop + 1028 0196 Inspiron 5160 + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop 1071 8160 MIM2000 1462 5800 845PE Max (MS-6580) 1509 2990 Averatec 5110H laptop + 1734 1055 Amilo M1420 4c53 1090 Cx9 / Vx9 mainboard + 8086 4541 Latitude D400 24c3 82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) SMBus Controller 1014 0267 NetVista A30p 1025 005a TravelMate 290 1028 0126 Optiplex GX260 - 103c 0890 NC6000 laptop + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop 1071 8160 MIM2000 1458 24c2 GA-8PE667 Ultra 1462 5800 845PE Max (MS-6580) + 1734 1055 Amilo M1420 4c53 1090 Cx9 / Vx9 mainboard 24c4 82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) USB UHCI Controller #2 1014 0267 NetVista A30p 1025 005a TravelMate 290 1028 0126 Optiplex GX260 1028 0163 Latitude D505 - 103c 0890 NC6000 laptop + 1028 0196 Inspiron 5160 + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop 1071 8160 MIM2000 1462 5800 845PE Max (MS-6580) 1509 2990 Averatec 5110H 4c53 1090 Cx9 / Vx9 mainboard + 8086 4541 Latitude D400 24c5 82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) AC'97 Audio Controller 0e11 00b8 Analog Devices Inc. codec [SoundMAX] 1014 0267 NetVista A30p 1025 005a TravelMate 290 + 1028 0139 Latitude D400 1028 0163 Latitude D505 - 103c 0890 NC6000 laptop + 1028 0196 Inspiron 5160 + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop 1071 8160 MIM2000 1458 a002 GA-8PE667 Ultra 1462 5800 845PE Max (MS-6580) + 1734 1055 Amilo M1420 24c6 82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) AC'97 Modem Controller + 003c 1025 Acer Aspire 2001WLCi (Compal CL50 motherboard) implementation 1025 005a TravelMate 290 - 103c 0890 NC6000 laptop + 1028 0196 Inspiron 5160 + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop 1071 8160 MIM2000 24c7 82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) USB UHCI Controller #3 1014 0267 NetVista A30p 1025 005a TravelMate 290 1028 0126 Optiplex GX260 1028 0163 Latitude D505 - 103c 0890 NC6000 laptop + 1028 0196 Inspiron 5160 + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop 1071 8160 MIM2000 1462 5800 845PE Max (MS-6580) 1509 2990 Averatec 5110H 4c53 1090 Cx9 / Vx9 mainboard + 8086 4541 Latitude D400 24ca 82801DBM (ICH4-M) IDE Controller 1025 005a TravelMate 290 1028 0163 Latitude D505 - 103c 0890 NC6000 laptop + 1028 0196 Inspiron 5160 + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop 1071 8160 MIM2000 + 1734 1055 Amilo M1420 + 8086 4541 Latitude D400 24cb 82801DB (ICH4) IDE Controller 1014 0267 NetVista A30p 1028 0126 Optiplex GX260 @@ -8906,78 +10393,143 @@ 1462 5800 845PE Max (MS-6580) 4c53 1090 Cx9 / Vx9 mainboard 24cc 82801DBM (ICH4-M) LPC Interface Bridge + 1734 1055 Amilo M1420 24cd 82801DB/DBM (ICH4/ICH4-M) USB2 EHCI Controller 1014 0267 NetVista A30p 1025 005a TravelMate 290 + 1028 011d Latitude D600 1028 0126 Optiplex GX260 + 1028 0139 Latitude D400 1028 0163 Latitude D505 - 103c 0890 NC6000 laptop + 1028 0196 Inspiron 5160 + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop 1071 8160 MIM2000 1462 3981 845PE Max (MS-6580) 1509 1968 Averatec 5110H + 1734 1055 Amilo M1420 4c53 1090 Cx9 / Vx9 mainboard 24d0 82801EB/ER (ICH5/ICH5R) LPC Interface Bridge 24d1 82801EB (ICH5) SATA Controller + 1028 0169 Precision 470 + 1028 019a PowerEdge SC1425 103c 12bc d530 CMT (DG746A) + 1043 80a6 P4P800 SE Mainboard 1458 24d1 GA-8IPE1000 Pro2 motherboard (865PE) 1462 7280 865PE Neo2 (MS-6728) + 15d9 4580 P4SCE Mainboard 8086 3427 S875WP1-E mainboard + 8086 4246 Desktop Board D865GBF 8086 524c D865PERL mainboard 24d2 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #1 + 1014 02ed xSeries server mainboard + 1028 0169 Precision 470 + 1028 0183 PowerEdge 1800 + 1028 019a PowerEdge SC1425 + 103c 006a nx9500 103c 12bc d530 CMT (DG746A) - 1043 80a6 P4P800 Mainboard - 1458 24d2 GA-8KNXP motherboard (875P) + 1043 80a6 P5P800-MX Mainboard + 1458 24d2 GA-8IPE1000/8KNXP motherboard 1462 7280 865PE Neo2 (MS-6728) + 15d9 4580 P4SCE Mainboard + 1734 101c Primergy RX300 S2 8086 3427 S875WP1-E mainboard + 8086 4246 Desktop Board D865GBF 8086 524c D865PERL mainboard 24d3 82801EB/ER (ICH5/ICH5R) SMBus Controller + 1014 02ed xSeries server mainboard + 1028 0156 Precision 360 + 1028 0169 Precision 470 1043 80a6 P4P800 Mainboard 1458 24d2 GA-8IPE1000 Pro2 motherboard (865PE) 1462 7280 865PE Neo2 (MS-6728) + 15d9 4580 P4SCE Mainboard + 1734 101c Primergy RX300 S2 8086 3427 S875WP1-E mainboard + 8086 4246 Desktop Board D865GBF 8086 524c D865PERL mainboard 24d4 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #2 + 1014 02ed xSeries server mainboard + 1028 0169 Precision 470 + 1028 0183 PowerEdge 1800 + 1028 019a PowerEdge SC1425 + 103c 006a nx9500 103c 12bc d530 CMT (DG746A) - 1043 80a6 P4P800 Mainboard + 1043 80a6 P5P800-MX Mainboard 1458 24d2 GA-8IPE1000 Pro2 motherboard (865PE) 1462 7280 865PE Neo2 (MS-6728) + 15d9 4580 P4SCE Mainboard + 1734 101c Primergy RX300 S2 8086 3427 S875WP1-E mainboard + 8086 4246 Desktop Board D865GBF 8086 524c D865PERL mainboard 24d5 82801EB/ER (ICH5/ICH5R) AC'97 Audio Controller - 103c 12bc Analog Devices codec [SoundMAX Integrated Digital Audio] + 1028 0169 Precision 470 + 103c 006a nx9500 1043 80f3 P4P800 Mainboard - 1458 a002 GA-8KNXP motherboard (875P) + 1043 810f P5P800-MX Mainboard + 1458 a002 GA-8IPE1000/8KNXP motherboard + 1462 0080 65PE Neo2-V (MS-6788) mainboard 1462 7280 865PE Neo2 (MS-6728) 8086 a000 D865PERL mainboard + 8086 e000 D865PERL mainboard + 8086 e001 Desktop Board D865GBF 24d6 82801EB/ER (ICH5/ICH5R) AC'97 Modem Controller - 24d7 82801EB/ER (ICH5/ICH5R) USB UHCI #3 + 103c 006a nx9500 + 24d7 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #3 + 1014 02ed xSeries server mainboard + 1028 0169 Precision 470 + 1028 0183 PowerEdge 1800 + 103c 006a nx9500 103c 12bc d530 CMT (DG746A) - 1043 80a6 P4P800 Mainboard + 1043 80a6 P5P800-MX Mainboard 1458 24d2 GA-8IPE1000 Pro2 motherboard (865PE) 1462 7280 865PE Neo2 (MS-6728) + 15d9 4580 P4SCE Mainboard + 1734 101c Primergy RX300 S2 8086 3427 S875WP1-E mainboard + 8086 4246 Desktop Board D865GBF 8086 524c D865PERL mainboard 24db 82801EB/ER (ICH5/ICH5R) IDE Controller + 1014 02ed xSeries server mainboard + 1028 0169 Precision 470 + 1028 019a PowerEdge SC1425 + 103c 006a nx9500 103c 12bc d530 CMT (DG746A) - 1043 80a6 P4P800 Mainboard + 1043 80a6 P5P800-MX Mainboard 1458 24d2 GA-8IPE1000 Pro2 motherboard (865PE) 1462 7280 865PE Neo2 (MS-6728) 1462 7580 MSI 875P + 15d9 4580 P4SCE Mainboard + 1734 101c Primergy RX300 S2 + 8086 24db P4C800 Mainboard 8086 3427 S875WP1-E mainboard + 8086 4246 Desktop Board D865GBF 8086 524c D865PERL mainboard 24dc 82801EB (ICH5) LPC Interface Bridge 24dd 82801EB/ER (ICH5/ICH5R) USB2 EHCI Controller + 1014 02ed xSeries server mainboard + 1028 0169 Precision 470 + 1028 0183 PowerEdge 1800 + 1028 019a PowerEdge SC1425 + 103c 006a nx9500 103c 12bc d530 CMT (DG746A) - 1043 80a6 P4P800 Mainboard + 1043 80a6 P5P800-MX Mainboard 1458 5006 GA-8IPE1000 Pro2 motherboard (865PE) 1462 7280 865PE Neo2 (MS-6728) 8086 3427 S875WP1-E mainboard + 8086 4246 Desktop Board D865GBF 8086 524c D865PERL mainboard 24de 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #4 - 1043 80a6 P4P800 Mainboard + 1014 02ed xSeries server mainboard + 1028 0169 Precision 470 + 1043 80a6 P5P800-MX Mainboard 1458 24d2 GA-8IPE1000 Pro2 motherboard (865PE) 1462 7280 865PE Neo2 (MS-6728) + 15d9 4580 P4SCE Mainboard + 1734 101c Primergy RX300 S2 8086 3427 S875WP1-E mainboard + 8086 4246 Desktop Board D865GBF 8086 524c D865PERL mainboard 24df 82801ER (ICH5R) SATA Controller 2500 82820 820 (Camino) Chipset Host Bridge (MCH) @@ -9025,125 +10577,371 @@ 2562 82845G/GL[Brookdale-G]/GE Chipset Integrated Graphics Device 1014 0267 NetVista A30p 2570 82865G/PE/P DRAM Controller/Host-Hub Interface - 1043 80f2 P4P800 Mainboard + 103c 006a nx9500 + 1043 80f2 P5P800-MX Mainboard 1458 2570 GA-8IPE1000 Pro2 motherboard (865PE) 2571 82865G/PE/P PCI to AGP Controller - 2572 82865G Integrated Graphics Device + 2572 82865G Integrated Graphics Controller + 1028 019d Dimension 3000 + 1043 80a5 P5P800-MX Mainboard + 8086 4246 Desktop Board D865GBF 2573 82865G/PE/P PCI to CSA Bridge 2576 82865G/PE/P Processor to I/O Memory Interface 2578 82875P/E7210 Memory Controller Hub 1458 2578 GA-8KNXP motherboard (875P) 1462 7580 MS-6758 (875P Neo) -# Motherboard P4SCE - 15d9 4580 Super Micro Computer Inc. P4SCE + 15d9 4580 P4SCE Motherboard 2579 82875P Processor to AGP Controller 257b 82875P/E7210 Processor to PCI to CSA Bridge 257e 82875P/E7210 Processor to I/O Memory Interface - 2580 915G/P/GV Processor to I/O Controller - 2581 915G/P/GV PCI Express Root Port - 2582 82915G Express Chipset Family Graphics Controller + 2580 915G/P/GV/GL/PL/910GL Express Memory Controller Hub + 1458 2580 GA-8I915ME-G Mainboard + 1462 7028 915P/G Neo2 + 1734 105b Scenic W620 + 2581 915G/P/GV/GL/PL/910GL Express PCI Express Root Port + 2582 82915G/GV/910GL Express Chipset Family Graphics Controller 1028 1079 Optiplex GX280 - 2584 925X/XE Memory Controller Hub - 2585 925X/XE PCI Express Root Port + 1043 2582 P5GD1-VW Mainboard + 1458 2582 GA-8I915ME-G Mainboard + 1734 105b Scenic W620 + 2584 925X/XE Express Memory Controller Hub + 2585 925X/XE Express PCI Express Root Port 2588 E7220/E7221 Memory Controller Hub 2589 E7220/E7221 PCI Express Root Port 258a E7221 Integrated Graphics Controller - 2590 Mobile Memory Controller Hub - 2591 Mobile Memory Controller Hub PCI Express Port - 2592 Mobile Graphics Controller + 2590 Mobile 915GM/PM/GMS/910GML Express Processor to DRAM Controller + 1028 0182 Dell Latidude C610 + 103c 099c nx6110/nc6120 + a304 81b7 Vaio VGN-S3XP + 2591 Mobile 915GM/PM Express PCI Express Root Port + 2592 Mobile 915GM/GMS/910GML Express Graphics Controller + 103c 099c nx6110/nc6120 + 1043 1881 GMA 900 915GM Integrated Graphics 25a1 6300ESB LPC Interface Controller 25a2 6300ESB PATA Storage Controller 4c53 10b0 CL9 mainboard + 4c53 10e0 PSL09 PrPMC 25a3 6300ESB SATA Storage Controller 4c53 10b0 CL9 mainboard + 4c53 10d0 Telum ASLP10 Processor AMC + 4c53 10e0 PSL09 PrPMC 25a4 6300ESB SMBus Controller 4c53 10b0 CL9 mainboard + 4c53 10d0 Telum ASLP10 Processor AMC + 4c53 10e0 PSL09 PrPMC 25a6 6300ESB AC'97 Audio Controller 4c53 10b0 CL9 mainboard 25a7 6300ESB AC'97 Modem Controller 25a9 6300ESB USB Universal Host Controller 4c53 10b0 CL9 mainboard + 4c53 10d0 Telum ASLP10 Processor AMC + 4c53 10e0 PSL09 PrPMC 25aa 6300ESB USB Universal Host Controller 4c53 10b0 CL9 mainboard + 4c53 10e0 PSL09 PrPMC 25ab 6300ESB Watchdog Timer 4c53 10b0 CL9 mainboard + 4c53 10d0 Telum ASLP10 Processor AMC + 4c53 10e0 PSL09 PrPMC 25ac 6300ESB I/O Advanced Programmable Interrupt Controller 4c53 10b0 CL9 mainboard + 4c53 10d0 Telum ASLP10 Processor AMC + 4c53 10e0 PSL09 PrPMC 25ad 6300ESB USB2 Enhanced Host Controller + 4c53 10b0 CL9 mainboard + 4c53 10d0 Telum ASLP10 Processor AMC + 4c53 10e0 PSL09 PrPMC 25ae 6300ESB 64-bit PCI-X Bridge 25b0 6300ESB SATA RAID Controller - 2600 Server Hub Interface - 2601 Server Hub PCI Express x4 Port D - 2602 Server Hub PCI Express x4 Port C0 - 2603 Server Hub PCI Express x4 Port C1 - 2604 Server Hub PCI Express x4 Port B0 - 2605 Server Hub PCI Express x4 Port B1 - 2606 Server Hub PCI Express x4 Port A0 - 2607 Server Hub PCI Express x4 Port A1 - 2608 Server Hub PCI Express x8 Port C - 2609 Server Hub PCI Express x8 Port B - 260a Server Hub PCI Express x8 Port A - 260c Server Hub IMI Registers - 2610 Server Hub System Bus, Boot, and Interrupt Registers - 2611 Server Hub Address Mapping Registers - 2612 Server Hub RAS Registers - 2613 Server Hub Reserved Registers - 2614 Server Hub Reserved Registers - 2615 Server Hub Miscellaneous Registers - 2617 Server Hub Reserved Registers - 2618 Server Hub Reserved Registers - 2619 Server Hub Reserved Registers - 261a Server Hub Reserved Registers - 261b Server Hub Reserved Registers - 261c Server Hub Reserved Registers - 261d Server Hub Reserved Registers - 261e Server Hub Reserved Registers - 2620 External Memory Bridge - 2621 External Memory Bridge Control Registers - 2622 External Memory Bridge Memory Interleaving Registers - 2623 External Memory Bridge DDR Initialization and Calibration - 2624 External Memory Bridge Reserved Registers - 2625 External Memory Bridge Reserved Registers - 2626 External Memory Bridge Reserved Registers - 2627 External Memory Bridge Reserved Registers + 4c53 10d0 Telum ASLP10 Processor AMC + 4c53 10e0 PSL09 PrPMC + 25c0 Workstation Memory Controller Hub + 25d0 Server Memory Controller Hub + 25d4 Server Memory Contoller Hub + 25d8 Server Memory Controller Hub + 25e2 Server PCI Express x4 Port 2 + 25e3 Server PCI Express x4 Port 3 + 25e4 Server PCI Express x4 Port 4 + 25e5 Server PCI Express x4 Port 5 + 25e6 Server PCI Express x4 Port 6 + 25e7 Server PCI Express x4 Port 7 + 25e8 Server AMB Memory Mapped Registers + 25f0 Server Error Reporting Registers + 25f1 Reserved Registers + 25f3 Reserved Registers + 25f5 Server FBD Registers + 25f6 Server FBD Registers + 25f7 Server PCI Express x8 Port 2-3 + 25f8 Server PCI Express x8 Port 4-5 + 25f9 Server PCI Express x8 Port 6-7 + 25fa Server PCI Express x16 Port 4-7 + 2600 E8500/E8501 Hub Interface 1.5 + 2601 E8500/E8501 PCI Express x4 Port D + 2602 E8500/E8501 PCI Express x4 Port C0 + 2603 E8500/E8501 PCI Express x4 Port C1 + 2604 E8500/E8501 PCI Express x4 Port B0 + 2605 E8500/E8501 PCI Express x4 Port B1 + 2606 E8500/E8501 PCI Express x4 Port A0 + 2607 E8500/E8501 PCI Express x4 Port A1 + 2608 E8500/E8501 PCI Express x8 Port C + 2609 E8500/E8501 PCI Express x8 Port B + 260a E8500/E8501 PCI Express x8 Port A + 260c E8500/E8501 IMI Registers + 2610 E8500/E8501 Front Side Bus, Boot, and Interrupt Registers + 2611 E8500/E8501 Address Mapping Registers + 2612 E8500/E8501 RAS Registers + 2613 E8500/E8501 Reserved Registers + 2614 E8500/E8501 Reserved Registers + 2615 E8500/E8501 Miscellaneous Registers + 2617 E8500/E8501 Reserved Registers + 2618 E8500/E8501 Reserved Registers + 2619 E8500/E8501 Reserved Registers + 261a E8500/E8501 Reserved Registers + 261b E8500/E8501 Reserved Registers + 261c E8500/E8501 Reserved Registers + 261d E8500/E8501 Reserved Registers + 261e E8500/E8501 Reserved Registers + 2620 E8500/E8501 eXternal Memory Bridge + 2621 E8500/E8501 XMB Miscellaneous Registers + 2622 E8500/E8501 XMB Memory Interleaving Registers + 2623 E8500/E8501 XMB DDR Initialization and Calibration + 2624 E8500/E8501 XMB Reserved Registers + 2625 E8500/E8501 XMB Reserved Registers + 2626 E8500/E8501 XMB Reserved Registers + 2627 E8500/E8501 XMB Reserved Registers 2640 82801FB/FR (ICH6/ICH6R) LPC Interface Bridge + 1462 7028 915P/G Neo2 + 1734 105c Scenic W620 2641 82801FBM (ICH6M) LPC Interface Bridge + 103c 099c nx6110/nc6120 2642 82801FW/FRW (ICH6W/ICH6RW) LPC Interface Bridge 2651 82801FB/FW (ICH6/ICH6W) SATA Controller 1028 0179 Optiplex GX280 + 1043 2601 P5GD1-VW Mainboard + 1734 105c Scenic W620 + 8086 4147 D915GAG Motherboard 2652 82801FR/FRW (ICH6R/ICH6RW) SATA Controller + 1462 7028 915P/G Neo2 2653 82801FBM (ICH6M) SATA Controller 2658 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #1 1028 0179 Optiplex GX280 + 103c 099c nx6110/nc6120 + 1043 80a6 P5GD1-VW Mainboard + 1458 2558 GA-8I915ME-G Mainboard + 1462 7028 915P/G Neo2 + 1734 105c Scenic W620 2659 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #2 1028 0179 Optiplex GX280 + 103c 099c nx6110/nc6120 + 1043 80a6 P5GD1-VW Mainboard + 1458 2659 GA-8I915ME-G Mainboard + 1462 7028 915P/G Neo2 + 1734 105c Scenic W620 265a 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #3 1028 0179 Optiplex GX280 + 103c 099c nx6110/nc6120 + 1043 80a6 P5GD1-VW Mainboard + 1458 265a GA-8I915ME-G Mainboard + 1462 7028 915P/G Neo2 + 1734 105c Scenic W620 265b 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #4 1028 0179 Optiplex GX280 + 103c 099c nx6110/nc6120 + 1043 80a6 P5GD1-VW Mainboard + 1458 265a GA-8I915ME-G Mainboard + 1462 7028 915P/G Neo2 + 1734 105c Scenic W620 265c 82801FB/FBM/FR/FW/FRW (ICH6 Family) USB2 EHCI Controller 1028 0179 Optiplex GX280 + 103c 099c nx6110/nc6120 + 1043 80a6 P5GD1-VW Mainboard + 1458 5006 GA-8I915ME-G Mainboard + 1462 7028 915P/G Neo2 + 1734 105c Scenic W620 2660 82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 1 + 103c 099c nx6110/nc6120 2662 82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 2 2664 82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 3 2666 82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 4 2668 82801FB/FBM/FR/FW/FRW (ICH6 Family) High Definition Audio Controller + 1043 814e P5GD1-VW Mainboard 266a 82801FB/FBM/FR/FW/FRW (ICH6 Family) SMBus Controller 1028 0179 Optiplex GX280 + 1043 80a6 P5GD1-VW Mainboard + 1458 266a GA-8I915ME-G Mainboard + 1462 7028 915P/G Neo2 + 1734 105c Scenic W620 266c 82801FB/FBM/FR/FW/FRW (ICH6 Family) LAN Controller 266d 82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Modem Controller + 1025 006a Conexant AC'97 CoDec (in Acer TravelMate 2410 serie laptop) + 103c 099c nx6110/nc6120 266e 82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Audio Controller + 1025 006a Realtek ALC 655 codec (in Acer TravelMate 2410 serie laptop) 1028 0179 Optiplex GX280 + 1028 0182 Latitude D610 Laptop + 1028 0188 Inspiron 6000 laptop + 103c 099c nx6110/nc6120 + 1458 a002 GA-8I915ME-G Mainboard + 1734 105a Scenic W620 266f 82801FB/FBM/FR/FW/FRW (ICH6 Family) IDE Controller + 103c 099c nx6110/nc6120 + 1043 80a6 P5GD1-VW Mainboard + 1458 266f GA-8I915ME-G Mainboard + 1462 7028 915P/G Neo2 + 1734 105c Scenic W620 + 2670 Enterprise Southbridge LPC + 2680 Enterprise Southbridge SATA IDE + 2681 Enterprise Southbridge SATA AHCI + 2682 Enterprise Southbridge SATA RAID + 2683 Enterprise Southbridge SATA RAID + 2688 Enterprise Southbridge UHCI USB #1 + 2689 Enterprise Southbridge UHCI USB #2 + 268a Enterprise Southbridge UHCI USB #3 + 268b Enterprise Southbridge UHCI USB #4 + 268c Enterprise Southbridge EHCI USB + 2690 Enterprise Southbridge PCI Express Root Port 1 + 2692 Enterprise Southbridge PCI Express Root Port 2 + 2694 Enterprise Southbridge PCI Express Root Port 3 + 2696 Enterprise Southbridge PCI Express Root Port 4 + 2698 Enterprise Southbridge AC '97 Audio + 2699 Enterprise Southbridge AC '97 Modem + 269a Enterprise Southbridge High Definition Audio + 269b Enterprise Southbridge SMBus + 269e Enterprise Southbridge PATA + 2770 945G/GZ/P/PL Express Memory Controller Hub + 8086 544e DeskTop Board D945GTP + 2771 945G/GZ/P/PL Express PCI Express Root Port + 2772 945G/GZ Express Integrated Graphics Controller + 8086 544e DeskTop Board D945GTP + 2774 955X Express Memory Controller Hub + 2775 955X Express PCI Express Root Port + 2776 945G/GZ Express Integrated Graphics Controller + 2778 E7230 Memory Controller Hub + 2779 E7230 PCI Express Root Port + 277a 975X Express PCI Express Root Port + 277c 975X Express Memory Controller Hub + 277d 975X Express PCI Express Root Port 2782 82915G Express Chipset Family Graphics Controller - 2792 Mobile Graphics Controller + 1043 2582 P5GD1-VW Mainboard + 1734 105b Scenic W620 + 2792 Mobile 915GM/GMS/910GML Express Graphics Controller + 103c 099c nx6110/nc6120 + 1043 1881 GMA 900 915GM Integrated Graphics + 27a0 Mobile 945GM/PM/GMS/940GML and 945GT Express Memory Controller Hub + 27a1 Mobile 945GM/PM/GMS/940GML and 945GT Express PCI Express Root Port + 27a2 Mobile 945GM/GMS/940GML Express Integrated Graphics Controller + 27a6 Mobile 945GM/GMS/940GML Express Integrated Graphics Controller + 27b0 82801GH (ICH7DH) LPC Interface Bridge + 27b8 82801GB/GR (ICH7 Family) LPC Interface Bridge + 8086 544e DeskTop Board D945GTP + 27b9 82801GBM (ICH7-M) LPC Interface Bridge + 27bd 82801GHM (ICH7-M DH) LPC Interface Bridge + 27c0 82801GB/GR/GH (ICH7 Family) Serial ATA Storage Controller IDE + 8086 544e DeskTop Board D945GTP + 27c1 82801GR/GH (ICH7 Family) Serial ATA Storage Controller AHCI + 27c3 82801GR/GH (ICH7 Family) Serial ATA Storage Controller RAID + 27c4 82801GBM/GHM (ICH7 Family) Serial ATA Storage Controller IDE + 27c5 82801GBM/GHM (ICH7 Family) Serial ATA Storage Controller AHCI + 27c6 82801GHM (ICH7-M DH) Serial ATA Storage Controller RAID + 27c8 82801G (ICH7 Family) USB UHCI #1 + 8086 544e DeskTop Board D945GTP + 27c9 82801G (ICH7 Family) USB UHCI #2 + 8086 544e DeskTop Board D945GTP + 27ca 82801G (ICH7 Family) USB UHCI #3 + 8086 544e DeskTop Board D945GTP + 27cb 82801G (ICH7 Family) USB UHCI #4 + 8086 544e DeskTop Board D945GTP + 27cc 82801G (ICH7 Family) USB2 EHCI Controller + 8086 544e DeskTop Board D945GTP + 27d0 82801G (ICH7 Family) PCI Express Port 1 + 27d2 82801G (ICH7 Family) PCI Express Port 2 + 27d4 82801G (ICH7 Family) PCI Express Port 3 + 27d6 82801G (ICH7 Family) PCI Express Port 4 + 27d8 82801G (ICH7 Family) High Definition Audio Controller + 27da 82801G (ICH7 Family) SMBus Controller + 8086 544e DeskTop Board D945GTP + 27dc 82801G (ICH7 Family) LAN Controller + 8086 308d DeskTop Board D945GTP + 27dd 82801G (ICH7 Family) AC'97 Modem Controller + 27de 82801G (ICH7 Family) AC'97 Audio Controller + 27df 82801G (ICH7 Family) IDE Controller + 8086 544e DeskTop Board D945GTP + 27e0 82801GR/GH/GHM (ICH7 Family) PCI Express Port 5 + 27e2 82801GR/GH/GHM (ICH7 Family) PCI Express Port 6 + 2810 LPC Interface Controller + 2811 Mobile LPC Interface Controller + 2812 LPC Interface Controller + 2814 LPC Interface Controller + 2815 Mobile LPC Interface Controller + 2820 SATA Controller 1 IDE + 2821 SATA Controller AHCI + 2822 SATA Controller RAID + 2824 SATA Controller AHCI + 2825 SATA Controller 2 IDE + 2828 Mobile SATA Controller IDE + 2829 Mobile SATA Controller AHCI + 282a Mobile SATA Controller RAID + 2830 USB UHCI Controller #1 + 2831 USB UHCI Controller #2 + 2832 USB UHCI Controller #3 + 2834 USB UHCI Controller #4 + 2835 USB UHCI Controller #5 + 2836 USB2 EHCI Controller #1 + 283a USB2 EHCI Controller #2 + 283e SMBus Controller + 283f PCI Express Port 1 + 2841 PCI Express Port 2 + 2843 PCI Express Port 3 + 2845 PCI Express Port 4 + 2847 PCI Express Port 5 + 2849 PCI Express Port 6 + 284b HD Audio Controller + 284f Thermal Subsystem + 2850 Mobile IDE Controller + 2970 Memory Controller Hub + 2971 PCI Express Root Port + 2972 Integrated Graphics Controller + 2973 Integrated Graphics Controller + 2974 HECI Controller + 2976 PT IDER Controller + 2977 KT Controller + 2990 Memory Controller Hub + 2991 PCI Express Root Port + 2992 Integrated Graphics Controller + 2993 Integrated Graphics Controller + 2994 HECI Controller + 2995 HECI Controller + 2996 PT IDER Controller + 2997 KT Controller + 29a0 Memory Controller Hub + 29a1 PCI Express Root Port + 29a2 Integrated Graphics Controller + 29a3 Integrated Graphics Controller + 29a4 HECI Controller + 29a5 HECI Controller + 29a6 PT IDER Controller + 29a7 KT Controller 3092 Integrated RAID 3200 GD31244 PCI-X SATA HBA 3340 82855PM Processor to I/O Controller 1025 005a TravelMate 290 - 103c 0890 NC6000 laptop + 103c 088c nc8000 laptop + 103c 0890 nc6000 laptop 3341 82855PM Processor to AGP Controller + 3500 Enterprise Southbridge PCI Express Upstream Port + 3501 Enterprise Southbridge PCI Express Upstream Port + 3504 Enterprise Southbridge IOxAPIC + 3505 Enterprise Southbridge IOxAPIC + 350c Enterprise Southbridge PCI Express to PCI-X Bridge + 350d Enterprise Southbridge PCI Express to PCI-X Bridge + 3510 Enterprise Southbridge PCI Express Downstream Port E1 + 3511 Enterprise Southbridge PCI Express Downstream Port E1 + 3514 Enterprise Southbridge PCI Express Downstream Port E2 + 3515 Enterprise Southbridge PCI Express Downstream Port E2 + 3518 Enterprise Southbridge PCI Express Downstream Port E3 + 3519 Enterprise Southbridge PCI Express Downstream Port E3 3575 82830 830 Chipset Host Bridge + 0e11 0030 Evo N600c 1014 021d ThinkPad A/T/X Series 104d 80e7 VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP 3576 82830 830 Chipset AGP Bridge @@ -9151,23 +10949,44 @@ 1014 0513 ThinkPad A/T/X Series 3578 82830 830 Chipset Host Bridge 3580 82852/82855 GM/GME/PM/GMV Processor to I/O Controller + 1028 0139 Latitude D400 1028 0163 Latitude D505 + 1028 0196 Inspiron 5160 + 1734 1055 Amilo M1420 4c53 10b0 CL9 mainboard + 4c53 10e0 PSL09 PrPMC 3581 82852/82855 GM/GME/PM/GMV Processor to AGP Controller + 1734 1055 Amilo M1420 3582 82852/855GM Integrated Graphics Device + 1028 0139 Latitude D400 1028 0163 Latitude D505 4c53 10b0 CL9 mainboard + 4c53 10e0 PSL09 PrPMC 3584 82852/82855 GM/GME/PM/GMV Processor to I/O Controller + 1028 0139 Latitude D400 1028 0163 Latitude D505 + 1028 0196 Inspiron 5160 + 1734 1055 Amilo M1420 4c53 10b0 CL9 mainboard + 4c53 10e0 PSL09 PrPMC 3585 82852/82855 GM/GME/PM/GMV Processor to I/O Controller + 1028 0139 Latitude D400 1028 0163 Latitude D505 + 1028 0196 Inspiron 5160 + 1734 1055 Amilo M1420 4c53 10b0 CL9 mainboard + 4c53 10e0 PSL09 PrPMC 3590 E7520 Memory Controller Hub + 1028 019a PowerEdge SC1425 + 1734 103e Primergy RX300 S2 + 4c53 10d0 Telum ASLP10 Processor AMC 3591 E7525/E7520 Error Reporting Registers + 1028 0169 Precision 470 + 4c53 10d0 Telum ASLP10 Processor AMC 3592 E7320 Memory Controller Hub 3593 E7320 Error Reporting Registers 3594 E7520 DMA Controller + 4c53 10d0 Telum ASLP10 Processor AMC 3595 E7525/E7520/E7320 PCI Express Port A 3596 E7525/E7520/E7320 PCI Express Port A1 3597 E7525/E7520 PCI Express Port B @@ -9176,8 +10995,16 @@ 359a E7520 PCI Express Port C1 359b E7525/E7520/E7320 Extended Configuration Registers 359e E7525 Memory Controller Hub - 4220 PRO/Wireless 2200BG - 4223 PRO/Wireless 2915ABG MiniPCI Adapter + 1028 0169 Precision 470 + 4220 PRO/Wireless 2200BG Network Connection + 4222 PRO/Wireless 3945ABG Network Connection + 8086 1005 PRO/Wireless 3945BG Network Connection + 8086 1034 PRO/Wireless 3945BG Network Connection + 8086 1044 PRO/Wireless 3945BG Network Connection + 4223 PRO/Wireless 2915ABG Network Connection + 4224 PRO/Wireless 2915ABG Network Connection + 4227 PRO/Wireless 3945ABG Network Connection + 8086 1014 PRO/Wireless 3945BG Network Connection 5200 EtherExpress PRO/100 Intelligent Server 5201 EtherExpress PRO/100 Intelligent Server 8086 0001 EtherExpress PRO/100 Server Ethernet Adapter @@ -9186,7 +11013,8 @@ 7010 82371SB PIIX3 IDE [Natoma/Triton II] 7020 82371SB PIIX3 USB [Natoma/Triton II] 7030 430VX - 82437VX TVX [Triton VX] - 7050 Intel Intercast Video Capture Card + 7050 Intercast Video Capture Card + 7051 PB 642365-003 (Business Video Conferencing Card) 7100 430TX - 82439TX MTXC 7110 82371AB/EB/MB PIIX4 ISA 15ad 1976 virtualHW v3 @@ -9265,18 +11093,18 @@ 84e4 460GX - 84460GX Memory Data Controller (MDC) 84e6 460GX - 82466GX Wide and fast PCI eXpander Bridge (WXB) 84ea 460GX - 84460GX AGP Bridge (GXB function 1) - 8500 IXP4XX - Intel Network Processor family. IXP420, IXP421, IXP422, IXP425 and IXC1100 + 8500 IXP4XX Intel Network Processor (IXP420/421/422/425/IXC1100) + 1993 0ded mGuard-PCI AV#2 + 1993 0dee mGuard-PCI AV#1 + 1993 0def mGuard-PCI AV#0 9000 IXP2000 Family Network Processor 9001 IXP2400 Network Processor + 9002 IXP2300 Network Processor 9004 IXP2800 Network Processor 9621 Integrated RAID 9622 Integrated RAID 9641 Integrated RAID 96a1 Integrated RAID -# retail verson - a01f PRO/10GbE LR Server Adapter -# OEM version - a11f PRO/10GbE LR Server Adapter b152 21152 PCI-to-PCI Bridge # observed, and documented in Intel revision note; new mask of 1011:0026 b154 21154 PCI-to-PCI Bridge @@ -9285,12 +11113,12 @@ 4c53 1050 CT7 mainboard 4c53 1051 CE7 mainboard e4bf 1000 CC8-1-BLUES - ffff 450NX/GX [Orion] - 82453KX/GX Memory controller [BUG] 8401 TRENDware International Inc. 8800 Trigem Computer Inc. 2008 Video assistent component 8866 T-Square Design Inc. 8888 Silicon Magic +8912 TRX # 8c4a is not Winbond but there is a board misprogrammed 8c4a Winbond 1980 W89C940 misprogrammed [ne2k] @@ -9459,10 +11287,10 @@ 10f1 2462 Thunder K7 S2462 15d9 9005 Onboard SCSI Host Adapter 8086 3411 SDS2 Mainboard + 0241 Serial ATA II RAID 1420SA 0250 ServeRAID Controller 1014 0279 ServeRAID-xx 1014 028c ServeRAID-xx -# from kernel sources 0279 ServeRAID 6M 0283 AAC-RAID 9005 0283 Catapult @@ -9470,8 +11298,10 @@ 9005 0284 Tomcat 0285 AAC-RAID 0e11 0295 SATA 6Ch (Bearcat) + 1014 02f2 ServeRAID 8i 1028 0287 PowerEdge Expandable RAID Controller 320/DC 1028 0291 CERC SATA RAID 2 PCI SATA 6ch (DellCorsair) + 103c 3227 AAR-2610SA 17aa 0286 Legend S220 (Legend Crusader) 17aa 0287 Legend S230 (Legend Vulcan) 9005 0285 2200S (Vulcan) @@ -9480,17 +11310,52 @@ 9005 0288 3230S (Harrier) 9005 0289 3240S (Tornado) 9005 028a ASR-2020S PCI-X ZCR (Skyhawk) - 9005 028b ASR-2020S SO-DIMM PCI-X ZCR (Terminator) + 9005 028b ASR-2025S (Terminator) + 9005 028e ASR-2020SA (Skyhawk) + 9005 028f ASR-2025SA 9005 0290 AAR-2410SA PCI SATA 4ch (Jaguar II) 9005 0292 AAR-2810SA PCI SATA 8ch (Corsair-8) 9005 0293 AAR-21610SA PCI SATA 16ch (Corsair-16) 9005 0294 ESD SO-DIMM PCI-X SATA ZCR (Prowler) + 9005 0296 ASR-2240S + 9005 0297 ASR-4005SAS + 9005 0298 ASR-4000SAS + 9005 0299 ASR-4800SAS + 9005 029a ASR-4805SAS 0286 AAC-RAID (Rocket) + 1014 9540 ServeRAID 8k/8k-l4 + 1014 9580 ServeRAID 8k/8k-l8 9005 028c ASR-2230S + ASR-2230SLP PCI-X (Lancer) + 9005 028d ASR-2130S + 9005 029b ASR-2820SA + 9005 029c ASR-2620SA + 9005 029d ASR-2420SA + 9005 029e ICP ICP9024R0 + 9005 029f ICP ICP9014R0 + 9005 02a0 ICP ICP9047MA + 9005 02a1 ICP ICP9087MA + 9005 02a2 ASR-4810SAS + 9005 02a3 ICP ICP5085AU + 9005 02a4 ICP ICP5085LI + 9005 02a5 ICP ICP5085BR + 9005 02a6 ICP9067MA + 9005 02a7 AAR-2830SA + 9005 02a8 AAR-2430SA + 9005 02a9 ICP5087AU + 9005 02aa ICP5047AU + 9005 0800 Callisto + 0500 Obsidian chipset SCSI controller + 1014 02c1 PCI-X DDR 3Gb SAS Adapter (572A/572C) + 1014 02c2 PCI-X DDR 3Gb SAS RAID Adapter (572B/572D) + 0503 Scamp chipset SCSI controller + 1014 02bf Quad Channel PCI-X DDR U320 SCSI RAID Adapter (571E) + 1014 02d5 Quad Channel PCI-X DDR U320 SCSI RAID Adapter (571F) + 0910 AUA-3100B + 091e AUA-3100B 8000 ASC-29320A U320 800f AIC-7901 U320 8010 ASC-39320 U320 - 8011 ASC-32320D U320 + 8011 ASC-39320D 0e11 00ac ASC-39320D U320 9005 0041 ASC-39320D U320 8012 ASC-29320 U320 @@ -9503,6 +11368,7 @@ 801d AIC-7902B U320 801e AIC-7901A U320 801f AIC-7902 U320 + 1734 1011 Primergy RX300 8080 ASC-29320A U320 w/HostRAID 808f AIC-7901 U320 w/HostRAID 8090 ASC-39320 U320 w/HostRAID @@ -9526,6 +11392,7 @@ 6565 6565 9710 NetMos Technology 7780 USB IRDA-port + 9805 PCI 1 port parallel adapter 9815 PCI 9815 Multi-I/O Controller 1000 0020 2P0S (2 port parallel adaptor) 9835 PCI 9835 Multi-I/O Controller @@ -9552,6 +11419,9 @@ ac1e Digital Receiver Technology Inc ac3d Actuality Systems aecb Adrienne Electronics Corporation + 6250 VITC/LTC Timecode Reader card [PCI-VLTC/RDR] +affe Sirrix AG security technologies + dead Sirrix.PCI4S0 4-port ISDN S0 interface b1b3 Shiva Europe Limited # Pinnacle should be 11bd, but they got it wrong several times --mj bd11 Pinnacle Systems, Inc. (Wrong ID) @@ -9561,27 +11431,51 @@ c0fe Motion Engineering, Inc. ca50 Varian Australia Pty Ltd cafe Chrysalis-ITS + 0003 Luna K3 Hardware Security Module cccc Catapult Communications cddd Tyzx, Inc. 0101 DeepSea 1 High Speed Stereo Vision Frame Grabber 0200 DeepSea 2 High Speed Stereo Vision Frame Grabber +d161 Digium, Inc. + 0205 Wildcard TE205P + 0210 Wildcard TE210P + 0405 Wildcard TE405P (2nd Gen) + 0410 Wildcard TE410P (2nd Gen) + 2400 Wildcard TDM2400P d4d4 Dy4 Systems Inc 0601 PCI Mezzanine Card d531 I+ME ACTIA GmbH d84d Exsys dead Indigita Corporation +deaf Middle Digital Inc. + 9050 PC Weasel Virtual VGA + 9051 PC Weasel Serial Port + 9052 PC Weasel Watchdog Timer e000 Winbond e000 W89C940 -# see also : http://www.schoenfeld.de/inside/Inside_CWMK3.txt maybe a misuse of TJN id or it use the TJN 3XX chip for other applic e159 Tiger Jet Network Inc. 0001 Tiger3XX Modem/ISDN interface 0059 0001 128k ISDN-S/T Adapter 0059 0003 128k ISDN-U Adapter + 00a7 0001 TELES.S0/PCI 2.x ISDN Adapter + 6159 0001 Digium Wildcard T100P T1/PRI + 79fe 0001 Digium Wildcard TE110P T1/E1 Interface + 8086 0003 Digium X100P/X101P analogue PSTN FXO interface + b1b9 0001 Digium Wildcard TDM400P REV I 4-port POTS interface + b1b9 0003 Digium Wildcard TDM400P REV I 4-port POTS interface 0002 Tiger100APC ISDN chipset e4bf EKF Elektronik GmbH # Innovative and scalable network IC vendor e55e Essence Technology, Inc. ea01 Eagle Technology + 000a PCI-773 Temperature Card + 0032 PCI-730 & PC104P-30 Card + 003e PCI-762 Opto-Isolator Card + 0041 PCI-763 Reed Relay Card + 0043 PCI-769 Opto-Isolator Reed Relay Combo Card + 0046 PCI-766 Analog Output Card + 0052 PCI-703 Analog I/O Card + 0800 PCI-800 Digital I/O Card # The main chip of all these devices is by Xilinx -> It could also be a Xilinx ID. ea60 RME 9896 Digi32 @@ -9603,32 +11497,32 @@ ec80 Belkin Corporation ec00 F5D6000 ecc0 Echo Digital Audio Corporation - 0050 Gina24_301 - 0051 Gina24_361 - 0060 Layla24 - 0070 Mona_301_80 - 0071 Mona_301_66 - 0072 Mona_361 - 0080 Mia edd8 ARK Logic Inc a091 1000PV [Stingray] a099 2000PV [Stingray] a0a1 2000MT a0a9 2000MI f1d0 AJA Video -# All boards I have seen have this ID not efac, though all docs say efac... - cafe KONA SD SMPTE 259M I/O - efac KONA SD SMPTE 259M I/O - facd KONA HD SMPTE 292M I/O + c0fe Xena HS/HD-R + c0ff Kona/Xena 2 + cafe Kona SD + cfee Xena LS/SD-22-DA/SD-DA + dcaf Kona HD + dfee Xena HD-DA + efac Xena SD-MM/SD-22-MM + facd Xena HD-MM fa57 Interagon AS 0001 PMC [Pattern Matching Chip] +fab7 Fabric7 Systems, Inc. febd Ultraview Corp. -feda Broadcom Inc (nee Epigram) +# Nee Epigram +feda Broadcom Inc a0fa BCM4210 iLine10 HomePNA 2.0 a10e BCM4230 iLine10 HomePNA 2.0 -# IT & Telecom company, develops PCI Trunk cards fede Fedetec Inc. 0003 TABIC PCI v3 +fffd XenSource, Inc. + 0101 PCI Event Channel Controller fffe VMWare Inc 0405 Virtual SVGA 4.0 0710 Virtual SVGA @@ -9651,7 +11545,14 @@ 02 Floppy disk controller 03 IPI bus controller 04 RAID bus controller - 80 Unknown mass storage controller + 05 ATA controller + 20 ADMA single stepping + 40 ADMA continuous operation + 06 SATA controller + 00 Vendor specific + 01 AHCI 1.0 + 07 Serial Attached SCSI controller + 80 Mass storage controller C 02 Network controller 00 Ethernet controller 01 Token ring network controller @@ -9670,6 +11571,7 @@ 00 Multimedia video controller 01 Multimedia audio controller 02 Computer telephony device + 03 Audio device 80 Multimedia controller C 05 Memory controller 00 RAM memory Index: xc/programs/Xserver/hw/xfree86/etc/pcitweak.c diff -u xc/programs/Xserver/hw/xfree86/etc/pcitweak.c:1.18 xc/programs/Xserver/hw/xfree86/etc/pcitweak.c:1.19 --- xc/programs/Xserver/hw/xfree86/etc/pcitweak.c:1.18 Fri Feb 13 18:58:44 2004 +++ xc/programs/Xserver/hw/xfree86/etc/pcitweak.c Fri Oct 14 11:16:51 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/pcitweak.c,v 1.18 2004/02/13 23:58:44 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/pcitweak.c,v 1.19 2005/10/14 15:16:51 tsi Exp $ */ /* * Copyright (c) 1999-2002 by The XFree86 Project, Inc. * All rights reserved. @@ -52,7 +52,7 @@ * Author: David Dawes */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/etc/pty.cfg diff -u xc/programs/Xserver/hw/xfree86/etc/pty.cfg:3.2 xc/programs/Xserver/hw/xfree86/etc/pty.cfg:3.3 --- xc/programs/Xserver/hw/xfree86/etc/pty.cfg:3.2 Mon Dec 23 01:47:17 1996 +++ xc/programs/Xserver/hw/xfree86/etc/pty.cfg Mon Jan 9 10:00:16 2006 @@ -1,13 +1,9 @@ # # Pseudo tty driver # -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/pty.cfg,v 3.2 1996/12/23 06:47:17 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/pty.cfg,v 3.3 2006/01/09 15:00:16 dawes Exp $ # # -# -# -# $XConsortium: pty.cfg /main/4 1996/02/21 17:48:08 kaleb $ -# C:pty:ptyopen:ptyclose:ptyread:ptywrite:ptyselect:ptyioctl:ptyinstall:ptyuninstall D:pty 0:ptyinfo:: N:ptyp0:0:0666 Index: xc/programs/Xserver/hw/xfree86/etc/scanpci.c diff -u xc/programs/Xserver/hw/xfree86/etc/scanpci.c:3.93 xc/programs/Xserver/hw/xfree86/etc/scanpci.c:3.94 --- xc/programs/Xserver/hw/xfree86/etc/scanpci.c:3.93 Fri Mar 5 11:03:04 2004 +++ xc/programs/Xserver/hw/xfree86/etc/scanpci.c Fri Oct 14 11:16:51 2005 @@ -23,9 +23,9 @@ * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/scanpci.c,v 3.93 2004/03/05 16:03:04 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/scanpci.c,v 3.94 2005/10/14 15:16:51 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/etc/spaceclean diff -u /dev/null xc/programs/Xserver/hw/xfree86/etc/spaceclean:1.1 --- /dev/null Tue May 9 21:57:05 2006 +++ xc/programs/Xserver/hw/xfree86/etc/spaceclean Sat Jan 28 22:09:51 2006 @@ -0,0 +1,277 @@ +#! /bin/sh +# +# Copyright 2005 through 2006 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org +# +# Permission to use, copy, modify, distribute, and sell this software and its +# documentation for any purpose is hereby granted without fee, provided that +# the above copyright notice appear in all copies and that both that copyright +# notice and this permission notice appear in supporting documentation, and +# that the name of Marc Aurele La France not be used in advertising or +# publicity pertaining to distribution of the software without specific, +# written prior permission. Marc Aurele La France makes no representations +# about the suitability of this software for any purpose. It is provided +# "as-is" without express or implied warranty. +# +# MARC AURELE LA FRANCE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, +# INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO +# EVENT SHALL MARC AURELE LA FRANCE BE LIABLE FOR ANY SPECIAL, INDIRECT OR +# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, +# DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER +# TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR +# PERFORMANCE OF THIS SOFTWARE. +# + +# +# Script to clean whitespace in files. Invoke with +# +# $0 ... +# + +# +# Potential issues: +# +# - ACL's are not necessarily transfered properly (cp(1)'s fault); +# - You get what you asked for when pointing this script at make(1) or +# imake(1) files, binary data of any kind, etc. You have been warned; +# - No, `echo` definitely isn't portable (re: TAB); +# - Neither are "+" and "{...}" sed(1) pattern repeaters, escaped or not; +# - This script assumes tab stops at every eight characters. +# + +echo '$XFree86: xc/programs/Xserver/hw/xfree86/etc/spaceclean,v 1.1 2006/01/29 03:09:51 tsi Exp $' | \ + awk "{print \""`basename $0`": Version \" \$3}" + +if [ -n "${DEBUG}" ]; then + set -vx +fi + +# +# If nothing to do, then do nothing... +# +if [ $# -eq 0 ]; then + exit 0 +fi + +# +# Defeat NLS. +# +LC_ALL=C +export LC_ALL + +# +# It'd be nice if things could be more easily portable... +# +TAB=`dd if=/dev/zero count=1 bs=1 2>/dev/null | tr '\000' '\t'` + +# +# Other useful definitions. +# +SPC=" " +SP1="${SPC}" +SP2="${SP1}${SPC}" +SP3="${SP2}${SPC}" +SP4="${SP3}${SPC}" +SP5="${SP4}${SPC}" +SP6="${SP5}${SPC}" +SP7="${SP6}${SPC}" +SP8="${SP7}${SPC}" + +SPS="${SPC}*" + +# +# Figure out a temporary file name we can use. +# +TempName="`date +SC%H%M%S`.TXT" +while [ -f "${TempName}" -o \ + -d "${TempName}" -o \ + -h "${TempName}" -o \ + -c "${TempName}" -o \ + -b "${TempName}" -o \ + -p "${TempName}" -o \ + -z "${TempName}" ]; do + sleep 1 + TempName="`date +SC%H%M%S`.TXT" +done + +trap "rm -f ${TempFile}; exit 1" HUP INT QUIT TERM USR1 USR2 + +# +# Strip trailing whitespace. +# +for name in `grep -l "[${SPC}${TAB}]$" "$@"`; do + echo Cleaning "${name}"... + cp -p "${name}" "${TempName}" + chmod u+w "${TempName}" + sed "s/[${SPC}${TAB}]*$//" "${name}" > "${TempName}" + mv -f "${TempName}" "${name}" +done + +# +# We are now only interested in files containing a tab. +# +files=`grep -l "${TAB}" "$@"` +if [ -z "$files" ]; then + exit 0 +fi +set $files + +# +# For files containing any line starting with eight blanks, change those first +# eight blanks to a tab. +# +for name in `grep -l "^${SP8}" "$@"`; do + echo Cleaning "${name}"... + cp -p "${name}" "${TempName}" + chmod u+w "${TempName}" + sed "s/^${SP8}/${TAB}/" "${name}" > "${TempName}" + mv -f "${TempName}" "${name}" +done + +# +# We are now only interested in files containing tabs preceeded or followed by +# blanks. +# +files=`grep -l "\(${TAB}${SPC}\)\|\(${SPC}${TAB}\)" "$@"` +if [ -z "$files" ]; then + exit 0 +fi +set $files + +# +# For lines starting with one to seven blanks followed by a tab, remove the +# starting blanks. +# +for name in `grep -l "^${SPC}${SPS}${TAB}" "$@"`; do + echo Cleaning "${name}"... + cp -p "${name}" "${TempName}" + chmod u+w "${TempName}" + sed "/^${SPC}${SPS}${TAB}/s/^${SPS}//" "${name}" > "${TempName}" + mv -f "${TempName}" "${name}" +done + +# +# Repeatedly change sequences of one tab followed by eight blanks to two tabs +# until no such sequences remain. +# +StopLoop=0 +while [ ${StopLoop} -eq 0 ]; do + StopLoop=1 + for name in `grep -l "${TAB}${SP8}" "$@"`; do + StopLoop=0 + echo Cleaning "${name}"... + cp -p "${name}" "${TempName}" + chmod u+w "${TempName}" + sed "s/${TAB}${SP8}/${TAB}${TAB}/g" "${name}" > "${TempName}" + mv -f "${TempName}" "${name}" + done +done + +# +# Repeatedly change sequences of eight blanks followed by a tab to two tabs +# until no such sequences remain. +# +StopLoop=0 +while [ ${StopLoop} -eq 0 ]; do + StopLoop=1 + for name in `grep -l "${SP8}${TAB}" "$@"`; do + StopLoop=0 + echo Cleaning "${name}"... + cp -p "${name}" "${TempName}" + chmod u+w "${TempName}" + sed "s/${SP8}${TAB}/${TAB}${TAB}/g" "${name}" > "${TempName}" + mv -f "${TempName}" "${name}" + done +done + +# +# Change sequences of a tab followed by one to seven blanks further followed by +# a tab to two tabs. This eliminates the "dead" blanks. This is done twice to +# catch all instances of such sequences, given sed(1)'s substitute command +# cannot be portably made to re-scan what it has changed. +# +for name in `grep -l "${TAB}${SPC}${SPS}${TAB}" "$@"`; do + echo Cleaning "${name}"... + cp -p "${name}" "${TempName}" + chmod u+w "${TempName}" + sed \ + -e "s/${TAB}${SPC}${SPS}${TAB}/${TAB}${TAB}/g" \ + -e "s/${TAB}${SPC}${SPS}${TAB}/${TAB}${TAB}/g" \ + "${name}" > "${TempName}" + mv -f "${TempName}" "${name}" +done + +# +# The sequences that remain, of a tab followed by one to seven blanks, need to +# be left alone. This leaves sequences of one to seven blanks followed by a +# tab. The following attempts to match patterns of the form ... +# +# +# +# ... where ... +# +# is either the start of a line (i.e. the "^" pattern), or a tab +# character; +# is zero or more groups, each of eight consecutive non-tab +# characters; +# is zero to six non-tab characters (yes, six not seven); +# is a single non-tab non-blank character; +# is one to seven blanks; +# is a tab character. +# +# If the total number of characters matched by and is seven or more +# (up to thirteen), the blanks are replaced by a single tab character. +# Otherwise, the blanks can be removed. +# +# As above, those of these patterns that are anchored to the start of a line +# need only be used once, whereas the patterns that start and end with a tab +# need to be used twice. +# +# There's probably a more efficient, but still portable, way of doing this. If +# you find one, let me know, Better yet, submit a patch. +# +NSP="[^${SPC}${TAB}]" +NTB="[^${TAB}]" + +NT0="" +NT1="${NT0}${NTB}" +NT2="${NT1}${NTB}" +NT3="${NT2}${NTB}" +NT4="${NT3}${NTB}" +NT5="${NT4}${NTB}" +NT6="${NT5}${NTB}" +NT8="\(${NT4}${NT4}\)*" + +for name in `grep -l "${SP1}${TAB}" "$@"`; do + echo Cleaning "${name}"... + cp -p "${name}" "${TempName}" + chmod u+w "${TempName}" + sed \ + -e "s/^\(${NT8}${NT0}${NSP}\)${SP7}${SPS}${TAB}/\1${TAB}${TAB}/" \ + -e "s/^\(${NT8}${NT1}${NSP}\)${SP6}${SPS}${TAB}/\1${TAB}${TAB}/" \ + -e "s/^\(${NT8}${NT2}${NSP}\)${SP5}${SPS}${TAB}/\1${TAB}${TAB}/" \ + -e "s/^\(${NT8}${NT3}${NSP}\)${SP4}${SPS}${TAB}/\1${TAB}${TAB}/" \ + -e "s/^\(${NT8}${NT4}${NSP}\)${SP3}${SPS}${TAB}/\1${TAB}${TAB}/" \ + -e "s/^\(${NT8}${NT5}${NSP}\)${SP2}${SPS}${TAB}/\1${TAB}${TAB}/" \ + -e "s/^\(${NT8}${NT6}${NSP}\)${SP1}${SPS}${TAB}/\1${TAB}${TAB}/" \ + \ + -e "s/\(${TAB}${NT8}${NT0}${NSP}\)${SP7}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + -e "s/\(${TAB}${NT8}${NT1}${NSP}\)${SP6}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + -e "s/\(${TAB}${NT8}${NT2}${NSP}\)${SP5}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + -e "s/\(${TAB}${NT8}${NT3}${NSP}\)${SP4}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + -e "s/\(${TAB}${NT8}${NT4}${NSP}\)${SP3}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + -e "s/\(${TAB}${NT8}${NT5}${NSP}\)${SP2}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + -e "s/\(${TAB}${NT8}${NT6}${NSP}\)${SP1}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + \ + -e "s/\(${TAB}${NT8}${NT0}${NSP}\)${SP7}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + -e "s/\(${TAB}${NT8}${NT1}${NSP}\)${SP6}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + -e "s/\(${TAB}${NT8}${NT2}${NSP}\)${SP5}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + -e "s/\(${TAB}${NT8}${NT3}${NSP}\)${SP4}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + -e "s/\(${TAB}${NT8}${NT4}${NSP}\)${SP3}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + -e "s/\(${TAB}${NT8}${NT5}${NSP}\)${SP2}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + -e "s/\(${TAB}${NT8}${NT6}${NSP}\)${SP1}${SPS}${TAB}/\1${TAB}${TAB}/g" \ + \ + -e "s/${SPC}${SPS}${TAB}/${TAB}/g" \ + \ + "${name}" > "${TempName}" + mv -f "${TempName}" "${name}" +done Index: xc/programs/Xserver/hw/xfree86/etc/sun.tcap diff -u xc/programs/Xserver/hw/xfree86/etc/sun.tcap:3.3 xc/programs/Xserver/hw/xfree86/etc/sun.tcap:3.4 --- xc/programs/Xserver/hw/xfree86/etc/sun.tcap:3.3 Mon Dec 23 01:47:19 1996 +++ xc/programs/Xserver/hw/xfree86/etc/sun.tcap Mon Jan 9 10:00:16 2006 @@ -1,9 +1,4 @@ -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/sun.tcap,v 3.3 1996/12/23 06:47:19 dawes Exp $ -# -# -# -# -# $XConsortium: sun.tcap /main/3 1996/02/21 17:48:19 kaleb $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/sun.tcap,v 3.4 2006/01/09 15:00:16 dawes Exp $ # Mu|sun|Sun Microsystems Workstation console:\ :am:bs:km:mi:ms:pt:li#34:co#80:cl=^L:cm=\E[%i%d;%dH:\ Index: xc/programs/Xserver/hw/xfree86/etc/sun.tinfo diff -u xc/programs/Xserver/hw/xfree86/etc/sun.tinfo:3.3 xc/programs/Xserver/hw/xfree86/etc/sun.tinfo:3.4 --- xc/programs/Xserver/hw/xfree86/etc/sun.tinfo:3.3 Mon Dec 23 01:47:20 1996 +++ xc/programs/Xserver/hw/xfree86/etc/sun.tinfo Mon Jan 9 10:00:16 2006 @@ -1,9 +1,4 @@ -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/sun.tinfo,v 3.3 1996/12/23 06:47:20 dawes Exp $ -# -# -# -# -# $XConsortium: sun.tinfo /main/3 1996/02/21 17:48:23 kaleb $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/sun.tinfo,v 3.4 2006/01/09 15:00:16 dawes Exp $ # sun|Sun Microsystems Workstation console, am, km, mir, msgr, xon, Index: xc/programs/Xserver/hw/xfree86/etc/svr3_patch diff -u xc/programs/Xserver/hw/xfree86/etc/svr3_patch:3.2 xc/programs/Xserver/hw/xfree86/etc/svr3_patch:3.3 --- xc/programs/Xserver/hw/xfree86/etc/svr3_patch:3.2 Mon Dec 23 01:47:21 1996 +++ xc/programs/Xserver/hw/xfree86/etc/svr3_patch Mon Jan 9 10:00:16 2006 @@ -1,5 +1,5 @@ #!/bin/sh -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/svr3_patch,v 3.2 1996/12/23 06:47:21 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/svr3_patch,v 3.3 2006/01/09 15:00:16 dawes Exp $ # # Apply patch to kernel to prevent losing IOPL on signals. # @@ -7,8 +7,6 @@ # adapted for svr3 by Steve Forsythe (forsse@meaddata.com) from initial # svr4 version by David Wexelblat (dwex@goblin.org, dwex@aib.com) # -# $XConsortium: svr3_patch /main/4 1996/02/21 17:48:28 kaleb $ -# PATH=/bin:/usr/bin:/usr/local/bin Index: xc/programs/Xserver/hw/xfree86/etc/svr3_rem_pch diff -u xc/programs/Xserver/hw/xfree86/etc/svr3_rem_pch:3.3 xc/programs/Xserver/hw/xfree86/etc/svr3_rem_pch:3.4 --- xc/programs/Xserver/hw/xfree86/etc/svr3_rem_pch:3.3 Mon Dec 23 01:47:22 1996 +++ xc/programs/Xserver/hw/xfree86/etc/svr3_rem_pch Mon Jan 9 10:00:16 2006 @@ -1,7 +1,7 @@ #!/bin/sh ###################################################################### # -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/svr3_rem_pch,v 3.3 1996/12/23 06:47:22 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/svr3_rem_pch,v 3.4 2006/01/09 15:00:16 dawes Exp $ # # Back out the patch to kernel that prevents losing IOPL on signals. # @@ -9,8 +9,6 @@ # adapted for svr3 by Steve Forsythe (forsse@meaddata.com) from initial # svr4 version by David Wexelblat (dwex@goblin.org, dwex@aib.com) # -# $XConsortium: svr3_rem_pch /main/3 1996/02/21 17:48:32 kaleb $ -# N=`basename $0` Index: xc/programs/Xserver/hw/xfree86/etc/svr4_patch diff -u xc/programs/Xserver/hw/xfree86/etc/svr4_patch:3.2 xc/programs/Xserver/hw/xfree86/etc/svr4_patch:3.3 --- xc/programs/Xserver/hw/xfree86/etc/svr4_patch:3.2 Mon Dec 23 01:47:23 1996 +++ xc/programs/Xserver/hw/xfree86/etc/svr4_patch Mon Jan 9 10:00:16 2006 @@ -1,14 +1,12 @@ #!/bin/sh # -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/svr4_patch,v 3.2 1996/12/23 06:47:23 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/svr4_patch,v 3.3 2006/01/09 15:00:16 dawes Exp $ # # Apply patch to kernel to prevent losing IOPL on signals. # # Version 1.0 - 11/18/92 # initial version - dwex@goblin.org, dwex@aib.com # -# $XConsortium: svr4_patch /main/4 1996/02/21 17:48:36 kaleb $ -# PATH=/sbin:/usr/sbin:/usr/bin Index: xc/programs/Xserver/hw/xfree86/etc/svr4_rem_pch diff -u xc/programs/Xserver/hw/xfree86/etc/svr4_rem_pch:3.3 xc/programs/Xserver/hw/xfree86/etc/svr4_rem_pch:3.4 --- xc/programs/Xserver/hw/xfree86/etc/svr4_rem_pch:3.3 Mon Dec 23 01:47:24 1996 +++ xc/programs/Xserver/hw/xfree86/etc/svr4_rem_pch Mon Jan 9 10:00:16 2006 @@ -1,15 +1,13 @@ #!/bin/sh ###################################################################### # -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/svr4_rem_pch,v 3.3 1996/12/23 06:47:24 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/svr4_rem_pch,v 3.4 2006/01/09 15:00:16 dawes Exp $ # # Back out the patch to kernel that prevents losing IOPL on signals. # # Version 1.0 - 11/18/92 # initial version - dwex@goblin.org, dwex@aib.com # -# $XConsortium: svr4_rem_pch /main/3 1996/02/21 17:48:40 kaleb $ -# N=`basename $0` Index: xc/programs/Xserver/hw/xfree86/etc/vga.bdf diff -u xc/programs/Xserver/hw/xfree86/etc/vga.bdf:3.2 xc/programs/Xserver/hw/xfree86/etc/vga.bdf:3.3 --- xc/programs/Xserver/hw/xfree86/etc/vga.bdf:3.2 Mon Dec 23 01:47:25 1996 +++ xc/programs/Xserver/hw/xfree86/etc/vga.bdf Mon Jan 9 10:00:16 2006 @@ -1,10 +1,7 @@ -COMMENT $XFree86: xc/programs/Xserver/hw/xfree86/etc/vga.bdf,v 3.2 1996/12/23 06:47:25 dawes Exp $ -COMMENT +COMMENT $XFree86: xc/programs/Xserver/hw/xfree86/etc/vga.bdf,v 3.3 2006/01/09 15:00:16 dawes Exp $ COMMENT COMMENT vga COMMENT -COMMENT -COMMENT $XConsortium: vga.bdf /main/4 1996/02/21 17:48:43 kaleb $ STARTFONT 2.1 FONT vga SIZE 16 75 75 Index: xc/programs/Xserver/hw/xfree86/etc/xcode.xfree86 diff -u xc/programs/Xserver/hw/xfree86/etc/xcode.xfree86:3.2 xc/programs/Xserver/hw/xfree86/etc/xcode.xfree86:3.3 --- xc/programs/Xserver/hw/xfree86/etc/xcode.xfree86:3.2 Mon Dec 23 01:47:26 1996 +++ xc/programs/Xserver/hw/xfree86/etc/xcode.xfree86 Mon Jan 9 10:00:16 2006 @@ -2,7 +2,7 @@ # # MODIFIED FOR XFREE86 - David Wexelblat , May 15, 1993 # -# $XFree86: xc/programs/Xserver/hw/xfree86/etc/xcode.xfree86,v 3.2 1996/12/23 06:47:26 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/etc/xcode.xfree86,v 3.3 2006/01/09 15:00:16 dawes Exp $ # # Keycode to keynumber table for use by XCRT. # This table is for use with the Xsight X-Window server. @@ -10,8 +10,6 @@ # There must be a different version of this table for each supported # X-server. # -# $XConsortium: xcode.xfree86 /main/4 1996/02/21 17:48:48 kaleb $ -# # Keycodes are the internal key identifiers that the X server uses. # Keynumbers are the internal key identifiers that Merge uses, and they # are the same as the key numbering scheme in the the PC keyboard Tech Index: xc/programs/Xserver/hw/xfree86/etc/xmodmap.std diff -u xc/programs/Xserver/hw/xfree86/etc/xmodmap.std:3.5 xc/programs/Xserver/hw/xfree86/etc/xmodmap.std:3.6 --- xc/programs/Xserver/hw/xfree86/etc/xmodmap.std:3.5 Mon Dec 23 01:47:28 1996 +++ xc/programs/Xserver/hw/xfree86/etc/xmodmap.std Mon Jan 9 10:00:17 2006 @@ -1,12 +1,10 @@ ! -! $XFree86: xc/programs/Xserver/hw/xfree86/etc/xmodmap.std,v 3.5 1996/12/23 06:47:28 dawes Exp $ +! $XFree86: xc/programs/Xserver/hw/xfree86/etc/xmodmap.std,v 3.6 2006/01/09 15:00:17 dawes Exp $ ! ! Standard key mapping for XFree86 (for US keyboards). ! ! This file can be fed to xmodmap to restore the default mapping. ! -! $XConsortium: xmodmap.std /main/7 1996/02/21 17:48:55 kaleb $ -! ! First, clear the modifiers ! clear shift Index: xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/bin-list:1.16 xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/bin-list:1.17 --- xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/bin-list:1.16 Sun Jan 30 22:21:23 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/bin-list Thu Mar 30 18:19:42 2006 @@ -1,6 +1,8 @@ .XFree86_Version bin lib/aout +lib/libAppleWM.so.1 +lib/libAppleWM.so lib/libFS.so.6 lib/libFS.so lib/libGL.so.1 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/prog-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/prog-list:1.2 xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/prog-list:1.3 --- xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/prog-list:1.2 Sun Nov 14 16:12:49 2004 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD/prog-list Mon Apr 24 00:06:05 2006 @@ -1,2 +1,3 @@ -lib include +lib +libdata Index: xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/bin-list:1.16 xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/bin-list:1.17 --- xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/bin-list:1.16 Sun Jan 30 22:21:23 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/bin-list Thu Mar 30 18:19:44 2006 @@ -1,5 +1,6 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 lib/libFS.so.6.0 lib/libGL.so.1.2 lib/libGLU.so.1.3 @@ -11,7 +12,7 @@ lib/libXThrStub.so.6.1 lib/libXTrap.so.6.4 lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXcursor.so.1.0 lib/libXext.so.6.4 lib/libXfont.so.1.5 @@ -27,7 +28,7 @@ lib/libXrandr.so.2.0 lib/libXrender.so.1.2 lib/libXss.so.1.0 -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXtst.so.6.1 lib/libXv.so.1.0 lib/libXvMC.so.1.0 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/prog-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/prog-list:1.2 xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/prog-list:1.3 --- xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/prog-list:1.2 Sun Nov 14 16:12:49 2004 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/prog-list Mon Apr 24 00:06:05 2006 @@ -1,2 +1,3 @@ -lib include +lib +libdata Index: xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/update-upd diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/update-upd:1.4 xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/update-upd:1.5 --- xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/update-upd:1.4 Tue Jan 15 16:34:35 2002 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/FreeBSD-aout/update-upd Thu Mar 30 18:19:44 2006 @@ -30,7 +30,7 @@ lib/libX11.so.6.2 lib/libXaw.a lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXfont.a lib/libXfont.so.1.4 lib/libXft.a Index: xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-amd64/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-amd64/bin-list:1.3 xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-amd64/bin-list:1.5 --- xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-amd64/bin-list:1.3 Sun Jan 30 22:21:23 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-amd64/bin-list Mon Apr 3 11:59:56 2006 @@ -1,5 +1,8 @@ .XFree86_Version bin +lib64/libAppleWM.so.1.0 +lib64/libAppleWM.so.1 +lib64/libAppleWM.so lib64/libFS.so.6.0 lib64/libFS.so.6 lib64/libFS.so @@ -12,9 +15,6 @@ lib64/libGLw.so.1.0 lib64/libGLw.so.1 lib64/libGLw.so -lib64/libI810XvMC.so.1.0 -lib64/libI810XvMC.so.1 -lib64/libI810XvMC.so lib64/libICE.so.6.3 lib64/libICE.so.6 lib64/libICE.so @@ -35,7 +35,7 @@ lib64/libXTrap.so lib64/libXaw.so.6.1 lib64/libXaw.so.6 -lib64/libXaw.so.7.0 +lib64/libXaw.so.7.1 lib64/libXaw.so.7 lib64/libXaw.so lib64/libXcursor.so.1.0 @@ -82,7 +82,7 @@ lib64/libXss.so.1.0 lib64/libXss.so.1 lib64/libXss.so -lib64/libXt.so.6.0 +lib64/libXt.so.6.1 lib64/libXt.so.6 lib64/libXt.so lib64/libXtst.so.6.1 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-amd64/update-upd diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-amd64/update-upd:1.1 xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-amd64/update-upd:1.2 --- xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-amd64/update-upd:1.1 Sat Feb 28 19:09:29 2004 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-amd64/update-upd Thu Mar 30 18:19:44 2006 @@ -35,7 +35,7 @@ lib/libXaw.so.6 lib/libXaw.so.6.1 lib/libXaw.so.7 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXfont.a lib/libXfont.so lib/libXfont.so.1 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/bin-list:1.18 xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/bin-list:1.19 --- xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/bin-list:1.18 Fri Feb 4 20:13:19 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/bin-list Thu Mar 30 18:19:44 2006 @@ -1,5 +1,8 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 +lib/libAppleWM.so.1 +lib/libAppleWM.so lib/libFS.so.6.0 lib/libFS.so.6 lib/libFS.so @@ -32,7 +35,7 @@ lib/libXTrap.so lib/libXaw.so.6.1 lib/libXaw.so.6 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXaw.so.7 lib/libXaw.so lib/libXcursor.so.1.0 @@ -79,7 +82,7 @@ lib/libXss.so.1.0 lib/libXss.so.1 lib/libXss.so -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXt.so.6 lib/libXt.so lib/libXtst.so.6.1 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/update-upd diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/update-upd:1.4 xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/update-upd:1.5 --- xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/update-upd:1.4 Tue Jan 15 16:34:36 2002 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-axp/update-upd Thu Mar 30 18:19:44 2006 @@ -35,7 +35,7 @@ lib/libXaw.so.6 lib/libXaw.so.6.1 lib/libXaw.so.7 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXfont.a lib/libXfont.so lib/libXfont.so.1 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/bin-list:1.16 xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/bin-list:1.17 --- xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/bin-list:1.16 Fri Jan 28 14:54:03 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/bin-list Thu Mar 30 18:19:44 2006 @@ -1,5 +1,8 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 +lib/libAppleWM.so.1 +lib/libAppleWM.so lib/libFS.so.6.0 lib/libFS.so.6 lib/libFS.so @@ -35,7 +38,7 @@ lib/libXTrap.so lib/libXaw.so.6.1 lib/libXaw.so.6 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXaw.so.7 lib/libXaw.so lib/libXcursor.so.1.0 @@ -82,7 +85,7 @@ lib/libXss.so.1.0 lib/libXss.so.1 lib/libXss.so -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXt.so.6 lib/libXt.so lib/libXtst.so.6.1 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/update-upd diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/update-upd:1.4 xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/update-upd:1.5 --- xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/update-upd:1.4 Tue Jan 15 16:34:36 2002 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ix86/update-upd Thu Mar 30 18:19:44 2006 @@ -35,7 +35,7 @@ lib/libXaw.so.6 lib/libXaw.so.6.1 lib/libXaw.so.7 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXfont.a lib/libXfont.so lib/libXfont.so.1 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/bin-list:1.17 xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/bin-list:1.18 --- xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/bin-list:1.17 Fri Feb 4 20:13:19 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-m68k/bin-list Thu Mar 30 18:19:44 2006 @@ -1,5 +1,8 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 +lib/libAppleWM.so.1 +lib/libAppleWM.so lib/libFS.so.6.0 lib/libFS.so.6 lib/libFS.so @@ -32,7 +35,7 @@ lib/libXTrap.so lib/libXaw.so.6.1 lib/libXaw.so.6 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXaw.so.7 lib/libXaw.so lib/libXcursor.so.1.0 @@ -79,7 +82,7 @@ lib/libXss.so.1.0 lib/libXss.so.1 lib/libXss.so -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXt.so.6 lib/libXt.so lib/libXtst.so.6.1 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/bin-list:1.14 xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/bin-list:1.15 --- xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/bin-list:1.14 Fri Feb 4 20:13:19 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-mips/bin-list Thu Mar 30 18:19:45 2006 @@ -1,5 +1,8 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 +lib/libAppleWM.so.1 +lib/libAppleWM.so lib/libFS.so.6.0 lib/libFS.so.6 lib/libFS.so @@ -32,7 +35,7 @@ lib/libXTrap.so lib/libXaw.so.6.1 lib/libXaw.so.6 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXaw.so.7 lib/libXaw.so lib/libXcursor.so.1.0 @@ -79,7 +82,7 @@ lib/libXss.so.1.0 lib/libXss.so.1 lib/libXss.so -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXt.so.6 lib/libXt.so lib/libXtst.so.6.1 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/bin-list:1.14 xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/bin-list:1.15 --- xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/bin-list:1.14 Fri Feb 4 20:13:19 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/Linux-ppc/bin-list Thu Mar 30 18:19:45 2006 @@ -1,5 +1,8 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 +lib/libAppleWM.so.1 +lib/libAppleWM.so lib/libFS.so.6.0 lib/libFS.so.6 lib/libFS.so @@ -32,7 +35,7 @@ lib/libXTrap.so lib/libXaw.so.6.1 lib/libXaw.so.6 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXaw.so.7 lib/libXaw.so lib/libXcursor.so.1.0 @@ -79,7 +82,7 @@ lib/libXss.so.1.0 lib/libXss.so.1 lib/libXss.so -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXt.so.6 lib/libXt.so lib/libXtst.so.6.1 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/bin-list:1.13 xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/bin-list:1.14 --- xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/bin-list:1.13 Wed Feb 2 16:56:20 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/bin-list Thu Mar 30 18:19:45 2006 @@ -1,5 +1,6 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 lib/libFS.so.6.0 lib/libGL.so.1.2 lib/libGLU.so.1.3 @@ -10,7 +11,7 @@ lib/libXRes.so.1.0 lib/libXTrap.so.6.4 lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXcursor.so.1.0 lib/libXext.so.6.4 lib/libXfont.so.1.5 @@ -26,7 +27,7 @@ lib/libXrandr.so.2.0 lib/libXrender.so.1.2 lib/libXss.so.1.0 -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXtst.so.6.1 lib/libXv.so.1.0 lib/libXvMC.so.1.0 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/update-upd diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/update-upd:1.4 xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/update-upd:1.5 --- xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/update-upd:1.4 Tue Jan 15 16:34:38 2002 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-aout-ix86/update-upd Thu Mar 30 18:19:45 2006 @@ -30,7 +30,7 @@ lib/libX11.so.6.2 lib/libXaw.a lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXfont.a lib/libXfont.so.1.4 lib/libXft.a Index: xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/bin-list:1.18 xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/bin-list:1.19 --- xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/bin-list:1.18 Sun Jan 30 22:21:23 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/bin-list Thu Mar 30 18:19:45 2006 @@ -1,5 +1,8 @@ .XFree86_Version bin +lib/libAppleWM.so +lib/libAppleWM.so.1 +lib/libAppleWM.so.1.0 lib/libFS.so lib/libFS.so.6 lib/libFS.so.6.0 @@ -34,7 +37,7 @@ lib/libXaw.so.6 lib/libXaw.so.6.1 lib/libXaw.so.7 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXcursor.so lib/libXcursor.so.1 lib/libXcursor.so.1.0 @@ -81,7 +84,7 @@ lib/libXss.so.1.0 lib/libXt.so lib/libXt.so.6 -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXtst.so lib/libXtst.so.6 lib/libXtst.so.6.1 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/update-upd diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/update-upd:1.4 xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/update-upd:1.5 --- xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/update-upd:1.4 Tue Jan 15 16:34:38 2002 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/NetBSD-ix86/update-upd Thu Mar 30 18:19:45 2006 @@ -35,7 +35,7 @@ lib/libXaw.so.6 lib/libXaw.so.6.1 lib/libXaw.so.7 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXfont.a lib/libXfont.so lib/libXfont.so.1 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-aout-ix86/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-aout-ix86/bin-list:1.4 xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-aout-ix86/bin-list:1.5 --- xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-aout-ix86/bin-list:1.4 Wed Feb 2 21:01:49 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-aout-ix86/bin-list Thu Mar 30 18:19:45 2006 @@ -1,5 +1,6 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 lib/libFS.so.6.0 lib/libGL.so.1.2 lib/libGLU.so.1.3 @@ -12,7 +13,7 @@ lib/libXThrStub.so.6.1 lib/libXTrap.so.6.4 lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXcursor.so.1.0 lib/libXext.so.6.4 lib/libXfont.so.1.5 @@ -28,7 +29,7 @@ lib/libXrandr.so.2.0 lib/libXrender.so.1.2 lib/libXss.so.1.0 -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXtst.so.6.1 lib/libXv.so.1.0 lib/libXvMC.so.1.0 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-aout-ix86/update-upd diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-aout-ix86/update-upd:1.1 xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-aout-ix86/update-upd:1.2 --- xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-aout-ix86/update-upd:1.1 Tue Dec 9 14:03:02 2003 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-aout-ix86/update-upd Thu Mar 30 18:19:45 2006 @@ -30,7 +30,7 @@ lib/libX11.so.6.2 lib/libXaw.a lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXfont.a lib/libXfont.so.1.4 lib/libXft.a Index: xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/bin-list:1.21 xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/bin-list:1.23 --- xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/bin-list:1.21 Fri Feb 4 20:13:19 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/bin-list Mon Apr 24 00:06:05 2006 @@ -1,5 +1,6 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 lib/libFS.so.7.0 lib/libGL.so.2.0 lib/libGLU.so.2.0 @@ -12,7 +13,7 @@ lib/libXThrStub.so.7.0 lib/libXTrap.so.7.0 lib/libXaw.so.7.1 -lib/libXaw.so.8.0 +lib/libXaw.so.8.1 lib/libXcursor.so.1.0 lib/libXext.so.7.0 lib/libXfont.so.2.0 @@ -28,7 +29,7 @@ lib/libXrandr.so.3.0 lib/libXrender.so.2.1 lib/libXss.so.2.0 -lib/libXt.so.7.0 +lib/libXt.so.7.1 lib/libXtst.so.7.0 lib/libXv.so.2.0 lib/libXvMC.so.2.0 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/update-upd diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/update-upd:1.4 xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/update-upd:1.5 --- xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/update-upd:1.4 Tue Jan 15 16:34:39 2002 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/OpenBSD-ix86/update-upd Thu Mar 30 18:19:45 2006 @@ -30,7 +30,7 @@ lib/libX11.so.6.2 lib/libXaw.a lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXfont.a lib/libXfont.so.1.4 lib/libXft.a Index: xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/bin-list:1.17 xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/bin-list:1.18 --- xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/bin-list:1.17 Sun Jan 30 22:21:23 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/bin-list Thu Mar 30 18:19:46 2006 @@ -1,5 +1,7 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 +lib/libAppleWM.so lib/libFS.so.6.0 lib/libFS.so lib/libGL.so.1.2 @@ -19,7 +21,7 @@ lib/libXTrap.so.6.4 lib/libXTrap.so lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXaw.so lib/libXcursor.so.1.0 lib/libXcursor.so @@ -50,7 +52,7 @@ lib/libXrender.so lib/libXss.so.1.0 lib/libXss.so -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXt.so lib/libXtst.so.6.1 lib/libXtst.so Index: xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/update-upd diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/update-upd:1.4 xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/update-upd:1.5 --- xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/update-upd:1.4 Tue Jan 15 16:34:39 2002 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/SVR4.0/update-upd Thu Mar 30 18:19:46 2006 @@ -32,7 +32,7 @@ lib/libXaw.a lib/libXaw.so lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXfont.a lib/libXfont.so lib/libXfont.so.1.4 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/bin-list:1.17 xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/bin-list:1.18 --- xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/bin-list:1.17 Sun Jan 30 22:21:23 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/bin-list Thu Mar 30 18:19:46 2006 @@ -1,5 +1,7 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 +lib/libAppleWM.so lib/libFS.so.6.0 lib/libFS.so lib/libGL.so.1.2 @@ -19,7 +21,7 @@ lib/libXTrap.so.6.4 lib/libXTrap.so lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXaw.so lib/libXcursor.so.1.0 lib/libXcursor.so @@ -50,7 +52,7 @@ lib/libXrender.so lib/libXss.so.1.0 lib/libXss.so -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXt.so lib/libXtst.so.6.1 lib/libXtst.so Index: xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/update-upd diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/update-upd:1.4 xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/update-upd:1.5 --- xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/update-upd:1.4 Tue Jan 15 16:34:40 2002 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris/update-upd Thu Mar 30 18:19:46 2006 @@ -32,7 +32,7 @@ lib/libXaw.a lib/libXaw.so lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXfont.a lib/libXfont.so lib/libXfont.so.1.4 Index: xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris-sparc/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris-sparc/bin-list:1.1 xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris-sparc/bin-list:1.2 --- xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris-sparc/bin-list:1.1 Sun Feb 6 18:49:58 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/Solaris-sparc/bin-list Thu Mar 30 18:19:46 2006 @@ -1,5 +1,7 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 +lib/libAppleWM.so lib/libFS.so.6.0 lib/libFS.so lib/libGL.so.1.2 @@ -19,7 +21,7 @@ lib/libXTrap.so.6.4 lib/libXTrap.so lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXaw.so lib/libXcursor.so.1.0 lib/libXcursor.so @@ -50,7 +52,7 @@ lib/libXrender.so lib/libXss.so.1.0 lib/libXss.so -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXt.so lib/libXtst.so.6.1 lib/libXtst.so Index: xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/bin-list diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/bin-list:1.17 xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/bin-list:1.18 --- xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/bin-list:1.17 Sun Jan 30 22:21:24 2005 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/bin-list Thu Mar 30 18:19:46 2006 @@ -1,5 +1,7 @@ .XFree86_Version bin +lib/libAppleWM.so.1.0 +lib/libAppleWM.so lib/libFS.so.6.0 lib/libFS.so lib/libGL.so.1.2 @@ -19,7 +21,7 @@ lib/libXTrap.so.6.4 lib/libXTrap.so lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXaw.so lib/libXcursor.so.1.0 lib/libXcursor.so @@ -50,7 +52,7 @@ lib/libXrender.so lib/libXss.so.1.0 lib/libXss.so -lib/libXt.so.6.0 +lib/libXt.so.6.1 lib/libXt.so lib/libXtst.so.6.1 lib/libXtst.so Index: xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/update-upd diff -u xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/update-upd:1.4 xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/update-upd:1.5 --- xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/update-upd:1.4 Tue Jan 15 16:34:40 2002 +++ xc/programs/Xserver/hw/xfree86/etc/bindist/UnixWare/update-upd Thu Mar 30 18:19:46 2006 @@ -32,7 +32,7 @@ lib/libXaw.a lib/libXaw.so lib/libXaw.so.6.1 -lib/libXaw.so.7.0 +lib/libXaw.so.7.1 lib/libXfont.a lib/libXfont.so lib/libXfont.so.1.4 Index: xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile diff -u xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile:1.14 xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile:1.15 --- xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile:1.14 Mon May 31 20:17:03 2004 +++ xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile Fri Oct 14 11:16:52 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile,v 1.14 2004/06/01 00:17:03 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/fbdevhw/Imakefile,v 1.15 2005/10/14 15:16:52 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -57,10 +57,9 @@ OBJS = fbdevhwstub.o #endif - INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/Xext \ + INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/Xext \ -I$(SERVERSRC)/cfb -I$(SERVERSRC)/mfb -I$(SERVERSRC)/mi \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) \ - -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c + -I$(SERVERSRC)/include -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c LINTLIBS = ../../../dix/llib-ldix.ln ../../../os/llib-los.ln \ ../../mfb/llib-lmfb.ln ../../mi/llib-lmi.ln Index: xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c diff -u xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c:1.33 xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c:1.35 --- xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c:1.33 Thu Oct 30 12:37:16 2003 +++ xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c Thu Mar 16 11:50:24 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c,v 1.33 2003/10/30 17:37:16 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/fbdevhw/fbdevhw.c,v 1.35 2006/03/16 16:50:24 dawes Exp $ */ /* all driver need this */ #include "xf86.h" @@ -18,7 +18,7 @@ #include "globals.h" #define DPMS_SERVER -#include "extensions/dpms.h" +#include #define DEBUG 0 @@ -51,7 +51,7 @@ XF86ModuleData fbdevhwModuleData = { &fbdevHWVersRec, fbdevhwSetup, NULL }; static pointer -fbdevhwSetup(pointer module, pointer opts, int *errmaj, int *errmin) +fbdevhwSetup(ModuleDescPtr module, pointer opts, int *errmaj, int *errmin) { const char *osname; Index: xc/programs/Xserver/hw/xfree86/getconfig/Imakefile diff -u xc/programs/Xserver/hw/xfree86/getconfig/Imakefile:1.5 xc/programs/Xserver/hw/xfree86/getconfig/Imakefile:1.6 --- xc/programs/Xserver/hw/xfree86/getconfig/Imakefile:1.5 Tue Dec 7 13:21:51 2004 +++ xc/programs/Xserver/hw/xfree86/getconfig/Imakefile Sat Dec 31 12:36:34 2005 @@ -1,5 +1,4 @@ -XCOMM $DHD: xc/programs/Xserver/hw/xfree86/getconfig/Imakefile,v 1.4 2003/10/03 21:32:46 dawes Exp $ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/getconfig/Imakefile,v 1.5 2004/12/07 18:21:51 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/getconfig/Imakefile,v 1.6 2005/12/31 17:36:34 dawes Exp $ /* * Link these to the BuildModule directory. This is useful for in-tree Index: xc/programs/Xserver/hw/xfree86/getconfig/getconfig.pl diff -u xc/programs/Xserver/hw/xfree86/getconfig/getconfig.pl:1.4 xc/programs/Xserver/hw/xfree86/getconfig/getconfig.pl:1.5 --- xc/programs/Xserver/hw/xfree86/getconfig/getconfig.pl:1.4 Wed Feb 9 15:55:57 2005 +++ xc/programs/Xserver/hw/xfree86/getconfig/getconfig.pl Thu Apr 13 21:03:13 2006 @@ -1,8 +1,8 @@ #!/usr/bin/perl # -# Copyright 2003-2005 by David H. Dawes. -# Copyright 2003-2005 by X-Oz Technologies. +# Copyright 2003-2006 by David H. Dawes. +# Copyright 2003-2006 by X-Oz Technologies. # All rights reserved. # # Permission is hereby granted, free of charge, to any person obtaining a @@ -47,7 +47,7 @@ # Author: David Dawes . # -# $XFree86: xc/programs/Xserver/hw/xfree86/getconfig/getconfig.pl,v 1.4 2005/02/09 20:55:57 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/getconfig/getconfig.pl,v 1.5 2006/04/14 01:03:13 dawes Exp $ # # This script takes PCI id information, compares it against an ordered list @@ -188,7 +188,11 @@ # ARK ['$vendor == 0xedd8', - 'apm'], + 'ark'], + +# ASPEED Technology +['$vendor == 0x1a03', + 'aspeed'], # ATI ['$vendor == 0x1002', @@ -202,6 +206,10 @@ ['$vendor == 0x1013', 'cirrus'], +# Integrated Micro Solutions +['$vendor == 0x10e0', + 'imstt'], + # Intel ['$vendor == 0x8086', 'i810'], @@ -216,6 +224,10 @@ ['$vendor == 0x10c8', 'neomagic'], +# National Semiconductor Corp +['$vendor == 0x100b', + 'nsc'], + # Number Nine ['$vendor == 0x105d', 'i128'], @@ -290,6 +302,10 @@ ['$vendor == 0x15ad', 'vmware'], +# Xabre Graphics +['$vendor == 0x18ca', + 'xgi'], + # Sun ffb ['$sbuspath =~ /,ffb\@/', 'sunffb'], Index: xc/programs/Xserver/hw/xfree86/getconfig/getconfig.sh diff -u xc/programs/Xserver/hw/xfree86/getconfig/getconfig.sh:1.5 xc/programs/Xserver/hw/xfree86/getconfig/getconfig.sh:1.6 --- xc/programs/Xserver/hw/xfree86/getconfig/getconfig.sh:1.5 Wed Feb 9 15:55:57 2005 +++ xc/programs/Xserver/hw/xfree86/getconfig/getconfig.sh Sat Dec 31 12:36:34 2005 @@ -1,7 +1,5 @@ #!/bin/sh -# $DHD: xc/programs/Xserver/hw/xfree86/getconfig/getconfig.sh,v 1.2 2003/09/20 01:45:57 dawes Exp $ - # # Copyright 2003-2005 by David H. Dawes. # Copyright 2003-2005 by X-Oz Technologies. @@ -49,7 +47,7 @@ # Author: David Dawes . # -# $XFree86: xc/programs/Xserver/hw/xfree86/getconfig/getconfig.sh,v 1.5 2005/02/09 20:55:57 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/getconfig/getconfig.sh,v 1.6 2005/12/31 17:36:34 dawes Exp $ # A simple wrapper to execute the real getconfig program. So long as perl # is in $PATH, we don't need to know where it is this way. Index: xc/programs/Xserver/hw/xfree86/getconfig/xfree86.cfg diff -u xc/programs/Xserver/hw/xfree86/getconfig/xfree86.cfg:1.1 xc/programs/Xserver/hw/xfree86/getconfig/xfree86.cfg:1.2 --- xc/programs/Xserver/hw/xfree86/getconfig/xfree86.cfg:1.1 Wed Oct 8 10:58:29 2003 +++ xc/programs/Xserver/hw/xfree86/getconfig/xfree86.cfg Sat Dec 31 12:36:34 2005 @@ -1,5 +1,4 @@ -# $DHD: xc/programs/Xserver/hw/xfree86/getconfig/xfree86.cfg,v 1.4 2003/09/23 05:12:07 dawes Exp $ -# $XFree86: xc/programs/Xserver/hw/xfree86/getconfig/xfree86.cfg,v 1.1 2003/10/08 14:58:29 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/getconfig/xfree86.cfg,v 1.2 2005/12/31 17:36:34 dawes Exp $ # Base XFree86 getconfig rules file. Index: xc/programs/Xserver/hw/xfree86/i2c/Imakefile diff -u xc/programs/Xserver/hw/xfree86/i2c/Imakefile:1.6 xc/programs/Xserver/hw/xfree86/i2c/Imakefile:1.7 --- xc/programs/Xserver/hw/xfree86/i2c/Imakefile:1.6 Mon May 31 20:17:03 2004 +++ xc/programs/Xserver/hw/xfree86/i2c/Imakefile Fri Oct 14 11:16:53 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/i2c/Imakefile,v 1.6 2004/06/01 00:17:03 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/i2c/Imakefile,v 1.7 2005/10/14 15:16:53 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -57,8 +57,7 @@ SRCS = xf86i2c.c $(MODSRC) OBJS = xf86i2c.o $(MODOBJ) -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include ModuleObjectRule() Index: xc/programs/Xserver/hw/xfree86/i2c/xf86i2c.c diff -u xc/programs/Xserver/hw/xfree86/i2c/xf86i2c.c:1.16 xc/programs/Xserver/hw/xfree86/i2c/xf86i2c.c:1.17 --- xc/programs/Xserver/hw/xfree86/i2c/xf86i2c.c:1.16 Fri Sep 10 21:33:06 2004 +++ xc/programs/Xserver/hw/xfree86/i2c/xf86i2c.c Fri Oct 14 11:16:53 2005 @@ -6,7 +6,7 @@ * (c) 1998 Gerd Knorr */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/i2c/xf86i2c.c,v 1.16 2004/09/11 01:33:06 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/i2c/xf86i2c.c,v 1.17 2005/10/14 15:16:53 tsi Exp $ */ #if 1 #include "misc.h" @@ -14,8 +14,8 @@ #include "xf86_ansic.h" #include "xf86_OSproc.h" -#include "X.h" -#include "Xproto.h" +#include +#include #include "scrnintstr.h" #include "regionstr.h" #include "windowstr.h" Index: xc/programs/Xserver/hw/xfree86/i2c/xf86i2cmodule.c diff -u xc/programs/Xserver/hw/xfree86/i2c/xf86i2cmodule.c:1.7 xc/programs/Xserver/hw/xfree86/i2c/xf86i2cmodule.c:1.8 --- xc/programs/Xserver/hw/xfree86/i2c/xf86i2cmodule.c:1.7 Sun Apr 11 09:11:02 1999 +++ xc/programs/Xserver/hw/xfree86/i2c/xf86i2cmodule.c Thu Mar 16 11:50:25 2006 @@ -5,7 +5,7 @@ * (c) 1998 Gerd Knorr */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/i2c/xf86i2cmodule.c,v 1.7 1999/04/11 13:11:02 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/i2c/xf86i2cmodule.c,v 1.8 2006/03/16 16:50:25 dawes Exp $ */ #include "xf86Module.h" @@ -28,7 +28,7 @@ XF86ModuleData i2cModuleData = { &i2cVersRec, i2cSetup, NULL }; static pointer -i2cSetup(pointer module, pointer opts, int *errmaj, int *errmin) { +i2cSetup(ModuleDescPtr module, pointer opts, int *errmaj, int *errmin) { /* ErrorF("i2cSetup\n"); */ return (pointer)1; } Index: xc/programs/Xserver/hw/xfree86/input/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/Imakefile:1.16 xc/programs/Xserver/hw/xfree86/input/Imakefile:1.17 --- xc/programs/Xserver/hw/xfree86/input/Imakefile:1.16 Thu Oct 10 21:40:32 2002 +++ xc/programs/Xserver/hw/xfree86/input/Imakefile Fri Oct 14 11:16:53 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/Imakefile,v 1.16 2002/10/11 01:40:32 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/Imakefile,v 1.17 2005/10/14 15:16:53 tsi Exp $ #define IHaveModules #include @@ -31,8 +31,7 @@ #endif #endif -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include \ - -I$(EXTINCSRC) -I$(XINCLUDESRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if !DoLoadableServer ConfigTargetNoDepend(drvConf,$(ICONFIGFILES),confdrv.SHsuf,$(DRIVERS)) Index: xc/programs/Xserver/hw/xfree86/input/acecad/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/acecad/Imakefile:1.8 xc/programs/Xserver/hw/xfree86/input/acecad/Imakefile:1.9 --- xc/programs/Xserver/hw/xfree86/input/acecad/Imakefile:1.8 Mon May 31 20:17:03 2004 +++ xc/programs/Xserver/hw/xfree86/input/acecad/Imakefile Fri Oct 14 11:16:53 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/acecad/Imakefile,v 1.8 2004/06/01 00:17:03 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/acecad/Imakefile,v 1.9 2005/10/14 15:16:53 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -58,9 +58,8 @@ DRIVER = acecad -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) \ - -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(SERVERSRC)/mi #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/acecad/acecad.c diff -u xc/programs/Xserver/hw/xfree86/input/acecad/acecad.c:1.5 xc/programs/Xserver/hw/xfree86/input/acecad/acecad.c:1.6 --- xc/programs/Xserver/hw/xfree86/input/acecad/acecad.c:1.5 Wed Nov 5 15:56:29 2003 +++ xc/programs/Xserver/hw/xfree86/input/acecad/acecad.c Thu Mar 16 11:50:25 2006 @@ -23,7 +23,7 @@ * * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/acecad/acecad.c,v 1.5 2003/11/05 20:56:29 alanh Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/acecad/acecad.c,v 1.6 2006/03/16 16:50:25 dawes Exp $ */ #define _ACECAD_C_ /***************************************************************************** @@ -106,7 +106,7 @@ ****************************************************************************/ static pointer -SetupProc( pointer module, +SetupProc( ModuleDescPtr module, pointer options, int *errmaj, int *errmin ) Index: xc/programs/Xserver/hw/xfree86/input/aiptek/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/aiptek/Imakefile:1.4 xc/programs/Xserver/hw/xfree86/input/aiptek/Imakefile:1.5 --- xc/programs/Xserver/hw/xfree86/input/aiptek/Imakefile:1.4 Mon May 31 20:17:03 2004 +++ xc/programs/Xserver/hw/xfree86/input/aiptek/Imakefile Fri Oct 14 11:16:54 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/aiptek/Imakefile,v 1.4 2004/06/01 00:17:03 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/aiptek/Imakefile,v 1.5 2005/10/14 15:16:54 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -58,8 +58,8 @@ DRIVER = aiptek -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(SERVERSRC)/mi #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/aiptek/aiptek.man diff -u xc/programs/Xserver/hw/xfree86/input/aiptek/aiptek.man:1.1 xc/programs/Xserver/hw/xfree86/input/aiptek/aiptek.man:1.2 --- xc/programs/Xserver/hw/xfree86/input/aiptek/aiptek.man:1.1 Mon Jun 30 12:52:57 2003 +++ xc/programs/Xserver/hw/xfree86/input/aiptek/aiptek.man Fri Jun 10 22:40:55 2005 @@ -1,4 +1,4 @@ -.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/aiptek/aiptek.man,v 1.1 2003/06/30 16:52:57 eich Exp $ +.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/aiptek/aiptek.man,v 1.2 2005/06/11 02:40:55 dawes Exp $ .\" shorthand for double quote that works everywhere. .ds q \N'34' .TH AIPTEK __drivermansuffix__ __vendorversion__ @@ -17,7 +17,8 @@ .B aiptek is an XFree86 input driver for Aiptek HyperPen USB-based tablet devices. This driver only supports the USB protocol, and only under Linux; for -RS-232C-based HyperPens, please see the \fI"hyperpen"\fP driver. +RS-232C-based HyperPens, please see the +hyperpen(__drivermansuffix__) driver. .PP The .B aiptek @@ -36,29 +37,29 @@ supports the following entries: .RS 8 .TP 4 -.B Option \fI"Type"\fP \fI"stylus"|"eraser"|"cursor"\fP +.BR "Option \*qType\*q \*qstylus" | eraser | cursor\*q sets the type of tool the device represent. This option is mandatory. .TP 4 -.B Option \fI"Device"\fP \fI"path"\fP +.BI "Option \*qDevice\*q \*q" path \*q sets the path to the special file which represents serial line where the tablet is plugged. You have to specify it for each subsection with the same value if you want to have multiple devices with the same tablet. This option is mandatory. .TP 4 -.B Option \fI"USB"\fP \fI"on"\fP +.BI "Option \*qUSB\*q \*q" on"\fP specifies that you are using the USB bus to communicate with your tablet. This setting is mandatory, as USB is the only protocol supported by this driver. .TP 4 -.B Option \fI"DeviceName"\fP \fI"name"\fP +.BI "Option \*qDeviceName\*q \*q" name \*q sets the name of the X device. .TP 4 -.B Option \fI"Mode"\fP \fI"Relative"|"Absolute"\fP +.BR "Option \*qMode\*q \*qRelative" | Absolute\*q sets the mode of the device. .TP 4 -.B Option \fI"HistorySize"\fP \fI"number"\fP +.BI "Option \*qHistorySize\*q \*q" number \*q sets the motion history size. By default the value is zero. .TP 4 -.B Option \fI"AlwaysCore"\fP \fI"on"\fP +.BI "Option \*qAlwaysCore\*q \*q" on \*q enables the sharing of the core pointer. When this feature is enabled, the device will take control of the core pointer (and thus will emit core events) and at the same time will be able, when asked so, to report extended events. @@ -66,84 +67,125 @@ the value of the feedback is zero, the feature is disabled. The feature is enabled for any other value. .TP 4 -.B Option \fI"XTop"\fP \fI"number"\fP -First of three sets of parameters to set the active zone. This sets the X coordinate of the top corner of the active zone. \fI"TopX"\fP is a synonym. -.TP 4 -.B Option \fI"YTop"\fP \fI"number"\fP -First of three sets of parameters to set the active zone. This sets the Y coordinate of the top corner of the active zone. \fI"TopY"\fP is a synonym. -.TP 4 -.B Option \fI"XBottom"\fP \fI"Inumber"\fP -First of three sets of parameters to set the active zone. This sets the X coordinate of the bottom corner of the active zone. \fI"BottomX"\fP is a synonym. -.TP 4 -.B Option \fI"YBottom"\fP \fI"number"\fP -First of three sets of parameters to set the active zone. This sets the Y coordinate of the bottom corner of the active zone. \fI"BottomY"\fP is a synonym. -.TP 4 -.B Option \fI"XMax"\fP \fI"number"\fP -Second of three sets of parameters to set the active zone. This sets the the X -coordinate of the bottom corner of the active zone. The Top X corner's -coordinate is fixed at 0. \fI"MaxX"\fP is a synomyn. -.TP 4 -.B Option \fI"YMax"\fP \fI"number"\fP -Second of three sets of parameters to set the active zone. This sets the the Y -coordinate of the bottom corner of the active zone. The Top Y corner's -coordinate is fixed at 0. \fI"MaxY"\fP is a synomyn. -.TP 4 -.B Option \fI"XOffset"\fP \fI"number"\fP -Third of three sets of parameters to set the active zone. This sets the X -coordinate of the top corner of the active zone. \fI"OffsetX"\fP is a synomyn. -.TP 4 -.B Option \fI"YOffset"\fP \fI"number"\fP -Third of three sets of parameters to set the active zone. This sets the Y -coordinate of the top corner of the active zone. \fI"OffsetY"\fP is a synomyn. -.TP 4 -.B Option \fI"XSize"\fP \fI"number"\fP -Third of three sets of parameters to set the active zone. This sets the X -coordinate of the bottom corner of the active zone. Unlike others, +.BI "Option \*qXTop\*q \*q" number \*q +First of three sets of parameters to set the active zone. This sets the X coordinate of the top corner of the active zone. +.RB \*q TopX \*q +is a synonym. +.TP 4 +.BI "Option \*qYTop\*q \*q" number \*q +First of three sets of parameters to set the active zone. This sets the +Y coordinate of the top corner of the active zone. +.RB \*q TopY \*q +is a synonym. +.TP 4 +.BI "Option \*qXBottom\*q \*q" number \*q +First of three sets of parameters to set the active zone. This sets the +X coordinate of the bottom corner of the active zone. +.RB \*q BottomX \*q +is a synonym. +.TP 4 +.BI "Option \*qYBottom\*q \*q" number \*q +First of three sets of parameters to set the active zone. This sets the +Y coordinate of the bottom corner of the active zone. +.RB \*q BottomY \*q +is a synonym. +.TP 4 +.BI "Option \*qXMax\*q \*q" number \*q +Second of three sets of parameters to set the active zone. This sets the +the X coordinate of the bottom corner of the active zone. The Top X +corner's coordinate is fixed at 0. +.RB \*q MaxX \*q +is a synomyn. +.TP 4 +.BI "Option \*qYMax\*q \*q" number \*q +Second of three sets of parameters to set the active zone. This sets the +the Y coordinate of the bottom corner of the active zone. The Top Y +corner's coordinate is fixed at 0. +.RB \*q MaxY \*q +is a synomyn. +.TP 4 +.BI "Option \*qXOffset\*q \*q" number \*q +Third of three sets of parameters to set the active zone. This sets the +X coordinate of the top corner of the active zone. +.RB \*q OffsetX \*q +is a synomyn. +.TP 4 +.BI "Option \*qYOffset\*q \*q" number \*q +Third of three sets of parameters to set the active zone. This sets the +Y coordinate of the top corner of the active zone. +.RB \*q OffsetY \*q +is a synomyn. +.TP 4 +.BI "Option \*qXSize\*q \*q" number \*q +Third of three sets of parameters to set the active zone. This sets the +X coordinate of the bottom corner of the active zone. Unlike others, this parameter is expressed in \fIrelative\fP coordinates from the -\fI"XOffset"\fP parameter. \fI"XSize"\fP is a synomyn. -.TP 4 -.B Option \fI"YSize"\fP \fI"number"\fP -Third of three sets of parameters to set the active zone. This sets the Y -coordinate of the bottom corner of the active zone. Unlike others, +.RB \*q XOffset \*q +parameter. +.RB \*q SizeX \*q +is a synomyn. +.TP 4 +.BI "Option \*qYSize\*q \*q" number \*q +Third of three sets of parameters to set the active zone. This sets the +Y coordinate of the bottom corner of the active zone. Unlike others, this parameter is expressed in \fIrelative\fP coordinates from the -\fI"YOffset"\fP parameter. \fI"YSize"\fP is a synomyn. -.TP 4 -.B Option \fI"ZMin"\fP \fI"number"\fP -Minimum pressure reading that will be accepted from the Stylus tool. \fI"MinZ\fP" is a synomyn. +.RB \*q YOffset \*q +parameter. +.RB \*q SizeY \*q +is a synomyn. +.TP 4 +.BI "Option \*qZMin\*q \*q" number \*q +Minimum pressure reading that will be accepted from the Stylus tool. +.RB \*q MinZ \*q +is a synomyn. +.TP 4 +.BI "Option \*qZMax\*q \*q" number \*q +Maximum pressure reading that will be accepted from the Stylus tool. +.RB \*q MaxZ \*q +is a synomyn. +.TP 4 +.BI "Option \*qXThreshold\*q \*q" number \*q +Minimal change in X coordinate position that will be accepted as data +input. +.RB \*q ThresholdX \*q +is a synomyn. +.TP 4 +.BI "Option \*qYThreshold\*q \*q" number \*q +Minimal change in Y coordinate position that will be accepted as data +input. +.RB \*q ThresholdY \*q +is a synomyn. .TP 4 -.B Option \fI"ZMax"\fP \fI"number"\fP -Maximum pressure reading that will be accepted from the Stylus tool. \fI"MaxZ\fP" is a synomyn. -.TP 4 -.B Option \fI"XThreshold"\fP \fI"number"\fP -Minimal change in X coordinate position that will be accepted as data input. -\fI"ThresholdX"\fP is a synomyn. -.TP 4 -.B Option \fI"YThreshold"\fP \fI"number"\fP -Minimal change in Y coordinate position that will be accepted as data input. -\fI"ThresholdY"\fP is a synomyn. -.TP 4 -.B Option \fI"ZThreshold"\fP \fI"number"\fP +.BI "Option \*qZThreshold\*q \*q" number \*q Minimal change in pressure reading that will be accepted as data input. -\fI"ThresholdZ"\fP is a synomyn. -.TP 4 -.B Option \fI"InvX"\fP \fI"on"\fP -Inverts X coordinate reports. \fI"XInv"\fP is a synomyn. +.RB \*q ThresholdZ \*q +is a synomyn. .TP 4 -.B Option \fI"InvY"\fP \fI"on"\fP -Inverts Y coordinate reports. \fI"YInv"\fP is a synomyn. +.BI "Option \*qInvX\*q \*q" on \*q +Inverts X coordinate reports. +.RB \*q XInv \*q +is a synomyn. +.TP 4 +.BI "Option \*qInvY\*q \*q" on \*q +Inverts Y coordinate reports. +.RB \*q YInv \*q +is a synomyn. .TP 4 -.B Option \fI"Pressure"\fP \fI"soft"|"hard"|"linear"\fP +.BR "Option \*qPressure\*q \*qsoft" | hard | linear\*q Pressure reports either delivered in linearly incremental values (default), -or perturbed by one of two log-linear algorithms (\fI"soft"\fP or \fI"hard"\fP.) +or perturbed by one of two log-linear algorithms +.RB (\*q soft \*q +or +.RB \*q hard \*q). .TP 4 -.B Option \fI"KeepShape"\fP \fI"on"\fP +.BI "Option \*qKeepShape\*q \*q" on \*q When this option is enabled, the active zone begins according to TopX and TopY. The bottom corner is adjusted to keep the ratio width/height of the active zone the same as the screen while maximizing the area described by the active area set of parameters, XTop/YTop/XBottom/YBottom, XMax/YMax, or XOffset/YOffset/XSize/YSize. .TP 4 -.B Option \fI"DebugLevel"\fP \fInumber \fP +.BI "Option \*qDebugLevel\*q \*q" number \*q sets the level of debugging info reported. .RE .PP Index: xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.c diff -u xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.c:1.3 xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.c:1.4 --- xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.c:1.3 Mon Apr 26 18:26:10 2004 +++ xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.c Thu Mar 16 11:50:25 2006 @@ -35,7 +35,7 @@ * TORTIOUS ACTIONS, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.c,v 1.3 2004/04/26 22:26:10 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.c,v 1.4 2006/03/16 16:50:25 dawes Exp $ */ /* * @@ -2416,7 +2416,7 @@ * called when the module subsection is found in XF86Config */ static pointer -xf86AiptekPlug(pointer module, +xf86AiptekPlug(ModuleDescPtr module, pointer options, int* errmaj, int* errmin) Index: xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.h diff -u xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.h:1.4 xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.h:1.5 --- xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.h:1.4 Mon Apr 26 18:26:10 2004 +++ xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.h Fri Oct 14 11:16:54 2005 @@ -34,7 +34,7 @@ * TORTIOUS ACTIONS, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.h,v 1.4 2004/04/26 22:26:10 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/aiptek/xf86Aiptek.h,v 1.5 2005/10/14 15:16:54 tsi Exp $ */ #ifndef _AIPTEK_H_ #define _AIPTEK_H_ @@ -75,7 +75,7 @@ #include #include #include /* Needed for InitValuator/Proximity stuff */ -#include +#include #include #include Index: xc/programs/Xserver/hw/xfree86/input/calcomp/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/calcomp/Imakefile:1.4 xc/programs/Xserver/hw/xfree86/input/calcomp/Imakefile:1.5 --- xc/programs/Xserver/hw/xfree86/input/calcomp/Imakefile:1.4 Mon May 31 20:17:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/calcomp/Imakefile Fri Oct 14 11:16:54 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/calcomp/Imakefile,v 1.4 2004/06/01 00:17:04 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/calcomp/Imakefile,v 1.5 2005/10/14 15:16:54 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,7 @@ DRIVER = calcomp -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c diff -u xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c:1.8 xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c:1.9 --- xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c:1.8 Tue Jan 14 22:43:58 2003 +++ xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c Thu Mar 16 11:50:26 2006 @@ -31,7 +31,7 @@ * authorization from Martin Kroeker or Daveg GmbH. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c,v 1.8 2003/01/15 03:43:58 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/calcomp/xf86Calcomp.c,v 1.9 2006/03/16 16:50:26 dawes Exp $ */ #define _CALCOMP_C_ /***************************************************************************** @@ -149,7 +149,7 @@ static pointer -CalcompSetupProc( pointer module, +CalcompSetupProc( ModuleDescPtr module, pointer options, int *errmaj, int *errmin ) Index: xc/programs/Xserver/hw/xfree86/input/citron/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/citron/Imakefile:1.4 xc/programs/Xserver/hw/xfree86/input/citron/Imakefile:1.5 --- xc/programs/Xserver/hw/xfree86/input/citron/Imakefile:1.4 Mon May 31 20:17:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/citron/Imakefile Fri Oct 14 11:16:54 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/citron/Imakefile,v 1.4 2004/06/01 00:17:04 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/citron/Imakefile,v 1.5 2005/10/14 15:16:54 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,8 @@ DRIVER = citron -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(SERVERSRC)/mi #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/citron/citron.c diff -u xc/programs/Xserver/hw/xfree86/input/citron/citron.c:1.13 xc/programs/Xserver/hw/xfree86/input/citron/citron.c:1.15 --- xc/programs/Xserver/hw/xfree86/input/citron/citron.c:1.13 Mon Apr 26 18:26:10 2004 +++ xc/programs/Xserver/hw/xfree86/input/citron/citron.c Thu Mar 16 11:50:26 2006 @@ -1,4 +1,4 @@ -/* $Id: citron.c,v 1.12 2003/04/14 08:42:27 pk Exp $ +/* * Copyright (c) 1998 Metro Link Incorporated * * Permission is hereby granted, free of charge, to any person obtaining a @@ -25,7 +25,7 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/citron/citron.c,v 1.13 2004/04/26 22:26:10 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/citron/citron.c,v 1.15 2006/03/16 16:50:26 dawes Exp $ */ /* * Based, in part, on code with the following copyright notice: @@ -282,7 +282,7 @@ * ************************************************************************/ static pointer -SetupProc( pointer module, +SetupProc( ModuleDescPtr module, pointer options, int *errmaj, int *errmin ) Index: xc/programs/Xserver/hw/xfree86/input/citron/citron.h diff -u xc/programs/Xserver/hw/xfree86/input/citron/citron.h:1.5 xc/programs/Xserver/hw/xfree86/input/citron/citron.h:1.6 --- xc/programs/Xserver/hw/xfree86/input/citron/citron.h:1.5 Mon Nov 3 00:11:47 2003 +++ xc/programs/Xserver/hw/xfree86/input/citron/citron.h Mon Jan 9 10:00:17 2006 @@ -1,4 +1,4 @@ -/* $Id: citron.h,v 1.5 2003/04/14 08:42:27 pk Exp $ +/* * Copyright (c) 1998 Metro Link Incorporated * * Permission is hereby granted, free of charge, to any person obtaining a @@ -25,7 +25,7 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/citron/citron.h,v 1.5 2003/11/03 05:11:47 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/citron/citron.h,v 1.6 2006/01/09 15:00:17 dawes Exp $ */ /* * Based, in part, on code with the following copyright notice: Index: xc/programs/Xserver/hw/xfree86/input/citron/citron.man diff -u xc/programs/Xserver/hw/xfree86/input/citron/citron.man:1.4 xc/programs/Xserver/hw/xfree86/input/citron/citron.man:1.6 --- xc/programs/Xserver/hw/xfree86/input/citron/citron.man:1.4 Tue Jun 24 11:43:40 2003 +++ xc/programs/Xserver/hw/xfree86/input/citron/citron.man Sun Feb 26 20:57:12 2006 @@ -1,7 +1,6 @@ .\" Copyright (c) 2000-2003 Peter Kunzmann -.\" $Id: citron.man,v 1.7 2003/04/14 08:42:27 pk Exp $ .\" -.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/citron/citron.man,v 1.4 2003/06/24 15:43:40 eich Exp $ +.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/citron/citron.man,v 1.6 2006/02/27 01:57:12 dawes Exp $ .\" .TH CITRON __drivermansuffix__ __vendorversion__ .SH NAME @@ -348,7 +347,7 @@ .I """5"" = ClickMode ZPress Exit -This mode is similat to "Clickmode Dual Exit". +This mode is similar to "Clickmode Dual Exit". The first interruption of the beams will sent a ProximityIn event. Only if a certain pressure is exceeded a ButtonPress event will occur. If the pressure falls below a certain limit no ButtonRelease event will be sent. Index: xc/programs/Xserver/hw/xfree86/input/digitaledge/DigitalEdge.c diff -u xc/programs/Xserver/hw/xfree86/input/digitaledge/DigitalEdge.c:1.11 xc/programs/Xserver/hw/xfree86/input/digitaledge/DigitalEdge.c:1.13 --- xc/programs/Xserver/hw/xfree86/input/digitaledge/DigitalEdge.c:1.11 Sat Oct 23 11:29:30 2004 +++ xc/programs/Xserver/hw/xfree86/input/digitaledge/DigitalEdge.c Thu Mar 16 11:50:26 2006 @@ -30,7 +30,7 @@ * Probably buggy as hell, no idea what the initialisation strings are, * no idea how to ack it. If the tablet stops responding power cycle it. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/digitaledge/DigitalEdge.c,v 1.11 2004/10/23 15:29:30 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/digitaledge/DigitalEdge.c,v 1.13 2006/03/16 16:50:26 dawes Exp $ */ #ifndef XFree86LOADER #include @@ -47,7 +47,7 @@ #include "xf86_OSproc.h" #include "xf86Xinput.h" #include "exevents.h" /* Needed for InitValuator/Proximity stuff */ -#include "keysym.h" +#include #include "mipointer.h" #include "xf86Module.h" @@ -968,6 +968,8 @@ * * called when the module subsection is found in XF86Config */ +static MODULETEARDOWNPROTO(xf86SumUnplug); + static void xf86SumUnplug(pointer p) { @@ -978,8 +980,10 @@ * * called when the module subsection is found in XF86Config */ +static MODULESETUPPROTO(xf86SumPlug); + static pointer -xf86SumPlug(pointer module, +xf86SumPlug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) Index: xc/programs/Xserver/hw/xfree86/input/digitaledge/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/digitaledge/Imakefile:1.3 xc/programs/Xserver/hw/xfree86/input/digitaledge/Imakefile:1.4 --- xc/programs/Xserver/hw/xfree86/input/digitaledge/Imakefile:1.3 Mon May 31 20:17:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/digitaledge/Imakefile Fri Oct 14 11:16:55 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/digitaledge/Imakefile,v 1.3 2004/06/01 00:17:04 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/digitaledge/Imakefile,v 1.4 2005/10/14 15:16:55 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,8 @@ DRIVER = digitaledge -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/mi -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/mi -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/dmc/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/dmc/Imakefile:1.4 xc/programs/Xserver/hw/xfree86/input/dmc/Imakefile:1.5 --- xc/programs/Xserver/hw/xfree86/input/dmc/Imakefile:1.4 Mon May 31 20:17:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/dmc/Imakefile Fri Oct 14 11:16:55 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/dmc/Imakefile,v 1.4 2004/06/01 00:17:04 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/dmc/Imakefile,v 1.5 2005/10/14 15:16:55 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,7 @@ DRIVER = dmc -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/dmc/xf86DMC.c diff -u xc/programs/Xserver/hw/xfree86/input/dmc/xf86DMC.c:1.4 xc/programs/Xserver/hw/xfree86/input/dmc/xf86DMC.c:1.5 --- xc/programs/Xserver/hw/xfree86/input/dmc/xf86DMC.c:1.4 Sat Oct 23 11:29:30 2004 +++ xc/programs/Xserver/hw/xfree86/input/dmc/xf86DMC.c Thu Mar 16 11:50:27 2006 @@ -35,7 +35,7 @@ * - Make dectection work after restart of X */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/dmc/xf86DMC.c,v 1.4 2004/10/23 15:29:30 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/dmc/xf86DMC.c,v 1.5 2006/03/16 16:50:27 dawes Exp $ */ #define _DMC_C_ @@ -123,9 +123,10 @@ NULL }; +static MODULESETUPPROTO(DMCSetupProc); static pointer -DMCSetupProc( pointer module, +DMCSetupProc( ModuleDescPtr module, pointer options, int *errmaj, int *errmin ) Index: xc/programs/Xserver/hw/xfree86/input/dynapro/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/dynapro/Imakefile:1.7 xc/programs/Xserver/hw/xfree86/input/dynapro/Imakefile:1.8 --- xc/programs/Xserver/hw/xfree86/input/dynapro/Imakefile:1.7 Mon May 31 20:17:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/dynapro/Imakefile Fri Oct 14 11:16:55 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/dynapro/Imakefile,v 1.7 2004/06/01 00:17:04 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/dynapro/Imakefile,v 1.8 2005/10/14 15:16:55 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,7 @@ DRIVER = dynapro -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/dynapro/xf86Dyna.c diff -u xc/programs/Xserver/hw/xfree86/input/dynapro/xf86Dyna.c:1.4 xc/programs/Xserver/hw/xfree86/input/dynapro/xf86Dyna.c:1.5 --- xc/programs/Xserver/hw/xfree86/input/dynapro/xf86Dyna.c:1.4 Mon Nov 26 11:25:53 2001 +++ xc/programs/Xserver/hw/xfree86/input/dynapro/xf86Dyna.c Thu Mar 16 11:50:27 2006 @@ -27,7 +27,7 @@ * in this Software without prior written authorization from Metro Link. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/dynapro/xf86Dyna.c,v 1.4 2001/11/26 16:25:53 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/dynapro/xf86Dyna.c,v 1.5 2006/03/16 16:50:27 dawes Exp $ */ #define _DYNAPRO_C_ @@ -115,9 +115,10 @@ NULL }; +static MODULESETUPPROTO(DynaproSetupProc); static pointer -DynaproSetupProc( pointer module, +DynaproSetupProc( ModuleDescPtr module, pointer options, int *errmaj, int *errmin ) Index: xc/programs/Xserver/hw/xfree86/input/elo2300/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/elo2300/Imakefile:1.6 xc/programs/Xserver/hw/xfree86/input/elo2300/Imakefile:1.7 --- xc/programs/Xserver/hw/xfree86/input/elo2300/Imakefile:1.6 Mon May 31 20:17:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/elo2300/Imakefile Fri Oct 14 11:16:55 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/elo2300/Imakefile,v 1.6 2004/06/01 00:17:04 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/elo2300/Imakefile,v 1.7 2005/10/14 15:16:55 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,7 @@ DRIVER = elo2300 -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/elo2300/elo.c diff -u xc/programs/Xserver/hw/xfree86/input/elo2300/elo.c:1.11 xc/programs/Xserver/hw/xfree86/input/elo2300/elo.c:1.12 --- xc/programs/Xserver/hw/xfree86/input/elo2300/elo.c:1.11 Mon Nov 26 11:25:53 2001 +++ xc/programs/Xserver/hw/xfree86/input/elo2300/elo.c Thu Mar 16 11:50:27 2006 @@ -48,7 +48,7 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/elo2300/elo.c,v 1.11 2001/11/26 16:25:53 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/elo2300/elo.c,v 1.12 2006/03/16 16:50:27 dawes Exp $ */ #define _elo_C_ /***************************************************************************** @@ -124,7 +124,7 @@ } static pointer -SetupProc( pointer module, +SetupProc( ModuleDescPtr module, pointer options, int *errmaj, int *errmin ) Index: xc/programs/Xserver/hw/xfree86/input/elographics/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/elographics/Imakefile:1.6 xc/programs/Xserver/hw/xfree86/input/elographics/Imakefile:1.7 --- xc/programs/Xserver/hw/xfree86/input/elographics/Imakefile:1.6 Mon May 31 20:17:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/elographics/Imakefile Fri Oct 14 11:16:55 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/elographics/Imakefile,v 1.6 2004/06/01 00:17:04 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/elographics/Imakefile,v 1.7 2005/10/14 15:16:55 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,7 @@ DRIVER = elographics -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c diff -u xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c:1.20 xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c:1.22 --- xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c:1.20 Mon Apr 26 18:48:21 2004 +++ xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c Thu Mar 16 11:50:28 2006 @@ -1,4 +1,5 @@ -/* $XConsortium: xf86Elo.c /main/13 1996/10/25 14:11:31 kaleb $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c,v 1.22 2006/03/16 16:50:28 dawes Exp $ */ + /* * Copyright 1995, 1999 by Patrick Lecoanet, France. * @@ -22,8 +23,6 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c,v 1.20 2004/04/26 22:48:21 dawes Exp $ */ - /* ******************************************************************************* ******************************************************************************* @@ -1171,8 +1170,10 @@ }; #ifdef XFree86LOADER +static MODULESETUPPROTO(Plug); + static pointer -Plug(pointer module, +Plug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) Index: xc/programs/Xserver/hw/xfree86/input/eloinput/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/eloinput/Imakefile:1.1 xc/programs/Xserver/hw/xfree86/input/eloinput/Imakefile:1.2 --- xc/programs/Xserver/hw/xfree86/input/eloinput/Imakefile:1.1 Fri Jan 21 09:03:49 2005 +++ xc/programs/Xserver/hw/xfree86/input/eloinput/Imakefile Fri Oct 14 11:16:55 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/eloinput/Imakefile,v 1.1 2005/01/21 14:03:49 tsi Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/eloinput/Imakefile,v 1.2 2005/10/14 15:16:55 tsi Exp $ #define IHaveModules #include @@ -8,8 +8,7 @@ DRIVER = eloinput -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/eloinput/xf86EloInput.c diff -u xc/programs/Xserver/hw/xfree86/input/eloinput/xf86EloInput.c:1.2 xc/programs/Xserver/hw/xfree86/input/eloinput/xf86EloInput.c:1.4 --- xc/programs/Xserver/hw/xfree86/input/eloinput/xf86EloInput.c:1.2 Fri Jan 21 13:07:12 2005 +++ xc/programs/Xserver/hw/xfree86/input/eloinput/xf86EloInput.c Thu Mar 16 11:50:28 2006 @@ -24,7 +24,7 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/eloinput/xf86EloInput.c,v 1.2 2005/01/21 18:07:12 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/eloinput/xf86EloInput.c,v 1.4 2006/03/16 16:50:28 dawes Exp $ */ /* ****************************************************************************** @@ -72,17 +72,17 @@ #else /* XFREE86_V4 */ -#include "Xos.h" +#include #include #include #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "inputstr.h" #include "scrnintstr.h" -#include "XI.h" -#include "XIproto.h" +#include +#include #if defined(sun) && !defined(i386) #include @@ -998,8 +998,10 @@ }; #ifdef XFree86LOADER +static MODULESETUPPROTO(Plug); + static pointer -Plug(pointer module, +Plug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) @@ -1008,6 +1010,8 @@ return module; } +static MODULETEARDOWNPROTO(Unplug); + static void Unplug(pointer p) { Index: xc/programs/Xserver/hw/xfree86/input/fpit/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/fpit/Imakefile:1.2 xc/programs/Xserver/hw/xfree86/input/fpit/Imakefile:1.3 --- xc/programs/Xserver/hw/xfree86/input/fpit/Imakefile:1.2 Thu Mar 18 02:07:02 2004 +++ xc/programs/Xserver/hw/xfree86/input/fpit/Imakefile Fri Oct 14 11:16:55 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/fpit/Imakefile,v 1.2 2004/03/18 07:07:02 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/fpit/Imakefile,v 1.3 2005/10/14 15:16:55 tsi Exp $ #define IHaveModules #include @@ -8,8 +8,8 @@ DRIVER = fpit -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(SERVERSRC)/mi #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/fpit/xf86Fpit.c diff -u xc/programs/Xserver/hw/xfree86/input/fpit/xf86Fpit.c:1.7 xc/programs/Xserver/hw/xfree86/input/fpit/xf86Fpit.c:1.8 --- xc/programs/Xserver/hw/xfree86/input/fpit/xf86Fpit.c:1.7 Tue Feb 1 23:34:24 2005 +++ xc/programs/Xserver/hw/xfree86/input/fpit/xf86Fpit.c Thu Mar 16 11:50:29 2006 @@ -49,7 +49,7 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/fpit/xf86Fpit.c,v 1.7 2005/02/02 04:34:24 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/fpit/xf86Fpit.c,v 1.8 2006/03/16 16:50:29 dawes Exp $ */ #include @@ -585,12 +585,16 @@ }; #ifdef XFree86LOADER -static pointer Plug(pointer module, pointer options, int *errmaj, int *errmin) +static MODULESETUPPROTO(Plug); + +static pointer Plug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) { xf86AddInputDriver(&FPIT, module, 0); return module; } +static MODULETEARDOWNPROTO(Unplug); + static void Unplug(pointer p) { } Index: xc/programs/Xserver/hw/xfree86/input/hyperpen/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/hyperpen/Imakefile:1.5 xc/programs/Xserver/hw/xfree86/input/hyperpen/Imakefile:1.6 --- xc/programs/Xserver/hw/xfree86/input/hyperpen/Imakefile:1.5 Mon May 31 20:17:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/hyperpen/Imakefile Fri Oct 14 11:16:56 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/hyperpen/Imakefile,v 1.5 2004/06/01 00:17:04 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/hyperpen/Imakefile,v 1.6 2005/10/14 15:16:56 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -58,8 +58,8 @@ DRIVER = hyperpen -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(SERVERSRC)/mi #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/hyperpen/xf86HyperPen.c diff -u xc/programs/Xserver/hw/xfree86/input/hyperpen/xf86HyperPen.c:1.12 xc/programs/Xserver/hw/xfree86/input/hyperpen/xf86HyperPen.c:1.14 --- xc/programs/Xserver/hw/xfree86/input/hyperpen/xf86HyperPen.c:1.12 Sat Oct 23 11:29:31 2004 +++ xc/programs/Xserver/hw/xfree86/input/hyperpen/xf86HyperPen.c Thu Mar 16 11:50:29 2006 @@ -35,7 +35,7 @@ * TORTIOUS ACTIONS, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/hyperpen/xf86HyperPen.c,v 1.12 2004/10/23 15:29:31 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/hyperpen/xf86HyperPen.c,v 1.14 2006/03/16 16:50:29 dawes Exp $ */ #ifndef XFree86LOADER #include @@ -52,7 +52,7 @@ #include #include #include /* Needed for InitValuator/Proximity stuff */ -#include +#include #include #include @@ -1179,6 +1179,9 @@ * * called when the module subsection is found in XF86Config */ + +static MODULETEARDOWNPROTO(xf86HypUnplug); + static void xf86HypUnplug(pointer p) { @@ -1190,8 +1193,11 @@ * * called when the module subsection is found in XF86Config */ + +static MODULESETUPPROTO(xf86HypPlug); + static pointer -xf86HypPlug(pointer module, +xf86HypPlug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) Index: xc/programs/Xserver/hw/xfree86/input/jamstudio/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/jamstudio/Imakefile:1.2 xc/programs/Xserver/hw/xfree86/input/jamstudio/Imakefile:1.3 --- xc/programs/Xserver/hw/xfree86/input/jamstudio/Imakefile:1.2 Thu Mar 18 02:07:02 2004 +++ xc/programs/Xserver/hw/xfree86/input/jamstudio/Imakefile Fri Oct 14 11:16:56 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/jamstudio/Imakefile,v 1.2 2004/03/18 07:07:02 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/jamstudio/Imakefile,v 1.3 2005/10/14 15:16:56 tsi Exp $ #define IHaveModules #include @@ -8,8 +8,8 @@ DRIVER = js_x -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(SERVERSRC)/mi #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.c diff -u xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.c:1.6 xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.c:1.7 --- xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.c:1.6 Mon Apr 26 18:48:21 2004 +++ xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.c Thu Mar 16 11:50:29 2006 @@ -20,7 +20,7 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.c,v 1.6 2004/04/26 22:48:21 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/jamstudio/js_x.c,v 1.7 2006/03/16 16:50:29 dawes Exp $ */ #include #include "misc.h" @@ -326,14 +326,18 @@ #ifdef XFree86LOADER +static MODULETEARDOWNPROTO(xf86JS_XUnplug); + static void xf86JS_XUnplug(pointer p) { return; } +static MODULESETUPPROTO(xf86JS_XPlug); + static pointer -xf86JS_XPlug(pointer module, pointer options, int *errmaj, int *errmin) +xf86JS_XPlug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) { xf86AddInputDriver(&JAMSTUDIO, module, 0); return module; Index: xc/programs/Xserver/hw/xfree86/input/joystick/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/joystick/Imakefile:1.8 xc/programs/Xserver/hw/xfree86/input/joystick/Imakefile:1.9 --- xc/programs/Xserver/hw/xfree86/input/joystick/Imakefile:1.8 Mon May 31 20:17:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/joystick/Imakefile Fri Oct 14 11:16:56 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/joystick/Imakefile,v 1.8 2004/06/01 00:17:04 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/joystick/Imakefile,v 1.9 2005/10/14 15:16:56 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,7 @@ DRIVER = joystick -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #ifdef LinuxArchitecture ARCH_JSTK = ../os-support/linux/lnx_jstk.o Index: xc/programs/Xserver/hw/xfree86/input/joystick/xf86Jstk.c diff -u xc/programs/Xserver/hw/xfree86/input/joystick/xf86Jstk.c:1.7 xc/programs/Xserver/hw/xfree86/input/joystick/xf86Jstk.c:1.10 --- xc/programs/Xserver/hw/xfree86/input/joystick/xf86Jstk.c:1.7 Mon Apr 26 18:26:11 2004 +++ xc/programs/Xserver/hw/xfree86/input/joystick/xf86Jstk.c Thu Mar 16 11:50:30 2006 @@ -1,4 +1,5 @@ -/* $XConsortium: xf86Jstk.c /main/14 1996/10/25 14:11:36 kaleb $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/joystick/xf86Jstk.c,v 1.10 2006/03/16 16:50:30 dawes Exp $ */ + /* * Copyright 1995-1999 by Frederic Lepied, France. * @@ -22,8 +23,6 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/joystick/xf86Jstk.c,v 1.7 2004/04/26 22:26:11 dawes Exp $ */ - #include #include #include @@ -31,7 +30,7 @@ #include #include #include /* Needed for InitValuator/Proximity stuff */ -#include +#include #include @@ -412,7 +411,7 @@ * called when the module subsection is found in XF86Config */ static pointer -xf86JstkPlug(pointer module, +xf86JstkPlug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin ) Index: xc/programs/Xserver/hw/xfree86/input/keyboard/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/keyboard/Imakefile:1.5 xc/programs/Xserver/hw/xfree86/input/keyboard/Imakefile:1.6 --- xc/programs/Xserver/hw/xfree86/input/keyboard/Imakefile:1.5 Mon May 31 20:17:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/keyboard/Imakefile Fri Oct 14 11:16:56 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/keyboard/Imakefile,v 1.5 2004/06/01 00:17:04 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/keyboard/Imakefile,v 1.6 2005/10/14 15:16:56 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,9 +54,8 @@ DRIVER = kbd -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/mi -I$(SERVERSRC)/include -I$(XINCLUDESRC) \ - -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/mi -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c diff -u xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c:1.9 xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c:1.13 --- xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c:1.9 Thu Dec 18 16:53:45 2003 +++ xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c Thu Mar 16 11:50:30 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c,v 1.9 2003/12/18 21:53:45 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/keyboard/kbd.c,v 1.13 2006/03/16 16:50:30 dawes Exp $ */ /* * Copyright (c) 2002 by The XFree86 Project, Inc. @@ -13,16 +13,16 @@ */ #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "xf86.h" #include "atKeynames.h" #include "xf86Privstr.h" #ifdef XINPUT -#include "XI.h" -#include "XIproto.h" +#include +#include #include "extnsionst.h" #include "extinit.h" #else @@ -580,6 +580,9 @@ /* * Now map the scancodes to real X-keycodes ... */ + if ((scanCode == KEY_NOTUSED) || (scanCode == KEY_UNKNOWN)) + return; + keycode = scanCode + MIN_KEYCODE; keysym = (keyc->curKeySyms.map + keyc->curKeySyms.mapWidth * @@ -726,13 +729,17 @@ KeyboardAvailableOptions, }; +static MODULETEARDOWNPROTO(xf86KbdUnplug); + static void xf86KbdUnplug(pointer p) { } +static MODULESETUPPROTO(xf86KbdPlug); + static pointer -xf86KbdPlug(pointer module, +xf86KbdPlug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) Index: xc/programs/Xserver/hw/xfree86/input/magellan/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/magellan/Imakefile:1.6 xc/programs/Xserver/hw/xfree86/input/magellan/Imakefile:1.7 --- xc/programs/Xserver/hw/xfree86/input/magellan/Imakefile:1.6 Mon May 31 20:17:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/magellan/Imakefile Fri Oct 14 11:16:56 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/magellan/Imakefile,v 1.6 2004/06/01 00:17:04 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/magellan/Imakefile,v 1.7 2005/10/14 15:16:56 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,7 @@ DRIVER = magellan -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/magellan/magellan.c diff -u xc/programs/Xserver/hw/xfree86/input/magellan/magellan.c:1.11 xc/programs/Xserver/hw/xfree86/input/magellan/magellan.c:1.12 --- xc/programs/Xserver/hw/xfree86/input/magellan/magellan.c:1.11 Fri Jun 7 17:03:27 2002 +++ xc/programs/Xserver/hw/xfree86/input/magellan/magellan.c Thu Mar 16 11:50:30 2006 @@ -32,7 +32,7 @@ * port based on pre-XFree4.2.0 driver code v1.10 and XFree4.2.0 SpaceOrb driver code */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/magellan/magellan.c,v 1.11 2002/06/07 21:03:27 alanh Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/magellan/magellan.c,v 1.12 2006/03/16 16:50:30 dawes Exp $ */ #define _MAGELLAN_C_ /***************************************************************************** @@ -136,8 +136,10 @@ NULL }; +static MODULESETUPPROTO(MAGELLANSetupProc); + static pointer -MAGELLANSetupProc(pointer module, +MAGELLANSetupProc(ModuleDescPtr module, pointer options, int *errmaj, int *errmin ) { @@ -149,6 +151,9 @@ /* * The TearDownProc may have to be tailored to your device */ + +static MODULETEARDOWNPROTO(TearDownProc); + static void TearDownProc( pointer p ) { Index: xc/programs/Xserver/hw/xfree86/input/magictouch/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/magictouch/Imakefile:1.3 xc/programs/Xserver/hw/xfree86/input/magictouch/Imakefile:1.5 --- xc/programs/Xserver/hw/xfree86/input/magictouch/Imakefile:1.3 Mon May 31 20:17:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/magictouch/Imakefile Fri Oct 14 11:16:56 2005 @@ -1,50 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/magictouch/Imakefile,v 1.3 2004/06/01 00:17:04 dawes Exp $ -/* - * Copyright (c) 1994-2004 by The XFree86 Project, Inc. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject - * to the following conditions: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer - * in the documentation and/or other materials provided with the - * distribution, and in the same place and form as other copyright, - * license and disclaimer information. - * - * 3. The end-user documentation included with the redistribution, - * if any, must include the following acknowledgment: "This product - * includes software developed by The XFree86 Project, Inc - * (http://www.xfree86.org/) and its contributors", in the same - * place and form as other third-party acknowledgments. Alternately, - * this acknowledgment may appear in the software itself, in the - * same form and location as other such third-party acknowledgments. - * - * 4. Except as contained in this notice, the name of The XFree86 - * Project, Inc shall not be used in advertising or otherwise to - * promote the sale, use or other dealings in this Software without - * prior written authorization from The XFree86 Project, Inc. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESSED OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE XFREE86 PROJECT, INC OR ITS CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/magictouch/Imakefile,v 1.5 2005/10/14 15:16:56 tsi Exp $ #define IHaveModules #include @@ -54,8 +8,7 @@ DRIVER = magictouch -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/magictouch/magictouch.man diff -u xc/programs/Xserver/hw/xfree86/input/magictouch/magictouch.man:1.1 xc/programs/Xserver/hw/xfree86/input/magictouch/magictouch.man:1.3 --- xc/programs/Xserver/hw/xfree86/input/magictouch/magictouch.man:1.1 Tue Jul 3 11:13:57 2001 +++ xc/programs/Xserver/hw/xfree86/input/magictouch/magictouch.man Sun Feb 26 20:57:12 2006 @@ -1,25 +1,102 @@ -.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/magictouch/magictouch.man,v 1.1 2001/07/03 15:13:57 paulo Exp $ +.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/magictouch/magictouch.man,v 1.3 2006/02/27 01:57:12 dawes Exp $ .\" shorthand for double quote that works everywhere. .ds q \N'34' -.TH VOID __drivermansuffix__ __vendorversion__ +.TH MagicTouch __drivermansuffix__ __vendorversion__ .SH NAME -void \- null input driver +magictouch \- MagicTouch input driver .SH SYNOPSIS -.nf .B "Section \*qInputDevice\*q" +.br .BI " Identifier \*q" idevname \*q -.B " Driver \*qmagictouch\*q" +.br +.B " Driver \*qMagicTouch\*q" +.br +.BI " Option \*qDevice\*q \*q" devpath \*q +.br \ \ ... +.br .B EndSection -.fi .SH DESCRIPTION -.B magictouch -is an XFree86 input driver. +.B MagicTouch +is an XFree86 input driver for MagicTouch ProE-X controller... +.PP +The +.B MagicTouch +driver functions as a pointer input device, and may be used as the +X server's core pointer. +.SH SUPPORTED HARDWARE +It currently supports the ProE-X resistive touchscreen serial (rs232) interface +and touchscreens made by Keytec, Inc (MagicTouch) .SH CONFIGURATION DETAILS Please refer to XF86Config(__filemansuffix__) for general configuration details and for options that can be used with all input drivers. This -driver doesn't have any configuration options in addition to those. +section only covers configuration details specific to this driver. +.PP +.PP +.PP +The following driver +.B Options +are supported: +.TP 7 +.BI "Option \*qDevice\*q \*q" devpath \*q +Specify the device path for the magictouch. Valid devices are: +.PP +.RS 12 +/dev/ttyS0, /dev/ttyS1, .... +This option is mandatory. +.RE +.PP +.RS 7 +It's important to specify the right device Note: com1 -> /dev/ttyS0, com2 -> /dev/ttyS1 .... + +.RE +.TP 7 +.BI "Option \*qScreenNumber\*q \*q" screennumber \*q +sets the +.I screennumber +for the +.I magictouch +InputDevice. +.PP +.RS 7 +.I Default: +ScreenNumber: "0" + +.RE +.TP 7 +.BI "Option \*qMinX, MinY\*q \*q" value \*q +These are the minimum X and Y values for the +.I magictouch +input device. +.PP +.RS 7 +Note: MinX, MinY must be less than MaxX, MaxY. +.PP +.I Range: +"0" - "32767" +.PP +.I Default: +MinX: "0" MinY: "0" + + +.RE +.TP 7 +.BI "Option \*qMaxX, MaxY\*q \*q" value \*q +These are the maximum X and Y values for the +.I magictouch +input device. +.PP +.RS 7 +Note: MaxX, MaxY must be greater than MinX, MinY. +.PP +.I Range: +"0" - "32767" +.PP +.I Default: +MaxX: "16384" MaxY: "16384" + + .SH "SEE ALSO" -XFree86(1), XF86Config(__filemansuffix__), xf86cfg(1), xf86config(1), Xserver(1), X(__miscmansuffix__). +XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__). .SH AUTHORS Authors include... Index: xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c diff -u xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c:1.6 xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c:1.9 --- xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c:1.6 Wed May 5 20:49:35 2004 +++ xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c Thu Mar 16 11:50:31 2006 @@ -1,629 +1,681 @@ /* - * $XFree86: xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c,v 1.6 2004/05/06 00:49:35 dawes Exp $ + * Copyright (c) 2005 Bruno Schwander + * Author: Bruno Schwander + * Template driver used: dmc: + * + * Copyright (c) 1999 Machine Vision Holdings Incorporated + * Author: Mayk Langer + * + * Template driver used: Copyright (c) 1998 Metro Link Incorporated + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE X CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.c,v 1.9 2006/03/16 16:50:31 dawes Exp $ */ -#ifndef XFree86LOADER -#include -#include -#include -#endif +#define _MGT_C_ #include #include -#if !defined(DGUX) +#define NEED_XF86_TYPES #include -#endif #include #include +#include #include -#include +#include "xf86MagicTouch.h" -/* - *************************************************************************** - * - * Default constants. - * - *************************************************************************** - */ -#define MAGIC_PACKET_SIZE 5 -#define MAGIC_PORT "/dev/magictouch" -#define MAGIC_LINK_SPEED B9600 - -/* First byte of the packet */ -#define MGCT_TOUCH 0x01 -#define MGCT_RKEY 0x02 -#define MGCT_LKEY 0x04 -#define MGCT_MKEY 0x08 -#define MGCT_CLICK_STATUS 0x10 +InputDriverRec MAGICTOUCH = { + 1, + "magictouch", + NULL, + MGTPreInit, + /*MGTUnInit*/NULL, + NULL, + 0 +}; -#define MEDIE_X 20 -#define MEDIE_Y 20 -/* - *************************************************************************** - * - * Usefull macros. - * - *************************************************************************** - */ -#define WORD_ASSEMBLY(byte1, byte2) (((byte2) << 8) | (byte1)) -#define SYSCALL(call) while(((call) == -1) && (errno == EINTR)) +#ifdef XFree86LOADER + +static XF86ModuleVersionInfo VersionRec = +{ + "magictouch", + MODULEVENDORSTRING, + MODINFOSTRING1, + MODINFOSTRING2, + XF86_VERSION_CURRENT, + 1, 0, 0, + ABI_CLASS_XINPUT, + ABI_XINPUT_VERSION, + MOD_CLASS_XINPUT, + {0, 0, 0, 0} /* signature, to be patched into the file by + * a tool */ +}; + + +static const char *reqSymbols[] = { + "AddEnabledDevice", + "ErrorF", + "InitButtonClassDeviceStruct", + "InitProximityClassDeviceStruct", + "InitValuatorAxisStruct", + "InitValuatorClassDeviceStruct", + "InitPtrFeedbackClassDeviceStruct", + "RemoveEnabledDevice", + "Xcalloc", + "Xfree", + "XisbBlockDuration", + "XisbFree", + "XisbNew", + "XisbRead", + "XisbTrace", + "screenInfo", + "xf86AddInputDriver", + "xf86AllocateInput", + "xf86CloseSerial", + "xf86ReadSerial", + "xf86WriteSerial", + "xf86CollectInputOptions", + "xf86ErrorFVerb", + "xf86FindOptionValue", + "xf86GetMotionEvents", + "xf86GetVerbosity", + "xf86MotionHistoryAllocate", + "xf86NameCmp", + "xf86OpenSerial", + "xf86OptionListCreate", + "xf86OptionListMerge", + "xf86OptionListReport", + "xf86PostButtonEvent", + "xf86PostMotionEvent", + "xf86PostProximityEvent", + "xf86ProcessCommonOptions", + "xf86ScaleAxis", + "xf86SetIntOption", + "xf86SetStrOption", + "xf86XInputSetScreen", + "xf86XInputSetSendCoreEvents", + NULL +}; + +static MODULESETUPPROTO(MGTSetupProc); + +static pointer +MGTSetupProc( ModuleDescPtr module, + pointer options, + int *errmaj, + int *errmin ) +{ + xf86LoaderReqSymLists(reqSymbols, NULL); + xf86AddInputDriver(&MAGICTOUCH, module, 0); + return (pointer) 1; +} + +XF86ModuleData magictouchModuleData = { &VersionRec, MGTSetupProc, NULL }; + + +#endif /* XFree86LOADER */ -/* This one is handy, thanx Fred ! */ -#ifdef DBG -#undef DBG -#endif -#ifdef DEBUG -#undef DEBUG -#endif - -static int debug_level = 0; -#define DEBUG 1 -#if DEBUG -#define DBG(lvl, f) {if ((lvl) == debug_level) { f; } } -#else -#define DBG(lvl, f) -#endif - - -#undef SYSCALL -#undef read -#undef write -#undef close -#undef strdup -#define SYSCALL(call) call -#define read(fd, ptr, num) xf86ReadSerial(fd, ptr, num) -#define write(fd, ptr, num) xf86WriteSerial(fd, ptr, num) -#define close(fd) xf86CloseSerial(fd) -#define strdup(str) xf86strdup(str) /* - *************************************************************************** - * - * Device private records. - * - *************************************************************************** + * Be sure to set vmin appropriately for your device's protocol. You want to + * read a full packet before returning */ -typedef struct _MagicPrivateRec { - char *input_dev; /* The touchscreen input tty */ - int min_x; /* Minimum x reported by calibration */ - int max_x; /* Maximum x */ - int min_y; /* Minimum y reported by calibration */ - int max_y; /* Maximum y */ - int screen_no; /* Screen associated with the device */ - int screen_width; /* Width of the associated X screen */ - int screen_height; /* Height of the screen */ - int swap_axes; /* Swap X an Y axes if != 0 */ - unsigned char packet_buf[MAGIC_PACKET_SIZE]; /* Assembly buffer */ - int packet_pos; - int buf_x[MEDIE_X], i_x, num_medie_x; - int buf_y[MEDIE_Y], i_y, num_medie_y; - Bool first_x, first_y; - Bool first_entry; - Bool e_presente; - Bool click_on; -} MagicPrivateRec, *MagicPrivatePtr; - -static Bool xf86MagicConvert(LocalDevicePtr local, int first, int num, - int v0, int v1, int v2, int v3, int v4, int v5, - int *x, int *y); +static const char *default_options[] = +{ + "Device", "/dev/ttyS1", + "BaudRate", "9600", + "StopBits", "1", + "DataBits", "8", + "Parity", "None", + "Vmin", "1", + "Vtime", "5", + "FlowControl", "None", + NULL, +}; + + +/***************************************************************************** + * Function Definitions + ****************************************************************************/ -/**************************************************************************** - * - * xf86MagicQueryOK -- - * Testa la presenza del touch controller. - * Si osserva che al primo accesso al touch dopo l'accensione e' - * presente nel buffer di ricezione il codice 0xF che identifica la - * vera presenza del touch controller. - * Dal secondo accesso in poi bisogna interrogare il touch controller - * per verificarne l'esistenza. - **************************************************************************** - */ -static Bool -xf86MagicQueryOK(int fd) + + +static InputInfoPtr +MGTPreInit(InputDriverPtr drv, IDevPtr dev, int flags) { - Bool ok; - int result; - char buf; - - ok = Success; - - /* Provo a leggere un byte dal buffer di ricezione */ - SYSCALL( result = read(fd, &buf, 1) ); - - DBG(4, ErrorF("<<%s[%d]>> QueryOK: read --> %d\n", __FILE__, __LINE__, result) ); - - /* Se result e' -1 vuol dire che non c'e' nessun carattere nel - buffer. Allora X/Window e' stato avviato almeno una volta */ - if (result<0) { - DBG(4, - ErrorF("Avvio n-esimo di X/Windows\n"); - ErrorF("Controllo presenza Touch Controller\n") - ); - - /* Cerco il touch controller. Invio il carattere 0x00. */ - buf = 0; - SYSCALL( result = write(fd, &buf, 1) ); - - /* Attendo 20 ms per dare il tempo al touch controller di - capire il comando */ - usleep(20000); - - /* Leggo la risposta */ - SYSCALL( result = read(fd, &buf, 1) ); - - DBG(4, - ErrorF("QueryOK: buf==%X, result==%d\n", buf, result) - ); + InputInfoPtr pInfo; + MGTPrivatePtr priv = xcalloc (1, sizeof (MGTPrivateRec)); + char *s; + + if (!priv) + return NULL; + + if (!(pInfo = xf86AllocateInput(drv, 0))) { + xfree(priv); + return NULL; } - - /* Se result<0 allora il touch controller non e' presente sul - disposito. Non posso proseguire */ - if (result<0) { - DBG(4, - ErrorF("<<%s[%d]>> result<0\n", __FILE__, __LINE__) - ); - ok = !Success; + + priv->min_x = 0; + priv->max_x = 16384; + priv->min_y = 0; + priv->max_y = 16384; + priv->screen_num = 0; + priv->screen_width = -1; + priv->screen_height = -1; + priv->lex_mode = MGT_byte0; + priv->swap_xy = 0; + priv->button_down = FALSE; + priv->button_number = 1; + priv->proximity = FALSE; + priv->pen_down = 0; + + pInfo->type_name = XI_TOUCHSCREEN; + pInfo->device_control = DeviceControl; + pInfo->read_input = ReadInput; + pInfo->control_proc = ControlProc; + pInfo->close_proc = CloseProc; + pInfo->switch_mode = SwitchMode; + pInfo->conversion_proc = ConvertProc; + pInfo->dev = NULL; + pInfo->private = priv; + pInfo->private_flags = 0; + pInfo->flags = XI86_POINTER_CAPABLE | XI86_SEND_DRAG_EVENTS; + pInfo->conf_idev = dev; + + xf86CollectInputOptions(pInfo, default_options, NULL); + + xf86OptionListReport( pInfo->options ); + + pInfo->fd = xf86OpenSerial (pInfo->options); + if (pInfo->fd == -1) + { + ErrorF ("MGT driver unable to open device\n"); + goto SetupProc_fail; } - /* Se il touch controller ha risposto allora controllo cosa ha - risposto */ - else { - ok = (buf==0xF ? Success : !Success); - DBG(4, - ErrorF("<<%s[%d]>> QueryOK buf==%x\n", __FILE__, __LINE__, buf) - ); + xf86CloseSerial(pInfo->fd); + /* + * Process the options for your device like this + */ + priv->min_x = xf86SetIntOption( pInfo->options, "MinX", 0 ); + priv->max_x = xf86SetIntOption( pInfo->options, "MaxX", 16384 ); + priv->min_y = xf86SetIntOption( pInfo->options, "MinY", 0 ); + priv->max_y = xf86SetIntOption( pInfo->options, "MaxY", 16384 ); + priv->screen_num = xf86SetIntOption( pInfo->options, "ScreenNumber", 0 ); + priv->button_number = xf86SetIntOption( pInfo->options, "ButtonNumber", 1 ); + priv->swap_xy = xf86SetIntOption( pInfo->options, "SwapXY", 0 ); + /* priv->buffer = NULL;*/ + s = xf86FindOptionValue (pInfo->options, "ReportingMode"); + if ((s) && (xf86NameCmp (s, "raw") == 0)) + priv->reporting_mode = TS_Raw; + else + priv->reporting_mode = TS_Scaled; + + priv->proximity = FALSE; + priv->button_down = FALSE; + priv->lex_mode = MGT_byte0; + + if (QueryHardware (priv) != Success) + { + ErrorF ("Unable to query/initialize MGT hardware.\n"); + goto SetupProc_fail; } - return ok; + /* this results in an xstrdup that must be freed later */ + pInfo->name = xf86SetStrOption( pInfo->options, "DeviceName", "MGT"); + xf86ProcessCommonOptions(pInfo, pInfo->options); + + pInfo->flags |= XI86_CONFIGURED; + return (pInfo); + + SetupProc_fail: + if ((pInfo) && (pInfo->fd)) + xf86CloseSerial (pInfo->fd); + if ((pInfo) && (pInfo->name)) + xfree (pInfo->name); + + if ((priv) && (priv->buffer)) + XisbFree (priv->buffer); + + if (priv) + xfree (priv); + return (pInfo); } -/* - *********************************************************************** - * - * xf86MagicControl - * - *********************************************************************** - */ static Bool -xf86MagicControl(DeviceIntPtr dev, - int mode) +DeviceControl (DeviceIntPtr dev, int mode) { - LocalDevicePtr local = (LocalDevicePtr) dev->public.devicePrivate; - MagicPrivatePtr priv = (MagicPrivatePtr)(local->private); - unsigned char map[] = { 0, 1 }; - unsigned char req[MAGIC_PACKET_SIZE]; - - switch (mode) { - case DEVICE_INIT: - DBG(2, ErrorF("MagicTouch init...\n") ); - - /* Controlla il numero di schermo selezionato */ - if (priv->screen_no >= screenInfo.numScreens || priv->screen_no<0) - priv->screen_no = 0; - /* Legge le dimensioni dello schermo */ - priv->screen_width = screenInfo.screens[priv->screen_no]->width; - priv->screen_height = screenInfo.screens[priv->screen_no]->height; - - if (InitButtonClassDeviceStruct(dev, 1, map)==FALSE) { - ErrorF("Impossibile allocare ButtonClassDeviceStruct per MagicTouch\n"); + InputInfoPtr pInfo = dev->public.devicePrivate; + MGTPrivatePtr priv = (MGTPrivatePtr) (pInfo->private); + unsigned char map[] = + {0, 1}; + + switch (mode) + { + case DEVICE_INIT: + /* + * these have to be here instead of in the SetupProc, because when the + * SetupProc is run at server startup, screenInfo is not setup yet + */ + priv->screen_width = screenInfo.screens[priv->screen_num]->width; + priv->screen_height = screenInfo.screens[priv->screen_num]->height; + + /* + * Device reports button press for 1 button. + */ + if (InitButtonClassDeviceStruct (dev, 1, map) == FALSE) + { + ErrorF ("Unable to allocate MGT ButtonClassDeviceStruct\n"); return !Success; } - - if (InitFocusClassDeviceStruct(dev)==FALSE) { - ErrorF("Impossibile allocare FocusClassDeviceStruct per MagicTouch\n"); + + /* + * Device reports motions on 2 axes in absolute coordinates. + * Axes min and max values are reported in raw coordinates. + */ + if (InitValuatorClassDeviceStruct (dev, 2, xf86GetMotionEvents, + pInfo->history_size, Absolute) == FALSE) + { + ErrorF ("Unable to allocate MGT ValuatorClassDeviceStruct\n"); return !Success; } - - /* - * Il movimento viene eseguito su due assi in coordinate assolute. - */ - if (InitValuatorClassDeviceStruct(dev, 2, xf86GetMotionEvents, local->history_size, Absolute) == FALSE ) + else + { + InitValuatorAxisStruct (dev, 0, priv->min_x, priv->max_x, + 16384, + 0 /* min_res */ , + 16384 /* max_res */ ); + InitValuatorAxisStruct (dev, 1, priv->min_y, priv->max_y, + 16384, + 0 /* min_res */ , + 16384 /* max_res */ ); + } + + if (InitProximityClassDeviceStruct (dev) == FALSE) { - ErrorF("MagicTouch ValuatorClassDeviceStruct: ERRORE\n"); + ErrorF ("unable to allocate MGT ProximityClassDeviceStruct\n"); return !Success; } - else { - InitValuatorAxisStruct(dev, 0, priv->min_x, priv->max_x, - 9500, - 0, /* min res */ - 9500 /* max res */); - - InitValuatorAxisStruct(dev, 1, priv->min_y, priv->max_y, - 10500, - 0, - 10500); + + if (InitPtrFeedbackClassDeviceStruct(dev, MGTPtrCtrl) == FALSE) + { + ErrorF ("unable to allocate MGT PtrFeedbackClassDeviceStruct\n"); + return !Success; } - - if (InitFocusClassDeviceStruct(dev)==FALSE) { - ErrorF("Impossibile allocare FocusClassDeviceStruct per MagicTouch\n"); + + /* + * Allocate the motion events buffer. + */ + xf86MotionHistoryAllocate (pInfo); + return (Success); + + case DEVICE_ON: + pInfo->fd = xf86OpenSerial(pInfo->options); + if (pInfo->fd == -1) + { + xf86Msg(X_WARNING, "%s: cannot open input device\n", pInfo->name); + return (!Success); + } + else + { + /* we should probably lower and then raise DTR and RTS to make sure + the touchscreen is reset. Seems to work fine without though... */ + + priv->buffer = XisbNew(pInfo->fd, 64); + if (!priv->buffer) + { + xf86CloseSerial(pInfo->fd); + pInfo->fd = -1; + return (!Success); + } + else + { + unsigned char buf[1] = { 'I' }; + + XisbBlockDuration (priv->buffer, 500000); + if ( MGTSendPacket(priv, buf, 1) == Success ) + { + sleep(2); /* touch needs up to 2s delay !!! */ + /* wait for right response */ + priv->lex_mode = MGT_byte0; + if (MGTGetPacket (priv) == Success ) + { + if ( priv->packet[0] == 0xCF ) + { + xf86Msg(X_INFO, "MGT-Touch found\n"); + } + else + { + xf86Msg(X_ERROR, "MGT-Touch not found(bad response)\n"); + return (!Success); + } } - - /* - * Alloca il buffer degli eventi spostamento - */ - xf86MotionHistoryAllocate(local); - - DBG(2, ErrorF("MagicTouch INIT OK\n") ); - - break; /* DEVICE_INIT*/ - - case DEVICE_ON: - DBG(2, ErrorF("MagicTouch ON\n") ); - if (local->fd<0) { - DBG(2, ErrorF("Opening device...\n") ); - - local->fd = xf86OpenSerial(local->options); - if (local->fd<0) { - ErrorF("Impossibile aprire MagicTouch\n"); - return !Success; + else + { + xf86Msg(X_ERROR, "MGT-Touch not found(no response)\n"); + return (!Success); } + } + else + { + xf86Msg(X_ERROR, "MGT-Touch not found(send error)\n"); + return (!Success); + } + } + } - /* Controlla se e' presente il touch controller.*/ - req[0] = 0x00; - if (xf86MagicQueryOK(local->fd)!=Success) { - ErrorF("MagicTouch not present\n"); - close(local->fd); - return !Success; + XisbBlockDuration (priv->buffer, -1); + priv->lex_mode = MGT_byte0; + + xf86FlushInput(pInfo->fd); + AddEnabledDevice (pInfo->fd); + dev->public.on = TRUE; + return (Success); + + case DEVICE_OFF: + case DEVICE_CLOSE: + if (pInfo->fd != -1) + { + RemoveEnabledDevice (pInfo->fd); + if (priv->buffer) + { + XisbFree(priv->buffer); + priv->buffer = NULL; + } + xf86CloseSerial(pInfo->fd); } + dev->public.on = FALSE; + return (Success); + default: + return (BadValue); + } - priv->e_presente = TRUE; - - AddEnabledDevice(local->fd); - dev->public.on = TRUE; - } /* if (local->fd<0) */ - break; /* DEVICE_ON */ - - case DEVICE_CLOSE: - case DEVICE_OFF: - DBG(2, ErrorF("MagicTouch OFF\n") ); - dev->public.on = FALSE; - if (local->fd>=0) - RemoveEnabledDevice(local->fd); - - SYSCALL( close(local->fd) ); - local->fd = -1; - DBG(2, ErrorF("OK\n") ); - break; /* DEVICE_OFF*/ - - default: - ErrorF("unsupported mode %d\n", mode); - return !Success; - } /* switch (mode) */ - - return Success; } - /* - *************************************************************************** - * - * GetPacket -- - * - *************************************************************************** + * The ReadInput function will have to be tailored to your device */ -static Bool -GetPacket(LocalDevicePtr local, unsigned char *buffer, int *n_rx, int fd) +static void +ReadInput (InputInfoPtr pInfo) { - int num_bytes; - int i; - Bool ok; - - DBG(6, ErrorF("Entering GetPacket with packet_pos == %d\n", *n_rx) ); - - SYSCALL( - num_bytes=read(fd, buffer+*n_rx, MAGIC_PACKET_SIZE-*n_rx) - ); - - /* Se e' il primo ingresso nella procedura e ho letto un solo byte, - allora e' arrivato lo 0x0F di risposta all-inizializzazione del - touch controlloer */ - /* Sto gia' leggendo un pacchetto normale */ - *n_rx += num_bytes; - - DBG(8, - for (i=0; i<*n_rx; i++) - ErrorF("%3X", buffer[i]); - ErrorF("\n") - ); - - ok = (*n_rx==MAGIC_PACKET_SIZE ? Success : !Success ); - - if (ok==Success) - *n_rx = 0; - - DBG(6, - if(ok==Success) - ErrorF("GetPacket OK\n"); + MGTPrivatePtr priv = (MGTPrivatePtr) (pInfo->private); + int x,y; + unsigned char opck[ MGT_PACKET_SIZE ]; + + /* + * set blocking to -1 on the first call because we know there is data to + * read. Xisb automatically clears it after one successful read so that + * succeeding reads are preceeded buy a select with a 0 timeout to prevent + * read from blocking indefinately. + */ + XisbBlockDuration (priv->buffer, -1); + while (1) + { + memcpy(opck,priv->packet,5); + + if ( MGTGetPacket (priv) != Success) + break; + + if ( priv->swap_xy) + { + y = priv->packet[1]; + y <<=7; + y |= priv->packet[2]; + x = priv->packet[3]; + x <<=7; + x |= priv->packet[4]; + } else - ErrorF("GetPacket FAIL\n") - ); - - return ok; + { + x = priv->packet[1]; + x <<=7; + x |= priv->packet[2]; + y = priv->packet[3]; + y <<=7; + y |= priv->packet[4]; + } + + if (priv->reporting_mode == TS_Scaled) + { + x = xf86ScaleAxis (x, 0, screenInfo.screens[priv->screen_num]->width, + priv->min_x, + priv->max_x); + y = xf86ScaleAxis (y, 0, screenInfo.screens[priv->screen_num]->height, + priv->min_y, + priv->max_y); + } + + xf86XInputSetScreen (pInfo, priv->screen_num, x, y); + + /* + * Send events. + * + * We *must* generate a motion before a button change if pointer + * location has changed as DIX assumes this. This is why we always + * emit a motion, regardless of the kind of packet processed. + */ + + xf86PostMotionEvent (pInfo->dev, TRUE, 0, 2, x, y); + + /* + * Emit a touch or release. (button click) + */ + if ((priv->button_down == FALSE) && (priv->packet[0] & MGT_TOUCH)) + + { + xf86PostButtonEvent (pInfo->dev, TRUE, + priv->button_number, 1, 0, 2, x, y); + priv->button_down = TRUE; + } + if ((priv->button_down == TRUE) && !(priv->packet[0] & MGT_TOUCH)) + { + xf86PostButtonEvent (pInfo->dev, TRUE, + priv->button_number, 0, 0, 2, x, y); + priv->button_down = FALSE; + } + } } /* - ************************************************************************ - * - * xf86MagicReadInput - * - ************************************************************************ + * The ControlProc function may need to be tailored for your device */ -static -int medie_x(LocalDevicePtr local, int x) +static int +ControlProc (InputInfoPtr pInfo, xDeviceCtl * control) { - int i,res; - float medie; - MagicPrivatePtr priv = (MagicPrivatePtr)(local->private); - - DBG(6, - ErrorF("Medie in X = %d\n", priv->num_medie_x) - ); - - if (priv->first_x) { - priv->first_x = FALSE; - for (i=0; inum_medie_x; i++) - priv->buf_x[i] = x; - - res = x; - } - else { - priv->buf_x[priv->i_x] = x; - priv->i_x++; - if (priv->i_x>=priv->num_medie_x) - priv->i_x = 0; - - medie = 0.0; - for (i=0; inum_medie_x; i++) - medie += priv->buf_x[i]; - - res = (int)(medie/priv->num_medie_x); - } - - return res; -} + xDeviceTSCalibrationCtl *c = (xDeviceTSCalibrationCtl *) control; + MGTPrivatePtr priv = (MGTPrivatePtr) (pInfo->private); -static -int medie_y(LocalDevicePtr local, int y) -{ - int i,res; - float medie; - MagicPrivatePtr priv = (MagicPrivatePtr)(local->private); - - DBG(6, - ErrorF("Medie in Y = %d\n", priv->num_medie_y) - ); - - if (priv->first_y) { - priv->first_y = FALSE; - for (i=0; inum_medie_y; i++) - priv->buf_y[i] = y; - - res = y; - } - else { - priv->buf_y[priv->i_y] = y; - priv->i_y++; - if (priv->i_y>=priv->num_medie_y) - priv->i_y = 0; - - medie = 0.0; - for (i=0; inum_medie_y; i++) - medie += priv->buf_y[i]; - - res = (int)(medie/priv->num_medie_y); - } - - return res; + priv->min_x = c->min_x; + priv->max_x = c->max_x; + priv->min_y = c->min_y; + priv->max_y = c->max_y; + + return (Success); } /* -static -int MAX(int x, int y) + * the CloseProc should not need to be tailored to your device + */ +static void +CloseProc (InputInfoPtr pInfo) { - return (x>=y ? x : y); + } -*/ -#define MAX(x,y) (x>=y ? x : y) - -static void -xf86MagicReadInput(LocalDevicePtr local) +/* + * The SwitchMode function may need to be tailored for your device + */ +static int +SwitchMode (ClientPtr client, DeviceIntPtr dev, int mode) { - MagicPrivatePtr priv = (MagicPrivatePtr)(local->private); - int cur_x, cur_y; - Bool touch_now; - int x, y; - - if (!priv->e_presente) { - DBG(4, - ErrorF("ReadInput: Touch Controller non inizializzato\n") - ); - return; - } - - DBG(4, ErrorF("Entering ReadInput\n")); - /* - * Try to get a packet. - */ - if (GetPacket(local, priv->packet_buf, &priv->packet_pos, local->fd)==Success) - { - /* Calculate the (x,y) coord of pointer */ - cur_x = priv->packet_buf[1]; - cur_x <<= 6; - cur_x |= priv->packet_buf[2]; - - cur_y = priv->packet_buf[3]; - cur_y <<= 6; - cur_y |= priv->packet_buf[4]; - - touch_now = ((priv->packet_buf[0] & MGCT_TOUCH) == MGCT_TOUCH); - - /* Se c'e' pressione sul touch inizio a calcolare la posizione - e a spostare il cursore grafico */ - if (touch_now) { - DBG(6, - ErrorF("Touch premuto: medio i valori di posizione\n") - ); - cur_x = medie_x(local, cur_x); - cur_y = medie_y(local, cur_y); - } - else { - DBG(6, - ErrorF("Touch rilasciato:\n" - "\tazzeramento buffer memoria\n" - "\tposizionamento immediato\n") - ); - - /* Se non ho pressione allora comando lo spostamento - del cursore senza mediare. Svuoto il buffer delle medie */ - priv->first_x = TRUE; - priv->first_y = TRUE; - } + InputInfoPtr pInfo = dev->public.devicePrivate; + MGTPrivatePtr priv = (MGTPrivatePtr) (pInfo->private); - xf86MagicConvert(local, 0, 2, cur_x, cur_y, 0, 0, 0, 0, - &x, &y); - xf86XInputSetScreen(local, priv->screen_no, x, y); - - /* Comando lo spostamento */ - xf86PostMotionEvent(local->dev, TRUE, 0, 2, cur_x, cur_y); - /* comanda la pressione del tasto */ - - DBG(9, - ErrorF("touch_now==%s\n", (touch_now==TRUE ? "TRUE" : "FALSE") ) - ); - if (touch_now!=priv->click_on) { - DBG(9, - ErrorF("Bottone == %s\n", (touch_now==TRUE ? "PREMUTO" : "RILASCAITO") ) - ); - priv->click_on = touch_now; - xf86PostButtonEvent(local->dev, TRUE, 1, touch_now, 0, 2, cur_x, cur_y); - } - } /* GetPacket */ -} + if ((mode == TS_Raw) || (mode == TS_Scaled)) + { + priv->reporting_mode = mode; + return (Success); + } + else if ((mode == SendCoreEvents) || (mode == DontSendCoreEvents)) + { + xf86XInputSetSendCoreEvents (pInfo, (mode == SendCoreEvents)); + return (Success); + } + else + return (!Success); +} /* - ************************************************************************ - * - * xf86MagicConvert - * - ************************************************************************ + * The ConvertProc function may need to be tailored for your device. + * This function converts the device's valuator outputs to x and y coordinates + * to simulate mouse events. */ static Bool -xf86MagicConvert(LocalDevicePtr local, - int first, - int num, - int v0, - int v1, - int v2, - int v3, - int v4, - int v5, - int *x, - int *y) -{ - MagicPrivatePtr priv = (MagicPrivatePtr) local->private; - int width = priv->max_x - priv->min_x; - int height = priv->max_y - priv->min_y; - int input_x, input_y; - - if (first != 0 || num != 2) { - return FALSE; - } - - DBG(3, ErrorF("MagicConvert: v0(%d), v1(%d)\n", v0, v1)); - - if (priv->swap_axes) { - input_x = v1; - input_y = v0; - } - else { - input_x = v0; - input_y = v1; - } - *x = (priv->screen_width * (input_x - priv->min_x)) / width; - *y = (priv->screen_height - (priv->screen_height * (input_y - priv->min_y)) / height); - - DBG(3, ErrorF("MagicConvert: x(%d), y(%d)\n", *x, *y)); +ConvertProc (InputInfoPtr pInfo, + int first, + int num, + int v0, + int v1, + int v2, + int v3, + int v4, + int v5, + int *x, + int *y) +{ + MGTPrivatePtr priv = (MGTPrivatePtr) (pInfo->private); - return TRUE; + if (priv->reporting_mode == TS_Raw) + { + *x = xf86ScaleAxis (v0, 0, priv->screen_width, priv->min_x, + priv->max_x); + *y = xf86ScaleAxis (v1, 0, priv->screen_height, priv->min_y, + priv->max_y); + } + else + { + *x = v0; + *y = v1; + } + return (TRUE); } +/* + * the QueryHardware fuction should be tailored to your device to + * verify the device is attached and functional and perform any + * needed initialization. + */ +static Bool +QueryHardware (MGTPrivatePtr priv) +{ + /* Maybe once we get the hardware to actually respond correctly to its + configuration 'packets' */ + return Success; +} /* - ************************************************************************ - * - * xf86MagicAllocate - * - ************************************************************************ + * This function should be renamed for your device and tailored to handle + * your device's protocol. */ -static LocalDevicePtr -xf86MagicAllocate(void) +static Bool +MGTGetPacket (MGTPrivatePtr priv) { - LocalDevicePtr local = xalloc(sizeof(LocalDeviceRec)); + int count = 0; + int c; - MagicPrivatePtr priv = (MagicPrivatePtr) xalloc( sizeof(MagicPrivateRec) ); + while ((c = XisbRead (priv->buffer)) >= 0) + { + /* + * fail after 500 bytes so the server doesn't hang forever if a + * device sends bad data. + */ + if (count++ > 500) + return (!Success); + + switch (priv->lex_mode) + { + case MGT_byte0: + priv->packet[0] = (unsigned char) c; + priv->lex_mode = MGT_byte1; + break; + + case MGT_byte1: + priv->packet[1] = (unsigned char) c; + priv->lex_mode = MGT_byte2; + break; + + case MGT_byte2: + priv->packet[2] = (unsigned char) c; + priv->lex_mode = MGT_byte3; + break; + + case MGT_byte3: + priv->packet[3] = (unsigned char) c; + priv->lex_mode = MGT_byte4; + break; + + case MGT_byte4: + priv->packet[4] = (unsigned char) c; + priv->lex_mode = MGT_byte0; + return (Success); + break; + + case MGT_Response0: + priv->packet[0] = (unsigned char) c; + return (Success); + break; - /* Controlla la corretta allocazione di buffers. Se uno dei buffers non - e' stato allocato correttamente termina l'inizializzazione - */ - if (!local) { - if (priv) - xfree(priv); - return NULL; + } } - - if (!priv) { - if (local) - xfree(local); - return NULL; + return (!Success); +} + +static Bool +MGTSendPacket (MGTPrivatePtr priv, unsigned char *buf, int len) +{ + int count = 0; + + while ( len > 0 ) + { + if ( XisbWrite(priv->buffer, buf, 1) == 1 ) + { + buf++; + len--; + continue; + } + if ( count++ > 500 ) + break; } - - /* I buffers sono allocati correttamente */ - priv->input_dev = strdup(MAGIC_PORT); - - priv->min_x = 60; - priv->max_x = 960; - priv->min_y = 60; - priv->max_y = 960; - priv->screen_no = 0; - priv->screen_width = -1; - priv->screen_height = -1; - priv->swap_axes = 0; - priv->first_x = - priv->first_y = TRUE; - priv->first_entry = TRUE; - priv->e_presente = FALSE; - priv->click_on = FALSE; - priv->i_x = - priv->i_y = 0; - priv->packet_pos = 0; - bzero(priv->buf_x, MEDIE_X); - bzero(priv->buf_y, MEDIE_Y); - priv->num_medie_x = MEDIE_X; - priv->num_medie_y = MEDIE_Y; - - local->name = XI_TOUCHSCREEN; - local->flags = 0; - local->device_control = xf86MagicControl; - local->read_input = xf86MagicReadInput; - local->control_proc = NULL; - local->close_proc = NULL; - local->switch_mode = NULL; - local->conversion_proc = xf86MagicConvert; - local->reverse_conversion_proc = NULL; - local->fd = -1; - local->atom = 0; - local->dev = NULL; - local->private = priv; - local->type_name = "MagicTouch"; - local->history_size = 0; - - return local; - -} /* xf86MagicAllocae */ + return (len ? !Success : Success); +} +static void +MGTPtrCtrl(DeviceIntPtr device, PtrCtrl *ctrl) +{ + /* I have no clue what this does, except that registering it stops the + X server segfaulting in ProcGetPointerMapping() + Ho Hum. + */ +} Index: xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.h:1.1 --- /dev/null Tue May 9 21:57:15 2006 +++ xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.h Fri Jun 10 22:40:55 2005 @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2005 Bruno Schwander + * Author: Bruno Schwander + * Template driver used: dmc: + * + * Copyright (c) 1999 Machine Vision Holdings Incorporated + * Author: Mayk Langer + * + * Template driver used: Copyright (c) 1998 Metro Link Incorporated + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE X CONSORTIUM BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/magictouch/xf86MagicTouch.h,v 1.1 2005/06/11 02:40:55 dawes Exp $ */ + +#ifndef _MGT_H_ +#define _MGT_H_ + +#define MGT_PACKET_SIZE 5 +#define MGT_TOUCH 0x40 + +typedef enum +{ + MGT_byte0, MGT_byte1, MGT_byte2, MGT_byte3, MGT_byte4, + MGT_Response0 +} +MGTState; + +typedef struct _MGTPrivateRec +{ + int min_x; /* Minimum x reported by calibration */ + int max_x; /* Maximum x */ + int min_y; /* Minimum y reported by calibration */ + int max_y; /* Maximum y */ + Bool button_down; /* is the "button" currently down */ + int button_number; /* which button to report */ + int reporting_mode; /* MGT_stream or MGT_point */ + + int screen_num; /* Screen associated with the device */ + int screen_width; /* Width of the associated X screen */ + int screen_height; /* Height of the screen */ + int proximity; + int swap_xy; + + XISBuffer *buffer; + unsigned char packet[MGT_PACKET_SIZE]; /* packet being/just read */ + MGTState lex_mode; + char pen_down; +} +MGTPrivateRec, *MGTPrivatePtr; + +/****************************************************************************** + * Declarations + *****************************************************************************/ + +static Bool DeviceControl (DeviceIntPtr, int); +static void ReadInput (InputInfoPtr); +static int ControlProc (InputInfoPtr, xDeviceCtl *); +static void CloseProc (InputInfoPtr); +static int SwitchMode (ClientPtr, DeviceIntPtr, int); +static Bool ConvertProc (InputInfoPtr, int, int, int, int, int, int, int, int, int *, int *); +static Bool QueryHardware (MGTPrivatePtr); +static Bool MGTGetPacket (MGTPrivatePtr priv); +static Bool MGTSendPacket (MGTPrivatePtr priv, unsigned char *buf, int len ); + +static InputInfoPtr +MGTPreInit(InputDriverPtr drv, IDevPtr dev, int flags); + +static void +MGTPtrCtrl(DeviceIntPtr device, PtrCtrl *ctrl); + + +#endif /* _MGT_H_ */ Index: xc/programs/Xserver/hw/xfree86/input/microtouch/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/microtouch/Imakefile:1.8 xc/programs/Xserver/hw/xfree86/input/microtouch/Imakefile:1.9 --- xc/programs/Xserver/hw/xfree86/input/microtouch/Imakefile:1.8 Mon May 31 20:17:05 2004 +++ xc/programs/Xserver/hw/xfree86/input/microtouch/Imakefile Fri Oct 14 11:16:56 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/microtouch/Imakefile,v 1.8 2004/06/01 00:17:05 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/microtouch/Imakefile,v 1.9 2005/10/14 15:16:56 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,7 @@ DRIVER = microtouch -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/microtouch/microtouch.c diff -u xc/programs/Xserver/hw/xfree86/input/microtouch/microtouch.c:1.12 xc/programs/Xserver/hw/xfree86/input/microtouch/microtouch.c:1.13 --- xc/programs/Xserver/hw/xfree86/input/microtouch/microtouch.c:1.12 Fri Aug 11 15:10:45 2000 +++ xc/programs/Xserver/hw/xfree86/input/microtouch/microtouch.c Thu Mar 16 11:50:31 2006 @@ -48,7 +48,7 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/microtouch/microtouch.c,v 1.12 2000/08/11 19:10:45 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/microtouch/microtouch.c,v 1.13 2006/03/16 16:50:31 dawes Exp $ */ #define _microtouch_C_ /***************************************************************************** @@ -162,8 +162,10 @@ NULL }; +static MODULESETUPPROTO(SetupProc); + static pointer -SetupProc( pointer module, +SetupProc( ModuleDescPtr module, pointer options, int *errmaj, int *errmin ) Index: xc/programs/Xserver/hw/xfree86/input/mouse/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/mouse/Imakefile:1.7 xc/programs/Xserver/hw/xfree86/input/mouse/Imakefile:1.8 --- xc/programs/Xserver/hw/xfree86/input/mouse/Imakefile:1.7 Mon May 31 20:17:05 2004 +++ xc/programs/Xserver/hw/xfree86/input/mouse/Imakefile Fri Oct 14 11:16:56 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/Imakefile,v 1.7 2004/06/01 00:17:05 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/Imakefile,v 1.8 2005/10/14 15:16:56 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,9 +54,8 @@ DRIVER = mouse -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/mi -I$(SERVERSRC)/include -I$(XINCLUDESRC) \ - -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/mi -I$(SERVERSRC)/include DEFINES = -DPNP_MOUSE Index: xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c diff -u xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c:1.84 xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c:1.86 --- xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c:1.84 Thu Jan 27 17:24:08 2005 +++ xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c Thu Mar 16 11:50:31 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c,v 1.84 2005/01/27 22:24:08 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c,v 1.86 2006/03/16 16:50:31 dawes Exp $ */ /* * * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany. @@ -90,14 +90,14 @@ */ #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "xf86.h" #ifdef XINPUT -#include "XI.h" -#include "XIproto.h" +#include +#include #include "extnsionst.h" #include "extinit.h" #else @@ -3585,12 +3585,17 @@ MouseAvailableOptions, }; +static MODULETEARDOWNPROTO(xf86MouseUnplug); + static void xf86MouseUnplug(pointer p) { } + +static MODULESETUPPROTO(xf86MousePlug); + static pointer -xf86MousePlug(pointer module, +xf86MousePlug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) Index: xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c diff -u xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c:1.22 xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c:1.23 --- xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c:1.22 Mon May 31 21:30:22 2004 +++ xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c Fri Oct 14 11:16:57 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c,v 1.22 2004/06/01 01:30:22 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/pnp.c,v 1.23 2005/10/14 15:16:57 tsi Exp $ */ /* * Copyright 1998 by Kazutaka YOKOTA * @@ -22,8 +22,8 @@ */ #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "inputstr.h" #include "scrnintstr.h" #include "xf86.h" Index: xc/programs/Xserver/hw/xfree86/input/mutouch/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/mutouch/Imakefile:1.6 xc/programs/Xserver/hw/xfree86/input/mutouch/Imakefile:1.7 --- xc/programs/Xserver/hw/xfree86/input/mutouch/Imakefile:1.6 Mon May 31 20:17:05 2004 +++ xc/programs/Xserver/hw/xfree86/input/mutouch/Imakefile Fri Oct 14 11:16:57 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/mutouch/Imakefile,v 1.6 2004/06/01 00:17:05 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/mutouch/Imakefile,v 1.7 2005/10/14 15:16:57 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,8 @@ DRIVER = mutouch -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(SERVERSRC)/mi #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/mutouch/xf86MuTouch.c diff -u xc/programs/Xserver/hw/xfree86/input/mutouch/xf86MuTouch.c:1.16 xc/programs/Xserver/hw/xfree86/input/mutouch/xf86MuTouch.c:1.17 --- xc/programs/Xserver/hw/xfree86/input/mutouch/xf86MuTouch.c:1.16 Mon Apr 26 18:48:21 2004 +++ xc/programs/Xserver/hw/xfree86/input/mutouch/xf86MuTouch.c Thu Mar 16 11:50:32 2006 @@ -21,7 +21,7 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/mutouch/xf86MuTouch.c,v 1.16 2004/04/26 22:48:21 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/mutouch/xf86MuTouch.c,v 1.17 2006/03/16 16:50:32 dawes Exp $ */ /* ******************************************************************************* @@ -1299,8 +1299,10 @@ }; #ifdef XFree86LOADER +static MODULESETUPPROTO(Plug); + static pointer -Plug(pointer module, +Plug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) @@ -1310,6 +1312,8 @@ return module; } +static MODULETEARDOWNPROTO(Unplug); + static void Unplug(pointer p) { Index: xc/programs/Xserver/hw/xfree86/input/palmax/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/palmax/Imakefile:1.3 xc/programs/Xserver/hw/xfree86/input/palmax/Imakefile:1.4 --- xc/programs/Xserver/hw/xfree86/input/palmax/Imakefile:1.3 Mon May 31 20:17:05 2004 +++ xc/programs/Xserver/hw/xfree86/input/palmax/Imakefile Fri Oct 14 11:16:57 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/palmax/Imakefile,v 1.3 2004/06/01 00:17:05 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/palmax/Imakefile,v 1.4 2005/10/14 15:16:57 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,8 @@ DRIVER = palmax -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(SERVERSRC)/mi #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/palmax/xf86Palmax.c diff -u xc/programs/Xserver/hw/xfree86/input/palmax/xf86Palmax.c:1.3 xc/programs/Xserver/hw/xfree86/input/palmax/xf86Palmax.c:1.4 --- xc/programs/Xserver/hw/xfree86/input/palmax/xf86Palmax.c:1.3 Mon Apr 26 18:26:11 2004 +++ xc/programs/Xserver/hw/xfree86/input/palmax/xf86Palmax.c Thu Mar 16 11:50:32 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/palmax/xf86Palmax.c,v 1.3 2004/04/26 22:26:11 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/palmax/xf86Palmax.c,v 1.4 2006/03/16 16:50:32 dawes Exp $ */ #include "misc.h" #include "xf86.h" @@ -788,13 +788,16 @@ }; #ifdef XFree86LOADER -static pointer Plug(pointer module, pointer options, int *errmaj,int *errmin) +static MODULESETUPPROTO(Plug); + +static pointer Plug(ModuleDescPtr module, pointer options, int *errmaj,int *errmin) { xf86LoaderReqSymLists(reqSymbols, NULL); xf86AddInputDriver(&PALMAX, module, 0); return module; } +static MODULETEARDOWNPROTO(Unplug); static void Unplug(pointer p) { } Index: xc/programs/Xserver/hw/xfree86/input/penmount/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/penmount/Imakefile:1.5 xc/programs/Xserver/hw/xfree86/input/penmount/Imakefile:1.6 --- xc/programs/Xserver/hw/xfree86/input/penmount/Imakefile:1.5 Mon May 31 20:17:05 2004 +++ xc/programs/Xserver/hw/xfree86/input/penmount/Imakefile Fri Oct 14 11:16:57 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/penmount/Imakefile,v 1.5 2004/06/01 00:17:05 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/penmount/Imakefile,v 1.6 2005/10/14 15:16:57 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,7 @@ DRIVER = penmount -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/penmount/xf86PM.c diff -u xc/programs/Xserver/hw/xfree86/input/penmount/xf86PM.c:1.4 xc/programs/Xserver/hw/xfree86/input/penmount/xf86PM.c:1.5 --- xc/programs/Xserver/hw/xfree86/input/penmount/xf86PM.c:1.4 Sat Oct 23 11:29:31 2004 +++ xc/programs/Xserver/hw/xfree86/input/penmount/xf86PM.c Thu Mar 16 11:50:32 2006 @@ -28,7 +28,7 @@ * in this Software without prior written authorization from Metro Link. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/penmount/xf86PM.c,v 1.4 2004/10/23 15:29:31 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/penmount/xf86PM.c,v 1.5 2006/03/16 16:50:32 dawes Exp $ */ #define _PENMOUNT_C_ @@ -116,9 +116,10 @@ NULL }; +static MODULESETUPPROTO(PenMountSetupProc); static pointer -PenMountSetupProc( pointer module, +PenMountSetupProc( ModuleDescPtr module, pointer options, int *errmaj, int *errmin ) Index: xc/programs/Xserver/hw/xfree86/input/sample/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/sample/Imakefile:1.7 xc/programs/Xserver/hw/xfree86/input/sample/Imakefile:1.8 --- xc/programs/Xserver/hw/xfree86/input/sample/Imakefile:1.7 Thu Mar 18 02:07:04 2004 +++ xc/programs/Xserver/hw/xfree86/input/sample/Imakefile Fri Oct 14 11:16:57 2005 @@ -3,7 +3,7 @@ * WHEN WRITING A NEW INPUT DRIVER. */ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/sample/Imakefile,v 1.7 2004/03/18 07:07:04 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/sample/Imakefile,v 1.8 2005/10/14 15:16:57 tsi Exp $ #define IHaveModules #include @@ -13,8 +13,7 @@ DRIVER = sample -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/spaceorb/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/spaceorb/Imakefile:1.6 xc/programs/Xserver/hw/xfree86/input/spaceorb/Imakefile:1.7 --- xc/programs/Xserver/hw/xfree86/input/spaceorb/Imakefile:1.6 Mon May 31 20:17:05 2004 +++ xc/programs/Xserver/hw/xfree86/input/spaceorb/Imakefile Fri Oct 14 11:16:57 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/spaceorb/Imakefile,v 1.6 2004/06/01 00:17:05 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/spaceorb/Imakefile,v 1.7 2005/10/14 15:16:57 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,7 @@ DRIVER = spaceorb -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/spaceorb/spaceorb.c diff -u xc/programs/Xserver/hw/xfree86/input/spaceorb/spaceorb.c:1.13 xc/programs/Xserver/hw/xfree86/input/spaceorb/spaceorb.c:1.14 --- xc/programs/Xserver/hw/xfree86/input/spaceorb/spaceorb.c:1.13 Mon Nov 26 11:25:54 2001 +++ xc/programs/Xserver/hw/xfree86/input/spaceorb/spaceorb.c Thu Mar 16 11:50:32 2006 @@ -24,7 +24,7 @@ * in this Software without prior written authorization from Metro Link. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/spaceorb/spaceorb.c,v 1.13 2001/11/26 16:25:54 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/spaceorb/spaceorb.c,v 1.14 2006/03/16 16:50:32 dawes Exp $ */ #define _SPACEORB_C_ /***************************************************************************** @@ -125,7 +125,7 @@ }; static pointer -SPACEORBSetupProc(pointer module, +SPACEORBSetupProc(ModuleDescPtr module, pointer options, int *errmaj, int *errmin ) { Index: xc/programs/Xserver/hw/xfree86/input/summa/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/summa/Imakefile:1.7 xc/programs/Xserver/hw/xfree86/input/summa/Imakefile:1.8 --- xc/programs/Xserver/hw/xfree86/input/summa/Imakefile:1.7 Mon May 31 20:17:05 2004 +++ xc/programs/Xserver/hw/xfree86/input/summa/Imakefile Fri Oct 14 11:16:57 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/summa/Imakefile,v 1.7 2004/06/01 00:17:05 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/summa/Imakefile,v 1.8 2005/10/14 15:16:57 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,8 @@ DRIVER = summa -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/mi -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/mi -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c diff -u xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c:1.19 xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c:1.21 --- xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c:1.19 Sat Oct 23 11:29:31 2004 +++ xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c Thu Mar 16 11:50:33 2006 @@ -24,7 +24,7 @@ * PERFORMANCE OF THIS SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c,v 1.19 2004/10/23 15:29:31 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/summa/xf86Summa.c,v 1.21 2006/03/16 16:50:33 dawes Exp $ */ #ifndef XFree86LOADER #include @@ -41,7 +41,7 @@ #include "xf86_OSproc.h" #include "xf86Xinput.h" #include "exevents.h" /* Needed for InitValuator/Proximity stuff */ -#include "keysym.h" +#include #include "mipointer.h" #include "xf86Module.h" @@ -1134,6 +1134,8 @@ * * called when the module subsection is found in XF86Config */ +static MODULETEARDOWNPROTO(xf86SumUnplug); + static void xf86SumUnplug(pointer p) { @@ -1144,8 +1146,10 @@ * * called when the module subsection is found in XF86Config */ +static MODULESETUPPROTO(xf86SumPlug); + static pointer -xf86SumPlug(pointer module, +xf86SumPlug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) Index: xc/programs/Xserver/hw/xfree86/input/tek4957/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/tek4957/Imakefile:1.3 xc/programs/Xserver/hw/xfree86/input/tek4957/Imakefile:1.4 --- xc/programs/Xserver/hw/xfree86/input/tek4957/Imakefile:1.3 Mon May 31 20:17:05 2004 +++ xc/programs/Xserver/hw/xfree86/input/tek4957/Imakefile Fri Oct 14 11:16:58 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/tek4957/Imakefile,v 1.3 2004/06/01 00:17:05 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/tek4957/Imakefile,v 1.4 2005/10/14 15:16:58 tsi Exp $ */ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,8 @@ DRIVER = tek4957 -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/mi -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/mi -I$(SERVERSRC)/include #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/tek4957/xf86Tek4957.c diff -u xc/programs/Xserver/hw/xfree86/input/tek4957/xf86Tek4957.c:1.3 xc/programs/Xserver/hw/xfree86/input/tek4957/xf86Tek4957.c:1.5 --- xc/programs/Xserver/hw/xfree86/input/tek4957/xf86Tek4957.c:1.3 Sat Oct 23 11:29:31 2004 +++ xc/programs/Xserver/hw/xfree86/input/tek4957/xf86Tek4957.c Thu Mar 16 11:50:33 2006 @@ -21,7 +21,7 @@ * TORTIOUS ACTIONS, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/tek4957/xf86Tek4957.c,v 1.3 2004/10/23 15:29:31 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/tek4957/xf86Tek4957.c,v 1.5 2006/03/16 16:50:33 dawes Exp $ */ #ifndef XFree86LOADER #include @@ -38,7 +38,7 @@ #include "xf86_OSproc.h" #include "xf86Xinput.h" #include "exevents.h" -#include "keysym.h" +#include #include "mipointer.h" #include "xf86Module.h" @@ -728,6 +728,8 @@ * * called when the module subsection is found in XF86Config */ +static MODULETEARDOWNPROTO(TekUnplug); + static void TekUnplug(pointer p) { @@ -738,8 +740,10 @@ * * called when the module subsection is found in XF86Config */ +static MODULESETUPPROTO(TekPlug); + static pointer -TekPlug(pointer module, +TekPlug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) Index: xc/programs/Xserver/hw/xfree86/input/ur98/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/ur98/Imakefile:1.3 xc/programs/Xserver/hw/xfree86/input/ur98/Imakefile:1.4 --- xc/programs/Xserver/hw/xfree86/input/ur98/Imakefile:1.3 Mon May 31 20:17:05 2004 +++ xc/programs/Xserver/hw/xfree86/input/ur98/Imakefile Fri Oct 14 11:16:58 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/ur98/Imakefile,v 1.3 2004/06/01 00:17:05 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/ur98/Imakefile,v 1.4 2005/10/14 15:16:58 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,8 @@ DRIVER = ur98 -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(SERVERSRC)/mi #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/ur98/ur98.man diff -u xc/programs/Xserver/hw/xfree86/input/ur98/ur98.man:1.1 xc/programs/Xserver/hw/xfree86/input/ur98/ur98.man:1.2 --- xc/programs/Xserver/hw/xfree86/input/ur98/ur98.man:1.1 Thu Nov 21 22:49:15 2002 +++ xc/programs/Xserver/hw/xfree86/input/ur98/ur98.man Sun Feb 26 20:57:12 2006 @@ -1,4 +1,4 @@ -.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/ur98/ur98.man,v 1.1 2002/11/22 03:49:15 dawes Exp $ +.\" $XFree86: xc/programs/Xserver/hw/xfree86/input/ur98/ur98.man,v 1.2 2006/02/27 01:57:12 dawes Exp $ .\" shorthand for double quote that works everywhere. .ds q \N'34' .TH UR98 __drivermansuffix__ __vendorversion__ @@ -113,7 +113,7 @@ The hardware or kernel driver has some idiosyncracies. Notably on kernel initialization the interface occasionally gets into a state where the readings rapidly cycle left-right-left-right or top-bottom-top-bottom. -In those cases it seems to be neccessary to unload the driver, unplug, +In those cases it seems to be necessary to unload the driver, unplug, replug and reload the joystick drivers. Once it initializes sanely it remains sane. .PP Index: xc/programs/Xserver/hw/xfree86/input/ur98/xf86Ur-98.c diff -u xc/programs/Xserver/hw/xfree86/input/ur98/xf86Ur-98.c:1.2 xc/programs/Xserver/hw/xfree86/input/ur98/xf86Ur-98.c:1.3 --- xc/programs/Xserver/hw/xfree86/input/ur98/xf86Ur-98.c:1.2 Mon Dec 22 12:48:10 2003 +++ xc/programs/Xserver/hw/xfree86/input/ur98/xf86Ur-98.c Thu Mar 16 11:50:33 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/ur98/xf86Ur-98.c,v 1.2 2003/12/22 17:48:10 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/ur98/xf86Ur-98.c,v 1.3 2006/03/16 16:50:33 dawes Exp $ */ #include #include @@ -687,13 +687,17 @@ }; #ifdef XFree86LOADER -static pointer Plug(pointer module, pointer options, int *errmaj,int *errmin) +static MODULESETUPPROTO(Plug); + +static pointer Plug(ModuleDescPtr module, pointer options, int *errmaj,int *errmin) { xf86LoaderReqSymLists(reqSymbols, NULL); xf86AddInputDriver(&UR98, module, 0); return module; } +static MODULETEARDOWNPROTO(Unplug); + static void Unplug(pointer p) { } Index: xc/programs/Xserver/hw/xfree86/input/void/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/void/Imakefile:1.5 xc/programs/Xserver/hw/xfree86/input/void/Imakefile:1.6 --- xc/programs/Xserver/hw/xfree86/input/void/Imakefile:1.5 Mon May 31 20:17:05 2004 +++ xc/programs/Xserver/hw/xfree86/input/void/Imakefile Fri Oct 14 11:16:58 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/void/Imakefile,v 1.5 2004/06/01 00:17:05 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/void/Imakefile,v 1.6 2005/10/14 15:16:58 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -54,8 +54,8 @@ DRIVER = void -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(SERVERSRC)/mi #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/void/void.c diff -u xc/programs/Xserver/hw/xfree86/input/void/void.c:1.3 xc/programs/Xserver/hw/xfree86/input/void/void.c:1.5 --- xc/programs/Xserver/hw/xfree86/input/void/void.c:1.3 Mon Apr 26 18:26:11 2004 +++ xc/programs/Xserver/hw/xfree86/input/void/void.c Thu Mar 16 11:50:33 2006 @@ -21,7 +21,7 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/void/void.c,v 1.3 2004/04/26 22:26:11 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/void/void.c,v 1.5 2006/03/16 16:50:33 dawes Exp $ */ /* Input device which doesn't output any event. This device can be used * as a core pointer or as a core keyboard. @@ -41,7 +41,7 @@ #include #include #include /* Needed for InitValuator/Proximity stuff */ -#include +#include #include #include @@ -235,6 +235,8 @@ * * called when the module subsection is found in XF86Config */ +static MODULETEARDOWNPROTO(xf86VoidUnplug); + static void xf86VoidUnplug(pointer p) { @@ -245,8 +247,10 @@ * * called when the module subsection is found in XF86Config */ +static MODULESETUPPROTO(xf86VoidPlug); + static pointer -xf86VoidPlug(pointer module, +xf86VoidPlug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) Index: xc/programs/Xserver/hw/xfree86/input/wacom/Imakefile diff -u xc/programs/Xserver/hw/xfree86/input/wacom/Imakefile:1.10 xc/programs/Xserver/hw/xfree86/input/wacom/Imakefile:1.11 --- xc/programs/Xserver/hw/xfree86/input/wacom/Imakefile:1.10 Mon May 31 20:17:05 2004 +++ xc/programs/Xserver/hw/xfree86/input/wacom/Imakefile Fri Oct 14 11:16:58 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/wacom/Imakefile,v 1.10 2004/06/01 00:17:05 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/input/wacom/Imakefile,v 1.11 2005/10/14 15:16:58 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -58,8 +58,8 @@ DRIVER = wacom -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/loader -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(SERVERSRC)/mi #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c diff -u xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c:1.47 xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c:1.51 --- xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c:1.47 Sat Oct 23 11:29:31 2004 +++ xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c Thu Mar 16 11:50:33 2006 @@ -1,4 +1,4 @@ -/* $XConsortium: xf86Wacom.c /main/20 1996/10/27 11:05:20 kaleb $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c,v 1.51 2006/03/16 16:50:33 dawes Exp $ */ /* * Copyright 1995-2001 by Frederic Lepied, France. * @@ -22,8 +22,6 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/input/wacom/xf86Wacom.c,v 1.47 2004/10/23 15:29:31 dawes Exp $ */ - /* * This driver is only able to handle the Wacom IV and Wacom V protocols. * @@ -88,7 +86,7 @@ #include "xf86_OSproc.h" #include "xf86Xinput.h" #include "exevents.h" /* Needed for InitValuator/Proximity stuff */ -#include "keysym.h" +#include #include "mipointer.h" #include "xf86Module.h" @@ -2769,8 +2767,7 @@ if (first != 0 || num == 1) return FALSE; -#ifdef PANORAMIX - if (!noPanoramiXExtension && (priv->flags & ABSOLUTE_FLAG) && + if (IsXineramaActive() && (priv->flags & ABSOLUTE_FLAG) && priv->common->wcmGimp) { int i, totalWidth, leftPadding = 0; for (i = 0; i < priv->currentScreen; i++) @@ -2780,7 +2777,7 @@ v0 -= (priv->bottomX - priv->topX) * leftPadding / (double)totalWidth + 0.5; } -#endif + if (priv->twinview != TV_NONE && (priv->flags & ABSOLUTE_FLAG)) { v0 -= priv->topX; v1 -= priv->topY; @@ -2863,8 +2860,7 @@ valuators[0] = x / priv->factorX + 0.5; valuators[1] = y / priv->factorY + 0.5; -#ifdef PANORAMIX - if (!noPanoramiXExtension && (priv->flags & ABSOLUTE_FLAG) && + if (IsXineramaActive() && (priv->flags & ABSOLUTE_FLAG) && priv->common->wcmGimp) { int i, totalWidth, leftPadding = 0; for (i = 0; i < priv->currentScreen; i++) @@ -2874,7 +2870,7 @@ valuators[0] += (priv->bottomX - priv->topX) * leftPadding / (double)totalWidth + 0.5; } -#endif + if (priv->twinview != TV_NONE && (priv->flags & ABSOLUTE_FLAG)) { if (priv->twinview == TV_LEFT_RIGHT) { if (x > priv->tvResolution[0]) { @@ -2994,8 +2990,7 @@ leftPadding += screenInfo.screens[i]->width; } } -#ifdef PANORAMIX - else if (!noPanoramiXExtension && priv->common->wcmGimp) { + else if (IsXineramaActive() && priv->common->wcmGimp) { screenToSet = priv->screen_no; for (i = 0; i < screenToSet; i++) leftPadding += screenInfo.screens[i]->width; @@ -3004,7 +2999,7 @@ *v1 = *v1 * screenInfo.screens[screenToSet]->height / (double)maxHeight + 0.5; } - if (!noPanoramiXExtension && priv->common->wcmGimp) { + if (IsXineramaActive() && priv->common->wcmGimp) { priv->factorX = totalWidth/sizeX; priv->factorY = maxHeight/sizeY; x = (*v0 - sizeX * leftPadding / totalWidth) * priv->factorX + 0.5; @@ -3016,7 +3011,6 @@ y = screenInfo.screens[screenToSet]->height - 1; } else -#endif { if (priv->screen_no == -1) *v0 = (*v0 * totalWidth - sizeX * leftPadding) @@ -5224,6 +5218,8 @@ * * called when the module subsection is found in XF86Config */ +static MODULETEARDOWNPROTO(xf86WcmUnplug); + static void xf86WcmUnplug(pointer p) { @@ -5235,8 +5231,10 @@ * * called when the module subsection is found in XF86Config */ +static MODULESETUPPROTO(xf86WcmPlug); + static pointer -xf86WcmPlug(pointer module, +xf86WcmPlug(ModuleDescPtr module, pointer options, int *errmaj, int *errmin) Index: xc/programs/Xserver/hw/xfree86/int10/Imakefile diff -u xc/programs/Xserver/hw/xfree86/int10/Imakefile:1.21 xc/programs/Xserver/hw/xfree86/int10/Imakefile:1.22 --- xc/programs/Xserver/hw/xfree86/int10/Imakefile:1.21 Sun Jan 30 12:48:44 2005 +++ xc/programs/Xserver/hw/xfree86/int10/Imakefile Fri Oct 14 11:16:58 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/int10/Imakefile,v 1.21 2005/01/30 17:48:44 tsi Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/int10/Imakefile,v 1.22 2005/10/14 15:16:58 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -101,8 +101,8 @@ #endif -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(XINCLUDESRC) -I$(EXTINCSRC) $(X86EMUINCLUDES) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include $(X86EMUINCLUDES) DEFINES = $(X86EMUDEFINES) $(INT10DEFINES) Index: xc/programs/Xserver/hw/xfree86/int10/generic.c diff -u xc/programs/Xserver/hw/xfree86/int10/generic.c:1.29 xc/programs/Xserver/hw/xfree86/int10/generic.c:1.31 --- xc/programs/Xserver/hw/xfree86/int10/generic.c:1.29 Tue Sep 23 22:43:33 2003 +++ xc/programs/Xserver/hw/xfree86/int10/generic.c Tue Aug 30 12:26:48 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/generic.c,v 1.29 2003/09/24 02:43:33 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/generic.c,v 1.31 2005/08/30 16:26:48 tsi Exp $ */ /* * XFree86 int10 module * execute BIOS int 10h calls in x86 real mode environment @@ -11,6 +11,7 @@ #define _INT10_PRIVATE #include "xf86int10.h" #include "int10Defines.h" +#include "xf86PciInfo.h" #define ALLOC_ENTRIES(x) ((V_RAM / x) - 1) @@ -99,7 +100,15 @@ base = INTPriv(pInt)->base = xnfalloc(SYS_BIOS); pvp = xf86GetPciInfoForEntity(entityIndex); - if (pvp) pInt->Tag = ((pciConfigPtr)(pvp->thisCard))->tag; + if (pvp) { + pInt->Tag = ((pciConfigPtr)(pvp->thisCard))->tag; + + /* Kludge to allow for VMWare's unaligned accesses */ + /* Do NOT make this x86-specific... */ + if ((pvp->vendor == PCI_VENDOR_VMWARE) && + (pvp->chipType == PCI_CHIP_VMWARE0405)) + pInt->vmwarePort = pvp->ioBase[0] + 1; + } /* * we need to map video RAM MMIO as some chipsets map mmio @@ -499,7 +508,7 @@ read_w(xf86Int10InfoPtr pInt, int addr) { #if X_BYTE_ORDER == X_LITTLE_ENDIAN - if (OFF(addr + 1) > 0) + if (!(addr & 1)) return V_ADDR_RW(addr); #endif return V_ADDR_RB(addr) | (V_ADDR_RB(addr + 1) << 8); @@ -509,7 +518,7 @@ read_l(xf86Int10InfoPtr pInt, int addr) { #if X_BYTE_ORDER == X_LITTLE_ENDIAN - if (OFF(addr + 3) > 2) + if (!(addr & 3)) return V_ADDR_RL(addr); #endif return V_ADDR_RB(addr) | @@ -528,24 +537,30 @@ write_w(xf86Int10InfoPtr pInt, int addr, CARD16 val) { #if X_BYTE_ORDER == X_LITTLE_ENDIAN - if (OFF(addr + 1) > 0) - { V_ADDR_WW(addr, val); } + if (!(addr & 1)) { + V_ADDR_WW(addr, val); + } else #endif - V_ADDR_WB(addr, val); - V_ADDR_WB(addr + 1, val >> 8); + { + V_ADDR_WB(addr, val); + V_ADDR_WB(addr + 1, val >> 8); + } } static void write_l(xf86Int10InfoPtr pInt, int addr, CARD32 val) { #if X_BYTE_ORDER == X_LITTLE_ENDIAN - if (OFF(addr + 3) > 2) - { V_ADDR_WL(addr, val); } + if (!(addr & 3)) { + V_ADDR_WL(addr, val); + } else #endif - V_ADDR_WB(addr, val); - V_ADDR_WB(addr + 1, val >> 8); - V_ADDR_WB(addr + 2, val >> 16); - V_ADDR_WB(addr + 3, val >> 24); + { + V_ADDR_WB(addr, val); + V_ADDR_WB(addr + 1, val >> 8); + V_ADDR_WB(addr + 2, val >> 16); + V_ADDR_WB(addr + 3, val >> 24); + } } pointer Index: xc/programs/Xserver/hw/xfree86/int10/helper_exec.c diff -u xc/programs/Xserver/hw/xfree86/int10/helper_exec.c:1.27 xc/programs/Xserver/hw/xfree86/int10/helper_exec.c:1.32 --- xc/programs/Xserver/hw/xfree86/int10/helper_exec.c:1.27 Tue Dec 23 17:32:38 2003 +++ xc/programs/Xserver/hw/xfree86/int10/helper_exec.c Thu Mar 16 15:43:35 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/helper_exec.c,v 1.27 2003/12/23 22:32:38 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/helper_exec.c,v 1.32 2006/03/16 20:43:35 dawes Exp $ */ /* * XFree86 int10 module * execute BIOS int 10h calls in x86 real mode environment @@ -10,9 +10,9 @@ /* * To debug port accesses define PRINT_PORT. - * Note! You also have to comment out ioperm() - * in xf86EnableIO(). Otherwise we won't trap - * on PIO. + * + * Note: You also have to comment out Linux's ioperm() in xf86EnableIO(). + * Otherwise we won't trap on PIO. */ #include "xf86.h" @@ -23,11 +23,13 @@ #include "int10Defines.h" #include "xf86int10.h" -#if !defined (_PC) && !defined (_PC_PCI) static int pciCfg1in(CARD16 addr, CARD32 *val); +static int pciCfg1inw(CARD16 addr, CARD16 *val); +static int pciCfg1inb(CARD16 addr, CARD8 *val); static int pciCfg1out(CARD16 addr, CARD32 val); -#endif -#if defined (_PC) +static int pciCfg1outw(CARD16 addr, CARD16 val); +static int pciCfg1outb(CARD16 addr, CARD8 val); +#if defined(_PC) static void SetResetBIOSVars(xf86Int10InfoPtr pInt, Bool set); #endif @@ -41,6 +43,7 @@ return -1; Int10Current = pInt; } + X86_EAX = (CARD32) pInt->ax; X86_EBX = (CARD32) pInt->bx; X86_ECX = (CARD32) pInt->cx; @@ -55,10 +58,12 @@ X86_FS = 0; X86_GS = 0; X86_EFLAGS = X86_IF_MASK | X86_IOPL_MASK; -#if defined (_PC) + +#if defined(_PC) if (pInt->Flags & SET_BIOS_SCRATCH) SetResetBIOSVars(pInt, TRUE); #endif + return xf86BlockSIGIO(); } @@ -75,7 +80,8 @@ pInt->es = (CARD16) X86_ES; pInt->bp = (CARD32) X86_EBP; pInt->flags = (CARD32) X86_FLAGS; -#if defined (_PC) + +#if defined(_PC) if (pInt->Flags & RESTORE_BIOS_SCRATCH) SetResetBIOSVars(pInt, FALSE); #endif @@ -83,7 +89,7 @@ /* general software interrupt handler */ CARD32 -getIntVect(xf86Int10InfoPtr pInt,int num) +getIntVect(xf86Int10InfoPtr pInt, int num) { return MEM_RW(pInt, num << 2) + (MEM_RW(pInt, (num << 2) + 2) << 4); } @@ -99,18 +105,19 @@ run_bios_int(int num, xf86Int10InfoPtr pInt) { CARD32 eflags; + #ifndef _PC /* check if bios vector is initialized */ if (MEM_RW(pInt, (num << 2) + 2) == (SYS_BIOS >> 4)) { /* SYS_BIOS_SEG ?*/ - if (num == 21 && X86_AH == 0x4e) { - xf86DrvMsg(pInt->scrnIndex, X_NOTICE, + if (num == 0x21 && X86_AH == 0x4e) { + xf86DrvMsg(pInt->scrnIndex, X_NOTICE, "Failing Find-Matching-File on non-PC" " (int 21, func 4e)\n"); - X86_AX = 2; - SET_FLAG(F_CF); - return 1; - } else { + X86_AX = 2; + SET_FLAG(F_CF); + return 1; + } else { xf86DrvMsgVerb(pInt->scrnIndex, X_NOT_IMPLEMENTED, 2, "Ignoring int 0x%02x call\n", num); if (xf86GetVerbosity() > 3) { @@ -121,9 +128,11 @@ } } #endif + #ifdef PRINT_INT ErrorF("calling card BIOS at: "); #endif + eflags = X86_EFLAGS; #if 0 eflags = eflags | IF_MASK; @@ -134,9 +143,11 @@ pushw(pInt, X86_IP); X86_CS = MEM_RW(pInt, (num << 2) + 2); X86_IP = MEM_RW(pInt, num << 2); + #ifdef PRINT_INT ErrorF("0x%x:%lx\n", X86_CS, X86_EIP); #endif + return 1; } @@ -183,7 +194,8 @@ unsigned long stack = SEG_ADR((CARD32), X86_SS, SP); unsigned long tail = (CARD32)((X86_SS << 4) + 0x1000); - if (stack >= tail) return; + if (stack >= tail) + return; xf86MsgVerb(X_INFO, 3, "stack at 0x%8.8lx:\n", stack); for (; stack < tail; stack++) { @@ -196,20 +208,46 @@ xf86ErrorFVerb(3, "\n"); } +/* Unaligned accesses are anathema for some platforms */ +static void +UnalignedIO(xf86Int10InfoPtr pInt, const char *rw, unsigned long address, + unsigned long length) +{ + xf86DrvMsgVerb(pInt->scrnIndex, X_WARNING, 4, + "BIOS requested unaligned %ld-byte I/O %s access to %#lx\n", + length, rw, address); +#ifdef PRINT_PORT + if (xf86GetVerbosity() > 3) { + dump_registers(pInt); + stack_trace(pInt); + } +#endif +} + int port_rep_inb(xf86Int10InfoPtr pInt, CARD16 port, CARD32 base, int d_f, CARD32 count) { - register int inc = d_f ? -1 : 1; - CARD32 dst = base; + CARD32 dst; + int inc; + + if (count == 0) + return 0; + + dst = base; + inc = d_f ? -1 : 1; + #ifdef PRINT_PORT - ErrorF(" rep_insb(%#x) %d bytes at %p %s\n", - port, count, base, d_f ? "up" : "down"); + ErrorF(" rep_insb(%#x) %d bytes at %#x %s\n", + (unsigned int)port, (unsigned int)count, (unsigned int)base, + d_f ? "up" : "down"); #endif + while (count--) { MEM_WB(pInt, dst, x_inb(port)); dst += inc; } + return dst - base; } @@ -217,16 +255,26 @@ port_rep_inw(xf86Int10InfoPtr pInt, CARD16 port, CARD32 base, int d_f, CARD32 count) { - register int inc = d_f ? -2 : 2; - CARD32 dst = base; + CARD32 dst; + int inc; + + if (count == 0) + return 0; + + dst = base; + inc = d_f ? -2 : 2; + #ifdef PRINT_PORT - ErrorF(" rep_insw(%#x) %d bytes at %p %s\n", - port, count, base, d_f ? "up" : "down"); + ErrorF(" rep_insw(%#x) %d bytes at %#x %s\n", + (unsigned int)port, (unsigned int)count, (unsigned int)base, + d_f ? "up" : "down"); #endif + while (count--) { MEM_WW(pInt, dst, x_inw(port)); dst += inc; } + return dst - base; } @@ -234,16 +282,26 @@ port_rep_inl(xf86Int10InfoPtr pInt, CARD16 port, CARD32 base, int d_f, CARD32 count) { - register int inc = d_f ? -4 : 4; - CARD32 dst = base; + CARD32 dst; + int inc; + + if (count == 0) + return 0; + + dst = base; + inc = d_f ? -4 : 4; + #ifdef PRINT_PORT - ErrorF(" rep_insl(%#x) %d bytes at %p %s\n", - port, count, base, d_f ? "up" : "down"); + ErrorF(" rep_insl(%#x) %d bytes at %#x %s\n", + (unsigned int)port, (unsigned int)count, (unsigned int)base, + d_f ? "up" : "down"); #endif + while (count--) { MEM_WL(pInt, dst, x_inl(port)); dst += inc; } + return dst - base; } @@ -251,16 +309,26 @@ port_rep_outb(xf86Int10InfoPtr pInt, CARD16 port, CARD32 base, int d_f, CARD32 count) { - register int inc = d_f ? -1 : 1; - CARD32 dst = base; + CARD32 dst; + int inc; + + if (count == 0) + return 0; + + dst = base; + inc = d_f ? -1 : 1; + #ifdef PRINT_PORT - ErrorF(" rep_outb(%#x) %d bytes at %p %s\n", - port, count, base, d_f ? "up" : "down"); + ErrorF(" rep_outb(%#x) %d bytes at %#x %s\n", + (unsigned int)port, (unsigned int)count, (unsigned int)base, + d_f ? "up" : "down"); #endif + while (count--) { x_outb(port, MEM_RB(pInt, dst)); dst += inc; } + return dst - base; } @@ -268,16 +336,26 @@ port_rep_outw(xf86Int10InfoPtr pInt, CARD16 port, CARD32 base, int d_f, CARD32 count) { - register int inc = d_f ? -2 : 2; - CARD32 dst = base; + CARD32 dst; + int inc; + + if (count == 0) + return 0; + + dst = base; + inc = d_f ? -2 : 2; + #ifdef PRINT_PORT - ErrorF(" rep_outw(%#x) %d bytes at %p %s\n", - port, count, base, d_f ? "up" : "down"); + ErrorF(" rep_outw(%#x) %d bytes at %#x %s\n", + (unsigned int)port, (unsigned int)count, (unsigned int)base, + d_f ? "up" : "down"); #endif + while (count--) { x_outw(port, MEM_RW(pInt, dst)); dst += inc; } + return dst - base; } @@ -285,23 +363,33 @@ port_rep_outl(xf86Int10InfoPtr pInt, CARD16 port, CARD32 base, int d_f, CARD32 count) { - register int inc = d_f ? -4 : 4; - CARD32 dst = base; + CARD32 dst; + int inc; + + if (count == 0) + return 0; + + dst = base; + inc = d_f ? -4 : 4; + #ifdef PRINT_PORT - ErrorF(" rep_outl(%#x) %d bytes at %p %s\n", - port, count, base, d_f ? "up" : "down"); + ErrorF(" rep_outl(%#x) %d bytes at %#x %s\n", + (unsigned int)port, (unsigned int)count, (unsigned int)base, + d_f ? "up" : "down"); #endif + while (count--) { x_outl(port, MEM_RL(pInt, dst)); dst += inc; } + return dst - base; } CARD8 x_inb(CARD16 port) { - CARD8 val; + CARD8 val = 0; if (port == 0x40) { Int10Current->inb40time++; @@ -321,20 +409,42 @@ } #endif /* __NOT_YET__ */ } else { - val = inb(Int10Current->ioBase + port); + if (!pciCfg1inb(port, &val)) { + IOADDRESS ioport = Int10Current->ioBase + port; + volatile int signo; + int iScreen = Int10Current->scrnIndex; + signed char attempt; + + xf86InterceptSignals(&signo); + for (attempt = 0; attempt >= 0; attempt++) { + signo = -1; + val = inb(ioport); + if (signo < 0) + break; + xf86DrvMsg(iScreen, X_WARNING, + "Signal %d interrupted inb(%#x) attempt %d\n", + signo, port, attempt); + } + xf86InterceptSignals(NULL); + } #ifdef PRINT_PORT - ErrorF(" inb(%#x) = %2.2x\n", port, val); + ErrorF(" inb(%#x) = %#2.2x\n", port, val); #endif } + return val; } CARD16 x_inw(CARD16 port) { - CARD16 val; + CARD16 val = 0; - if (port == 0x5c) { + if (port & 0x0001U) { + UnalignedIO(Int10Current, "read", port, 2); + val = x_inb(port); + val |= (CARD16)x_inb(port + 1) << 8; + } else if (port == 0x5c) { /* * Emulate a PC98's timer. Typical resolution is 3.26 usec. * Approximate this by dividing by 3. @@ -342,12 +452,76 @@ long sec, usec; (void)getsecs(&sec, &usec); val = (CARD16)(usec / 3); +#ifdef PRINT_PORT + ErrorF(" inw(%#x) = %#4.4x\n", port, val); +#endif } else { - val = inw(Int10Current->ioBase + port); + if (!pciCfg1inw(port, &val)) { + IOADDRESS ioport = Int10Current->ioBase + port; + volatile int signo; + int iScreen = Int10Current->scrnIndex; + signed char attempt; + + xf86InterceptSignals(&signo); + for (attempt = 0; attempt >= 0; attempt++) { + signo = -1; + val = inw(ioport); + if (signo < 0) + break; + xf86DrvMsg(iScreen, X_WARNING, + "Signal %d interrupted inw(%#x) attempt %d\n", + signo, port, attempt); + } + xf86InterceptSignals(NULL); + } +#ifdef PRINT_PORT + ErrorF(" inw(%#x) = %#4.4x\n", port, val); +#endif } + + return val; +} + +CARD32 +x_inl(CARD16 port) +{ + CARD32 val; + + if ((port & 0x0003U) && (port != Int10Current->vmwarePort)) { + UnalignedIO(Int10Current, "read", port, 4); + if (port & 0x0001U) { + val = x_inb(port); + val |= (CARD32)x_inw(port + 1) << 8; + val |= (CARD32)x_inb(port + 3) << 24; + } else { + val = x_inw(port); + val |= (CARD32)x_inw(port + 2) << 16; + } + } else { + if (!pciCfg1in(port, &val)) + { + IOADDRESS ioport = Int10Current->ioBase + port; + volatile int signo; + int iScreen = Int10Current->scrnIndex; + signed char attempt; + + xf86InterceptSignals(&signo); + for (attempt = 0; attempt >= 0; attempt++) { + signo = -1; + val = inl(ioport); + if (signo < 0) + break; + xf86DrvMsg(iScreen, X_WARNING, + "Signal %d interrupted inl(%#x) attempt %d\n", + signo, port, attempt); + } + xf86InterceptSignals(NULL); + } #ifdef PRINT_PORT - ErrorF(" inw(%#x) = %4.4x\n", port, val); + ErrorF(" inl(%#x) = %#8.8x\n", port, (unsigned int)val); #endif + } + return val; } @@ -365,7 +539,7 @@ (void) getsecs(&sec, &usec); Int10Current->inb40time = (CARD16)(usec | 1); #ifdef PRINT_PORT - ErrorF(" outb(%#x, %2.2x)\n", port, val); + ErrorF(" outb(%#x, %#2.2x)\n", port, val); #endif #ifdef __NOT_YET__ } else if (port < 0x0100) { /* Don't interfere with mainboard */ @@ -377,50 +551,99 @@ } #endif /* __NOT_YET__ */ } else { + if (!pciCfg1outb(port, val)) { + IOADDRESS ioport = Int10Current->ioBase + port; + volatile int signo; + int iScreen = Int10Current->scrnIndex; + signed char attempt; + + xf86InterceptSignals(&signo); + for (attempt = 0; attempt >= 0; attempt++) { + signo = -1; + outb(ioport, val); + if (signo < 0) + break; + xf86DrvMsg(iScreen, X_WARNING, + "Signal %d interrupted outb(%#x, %#x) attempt %d\n", + signo, port, val, attempt); + } + xf86InterceptSignals(NULL); + } #ifdef PRINT_PORT - ErrorF(" outb(%#x, %2.2x)\n", port, val); + ErrorF(" outb(%#x, %#2.2x)\n", port, val); #endif - outb(Int10Current->ioBase + port, val); } } void x_outw(CARD16 port, CARD16 val) { + if (port & 0x0001U) { + UnalignedIO(Int10Current, "write", port, 2); + x_outb(port, val); + x_outb(port + 1, val >> 8); + } else { + if (!pciCfg1outw(port, val)) { + IOADDRESS ioport = Int10Current->ioBase + port; + volatile int signo; + int iScreen = Int10Current->scrnIndex; + signed char attempt; + + xf86InterceptSignals(&signo); + for (attempt = 0; attempt >= 0; attempt++) { + signo = -1; + outw(ioport, val); + if (signo < 0) + break; + xf86DrvMsg(iScreen, X_WARNING, + "Signal %d interrupted outw(%#x, %#x) attempt %d\n", + signo, port, val, attempt); + } + } + xf86InterceptSignals(NULL); #ifdef PRINT_PORT - ErrorF(" outw(%#x, %4.4x)\n", port, val); -#endif - - outw(Int10Current->ioBase + port, val); -} - -CARD32 -x_inl(CARD16 port) -{ - CARD32 val; - -#if !defined(_PC) && !defined(_PC_PCI) - if (!pciCfg1in(port, &val)) -#endif - val = inl(Int10Current->ioBase + port); - -#ifdef PRINT_PORT - ErrorF(" inl(%#x) = %8.8x\n", port, val); + ErrorF(" outw(%#x, %#4.4x)\n", port, val); #endif - return val; + } } void x_outl(CARD16 port, CARD32 val) { + if ((port & 0x0003U) && (port != Int10Current->vmwarePort)) { + UnalignedIO(Int10Current, "write", port, 4); + if (port & 0x0001U) { + x_outb(port, val); + x_outw(port + 1, val >> 8); + x_outb(port + 3, val >> 24); + } else { + x_outw(port, val); + x_outw(port + 2, val >> 16); + } + } else { + if (!pciCfg1out(port, val)) + { + IOADDRESS ioport = Int10Current->ioBase + port; + volatile int signo; + int iScreen = Int10Current->scrnIndex; + signed char attempt; + + xf86InterceptSignals(&signo); + for (attempt = 0; attempt >= 0; attempt++) { + signo = -1; + outl(ioport, val); + if (signo < 0) + break; + xf86DrvMsg(iScreen, X_WARNING, + "Signal %d interrupted outl(%#x, %#x) attempt %d\n", + signo, port, (unsigned int)val, attempt); + } + xf86InterceptSignals(NULL); + } #ifdef PRINT_PORT - ErrorF(" outl(%#x, %8.8x)\n", port, val); + ErrorF(" outl(%#x, %#8.8x)\n", port, (unsigned int)val); #endif - -#if !defined(_PC) && !defined(_PC_PCI) - if (!pciCfg1out(port, val)) -#endif - outl(Int10Current->ioBase + port, val); + } } CARD8 @@ -459,7 +682,6 @@ (*Int10Current->mem->wl)(Int10Current, addr, val); } -#if !defined(_PC) && !defined(_PC_PCI) static CARD32 PciCfg1Addr = 0; #define TAG(Cfg1Addr) (Cfg1Addr & 0xffff00) @@ -472,10 +694,12 @@ *val = PciCfg1Addr; return 1; } + if (addr == 0xCFC) { *val = pciReadLong(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr)); return 1; } + return 0; } @@ -486,13 +710,112 @@ PciCfg1Addr = val; return 1; } + if (addr == 0xCFC) { - pciWriteLong(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr),val); + pciWriteLong(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr), val); return 1; } + + return 0; +} + +static int +pciCfg1inw(CARD16 addr, CARD16 *val) +{ + if (addr == 0xCF8 || addr == 0xCFA) { + int shift; + CARD32 mask; + + shift = (addr - 0xCF8) * 8; + mask = 0xffff << shift; + *val = (PciCfg1Addr & mask) >> shift; + return 1; + } + + if (addr == 0xCFC || addr == 0xCFE) { + int offset; + + offset = addr - 0xCFC; + *val = pciReadWord(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr) + offset); + return 1; + } + + return 0; +} + +static int +pciCfg1outw(CARD16 addr, CARD16 val) +{ + if (addr == 0xCF8 || addr == 0xCFA) { + int shift; + CARD32 mask; + + shift = (addr - 0xCF8) * 8; + mask = ~(0xffff << shift); + PciCfg1Addr &= mask; + PciCfg1Addr |= (val << shift); + return 1; + } + + if (addr == 0xCFC || addr == 0xCFE) { + int offset; + + offset = addr - 0xCFC; + pciWriteWord(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr) + offset, val); + return 1; + } + + return 0; +} + +static int +pciCfg1inb(CARD16 addr, CARD8 *val) +{ + if (addr >= 0xCF8 && addr <= 0xCFB) { + int shift; + CARD32 mask; + + shift = (addr - 0xCF8) * 8; + mask = 0xff << shift; + *val = (PciCfg1Addr & mask) >> shift; + return 1; + } + + if (addr >= 0xCFC && addr <= 0xCFF) { + int offset; + + offset = addr - 0xCFC; + *val = pciReadByte(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr) + offset); + return 1; + } + + return 0; +} + +static int +pciCfg1outb(CARD16 addr, CARD8 val) +{ + if (addr >= 0xCF8 && addr <= 0xCFB) { + int shift; + CARD32 mask; + + shift = (addr - 0xCF8) * 8; + mask = ~(0xff << shift); + PciCfg1Addr &= mask; + PciCfg1Addr |= (val << shift); + return 1; + } + + if (addr >= 0xCFC && addr <= 0xCFF) { + int offset; + + offset = addr - 0xCFC; + pciWriteByte(TAG(PciCfg1Addr), OFFSET(PciCfg1Addr) + offset, val); + return 1; + } + return 0; } -#endif CARD8 bios_checksum(CARD8 *start, int size) @@ -505,22 +828,20 @@ } /* - * Lock/Unlock legacy VGA. Some Bioses try to be very clever and make - * an attempt to detect a legacy ISA card. If they find one they might - * act very strange: for example they might configure the card as a - * monochrome card. This might cause some drivers to choke. - * To avoid this we attempt legacy VGA by writing to all know VGA - * disable registers before we call the BIOS initialization and - * restore the original values afterwards. In beween we hold our - * breath. To get to a (possibly exising) ISA card need to disable + * Lock/Unlock legacy VGA. Some Bioses try to be very clever and make an + * attempt to detect a legacy ISA card. If they find one they might act very + * strange: for example they might configure the card as a monochrome card. + * This might cause some drivers to choke. To avoid this we attempt legacy VGA + * by writing to all know VGA disable registers before we call the BIOS + * initialisation and restore the original values afterwards. In between we + * hold our breath. To get to a (possibly exising) ISA card need to disable * our current PCI card. */ /* - * This is just for booting: we just want to catch pure - * legacy vga therefore we don't worry about mmio etc. - * This stuff should really go into vgaHW.c. However then - * the driver would have to load the vga-module prior to - * doing int10. + * This is just for booting: we just want to catch pure legacy vga therefore + * we don't worry about mmio etc. This stuff should really go into vgaHW.c. + * However then * the driver would have to load the vga-module prior to doing + * int10. */ void LockLegacyVGA(xf86Int10InfoPtr pInt, legacyVGAPtr vga) @@ -554,14 +875,13 @@ xf86SetCurrentAccess(TRUE, xf86Screens[pInt->scrnIndex]); } -#if defined (_PC) +#if defined(_PC) static void SetResetBIOSVars(xf86Int10InfoPtr pInt, Bool set) { - int pagesize = getpagesize(); - unsigned char* base = xf86MapVidMem(pInt->scrnIndex, - VIDMEM_MMIO, 0, pagesize); - int i; + int i, pagesize = getpagesize(); + unsigned char* base = + xf86MapVidMem(pInt->scrnIndex, VIDMEM_MMIO, 0, pagesize); if (set) { for (i = BIOS_SCRATCH_OFF; i < BIOS_SCRATCH_END; i++) @@ -570,37 +890,37 @@ for (i = BIOS_SCRATCH_OFF; i < BIOS_SCRATCH_END; i++) *(base + i) = MEM_RW(pInt, i); } - - xf86UnMapVidMem(pInt->scrnIndex,base,pagesize); + + xf86UnMapVidMem(pInt->scrnIndex, base, pagesize); } void xf86Int10SaveRestoreBIOSVars(xf86Int10InfoPtr pInt, Bool save) { - int pagesize = getpagesize(); + int i, pagesize = getpagesize(); unsigned char* base; - int i; - if (!xf86IsEntityPrimary(pInt->entityIndex) - || (!save && !pInt->BIOSScratch)) + if (!xf86IsEntityPrimary(pInt->entityIndex) || + (!save && !pInt->BIOSScratch)) return; - + base = xf86MapVidMem(pInt->scrnIndex, VIDMEM_MMIO, 0, pagesize); base += BIOS_SCRATCH_OFF; + if (save) { if ((pInt->BIOSScratch = xnfalloc(BIOS_SCRATCH_LEN))) for (i = 0; i < BIOS_SCRATCH_LEN; i++) - *(((char*)pInt->BIOSScratch + i)) = *(base + i); + *(((char*)pInt->BIOSScratch + i)) = *(base + i); } else { if (pInt->BIOSScratch) { for (i = 0; i < BIOS_SCRATCH_LEN; i++) - *(base + i) = *(pInt->BIOSScratch + i); + *(base + i) = *(pInt->BIOSScratch + i); xfree(pInt->BIOSScratch); pInt->BIOSScratch = NULL; } } - - xf86UnMapVidMem(pInt->scrnIndex,base - BIOS_SCRATCH_OFF ,pagesize); + + xf86UnMapVidMem(pInt->scrnIndex, base - BIOS_SCRATCH_OFF, pagesize); } #endif Index: xc/programs/Xserver/hw/xfree86/int10/xf86int10.h diff -u xc/programs/Xserver/hw/xfree86/int10/xf86int10.h:1.24 xc/programs/Xserver/hw/xfree86/int10/xf86int10.h:1.26 --- xc/programs/Xserver/hw/xfree86/int10/xf86int10.h:1.24 Tue Jul 23 10:22:46 2002 +++ xc/programs/Xserver/hw/xfree86/int10/xf86int10.h Fri Oct 14 11:16:58 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/xf86int10.h,v 1.24 2002/07/23 14:22:46 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/xf86int10.h,v 1.26 2005/10/14 15:16:58 tsi Exp $ */ /* * XFree86 int10 module @@ -9,8 +9,8 @@ #ifndef _XF86INT10_H #define _XF86INT10_H -#include "Xmd.h" -#include "Xdefs.h" +#include +#include #include "xf86Pci.h" #define SEG_ADDR(x) (((x) >> 4) & 0x00F000) @@ -43,6 +43,7 @@ int stackseg; PCITAG Tag; IOADDRESS ioBase; + IOADDRESS vmwarePort; /* kludge */ } xf86Int10InfoRec, *xf86Int10InfoPtr; typedef struct _int10Mem { Index: xc/programs/Xserver/hw/xfree86/int10/xf86int10module.c diff -u xc/programs/Xserver/hw/xfree86/int10/xf86int10module.c:1.2 xc/programs/Xserver/hw/xfree86/int10/xf86int10module.c:1.3 --- xc/programs/Xserver/hw/xfree86/int10/xf86int10module.c:1.2 Mon Sep 16 14:06:09 2002 +++ xc/programs/Xserver/hw/xfree86/int10/xf86int10module.c Thu Mar 16 11:50:33 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/xf86int10module.c,v 1.2 2002/09/16 18:06:09 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/int10/xf86int10module.c,v 1.3 2006/03/16 16:50:33 dawes Exp $ */ /* * XFree86 int10 module * execute BIOS int 10h calls in x86 real mode environment @@ -42,7 +42,7 @@ XF86ModuleData NAME(ModuleData) = { &NAME(VersRec), NAME(Setup), NULL }; static pointer -NAME(Setup)(pointer module, pointer opts, int *errmaj, int *errmin) +NAME(Setup)(ModuleDescPtr module, pointer opts, int *errmaj, int *errmin) { static Bool setupDone = FALSE; Index: xc/programs/Xserver/hw/xfree86/loader/Imakefile diff -u xc/programs/Xserver/hw/xfree86/loader/Imakefile:1.41 xc/programs/Xserver/hw/xfree86/loader/Imakefile:1.47 --- xc/programs/Xserver/hw/xfree86/loader/Imakefile:1.41 Thu Sep 9 11:36:43 2004 +++ xc/programs/Xserver/hw/xfree86/loader/Imakefile Sat Apr 8 14:30:26 2006 @@ -1,7 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/loader/Imakefile,v 1.41 2004/09/09 15:36:43 tsi Exp $ */ - - - +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/loader/Imakefile,v 1.47 2006/04/08 18:30:26 dawes Exp $ */ #include #ifdef LoaderTest @@ -9,48 +6,66 @@ SUBDIRS = test #endif +#if defined(i386Architecture) || defined(PowerPCArchitecture) +#define HasCoff YES +#else +#define HasCoff NO +#endif + #define UseDBMalloc NO #if UseDBMalloc -SYS_LIBRARIES=-ldbmalloc -DBMALLOCDEFINE=-DDBMALLOC +SYS_LIBRARIES = -ldbmalloc +DBMALLOCDEFINE = -DDBMALLOC #endif #if HasDlopen DLOPENDEFINES = -DDLOPEN_SUPPORT -DLSRC=dlloader.c -DLOBJ=dlloader.o +DLSRC = dlloader.c +DLOBJ = dlloader.o #endif -#if FontencCompatibility - COMPAT_DEFINES = -DFONTENC_COMPATIBILITY +#if HasCoff +COFFDEFINES = -DCOFF_SUPPORT +COFFSRC = coffloader.c +COFFOBJ = coffloader.o #endif -#if BuildFontCache - FONTCACHE_DEFINES = -DFONTCACHE +#if FontencCompatibility + COMPAT_DEFINES = -DFONTENC_COMPATIBILITY #endif #if HasShm SHM_DEFINES = -DHAS_SHM #endif -#if defined(LinuxArchitecture) && \ - (defined(i386Architecture) || defined(AMD64Architecture)) +#if defined(LinuxArchitecture) ARCHDEFINES = -DDoMMAPedMerge -DMmapPageAlign +#else +#ifndef OS2Architecture +ARCHDEFINES = -DUseMMAP -DMmapPageAlign +#endif #endif -DEFINES = $(DBMALLOCDEFINE) $(DLOPENDEFINES) $(OS_DEFINES) $(COMPAT_DEFINES) \ - $(SHM_DEFINES) $(FONTCACHE_DEFINES) $(ARCHDEFINES) +#if UseStackTrace +STRACEDEFS = -DSTACKTRACE +STRACEINCS = -I$(TOP)/util/memleak +#endif + +LOADERBUILDFLAGS = LoaderBuildFlags + +DEFINES = $(DBMALLOCDEFINE) $(DLOPENDEFINES) $(COFFDEFINES) $(OS_DEFINES) \ + $(COMPAT_DEFINES) $(SHM_DEFINES) $(ARCHDEFINES) $(EXT_DEFINES) \ + $(STRACEDEFS) $(LOADERBUILDFLAGS) MODULEDEFINES = -DDEFAULT_MODULE_PATH=\"$(MODULEDIR)\" - INCLUDES = -I. -I.. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(XF86SRC)/vbe \ + INCLUDES = -I.. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(XF86SRC)/vbe \ -I$(SERVERSRC)/dbe -I$(SERVERSRC)/Xext -I$(XF86SRC)/int10 \ -I$(SERVERSRC)/mfb -I$(SERVERSRC)/mi -I$(SERVERSRC)/include \ - -I$(SERVERSRC)/os -I$(XINCLUDESRC) -I$(FONTINCSRC) \ -I$(FONTLIBSRC)/include -I$(FONTLIBSRC)/fontcache \ - -I$(EXTINCSRC) -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c \ - -I$(SERVERSRC)/render + -I$(SERVERSRC)/os -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c \ + -I$(SERVERSRC)/render -I$(XF86SRC)/parser $(STRACEINCS) #ifdef OS2Architecture SRCS1 = os2funcs.c @@ -62,13 +77,13 @@ OBJS1 = SparcMulDiv.o #endif -SRCS = aoutloader.c coffloader.c $(DLSRC) elfloader.c hash.c loader.c \ +SRCS = aoutloader.c $(COFFSRC) $(DLSRC) elfloader.c hash.c loader.c \ loadmod.c loadfont.c loadext.c os.c dixsym.c misym.c xf86sym.c \ fontsym.c extsym.c $(SRCS1) -OBJS = aoutloader.o coffloader.o $(DLOBJ) elfloader.o hash.o loader.o \ +OBJS = aoutloader.o $(COFFOBJ) $(DLOBJ) elfloader.o hash.o loader.o \ loadmod.o loadfont.o loadext.o os.o dixsym.o misym.o xf86sym.o \ fontsym.o extsym.o $(OBJS1) -XOBJS = aoutloader.o coffloader.o $(DLOBJ) elfloader.o hash.o loader.o \ +XOBJS = aoutloader.o $(COFFOBJ) $(DLOBJ) elfloader.o hash.o loader.o \ loadmod.o loadfont.o loadext.o os.o $(OBJS1) NormalAsmObjectRule() @@ -77,9 +92,7 @@ NormalLibraryTarget(loader,$(OBJS) ) NormalLibraryTarget(xloader,$(XOBJS) ) -SpecialCObjectRule(loadmod,NullParameter,$(MODULEDEFINES) $(EXT_DEFINES)) -SpecialCObjectRule(xf86sym,NullParameter,$(EXT_DEFINES)) -SpecialCObjectRule(dixsym,NullParameter,$(EXT_DEFINES)) +SpecialCObjectRule(loadmod,NullParameter,$(MODULEDEFINES)) #ifdef SparcArchitecture ObjectFromAsmSource(SparcMulDiv,NullParameter) Index: xc/programs/Xserver/hw/xfree86/loader/aout.h diff -u xc/programs/Xserver/hw/xfree86/loader/aout.h:1.8 xc/programs/Xserver/hw/xfree86/loader/aout.h:1.10 --- xc/programs/Xserver/hw/xfree86/loader/aout.h:1.8 Wed Oct 15 12:29:02 2003 +++ xc/programs/Xserver/hw/xfree86/loader/aout.h Mon Apr 3 14:08:03 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/aout.h,v 1.8 2003/10/15 16:29:02 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/aout.h,v 1.10 2006/04/03 18:08:03 dawes Exp $ */ /* * Borrowed from NetBSD's exec_aout.h @@ -32,10 +32,15 @@ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* + * Updated to the FreeBSD version, since there are some issues in the handling + * of the magic/mid field. + */ + #ifndef _AOUT_H #define _AOUT_H -#include "Xos.h" +#include /* Get prototype for ntohl. */ #include @@ -119,65 +124,73 @@ * `M' is 16 bits worth of magic number, ie. ZMAGIC. * The macros below will set/get the needed fields. */ + #define AOUT_GETMAGIC(ex) \ - ( (((ex)->a_midmag)&0xffff0000U) ? (ntohl(((ex)->a_midmag))&0xffffU) : ((ex)->a_midmag)) -#define AOUT_GETMAGIC2(ex) \ - ( (((ex)->a_midmag)&0xffff0000U) ? (ntohl(((ex)->a_midmag))&0xffffU) : \ - (((ex)->a_midmag) | 0x10000) ) + ( (ex)->a_midmag & 0xffff ) #define AOUT_GETMID(ex) \ - ( (((ex)->a_midmag)&0xffff0000U) ? ((ntohl(((ex)->a_midmag))>>16)&0x03ffU) : MID_ZERO ) + ( (AOUT_GETMAGIC_NET(ex) == ZMAGIC) ? AOUT_GETMID_NET(ex) : \ + ((ex)->a_midmag >> 16) & 0x03ff ) #define AOUT_GETFLAG(ex) \ - ( (((ex)->a_midmag)&0xffff0000U) ? ((ntohl(((ex)->a_midmag))>>26)&0x3fU) : 0 ) + ( (AOUT_GETMAGIC_NET(ex) == ZMAGIC) ? AOUT_GETFLAG_NET(ex) : \ + ((ex)->a_midmag >> 26) & 0x3f ) #define AOUT_SETMAGIC(ex,mag,mid,flag) \ - ( (ex)->a_midmag = htonl( (((flag)&0x3fU)<<26) | (((mid)&0x03ffU)<<16) | \ - (((mag)&0xffffU)) ) ) + ( (ex)->a_midmag = (((flag) & 0x3f) <<26) | (((mid) & 0x03ff) << 16) | \ + ((mag) & 0xffff) ) + +#define AOUT_GETMAGIC_NET(ex) \ + (ntohl((ex)->a_midmag) & 0xffff) +#define AOUT_GETMID_NET(ex) \ + ((ntohl((ex)->a_midmag) >> 16) & 0x03ff) +#define AOUT_GETFLAG_NET(ex) \ + ((ntohl((ex)->a_midmag) >> 26) & 0x3f) +#define AOUT_SETMAGIC_NET(ex,mag,mid,flag) \ + ( (ex)->a_midmag = htonl( (((flag)&0x3f)<<26) | (((mid)&0x03ff)<<16) | \ + (((mag)&0xffff)) ) ) #define AOUT_ALIGN(ex,x) \ - (AOUT_GETMAGIC(ex) == ZMAGIC || AOUT_GETMAGIC(ex) == QMAGIC ? \ - ((x) + __LDPGSZ - 1) & ~(__LDPGSZ - 1) : (x)) + (AOUT_GETMAGIC(ex) == ZMAGIC || AOUT_GETMAGIC(ex) == QMAGIC || \ + AOUT_GETMAGIC_NET(ex) == ZMAGIC || AOUT_GETMAGIC_NET(ex) == QMAGIC ? \ + ((x) + __LDPGSZ - 1) & ~(unsigned long)(__LDPGSZ - 1) : (x)) /* Valid magic number check. */ -#define AOUT_BADMAG(ex) \ - (AOUT_GETMAGIC(ex) != NMAGIC && AOUT_GETMAGIC(ex) != OMAGIC && \ - AOUT_GETMAGIC(ex) != ZMAGIC && AOUT_GETMAGIC(ex) != QMAGIC) +#define AOUT_BADMAG(ex) \ + (AOUT_GETMAGIC(ex) != OMAGIC && AOUT_GETMAGIC(ex) != NMAGIC && \ + AOUT_GETMAGIC(ex) != ZMAGIC && AOUT_GETMAGIC(ex) != QMAGIC && \ + AOUT_GETMAGIC_NET(ex) != OMAGIC && AOUT_GETMAGIC_NET(ex) != NMAGIC && \ + AOUT_GETMAGIC_NET(ex) != ZMAGIC && AOUT_GETMAGIC_NET(ex) != QMAGIC) + /* Address of the bottom of the text segment. */ -#define AOUT_TXTADDR(ex) (AOUT_GETMAGIC2(ex) == (ZMAGIC|0x10000) ? 0 : __LDPGSZ) +#define AOUT_TXTADDR(ex) \ + ((AOUT_GETMAGIC(ex) == OMAGIC || AOUT_GETMAGIC(ex) == NMAGIC || \ + AOUT_GETMAGIC(ex) == ZMAGIC) ? 0 : __LDPGSZ) /* Address of the bottom of the data segment. */ #define AOUT_DATADDR(ex) \ - (AOUT_GETMAGIC(ex) == OMAGIC ? AOUT_TXTADDR(ex) + (ex)->a_text : \ - (AOUT_TXTADDR(ex) + (ex)->a_text + __LDPGSZ - 1) & ~(__LDPGSZ - 1)) - -/* Address of the bottom of the bss segment. */ -#define AOUT_BSSADDR(ex) \ - (AOUT_DATADDR(ex) + (ex)->a_data) + AOUT_ALIGN(ex, AOUT_TXTADDR(ex) + (ex)->a_text) /* Text segment offset. */ -#define AOUT_TXTOFF(ex) \ - ( AOUT_GETMAGIC2(ex)==ZMAGIC || AOUT_GETMAGIC2(ex)==(QMAGIC|0x10000) ? \ - 0 : (AOUT_GETMAGIC2(ex)==(ZMAGIC|0x10000) ? __LDPGSZ : \ - sizeof(struct AOUT_exec)) ) +#define AOUT_TXTOFF(ex) \ + (AOUT_GETMAGIC(ex) == ZMAGIC ? __LDPGSZ : (AOUT_GETMAGIC(ex) == QMAGIC || \ + AOUT_GETMAGIC_NET(ex) == ZMAGIC) ? 0 : sizeof(struct AOUT_exec)) /* Data segment offset. */ -#define AOUT_DATOFF(ex) \ - AOUT_ALIGN(ex, AOUT_TXTOFF(ex) + (ex)->a_text) +#define AOUT_DATOFF(ex) \ + AOUT_ALIGN(ex, AOUT_TXTOFF(ex) + (ex)->a_text) -/* Text relocation table offset. */ +/* Relocation table offset. */ #define AOUT_TRELOFF(ex) \ - (AOUT_DATOFF(ex) + (ex)->a_data) - -/* Data relocation table offset. */ + AOUT_ALIGN(ex, AOUT_DATOFF(ex) + (ex)->a_data) #define AOUT_DRELOFF(ex) \ - (AOUT_TRELOFF(ex) + (ex)->a_trsize) + AOUT_ALIGN(ex, AOUT_TRELOFF(ex) + (ex)->a_trsize) /* Symbol table offset. */ #define AOUT_SYMOFF(ex) \ - (AOUT_DRELOFF(ex) + (ex)->a_drsize) + (AOUT_DRELOFF(ex) + (ex)->a_drsize) /* String table offset. */ -#define AOUT_STROFF(ex) \ - (AOUT_SYMOFF(ex) + (ex)->a_syms) +#define AOUT_STROFF(ex) (AOUT_SYMOFF(ex) + (ex)->a_syms) + /* Relocation format. */ struct relocation_info_i386 { Index: xc/programs/Xserver/hw/xfree86/loader/aoutloader.c diff -u xc/programs/Xserver/hw/xfree86/loader/aoutloader.c:1.20 xc/programs/Xserver/hw/xfree86/loader/aoutloader.c:1.24 --- xc/programs/Xserver/hw/xfree86/loader/aoutloader.c:1.20 Wed Oct 15 13:46:00 2003 +++ xc/programs/Xserver/hw/xfree86/loader/aoutloader.c Mon Apr 3 14:08:03 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/aoutloader.c,v 1.20 2003/10/15 17:46:00 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/aoutloader.c,v 1.24 2006/04/03 18:08:03 dawes Exp $ */ /* * @@ -25,6 +25,53 @@ * * Modified 21/02/97 by Sebastien Marineau to support OS/2 a.out objects */ + +/* + * Copyright 2003-2006 by David H. Dawes. + * Copyright 2003-2006 by X-Oz Technologies. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. The end-user documentation included with the redistribution, + * if any, must include the following acknowledgment: "This product + * includes software developed by X-Oz Technologies + * (http://www.x-oz.com/)." Alternately, this acknowledgment may + * appear in the software itself, if and wherever such third-party + * acknowledgments normally appear. + * + * 4. Except as contained in this notice, the name of X-Oz + * Technologies shall not be used in advertising or otherwise to + * promote the sale, use or other dealings in this Software without + * prior written authorization from X-Oz Technologies. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL X-OZ TECHNOLOGIES OR ITS CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + #include #include #include @@ -44,20 +91,19 @@ #define Xfree(size) free(size) #endif -#include "Xos.h" +#include #include "os.h" #include "aout.h" - #include "sym.h" -#include "loader.h" -#include "aoutloader.h" #ifndef LOADERDEBUG #define LOADERDEBUG 0 #endif +#include "loader.h" +#include "aoutloader.h" -#if LOADERDEBUG -#define AOUTDEBUG ErrorF +#ifndef EXESYMDEBUG +#define EXESYMDEBUG 0 && LOADERDEBUG #endif #ifndef MIN @@ -73,7 +119,7 @@ int handle; int module; int fd; - loader_funcs *funcs; + LoaderDescPtr desc; AOUTHDR *header; /* file header */ unsigned char *text; /* Start address of the text section */ unsigned int textsize; /* Size of the text section */ @@ -98,6 +144,10 @@ AOUTModulePtr file; struct relocation_info *rel; int type; /* AOUT_TEXT or AOUT_DATA */ + int relocated; + void *symval; + int assigned; + unsigned long olddata; struct AOUT_RELOC *next; } AOUTRelocRec; @@ -119,17 +169,16 @@ /* prototypes for static functions */ static int AOUTHashCleanOut(void *, itemPtr); -static char *AOUTGetSymbolName(AOUTModulePtr, struct AOUT_nlist *); -static void *AOUTGetSymbolValue(AOUTModulePtr, int); +static const char *AOUTGetSymbolName(AOUTModulePtr, struct AOUT_nlist *); +static void *AOUTGetSymbolValue(AOUTModulePtr, int, int *); static AOUTCommonPtr AOUTAddCommon(struct AOUT_nlist *, int); static LOOKUP *AOUTCreateCommon(AOUTModulePtr); static LOOKUP *AOUT_GetSymbols(AOUTModulePtr); static AOUTRelocPtr AOUTDelayRelocation(AOUTModulePtr, int, struct relocation_info_i386 *); static AOUTRelocPtr AOUTCollectRelocations(AOUTModulePtr); -static void AOUT_Relocate(unsigned long *, unsigned long, int); -static AOUTRelocPtr AOUT_RelocateEntry(AOUTModulePtr, int, - struct relocation_info_i386 *); +static void AOUT_Relocate(AOUTRelocPtr, unsigned long *, unsigned long, int); +static int AOUT_RelocateEntry(AOUTRelocPtr); /* * Return 1 if the symbol in item belongs to aoutfile @@ -161,7 +210,11 @@ reloc->file = aoutfile; reloc->type = type; reloc->rel = rel; - reloc->next = 0; + reloc->relocated = 0; + reloc->symval = NULL; + reloc->assigned = 0; + reloc->olddata = 0; + reloc->next = NULL; return reloc; } @@ -207,9 +260,10 @@ numsyms++; } /* while */ -#ifdef AOUTDEBUG - AOUTDEBUG("AOUTCreateCommon() %d entries (%d bytes) of COMMON data\n", - numsyms, size); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "AOUTCreateCommon() %d entries (%d bytes) of COMMON data\n", + numsyms, size); #endif if ((lookup = xf86loadermalloc((numsyms + 1) * sizeof(LOOKUP))) == NULL) { @@ -225,11 +279,12 @@ while (listCOMMON) { common = listCOMMON; - lookup[l].symName = AOUTGetSymbolName(aoutfile, common->sym); + lookup[l].symName = xf86loaderstrdup(AOUTGetSymbolName(aoutfile, + common->sym)); lookup[l].offset = (funcptr) (aoutfile->common + offset); -#ifdef AOUTDEBUG - AOUTDEBUG("Adding %p %s\n", (void *)lookup[l].offset, - lookup[l].symName); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Adding %p %s\n", + (void *)lookup[l].offset, lookup[l].symName); #endif listCOMMON = common->next; offset += common->sym->n_value; @@ -261,40 +316,37 @@ /* * Return the name of a symbol */ -static char * +static const char * AOUTGetSymbolName(AOUTModulePtr aoutfile, struct AOUT_nlist *sym) { - char *symname = AOUTGetString(aoutfile, sym->n_un.n_strx); - char *name; - - name = xf86loadermalloc(strlen(symname) + 1); - if (!name) - FatalError("AOUTGetSymbolName: Out of memory\n"); - - strcpy(name, symname); - - return name; + return AOUTGetString(aoutfile, sym->n_un.n_strx); } /* * Return the value of a symbol in the loader's symbol table */ static void * -AOUTGetSymbolValue(AOUTModulePtr aoutfile, int index) +AOUTGetSymbolValue(AOUTModulePtr aoutfile, int index, int *pInvariant) { void *symval = NULL; /* value of the indicated symbol */ itemPtr symbol = NULL; /* name/value of symbol */ - char *name = NULL; + const char *name = NULL; name = AOUTGetSymbolName(aoutfile, aoutfile->symtab + index); if (name) symbol = LoaderHashFind(name); - if (symbol) - symval = (unsigned char *)symbol->address; + if (symbol == NULL || + !SCOPE_OK(symbol, aoutfile->handle, LOOKUP_SCOPE_GLOBAL)) { + return NULL; + } + symval = (void *)symbol->address; + if (pInvariant) { + *pInvariant = ((symbol->handle == aoutfile->handle) || + (symbol->scope & LOOKUP_SCOPE_BUILTIN)); + } - xf86loaderfree(name); return symval; } @@ -302,55 +354,70 @@ * Perform the actual relocation */ static void -AOUT_Relocate(unsigned long *destl, unsigned long val, int pcrel) +AOUT_Relocate(AOUTRelocPtr p, unsigned long *destl, unsigned long val, + int pcrel) { -#ifdef AOUTDEBUG - AOUTDEBUG("AOUT_Relocate %p : %08lx %s", - (void *)destl, *destl, pcrel == 1 ? "rel" : "abs"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "AOUT_Relocate %p : %08lx %s", + (void *)destl, *destl, pcrel == 1 ? "rel" : "abs"); #endif + + if (p->assigned) { + *destl = p->olddata; + } else { + p->olddata = *destl; + p->assigned = 1; + } + if (pcrel) { /* relative to PC */ *destl = val - ((unsigned long)destl + sizeof(long)); } else { *destl += val; } -#ifdef AOUTDEBUG - AOUTDEBUG(" -> %08lx\n", *destl); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, " -> %08lx\n", *destl); #endif } /* * Fix the relocation for text or data section */ -static AOUTRelocPtr -AOUT_RelocateEntry(AOUTModulePtr aoutfile, int type, - struct relocation_info *rel) +static int +AOUT_RelocateEntry(AOUTRelocPtr p) { + AOUTModulePtr aoutfile = p->file; + int type = p->type; + struct relocation_info *rel = p->rel; AOUTHDR *header = aoutfile->header; +#if LOADERDEBUG AOUT_nlist *symtab = aoutfile->symtab; +#endif int symnum; - void *symval; + void *symval = NULL; unsigned long *destl; /* address of the location to be modified */ + int invariant = 0; symnum = rel->r_symbolnum; -#ifdef AOUTDEBUG +#if LOADERDEBUG { - char *name; - if (rel->r_extern) { - AOUTDEBUG("AOUT_RelocateEntry: extern %s\n", - name = AOUTGetSymbolName(aoutfile, symtab + symnum)); - xf86loaderfree(name); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "AOUT_RelocateEntry: extern %s\n", + AOUTGetSymbolName(aoutfile, symtab + symnum)); } else { - AOUTDEBUG("AOUT_RelocateEntry: intern\n"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "AOUT_RelocateEntry: intern\n"); } - AOUTDEBUG(" pcrel: %d", rel->r_pcrel); - AOUTDEBUG(" length: %d", rel->r_length); - AOUTDEBUG(" baserel: %d", rel->r_baserel); - AOUTDEBUG(" jmptable: %d", rel->r_jmptable); - AOUTDEBUG(" relative: %d", rel->r_relative); - AOUTDEBUG(" copy: %d\n", rel->r_copy); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, " pcrel: %d", rel->r_pcrel); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, " length: %d", rel->r_length); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, " baserel: %d", rel->r_baserel); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + " jmptable: %d", rel->r_jmptable); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + " relative: %d", rel->r_relative); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, " copy: %d\n", rel->r_copy); } #endif /* AOUTDEBUG */ @@ -387,71 +454,81 @@ */ if (rel->r_extern) { /* Lookup the symbol in the loader's symbol table */ - symval = AOUTGetSymbolValue(aoutfile, symnum); - if (symval != 0) { - /* we've got the value */ - AOUT_Relocate(destl, (unsigned long)symval, rel->r_pcrel); - return 0; + symval = AOUTGetSymbolValue(aoutfile, symnum, &invariant); + if (symval != NULL) { + if (p->relocated) { + /* Already relocated. */ + return invariant; + } else { + p->relocated = 1; + } } else { - /* The symbol should be undefined */ - switch (symtab[symnum].n_type & AOUT_TYPE) { - case AOUT_UNDF: -#ifdef AOUTDEBUG - AOUTDEBUG(" extern AOUT_UNDEF\n"); -#endif - /* Add this relocation back to the global list */ - return AOUTDelayRelocation(aoutfile, type, rel); - - default: - ErrorF("AOUT_RelocateEntry():" - " impossible intern relocation type: %d\n", - symtab[symnum].n_type); - return 0; - } /* switch */ + symval = &LoaderDefaultFunc; + p->relocated = 0; + } + if (symval) { + if (p->symval == symval) { + /* Unchanged. */ + return invariant; + } else + p->symval = symval; } } else { /* intern */ + invariant = 1; switch (rel->r_symbolnum) { case AOUT_TEXT: -#ifdef AOUTDEBUG - AOUTDEBUG(" AOUT_TEXT\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, " AOUT_TEXT\n"); #endif /* Only absolute intern text relocations need to be handled */ - if (rel->r_pcrel == 0) - AOUT_Relocate(destl, (unsigned long)aoutfile->text, - rel->r_pcrel); - return 0; + if (rel->r_pcrel == 0) { + symval = aoutfile->text; + p->relocated = 1; + } else + p->relocated = 0; + break; + case AOUT_DATA: -#ifdef AOUTDEBUG - AOUTDEBUG(" AOUT_DATA\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, " AOUT_DATA\n"); #endif - if (rel->r_pcrel == 0) - AOUT_Relocate(destl, (unsigned long)aoutfile->data - - header->a_text, rel->r_pcrel); - else + if (rel->r_pcrel == 0) { + symval = (void *)((unsigned long)aoutfile->data - + header->a_text); + p->relocated = 1; + } else { ErrorF("AOUT_RelocateEntry(): " "don't know how to handle data pc-relative reloc\n"); + p->relocated = 0; + } + break; - return 0; case AOUT_BSS: -#ifdef AOUTDEBUG - AOUTDEBUG(" AOUT_BSS\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, " AOUT_BSS\n"); #endif - if (rel->r_pcrel == 0) - AOUT_Relocate(destl, (unsigned long)aoutfile->bss - - header->a_text - header->a_data, - rel->r_pcrel); - else + if (rel->r_pcrel == 0) { + symval = (void *)((unsigned long)aoutfile->bss - + header->a_text - header->a_data); + p->relocated = 1; + } else { ErrorF("AOUT_RelocateEntry(): " "don't know how to handle bss pc-relative reloc\n"); + p->relocated = 0; + } + break; - return 0; default: ErrorF("AOUT_RelocateEntry():" " unknown intern relocation type: %d\n", rel->r_symbolnum); return 0; } /* switch */ } + if (symval != NULL) + AOUT_Relocate(p, destl, (unsigned long)symval, rel->r_pcrel); + + return invariant; } /* AOUT_RelocateEntry */ static AOUTRelocPtr @@ -501,7 +578,7 @@ int fd = aoutfile->fd; AOUTHDR *header = aoutfile->header; int nsyms, soff, i, l; - char *symname; + const char *symname; AOUT_nlist *s; LOOKUP *lookup, *lookup_common; AOUTCommonPtr tmp; @@ -522,16 +599,18 @@ if (soff == 0 || (s->n_type & AOUT_STAB) != 0) continue; symname = AOUTGetSymbolName(aoutfile, s); -#ifdef AOUTDEBUG - AOUTDEBUG("AOUT_GetSymbols(): %s %02x %02x %08lx\n", - symname, s->n_type, s->n_other, s->n_value); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "AOUT_GetSymbols(): %s %02x %02x %08lx\n", + symname, s->n_type, s->n_other, s->n_value); #endif switch (s->n_type & AOUT_TYPE) { case AOUT_UNDF: if (s->n_value != 0) { if (!LoaderHashFind(symname)) { -#ifdef AOUTDEBUG - AOUTDEBUG("Adding common %s\n", symname); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Adding common %s\n", symname); #endif tmp = AOUTAddCommon(s, i); if (tmp) { @@ -540,70 +619,66 @@ } } } else { -#ifdef AOUTDEBUG - AOUTDEBUG("Adding undef %s\n", symname); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Adding undef %s\n", symname); #endif } - xf86loaderfree(symname); break; case AOUT_TEXT: if (s->n_type & AOUT_EXT) { - lookup[l].symName = symname; + lookup[l].symName = xf86loaderstrdup(symname); /* text symbols start at 0 */ lookup[l].offset = (funcptr) (aoutfile->text + s->n_value); -#ifdef AOUTDEBUG - AOUTDEBUG("Adding text %s %p\n", symname, +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Adding text %s %p\n", symname, (void *)lookup[l].offset); #endif l++; - } else { - xf86loaderfree(symname); } break; case AOUT_DATA: if (s->n_type & AOUT_EXT) { - lookup[l].symName = symname; + lookup[l].symName = xf86loaderstrdup(symname); /* data symbols are following text */ lookup[l].offset = (funcptr) (aoutfile->data + s->n_value - header->a_text); -#ifdef AOUTDEBUG - AOUTDEBUG("Adding data %s %p\n", symname, - (void *)lookup[l].offset); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Adding data %s %p\n", symname, + (void *)lookup[l].offset); #endif l++; - } else { - xf86loaderfree(symname); } break; case AOUT_BSS: if (s->n_type & AOUT_EXT) { - lookup[l].symName = symname; + lookup[l].symName = xf86loaderstrdup(symname); /* bss symbols follow both text and data */ lookup[l].offset = (funcptr) (aoutfile->bss + s->n_value - (header->a_data + header->a_text)); -#ifdef AOUTDEBUG - AOUTDEBUG("Adding bss %s %p\n", symname, - (void *)lookup[l].offset); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Adding bss %s %p\n", + symname, (void *)lookup[l].offset); #endif l++; - } else { - xf86loaderfree(symname); } break; case AOUT_FN: -#ifdef AOUTDEBUG +#if LOADERDEBUG if (s->n_type & AOUT_EXT) { - AOUTDEBUG("Ignoring AOUT_FN %s\n", symname); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Ignoring AOUT_FN %s\n", symname); } else { - AOUTDEBUG("Ignoring AOUT_WARN %s\n", symname); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Ignoring AOUT_WARN %s\n", symname); } #endif - xf86loaderfree(symname); break; default: ErrorF("Unknown symbol type %x\n", s->n_type & AOUT_TYPE); - xf86loaderfree(symname); } /* switch */ } /* for */ lookup[l].symName = NULL; @@ -631,11 +706,10 @@ AOUTModulePtr aoutfile = NULL; AOUTHDR *header; AOUTRelocPtr reloc, tail; - void *v; -#ifdef AOUTDEBUG - AOUTDEBUG("AOUTLoadModule(%s, %d, %d)\n", - modrec->name, modrec->handle, aoutfd); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_FILES, "AOUTLoadModule(%s, %d, %d)\n", + modrec->name, modrec->handle, aoutfd); #endif if ((aoutfile = xf86loadercalloc(1, sizeof(AOUTModuleRec))) == NULL) { ErrorF("Unable to allocate AOUTModuleRec\n"); @@ -645,7 +719,7 @@ aoutfile->handle = modrec->handle; aoutfile->module = modrec->module; aoutfile->fd = aoutfd; - v = aoutfile->funcs = modrec->funcs; + aoutfile->desc = modrec->desc; /* * Get the a.out header @@ -717,69 +791,66 @@ if (reloc) { for (tail = reloc; tail->next; tail = tail->next) ; - tail->next = _LoaderGetRelocations(v)->aout_reloc; - _LoaderGetRelocations(v)->aout_reloc = reloc; + tail->next = *_LoaderGetRelocations(aoutfile->desc); + *_LoaderGetRelocations(aoutfile->desc) = reloc; } return (void *)aoutfile; } void -AOUTResolveSymbols(void *mod) +AOUTResolveSymbols(LoaderDescPtr desc, int handle) { - AOUTRelocPtr newlist, p, tmp; + AOUTRelocPtr p, *pp, tmp; -#ifdef AOUTDEBUG - AOUTDEBUG("AOUTResolveSymbols()\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "AOUTResolveSymbols()\n"); #endif - newlist = 0; - for (p = _LoaderGetRelocations(mod)->aout_reloc; p;) { - tmp = AOUT_RelocateEntry(p->file, p->type, p->rel); - if (tmp) { - /* Failed to relocate. Keep it in the list. */ - tmp->next = newlist; - newlist = tmp; + pp = (AOUTRelocPtr *)_LoaderGetRelocations(desc); + for (p = *_LoaderGetRelocations(desc); p;) { + /* If handle is valid, only relocate symbols for that module. */ + if (handle >= 0 && p->file->handle != handle) { + pp = &(p->next); + p = p->next; + continue; + } + + if (AOUT_RelocateEntry(p)) { + /* + * Remove invariant relocations, since they can't change when + * other modules are loaded or unloaded. + */ + *pp = p->next; + tmp = p; + p = p->next; + xf86loaderfree(tmp); + } else { + pp = &(p->next); + p = p->next; } - tmp = p; - p = p->next; - xf86loaderfree(tmp); } - _LoaderGetRelocations(mod)->aout_reloc = newlist; } /* AOUTResolveSymbols */ int -AOUTCheckForUnresolved(void *mod) +AOUTCheckForUnresolved(LoaderDescPtr desc) { int symnum; AOUTRelocPtr crel; - char *name; - int fatalsym = 0, flag; + const char *name; + int fatalsym = 0; -#ifdef AOUTDEBUG - AOUTDEBUG("AOUTCheckForUnResolved()\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "AOUTCheckForUnResolved()\n"); #endif - if ((crel = _LoaderGetRelocations(mod)->aout_reloc) == NULL) - return 0; + for (crel = *_LoaderGetRelocations(desc); crel; crel = crel->next) { + if (crel->relocated) + continue; - while (crel) { - if (crel->type == AOUT_TEXT) { - /* Attempt to make unresolved text references - * point to a default function */ - AOUT_Relocate((unsigned long *)(crel->file->text - + crel->rel->r_address), - (unsigned long)LoaderDefaultFunc, - crel->rel->r_pcrel); - } symnum = crel->rel->r_symbolnum; name = AOUTGetSymbolName(crel->file, crel->file->symtab + symnum); - flag = _LoaderHandleUnresolved(name, - _LoaderHandleToName(crel->file-> - handle)); - xf86loaderfree(name); - if (flag) + if (_LoaderHandleUnresolved(name, crel->file->handle)) fatalsym = 1; - crel = crel->next; } return fatalsym; } @@ -790,16 +861,16 @@ AOUTModulePtr aoutfile = (AOUTModulePtr) modptr; AOUTRelocPtr relptr, *prevptr; -#ifdef AOUTDEBUG - AOUTDEBUG("AOUTUnLoadModule(0x%p)\n", modptr); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "AOUTUnLoadModule(0x%p)\n", modptr); #endif -/* - * Delete any unresolved relocations - */ + /* + * Delete any unresolved relocations + */ - relptr = _LoaderGetRelocations(aoutfile->funcs)->aout_reloc; - prevptr = &(_LoaderGetRelocations(aoutfile->funcs)->aout_reloc); + relptr = *_LoaderGetRelocations(aoutfile->desc); + prevptr = (AOUTRelocPtr *)_LoaderGetRelocations(aoutfile->desc); while (relptr) { if (relptr->file == aoutfile) { @@ -860,3 +931,178 @@ return NULL; } + +const char * +AOUTFindRelocName(LoaderDescPtr desc, int handle, unsigned long addr) +{ + AOUTRelocPtr p; + long diff; + + for (p = *_LoaderGetRelocations(desc); p;) { + /* If handle is valid, only look for symbols for that module. */ + if (handle >= 0 && p->file->handle != handle) { + p = p->next; + continue; + } + diff = addr - ((unsigned long)p->file->text + p->rel->r_address); + if (diff < 8 && diff > -8) { + return AOUTGetSymbolName(p->file, + p->file->symtab + p->rel->r_symbolnum); + } + p = p->next; + } + return NULL; +} + +const char * +AOUTAddressToSymbol(void *modptr, unsigned long addr, unsigned long *symaddr, + const char **filename, int exe) +{ + AOUTModulePtr aoutfile; + AOUTHDR *header; + AOUT_nlist *syms, *s; + int i, numsyms, soff; + long bestDiff = MAXINT, diff; + const char *best = NULL; + unsigned long saddr, bestAddr = 0; + + if (!modptr) + return NULL; + else + aoutfile = (AOUTModulePtr)modptr; + + header = aoutfile->header; + syms = aoutfile->symtab; + numsyms = header->a_syms / sizeof(AOUT_nlist); + for (i = 0; i < numsyms; i++) { + s = syms + i; + soff = s->n_un.n_strx; + if (soff == 0 || (s->n_type & AOUT_STAB)) + continue; + switch (s->n_type & AOUT_TYPE) { + case AOUT_TEXT: + case AOUT_DATA: + case AOUT_BSS: + saddr = s->n_value; + if (exe || (aoutfile->text != 0 || aoutfile->data != 0)) { + switch (s->n_type & AOUT_TYPE) { + case AOUT_TEXT: + saddr += (unsigned long)aoutfile->text; + break; + case AOUT_DATA: + saddr += ((unsigned long)aoutfile->data - header->a_text); + break; + case AOUT_BSS: + saddr += ((unsigned long)aoutfile->bss - + (header->a_data + header->a_text)); + break; + } + } + break; + default: + saddr = 0; + break; + } + + if (!saddr) + continue; + + diff = addr - saddr; + if (diff >= 0) { + if ((best && diff < bestDiff) || !best) { + best = AOUTGetSymbolName(aoutfile, s); + bestDiff = diff; + bestAddr = saddr; + } + } + } + *filename = NULL; + if (best && bestDiff < 0x10000) { + *symaddr = bestAddr; + return best; + } else { + return NULL; + } +} + +#if EXESYMDEBUG +static void +ShowExeSyms(AOUTModulePtr aoutfile) +{ + AOUTHDR *header; + AOUT_nlist *syms, *s; + int i, numsyms; + unsigned long saddr; + + header = aoutfile->header; + syms = aoutfile->symtab; + numsyms = header->a_syms / sizeof(AOUT_nlist); + + LoaderDebugMsg(LOADER_DEBUG_SHOW_EXE_SYMS, + "ShowExeSyms: numsyms: %d\n", numsyms); + + for (i = 0; i < numsyms; i++) { + s = syms + i; + saddr = s->n_value; + if ((s->n_type & AOUT_ABS) == 0) { + switch (s->n_type & AOUT_TYPE) { + case AOUT_TEXT: + saddr += ((unsigned long)aoutfile->text - header->a_text); + break; + case AOUT_DATA: + saddr += ((unsigned long)aoutfile->data - header->a_data); + break; + case AOUT_BSS: + saddr += ((unsigned long)aoutfile->bss - header->a_bss); + break; + } + } + LoaderDebugMsg(LOADER_DEBUG_SHOW_EXE_SYMS, + "ShowExeSyms: value=0x%lx\tsaddr=0x%lx\tTYPE=%x\t%s\n", + (unsigned long)s->n_value, saddr, s->n_type, + AOUTGetSymbolName(aoutfile, s)); + + } +} +#endif + +void * +AOUTReadExecutableSyms(int aoutfd) +{ + AOUTModulePtr aoutfile; + AOUTHDR *header; + + aoutfile = xf86loadercalloc(1, sizeof(*aoutfile)); + if (!aoutfile) { + ErrorF("Cannot allocate space for the main executable symbol table\n"); + return NULL; + } + + aoutfile->fd = aoutfd; + + /* Get the header. */ + aoutfile->header = (AOUTHDR *)_LoaderFileToMem(aoutfd, 0, + sizeof(AOUTHDR), "header"); + header = aoutfile->header; + + /* Get the symbol table. */ + aoutfile->symtab = (AOUT_nlist *)_LoaderFileToMem(aoutfd, + AOUT_SYMOFF(header), + header->a_syms, + "symbols"); + aoutfile->text = 0; + aoutfile->data = (unsigned char *)AOUT_DATOFF(header); + aoutfile->bss = 0; + + /* Get the string table. */ + _LoaderFileRead(aoutfd, AOUT_STROFF(header), &(aoutfile->strsize), + sizeof(int)); + if (aoutfile->strsize != 0) + aoutfile->strings = _LoaderFileToMem(aoutfd, AOUT_STROFF(header), + aoutfile->strsize, "strings"); + +#if EXESYMDEBUG + ShowExeSyms(aoutfile); +#endif + return aoutfile; +} Index: xc/programs/Xserver/hw/xfree86/loader/aoutloader.h diff -u xc/programs/Xserver/hw/xfree86/loader/aoutloader.h:1.4 xc/programs/Xserver/hw/xfree86/loader/aoutloader.h:1.6 --- xc/programs/Xserver/hw/xfree86/loader/aoutloader.h:1.4 Wed Oct 15 12:29:02 2003 +++ xc/programs/Xserver/hw/xfree86/loader/aoutloader.h Thu Mar 16 11:50:33 2006 @@ -19,13 +19,21 @@ * PERFORMANCE OF THIS SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/aoutloader.h,v 1.4 2003/10/15 16:29:02 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/aoutloader.h,v 1.6 2006/03/16 16:50:33 dawes Exp $ */ #ifndef _AOUTLOADER_H #define _AOUTLOADER_H + +typedef struct AOUT_RELOC *AOUTRelocPtr; +typedef struct AOUT_COMMON *AOUTCommonPtr; + extern void *AOUTLoadModule(loaderPtr, int, LOOKUP **); -extern void AOUTResolveSymbols(void *); -extern int AOUTCheckForUnresolved(void *); +extern void AOUTResolveSymbols(LoaderDescPtr, int); +extern int AOUTCheckForUnresolved(LoaderDescPtr); extern char *AOUTAddressToSection(void *, unsigned long); extern void AOUTUnloadModule(void *); +extern const char *AOUTFindRelocName(LoaderDescPtr, int, unsigned long); +extern const char *AOUTAddressToSymbol(void *, unsigned long, unsigned long *, + const char **, int); +extern void *AOUTReadExecutableSyms(int); #endif Index: xc/programs/Xserver/hw/xfree86/loader/coff.h diff -u xc/programs/Xserver/hw/xfree86/loader/coff.h:1.6 xc/programs/Xserver/hw/xfree86/loader/coff.h:1.7 --- xc/programs/Xserver/hw/xfree86/loader/coff.h:1.6 Wed Oct 15 12:29:02 2003 +++ xc/programs/Xserver/hw/xfree86/loader/coff.h Wed Mar 1 22:00:38 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/coff.h,v 1.6 2003/10/15 16:29:02 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/coff.h,v 1.7 2006/03/02 03:00:38 dawes Exp $ */ /* This file was implemented from the information in the book Understanding and Using COFF @@ -108,6 +108,12 @@ #define SYMNMLEN COFF_E_SYMNMLEN #define SYMESZ 18 /* not really sizeof(SYMENT) due to padding */ +/* COFF section numbers. */ +#define N_TEXT 1 +#define N_DATA 2 +#define N_BSS 3 +#define N_COMMENT 4 + /* Special section number found in the symbol section */ #define N_UNDEF 0 #define N_ABS -1 Index: xc/programs/Xserver/hw/xfree86/loader/coffloader.c diff -u xc/programs/Xserver/hw/xfree86/loader/coffloader.c:1.22 xc/programs/Xserver/hw/xfree86/loader/coffloader.c:1.25 --- xc/programs/Xserver/hw/xfree86/loader/coffloader.c:1.22 Mon Dec 22 12:48:11 2003 +++ xc/programs/Xserver/hw/xfree86/loader/coffloader.c Thu Mar 16 11:50:34 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/coffloader.c,v 1.22 2003/12/22 17:48:11 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/coffloader.c,v 1.25 2006/03/16 16:50:34 dawes Exp $ */ /* * @@ -22,6 +22,52 @@ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ +/* + * Copyright 2003-2006 by David H. Dawes. + * Copyright 2003-2006 by X-Oz Technologies. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. The end-user documentation included with the redistribution, + * if any, must include the following acknowledgment: "This product + * includes software developed by X-Oz Technologies + * (http://www.x-oz.com/)." Alternately, this acknowledgment may + * appear in the software itself, if and wherever such third-party + * acknowledgments normally appear. + * + * 4. Except as contained in this notice, the name of X-Oz + * Technologies shall not be used in advertising or otherwise to + * promote the sale, use or other dealings in this Software without + * prior written authorization from X-Oz Technologies. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL X-OZ TECHNOLOGIES OR ITS CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + #include #include #include @@ -39,22 +85,22 @@ #define Xfree(size) free(size) #endif -#include "Xos.h" +#include #include "os.h" #include "coff.h" - #include "sym.h" -#include "loader.h" -#include "coffloader.h" - -#include "compiler.h" #ifndef LOADERDEBUG #define LOADERDEBUG 0 #endif -#if LOADERDEBUG -#define COFFDEBUG ErrorF +#include "loader.h" +#include "coffloader.h" + +#include "compiler.h" + +#ifndef COFF_WITH_LEADING_UNDERSCORE +#define COFF_WITH_LEADING_UNDERSCORE 0 #endif /* @@ -66,7 +112,7 @@ int handle; long module; /* Id of the module used to find inter module calls */ int fd; - loader_funcs *funcs; + LoaderDescPtr desc; FILHDR *header; /* file header */ AOUTHDR *optheader; /* optional file header */ unsigned short numsh; @@ -99,6 +145,10 @@ unsigned char *tocaddr; /* Address of the TOC csect */ } COFFModuleRec, *COFFModulePtr; +typedef union { + unsigned int d32; +} relocData; + /* * If any relocation is unable to be satisfied, then put it on a list * to try later after more modules have been loaded. @@ -107,6 +157,10 @@ COFFModulePtr file; RELOC *rel; int secndx; + int relocated; + unsigned char *symval; + int assigned; + relocData olddata; struct _coff_reloc *next; } COFFRelocRec; @@ -128,15 +182,15 @@ /* Prototypes for static functions */ static int COFFhashCleanOut(void *, itemPtr); -static char *COFFGetSymbolName(COFFModulePtr, int); +static const char *COFFGetSymbolName(COFFModulePtr, int); static COFFCommonPtr COFFAddCOMMON(SYMENT *, int); static LOOKUP *COFFCreateCOMMON(COFFModulePtr); static COFFRelocPtr COFFDelayRelocation(COFFModulePtr, int, RELOC *); static SYMENT *COFFGetSymbol(COFFModulePtr, int); #if defined(i386) || defined(__powerpc__) -static unsigned char *COFFGetSymbolValue(COFFModulePtr, int); +static unsigned char *COFFGetSymbolValue(COFFModulePtr, int, int *); #endif -static COFFRelocPtr COFF_RelocateEntry(COFFModulePtr, int, RELOC *); +static int COFF_RelocateEntry(COFFRelocPtr); static LOOKUP *COFF_GetSymbols(COFFModulePtr); static void COFFCollectSections(COFFModulePtr); static COFFRelocPtr COFFCollectRelocations(COFFModulePtr); @@ -169,7 +223,11 @@ reloc->file = cofffile; reloc->secndx = secndx; reloc->rel = rel; - reloc->next = 0; + reloc->relocated = 0; + reloc->symval = NULL; + reloc->assigned = 0; + memset(&reloc->olddata, 0, sizeof(reloc->olddata)); + reloc->next = NULL; return reloc; } @@ -217,9 +275,10 @@ numsyms++; } -#ifdef COFFDEBUG - COFFDEBUG("COFFCreateCOMMON() %d entries (%d bytes) of COMMON data\n", - numsyms, size); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "COFFCreateCOMMON() %d entries (%d bytes) of COMMON data\n", + numsyms, size); #endif if ((lookup = xf86loadermalloc((numsyms + 1) * sizeof(LOOKUP))) == NULL) { @@ -239,11 +298,12 @@ */ while (listCOMMON) { common = listCOMMON; - lookup[l].symName = COFFGetSymbolName(cofffile, common->index); + lookup[l].symName = + xf86loaderstrdup(COFFGetSymbolName(cofffile, common->index)); lookup[l].offset = (funcptr) (cofffile->common + offset); -#ifdef COFFDEBUG - COFFDEBUG("Adding %p %s\n", (void *)lookup[l].offset, - lookup[l].symName); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Adding %p %s\n", + (void *)lookup[l].offset, lookup[l].symName); #endif listCOMMON = common->next; offset += common->sym->n_value; @@ -263,35 +323,44 @@ /* * Get symbol name */ -static char * +static const char * COFFGetSymbolName(COFFModulePtr cofffile, int index) { - char *name; + const char *ret; + static char name[SYMNMLEN + 1]; SYMENT *sym; sym = (SYMENT *) (((unsigned char *)cofffile->symtab) + (index * SYMESZ)); -#ifdef COFFDEBUG - COFFDEBUG("COFFGetSymbolName(%p,%x) %lx", (void *)cofffile, index, - sym->n_zeroes); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "COFFGetSymbolName(%p,%x) %lx", + (void *)cofffile, index, sym->n_zeroes); #endif - name = xf86loadermalloc(sym->n_zeroes ? SYMNMLEN + 1 - : strlen((const char *)&cofffile-> - strtab[(int)sym->n_offset - 4]) + 1); - if (!name) - FatalError("COFFGetSymbolName: Out of memory\n"); - if (sym->n_zeroes) { - strncpy(name, sym->n_name, SYMNMLEN); - name[SYMNMLEN] = '\000'; +#if COFF_WITH_LEADING_UNDERSCORE + if (sym->n_name[0] == '_') { + strncpy(name, sym->n_name + 1, SYMNMLEN - 1); + name[SYMNMLEN - 1] = '\000'; + } else +#endif + { + strncpy(name, sym->n_name, SYMNMLEN); + name[SYMNMLEN] = '\000'; + } + ret = name; } else { - strcpy(name, (const char *)&cofffile->strtab[(int)sym->n_offset - 4]); +#if COFF_WITH_LEADING_UNDERSCORE + if (((const char *)&cofffile->strtab[(int)sym->n_offset - 4])[0] == '_') + ret = ((const char *)&cofffile->strtab[(int)sym->n_offset - 4]) + 1; + else +#endif + ret = (const char *)&cofffile->strtab[(int)sym->n_offset - 4]; } -#ifdef COFFDEBUG - COFFDEBUG(" %s\n", name); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, " %s\n", ret); #endif - return name; + return ret; } static SYMENT * @@ -302,28 +371,35 @@ #if defined(i386) || defined(__powerpc__) static unsigned char * -COFFGetSymbolValue(COFFModulePtr cofffile, int index) +COFFGetSymbolValue(COFFModulePtr cofffile, int index, int *pInvariant) { unsigned char *symval = 0; /* value of the indicated symbol */ itemPtr symbol; /* name/value of symbol */ - char *symname; + const char *symname; symname = COFFGetSymbolName(cofffile, index); -#ifdef COFFDEBUG - COFFDEBUG("COFFGetSymbolValue() for %s=", symname); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "COFFGetSymbolValue() for %s=", + symname); #endif symbol = LoaderHashFind(symname); - if (symbol) - symval = (unsigned char *)symbol->address; + if (symbol == NULL || + !SCOPE_OK(symbol, cofffile->handle, LOOKUP_SCOPE_GLOBAL)) { + return NULL; + } + symval = (unsigned char *)symbol->address; + if (pInvariant) { + *pInvariant = ((symbol->handle == cofffile->handle) || + (symbol->scope & LOOKUP_SCOPE_BUILTIN)); + } -#ifdef COFFDEBUG - COFFDEBUG("%p\n", symval); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%p\n", symval); #endif - xf86loaderfree(symname); return symval; } #endif @@ -339,20 +415,20 @@ { unsigned char *symval = 0; /* value of the indicated symbol */ itemPtr symbol; /* name/value of symbol */ - char *name; + const char *name; name = COFFGetSymbolName(cofffile, index); -#ifdef COFFDEBUG - COFFDEBUG("COFFGetSymbolGlinkValue() for %s=", name); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_PLT, "COFFGetSymbolGlinkValue() for %s=", name); #endif symbol = LoaderHashFind(name + 1); /* Eat the '.' so we get the * Function descriptor instead */ -/* Here we are building up a glink function that will change the TOC - * pointer before calling a function that resides in a different module. - * The following code is being used to implement this. + /* Here we are building up a glink function that will change the TOC + * pointer before calling a function that resides in a different module. + * The following code is being used to implement this. 1 00000000 3d80xxxx lis r12,hi16(funcdesc) 2 00000004 618cxxxx ori r12,r12,lo16(funcdesc) @@ -362,12 +438,12 @@ 6 00000014 804c0004 l r2,4(r12) # get TOC of function 7 00000018 4e800420 bctr # branch to it - */ + */ if (symbol) { symval = (unsigned char *)&symbol->code.glink; -#ifdef COFFDEBUG - COFFDEBUG("%x\n", symval); - COFFDEBUG("glink_%s=%x\n", name, symval); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_PLT, "%x\n", symval); + LoaderDebugMsg(LOADER_DEBUG_PLT, "glink_%s=%x\n", name, symval); #endif symbol->code.glink[0] = 0x3d80; /* lis r12 */ symbol->code.glink[1] = @@ -388,56 +464,82 @@ ppc_flush_icache(&symbol->code.glink[12]); } - xf86loaderfree(name); return symval; } #endif /* __powerpc__ */ +#if defined(i386) || defined(__powerpc__) +static void +resetDest32(COFFRelocPtr p, unsigned int *dest32) +{ +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); +#endif + if (p->assigned) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "was assigned\t"); +#endif + *dest32 = p->olddata.d32; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", *dest32); +#endif + } else { + p->olddata.d32 = *dest32; + p->assigned = 1; + } +} +#endif + /* * Fix all of the relocation for the given section. */ -static COFFRelocPtr -COFF_RelocateEntry(COFFModulePtr cofffile, int secndx, RELOC *rel) +static int +COFF_RelocateEntry(COFFRelocPtr p) { + COFFModulePtr cofffile = p->file; + int secndx = p->secndx; + RELOC *rel = p->rel; SYMENT *symbol; /* value of the indicated symbol */ - unsigned long *dest32; /* address of the place being modified */ + unsigned int *dest32; /* address of the place being modified */ #if defined(__powerpc__) unsigned short *dest16; /* address of the place being modified */ itemPtr symitem; /* symbol structure from has table */ - char *name; + const char *name; #endif - unsigned char *symval; /* value of the indicated symbol */ + unsigned char *symval = NULL; /* value of the indicated symbol */ + int invariant = 0; /* relocation is invariant */ -/* - * Note: Section numbers are 1 biased, while the cofffile->saddr[] array - * of pointer is 0 biased, so alway have to account for the difference. - */ + /* + * Note: Section numbers are 1 biased, while the cofffile->saddr[] array + * of pointer is 0 biased, so alway have to account for the difference. + */ -/* - * Reminder: secndx is the section to which the relocation is applied. - * symbol->n_scnum is the section in which the symbol value resides. - */ + /* + * Reminder: secndx is the section to which the relocation is applied. + * symbol->n_scnum is the section in which the symbol value + * resides. + */ -#ifdef COFFDEBUG - COFFDEBUG("%lx %ld %o ", (unsigned long)rel->r_vaddr, - rel->r_symndx, rel->r_type); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%lx %ld %o ", + (unsigned long)rel->r_vaddr, rel->r_symndx, rel->r_type); #if defined(__powerpc__) - COFFDEBUG("[%x %x %x] ", - RELOC_RSIGN(*rel), RELOC_RFIXUP(*rel), RELOC_RLEN(*rel)); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "[%x %x %x] ", + RELOC_RSIGN(*rel), RELOC_RFIXUP(*rel), RELOC_RLEN(*rel)); #endif #endif symbol = COFFGetSymbol(cofffile, rel->r_symndx); -#ifdef COFFDEBUG - COFFDEBUG("%d %lx %d-%d\n", symbol->n_sclass, symbol->n_value, - symbol->n_scnum, secndx); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%d %lx %d-%d\n", + symbol->n_sclass, symbol->n_value, symbol->n_scnum, secndx); #endif -/* - * Check to see if the relocation offset is part of the .text segment. - * If not, we must change the offset to be relative to the .data section - * which is NOT contiguous. - */ + /* + * Check to see if the relocation offset is part of the .text segment. + * If not, we must change the offset to be relative to the .data section + * which is NOT contiguous. + */ switch (secndx + 1) { /* change the bias */ case N_TEXT: if ((long)rel->r_vaddr < cofffile->txtaddr || @@ -445,7 +547,7 @@ (long)(cofffile->txtaddr + cofffile->txtsize)) { FatalError("Relocation against N_TEXT not in .text section\n"); } - dest32 = (unsigned long *)((long)(cofffile->saddr[secndx]) + + dest32 = (unsigned int *)((long)(cofffile->saddr[secndx]) + ((unsigned char *)rel->r_vaddr - cofffile->txtaddr)); break; @@ -455,7 +557,7 @@ (long)(cofffile->dataddr + cofffile->datsize)) { FatalError("Relocation against N_DATA not in .data section\n"); } - dest32 = (unsigned long *)((long)(cofffile->saddr[secndx]) + + dest32 = (unsigned int *)((long)(cofffile->saddr[secndx]) + ((unsigned char *)rel->r_vaddr - cofffile->dataddr)); break; @@ -465,7 +567,7 @@ (long)(cofffile->bssaddr + cofffile->bsssize)) { FatalError("Relocation against N_TEXT not in .bss section\n"); } - dest32 = (unsigned long *)((long)(cofffile->saddr[secndx]) + + dest32 = (unsigned int *)((long)(cofffile->saddr[secndx]) + ((unsigned char *)rel->r_vaddr - cofffile->bssaddr)); break; @@ -476,127 +578,160 @@ if (symbol->n_sclass == 0) { symval = (unsigned char *)(symbol->n_value + (*dest32) - symbol->n_type); -#ifdef COFFDEBUG - COFFDEBUG("symbol->n_sclass==0\n"); - COFFDEBUG("dest32=%p\t", (void *)dest32); - COFFDEBUG("symval=%p\t", symval); - COFFDEBUG("*dest32=%8.8lx\t", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symbol->n_sclass==0\n"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", (void *)dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%p\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", *dest32); #endif *dest32 = (unsigned long)symval; - return 0; + invariant = 1; + p->relocated = 1; + return invariant; } +#if defined(i386) || defined(__powerpc__) +#if defined(i386) + if (rel->r_type == R_DIR32 || rel->r_type == R_PCRLONG) +#elif defined(__powerpc__) + if (rel->r_type == R_POS) +#endif + { + symval = COFFGetSymbolValue(cofffile, rel->r_symndx, &invariant); + if (symval == NULL && symbol->n_scnum == N_UNDEF) { + symval = (unsigned char *)&LoaderDefaultFunc; + p->relocated = 0; + } else if (symval != NULL) { + if (p->relocated) + return invariant; + else + p->relocated = 1; + } + if (symval) { + if (p->symval == symval) { + /* Unchangd. */ + return invariant; + } else + p->symval = symval; + } + } +#endif + switch (rel->r_type) { #if defined(i386) case R_DIR32: - symval = COFFGetSymbolValue(cofffile, rel->r_symndx); - if (symval) { -#ifdef COFFDEBUG - char *namestr; - COFFDEBUG("R_DIR32 %s\n", - namestr = COFFGetSymbolName(cofffile, rel->r_symndx)); - xf86loaderfree(namestr); - COFFDEBUG("txtsize=%x\t", cofffile->txtsize); - COFFDEBUG("dest32=%p\t", (void *)dest32); - COFFDEBUG("symval=%p\t", symval); - COFFDEBUG("*dest32=%8.8lx\t", *dest32); + if (symval) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_DIR32 %s\n", + COFFGetSymbolName(cofffile, rel->r_symndx)); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "txtsize=%x\t", + cofffile->txtsize); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", + (void *)dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%p\t", symval); #endif + resetDest32(p, dest32); *dest32 = (unsigned long)(symval + (*dest32) - symbol->n_value); } else { + const char *reltype; + reltype = "R_DIR32"; + switch (symbol->n_scnum) { case N_UNDEF: -#ifdef COFFDEBUG - COFFDEBUG("R_DIR32 N_UNDEF\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%s N_UNDEF\n", reltype); #endif - return COFFDelayRelocation(cofffile, secndx, rel); + return 0; case N_ABS: -#ifdef COFFDEBUG - COFFDEBUG("R_DIR32 N_ABS\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%s N_ABS\n", reltype); #endif return 0; case N_DEBUG: -#ifdef COFFDEBUG - COFFDEBUG("R_DIR32 N_DEBUG\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%s N_DEBUG\n", reltype); #endif return 0; case N_COMMENT: -#ifdef COFFDEBUG - COFFDEBUG("R_DIR32 N_COMMENT\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%s N_COMMENT\n", + reltype); #endif return 0; case N_TEXT: -#ifdef COFFDEBUG - COFFDEBUG("R_DIR32 N_TEXT\n"); - COFFDEBUG("dest32=%p\t", (void *)dest32); - COFFDEBUG("symval=%p\t", symval); - COFFDEBUG("*dest32=%8.8lx\t", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%s N_TEXT\n", reltype); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", + (void *)dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%p\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", + *dest32); #endif *dest32 = (unsigned long)((*dest32) + (unsigned long)(cofffile-> saddr[N_TEXT - 1])); + p->relocated = 1; + invariant = 1; break; case N_DATA: -#ifdef COFFDEBUG - COFFDEBUG("R_DIR32 N_DATA\n"); - COFFDEBUG("txtsize=%x\t", cofffile->txtsize); - COFFDEBUG("dest32=%p\t", (void *)dest32); - COFFDEBUG("symval=%p\t", symval); - COFFDEBUG("*dest32=%8.8lx\t", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%s N_DATA\n", reltype); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "txtsize=%x\t", + cofffile->txtsize); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", + (void *)dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%p\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", + *dest32); #endif *dest32 = (unsigned long)((*dest32) + ((unsigned long)(cofffile-> saddr[N_DATA - 1])) - cofffile->dataddr); + p->relocated = 1; + invariant = 1; break; case N_BSS: -#ifdef COFFDEBUG - COFFDEBUG("R_DIR32 N_BSS\n"); - COFFDEBUG("dest32=%p\t", (void *)dest32); - COFFDEBUG("symval=%p\t", symval); - COFFDEBUG("*dest32=%8.8lx\t", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%s N_BSS\n", reltype); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", + (void *)dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%p\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", + *dest32); #endif *dest32 = (unsigned long)((*dest32) + (unsigned long)(cofffile-> saddr[N_BSS - 1]) - (cofffile->bssaddr)); + p->relocated = 1; + invariant = 1; break; default: - ErrorF("R_DIR32 with unexpected section %d\n", + ErrorF("%s with unexpected section %d\n", reltype, symbol->n_scnum); } - } -#ifdef COFFDEBUG - COFFDEBUG("*dest32=%8.8lx\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); #endif break; case R_PCRLONG: - if (symbol->n_scnum == N_TEXT) + if (symbol->n_scnum == N_TEXT || !symval) break; - symval = COFFGetSymbolValue(cofffile, rel->r_symndx); -#ifdef COFFDEBUG - COFFDEBUG("R_PCRLONG "); - COFFDEBUG("dest32=%p\t", (void *)dest32); - COFFDEBUG("symval=%p\t", symval); - COFFDEBUG("*dest32=%8.8lx\t", *dest32); -#endif - if (symval == 0) { -#ifdef COFFDEBUG - char *name; - - COFFDEBUG("***Unable to resolve symbol %s\n", - name = COFFGetSymbolName(cofffile, rel->r_symndx)); - xf86loaderfree(name); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PCRLONG "); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", (void *)dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%p\t", symval); #endif - return COFFDelayRelocation(cofffile, secndx, rel); - } + resetDest32(p, dest32); *dest32 = (unsigned long)(symval - ((long)dest32 + sizeof(long))); -#ifdef COFFDEBUG - COFFDEBUG("*dest32=%8.8lx\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); #endif break; case R_ABS: @@ -613,87 +748,97 @@ */ if (RELOC_RLEN(*rel) != 0x1f) FatalError("R_POS with size != 32 bits"); - symval = COFFGetSymbolValue(cofffile, rel->r_symndx); if (symval) { -#ifdef COFFDEBUG - COFFDEBUG("R_POS "); - COFFDEBUG("dest32=%x\t", dest32); - COFFDEBUG("symval=%x\t", symval); - COFFDEBUG("*dest32=%8.8x\t", *dest32); + +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_POS "); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%x\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); #endif + resetDest32(p, dest32); *dest32 = (unsigned long)(symval + (*dest32) - symbol->n_value); ppc_flush_icache(dest32); } else { switch (symbol->n_scnum) { case N_UNDEF: -#ifdef COFFDEBUG - COFFDEBUG("R_POS N_UNDEF\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_POS N_UNDEF\n"); #endif - return COFFDelayRelocation(cofffile, secndx, rel); + return 0; case N_ABS: -#ifdef COFFDEBUG - COFFDEBUG("R_POS N_ABS\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_POS N_ABS\n"); #endif return 0; case N_DEBUG: -#ifdef COFFDEBUG - COFFDEBUG("R_POS N_DEBUG\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_POS N_DEBUG\n"); #endif return 0; case N_COMMENT: -#ifdef COFFDEBUG - COFFDEBUG("R_POS N_COMMENT\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_POS N_COMMENT\n"); #endif return 0; case N_TEXT: -#ifdef COFFDEBUG - COFFDEBUG("R_POS N_TEXT\n"); - COFFDEBUG("dest32=%x\t", dest32); - COFFDEBUG("symval=%x\t", symval); - COFFDEBUG("*dest32=%8.8x\t", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_POS N_TEXT\n"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%x\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", + *dest32); #endif *dest32 = (unsigned long)((*dest32) + ((unsigned long)(cofffile-> saddr[N_TEXT - 1])) - cofffile->txtaddr); + invariant = 1; + p->relocated = 1; ppc_flush_icache(dest32); break; case N_DATA: -#ifdef COFFDEBUG - COFFDEBUG("R_POS N_DATA\n"); - COFFDEBUG("txtsize=%x\t", cofffile->txtsize); - COFFDEBUG("dest32=%x\t", dest32); - COFFDEBUG("symval=%x\t", symval); - COFFDEBUG("*dest32=%8.8x\t", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_POS N_DATA\n"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "txtsize=%x\t", + cofffile->txtsize); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%x\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", + *dest32); #endif *dest32 = (unsigned long)((*dest32) + ((unsigned long)(cofffile-> saddr[N_DATA - 1])) - cofffile->dataddr); + invariant = 1; + p->relocated = 1; ppc_flush_icache(dest32); break; case N_BSS: -#ifdef COFFDEBUG - COFFDEBUG("R_POS N_BSS\n"); - COFFDEBUG("dest32=%x\t", dest32); - COFFDEBUG("symval=%x\t", symval); - COFFDEBUG("*dest32=%8.8x\t", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_POS N_BSS\n"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%x\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", + *dest32); #endif *dest32 = (unsigned long)((*dest32) + (unsigned long)(cofffile-> saddr[N_BSS - 1]) - (cofffile->bssaddr)); + invariant = 1; + p->relocated = 1; ppc_flush_icache(dest32); break; default: ErrorF("R_POS with unexpected section %d\n", symbol->n_scnum); } } -#ifdef COFFDEBUG - COFFDEBUG("*dest32=%8.8x\t", *dest32); - COFFDEBUG("\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", *dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "\n"); #endif break; case R_TOC: @@ -704,20 +849,22 @@ dest16 = (unsigned short *)dest32; if (RELOC_RLEN(*rel) != 0x0f) FatalError("R_TOC with size != 16 bits"); -#ifdef COFFDEBUG - COFFDEBUG("R_TOC "); - COFFDEBUG("dest16=%x\t", dest16); - COFFDEBUG("symbol=%x\t", symbol); - COFFDEBUG("symbol->n_value=%x\t", symbol->n_value); - COFFDEBUG("cofffile->toc=%x\t", cofffile->toc); - COFFDEBUG("*dest16=%8.8x\t", *dest16); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_TOC "); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%x\t", dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symbol=%x\t", symbol); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symbol->n_value=%x\t", + symbol->n_value); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "cofffile->toc=%x\t", + cofffile->toc); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16); #endif *dest16 = (unsigned long)((symbol->n_value - cofffile->toc)); ppc_flush_icache(dest16); } -#ifdef COFFDEBUG - COFFDEBUG("*dest16=%8.8x\t", *dest16); - COFFDEBUG("\n"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "\n"); #endif break; case R_BR: @@ -734,35 +881,45 @@ symitem = LoaderHashFind(name); } if (symitem && cofffile->module != symitem->module) { -#ifdef COFFDEBUG - COFFDEBUG("Symbol module %d != file module %d\n", - symitem->module, cofffile->module); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Symbol module %d != file module %d\n", + symitem->module, cofffile->module); #endif symval = COFFGetSymbolGlinkValue(cofffile, rel->r_symndx); } else - symval = COFFGetSymbolValue(cofffile, rel->r_symndx); - if (symval == 0) { -#ifdef COFFDEBUG - char *name; - - COFFDEBUG("***Unable to resolve symbol %s\n", - name = COFFGetSymbolName(cofffile, rel->r_symndx)); - xf86loaderfree(name); -#endif - return COFFDelayRelocation(cofffile, secndx, rel); - } -#ifdef COFFDEBUG - COFFDEBUG("R_BR "); - COFFDEBUG("dest32=%x\t", dest32); - COFFDEBUG("symval=%x\t", symval); - COFFDEBUG("*dest32=%8.8x\t", *dest32); + symval = COFFGetSymbolValue(cofffile, rel->r_symndx, &invariant); + if (symval == NULL) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "***Unable to resolve symbol %s\n", + COFFGetSymbolName(cofffile, rel->r_symndx)); +#endif + symval = (unsigned char *)&LoaderDefaultFunc; + p->relocated = 0; + } else { + if (p->relocated) + return invariant; + else + p->relocated = 1; + } + if (p->symval == symval) { + /* Unchanged. */ + return invariant; + } else + p->symval = symval; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_BR "); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%x\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); #endif + resetDest32(p, dest32); { unsigned long val; val = ((unsigned long)symval - (unsigned long)dest32); -#ifdef COFFDEBUG - COFFDEBUG("val=%8.8x\n", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "val=%8.8x\n", val); #endif val = val >> 2; if ((val & 0x3f000000) != 0x3f000000 && @@ -771,8 +928,8 @@ break; } val &= 0x00ffffff; -#ifdef COFFDEBUG - COFFDEBUG("val=%8.8x\n", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "val=%8.8x\n", val); #endif /* * The address part contains the offset to the beginning @@ -780,8 +937,8 @@ * calculated the correct offset already. */ (*dest32) = ((*dest32) & 0xfc000003) | (val << 2); -#ifdef COFFDEBUG - COFFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); #endif if (cofffile->module != symitem->module) { (*++dest32) = 0x80410014; /* lwz r2,20(r1) */ @@ -796,7 +953,7 @@ rel->r_type); break; } - return 0; + return invariant; } static COFFRelocPtr @@ -836,15 +993,16 @@ AUXENT *aux = NULL; int i, l, numsyms; LOOKUP *lookup, *lookup_common, *p; - char *symname; + const char *symname; -/* - * Load the symbols into memory - */ + /* + * Load the symbols into memory + */ numsyms = cofffile->header->f_nsyms; -#ifdef COFFDEBUG - COFFDEBUG("COFF_GetSymbols(): %d symbols\n", numsyms); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "COFF_GetSymbols(): %d symbols\n", numsyms); #endif cofffile->symsize = (numsyms * SYMESZ); @@ -864,15 +1022,16 @@ ((i + 1) * SYMESZ)); else aux = NULL; -#ifdef COFFDEBUG - COFFDEBUG("\t%d %d %lx %x %d %d %s\n", - i, sym->n_scnum, sym->n_value, sym->n_type, - sym->n_sclass, sym->n_numaux, symname); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "\t%d %d %lx %x %d %d %s\n", + i, sym->n_scnum, sym->n_value, sym->n_type, + sym->n_sclass, sym->n_numaux, symname); if (aux) - COFFDEBUG("aux=\t%ld %lx %x %x %x %lx %x\n", - aux->x_scnlen, aux->x_parmhash, aux->x_snhash, - aux->x_smtyp, aux->x_smclas, aux->x_stab, - aux->x_snstab); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "aux=\t%ld %lx %x %x %x %lx %x\n", + aux->x_scnlen, aux->x_parmhash, aux->x_snhash, + aux->x_smtyp, aux->x_smclas, aux->x_stab, + aux->x_snstab); #endif i += sym->n_numaux; /* @@ -884,31 +1043,34 @@ cofffile->toc = sym->n_value; cofffile->tocaddr = (cofffile->saddr[sym->n_scnum - 1] + sym->n_value - (cofffile->dataddr)); -#ifdef COFFDEBUG - COFFDEBUG("TOC=%lx\n", cofffile->toc); - COFFDEBUG("TOCaddr=%p\n", cofffile->tocaddr); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "TOC=%lx\n", cofffile->toc); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "TOCaddr=%p\n", + cofffile->tocaddr); #endif continue; } if (sym->n_sclass == C_HIDEXT) { -/* +#if 0 && aux && !(aux->x_smclas == XMC_DS && aux->x_smtyp == XTY_SD) ) ) { -*/ -#ifdef COFFDEBUG - COFFDEBUG("Skipping C_HIDEXT class symbol %s\n", symname); +#endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Skipping C_HIDEXT class symbol %s\n", symname); #endif continue; } switch (sym->n_scnum) { case N_UNDEF: if (sym->n_value != 0) { - char *name; + const char *name; COFFCommonPtr tmp; name = COFFGetSymbolName(cofffile, i); -#ifdef COFFDEBUG - COFFDEBUG("Adding COMMON space for %s\n", name); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Adding COMMON space for %s\n", name); #endif if (!LoaderHashFind(name)) { tmp = COFFAddCOMMON(sym, i); @@ -917,35 +1079,34 @@ listCOMMON = tmp; } } - xf86loaderfree(name); } - xf86loaderfree(symname); break; case N_ABS: case N_DEBUG: case N_COMMENT: -#ifdef COFFDEBUG - COFFDEBUG("Freeing %s, section %d\n", symname, sym->n_scnum); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Freeing %s, section %d\n", symname, sym->n_scnum); #endif - xf86loaderfree(symname); break; case N_TEXT: if ((sym->n_sclass == C_EXT || sym->n_sclass == C_HIDEXT) && cofffile->saddr[sym->n_scnum - 1]) { - lookup[l].symName = symname; + lookup[l].symName = xf86loaderstrdup(symname); lookup[l].offset = (funcptr) (cofffile->saddr[sym->n_scnum - 1] + sym->n_value - cofffile->txtaddr); -#ifdef COFFDEBUG - COFFDEBUG("Adding %p %s\n", - (void *)lookup[l].offset, lookup[l].symName); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Adding %p %s\n", + (void *)lookup[l].offset, lookup[l].symName); #endif l++; } else { -#ifdef COFFDEBUG - COFFDEBUG("TEXT Section not loaded %d\n", sym->n_scnum - 1); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "TEXT Section not loaded %d\n", + sym->n_scnum - 1); #endif - xf86loaderfree(symname); } break; case N_DATA: @@ -959,20 +1120,21 @@ */ if ((sym->n_sclass == C_EXT || sym->n_sclass == C_HIDEXT) && cofffile->saddr[sym->n_scnum - 1]) { - lookup[l].symName = symname; + lookup[l].symName = xf86loaderstrdup(symname); lookup[l].offset = (funcptr) (cofffile->saddr[sym->n_scnum - 1] + sym->n_value - cofffile->dataddr); -#ifdef COFFDEBUG - COFFDEBUG("Adding %p %s\n", - (void *)lookup[l].offset, lookup[l].symName); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Adding %p %s\n", + (void *)lookup[l].offset, lookup[l].symName); #endif l++; } else { -#ifdef COFFDEBUG - COFFDEBUG("DATA Section not loaded %d\n", sym->n_scnum - 1); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "DATA Section not loaded %d\n", + sym->n_scnum - 1); #endif - xf86loaderfree(symname); } break; case N_BSS: @@ -986,25 +1148,25 @@ */ if ((sym->n_sclass == C_EXT || sym->n_sclass == C_HIDEXT) && cofffile->saddr[sym->n_scnum - 1]) { - lookup[l].symName = symname; + lookup[l].symName = xf86loaderstrdup(symname); lookup[l].offset = (funcptr) (cofffile->saddr[sym->n_scnum - 1] + sym->n_value - cofffile->bssaddr); -#ifdef COFFDEBUG - COFFDEBUG("Adding %p %s\n", - (void *)lookup[l].offset, lookup[l].symName); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Adding %p %s\n", + (void *)lookup[l].offset, lookup[l].symName); #endif l++; } else { -#ifdef COFFDEBUG - COFFDEBUG("BSS Section not loaded %d\n", sym->n_scnum - 1); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "BSS Section not loaded %d\n", + sym->n_scnum - 1); #endif - xf86loaderfree(symname); } break; default: ErrorF("Unknown Section number %d\n", sym->n_scnum); - xf86loaderfree(symname); break; } } @@ -1021,9 +1183,9 @@ lookup[l].symName = NULL; } -/* - * remove the COFF symbols that will show up in every module - */ + /* + * remove the COFF symbols that will show up in every module + */ for (i = 0, p = lookup; p->symName; i++, p++) { while (p->symName && (!strcmp(lookup[i].symName, ".text") || !strcmp(lookup[i].symName, ".data") @@ -1057,13 +1219,15 @@ * Find and identify all of the Sections */ -#ifdef COFFDEBUG - COFFDEBUG("COFFCollectSections(): %d sections\n", cofffile->numsh); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "COFFCollectSections(): %d sections\n", cofffile->numsh); #endif for (i = 0; i < cofffile->numsh; i++) { -#ifdef COFFDEBUG - COFFDEBUG("%d %s\n", i, cofffile->sections[i].s_name); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%d %s\n", + i, cofffile->sections[i].s_name); #endif /* .text */ if (strcmp(cofffile->sections[i].s_name, ".text") == 0) { @@ -1078,9 +1242,10 @@ cofffile->reladdr[i] = _LoaderFileToMem(cofffile->fd, RelOffset(i), RelSize(i), ".rel.text"); -#ifdef COFFDEBUG - COFFDEBUG(".text starts at %p (%x bytes)\n", cofffile->text, - cofffile->txtsize); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + ".text starts at %p (%x bytes)\n", cofffile->text, + cofffile->txtsize); #endif continue; } @@ -1097,9 +1262,10 @@ cofffile->reladdr[i] = _LoaderFileToMem(cofffile->fd, RelOffset(i), RelSize(i), ".rel.data"); -#ifdef COFFDEBUG - COFFDEBUG(".data starts at %p (%x bytes)\n", cofffile->data, - cofffile->datsize); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + ".data starts at %p (%x bytes)\n", cofffile->data, + cofffile->datsize); #endif continue; } @@ -1113,9 +1279,10 @@ cofffile->bssndx = i; cofffile->bssaddr = SecAddr(i); cofffile->bsssize = SecSize(i); -#ifdef COFFDEBUG - COFFDEBUG(".bss starts at %p (%x bytes)\n", cofffile->bss, - cofffile->bsssize); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + ".bss starts at %p (%x bytes)\n", + cofffile->bss, cofffile->bsssize); #endif continue; } @@ -1151,11 +1318,10 @@ FILHDR *header; int stroffset; /* offset of string table */ COFFRelocPtr coff_reloc, tail; - void *v; -#ifdef COFFDEBUG - COFFDEBUG("COFFLoadModule(%s,%x,%x)\n", modrec->name, modrec->handle, - cofffd); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_FILES, "COFFLoadModule(%s,%x,%x)\n", + modrec->name, modrec->handle, cofffd); #endif if ((cofffile = xf86loadercalloc(1, sizeof(COFFModuleRec))) == NULL) { @@ -1166,11 +1332,11 @@ cofffile->handle = modrec->handle; cofffile->module = modrec->module; cofffile->fd = cofffd; - v = cofffile->funcs = modrec->funcs; + cofffile->desc = modrec->desc; -/* - * Get the COFF header - */ + /* + * Get the COFF header + */ cofffile->header = (FILHDR *) _LoaderFileToMem(cofffd, 0, sizeof(FILHDR), "header"); header = (FILHDR *) cofffile->header; @@ -1181,9 +1347,9 @@ xf86loaderfree(cofffile); return NULL; } -/* - * Get the section table - */ + /* + * Get the section table + */ cofffile->numsh = header->f_nscns; cofffile->secsize = (header->f_nscns * SCNHSZ); cofffile->sections = @@ -1194,18 +1360,18 @@ cofffile->reladdr = xf86loadercalloc(cofffile->numsh, sizeof(unsigned char *)); -/* - * Load the optional header if we need it ????? - */ + /* + * Load the optional header if we need it ????? + */ -/* - * Load the rest of the desired sections - */ + /* + * Load the rest of the desired sections + */ COFFCollectSections(cofffile); -/* - * load the string table (must be done before we process symbols). - */ + /* + * load the string table (must be done before we process symbols). + */ stroffset = header->f_symptr + (header->f_nsyms * SYMESZ); _LoaderFileRead(cofffd, stroffset, &(cofffile->strsize), sizeof(int)); @@ -1215,65 +1381,71 @@ cofffile->strtab = _LoaderFileToMem(cofffd, stroffset, cofffile->strsize, "strings"); -/* - * add symbols - */ + /* + * add symbols + */ *ppLookup = COFF_GetSymbols(cofffile); -/* - * Do relocations - */ + /* + * Do relocations + */ coff_reloc = COFFCollectRelocations(cofffile); if (coff_reloc) { for (tail = coff_reloc; tail->next; tail = tail->next) ; - tail->next = _LoaderGetRelocations(v)->coff_reloc; - _LoaderGetRelocations(v)->coff_reloc = coff_reloc; + tail->next = *_LoaderGetRelocations(cofffile->desc); + *_LoaderGetRelocations(cofffile->desc) = coff_reloc; } return (void *)cofffile; } void -COFFResolveSymbols(void *mod) +COFFResolveSymbols(LoaderDescPtr desc, int handle) { - COFFRelocPtr newlist, p, tmp; + COFFRelocPtr p, *pp, tmp; /* Try to relocate everything. Build a new list containing entries * which we failed to relocate. Destroy the old list in the process. */ - newlist = 0; - for (p = _LoaderGetRelocations(mod)->coff_reloc; p;) { - tmp = COFF_RelocateEntry(p->file, p->secndx, p->rel); - if (tmp) { - /* Failed to relocate. Keep it in the list. */ - tmp->next = newlist; - newlist = tmp; + pp = (COFFRelocPtr *)_LoaderGetRelocations(desc); + for (p = *_LoaderGetRelocations(desc); p;) { + /* If handle is valid, only relocate symbols for that module. */ + if (handle >= 0 && p->file->handle != handle) { + pp = &(p->next); + p = p->next; + continue; + } + + if (COFF_RelocateEntry(p)) { + /* + * Remove invariant relocations, since they can't change when + * other moduled are loaded or unloaded. + */ + *pp = p->next; + tmp = p; + p = p->next; + xf86loaderfree(tmp); + } else { + pp = &(p->next); + p = p->next; } - tmp = p; - p = p->next; - xf86loaderfree(tmp); } - _LoaderGetRelocations(mod)->coff_reloc = newlist; } int -COFFCheckForUnresolved(void *mod) +COFFCheckForUnresolved(LoaderDescPtr desc) { - char *name; + const char *name; COFFRelocPtr crel; - int flag, fatalsym = 0; + int fatalsym = 0; - if ((crel = _LoaderGetRelocations(mod)->coff_reloc) == NULL) + if ((crel = *_LoaderGetRelocations(desc)) == NULL) return 0; while (crel) { name = COFFGetSymbolName(crel->file, crel->rel->r_symndx); - flag = _LoaderHandleUnresolved(name, - _LoaderHandleToName(crel->file-> - handle)); - if (flag) + if (_LoaderHandleUnresolved(name, crel->file->handle)) fatalsym = 1; - xf86loaderfree(name); crel = crel->next; } return fatalsym; @@ -1285,12 +1457,12 @@ COFFModulePtr cofffile = (COFFModulePtr) modptr; COFFRelocPtr relptr, reltptr, *brelptr; -/* - * Delete any unresolved relocations - */ + /* + * Delete any unresolved relocations + */ - relptr = _LoaderGetRelocations(cofffile->funcs)->coff_reloc; - brelptr = &(_LoaderGetRelocations(cofffile->funcs)->coff_reloc); + relptr = *_LoaderGetRelocations(cofffile->desc); + brelptr = (COFFRelocPtr *)_LoaderGetRelocations(cofffile->desc); while (relptr) { if (relptr->file == cofffile) { @@ -1304,15 +1476,15 @@ } } -/* - * Delete any symbols in the symbols table. - */ + /* + * Delete any symbols in the symbols table. + */ LoaderHashTraverse((void *)cofffile, COFFhashCleanOut); -/* - * Free the sections that were allocated. - */ + /* + * Free the sections that were allocated. + */ #define CheckandFree(ptr,size) if(ptr) _LoaderFreeFileMem((ptr),(size)) CheckandFree(cofffile->strtab, cofffile->strsize); @@ -1324,16 +1496,16 @@ CheckandFree(cofffile->bss, cofffile->bsssize); if (cofffile->common) xf86loaderfree(cofffile->common); -/* - * Free the section table, and section pointer array - */ + /* + * Free the section table, and section pointer array + */ _LoaderFreeFileMem(cofffile->sections, cofffile->secsize); xf86loaderfree(cofffile->saddr); xf86loaderfree(cofffile->reladdr); _LoaderFreeFileMem(cofffile->header, sizeof(FILHDR)); -/* - * Free the COFFModuleRec - */ + /* + * Free the COFFModuleRec + */ xf86loaderfree(cofffile); return; @@ -1345,7 +1517,7 @@ COFFModulePtr cofffile = (COFFModulePtr) modptr; int i; - for (i = 1; i < cofffile->numsh; i++) { + for (i = 0; i < cofffile->numsh; i++) { if (address >= (unsigned long)cofffile->saddr[i] && address <= (unsigned long)cofffile->saddr[i] + SecSize(i)) { return cofffile->sections[i].s_name; @@ -1353,3 +1525,101 @@ } return NULL; } + +const char * +COFFFindRelocName(LoaderDescPtr desc, int handle, unsigned long addr) +{ + COFFRelocPtr p; + long diff; + + for (p = *_LoaderGetRelocations(desc); p;) { + /* If handle is valid, only relocate symbols for that module. */ + if (handle >= 0 && p->file->handle != handle) { + p = p->next; + continue; + } + + diff = addr - ((long)(p->file->saddr[p->secndx]) + + (p->rel->r_vaddr - p->file->txtaddr)); + if (diff < 8 && diff > -8) { + return COFFGetSymbolName(p->file, p->rel->r_symndx); + } + p = p->next; + } + return NULL; +} + +const char * +COFFAddressToSymbol(void *modptr, unsigned long addr, unsigned long *symaddr, + const char **filename, int exe) +{ + COFFModulePtr cofffile; + FILHDR *header; + SYMENT *syms, *sym; + int i, numsyms; + long bestDiff = MAXINT, diff; + const char *best = NULL; + unsigned long saddr = 0, bestAddr = 0; + + if (!modptr) + return NULL; + else + cofffile = (COFFModulePtr)modptr; + + header = cofffile->header; + syms = cofffile->symtab; + numsyms = cofffile->header->f_nsyms; + for (i = 0; i < numsyms; i++) { + sym = (SYMENT *)((unsigned char *)syms + i * SYMESZ); + switch (sym->n_scnum) { + case N_TEXT: + case N_DATA: + case N_BSS: + if (cofffile->saddr[sym->n_scnum - 1]) { + saddr = (unsigned long)cofffile->saddr[sym->n_scnum - 1] + sym->n_value; + switch (sym->n_scnum) { + case N_TEXT: + saddr -= cofffile->txtaddr; + break; + case N_DATA: + saddr -= cofffile->dataddr; + break; + case N_BSS: + saddr -= cofffile->bssaddr; + break; + } + } + break; + default: + saddr = 0; + break; + } + + if (!saddr) + continue; + + diff = addr - saddr; + if (diff >= 0) { + if ((best && diff < bestDiff) || !best) { + best = COFFGetSymbolName(cofffile, i); + bestDiff = diff; + bestAddr = saddr; + } + } + } + *filename = NULL; + if (best && bestDiff < 0x10000) { + *symaddr = bestAddr; + return best; + } else { + return NULL; + } +} + +void * +COFFReadExecutableSyms(int fd) +{ + /* TODO */ + return NULL; +} + Index: xc/programs/Xserver/hw/xfree86/loader/coffloader.h diff -u xc/programs/Xserver/hw/xfree86/loader/coffloader.h:1.4 xc/programs/Xserver/hw/xfree86/loader/coffloader.h:1.6 --- xc/programs/Xserver/hw/xfree86/loader/coffloader.h:1.4 Wed Oct 15 12:29:02 2003 +++ xc/programs/Xserver/hw/xfree86/loader/coffloader.h Thu Mar 16 11:50:34 2006 @@ -21,14 +21,22 @@ * PERFORMANCE OF THIS SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/coffloader.h,v 1.4 2003/10/15 16:29:02 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/coffloader.h,v 1.6 2006/03/16 16:50:34 dawes Exp $ */ #ifndef _COFFLOADER_H #define _COFFLOADER_H + +typedef struct _coff_reloc *COFFRelocPtr; +typedef struct _coff_COMMON *COFFCommonPtr; + /* coffloader.c */ extern void *COFFLoadModule(loaderPtr, int, LOOKUP **); -extern void COFFResolveSymbols(void *); -extern int COFFCheckForUnresolved(void *); +extern void COFFResolveSymbols(LoaderDescPtr, int); +extern int COFFCheckForUnresolved(LoaderDescPtr); extern char *COFFAddressToSection(void *, unsigned long); extern void COFFUnloadModule(void *); +extern const char *COFFFindRelocName(LoaderDescPtr, int, unsigned long); +extern const char *COFFAddressToSymbol(void *, unsigned long, unsigned long *, + const char **, int); +extern void *COFFReadExecutableSyms(int); #endif /* _COFFLOADER_H */ Index: xc/programs/Xserver/hw/xfree86/loader/dixsym.c diff -u xc/programs/Xserver/hw/xfree86/loader/dixsym.c:1.68 xc/programs/Xserver/hw/xfree86/loader/dixsym.c:1.71 --- xc/programs/Xserver/hw/xfree86/loader/dixsym.c:1.68 Wed Feb 2 21:01:14 2005 +++ xc/programs/Xserver/hw/xfree86/loader/dixsym.c Wed Mar 1 22:00:38 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/dixsym.c,v 1.68 2005/02/03 02:01:14 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/dixsym.c,v 1.71 2006/03/02 03:00:38 dawes Exp $ */ /* * Copyright 1995-1998 by Metro Link, Inc. @@ -22,7 +22,7 @@ * PERFORMANCE OF THIS SOFTWARE. */ /* - * Copyright (c) 1997-2005 by The XFree86 Project, Inc. + * Copyright (c) 1997-2006 by The XFree86 Project, Inc. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining @@ -90,7 +90,7 @@ #include "swaprep.h" #include "swapreq.h" #include "inputstr.h" -#include "XIproto.h" +#include #include "exevents.h" #include "extinit.h" #ifdef XV @@ -174,10 +174,10 @@ SYMFUNC(QueueWorkProc) SYMFUNC(RegisterBlockAndWakeupHandlers) SYMFUNC(RemoveBlockAndWakeupHandlers) -#ifdef XCSECURITY SYMFUNC(SecurityLookupDrawable) SYMFUNC(SecurityLookupWindow) -#endif + SYMFUNC(SecurityVerifyDrawable) + SYMFUNC(SecurityVerifyGC) /* events.c */ SYMFUNC(CheckCursorConfinement) SYMFUNC(DeliverEvents) @@ -227,11 +227,13 @@ SYMVAR(defaultDPMSEnabled) /* bigreq */ SYMVAR(maxBigRequestSize) -#ifdef XV /* XXX These are exported from the DDX, not DIX. */ +#ifdef XV SYMVAR(XvScreenInitProc) SYMVAR(XvGetScreenIndexProc) SYMVAR(XvGetRTPortProc) +#endif +#ifdef XVMC SYMVAR(XvMCScreenInitProc) #endif SYMVAR(ScreenSaverBlanking) @@ -249,6 +251,7 @@ SYMVAR(serverGeneration) /* main.c */ SYMFUNC(NotImplemented) + SYMFUNC(IsXineramaActive) /* pixmap.c */ SYMFUNC(AllocatePixmap) SYMFUNC(GetScratchPixmapHeader) @@ -280,10 +283,8 @@ SYMFUNC(LookupIDByType) SYMFUNC(LookupIDByClass) SYMFUNC(LegalNewID) -#ifdef XCSECURITY SYMFUNC(SecurityLookupIDByClass) SYMFUNC(SecurityLookupIDByType) -#endif SYMFUNC(FindClientResourcesByType) SYMFUNC(FindAllClientResources) SYMVAR(lastResourceType) @@ -427,5 +428,5 @@ SYMFUNC(PictureSetSubpixelOrder) #endif - {0, 0} + LOOKUP_TERMINATOR }; Index: xc/programs/Xserver/hw/xfree86/loader/dlloader.c diff -u xc/programs/Xserver/hw/xfree86/loader/dlloader.c:1.14 xc/programs/Xserver/hw/xfree86/loader/dlloader.c:1.19 --- xc/programs/Xserver/hw/xfree86/loader/dlloader.c:1.14 Fri Feb 13 18:58:44 2004 +++ xc/programs/Xserver/hw/xfree86/loader/dlloader.c Mon Apr 3 14:08:03 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/dlloader.c,v 1.14 2004/02/13 23:58:44 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/dlloader.c,v 1.19 2006/04/03 18:08:03 dawes Exp $ */ /* * Copyright (c) 1997 The XFree86 Project, Inc. @@ -46,12 +46,83 @@ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* + * Copyright 2003-2006 by David H. Dawes. + * Copyright 2003-2006 by X-Oz Technologies. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. The end-user documentation included with the redistribution, + * if any, must include the following acknowledgment: "This product + * includes software developed by X-Oz Technologies + * (http://www.x-oz.com/)." Alternately, this acknowledgment may + * appear in the software itself, if and wherever such third-party + * acknowledgments normally appear. + * + * 4. Except as contained in this notice, the name of X-Oz + * Technologies shall not be used in advertising or otherwise to + * promote the sale, use or other dealings in this Software without + * prior written authorization from X-Oz Technologies. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL X-OZ TECHNOLOGIES OR ITS CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ #include #include #include -#include "Xos.h" +#ifdef sgi +/* + * From the IRIX dladdr manpage: + * + * " does not contain a prototype for dladdr or definition of Dl_info. + * The #include in the SYNOPSIS line is traditional, but contains no + * dladdr prototype and no IRIX library contains an implementation. Write your + * own declaration based on the code below. + * + * The following code is dependent on internal interfaces that are not part of + * the IRIX compatibility guarantee; however, there is no future intention to + * change this interface, so on a practical level, the code below is safe to + * use on IRIX." + * + * The following is adapted from the sample code the manpage contains. + */ +#include + +static int dladdr(void *address, Dl_info *dl) +{ + void *v = _rld_new_interface(_RLD_DLADDR,address,dl); + return (long)v; +} + +#endif + +#include #include "os.h" #include "sym.h" @@ -174,18 +245,6 @@ } void -DLResolveSymbols(void *mod) -{ - return; -} - -int -DLCheckForUnresolved(void *mod) -{ - return 0; -} - -void DLUnloadModule(void *modptr) { DLModulePtr dlfile = (DLModulePtr) modptr; @@ -210,3 +269,27 @@ dlclose(dlfile->dlhandle); xf86loaderfree(modptr); } + +const char * +DLAddressToSymbol(void *mod, unsigned long addr, unsigned long *symaddr, + const char **filename, int exe) +{ +#ifdef HAVE_DLADDR + static Dl_info info; + int ret; + + ret = dladdr((void *)addr, &info); + if (ret) { + *symaddr = (unsigned long)info.dli_saddr; + *filename = info.dli_fname; +#ifdef NEED_UNDERSCORE_FOR_DLLSYM + return info.dli_sname + 1; +#else + return info.dli_sname; +#endif + } +#endif + + return NULL; +} + Index: xc/programs/Xserver/hw/xfree86/loader/dlloader.h diff -u xc/programs/Xserver/hw/xfree86/loader/dlloader.h:1.3 xc/programs/Xserver/hw/xfree86/loader/dlloader.h:1.8 --- xc/programs/Xserver/hw/xfree86/loader/dlloader.h:1.3 Sun Sep 20 10:41:04 1998 +++ xc/programs/Xserver/hw/xfree86/loader/dlloader.h Sun May 7 22:54:57 2006 @@ -19,14 +19,32 @@ * PERFORMANCE OF THIS SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/dlloader.h,v 1.3 1998/09/20 14:41:04 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/dlloader.h,v 1.8 2006/05/08 02:54:57 dawes Exp $ */ #ifndef _DLLOADER_H #define _DLLOADER_H + +#ifdef __OpenBSD__ +/* Get OpenBSD macro. dladdr support starts with 3.6 (200411) */ +#include +#endif + +#ifdef linux +#include +#endif + +#if (defined(linux) && defined(__GLIBC__)) || \ + (defined(__FreeBSD__) && defined(__ELF__)) || \ + defined(__NetBSD__) || \ + (defined(__OpenBSD__) && defined(OpenBSD) && OpenBSD >= 200411) || \ + (defined(sun) && defined(SVR4)) || \ + defined(sgi) +#define HAVE_DLADDR +#endif + extern void *DLLoadModule(loaderPtr, int, LOOKUP **); -extern void DLResolveSymbols(void *); -extern int DLCheckForUnresolved(void *); extern void DLUnloadModule(void *); extern void *DLFindSymbol(const char *name); - +extern const char *DLAddressToSymbol(void *, unsigned long, unsigned long *, + const char **, int); #endif Index: xc/programs/Xserver/hw/xfree86/loader/elfloader.c diff -u xc/programs/Xserver/hw/xfree86/loader/elfloader.c:1.63 xc/programs/Xserver/hw/xfree86/loader/elfloader.c:1.71 --- xc/programs/Xserver/hw/xfree86/loader/elfloader.c:1.63 Thu Jan 27 21:11:19 2005 +++ xc/programs/Xserver/hw/xfree86/loader/elfloader.c Sat Apr 8 13:53:39 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/elfloader.c,v 1.63 2005/01/28 02:11:19 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/elfloader.c,v 1.71 2006/04/08 17:53:39 dawes Exp $ */ /* * @@ -69,6 +69,52 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* + * Copyright 2003-2006 by David H. Dawes. + * Copyright 2003-2006 by X-Oz Technologies. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. The end-user documentation included with the redistribution, + * if any, must include the following acknowledgment: "This product + * includes software developed by X-Oz Technologies + * (http://www.x-oz.com/)." Alternately, this acknowledgment may + * appear in the software itself, if and wherever such third-party + * acknowledgments normally appear. + * + * 4. Except as contained in this notice, the name of X-Oz + * Technologies shall not be used in advertising or otherwise to + * promote the sale, use or other dealings in this Software without + * prior written authorization from X-Oz Technologies. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL X-OZ TECHNOLOGIES OR ITS CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ + #include #ifndef __UNIXOS2__ #include @@ -84,6 +130,7 @@ #if defined(linux) && defined (__ia64__) #include #endif +#include #ifdef DBMALLOC # include @@ -92,21 +139,21 @@ # define Xfree(size) free(size) #endif -#include "Xos.h" +#include #include "os.h" #include "elf.h" - #include "sym.h" -#include "loader.h" - -#include "compiler.h" #ifndef LOADERDEBUG #define LOADERDEBUG 0 #endif +#include "loader.h" +#include "elfloader.h" -#if LOADERDEBUG -# define ELFDEBUG ErrorF +#include "compiler.h" + +#ifndef EXESYMDEBUG +#define EXESYMDEBUG (0 && LOADERDEBUG) #endif #if defined(__ia64__) @@ -184,7 +231,7 @@ # if !defined(linux) # error No MAP_ANON? # endif -# if !defined (__AMD64__) || !defined(__linux__) +# if !(defined (__amd64__) || defined(__x86_64__)) || !defined(__linux__) # define MMAP_FLAGS (MAP_PRIVATE | MAP_ANON) # else # define MMAP_FLAGS (MAP_PRIVATE | MAP_ANON | MAP_32BIT) @@ -202,7 +249,8 @@ #if defined (__alpha__) || \ defined (__ia64__) || \ - defined (__AMD64__) || \ + defined (__amd64__) || \ + defined (__x86_64__) || \ (defined (__sparc__) && \ (defined (__arch64__) || \ defined (__sparcv9))) @@ -220,7 +268,17 @@ #define ELF_ST_BIND ELF64_ST_BIND #define ELF_ST_TYPE ELF64_ST_TYPE #define ELF_R_SYM ELF64_R_SYM + +#if !defined(__sparcv9) #define ELF_R_TYPE ELF64_R_TYPE +#else +/* + * bfd says: Relocations in the 64 bit SPARC ELF ABI are more complex + * than in standard ELF, because R_SPARC_OLO10 has secondary addend in + * ELF64_R_TYPE_DATA field. + */ +#define ELF_R_TYPE(info) ((info) & 0xff) +#endif # if defined (__alpha__) || defined (__ia64__) /* @@ -294,7 +352,8 @@ defined(__alpha__) || \ defined(__sparc__) || \ defined(__ia64__) || \ - defined(__AMD64__) + defined(__amd64__) || \ + defined(__x86_64__) typedef Elf_Rela Elf_Rel_t; #else typedef Elf_Rel Elf_Rel_t; @@ -316,11 +375,19 @@ * that has been loaded. */ +#if defined(__powerpc__) +typedef struct { + unsigned long relinfo; + unsigned short code[8]; + void *address; +} pltentry; +#endif + typedef struct { int handle; int module; int fd; - loader_funcs *funcs; + LoaderDescPtr desc; Elf_Ehdr *header; /* file header */ int numsh; Elf_Shdr *sections; /* Address of the section header table */ @@ -343,6 +410,10 @@ int pltndx; /* index of the .plt section */ int pltsize; /* size of the .plt section */ #endif /*__ia64__*/ +#if defined(__powerpc__) + pltentry *plt; /* Start of pseudo PLT */ + int numplt; /* number of PLT entries */ +#endif Elf_Sym *symtab; /* Start address of the .symtab section */ int symndx; /* index of the .symtab section */ unsigned char *common; /* Start address of the SHN_COMMON space */ @@ -362,10 +433,39 @@ * If a relocation is unable to be satisfied, then put it on a list * to try later after more modules have been loaded. */ +typedef union { +#if !defined(__ia64__) + unsigned int d32; +#endif +#if defined(__powerpc__) || defined(__sparc__) + unsigned short d16; +#endif +#if defined(__sparc__) + unsigned char d8; + unsigned long d64; +#endif +#if defined(__alpha) + unsigned long d64; + unsigned short d16; +#endif +#if defined(__amd64__) || defined(__x86_64__) + unsigned long d64; + int d32s; +#endif +#if defined(__ia64__) + unsigned long d64; + unsigned long d128[2]; +#endif +} relocData; + typedef struct _elf_reloc { Elf_Rel_t *rel; ELFModulePtr file; Elf_Word secn; + int relocated; + Elf_Addr symval; + int assigned; + relocData olddata; struct _elf_reloc *next; } ELFRelocRec; @@ -391,11 +491,10 @@ static ELFCommonPtr ElfAddCOMMON(Elf_Sym *); static int ElfCOMMONSize(void); static int ElfCreateCOMMON(ELFModulePtr, LOOKUP *); -static char *ElfGetSymbolNameIndex(ELFModulePtr, int, int); -static char *ElfGetSymbolName(ELFModulePtr, int); -static Elf_Addr ElfGetSymbolValue(ELFModulePtr, int); -static ELFRelocPtr Elf_RelocateEntry(ELFModulePtr, Elf_Word, Elf_Rel_t *, - int); +static const char *ElfGetSymbolNameIndex(ELFModulePtr, int, int); +static const char *ElfGetSymbolName(ELFModulePtr, int); +static Elf_Addr ElfGetSymbolValue(ELFModulePtr, int, int *); +static int Elf_RelocateEntry(ELFRelocPtr); static ELFRelocPtr ELFCollectRelocations(ELFModulePtr, int); static LOOKUP *ELF_GetSymbols(ELFModulePtr, unsigned short **); static void ELFCollectSections(ELFModulePtr, int, int *, int *); @@ -416,6 +515,9 @@ }; static void IA64InstallReloc(unsigned long *, int, enum ia64_operand, long); #endif /*__ia64__*/ +#if defined(__powerpc__) +static void ELFCreatePLT(ELFModulePtr); +#endif #ifdef MergeSectionAlloc static void * @@ -435,10 +537,22 @@ ELFLoaderSectCalloc(ELFModulePtr elffile, int align, int size) { void *ret; + unsigned long newbaseptr; - elffile->baseptr = (elffile->baseptr + align - 1) & ~(align - 1); - ret = (void *)elffile->baseptr; - elffile->baseptr += size; + newbaseptr = (elffile->baseptr + align - 1) & ~(align - 1); + ret = (void *)newbaseptr; + newbaseptr += size; + if (newbaseptr > (unsigned long)elffile->base + elffile->basesize) { + ErrorF("ELFLoaderSectCalloc: need to grow base (0x%lx, 0x%lx).\n", + newbaseptr, (unsigned long)elffile->base + elffile->basesize); + /* + * Cannot grow the area without the possibility of it moving. + * This shouldn't happen anyway, since all space should be reserved + * before ever calling this function. + */ + return NULL; + } + elffile->baseptr = newbaseptr; #ifndef DoMMAPedMerge memset(ret, 0, size); /* mmap() does this for us */ #endif @@ -477,21 +591,28 @@ reloc->file = elffile; reloc->secn = secn; reloc->rel = rel; - reloc->next = 0; -#ifdef ELFDEBUG - ELFDEBUG("ElfDelayRelocation %p: file %p, sec %d," + reloc->relocated = 0; + reloc->symval = 0; + reloc->assigned = 0; + memset(&reloc->olddata, 0, sizeof(reloc->olddata)); + reloc->next = NULL; + +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "ElfDelayRelocation %p: file %p, sec %d," " r_offset 0x%lx, r_info 0x%x", (void *)reloc, (void *)elffile, secn, - (unsigned long)rel->r_offset, rel->r_info); + (unsigned long)rel->r_offset, (int)rel->r_info); # if defined(__powerpc__) || \ defined(__mc68000__) || \ defined(__alpha__) || \ defined(__sparc__) || \ defined(__ia64__) || \ - defined(__AMD64__) - ELFDEBUG(", r_addend 0x%lx", rel->r_addend); + defined(__amd64__) || \ + defined(__x86_64__) + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, ", r_addend 0x%lx", rel->r_addend); # endif - ELFDEBUG("\n"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "\n"); #endif return reloc; } @@ -523,7 +644,8 @@ size += common->sym->st_size; #if defined(__alpha__) || \ defined(__ia64__) || \ - defined(__AMD64__) || \ + defined(__amd64__) || \ + defined(__x86_64__) || \ (defined(__sparc__) && \ (defined(__arch64__) || \ defined(__sparcv9))) @@ -547,7 +669,8 @@ size += common->sym->st_size; #if defined(__alpha__) || \ defined(__ia64__) || \ - defined(__AMD64__) || \ + defined(__amd64__) || \ + defined(__x86_64__) || \ (defined(__sparc__) && \ (defined(__arch64__) || \ defined(__sparcv9))) @@ -556,8 +679,9 @@ numsyms++; } -#ifdef ELFDEBUG - ELFDEBUG("ElfCreateCOMMON() %d entries (%d bytes) of COMMON data\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "ElfCreateCOMMON() %d entries (%d bytes) of COMMON data\n", numsyms, size); #endif @@ -587,8 +711,9 @@ pLookup[l].symName = xf86loaderstrdup(ElfGetString(elffile, common->sym->st_name)); pLookup[l].offset = (funcptr) (elffile->common + offset); -#ifdef ELFDEBUG - ELFDEBUG("Adding common %p %s\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Adding common %p %s\n", (void *)pLookup[l].offset, pLookup[l].symName); #endif @@ -602,7 +727,8 @@ offset += common->sym->st_size; #if defined(__alpha__) || \ defined(__ia64__) || \ - defined(__AMD64__) || \ + defined(__amd64__) || \ + defined(__x86_64__) || \ (defined(__sparc__) && \ (defined(__arch64__) || \ defined(__sparcv9))) @@ -647,35 +773,39 @@ /* * Get symbol name */ -static char * +static const char * ElfGetSymbolNameIndex(ELFModulePtr elffile, int index, int secndx) { Elf_Sym *syms; -#ifdef ELFDEBUG - ELFDEBUG("ElfGetSymbolNameIndex(%x,%x) ", index, secndx); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "ElfGetSymbolNameIndex(%x,%x) ", index, secndx); #endif syms = (Elf_Sym *) elffile->saddr[secndx]; -#ifdef ELFDEBUG - ELFDEBUG("%s ", ElfGetString(elffile, syms[index].st_name)); - ELFDEBUG("%x %x ", ELF_ST_BIND(syms[index].st_info), +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "%s ", ElfGetString(elffile, syms[index].st_name)); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "%x %x ", ELF_ST_BIND(syms[index].st_info), ELF_ST_TYPE(syms[index].st_info)); - ELFDEBUG("%lx\n", (unsigned long)syms[index].st_value); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "%lx\n", (unsigned long)syms[index].st_value); #endif return ElfGetString(elffile, syms[index].st_name); } -static char * +static const char * ElfGetSymbolName(ELFModulePtr elffile, int index) { return ElfGetSymbolNameIndex(elffile, index, elffile->symndx); } static Elf_Addr -ElfGetSymbolValue(ELFModulePtr elffile, int index) +ElfGetSymbolValue(ELFModulePtr elffile, int index, int *pInvariant) { Elf_Sym *syms; Elf_Addr symval = 0; /* value of the indicated symbol */ @@ -709,16 +839,24 @@ } } #endif + if (pInvariant) + *pInvariant = 1; break; case STB_GLOBAL: case STB_WEAK: /* STB_WEAK seems like a hack to cover for * some other problem */ symname = ElfGetString(elffile, syms[index].st_name); symbol = LoaderHashFind(symname); - if (symbol == 0) { + if (symbol == NULL || + !SCOPE_OK(symbol, elffile->handle, LOOKUP_SCOPE_GLOBAL)) { return 0; } symval = (Elf_Addr) symbol->address; + if (pInvariant) { + *pInvariant = ((symbol->handle == elffile->handle) || + (symbol->scope & LOOKUP_SCOPE_BUILTIN)); + } + break; default: symval = 0; @@ -726,17 +864,21 @@ ELF_ST_BIND(syms[index].st_info)); break; } -#ifdef ELFDEBUG - ELFDEBUG("%p\t", (void *)symbol); - ELFDEBUG("%lx\t", (unsigned long)symval); - ELFDEBUG("%s\n", symname ? symname : "NULL"); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%p\t", (void *)symbol); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%lx\t", (unsigned long)symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "%s\n", symname ? symname : "NULL"); #endif break; case STT_SECTION: symval = (Elf_Addr) elffile->saddr[syms[index].st_shndx]; -#ifdef ELFDEBUG - ELFDEBUG("ST_SECTION %lx\n", (unsigned long)symval); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "ST_SECTION %lx\n", (unsigned long)symval); #endif + if (pInvariant) + *pInvariant = 1; break; case STT_FILE: case STT_LOPROC: @@ -759,12 +901,14 @@ * will be within a 24 bit offset (non-PIC code). */ static Elf_Addr -ElfGetPltAddr(ELFModulePtr elffile, int index) +ElfGetPLTAddr(ELFModulePtr elffile, int index) { Elf_Sym *syms; Elf_Addr symval = 0; /* value of the indicated symbol */ char *symname = NULL; /* name of symbol in relocation */ itemPtr symbol; /* name/value of symbol */ + pltentry *plt; + int i; syms = (Elf_Sym *) elffile->saddr[elffile->symndx]; @@ -776,8 +920,50 @@ case STB_GLOBAL: symname = ElfGetString(elffile, syms[index].st_name); symbol = LoaderHashFind(symname); - if (symbol == 0) + if (symbol == NULL) { + symname = "LoaderDefaultFunc"; + symbol = LoaderHashFind(symname); + } + if (symbol == NULL || + !SCOPE_OK(symbol, elffile->handle, LOOKUP_SCOPE_GLOBAL)) return 0; + + for (i = 0; i < elffile->numplt; i++) { + plt = elffile->plt + i; + if (plt->address && plt->relinfo == index) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_PLT, + "already created entry for index %d (%d)\n", + index, i); +#endif + /* PLT entry created. */ + if (symbol->address == plt->address) { + /* PLT entry points to the same place. */ + symval = (Elf_Addr)&plt->code[0]; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_PLT, + "PLT entry for index %d has address " + "unchanged (%p)\n", index, plt->address); +#endif + break; + } + } else if (plt->address) { + continue; + } +#if LOADERDEBUG + if (plt->address) + LoaderDebugMsg(LOADER_DEBUG_PLT, + "PLT entry for index %d has changed " + "address (%p -> %p)\n", + index, plt->address, symbol->address); + else + LoaderDebugMsg(LOADER_DEBUG_PLT, + "New PLT entry for index %d (%d) " + "address %p\n", + index, i, symbol->address); +#endif + plt->relinfo = index; + plt->address = symbol->address; /* * Here we are building up a pseudo Plt function that can make a call to * a function that has an offset greater than 24 bits. The following code @@ -793,31 +979,39 @@ */ - symbol->code.plt[0] = 0x3d80; /* lis r12 */ - symbol->code.plt[1] = - (((Elf_Addr) symbol->address) & 0xffff0000) >> 16; - symbol->code.plt[2] = 0x618c; /* ori r12,r12 */ - symbol->code.plt[3] = (((Elf_Addr) symbol->address) & 0xffff); - symbol->code.plt[4] = 0x7d89; /* mtcr r12 */ - symbol->code.plt[5] = 0x03a6; - symbol->code.plt[6] = 0x4e80; /* bctr */ - symbol->code.plt[7] = 0x0420; - symbol->address = (char *)&symbol->code.plt[0]; - symval = (Elf_Addr) symbol->address; - ppc_flush_icache(&symbol->code.plt[0]); - ppc_flush_icache(&symbol->code.plt[6]); + plt->code[0] = 0x3d80; /* lis r12 */ + plt->code[1] = + (((Elf_Addr) symbol->address) & 0xffff0000) >> 16; + plt->code[2] = 0x618c; /* ori r12,r12 */ + plt->code[3] = (((Elf_Addr) symbol->address) & 0xffff); + plt->code[4] = 0x7d89; /* mtcr r12 */ + plt->code[5] = 0x03a6; + plt->code[6] = 0x4e80; /* bctr */ + plt->code[7] = 0x0420; + ppc_flush_icache(&plt->code[0]); + ppc_flush_icache(&plt->code[6]); + symval = (Elf_Addr)&plt->code[0]; + break; + } + if (i == elffile->numplt) { + /* This should not happen. */ + ErrorF("ElfGetPLTAddr(): " + "ran out of PLT entries for index %d\n", index); + } break; default: - symval = 0; - ErrorF("ElfGetPltAddr(), unhandled symbol scope %x\n", + ErrorF("ElfGetPLTAddr(), unhandled symbol scope %x\n", ELF_ST_BIND(syms[index].st_info)); + return 0; break; } -# ifdef ELFDEBUG - ELFDEBUG("ElfGetPlt: symbol=%lx\t", symbol); - ELFDEBUG("newval=%lx\t", symval); - ELFDEBUG("name=\"%s\"\n", symname ? symname : "NULL"); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_PLT, + "ElfGetPLTAddr: symbol=%lx\t", symbol); + LoaderDebugMsg(LOADER_DEBUG_PLT, "newval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_PLT, + "name=\"%s\"\n", symname ? symname : "NULL"); +#endif break; case STT_SECTION: case STT_FILE: @@ -825,7 +1019,7 @@ case STT_HIPROC: default: symval = 0; - ErrorF("ElfGetPltAddr(), Unexpected symbol type %x", + ErrorF("ElfGetPLTAddr(), Unexpected symbol type %x", ELF_ST_TYPE(syms[index].st_info)); ErrorF("for a Plt request\n"); break; @@ -843,21 +1037,23 @@ { ELFGotEntryPtr gotent; -# ifdef ELFDEBUG +#if LOADERDEBUG { Elf_Sym *sym; sym = (Elf_Sym *) & (elffile->symtab[ELF_R_SYM(rel->r_info)]); if (sym->st_name) { - ELFDEBUG("ElfAddGOT: Adding GOT entry for %s\n", + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "ElfAddGOT: Adding GOT entry for %s\n", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); } else - ELFDEBUG("ElfAddGOT: Adding GOT entry for %s\n", + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "ElfAddGOT: Adding GOT entry for %s\n", ElfGetSectionName(elffile, elffile->sections[sym->st_shndx]. sh_name)); } -# endif +#endif for (gotent = elffile->got_entries; gotent; gotent = gotent->next) { if (ELF_R_SYM(gotent->rel->r_info) == ELF_R_SYM(rel->r_info) && @@ -866,9 +1062,9 @@ } if (gotent) { -# ifdef ELFDEBUG - ELFDEBUG("Entry already present in GOT\n"); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Entry already present in GOT\n"); +#endif return; } @@ -876,9 +1072,10 @@ ErrorF("ElfAddGOT() Unable to allocate memory!!!!\n"); return; } -# ifdef ELFDEBUG - ELFDEBUG("Entry added with offset %x\n", elffile->gotsize); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Entry added with offset %x\n", elffile->gotsize); +#endif gotent->rel = rel; gotent->offset = elffile->gotsize; gotent->next = elffile->got_entries; @@ -898,17 +1095,19 @@ /* * XXX: Is it REALLY needed to ensure GOT's are non-null? */ -# ifdef ELFDEBUG - ELFDEBUG("ELFCreateGOT: %x entries in the GOT\n", elffile->gotsize / 8); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "ELFCreateGOT: %x entries in the GOT\n", elffile->gotsize / 8); /* * Hmmm. Someone is getting here without any got entries, but they * may still have R_ALPHA_GPDISP relocations against the got. */ if (elffile->gotsize == 0) - ELFDEBUG("Module %s doesn't have any GOT entries!\n", + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Module %s doesn't have any GOT entries!\n", _LoaderModuleToName(elffile->module)); -# endif +#endif if (elffile->gotsize == 0) elffile->gotsize = 8; elffile->sections[elffile->gotndx].sh_size = elffile->gotsize; @@ -936,8 +1135,9 @@ elffile->shared_got = gots; gots->freeptr = gots->freeptr + elffile->gotsize; gots->nuses++; -# ifdef ELFDEBUG - ELFDEBUG("ELFCreateGOT: GOT address %lx in shared GOT, nuses %d\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "ELFCreateGOT: GOT address %p in shared GOT, nuses %d\n", elffile->got, gots->nuses); # endif return TRUE; @@ -968,7 +1168,7 @@ ErrorF("ELFCreateGOT() Unable to reallocate memory!!!!\n"); return FALSE; } -# if defined(linux) && defined(__ia64__) || defined(__OpenBSD__) +# if defined(linux) && defined(__ia64__) || defined(__OpenBSD__) || defined(__NetBSD__) { unsigned long page_size = getpagesize(); unsigned long round; @@ -1010,16 +1210,18 @@ gots->next = ELFSharedGOTs; ELFSharedGOTs = gots; elffile->shared_got = gots; -# ifdef ELFDEBUG - ELFDEBUG("ELFCreateGOT: Created a shareable GOT with size %d\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "ELFCreateGOT: Created a shareable GOT with size %d\n", gots->size); -# endif +#endif } # endif /*MergeSectionAlloc */ -# ifdef ELFDEBUG - ELFDEBUG("ELFCreateGOT: GOT address %lx\n", elffile->got); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "ELFCreateGOT: GOT address %p\n", elffile->got); +#endif return TRUE; } @@ -1044,9 +1246,10 @@ ErrorF("ElfAddOPD() Unable to allocate memory!!!!\n"); return; } -# ifdef ELFDEBUG - ELFDEBUG("OPD Entry %d added with offset %x\n", index, elffile->gotsize); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "OPD Entry %d added with offset %x\n", index, elffile->gotsize); +#endif opdent->l = l; opdent->index = index; opdent->offset = elffile->gotsize; @@ -1083,18 +1286,20 @@ { ELFPltEntryPtr pltent; -# ifdef ELFDEBUG +#if LOADERDEBUG { Elf_Sym *sym; sym = (Elf_Sym *) & (elffile->symtab[ELF_R_SYM(rel->r_info)]); if (sym->st_name) { - ELFDEBUG("ElfAddPLT: Adding PLT entry for %s\n", + LoaderDebugMsg(LOADER_DEBUG_PLT, + "ElfAddPLT: Adding PLT entry for %s\n", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); } else - ErrorF("ElfAddPLT: Add PLT entry for section??\n"); + LoaderDebugMsg(LOADER_DEBUG_PLT, + "ElfAddPLT: Add PLT entry for section??\n"); } -# endif +#endif if (rel->r_addend) ErrorF("ElfAddPLT: Add PLT entry with non-zero addend??\n"); @@ -1105,9 +1310,9 @@ } if (pltent) { -# ifdef ELFDEBUG - ELFDEBUG("Entry already present in PLT\n"); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_PLT, "Entry already present in PLT\n"); +#endif return; } @@ -1115,9 +1320,10 @@ ErrorF("ElfAddPLT() Unable to allocate memory!!!!\n"); return; } -# ifdef ELFDEBUG - ELFDEBUG("Entry added with offset %x\n", elffile->pltsize); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_PLT, + "Entry added with offset %x\n", elffile->pltsize); +#endif pltent->rel = rel; pltent->offset = elffile->pltsize; pltent->gotoffset = elffile->gotsize; @@ -1131,9 +1337,10 @@ static void ELFCreatePLT(ELFModulePtr elffile) { -# ifdef ELFDEBUG - ELFDEBUG("ELFCreatePLT: %x entries in the PLT\n", elffile->pltsize / 8); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_PLT, + "ELFCreatePLT: %x entries in the PLT\n", elffile->pltsize / 8); +#endif if (elffile->pltsize == 0) return; @@ -1144,9 +1351,10 @@ return; } elffile->sections[elffile->pltndx].sh_size = elffile->pltsize; -# ifdef ELFDEBUG - ELFDEBUG("ELFCreatePLT: PLT address %lx\n", elffile->plt); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_PLT, + "ELFCreatePLT: PLT address %lx\n", elffile->plt); +#endif return; } @@ -1157,11 +1365,13 @@ { unsigned long data = 0; -# ifdef ELFDEBUG - ELFDEBUG("\nIA64InstallReloc %p %d %d %016lx\n", data128, slot, opnd, +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "\nIA64InstallReloc %p %d %d %016lx\n", data128, slot, opnd, value); - ELFDEBUG("Before [%016lx%016lx]\n", data128[1], data128[0]); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Before [%016lx%016lx]\n", data128[1], data128[0]); +#endif switch (slot) { case 0: data = *data128; @@ -1228,25 +1438,250 @@ FatalError("Unexpected slot in IA64InstallReloc()\n"); } ia64_flush_cache(data128); -# ifdef ELFDEBUG - ELFDEBUG("After [%016lx%016lx]\n", data128[1], data128[0]); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "After [%016lx%016lx]\n", data128[1], data128[0]); +#endif } -#endif /*__ia64__*/ +#endif /* __ia64__ */ + +#if defined(__powerpc__) +static int +ELFGetNumPLTEntries(ELFModulePtr elffile) +{ + ELFRelocPtr p; + int total = 0, n; + int minIndex = MAXINT, maxIndex = 0; + + /* + * Make an (over) estimate of how many PLT entries will be needed. + * Return the minimum of the total number of relocations and the + * number of relocations spanning the min,max reloc indices. + * The over-estimate typically requires less than one page of storage, + * so calculating a precise count of the unique PLT entries needed isn't + * of any significant benefit. + */ + for (p = *_LoaderGetRelocations(elffile->desc); p; p = p->next) { + if (p->file != elffile) + continue; + switch (ELF_R_TYPE(p->rel->r_info)) { +#if defined(PowerMAX_OS) + case R_PPC_DISP24: +#endif + case R_PPC_REL24: + if (ELF_R_SYM(p->rel->r_info) < minIndex) + minIndex = ELF_R_SYM(p->rel->r_info); + if (ELF_R_SYM(p->rel->r_info) > maxIndex) + maxIndex = ELF_R_SYM(p->rel->r_info); + total++; + break; + default: + break; + } + } +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_PLT, + "Found a total of %d PLT relocations ([min,max] %d) " + "for module %s, pltsize is %d\n", + total, maxIndex - minIndex + 1, + _LoaderHandleToCanonicalName(elffile->handle), + total * sizeof(pltentry)); +#endif + if (total < maxIndex - minIndex + 1) + return total; + else + return maxIndex - minIndex + 1; +} + +static void +ELFCreatePLT(ELFModulePtr elffile) +{ +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_PLT, + "ELFCreatePLT: %x entries in the PLT\n", elffile->numplt); +#endif + + if (elffile->numplt == 0) + return; + + if (!(elffile->plt = + ELFLoaderSectCalloc(elffile, 8, + elffile->numplt * sizeof(pltentry)))) { + ErrorF("ELFCreatePLT() Unable to allocate memory!!!!\n"); + return; + } +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_PLT, + "ELFCreatePLT: PLT address %lx\n", elffile->plt); +#endif + + return; +} +#endif /* __powerpc__ */ + +#if !defined(__ia64__) +static void +resetDest32(ELFRelocPtr p, unsigned int *dest32) +{ +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest32=%8.8x\n", *dest32); +#endif + if (p->assigned) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "was assigned\t"); +#endif + *dest32 = p->olddata.d32; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest32=%8.8x\t", *dest32); +#endif + } else { + p->olddata.d32 = *dest32; + p->assigned = 1; + } +} +#endif + +#if defined(__powerpc__) || defined(__sparc__) +static void +resetDest16(ELFRelocPtr p, unsigned short *dest16) +{ +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest16=%4.4x\n", *dest16); +#endif + if (p->assigned) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "was assigned\t"); +#endif + *dest16 = p->olddata.d16; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest16=%8.8x\t", *dest16); +#endif + } else { + p->olddata.d16 = *dest16; + p->assigned = 1; + } +} +#endif + +#if defined(__sparc__) +static void +resetDest8(ELFRelocPtr p, unsigned char *dest8) +{ +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest8=%2.2x\n", *dest8); +#endif + if (p->assigned) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "was assigned\t"); +#endif + *dest8 = p->olddata.d8; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest8=%2.2x\t", *dest8); +#endif + } else { + p->olddata.d8 = *dest8; + p->assigned = 1; + } +} +#endif + +#if defined(__alpha__) || defined(__amd64__) || \ + defined(__x86_64__) || defined(__ia64__) +static void +resetDest64(ELFRelocPtr p, unsigned long *dest64) +{ +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest64=%16.16lx\n", *dest64); +#endif + if (p->assigned) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "was assigned\t"); +#endif + *dest64 = p->olddata.d64; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest64=%16.16lx\t", *dest64); +#endif + } else { + p->olddata.d64 = *dest64; + p->assigned = 1; + } +} +#endif + +#if defined(__ia64__) +static void +resetDest128(ELFRelocPtr p, unsigned long *dest128) +{ +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest128=[%016lx%016lx]\n", dest128[1], dest128[0]); +#endif + if (p->assigned) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "was assigned\t"); +#endif + dest128[0] = p->olddata.d128[0]; + dest128[1] = p->olddata.d128[1]; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest128=[%016lx%016lx]\n", dest128[1], dest128[0]); +#endif + } else { + p->olddata.d128[0] = dest128[0]; + p->olddata.d128[1] = dest128[1]; + p->assigned = 1; + } +} +#endif + +#if defined(__amd64__) || defined(__x86_64__) +static void +resetDest32s(ELFRelocPtr p, int *dest32s) +{ +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest32s=%8.8x\n", *dest32s); +#endif + if (p->assigned) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "was assigned\t"); +#endif + *dest32s = p->olddata.d32s; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest32s=%8.8x\t", *dest32s); +#endif + } else { + p->olddata.d32s = *dest32s; + p->assigned = 1; + } +} +#endif + /* * Fix all of the relocations for the given section. - * If the argument 'force' is non-zero, then the relocation will be - * made even if the symbol can't be found (by substituting - * LoaderDefaultFunc) otherwise, the relocation will be deferred. + * Relocations that cannot be found are made by substituting + * LoaderDefaultFunc. */ -static ELFRelocPtr -Elf_RelocateEntry(ELFModulePtr elffile, Elf_Word secn, Elf_Rel_t *rel, - int force) +static int +Elf_RelocateEntry(ELFRelocPtr p) { + ELFModulePtr elffile = p->file; + Elf_Word secn = p->secn; + Elf_Rel_t *rel = p->rel; unsigned char *secp = elffile->saddr[secn]; + int invariant = 0; #if !defined(__ia64__) unsigned int *dest32; /* address of the 32 bit place being modified */ @@ -1263,7 +1698,7 @@ unsigned long *dest64; unsigned short *dest16; #endif -#if defined(__AMD64__) +#if defined(__amd64__) || defined(__x86_64__) unsigned long *dest64; int *dest32s; #endif @@ -1273,19 +1708,21 @@ #endif Elf_Addr symval = 0; /* value of the indicated symbol */ -#ifdef ELFDEBUG - ELFDEBUG("%lx %d %d\n", (unsigned long)rel->r_offset, - ELF_R_SYM(rel->r_info), ELF_R_TYPE(rel->r_info)); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "%lx %d %d\n", (unsigned long)rel->r_offset, + (int)ELF_R_SYM(rel->r_info), (int)ELF_R_TYPE(rel->r_info)); # if defined(__powerpc__) || \ defined(__mc68000__) || \ defined(__alpha__) || \ defined(__sparc__) || \ defined(__ia64__) || \ - defined(__AMD64__) - ELFDEBUG("%lx", rel->r_addend); + defined(__amd64__) || \ + defined(__x86_64__) + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%lx", rel->r_addend); # endif - ELFDEBUG("\n"); -#endif /*ELFDEBUG*/ + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "\n"); +#endif /* LOADERDEBUG */ #if defined(__alpha__) if (ELF_R_SYM(rel->r_info) && ELF_R_TYPE(rel->r_info) != R_ALPHA_GPDISP) @@ -1293,111 +1730,157 @@ if (ELF_R_SYM(rel->r_info)) #endif { - symval = ElfGetSymbolValue(elffile, ELF_R_SYM(rel->r_info)); + symval = ElfGetSymbolValue(elffile, ELF_R_SYM(rel->r_info), &invariant); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Elf_RelocateEntry: \"%s\": ", + _LoaderHandleToCanonicalName(elffile->handle)); +#endif if (symval == 0) { - if (force) { - symval = (Elf_Addr) & LoaderDefaultFunc; - } else { -#ifdef ELFDEBUG - ELFDEBUG("***Unable to resolve symbol %s\n", - ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); + symval = (Elf_Addr) &LoaderDefaultFunc; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Setting symbol %s to defaultfunc (%p) " + "(%s previously resolved)\n", + ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)), + (void *)&LoaderDefaultFunc, p->relocated ? "was" : "not"); #endif - return ElfDelayRelocation(elffile, secn, rel); - } + p->relocated = 0; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "***Unable to resolve symbol %s\n", + ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); +#endif + } else { +#if LOADERDEBUG + if (invariant) { + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Symbol is invariant\n"); + } +#endif + if (p->relocated) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Symbol %s already resolved\n", + ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); +#endif + return invariant; + } else { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Resolving symbol %s (%p)\n", + ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)), + (void *)symval); +#endif + p->relocated = 1; + } } + if (symval == p->symval) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Symbol %s is unchanged (%p)\n", + ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)), + (void *)symval); +#endif + return invariant; + } else + p->symval = symval; } switch (ELF_R_TYPE(rel->r_info)) { #if defined(i386) case R_386_32: dest32 = (unsigned int *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_386_32\t"); - ELFDEBUG("dest32=%p\t", (void *)dest32); - ELFDEBUG("*dest32=%8.8x\t", (unsigned int)*dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_386_32\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", (void *)dest32); +#endif + resetDest32(p, dest32); *dest32 = symval + (*dest32); /* S + A */ -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\n", (unsigned int)*dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest32=%8.8x\n", (unsigned int)*dest32); +#endif break; case R_386_PC32: dest32 = (unsigned int *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_386_PC32 %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "R_386_PC32 %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%p\t", secp); - ELFDEBUG("symval=%lx\t", (unsigned long)symval); - ELFDEBUG("dest32=%p\t", (void *)dest32); - ELFDEBUG("*dest32=%8.8x\t", (unsigned int)*dest32); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%p\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "symval=%lx\t", (unsigned long)symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", (void *)dest32); +#endif + resetDest32(p, dest32); *dest32 = symval + (*dest32) - (Elf_Addr) dest32; /* S + A - P */ -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\n", (unsigned int)*dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest32=%8.8x\n", (unsigned int)*dest32); +#endif break; #endif /* i386 */ -#if defined(__AMD64__) +#if defined(__amd64__) || defined(__x86_64__) case R_X86_64_32: dest32 = (unsigned int *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_X86_32\t"); - ELFDEBUG("dest32=%x\t", dest32); - ELFDEBUG("*dest32=%8.8lx\t", *dest32); - ELFDEBUG("r_addend=%lx\t", rel->r_addend); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_X86_32\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%lx\t", rel->r_addend); +#endif + resetDest32(p, dest32); *dest32 = symval + rel->r_addend + (*dest32); /* S + A */ -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8lx\n", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); +#endif break; case R_X86_64_32S: dest32s = (int *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_X86_64_32\t"); - ELFDEBUG("dest32s=%x\t", dest32s); - ELFDEBUG("*dest32s=%8.8lx\t", *dest32s); - ELFDEBUG("r_addend=%lx\t", rel->r_addend); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_X86_64_32\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32s=%p\t", dest32s); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%lx\t", rel->r_addend); +#endif + resetDest32s(p, dest32s); *dest32s = symval + rel->r_addend + (*dest32s); /* S + A */ -# ifdef ELFDEBUG - ELFDEBUG("*dest32s=%8.8lx\n", *dest32s); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32s=%8.8x\n", *dest32s); +#endif break; case R_X86_64_PC32: dest32 = (unsigned int *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_X86_64_PC32 %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_X86_64_PC32 %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("dest32=%x\t", dest32); - ELFDEBUG("*dest32=%8.8lx\t", *dest32); - ELFDEBUG("r_addend=%lx\t", rel->r_addend); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%p\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%lx\t", rel->r_addend); +#endif + resetDest32(p, dest32); *dest32 = symval + rel->r_addend + (*dest32) - (Elf_Addr) dest32; /* S + A - P */ -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8lx\n", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); +#endif break; case R_X86_64_64: dest64 = (unsigned long *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_AMD64_64\t"); - ELFDEBUG("dest64=%x\t", dest64); - ELFDEBUG("*dest64=%8.8lx\t", *dest64); - ELFDEBUG("r_addend=%lx\t", rel->r_addend); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_AMD64_64\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest64=%p\t", dest64); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%lx\t", rel->r_addend); +#endif + resetDest64(p, dest64); *dest64 = symval + rel->r_addend + (*dest64); /* S + A */ -# ifdef ELFDEBUG - ELFDEBUG("*dest64=%8.8lx\n", *dest64); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest64=%8.8lx\n", *dest64); +#endif break; -#endif /* __AMD64__ */ +#endif /* __amd64__ || __x86_64__ */ #if defined(__alpha__) case R_ALPHA_NONE: case R_ALPHA_LITUSE: @@ -1405,16 +1888,16 @@ case R_ALPHA_REFQUAD: dest64 = (unsigned long *)(secp + rel->r_offset); - symval = ElfGetSymbolValue(elffile, ELF_R_SYM(rel->r_info)); -# ifdef ELFDEBUG - ELFDEBUG("R_ALPHA_REFQUAD\t"); - ELFDEBUG("dest64=%lx\t", dest64); - ELFDEBUG("*dest64=%8.8lx\t", *dest64); -# endif + symval = ElfGetSymbolValue(elffile, ELF_R_SYM(rel->r_info), &invariant); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ALPHA_REFQUAD\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest64=%p\t", dest64); +#endif + resetDest64(p, dest64); *dest64 = symval + rel->r_addend + (*dest64); /* S + A + P */ -# ifdef ELFDEBUG - ELFDEBUG("*dest64=%8.8lx\n", *dest64); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest64=%8.8lx\n", *dest64); +#endif break; case R_ALPHA_GPREL32: @@ -1422,20 +1905,20 @@ dest64 = (unsigned long *)(secp + rel->r_offset); dest32 = (unsigned int *)dest64; -# ifdef ELFDEBUG - ELFDEBUG("R_ALPHA_GPREL32 %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ALPHA_GPREL32 %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%lx\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("dest32=%lx\t", dest32); - ELFDEBUG("*dest32=%8.8x\t", *dest32); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%p\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", *dest32); +#endif symval += rel->r_addend; symval = ((unsigned char *)symval) - ((unsigned char *)elffile->got); -# ifdef ELFDEBUG - ELFDEBUG("symval=%lx\t", symval); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); +#endif if ((symval & 0xffffffff00000000) != 0x0000000000000000 && (symval & 0xffffffff00000000) != 0xffffffff00000000) { FatalError("R_ALPHA_GPREL32 symval-got is too large for %s\n", @@ -1443,9 +1926,9 @@ } *dest32 = symval; -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%x\n", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%x\n", *dest32); +#endif break; } @@ -1487,14 +1970,14 @@ ELFGotEntryPtr gotent; dest32 = (unsigned int *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_ALPHA_LITERAL %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ALPHA_LITERAL %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%lx\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("dest32=%lx\t", dest32); - ELFDEBUG("*dest32=%8.8x\t", *dest32); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%p\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", dest32); +#endif + resetDest32(p, dest32); for (gotent = elffile->got_entries; gotent; gotent = gotent->next) { if (ELF_R_SYM(gotent->rel->r_info) == ELF_R_SYM(rel->r_info) @@ -1506,10 +1989,10 @@ if (gotent) { *(unsigned long *)(elffile->got + gotent->offset) = symval + rel->r_addend; -# ifdef ELFDEBUG - ELFDEBUG("Setting gotent[%x]=%lx\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Setting gotent[%x]=%lx\t", gotent->offset, symval + rel->r_addend); -# endif +#endif if ((gotent->offset & 0xffff0000) != 0) FatalError("\nR_ALPHA_LITERAL offset %x too large\n", gotent->offset); @@ -1519,20 +2002,20 @@ /* S + A - P >> 2 */ val = ((symval + (rel->r_addend) - (Elf_Addr) dest32)); -# ifdef ELFDEBUG - ELFDEBUG("S+A-P=%x\t", val); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A-P=%lx\t", val); +#endif if ((val & 0xffff0000) != 0xffff0000 && (val & 0xffff0000) != 0x00000000) { - ErrorF("\nR_ALPHA_LITERAL offset %x too large\n", val); + ErrorF("\nR_ALPHA_LITERAL offset %lx too large\n", val); break; } val &= 0x0000ffff; (*dest32) |= (val); /* The address part is always 0 */ } -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\n", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); +#endif break; } @@ -1540,20 +2023,24 @@ case R_ALPHA_GPDISP: { long offset; + unsigned long val64; dest32h = (unsigned int *)(secp + rel->r_offset); dest32 = (unsigned int *)((secp + rel->r_offset) + rel->r_addend); + val64 = *dest32 | ((unsigned long)(*dest32h) << 32); -# ifdef ELFDEBUG - ELFDEBUG("R_ALPHA_GPDISP %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ALPHA_GPDISP %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%lx\t", secp); - ELFDEBUG("got=%lx\t", elffile->got); - ELFDEBUG("dest32=%lx\t", dest32); - ELFDEBUG("*dest32=%8.8x\t", *dest32); - ELFDEBUG("dest32h=%lx\t", dest32h); - ELFDEBUG("*dest32h=%8.8x\t", *dest32h); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%p\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "got=%p\t", elffile->got); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32h=%p\t", dest32h); +#endif + resetDest64(p, &val64); + *dest32 = (val64 & 0xffffffff); + *dest32h = (val64 >> 32); + if ((*dest32h >> 26) != 9 || (*dest32 >> 26) != 8) { ErrorF("***Bad instructions in relocating %s\n", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); @@ -1564,64 +2051,64 @@ offset = ((unsigned char *)elffile->got - (unsigned char *)dest32h); -# ifdef ELFDEBUG - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("got-dest32=%lx\t", offset); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "got-dest32=%lx\t", offset); +#endif if ((offset >= 0x7fff8000L) || (offset < -0x80000000L)) { FatalError("Offset overflow for R_ALPHA_GPDISP\n"); } symval += (unsigned long)offset; -# ifdef ELFDEBUG - ELFDEBUG("symval=%lx\t", symval); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); +#endif *dest32 = (*dest32 & 0xffff0000) | (symval & 0xffff); *dest32h = (*dest32h & 0xffff0000) | (((symval >> 16) + ((symval >> 15) & 1)) & 0xffff); -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\t", *dest32); - ELFDEBUG("*dest32h=%8.8x\n", *dest32h); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", *dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32h=%8.8x\n", *dest32h); +#endif + invariant = 1; + p->relocated = 1; break; } case R_ALPHA_HINT: dest32 = (unsigned int *)((secp + rel->r_offset) + rel->r_addend); -# ifdef ELFDEBUG - ELFDEBUG("R_ALPHA_HINT %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ALPHA_HINT %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%lx\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("dest32=%lx\t", dest32); - ELFDEBUG("*dest32=%8.8x\t", *dest32); -# endif - -# ifdef ELFDEBUG - ELFDEBUG("symval=%lx\t", symval); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%p\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", dest32); +#endif + resetDest32(p, dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); +#endif symval -= (Elf_Addr) (((unsigned char *)dest32) + 4); if (symval % 4) { ErrorF("R_ALPHA_HINT bad alignment of offset\n"); } symval = symval >> 2; -# ifdef ELFDEBUG - ELFDEBUG("symval=%lx\t", symval); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); if (symval & 0xffff8000) { -# ifdef ELFDEBUG - ELFDEBUG("R_ALPHA_HINT symval too large\n"); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "R_ALPHA_HINT symval too large\n"); } +#endif *dest32 = (*dest32 & ~0x3fff) | (symval & 0x3fff); -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\n", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); +#endif break; case R_ALPHA_GPREL16: @@ -1643,90 +2130,105 @@ break; } + case R_ALPHA_SREL32: + { + dest32 = (unsigned int *)(secp + rel->r_offset); + resetDest32(p, dest32); + symval += rel->r_addend; + symval -= (unsigned long) dest32; + if ((long)symval >= 0x80000000 + || (long)symval < -(long)0x80000000) + FatalError("R_ALPHA_SREL32 overflow for %s: %lx\n", + ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)), + symval); + *dest32 = symval; + break; + } + #endif /* alpha */ #if defined(__mc68000__) case R_68K_32: dest32 = (unsigned int *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_68K_32\t"); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("r_addend=%x\t", rel->r_addend); - ELFDEBUG("dest32=%8.8x\t", dest32); - ELFDEBUG("*dest32=%8.8x\n", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_68K_32\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32); +#endif { unsigned long val; /* S + A */ val = symval + (rel->r_addend); -# ifdef ELFDEBUG - ELFDEBUG("S+A=%x\t", val); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val); +#endif *dest32 = val; /* S + A */ } -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\n", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); +#endif break; case R_68K_PC32: dest32 = (unsigned int *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_68K_PC32\t"); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("r_addend=%x\t", rel->r_addend); - ELFDEBUG("dest32=%8.8x\t", dest32); - ELFDEBUG("*dest32=%8.8x\n", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_68K_PC32\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32); +#endif + resetDest32(p, dest32); { unsigned long val; /* S + A - P */ val = symval + (rel->r_addend); val -= *dest32; -# ifdef ELFDEBUG - ELFDEBUG("S+A=%x\t", val); - ELFDEBUG("S+A-P=%x\t", val + (*dest32) - (Elf_Addr) dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "S+A-P=%x\t", val + (*dest32) - (Elf_Addr) dest32); +#endif *dest32 = val + (*dest32) - (Elf_Addr) dest32; /* S + A - P */ } -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\n", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); +#endif break; #endif /* __mc68000__ */ #if defined(__powerpc__) # if defined(PowerMAX_OS) case R_PPC_DISP24: /* 11 */ dest32 = (unsigned long *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_DISP24 %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_DISP24 %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("dest32=%x\t", dest32); - ELFDEBUG("*dest32=%8.8x\t", *dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%x\t", dest32); # endif - + resetDest32(p, dest32); { unsigned long val; /* S + A - P >> 2 */ val = ((symval + (rel->r_addend) - (Elf_Addr) dest32)); -# ifdef ELFDEBUG - ELFDEBUG("S+A-P=%x\t", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A-P=%x\t", val); # endif val = val >> 2; if ((val & 0x3f000000) != 0x3f000000 && (val & 0x3f000000) != 0x00000000) { -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_DISP24 offset %x too large\n", val << 2); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "R_PPC_DISP24 offset %x too large\n", val << 2); # endif - symval = ElfGetPltAddr(elffile, ELF_R_SYM(rel->r_info)); + symval = ElfGetPLTAddr(elffile, ELF_R_SYM(rel->r_info)); val = ((symval + (rel->r_addend) - (Elf_Addr) dest32)); -# ifdef ELFDEBUG - ELFDEBUG("PLT offset is %x\n", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "PLT offset is %x\n", val); # endif val = val >> 2; if ((val & 0x3f000000) != 0x3f000000 && @@ -1738,76 +2240,73 @@ (*dest32) |= (val << 2); /* The address part is always 0 */ ppc_flush_icache(dest32); } -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif break; case R_PPC_16HU: /* 31 */ dest16 = (unsigned short *)(secp + rel->r_offset); -# ifdef ELFDEBUG +#if LOADERDEBUG dest32 = (unsigned long *)(dest16 - 1); - -# endif -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_16HU\t"); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("r_addend=%x\t", rel->r_addend); - ELFDEBUG("dest16=%x\t", dest16); - ELFDEBUG("*dest16=%8.8x\t", *dest16); - ELFDEBUG("dest32=%8.8x\t", dest32); - ELFDEBUG("*dest32=%8.8x\n", *dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_16HU\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%x\t", dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif { unsigned short val; /* S + A */ val = ((symval + (rel->r_addend)) & 0xffff0000) >> 16; -# ifdef ELFDEBUG - ELFDEBUG("uhi16(S+A)=%x\t", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "uhi16(S+A)=%x\t", val); # endif *dest16 = val; /* S + A */ ppc_flush_icache(dest16); } -# ifdef ELFDEBUG - ELFDEBUG("*dest16=%8.8x\t", *dest16); - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif break; case R_PPC_32: /* 32 */ dest32 = (unsigned long *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_32\t"); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("r_addend=%x\t", rel->r_addend); - ELFDEBUG("dest32=%8.8x\t", dest32); - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_32\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif { unsigned long val; /* S + A */ val = symval + (rel->r_addend); -# ifdef ELFDEBUG - ELFDEBUG("S+A=%x\t", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val); # endif *dest32 = val; /* S + A */ ppc_flush_icache(dest32); } -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif break; case R_PPC_32UA: /* 33 */ dest32 = (unsigned long *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_32UA\t"); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("r_addend=%x\t", rel->r_addend); - ELFDEBUG("dest32=%8.8x\t", dest32); - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_32UA\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif { unsigned long val; @@ -1815,8 +2314,8 @@ /* S + A */ val = symval + (rel->r_addend); -# ifdef ELFDEBUG - ELFDEBUG("S+A=%x\t", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val); # endif *dest8++ = (val & 0xff000000) >> 24; *dest8++ = (val & 0x00ff0000) >> 16; @@ -1824,26 +2323,24 @@ *dest8++ = (val & 0x000000ff); ppc_flush_icache(dest32); } -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif break; case R_PPC_16H: /* 34 */ dest16 = (unsigned short *)(secp + rel->r_offset); -# ifdef ELFDEBUG +#if LOADERDEBUG dest32 = (unsigned long *)(dest16 - 1); -# endif -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_16H\t"); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symbol=%s\t", + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_16H\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symbol=%s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("r_addend=%x\t", rel->r_addend); - ELFDEBUG("dest16=%x\t", dest16); - ELFDEBUG("*dest16=%8.8x\t", *dest16); - ELFDEBUG("dest32=%8.8x\t", dest32); - ELFDEBUG("*dest32=%8.8x\n", *dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%x\t", dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif { unsigned short val; @@ -1861,117 +2358,113 @@ */ val++; } -# ifdef ELFDEBUG - ELFDEBUG("hi16(S+A)=%x\t", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "hi16(S+A)=%x\t", val); # endif *dest16 = val; /* S + A */ ppc_flush_icache(dest16); } -# ifdef ELFDEBUG - ELFDEBUG("*dest16=%8.8x\t", *dest16); - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif break; case R_PPC_16L: /* 35 */ dest16 = (unsigned short *)(secp + rel->r_offset); -# ifdef ELFDEBUG +#if LOADERDEBUG dest32 = (unsigned long *)(dest16 - 1); -# endif -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_16L\t"); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("r_addend=%x\t", rel->r_addend); - ELFDEBUG("dest16=%x\t", dest16); - ELFDEBUG("*dest16=%8.8x\t", *dest16); - ELFDEBUG("dest32=%8.8x\t", dest32); - ELFDEBUG("*dest32=%8.8x\n", *dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_16L\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%x\t", dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif { unsigned short val; /* S + A */ val = (symval + (rel->r_addend)) & 0xffff; -# ifdef ELFDEBUG - ELFDEBUG("lo16(S+A)=%x\t", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "lo16(S+A)=%x\t", val); # endif *dest16 = val; /* S + A */ ppc_flush_icache(dest16); } -# ifdef ELFDEBUG - ELFDEBUG("*dest16=%8.8x\t", *dest16); - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif break; # else /* PowerMAX_OS */ /* Linux PPC */ case R_PPC_ADDR32: /* 1 */ dest32 = (unsigned int *)(secp + rel->r_offset); - symval = ElfGetSymbolValue(elffile, ELF_R_SYM(rel->r_info)); -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_ADDR32\t"); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("r_addend=%x\t", rel->r_addend); - ELFDEBUG("dest32=%8.8x\t", dest32); - ELFDEBUG("*dest32=%8.8x\n", *dest32); + symval = ElfGetSymbolValue(elffile, ELF_R_SYM(rel->r_info), &invariant); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_ADDR32\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif { unsigned long val; /* S + A */ val = symval + (rel->r_addend); -# ifdef ELFDEBUG - ELFDEBUG("S+A=%x\t", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val); # endif *dest32 = val; /* S + A */ ppc_flush_icache(dest32); } -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif break; case R_PPC_ADDR16_LO: /* 4 */ dest16 = (unsigned short *)(secp + rel->r_offset); -# ifdef ELFDEBUG - dest32 = (unsigned long *)(dest16 - 1); +#if LOADERDEBUG + dest32 = (unsigned int *)(dest16 - 1); # endif -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_ADDR16_LO\t"); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("r_addend=%x\t", rel->r_addend); - ELFDEBUG("dest16=%x\t", dest16); - ELFDEBUG("*dest16=%8.8x\t", *dest16); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_ADDR16_LO\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%x\t", dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16); # endif { unsigned short val; /* S + A */ val = (symval + (rel->r_addend)) & 0xffff; -# ifdef ELFDEBUG - ELFDEBUG("lo16(S+A)=%x\t", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "lo16(S+A)=%x\t", val); # endif *dest16 = val; /* S + A */ ppc_flush_icache(dest16); } -# ifdef ELFDEBUG - ELFDEBUG("*dest16=%8.8x\t", *dest16); - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif break; case R_PPC_ADDR16_HA: /* 6 */ dest16 = (unsigned short *)(secp + rel->r_offset); -# ifdef ELFDEBUG - dest32 = (unsigned long *)(dest16 - 1); -# endif -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_ADDR16_HA\t"); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("r_addend=%x\t", rel->r_addend); - ELFDEBUG("dest16=%x\t", dest16); - ELFDEBUG("*dest16=%8.8x\t", *dest16); +#if LOADERDEBUG + dest32 = (unsigned int *)(dest16 - 1); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_ADDR16_HA\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%x\t", dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16); # endif { unsigned short val; @@ -1989,46 +2482,47 @@ */ val++; } -# ifdef ELFDEBUG - ELFDEBUG("hi16(S+A)=%x\t", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "hi16(S+A)=%x\t", val); # endif *dest16 = val; /* S + A */ ppc_flush_icache(dest16); } -# ifdef ELFDEBUG - ELFDEBUG("*dest16=%8.8x\t", *dest16); - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif break; case R_PPC_REL24: /* 10 */ dest32 = (unsigned int *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_REL24 %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_REL24 %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("dest32=%x\t", dest32); - ELFDEBUG("*dest32=%8.8x\t", *dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%x\t", dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "rel->r_addend=%x\t", rel->r_addend); # endif - + resetDest32(p, dest32); { unsigned long val; /* S + A - P >> 2 */ val = ((symval + (rel->r_addend) - (Elf_Addr) dest32)); -# ifdef ELFDEBUG - ELFDEBUG("S+A-P=%x\t", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A-P=%x\t", val); # endif val = val >> 2; if ((val & 0x3f000000) != 0x3f000000 && (val & 0x3f000000) != 0x00000000) { -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_REL24 offset %x too large\n", val << 2); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "R_PPC_REL24 offset %x too large\n", val << 2); # endif - symval = ElfGetPltAddr(elffile, ELF_R_SYM(rel->r_info)); + symval = ElfGetPLTAddr(elffile, ELF_R_SYM(rel->r_info)); val = ((symval + (rel->r_addend) - (Elf_Addr) dest32)); -# ifdef ELFDEBUG - ELFDEBUG("PLT offset is %x\n", val); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "PLT offset is %x\n", val); # endif val = val >> 2; if ((val & 0x3f000000) != 0x3f000000 && @@ -2040,36 +2534,37 @@ (*dest32) |= (val << 2); /* The address part is always 0 */ ppc_flush_icache(dest32); } -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); # endif break; case R_PPC_REL32: /* 26 */ dest32 = (unsigned int *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_PPC_REL32\t"); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%x\t", symval); - ELFDEBUG("r_addend=%x\t", rel->r_addend); - ELFDEBUG("dest32=%8.8x\t", dest32); - ELFDEBUG("*dest32=%8.8x\n", *dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_REL32\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32); # endif + resetDest32(p, dest32); { unsigned long val; /* S + A - P */ val = symval + (rel->r_addend); val -= *dest32; -# ifdef ELFDEBUG - ELFDEBUG("S+A=%x\t", val); - ELFDEBUG("S+A-P=%x\t", val + (*dest32) - (Elf_Addr) dest32); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "S+A-P=%x\t", val + (*dest32) - (Elf_Addr) dest32); # endif *dest32 = val + (*dest32) - (Elf_Addr) dest32; /* S + A - P */ ppc_flush_icache(dest32); } -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8x\n", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32); +#endif break; # endif /* PowerMAX_OS */ #endif /* __powerpc__ */ @@ -2108,24 +2603,28 @@ case R_SPARC_DISP8: /* 4 */ dest8 = (unsigned char *)(secp + rel->r_offset); + resetDest8(p, dest8); symval += rel->r_addend; *dest8 = (symval - (Elf_Addr) dest8); break; case R_SPARC_DISP16: /* 5 */ dest16 = (unsigned short *)(secp + rel->r_offset); + resetDest16(p, dest16); symval += rel->r_addend; *dest16 = (symval - (Elf_Addr) dest16); break; case R_SPARC_DISP32: /* 6 */ dest32 = (unsigned int *)(secp + rel->r_offset); + resetDest32(p, dest32); symval += rel->r_addend; *dest32 = (symval - (Elf_Addr) dest32); break; case R_SPARC_WDISP30: /* 7 */ dest32 = (unsigned int *)(secp + rel->r_offset); + resetDest32(p, dest32); symval += rel->r_addend; *dest32 = ((*dest32 & 0xc0000000) | (((symval - (Elf_Addr) dest32) >> 2) & 0x3fffffff)); @@ -2133,12 +2632,14 @@ case R_SPARC_HI22: /* 9 */ dest32 = (unsigned int *)(secp + rel->r_offset); + resetDest32(p, dest32); symval += rel->r_addend; *dest32 = (*dest32 & 0xffc00000) | (symval >> 10); break; case R_SPARC_LO10: /* 12 */ dest32 = (unsigned int *)(secp + rel->r_offset); + resetDest32(p, dest32); symval += rel->r_addend; *dest32 = (*dest32 & ~0x3ff) | (symval & 0x3ff); break; @@ -2179,6 +2680,16 @@ dest64 = (unsigned long *)(secp + rel->r_offset); *dest64 = (unsigned long)secp + rel->r_addend; break; + +#ifdef __sparcv9 + case R_SPARC_OLO10: /* 33 */ + dest32 = (unsigned int *)(secp + rel->r_offset); + resetDest32(p, dest32); /* Not really needed. */ + symval += rel->r_addend + + (((ELF64_R_TYPE(rel->r_info) >> 8) ^ 0x800000) - 0x800000); + *dest32 = (*dest32 & ~0x3ff) | (symval & 0x3ff); + break; +#endif #endif /*__sparc__*/ #ifdef __ia64__ case R_IA64_NONE: @@ -2187,10 +2698,10 @@ case R_IA64_LTOFF_FPTR22: if (rel->r_addend) FatalError("\nAddend for R_IA64_LTOFF_FPTR22 not supported\n"); -# ifdef ELFDEBUG - ELFDEBUG("opd=%016lx.%016lx\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "opd=%016lx.%016lx\n", ((long *)symval)[0], ((long *)symval)[1]); -# endif +#endif /* FALLTHROUGH */ case R_IA64_LTOFF22: #ifndef IA64_LDX_OPTIMIZATION @@ -2200,17 +2711,17 @@ ELFGotEntryPtr gotent; dest128 = (unsigned long *)(secp + (rel->r_offset & ~3)); -# ifdef ELFDEBUG - ELFDEBUG("%s %s\t", ELF_R_TYPE(rel->r_info) == R_IA64_LTOFF22 ? +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "%s %s\t", ELF_R_TYPE(rel->r_info) == R_IA64_LTOFF22 ? "R_IA64_LTOFF22" : "R_IA64_LTOFF_FPTR22", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%lx\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("dest128=%lx\t", dest128); - ELFDEBUG("slot=%d\n", rel->r_offset & 3); - ELFDEBUG("*dest128=[%016lx%016lx]\n", dest128[1], dest128[0]); -# endif - + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%lx\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest128=%lx\t", dest128); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "slot=%d\n", rel->r_offset & 3); +#endif + resetDest128(p, dest128); for (gotent = elffile->got_entries; gotent; gotent = gotent->next) { if (ELF_R_SYM(gotent->rel->r_info) == ELF_R_SYM(rel->r_info) && gotent->rel->r_addend == rel->r_addend) @@ -2221,10 +2732,10 @@ if (gotent) { *(unsigned long *)(elffile->got + gotent->offset) = symval + rel->r_addend; -# ifdef ELFDEBUG - ELFDEBUG("Setting gotent[%x]=%lx\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Setting gotent[%x]=%lx\n", gotent->offset, symval + rel->r_addend); -# endif +#endif if ((gotent->offset & 0xffe00000) != 0) FatalError("\nR_IA64_LTOFF22 offset %x too large\n", gotent->offset); @@ -2240,17 +2751,18 @@ ELFPltEntryPtr pltent; dest128 = (unsigned long *)(secp + (rel->r_offset & ~3)); -# ifdef ELFDEBUG - ELFDEBUG("R_IA64_PCREL21B %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_IA64_PCREL21B %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%lx\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("opd=%lx.%lx\t", ((long *)symval)[0], - ((long *)symval)[1]); - ELFDEBUG("dest128=%lx\t", dest128); - ELFDEBUG("slot=%d\n", rel->r_offset & 3); - ELFDEBUG("*dest128=[%016lx%016lx]\n", dest128[1], dest128[0]); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%lx\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "opd=%lx.%lx\t", ((long *)symval)[0], ((long *)symval)[1]); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest128=%lx\t", dest128); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "slot=%d\n", rel->r_offset & 3); +#endif + resetDest128(p, dest128); if (rel->r_addend) FatalError("\nAddend for PCREL21B not supported\n"); if (((long *)symval)[1] == (long)elffile->got @@ -2300,15 +2812,15 @@ case R_IA64_FPTR64LSB: dest64 = (unsigned long *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_IA64_FPTR64LSB %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_IA64_FPTR64LSB %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%lx\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("dest64=%lx\t", dest64); - ELFDEBUG("opd=%016lx.%016lx\n", ((long *)symval)[0], - ((long *)symval)[1]); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%lx\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest64=%lx\t", dest64); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "opd=%016lx.%016lx\n", + ((long *)symval)[0], ((long *)symval)[1]); +#endif if (rel->r_addend) FatalError("\nAddend not supported for R_IA64_FPTR64LSB\n"); @@ -2318,40 +2830,41 @@ case R_IA64_DIR64LSB: dest64 = (unsigned long *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_IA64_DIR64LSB %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_IA64_DIR64LSB %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%lx\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("dest64=%lx\n", dest64); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%lx\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest64=%lx\n", dest64); +#endif *dest64 = symval + rel->r_addend; ia64_flush_cache(dest64); break; case R_IA64_PCREL64LSB: dest64 = (unsigned long *)(secp + rel->r_offset); -#ifdef ELFDEBUG - ELFDEBUG("R_IA64_PCREL64LSB %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_IA64_PCREL64LSB %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%lx\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("dest64=%lx\n", dest64); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%lx\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest64=%lx\n", dest64); #endif + resetDest64(p, dest64); *dest64 = symval + rel->r_addend - (unsigned long)dest64; break; case R_IA64_GPREL22: dest128 = (unsigned long *)(secp + (rel->r_offset & ~3)); -# ifdef ELFDEBUG - ELFDEBUG("R_IA64_GPREL22 %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_IA64_GPREL22 %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%lx\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("dest128=%lx\t", dest128); - ELFDEBUG("slot=%d\n", rel->r_offset & 3); - ELFDEBUG("*dest128=[%016lx%016lx]\n", dest128[1], dest128[0]); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%lx\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest128=%lx\t", dest128); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "slot=%d\n", rel->r_offset & 3); +#endif + resetDest128(p, dest128); IA64InstallReloc(dest128, rel->r_offset & 3, IA64_OPND_IMM22, symval + rel->r_addend - (long)elffile->got); break; @@ -2363,24 +2876,27 @@ long gp_offset = symval + rel->r_addend - (long)elffile->got; dest128 = (unsigned long *)(secp + (rel->r_offset & ~3)); - -# ifdef ELFDEBUG - ELFDEBUG("R_IA64_LTOFF22X %s\t", + resetDest128(p, dest128); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_IA64_LTOFF22X %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); - ELFDEBUG("secp=%lx\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("dest128=%lx\t", dest128); - ELFDEBUG("slot=%d\n", rel->r_offset & 3); -# endif + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%lx\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest128=%lx\t", dest128); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "slot=%d\n", rel->r_offset & 3); +#endif if (gp_offset << 42 >> 42 != gp_offset) { /* Offset is too large for LTOFF22X, * fallback to using GOT lookup, e.g. LTOFF22. * Note: LDXMOV will fail the same test and will be ignored. */ -# ifdef ELFDEBUG - ELFDEBUG("gp_offset=%ld too large, using GOT instead (LTOFF22)\n", gp_offset); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "gp_offset=%ld too large, using GOT instead " + "(LTOFF22)\n", gp_offset); +#endif for (gotent = elffile->got_entries; gotent; gotent = gotent->next) { @@ -2394,10 +2910,11 @@ if (gotent) { *(unsigned long *)(elffile->got + gotent->offset) = symval + rel->r_addend; -# ifdef ELFDEBUG - ELFDEBUG("Setting gotent[%x]=%lx\n", gotent->offset, +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Setting gotent[%x]=%lx\n", gotent->offset, symval + rel->r_addend); -# endif +#endif if ((gotent->offset & 0xffe00000) != 0) FatalError("\nR_IA64_LTOFF22 offset %x too large\n", gotent->offset); @@ -2406,9 +2923,10 @@ } gp_offset = gotent->offset; /* Use GOT lookup */ } else { -# ifdef ELFDEBUG - ELFDEBUG("using gp_offset=%ld (LTOFF22X)", gp_offset); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "using gp_offset=%ld (LTOFF22X)", gp_offset); +#endif } IA64InstallReloc(dest128, rel->r_offset & 3, IA64_OPND_IMM22, gp_offset); @@ -2417,32 +2935,36 @@ #endif case R_IA64_LDXMOV: -# ifdef ELFDEBUG - ELFDEBUG("R_IA64_LDXMOV %s\t", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_IA64_LDXMOV %s\t", ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); -# endif +#endif #ifdef IA64_LDX_OPTIMIZATION { long gp_offset = symval + rel->r_addend - (long)elffile->got; dest128 = (unsigned long *)(secp + (rel->r_offset & ~3)); - + resetDest128(p, dest128); if (gp_offset << 42 >> 42 != gp_offset) { /* Offset is too large for LTOFF22X, ignore this relocation */ -# ifdef ELFDEBUG - ELFDEBUG("offset = %ld too large, ignoring\n", gp_offset); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "offset = %ld too large, ignoring\n", gp_offset); +#endif } else { -# ifdef ELFDEBUG - ELFDEBUG("secp=%lx\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("dest128=%lx\t", dest128); - ELFDEBUG("slot=%d\n", rel->r_offset & 3); - ELFDEBUG("offset=%ld\n", gp_offset); - ELFDEBUG("*dest128=[%016lx%016lx]\n", dest128[1], dest128[0]); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%lx\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest128=%lx\t", dest128); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "slot=%d\n", rel->r_offset & 3); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "offset=%ld\n", gp_offset); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "*dest128=[%016lx%016lx]\n", dest128[1], dest128[0]); +#endif IA64InstallReloc(dest128, rel->r_offset & 3, IA64_OPND_LDXMOV, 0); @@ -2456,39 +2978,46 @@ #if defined(__arm__) case R_ARM_ABS32: dest32 = (unsigned int *)(secp + rel->r_offset); -# ifdef ELFDEBUG - ELFDEBUG("R_ARM_ABS32\t"); - ELFDEBUG("dest32=%x\t", dest32); - ELFDEBUG("*dest32=%8.8lx\t", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ARM_ABS32\t"); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%x\t", dest32); +#endif + resetDest32(p, dest32); *dest32 = symval + (*dest32); /* S + A */ -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8lx\n", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8lx\n", *dest32); +#endif +#if defined(__NetBSD__) + arm_sync_icache(dest32, 4); +#endif + break; case R_ARM_REL32: dest32 = (unsigned int *)(secp + rel->r_offset); -# ifdef ELFDEBUG +#if LOADERDEBUG { char *namestr; - ELFDEBUG("R_ARM_REL32 %s\t", + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ARM_REL32 %s\t", namestr = ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info))); xf86loaderfree(namestr); - ELFDEBUG("secp=%x\t", secp); - ELFDEBUG("symval=%lx\t", symval); - ELFDEBUG("dest32=%x\t", dest32); - ELFDEBUG("*dest32=%8.8lx\t", *dest32); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%x\t", dest32); } -# endif - +#endif + resetDest32(p, dest32); *dest32 = symval + (*dest32) - (Elf_Addr) dest32; /* S + A - P */ -# ifdef ELFDEBUG - ELFDEBUG("*dest32=%8.8lx\n", *dest32); -# endif +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8lx\n", *dest32); +#endif +#if defined(__NetBSD__) + arm_sync_icache(dest32, 4); +#endif + break; @@ -2497,12 +3026,17 @@ unsigned long val; dest32 = (unsigned int *)(secp + rel->r_offset); + resetDest32(p, dest32); val = (*dest32 & 0x00ffffff) << 2; val = symval - (unsigned long)dest32 + val; val >>= 2; *dest32 = (*dest32 & 0xff000000) | (val & 0x00ffffff); #ifdef NOTYET arm_flush_cache(dest32); +#else +#if defined(__NetBSD__) + arm_sync_icache(dest32, 4); +#endif #endif } break; @@ -2510,17 +3044,17 @@ #endif /* (__arm__) */ default: - ErrorF("Elf_RelocateEntry() Unsupported relocation type %d\n", - (int)ELF_R_TYPE(rel->r_info)); + ErrorF("Elf_RelocateEntry() \"%s\" Unsupported relocation " + "type %d (0x%x)\n", + ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)), + (int)ELF_R_TYPE(rel->r_info), (int)ELF_R_TYPE(rel->r_info)); break; } - return 0; + return invariant; } static ELFRelocPtr -ELFCollectRelocations(elffile, index) - ELFModulePtr elffile; - int index; /* The section to use as relocation data */ +ELFCollectRelocations(ELFModulePtr elffile, int index) { int i, numrel; Elf_Shdr *sect = &(elffile->sections[index]); @@ -2530,6 +3064,11 @@ numrel = sect->sh_size / sect->sh_entsize; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Collecting relocations for file %p (%s)\n", elffile, + _LoaderHandleToCanonicalName(elffile->handle)); +#endif for (i = 0; i < numrel; i++) { #if defined(__alpha__) if (ELF_R_TYPE(rel[i].r_info) == R_ALPHA_LITERAL) { @@ -2594,8 +3133,9 @@ *psecttable = secttable; for (i = 0, l = 0; i < numsyms; i++) { -#ifdef ELFDEBUG - ELFDEBUG("value=%lx\tsize=%lx\tBIND=%x\tTYPE=%x\tndx=%x\t%s\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "value=%lx\tsize=%lx\tBIND=%x\tTYPE=%x\tndx=%x\t%s\n", (unsigned long)syms[i].st_value, (unsigned long)syms[i].st_size, ELF_ST_BIND(syms[i].st_info), ELF_ST_TYPE(syms[i].st_info), @@ -2616,8 +3156,9 @@ ErrorF("ELF_GetSymbols() Don't know how to handle SHN_ABS\n"); break; case SHN_COMMON: -#ifdef ELFDEBUG - ELFDEBUG("Adding COMMON space for %s\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Adding COMMON space for %s\n", ElfGetString(elffile, syms[i].st_name)); #endif if (!LoaderHashFind(ElfGetString(elffile, syms[i].st_name))) { @@ -2641,8 +3182,9 @@ (elffile, syms[i].st_name)); lookup[l].offset = (funcptr) syms[i].st_value; secttable[l] = syms[i].st_shndx; -#ifdef ELFDEBUG - ELFDEBUG("Adding symbol %lx(%d) %s\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Adding symbol %lx(%d) %s\n", (unsigned long)lookup[l].offset, secttable[l], lookup[l].symName); #endif @@ -2659,8 +3201,8 @@ case STT_LOPROC: case STT_HIPROC: /* Skip this type */ -#ifdef ELFDEBUG - ELFDEBUG("Skipping TYPE %d %s\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Skipping TYPE %d %s\n", ELF_ST_TYPE(syms[i].st_info), ElfGetString(elffile, syms[i].st_name)); #endif @@ -2674,9 +3216,9 @@ lookup[l].symName = NULL; /* Terminate the list */ -/* - * Remove the ELF symbols that will show up in every object module. - */ + /* + * Remove the ELF symbols that will show up in every object module. + */ for (i = 0, p = lookup; p->symName; i++, p++) { while (!strcmp(lookup[i].symName, ".text") || !strcmp(lookup[i].symName, ".data") @@ -2721,9 +3263,9 @@ int i; int j; -/* - * Find and identify all of the Sections - */ + /* + * Find and identify all of the Sections + */ j = elffile->lsectidx; for (i = 1; i < elffile->numsh; i++) { int flags = 0; @@ -2772,9 +3314,9 @@ AdjustSize(i); break; default: -#ifdef ELFDEBUG +#if LOADERDEBUG if (pass) - ELFDEBUG("ELF: Not loading %s\n", name); + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "ELF: Not loading %s\n", name); #endif continue; } @@ -2800,8 +3342,8 @@ SecSize(i), name); } elffile->saddr[i] = elffile->lsection[j].saddr; -#ifdef ELFDEBUG - ELFDEBUG("%s starts at %p size: %lx\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "%s starts at %p size: %lx\n", name, elffile->saddr[i], (unsigned long)SecSize(i)); #endif elffile->lsection[j].name = name; @@ -2809,7 +3351,7 @@ elffile->lsection[j].size = SecSize(i); elffile->lsection[j].flags = flags; switch (SecType(i)) { -#ifdef __OpenBSD__ +#if defined(__OpenBSD__) || defined(__NetBSD__) case SHT_PROGBITS: mprotect(elffile->lsection[j].saddr, SecSize(i), PROT_READ | PROT_WRITE | PROT_EXEC); @@ -2840,7 +3382,6 @@ ELFModulePtr elffile; Elf_Ehdr *header; ELFRelocPtr elf_reloc, tail; - void *v; LDRModulePtr elfmod; int totalsize, maxalign, i; unsigned short *secttable; @@ -2849,9 +3390,11 @@ ldrCommons = 0; nCommons = 0; -#ifdef ELFDEBUG - ELFDEBUG("Loading %s %s\n", modrec->name, modrec->cname); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_FILES, + "Loading %s %s\n", modrec->name, modrec->cname); #endif + if ((elffile = xf86loadercalloc(1, sizeof(ELFModuleRec))) == NULL) { ErrorF("Unable to allocate ELFModuleRec\n"); return NULL; @@ -2860,19 +3403,19 @@ elffile->handle = modrec->handle; elffile->module = modrec->module; elffile->fd = elffd; - v = elffile->funcs = modrec->funcs; + elffile->desc = modrec->desc; -/* - * Get the ELF header - */ + /* + * Get the ELF header + */ elffile->header = (Elf_Ehdr *) _LoaderFileToMem(elffd, 0, sizeof(Elf_Ehdr), "header"); header = (Elf_Ehdr *) elffile->header; -/* - * Get the section table - */ + /* + * Get the section table + */ elffile->numsh = header->e_shnum; elffile->secsize = (header->e_shentsize * header->e_shnum); elffile->sections = @@ -2926,9 +3469,9 @@ SecSize(header->e_shstrndx) += 32; #endif -/* - * Get the section header string table - */ + /* + * Get the section header string table + */ elffile->shstrsize = SecSize(header->e_shstrndx); elffile->shstraddr = _LoaderFileToMem(elffd, SecOffset(header->e_shstrndx), @@ -2949,9 +3492,9 @@ elffile->sections[elffile->pltndx].sh_name), ".plt"); #endif -/* - * Load some desired sections, compute size of the remaining ones - */ + /* + * Load some desired sections, compute size of the remaining ones + */ totalsize = 0; maxalign = 0; ELFCollectSections(elffile, 0, &totalsize, &maxalign); @@ -2962,14 +3505,14 @@ ELFUnloadModule(elffile); return (void *)-1L; } -/* - * add symbols - */ + /* + * add symbols + */ *ppLookup = pLookup = ELF_GetSymbols(elffile, §table); -/* - * Do relocations - */ + /* + * Do relocations + */ for (i = 0; i < elffile->lsectidx; i++) { switch (SecType(elffile->lsection[i].ndx)) { case SHT_REL: @@ -2981,8 +3524,8 @@ elf_reloc = ELFCollectRelocations(elffile, elffile->lsection[i].ndx); if (elf_reloc) { for (tail = elf_reloc; tail->next; tail = tail->next) ; - tail->next = _LoaderGetRelocations(v)->elf_reloc; - _LoaderGetRelocations(v)->elf_reloc = elf_reloc; + tail->next = *_LoaderGetRelocations(elffile->desc); + *_LoaderGetRelocations(elffile->desc) = elf_reloc; } } @@ -2998,6 +3541,12 @@ totalsize = (totalsize + 7) & ~7; totalsize += ElfCOMMONSize(); +#if defined(__powerpc__) + totalsize = (totalsize + 7) & ~7; + elffile->numplt = ELFGetNumPLTEntries(elffile); + totalsize += elffile->numplt * sizeof(pltentry); +#endif + #ifdef MergeSectionAlloc elffile->basesize = totalsize + maxalign; @@ -3007,7 +3556,7 @@ ErrorF("Unable to allocate ELF sections\n"); return NULL; } -# if defined(linux) && defined(__ia64__) || defined(__OpenBSD__) +# if defined(linux) && defined(__ia64__) || defined(__OpenBSD__) || defined(__NetBSD__) { unsigned long page_size = getpagesize(); unsigned long round; @@ -3036,7 +3585,7 @@ if (!ELFCreateGOT(elffile, maxalign)) return NULL; #endif -#if defined(__ia64__) +#if defined(__ia64__) || defined(__powerpc__) ELFCreatePLT(elffile); #endif @@ -3047,8 +3596,8 @@ pLookup[i].offset = (funcptr) ((long)pLookup[i].offset + (long)elffile->saddr[secttable[i]]); -#ifdef ELFDEBUG - ELFDEBUG("Finalizing symbol %p %s\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Finalizing symbol %p %s\n", (void *)pLookup[i].offset, pLookup[i].symName); #endif } @@ -3092,53 +3641,114 @@ } void -ELFResolveSymbols(void *mod) +ELFResolveSymbols(LoaderDescPtr desc, int handle) { - ELFRelocPtr newlist, p, tmp; + ELFRelocPtr p, *pp, tmp; - /* Try to relocate everything. Build a new list containing entries - * which we failed to relocate. Destroy the old list in the process. - */ - newlist = 0; - for (p = _LoaderGetRelocations(mod)->elf_reloc; p;) { -#ifdef ELFDEBUG - ELFDEBUG("ResolveSymbols: " - "file %p, sec %d, r_offset 0x%x, r_info 0x%p\n", - (void *)p->file, p->secn, p->rel->r_offset, + /* Try to relocate everything. */ + pp = (ELFRelocPtr *)_LoaderGetRelocations(desc); + for (p = *_LoaderGetRelocations(desc); p;) { + + /* If handle is valid, only relocate symbols for that module. */ + if (handle >= 0 && p->file->handle != handle) { + pp = &(p->next); + p = p->next; + continue; + } + +#if LOADERDEBUG + { + char *modname = _LoaderHandleToCanonicalName(p->file->handle); + if (modname) { + LoaderDebugMsg(LOADER_DEBUG_REPORT_RELOC, + "ResolvedSymbols: module %s, file %p sec %d, " + "r_offset 0x%x, r_info %p (%s)\n", + modname, (void *)p->file, p->secn, + (int)p->rel->r_offset, (void *)p->rel->r_info, + ElfGetSymbolName(p->file, + ELF_R_SYM(p->rel->r_info))); + } + } +#endif + + if (Elf_RelocateEntry(p)) { + /* + * Remove invariant relocations, since they can't change when + * other modules are loaded or unloaded. + */ + *pp = p->next; + tmp = p; + p = p->next; + xf86loaderfree(tmp); + } else { +#if LOADERDEBUG + { + char *modname = _LoaderHandleToCanonicalName(p->file->handle); + if (modname) { + LoaderDebugMsg(LOADER_DEBUG_REPORT_RELOC, + "Symbol %s %s resolved\n", + ElfGetSymbolName(p->file, + ELF_R_SYM(p->rel->r_info)), + p->relocated ? "is" : "is not"); + } + } +#endif + pp = &(p->next); + p = p->next; + } + } +} + +const char * +ELFFindRelocName(LoaderDescPtr desc, int handle, unsigned long addr) +{ + ELFRelocPtr p; + long diff; + + for (p = *_LoaderGetRelocations(desc); p;) { + /* If handle is valid, only look for symbols for that module. */ + if (handle >= 0 && p->file->handle != handle) { + p = p->next; + continue; + } +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_REPORT_RELOC, "FindRelocName: " + "file %p, sec %d, secaddr 0x%lx, r_offset 0x%x, r_info %p\n", + (void *)p->file, p->secn, + (unsigned long)p->file->saddr[p->secn], (int)p->rel->r_offset, (void *)p->rel->r_info); #endif - tmp = Elf_RelocateEntry(p->file, p->secn, p->rel, FALSE); - if (tmp) { - /* Failed to relocate. Keep it in the list. */ - tmp->next = newlist; - newlist = tmp; + + diff = addr - ((unsigned long)p->file->saddr[p->secn] + + (unsigned long)p->rel->r_offset); + if (diff < 8 && diff > -8) { + return ElfGetSymbolName(p->file, ELF_R_SYM(p->rel->r_info)); } - tmp = p; p = p->next; - xf86loaderfree(tmp); } - _LoaderGetRelocations(mod)->elf_reloc = newlist; + return NULL; } int -ELFCheckForUnresolved(void *mod) +ELFCheckForUnresolved(LoaderDescPtr desc) { ELFRelocPtr erel; - char *name; - int flag, fatalsym = 0; - - if ((erel = _LoaderGetRelocations(mod)->elf_reloc) == NULL) - return 0; + const char *name; + int fatalsym = 0; - while (erel) { - Elf_RelocateEntry(erel->file, erel->secn, erel->rel, TRUE); + for (erel = *_LoaderGetRelocations(desc); erel; erel = erel->next) { + if (erel->relocated) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_REPORT_RELOC, + "Module \"%s\" has relocation for %s\n", + _LoaderHandleToCanonicalName(erel->file->handle), + ElfGetSymbolName(erel->file, ELF_R_SYM(erel->rel->r_info))); +#endif + continue; + } name = ElfGetSymbolName(erel->file, ELF_R_SYM(erel->rel->r_info)); - flag = _LoaderHandleUnresolved(name, - _LoaderHandleToName(erel->file-> - handle)); - if (flag) + if ( _LoaderHandleUnresolved(name, erel->file->handle)) fatalsym = 1; - erel = erel->next; } return fatalsym; } @@ -3150,17 +3760,31 @@ ELFRelocPtr relptr, reltptr, *brelptr; int i; -/* - * Delete any unresolved relocations - */ + /* + * Delete our relocations. + */ + +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "Deleting relocations for module %s\n", + _LoaderHandleToCanonicalName(elffile->handle)); +#endif - relptr = _LoaderGetRelocations(elffile->funcs)->elf_reloc; - brelptr = &(_LoaderGetRelocations(elffile->funcs)->elf_reloc); + relptr = *_LoaderGetRelocations(elffile->desc); + brelptr = (ELFRelocPtr *)_LoaderGetRelocations(elffile->desc); while (relptr) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "relptr %p, relptr->file %p, elffile %p, relptrname %s, " + "elffile name %s\n", + (void *)relptr, (void *)relptr->file, (void *)elffile, + _LoaderHandleToCanonicalName(relptr->file->handle), + _LoaderHandleToCanonicalName(elffile->handle)); +#endif if (relptr->file == elffile) { *brelptr = relptr->next; /* take it out of the list */ - reltptr = relptr; /* save pointer to this node */ + reltptr = relptr; /* save pointer to this node */ relptr = relptr->next; /* advance the pointer */ xf86loaderfree(reltptr); /* free the node */ } else { @@ -3169,15 +3793,19 @@ } } -/* - * Delete any symbols in the symbols table. - */ + /* + * Delete any symbols in the symbols table. + */ +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "Deleting symbols for module %s\n", + _LoaderHandleToCanonicalName(elffile->handle)); +#endif LoaderHashTraverse((void *)elffile, ELFhashCleanOut); -/* - * Free the sections that were allocated. - */ + /* + * Free the sections that were allocated. + */ #if !defined (DoMMAPedMerge) # define CheckandFree(ptr,size) if(ptr) xf86loaderfree(ptr) #else @@ -3254,28 +3882,47 @@ } xf86loaderfree(elffile->lsection); -/* - * Free the section table, section pointer array, and section names - */ + /* + * Free the section table, section pointer array, and section names + */ _LoaderFreeFileMem(elffile->sections, elffile->secsize); xf86loaderfree(elffile->saddr); _LoaderFreeFileMem(elffile->header, sizeof(Elf_Ehdr)); _LoaderFreeFileMem(elffile->shstraddr, elffile->shstrsize); -/* - * Free the ELFModuleRec - */ + /* + * Free the ELFModuleRec + */ xf86loaderfree(elffile); return; } +static int +ELF_AddressToSectNum(ELFModulePtr elffile, unsigned long address) +{ + int i; + + for (i = 1; i < elffile->numsh; i++) { + if (address >= (unsigned long)elffile->saddr[i] && + address <= (unsigned long)elffile->saddr[i] + SecSize(i)) { + return i; + } + } + return 0; +} + char * ELFAddressToSection(void *modptr, unsigned long address) { - ELFModulePtr elffile = (ELFModulePtr) modptr; + ELFModulePtr elffile; int i; + if (!modptr) + return NULL; + else + elffile = (ELFModulePtr)modptr; + for (i = 1; i < elffile->numsh; i++) { if (address >= (unsigned long)elffile->saddr[i] && address <= (unsigned long)elffile->saddr[i] + SecSize(i)) { @@ -3284,3 +3931,192 @@ } return NULL; } + +/* + * ELFAddressToSymbol + */ + +const char * +ELFAddressToSymbol(void *modptr, unsigned long address, unsigned long *symaddr, + const char **filename, int exe) +{ + ELFModulePtr elffile; + Elf_Sym *syms; + Elf_Shdr *sect; + int i, numsyms; + long bestDiff = MAXINT, diff; + const char *best = NULL; + unsigned long saddr, bestAddr = 0; + int sectnum; + + if (!modptr) + return NULL; + else + elffile = (ELFModulePtr)modptr; + + syms = elffile->symtab; + sect = &(elffile->sections[elffile->symndx]); + numsyms = sect->sh_size / sect->sh_entsize; + + sectnum = ELF_AddressToSectNum(elffile, address); + + if (!sectnum && !exe) + return NULL; + + for (i = 0; i < numsyms; i++) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, + "value=%lx\tsize=%lx\tBIND=%x\tTYPE=%x\tndx=%x\t%s\n", + (unsigned long)syms[i].st_value, + (unsigned long)syms[i].st_size, + ELF_ST_BIND(syms[i].st_info), ELF_ST_TYPE(syms[i].st_info), + syms[i].st_shndx, ElfGetString(elffile, syms[i].st_name)); +#endif + + if (syms[i].st_shndx != sectnum && !exe) + continue; + + switch (ELF_ST_TYPE(syms[i].st_info)) { + case STT_OBJECT: + case STT_FUNC: + case STT_SECTION: + saddr = syms[i].st_value + (unsigned long)elffile->saddr[sectnum]; + diff = address - saddr; + if (diff >= 0) { + if ((best && diff < bestDiff && syms[i].st_name > 0) || !best) { + best = ElfGetString(elffile, syms[i].st_name); + bestDiff = diff; + bestAddr = saddr; + } + } + break; + } + } + *filename = NULL; + if (best && bestDiff < 0x10000) { + *symaddr = bestAddr; + return best; + } else { + return NULL; + } +} + + +#if EXESYMDEBUG +static void +ShowExeSyms(ELFModulePtr elffile) +{ + Elf_Sym *syms; + Elf_Shdr *sect; + int i, numsyms; + + syms = elffile->symtab; + sect = &(elffile->sections[elffile->symndx]); + if (!sect->sh_entsize) + return; + numsyms = sect->sh_size / sect->sh_entsize; + + LoaderDebugMsg(LOADER_DEBUG_SHOW_EXE_SYMS, + "ShowExeSyms: numsyms: %d\n", numsyms); + + for (i = 0; i < numsyms; i++) { + LoaderDebugMsg(LOADER_DEBUG_SHOW_EXE_SYMS, + "ShowExeSyms: " + "value=%lx\tsize=%lx\tBIND=%x\tTYPE=%x\tndx=%x\t%s\n", + (unsigned long)syms[i].st_value, + (unsigned long)syms[i].st_size, + ELF_ST_BIND(syms[i].st_info), ELF_ST_TYPE(syms[i].st_info), + syms[i].st_shndx, ElfGetString(elffile, syms[i].st_name)); + + switch (ELF_ST_TYPE(syms[i].st_info)) { + case STT_OBJECT: + case STT_FUNC: + case STT_SECTION: + case STT_NOTYPE: + switch (syms[i].st_shndx) { + case SHN_ABS: + case SHN_COMMON: + case SHN_UNDEF: + default: + break; + } + break; + } + } +} +#endif + +/* + * ELFReadExecutableSyms + * + * Open the main executable, and read in the symbol table and section + * offsets. + */ +void * +ELFReadExecutableSyms(int elffd) +{ + ELFModulePtr elffile; + Elf_Ehdr *header; + int totalsize, maxalign; + + ldrCommons = 0; + nCommons = 0; + + elffile = xf86loadercalloc(1, sizeof(*elffile)); + if (!elffile) { + ErrorF("Cannot allocate space for the main executable symbol table\n"); + return NULL; + } + + elffile->fd = elffd; + + /* + * Get the ELF header + */ + elffile->header = + (Elf_Ehdr *) _LoaderFileToMem(elffd, 0, sizeof(Elf_Ehdr), + "header"); + header = elffile->header; + + /* + * Get the section table + */ + elffile->numsh = header->e_shnum; + elffile->secsize = (header->e_shentsize * header->e_shnum); + elffile->sections = + (Elf_Shdr *) _LoaderFileToMem(elffd, header->e_shoff, + elffile->secsize, "sections"); + elffile->saddr = + xf86loadercalloc(elffile->numsh, sizeof(unsigned char *)); + + /* + * Get the section header string table + */ + elffile->shstrsize = SecSize(header->e_shstrndx); + elffile->shstraddr = + _LoaderFileToMem(elffd, SecOffset(header->e_shstrndx), + SecSize(header->e_shstrndx), ".shstrtab"); + elffile->shstrndx = header->e_shstrndx; + + /* + * Load some desired sections, compute size of the remaining ones + */ + totalsize = 0; + maxalign = 0; + ELFCollectSections(elffile, 0, &totalsize, &maxalign); + if (elffile->straddr == NULL || elffile->strsize == 0 || + elffile->sections[elffile->symndx].sh_entsize == 0) { + ErrorF("No symbols found in the main executable.\n"); + _LoaderFreeFileMem(elffile->sections, elffile->secsize); + _LoaderFreeFileMem(elffile->header, sizeof(Elf_Ehdr)); + _LoaderFreeFileMem(elffile->shstraddr, elffile->shstrsize); + xf86loaderfree(elffile->saddr); + xf86loaderfree(elffile); + return NULL; + } +#if EXESYMDEBUG + ShowExeSyms(elffile); +#endif + return elffile; +} + Index: xc/programs/Xserver/hw/xfree86/loader/elfloader.h diff -u xc/programs/Xserver/hw/xfree86/loader/elfloader.h:1.4 xc/programs/Xserver/hw/xfree86/loader/elfloader.h:1.6 --- xc/programs/Xserver/hw/xfree86/loader/elfloader.h:1.4 Wed Oct 15 12:29:03 2003 +++ xc/programs/Xserver/hw/xfree86/loader/elfloader.h Thu Mar 16 11:50:34 2006 @@ -21,14 +21,23 @@ * PERFORMANCE OF THIS SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/elfloader.h,v 1.4 2003/10/15 16:29:03 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/elfloader.h,v 1.6 2006/03/16 16:50:34 dawes Exp $ */ #ifndef _ELFLOADER_H #define _ELFLOADER_H + +typedef struct _elf_reloc *ELFRelocPtr; +typedef struct _elf_COMMON *ELFCommonPtr; + /* elfloader.c */ extern void *ELFLoadModule(loaderPtr, int, LOOKUP **); -extern void ELFResolveSymbols(void *); -extern int ELFCheckForUnresolved(void *); +extern void ELFResolveSymbols(LoaderDescPtr, int); +extern int ELFCheckForUnresolved(LoaderDescPtr); extern char *ELFAddressToSection(void *, unsigned long); extern void ELFUnloadModule(void *); +extern const char *ELFFindRelocName(LoaderDescPtr, int, unsigned long); +extern const char *ELFAddressToSymbol(void *, unsigned long, unsigned long *, + const char **, int); +extern void *ELFReadExecutableSyms(int); + #endif /* _ELFLOADER_h */ Index: xc/programs/Xserver/hw/xfree86/loader/extsym.c diff -u xc/programs/Xserver/hw/xfree86/loader/extsym.c:1.10 xc/programs/Xserver/hw/xfree86/loader/extsym.c:1.12 --- xc/programs/Xserver/hw/xfree86/loader/extsym.c:1.10 Fri Feb 13 18:58:44 2004 +++ xc/programs/Xserver/hw/xfree86/loader/extsym.c Wed Mar 1 22:00:38 2006 @@ -1,7 +1,7 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/extsym.c,v 1.10 2004/02/13 23:58:44 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/extsym.c,v 1.12 2006/03/02 03:00:38 dawes Exp $ */ /* - * Copyright 1999-2003 by The XFree86 Project, Inc. + * Copyright 1999-2006 by The XFree86 Project, Inc. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining @@ -99,5 +99,10 @@ SYMVAR(XRC_DRAWABLE) #endif - {0, 0} +#ifdef DbeValidateBuffer + SYMFUNC(DbeValidateBuffer) /* actually xf86DbeValidateBuffer */ + SYMFUNC(xf86DbeRegisterValidateBuffer) +#endif + + LOOKUP_TERMINATOR }; Index: xc/programs/Xserver/hw/xfree86/loader/fontsym.c diff -u xc/programs/Xserver/hw/xfree86/loader/fontsym.c:1.16 xc/programs/Xserver/hw/xfree86/loader/fontsym.c:1.18 --- xc/programs/Xserver/hw/xfree86/loader/fontsym.c:1.16 Wed Sep 15 11:01:26 2004 +++ xc/programs/Xserver/hw/xfree86/loader/fontsym.c Wed Mar 1 22:00:38 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/fontsym.c,v 1.16 2004/09/15 15:01:26 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/fontsym.c,v 1.18 2006/03/02 03:00:38 dawes Exp $ */ /* * Copyright (c) 1998-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -46,10 +46,10 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "font.h" +#include #include "sym.h" #include "fntfilst.h" -#include "fontenc.h" +#include #ifdef FONTENC_COMPATIBILITY #include "fontencc.h" #endif @@ -125,5 +125,5 @@ SYMFUNC(FontCacheGetBitmap) #endif - {0, 0} + LOOKUP_TERMINATOR }; Index: xc/programs/Xserver/hw/xfree86/loader/hash.c diff -u xc/programs/Xserver/hw/xfree86/loader/hash.c:1.25 xc/programs/Xserver/hw/xfree86/loader/hash.c:1.29 --- xc/programs/Xserver/hw/xfree86/loader/hash.c:1.25 Sat Nov 22 19:57:56 2003 +++ xc/programs/Xserver/hw/xfree86/loader/hash.c Sat Apr 8 13:53:40 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/hash.c,v 1.25 2003/11/23 00:57:56 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/hash.c,v 1.29 2006/04/08 17:53:40 dawes Exp $ */ /* * @@ -22,13 +22,89 @@ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ +/* + * Copyright (c) 1997-2003 by The XFree86 Project, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Except as contained in this notice, the name of the copyright holder(s) + * and author(s) shall not be used in advertising or otherwise to promote + * the sale, use or other dealings in this Software without prior written + * authorization from the copyright holder(s) and author(s). + */ +/* + * Copyright 2003-2006 by David H. Dawes. + * Copyright 2003-2006 by X-Oz Technologies. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. The end-user documentation included with the redistribution, + * if any, must include the following acknowledgment: "This product + * includes software developed by X-Oz Technologies + * (http://www.x-oz.com/)." Alternately, this acknowledgment may + * appear in the software itself, if and wherever such third-party + * acknowledgments normally appear. + * + * 4. Except as contained in this notice, the name of X-Oz + * Technologies shall not be used in advertising or otherwise to + * promote the sale, use or other dealings in this Software without + * prior written authorization from X-Oz Technologies. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL X-OZ TECHNOLOGIES OR ITS CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ #include "os.h" -#include "Xos.h" +#include #undef abs #include #include "sym.h" + +#ifndef LOADERDEBUG +#define LOADERDEBUG 0 +#endif #include "loader.h" +#include "loaderProcs.h" #include "hash.h" #if defined(Lynx) @@ -45,63 +121,147 @@ static itemPtr LoaderhashTable[HASHSIZE]; -#ifdef DEBUG +#if LOADERDEBUG static int hashhits[HASHSIZE]; +static int hashdepth[HASHSIZE]; +static int hashmaxdepth[HASHSIZE]; +#endif void -DumpHashHits(void) +LoaderDumpHashHits(void) { +#if LOADERDEBUG int i; + int hits = 0; int depth = 0; - int dev = 0; + int maxdepth = 0; + int hitsdev = 0, hitsmaxdev = 0, hitsmaxdevi = 0; + int depthdev = 0, depthmaxdev = 0, depthmaxdevi = 0; + int maxdepthdev = 0, maxdepthmaxdev = 0, maxdepthmaxdevi = 0; for (i = 0; i < HASHSIZE; i++) { - ErrorF("hashhits[%d]=%d\n", i, hashhits[i]); - depth += hashhits[i]; + LoaderDebugMsg(LOADER_DEBUG_HASH_DETAILS, + "hashhits[%d] = %d, hashdepth[%d] = %d, " + "hashmaxdepth[%d] = %d\n", + i, hashhits[i], i, hashdepth[i], i, hashmaxdepth[i]); + hits += hashhits[i]; + depth += hashdepth[i]; + maxdepth += hashmaxdepth[i]; } + hits /= HASHSIZE; depth /= HASHSIZE; - ErrorF("Average hash depth=%d\n", depth); + maxdepth /= HASHSIZE; for (i = 0; i < HASHSIZE; i++) { - if (hashhits[i] < depth) - dev += depth - hashhits[i]; + int delta; + + if (hashhits[i] < hits) + delta = hits - hashhits[i]; + else + delta = hashhits[i] - hits; + hitsdev += delta; + if (delta > hitsmaxdev) { + hitsmaxdev = delta; + hitsmaxdevi = i; + } + if (hashdepth[i] < depth) + delta = depth - hashdepth[i]; + else + delta = hashdepth[i] - depth; + depthdev += delta; + if (delta > depthmaxdev) { + depthmaxdev = delta; + depthmaxdevi = i; + } + if (hashmaxdepth[i] < maxdepth) + delta = maxdepth - hashmaxdepth[i]; else - dev += hashhits[i] - depth; + delta = hashmaxdepth[i] - maxdepth; + maxdepthdev += delta; + if (delta > maxdepthmaxdev) { + maxdepthmaxdev = delta; + maxdepthmaxdevi = i; + } } - dev /= HASHSIZE; - ErrorF("Average hash deviation=%d\n", dev); -} + hitsdev /= HASHSIZE; + depthdev /= HASHSIZE; + maxdepthdev /= HASHSIZE; + LoaderDebugMsg(LOADER_DEBUG_HASH_SUMMARY, + "Average hash hits = %d\n", hits); + LoaderDebugMsg(LOADER_DEBUG_HASH_SUMMARY, + "Average hash hits deviation = %d\n", hitsdev); + LoaderDebugMsg(LOADER_DEBUG_HASH_SUMMARY, + "Maximum hash hits deviation = %d for bucket %d\n", + hitsmaxdev, hitsmaxdevi); + LoaderDebugMsg(LOADER_DEBUG_HASH_SUMMARY, + "Average hash depth = %d\n", depth); + LoaderDebugMsg(LOADER_DEBUG_HASH_SUMMARY, + "Average hash depth deviation = %d\n", depthdev); + LoaderDebugMsg(LOADER_DEBUG_HASH_SUMMARY, + "Maximum hash depth deviation = %d for bucket %d\n", + depthmaxdev, depthmaxdevi); + LoaderDebugMsg(LOADER_DEBUG_HASH_SUMMARY, + "Average hash max depth = %d\n", maxdepth); + LoaderDebugMsg(LOADER_DEBUG_HASH_SUMMARY, + "Average hash max depth deviation = %d\n", maxdepthdev); + LoaderDebugMsg(LOADER_DEBUG_HASH_SUMMARY, + "Maximum hash max depth deviation = %d for bucket %d\n", + maxdepthmaxdev, maxdepthmaxdevi); + LoaderDumpSymbols(); +#else + return; #endif +} static unsigned int hashFunc(const char *string) { - int i = 0; + int i, i1, i2, i3, i4; + int hash = 0; + int len; - while (i < 10 && string[i]) - i++; + i = len = strlen(string); - if (i < 5) { -#ifdef DEBUG - hashhits[i]++; -#endif - return i; + if (len < 5) { + hash = len; + } else { + i1 = 5; + i2 = 4; + i3 = 3; + i4 = 2; + if (len < 25) { + i1 >>= 1; + i2 >>= 1; + i3 >>= 1; + i4 >>= 1; + } else if (len < 45) { + i1 >>= 2; + i2 >>= 2; + i3 >>= 2; + i4 >>= 2; + } else { + i1 >>= 3; + i2 >>= 3; + i3 >>= 3; + i4 >>= 3; + } + if (len > 40) + i = 40; + else if (len > 20) + i = 20; + else if (len > 10) + i = 10; + hash = (string[len - i1] * string[i - i2] + + string[i - i3] * string[len - i4]) & (HASHSIZE - 1); } -/* - * Original has function -#define HASH ((string[ i-4 ] * string[i-3] + string[i-2] ) & (HASHSIZE-1)) - */ - -#define HASH ((string[i-5] * string[ i-4 ] + string[i-3] * string[i-2] ) & (HASHSIZE-1)) - -#ifdef DEBUG - hashhits[HASH]++; +#if LOADERDEBUG + hashhits[hash]++; #endif - return HASH; + return hash; } void @@ -110,20 +270,31 @@ int bucket = hashFunc(entry->name); itemPtr oentry; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_HASH_ADD, "LoaderHashAdd: %s\n", entry->name); +#endif + if ((oentry = LoaderHashFind(entry->name)) != NULL) LoaderDuplicateSymbol(entry->name, oentry->handle); entry->next = LoaderhashTable[bucket]; LoaderhashTable[bucket] = entry; +#if LOADERDEBUG + hashdepth[bucket]++; + if (hashdepth[bucket] > hashmaxdepth[bucket]) + hashmaxdepth[bucket] = hashdepth[bucket]; +#endif return; } void -LoaderAddSymbols(int handle, int module, LOOKUP *list) +LoaderAddSymbols(int handle, int module, LOOKUP *list, unsigned long scope, char **modData) { - LOOKUP *l = list, *exports = NULL; - itemPtr i, exportsItem = NULL; + LOOKUP *l = list, *exports = NULL, *moddata = NULL; + itemPtr i; char *modname; + const char **exportedSymbols = NULL; + const char **s = NULL; if (!list) return; @@ -134,55 +305,98 @@ * export all of the external symbols. */ modname = _LoaderHandleToCanonicalName(handle); + if (modname) { - char *exportname; + char *exportName = NULL; + char *moddataName = NULL; + +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_ADD_SYMBOLS, + "LoaderAddSymbols: module %s\n", modname); +#endif - exportname = xf86loadermalloc(strlen("ExportedSymbols") + + exportName = xf86loadermalloc(strlen(EXPORTED_SYMS_NAME) + strlen(modname) + 1); - if (exportname) { - sprintf(exportname, "%sExportedSymbols", modname); - while (l->symName) { - if (strcmp(l->symName, exportname) == 0) { - exports = l; - ErrorF("LoaderAddSymbols: %s: %s found\n", modname, - exportname); - break; - } - l++; + if (!exportName) + return; + + if (modData) { + moddataName = xf86loadermalloc(strlen(MODULE_DATA_NAME) + + strlen(modname) + 1); + if (!moddataName) { + xf86loaderfree(exportName); + return; } - xf86loaderfree(exportname); + sprintf(moddataName, "%s" MODULE_DATA_NAME, modname); + } + + sprintf(exportName, "%s" EXPORTED_SYMS_NAME, modname); + + while (l->symName) { + if (strcmp(l->symName, exportName) == 0) + exports = l; + else if (modData && strcmp(l->symName, moddataName) == 0) + moddata = l; + if (exports && (!modData || moddata)) + break; + l++; } + xf86loaderfree(exportName); + if (moddataName) + xf86loaderfree(moddataName); } /* - * Allocate the exports list item first. + * Allocate the exports and moddata list items first. */ + if (moddata) { + *modData = (char *)moddata->offset; + } if (exports) { - exportsItem = xf86loadermalloc(sizeof(itemRec)); - exportsItem->name = exports->symName; - exportsItem->address = (char *)exports->offset; - exportsItem->handle = handle; - exportsItem->module = module; - exportsItem->exports = NULL; - LoaderHashAdd(exportsItem); + LoaderResolveSymbols(handle); + exportedSymbols = (const char **)exports->offset; +#if LOADERDEBUG + if (exportedSymbols) { + for (s = exportedSymbols; *s; s++) { + LoaderDebugMsg(LOADER_DEBUG_ADD_SYMBOLS, + "ExportedSymbols: %s\n", *s); + } + } +#endif } - /* - * Visit every symbol in the lookup table, tagging it with the - * reference to the export list, if present. - */ - l = list; - while (l->symName) { - if (l != exports) { - i = xf86loadermalloc(sizeof(itemRec)); - i->name = l->symName; - i->address = (char *)l->offset; - i->handle = handle; - i->module = module; - i->exports = exportsItem; - LoaderHashAdd(i); + if (scope == LOOKUP_SCOPE_AUTO && !exports) + scope = LOOKUP_SCOPE_GLOBAL; + + for (l = list; l->symName; l++) { + if ((exports && l == exports) || (moddata && l == moddata)) + continue; + + i = xf86loadercalloc(1, sizeof(itemRec)); + if (exports && scope == LOOKUP_SCOPE_AUTO) { + /* Check if the symbols is in the exports list. */ + for (s = exportedSymbols; *s; s++) { + if (strcmp(*s, l->symName) == 0) { + i->scope = LOOKUP_SCOPE_GLOBAL; + break; + } + } + if (!*s) + i->scope = LOOKUP_SCOPE_SELF; + } else { + i->scope = scope; } - l++; + i->name = l->symName; + i->address = (char *)l->offset; + i->handle = handle; + i->module = module; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_ADD_SYMBOLS, + "LoaderAddSymbols: module \"%s\" adding symbol %s (%p), " + "scope 0x%lx\n", + modname, l->symName, (void *)l->offset, i->scope); +#endif + LoaderHashAdd(i); } } @@ -205,6 +419,9 @@ entry2 = &(entry->next); entry = entry->next; } +#if LOADERDEBUG + hashdepth[bucket]--; +#endif return 0; } @@ -253,27 +470,56 @@ return best_entry; } -void +/* Returns 0 when the symbol's name is 'main' */ + +int LoaderPrintSymbol(unsigned long address) { itemPtr entry; + unsigned long symaddr = 0; + const char *symname = NULL; + const char *module = NULL, *section = NULL; + + symname = _LoaderAddressToSymbol(address, &symaddr, &module); + if (!symname) { + entry = LoaderHashFindNearest(address); + if (entry) { + symname = entry->name; + symaddr = (unsigned long)entry->address; + } + } + if (!module) + _LoaderAddressToSection(address, &module, §ion); - entry = LoaderHashFindNearest(address); - if (entry) { - const char *module, *section; - + if (symname) { #if defined(__alpha__) || defined(__ia64__) - ErrorF("0x%016lx %s+%lx\n", (unsigned long)entry->address, - entry->name, address - (unsigned long)entry->address); + if (symaddr != 0) + ErrorF("0x%016lx %s + 0x%lx\n", + symaddr, symname, address - symaddr); + else + ErrorF("%s\n", symname); #else - ErrorF("0x%lx %s+%lx\n", (unsigned long)entry->address, entry->name, - address - (unsigned long)entry->address); -#endif + if (symaddr != 0 && address - symaddr > 0x10000) { + ErrorF("\n"); + return 1; + } - if (_LoaderAddressToSection(address, &module, §ion)) - ErrorF("\tModule \"%s\"\n\tSection \"%s\"\n", module, section); + if (symaddr != 0) + ErrorF("0x%lx %s + 0x%lx\n", symaddr, symname, address - symaddr); + else + ErrorF("%s\n", symname); +#endif + if (module) + ErrorF("\tModule \"%s\"\n", module); + if (section) + ErrorF("\tSection \"%s\"\n", section); + if (!strcmp(symname, "main")) + return 0; + else + return 1; } else { - ErrorF("(null)\n"); + ErrorF("\n"); + return 1; } } @@ -284,15 +530,20 @@ const char *module, *section; #if defined(__alpha__) || defined(__ia64__) - ErrorF("0x%016lx %s\n", (unsigned long)pItem->address, pItem->name); + ErrorF("0x%016lx %s", (unsigned long)pItem->address, pItem->name); #else - ErrorF("0x%lx %s\n", (unsigned long)pItem->address, pItem->name); + ErrorF("0x%lx %s", (unsigned long)pItem->address, pItem->name); #endif - if (_LoaderAddressToSection((unsigned long)pItem->address, + ErrorF(" (scope 0x%lx", pItem->scope); + if (pItem->handle >= 0) + ErrorF(", handle %d", pItem->handle); + ErrorF(")\n"); + if (pItem->address && + _LoaderAddressToSection((unsigned long)pItem->address, &module, §ion)) ErrorF("\tModule \"%s\"\n\tSection \"%s\"\n", module, section); } else - ErrorF("(null)\n"); + ErrorF("\n"); } void @@ -311,7 +562,7 @@ itemPtr entry, last_entry = 0; for (i = 0; i < HASHSIZE; i++) { - last_entry = 0; + last_entry = NULL; entry = LoaderhashTable[i]; while (entry) { if ((*fnp) (card, entry)) { @@ -326,6 +577,9 @@ xf86loaderfree(entry); entry = LoaderhashTable[i]; } +#if LOADERDEBUG + hashdepth[i]--; +#endif } else { last_entry = entry; entry = entry->next; @@ -334,18 +588,23 @@ } } +#if LOADERDEBUG void LoaderDumpSymbols() { itemPtr entry; int j; + if (!(LoaderDebugLevel & LOADER_DEBUG_DUMP_HASH)) + return; + for (j = 0; j < HASHSIZE; j++) { entry = LoaderhashTable[j]; while (entry) { + ErrorF("Hash bucket %d:\n", j); LoaderPrintItem(entry); entry = entry->next; } } - } +#endif Index: xc/programs/Xserver/hw/xfree86/loader/hash.h diff -u xc/programs/Xserver/hw/xfree86/loader/hash.h:1.3 xc/programs/Xserver/hw/xfree86/loader/hash.h:1.4 --- xc/programs/Xserver/hw/xfree86/loader/hash.h:1.3 Sat Jul 25 12:56:16 1998 +++ xc/programs/Xserver/hw/xfree86/loader/hash.h Wed Mar 1 22:00:38 2006 @@ -21,12 +21,13 @@ * PERFORMANCE OF THIS SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/hash.h,v 1.3 1998/07/25 16:56:16 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/hash.h,v 1.4 2006/03/02 03:00:38 dawes Exp $ */ #ifndef _HASH_H #define _HASH_H -#include "loader.h" +#define HASHDIV 12 +#define HASHSIZE (1 << HASHDIV) typedef struct _HashIterator { itemPtr pItem; Index: xc/programs/Xserver/hw/xfree86/loader/loader.c diff -u xc/programs/Xserver/hw/xfree86/loader/loader.c:1.74 xc/programs/Xserver/hw/xfree86/loader/loader.c:1.80 --- xc/programs/Xserver/hw/xfree86/loader/loader.c:1.74 Thu Dec 2 21:18:39 2004 +++ xc/programs/Xserver/hw/xfree86/loader/loader.c Sat Apr 8 13:53:40 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.c,v 1.74 2004/12/03 02:18:39 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.c,v 1.80 2006/04/08 17:53:40 dawes Exp $ */ /* * Copyright 1995-1998 by Metro Link, Inc. @@ -22,7 +22,7 @@ * PERFORMANCE OF THIS SOFTWARE. */ /* - * Copyright (c) 1997-2003 by The XFree86 Project, Inc. + * Copyright (c) 1997-2005 by The XFree86 Project, Inc. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining @@ -67,6 +67,51 @@ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* + * Copyright 2003-2006 by David H. Dawes. + * Copyright 2003-2006 by X-Oz Technologies. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. The end-user documentation included with the redistribution, + * if any, must include the following acknowledgment: "This product + * includes software developed by X-Oz Technologies + * (http://www.x-oz.com/)." Alternately, this acknowledgment may + * appear in the software itself, if and wherever such third-party + * acknowledgments normally appear. + * + * 4. Except as contained in this notice, the name of X-Oz + * Technologies shall not be used in advertising or otherwise to + * promote the sale, use or other dealings in this Software without + * prior written authorization from X-Oz Technologies. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL X-OZ TECHNOLOGIES OR ITS CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ #include #include @@ -81,38 +126,88 @@ #include #if defined(linux) && \ (defined(__alpha__) || defined(__powerpc__) || defined(__ia64__) \ - || defined(__AMD64__)) + || defined(__amd64__) || defined(__x86_64__)) #include #endif #include +#if defined(sun) && defined(SVR4) +#include +#endif #include "ar.h" #include "elf.h" +#ifdef COFF_SUPPORT #include "coff.h" - +#endif #include "os.h" #include "sym.h" + +#ifndef LOADERDEBUG +#define LOADERDEBUG 0 +#endif +#define LOADER_DEBUG_DESCRIPTIONS #include "loader.h" +#include "aoutloader.h" +#ifdef COFF_SUPPORT +#include "coffloader.h" +#endif +#include "elfloader.h" +#ifdef DLOPEN_SUPPORT +#include "dlloader.h" +#endif + #include "loaderProcs.h" #include "xf86.h" #include "xf86Priv.h" #include "compiler.h" +#ifdef STACKTRACE +#include "getstack.h" +#endif + +#ifndef LOADER_UNRESOLVED_IS_FATAL +#define LOADER_UNRESOLVED_IS_FATAL 0 +#endif + +/* + * procfs feature defines. procfs is used, where available, to locate the + * main executable file so that the loader can open it and examine its symbols. + * + * Features are: + * + * HAVE_PROCFS - /proc is available. + * PROCFS_EXE_SYMLINK - /proc provides a symlink to the executable. + * PROCFS_EXE_NAME - The node under /proc// that points to + * the executable. + * HAVE_PROCFS_PSINFO - /proc//psinfo can be used to get + * the executable name. + * PROCFS_PSINFO_FULLPATH - The full executable pathname can be found + * via /proc//psinfo. + */ + +#if defined(__linux__) +#define HAVE_PROCFS +#define PROCFS_EXE_SYMLINK +#define PROCFS_EXE_NAME "exe" +#elif defined(__FreeBSD__) +#define HAVE_PROCFS +#define PROCFS_EXE_SYMLINK +#define PROCFS_EXE_NAME "file" +#elif defined(__NetBSD__) || defined(__OpenBSD__) +#define HAVE_PROCFS +#define PROCFS_EXE_NAME "file" +#elif defined(sun) && defined(SVR4) +#define HAVE_PROCFS +#define PROCFS_EXE_NAME "object/a.out" +#define HAVE_PROCFS_PSINFO +#endif + extern LOOKUP miLookupTab[]; extern LOOKUP xfree86LookupTab[]; extern LOOKUP dixLookupTab[]; extern LOOKUP fontLookupTab[]; extern LOOKUP extLookupTab[]; -/* -#define DEBUG -#define DEBUGAR -#define DEBUGLIST -#define DEBUGMEM -*/ - -int check_unresolved_sema = 0; - #if defined(Lynx) && defined(sun) /* Cross build machine doesn;t have strerror() */ #define strerror(err) "strerror unsupported" @@ -240,19 +335,23 @@ LDRCommonPtr ldrCommons; int nCommons; -typedef struct { +typedef struct _symlist symlist, *symlistPtr; + +struct _symlist { int num; + ModuleDescPtr module; const char **list; -} symlist; + symlistPtr next; +}; /* * List of symbols that may be referenced, and which are allowed to be * unresolved providing that they don't appear on the "reqired" list. */ -static symlist refList = { 0, NULL }; +static symlist refList = { 0, NULL, NULL, NULL }; /* List of symbols that must not be unresolved */ -static symlist reqList = { 0, NULL }; +static symlist reqList = { 0, NULL, NULL, NULL }; static int fatalReqSym = 0; @@ -260,109 +359,201 @@ static int _GetModuleType(int, long); static loaderPtr _LoaderListPush(void); static loaderPtr _LoaderListPop(int); - /*ARGSUSED*/ static void -ARCHIVEResolveSymbols(void *unused) +static void ReadMainExe(void); +static const char *GetExePath(const char **); + +static char *exePath = NULL; +static char *exeName = NULL; + +#ifndef COFF_SUPPORT +static void * +DUMMYLoadModule(loaderPtr modrec, int fd, LOOKUP **ppLookup) +{ + return NULL; +} +#endif + +static void +DUMMYResolveSymbols(LoaderDescPtr desc, int handle) { } - /*ARGSUSED*/ static int -ARCHIVECheckForUnresolved(void *v) +static int +DUMMYCheckForUnresolved(LoaderDescPtr desc) { return 0; } - /*ARGSUSED*/ static char * -ARCHIVEAddressToSection(void *modptr, unsigned long address) +static char * +DUMMYAddressToSection(void *modptr, unsigned long address) +{ + return NULL; +} +static void +DUMMYUnload(void *v) +{ +} + +static const char * +DUMMYFindRelocName(LoaderDescPtr desc, int handle, unsigned long addr) { return NULL; } - /*ARGSUSED*/ static void -ARCHIVEUnload(void *unused2) + +static const char * +DUMMYAddressToSymbol(void *modptr, unsigned long addr, unsigned long *symaddr, + const char **filename, int exe) { + return NULL; } +static void * +DUMMYReadExecutableSyms(int exefd) +{ + return NULL; +} + +static void *ARCHIVELoadModule(loaderPtr modrec, int arfd, LOOKUP ** ppLookup); + /* * Array containing entry points for different formats. */ +#ifndef COFF_SUPPORT +static LoaderDesc DUMMYdesc = { + DUMMYLoadModule, + DUMMYResolveSymbols, + DUMMYCheckForUnresolved, + DUMMYAddressToSection, + DUMMYUnload, + DUMMYFindRelocName, + DUMMYAddressToSymbol, + DUMMYReadExecutableSyms, + NULL +}; +#endif + +static LoaderDesc ARCHIVEdesc = { + ARCHIVELoadModule, + DUMMYResolveSymbols, + DUMMYCheckForUnresolved, + DUMMYAddressToSection, + DUMMYUnload, + DUMMYFindRelocName, + DUMMYAddressToSymbol, + DUMMYReadExecutableSyms, + NULL +}; + +static LoaderDesc ELFdesc = { + ELFLoadModule, + ELFResolveSymbols, + ELFCheckForUnresolved, + ELFAddressToSection, + ELFUnloadModule, + ELFFindRelocName, + ELFAddressToSymbol, + ELFReadExecutableSyms, + NULL +}; + +#ifdef COFF_SUPPORT +static LoaderDesc COFFdesc = { + COFFLoadModule, + COFFResolveSymbols, + COFFCheckForUnresolved, + COFFAddressToSection, + COFFUnloadModule, + COFFFindRelocName, + COFFAddressToSymbol, + COFFReadExecutableSyms, + NULL +}; +#endif + +static LoaderDesc AOUTdesc = { + AOUTLoadModule, + AOUTResolveSymbols, + AOUTCheckForUnresolved, + AOUTAddressToSection, + AOUTUnloadModule, + AOUTFindRelocName, + AOUTAddressToSymbol, + AOUTReadExecutableSyms, + NULL +}; -static loader_funcs funcs[] = { - /* LD_ARCHIVE */ - {ARCHIVELoadModule, - ARCHIVEResolveSymbols, - ARCHIVECheckForUnresolved, - ARCHIVEAddressToSection, - ARCHIVEUnload, {0, 0, 0, 0, 0}}, - /* LD_ELFOBJECT */ - {ELFLoadModule, - ELFResolveSymbols, - ELFCheckForUnresolved, - ELFAddressToSection, - ELFUnloadModule, {0, 0, 0, 0, 0}}, - /* LD_COFFOBJECT */ - {COFFLoadModule, - COFFResolveSymbols, - COFFCheckForUnresolved, - COFFAddressToSection, - COFFUnloadModule, {0, 0, 0, 0, 0}}, - /* LD_XCOFFOBJECT */ - {COFFLoadModule, - COFFResolveSymbols, - COFFCheckForUnresolved, - COFFAddressToSection, - COFFUnloadModule, {0, 0, 0, 0, 0}}, - /* LD_AOUTOBJECT */ - {AOUTLoadModule, - AOUTResolveSymbols, - AOUTCheckForUnresolved, - AOUTAddressToSection, - AOUTUnloadModule, {0, 0, 0, 0, 0}}, - /* LD_AOUTDLOBJECT */ #ifdef DLOPEN_SUPPORT - {DLLoadModule, - DLResolveSymbols, - DLCheckForUnresolved, - ARCHIVEAddressToSection, - DLUnloadModule, {0, 0, 0, 0, 0}}, +static LoaderDesc DLdesc = { + DLLoadModule, + DUMMYResolveSymbols, + DUMMYCheckForUnresolved, + DUMMYAddressToSection, + DLUnloadModule, + DUMMYFindRelocName, + DLAddressToSymbol, + DUMMYReadExecutableSyms, + NULL +}; +#endif + +static LoaderDescPtr ldesc[] = { + &ARCHIVEdesc, /* LD_ARCHIVE */ + &ELFdesc, /* LD_ELFOBJECT */ +#ifdef COFF_SUPPORT + &COFFdesc, /* LD_COFFOBJECT */ + &COFFdesc, /* LD_XCOFFOBJECT */ #else - {AOUTLoadModule, - AOUTResolveSymbols, - AOUTCheckForUnresolved, - AOUTAddressToSection, - AOUTUnloadModule, {0, 0, 0, 0, 0}}, + &DUMMYdesc, /* LD_COFFOBJECT */ + &DUMMYdesc, /* LD_XCOFFOBJECT */ #endif - /* LD_ELFDLOBJECT */ + &AOUTdesc, /* LD_AOUTOBJECT */ #ifdef DLOPEN_SUPPORT - {DLLoadModule, - DLResolveSymbols, - DLCheckForUnresolved, - ARCHIVEAddressToSection, - DLUnloadModule, {0, 0, 0, 0, 0}}, + &DLdesc, /* LD_AOUTDLOBJECT */ + &DLdesc, /* LD_ELFDLOBJECT */ #else - {ELFLoadModule, - ELFResolveSymbols, - ELFCheckForUnresolved, - ELFAddressToSection, - ELFUnloadModule, {0, 0, 0, 0, 0}}, + &AOUTdesc, /* LD_AOUTDLOBJECT */ + &ELFdesc, /* LD_ELFDLOBJECT */ #endif }; -int numloaders = sizeof(funcs) / sizeof(loader_funcs); +int numloaders = sizeof(ldesc) / sizeof(ldesc[0]); + +const char *loaderNames[] = { + "archive", + "elf", + "coff", + "xcoff", + "a.out", + "a.out dl", + "elf dl" +}; void LoaderInit(void) { const char *osname = NULL; +#if LOADERDEBUG + int i; +#endif - LoaderAddSymbols(-1, -1, miLookupTab); - LoaderAddSymbols(-1, -1, xfree86LookupTab); - LoaderAddSymbols(-1, -1, dixLookupTab); - LoaderAddSymbols(-1, -1, fontLookupTab); - LoaderAddSymbols(-1, -1, extLookupTab); + ReadMainExe(); + LoaderAddSymbols(-1, -1, miLookupTab, + LOOKUP_SCOPE_GLOBAL | LOOKUP_SCOPE_BUILTIN, NULL); + LoaderAddSymbols(-1, -1, xfree86LookupTab, + LOOKUP_SCOPE_GLOBAL | LOOKUP_SCOPE_BUILTIN, NULL); + LoaderAddSymbols(-1, -1, dixLookupTab, + LOOKUP_SCOPE_GLOBAL | LOOKUP_SCOPE_BUILTIN, NULL); + LoaderAddSymbols(-1, -1, fontLookupTab, + LOOKUP_SCOPE_GLOBAL | LOOKUP_SCOPE_BUILTIN, NULL); + LoaderAddSymbols(-1, -1, extLookupTab, + LOOKUP_SCOPE_GLOBAL | LOOKUP_SCOPE_BUILTIN, NULL); #if defined(__sparc__) && !defined(__FreeBSD__) #ifdef linux if (sparcUseHWMulDiv()) - LoaderAddSymbols(-1, -1, SparcV89LookupTab); + LoaderAddSymbols(-1, -1, SparcV89LookupTab, + LOOKUP_SCOPE_GLOBAL | LOOKUP_SCOPE_BUILTIN, NULL); else #endif - LoaderAddSymbols(-1, -1, SparcLookupTab); + LoaderAddSymbols(-1, -1, SparcLookupTab, + LOOKUP_SCOPE_GLOBAL | LOOKUP_SCOPE_BUILTIN, NULL); #endif xf86MsgVerb(X_INFO, 2, "Module ABI versions:\n"); @@ -386,9 +577,19 @@ if (osname) xf86MsgVerb(X_INFO, 2, "Loader running on %s\n", osname); +#if LOADERDEBUG + xf86MsgVerb(X_INFO, 3, "Loader Debug Flags:\n"); + for (i = 0; debugDesc[i]; i++) + xf86MsgVerb(X_INFO, 3, "%6d - %s\n", 1 << i, debugDesc[i]); + if (LoaderDebugLevel) + xf86MsgVerb(X_INFO, 2, "Loader debug level set to 0x%lx (%ld).\n", + LoaderDebugLevel, LoaderDebugLevel); +#endif + #if defined(linux) && \ (defined(__alpha__) || defined(__powerpc__) || defined(__ia64__) \ - || ( defined __AMD64__ && ! defined UseMMAP && ! defined DoMMAPedMerge)) + || ((defined(__amd64__) || defined(__x86_64__)) && \ + !defined(UseMMAP) && ! defined(DoMMAPedMerge))) /* * The glibc malloc uses mmap for large allocations anyway. This breaks * some relocation types because the offset overflow. See loader.h for more @@ -413,10 +614,10 @@ if (read(fd, buf, sizeof(buf)) < 0) { return -1; } -#ifdef DEBUG - ErrorF("Checking module type %10s\n", buf); - ErrorF("Checking module type %x %x %x %x\n", buf[0], buf[1], buf[2], - buf[3]); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_FILES, "Checking module type %10s\n", buf); + LoaderDebugMsg(LOADER_DEBUG_FILES, "Checking module type %x %x %x %x\n", + buf[0], buf[1], buf[2], buf[3]); #endif lseek(fd, offset, SEEK_SET); @@ -464,6 +665,14 @@ /* AOUTMAGIC, BSDI */ return LD_AOUTOBJECT; } + if (buf[1] == 0x86 && buf[2] == 0x01 && buf[3] == 0x0b) { + /* AOUT BSD/i386 demand paged executable */ + return LD_AOUTOBJECT; + } + if (buf[0] == 0xcc && buf[1] == 0x00 && buf[2] == 0x86) { + /* AOUT FreeBSD/i386 compact demand paged executable */ + return LD_AOUTOBJECT; + } if ((buf[0] == 0xc0 && buf[1] == 0x86) || /* big endian form */ (buf[3] == 0xc0 && buf[2] == 0x86)) { /* little endian form */ /* i386 shared object */ @@ -492,15 +701,15 @@ unsigned long new_off_bias; # endif # define MMAP_PROT (PROT_READ|PROT_WRITE|PROT_EXEC) -# if !defined (__AMD64__) || !defined(__linux__) +# if !(defined(__amd64__) || defined(__x86_64__)) || !defined(__linux__) # define MMAP_FLAGS (MAP_PRIVATE) # else # define MMAP_FLAGS (MAP_PRIVATE | MAP_32BIT) # endif -# ifdef DEBUGMEM - ErrorF("_LoaderFileToMem(%d,%u(%u),%d,%s)", fd, offset, offsetbias, size, - label); +# if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_MEM, "_LoaderFileToMem(%d,%lx(%u),%d,%s)", + fd, offset, offsetbias, size, label); # endif # ifdef MmapPageAlign pagesize = getpagesize(); @@ -519,6 +728,11 @@ # else ret = (unsigned long)mmap(0, size, MMAP_PROT, MMAP_FLAGS, fd, offset + offsetbias); +# if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_MEM, + "mmap: fd %d, size %d, offset %lx, offsetbias %u, ret %d\n", + fd, size, offset, offsetbias, ret); +# endif if (ret == -1) FatalError("mmap() failed: %s\n", strerror(errno)); return (void *)ret; @@ -526,14 +740,14 @@ #else char *ptr; -# ifdef DEBUGMEM - ErrorF("_LoaderFileToMem(%d,%u(%u),%d,%s)", fd, offset, offsetbias, size, - label); +# if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_MEM, "_LoaderFileToMem(%d,%lx(%u),%d,%s)", + fd, offset, offsetbias, size, label); # endif if (size == 0) { -# ifdef DEBUGMEM - ErrorF("=NULL\n", ptr); +# if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_MEM, "=NULL\n"); # endif return NULL; } @@ -579,8 +793,8 @@ } # endif -# ifdef DEBUGMEM - ErrorF("=%lx\n", ptr); +# if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_MEM, "=%p\n", ptr); # endif return (void *)ptr; @@ -598,8 +812,8 @@ memType i_addr = (memType) addr; unsigned long new_size; #endif -#ifdef DEBUGMEM - ErrorF("_LoaderFreeFileMem(%x,%d)\n", addr, size); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_MEM, "_LoaderFreeFileMem(%p,%d)\n", addr, size); #endif #ifdef UseMMAP # if defined (MmapPageAlign) @@ -635,7 +849,9 @@ return size; } -static loaderPtr listHead = (loaderPtr) 0; +static loaderPtr listHead = NULL; +static loaderPtr mainExeItem = NULL; +static int mainExeDlType = -1; static loaderPtr _LoaderListPush() @@ -666,20 +882,15 @@ return 0; } -/* - * _LoaderHandleToName() will return the name of the first module with a - * given handle. This requires getting the last module on the LIFO with - * the given handle. - */ -char * -_LoaderHandleToName(int handle) +static loaderPtr +_LoaderHandleToItem(int handle) { loaderPtr item = listHead; loaderPtr aritem = NULL; loaderPtr lastitem = NULL; if (handle < 0) { - return "(built-in)"; + return NULL; } while (item) { if (item->handle == handle) { @@ -692,12 +903,33 @@ } if (aritem) - return aritem->name; + return aritem; if (lastitem) - return lastitem->name; + return lastitem; - return 0; + return NULL; +} + +/* + * _LoaderHandleToName() will return the name of the first module with a + * given handle. This requires getting the last module on the LIFO with + * the given handle. + */ +char * +_LoaderHandleToName(int handle) +{ + loaderPtr item; + + if (handle < 0) { + return "(built-in)"; + } + + item = _LoaderHandleToItem(handle); + if (item) + return item->name; + else + return NULL; } /* @@ -708,23 +940,17 @@ char * _LoaderHandleToCanonicalName(int handle) { - loaderPtr item = listHead; - loaderPtr lastitem = NULL; + loaderPtr item; if (handle < 0) { return "(built-in)"; } - while (item) { - if (item->handle == handle) { - lastitem = item; - } - item = item->next; - } - if (lastitem) - return lastitem->cname; - - return NULL; + item = _LoaderHandleToItem(handle); + if (item) + return item->cname; + else + return NULL; } /* @@ -762,6 +988,69 @@ } /* + * Platform-specific method for finding if an address on the stack is a signal + * trampoline. + */ + +#if defined(__FreeBSD__) || (defined(__NetBSD__) && !defined(__ELF__)) +/* For FreeBSD 3.0 and later and NetBSD/a.out. */ +#define SIGTRAMP_START 0xbfbfdf20UL +#define SIGTRAMP_END 0xbfbfdff0UL +#endif + +static int +inSigTramp(unsigned long addr) +{ +#if defined(SIGTRAMP_START) && defined(SIGTRAMP_END) + if (addr >= SIGTRAMP_START && addr <= SIGTRAMP_END) + return 1; +#endif + return 0; +} + +const char * +_LoaderAddressToSymbol(unsigned long address, unsigned long *symaddr, + const char **filename) +{ + loaderPtr item = listHead; + const char *sym = NULL; + + while (item) { + sym = item->desc->AddressToSymbol(item->private, address, symaddr, + filename, 0); + if (sym) + return sym; + item = item->next; + } + if (mainExeItem) { + sym = mainExeItem->desc->AddressToSymbol(mainExeItem->private, + address, symaddr, filename, 1); + if (!*filename) + *filename = GetExePath(NULL); + if (sym) + return sym; + + if (mainExeDlType >= 0) { + sym = ldesc[mainExeDlType]->AddressToSymbol(mainExeItem->private, + address, symaddr, + filename, 1); + } + if (!*filename) + *filename = GetExePath(NULL); + if (sym) + return sym; + } + if (!sym) { + /* Check for a signal handler trampoline. */ + if (inSigTramp(address)) { + *symaddr = 0; + return ""; + } + } + return NULL; +} + +/* * _LoaderAddressToSection() will return the name of the file & section * that contains the given address. */ @@ -773,30 +1062,118 @@ while (item) { if ((*section = - item->funcs->AddressToSection(item->private, address)) != NULL) { + item->desc->AddressToSection(item->private, address)) != NULL) { *module = _LoaderModuleToName(item->module); return 1; } item = item->next; } - + if (mainExeItem) { + *section = mainExeItem->desc->AddressToSection(mainExeItem->private, + address); + if (!*section) + *section = ""; + *module = GetExePath(NULL); + return 1; + } return 0; } +#define MODNAME(m) ((m) ? (m)->name : "") + +static symlistPtr +GetSymbolList(symlistPtr list, ModuleDescPtr module, int create) +{ + symlistPtr p; + + for (p = list; p; p = p->next) { + if (module && p->module == module) + break; + } +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_REQ_REF, + "GetSymbolList for %p (%s): list is %p, p is %p\n", + module, MODNAME(module), list, p); +#endif + if (!p && create) { + p = xnfcalloc(1, sizeof(symlist)); + p->next = list->next; + p->module = module; + list->next = p; + } +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_REQ_REF, + "GetSymbolList for module %p (%s) returns %p\n", + module, MODNAME(module), p); +#endif + return p; +} + +static symlistPtr +GetNextSymbolListByName(symlistPtr list, const char *name) +{ + symlistPtr p; + + if (!list || !name) + return NULL; + + for (p = list->next; p; p = p->next) { + if (p->module && p->module->name && !strcmp(p->module->name, name)) { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_REQ_REF, + "GetNextSymbolListByName for module %s returns %p\n", + name, p); +#endif + return p; + } + } + return NULL; +} + +static void +RemoveSymbolList(symlistPtr list, ModuleDescPtr module) +{ + symlistPtr p, q; + + p = GetSymbolList(list, module, 0); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_REQ_REF, + "RemoveSymbolList for %p (%s) list %p, p %p\n", + module, MODNAME(module), list, p); +#endif + if (p) { + if (p->list) + xfree(p->list); + p->num = 0; + for (q = list; q && q->next != p; q = q->next) + ; + if (!q) + ErrorF("RemoveSymbolList: internal error\n"); + else { + q->next = p->next; + xfree(p); + } + } +} + /* * Add a list of symbols to the referenced list. */ static void -AppendSymbol(symlist * list, const char *sym) +AppendSymbol(symlist *list, const char *sym) { list->list = xnfrealloc(list->list, (list->num + 1) * sizeof(char **)); list->list[list->num] = xnfstrdup(sym); list->num++; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_REQ_REF, "AppendSymbol for %s: %s\n", + MODNAME(list->module), sym); +#endif } static void -AppendSymList(symlist * list, const char **syms) +AppendSymList(symlist *list, const char **syms) { while (*syms) { AppendSymbol(list, *syms); @@ -805,7 +1182,7 @@ } static int -SymInList(symlist * list, char *sym) +SymInList(symlist *list, const char *sym) { int i; @@ -816,69 +1193,169 @@ return 0; } +static void +DuplicateSymbolList(symlistPtr list, ModuleDescPtr old, ModuleDescPtr new) +{ + symlistPtr oldList, newList = NULL; + int i; + + oldList = GetSymbolList(list, old, 0); + if (oldList) { + newList = GetSymbolList(list, new, 1); + if (newList) + for (i = 0; i < oldList->num; i++) + AppendSymbol(newList, oldList->list[i]); + } +} + void -LoaderVRefSymbols(const char *sym0, va_list args) +DuplicateSymbolLists(ModuleDescPtr old, ModuleDescPtr new) +{ + DuplicateSymbolList(&refList, old, new); + DuplicateSymbolList(&reqList, old, new); +} + +void +LoaderVRefSymbols(ModuleDescPtr module, const char *sym0, va_list args) { const char *s; + symlistPtr list; if (sym0 == NULL) return; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_REQ_REF, + "LoaderVRefSymbols: module %p, %s\n", module, MODNAME(module)); +#endif + if (module) + list = GetSymbolList(&refList, module, 1); + else + list = &refList; + s = sym0; do { - AppendSymbol(&refList, s); + AppendSymbol(list, s); s = va_arg(args, const char *); } while (s != NULL); } void +LoaderModRefSymbols(ModuleDescPtr module, const char *sym0, ...) +{ + va_list ap; + + va_start(ap, sym0); + LoaderVRefSymbols(module, sym0, ap); + va_end(ap); +} + +void LoaderRefSymbols(const char *sym0, ...) { va_list ap; va_start(ap, sym0); - LoaderVRefSymbols(sym0, ap); + LoaderVRefSymbols(NULL, sym0, ap); va_end(ap); } void -LoaderVRefSymLists(const char **list0, va_list args) +LoaderVRefSymLists(ModuleDescPtr module, const char **list0, va_list args) { const char **l; + symlistPtr list; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_REQ_REF, + "LoaderVRefSymLists: module %p, %s\n", module, MODNAME(module)); +#endif if (list0 == NULL) return; l = list0; + if (module) + list = GetSymbolList(&refList, module, 1); + else + list = &refList; do { - AppendSymList(&refList, l); + AppendSymList(list, l); l = va_arg(args, const char **); } while (l != NULL); } void -LoaderRefSymLists(const char **list0, ...) +LoaderModRefSymLists(ModuleDescPtr module, const char **list0, ...) { va_list ap; va_start(ap, list0); - LoaderVRefSymLists(list0, ap); + LoaderVRefSymLists(module, list0, ap); va_end(ap); } void -LoaderVReqSymLists(const char **list0, va_list args) +LoaderRefSymLists(const char **list0, ...) { - const char **l; + va_list ap; + + va_start(ap, list0); + LoaderVRefSymLists(NULL, list0, ap); + va_end(ap); +} +int +LoaderVReqSymLists(ModuleDescPtr module, const char **list0, va_list args) +{ + const char **l, **s; + symlistPtr list; + itemPtr sym; + int numUnresolved = 0; + +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_REQ_REF, + "LoaderVReqSymLists: module %p, %s\n", + module, MODNAME(module)); +#endif if (list0 == NULL) - return; + return 0; l = list0; + if (module) + list = GetSymbolList(&reqList, module, 1); + else + list = &reqList; do { - AppendSymList(&reqList, l); + AppendSymList(list, l); + for (s = l; *s; s++) { + sym = LoaderHashFind(*s); + if (!sym) { + xf86Msg(X_WARNING, "Symbol \"%s\" is not provided by " + "module \"%s\"\n", *s, MODNAME(module)); + numUnresolved++; + } else if (module && sym->handle != module->handle) { + xf86Msg(X_WARNING, "Symbol \"%s\" is provided by a " + "module (\"%s\") other than \"%s\"\n", *s, + _LoaderHandleToCanonicalName(sym->handle), + MODNAME(module)); + numUnresolved++; + } + } l = va_arg(args, const char **); - } while (l != NULL); + } while (l); + return numUnresolved; +} + +int +LoaderModReqSymLists(ModuleDescPtr module, const char **list0, ...) +{ + va_list ap; + int ret; + + va_start(ap, list0); + ret = LoaderVReqSymLists(module, list0, ap); + va_end(ap); + return ret; } void @@ -887,23 +1364,60 @@ va_list ap; va_start(ap, list0); - LoaderVReqSymLists(list0, ap); + LoaderVReqSymLists(NULL, list0, ap); va_end(ap); } -void -LoaderVReqSymbols(const char *sym0, va_list args) +int +LoaderVReqSymbols(ModuleDescPtr module, const char *sym0, va_list args) { const char *s; + symlistPtr list; + itemPtr sym; + int numUnresolved = 0; if (sym0 == NULL) - return; + return 0; +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_REQ_REF, + "LoaderVRefSymbols: module %p, %s\n", + module, MODNAME(module)); +#endif s = sym0; + if (module) + list = GetSymbolList(&reqList, module, 1); + else + list = &reqList; do { - AppendSymbol(&reqList, s); + AppendSymbol(list, s); + sym = LoaderHashFind(s); + if (!sym) { + xf86Msg(X_WARNING, "Symbol \"%s\" is not provided by " + "module \"%s\"\n", s, MODNAME(module)); + numUnresolved++; + } else if (module && sym->handle != module->handle) { + xf86Msg(X_WARNING, "Symbol \"%s\" is provided by a " + "module (\"%s\") other than \"%s\"\n", s, + _LoaderHandleToCanonicalName(sym->handle), + MODNAME(module)); + numUnresolved++; + } s = va_arg(args, const char *); - } while (s != NULL); + } while (s); + return numUnresolved; +} + +int +LoaderModReqSymbols(ModuleDescPtr module, const char *sym0, ...) +{ + va_list ap; + int ret; + + va_start(ap, sym0); + ret = LoaderVReqSymbols(module, sym0, ap); + va_end(ap); + return ret; } void @@ -912,7 +1426,7 @@ va_list ap; va_start(ap, sym0); - LoaderVReqSymbols(sym0, ap); + LoaderVReqSymbols(NULL, sym0, ap); va_end(ap); } @@ -924,28 +1438,50 @@ */ int -_LoaderHandleUnresolved(char *symbol, char *module) +_LoaderHandleUnresolved(const char *symbol, int handle) { int fatalsym = 0; - - if (xf86ShowUnresolved && !fatalsym) { - if (SymInList(&reqList, symbol)) { - fatalReqSym = 1; - ErrorF("Required symbol %s from module %s is unresolved!\n", - symbol, module); - } - if (!SymInList(&refList, symbol)) { - ErrorF("Symbol %s from module %s is unresolved!\n", - symbol, module); + int refsym = 0; + symlistPtr list; + const char *name, *cname; + + cname = _LoaderHandleToCanonicalName(handle); + name = _LoaderHandleToName(handle); + if (xf86ShowUnresolved) { + int useGlobal = 1; + for (list = &reqList; list; list = list->next) { + if (SymInList(list, symbol)) { + fatalsym = 1; + xf86Msg(X_ERROR, + "Required symbol %s from module %s is unresolved!\n", + symbol, name); + break; + } } + list = &refList; + while ((list = GetNextSymbolListByName(list, cname))) { + useGlobal = 0; + if (SymInList(list, symbol)) + refsym = 1; + } + if (useGlobal && SymInList(&refList, symbol)) + refsym = 1; + if (!refsym) + xf86MsgVerb(X_WARNING, 0, + "Symbol %s from module %s is unresolved!\n", + symbol, name); } - return (fatalsym); + + if (fatalsym) + fatalReqSym = 1; + + return (fatalsym || !refsym); } /* * Handle an archive. */ -void * +static void * ARCHIVELoadModule(loaderPtr modrec, int arfd, LOOKUP ** ppLookup) { loaderPtr tmp = NULL; @@ -959,7 +1495,7 @@ int namlen; #endif unsigned int size; - unsigned int offset; + unsigned int offset = 0; int arnamesize, modnamesize; char *slash, *longname; char *nametable = NULL; @@ -970,8 +1506,6 @@ int i; int numsyms = 0; - /* lookup_ret = xf86loadermalloc(sizeof (LOOKUP *)); */ - arnamesize = strlen(modrec->name); #if !(defined(__powerpc__) && defined(Lynx)) @@ -990,8 +1524,10 @@ } #endif /* __powerpc__ && Lynx */ -#ifdef DEBUGAR - ErrorF("Looking for archive members starting at offset %o\n", offset); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_ARCHIVE, + "Looking for archive members starting at offset %o\n", + offset); #endif while (read(arfd, &hdr, sizeof(struct ar_hdr))) { @@ -1017,10 +1553,12 @@ #endif strncmp(hdr.ar_name, "__.SYMDEF", 9) == 0) { /* If the file name is NULL, then it is a symbol table */ -#ifdef DEBUGAR - ErrorF("Symbol Table Member '%16.16s', size %d, offset %d\n", - hdr.ar_name, size, offset); - ErrorF("Symbol table size %d\n", size); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_ARCHIVE, + "Symbol Table Member '%16.16s', size %d, " + "offset %d\n", hdr.ar_name, size, offset); + LoaderDebugMsg(LOADER_DEBUG_ARCHIVE, + "Symbol table size %d\n", size); #endif offset = lseek(arfd, offset + size, SEEK_SET); if (offset & 0x1) /* odd value */ @@ -1031,10 +1569,12 @@ /* Check for a String Table */ if (hdr.ar_name[0] == '/' && hdr.ar_name[1] == '/') { /* If the file name is '/', then it is a string table */ -#ifdef DEBUGAR - ErrorF("String Table Member '%16.16s', size %d, offset %d\n", - hdr.ar_name, size, offset); - ErrorF("String table size %d\n", size); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_ARCHIVE, + "String Table Member '%16.16s', size %d, " + "offset %d\n", hdr.ar_name, size, offset); + LoaderDebugMsg(LOADER_DEBUG_ARCHIVE, + "String table size %d\n", size); #endif nametablelen = size; nametable = (char *)xf86loadermalloc(nametablelen); @@ -1095,8 +1635,9 @@ size -= i; } else { /* Regular archive member */ -#ifdef DEBUGAR - ErrorF("Member '%16.16s', size %d, offset %x\n", +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_ARCHIVE, + "Member '%16.16s', size %d, offset %x\n", #if !(defined(__powerpc__) && defined(Lynx)) hdr.ar_name, #else @@ -1122,6 +1663,11 @@ if (nametable) xf86loaderfree(nametable); return NULL; + } else { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_FILES, "Module %s is type %d (%s)\n", + hdr.ar_name, modtype, loaderNames[modtype]); +#endif } tmp = _LoaderListPush(); @@ -1130,7 +1676,7 @@ tmp->module = moduleseq++; tmp->cname = xf86loadermalloc(strlen(modrec->cname) + 1); strcpy(tmp->cname, modrec->cname); - tmp->funcs = &funcs[modtype]; + tmp->desc = ldesc[modtype]; if (longname == NULL) { modnamesize = strlen(hdr.ar_name); tmp->name = @@ -1144,7 +1690,7 @@ } offsetbias = offset; - if ((tmp->private = funcs[modtype].LoadModule(tmp, arfd, &lookup_ret)) + if ((tmp->private = ldesc[modtype]->LoadModule(tmp, arfd, &lookup_ret)) == NULL) { ErrorF("Failed to load %s\n", hdr.ar_name); offsetbias = 0; @@ -1163,7 +1709,7 @@ } else ret = tmp->private; - /* Add the lookup table returned from funcs.LoadModule to the + /* Add the lookup table returned from desc->LoadModule to the * one we're going to return. */ for (i = 0, p = lookup_ret; p && p->symName; i++, p++) ; @@ -1194,14 +1740,19 @@ */ /* - * _LoaderGetRelocations() Return the list of outstanding relocations + * _LoaderGetRelocations() Return a pointer to the list of outstanding + * relocations. */ -LoaderRelocPtr -_LoaderGetRelocations(void *mod) +void ** +_LoaderGetRelocations(LoaderDescPtr mod) { - loader_funcs *formatrec = (loader_funcs *) mod; + return &(mod->pRelocs); +} - return &(formatrec->pRelocs); +static int +MatchScopeSelf(void *dummy, itemPtr entry) +{ + return (entry->scope == LOOKUP_SCOPE_SELF); } /* @@ -1210,15 +1761,15 @@ int LoaderOpen(const char *module, const char *cname, int handle, - int *errmaj, int *errmin, int *wasLoaded) + int *errmaj, int *errmin, int *wasLoaded, char **modData) { loaderPtr tmp; int new_handle, modtype; int fd; LOOKUP *pLookup; -#if defined(DEBUG) - ErrorF("LoaderOpen(%s)\n", module); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_FILES, "LoaderOpen(%s)\n", module); #endif /* @@ -1230,15 +1781,16 @@ if (handle >= 0) { tmp = listHead; while (tmp) { -#ifdef DEBUGLIST - ErrorF("strcmp(%x(%s),{%x} %x(%s))\n", module, module, - &(tmp->name), tmp->name, tmp->name); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_FILES, "strcmp(%p(%s),{%p} %p(%s))\n", + module, module, &(tmp->name), tmp->name, tmp->name); #endif if (!strcmp(module, tmp->name)) { refCount[tmp->handle]++; if (wasLoaded) *wasLoaded = 1; xf86MsgVerb(X_INFO, 2, "Reloading %s\n", module); + *modData = tmp->modData; return tmp->handle; } tmp = tmp->next; @@ -1289,6 +1841,11 @@ if (errmin) *errmin = LDR_UNKTYPE; return -1; + } else { +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_FILES, "Module %s is type %d (%s)\n", + module, modtype, loaderNames[modtype]); +#endif } tmp = _LoaderListPush(); @@ -1298,9 +1855,9 @@ strcpy(tmp->cname, cname); tmp->handle = new_handle; tmp->module = moduleseq++; - tmp->funcs = &funcs[modtype]; + tmp->desc = ldesc[modtype]; - if ((tmp->private = funcs[modtype].LoadModule(tmp, fd, &pLookup)) == NULL) { + if (!(tmp->private = ldesc[modtype]->LoadModule(tmp, fd, &pLookup))) { xf86Msg(X_ERROR, "Failed to load %s\n", module); _LoaderListPop(new_handle); freeHandles[new_handle] = HANDLE_FREE; @@ -1312,12 +1869,22 @@ } if (tmp->private != (void *)-1L) { - LoaderAddSymbols(new_handle, tmp->module, pLookup); + LoaderAddSymbols(new_handle, tmp->module, pLookup, LOOKUP_SCOPE_AUTO, + modData); xf86loaderfree(pLookup); } + tmp->modData = *modData; close(fd); + LoaderResolveSymbols(-1); + + /* + * Remove symbols from the lookup table that have LOOKUP_SCOPE_SELF. + * These can never be used when resolving other modules. + */ + LoaderHashTraverse(NULL, MatchScopeSelf); + return new_handle; } @@ -1335,63 +1902,70 @@ } void * -LoaderSymbol(const char *sym) +LoaderSymbolWithScope(const char *sym, int handle, unsigned long scope) { - int i; itemPtr item = NULL; - for (i = 0; i < numloaders; i++) - funcs[i].ResolveSymbols(&funcs[i]); - item = (itemPtr) LoaderHashFind(sym); - if (item) + if (item && SCOPE_OK(item, handle, scope)) return item->address; - else + else if (!item) { #ifdef DLOPEN_SUPPORT return (DLFindSymbol(sym)); -#else - return NULL; #endif + } + return NULL; +} + +void * +LoaderSymbol(const char *sym) +{ + return LoaderSymbolWithScope(sym, -1, LOOKUP_SCOPE_GLOBAL); } int -LoaderResolveSymbols(void) +LoaderResolveSymbols(int handle) { int i; for (i = 0; i < numloaders; i++) - funcs[i].ResolveSymbols(&funcs[i]); + ldesc[i]->ResolveSymbols(ldesc[i], handle); return 0; } int -LoaderCheckUnresolved(int delay_flag) +LoaderCheckUnresolved(int dummy) { int i, ret = 0; - LoaderResolveOptions delayFlag = (LoaderResolveOptions)delay_flag; - - LoaderResolveSymbols(); - if (delayFlag == LD_RESOLV_NOW) { - if (check_unresolved_sema > 0) - check_unresolved_sema--; - else - xf86Msg(X_WARNING, "LoaderCheckUnresolved: not enough " - "MAGIC_DONT_CHECK_UNRESOLVED\n"); - } + for (i = 0; i < numloaders; i++) + if (ldesc[i]->CheckForUnresolved(ldesc[i])) + ret = 1; - if (!check_unresolved_sema || delayFlag == LD_RESOLV_FORCE) - for (i = 0; i < numloaders; i++) - if (funcs[i].CheckForUnresolved(&funcs[i])) - ret = 1; + /* This does nothing unless debugging is enabled. */ + LoaderDumpHashHits(); if (fatalReqSym) - FatalError("Some required symbols were unresolved\n"); + FatalError("Some required symbols were unresolved.\n"); return ret; } +const char * +LoaderFindRelocName(int handle, unsigned long addr) +{ + int i; + const char *ret; + + for (i = 0; i < numloaders; i++) { + ret = ldesc[i]->FindRelocName(ldesc[i], handle, addr); + if (ret) + return ret; + } + return NULL; +} + void xf86LoaderTrap(void); void @@ -1399,26 +1973,70 @@ { } +#ifdef STACKTRACE + +#ifndef STACK_LEVELS +#define STACK_LEVELS 16 +#endif + void LoaderDefaultFunc(void) { - ErrorF("\n\n\tThis should not happen!\n" - "\tAn unresolved function was called!\n"); + unsigned long returnStack[STACK_LEVELS]; + int i; + const char *rname = NULL; + getStackTrace(returnStack, STACK_LEVELS); + if (returnStack[1]) + rname = LoaderFindRelocName(-1, returnStack[1]); + if (rname) + ErrorF("*** Unresolved function \"%s\" called ***\n", rname); + else + ErrorF("*** Unresolved function (unknown name) called ***\n"); + + ErrorF("Stack trace:\n"); + for (i = 1; i < STACK_LEVELS && returnStack[i]; i++) { + ErrorF("%2d: 0x%lx: ", i, returnStack[i]); + if (!LoaderPrintSymbol(returnStack[i])) + break; + } xf86LoaderTrap(); +#if LOADER_UNRESOLVED_IS_FATAL + FatalError("Aborting because of unresolved function call.\n"); +#endif +} - FatalError("\n"); +#else + +void +LoaderDefaultFunc(void) +{ + ErrorF("*** Unresolved function called ***\n"); + xf86LoaderTrap(); +#if LOADER_UNRESOLVED_IS_FATAL + FatalError("Aborting because of unresolved function call.\n"); +#endif } +#endif + int -LoaderUnload(int handle) +LoaderUnload(ModuleDescPtr mod) { + int handle; loaderRec fakeHead; loaderPtr tmp = &fakeHead; + if (!mod) + return -1; + + handle = mod->handle; if (handle < 0 || handle > MAX_HANDLE) return -1; + RemoveSymbolList(&refList, mod); + RemoveSymbolList(&reqList, mod); + /* * check the reference count, only free it if it goes to zero */ @@ -1433,7 +2051,7 @@ /* It is not a member of an archive */ xf86Msg(X_INFO, "Unloading %s\n", tmp->name); } - tmp->funcs->LoaderUnload(tmp->private); + tmp->desc->LoaderUnload(tmp->private); xf86loaderfree(tmp->name); xf86loaderfree(tmp->cname); xf86loaderfree(tmp); @@ -1441,6 +2059,8 @@ freeHandles[handle] = HANDLE_FREE; + LoaderResolveSymbols(-1); + return 0; } @@ -1478,3 +2098,167 @@ { LoaderOptions &= ~opts; } + +unsigned long LoaderDebugLevel = 0; + +void +LoaderSetDebug(unsigned long level) +{ + LoaderDebugLevel = level; +} + +void +LoaderDebugMsg(unsigned long debug, const char *f, ...) +{ + va_list args; + + va_start(args, f); + if (debug & LoaderDebugLevel) + VErrorF(f, args); + va_end(args); +} + +/* + * The return value is the user-recognisable file name, and *path is set + * to the name of a full path that can be used to open the executable file + * image. + */ +static const char * +GetExePath(const char **path) +{ +#ifdef HAVE_PROCFS + unsigned int pid; + char *procPath; +#ifdef HAVE_PROCFS_PSINFO + char *procName; +#endif + struct stat sb; +#endif + const char *reason = NULL; + + if (exePath && exeName) { + if (path) + *path = exePath; + return exeName; + } + +#ifdef HAVE_PROCFS + pid = getpid(); + xasprintf(&procPath, "/proc/%d/" PROCFS_EXE_NAME, pid); +#ifdef HAVE_PROCFS_PSINFO + xasprintf(&procName, "/proc/%d/psinfo", pid); +#endif + + if (procPath) { + if (stat(procPath, &sb) == -1) + reason = "The /proc filesystem is not mounted."; + else { +#if defined(PROCFS_EXE_SYMLINK) + exePath = xnfcalloc(PATH_MAX + 1, 1); + if (readlink(procPath, exePath, PATH_MAX) == -1) { + reason = "readlink failed on /proc entry."; + xfree(exePath); + exePath = NULL; + } else + exeName = exePath; +#elif defined(HAVE_PROCFS_PSINFO) + if (procName) { + struct psinfo ps; + int fd; + + fd = open(procName, O_RDONLY); + if (fd < 0) { + xf86Msg(X_WARNING, "Cannot open \"%s\"\n", procName); + reason = "failed to open /proc psinfo entry."; + } else { + if (read(fd, &ps, sizeof(ps)) != sizeof(ps)) { + xf86Msg(X_WARNING, "Cannot read \"%s\"\n", procName); + reason = "failed to read /proc psinfo entry. "; + } else { + exeName = xnfstrdup(ps.pr_fname); +#ifdef PROCFS_PSINFO_FULLPATH + exePath = exeName; +#else + exePath = xnfstrdup(procPath); +#endif + } + close(fd); + } + } +#endif + if (!exePath) + exePath = xnfstrdup(procPath); + if (!exeName) + exeName = xnfstrdup(getArgv(0)); + + if (exePath && exeName) { + if (exePath != exeName) + xf86Msg(X_INFO, "Executable is \"%s\", path \"%s\".\n", + exeName, exePath); + else + xf86Msg(X_INFO, "Executable is \"%s\".\n", exeName); + if (path) + *path = exePath; + return exeName; + } + } + } +#else + reason = "there is no support for finding it on this platform."; +#endif + + xf86Msg(X_WARNING, "Cannot find the executable path name.\n"); + if (reason) + xf86Msg(X_NONE, "\t%s\n", reason); + return NULL; +} + +static void +ReadMainExe(void) +{ + const char *fileName = NULL; + int fd; + int modtype; + + GetExePath(&fileName); + if (!fileName) { + xf86Msg(X_WARNING, "Cannot identify the executable file.\n"); + return; + } + xf86Msg(X_INFO, "Reading symbols from \"%s\".\n", fileName); + fd = open(fileName, O_RDONLY); + if (fd < 0) { + xf86Msg(X_WARNING, + "Cannot open executable file \"%s\" (%s).\n", fileName, + strerror(errno)); + return; + } + + if ((modtype = _GetModuleType(fd, 0)) < 0) { + xf86Msg(X_WARNING, "Executable file type is not recognized.\n"); + close(fd); + return; + } + +#ifdef HAVE_DLADDR + /* + * Use dladdr(3), if available, to find symbols that are neither in + * modules or the main executable -- e.g., in shared libraries. + */ + switch (modtype) { + case LD_ELFOBJECT: + mainExeDlType = LD_ELFDLOBJECT; + break; + case LD_AOUTOBJECT: + mainExeDlType = LD_AOUTDLOBJECT; + break; + default: + break; + } +#endif + mainExeItem = xnfcalloc(1, sizeof(*mainExeItem)); + mainExeItem->desc = ldesc[modtype]; + mainExeItem->private = mainExeItem->desc->ReadExecutableSyms(fd); + close(fd); +} + Index: xc/programs/Xserver/hw/xfree86/loader/loader.h diff -u xc/programs/Xserver/hw/xfree86/loader/loader.h:1.29 xc/programs/Xserver/hw/xfree86/loader/loader.h:1.33 --- xc/programs/Xserver/hw/xfree86/loader/loader.h:1.29 Fri Feb 13 18:58:45 2004 +++ xc/programs/Xserver/hw/xfree86/loader/loader.h Thu Mar 16 11:50:34 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.h,v 1.29 2004/02/13 23:58:45 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.h,v 1.33 2006/03/16 16:50:34 dawes Exp $ */ /* * @@ -23,7 +23,7 @@ * PERFORMANCE OF THIS SOFTWARE. */ /* - * Copyright (c) 1997-2001 by The XFree86 Project, Inc. + * Copyright (c) 1997-2003 by The XFree86 Project, Inc. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining @@ -68,10 +68,59 @@ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* + * Copyright 2003-2006 by David H. Dawes. + * Copyright 2003-2006 by X-Oz Technologies. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. The end-user documentation included with the redistribution, + * if any, must include the following acknowledgment: "This product + * includes software developed by X-Oz Technologies + * (http://www.x-oz.com/)." Alternately, this acknowledgment may + * appear in the software itself, if and wherever such third-party + * acknowledgments normally appear. + * + * 4. Except as contained in this notice, the name of X-Oz + * Technologies shall not be used in advertising or otherwise to + * promote the sale, use or other dealings in this Software without + * prior written authorization from X-Oz Technologies. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL X-OZ TECHNOLOGIES OR ITS CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ #ifndef _LOADER_H #define _LOADER_H +#ifndef LOADERDEBUG +#define LOADERDEBUG 0 +#endif + #include "sym.h" #if defined(Lynx) && defined(sun) @@ -96,30 +145,50 @@ #define LD_PROCESSED_ARCHIVE -1 /* #define UNINIT_SECTION */ #define HANDLE_IN_HASH_ENTRY + +#define TestFree(a) if (a) { xfree (a); a = NULL; } + +#if LOADERDEBUG /* - * COFF Section nmumbers + * Loader debug levels. */ -#define N_TEXT 1 -#define N_DATA 2 -#define N_BSS 3 -#define N_COMMENT 4 -#define TestFree(a) if (a) { xfree (a); a = NULL; } -#define HASHDIV 10 -#define HASHSIZE (1<scope == LOOKUP_SCOPE_SELF && (i)->handle == (h)) || \ + ((s) & (i)->scope)) + +/* Special module symbol names. */ +#define MODULE_DATA_NAME "ModuleData" +#define EXPORTED_SYMS_NAME "ExportedSymbols" + /* The following structures provide an interface to GDB (note that GDB has copies of the definitions - if you change anything here make sure that the changes are also made to GDB */ @@ -209,20 +294,30 @@ * _loader_funcs hold the entry points for a module format. */ -typedef void *(*LoadModuleProcPtr) (loaderPtr modrec, int fd, LOOKUP **); -typedef void (*ResolveSymbolsProcPtr) (void *); -typedef int (*CheckForUnresolvedProcPtr) (void *); -typedef char *(*AddressToSectionProcPtr) (void *, unsigned long); -typedef void (*LoaderUnloadProcPtr) (void *); +typedef struct _loader_desc LoaderDesc, *LoaderDescPtr; -typedef struct _loader_funcs { +typedef void *(*LoadModuleProcPtr)(loaderPtr modrec, int fd, LOOKUP **); +typedef void (*ResolveSymbolsProcPtr)(LoaderDescPtr, int); +typedef int (*CheckForUnresolvedProcPtr)(LoaderDescPtr); +typedef char *(*AddressToSectionProcPtr)(void *, unsigned long); +typedef void (*LoaderUnloadProcPtr)(void *); +typedef const char *(*FindRelocNameProcPtr)(LoaderDescPtr, int, unsigned long); +typedef const char *(*AddressToSymbolProcPtr)(void *, unsigned long, + unsigned long *, const char **, + int); +typedef void *(*ReadExecutableSymsProcPtr)(int); + +struct _loader_desc { LoadModuleProcPtr LoadModule; ResolveSymbolsProcPtr ResolveSymbols; CheckForUnresolvedProcPtr CheckForUnresolved; AddressToSectionProcPtr AddressToSection; LoaderUnloadProcPtr LoaderUnload; - LoaderRelocRec pRelocs; /* type specific relocations */ -} loader_funcs; + FindRelocNameProcPtr FindRelocName; + AddressToSymbolProcPtr AddressToSymbol; + ReadExecutableSymsProcPtr ReadExecutableSyms; + void *pRelocs; /* type specific relocations */ +}; /* Each module loaded has a loaderRec */ typedef struct _loader { @@ -232,8 +327,9 @@ char *name; char *cname; void *private; /* format specific data */ - loader_funcs *funcs; /* funcs for operating on this module */ + LoaderDescPtr desc; /* funcs/data for operating on this module */ loaderPtr next; + char *modData; } loaderRec; /* Compiled-in version information */ @@ -248,32 +344,45 @@ extern ModuleVersions LoaderVersionInfo; extern unsigned long LoaderOptions; +extern unsigned long LoaderDebugLevel; /* Internal Functions */ -void LoaderAddSymbols(int, int, LOOKUP *); +#if (!defined(printf) || defined(printf_is_xf86printf)) && \ + defined(__GNUC__) && \ + ((__GNUC__ > 2) || ((__GNUC__ == 2) && (__GNUC_MINOR__ > 4))) +# define _printf_attribute(a,b) __attribute((format(printf,a,b))) +# undef printf +#else +# define _printf_attribute(a,b) /**/ +#endif + +void LoaderDebugMsg(unsigned long, const char *f, ...) _printf_attribute(2,3); + +void LoaderAddSymbols(int, int, LOOKUP *, unsigned long, char **); void LoaderDefaultFunc(void); void LoaderDuplicateSymbol(const char *, const int); +void *LoaderSymbolWithScope(const char *, int, unsigned long); -#if 0 -void LoaderFixups(void); -#endif -void LoaderResolve(void); -int LoaderResolveSymbols(void); -int _LoaderHandleUnresolved(char *, char *); +int LoaderResolveSymbols(int); +int _LoaderHandleUnresolved(const char *, int); void LoaderHashAdd(itemPtr); itemPtr LoaderHashDelete(const char *); itemPtr LoaderHashFind(const char *); void LoaderHashTraverse(void *, int (*)(void *, itemPtr)); void LoaderPrintAddress(const char *); void LoaderPrintItem(itemPtr); -void LoaderPrintSymbol(unsigned long); void LoaderDumpSymbols(void); +void LoaderDumpHashHits(void); char *_LoaderModuleToName(int); int _LoaderAddressToSection(const unsigned long, const char **, const char **); -int LoaderOpen(const char *, const char *, int, int *, int *, int *); +int LoaderOpen(const char *, const char *, int, int *, int *, int *, char **); int LoaderHandleOpen(int); +const char *LoaderFindRelocName(int handle, unsigned long addr); +const char *_LoaderAddressToSymbol(unsigned long addr, unsigned long *symaddr, + const char **); + /* * File interface functions @@ -285,7 +394,7 @@ /* * Relocation list manipulation routines */ -LoaderRelocPtr _LoaderGetRelocations(void *); +void **_LoaderGetRelocations(LoaderDescPtr); /* * object to name lookup routines @@ -293,16 +402,11 @@ char *_LoaderHandleToName(int handle); char *_LoaderHandleToCanonicalName(int handle); -/* - * Entry points for the different loader types - */ -#include "aoutloader.h" -#include "coffloader.h" -#include "elfloader.h" -#include "dlloader.h" -/* LD_ARCHIVE */ -void *ARCHIVELoadModule(loaderPtr, int, LOOKUP **); - extern void _loader_debug_state(void); +#undef _printf_attribute +#if defined(printf_is_xf86printf) && !defined(printf) +#define printf xf86printf +#endif + #endif /* _LOADER_H */ Index: xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h diff -u xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h:1.22 xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h:1.26 --- xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h:1.22 Fri Feb 13 18:58:45 2004 +++ xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h Sat Apr 8 13:53:40 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h,v 1.22 2004/02/13 23:58:45 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h,v 1.26 2006/04/08 17:53:40 dawes Exp $ */ /* * @@ -68,6 +68,51 @@ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* + * Copyright 2003-2006 by David H. Dawes. + * Copyright 2003-2006 by X-Oz Technologies. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. The end-user documentation included with the redistribution, + * if any, must include the following acknowledgment: "This product + * includes software developed by X-Oz Technologies + * (http://www.x-oz.com/)." Alternately, this acknowledgment may + * appear in the software itself, if and wherever such third-party + * acknowledgments normally appear. + * + * 4. Except as contained in this notice, the name of X-Oz + * Technologies shall not be used in advertising or otherwise to + * promote the sale, use or other dealings in this Software without + * prior written authorization from X-Oz Technologies. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL X-OZ TECHNOLOGIES OR ITS CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ #ifndef _LOADERPROCS_H #define _LOADERPROCS_H @@ -80,7 +125,6 @@ struct module_desc *child; struct module_desc *sib; struct module_desc *parent; - struct module_desc *demand_next; char *name; char *filename; char *identifier; @@ -92,7 +136,8 @@ void *TearDownData; /* returned from SetupProc */ const char *path; const XF86ModuleVersionInfo *VersionInfo; -} ModuleDesc, *ModuleDescPtr; + const XF86ModReqInfo *ParentReq; +} ModuleDesc; /* * Extenal API for the loader @@ -105,33 +150,33 @@ ModuleDescPtr LoadModule(const char *, const char *, const char **, const char **, pointer, const XF86ModReqInfo *, int *, int *); -ModuleDescPtr LoadSubModule(ModuleDescPtr, const char *, - const char **, const char **, pointer, - const XF86ModReqInfo *, int *, int *); ModuleDescPtr DuplicateModule(ModuleDescPtr mod, ModuleDescPtr parent); -void LoadFont(FontModule *); -void UnloadModule(ModuleDescPtr); -void UnloadSubModule(ModuleDescPtr); void UnloadDriver(ModuleDescPtr); void FreeModuleDesc(ModuleDescPtr mod); ModuleDescPtr NewModuleDesc(const char *); ModuleDescPtr AddSibling(ModuleDescPtr head, ModuleDescPtr new); void LoaderSetPath(const char *path); void LoaderSortExtensions(void); +void LoaderSetParentModuleRequirements(ModuleDescPtr module, + XF86ModReqInfo *req); -void LoaderVReqSymLists(const char **, va_list args); -void LoaderVReqSymbols(const char *, va_list args); -void LoaderVRefSymLists(const char **, va_list args); -void LoaderVRefSymbols(const char *, va_list args); +int LoaderVReqSymLists(ModuleDescPtr module, const char **, va_list args); +int LoaderVReqSymbols(ModuleDescPtr module, const char *, va_list args); +void LoaderVRefSymLists(ModuleDescPtr module, const char **, va_list args); +void LoaderVRefSymbols(ModuleDescPtr module, const char *, va_list args); +void DuplicateSymbolLists(ModuleDescPtr old, ModuleDescPtr new); -void LoaderShowStack(void); void *LoaderSymbolHandle(const char *, int); -int LoaderUnload(int); +int LoaderUnload(ModuleDescPtr mod); unsigned long LoaderGetModuleVersion(ModuleDescPtr mod); +ModuleDescPtr LoaderGetSubModuleByName(ModuleDescPtr mod, const char *name); void LoaderResetOptions(void); void LoaderSetOptions(unsigned long); void LoaderClearOptions(unsigned long); +void LoaderSetDebug(unsigned long); + +int LoaderPrintSymbol(unsigned long); /* Options for LoaderSetOptions */ #define LDR_OPT_ABI_MISMATCH_NONFATAL 0x0001 Index: xc/programs/Xserver/hw/xfree86/loader/loadext.c diff -u xc/programs/Xserver/hw/xfree86/loader/loadext.c:1.9 xc/programs/Xserver/hw/xfree86/loader/loadext.c:1.10 --- xc/programs/Xserver/hw/xfree86/loader/loadext.c:1.9 Fri Feb 13 18:58:45 2004 +++ xc/programs/Xserver/hw/xfree86/loader/loadext.c Wed Mar 1 22:00:38 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loadext.c,v 1.9 2004/02/13 23:58:45 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loadext.c,v 1.10 2006/03/02 03:00:38 dawes Exp $ */ /* * Copyright (c) 2000 by The XFree86 Project, Inc. * All rights reserved. @@ -53,6 +53,11 @@ #include "misc.h" #include "xf86.h" +#ifndef LOADERDEBUG +#define LOADERDEBUG 0 +#endif +#include "loader.h" + ExtensionModule *ExtensionModuleList = NULL; static int numExtensionModules = 0; @@ -254,8 +259,8 @@ NODE *newnode; int i; -#ifdef DEBUG - ErrorF("%s\n", n->n_name); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_EXT, "%s\n", n->n_name); #endif newnode = xnfalloc(sizeof(NODE)); memcpy(newnode, n, sizeof(NODE)); @@ -314,9 +319,9 @@ continue; len = find_cycle(*np, to, longest_len, depth + 1); -#ifdef DEBUG - ErrorF("%*s %s->%s %d\n", depth, "", - from->n_name, to->n_name, len); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_EXT, "%*s %s->%s %d\n", depth, "", + from->n_name, to->n_name, len); #endif if (len == 0) @@ -420,14 +425,15 @@ for (i = numExtensionModules - 1; i >= 0; i--) { ext = &ExtensionModuleList[i]; add_arc(ext->name, ext->name); -#ifdef DEBUG - ErrorF("Extension %s:\n", ext->name); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_EXT, "Extension %s:\n", ext->name); #endif if (ext->initDependencies) for (j = 0; ext->initDependencies[j]; j++) { add_arc(ext->initDependencies[j], ext->name); -#ifdef DEBUG - ErrorF("\t%s\n", ext->initDependencies[j]); +#if LOADERDEBUG + LoaderDebugMsg(LOADER_DEBUG_EXT, + "\t%s\n", ext->initDependencies[j]); #endif } } @@ -446,8 +452,9 @@ newList[i].name = NULL; xfree(ExtensionModuleList); ExtensionModuleList = newList; -#ifdef DEBUG +#if LOADERDEBUG for (i = 0; ExtensionModuleList[i].name; i++) - ErrorF("Extension %s\n", ExtensionModuleList[i].name); + LoaderDebugMsg(LOADER_DEBUG_EXT, "Extension %s\n", + ExtensionModuleList[i].name); #endif } Index: xc/programs/Xserver/hw/xfree86/loader/loadmod.c diff -u xc/programs/Xserver/hw/xfree86/loader/loadmod.c:1.74 xc/programs/Xserver/hw/xfree86/loader/loadmod.c:1.79 --- xc/programs/Xserver/hw/xfree86/loader/loadmod.c:1.74 Fri Feb 13 18:58:45 2004 +++ xc/programs/Xserver/hw/xfree86/loader/loadmod.c Sat Mar 25 21:25:08 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loadmod.c,v 1.74 2004/02/13 23:58:45 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loadmod.c,v 1.79 2006/03/26 02:25:08 dawes Exp $ */ /* * @@ -23,7 +23,7 @@ * PERFORMANCE OF THIS SOFTWARE. */ /* - * Copyright (c) 1997-2002 by The XFree86 Project, Inc. + * Copyright (c) 1997-2006 by The XFree86 Project, Inc. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining @@ -68,6 +68,51 @@ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* + * Copyright 2003-2006 by David H. Dawes. + * Copyright 2003-2006 by X-Oz Technologies. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials provided + * with the distribution. + * + * 3. The end-user documentation included with the redistribution, + * if any, must include the following acknowledgment: "This product + * includes software developed by X-Oz Technologies + * (http://www.x-oz.com/)." Alternately, this acknowledgment may + * appear in the software itself, if and wherever such third-party + * acknowledgments normally appear. + * + * 4. Except as contained in this notice, the name of X-Oz + * Technologies shall not be used in advertising or otherwise to + * promote the sale, use or other dealings in this Software without + * prior written authorization from X-Oz Technologies. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESSED OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL X-OZ TECHNOLOGIES OR ITS CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, + * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR + * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE + * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + */ #include "os.h" /* For stat() and related stuff */ @@ -81,6 +126,10 @@ #ifdef XINPUT #include "xf86Xinput.h" #endif + +#ifndef LOADERDEBUG +#define LOADERDEBUG 0 +#endif #include "loader.h" #include "xf86Optrec.h" @@ -89,18 +138,12 @@ #include #include -extern int check_unresolved_sema; - typedef struct _pattern { const char *pattern; regex_t rex; } PatternRec, *PatternPtr; -/* Prototypes for static functions */ -static char *FindModule(const char *, const char *, const char **, - PatternPtr); -static Bool CheckVersion(const char *, XF86ModuleVersionInfo *, - const XF86ModReqInfo *); +/* Forward prototypes for static functions */ static void UnloadModuleOrDriver(ModuleDescPtr mod); static char *LoaderGetCanonicalName(const char *, PatternPtr); static void RemoveChild(ModuleDescPtr); @@ -114,14 +157,33 @@ ABI_FONT_VERSION }; -#if 0 -void -LoaderFixups(void) +#if LOADERDEBUG +static void +PrintDiagnostics(const char *module, const char *what) { - /* Need to call LRS here because the frame buffers get loaded last, - * and the drivers depend on them. */ +#ifdef linux + char procdev[] = "/proc/XXXXX/maps"; + FILE *f = NULL; + char buf[1024]; +#endif + + if (!(LoaderDebugLevel & LOADER_DEBUG_DIAGNOSTICS)) + return; - LoaderResolveSymbols(); + LoaderDebugMsg(LOADER_DEBUG_DIAGNOSTICS, + "LoaderDiagnostics for %s of module %s\n", what, module); +#ifdef linux + sprintf(procdev, "/proc/%d/maps", getpid()); + f = fopen(procdev, "r"); + if (f) { + while (fgets(buf, sizeof(buf), f)) + LoaderDebugMsg(LOADER_DEBUG_DIAGNOSTICS, "%s", buf); + fclose(f); + } else { + LoaderDebugMsg(LOADER_DEBUG_DIAGNOSTICS, + "Cannot open %s: %s\n", procdev, strerror(errno)); + } +#endif } #endif @@ -596,6 +658,89 @@ } static Bool +CheckRequirements(const XF86ModuleVersionInfo * data, + const XF86ModReqInfo * req) +{ + if (!req) + return TRUE; + + if (!data) { + xf86MsgVerb(X_WARNING, 2, "No version information to verify\n"); + return FALSE; + } + + if (req->majorversion != MAJOR_UNSPEC) { + if (data->majorversion != req->majorversion) { + xf86MsgVerb(X_WARNING, 2, "Module major version (%d) doesn't match" + " required major version (%d)\n", + data->majorversion, req->majorversion); + return FALSE; + } + + if (req->minorversion != MINOR_UNSPEC) { + if (data->minorversion < req->minorversion) { + xf86MsgVerb(X_WARNING, 2, "Module minor version (%d) is less" + " than the required minor version (%d)\n", + data->minorversion, req->minorversion); + return FALSE; + } + + if ((data->minorversion == req->minorversion) && + (req->patchlevel != PATCH_UNSPEC) && + (data->patchlevel < req->patchlevel)) { + xf86MsgVerb(X_WARNING, 2, "Module patch level (%d) is less" + " than the required patch level (%d)\n", + data->patchlevel, req->patchlevel); + return FALSE; + } + } + } + + if (req->moduleclass) { + if (!data->moduleclass || + strcmp(req->moduleclass, data->moduleclass)) { + xf86MsgVerb(X_WARNING, 2, "Module class (%s) doesn't match the" + " required class (%s)\n", + data->moduleclass ? data->moduleclass : "", + req->moduleclass); + return FALSE; + } + } else if (req->abiclass != ABI_CLASS_NONE) { + if (!data->abiclass || strcmp(req->abiclass, data->abiclass)) { + xf86MsgVerb(X_WARNING, 2, "ABI class (%s) doesn't match the" + " required ABI class (%s)\n", + data->abiclass ? data->abiclass : "", + req->abiclass); + return FALSE; + } + } + + if ((req->abiclass != ABI_CLASS_NONE) && + (req->abiversion != ABI_VERS_UNSPEC)) { + int reqmaj, reqmin, maj, min; + + reqmaj = GET_ABI_MAJOR(req->abiversion); + maj = GET_ABI_MAJOR(data->abiversion); + if (maj != reqmaj) { + xf86MsgVerb(X_WARNING, 2, "ABI major version (%d) doesn't match" + " the required ABI major version (%d)\n", + maj, reqmaj); + return FALSE; + } + + reqmin = GET_ABI_MINOR(req->abiversion); + min = GET_ABI_MINOR(data->abiversion); + if (min < reqmin) { + xf86MsgVerb(X_WARNING, 2, "Module ABI minor version (%d) is older" + " than that required (%d)\n", min, reqmin); + return FALSE; + } + } + + return TRUE; +} + +static Bool CheckVersion(const char *module, XF86ModuleVersionInfo * data, const XF86ModReqInfo * req) { @@ -691,70 +836,9 @@ } /* Check against requirements that the caller has specified */ - if (req) { - if (req->majorversion != MAJOR_UNSPEC) { - if (data->majorversion != req->majorversion) { - xf86MsgVerb(X_WARNING, 2, "module major version (%d) " - "doesn't match required major version (%d)\n", - data->majorversion, req->majorversion); - return FALSE; - } else if (req->minorversion != MINOR_UNSPEC) { - if (data->minorversion < req->minorversion) { - xf86MsgVerb(X_WARNING, 2, "module minor version (%d) " - "is less than the required minor version (%d)\n", - data->minorversion, req->minorversion); - return FALSE; - } else if (data->minorversion == req->minorversion && - req->patchlevel != PATCH_UNSPEC) { - if (data->patchlevel < req->patchlevel) { - xf86MsgVerb(X_WARNING, 2, "module patch level (%d) " - "is less than the required patch level (%d)\n", - data->patchlevel, req->patchlevel); - return FALSE; - } - } - } - } - if (req->moduleclass) { - if (!data->moduleclass || - strcmp(req->moduleclass, data->moduleclass)) { - xf86MsgVerb(X_WARNING, 2, "Module class (%s) doesn't match " - "the required class (%s)\n", - data->moduleclass ? data->moduleclass : "", - req->moduleclass); - return FALSE; - } - } else if (req->abiclass != ABI_CLASS_NONE) { - if (!data->abiclass || strcmp(req->abiclass, data->moduleclass)) { - xf86MsgVerb(X_WARNING, 2, "ABI class (%s) doesn't match the " - "required ABI class (%s)\n", - data->abiclass ? data->abiclass : "", - req->abiclass); - return FALSE; - } - } - if ((req->abiclass != ABI_CLASS_NONE) && - req->abiversion != ABI_VERS_UNSPEC) { - int reqmaj, reqmin, maj, min; - - reqmaj = GET_ABI_MAJOR(req->abiversion); - reqmin = GET_ABI_MINOR(req->abiversion); - maj = GET_ABI_MAJOR(data->abiversion); - min = GET_ABI_MINOR(data->abiversion); - if (maj != reqmaj) { - xf86MsgVerb(X_WARNING, 2, "ABI major version (%d) doesn't " - "match the required ABI major version (%d)\n", - maj, reqmaj); - return FALSE; - } - /* XXX Maybe this should be the other way around? */ - if (min > reqmin) { - xf86MsgVerb(X_WARNING, 2, "module ABI minor version (%d) " - "is new than that available (%d)\n", min, reqmin); - return FALSE; - } - } - } + if (!CheckRequirements(data, req)) + return FALSE; + #ifdef NOTYET if (data->checksum) { /* verify the checksum field */ @@ -766,6 +850,12 @@ return TRUE; } +void +LoaderSetParentModuleRequirements(ModuleDescPtr mod, XF86ModReqInfo *req) +{ + mod->ParentReq = req; +} + ModuleDescPtr LoadSubModule(ModuleDescPtr parent, const char *module, const char **subdirlist, const char **patternlist, @@ -796,8 +886,24 @@ submod = LoadModule(module, NULL, subdirlist, patternlist, options, modreq, errmaj, errmin); if (submod) { - parent->child = AddSibling(parent->child, submod); submod->parent = parent; + + /* Check requirements against parent modules */ + while (parent) { + if (!CheckRequirements(parent->VersionInfo, submod->ParentReq)) { + UnloadModule(submod); + if (errmaj) + *errmaj = LDR_MISMATCH; + if (errmin) + *errmin = 0; + return NULL; + } + + parent = parent->parent; + } + + parent = submod->parent; + parent->child = AddSibling(parent->child, submod); } return submod; } @@ -830,6 +936,9 @@ ret->sib = DuplicateModule(mod->sib, parent); ret->parent = parent; ret->VersionInfo = mod->VersionInfo; + ret->ParentReq = mod->ParentReq; + + DuplicateSymbolLists(mod, ret); return ret; } @@ -838,7 +947,7 @@ * LoadModule: load a module * * module The module name. Normally this is not a filename but the - * module's "canonical name. A full pathname is, however, + * module's "canonical" name. A full pathname is, however, * also accepted. * path A comma separated list of module directories. * subdirlist A NULL terminated list of subdirectories to search. When @@ -968,27 +1077,24 @@ *errmin = 0; goto LoadModule_fail; } - ret->handle = LoaderOpen(found, name, 0, errmaj, errmin, &wasLoaded); + ret->handle = LoaderOpen(found, name, 0, errmaj, errmin, &wasLoaded, + (char **)&initdata); if (ret->handle < 0) goto LoadModule_fail; ret->filename = xstrdup(found); - /* - * now check if the special data object ModuleData is - * present. - */ - p = xalloc(strlen(name) + strlen("ModuleData") + 1); - if (!p) { - if (errmaj) - *errmaj = LDR_NOMEM; - if (errmin) - *errmin = 0; - goto LoadModule_fail; + /* This is needed for dlopen modules. */ + if (!initdata) { + char *md; + + xasprintf(&md, "%s" MODULE_DATA_NAME, name); + if (md) { + initdata = LoaderSymbol(md); + xfree(md); + } } - strcpy(p, name); - strcat(p, "ModuleData"); - initdata = LoaderSymbol(p); + if (initdata) { ModuleSetupProc setup; ModuleTearDownProc teardown; @@ -998,25 +1104,27 @@ setup = initdata->setup; teardown = initdata->teardown; - if (!wasLoaded) { - if (vers) { - if (!CheckVersion(module, vers, modreq)) { - if (errmaj) - *errmaj = LDR_MISMATCH; - if (errmin) - *errmin = 0; - goto LoadModule_fail; - } - } else { - xf86Msg(X_ERROR, - "LoadModule: Module %s does not supply" - " version information\n", module); + /* + * Different loads of the same module may have different versioning + * requirements, so always check. + */ + if (vers) { + if (!CheckVersion(module, vers, modreq)) { if (errmaj) - *errmaj = LDR_INVALID; + *errmaj = LDR_MISMATCH; if (errmin) *errmin = 0; goto LoadModule_fail; } + } else { + xf86Msg(X_ERROR, + "LoadModule: Module %s does not supply version" + " information\n", module); + if (errmaj) + *errmaj = LDR_INVALID; + if (errmin) + *errmin = 0; + goto LoadModule_fail; } if (setup) ret->SetupProc = setup; @@ -1030,8 +1138,9 @@ goto LoadModule_exit; /* no initdata, fail the load */ - xf86Msg(X_ERROR, "LoadModule: Module %s does not have a %s " - "data object.\n", module, p); + xf86Msg(X_ERROR, "LoadModule: Module %s does not have a %s" + MODULE_DATA_NAME " data object.\n", + module, name); if (errmaj) *errmaj = LDR_INVALID; if (errmin) @@ -1047,6 +1156,9 @@ xf86Msg(X_WARNING, "Module Options present, but no SetupProc " "available for %s\n", module); } +#if LOADERDEBUG + PrintDiagnostics(module, "load"); +#endif goto LoadModule_exit; LoadModule_fail: @@ -1102,7 +1214,7 @@ if ((mod->TearDownProc) && (mod->TearDownData)) mod->TearDownProc(mod->TearDownData); - LoaderUnload(mod->handle); + LoaderUnload(mod); if (mod->child) UnloadModuleOrDriver(mod->child); @@ -1126,7 +1238,7 @@ if ((mod->TearDownProc) && (mod->TearDownData)) mod->TearDownProc(mod->TearDownData); - LoaderUnload(mod->handle); + LoaderUnload(mod); RemoveChild(mod); @@ -1169,7 +1281,6 @@ mdp->child = NULL; mdp->sib = NULL; mdp->parent = NULL; - mdp->demand_next = NULL; mdp->name = xstrdup(name); mdp->filename = NULL; mdp->identifier = NULL; @@ -1179,6 +1290,7 @@ mdp->SetupProc = NULL; mdp->TearDownProc = NULL; mdp->TearDownData = NULL; + mdp->ParentReq = NULL; } return (mdp); @@ -1274,7 +1386,7 @@ msg = "module-specific error"; break; default: - msg = "uknown error"; + msg = "unknown error"; } if (name) xf86Msg(X_ERROR, "%s: Failed to load module \"%s\" (%s, %d)\n", @@ -1330,3 +1442,19 @@ mod->VersionInfo->minorversion, mod->VersionInfo->patchlevel); } + +ModuleDescPtr +LoaderGetSubModuleByName(ModuleDescPtr mod, const char *name) +{ + ModuleDescPtr m; + + if (!mod || !name) + return NULL; + + for (m = mod->child; m; m = m->sib) { + if (!strcmp(m->name, name)) + return m; + } + return NULL; +} + Index: xc/programs/Xserver/hw/xfree86/loader/misym.c diff -u xc/programs/Xserver/hw/xfree86/loader/misym.c:1.39 xc/programs/Xserver/hw/xfree86/loader/misym.c:1.41 --- xc/programs/Xserver/hw/xfree86/loader/misym.c:1.39 Fri Feb 13 18:58:45 2004 +++ xc/programs/Xserver/hw/xfree86/loader/misym.c Wed Mar 1 22:00:38 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/misym.c,v 1.39 2004/02/13 23:58:45 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/misym.c,v 1.41 2006/03/02 03:00:38 dawes Exp $ */ /* * @@ -24,7 +24,7 @@ */ /* - * Copyright (c) 1997-2003 by The XFree86 Project, Inc. + * Copyright (c) 1997-2006 by The XFree86 Project, Inc. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining @@ -84,10 +84,6 @@ #include "mifillarc.h" #include "micmap.h" #include "mioverlay.h" -#ifdef PANORAMIX -#include "resource.h" -#include "panoramiX.h" -#endif #ifdef RENDER #include "mipict.h" #endif @@ -225,5 +221,5 @@ SYMVAR(miGlyphExtents) #endif - {0, 0} + LOOKUP_TERMINATOR }; Index: xc/programs/Xserver/hw/xfree86/loader/os.c diff -u xc/programs/Xserver/hw/xfree86/loader/os.c:1.6 xc/programs/Xserver/hw/xfree86/loader/os.c:1.7 --- xc/programs/Xserver/hw/xfree86/loader/os.c:1.6 Sat Apr 3 17:26:24 2004 +++ xc/programs/Xserver/hw/xfree86/loader/os.c Tue Jul 19 10:42:26 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/os.c,v 1.6 2004/04/03 22:26:24 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/os.c,v 1.7 2005/07/19 14:42:26 tsi Exp $ */ /* * Copyright (c) 1999-2002 by The XFree86 Project, Inc. @@ -73,7 +73,7 @@ #elif defined(ISC) #define OSNAME "isc" #elif defined(SVR4) && defined(sun) -#define OSNAME "solaris" +#define OSNAME "sunos" #elif defined(SVR4) #define OSNAME "svr4" #elif defined(__UNIXOS2__) Index: xc/programs/Xserver/hw/xfree86/loader/sym.h diff -u xc/programs/Xserver/hw/xfree86/loader/sym.h:1.7 xc/programs/Xserver/hw/xfree86/loader/sym.h:1.8 --- xc/programs/Xserver/hw/xfree86/loader/sym.h:1.7 Wed Oct 15 12:29:04 2003 +++ xc/programs/Xserver/hw/xfree86/loader/sym.h Wed Mar 1 22:00:38 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/sym.h,v 1.7 2003/10/15 16:29:04 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/sym.h,v 1.8 2006/03/02 03:00:38 dawes Exp $ */ /* * @@ -26,21 +26,22 @@ #ifndef _SYM_H #define _SYM_H +typedef void (*funcptr)(void); + /* * This structure is used to pass in symbol information that is being * added to the symbol table. */ - -typedef void (*funcptr) (void); - typedef struct { char *symName; funcptr offset; } LOOKUP; -#define SYMFUNC( func ) { #func, (funcptr)&func }, -#define SYMFUNCALIAS( name, func ) { name, (funcptr)&func }, -#define SYMVAR( var ) { #var, (funcptr)&var }, -#define SYMVARALIAS( name, var ) { name, (funcptr)&var }, +#define SYMFUNC(func) { #func, (funcptr)&func }, +#define SYMFUNCALIAS(name, func) { name, (funcptr)&func }, +#define SYMVAR(var) { #var, (funcptr)&var }, +#define SYMVARALIAS(name, var) { name, (funcptr)&var }, + +#define LOOKUP_TERMINATOR { NULL, NULL } #endif /* _SYM_H */ Index: xc/programs/Xserver/hw/xfree86/loader/xf86sym.c diff -u xc/programs/Xserver/hw/xfree86/loader/xf86sym.c:1.253 xc/programs/Xserver/hw/xfree86/loader/xf86sym.c:1.260 --- xc/programs/Xserver/hw/xfree86/loader/xf86sym.c:1.253 Sat Feb 26 13:31:48 2005 +++ xc/programs/Xserver/hw/xfree86/loader/xf86sym.c Mon Mar 20 22:56:26 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/xf86sym.c,v 1.253 2005/02/26 18:31:48 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/xf86sym.c,v 1.260 2006/03/21 03:56:26 dawes Exp $ */ /* * @@ -356,6 +356,9 @@ SYMFUNC(xf86GetPciEntity) SYMFUNC(xf86GetPciConfigInfo) SYMFUNC(xf86SetPciVideo) + SYMFUNC(xf86CheckPciVideo) + SYMFUNC(xf86CheckPciSparseIO) + SYMFUNC(xf86DomainHasBIOSSegments) SYMFUNC(xf86ClaimIsaSlot) SYMFUNC(xf86ClaimFbSlot) SYMFUNC(xf86ClaimNoSlot) @@ -547,6 +550,7 @@ SYMFUNC(DGACreateColormap) SYMFUNC(DGAOpenFramebuffer) SYMFUNC(DGACloseFramebuffer) + SYMFUNC(DGAShutdown) /* xf86DPMS.c */ SYMFUNC(xf86DPMSInit) @@ -560,6 +564,7 @@ SYMFUNC(xf86AddEnabledDevice) SYMFUNC(xf86RemoveEnabledDevice) SYMFUNC(xf86InterceptSignals) + SYMFUNC(xf86ShowStackTrace) SYMFUNC(xf86EnableVTSwitch) /* xf86Helper.c */ @@ -615,12 +620,17 @@ SYMFUNC(xf86CommonSpecialKey) SYMFUNC(xf86IsPc98) SYMFUNC(xf86DisableRandR) + SYMFUNC(xf86GetRotation) SYMFUNC(xf86GetVersion) SYMFUNC(xf86GetModuleVersion) + SYMFUNC(xf86GetSubModuleByName) SYMFUNC(xf86GetClocks) SYMFUNC(xf86SetPriority) + SYMFUNC(xf86SetParentModuleRequirements) SYMFUNC(xf86LoadDrvSubModule) + SYMFUNC(xf86LoadDrvSubModuleWithRequirements) SYMFUNC(xf86LoadSubModule) + SYMFUNC(xf86LoadSubModuleWithRequirements) SYMFUNC(xf86LoadOneModule) SYMFUNC(xf86UnloadSubModule) SYMFUNC(xf86LoaderCheckSymbol) @@ -628,6 +638,10 @@ SYMFUNC(xf86LoaderRefSymbols) SYMFUNC(xf86LoaderReqSymLists) SYMFUNC(xf86LoaderReqSymbols) + SYMFUNC(xf86LoaderModRefSymLists) + SYMFUNC(xf86LoaderModRefSymbols) + SYMFUNC(xf86LoaderModReqSymLists) + SYMFUNC(xf86LoaderModReqSymbols) SYMFUNC(xf86SetBackingStore) SYMFUNC(xf86SetSilkenMouse) /* SYMFUNC(xf86NewSerialNumber) */ @@ -651,6 +665,10 @@ #if defined(__sparc__) && !defined(__OpenBSD__) /* xf86sbusBus.c */ + SYMFUNC(xf86ParseSbusBusString) + SYMFUNC(xf86CompareSbusBusString) + SYMFUNC(xf86CheckSbusSlot) + SYMFUNC(xf86ClaimSbusSlot) SYMFUNC(xf86MatchSbusInstances) SYMFUNC(xf86GetSbusInfoForEntity) SYMFUNC(xf86GetEntityForSbusInfo) @@ -887,6 +905,7 @@ /* Loader functions */ SYMFUNC(LoaderDefaultFunc) + SYMFUNC(LoaderSetParentModuleRequirements) SYMFUNC(LoadSubModule) SYMFUNC(DuplicateModule) SYMFUNC(LoaderErrorMsg) @@ -897,6 +916,10 @@ SYMFUNC(LoaderReqSymLists) SYMFUNC(LoaderRefSymbols) SYMFUNC(LoaderRefSymLists) + SYMFUNC(LoaderModReqSymbols) + SYMFUNC(LoaderModReqSymLists) + SYMFUNC(LoaderModRefSymbols) + SYMFUNC(LoaderModRefSymLists) SYMFUNC(UnloadSubModule) SYMFUNC(LoaderSymbol) SYMFUNC(LoaderListDirs) @@ -1321,5 +1344,5 @@ /* Pci.c */ SYMVAR(pciNumBuses) - {0, 0} + LOOKUP_TERMINATOR }; Index: xc/programs/Xserver/hw/xfree86/os-support/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/Imakefile:3.63 xc/programs/Xserver/hw/xfree86/os-support/Imakefile:3.64 --- xc/programs/Xserver/hw/xfree86/os-support/Imakefile:3.63 Wed Jun 23 15:40:17 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/Imakefile Mon Jan 9 10:00:18 2006 @@ -1,10 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/Imakefile,v 3.63 2004/06/23 19:40:17 tsi Exp $ - - - - - -XCOMM $XConsortium: Imakefile /main/9 1996/10/25 15:38:46 kaleb $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/Imakefile,v 3.64 2006/01/09 15:00:18 dawes Exp $ #include Index: xc/programs/Xserver/hw/xfree86/os-support/README.OS-lib diff -u xc/programs/Xserver/hw/xfree86/os-support/README.OS-lib:3.10 xc/programs/Xserver/hw/xfree86/os-support/README.OS-lib:3.11 --- xc/programs/Xserver/hw/xfree86/os-support/README.OS-lib:3.10 Mon Dec 17 15:00:45 2001 +++ xc/programs/Xserver/hw/xfree86/os-support/README.OS-lib Mon Jan 9 10:00:18 2006 @@ -497,10 +497,4 @@ -$XFree86: xc/programs/Xserver/hw/xfree86/os-support/README.OS-lib,v 3.10 2001/12/17 20:00:45 dawes Exp $ - - - - - -$XConsortium: README.OS-lib /main/5 1996/02/21 17:50:28 kaleb $ +$XFree86: xc/programs/Xserver/hw/xfree86/os-support/README.OS-lib,v 3.11 2006/01/09 15:00:18 dawes Exp $ Index: xc/programs/Xserver/hw/xfree86/os-support/assyntax.h diff -u xc/programs/Xserver/hw/xfree86/os-support/assyntax.h:3.16 xc/programs/Xserver/hw/xfree86/os-support/assyntax.h:3.17 --- xc/programs/Xserver/hw/xfree86/os-support/assyntax.h:3.16 Mon Jan 31 22:53:49 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/assyntax.h Mon Jan 9 10:00:18 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/assyntax.h,v 3.16 2005/02/01 03:53:49 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/assyntax.h,v 3.17 2006/01/09 15:00:18 dawes Exp $ */ #ifndef __ASSYNTAX_H__ #define __ASSYNTAX_H__ @@ -70,8 +70,6 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* $XConsortium: assyntax.h /main/5 1996/02/21 17:50:49 kaleb $ */ - /* * assyntax.h * Index: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h diff -u xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h:3.98 xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h:3.101 --- xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h:3.98 Mon Jan 24 16:27:10 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h Mon Jan 9 10:00:19 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h,v 3.98 2005/01/24 21:27:10 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSlib.h,v 3.101 2006/01/09 15:00:19 dawes Exp $ */ /* * Copyright 1990, 1991 by Thomas Roell, Dinkelscherben, Germany * Copyright 1992 by David Dawes @@ -66,8 +66,6 @@ * */ -/* $XConsortium: xf86_OSlib.h /main/22 1996/10/27 11:06:31 kaleb $ */ - /* * This is private, and should not be included by any drivers. Drivers * may include xf86_OSproc.h to get prototypes for public interfaces. @@ -99,12 +97,11 @@ #include /**************************************************************************/ -/* SYSV386 (SVR3, SVR4) - But not Solaris8 */ +/* SYSV386 (SVR3, SVR4) - including Solaris */ /**************************************************************************/ #if (defined(SYSV) || defined(SVR4)) && \ !defined(DGUX) && !defined(sgi) && \ - !defined(__SOL8__) && \ - (!defined(sun) || defined(i386)) + (defined(sun) || defined(i386)) # ifdef __SCO__ # ifndef _SVID3 # define _SVID3 @@ -137,7 +134,7 @@ # include # elif defined(_NEED_SYSI86) # include -# if !(defined (sun) && defined (i386) && defined (SVR4)) +# if !(defined(sun) && defined(SVR4)) # include # endif # include @@ -146,14 +143,15 @@ # if defined(SVR4) && !defined(sun) # include # endif /* SVR4 && !sun */ -# if defined(sun) && defined (i386) && defined (SVR4) /* Solaris? */ -# if !defined(V86SC_IOPL) /* Solaris 7? */ +/* V86SC_IOPL was moved to on Solaris 7 and later */ +# if defined(sun) && defined(SVR4) /* Solaris? */ +# if !defined(V86SC_IOPL) && !defined(__sparc__) /* Solaris 7? */ # include /* Nope */ # endif /* V86SC_IOPL */ # else # include /* Not solaris */ # endif /* sun && i386 && SVR4 */ -# if defined(sun) && defined (i386) && defined (SVR4) +# if defined(sun) && defined(SVR4) && !defined(__sparc__) # include # endif # endif /* _NEED_SYSI86 */ @@ -167,7 +165,7 @@ # include /* MMAP driver header */ # endif -# if !defined(sun) || !defined(sparc) +# if !defined(sun) || (!defined(sparc) && !defined(__SOL8__)) # define HAS_USL_VTS # endif # if !defined(sun) @@ -185,6 +183,26 @@ # include # include # include +# elif defined(sun) +# include +# include +# include +# ifndef __sparc__ +# include +# endif + +/* + * Undefine symbols from we don't need that conflict with enum + * definitions in parser/xf86tokens.h. + */ +# undef STRING +# undef LEFTALT +# undef RIGHTALT + +# define LED_CAP LED_CAPS_LOCK +# define LED_NUM LED_NUM_LOCK +# define LED_SCR LED_SCROLL_LOCK +# define LED_COMP LED_COMPOSE # endif /* __SCO__ */ # if !defined(VT_ACKACQ) @@ -198,7 +216,7 @@ # if defined(SVR4) || defined(__SCO__) # include -# if !(defined(sun) && defined (i386) && defined (SVR4)) +# if !(defined(sun) && defined(SVR4)) # define DEV_MEM "/dev/pmem" # elif defined(PowerMAX_OS) # define DEV_MEM "/dev/iomem" @@ -216,7 +234,7 @@ # define POSIX_TTY # endif -# if defined(sun) && defined (i386) && defined (SVR4) +# if defined(sun) && defined(SVR4) && !defined(__SOL8__) # define USE_VT_SYSREQ # define VT_SYSREQ_DEFAULT TRUE # endif @@ -240,33 +258,6 @@ #endif /* (SYSV || SVR4) && !DGUX */ -/********** - * Good ol' Solaris8, and its lack of VT support - ***********/ - -#if defined(__SOL8__) || (defined(sun) && !defined(i386)) -# include -# include -# ifdef i386 -# include -# endif -# include - -# include -# include -# include -# include -# include - -# define LED_CAP LED_CAPS_LOCK -# define LED_NUM LED_NUM_LOCK -# define LED_SCR LED_SCROLL_LOCK - -# include - -#endif /* __SOL8__ */ - - /**************************************************************************/ /* DG/ux R4.20MU03 Intel AViion Machines */ @@ -679,6 +670,7 @@ #include #include #include +#include #endif Index: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h diff -u xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h:3.57 xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h:3.58 --- xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h:3.57 Tue Oct 7 19:14:54 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h Thu Sep 22 08:32:32 2005 @@ -64,7 +64,7 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h,v 3.57 2003/10/07 23:14:54 herrb Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h,v 3.58 2005/09/22 12:32:32 alanh Exp $ */ #ifndef _XF86_OSPROC_H #define _XF86_OSPROC_H @@ -194,6 +194,7 @@ extern Bool xf86ReleaseGART(int screenNum); extern int xf86AllocateGARTMemory(int screenNum, unsigned long size, int type, unsigned long *physical); +extern Bool xf86DeallocateGARTMemory(int screenNum, int key); extern Bool xf86BindGARTMemory(int screenNum, int key, unsigned long offset); extern Bool xf86UnbindGARTMemory(int screenNum, int key); extern Bool xf86EnableAGP(int screenNum, CARD32 mode); Index: xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h diff -u xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h:3.59 xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h:3.63 --- xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h:3.59 Mon Dec 13 17:40:55 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h Sat Apr 8 14:30:26 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h,v 3.59 2004/12/13 22:40:55 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h,v 3.63 2006/04/08 18:30:26 dawes Exp $ */ /* * Copyright 1997-2004 by The XFree86 Project, Inc * All rights reserved. @@ -58,6 +58,9 @@ # include # else /* __OS2ELF__ */ /* EMX/gcc_elf under OS/2 does not have native header files */ +# ifndef _STDARG_H +# define _STDARG_H +# endif # if !defined (_VA_LIST) # define _VA_LIST typedef char *va_list; @@ -174,6 +177,17 @@ #endif /* (XFree86LOADER && IN_MODULE) || NEED_XF86_TYPES */ #if (defined(XFree86LOADER) && defined(IN_MODULE)) || defined(NEED_XF86_PROTOTYPES) + +/* XXX Need to check which GCC versions have the format(printf) attribute. */ +#if (!defined(printf) || defined(printf_is_xf86printf)) && \ + defined(__GNUC__) && \ + ((__GNUC__ > 2) || ((__GNUC__ == 2) && (__GNUC_MINOR__ > 4))) +# define _printf_attribute(a,b) __attribute((format(printf,a,b))) +# undef printf +#else +# define _printf_attribute(a,b) /**/ +#endif + /* * ANSI C compilers only. */ @@ -211,8 +225,8 @@ extern double xf86fmod(double,double); extern XF86FILE* xf86fopen(const char*,const char*); extern double xf86frexp(double, int*); -extern int xf86printf(const char*,...); -extern int xf86fprintf(XF86FILE*,const char*,...); +extern int xf86printf(const char*,...) _printf_attribute(1,2); +extern int xf86fprintf(XF86FILE*,const char*,...) _printf_attribute(2,3); extern int xf86fputc(int,XF86FILE*); extern int xf86fputs(const char*,XF86FILE*); extern xf86size_t xf86fread(void*,xf86size_t,xf86size_t,XF86FILE*); @@ -221,8 +235,8 @@ #if defined(HAVE_VFSCANF) || !defined(NEED_XF86_PROTOTYPES) extern int xf86fscanf(XF86FILE*,const char*,...); #else -extern int xf86fscanf(/*XF86FILE*,const char*,char *,char *,char *,char *, - char *,char *,char *,char *,char *,char * */); +extern int xf86fscanf(XF86FILE*,const char*,char *,char *,char *,char *, + char *,char *,char *,char *,char *,char *); #endif extern int xf86fseek(XF86FILE*,long,int); extern int xf86fsetpos(XF86FILE*,const XF86fpos_t*); @@ -262,14 +276,14 @@ extern int xf86setbuf(XF86FILE*,char*); extern int xf86setvbuf(XF86FILE*,char*,int,xf86size_t); extern double xf86sin(double); -extern int xf86sprintf(char*,const char*,...); -extern int xf86snprintf(char*,xf86size_t,const char*,...); +extern int xf86sprintf(char*,const char*,...) _printf_attribute(2,3); +extern int xf86snprintf(char*,xf86size_t,const char*,...) _printf_attribute(3,4); extern double xf86sqrt(double); #if defined(HAVE_VSSCANF) || !defined(NEED_XF86_PROTOTYPES) extern int xf86sscanf(const char*,const char*,...); #else -extern int xf86sscanf(/*const char*,const char*,char *,char *,char *,char *, - char *,char *,char *,char *,char *,char * */); +extern int xf86sscanf(const char*,const char*,char *,char *,char *,char *, + char *,char *,char *,char *,char *,char *); #endif extern char* xf86strcat(char*,const char*); extern char* xf86strchr(const char*, int c); @@ -344,7 +358,7 @@ extern int xf86shmget(xf86key_t key, int size, int xf86shmflg); extern char * xf86shmat(int id, char *addr, int xf86shmflg); extern int xf86shmdt(char *addr); -extern int xf86shmctl(int id, int xf86cmd, pointer buf); +extern int xf86shmctl(int id, int xf86cmd, struct xf86shmid_ds * buf); extern int xf86setjmp(xf86jmp_buf env); extern int xf86setjmp0(xf86jmp_buf env); @@ -358,6 +372,11 @@ (xf86getjmptype() == 1 ? xf86setjmp1((env), xf86setjmp1_arg2()) : \ xf86setjmperror((env)))) +#undef _printf_attribute +#if defined(printf_is_xf86printf) && !defined(printf) +#define printf xf86printf +#endif + #else /* (XFree86LOADER && IN_MODULE) || NEED_XF86_PROTOTYPES */ #include #include Index: xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h diff -u xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h:3.66 xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h:3.68 --- xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h:3.66 Wed Dec 29 16:22:55 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h Sat Jan 28 21:19:53 2006 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h,v 3.66 2004/12/29 21:22:55 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h,v 3.68 2006/01/29 02:19:53 tsi Exp $ */ /* - * Copyright (c) 1997-2004 by The XFree86 Project, Inc. + * Copyright (c) 1997-2006 by The XFree86 Project, Inc. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining @@ -64,7 +64,7 @@ #ifndef XF86_LIBC_H #define XF86_LIBC_H 1 -#include "Xfuncs.h" +#include #include /* @@ -114,6 +114,19 @@ /* sysv IPC */ typedef int xf86key_t; +struct xf86ipc_perm { /* This is sufficient for now */ + unsigned long uid; + unsigned long gid; + unsigned long cuid; + unsigned long cgid; + unsigned long mode; + unsigned long padding[3]; +}; +struct xf86shmid_ds { + struct xf86ipc_perm shm_perm; + unsigned long shm_segsz; + unsigned long padding[9]; +}; /* setjmp/longjmp */ #if defined(__ia64__) @@ -217,8 +230,10 @@ #define XF86SHM_RDONLY 010000 /* attach read-only else read-write */ #define XF86SHM_RND 020000 /* round attach address to SHMLBA */ #define XF86SHM_REMAP 040000 /* take-over region on attach */ -/* xf86shmclt() */ +/* xf86shmctl() */ #define XF86IPC_RMID 0 +#define XF86IPC_STAT 1 +#define XF86IPC_SET 2 #endif /* (XFree86LOADER && IN_MODULE) || NEED_XF86_TYPES */ @@ -559,6 +574,12 @@ #define gid_t xf86gid_t #undef stat_t #define stat_t struct xf86stat +#undef key_t +#define key_t xf86key_t +#undef ipc_perm +#define ipc_perm xf86ipc_perm +#undef shmid_ds +#define shmid_ds xf86shmid_ds #undef ulong #define ulong unsigned long @@ -694,11 +715,15 @@ #define SHM_REMAP XF86SHM_REMAP #undef IPC_RMID #define IPC_RMID XF86IPC_RMID +#undef IPC_STAT +#define IPC_STAT XF86IPC_STAT +#undef IPC_SET +#define IPC_SET XF86IPC_SET #undef IPC_CREAT #define IPC_CREAT XF86IPC_CREAT #undef IPC_EXCL #define IPC_EXCL XF86IPC_EXCL -#undef PC_NOWAIT +#undef IPC_NOWAIT #define IPC_NOWAIT XF86IPC_NOWAIT #undef SHM_R #define SHM_R XF86SHM_R Index: xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h diff -u xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h:1.29 xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h:1.31 --- xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h:1.29 Fri Dec 10 11:07:03 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h Fri Feb 17 22:31:38 2006 @@ -31,7 +31,7 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h,v 1.29 2004/12/10 16:07:03 alanh Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h,v 1.31 2006/02/18 03:31:38 dawes Exp $ */ #ifndef _XF86DRM_H_ #define _XF86DRM_H_ @@ -285,7 +285,7 @@ #define DRM_LOCK_CONT 0x40000000 /**< Hardware lock is contended */ #if defined(__GNUC__) && (__GNUC__ >= 2) -# if defined(__i386) || defined(__amd64__) +# if defined(__i386) || defined(__amd64__) || defined(__x86_64__) /* Reflect changes here to drmP.h */ #define DRM_CAS(lock,old,new,__ret) \ do { \ @@ -304,26 +304,26 @@ #define DRM_CAS(lock, old, new, ret) \ do { \ - int old32; \ - int cur32; \ + register int old32; \ + register int cur32; \ __asm__ __volatile__( \ - " mb\n" \ - " zap %4, 0xF0, %0\n" \ - " ldl_l %1, %2\n" \ - " zap %1, 0xF0, %1\n" \ - " cmpeq %0, %1, %1\n" \ - " beq %1, 1f\n" \ - " bis %5, %5, %1\n" \ - " stl_c %1, %2\n" \ - "1: xor %1, 1, %1\n" \ - " stl %1, %3" \ - : "+r" (old32), \ - "+&r" (cur32), \ - "=m" (__drm_dummy_lock(lock)),\ - "=m" (ret) \ - : "r" (old), \ - "r" (new)); \ - } while(0) + " mb\n" \ + " zap %4, 0xF0, %0\n" \ + " ldl_l %1, %2\n" \ + " zap %1, 0xF0, %1\n" \ + " cmpeq %0, %1, %1\n" \ + " beq %1, 1f\n" \ + " bis %5, %5, %1\n" \ + " stl_c %1, %2\n" \ + "1: xor %1, 1, %1\n" \ + " stl %1, %3" \ + : "=r" (old32), \ + "=&r" (cur32), \ + "=m" (__drm_dummy_lock(lock)),\ + "=m" (ret) \ + : "r" (old), \ + "r" (new)); \ + } while(0) #elif defined(__sparc__) Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile:3.68 xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile:3.70 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile:3.68 Mon Feb 28 22:48:53 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile Fri Oct 14 11:17:00 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile,v 3.68 2005/03/01 03:48:53 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile,v 3.70 2005/10/14 15:17:00 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -98,11 +98,6 @@ # endif #endif -#if BuildXF86DRI -DRI_SRC = sigio.c -DRI_OBJ = sigio.o -#endif - MOUSESRC = bsd_mouse.c MOUSEOBJ = bsd_mouse.o @@ -203,9 +198,9 @@ $(RES_OBJ) stdPci.o vidmem.o $(JOYSTICK_OBJ) sigio.o $(APMOBJ) \ $(AXP_OBJ) $(KMODOBJ) $(AGP_OBJ) $(KBDOBJ) -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(XINCLUDESRC) -I$(EXTINCSRC) -I$(SERVERSRC)/mi $(APINCLUDES) \ - $(LIBUSBINCLUDES) -I$(XF86OSSRC)/shared -I$(DRMINCLUDESDIR) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include \ + -I$(SERVERSRC)/mi $(APINCLUDES) \ + $(LIBUSBINCLUDES) -I$(XF86OSSRC)/shared -I$(DRMINCLUDESDIR) CONSDEFINES = XFree86ConsoleDefines RESDEFINES = -DUSESTDRES Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c:1.8 xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c:1.10 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c:1.8 Tue Jan 25 22:17:39 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c Mon Jan 9 10:00:19 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c,v 1.8 2005/01/26 03:17:39 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/alpha_video.c,v 1.10 2006/01/09 15:00:19 dawes Exp $ */ /* * Copyright 1992 by Rich Murphey * Copyright 1993 by David Wexelblat @@ -24,9 +24,7 @@ * */ -/* $XConsortium: bsd_video.c /main/10 1996/10/25 11:37:57 kaleb $ */ - -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/arm_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/arm_video.c:1.2 xc/programs/Xserver/hw/xfree86/os-support/bsd/arm_video.c:1.4 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/arm_video.c:1.2 Fri Mar 14 08:46:03 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/arm_video.c Mon Jan 9 10:00:19 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/arm_video.c,v 1.2 2003/03/14 13:46:03 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/arm_video.c,v 1.4 2006/01/09 15:00:19 dawes Exp $ */ /* * Copyright 1992 by Rich Murphey * Copyright 1993 by David Wexelblat @@ -57,9 +57,7 @@ * */ -/* $XConsortium: bsd_video.c /main/10 1996/10/25 11:37:57 kaleb $ */ - -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsdResource.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsdResource.c:1.9 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsdResource.c:1.11 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsdResource.c:1.9 Thu Oct 2 09:30:06 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsdResource.c Fri Oct 14 11:17:00 2005 @@ -1,8 +1,8 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsdResource.c,v 1.9 2003/10/02 13:30:06 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsdResource.c,v 1.11 2005/10/14 15:17:00 tsi Exp $ */ /* Resource information code */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86Privstr.h" @@ -18,7 +18,8 @@ #ifdef INCLUDE_XF86_NO_DOMAIN -#if defined(__alpha__) || defined(__sparc64__) || defined(__amd64__) +#if defined(__alpha__) || defined(__sparc64__) || defined(__amd64__) || \ + defined(__x86_64__) resPtr xf86BusAccWindowsFromOS(void) Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_KbdMap.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_KbdMap.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_KbdMap.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_KbdMap.c:1.1 Thu Oct 10 21:40:34 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_KbdMap.c Fri Oct 14 11:17:00 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_KbdMap.c,v 1.1 2002/10/11 01:40:34 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_KbdMap.c,v 1.5 2005/10/14 15:17:00 tsi Exp $ */ /* * Slightly modified xf86KbdBSD.c which is @@ -8,8 +8,8 @@ * and from xf86KbdCODrv.c by Holger Veit */ -#include "X.h" -#include "Xmd.h" +#include +#include #include "input.h" #include "scrnintstr.h" @@ -17,13 +17,17 @@ #include "xf86.h" #include "xf86Priv.h" -#include "xf86_OSlib.h" +#include "xf86_OSlib.h" #include "xf86Xinput.h" #include "xf86OSKbd.h" #include "atKeynames.h" #include "xf86Keymap.h" #include "bsd_kbd.h" +#ifdef WSKBD_TYPE_ADB +static Bool ADBScanCode(InputInfoPtr, int *); +#endif + #if (defined(SYSCONS_SUPPORT) || defined(PCVT_SUPPORT)) && defined(GIO_KEYMAP) #define KD_GET_ENTRY(i,n) \ eascii_to_x[((keymap.key[i].spcl << (n+1)) & 0x100) + keymap.key[i].map[n]] @@ -47,7 +51,7 @@ 0, 0, 0, 0, 0, 0, 0, 0, /* 0x78 - 0x7f */ }; -/* This table assumes the ibm code page 437 coding for characters +/* This table assumes the ibm code page 437 coding for characters * > 0x80. They are returned in this form by PCVT */ static KeySym eascii_to_x[512] = { NoSymbol, NoSymbol, NoSymbol, NoSymbol, @@ -107,7 +111,7 @@ NoSymbol, NoSymbol, NoSymbol, NoSymbol, NoSymbol, NoSymbol, NoSymbol, NoSymbol, XK_Greek_alpha, XK_ssharp, XK_Greek_GAMMA, XK_Greek_pi, - XK_Greek_SIGMA, XK_Greek_sigma, XK_mu, XK_Greek_tau, + XK_Greek_SIGMA, XK_Greek_sigma, XK_mu, XK_Greek_tau, XK_Greek_PHI, XK_Greek_THETA, XK_Greek_OMEGA, XK_Greek_delta, XK_infinity, XK_Ooblique, XK_Greek_epsilon, XK_intersection, XK_identical, XK_plusminus, XK_greaterthanequal, XK_lessthanequal, @@ -115,7 +119,7 @@ XK_degree, NoSymbol, NoSymbol, XK_radical, XK_Greek_eta, XK_twosuperior, XK_periodcentered, NoSymbol, - /* + /* * special marked entries (256 + x) */ @@ -187,7 +191,7 @@ }; #ifdef __OpenBSD__ -/* don't mark AltR and CtrlR for remapping, since they +/* don't mark AltR and CtrlR for remapping, since they * cannot be remapped by pccons */ static unsigned char pccons_remap[128] = { 0, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* 0x00 - 0x07 */ @@ -208,7 +212,7 @@ 0, 0, 0, 0, 0, 0, 0, 0, /* 0x78 - 0x7f */ }; -/* This table assumes an iso8859_1 encoding for the characters +/* This table assumes an iso8859_1 encoding for the characters * > 80, as returned by pccons */ static KeySym latin1_to_x[256] = { NoSymbol, NoSymbol, NoSymbol, NoSymbol, @@ -268,13 +272,13 @@ XK_Ooblique, XK_Ugrave, XK_Uacute, XK_Ucircumflex, XK_Udiaeresis, XK_Yacute, XK_THORN, XK_ssharp, XK_agrave, XK_aacute, XK_acircumflex, XK_atilde, - XK_adiaeresis, XK_aring, XK_ae, XK_ccedilla, + XK_adiaeresis, XK_aring, XK_ae, XK_ccedilla, XK_egrave, XK_eacute, XK_ecircumflex, XK_ediaeresis, XK_igrave, XK_iacute, XK_icircumflex, XK_idiaeresis, - XK_eth, XK_ntilde, XK_ograve, XK_oacute, + XK_eth, XK_ntilde, XK_ograve, XK_oacute, XK_ocircumflex, XK_otilde, XK_odiaeresis, XK_division, XK_oslash, XK_ugrave, XK_uacute, XK_ucircumflex, - XK_udiaeresis, XK_yacute, XK_thorn, XK_ydiaeresis + XK_udiaeresis, XK_yacute, XK_thorn, XK_ydiaeresis }; #endif @@ -303,7 +307,7 @@ /* 1 */ KEY_NOTUSED, /* 2 */ KEY_NOTUSED, /* 3 */ KEY_NOTUSED, - /* 4 */ KEY_A, + /* 4 */ KEY_A, /* 5 */ KEY_B, /* 6 */ KEY_C, /* 7 */ KEY_D, @@ -400,8 +404,8 @@ /* 98 */ KEY_KP_0, /* Keypad 0 Ins */ /* 99 */ KEY_KP_Decimal, /* Keypad . Del */ /* 100 */ KEY_Less, /* < > on some keyboards */ - /* 101 */ KEY_Menu, /* Menu */ - /* 102 */ KEY_NOTUSED, + /* 101 */ KEY_Menu, /* Menu, Compose on Sun Type 6 USB */ + /* 102 */ KEY_Power, /* Sun Type 6 USB */ /* 103 */ KEY_KP_Equal, /* Keypad = on Mac keyboards */ /* 104 */ KEY_NOTUSED, /* 105 */ KEY_NOTUSED, @@ -415,20 +419,21 @@ /* 113 */ KEY_NOTUSED, /* 114 */ KEY_NOTUSED, /* 115 */ KEY_NOTUSED, - /* 116 */ KEY_NOTUSED, - /* 117 */ KEY_NOTUSED, - /* 118 */ KEY_NOTUSED, - /* 119 */ KEY_NOTUSED, - /* 120 */ KEY_NOTUSED, - /* 121 */ KEY_NOTUSED, - /* 122 */ KEY_NOTUSED, - /* 123 */ KEY_NOTUSED, - /* 124 */ KEY_NOTUSED, - /* 125 */ KEY_NOTUSED, - /* 126 */ KEY_NOTUSED, - /* 127 */ KEY_NOTUSED, - /* 128 */ KEY_NOTUSED, - /* 129 */ KEY_NOTUSED, + /* the following codes are used by Sun Type 6 USB keyboards */ + /* 116 */ KEY_L7, + /* 117 */ KEY_Help, + /* 118 */ KEY_L3, + /* 119 */ KEY_L5, + /* 120 */ KEY_L1, + /* 121 */ KEY_L2, + /* 122 */ KEY_L4, + /* 123 */ KEY_L10, + /* 124 */ KEY_L6, + /* 125 */ KEY_L8, + /* 126 */ KEY_L9, + /* 127 */ KEY_Mute, + /* 128 */ KEY_AudioRaise, + /* 129 */ KEY_AudioLower, /* 130 */ KEY_NOTUSED, /* 131 */ KEY_NOTUSED, /* 132 */ KEY_NOTUSED, @@ -594,14 +599,14 @@ /* 48 */ KEY_Tab, /* 49 */ KEY_Space, /* 50 */ KEY_Tilde, - /* 51 */ KEY_Delete, + /* 51 */ KEY_BackSpace, /* 52 */ KEY_AltLang, /* 53 */ KEY_Escape, /* 54 */ KEY_LCtrl, - /* 55 */ KEY_Alt, + /* 55 */ KEY_LMeta, /* 56 */ KEY_ShiftL, /* 57 */ KEY_CapsLock, - /* 58 */ KEY_LMeta, + /* 58 */ KEY_Alt, /* 59 */ KEY_Left, /* 60 */ KEY_Right, /* 61 */ KEY_Down, @@ -614,8 +619,8 @@ /* 68 */ KEY_NOTUSED, /* 69 */ KEY_KP_Plus, /* 70 */ KEY_NOTUSED, - /* 71 */ KEY_UNKNOWN, /* Clear */ - /* 72 */ KEY_NOTUSED, + /* 71 */ KEY_NumLock, /* Clear */ + /* 72 */ KEY_NOTUSED, /* 73 */ KEY_NOTUSED, /* 74 */ KEY_NOTUSED, /* 75 */ KEY_KP_Divide, @@ -638,7 +643,7 @@ /* 92 */ KEY_KP_9, /* 93 */ KEY_NOTUSED, /* 94 */ KEY_NOTUSED, - /* 95 */ KEY_UNKNOWN, /* Keypad , */ + /* 95 */ KEY_KP_Decimal, /* Keypad , */ /* 96 */ KEY_F5, /* 97 */ KEY_F6, /* 98 */ KEY_F7, @@ -648,24 +653,29 @@ /* 102 */ KEY_NOTUSED, /* 103 */ KEY_F11, /* 104 */ KEY_NOTUSED, - /* 105 */ KEY_NOTUSED, + /* 105 */ KEY_Print, /* 106 */ KEY_KP_Enter, - /* 107 */ KEY_NOTUSED, + /* 107 */ KEY_ScrollLock, /* 108 */ KEY_NOTUSED, /* 109 */ KEY_F10, /* 110 */ KEY_NOTUSED, /* 111 */ KEY_F12, /* 112 */ KEY_NOTUSED, - /* 113 */ KEY_NOTUSED, - /* 114 */ KEY_NOTUSED, + /* 113 */ KEY_Pause, + /* 114 */ KEY_Insert, /* 115 */ KEY_Home, /* 116 */ KEY_PgUp, - /* 117 */ KEY_NOTUSED, + /* 117 */ KEY_Delete, /* 118 */ KEY_F4, /* 119 */ KEY_End, /* 120 */ KEY_F2, /* 121 */ KEY_PgDown, - /* 122 */ KEY_F1 + /* 122 */ KEY_F1, + /* 123 */ KEY_NOTUSED, + /* 124 */ KEY_NOTUSED, + /* 125 */ KEY_NOTUSED, + /* 126 */ KEY_NOTUSED, + /* 127 */ KEY_Power }; #define WS_ADB_MAP_SIZE (sizeof(wsAdbMap)/sizeof(unsigned char)) @@ -678,10 +688,10 @@ static CARD8 wsSunMap[] = { /* 0x00 */ KEY_NOTUSED, - /* 0x01 */ KEY_NOTUSED, /* stop */ - /* 0x02 */ KEY_NOTUSED, /* BrightnessDown / S-VolumeDown */ - /* 0x03 */ KEY_NOTUSED, /* again */ - /* 0x04 */ KEY_NOTUSED, /* BridgtnessUp / S-VolumeUp */ + /* 0x01 */ KEY_L1, /* stop */ + /* 0x02 */ KEY_AudioLower, /* BrightnessDown / S-VolumeDown */ + /* 0x03 */ KEY_L2, /* again */ + /* 0x04 */ KEY_AudioRaise, /* BridgtnessUp / S-VolumeUp */ /* 0x05 */ KEY_F1, /* 0x06 */ KEY_F2, /* 0x07 */ KEY_F10, @@ -700,10 +710,10 @@ /* 0x14 */ KEY_Up, /* 0x15 */ KEY_Pause, /* 0x16 */ KEY_Print, - /* 0x17 */ KEY_NOTUSED, /* props */ + /* 0x17 */ KEY_ScrollLock, /* 0x18 */ KEY_Left, - /* 0x19 */ KEY_ScrollLock, - /* 0x1a */ KEY_NOTUSED, /* undo */ + /* 0x19 */ KEY_L3, /* props */ + /* 0x1a */ KEY_L4, /* undo */ /* 0x1b */ KEY_Down, /* 0x1c */ KEY_Right, /* 0x1d */ KEY_Escape, @@ -725,10 +735,10 @@ /* 0x2d */ KEY_KP_Equal, /* 0x2e */ KEY_KP_Divide, /* 0x2f */ KEY_KP_Multiply, - /* 0x30 */ KEY_NOTUSED, - /* 0x31 */ KEY_NOTUSED, /* front */ + /* 0x30 */ KEY_Power, + /* 0x31 */ KEY_L5, /* front */ /* 0x32 */ KEY_KP_Decimal, - /* 0x33 */ KEY_NOTUSED, /* copy */ + /* 0x33 */ KEY_L6, /* copy */ /* 0x34 */ KEY_Home, /* 0x35 */ KEY_Tab, /* 0x36 */ KEY_Q, @@ -744,13 +754,13 @@ /* 0x40 */ KEY_LBrace, /* 0x41 */ KEY_RBrace, /* 0x42 */ KEY_Delete, - /* 0x43 */ KEY_NOTUSED, /* compose */ + /* 0x43 */ KEY_Compose, /* compose */ /* 0x44 */ KEY_KP_7, /* 0x45 */ KEY_KP_8, /* 0x46 */ KEY_KP_9, /* 0x47 */ KEY_KP_Minus, - /* 0x48 */ KEY_NOTUSED, /* open */ - /* 0x49 */ KEY_NOTUSED, /* paste */ + /* 0x48 */ KEY_L7, /* open */ + /* 0x49 */ KEY_L8, /* paste */ /* 0x4a */ KEY_End, /* 0x4b */ KEY_NOTUSED, /* 0x4c */ KEY_LCtrl, @@ -772,9 +782,9 @@ /* 0x5c */ KEY_KP_5, /* 0x5d */ KEY_KP_6, /* 0x5e */ KEY_KP_0, - /* 0x5f */ KEY_NOTUSED, /* find */ + /* 0x5f */ KEY_L9, /* find */ /* 0x60 */ KEY_PgUp, - /* 0x61 */ KEY_NOTUSED, /* cut */ + /* 0x61 */ KEY_L10, /* cut */ /* 0x62 */ KEY_NumLock, /* 0x63 */ KEY_ShiftL, /* 0x64 */ KEY_Z, @@ -795,13 +805,13 @@ /* 0x73 */ KEY_NOTUSED, /* 0x74 */ KEY_NOTUSED, /* 0x75 */ KEY_NOTUSED, - /* 0x76 */ KEY_NOTUSED, /* help */ + /* 0x76 */ KEY_Help, /* help */ /* 0x77 */ KEY_CapsLock, /* 0x78 */ KEY_LMeta, /* 0x79 */ KEY_Space, /* 0x7a */ KEY_RMeta, /* 0x7b */ KEY_PgDown, - /* 0x7c */ KEY_NOTUSED, + /* 0x7c */ KEY_Less, /* 0x7d */ KEY_KP_Plus, /* 0x7e */ KEY_NOTUSED, /* 0x7f */ KEY_NOTUSED @@ -844,7 +854,7 @@ { pccons_keymap_t keymap[KB_NUM_KEYS]; if (ioctl(pInfo->fd, CONSOLE_GET_KEYMAP, &keymap) != -1) { - for (i = 0; i < KB_NUM_KEYS; i++) + for (i = 0; i < KB_NUM_KEYS; i++) if (pccons_remap[i]) { k = map + (pccons_remap[i] << 2); switch (keymap[i].type) { @@ -949,7 +959,7 @@ case PCVT: { keymap_t keymap; - + if (ioctl(pInfo->fd, GIO_KEYMAP, &keymap) != -1) { for (i = 0; i < keymap.n_keys && i < NUM_KEYCODES; i++) if (remap[i]) { @@ -968,8 +978,8 @@ } break; #endif /* SYSCONS || PCVT */ - - } + + } #endif /* !bsdi */ /* @@ -977,32 +987,32 @@ */ for (i = 0; i < MAP_LENGTH; i++) pModMap[i] = NoSymbol; /* make sure it is restored */ - + for (k = map, i = MIN_KEYCODE; i < (NUM_KEYCODES + MIN_KEYCODE); i++, k += 4) - + switch(*k) { - + case XK_Shift_L: case XK_Shift_R: pModMap[i] = ShiftMask; break; - + case XK_Control_L: case XK_Control_R: pModMap[i] = ControlMask; break; - + case XK_Caps_Lock: pModMap[i] = LockMask; break; - + case XK_Alt_L: case XK_Alt_R: pModMap[i] = AltMask; break; - + case XK_Num_Lock: pModMap[i] = NumLockMask; break; @@ -1023,53 +1033,85 @@ break; } - + pKbd->kbdType = 0; pKeySyms->map = map; pKeySyms->mapWidth = GLYPHS_PER_KEY; pKeySyms->minKeyCode = MIN_KEYCODE; - pKeySyms->maxKeyCode = MAX_KEYCODE; + pKeySyms->maxKeyCode = MAX_KEYCODE; switch(pKbd->consType) { #ifdef SYSCONS_SUPPORT case SYSCONS: - if (pKbd->CustomKeycodes) - pKbd->scancodeMap = &sysconsCODE; - else - pKbd->RemapScanCode = ATScancode; - break; + if (pKbd->CustomKeycodes) + pKbd->scancodeMap = &sysconsCODE; + else + pKbd->RemapScanCode = ATScancode; + break; #endif #if defined(PCCONS_SUPPORT) || defined (PCVT_SUPPORT) case PCCONS: case PCVT: - pKbd->RemapScanCode = ATScancode; + pKbd->RemapScanCode = ATScancode; #endif #ifdef WSCONS_SUPPORT case WSCONS: - switch (pKbd->wsKbdType) { + switch (pKbd->wsKbdType) { case WSKBD_TYPE_PC_XT: case WSKBD_TYPE_PC_AT: - pKbd->RemapScanCode = ATScancode; - break; + pKbd->RemapScanCode = ATScancode; + break; case WSKBD_TYPE_USB: - pKbd->scancodeMap = &wsUsb; - break; -#ifdef WSKBD_TYPE_ADB + pKbd->scancodeMap = &wsUsb; + break; +#ifdef WSKBD_TYPE_ADB case WSKBD_TYPE_ADB: - pKbd->scancodeMap = &wsAdb; - break; + pKbd->RemapScanCode = ADBScanCode; + break; #endif #ifdef WSKBD_TYPE_SUN +#ifdef WSKBD_TYPE_SUN5 + case WSKBD_TYPE_SUN5: +#endif /* WSKBD_TYPE_SUN5 */ case WSKBD_TYPE_SUN: - pKbd->scancodeMap = &wsSun; - break; -#endif + pKbd->scancodeMap = &wsSun; + break; +#endif /* WSKBD_TYPE_SUN */ default: - ErrorF("Unknown wskbd type %d\n", pKbd->wsKbdType); - } + pKbd->RemapScanCode = ATScancode; + break; + } break; #endif } return; } + +#ifdef WSKBD_TYPE_ADB +static Bool +ADBScanCode(InputInfoPtr pInfo, int *scanCode) +{ + KbdDevPtr pKbd = (KbdDevPtr) pInfo->private; + + /* + * we abuse pKbd->scanPrefix to record each scancode so we can weed out the + * 0 following every caps-lock which would otherwise result in spurious 'A's + */ + if (*scanCode == 0) { + /* drop this event when the previous one was caps-lock */ + if (pKbd->scanPrefix == 57) { + pKbd->scanPrefix = 0; + return TRUE; /* let the input handler stop right here */ + } + } + + /* record the scancode */ + pKbd->scanPrefix = (*scanCode) & 0x7f; + + /* do the normal remapping */ + if (*scanCode >= wsAdb.begin && *scanCode < wsAdb.end) + *scanCode = wsAdb.map[*scanCode - wsAdb.begin]; + return FALSE; /* continue normal processing */ +} +#endif Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_VTsw.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_VTsw.c:3.6 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_VTsw.c:3.8 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_VTsw.c:3.6 Sat Jul 25 12:56:33 1998 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_VTsw.c Mon Jan 9 10:00:19 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_VTsw.c,v 3.6 1998/07/25 16:56:33 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_VTsw.c,v 3.8 2006/01/09 15:00:19 dawes Exp $ */ /* * Derived from VTsw_usl.c which is * Copyright 1993 by David Wexelblat @@ -23,9 +23,8 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: bsd_VTsw.c /main/4 1996/02/21 17:50:57 kaleb $ */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_apm.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_apm.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_apm.c:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_apm.c:1.1 Mon Feb 28 22:09:25 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_apm.c Fri Oct 14 11:17:00 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_apm.c,v 1.1 2000/02/29 03:09:25 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_apm.c,v 1.2 2005/10/14 15:17:00 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c:1.3 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c:1.4 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c:1.3 Tue Oct 7 18:33:37 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c Fri Oct 14 11:17:00 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c,v 1.3 2003/10/07 22:33:37 herrb Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_axp.c,v 1.4 2005/10/14 15:17:00 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_ev56.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_ev56.c:1.2 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_ev56.c:1.3 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_ev56.c:1.2 Tue Feb 27 18:05:00 2001 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_ev56.c Fri Oct 14 11:17:00 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_ev56.c,v 1.2 2001/02/27 23:05:00 alanh Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_ev56.c,v 1.3 2005/10/14 15:17:00 tsi Exp $ */ -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c:3.22 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c:3.25 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c:3.22 Tue Oct 7 19:14:55 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c Mon Jan 9 10:00:19 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c,v 3.22 2003/10/07 23:14:55 herrb Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c,v 3.25 2006/01/09 15:00:19 dawes Exp $ */ /* * Copyright 1992 by Rich Murphey * Copyright 1993 by David Wexelblat @@ -23,9 +23,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: bsd_init.c /main/8 1996/10/23 13:13:05 kaleb $ */ -#include "X.h" +#include #include "compiler.h" @@ -37,6 +36,7 @@ #include static Bool KeepTty = FALSE; +static Bool DetachTty = FALSE; static int devConsoleFd = -1; #if defined (SYSCONS_SUPPORT) || defined (PCVT_SUPPORT) static int VTnum = -1; @@ -153,46 +153,54 @@ int result; struct utsname uts; vtmode_t vtmode; + int needSwitchToVT1 = FALSE; #endif - if (serverGeneration == 1) - { + if (serverGeneration == 1) { /* check if we are run with euid==0 */ - if (geteuid() != 0) - { + if (geteuid() != 0) { FatalError("xf86OpenConsole: Server must be suid root"); } - if (!KeepTty) - { + /* + * Check the controlling tty, if there is one, and keep it if it + * doesn't look like a console tty. + */ + if (!KeepTty) { + char *ttyn; + + /* Test stderr, which remains open. */ + ttyn = ttyname(2); + if (ttyn && strlen(ttyn) > 8 && + ttyn[8] != 'C' && ttyn[8] != 'v' && ttyn[8] != 'E') { + KeepTty = TRUE; + } + } + + if (DetachTty || !KeepTty) { /* - * detaching the controlling tty solves problems of kbd character + * Detaching the controlling tty solves problems of kbd character * loss. This is not interesting for CO driver, because it is - * exclusive. + * exclusive. Check if this is still needed. */ setpgrp(0, getpid()); - if ((i = open("/dev/tty",O_RDWR)) >= 0) - { + if ((i = open("/dev/tty",O_RDWR)) >= 0) { ioctl(i,TIOCNOTTY,(char *)0); close(i); } } - /* detect which driver we are running on */ - for (driver = xf86ConsTab; *driver; driver++) - { + /* Detect which driver we are running on. */ + for (driver = xf86ConsTab; *driver; driver++) { if ((fd = (*driver)()) >= 0) break; } /* Check that a supported console driver was found */ - if (fd < 0) - { + if (fd < 0) { char cons_drivers[80] = {0, }; - for (i = 0; i < sizeof(supported_drivers) / sizeof(char *); i++) - { - if (i) - { + for (i = 0; i < sizeof(supported_drivers) / sizeof(char *); i++) { + if (i) { strcat(cons_drivers, ", "); } strcat(cons_drivers, supported_drivers[i]); @@ -201,76 +209,72 @@ "%s: No console driver found\n\tSupported drivers: %s\n\t%s", "xf86OpenConsole", cons_drivers, CHECK_DRIVER_MSG); } -#if 0 /* stdin is already closed in OsInit() */ - fclose(stdin); -#endif + /* Note: stdin is closed in OsInit(). */ xf86Info.consoleFd = fd; xf86Info.screenFd = fd; - switch (xf86Info.consType) - { + switch (xf86Info.consType) { #ifdef PCCONS_SUPPORT case PCCONS: - if (ioctl (xf86Info.consoleFd, CONSOLE_X_MODE_ON, 0) < 0) - { + if (ioctl (xf86Info.consoleFd, CONSOLE_X_MODE_ON, 0) < 0) { FatalError("%s: CONSOLE_X_MODE_ON failed (%s)\n%s", "xf86OpenConsole", strerror(errno), CHECK_DRIVER_MSG); } /* * Hack to prevent keyboard hanging when syslogd closes - * /dev/console + * /dev/console. */ - if ((devConsoleFd = open("/dev/console", O_WRONLY,0)) < 0) - { + if ((devConsoleFd = open("/dev/console", O_WRONLY,0)) < 0) { xf86Msg(X_WARNING, - "xf86OpenConsole: couldn't open /dev/console (%s)\n", + "xf86OpenConsole: Could not open /dev/console (%s).\n", strerror(errno)); } break; #endif #if defined (SYSCONS_SUPPORT) || defined (PCVT_SUPPORT) case SYSCONS: - /* as of FreeBSD 2.2.8, syscons driver does not need the #1 vt - * switching anymore. Here we check for FreeBSD 3.1 and up. - * Add cases for other *BSD that behave the same. - */ - uname (&uts); - if (strcmp(uts.sysname, "FreeBSD") == 0) { - i = atof(uts.release) * 100; - if (i >= 310) goto acquire_vt; - } - /* otherwise fall through */ case PCVT: - /* - * First activate the #1 VT. This is a hack to allow a server - * to be started while another one is active. There should be - * a better way. + /* As of FreeBSD 2.2.8, syscons driver does not need the #1 vt + * switching anymore. Here we check for FreeBSD older than 3.1. + * + * XXX Add cases for other BSD versions that require the VT + * switching hack. */ - if (initialVT != 1) { + if (xf86Info.consType == SYSCONS) { + uname(&uts); + if (strcmp(uts.sysname, "FreeBSD") == 0) { + i = atof(uts.release) * 100; + if (i < 310) + needSwitchToVT1 = TRUE; + } + } else + needSwitchToVT1 = TRUE; - if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, 1) != 0) - { + /* + * If needed, first activate the #1 VT. This is needed to work + * around issues with some console drivers when starting a server + * while another one is active. + */ + if (needSwitchToVT1 && initialVT != 1) { + if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, 1) != 0) { xf86Msg(X_WARNING, "xf86OpenConsole: VT_ACTIVATE failed\n"); } sleep(1); } -acquire_vt: /* - * now get the VT + * Now get the VT. */ SYSCALL(result = ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno)); - if (result != 0) - { + if (result != 0) { xf86Msg(X_WARNING, "xf86OpenConsole: VT_ACTIVATE failed\n"); } SYSCALL(result = ioctl(xf86Info.consoleFd, VT_WAITACTIVE, xf86Info.vtno)); - if (result != 0) - { + if (result != 0) { xf86Msg(X_WARNING, "xf86OpenConsole: VT_WAITACTIVE failed\n"); } @@ -280,19 +284,16 @@ vtmode.relsig = SIGUSR1; vtmode.acqsig = SIGUSR1; vtmode.frsig = SIGUSR1; - if (ioctl(xf86Info.consoleFd, VT_SETMODE, &vtmode) < 0) - { + if (ioctl(xf86Info.consoleFd, VT_SETMODE, &vtmode) < 0) { FatalError("xf86OpenConsole: VT_SETMODE VT_PROCESS failed"); } #if !defined(USE_DEV_IO) && !defined(USE_I386_IOPL) - if (ioctl(xf86Info.consoleFd, KDENABIO, 0) < 0) - { + if (ioctl(xf86Info.consoleFd, KDENABIO, 0) < 0) { FatalError("xf86OpenConsole: KDENABIO failed (%s)", strerror(errno)); } #endif - if (ioctl(xf86Info.consoleFd, KDSETMODE, KD_GRAPHICS) < 0) - { + if (ioctl(xf86Info.consoleFd, KDSETMODE, KD_GRAPHICS) < 0) { FatalError("xf86OpenConsole: KDSETMODE KD_GRAPHICS failed"); } break; @@ -304,15 +305,11 @@ break; #endif } - } - else - { + } else { /* serverGeneration != 1 */ #if defined (SYSCONS_SUPPORT) || defined (PCVT_SUPPORT) - if (xf86Info.consType == SYSCONS || xf86Info.consType == PCVT) - { - if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno) != 0) - { + if (xf86Info.consType == SYSCONS || xf86Info.consType == PCVT) { + if (ioctl(xf86Info.consoleFd, VT_ACTIVATE, xf86Info.vtno) != 0) { xf86Msg(X_WARNING, "xf86OpenConsole: VT_ACTIVATE failed\n"); } } @@ -695,17 +692,18 @@ * Keep server from detaching from controlling tty. This is useful * when debugging (so the server can receive keyboard signals. */ - if (!strcmp(argv[i], "-keeptty")) - { + if (!strcmp(argv[i], "-keeptty")) { KeepTty = TRUE; return(1); } + if (!strcmp(argv[i], "-detachtty")) { + DetachTty = TRUE; + return(1); + } #if defined (SYSCONS_SUPPORT) || defined (PCVT_SUPPORT) - if ((argv[i][0] == 'v') && (argv[i][1] == 't')) - { + if ((argv[i][0] == 'v') && (argv[i][1] == 't')) { if (sscanf(argv[i], "vt%2d", &VTnum) == 0 || - VTnum < 1 || VTnum > 12) - { + VTnum < 1 || VTnum > 12) { UseMsg(); VTnum = -1; return(0); @@ -723,6 +721,8 @@ ErrorF("vtXX use the specified VT number (1-12)\n"); #endif /* SYSCONS_SUPPORT || PCVT_SUPPORT */ ErrorF("-keeptty "); - ErrorF("don't detach controlling tty (for debugging only)\n"); + ErrorF("don't detach controlling tty\n"); + ErrorF("-detachtty "); + ErrorF("detach controlling tty\n"); return; } Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_io.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_io.c:3.23 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_io.c:3.25 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_io.c:3.23 Mon Oct 21 16:38:04 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_io.c Mon Jan 9 10:00:19 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_io.c,v 3.23 2002/10/21 20:38:04 herrb Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_io.c,v 3.25 2006/01/09 15:00:19 dawes Exp $ */ /* * Copyright 1992 by Rich Murphey * Copyright 1993 by David Dawes @@ -23,10 +23,9 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: bsd_io.c /main/11 1996/10/19 18:06:07 kaleb $ */ #define NEED_EVENTS -#include "X.h" +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c:1.9 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c:1.10 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c:1.9 Wed Jan 7 12:05:28 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c Fri Oct 14 11:17:00 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c,v 1.9 2004/01/07 17:05:28 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c,v 1.10 2005/10/14 15:17:00 tsi Exp $ */ /* * Copyright (c) 2002 by The XFree86 Project, Inc. @@ -10,7 +10,7 @@ */ #define NEED_EVENTS -#include "X.h" +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kqueue_apm.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kqueue_apm.c:1.6 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kqueue_apm.c:1.8 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kqueue_apm.c:1.6 Fri Feb 13 18:58:46 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kqueue_apm.c Mon Jan 9 10:00:19 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kqueue_apm.c,v 1.6 2004/02/13 23:58:46 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kqueue_apm.c,v 1.8 2006/01/09 15:00:19 dawes Exp $ */ /* * Copyright (C) 2001 The XFree86 Project, Inc. * All rights reserved. @@ -45,9 +45,8 @@ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -/* $OpenBSD: bsd_kqueue_apm.c,v 1.5 2002/07/30 23:07:42 matthieu Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c:1.37 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c:1.38 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c:1.37 Wed Feb 9 20:37:52 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c Fri Oct 14 11:17:00 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c,v 1.37 2005/02/10 01:37:52 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c,v 1.38 2005/10/14 15:17:00 tsi Exp $ */ /* * Copyright (c) 1999-2005 by The XFree86 Project, Inc. @@ -47,7 +47,7 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c:1.6 xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c:1.8 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c:1.6 Sun Mar 21 06:27:06 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c Mon Jan 9 10:00:19 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c,v 1.6 2004/03/21 11:27:06 herrb Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c,v 1.8 2006/01/09 15:00:19 dawes Exp $ */ /* * Copyright 1992 by Rich Murphey * Copyright 1993 by David Wexelblat @@ -24,9 +24,7 @@ * */ -/* $XConsortium: bsd_video.c /main/10 1996/10/25 11:37:57 kaleb $ */ - -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/memrange.h diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/memrange.h:1.1 xc/programs/Xserver/hw/xfree86/os-support/bsd/memrange.h:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/memrange.h:1.1 Tue Aug 6 09:25:36 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/memrange.h Mon Jan 9 10:00:19 2006 @@ -1,9 +1,8 @@ /* * Memory range attribute operations, peformed on /dev/mem * - * $FreeBSD: src/sys/sys/memrange.h,v 1.4 1999/12/29 04:24:44 peter Exp $ */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/memrange.h,v 1.1 2002/08/06 13:25:36 herrb Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/memrange.h,v 1.2 2006/01/09 15:00:19 dawes Exp $ */ #ifndef _MEMRANGE_H #define _MEMRANGE_H Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c:1.6 xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c:1.8 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c:1.6 Tue Oct 7 19:14:55 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c Mon Jan 9 10:00:19 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c,v 1.6 2003/10/07 23:14:55 herrb Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/ppc_video.c,v 1.8 2006/01/09 15:00:19 dawes Exp $ */ /* * Copyright 1992 by Rich Murphey * Copyright 1993 by David Wexelblat @@ -24,9 +24,7 @@ * */ -/* $XConsortium: bsd_video.c /main/10 1996/10/25 11:37:57 kaleb $ */ - -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/sparc64_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/sparc64_video.c:1.3 xc/programs/Xserver/hw/xfree86/os-support/bsd/sparc64_video.c:1.6 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/sparc64_video.c:1.3 Tue Oct 7 19:14:55 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/sparc64_video.c Tue Apr 18 11:57:25 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/sparc64_video.c,v 1.3 2003/10/07 23:14:55 herrb Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/sparc64_video.c,v 1.6 2006/04/18 15:57:25 tsi Exp $ */ /* * Copyright 1992 by Rich Murphey * Copyright 1993 by David Wexelblat @@ -24,10 +24,7 @@ * */ - -/* $XConsortium: bsd_video.c /main/10 1996/10/25 11:37:57 kaleb $ */ - -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" @@ -71,7 +68,7 @@ PROT_READ : (PROT_READ | PROT_WRITE), MAP_SHARED, fd, Base); if (base == MAP_FAILED) - FatalError("%s: could not mmap screen [s=%x,a=%x] (%s)", + FatalError("%s: could not mmap screen [s=%lx,a=%lx] (%s)", "xf86MapVidMem", Size, Base, strerror(errno)); return base; } Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile:1.24 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile:1.25 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile:1.24 Mon Feb 28 22:48:53 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile Fri Oct 14 11:17:01 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile,v 1.24 2005/03/01 03:48:53 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile,v 1.25 2005/10/14 15:17:01 tsi Exp $ /* * Copyright (c) 1994-2005 by The XFree86 Project, Inc. * All rights reserved. @@ -81,9 +81,8 @@ xf86drmSL.o \ $(MOBJ) -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(XINCLUDESRC) -I$(EXTINCSRC) -I../.. -Ikernel \ - -I$(DRMINCLUDESDIR) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include \ + -Ikernel -I$(DRMINCLUDESDIR) DEFINES = $(MTRR_DEFINES) $(GLX_DEFINES) Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/Makefile diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/Makefile:1.6 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/Makefile:1.7 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/Makefile:1.6 Mon Feb 28 22:48:54 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/Makefile Mon Jan 9 10:00:20 2006 @@ -1,4 +1,4 @@ -# $FreeBSD$ +# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/Makefile,v 1.7 2006/01/09 15:00:20 dawes Exp $ .PATH: ${.CURDIR}/.. KMOD= mga Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/Makefile diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/Makefile:1.5 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/Makefile:1.6 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/Makefile:1.5 Mon Feb 28 22:48:54 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/Makefile Mon Jan 9 10:00:20 2006 @@ -1,4 +1,4 @@ -# $FreeBSD$ +# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/Makefile,v 1.6 2006/01/09 15:00:20 dawes Exp $ .PATH: ${.CURDIR}/.. KMOD = r128 Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/Makefile diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/Makefile:1.4 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/Makefile:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/Makefile:1.4 Mon Feb 28 22:48:54 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/Makefile Mon Jan 9 10:00:20 2006 @@ -1,4 +1,4 @@ -# $FreeBSD$ +# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/Makefile,v 1.5 2006/01/09 15:00:20 dawes Exp $ .PATH: ${.CURDIR}/.. KMOD = radeon Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/sis/Makefile diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/sis/Makefile:1.5 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/sis/Makefile:1.6 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/sis/Makefile:1.5 Mon Feb 28 22:48:54 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/sis/Makefile Mon Jan 9 10:00:20 2006 @@ -1,4 +1,4 @@ -# $FreeBSD$ +# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/sis/Makefile,v 1.6 2006/01/09 15:00:20 dawes Exp $ .PATH: ${.CURDIR}/.. KMOD= sis Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/tdfx/Makefile diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/tdfx/Makefile:1.6 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/tdfx/Makefile:1.7 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/tdfx/Makefile:1.6 Mon Feb 28 22:48:54 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/tdfx/Makefile Mon Jan 9 10:00:20 2006 @@ -1,4 +1,4 @@ -# $FreeBSD$ +# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/tdfx/Makefile,v 1.7 2006/01/09 15:00:20 dawes Exp $ .PATH: ${.CURDIR}/.. KMOD= tdfx Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/data.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/data.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/data.c:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/data.c:1.1 Fri Feb 11 13:06:49 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/data.c Mon Jan 9 10:00:21 2006 @@ -1,5 +1,3 @@ -/* $NetBSD: data.c,v 1.6 1999/09/20 04:48:12 lukem Exp $ */ - /* * Copyright (c) 1999 Lennart Augustsson * All rights reserved. @@ -25,7 +23,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/data.c,v 1.1 2000/02/11 18:06:49 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/data.c,v 1.2 2006/01/09 15:00:21 dawes Exp $ */ #include #include Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/descr.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/descr.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/descr.c:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/descr.c:1.1 Fri Feb 11 13:06:50 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/descr.c Mon Jan 9 10:00:21 2006 @@ -1,5 +1,3 @@ -/* $NetBSD: descr.c,v 1.7 1999/10/13 17:48:04 drochner Exp $ */ - /* * Copyright (c) 1999 Lennart Augustsson * All rights reserved. @@ -25,7 +23,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/descr.c,v 1.1 2000/02/11 18:06:50 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/descr.c,v 1.2 2006/01/09 15:00:21 dawes Exp $ */ #include Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/parse.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/parse.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/parse.c:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/parse.c:1.1 Fri Feb 11 13:06:50 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/parse.c Mon Jan 9 10:00:21 2006 @@ -1,5 +1,3 @@ -/* $NetBSD: parse.c,v 1.7 1999/10/13 17:48:04 drochner Exp $ */ - /* * Copyright (c) 1999 Lennart Augustsson * All rights reserved. @@ -25,7 +23,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/parse.c,v 1.1 2000/02/11 18:06:50 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/parse.c,v 1.2 2006/01/09 15:00:21 dawes Exp $ */ #include #include Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usage.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usage.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usage.c:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usage.c:1.1 Fri Feb 11 13:06:50 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usage.c Mon Jan 9 10:00:21 2006 @@ -1,5 +1,3 @@ -/* $NetBSD: usage.c,v 1.4 1999/07/02 15:46:53 simonb Exp $ */ - /* * Copyright (c) 1999 Lennart Augustsson * All rights reserved. @@ -25,7 +23,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usage.c,v 1.1 2000/02/11 18:06:50 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usage.c,v 1.2 2006/01/09 15:00:21 dawes Exp $ */ #include #include Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.3 diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.3:1.1 xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.3:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.3:1.1 Fri Feb 11 13:06:50 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.3 Mon Jan 9 10:00:21 2006 @@ -1,4 +1,3 @@ -.\" $NetBSD: usb.3,v 1.9 1999/11/08 22:33:40 augustss Exp $ .\" .\" Copyright (c) 1999 Lennart Augustsson .\" All rights reserved. @@ -24,7 +23,7 @@ .\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF .\" SUCH DAMAGE. .\" -.\" $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.3,v 1.1 2000/02/11 18:06:50 dawes Exp $ +.\" $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.3,v 1.2 2006/01/09 15:00:21 dawes Exp $ .\" .Dd May 11, 1999 .Dt USB 3 Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.h diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.h:1.1 xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.h:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.h:1.1 Fri Feb 11 13:06:51 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.h Mon Jan 9 10:00:21 2006 @@ -1,5 +1,3 @@ -/* $NetBSD: usb.h,v 1.5 1999/07/02 15:46:53 simonb Exp $ */ - /* * Copyright (c) 1999 Lennart Augustsson * All rights reserved. @@ -25,7 +23,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.h,v 1.1 2000/02/11 18:06:51 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb.h,v 1.2 2006/01/09 15:00:21 dawes Exp $ */ #define _DIAGASSERT(e) assert(e) Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb_hid_usages diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb_hid_usages:1.1 xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb_hid_usages:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb_hid_usages:1.1 Fri Feb 11 13:06:51 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb_hid_usages Mon Jan 9 10:00:21 2006 @@ -1,4 +1,3 @@ -# $NetBSD: usb_hid_usages,v 1.3 1999/07/02 15:46:53 simonb Exp $ # # USB HID usage table # Syntax: @@ -9,7 +8,7 @@ # If the number is * then the line matches all usages and the name # is a printf formatting string that will be given the usage number. # -# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb_hid_usages,v 1.1 2000/02/11 18:06:51 dawes Exp $ +# $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usb_hid_usages,v 1.2 2006/01/09 15:00:21 dawes Exp $ # 1 Generic Desktop 0x00 Undefined Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usbvar.h diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usbvar.h:1.1 xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usbvar.h:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usbvar.h:1.1 Fri Feb 11 13:06:51 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usbvar.h Mon Jan 9 10:00:21 2006 @@ -1,5 +1,3 @@ -/* $NetBSD: usbvar.h,v 1.2 1999/05/11 21:15:46 augustss Exp $ */ - /* * Copyright (c) 1999 Lennart Augustsson * All rights reserved. @@ -25,7 +23,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usbvar.h,v 1.1 2000/02/11 18:06:51 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/libusb/usbvar.h,v 1.2 2006/01/09 15:00:21 dawes Exp $ */ struct report_desc { unsigned int size; Index: xc/programs/Xserver/hw/xfree86/os-support/bsdi/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/bsdi/Imakefile:3.17 xc/programs/Xserver/hw/xfree86/os-support/bsdi/Imakefile:3.19 --- xc/programs/Xserver/hw/xfree86/os-support/bsdi/Imakefile:3.17 Mon Nov 22 21:25:43 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/bsdi/Imakefile Mon Jan 9 10:00:21 2006 @@ -1,9 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/Imakefile,v 3.17 2004/11/23 02:25:43 dawes Exp $ - - - - -XCOMM $XConsortium: Imakefile /main/4 1996/09/28 17:23:38 rws $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/Imakefile,v 3.19 2006/01/09 15:00:21 dawes Exp $ #include @@ -20,8 +15,7 @@ libc_wrapper.o stdResource.o stdPci.o sigiostubs.o pm_noop.o \ kmod_noop.o agp_noop.o -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include RESDEFINES = -DUSESTDRES Index: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c:3.6 xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c:3.8 --- xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c:3.6 Sat Jul 25 12:56:38 1998 +++ xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c Mon Jan 9 10:00:21 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c,v 3.6 1998/07/25 16:56:38 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c,v 3.8 2006/01/09 15:00:21 dawes Exp $ */ /* * Copyright 1992 by Rich Murphey * Copyright 1993 by David Wexelblat @@ -23,10 +23,9 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: bsdi_init.c /main/5 1996/02/21 17:51:15 kaleb $ */ -#include "X.h" -#include "Xmd.h" +#include +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c:3.14 xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c:3.16 --- xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c:3.14 Mon Feb 17 10:11:56 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c Mon Jan 9 10:00:21 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c,v 3.14 2003/02/17 15:11:56 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_io.c,v 3.16 2006/01/09 15:00:21 dawes Exp $ */ /* * Copyright 1992 by Rich Murphey * Copyright 1993 by David Dawes @@ -23,9 +23,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: bsdi_io.c /main/10 1996/10/19 18:06:13 kaleb $ */ -#include "X.h" +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_mouse.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_mouse.c:1.2 xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_mouse.c:1.3 --- xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_mouse.c:1.2 Fri Feb 13 18:58:47 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_mouse.c Fri Oct 14 11:17:01 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_mouse.c,v 1.2 2004/02/13 23:58:47 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_mouse.c,v 1.3 2005/10/14 15:17:01 tsi Exp $ */ /* * Copyright 1999 by The XFree86 Project, Inc. @@ -47,7 +47,7 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "X.h" +#include #include "xf86.h" #include "xf86Xinput.h" #include "xf86OSmouse.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_video.c:3.11 xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_video.c:3.13 --- xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_video.c:3.11 Sat Jan 24 20:12:24 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_video.c Mon Jan 9 10:00:21 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_video.c,v 3.11 2004/01/25 01:12:24 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_video.c,v 3.13 2006/01/09 15:00:21 dawes Exp $ */ /* * Copyright 1992 by Rich Murphey * Copyright 1993 by David Wexelblat @@ -23,9 +23,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: bsdi_video.c /main/4 1996/02/21 17:51:22 kaleb $ */ -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile:1.33 xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile:1.35 --- xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile:1.33 Tue Sep 28 11:17:14 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile Mon Jan 9 10:00:21 2006 @@ -1,9 +1,4 @@ -XCOMM $XConsortium: Imakefile /main/16 1996/10/27 18:07:43 kaleb $ - - - - -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile,v 1.33 2004/09/28 15:17:14 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile,v 1.35 2006/01/09 15:00:21 dawes Exp $ #include @@ -133,8 +128,7 @@ SRCS = Pci.c $(PCIDRVRSRC) $(SBUSDRVSRC) $(PCIARCHSRC) OBJS = Pci.o $(PCIDRVROBJ) $(SBUSDRVOBJ) $(PCIARCHOBJ) -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include NormalLibraryObjectRule() SubdirLibraryRule($(OBJS)) Index: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c:1.91 xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c:1.94 --- xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c:1.91 Sun Jan 9 03:28:57 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c Fri Oct 14 11:17:01 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c,v 1.91 2005/01/09 08:28:57 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c,v 1.94 2005/10/14 15:17:01 tsi Exp $ */ /* * Pci.c - New server PCI access functions * @@ -217,7 +217,7 @@ #include #include -#include "Xarch.h" +#include #include "compiler.h" #include "xf86.h" #include "xf86Priv.h" @@ -900,90 +900,6 @@ return pciGenFindNext(); } -#if defined (__powerpc__) -static int buserr_detected; - -static -void buserr(int sig) -{ - buserr_detected = 1; -} -#endif - -CARD32 -pciCfgMech1Read(PCITAG tag, int offset) -{ - unsigned long rv = 0xffffffff; -#ifdef DEBUGPCI - ErrorF("pciCfgMech1Read(tag=%08lx,offset=%08x)\n", tag, offset); -#endif - -#if defined(__powerpc__) - signal(SIGBUS, buserr); - buserr_detected = 0; -#endif - - outl(0xCF8, PCI_EN | tag | (offset & 0xfc)); - rv = inl(0xCFC); - -#if defined(__powerpc__) - signal(SIGBUS, SIG_DFL); - if (buserr_detected) - { -#ifdef DEBUGPCI - ErrorF("pciCfgMech1Read() BUS ERROR\n"); -#endif - return(0xffffffff); - } - else -#endif - return(rv); -} - -void -pciCfgMech1Write(PCITAG tag, int offset, CARD32 val) -{ -#ifdef DEBUGPCI - ErrorF("pciCfgMech1Write(tag=%08lx,offset=%08x,val=%08lx)\n", - tag, offset, (unsigned long)val); -#endif - -#if defined(__powerpc__) - signal(SIGBUS, SIG_IGN); -#endif - - outl(0xCF8, PCI_EN | tag | (offset & 0xfc)); -#if defined(Lynx) && defined(__powerpc__) - outb(0x80, 0x00); /* without this the next access fails - * on my Powerstack system when we use - * assembler inlines for outl */ -#endif - outl(0xCFC, val); - -#if defined(__powerpc__) - signal(SIGBUS, SIG_DFL); -#endif -} - -void -pciCfgMech1SetBits(PCITAG tag, int offset, CARD32 mask, CARD32 val) -{ - unsigned long rv = 0xffffffff; - -#if defined(__powerpc__) - signal(SIGBUS, buserr); -#endif - - outl(0xCF8, PCI_EN | tag | (offset & 0xfc)); - rv = inl(0xCFC); - rv = (rv & ~mask) | val; - outl(0xCFC, rv); - -#if defined(__powerpc__) - signal(SIGBUS, SIG_DFL); -#endif -} - CARD32 pciByteSwap(CARD32 u) { @@ -1257,11 +1173,11 @@ if (i == ROM_BASE_PRESET) { /* Does the driver have a preference? */ if (basereg > ROM_BASE_PRESET && basereg <= ROM_BASE_FIND) - b_reg = basereg; + b_reg = (romBaseSource)basereg; else - b_reg = ++i; + b_reg = (romBaseSource)++i; } else - b_reg = i; + b_reg = (romBaseSource)i; if (!(newbase = getValidBIOSBase(Tag, b_reg))) continue; /* no valid address found */ @@ -1419,7 +1335,7 @@ if (data[0x14] >= PCI_BIOS_OTHER) *Buf++ = PCI_BIOS_OTHER; else - *Buf++ = data[0x14]; + *Buf++ = (PciBiosType)data[0x14]; n++; if (data[0x15] & 0x80) /* last image */ Index: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h:1.49 xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h:1.53 --- xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h:1.49 Wed May 26 21:18:08 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h Tue Apr 18 11:57:25 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h,v 1.49 2004/05/27 01:18:08 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h,v 1.53 2006/04/18 15:57:25 tsi Exp $ */ /* * Copyright 1998 by Concurrent Computer Corporation * @@ -70,7 +70,7 @@ * */ /* - * Copyright (c) 1999-2003 by The XFree86 Project, Inc. + * Copyright (c) 1999-2005 by The XFree86 Project, Inc. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining @@ -124,8 +124,8 @@ #ifndef _PCI_H #define _PCI_H 1 -#include "Xarch.h" -#include "Xfuncproto.h" +#include +#include #include "xf86Pci.h" #include "xf86PciInfo.h" @@ -344,10 +344,10 @@ # define INCLUDE_XF86_MAP_PCI_MEM # define INCLUDE_XF86_NO_DOMAIN # endif -# if !defined(__FreeBSD__) +# if !defined(__FreeBSD__) && !defined(__OpenBSD__) # define ARCH_PCI_PCI_BRIDGE sparcPciPciBridge # endif -#elif defined(__AMD64__) || defined(__amd64__) +#elif defined(__amd64__) || defined(__x86_64__) # if defined(__FreeBSD__) # define ARCH_PCI_INIT freebsdPciInit # else @@ -429,10 +429,6 @@ /* Generic PCI service functions and helpers */ PCITAG pciGenFindFirst(void); PCITAG pciGenFindNext(void); -CARD32 pciCfgMech1Read(PCITAG tag, int offset); -void pciCfgMech1Write(PCITAG tag, int offset, CARD32 val); -void pciCfgMech1SetBits(PCITAG tag, int offset, CARD32 mask, - CARD32 val); CARD32 pciByteSwap(CARD32); Bool pciMfDev(int, int); ADDRESS pciAddrNOOP(PCITAG tag, PciAddrType type, ADDRESS); Index: xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c:1.6 xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c:1.7 --- xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c:1.6 Tue Dec 7 16:53:46 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c Tue Jul 19 11:02:52 2005 @@ -20,7 +20,7 @@ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c,v 1.6 2004/12/07 21:53:46 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c,v 1.7 2005/07/19 15:02:52 tsi Exp $ */ #include #include @@ -682,11 +682,55 @@ return i; } +Bool +xf86LocateSbusMemoryArea(sbusDevicePtr psdp, char **devName, + unsigned int *devOffset, unsigned int *fbSize, + unsigned int *fbOffset, unsigned int *flags) +{ + /* + * Note that SBUS video drivers, contrary to other drivers, can be + * OS-specific. That's because the offset(s) needed to mmap(2) SBUS video + * devices can be also. One might think this common layer function could + * translate from a more generic offset scheme to the needed OS-specific + * one, but this would require adapter-specific knowledge in the common + * layer, and, for SBUS devices, there's enough of that already... + * + * Instead, this simply checks that all offsets are 32-bit. + */ + unsigned int offset; + + if (!psdp || !devOffset || devOffset[1]) + return FALSE; + + offset = devOffset[0]; + + if (fbOffset) { + if ((offset ^ (unsigned int)(-1L)) < *fbOffset) + return FALSE; + + offset += *fbOffset; + } + + if (fbSize) { + if ((offset ^ (unsigned int)(-1L)) < *fbSize) + return FALSE; + } + + if (devName) + *devName = psdp->device; + + if (flags) + *flags = 0; + + return TRUE; +} + pointer xf86MapSbusMem(sbusDevicePtr psdp, unsigned long offset, unsigned long size) { pointer ret; unsigned long pagemask, off, len; + unsigned int devOffset[2], fbSize; if (!psdp || !size) return NULL; @@ -699,6 +743,14 @@ return NULL; } + devOffset[0] = offset; + devOffset[1] = 0; + fbSize = size; + if (!xf86LocateSbusMemoryArea(psdp, NULL, devOffset, &fbSize, NULL, NULL) || + (devOffset[1] != 0)) + return NULL; + + offset = devOffset[0]; pagemask = xf86getpagesize() - 1; off = offset & ~pagemask; len = ((offset + size + pagemask) & ~pagemask) - off; Index: xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c:1.16 xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c:1.17 --- xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c:1.16 Thu Dec 30 22:30:41 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c Sun Feb 19 19:14:37 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c,v 1.16 2004/12/31 03:30:41 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/axpPci.c,v 1.17 2006/02/20 00:14:37 dawes Exp $ */ /* * Copyright 1998 by Concurrent Computer Corporation * @@ -45,6 +45,7 @@ #include "compiler.h" #include "xf86.h" #include "xf86Priv.h" +#define NEED_OS_RAC_PROTOS #include "xf86_OSlib.h" #include "Pci.h" Index: xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c:1.6 xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c:1.7 --- xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c:1.6 Thu Oct 2 09:30:07 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c Tue Apr 18 11:57:25 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c,v 1.6 2003/10/02 13:30:07 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c,v 1.7 2006/04/18 15:57:25 tsi Exp $ */ /* * Copyright 1998 by Concurrent Computer Corporation * @@ -84,6 +84,7 @@ /* bridge */ NULL }; +#undef PCI_CPU #if !defined(__OpenBSD__) && !defined(__FreeBSD__) #if X_BYTE_ORDER == X_BIG_ENDIAN #ifdef __sparc__ Index: xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c:1.12 xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c:1.13 --- xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c:1.12 Thu Dec 30 22:30:41 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c Thu Apr 7 10:13:52 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c,v 1.12 2004/12/31 03:30:41 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c,v 1.13 2005/04/07 14:13:52 tsi Exp $ */ /* * Copyright 1998 by Concurrent Computer Corporation * @@ -613,6 +613,9 @@ * master aborts are avoided during PCI scans). */ +/* Workaround for kernel header breakage since 2.5.62 */ +#undef LINUX_MOD_DEVICETABLE_H +#define LINUX_MOD_DEVICETABLE_H 1 #include #ifndef PCIIOC_BASE /* Ioctls for /proc/bus/pci/X/Y nodes. */ Index: xc/programs/Xserver/hw/xfree86/os-support/bus/ppcPci.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/ppcPci.c:1.9 xc/programs/Xserver/hw/xfree86/os-support/bus/ppcPci.c:1.10 --- xc/programs/Xserver/hw/xfree86/os-support/bus/ppcPci.c:1.9 Tue Aug 27 18:07:07 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/bus/ppcPci.c Tue Mar 29 12:54:00 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/ppcPci.c,v 1.9 2002/08/27 22:07:07 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/ppcPci.c,v 1.10 2005/03/29 17:54:00 tsi Exp $ */ /* * ppcPci.c - PowerPC PCI access functions * @@ -102,6 +102,11 @@ static ADDRESS motoppcBusAddrToHostAddr(PCITAG, PciAddrType, ADDRESS); static ADDRESS motoppcHostAddrToBusAddr(PCITAG, PciAddrType, ADDRESS); +static CARD32 pciCfgMech1Read(PCITAG tag, int offset); +static void pciCfgMech1Write(PCITAG tag, int offset, CARD32 val); +static void pciCfgMech1SetBits(PCITAG tag, int offset, + CARD32 mask, CARD32 val); + static pciBusFuncs_t motoppcFuncs0 = { /* pciReadLong */ pciCfgMech1Read, /* pciWriteLong */ pciCfgMech1Write, @@ -210,3 +215,73 @@ /*NOTREACHED*/ } + +static int buserr_detected; + +static +void buserr(int sig) +{ + buserr_detected = 1; +} + +static CARD32 +pciCfgMech1Read(PCITAG tag, int offset) +{ + unsigned long rv = 0xffffffff; +#ifdef DEBUGPCI + ErrorF("pciCfgMech1Read(tag=%08lx,offset=%08x)\n", tag, offset); +#endif + + signal(SIGBUS, buserr); + buserr_detected = 0; + + outl(0xCF8, PCI_EN | tag | (offset & 0xfc)); + rv = inl(0xCFC); + + signal(SIGBUS, SIG_DFL); + if (buserr_detected) + { +#ifdef DEBUGPCI + ErrorF("pciCfgMech1Read() BUS ERROR\n"); +#endif + return(0xffffffff); + } + else + return(rv); +} + +static void +pciCfgMech1Write(PCITAG tag, int offset, CARD32 val) +{ +#ifdef DEBUGPCI + ErrorF("pciCfgMech1Write(tag=%08lx,offset=%08x,val=%08lx)\n", + tag, offset, (unsigned long)val); +#endif + + signal(SIGBUS, SIG_IGN); + + outl(0xCF8, PCI_EN | tag | (offset & 0xfc)); +#if defined(Lynx) + outb(0x80, 0x00); /* without this the next access fails + * on my Powerstack system when we use + * assembler inlines for outl */ +#endif + outl(0xCFC, val); + + signal(SIGBUS, SIG_DFL); +} + +static void +pciCfgMech1SetBits(PCITAG tag, int offset, CARD32 mask, CARD32 val) +{ + unsigned long rv = 0xffffffff; + + signal(SIGBUS, buserr); + + outl(0xCF8, PCI_EN | tag | (offset & 0xfc)); + rv = inl(0xCFC); + rv = (rv & ~mask) | val; + outl(0xCFC, rv); + + signal(SIGBUS, SIG_DFL); +} Index: xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c:1.19 xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c:1.22 --- xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c:1.19 Sat Jan 8 17:09:26 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c Fri Feb 17 22:31:38 2006 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c,v 1.19 2005/01/08 22:09:26 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c,v 1.22 2006/02/18 03:31:38 dawes Exp $ */ /* - * Copyright (C) 2001-2003 The XFree86 Project, Inc. + * Copyright (C) 2001-2005 The XFree86 Project, Inc. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining @@ -48,6 +48,7 @@ #include "xf86.h" #include "xf86Priv.h" +#define NEED_OS_RAC_PROTOS #include "xf86_OSlib.h" #include "Pci.h" #include "xf86sbusBus.h" @@ -120,7 +121,7 @@ static sparcDomainPtr xf86DomainInfo[MAX_DOMAINS]; static int pciNumDomains = 1; -/* Variables that are assigned this must be declared volatile */ +/* Variables to which this is assigned must be declared volatile */ #define PciReg(base, tag, off, type) \ *(volatile type *)(pointer)((char *)(base) + \ (PCI_TAG_NO_DOMAIN(tag) | (off))) @@ -564,7 +565,7 @@ * * The PCI specs require that when a bus transaction remains unclaimed * for too long, the master entity on that bus is to cancel the - * transaction it issued or passed on with a master abort. Two + * transaction it issued, or passed on, with a master abort. Two * outcomes are possible: * * - the master abort can be treated as an error that is propogated @@ -891,12 +892,14 @@ * re-routes much more. */ static PCITAG simbavgaIOTag = 0, simbavgaMemTag = 0; +static PCITAG simbadefaultIOTag = 0, simbadefaultMemTag = 0; static Bool simbavgaRoutingAllow = TRUE; /* * Scan the bus subtree rooted at 'bus' for a non-display device that might be - * decoding the bottom 2 MB of I/O space and/or the bottom 512 MB of memory - * space. Reset simbavgaRoutingAllow if such a device is found. + * decoding any resource in the bottom 2 MB of I/O space and/or the bottom 512 + * MB of memory space. Reset simbavgaRoutingAllow if such a device is found. + * Also, ensure the ranges always remain forwarded by some Simba in the system. * * XXX For now, this is very conservative and should be made less so as the * need arises. @@ -905,6 +908,7 @@ simbaCheckBus(CARD16 pcicommand, int bus) { pciConfigPtr pPCI, *ppPCI = xf86scanpci(0); + CARD16 savecmd = pcicommand; while ((pPCI = *ppPCI++)) { if (pPCI->busnum < bus) @@ -913,15 +917,19 @@ break; /* XXX Assume all devices respect PCI disablement */ - if (!(pcicommand & pPCI->pci_command)) + pcicommand = savecmd & pPCI->pci_command; + if (!pcicommand) continue; - /* XXX This doesn't deal with mis-advertised classes */ + /* XXX This doesn't deal with mis-advertised classes ... */ switch (pPCI->pci_base_class) { case PCI_CLASS_PREHISTORIC: - if (pPCI->pci_sub_class == PCI_SUBCLASS_PREHISTORIC_VGA) - continue; /* Ignore VGA */ - break; + if ((pPCI->pci_sub_class != PCI_SUBCLASS_PREHISTORIC_VGA) || + /* ... except for known cases */ + (pPCI->pci_vendor == PCI_VENDOR_CREATIVE) || + (pPCI->pci_vendor == PCI_VENDOR_ENSONIQ)) + break; + /* Fall through */ case PCI_CLASS_DISPLAY: continue; @@ -932,7 +940,7 @@ case PCI_SUBCLASS_BRIDGE_CARDBUS: /* Scan secondary bus */ /* XXX First check bridge routing? */ - simbaCheckBus(pcicommand & pPCI->pci_command, + simbaCheckBus(pcicommand, PCI_SECONDARY_BUS_EXTRACT(pPCI->pci_pp_bus_register, pPCI->tag)); if (!simbavgaRoutingAllow) @@ -995,11 +1003,27 @@ pPCI->busnum, pPCI->devnum, pPCI->funcnum); value |= PCI_PCI_BRIDGE_VGA_EN; } else { - pciWriteByte(pPCI->tag, APB_IO_ADDRESS_MAP, - iomap & ~0x01); - pciWriteByte(pPCI->tag, APB_MEM_ADDRESS_MAP, - memmap & ~0x01); - simbavgaIOTag = simbavgaMemTag = 0; + if (pPCI->tag != simbadefaultIOTag) { + pciWriteByte(pPCI->tag, APB_IO_ADDRESS_MAP, + iomap & ~0x01); + if ((simbavgaIOTag = simbadefaultIOTag)) { + iomap = pciReadByte(simbavgaIOTag, + APB_IO_ADDRESS_MAP); + pciWriteByte(simbavgaIOTag, APB_IO_ADDRESS_MAP, + iomap | 0x01); + } + } + + if (pPCI->tag != simbadefaultMemTag) { + pciWriteByte(pPCI->tag, APB_MEM_ADDRESS_MAP, + memmap & ~0x01); + if ((simbavgaMemTag = simbadefaultMemTag)) { + memmap = pciReadByte(simbavgaMemTag, + APB_MEM_ADDRESS_MAP); + pciWriteByte(simbavgaMemTag, APB_MEM_ADDRESS_MAP, + memmap | 0x01); + } + } } } } else { @@ -1140,12 +1164,12 @@ if (pciReadByte(pPCI->tag, APB_IO_ADDRESS_MAP) & 0x01) { pcicommand |= PCI_CMD_IO_ENABLE; - simbavgaIOTag = pPCI->tag; + simbavgaIOTag = simbadefaultIOTag = pPCI->tag; } if (pciReadByte(pPCI->tag, APB_MEM_ADDRESS_MAP) & 0x01) { pcicommand |= PCI_CMD_MEM_ENABLE; - simbavgaMemTag = pPCI->tag; + simbavgaMemTag = simbadefaultMemTag = pPCI->tag; } if (!pcicommand) Index: xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h:1.44 xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h:1.46 --- xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h:1.44 Mon Mar 7 11:39:18 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h Fri Oct 14 11:17:02 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h,v 1.44 2005/03/07 16:39:18 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h,v 1.46 2005/10/14 15:17:02 tsi Exp $ */ /* * Copyright 1998 by Concurrent Computer Corporation * @@ -124,8 +124,8 @@ #ifndef _XF86PCI_H #define _XF86PCI_H 1 -#include "Xarch.h" -#include "Xfuncproto.h" +#include +#include #include "misc.h" #define PCI_NOT_FOUND 0xFFFFFFFFU @@ -803,6 +803,7 @@ PCI_BIOS_PC = 0, PCI_BIOS_OPEN_FIRMARE, PCI_BIOS_HP_PA_RISC, + PCI_BIOS_EFI, PCI_BIOS_OTHER } PciBiosType; Index: xc/programs/Xserver/hw/xfree86/os-support/dgux/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/dgux/Imakefile:1.9 xc/programs/Xserver/hw/xfree86/os-support/dgux/Imakefile:1.10 --- xc/programs/Xserver/hw/xfree86/os-support/dgux/Imakefile:1.9 Wed Oct 16 22:22:45 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/dgux/Imakefile Fri Oct 14 11:17:02 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/Imakefile,v 1.9 2002/10/17 02:22:45 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/Imakefile,v 1.10 2005/10/14 15:17:02 tsi Exp $ #include BIOS_MOD = bios_DGmmap @@ -11,8 +11,7 @@ dgux_kbd.o dgux_kbdEv.o dgux_tty.o std_mouse.o std_mseEv.o \ stdResource.o stdPci.o sigiostubs.o pm_noop.o kmod_noop.o agp_noop.o -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include RESDEFINES = -DUSESTDRES Index: xc/programs/Xserver/hw/xfree86/os-support/dgux/bios_DGmmap.c diff -u xc/programs/Xserver/hw/xfree86/os-support/dgux/bios_DGmmap.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/dgux/bios_DGmmap.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/dgux/bios_DGmmap.c:1.4 Sun Nov 19 11:38:06 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/dgux/bios_DGmmap.c Fri Oct 14 11:17:02 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/bios_DGmmap.c,v 1.4 2000/11/19 16:38:06 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/bios_DGmmap.c,v 1.5 2005/10/14 15:17:02 tsi Exp $ */ /* * INTEL DG/UX RELEASE 4.20 MU03 * Copyright 1997 Takis Psarogiannakopoulos Cambridge,UK @@ -19,7 +19,7 @@ * */ -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c:1.2 xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c:1.3 --- xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c:1.2 Mon Nov 17 17:20:40 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c Fri Oct 14 11:17:02 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c,v 1.2 2003/11/17 22:20:40 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c,v 1.3 2005/10/14 15:17:02 tsi Exp $ */ /* * INTEL DG/UX RELEASE 4.20 MU03 * Copyright 1997 Takis Psarogiannakopoulos Cambridge,UK @@ -20,8 +20,8 @@ */ -#include "X.h" -#include "Xmd.h" +#include +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c diff -u xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c:1.4 Mon Feb 17 10:11:56 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c Fri Oct 14 11:17:02 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c,v 1.4 2003/02/17 15:11:56 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_io.c,v 1.5 2005/10/14 15:17:02 tsi Exp $ */ /* * INTEL DG/UX RELEASE 4.20 MU03 * Copyright 1997 Takis Psarogiannakopoulos Cambridge,UK @@ -20,8 +20,8 @@ */ #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "inputstr.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbd.c diff -u xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbd.c:1.2 xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbd.c:1.3 --- xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbd.c:1.2 Mon Nov 17 17:20:40 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbd.c Fri Oct 14 11:17:02 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbd.c,v 1.2 2003/11/17 22:20:40 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbd.c,v 1.3 2005/10/14 15:17:02 tsi Exp $ */ /* * INTEL DG/UX RELEASE 4.20 MU03 * Copyright 1997 Takis Psarogiannakopoulos Cambridge,UK @@ -32,8 +32,8 @@ #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "inputstr.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbdEv.c diff -u xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbdEv.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbdEv.c:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbdEv.c:1.1 Sun Dec 13 02:37:47 1998 +++ xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbdEv.c Fri Oct 14 11:17:02 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbdEv.c,v 1.1 1998/12/13 07:37:47 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_kbdEv.c,v 1.2 2005/10/14 15:17:02 tsi Exp $ */ /* * INTEL DG/UX RELEASE 4.20 MU02 * Copyright 1997 Takis Psarogiannakopoulos Cambridge,UK @@ -21,8 +21,8 @@ #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "inputstr.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_tty.c diff -u xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_tty.c:1.2 xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_tty.c:1.3 --- xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_tty.c:1.2 Tue Jan 26 05:40:38 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_tty.c Fri Oct 14 11:17:02 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_tty.c,v 1.2 1999/01/26 10:40:38 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_tty.c,v 1.3 2005/10/14 15:17:02 tsi Exp $ */ /* * INTEL DG/UX RELEASE 4.20 MU03 * Copyright 1997 Takis Psarogiannakopoulos Cambridge,UK @@ -21,8 +21,8 @@ /* BSD (POSIX) Flavor tty for ix86 DG/ux R4.20MU03 */ #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "inputstr.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_video.c:1.7 xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_video.c:1.8 --- xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_video.c:1.7 Fri Mar 14 08:46:05 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_video.c Fri Oct 14 11:17:02 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_video.c,v 1.7 2003/03/14 13:46:05 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_video.c,v 1.8 2005/10/14 15:17:02 tsi Exp $ */ /* * INTEL DG/UX RELEASE 4.20 MU03 * Copyright 1997 Takis Psarogiannakopoulos Cambridge,UK @@ -20,7 +20,7 @@ * */ -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile:1.17 xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile:1.18 --- xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile:1.17 Mon Nov 22 21:25:43 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile Fri Oct 14 11:17:02 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile,v 1.17 2004/11/23 02:25:43 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/Imakefile,v 1.18 2005/10/14 15:17:02 tsi Exp $ #include @@ -15,8 +15,8 @@ VTsw_noop.o posix_tty.o $(MOUSEOBJ) \ stdResource.o stdPci.o sigiostubs.o pm_noop.o kmod_noop.o agp_noop.o -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(XINCLUDESRC) -I$(EXTINCSRC) -I$(SERVERSRC)/mi +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include \ + -I$(SERVERSRC)/mi RESDEFINES = -DUSESTDRES Index: xc/programs/Xserver/hw/xfree86/os-support/hurd/bios_mmap.c diff -u xc/programs/Xserver/hw/xfree86/os-support/hurd/bios_mmap.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/hurd/bios_mmap.c:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/hurd/bios_mmap.c:1.1 Sun Aug 16 06:25:47 1998 +++ xc/programs/Xserver/hw/xfree86/os-support/hurd/bios_mmap.c Fri Oct 14 11:17:03 2005 @@ -20,11 +20,11 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/bios_mmap.c,v 1.1 1998/08/16 10:25:47 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/bios_mmap.c,v 1.2 2005/10/14 15:17:03 tsi Exp $ */ #include #include -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c:1.2 xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c:1.3 --- xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c:1.2 Sun Mar 7 09:05:09 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c Fri Oct 14 11:17:03 2005 @@ -20,9 +20,9 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c,v 1.2 1999/03/07 14:05:09 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c,v 1.3 2005/10/14 15:17:03 tsi Exp $ */ -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c diff -u xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c:1.9 xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c:1.10 --- xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c:1.9 Mon Feb 17 10:11:57 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c Fri Oct 14 11:17:03 2005 @@ -20,11 +20,11 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c,v 1.9 2003/02/17 15:11:57 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_io.c,v 1.10 2005/10/14 15:17:03 tsi Exp $ */ #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "inputstr.h" #include "scrnintstr.h" #include "mipointer.h" Index: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c diff -u xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c:1.9 xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c:1.10 --- xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c:1.9 Wed Feb 2 22:32:53 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c Fri Oct 14 11:17:03 2005 @@ -20,11 +20,11 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c,v 1.9 2005/02/03 03:32:53 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_mouse.c,v 1.10 2005/10/14 15:17:03 tsi Exp $ */ #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "inputstr.h" #include "scrnintstr.h" #include "mipointer.h" Index: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c:1.4 Tue Nov 14 13:20:37 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c Fri Oct 14 11:17:03 2005 @@ -20,12 +20,12 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c,v 1.4 2000/11/14 18:20:37 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_video.c,v 1.5 2005/10/14 15:17:03 tsi Exp $ */ #include #include -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/irix/Imakefile diff -u /dev/null xc/programs/Xserver/hw/xfree86/os-support/irix/Imakefile:1.2 --- /dev/null Tue May 9 21:57:22 2006 +++ xc/programs/Xserver/hw/xfree86/os-support/irix/Imakefile Fri Oct 14 11:17:03 2005 @@ -0,0 +1,29 @@ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/irix/Imakefile,v 1.2 2005/10/14 15:17:03 tsi Exp $ + +#include + +SRCS = VTsw_noop.c agp_noop.c ioperm_noop.c kmod_noop.c libc_wrapper.c \ + pm_noop.c posix_tty.c sigiostubs.c stdPci.c vidmem.c + +OBJS = VTsw_noop.o agp_noop.o ioperm_noop.o kmod_noop.o libc_wrapper.o \ + pm_noop.o posix_tty.o sigiostubs.o stdPci.o vidmem.o + +INCLUDES = -I$(XF86OSSRC) -I$(XF86COMSRC) -I$(SERVERSRC)/include + +DEFINES = + +SubdirLibraryRule($(OBJS)) +NormalLibraryObjectRule() + +LinkSourceFile(VTsw_noop.c,../shared) +LinkSourceFile(agp_noop.c,../shared) +LinkSourceFile(ioperm_noop.c,../shared) +LinkSourceFile(kmod_noop.c,../shared) +LinkSourceFile(libc_wrapper.c,../shared) +LinkSourceFile(pm_noop.c,../shared) +LinkSourceFile(posix_tty.c,../shared) +LinkSourceFile(sigiostubs.c,../shared) +LinkSourceFile(stdPci.c,../shared) +LinkSourceFile(vidmem.c,../shared) + +DependTarget() Index: xc/programs/Xserver/hw/xfree86/os-support/linux/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/Imakefile:3.53 xc/programs/Xserver/hw/xfree86/os-support/linux/Imakefile:3.55 --- xc/programs/Xserver/hw/xfree86/os-support/linux/Imakefile:3.53 Mon Feb 28 22:48:54 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/Imakefile Fri Oct 14 11:17:03 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/Imakefile,v 3.53 2005/03/01 03:48:54 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/Imakefile,v 3.55 2005/10/14 15:17:03 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -89,17 +89,16 @@ SRCS = lnx_init.c lnx_video.c lnx_io.c libc_wrapper.c bios_mmap.c \ VTsw_usl.c std_kbdEv.c posix_tty.c $(MOUSESRC) \ - vidmem.c lnx_apm.c $(JOYSTICK_SRC) $(DRI_SRC) $(RES_SRCS) \ + vidmem.c lnx_apm.c lnx_acpi.c $(JOYSTICK_SRC) $(DRI_SRC) $(RES_SRCS) \ $(AXP_SRC) lnx_kmod.c lnx_agp.c $(KBDSRC) /*wcHelper.c*/ OBJS = lnx_init.o lnx_video.o lnx_io.o libc_wrapper.o bios_mmap.o \ VTsw_usl.o std_kbdEv.o posix_tty.o $(MOUSEOBJ) \ - vidmem.o lnx_apm.o $(JOYSTICK_OBJ) $(DRI_OBJ) $(RES_OBJS) \ + vidmem.o lnx_apm.o lnx_acpi.o $(JOYSTICK_OBJ) $(DRI_OBJ) $(RES_OBJS) \ $(AXP_OBJ) lnx_kmod.o lnx_agp.o $(KBDOBJ) /*wcHelper.o*/ -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(XINCLUDESRC) -I$(EXTINCSRC) -I$(XF86OSSRC)/shared \ - -I$(DRMINCLUDESDIR) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include \ + -I$(XF86OSSRC)/shared -I$(DRMINCLUDESDIR) RESDEFINES = -DUSESTDRES Index: xc/programs/Xserver/hw/xfree86/os-support/linux/agpgart.h diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/agpgart.h:1.4 xc/programs/Xserver/hw/xfree86/os-support/linux/agpgart.h:removed --- xc/programs/Xserver/hw/xfree86/os-support/linux/agpgart.h:1.4 Sat Aug 26 00:30:56 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/agpgart.h Tue May 9 21:57:23 2006 @@ -1,226 +0,0 @@ -/* - * AGPGART module version 0.99 - * Copyright (C) 1999 Jeff Hartmann - * Copyright (C) 1999 Precision Insight, Inc. - * Copyright (C) 1999 Xi Graphics, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * JEFF HARTMANN, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE - * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/agpgart.h,v 1.4 2000/08/26 04:30:56 dawes Exp $ */ - -#ifndef _AGP_H -#define _AGP_H 1 - -#define AGPIOC_BASE 'A' -#define AGPIOC_INFO _IOR (AGPIOC_BASE, 0, agp_info*) -#define AGPIOC_ACQUIRE _IO (AGPIOC_BASE, 1) -#define AGPIOC_RELEASE _IO (AGPIOC_BASE, 2) -#define AGPIOC_SETUP _IOW (AGPIOC_BASE, 3, agp_setup*) -#define AGPIOC_RESERVE _IOW (AGPIOC_BASE, 4, agp_region*) -#define AGPIOC_PROTECT _IOW (AGPIOC_BASE, 5, agp_region*) -#define AGPIOC_ALLOCATE _IOWR(AGPIOC_BASE, 6, agp_allocate*) -#define AGPIOC_DEALLOCATE _IOW (AGPIOC_BASE, 7, int) -#define AGPIOC_BIND _IOW (AGPIOC_BASE, 8, agp_bind*) -#define AGPIOC_UNBIND _IOW (AGPIOC_BASE, 9, agp_unbind*) - -#define AGP_DEVICE "/dev/agpgart" - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -#ifndef __KERNEL__ -#include -#include -#include - -typedef struct _agp_version { - __u16 major; - __u16 minor; -} agp_version; - -typedef struct _agp_info { - agp_version version; /* version of the driver */ - __u32 bridge_id; /* bridge vendor/device */ - __u32 agp_mode; /* mode info of bridge */ - off_t aper_base; /* base of aperture */ - size_t aper_size; /* size of aperture */ - size_t pg_total; /* max pages (swap + system) */ - size_t pg_system; /* max pages (system) */ - size_t pg_used; /* current pages used */ -} agp_info; - -typedef struct _agp_setup { - __u32 agp_mode; /* mode info of bridge */ -} agp_setup; - -/* - * The "prot" down below needs still a "sleep" flag somehow ... - */ -typedef struct _agp_segment { - off_t pg_start; /* starting page to populate */ - size_t pg_count; /* number of pages */ - int prot; /* prot flags for mmap */ -} agp_segment; - -typedef struct _agp_region { - pid_t pid; /* pid of process */ - size_t seg_count; /* number of segments */ - struct _agp_segment *seg_list; -} agp_region; - -typedef struct _agp_allocate { - int key; /* tag of allocation */ - size_t pg_count; /* number of pages */ - __u32 type; /* 0 == normal, other devspec */ - __u32 physical; /* device specific (some devices - * need a phys address of the - * actual page behind the gatt - * table) */ -} agp_allocate; - -typedef struct _agp_bind { - int key; /* tag of allocation */ - off_t pg_start; /* starting page to populate */ -} agp_bind; - -typedef struct _agp_unbind { - int key; /* tag of allocation */ - __u32 priority; /* priority for paging out */ -} agp_unbind; - -#else /* __KERNEL__ */ - -#define AGPGART_MINOR 175 - -#define AGP_UNLOCK() up(&(agp_fe.agp_mutex)); -#define AGP_LOCK() down(&(agp_fe.agp_mutex)); -#define AGP_LOCK_INIT() sema_init(&(agp_fe.agp_mutex), 1) - -#ifndef _AGP_BACKEND_H -typedef struct _agp_version { - u16 major; - u16 minor; -} agp_version; - -#endif - -typedef struct _agp_info { - agp_version version; /* version of the driver */ - u32 bridge_id; /* bridge vendor/device */ - u32 agp_mode; /* mode info of bridge */ - off_t aper_base; /* base of aperture */ - size_t aper_size; /* size of aperture */ - size_t pg_total; /* max pages (swap + system) */ - size_t pg_system; /* max pages (system) */ - size_t pg_used; /* current pages used */ -} agp_info; - -typedef struct _agp_setup { - u32 agp_mode; /* mode info of bridge */ -} agp_setup; - -/* - * The "prot" down below needs still a "sleep" flag somehow ... - */ -typedef struct _agp_segment { - off_t pg_start; /* starting page to populate */ - size_t pg_count; /* number of pages */ - int prot; /* prot flags for mmap */ -} agp_segment; - -typedef struct _agp_segment_priv { - off_t pg_start; - size_t pg_count; - pgprot_t prot; -} agp_segment_priv; - -typedef struct _agp_region { - pid_t pid; /* pid of process */ - size_t seg_count; /* number of segments */ - struct _agp_segment *seg_list; -} agp_region; - -typedef struct _agp_allocate { - int key; /* tag of allocation */ - size_t pg_count; /* number of pages */ - u32 type; /* 0 == normal, other devspec */ - u32 physical; /* device specific (some devices - * need a phys address of the - * actual page behind the gatt - * table) */ -} agp_allocate; - -typedef struct _agp_bind { - int key; /* tag of allocation */ - off_t pg_start; /* starting page to populate */ -} agp_bind; - -typedef struct _agp_unbind { - int key; /* tag of allocation */ - u32 priority; /* priority for paging out */ -} agp_unbind; - -typedef struct _agp_client { - struct _agp_client *next; - struct _agp_client *prev; - pid_t pid; - int num_segments; - agp_segment_priv **segments; -} agp_client; - -typedef struct _agp_controller { - struct _agp_controller *next; - struct _agp_controller *prev; - pid_t pid; - int num_clients; - agp_memory *pool; - agp_client *clients; -} agp_controller; - -#define AGP_FF_ALLOW_CLIENT 0 -#define AGP_FF_ALLOW_CONTROLLER 1 -#define AGP_FF_IS_CLIENT 2 -#define AGP_FF_IS_CONTROLLER 3 -#define AGP_FF_IS_VALID 4 - -typedef struct _agp_file_private { - struct _agp_file_private *next; - struct _agp_file_private *prev; - pid_t my_pid; - u32 access_flags; -} agp_file_private; - -struct agp_front_data { - struct semaphore agp_mutex; - agp_controller *current_controller; - agp_controller *controllers; - agp_file_private *file_priv_list; - u8 used_by_controller; - u8 backend_acquired; -}; - -#endif /* __KERNEL__ */ - -#endif /* _AGP_H */ Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h:3.3 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h:3.4 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h:3.3 Mon Nov 25 09:05:04 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h Fri Feb 17 13:04:38 2006 @@ -1,16 +1,43 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h,v 3.3 2002/11/25 14:05:04 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx.h,v 3.4 2006/02/17 18:04:38 dawes Exp $ */ #ifndef LNX_H_ + +#ifdef __ia64__ + +#include "compiler.h" +#include + +#elif !defined(__powerpc__) && \ + !defined(__mc68000__) && \ + !defined(__sparc__) && \ + !defined(__mips__) + +/* + * Due to conflicts with "compiler.h", don't rely on to declare + * these. + */ +extern int ioperm(unsigned long __from, unsigned long __num, int __turn_on); +extern int iopl(int __level); + +#endif + # ifdef __alpha__ extern unsigned long _bus_base __P ((void)) __attribute__ ((const)); extern unsigned long _bus_base_sparse __P ((void)) __attribute__ ((const)); -extern int iopl __P ((int __level)); /* new pciconfig_iobase syscall added in 2.2.15 and 2.3.99 */ # include # include extern long (*_iobase)(unsigned, int, int, int); +extern unsigned char _inb (unsigned long port); +extern unsigned short _inw (unsigned long port); +extern unsigned int _inl (unsigned long port); +extern void _outb (unsigned char b,unsigned long port); +extern void _outw (unsigned short w,unsigned long port); +extern void _outl (unsigned int l,unsigned long port); + + /* * _iobase deals with the case the __NR_pciconfig_iobase is either undefined * or unsupported by the kernel, but we need to make sure that the `which' Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c:3.19 xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c:3.20 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c:3.19 Wed Feb 4 11:30:50 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c Fri Oct 14 11:17:03 2005 @@ -1,8 +1,8 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c,v 3.19 2004/02/04 16:30:50 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c,v 3.20 2005/10/14 15:17:03 tsi Exp $ */ /* Resource information code */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86Privstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_KbdMap.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_KbdMap.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_KbdMap.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_KbdMap.c:1.1 Thu Oct 10 21:40:35 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_KbdMap.c Wed Apr 19 09:02:38 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_KbdMap.c,v 1.1 2002/10/11 01:40:35 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_KbdMap.c,v 1.5 2006/04/19 13:02:38 dawes Exp $ */ /* * Slightly modified xf86KbdLnx.c which is @@ -6,8 +6,8 @@ * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany. */ -#include "X.h" -#include "Xmd.h" +#include +#include #include "input.h" #include "scrnintstr.h" @@ -18,10 +18,18 @@ #include "xf86_OSlib.h" #include "xf86Xinput.h" #include "xf86OSKbd.h" +#include +#undef KEY_F13 +#undef KEY_F14 +#undef KEY_F15 +#undef KEY_F16 +#undef KEY_F17 +#undef KEY_XFER +#undef KEY_UNKNOWN #include "atKeynames.h" #include "xf86Keymap.h" -#include "DECkeysym.h" +#include #include "lnx_kbd.h" @@ -105,8 +113,6 @@ pKeySyms->maxKeyCode = MAX_KEYCODE; } -#include - static KeySym linux_to_x[256] = { NoSymbol, NoSymbol, NoSymbol, NoSymbol, NoSymbol, NoSymbol, NoSymbol, NoSymbol, @@ -281,7 +287,7 @@ } else { k = map+GLYPHS_PER_KEY; - maxkey = NUM_AT2LNX; + maxkey = NUM_AT2LNX - 1; } for (i = 0; i < maxkey; ++i) Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_acpi.c diff -u /dev/null xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_acpi.c:1.2 --- /dev/null Tue May 9 21:57:23 2006 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_acpi.c Fri Oct 14 11:17:03 2005 @@ -0,0 +1,170 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_acpi.c,v 1.2 2005/10/14 15:17:03 tsi Exp $ */ + +#include +#include "os.h" +#include "xf86.h" +#include "xf86Priv.h" +#define XF86_OS_PRIVS +#include "xf86_OSproc.h" +#include +#include +#include +#include +#include +#include +#include + +#define ACPI_SOCKET "/var/run/acpid.socket" +#define ACPI_EVENTS "/proc/acpi/event" + +#define ACPI_VIDEO_NOTIFY_SWITCH 0x80 +#define ACPI_VIDEO_NOTIFY_PROBE 0x81 +#define ACPI_VIDEO_NOTIFY_CYCLE 0x82 +#define ACPI_VIDEO_NOTIFY_NEXT_OUTPUT 0x83 +#define ACPI_VIDEO_NOTIFY_PREV_OUTPUT 0x84 + +#define ACPI_VIDEO_NOTIFY_CYCLE_BRIGHTNESS 0x82 +#define ACPI_VIDEO_NOTIFY_INC_BRIGHTNESS 0x83 +#define ACPI_VIDEO_NOTIFY_DEC_BRIGHTNESS 0x84 +#define ACPI_VIDEO_NOTIFY_ZERO_BRIGHTNESS 0x85 +#define ACPI_VIDEO_NOTIFY_DISPLAY_OFF 0x86 + +#define ACPI_VIDEO_HEAD_INVALID (~0u - 1) +#define ACPI_VIDEO_HEAD_END (~0u) + +static void lnxCloseACPI(void); +static pointer ACPIihPtr = NULL; +PMClose lnxACPIOpen(void); + +#define LINE_LENGTH 80 + +static int +lnxACPIGetEventFromOs(int fd, pmEvent *events, int num) +{ + char ev[LINE_LENGTH]; + int n; + + memset(ev, 0, LINE_LENGTH); + + n = read( fd, ev, LINE_LENGTH ); + + /* Check that we have a video event */ + if (strstr(ev, "video") == ev) { + char *video = NULL; + char *GFX = NULL; + char *notify = NULL; + char *data = NULL; /* doesn't appear to be used in the kernel */ + unsigned long int notify_l, data_l; + + video = strtok(ev, "video"); + + GFX = strtok(NULL, " "); +#if 0 + ErrorF("GFX: %s\n",GFX); +#endif + + notify = strtok(NULL, " "); + notify_l = strtoul(notify, NULL, 16); +#if 0 + ErrorF("notify: 0x%lx\n",notify_l); +#endif + + data = strtok(NULL, " "); + data_l = strtoul(data, NULL, 16); +#if 0 + ErrorF("data: 0x%lx\n",data_l); +#endif + + /* We currently don't differentiate between any event */ + switch (notify_l) { + case ACPI_VIDEO_NOTIFY_SWITCH: + break; + case ACPI_VIDEO_NOTIFY_PROBE: + break; + case ACPI_VIDEO_NOTIFY_CYCLE: + break; + case ACPI_VIDEO_NOTIFY_NEXT_OUTPUT: + break; + case ACPI_VIDEO_NOTIFY_PREV_OUTPUT: + break; + default: + break; + } + + /* Deal with all ACPI events as a capability change */ + events[0] = XF86_APM_CAPABILITY_CHANGED; + + return 1; + } + + return 0; +} + +static pmWait +lnxACPIConfirmEventToOs(int fd, pmEvent event) +{ + /* No ability to send back to the kernel in ACPI */ + switch (event) { + default: + return PM_NONE; + } +} + +PMClose +lnxACPIOpen(void) +{ + int fd; + struct sockaddr_un addr; + int r = -1; + +#ifdef DEBUG + ErrorF("ACPI: OSPMOpen called\n"); +#endif + if (ACPIihPtr || !xf86Info.pmFlag) + return NULL; + +#ifdef DEBUG + ErrorF("ACPI: Opening device\n"); +#endif + if ((fd = socket(AF_UNIX, SOCK_STREAM, 0)) > -1) { + memset(&addr, 0, sizeof(addr)); + addr.sun_family = AF_UNIX; + strcpy(addr.sun_path, ACPI_SOCKET); + if ((r = connect(fd, (struct sockaddr*)&addr, sizeof(addr))) == -1) { + shutdown(fd, 2); + fd = -1; + } + } + + /* acpid's socket isn't available, so try going direct */ + if (fd == -1) { + if ((fd = open(ACPI_EVENTS, O_RDONLY)) < 0) { + xf86MsgVerb(X_WARNING,3,"Open ACPI failed (%s) (%s)\n", ACPI_EVENTS, + strerror(errno)); + return NULL; + } + } + + xf86PMGetEventFromOs = lnxACPIGetEventFromOs; + xf86PMConfirmEventToOs = lnxACPIConfirmEventToOs; + ACPIihPtr = xf86AddInputHandler(fd,xf86HandlePMEvents,NULL); + xf86MsgVerb(X_INFO,3,"Open ACPI successful (%s)\n", (r != -1) ? ACPI_SOCKET : ACPI_EVENTS); + + return lnxCloseACPI; +} + +static void +lnxCloseACPI(void) +{ + int fd; + +#ifdef DEBUG + ErrorF("ACPI: Closing device\n"); +#endif + if (ACPIihPtr) { + fd = xf86RemoveInputHandler(ACPIihPtr); + shutdown(fd, 2); + ACPIihPtr = NULL; + } +} + Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c:3.12 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c:3.18 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c:3.12 Tue Sep 23 22:43:35 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c Sun May 7 21:40:24 2006 @@ -7,9 +7,9 @@ * Copyright © 2001 The XFree86 Project, Inc. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c,v 3.12 2003/09/24 02:43:35 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_agp.c,v 3.18 2006/05/08 01:40:24 dawes Exp $ */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" @@ -17,7 +17,13 @@ #if defined(linux) #include -#include +#include + +#if defined(LINUX_VERSION_CODE) && defined(KERNEL_VERSION) +# if LINUX_VERSION_CODE >= KERNEL_VERSION(2,3,31) +# include +# endif +#endif #elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) #include #include @@ -58,6 +64,7 @@ static Bool GARTInit(int screenNum) { +#ifdef AGPIOC_INFO struct _agp_info agpinf; if (initDone) @@ -109,8 +116,10 @@ return FALSE; } #endif - return TRUE; +#else + return FALSE; +#endif } Bool @@ -122,6 +131,7 @@ AgpInfoPtr xf86GetAGPInfo(int screenNum) { +#ifdef AGPIOC_INFO struct _agp_info agpinf; AgpInfoPtr info; @@ -151,6 +161,9 @@ info->usedPages = agpinf.pg_used; return info; +#else + return NULL; +#endif } /* @@ -161,6 +174,7 @@ Bool xf86AcquireGART(int screenNum) { +#ifdef AGPIOC_ACQUIRE if (screenNum != -1 && !GARTInit(screenNum)) return FALSE; @@ -174,11 +188,15 @@ acquiredScreen = screenNum; } return TRUE; +#else + return FALSE; +#endif } Bool xf86ReleaseGART(int screenNum) { +#ifdef AGPIOC_RELEASE if (screenNum != -1 && !GARTInit(screenNum)) return FALSE; @@ -203,6 +221,7 @@ } return TRUE; } +#endif return FALSE; } @@ -210,6 +229,7 @@ xf86AllocateGARTMemory(int screenNum, unsigned long size, int type, unsigned long *physical) { +#ifdef AGPIOC_ALLOCATE struct _agp_allocate alloc; int pages; @@ -242,13 +262,42 @@ *physical = alloc.physical; return alloc.key; +#else + return -1; +#endif } +Bool +xf86DeallocateGARTMemory(int screenNum, int key) +{ +#ifdef AGPIOC_DEALLOCATE + if (!GARTInit(screenNum) || acquiredScreen != screenNum) + return FALSE; + + if (acquiredScreen != screenNum) { + xf86DrvMsg(screenNum, X_ERROR, + "xf86UnbindGARTMemory: AGP not acquired by this screen\n"); + return FALSE; + } + + if (ioctl(gartFd, AGPIOC_DEALLOCATE, key) != 0) { + xf86DrvMsg(screenNum, X_WARNING,"xf86DeAllocateGARTMemory: " + "deallocation gart memory with key %d failed\n\t(%s)\n", + key, strerror(errno)); + return FALSE; + } + + return TRUE; +#else + return FALSE; +#endif +} /* Bind GART memory with "key" at "offset" */ Bool xf86BindGARTMemory(int screenNum, int key, unsigned long offset) { +#ifdef AGPIOC_BIND struct _agp_bind bind; int pageOffset; @@ -285,6 +334,9 @@ } return TRUE; +#else + return FALSE; +#endif } @@ -292,6 +344,7 @@ Bool xf86UnbindGARTMemory(int screenNum, int key) { +#ifdef AGPIOC_UNBIND struct _agp_unbind unbind; if (!GARTInit(screenNum) || acquiredScreen != screenNum) @@ -317,6 +370,9 @@ "xf86UnbindGARTMemory: unbind key %d\n", key); return TRUE; +#else + return FALSE; +#endif } @@ -324,6 +380,7 @@ Bool xf86EnableAGP(int screenNum, CARD32 mode) { +#ifdef AGPIOC_SETUP agp_setup setup; if (!GARTInit(screenNum) || acquiredScreen != screenNum) @@ -338,5 +395,8 @@ } return TRUE; +#else + return FALSE; +#endif } Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_apm.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_apm.c:3.13 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_apm.c:3.15 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_apm.c:3.13 Tue Oct 15 21:24:28 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_apm.c Fri Oct 14 11:17:03 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_apm.c,v 3.13 2002/10/16 01:24:28 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_apm.c,v 3.15 2005/10/14 15:17:03 tsi Exp $ */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" @@ -25,6 +25,8 @@ # define APM_SUSPEND_FAILED 0xf001 #endif +static PMClose lnxAPMOpen(void); +extern PMClose lnxACPIOpen(void); static void lnxCloseAPM(void); static pointer APMihPtr = NULL; @@ -118,6 +120,21 @@ PMClose xf86OSPMOpen(void) { + PMClose ret = NULL; + + /* Favour ACPI over APM */ + + ret = lnxACPIOpen(); + + if (!ret) + ret = lnxAPMOpen(); + + return ret; +} + +static PMClose +lnxAPMOpen(void) +{ int fd, pfd; #ifdef DEBUG Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c:1.5 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c:1.7 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c:1.5 Mon Nov 25 09:05:04 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c Fri Feb 17 13:04:38 2006 @@ -1,11 +1,14 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c,v 1.5 2002/11/25 14:05:04 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.c,v 1.7 2006/02/17 18:04:38 dawes Exp $ */ #include -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" #include "xf86Axp.h" +#include "lnx.h" +#include "lnx_axp.h" +#include axpDevice lnxGetAXP(void); @@ -113,26 +116,11 @@ #include #include -/* glibc versions (single hose only) */ -extern void _outb(char val, unsigned long port); -extern void _outw(short val, unsigned long port); -extern void _outl(int val, unsigned long port); -extern unsigned int _inb(unsigned long port); -extern unsigned int _inw(unsigned long port); -extern unsigned int _inl(unsigned long port); - -extern void _dense_outb(char, unsigned long); -extern void _dense_outw(short, unsigned long); -extern void _dense_outl(int, unsigned long); -extern unsigned int _dense_inb(unsigned long); -extern unsigned int _dense_inw(unsigned long); -extern unsigned int _dense_inl(unsigned long); - -void (*_alpha_outb)(char, unsigned long) = _outb; -void (*_alpha_outw)(short, unsigned long) = _outw; -void (*_alpha_outl)(int, unsigned long) = _outl; -unsigned int (*_alpha_inb)(unsigned long) = _inb; -unsigned int (*_alpha_inw)(unsigned long) = _inw; +void (*_alpha_outb)(unsigned char, unsigned long) = _outb; +void (*_alpha_outw)(unsigned short, unsigned long) = _outw; +void (*_alpha_outl)(unsigned int, unsigned long) = _outl; +unsigned char (*_alpha_inb)(unsigned long) = _inb; +unsigned short (*_alpha_inw)(unsigned long) = _inw; unsigned int (*_alpha_inl)(unsigned long) = _inl; static long _alpha_iobase_query(unsigned, int, int, int); Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.h diff -u /dev/null xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.h:1.2 --- /dev/null Tue May 9 21:57:23 2006 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.h Sun Feb 19 19:14:37 2006 @@ -0,0 +1,29 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_axp.h,v 1.2 2006/02/20 00:14:37 dawes Exp $ */ + +#ifndef _LNX_AXP_H_ +#define _LNX_AXP_H_ + +extern void _dense_outb(unsigned char, unsigned long); +extern void _dense_outw(unsigned short, unsigned long); +extern void _dense_outl(unsigned int, unsigned long); +extern unsigned char _dense_inb(unsigned long); +extern unsigned short _dense_inw(unsigned long); +extern unsigned int _dense_inl(unsigned long); + +extern int readDense8(volatile void *Base, register unsigned long Offset); +extern int readDense16(volatile void *Base, register unsigned long Offset); +extern int readDense32(volatile void *Base, register unsigned long Offset); +extern void writeDenseNB8(int Value, volatile void *Base, + register unsigned long Offset); +extern void writeDenseNB16(int Value, volatile void *Base, + register unsigned long Offset); +extern void writeDenseNB32(int Value, volatile void *Base, + register unsigned long Offset); +extern void writeDense8(int Value, volatile void *Base, + register unsigned long Offset); +extern void writeDense16(int Value, volatile void *Base, + register unsigned long Offset); +extern void writeDense32(int Value, volatile void *Base, + register unsigned long Offset); + +#endif /* _LNX_AXP_H_ */ Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c:3.7 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c:3.10 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c:3.7 Mon Nov 25 09:05:04 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c Sun Feb 19 19:14:37 2006 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c,v 3.7 2002/11/25 14:05:04 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_ev56.c,v 3.10 2006/02/20 00:14:37 dawes Exp $ */ -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" #include "compiler.h" @@ -9,78 +9,65 @@ #include "xf86Priv.h" #include "xf86_OSlib.h" #include "xf86OSpriv.h" - -int readDense8(pointer Base, register unsigned long Offset); -int readDense16(pointer Base, register unsigned long Offset); -int readDense32(pointer Base, register unsigned long Offset); -void -writeDenseNB8(int Value, pointer Base, register unsigned long Offset); -void -writeDenseNB16(int Value, pointer Base, register unsigned long Offset); -void -writeDenseNB32(int Value, pointer Base, register unsigned long Offset); -void -writeDense8(int Value, pointer Base, register unsigned long Offset); -void -writeDense16(int Value, pointer Base, register unsigned long Offset); -void -writeDense32(int Value, pointer Base, register unsigned long Offset); +#include +#include "lnx.h" +#include "lnx_axp.h" int -readDense8(pointer Base, register unsigned long Offset) +readDense8(volatile void *Base, register unsigned long Offset) { mem_barrier(); return *(volatile CARD8*) ((unsigned long)Base+(Offset)); } int -readDense16(pointer Base, register unsigned long Offset) +readDense16(volatile void *Base, register unsigned long Offset) { mem_barrier(); return *(volatile CARD16*) ((unsigned long)Base+(Offset)); } int -readDense32(pointer Base, register unsigned long Offset) +readDense32(volatile void *Base, register unsigned long Offset) { mem_barrier(); return *(volatile CARD32*)((unsigned long)Base+(Offset)); } void -writeDenseNB8(int Value, pointer Base, register unsigned long Offset) +writeDenseNB8(int Value, volatile void *Base, register unsigned long Offset) { *(volatile CARD8*)((unsigned long)Base+(Offset)) = Value; } void -writeDenseNB16(int Value, pointer Base, register unsigned long Offset) +writeDenseNB16(int Value, volatile void *Base, register unsigned long Offset) { *(volatile CARD16*)((unsigned long)Base + (Offset)) = Value; } void -writeDenseNB32(int Value, pointer Base, register unsigned long Offset) +writeDenseNB32(int Value, volatile void *Base, register unsigned long Offset) { *(volatile CARD32*)((unsigned long)Base+(Offset)) = Value; } void -writeDense8(int Value, pointer Base, register unsigned long Offset) +writeDense8(int Value, volatile void *Base, register unsigned long Offset) { write_mem_barrier(); *(volatile CARD8 *)((unsigned long)Base+(Offset)) = Value; } void -writeDense16(int Value, pointer Base, register unsigned long Offset) +writeDense16(int Value, volatile void *Base, register unsigned long Offset) { write_mem_barrier(); *(volatile CARD16 *)((unsigned long)Base+(Offset)) = Value; } void -writeDense32(int Value, pointer Base, register unsigned long Offset) +writeDense32(int Value, volatile void *Base, register unsigned long Offset) { write_mem_barrier(); *(volatile CARD32 *)((unsigned long)Base+(Offset)) = Value; @@ -90,33 +77,39 @@ #ifndef INCLUDE_XF86_NO_DOMAIN void -_dense_outb(char val, unsigned long port) +_dense_outb(unsigned char val, unsigned long port) { - if ((port & ~0xffff) == 0) return _outb(val, port); - - write_mem_barrier(); - *(volatile CARD8 *)port = val; + if ((port & ~0xffff) == 0) { + _outb(val, port); + } else { + write_mem_barrier(); + *(volatile CARD8 *)port = val; + } } void -_dense_outw(short val, unsigned long port) +_dense_outw(unsigned short val, unsigned long port) { - if ((port & ~0xffff) == 0) return _outw(val, port); - - write_mem_barrier(); - *(volatile CARD16 *)port = val; + if ((port & ~0xffff) == 0) { + _outw(val, port); + } else { + write_mem_barrier(); + *(volatile CARD16 *)port = val; + } } void -_dense_outl(int val, unsigned long port) +_dense_outl(unsigned int val, unsigned long port) { - if ((port & ~0xffff) == 0) return _outl(val, port); - - write_mem_barrier(); - *(volatile CARD32 *)port = val; + if ((port & ~0xffff) == 0) { + _outl(val, port); + } else { + write_mem_barrier(); + *(volatile CARD32 *)port = val; + } } -unsigned int +unsigned char _dense_inb(unsigned long port) { if ((port & ~0xffff) == 0) return _inb(port); @@ -125,7 +118,7 @@ return *(volatile CARD8 *)port; } -unsigned int +unsigned short _dense_inw(unsigned long port) { if ((port & ~0xffff) == 0) return _inw(port); Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c:3.15 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c:3.17 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c:3.15 Tue Dec 2 15:45:13 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c Mon Jan 9 10:00:22 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c,v 3.15 2003/12/02 20:45:13 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c,v 3.17 2006/01/09 15:00:22 dawes Exp $ */ /* * Copyright 1992 by Orest Zborowski * Copyright 1993 by David Wexelblat @@ -23,10 +23,9 @@ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: lnx_init.c /main/7 1996/10/23 18:46:30 kaleb $ */ -#include "X.h" -#include "Xmd.h" +#include +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_io.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_io.c:3.29 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_io.c:3.30 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_io.c:3.29 Tue Nov 9 23:28:38 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_io.c Fri Oct 14 11:17:03 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_io.c,v 3.29 2004/11/10 04:28:38 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_io.c,v 3.30 2005/10/14 15:17:03 tsi Exp $ */ /* * Copyright 1992 by Orest Zborowski * Copyright 1993 by David Dawes @@ -71,7 +71,7 @@ */ #define NEED_EVENTS -#include "X.h" +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_jstk.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_jstk.c:3.13 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_jstk.c:3.14 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_jstk.c:3.13 Sat Jul 25 12:56:43 1998 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_jstk.c Mon Jan 9 10:00:22 2006 @@ -1,5 +1,5 @@ -/* $XConsortium: lnx_jstk.c /main/7 1996/02/21 17:51:36 kaleb $ */ -/* Id: lnx_jstk.c,v 1.1 1995/12/20 14:06:09 lepied Exp */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_jstk.c,v 3.14 2006/01/09 15:00:22 dawes Exp $ */ + /* * Copyright 1995 by Frederic Lepied, France. * @@ -23,10 +23,6 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_jstk.c,v 3.13 1998/07/25 16:56:43 dawes Exp $ */ - -static const char rcs_id[] = "Id: lnx_jstk.c,v 1.1 1995/12/20 14:06:09 lepied Exp"; - #include #include #include Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c:1.9 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c:1.10 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c:1.9 Tue Nov 9 23:28:38 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c Fri Oct 14 11:17:03 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c,v 1.9 2004/11/10 04:28:38 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_kbd.c,v 1.10 2005/10/14 15:17:03 tsi Exp $ */ /* * Copyright (c) 2002 by The XFree86 Project, Inc. @@ -56,7 +56,7 @@ */ #define NEED_EVENTS -#include "X.h" +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_mouse.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_mouse.c:1.6 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_mouse.c:1.8 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_mouse.c:1.6 Thu Feb 3 21:55:49 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_mouse.c Fri Oct 14 11:17:03 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_mouse.c,v 1.6 2005/02/04 02:55:49 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_mouse.c,v 1.8 2005/10/14 15:17:03 tsi Exp $ */ /* * Copyright 1999-2005 by The XFree86 Project, Inc. @@ -47,7 +47,7 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "X.h" +#include #include "xf86.h" #include "xf86Xinput.h" #include "xf86OSmouse.h" @@ -72,20 +72,20 @@ #define DEFAULT_PS2_DEV "/dev/psaux" #define DEFAULT_GPM_DATA_DEV "/dev/gpmdata" #define DEFAULT_GPM_CTL_DEV "/dev/gpmctl" -#define DEFAULT_INPUT_MICE_DEV "/dev/input/mice" #ifdef __sparc__ #define DEFAULT_SUNMOUSE_DEV "/dev/sunmouse" #endif +#define DEFAULT_INPUT_MICE_DEV "/dev/input/mice" #define DEFAULT_INPUT_MOUSE_PREFIX "/dev/input/mouse" static const char *mouseDevs[] = { DEFAULT_MOUSE_DEV, DEFAULT_PS2_DEV, DEFAULT_GPM_DATA_DEV, - DEFAULT_INPUT_MICE_DEV, #ifdef __sparc__ DEFAULT_SUNMOUSE_DEV, #endif + DEFAULT_INPUT_MICE_DEV, NULL }; Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c:3.10 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c:3.11 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c:3.10 Thu Dec 30 22:30:42 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c Fri Oct 14 11:17:03 2005 @@ -1,7 +1,7 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c,v 3.10 2004/12/31 03:30:42 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c,v 3.11 2005/10/14 15:17:03 tsi Exp $ */ #include -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c:3.68 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c:3.73 --- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c:3.68 Tue Sep 23 22:43:35 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c Sun Feb 19 19:14:37 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c,v 3.68 2003/09/24 02:43:35 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c,v 3.73 2006/02/20 00:14:37 dawes Exp $ */ /* * Copyright 1992 by Orest Zborowski * Copyright 1993 by David Wexelblat @@ -23,9 +23,8 @@ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: lnx_video.c /main/9 1996/10/19 18:06:34 kaleb $ */ -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" @@ -36,6 +35,7 @@ #include "lnx.h" #ifdef __alpha__ #include "xf86Axp.h" +#include "lnx_axp.h" #endif #ifdef HAS_MTRR_SUPPORT @@ -48,25 +48,6 @@ static Bool ExtendedEnabled = FALSE; -#ifdef __ia64__ - -#include "compiler.h" -#include - -#elif !defined(__powerpc__) && \ - !defined(__mc68000__) && \ - !defined(__sparc__) && \ - !defined(__mips__) - -/* - * Due to conflicts with "compiler.h", don't rely on to declare - * these. - */ -extern int ioperm(unsigned long __from, unsigned long __num, int __turn_on); -extern int iopl(int __level); - -#endif - #ifdef __alpha__ # ifdef LIBC_IS_FIXED @@ -220,7 +201,8 @@ xf86DrvMsg(screenNum, from, "Removed MMIO write-combining range " "(0x%lx,0x%lx)\n", - gent.base, gent.size); + (unsigned long)gent.base, + (unsigned long)gent.size); wcr->next = wcreturn; wcreturn = wcr; } else { @@ -228,7 +210,7 @@ xf86DrvMsgVerb(screenNum, X_WARNING, 0, "Failed to remove MMIO " "write-combining range (0x%lx,0x%lx)\n", - gent.base, gent.size); + gent.base, (unsigned long)gent.size); } } return wcreturn; @@ -538,7 +520,7 @@ if (!ExtendedEnabled) return; #if defined(__powerpc__) - munmap(ioBase, 0x20000); + munmap((void *)ioBase, 0x20000); ioBase = NULL; #elif !defined(__mc68000__) && !defined(__sparc__) && !defined(__mips__) && !defined(__sh__) && !defined(__hppa__) iopl(0); @@ -622,38 +604,17 @@ #if defined (__alpha__) #define vuip volatile unsigned int * +#define vvp volatile void * -extern int readDense8(pointer Base, register unsigned long Offset); -extern int readDense16(pointer Base, register unsigned long Offset); -extern int readDense32(pointer Base, register unsigned long Offset); -extern void -writeDenseNB8(int Value, pointer Base, register unsigned long Offset); -extern void -writeDenseNB16(int Value, pointer Base, register unsigned long Offset); -extern void -writeDenseNB32(int Value, pointer Base, register unsigned long Offset); -extern void -writeDense8(int Value, pointer Base, register unsigned long Offset); -extern void -writeDense16(int Value, pointer Base, register unsigned long Offset); -extern void -writeDense32(int Value, pointer Base, register unsigned long Offset); - -static int readSparse8(pointer Base, register unsigned long Offset); -static int readSparse16(pointer Base, register unsigned long Offset); -static int readSparse32(pointer Base, register unsigned long Offset); -static void -writeSparseNB8(int Value, pointer Base, register unsigned long Offset); -static void -writeSparseNB16(int Value, pointer Base, register unsigned long Offset); -static void -writeSparseNB32(int Value, pointer Base, register unsigned long Offset); -static void -writeSparse8(int Value, pointer Base, register unsigned long Offset); -static void -writeSparse16(int Value, pointer Base, register unsigned long Offset); -static void -writeSparse32(int Value, pointer Base, register unsigned long Offset); +static int readSparse8(vvp Base, register unsigned long Offset); +static int readSparse16(vvp Base, register unsigned long Offset); +static int readSparse32(vvp Base, register unsigned long Offset); +static void writeSparseNB8(int Value, vvp Base, register unsigned long Offset); +static void writeSparseNB16(int Value, vvp Base, register unsigned long Offset); +static void writeSparseNB32(int Value, vvp Base, register unsigned long Offset); +static void writeSparse8(int Value, vvp Base, register unsigned long Offset); +static void writeSparse16(int Value, vvp Base, register unsigned long Offset); +static void writeSparse32(int Value, vvp Base, register unsigned long Offset); #define DENSE_BASE 0x2ff00000000UL #define SPARSE_BASE 0x30000000000UL @@ -759,7 +720,7 @@ { unsigned long Offset = (unsigned long)Base - DENSE_BASE; #if 1 - xf86Msg(X_INFO,"unmapVidMemSparse: unmapping Base 0x%lx Size 0x%lx\n", + xf86Msg(X_INFO,"unmapVidMemSparse: unmapping Base %p Size 0x%lx\n", Base, Size); #endif /* Unmap DENSE always. */ @@ -770,7 +731,7 @@ } static int -readSparse8(pointer Base, register unsigned long Offset) +readSparse8(vvp Base, register unsigned long Offset) { register unsigned long result, shift; register unsigned long msb; @@ -794,7 +755,7 @@ } static int -readSparse16(pointer Base, register unsigned long Offset) +readSparse16(vvp Base, register unsigned long Offset) { register unsigned long result, shift; register unsigned long msb; @@ -818,7 +779,7 @@ } static int -readSparse32(pointer Base, register unsigned long Offset) +readSparse32(vvp Base, register unsigned long Offset) { /* NOTE: this is really using DENSE. */ mem_barrier(); @@ -826,7 +787,7 @@ } static void -writeSparse8(int Value, pointer Base, register unsigned long Offset) +writeSparse8(int Value, vvp Base, register unsigned long Offset) { register unsigned long msb; register unsigned int b = Value & 0xffU; @@ -847,7 +808,7 @@ } static void -writeSparse16(int Value, pointer Base, register unsigned long Offset) +writeSparse16(int Value, vvp Base, register unsigned long Offset) { register unsigned long msb; register unsigned int w = Value & 0xffffU; @@ -868,7 +829,7 @@ } static void -writeSparse32(int Value, pointer Base, register unsigned long Offset) +writeSparse32(int Value, vvp Base, register unsigned long Offset) { /* NOTE: this is really using DENSE. */ write_mem_barrier(); @@ -877,7 +838,7 @@ } static void -writeSparseNB8(int Value, pointer Base, register unsigned long Offset) +writeSparseNB8(int Value, vvp Base, register unsigned long Offset) { register unsigned long msb; register unsigned int b = Value & 0xffU; @@ -895,7 +856,7 @@ } static void -writeSparseNB16(int Value, pointer Base, register unsigned long Offset) +writeSparseNB16(int Value, vvp Base, register unsigned long Offset) { register unsigned long msb; register unsigned int w = Value & 0xffffU; @@ -913,52 +874,49 @@ } static void -writeSparseNB32(int Value, pointer Base, register unsigned long Offset) +writeSparseNB32(int Value, vvp Base, register unsigned long Offset) { /* NOTE: this is really using DENSE. */ *(vuip)((unsigned long)Base + (Offset)) = Value; return; } -void (*xf86WriteMmio8)(int Value, pointer Base, unsigned long Offset) +void (*xf86WriteMmio8)(int Value, vvp Base, unsigned long Offset) = writeDense8; -void (*xf86WriteMmio16)(int Value, pointer Base, unsigned long Offset) +void (*xf86WriteMmio16)(int Value, vvp Base, unsigned long Offset) = writeDense16; -void (*xf86WriteMmio32)(int Value, pointer Base, unsigned long Offset) +void (*xf86WriteMmio32)(int Value, vvp Base, unsigned long Offset) = writeDense32; -void (*xf86WriteMmioNB8)(int Value, pointer Base, unsigned long Offset) +void (*xf86WriteMmioNB8)(int Value, vvp Base, unsigned long Offset) = writeDenseNB8; -void (*xf86WriteMmioNB16)(int Value, pointer Base, unsigned long Offset) +void (*xf86WriteMmioNB16)(int Value, vvp Base, unsigned long Offset) = writeDenseNB16; -void (*xf86WriteMmioNB32)(int Value, pointer Base, unsigned long Offset) +void (*xf86WriteMmioNB32)(int Value, vvp Base, unsigned long Offset) = writeDenseNB32; -int (*xf86ReadMmio8)(pointer Base, unsigned long Offset) +int (*xf86ReadMmio8)(vvp Base, unsigned long Offset) = readDense8; -int (*xf86ReadMmio16)(pointer Base, unsigned long Offset) +int (*xf86ReadMmio16)(vvp Base, unsigned long Offset) = readDense16; -int (*xf86ReadMmio32)(pointer Base, unsigned long Offset) +int (*xf86ReadMmio32)(vvp Base, unsigned long Offset) = readDense32; #ifdef JENSEN_SUPPORT -static int -readSparseJensen8(pointer Base, register unsigned long Offset); -static int -readSparseJensen16(pointer Base, register unsigned long Offset); -static int -readSparseJensen32(pointer Base, register unsigned long Offset); -static void -writeSparseJensen8(int Value, pointer Base, register unsigned long Offset); -static void -writeSparseJensen16(int Value, pointer Base, register unsigned long Offset); -static void -writeSparseJensen32(int Value, pointer Base, register unsigned long Offset); -static void -writeSparseJensenNB8(int Value, pointer Base, register unsigned long Offset); -static void -writeSparseJensenNB16(int Value, pointer Base, register unsigned long Offset); -static void -writeSparseJensenNB32(int Value, pointer Base, register unsigned long Offset); +static int readSparseJensen8(vvp Base, register unsigned long Offset); +static int readSparseJensen16(vvp Base, register unsigned long Offset); +static int readSparseJensen32(vvp Base, register unsigned long Offset); +static void writeSparseJensen8(int Value, vvp Base, + register unsigned long Offset); +static void writeSparseJensen16(int Value, vvp Base, + register unsigned long Offset); +static void writeSparseJensen32(int Value, vvp Base, + register unsigned long Offset); +static void writeSparseJensenNB8(int Value, vvp Base, + register unsigned long Offset); +static void writeSparseJensenNB16(int Value, vvp Base, + register unsigned long Offset); +static void writeSparseJensenNB32(int Value, vvp Base, + register unsigned long Offset); /* * The Jensen lacks dense memory, thus we have to address the bus via @@ -1009,7 +967,7 @@ close(fd); if (base == MAP_FAILED) { FatalError("xf86MapVidMem: Could not mmap framebuffer" - " (0x%08x,0x%x) (%s)\n", Base, Size, + " (0x%08lx,0x%lx) (%s)\n", Base, Size, strerror(errno)); } return base; @@ -1022,7 +980,7 @@ } static int -readSparseJensen8(pointer Base, register unsigned long Offset) +readSparseJensen8(vvp Base, register unsigned long Offset) { register unsigned long result, shift; @@ -1036,7 +994,7 @@ } static int -readSparseJensen16(pointer Base, register unsigned long Offset) +readSparseJensen16(vvp Base, register unsigned long Offset) { register unsigned long result, shift; @@ -1050,7 +1008,7 @@ } static int -readSparseJensen32(pointer Base, register unsigned long Offset) +readSparseJensen32(vvp Base, register unsigned long Offset) { register unsigned long result; @@ -1061,7 +1019,7 @@ } static void -writeSparseJensen8(int Value, pointer Base, register unsigned long Offset) +writeSparseJensen8(int Value, vvp Base, register unsigned long Offset) { register unsigned int b = Value & 0xffU; @@ -1070,7 +1028,7 @@ } static void -writeSparseJensen16(int Value, pointer Base, register unsigned long Offset) +writeSparseJensen16(int Value, vvp Base, register unsigned long Offset) { register unsigned int w = Value & 0xffffU; @@ -1080,14 +1038,14 @@ } static void -writeSparseJensen32(int Value, pointer Base, register unsigned long Offset) +writeSparseJensen32(int Value, vvp Base, register unsigned long Offset) { write_mem_barrier(); *(vuip)((unsigned long)Base+(Offset< * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/drmmodule.c,v 1.3 2000/06/17 00:03:34 martin Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/drmmodule.c,v 1.4 2006/03/16 16:50:35 dawes Exp $ * */ @@ -50,7 +50,7 @@ XF86ModuleData drmModuleData = { &VersRec, drmSetup, NULL }; static pointer -drmSetup(pointer module, pointer opts, int *errmaj, int *errmin) +drmSetup(ModuleDescPtr module, pointer opts, int *errmaj, int *errmin) { return (void *)1; } Index: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/ati_pcigart.h diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/ati_pcigart.h:1.10 xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/ati_pcigart.h:1.11 --- xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/ati_pcigart.h:1.10 Mon Feb 28 22:48:55 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/ati_pcigart.h Tue Jun 28 21:14:12 2005 @@ -1,3 +1,4 @@ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/ati_pcigart.h,v 1.11 2005/06/29 01:14:12 dawes Exp $ */ /** * \file ati_pcigart.h * ATI PCI GART support @@ -158,7 +159,7 @@ ret = 1; -#if defined(__i386__) || defined(__AMD64__) +#if defined(__i386__) || defined(__amd64__) || defined(__x86_64__) asm volatile ( "wbinvd" ::: "memory" ); #else mb(); Index: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_vm.h diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_vm.h:1.19 xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_vm.h:1.20 --- xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_vm.h:1.19 Sat Mar 5 22:55:47 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_vm.h Tue Jun 28 21:14:12 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_vm.h,v 1.19 2005/03/06 03:55:47 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm_vm.h,v 1.20 2005/06/29 01:14:12 dawes Exp $ */ /** * \file drm_vm.h * Memory mapping for DRM @@ -568,7 +568,7 @@ if (!capable(CAP_SYS_ADMIN) && (map->flags & _DRM_READ_ONLY)) { vma->vm_flags &= ~(VM_WRITE | VM_MAYWRITE); -#if defined(__i386__) || defined(__AMD64__) +#if defined(__i386__) || defined(__amd64__) || defined(__x86_64__) pgprot_val(vma->vm_page_prot) &= ~_PAGE_RW; #else /* Ye gads this is ugly. With more thought @@ -599,7 +599,7 @@ case _DRM_FRAME_BUFFER: case _DRM_REGISTERS: if (VM_OFFSET(vma) >= __pa(high_memory)) { -#if defined(__i386__) || defined(__AMD64__) +#if defined(__i386__) || defined(__amd64__) || defined(__x86_64__) if (boot_cpu_data.x86 > 3 && map->type != _DRM_AGP) { pgprot_val(vma->vm_page_prot) |= _PAGE_PCD; pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT; Index: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/int10/Imakefile:1.19 xc/programs/Xserver/hw/xfree86/os-support/linux/int10/Imakefile:1.21 --- xc/programs/Xserver/hw/xfree86/os-support/linux/int10/Imakefile:1.19 Tue Nov 9 23:28:38 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/int10/Imakefile Sun Oct 16 14:31:10 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/Imakefile,v 1.19 2004/11/10 04:28:38 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/Imakefile,v 1.21 2005/10/16 18:31:10 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -85,11 +85,10 @@ LinkSourceFile(xf86int10module.c,$(XF86SRC)/int10) -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/int10 \ - -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(X86EMUINCLUDES) +INCLUDES = -I$(XF86COMSRC) -I$(XF86SRC)/int10 -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -DEFINES = $(X86EMUDEFINES) $(EXTRADEFINES) +DEFINES = $(EXTRADEFINES) #if defined(i386Architecture) || defined (AMD64Architecture) EXTRADEFINES=-D_PC Index: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/linux.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/int10/linux.c:1.33 xc/programs/Xserver/hw/xfree86/os-support/linux/int10/linux.c:1.35 --- xc/programs/Xserver/hw/xfree86/os-support/linux/int10/linux.c:1.33 Wed Feb 25 07:53:15 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/int10/linux.c Mon Feb 20 11:06:35 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/linux.c,v 1.33 2004/02/25 12:53:15 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/linux.c,v 1.35 2006/02/20 16:06:35 tsi Exp $ */ /* * linux specific part of the int10 module * Copyright 1999 Egbert Eich @@ -130,6 +130,9 @@ close(fd); goto error0; } + if (sysMem != (void *)(SYS_BIOS)) + xf86DrvMsgVerb(screen, X_NOTICE, 0, + "Possible sysMem mmap() error (%p)\n", sysMem); } if (!vidMem) { #ifdef DEBUG @@ -143,6 +146,9 @@ close(fd); goto error0; } + if (vidMem != (void *)(V_RAM)) + xf86DrvMsgVerb(screen, X_NOTICE, 0, + "Possible vidMem mmap() error (%p)\n", vidMem); } close(fd); } else { @@ -189,6 +195,9 @@ goto error1; } close (fd); + if (vMem != (void *)(V_BIOS)) + xf86DrvMsgVerb(screen, X_NOTICE, 0, + "Possible V_BIOS (1) mmap() error (%p)\n", vMem); } else goto error1; } @@ -431,6 +440,9 @@ xf86DrvMsg(pInt->scrnIndex, X_ERROR, "Cannot shmat() low memory\n"); return FALSE; } + if (addr != (void *)0) + xf86DrvMsgVerb(pInt->scrnIndex, X_NOTICE, 0, + "Possible lowMem shmat() error (%p)\n", addr); if (((linuxInt10Priv*)pInt->private)->highMem >= 0) { addr = shmat(((linuxInt10Priv*)pInt->private)->highMem, @@ -440,16 +452,22 @@ "Cannot shmat() high memory\n"); return FALSE; } + if (addr != (void *)(HIGH_MEM)) + xf86DrvMsgVerb(pInt->scrnIndex, X_NOTICE, 0, + "Possible highMem shmat() error (%p)\n", addr); } else { if ((fd = open(DEV_MEM, O_RDWR, 0)) >= 0) { - if (mmap((void *)(V_BIOS), SYS_BIOS - V_BIOS, + if ((addr = mmap((void *)(V_BIOS), SYS_BIOS - V_BIOS, PROT_READ | PROT_WRITE | PROT_EXEC, - MAP_SHARED | MAP_FIXED, fd, V_BIOS) + MAP_SHARED | MAP_FIXED, fd, V_BIOS)) == MAP_FAILED) { xf86DrvMsg(pInt->scrnIndex, X_ERROR, "Cannot map V_BIOS\n"); close (fd); return FALSE; } + if (addr != (void *)(V_BIOS)) + xf86DrvMsgVerb(pInt->scrnIndex, X_NOTICE, 0, + "Possible V_BIOS (2) mmap() error (%p)\n", addr); } else { xf86DrvMsg(pInt->scrnIndex, X_ERROR, "Cannot open %s\n",DEV_MEM); return FALSE; @@ -592,19 +610,35 @@ int __res; #ifdef __PIC__ - /* When compiling with -fPIC, we can't use asm constraint "b" because - %ebx is already taken by gcc. */ - __asm__ __volatile__("pushl %%ebx\n\t" - "movl %2,%%ebx\n\t" - "movl %1,%%eax\n\t" - "int $0x80\n\t" - "popl %%ebx" - :"=a" (__res) - :"n" ((int)113), "r" (NULL)); + /* + * When compiling with -fPIC, we can't use asm constraint "b" because + * %ebx is already taken by gcc. + */ + __asm__ __volatile__ + ( + "pushl %%ebx\n\t" + "push %%gs\n\t" + "movl %2,%%ebx\n\t" + "movl %1,%%eax\n\t" + "int $0x80\n\t" + "pop %%gs\n\t" + "popl %%ebx" + : "=a" (__res) + : "n" ((int)113), + "r" (NULL) + : "memory" + ); #else - __asm__ __volatile__("int $0x80\n\t" - :"=a" (__res):"a" ((int)113), - "b" ((struct vm86_struct *)NULL)); + __asm__ __volatile__ + ( + "push %%gs\n\t" + "int $0x80\n\t" + "pop %%gs" + : "=a" (__res) + : "a" ((int)113), + "b" (NULL) + : "memory" + ); #endif if (__res < 0 && __res == -ENOSYS) Index: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/Imakefile:1.6 xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/Imakefile:1.8 --- xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/Imakefile:1.6 Tue Nov 9 23:28:38 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/Imakefile Sun Oct 16 14:31:10 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/Imakefile,v 1.6 2004/11/10 04:28:38 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/Imakefile,v 1.8 2005/10/16 18:31:10 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -66,11 +66,10 @@ LinkFile(xf86vm86module.c,$(XF86SRC)/int10/xf86int10module.c) -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/int10 \ - -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(X86EMUINCLUDES) +INCLUDES = -I$(XF86COMSRC) -I$(XF86SRC)/int10 -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -DEFINES = $(X86EMUDEFINES) $(EXTRADEFINES) +DEFINES = $(EXTRADEFINES) #if defined(i386Architecture) || defined (AMD64Architecture) EXTRADEFINES=-D_PC Index: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/linux_vm86.c diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/linux_vm86.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/linux_vm86.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/linux_vm86.c:1.4 Sun Feb 6 20:15:54 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/linux_vm86.c Thu Jun 2 22:01:37 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/linux_vm86.c,v 1.4 2005/02/07 01:15:54 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/vm86/linux_vm86.c,v 1.5 2005/06/03 02:01:37 tsi Exp $ */ #include "xf86.h" #include "xf86_OSproc.h" @@ -194,7 +194,8 @@ static int do_vm86(xf86Int10InfoPtr pInt) { - int retval, signo; + volatile int signo; + int retval; xf86InterceptSignals(&signo); retval = vm86_rep(VM86S); Index: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/x86emu/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/int10/x86emu/Imakefile:1.6 xc/programs/Xserver/hw/xfree86/os-support/linux/int10/x86emu/Imakefile:1.7 --- xc/programs/Xserver/hw/xfree86/os-support/linux/int10/x86emu/Imakefile:1.6 Tue Nov 9 23:28:38 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/linux/int10/x86emu/Imakefile Fri Oct 14 11:17:04 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/x86emu/Imakefile,v 1.6 2004/11/10 04:28:38 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/int10/x86emu/Imakefile,v 1.7 2005/10/14 15:17:04 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -67,9 +67,8 @@ LinkFile(xf86x86emumodule.c,$(XF86SRC)/int10/xf86int10module.c) -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/int10 \ - -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(X86EMUINCLUDES) +INCLUDES = -I$(XF86COMSRC) -I$(XF86SRC)/int10 -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(X86EMUINCLUDES) DEFINES = $(X86EMUDEFINES) $(EXTRADEFINES) Index: xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile:3.26 xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile:3.27 --- xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile:3.26 Mon Nov 22 21:25:43 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile Fri Oct 14 11:17:04 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile,v 3.26 2004/11/23 02:25:43 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/Imakefile,v 3.27 2005/10/14 15:17:04 tsi Exp $ #include #if !defined(PpcArchitecture) @@ -27,8 +27,7 @@ $(IOPERM_OBJS) $(PPC_OBJS) libc_wrapper.o stdResource.o stdPci.o \ vidmem.o sigio.o pm_noop.o kmod_noop.o agp_noop.o -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(XINCLUDESRC) -I$(EXTINCSRC) \ +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include \ -I$(ENV_PREFIX)/sys/lynx.os RESDEFINES = -DUSESTDRES Index: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c:3.3 xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c:3.4 --- xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c:3.3 Sat Aug 29 01:43:58 1998 +++ xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c Fri Oct 14 11:17:04 2005 @@ -22,10 +22,10 @@ */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c,v 3.3 1998/08/29 05:43:58 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c,v 3.4 2005/10/14 15:17:04 tsi Exp $ */ -#include "X.h" -#include "Xmd.h" +#include +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c diff -u xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c:3.10 xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c:3.11 --- xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c:3.10 Mon Feb 17 10:11:57 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c Fri Oct 14 11:17:04 2005 @@ -21,9 +21,9 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c,v 3.10 2003/02/17 15:11:57 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_io.c,v 3.11 2005/10/14 15:17:04 tsi Exp $ */ -#include "X.h" +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mmap.c diff -u xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mmap.c:3.6 xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mmap.c:3.7 --- xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mmap.c:3.6 Fri Feb 11 17:36:02 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mmap.c Fri Oct 14 11:17:05 2005 @@ -21,9 +21,9 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mmap.c,v 3.6 2000/02/11 22:36:02 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mmap.c,v 3.7 2005/10/14 15:17:05 tsi Exp $ */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mouse.c diff -u xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mouse.c:1.2 xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mouse.c:1.3 --- xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mouse.c:1.2 Fri Feb 13 18:58:48 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mouse.c Fri Oct 14 11:17:05 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mouse.c,v 1.2 2004/02/13 23:58:48 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_mouse.c,v 1.3 2005/10/14 15:17:05 tsi Exp $ */ /* * Copyright 1999 by The XFree86 Project, Inc. @@ -47,7 +47,7 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "X.h" +#include #include "xf86.h" #include "xf86Xinput.h" #include "xf86OSmouse.h" Index: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c:3.18 xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c:3.19 --- xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c:3.18 Fri Dec 13 23:41:14 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c Fri Oct 14 11:17:05 2005 @@ -21,9 +21,9 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c,v 3.18 2002/12/14 04:41:14 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_video.c,v 3.19 2005/10/14 15:17:05 tsi Exp $ */ -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.S diff -u xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.S:1.1 xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.S:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.S:1.1 Sat Jul 10 03:24:49 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.S Mon Jan 9 10:00:22 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.S,v 1.1 1999/07/10 07:24:49 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.S,v 1.2 2006/01/09 15:00:22 dawes Exp $ */ /****************************************************************************** Copyright 1993 by Glenn G. Lai @@ -26,7 +26,6 @@ (glenn@cs.utexas.edu) 8/9/93 ******************************************************************************/ -/* $XConsortium: BUSmemcpy.s /main/4 1996/02/21 17:39:34 kaleb $ */ /* * Modified to use long-alignment of video memory rather than word-alignment Index: xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.c diff -u xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.c:1.4 Sat Feb 12 15:45:44 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.c Fri Oct 14 11:17:05 2005 @@ -12,9 +12,9 @@ ****************************************************************************/ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.c,v 1.4 2000/02/12 20:45:44 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/BUSmemcpy.c,v 1.5 2005/10/14 15:17:05 tsi Exp $ */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/misc/Delay.c diff -u xc/programs/Xserver/hw/xfree86/os-support/misc/Delay.c:3.4 xc/programs/Xserver/hw/xfree86/os-support/misc/Delay.c:3.5 --- xc/programs/Xserver/hw/xfree86/os-support/misc/Delay.c:3.4 Mon Mar 24 23:18:23 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/misc/Delay.c Fri Oct 14 11:17:05 2005 @@ -1,9 +1,9 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/Delay.c,v 3.4 2003/03/25 04:18:23 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/Delay.c,v 3.5 2005/10/14 15:17:05 tsi Exp $ */ #ifdef __UNIXOS2__ #define I_NEED_OS2_H #endif -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.S diff -u xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.S:1.1 xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.S:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.S:1.1 Sat Jul 10 03:24:50 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.S Mon Jan 9 10:00:22 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.S,v 1.1 1999/07/10 07:24:50 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.S,v 1.2 2006/01/09 15:00:22 dawes Exp $ */ /******************************************************************************* Copyright 1994 by Glenn G. Lai @@ -26,7 +26,6 @@ glenn@cs.utexas.edu) 7/21/94 *******************************************************************************/ -/* $XConsortium: IODelay.s /main/4 1996/02/21 17:40:21 kaleb $ */ /* * All we really need is a delay of about 40ns for I/O recovery for just Index: xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.c diff -u xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.c:1.3 xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.c:1.3 Fri Aug 4 12:13:41 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.c Mon Jan 9 10:00:22 2006 @@ -1,12 +1,10 @@ - -/* $XConsortium: IODelay.c /main/1 1996/05/07 17:13:43 kaleb $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.c,v 1.5 2006/01/09 15:00:22 dawes Exp $ */ + /******************************************************************************* Stub for Alpha Linux *******************************************************************************/ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/IODelay.c,v 1.3 2000/08/04 16:13:41 eich Exp $ */ - -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/misc/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/misc/Imakefile:3.17 xc/programs/Xserver/hw/xfree86/os-support/misc/Imakefile:3.19 --- xc/programs/Xserver/hw/xfree86/os-support/misc/Imakefile:3.17 Sat Sep 11 16:53:56 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/misc/Imakefile Mon Jan 9 10:00:22 2006 @@ -1,9 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/Imakefile,v 3.17 2004/09/11 20:53:56 tsi Exp $ - - - - -XCOMM $XConsortium: Imakefile /main/4 1996/09/28 17:24:12 rws $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/Imakefile,v 3.19 2006/01/09 15:00:22 dawes Exp $ #include @@ -33,8 +28,7 @@ OBJS = xf86_Util.o Delay.o $(ILHACKOBJS) $(XOBJS) -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(XINCLUDESRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include SubdirLibraryRule($(OBJS)) NormalLibraryObjectRule() Index: xc/programs/Xserver/hw/xfree86/os-support/misc/PortIO.S diff -u xc/programs/Xserver/hw/xfree86/os-support/misc/PortIO.S:1.3 xc/programs/Xserver/hw/xfree86/os-support/misc/PortIO.S:1.4 --- xc/programs/Xserver/hw/xfree86/os-support/misc/PortIO.S:1.3 Sun Apr 4 22:33:15 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/misc/PortIO.S Sat Jun 11 12:57:00 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/PortIO.S,v 1.3 2004/04/05 02:33:15 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/PortIO.S,v 1.4 2005/06/11 16:57:00 tsi Exp $ */ /* * Copyright (c) 2004 by The XFree86 Project, Inc. @@ -107,8 +107,7 @@ #elif defined(sparc) /* - * Don't know if these are actually used/useful for Solaris/SPARC, - * but they match the gcc inline versions in compiler.h. + * These match the gcc inline versions in compiler.h. */ .file "PortIO.s" @@ -122,44 +121,55 @@ .section ".text" +/* membar everything for fault-isolation purposes */ +#define MEMBAR .word 0x8143e07f + .align 4 outb: + MEMBAR stba %o1, [%o0] #ASI_P_L - membar #StoreStore | #StoreLoad + MEMBAR retl nop .align 4 outw: + MEMBAR stha %o1, [%o0] #ASI_P_L - membar #StoreStore | #StoreLoad + MEMBAR retl nop .align 4 outl: + MEMBAR sta %o1, [%o0] #ASI_P_L - membar #StoreStore | #StoreLoad + MEMBAR retl nop .align 4 inb: + MEMBAR lduba [%o0] #ASI_P_L, %o0 + MEMBAR retl nop .align 4 inw: + MEMBAR lduha [%o0] #ASI_P_L, %o0 + MEMBAR retl nop .align 4 inl: + MEMBAR lda [%o0] #ASI_P_L, %o0 + MEMBAR retl nop #endif - Index: xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.S diff -u xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.S:1.1 xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.S:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.S:1.1 Sat Jul 10 03:24:51 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.S Mon Jan 9 10:00:22 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.S,v 1.1 1999/07/10 07:24:51 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.S,v 1.2 2006/01/09 15:00:22 dawes Exp $ */ /******************************************************************************* Copyright 1994 by Glenn G. Lai @@ -26,7 +26,6 @@ glenn@cs.utexas.edu) 7/21/94 *******************************************************************************/ -/* $XConsortium: SlowBcopy.s /main/4 1996/02/21 17:40:52 kaleb $ */ /* * Modified from the output generated by GCC Index: xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c diff -u xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c:1.7 xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c:1.9 --- xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c:1.7 Wed Feb 11 17:06:21 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c Mon Jan 9 10:00:22 2006 @@ -1,11 +1,9 @@ - -/* $XConsortium: SlowBcopy.c /main/1 1996/05/07 17:14:10 kaleb $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c,v 1.9 2006/01/09 15:00:22 dawes Exp $ */ + /******************************************************************************* for Alpha Linux *******************************************************************************/ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/SlowBcopy.c,v 1.7 2004/02/11 22:06:21 tsi Exp $ */ - /* * Create a dependency that should be immune from the effect of register * renaming as is commonly seen in superscalar processors. This should @@ -16,7 +14,7 @@ * */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_IlHack.c diff -u xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_IlHack.c:3.5 xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_IlHack.c:3.6 --- xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_IlHack.c:3.5 Sat Jul 25 12:56:51 1998 +++ xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_IlHack.c Mon Jan 9 10:00:22 2006 @@ -1,12 +1,10 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_IlHack.c,v 3.5 1998/07/25 16:56:51 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_IlHack.c,v 3.6 2006/01/09 15:00:22 dawes Exp $ */ /* * This file is an incredible crock to get the normally-inline functions * built into the server so that things can be debugged properly. * * Note: this doesn't work when using a compiler other than GCC. */ -/* $XConsortium: xf86_IlHack.c /main/4 1996/02/21 17:52:26 kaleb $ */ - #define static /**/ #define __inline__ /**/ Index: xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_Util.c diff -u xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_Util.c:3.8 xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_Util.c:3.9 --- xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_Util.c:3.8 Sat Oct 27 23:34:02 2001 +++ xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_Util.c Mon Jan 9 10:00:22 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_Util.c,v 3.8 2001/10/28 03:34:02 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/misc/xf86_Util.c,v 3.9 2006/01/09 15:00:22 dawes Exp $ */ /* * Copyright 1993 by David Wexelblat * @@ -21,7 +21,6 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: xf86_Util.c /main/5 1996/10/23 13:13:10 kaleb $ */ /* * This file is for utility functions that will be shared by other pieces Index: xc/programs/Xserver/hw/xfree86/os-support/nto/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/nto/Imakefile:1.10 xc/programs/Xserver/hw/xfree86/os-support/nto/Imakefile:1.11 --- xc/programs/Xserver/hw/xfree86/os-support/nto/Imakefile:1.10 Mon Nov 22 21:25:43 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/nto/Imakefile Fri Oct 14 11:17:05 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/Imakefile,v 1.10 2004/11/23 02:25:43 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/Imakefile,v 1.11 2005/10/14 15:17:05 tsi Exp $ XCOMM #include @@ -12,8 +12,7 @@ VTsw_noop.o posix_tty.o kmod_noop.o agp_noop.o stdResource.o \ stdPci.o libc_wrapper.o sigiostubs.o pm_noop.o nto_mouse.o -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(XINCLUDESRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include RESDEFINES = -DUSESTDRES @@ -22,7 +21,6 @@ SubdirLibraryRule($(OBJS)) NormalLibraryObjectRule() - LinkSourceFile(libc_wrapper.c,../shared) LinkSourceFile(sigiostubs.c,../shared) LinkSourceFile(pm_noop.c,../shared) Index: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c:1.3 xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c:1.4 --- xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c:1.3 Fri Nov 16 11:47:56 2001 +++ xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c Fri Oct 14 11:17:05 2005 @@ -24,7 +24,7 @@ * used in advertising or otherwise to promote the sale, use or other dealings * in this Software without prior written authorization from Sebastien Marineau. * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c,v 1.3 2001/11/16 16:47:56 dawes Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c,v 1.4 2005/10/14 15:17:05 tsi Exp $ */ /* This module contains the NTO-specific functions used at server init. @@ -36,7 +36,7 @@ #include #include -#include +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c diff -u xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c:1.5 xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c:1.6 --- xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c:1.5 Mon Feb 17 10:11:58 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c Fri Oct 14 11:17:05 2005 @@ -24,7 +24,7 @@ * used in advertising or otherwise to promote the sale, use or other dealings * in this Software without prior written authorization from Sebastien Marineau. * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c,v 1.5 2003/02/17 15:11:58 dawes Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_io.c,v 1.6 2005/10/14 15:17:05 tsi Exp $ */ /* This module contains the NTO-specific functions to access the keyboard @@ -36,7 +36,7 @@ #include #include -#include +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_kbdEv.c diff -u xc/programs/Xserver/hw/xfree86/os-support/nto/nto_kbdEv.c:1.3 xc/programs/Xserver/hw/xfree86/os-support/nto/nto_kbdEv.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/nto/nto_kbdEv.c:1.3 Fri Nov 16 11:47:56 2001 +++ xc/programs/Xserver/hw/xfree86/os-support/nto/nto_kbdEv.c Mon Jan 9 10:00:22 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_kbdEv.c,v 1.3 2001/11/16 16:47:56 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_kbdEv.c,v 1.5 2006/01/09 15:00:22 dawes Exp $ */ /* * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany * Copyright 1993 by David Dawes @@ -23,11 +23,10 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: std_kbdEv.c /main/4 1996/03/11 10:47:33 kaleb $ */ #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "inputstr.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_mouse.c diff -u xc/programs/Xserver/hw/xfree86/os-support/nto/nto_mouse.c:1.3 xc/programs/Xserver/hw/xfree86/os-support/nto/nto_mouse.c:1.4 --- xc/programs/Xserver/hw/xfree86/os-support/nto/nto_mouse.c:1.3 Wed Feb 2 22:32:54 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/nto/nto_mouse.c Fri Oct 14 11:17:05 2005 @@ -1,10 +1,10 @@ /* * Written by Frank Liu Oct 10, 2001 */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_mouse.c,v 1.3 2005/02/03 03:32:54 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_mouse.c,v 1.4 2005/10/14 15:17:05 tsi Exp $ */ -#include "X.h" +#include #include "xf86.h" #include "xf86Xinput.h" #include "xf86OSmouse.h" Index: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/nto/nto_video.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/nto/nto_video.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/nto/nto_video.c:1.4 Fri Mar 14 08:46:07 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/nto/nto_video.c Fri Oct 14 11:17:05 2005 @@ -23,7 +23,7 @@ * used in advertising or otherwise to promote the sale, use or other dealings * in this Software without prior written authorization from Sebastien Marineau. * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_video.c,v 1.4 2003/03/14 13:46:07 tsi Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_video.c,v 1.5 2005/10/14 15:17:05 tsi Exp $ */ /* This module contains the NTO-specific functions to deal with video @@ -36,7 +36,7 @@ #include #include -#include +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/os2/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/Imakefile:3.23 xc/programs/Xserver/hw/xfree86/os-support/os2/Imakefile:3.26 --- xc/programs/Xserver/hw/xfree86/os-support/os2/Imakefile:3.23 Mon Nov 22 21:25:43 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/Imakefile Sat Jan 28 21:16:20 2006 @@ -1,10 +1,5 @@ -XCOMM $XConsortium: Imakefile /main/7 1996/09/28 17:24:18 rws $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/Imakefile,v 3.26 2006/01/29 02:16:20 tsi Exp $ - - - - -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/Imakefile,v 3.23 2004/11/23 02:25:43 dawes Exp $ #include BIOS_MOD = os2_bios @@ -21,17 +16,19 @@ vidmem.o sigiostubs.o pm_noop.o kmod_noop.o agp_noop.o os2_serial.o \ os2_kbd.o -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include \ + -I$(SERVERSRC)/mi RESDEFINES = -DUSESTDRES -DEFINES = $(RESDEFINES) +DEFINES = $(EXT_DEFINES) $(RESDEFINES) SubdirLibraryRule($(OBJS)) NormalLibraryObjectRule() NormalAsmObjectRule() +SpecialCObjectRule(os2_kbdEv,$(ICONFIGFILES),NullParameter) + LinkSourceFile(VTsw_noop.c,../shared) LinkSourceFile(libc_wrapper.c,../shared) LinkSourceFile(stdResource.c,../shared) Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_VTsw.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_VTsw.c:3.15 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_VTsw.c:3.17 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_VTsw.c:3.15 Wed May 5 20:54:37 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_VTsw.c Mon Jan 9 10:00:22 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_VTsw.c,v 3.15 2004/05/06 00:54:37 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_VTsw.c,v 3.17 2006/01/09 15:00:22 dawes Exp $ */ /* * Copyright 1993 by David Wexelblat * Modified 1996 by Sebastien Marineau @@ -22,11 +22,10 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: os2_VTsw.c /main/7 1996/05/13 16:37:55 kaleb $ */ #define I_NEED_OS2_H #define NEED_EVENTS -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_bios.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_bios.c:3.11 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_bios.c:3.13 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_bios.c:3.11 Fri May 31 14:46:01 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_bios.c Mon Jan 9 10:00:23 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_bios.c,v 3.11 2002/05/31 18:46:01 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_bios.c,v 3.13 2006/01/09 15:00:23 dawes Exp $ */ /* * (c) Copyright 1994 by Holger Veit * @@ -27,10 +27,9 @@ * in this Software without prior written authorization from Holger Veit. * */ -/* $XConsortium: os2_bios.c /main/5 1996/10/27 11:48:45 kaleb $ */ #define I_NEED_OS2_H -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_diag.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_diag.c:3.8 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_diag.c:3.10 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_diag.c:3.8 Fri May 31 14:46:01 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_diag.c Mon Jan 9 10:00:23 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_diag.c,v 3.8 2002/05/31 18:46:01 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_diag.c,v 3.10 2006/01/09 15:00:23 dawes Exp $ */ /* * (c) Copyright 1997 by Holger Veit * @@ -26,15 +26,14 @@ * in this Software without prior written authorization from Holger Veit. * */ -/* $XConsortium$ */ /* This file checks whether the user has installed the system correctly, * to avoid the numerous questions why this or that does not work */ #define I_NEED_OS2_H -#include "X.h" -#include "Xmd.h" +#include +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c:3.19 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c:3.22 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c:3.19 Fri Feb 13 19:10:17 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c Sat Apr 8 14:30:26 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c,v 3.19 2004/02/14 00:10:17 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c,v 3.22 2006/04/08 18:30:26 dawes Exp $ */ /* * (c) Copyright 1994 by Holger Veit * @@ -27,7 +27,6 @@ * in this Software without prior written authorization from Holger Veit. * */ -/* $XConsortium: os2_init.c /main/9 1996/10/19 18:07:13 kaleb $ */ #define I_NEED_OS2_H #define INCL_DOSFILEMGR @@ -39,8 +38,8 @@ #define INCL_DOSMODULEMGR #define INCL_DOSFILEMGR #include -#include "X.h" -#include "Xmd.h" +#include +#include #include "input.h" #include "scrnintstr.h" @@ -75,6 +74,7 @@ int VioTid; ULONG actual_handles; LONG new_handles; + char popup_sem_name[25]; /* hv 250197 workaround for xkb-Problem: switch to X11ROOT drive */ char *x11r = getenv("X11ROOT"); @@ -89,6 +89,9 @@ } xf86Msg(X_INFO,"Console opened\n"); + + /* fg 090305 we do not want ctrl-c to terminate the server */ + signal(SIGINT,SIG_IGN); OriginalVideoMode.cb=sizeof(VIOMODEINFO); rc=VioGetMode(&OriginalVideoMode,(HVIO)0); if(rc!=0) @@ -133,7 +136,8 @@ /* Create popup semaphore */ - rc = DosCreateEventSem("\\SEM32\\XF86PUP",&hevPopupPending,DC_SEM_SHARED,1); + sprintf(popup_sem_name, "\\SEM32\\XF86PUP.%d", getpid()); + rc = DosCreateEventSem(popup_sem_name,&hevPopupPending,DC_SEM_SHARED,1); if (rc) xf86Msg(X_ERROR, "Could not create popup semaphore! RC=%d\n",rc); @@ -219,7 +223,9 @@ rc = DosQuerySysInfo(5,5,&drive,sizeof(drive)); rc = DosSuppressPopUps(0x0000L,drive+96); /* Reenable popups */ rc = DosCloseEventSem(hevPopupPending); +#if 0 rc = VioDeRegister(); +#endif return; } Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c:3.20 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c:3.22 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c:3.20 Fri Feb 13 19:10:18 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c Mon Jan 9 10:00:23 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c,v 3.20 2004/02/14 00:10:18 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_io.c,v 3.22 2006/01/09 15:00:23 dawes Exp $ */ /* * (c) Copyright 1994,1999 by Holger Veit * @@ -27,11 +27,10 @@ * in this Software without prior written authorization from Holger Veit. * */ -/* $XConsortium: os2_io.c /main/9 1996/05/13 16:38:07 kaleb $ */ #define I_NEED_OS2_H -#include "X.h" -#include "Xpoll.h" +#include +#include #include "compiler.h" #include Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_ioperm.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_ioperm.c:3.6 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_ioperm.c:3.7 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_ioperm.c:3.6 Thu Apr 29 05:13:49 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_ioperm.c Mon Jan 9 10:00:23 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_ioperm.c,v 3.6 1999/04/29 09:13:49 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_ioperm.c,v 3.7 2006/01/09 15:00:23 dawes Exp $ */ /* * Copyright 1993 by David Wexelblat * Modified 1996 by Sebastien Marineau @@ -22,9 +22,6 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: os2_ioperm.c /main/4 1996/04/18 16:50:01 kaleb $ */ - - #define I_NEED_OS2_H #define INCL_32 Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbd.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbd.c:1.2 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbd.c:1.3 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbd.c:1.2 Mon Nov 3 00:36:33 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbd.c Fri Oct 14 11:17:06 2005 @@ -28,11 +28,11 @@ * in this Software without prior written authorization from Holger Veit. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbd.c,v 1.2 2003/11/03 05:36:33 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbd.c,v 1.3 2005/10/14 15:17:06 tsi Exp $ */ #define I_NEED_OS2_H -#include "X.h" -#include "Xpoll.h" +#include +#include #include "compiler.h" #include Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbdEv.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbdEv.c:3.17 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbdEv.c:3.19 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbdEv.c:3.17 Fri Feb 13 19:07:01 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbdEv.c Mon Jan 9 10:00:23 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbdEv.c,v 3.17 2004/02/14 00:07:01 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_kbdEv.c,v 3.19 2006/01/09 15:00:23 dawes Exp $ */ /* * (c) Copyright 1994,1996,1999 by Holger Veit * @@ -27,12 +27,11 @@ * in this Software without prior written authorization from Holger Veit. * */ -/* $XConsortium: os2_kbdEv.c /main/10 1996/10/27 11:48:48 kaleb $ */ #define I_NEED_OS2_H #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "misc.h" #include "inputstr.h" #include "scrnintstr.h" @@ -58,7 +57,7 @@ #ifdef XTESTEXT1 #define XTestSERVER_SIDE -#include "xtestext1.h" +#include extern short xtest_mousex; extern short xtest_mousey; extern int on_steal_input; Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_mouse.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_mouse.c:3.18 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_mouse.c:3.20 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_mouse.c:3.18 Mon Mar 24 23:18:24 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_mouse.c Mon Jan 9 10:00:23 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_mouse.c,v 3.18 2003/03/25 04:18:24 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_mouse.c,v 3.20 2006/01/09 15:00:23 dawes Exp $ */ /* * (c) Copyright 1994,1999,2000 by Holger Veit * @@ -27,12 +27,11 @@ * in this Software without prior written authorization from Holger Veit. * */ -/* $XConsortium: os2_mouse.c /main/10 1996/10/27 11:48:51 kaleb $ */ #define I_NEED_OS2_H #define NEED_EVENTS -#include "X.h" -#include "Xproto.h" +#include +#include #include "misc.h" #include "inputstr.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.c:3.10 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.c:3.13 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.c:3.10 Fri Feb 13 19:10:18 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.c Sat Apr 8 14:30:26 2006 @@ -1,9 +1,4 @@ -/* $XConsortium: os2_select.c /main/6 1996/10/27 11:48:55 kaleb $ */ - - - - -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.c,v 3.10 2004/02/14 00:10:18 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.c,v 3.13 2006/04/08 18:30:26 dawes Exp $ */ /* * (c) Copyright 1996 by Sebastien Marineau @@ -56,7 +51,7 @@ #define INCL_DOSMODULEMGR -#include "Xpoll.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" @@ -462,7 +457,7 @@ * The next line shouldn't be here, but the DosPostEventSem() * below will return 299 from time to time under heavy load */ -/* DosResetEventSem(hSocketSem,&ulPostCount);*/ + DosResetEventSem(hSocketSem,&ulPostCount); memcpy(sd_ptr->tcp_select_monitor,sd_ptr->tcp_select_mask, sd_ptr->socket_ntotal*sizeof(int)); @@ -483,10 +478,7 @@ xf86Msg(X_ERROR,"Socket monitor: os2_select: sock_errno = %d\n",rc); } - rc = DosQueryEventSem(hevServerHasFocus, &ulPostCount); - /* no need to rush while switched away */ - if ((rc==0) && (ulPostCount==0)) rc == DosWaitEventSem(hevServerHasFocus,31L); } } Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.h diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.h:3.2 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.h:3.3 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.h:3.2 Fri Feb 13 19:10:18 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.h Mon Jan 9 10:00:23 2006 @@ -1,4 +1,5 @@ -/* $XConsortium: os2_select.h /main/1 1996/05/13 16:38:30 kaleb $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.h,v 3.3 2006/01/09 15:00:23 dawes Exp $ */ + /* * (c) Copyright 1996 by Sebastien Marineau * @@ -27,8 +28,6 @@ * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_select.h,v 3.2 2004/02/14 00:10:18 dawes Exp $ */ - /* Header file for os2_select.c */ #define MAX_TCP 256 Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_serial.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_serial.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_serial.c:1.6 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_serial.c:1.4 Fri May 31 14:46:02 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_serial.c Mon Jan 9 10:00:23 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_serial.c,v 1.4 2002/05/31 18:46:02 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_serial.c,v 1.6 2006/01/09 15:00:23 dawes Exp $ */ /* * (c) Copyright 1999 by Holger Veit * @@ -26,11 +26,10 @@ * in this Software without prior written authorization from Holger Veit. * */ -/* $XConsortium$ */ #define I_NEED_OS2_H -#include "X.h" -#include "Xmd.h" +#include +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_stubs.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_stubs.c:3.5 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_stubs.c:3.6 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_stubs.c:3.5 Wed Nov 5 22:25:46 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_stubs.c Mon Jan 9 10:00:23 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_stubs.c,v 3.5 2003/11/06 03:25:46 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_stubs.c,v 3.6 2006/01/09 15:00:23 dawes Exp $ */ /* * (c) Copyright 1996 by Holger Veit * @@ -26,7 +26,6 @@ * in this Software without prior written authorization from Holger Veit. * */ -/* $XConsortium: os2_stubs.c /main/3 1996/10/27 11:48:58 kaleb $ */ #define I_NEED_OS2_H #include "X11/X.h" Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_video.c:3.16 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_video.c:3.18 --- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_video.c:3.16 Mon Mar 24 23:18:24 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_video.c Mon Jan 9 10:00:23 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_video.c,v 3.16 2003/03/25 04:18:24 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_video.c,v 3.18 2006/01/09 15:00:23 dawes Exp $ */ /* * (c) Copyright 1994,1999 by Holger Veit * @@ -27,10 +27,9 @@ * in this Software without prior written authorization from Holger Veit. * */ -/* $XConsortium: os2_video.c /main/8 1996/10/27 11:49:02 kaleb $ */ #define I_NEED_OS2_H -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/os2/int10/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/int10/Imakefile:1.4 xc/programs/Xserver/hw/xfree86/os-support/os2/int10/Imakefile:removed --- xc/programs/Xserver/hw/xfree86/os-support/os2/int10/Imakefile:1.4 Tue Nov 9 23:28:38 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/int10/Imakefile Tue May 9 21:57:26 2006 @@ -1,154 +0,0 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/int10/Imakefile,v 1.4 2004/11/10 04:28:38 dawes Exp $ -/* - * Copyright (c) 1994-2004 by The XFree86 Project, Inc. - * All rights reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sublicense, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject - * to the following conditions: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer - * in the documentation and/or other materials provided with the - * distribution, and in the same place and form as other copyright, - * license and disclaimer information. - * - * 3. The end-user documentation included with the redistribution, - * if any, must include the following acknowledgment: "This product - * includes software developed by The XFree86 Project, Inc - * (http://www.xfree86.org/) and its contributors", in the same - * place and form as other third-party acknowledgments. Alternately, - * this acknowledgment may appear in the software itself, in the - * same form and location as other such third-party acknowledgments. - * - * 4. Except as contained in this notice, the name of The XFree86 - * Project, Inc shall not be used in advertising or otherwise to - * promote the sale, use or other dealings in this Software without - * prior written authorization from The XFree86 Project, Inc. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESSED OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE XFREE86 PROJECT, INC OR ITS CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, - * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT - * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE - * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, - * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#define IHaveModules - -#include - -SRCS1 = pci.c xf86int10module.c helper_exec.c helper_mem.c xf86int10.c -OBJS1 = pci.o xf86int10module.o helper_exec.o helper_mem.o xf86int10.o - -LinkSourceFile(helper_mem.c,$(XF86SRC)/int10) -LinkSourceFile(helper_exec.c,$(XF86SRC)/int10) -LinkSourceFile(xf86int10.c,$(XF86SRC)/int10) -LinkSourceFile(pci.c,$(XF86SRC)/int10) -LinkSourceFile(xf86int10module.c,$(XF86SRC)/int10) -LinkSourceFile(xf86x86emu.c,$(XF86SRC)/int10) -LinkSourceFile(generic.c,$(XF86SRC)/int10) - -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86SRC)/int10 \ - -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) - -#if 0 -/* debugging stuff */ -#DEFINES =-D_PC -#undef XF86INT10_BUILD -#define XF86INT10_BUILD X86EMU_GENERIC -#define X86EMU_LIBPATH /usr/local/lib -#endif - -#if defined(i386Architecture) -DEFINES =-D_PC -#endif - -/* XXX keep this temporarily for reference */ -#if 0 -#if (XF86INT10_BUILD == X86EMU_GENERIC) - -SRCS = $(SRCS1) xf86x86emu.c generic.c -OBJS = $(OBJS1) xf86x86emu.o generic.o x86emu.o -SpecialObjectRule(pci.o, pci.c, -D_X86EMU) -SpecialObjectRule(helper_exec.o, helper_exec.c, -D_X86EMU) -SpecialObjectRule(xf86int10.o, xf86int10.c, -D_X86EMU -DSHOW_ALL_DEVICES) -SpecialObjectRule(generic.o, generic.c, -D_X86EMU) -SpecialObjectRule(xf86x86emu.o, xf86x86emu.c, -D_X86EMU) -BuildObjectFromLibraryWithPath(X86EMU_LIBPATH,x86emu,x86emu) -#endif -#endif - -#if defined(XF86INT10_BUILD) && (XF86INT10_BUILD == X86VM) - -SRCS = $(SRCS1) linux.c -OBJS = $(OBJS1) linux.o -SpecialObjectRule(pci.o, pci.c, -D_VM86_LINUX) -SpecialObjectRule(helper_exec.o, helper_exec.c, -D_VM86_LINUX) -SpecialObjectRule(xf86int10.o, xf86int10.c, -D_VM86_LINUX -DSHOW_ALL_DEVICES) -SpecialObjectRule(linux.o, linux.c, -D_VM86_LINUX) - -#elif (XF86INT10_BUILD == X86EMU_OS) - -SpecialObjectRule(pci.o, pci.c, -D_X86EMU) -SpecialObjectRule(helper_exec.o, helper_exec.c, -D_X86EMU) -SpecialObjectRule(xf86int10.o, xf86int10.c, -D_X86EMU -DSHOW_ALL_DEVICES) -SpecialObjectRule(linux.o, linux.c, -D_X86EMU) - -X86TOPDIR = $(TOP)/extras/x86emu -X86SRCDIR = $(X86TOPDIR)/src/x86emu -X86EMUINCLUDES = -I$(X86TOPDIR)/include -I$(X86SRCDIR) - -# if !defined(X86EMU_LIBPATH) -X86EMUSRCS = debug.c decode.c fpu.c ops.c ops2.c prim_ops.c sys.c -X86EMUOBJS = debug.o decode.o fpu.o ops.o ops2.o prim_ops.o sys.o - -LinkSourceFile(debug.c,$(X86SRCDIR)) -LinkSourceFile(decode.c,$(X86SRCDIR)) -LinkSourceFile(fpu.c,$(X86SRCDIR)) -LinkSourceFile(ops.c,$(X86SRCDIR)) -LinkSourceFile(ops2.c,$(X86SRCDIR)) -LinkSourceFile(prim_ops.c,$(X86SRCDIR)) -LinkSourceFile(sys.c,$(X86SRCDIR)) -# else -BuildObjectFromLibraryWithPath(X86EMU_LIBPATH,x86emu,x86emu) -X86EMUOBJS = x86emu.o -# endif - -SRCS = $(SRCS1) xf86x86emu.c linux.c $(X86EMUSRCS) -OBJS = $(OBJS1) xf86x86emu.o linux.o $(X86EMUOBJS) - -#endif - -#if defined(XF86INT10_BUILD) && XF86INT10_BUILD > X86EMU_GENERIC - -LibraryModuleTarget(int10, $(OBJS),linux) - -InstallLibraryModule(int10,$(MODULEDIR),linux) - -all:: - @(set -x; cd ../..; \ - RemoveFile(LibraryTargetName(int10)); \ - $(LN) linux/int10/LibraryTargetName(int10) . ) - -InstallDriverSDKLibraryModule(int10,$(DRIVERSDKMODULEDIR),.) - -InstallDriverSDKNonExecFile(../../int10/xf86int10.h,$(DRIVERSDKINCLUDEDIR)) - -#endif - -DependTarget() - Index: xc/programs/Xserver/hw/xfree86/os-support/os2/int10/os2.c diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/int10/os2.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/os2/int10/os2.c:removed --- xc/programs/Xserver/hw/xfree86/os-support/os2/int10/os2.c:1.4 Fri Jan 25 16:56:20 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/os2/int10/os2.c Tue May 9 21:57:26 2006 @@ -1,448 +0,0 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/int10/os2.c,v 1.4 2002/01/25 21:56:20 tsi Exp $ */ -/* - * XFree86 int10 module - * execute BIOS int 10h calls in x86 real mode environment - * Copyright 1999 Egbert Eich - */ -#include "xf86.h" -#include "xf86str.h" -#include "xf86_OSproc.h" -#include "xf86_ansic.h" -#include "xf86Pci.h" -#include "compiler.h" -#define _INT10_PRIVATE -#include "xf86int10.h" -#include "int10Defines.h" - -static CARD8 read_b(xf86Int10InfoPtr pInt,int addr); -static CARD16 read_w(xf86Int10InfoPtr pInt,int addr); -static CARD32 read_l(xf86Int10InfoPtr pInt,int addr); -static void write_b(xf86Int10InfoPtr pInt,int addr, CARD8 val); -static void write_w(xf86Int10InfoPtr pInt,int addr, CARD16 val); -static void write_l(xf86Int10InfoPtr pInt,int addr, CARD32 val); - -/* - * the emulator cannot pass a pointer to the current xf86Int10InfoRec - * to the memory access functions therefore store it here. - */ - -typedef struct { - int shift; - int pagesize_1; - int entries; - void* vRam; - memType *alloc_rec; -} genericInt10Priv; - -#define INTPriv(x) ((genericInt10Priv*)x->private) - -int10MemRec genericMem = { - read_b, - read_w, - read_l, - write_b, - write_w, - write_l -}; - -static void MapVRam(xf86Int10InfoPtr pInt); -static void UnmapVRam(xf86Int10InfoPtr pInt); -static void setupTable(xf86Int10InfoPtr pInt, memType address, - int loc,int size); - -static void *sysMem = NULL; - -xf86Int10InfoPtr -xf86InitInt10(int entityIndex) -{ - xf86Int10InfoPtr pInt; - int screen; - void* intMem; - void* vbiosMem; - int pagesize; - int entries; - int shift; - legacyVGARec vga; - - screen = (xf86FindScreenForEntity(entityIndex))->scrnIndex; - - if (int10skip(xf86Screens[screen],entityIndex)) - return NULL; - - pInt = (xf86Int10InfoPtr)xnfcalloc(1,sizeof(xf86Int10InfoRec)); - pInt->entityIndex = entityIndex; - if (!xf86Int10ExecSetup(pInt)) - goto error0; - pInt->mem = &genericMem; - pagesize = xf86getpagesize(); - pInt->private = (pointer)xnfcalloc(1,sizeof(genericInt10Priv)); - entries = SYS_SIZE / pagesize; - - pInt->scrnIndex = screen; - INTPriv(pInt)->pagesize_1 = pagesize - 1; - INTPriv(pInt)->entries = entries; - INTPriv(pInt)->alloc_rec = - xnfcalloc(1,sizeof(memType) * entries); - for (shift = 0 ; (pagesize >> shift) ; shift++) {}; - shift -= 1; - INTPriv(pInt)->shift = shift; - - /* - * we need to map video RAM MMIO as some chipsets map mmio - * registers into this range. - */ - - MapVRam(pInt); - intMem = xnfalloc(pagesize); - setupTable(pInt,(memType)intMem,0,pagesize); - vbiosMem = xnfalloc(V_BIOS_SIZE); - -#ifdef _PC - if (!sysMem) - sysMem = xf86MapVidMem(screen,VIDMEM_FRAMEBUFFER,SYS_BIOS,BIOS_SIZE); - setupTable(pInt,(memType)sysMem,SYS_BIOS,BIOS_SIZE); - if (xf86ReadBIOS(0,0,(unsigned char *)intMem,LOW_PAGE_SIZE) < 0) { - xf86DrvMsg(screen,X_ERROR,"Cannot read int vect\n"); - goto error1; - } - if (xf86IsEntityPrimary(entityIndex)) { - int size; - int cs = MEM_RW(pInt,((0x10<<2)+2)); - -int i,k,m; -char buf[100], hx[10]; -for (i=0; i<0x100; i+=16) { -sprintf(buf,"%04x: ",i); -for (k=0; k<16; k++) { - m = MEM_RB(pInt,i+k); - sprintf(hx,"%02x ",((unsigned)m)&0xff); - strcat(buf,hx); -} -xf86DrvMsg(screen,X_INFO,"%s\n",buf); -} - - - - xf86DrvMsg(screen,X_INFO,"Primary V_BIOS segmant is: 0x%x\n",cs); - if (xf86ReadBIOS(cs << 4,0,(unsigned char *)vbiosMem, - 0x10) < 0) { - xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (1)\n"); - goto error1; - } - if (!((*(CARD8*)vbiosMem == 0x55) - && (*((CARD8*)vbiosMem + 1) == 0xAA))) { - xf86DrvMsg(screen,X_ERROR,"No V_BIOS found\n"); - goto error1; - } - - size = *((CARD8*)vbiosMem + 2) * 512; - if (xf86ReadBIOS(cs << 4,0,vbiosMem, size) < 0) { - xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (2)\n"); - goto error1; - } - - setupTable(pInt,(memType)vbiosMem,cs<<4,size); - set_return_trap(pInt); - pInt->BIOSseg = cs; - } else { - reset_int_vect(pInt); - set_return_trap(pInt); - if (!mapPciRom(pInt,(unsigned char *)(vbiosMem))) { - xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (3)\n"); - goto error1; - } - setupTable(pInt,(memType)vbiosMem,V_BIOS,V_BIOS_SIZE); - pInt->BIOSseg = V_BIOS >> 4; - pInt->num = 0xe6; - LockLegacyVGA(pInt, &vga); - xf86ExecX86int10(pInt); - UnlockLegacyVGA(pInt, &vga); - } -#else - if (!sysMem) { - sysMem = xnfalloc(BIOS_SIZE); - setup_system_bios((memType)sysMem); - } - setupTable(pInt,(memType)sysMem,SYS_BIOS,BIOS_SIZE); - setup_int_vect(pInt); - set_return_trap(pInt); - if (!mapPciRom(pInt,(unsigned char *)(vbiosMem))) { - xf86DrvMsg(screen,X_ERROR,"Cannot read V_BIOS (4)\n"); - goto error1; - } - setupTable(pInt,(memType)vbiosMem,V_BIOS,V_BIOS_SIZE); - pInt->BIOSseg = V_BIOS >> 4; - pInt->num = 0xe6; - LockLegacyVGA(pInt, &vga); - xf86ExecX86int10(pInt); - UnlockLegacyVGA(pInt, &vga); -#endif - return pInt; - - error1: - xfree(vbiosMem); - xfree(intMem); - UnmapVRam(pInt); - xfree(INTPriv(pInt)->alloc_rec); - xfree(pInt->private); - error0: - xfree(pInt); - - return NULL; -} - -static void -MapVRam(xf86Int10InfoPtr pInt) -{ - int screen = pInt->scrnIndex; - int pagesize = INTPriv(pInt)->pagesize_1 + 1; - int size = ((VRAM_SIZE + pagesize - 1)/pagesize) * pagesize; - INTPriv(pInt)->vRam = xf86MapVidMem(screen,VIDMEM_MMIO,V_RAM,size); -} - -static void -UnmapVRam(xf86Int10InfoPtr pInt) -{ - int screen = pInt->scrnIndex; - int pagesize = INTPriv(pInt)->pagesize_1 + 1; - int size = ((VRAM_SIZE + pagesize - 1)/pagesize) * pagesize; - - xf86UnMapVidMem(screen,INTPriv(pInt)->vRam,size); -} - -Bool -MapCurrentInt10(xf86Int10InfoPtr pInt) -{ - /* nothing to do here */ - return TRUE; -} - -void -xf86FreeInt10(xf86Int10InfoPtr pInt) -{ - int pagesize; - - if (!pInt) - return; - pagesize = INTPriv(pInt)->pagesize_1 + 1; - if (Int10Current == pInt) - Int10Current = NULL; - xfree(INTPriv(pInt)->alloc_rec[V_BIOS/pagesize]); - xfree(INTPriv(pInt)->alloc_rec[0]); - UnmapVRam(pInt); - xfree(INTPriv(pInt)->alloc_rec); - xfree(pInt->private); - xfree(pInt); -} - -void * -xf86Int10AllocPages(xf86Int10InfoPtr pInt,int num, int *off) -{ - void* addr; - int pagesize = INTPriv(pInt)->pagesize_1 + 1; - int num_pages = INTPriv(pInt)->entries; - int i,j; - - for (i=0;ialloc_rec[i] == 0) { - for (j=i;j < num + i;j++) - if ((INTPriv(pInt)->alloc_rec[j] != 0)) - break; - if (j == num + i) - break; - else - i = i + num; - } - } - if (i == num_pages - num) - return NULL; - - *off = i * pagesize; - addr = xnfalloc(pagesize * num); - setupTable(pInt,(memType)addr,*off,pagesize * num); - - return addr; -} - -void -xf86Int10FreePages(xf86Int10InfoPtr pInt, void *pbase, int num) -{ - int num_pages = INTPriv(pInt)->entries; - int i,j; - for (i = 0;ialloc_rec[i]==(memType)pbase) { - for (j = 0; j < num; j++) - INTPriv(pInt)->alloc_rec[i] = 0; - break; - } - xfree(pbase); - return; -} - -static void -setupTable(xf86Int10InfoPtr pInt, memType address,int loc,int size) -{ - int pagesize = INTPriv(pInt)->pagesize_1 + 1; - int i,j,num; - - i = loc / pagesize; - num = (size + pagesize - 1)/ pagesize; /* round up to the nearest page */ - /* boudary if size is not */ - /* multiple of pagesize */ - for (j = 0; jalloc_rec[i+j] = address; - address += pagesize; - } -} - -#define OFF(addr) \ - ((addr) & (INTPriv(pInt)->pagesize_1)) -#define SHIFT \ - (INTPriv(pInt)->shift) -#define BASE(addr,shift) \ - (INTPriv(pInt)->alloc_rec[addr >> shift]) -#define V_ADDR(addr,shift,off) \ - (BASE(addr,shift) + (off)) -#define VRAM_ADDR(addr) (addr - 0xA0000) -#define VRAM_BASE (INTPriv(pInt)->vRam) - -#define VRAM(addr) ((addr >= 0xA0000) && (addr <= 0xBFFFF)) -#define V_ADDR_RB(addr,shift,off) \ - (VRAM(addr)) ? MMIO_IN8((CARD8*)VRAM_BASE,VRAM_ADDR(addr)) \ - : *(CARD8*) V_ADDR(addr,shift,off) -#define V_ADDR_RW(addr,shift,off) \ - (VRAM(addr)) ? MMIO_IN16((CARD16*)VRAM_BASE,VRAM_ADDR(addr)) \ - : ldw_u((pointer)V_ADDR(addr,shift,off)) -#define V_ADDR_RL(addr,shift,off) \ - (VRAM(addr)) ? MMIO_IN32((CARD32*)VRAM_BASE,VRAM_ADDR(addr)) \ - : ldl_u((pointer)V_ADDR(addr,shift,off)) - -#define V_ADDR_WB(addr,shift,off,val) \ - if(VRAM(addr)) \ - MMIO_OUT8((CARD8*)VRAM_BASE,VRAM_ADDR(addr),val); \ - else \ - *(CARD8*) V_ADDR(addr,shift,off) = val; -#define V_ADDR_WW(addr,shift,off,val) \ - if(VRAM(addr)) \ - MMIO_OUT16((CARD16*)VRAM_BASE,VRAM_ADDR(addr),val); \ - else \ - stw_u((val),(pointer)(V_ADDR(addr,shift,off))); - -#define V_ADDR_WL(addr,shift,off,val) \ - if (VRAM(addr)) \ - MMIO_OUT32((CARD32*)VRAM_BASE,VRAM_ADDR(addr),val); \ - else \ - stl_u(val,(pointer)(V_ADDR(addr,shift,off))); - -static CARD8 -read_b(xf86Int10InfoPtr pInt, int addr) -{ - if (!BASE(addr,SHIFT)) return 0xff; - - return V_ADDR_RB(addr,SHIFT,OFF(addr)); -} - -static CARD16 -read_w(xf86Int10InfoPtr pInt, int addr) -{ - int shift = SHIFT; - int off = OFF(addr); - - if (!BASE(addr,shift)) return 0xffff; - -#if X_BYTE_ORDER == X_BIG_ENDIAN - return ((V_ADDR_RB(addr,shift,off)) - || ((V_ADDR_RB(addr,shift,off + 1)) << 8)); -#else - if (OFF(addr + 1) > 0) { - return V_ADDR_RW(addr,SHIFT,OFF(addr)); - } else { - return ((V_ADDR_RB(addr,shift,off + 1)) - || ((V_ADDR_RB(addr,shift,off)) << 8)); - } -#endif -} - -static CARD32 -read_l(xf86Int10InfoPtr pInt, int addr) -{ - int shift = SHIFT; - int off = OFF(addr); - - if (!BASE(addr,shift)) return 0xffffffff; - -#if X_BYTE_ORDER == X_BIG_ENDIAN - return ((V_ADDR_RB(addr,shift,off)) - || ((V_ADDR_RB(addr,shift,off + 1)) << 8) - || ((V_ADDR_RB(addr,shift,off + 2)) << 16) - || ((V_ADDR_RB(addr,shift,off + 3)) << 24)); -#else - if (OFF(addr + 3) > 2) { - return V_ADDR_RL(addr,SHIFT,OFF(addr)); - } else { - return ((V_ADDR_RB(addr,shift,off + 3)) - || ((V_ADDR_RB(addr,shift,off + 2)) << 8) - || ((V_ADDR_RB(addr,shift,off + 1)) << 16) - || ((V_ADDR_RB(addr,shift,off)) << 24)); - } -#endif -} - -static void -write_b(xf86Int10InfoPtr pInt, int addr, CARD8 val) -{ - if (!BASE(addr,SHIFT)) return; - - V_ADDR_WB(addr,SHIFT,OFF(addr),val); -} - -static void -write_w(xf86Int10InfoPtr pInt, int addr, CARD16 val) -{ - int shift = SHIFT; - int off = OFF(addr); - - if (!BASE(addr,shift)) return; - -#if X_BYTE_ORDER == X_BIG_ENDIAN - V_ADDR_WB(addr,shift,off,val); - V_ADDR_WB(addr,shift,off + 1,val >> 8); -#else - if (OFF(addr + 1) > 0) { - V_ADDR_WW(addr,shift,OFF(addr),val); - } else { - V_ADDR_WB(addr,shift,off + 1,val); - V_ADDR_WB(addr,shift,off,val >> 8); - } -#endif -} - -static void -write_l(xf86Int10InfoPtr pInt, int addr, CARD32 val) -{ - int shift = SHIFT; - int off = OFF(addr); - if (!BASE(addr,shift)) return; - -#if X_BYTE_ORDER == X_BIG_ENDIAN - V_ADDR_WB(addr,shift,off,val); - V_ADDR_WB(addr,shift,off + 1, val >> 8); - V_ADDR_WB(addr,shift,off + 2, val >> 16); - V_ADDR_WB(addr,shift,off + 3, val >> 24); -#else - if (OFF(addr + 3) > 2) { - V_ADDR_WL(addr,shift,OFF(addr),val); - } else { - V_ADDR_WB(addr,shift,off + 3, val); - V_ADDR_WB(addr,shift,off + 2, val >> 8); - V_ADDR_WB(addr,shift,off + 1, val >> 16); - V_ADDR_WB(addr,shift,off, val >> 24); - } -#endif -} - -pointer -xf86int10Addr(xf86Int10InfoPtr pInt, CARD32 addr) -{ - return (pointer) V_ADDR(addr,SHIFT,OFF(addr)); -} Index: xc/programs/Xserver/hw/xfree86/os-support/pmax/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/pmax/Imakefile:1.14 xc/programs/Xserver/hw/xfree86/os-support/pmax/Imakefile:1.15 --- xc/programs/Xserver/hw/xfree86/os-support/pmax/Imakefile:1.14 Mon Nov 22 21:25:44 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/pmax/Imakefile Fri Oct 14 11:17:06 2005 @@ -1,5 +1,5 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/Imakefile,v 1.14 2004/11/23 02:25:44 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/Imakefile,v 1.15 2005/10/14 15:17:06 tsi Exp $ #include @@ -19,8 +19,8 @@ kmod_noop.o agp_noop.o -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(XF86OSSRC)/bus -I. \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(EXTINCSRC) -I../sysv +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(XF86OSSRC)/bus \ + -I$(SERVERSRC)/include -I../sysv RESDEFINES = -DUSESTDRES Index: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c diff -u xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c:1.8 xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c:1.9 --- xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c:1.8 Mon Feb 17 10:11:59 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c Fri Oct 14 11:17:06 2005 @@ -69,9 +69,9 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c,v 1.8 2003/02/17 15:11:59 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_devs.c,v 1.9 2005/10/14 15:17:06 tsi Exp $ */ -#include "X.h" +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c:1.3 xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c:1.4 --- xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c:1.3 Sat Jul 25 12:56:55 1998 +++ xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c Fri Oct 14 11:17:06 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c,v 1.3 1998/07/25 16:56:55 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c,v 1.4 2005/10/14 15:17:06 tsi Exp $ */ /* * Copyright 1998 by Concurrent Computer Corporation * @@ -79,8 +79,8 @@ #include #include -#include "X.h" -#include "Xmd.h" +#include +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_map.c diff -u xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_map.c:1.8 xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_map.c:1.9 --- xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_map.c:1.8 Sun Nov 19 11:38:06 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_map.c Fri Oct 14 11:17:06 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_map.c,v 1.8 2000/11/19 16:38:06 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_map.c,v 1.9 2005/10/14 15:17:06 tsi Exp $ */ /* * Copyright 1998 by Concurrent Computer Corporation * @@ -71,7 +71,7 @@ * */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_mouse.c diff -u xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_mouse.c:1.3 xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_mouse.c:1.4 --- xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_mouse.c:1.3 Fri Feb 13 18:58:48 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_mouse.c Fri Oct 14 11:17:06 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_mouse.c,v 1.3 2004/02/13 23:58:48 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_mouse.c,v 1.4 2005/10/14 15:17:06 tsi Exp $ */ /* * Copyright 1999 by The XFree86 Project, Inc. @@ -47,7 +47,7 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "X.h" +#include #include "xf86.h" #include "xf86Xinput.h" #include "xf86OSmouse.h" Index: xc/programs/Xserver/hw/xfree86/os-support/qnx4/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/qnx4/Imakefile:1.10 xc/programs/Xserver/hw/xfree86/os-support/qnx4/Imakefile:1.11 --- xc/programs/Xserver/hw/xfree86/os-support/qnx4/Imakefile:1.10 Mon Nov 22 21:25:44 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/qnx4/Imakefile Fri Oct 14 11:17:06 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/Imakefile,v 1.10 2004/11/23 02:25:44 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/Imakefile,v 1.11 2005/10/14 15:17:06 tsi Exp $ #include @@ -13,8 +13,7 @@ libc_wrapper.o stdResource.o stdPci.o sigiostubs.o pm_noop.o \ kmod_noop.o agp_noop.o -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(XINCLUDESRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include RESDEFINES = -DUSESTDRES @@ -23,7 +22,6 @@ SubdirLibraryRule($(OBJS)) NormalLibraryObjectRule() - LinkSourceFile(libc_wrapper.c,../shared) LinkSourceFile(posix_tty.c,../shared) LinkSourceFile(ioperm_noop.c,../shared) Index: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_VTsw.c diff -u xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_VTsw.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_VTsw.c:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_VTsw.c:1.1 Sun Dec 26 19:45:47 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_VTsw.c Fri Oct 14 11:17:06 2005 @@ -24,7 +24,7 @@ * used in advertising or otherwise to promote the sale, use or other dealings * in this Software without prior written authorization from Sebastien Marineau. * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_VTsw.c,v 1.1 1999/12/27 00:45:47 robin Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_VTsw.c,v 1.2 2005/10/14 15:17:06 tsi Exp $ */ /* This module contains the code to use _select_receive to handle @@ -34,7 +34,7 @@ /* This module contains the functions which are used to do * VT switching to a text console and back... Experimental. */ -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c:1.1 Sun Dec 26 19:45:47 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c Fri Oct 14 11:17:06 2005 @@ -24,7 +24,7 @@ * used in advertising or otherwise to promote the sale, use or other dealings * in this Software without prior written authorization from Sebastien Marineau. * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c,v 1.1 1999/12/27 00:45:47 robin Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c,v 1.2 2005/10/14 15:17:06 tsi Exp $ */ /* This module contains the qnx-specific functions used at server init. @@ -36,7 +36,7 @@ #include #include -#include +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c diff -u xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c:1.3 xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c:1.4 --- xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c:1.3 Mon Feb 17 10:11:59 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c Fri Oct 14 11:17:06 2005 @@ -24,7 +24,7 @@ * used in advertising or otherwise to promote the sale, use or other dealings * in this Software without prior written authorization from Sebastien Marineau. * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c,v 1.3 2003/02/17 15:11:59 dawes Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_io.c,v 1.4 2005/10/14 15:17:06 tsi Exp $ */ /* This module contains the qnx-specific functions to access the keyboard @@ -39,7 +39,7 @@ #include #include -#include +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_kbd.c diff -u xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_kbd.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_kbd.c:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_kbd.c:1.1 Sun Dec 26 19:45:47 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_kbd.c Fri Oct 14 11:17:06 2005 @@ -24,7 +24,7 @@ * used in advertising or otherwise to promote the sale, use or other dealings * in this Software without prior written authorization from Sebastien Marineau. * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_kbd.c,v 1.1 1999/12/27 00:45:47 robin Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_kbd.c,v 1.2 2005/10/14 15:17:06 tsi Exp $ */ /* This module contains the qnx-specific functions to access the keyboard @@ -39,7 +39,7 @@ #include #include -#include +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_mouse.c diff -u xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_mouse.c:1.5 xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_mouse.c:1.6 --- xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_mouse.c:1.5 Mon Nov 17 17:20:41 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_mouse.c Fri Oct 14 11:17:06 2005 @@ -24,7 +24,7 @@ * used in advertising or otherwise to promote the sale, use or other dealings * in this Software without prior written authorization from Sebastien Marineau. * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_mouse.c,v 1.5 2003/11/17 22:20:41 dawes Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_mouse.c,v 1.6 2005/10/14 15:17:06 tsi Exp $ */ /* This module contains the qnx-specific functions to access the keyboard @@ -42,7 +42,7 @@ #include #include -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86Xinput.h" Index: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_select.c diff -u xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_select.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_select.c:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_select.c:1.1 Sun Dec 26 19:45:48 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_select.c Fri Oct 14 11:17:06 2005 @@ -24,7 +24,7 @@ * used in advertising or otherwise to promote the sale, use or other dealings * in this Software without prior written authorization from Sebastien Marineau. * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_select.c,v 1.1 1999/12/27 00:45:48 robin Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_select.c,v 1.2 2005/10/14 15:17:06 tsi Exp $ */ /* This module contains the code to use _select_receive to handle @@ -38,7 +38,7 @@ #include #include -#include +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_utils.c diff -u xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_utils.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_utils.c:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_utils.c:1.1 Sun Dec 26 19:45:48 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_utils.c Fri Oct 14 11:17:06 2005 @@ -1,5 +1,5 @@ /* This includes various utility functions which are missing otherwise - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_utils.c,v 1.1 1999/12/27 00:45:48 robin Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_utils.c,v 1.2 2005/10/14 15:17:06 tsi Exp $ */ #include @@ -8,7 +8,7 @@ #include #include -#include +#include #include void usleep (unsigned long interval) { delay( interval/1000 ); } Index: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_video.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_video.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_video.c:1.4 Fri Mar 14 08:46:07 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_video.c Fri Oct 14 11:17:07 2005 @@ -24,7 +24,7 @@ * used in advertising or otherwise to promote the sale, use or other dealings * in this Software without prior written authorization from Sebastien Marineau. * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_video.c,v 1.4 2003/03/14 13:46:07 tsi Exp $ + * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_video.c,v 1.5 2005/10/14 15:17:07 tsi Exp $ */ /* This module contains the qnx-specific functions to deal with video @@ -37,7 +37,7 @@ #include #include -#include +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile:3.18 xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile:3.20 --- xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile:3.18 Mon Nov 22 21:25:44 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile Mon Jan 9 10:00:24 2006 @@ -1,9 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile,v 3.18 2004/11/23 02:25:44 dawes Exp $ - - - - -XCOMM $XConsortium: Imakefile /main/4 1996/09/28 17:24:25 rws $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/Imakefile,v 3.20 2006/01/09 15:00:24 dawes Exp $ #include @@ -17,8 +12,8 @@ libc_wrapper.o stdResource.o stdPci.o sigiostubs.o pm_noop.o \ kmod_noop.o agp_noop.o -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(SERVERSRC)/mi -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include \ + -I$(SERVERSRC)/mi RESDEFINES = -DUSESTDRES Index: xc/programs/Xserver/hw/xfree86/os-support/sco/VTsw_sco.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sco/VTsw_sco.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/sco/VTsw_sco.c:1.6 --- xc/programs/Xserver/hw/xfree86/os-support/sco/VTsw_sco.c:1.4 Mon Jul 7 11:34:27 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/sco/VTsw_sco.c Mon Jan 9 10:00:24 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/VTsw_sco.c,v 1.4 2003/07/07 15:34:27 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/VTsw_sco.c,v 1.6 2006/01/09 15:00:24 dawes Exp $ */ /* * Copyright 1993 by David Wexelblat * Copyright 1993 by David McCullough @@ -22,9 +22,8 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: VTsw_sco.c /main/2 1995/11/13 06:08:36 kaleb $ */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c:3.15 xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c:3.17 --- xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c:3.15 Sat Apr 3 17:26:25 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c Mon Jan 9 10:00:24 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c,v 3.15 2004/04/03 22:26:25 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c,v 3.17 2006/01/09 15:00:24 dawes Exp $ */ /* * Copyright 2001 by J. Kean Johnston * @@ -20,12 +20,11 @@ * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ -/* $XConsortium$ */ /* Re-written May 2001 to represent the current state of reality */ -#include "X.h" -#include "Xmd.h" +#include +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c:3.10 xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c:3.12 --- xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c:3.10 Mon Feb 17 10:11:59 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c Mon Jan 9 10:00:24 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c,v 3.10 2003/02/17 15:11:59 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_io.c,v 3.12 2006/01/09 15:00:24 dawes Exp $ */ /* * Copyright 2001 by J. Kean Johnston * @@ -20,11 +20,10 @@ * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ -/* $XConsortium$ */ /* Re-written May 2001 to represent the current state of reality */ -#include "X.h" +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_iop.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sco/sco_iop.c:1.1 xc/programs/Xserver/hw/xfree86/os-support/sco/sco_iop.c:1.3 --- xc/programs/Xserver/hw/xfree86/os-support/sco/sco_iop.c:1.1 Mon Jun 3 17:22:10 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/sco/sco_iop.c Mon Jan 9 10:00:24 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_iop.c,v 1.1 2002/06/03 21:22:10 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_iop.c,v 1.3 2006/01/09 15:00:24 dawes Exp $ */ /* * Copyright 2001 by J. Kean Johnston * @@ -20,10 +20,8 @@ * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ -/* $XConsortium$ */ - -#include "X.h" +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c:3.14 xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c:3.15 --- xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c:3.14 Wed Feb 2 22:32:54 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c Fri Oct 14 11:17:07 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c,v 3.14 2005/02/03 03:32:54 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_mouse.c,v 3.15 2005/10/14 15:17:07 tsi Exp $ */ /* * Copyright 2001 by J. Kean Johnston * @@ -21,7 +21,7 @@ * PERFORMANCE OF THIS SOFTWARE. */ -#include "X.h" +#include #include "compiler.h" #include "xf86.h" Index: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sco/sco_video.c:3.9 xc/programs/Xserver/hw/xfree86/os-support/sco/sco_video.c:3.11 --- xc/programs/Xserver/hw/xfree86/os-support/sco/sco_video.c:3.9 Fri Mar 14 08:46:07 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/sco/sco_video.c Mon Jan 9 10:00:24 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_video.c,v 3.9 2003/03/14 13:46:07 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_video.c,v 3.11 2006/01/09 15:00:24 dawes Exp $ */ /* * Copyright 2001 by J. Kean Johnston * @@ -20,7 +20,6 @@ * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ -/* $XConsortium$ */ /* Re-written May 2001 to represent the current state of reality */ @@ -37,7 +36,7 @@ * that and adjust accordingly. */ -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_noop.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_noop.c:3.2 xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_noop.c:3.4 --- xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_noop.c:3.2 Sat Jul 25 12:56:59 1998 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_noop.c Mon Jan 9 10:00:25 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_noop.c,v 3.2 1998/07/25 16:56:59 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_noop.c,v 3.4 2006/01/09 15:00:25 dawes Exp $ */ /* * Copyright 1993 by David Wexelblat * @@ -21,9 +21,8 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: VTsw_noop.c /main/3 1996/02/21 17:53:25 kaleb $ */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_usl.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_usl.c:3.4 xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_usl.c:3.6 --- xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_usl.c:3.4 Mon Sep 16 14:06:14 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_usl.c Mon Jan 9 10:00:25 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_usl.c,v 3.4 2002/09/16 18:06:14 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/VTsw_usl.c,v 3.6 2006/01/09 15:00:25 dawes Exp $ */ /* * Copyright 1993 by David Wexelblat * @@ -21,9 +21,8 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: VTsw_usl.c /main/3 1996/02/21 17:53:28 kaleb $ */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/agp_noop.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/agp_noop.c:1.6 xc/programs/Xserver/hw/xfree86/os-support/shared/agp_noop.c:1.8 --- xc/programs/Xserver/hw/xfree86/os-support/shared/agp_noop.c:1.6 Fri Feb 13 18:58:48 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/agp_noop.c Fri Oct 14 11:17:07 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/agp_noop.c,v 1.6 2004/02/13 23:58:48 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/agp_noop.c,v 1.8 2005/10/14 15:17:07 tsi Exp $ */ /* * Copyright (c) 2000-2003 by The XFree86 Project, Inc. * All rights reserved. @@ -54,7 +54,7 @@ #ifdef __UNIXOS2__ # define I_NEED_OS2_H #endif -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" @@ -97,6 +97,11 @@ return -1; } +Bool +xf86DeallocateGARTMemory(int screenNum, int key) +{ + return FALSE; +} Bool xf86BindGARTMemory(int screenNum, int key, unsigned long offset) Index: xc/programs/Xserver/hw/xfree86/os-support/shared/bios_devmem.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/bios_devmem.c:3.7 xc/programs/Xserver/hw/xfree86/os-support/shared/bios_devmem.c:3.9 --- xc/programs/Xserver/hw/xfree86/os-support/shared/bios_devmem.c:3.7 Tue Sep 19 08:46:22 2000 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/bios_devmem.c Mon Jan 9 10:00:25 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/bios_devmem.c,v 3.7 2000/09/19 12:46:22 eich Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/bios_devmem.c,v 3.9 2006/01/09 15:00:25 dawes Exp $ */ /* * Copyright 1993 by David Wexelblat * @@ -21,9 +21,8 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: bios_devmem.c /main/5 1996/10/19 18:07:41 kaleb $ */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/bios_mmap.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/bios_mmap.c:1.9 xc/programs/Xserver/hw/xfree86/os-support/shared/bios_mmap.c:1.11 --- xc/programs/Xserver/hw/xfree86/os-support/shared/bios_mmap.c:1.9 Wed May 23 10:46:05 2001 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/bios_mmap.c Mon Jan 9 10:00:25 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/bios_mmap.c,v 1.9 2001/05/23 14:46:05 alanh Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/bios_mmap.c,v 1.11 2006/01/09 15:00:25 dawes Exp $ */ /* * Copyright 1993 by David Wexelblat * @@ -21,9 +21,8 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: bios_V4mmap.c /main/4 1996/02/21 17:54:27 kaleb $ */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/inout.S diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/inout.S:1.1 xc/programs/Xserver/hw/xfree86/os-support/shared/inout.S:1.2 --- xc/programs/Xserver/hw/xfree86/os-support/shared/inout.S:1.1 Sat Jul 10 03:24:52 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/inout.S Mon Jan 9 10:00:25 2006 @@ -1,10 +1,4 @@ -/* $XConsortium: inout.s /main/6 1996/02/21 17:53:35 kaleb $ */ - - - - - -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/inout.S,v 1.1 1999/07/10 07:24:52 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/inout.S,v 1.2 2006/01/09 15:00:25 dawes Exp $ */ #include "assyntax.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/ioperm_noop.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/ioperm_noop.c:3.4 xc/programs/Xserver/hw/xfree86/os-support/shared/ioperm_noop.c:3.6 --- xc/programs/Xserver/hw/xfree86/os-support/shared/ioperm_noop.c:3.4 Mon Jul 23 09:15:48 2001 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/ioperm_noop.c Mon Jan 9 10:00:25 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/ioperm_noop.c,v 3.4 2001/07/23 13:15:48 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/ioperm_noop.c,v 3.6 2006/01/09 15:00:25 dawes Exp $ */ /* * Copyright 1993 by David Wexelblat * @@ -21,14 +21,13 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: ioperm_noop.c /main/3 1996/02/21 17:53:39 kaleb $ */ /* * Some platforms don't bother with I/O permissions, * or the permissions are implicit with opening/enabling the console. */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c:1.108 xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c:1.111 --- xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c:1.108 Mon Nov 22 21:25:44 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c Sat Jan 28 21:19:54 2006 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c,v 1.108 2004/11/23 02:25:44 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c,v 1.111 2006/01/29 02:19:54 tsi Exp $ */ /* - * Copyright 1997-2004 by The XFree86 Project, Inc. + * Copyright 1997-2005 by The XFree86 Project, Inc. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining @@ -49,12 +49,12 @@ #if defined(linux) && !defined(__GLIBC__) #undef __STRICT_ANSI__ #endif -#include +#include #ifdef __UNIXOS2__ #define I_NEED_OS2_H #endif -#include -#include +#include +#include #include #include #if defined(__bsdi__) @@ -68,7 +68,7 @@ #endif #include #include -#include "Xfuncproto.h" +#include #include "os.h" #include #include @@ -518,7 +518,7 @@ if (flags & XF86_MAP_FIXED) f |= MAP_FIXED; if (flags & XF86_MAP_SHARED) f |= MAP_SHARED; if (flags & XF86_MAP_PRIVATE) f |= MAP_PRIVATE; -#if defined(__AMD64__) && defined(linux) +#if (defined(__amd64__) || defined(__x86_64__)) && defined(linux) if (flags & XF86_MAP_32BIT) f |= MAP_32BIT; #endif if (prot & XF86_PROT_EXEC) p |= PROT_EXEC; @@ -1905,7 +1905,7 @@ int xf86shmget(xf86key_t key, int size, int xf86shmflg) { - int shmflg; + int shmflg, status; /* This copies the permissions (SHM_R, SHM_W for u, g, o). */ shmflg = xf86shmflg & 0777; @@ -1915,13 +1915,16 @@ if (xf86shmflg & XF86IPC_CREAT) shmflg |= IPC_CREAT; if (xf86shmflg & XF86IPC_EXCL) shmflg |= IPC_EXCL; if (xf86shmflg & XF86IPC_NOWAIT) shmflg |= IPC_NOWAIT; - return shmget((key_t) key, size, shmflg); + status = shmget((key_t) key, size, shmflg); + xf86errno = xf86GetErrno(); + return status; } char * xf86shmat(int id, char *addr, int xf86shmflg) { int shmflg = 0; + char * status; #ifdef SHM_RDONLY if (xf86shmflg & XF86SHM_RDONLY) shmflg |= SHM_RDONLY; @@ -1933,32 +1936,62 @@ if (xf86shmflg & XF86SHM_REMAP) shmflg |= SHM_REMAP; #endif - return shmat(id,addr,shmflg); + status = shmat(id,addr,shmflg); + xf86errno = xf86GetErrno(); + return status; } int xf86shmdt(char *addr) { - return shmdt(addr); + int status = shmdt(addr); + + xf86errno = xf86GetErrno(); + return status; } -/* - * for now only implement the rmid command. - */ int -xf86shmctl(int id, int xf86cmd, pointer buf) +xf86shmctl(int id, int xf86cmd, struct xf86shmid_ds * buf) { - int cmd; + struct shmid_ds ds, *dsp; + int cmd, status; switch (xf86cmd) { case XF86IPC_RMID: cmd = IPC_RMID; + dsp = NULL; + break; + case XF86IPC_SET: + cmd = IPC_SET; + dsp = &ds; + (void) memset(&ds, 0, sizeof(ds)); + ds.shm_perm.uid = buf->shm_perm.uid; + ds.shm_perm.gid = buf->shm_perm.gid; + ds.shm_perm.cuid = buf->shm_perm.cuid; + ds.shm_perm.cgid = buf->shm_perm.cgid; + ds.shm_perm.mode = buf->shm_perm.mode; + ds.shm_segsz = buf->shm_segsz; + break; + case XF86IPC_STAT: + cmd = IPC_STAT; + dsp = &ds; break; default: - return 0; + return -1; } - return shmctl(id, cmd, buf); + status = shmctl(id, cmd, dsp); + xf86errno = xf86GetErrno(); + if ((status == 0) && (cmd == IPC_STAT)) { + (void) memset(buf, 0, sizeof(*buf)); + buf->shm_perm.uid = ds.shm_perm.uid; + buf->shm_perm.gid = ds.shm_perm.gid; + buf->shm_perm.cuid = ds.shm_perm.cuid; + buf->shm_perm.cgid = ds.shm_perm.cgid; + buf->shm_perm.mode = ds.shm_perm.mode; + buf->shm_segsz = ds.shm_segsz; + } + return status; } #else @@ -1976,7 +2009,7 @@ } int -xf86shmctl(int id, int xf86cmd, pointer buf) +xf86shmctl(int id, int xf86cmd, struct xf86shmid_ds * buf) { return -1; } Index: xc/programs/Xserver/hw/xfree86/os-support/shared/pm_noop.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/pm_noop.c:1.3 xc/programs/Xserver/hw/xfree86/os-support/shared/pm_noop.c:1.4 --- xc/programs/Xserver/hw/xfree86/os-support/shared/pm_noop.c:1.3 Fri Feb 13 18:58:48 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/pm_noop.c Fri Oct 14 11:17:07 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/pm_noop.c,v 1.3 2004/02/13 23:58:48 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/pm_noop.c,v 1.4 2005/10/14 15:17:07 tsi Exp $ */ /* * Copyright (c) 2000 by The XFree86 Project, Inc. * All rights reserved. @@ -48,7 +48,7 @@ /* Stubs for the OS-support layer power-management functions. */ -#include "X.h" +#include #include "os.h" #include "xf86.h" #include "xf86Priv.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c:3.32 xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c:3.34 --- xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c:3.32 Sat Oct 23 11:29:31 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c Mon Jan 9 10:00:25 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c,v 3.32 2004/10/23 15:29:31 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/posix_tty.c,v 3.34 2006/01/09 15:00:25 dawes Exp $ */ /* * Copyright 1993-2003 by The XFree86 Project, Inc. * All rights reserved. @@ -73,9 +73,7 @@ * */ -/* $XConsortium: posix_tty.c /main/7 1996/10/19 18:07:47 kaleb $ */ - -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c:1.19 xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c:1.20 --- xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c:1.19 Mon Jan 24 16:27:10 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c Fri Oct 14 11:17:07 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c,v 1.19 2005/01/24 21:27:10 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/sigio.c,v 1.20 2005/10/14 15:17:07 tsi Exp $ */ /* sigio.c -- Support for SIGIO handler installation and removal * Created: Thu Jun 3 15:39:18 1999 by faith@precisioninsight.com @@ -80,7 +80,7 @@ */ #ifdef XFree86Server -# include "X.h" +# include # include "xf86.h" # include "xf86Priv.h" # include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/sigiostubs.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/sigiostubs.c:1.6 xc/programs/Xserver/hw/xfree86/os-support/shared/sigiostubs.c:1.7 --- xc/programs/Xserver/hw/xfree86/os-support/shared/sigiostubs.c:1.6 Tue Dec 14 20:26:50 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/sigiostubs.c Sun Mar 27 21:51:06 2005 @@ -1,6 +1,6 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/sigiostubs.c,v 1.6 2004/12/15 01:26:50 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/sigiostubs.c,v 1.7 2005/03/28 02:51:06 dawes Exp $ */ /* - * Copyright (c) 1999-2003 by The XFree86 Project, Inc. + * Copyright (c) 1999-2005 by The XFree86 Project, Inc. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining @@ -52,6 +52,7 @@ # endif # include "misc.h" #endif +#include "xf86_OSproc.h" int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *closure) Index: xc/programs/Xserver/hw/xfree86/os-support/shared/stdPci.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/stdPci.c:3.5 xc/programs/Xserver/hw/xfree86/os-support/shared/stdPci.c:3.6 --- xc/programs/Xserver/hw/xfree86/os-support/shared/stdPci.c:3.5 Fri Feb 13 18:58:48 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/stdPci.c Fri Oct 14 11:17:07 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/stdPci.c,v 3.5 2004/02/13 23:58:48 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/stdPci.c,v 3.6 2005/10/14 15:17:07 tsi Exp $ */ /* * Copyright (c) 1999-2003 by The XFree86 Project, Inc. * All rights reserved. @@ -49,7 +49,7 @@ #ifdef __UNIXOS2__ # define I_NEED_OS2_H #endif -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86Privstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/stdResource.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/stdResource.c:1.23 xc/programs/Xserver/hw/xfree86/os-support/shared/stdResource.c:1.24 --- xc/programs/Xserver/hw/xfree86/os-support/shared/stdResource.c:1.23 Fri Feb 13 18:58:48 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/stdResource.c Fri Oct 14 11:17:07 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/stdResource.c,v 1.23 2004/02/13 23:58:48 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/stdResource.c,v 1.24 2005/10/14 15:17:07 tsi Exp $ */ /* * Copyright (c) 1999-2003 by The XFree86 Project, Inc. * All rights reserved. @@ -51,7 +51,7 @@ #ifdef __UNIXOS2__ # define I_NEED_OS2_H #endif -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86Privstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/std_kbdEv.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/std_kbdEv.c:3.3 xc/programs/Xserver/hw/xfree86/os-support/shared/std_kbdEv.c:3.5 --- xc/programs/Xserver/hw/xfree86/os-support/shared/std_kbdEv.c:3.3 Thu May 6 22:56:23 1999 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/std_kbdEv.c Mon Jan 9 10:00:25 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/std_kbdEv.c,v 3.3 1999/05/07 02:56:23 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/std_kbdEv.c,v 3.5 2006/01/09 15:00:25 dawes Exp $ */ /* * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany * Copyright 1993 by David Dawes @@ -23,9 +23,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: std_kbdEv.c /main/4 1996/03/11 10:47:33 kaleb $ */ -#include "X.h" +#include #include "xf86.h" #include "xf86Priv.h" #include "xf86_OSlib.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/sysv_kbd.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/sysv_kbd.c:3.5 xc/programs/Xserver/hw/xfree86/os-support/shared/sysv_kbd.c:3.7 --- xc/programs/Xserver/hw/xfree86/os-support/shared/sysv_kbd.c:3.5 Sat Apr 3 17:26:25 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/sysv_kbd.c Mon Jan 9 10:00:25 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/sysv_kbd.c,v 3.5 2004/04/03 22:26:25 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/sysv_kbd.c,v 3.7 2006/01/09 15:00:25 dawes Exp $ */ /* * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany * Copyright 1993 by David Dawes @@ -23,9 +23,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: sysv_kbd.c /main/3 1996/02/21 17:53:59 kaleb $ */ -#include "X.h" +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/shared/vidmem.c diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/vidmem.c:1.18 xc/programs/Xserver/hw/xfree86/os-support/shared/vidmem.c:1.19 --- xc/programs/Xserver/hw/xfree86/os-support/shared/vidmem.c:1.18 Fri Feb 13 18:58:49 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/shared/vidmem.c Fri Oct 14 11:17:08 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/vidmem.c,v 1.18 2004/02/13 23:58:49 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/vidmem.c,v 1.19 2005/10/14 15:17:08 tsi Exp $ */ /* * Copyright (c) 1993-2003 by The XFree86 Project, Inc. * All rights reserved. @@ -50,7 +50,7 @@ #ifdef __UNIXOS2__ # define I_NEED_OS2_H #endif -#include "X.h" +#include #include "input.h" #include "scrnintstr.h" Index: xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile:1.8 xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile:1.11 --- xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile:1.8 Mon Jan 24 16:27:10 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile Sat Jan 28 21:16:20 2006 @@ -1,6 +1,6 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile,v 1.8 2005/01/24 21:27:10 tsi Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile,v 1.11 2006/01/29 02:16:20 tsi Exp $ XCOMM -XCOMM Copyright 2001 The XFree86 Project, Inc. +XCOMM Copyright 2001-2006 The XFree86 Project, Inc. XCOMM All rights reserved. XCOMM XCOMM Permission is hereby granted, free of charge, to any person obtaining @@ -52,7 +52,7 @@ #if !HasGcc && defined(i386Architecture) PROWORKS_INOUT_SRC = sun_inout.s -PROWORKS_INOUT_OBJ = sun_inout.s +PROWORKS_INOUT_OBJ = sun_inout.o #endif #if defined(i386Architecture) && (OSMinorVersion < 8) @@ -87,16 +87,17 @@ sun_mouse.o sun_vid.o agp_noop.o libc_wrapper.o kmod_noop.o pm_noop.o \ posix_tty.o $(SIGIO).o stdPci.o stdResource.o $(VTSW_OBJ) -INCLUDES = -I. -I$(XF86OSSRC) -I$(XF86COMSRC) \ - -I$(SERVERSRC)/mi -I$(SERVERSRC)/include -I$(SERVERSRC)/Xext \ - -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86OSSRC) -I$(XF86COMSRC) \ + -I$(SERVERSRC)/mi -I$(SERVERSRC)/include -I$(SERVERSRC)/Xext -DEFINES = -DUSESTDRES -DBSD_COMP +DEFINES = $(EXT_DEFINES) -DUSESTDRES -DBSD_COMP SubdirLibraryRule($(OBJS)) NormalLibraryObjectRule() NormalAsmObjectRule() +SpecialCObjectRule(sun_kbdEv,$(ICONFIGFILES),NullParameter) + LinkSourceFile($(VTSW_SRC),../shared) LinkSourceFile(agp_noop.c,../shared) LinkSourceFile(libc_wrapper.c,../shared) Index: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c:1.6 xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c:1.9 --- xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c:1.6 Thu Jun 6 09:49:34 2002 +++ xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c Wed Jan 11 21:41:51 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c,v 1.6 2002/06/06 13:49:34 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c,v 1.9 2006/01/12 02:41:51 dawes Exp $ */ /* * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany * Copyright 1993 by David Wexelblat @@ -165,7 +165,14 @@ if (ioctl(xf86Info.consoleFd, KDSETMODE, KD_GRAPHICS) < 0) FatalError("xf86OpenConsole: KDSETMODE KD_GRAPHICS failed\n"); +#else +#ifdef KDSETMODE + /* This may fail. */ + ioctl(xf86Info.consoleFd, KDSETMODE, KD_GRAPHICS); +#endif +#endif } +#ifdef HAS_USL_VTS else /* serverGeneration != 1 */ { /* @@ -184,10 +191,10 @@ */ if (!xf86Screens[0]->vtSema) sleep(5); + } #endif /* HAS_USL_VTS */ - } } void @@ -196,15 +203,13 @@ #ifdef HAS_USL_VTS struct vt_mode VT; #endif -#if defined(__SOL8__) || !defined(i386) +#if defined(__SOL8__) || defined(__sparc__) int tmp; #endif -#ifndef i386 +#ifdef __sparc__ if (!xf86DoProbe && !xf86DoConfigure) { - int fd; - /* * Wipe out framebuffer just like the non-SI Xsun server does. This * could be improved by saving framebuffer contents in @@ -212,39 +217,37 @@ * at this point whether this should be done for all framebuffers in * the system, rather than only the console. */ - if ((fd = open("/dev/fb", O_RDWR, 0)) < 0) { + struct fbgattr fbattr; + + if ((ioctl(xf86Info.consoleFd, FBIOGATTR, &fbattr) < 0) && + (ioctl(xf86Info.consoleFd, FBIOGTYPE, &fbattr.fbtype) < 0)) { xf86Msg(X_WARNING, - "xf86CloseConsole(): unable to open framebuffer (%s)\n", - strerror(errno)); + "xf86CloseConsole(): unable to retrieve framebuffer" + " attributes (%s)\n", strerror(errno)); } else { - struct fbgattr fbattr; + pointer fbdata; - if ((ioctl(fd, FBIOGATTR, &fbattr) < 0) && - (ioctl(fd, FBIOGTYPE, &fbattr.fbtype) < 0)) { + fbdata = mmap(NULL, fbattr.fbtype.fb_size, + PROT_READ | PROT_WRITE, MAP_SHARED, + xf86Info.consoleFd, 0); + if (fbdata == MAP_FAILED) { xf86Msg(X_WARNING, - "xf86CloseConsole(): unable to retrieve framebuffer" - " attributes (%s)\n", strerror(errno)); + "xf86CloseConsole(): unable to mmap framebuffer" + " (%s)\n", strerror(errno)); } else { - pointer fbdata; - - fbdata = mmap(NULL, fbattr.fbtype.fb_size, - PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0); - if (fbdata == MAP_FAILED) { - xf86Msg(X_WARNING, - "xf86CloseConsole(): unable to mmap framebuffer" - " (%s)\n", strerror(errno)); - } else { - (void)memset(fbdata, 0, fbattr.fbtype.fb_size); - (void)munmap(fbdata, fbattr.fbtype.fb_size); - } + (void)memset(fbdata, 0, fbattr.fbtype.fb_size); + (void)munmap(fbdata, fbattr.fbtype.fb_size); } - - close(fd); } } #endif +#ifdef KDSETMODE + /* Reset the display back to text mode */ + ioctl(xf86Info.consoleFd, KDSETMODE, KD_TEXT); +#endif + #ifdef HAS_USL_VTS /* @@ -261,8 +264,6 @@ * Did the whole thing similarly to the way linux does it */ - /* Reset the display back to text mode */ - ioctl(xf86Info.consoleFd, KDSETMODE, KD_TEXT); if (ioctl(xf86Info.consoleFd, VT_GETMODE, &VT) != -1) { VT.mode = VT_AUTO; /* Set default vt handling */ @@ -276,7 +277,7 @@ close(xf86Info.consoleFd); -#if defined(__SOL8__) || !defined(i386) +#if defined(__SOL8__) || defined(__sparc__) /* * This probably shouldn't be here. However, there is no corresponding @@ -333,7 +334,7 @@ #endif /* HAS_USL_VTS */ -#if defined(__SOL8__) || !defined(i386) +#if defined(__SOL8__) || defined(__sparc__) if ((i + 1) < argc) { if (!strcmp(argv[i], "-dev")) { @@ -363,7 +364,7 @@ #ifdef HAS_USL_VTS ErrorF("vtXX Use the specified VT number\n"); #endif -#if defined(__SOL8__) || !defined(i386) +#if defined(__SOL8__) || defined(__sparc__) ErrorF("-dev Framebuffer device\n"); ErrorF("-ar1 Set autorepeat initiate time (sec)\n"); ErrorF(" (if not using XKB)\n"); Index: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbd.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbd.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbd.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbd.c:1.4 Fri Feb 11 14:45:08 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbd.c Wed Jul 20 17:12:43 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbd.c,v 1.4 2005/02/11 19:45:08 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbd.c,v 1.5 2005/07/20 21:12:43 tsi Exp $ */ /* * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany * Copyright 1993 by David Dawes @@ -55,7 +55,8 @@ void xf86KbdInit() { - int klayout; + const char *ktype_name; + int klayout; if (xf86Info.kbdFd < 0) { xf86Info.kbdFd = open("/dev/kbd", O_RDWR|O_NONBLOCK); @@ -64,7 +65,7 @@ } /* - * None of the followin should ever fail. If it does, something is + * None of the following should ever fail. If it does, something is * broken (IMO) - DWH 8/21/99 */ @@ -83,6 +84,35 @@ if (ioctl(xf86Info.kbdFd, KIOCGDIRECT, &sun_odirect) < 0) xf86Msg(X_ERROR, "Unable to determine keyboard direct setting.\n"); + + switch (sun_ktype) { +#ifdef KB_SUN3 + case KB_SUN3: + ktype_name = "Sun Type 3"; + break; +#endif +#ifdef KB_SUN4 + case KB_SUN4: + ktype_name = "Sun Type 4/5/6"; + break; +#endif +#ifdef KB_USB + case KB_USB: + ktype_name = "USB"; + break; +#endif +#ifdef KB_PC + case KB_PC: + ktype_name = "PC"; + break; +#endif + default: + ktype_name = "Unknown"; + break; + } + + xf86Msg(X_PROBED, "Keyboard type: %s (%d)\n", ktype_name, sun_ktype); + xf86Msg(X_PROBED, "Keyboard layout: %d\n", klayout); } int Index: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbdEv.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbdEv.c:1.7 xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbdEv.c:1.8 --- xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbdEv.c:1.7 Mon Jan 24 16:27:11 2005 +++ xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbdEv.c Fri Oct 14 11:17:08 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbdEv.c,v 1.7 2005/01/24 21:27:11 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_kbdEv.c,v 1.8 2005/10/14 15:17:08 tsi Exp $ */ /* * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany. * Copyright 1993 by David Dawes @@ -29,8 +29,8 @@ #include "xf86_OSlib.h" #ifdef XINPUT -#include "XI.h" -#include "XIproto.h" +#include +#include #include "xf86Xinput.h" #else #include "inputstr.h" @@ -55,7 +55,7 @@ #ifdef XTESTEXT1 #define XTestSERVER_SIDE -#include "xtestext1.h" +#include extern short xtest_mousex; extern short xtest_mousey; Index: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_vid.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_vid.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_vid.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_vid.c:1.4 Mon Mar 8 10:37:12 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_vid.c Sun Feb 19 19:14:37 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_vid.c,v 1.4 2004/03/08 15:37:12 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_vid.c,v 1.5 2006/02/20 00:14:37 dawes Exp $ */ /* * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany * Copyright 1993 by David Wexelblat @@ -110,6 +110,7 @@ #ifdef i386 static Bool ExtendedEnabled = FALSE; +extern int sysi86(int, ...); #endif void Index: xc/programs/Xserver/hw/xfree86/os-support/sysv/Imakefile diff -u xc/programs/Xserver/hw/xfree86/os-support/sysv/Imakefile:3.27 xc/programs/Xserver/hw/xfree86/os-support/sysv/Imakefile:3.29 --- xc/programs/Xserver/hw/xfree86/os-support/sysv/Imakefile:3.27 Mon Nov 22 21:25:44 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/sysv/Imakefile Mon Jan 9 10:00:25 2006 @@ -1,10 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/Imakefile,v 3.27 2004/11/23 02:25:44 dawes Exp $ - - - - - -XCOMM $XConsortium: Imakefile /main/10 1996/10/25 11:38:05 kaleb $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/Imakefile,v 3.29 2006/01/09 15:00:25 dawes Exp $ #include @@ -27,8 +21,8 @@ libc_wrapper.o stdResource.o stdPci.o vidmem.o sigiostubs.o pm_noop.o \ kmod_noop.o agp_noop.o -INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ - -I$(XINCLUDESRC) -I$(EXTINCSRC) -I$(SERVERSRC)/mi +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include \ + -I$(SERVERSRC)/mi RESDEFINES = -DUSESTDRES Index: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c:3.5 xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c:3.7 --- xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c:3.5 Sat Jul 25 12:57:08 1998 +++ xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c Mon Jan 9 10:00:25 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c,v 3.5 1998/07/25 16:57:08 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c,v 3.7 2006/01/09 15:00:25 dawes Exp $ */ /* * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany * Copyright 1993 by David Wexelblat @@ -23,10 +23,9 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: sysv_init.c /main/4 1996/02/21 17:54:31 kaleb $ */ -#include "X.h" -#include "Xmd.h" +#include +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c:3.11 xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c:3.13 --- xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c:3.11 Mon Feb 17 10:12:00 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c Mon Jan 9 10:00:26 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c,v 3.11 2003/02/17 15:12:00 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_io.c,v 3.13 2006/01/09 15:00:26 dawes Exp $ */ /* * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany * Copyright 1993 by David Dawes @@ -23,9 +23,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: sysv_io.c /main/8 1996/10/19 18:08:06 kaleb $ */ -#include "X.h" +#include #include "compiler.h" Index: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_mouse.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_mouse.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_mouse.c:1.5 --- xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_mouse.c:1.4 Fri Feb 13 18:58:49 2004 +++ xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_mouse.c Fri Oct 14 11:17:08 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_mouse.c,v 1.4 2004/02/13 23:58:49 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_mouse.c,v 1.5 2005/10/14 15:17:08 tsi Exp $ */ /* * Copyright 1999 by The XFree86 Project, Inc. @@ -47,7 +47,7 @@ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "X.h" +#include #include "xf86.h" #include "xf86Xinput.h" #include "xf86OSmouse.h" Index: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_video.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_video.c:3.21 xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_video.c:3.23 --- xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_video.c:3.21 Fri Mar 14 08:46:08 2003 +++ xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_video.c Mon Jan 9 10:00:26 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_video.c,v 3.21 2003/03/14 13:46:08 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_video.c,v 3.23 2006/01/09 15:00:26 dawes Exp $ */ /* * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany * Copyright 1993 by David Wexelblat @@ -23,9 +23,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: sysv_video.c /main/8 1996/10/25 11:38:09 kaleb $ */ -#include "X.h" +#include #define _NEED_SYSI86 #include "xf86.h" Index: xc/programs/Xserver/hw/xfree86/os-support/sysv/xqueue.c diff -u xc/programs/Xserver/hw/xfree86/os-support/sysv/xqueue.c:3.20 xc/programs/Xserver/hw/xfree86/os-support/sysv/xqueue.c:3.22 --- xc/programs/Xserver/hw/xfree86/os-support/sysv/xqueue.c:3.20 Tue Mar 6 13:20:31 2001 +++ xc/programs/Xserver/hw/xfree86/os-support/sysv/xqueue.c Mon Jan 9 10:00:26 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/xqueue.c,v 3.20 2001/03/06 18:20:31 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/xqueue.c,v 3.22 2006/01/09 15:00:26 dawes Exp $ */ /* * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany * Copyright 1993-1999 by The XFree86 Project, Inc. @@ -22,9 +22,8 @@ * PERFORMANCE OF THIS SOFTWARE. * */ -/* $XConsortium: xqueue.c /main/8 1996/10/19 18:08:11 kaleb $ */ -#include "X.h" +#include #include "compiler.h" #include "xf86.h" Index: xc/programs/Xserver/hw/xfree86/parser/Files.c diff -u xc/programs/Xserver/hw/xfree86/parser/Files.c:1.19 xc/programs/Xserver/hw/xfree86/parser/Files.c:1.20 --- xc/programs/Xserver/hw/xfree86/parser/Files.c:1.19 Wed Jan 26 00:31:50 2005 +++ xc/programs/Xserver/hw/xfree86/parser/Files.c Sat Apr 30 13:04:00 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Files.c,v 1.19 2005/01/26 05:31:50 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Files.c,v 1.20 2005/04/30 17:04:00 tsi Exp $ */ /* * * Copyright (c) 1997 Metro Link Incorporated @@ -354,7 +354,7 @@ fprintf (cf, "\tFontPath \"%s\"\n", s); } xf86printOptionList(cf, ptr->file_option_lst, 1); - fprintf(cf, "EndSection\n"); + fprintf(cf, "EndSection\n\n"); ptr = ptr->list.next; } } Index: xc/programs/Xserver/hw/xfree86/parser/Imakefile diff -u xc/programs/Xserver/hw/xfree86/parser/Imakefile:1.14 xc/programs/Xserver/hw/xfree86/parser/Imakefile:1.15 --- xc/programs/Xserver/hw/xfree86/parser/Imakefile:1.14 Fri Jan 7 18:03:14 2005 +++ xc/programs/Xserver/hw/xfree86/parser/Imakefile Fri Oct 14 11:17:08 2005 @@ -1,20 +1,7 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Imakefile,v 1.14 2005/01/07 23:03:14 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Imakefile,v 1.15 2005/10/14 15:17:08 tsi Exp $ */ - -#define DoNormalLib YES -#define DoSharedLib NO -#define DoDebugLib NO -#define DoProfileLib NO -#define HasSharedData NO -#define LibName xf86config - -#define UseDBMalloc NO - -#if UseDBMalloc -SYS_LIBRARIES=-ldbmalloc -DBMALLOCDEFINE=-DDBMALLOC -#endif +#include SYS_LIBRARIES = MathLibrary @@ -22,10 +9,6 @@ XCONFIGDIR = XConfigDir XVERS = XFree86Version -INCLUDES = -I. -I$(XF86OSSRC) - -HEADERS = xf86Parser.h xf86Optrec.h - SRCS = Device.c Files.c Flags.c Input.c Keyboard.c Layout.c Module.c \ Video.c Monitor.c Pointer.c Screen.c Vendor.c read.c scan.c write.c \ cpconfig.c @@ -37,7 +20,10 @@ -DXCONFIGFILE=\"$(XCONFIGFILE)\" \ -DXVERSION="$(XVERS)" -#include +NormalAsmObjectRule() + +NormalLibraryObjectRule() +NormalLibraryTarget(xf86config,$(OBJS)) SpecialCObjectRule(scan,NullParameter,$(CONFIG_DEFINES) $(MODULEDEFINES) $(EXT_DEFINES)) Index: xc/programs/Xserver/hw/xfree86/parser/cpconfig.c diff -u xc/programs/Xserver/hw/xfree86/parser/cpconfig.c:1.7 xc/programs/Xserver/hw/xfree86/parser/cpconfig.c:1.8 --- xc/programs/Xserver/hw/xfree86/parser/cpconfig.c:1.7 Mon Feb 17 11:08:29 2003 +++ xc/programs/Xserver/hw/xfree86/parser/cpconfig.c Thu Oct 13 13:27:58 2005 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/cpconfig.c,v 1.7 2003/02/17 16:08:29 dawes Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/cpconfig.c,v 1.8 2005/10/13 17:27:58 tsi Exp $ */ /* * * Copyright (c) 1997 Metro Link Incorporated @@ -58,10 +58,6 @@ #endif -#define CONFPATH "%A,%R,/etc/X11/%R,%P/etc/X11/%R,%E,%F,/etc/X11/%F," \ - "%P/etc/X11/%F,%D/%X,/etc/X11/%X,/etc/%X,%P/etc/X11/%X.%H," \ - "%P/etc/X11/%X,%P/lib/X11/%X.%H,%P/lib/X11/%X" - int main (int argc, char *argv[]) { @@ -73,7 +69,7 @@ { cmdline = argv[1]; } - if ((filename = xf86openConfigFile (CONFPATH, cmdline, NULL))) + if ((filename = xf86openConfigFile (NULL, cmdline, NULL))) { fprintf (stderr, "Opened %s for the config file\n", filename); } Index: xc/programs/Xserver/hw/xfree86/rac/Imakefile diff -u xc/programs/Xserver/hw/xfree86/rac/Imakefile:1.8 xc/programs/Xserver/hw/xfree86/rac/Imakefile:1.9 --- xc/programs/Xserver/hw/xfree86/rac/Imakefile:1.8 Mon May 31 20:17:06 2004 +++ xc/programs/Xserver/hw/xfree86/rac/Imakefile Fri Oct 14 11:17:09 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/rac/Imakefile,v 1.8 2004/06/01 00:17:06 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/rac/Imakefile,v 1.9 2005/10/14 15:17:09 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -57,9 +57,8 @@ SRCS = xf86RAC.c $(MODSRC) OBJS = xf86RAC.o $(MODOBJ) -INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \ - -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(SERVERSRC)/render \ - -I$(XINCLUDESRC) -I$(EXTINCSRC) +INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \ + -I$(SERVERSRC)/include -I$(SERVERSRC)/mi -I$(SERVERSRC)/render ModuleObjectRule() Index: xc/programs/Xserver/hw/xfree86/rac/xf86RAC.c diff -u xc/programs/Xserver/hw/xfree86/rac/xf86RAC.c:1.9 xc/programs/Xserver/hw/xfree86/rac/xf86RAC.c:1.10 --- xc/programs/Xserver/hw/xfree86/rac/xf86RAC.c:1.9 Wed Feb 16 12:03:56 2005 +++ xc/programs/Xserver/hw/xfree86/rac/xf86RAC.c Fri Oct 14 11:17:09 2005 @@ -1,11 +1,11 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/rac/xf86RAC.c,v 1.9 2005/02/16 17:03:56 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/rac/xf86RAC.c,v 1.10 2005/10/14 15:17:09 tsi Exp $ */ #include "misc.h" #include "xf86.h" #include "xf86_ansic.h" #include "xf86_OSproc.h" -#include "X.h" +#include #include "colormapst.h" #include "scrnintstr.h" #include "screenint.h" Index: xc/programs/Xserver/hw/xfree86/ramdac/Imakefile diff -u xc/programs/Xserver/hw/xfree86/ramdac/Imakefile:1.13 xc/programs/Xserver/hw/xfree86/ramdac/Imakefile:1.14 --- xc/programs/Xserver/hw/xfree86/ramdac/Imakefile:1.13 Mon May 31 20:17:06 2004 +++ xc/programs/Xserver/hw/xfree86/ramdac/Imakefile Fri Oct 14 11:17:09 2005 @@ -1,4 +1,4 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/Imakefile,v 1.13 2004/06/01 00:17:06 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/Imakefile,v 1.14 2005/10/14 15:17:09 tsi Exp $ /* * Copyright (c) 1994-2004 by The XFree86 Project, Inc. * All rights reserved. @@ -60,9 +60,9 @@ OBJS = $(MODOBJ) xf86RamDac.o xf86RamDacCmap.o xf86Cursor.o xf86HWCurs.o \ xf86BitOrder.o IBM.o BT.o TI.o - INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/Xext \ + INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/Xext \ -I$(SERVERSRC)/cfb -I$(SERVERSRC)/mfb -I$(SERVERSRC)/mi \ - -I$(SERVERSRC)/include -I$(XINCLUDESRC) -I$(FONTINCSRC) + -I$(SERVERSRC)/include LINTLIBS = ../../../dix/llib-ldix.ln ../../../os/llib-los.ln \ ../../mfb/llib-lmfb.ln ../../mi/llib-lmi.ln Index: xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c diff -u xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c:1.13 xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c:1.14 --- xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c:1.13 Tue Mar 4 16:21:15 2003 +++ xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c Fri Oct 14 11:17:09 2005 @@ -1,11 +1,11 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c,v 1.13 2003/03/04 21:21:15 mvojkovi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/xf86HWCurs.c,v 1.14 2005/10/14 15:17:09 tsi Exp $ */ #include "misc.h" #include "xf86.h" #include "xf86_ansic.h" #include "xf86_OSproc.h" -#include "X.h" +#include #include "scrnintstr.h" #include "pixmapstr.h" #include "windowstr.h" Index: xc/programs/Xserver/hw/xfree86/ramdac/xf86RamDacCmap.c diff -u xc/programs/Xserver/hw/xfree86/ramdac/xf86RamDacCmap.c:1.7 xc/programs/Xserver/hw/xfree86/ramdac/xf86RamDacCmap.c:1.8 --- xc/programs/Xserver/hw/xfree86/ramdac/xf86RamDacCmap.c:1.7 Tue Jul 25 21:52:24 2000 +++ xc/programs/Xserver/hw/xfree86/ramdac/xf86RamDacCmap.c Fri Oct 14 11:17:09 2005 @@ -23,10 +23,10 @@ * * Generic RAMDAC access to colormaps. */ -/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/xf86RamDacCmap.c,v 1.7 2000/07/26 01:52:24 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/xf86RamDacCmap.c,v 1.8 2005/10/14 15:17:09 tsi Exp $ */ -#include "X.h" -#include "Xproto.h" +#include +#include #include "windowstr.h" #include "mipointer.h" #include "micmap.h" Index: xc/programs/Xserver/hw/xfree86/scanpci/Imakefile diff -u xc/programs/Xserver/hw/xfree86/scanpci/Imakefile:1.11 xc/programs/Xserver/hw/xfree86/scanpci/Imakefile:1.12 --- xc/programs/Xserver/hw/xfree86/scanpci/Imakefile:1.11 Sun Dec 22 20:46:17 2002 +++ xc/programs/Xserver/hw/xfree86/scanpci/Imakefile Fri Oct 14 11:17:09 2005 @@ -1,5 +1,5 @@ -XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/Imakefile,v 1.11 2002/12/23 01:46:17 dawes Exp $ +XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/Imakefile,v 1.12 2005/10/14 15:17:09 tsi Exp $ #if DoLoadableServer #define IHaveSubdirs @@ -11,8 +11,7 @@ MODPATHDEFINES = -DDEFAULT_MODULE_PATH=\"$(MODULEDIR)\" INCLUDES = -I$(XF86SRC)/common -I$(XF86OSSRC) -I$(XF86OSSRC)/bus \ -I$(SERVERSRC)/include -I$(SERVERSRC)/os \ - -I$(XINCLUDESRC) -I$(SERVERSRC)/Xext -I$(EXTINCSRC) \ - -I$(SERVERSRC)/Xi \ + -I$(SERVERSRC)/Xext -I$(SERVERSRC)/Xi \ -I$(FONTLIBSRC)/include -I$(XF86PARSERSRC) \ -I$(XF86SRC)/loader $(VGAINCLUDES) -I$(XF86SRC)/rac Index: xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h diff -u xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h:1.21 xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h:1.24 --- xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h:1.21 Tue Feb 15 16:31:09 2005 +++ xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h Tue Apr 11 21:07:29 2006 @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h,v 1.21 2005/02/15 21:31:09 tsi Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h,v 1.24 2006/04/12 01:07:29 dawes Exp $ */ /* * THIS FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT @@ -85,10 +85,6 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_0070[] = "Hauppauge computer works Inc."; -static const char pci_device_0070_4000[] = "WinTV PVR-350"; -static const char pci_device_0070_4001[] = "WinTV PVR-250 (v1)"; -static const char pci_device_0070_4009[] = "WinTV PVR-250"; -static const char pci_device_0070_4801[] = "WinTV PVR-250 MCE"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_0071[] = "Nebula Electronics Ltd."; @@ -98,6 +94,9 @@ static const char pci_device_0095_0680[] = "Ultra ATA/133 IDE RAID CONTROLLER CARD"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_00a7[] = "Teles AG (Wrong ID)"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_0100[] = "Ncipher Corp Ltd"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -109,6 +108,9 @@ static const char pci_device_021b_8139[] = "HNE-300 (RealTek RTL8139c) [iPaq Networking]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_0270[] = "Hauppauge computer works Inc. (Wrong ID)"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_0291[] = "Davicom Semiconductor, Inc."; static const char pci_device_0291_8212[] = "DM9102A(DM9102AE, SM9102AF) Ethernet 100/10 MBit(Rev 40)"; #endif @@ -121,13 +123,45 @@ static const char pci_device_0357_000a[] = "TTP-Monitoring Card V2.0"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_0432[] = "SCM Microsystems, Inc."; +static const char pci_device_0432_0001[] = "Pluto2 DVB-T Receiver for PCMCIA [EasyWatch MobilSet]"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_045e[] = "Microsoft"; +static const char pci_device_045e_006e[] = "MN-510 802.11b wireless USB paddle"; +static const char pci_device_045e_00c2[] = "MN-710 wireless USB paddle"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_04cf[] = "Myson Century, Inc"; +static const char pci_device_04cf_8818[] = "CS8818 USB2.0-to-ATAPI Bridge Controller with Embedded PHY"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_050d[] = "Belkin"; +static const char pci_device_050d_7050[] = "F5D7050 802.11g Wireless USB Adapter"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_05e3[] = "CyberDoor"; static const char pci_device_05e3_0701[] = "CBD516"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_066f[] = "Sigmatel Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_0675[] = "Dynalink"; static const char pci_device_0675_1700[] = "IS64PH ISDN Adapter"; static const char pci_device_0675_1702[] = "IS64PH ISDN Adapter"; +static const char pci_device_0675_1703[] = "ISDN Adapter (PCI Bus, DV, W)"; +static const char pci_device_0675_1704[] = "ISDN Adapter (PCI Bus, D, C)"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_067b[] = "Prolific Technology, Inc."; +static const char pci_device_067b_3507[] = "PL-3507 Hi-Speed USB & IEEE 1394 Combo to IDE Bridge Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_0721[] = "Sapphire, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_07e2[] = "ELMEG Communication Systems GmbH"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_0925[] = "VIA Technologies, Inc. (Wrong ID)"; @@ -161,9 +195,11 @@ #endif static const char pci_device_0e11_0049[] = "NC7132 Gigabit Upgrade Module"; static const char pci_device_0e11_004a[] = "NC6136 Gigabit Server Adapter"; +static const char pci_device_0e11_005a[] = "Remote Insight II board - Lights-Out"; static const char pci_device_0e11_007c[] = "NC7770 1000BaseTX"; static const char pci_device_0e11_007d[] = "NC6770 1000BaseTX"; static const char pci_device_0e11_0085[] = "NC7780 1000BaseTX"; +static const char pci_device_0e11_00b1[] = "Remote Insight II board - PCI device"; static const char pci_device_0e11_00bb[] = "NC7760"; static const char pci_device_0e11_00ca[] = "NC7771"; static const char pci_device_0e11_00cb[] = "NC7781"; @@ -411,6 +447,11 @@ static const char pci_device_1000_0030[] = "53c1030 PCI-X Fusion-MPT Dual Ultra320 SCSI"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0030_0e11_00da[] = "ProLiant ML 350"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1000_0030_1028_0123[] = "PowerEdge 2600"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -426,9 +467,20 @@ #ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0030_1028_0183[] = "PowerEdge 1800"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1000_0030_1028_1010[] = "LSI U320 SCSI Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0030_124b_1170[] = "PMC-USCSI320"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0030_1734_1052[] = "Primergy RX300 S2"; +#endif static const char pci_device_1000_0031[] = "53c1030ZC PCI-X Fusion-MPT Dual Ultra320 SCSI"; static const char pci_device_1000_0032[] = "53c1035 PCI-X Fusion-MPT Dual Ultra320 SCSI"; #ifdef INIT_SUBSYS_INFO @@ -443,6 +495,18 @@ static const char pci_subsys_1000_0040_1000_0066[] = "MegaRAID SCSI 320-2XRWS"; #endif static const char pci_device_1000_0041[] = "53C1035ZC PCI-X Fusion-MPT Dual Ultra320 SCSI"; +static const char pci_device_1000_0050[] = "SAS1064 PCI-X Fusion-MPT SAS"; +static const char pci_device_1000_0054[] = "SAS1068 PCI-X Fusion-MPT SAS"; +static const char pci_device_1000_0056[] = "SAS1064E PCI-Express Fusion-MPT SAS"; +static const char pci_device_1000_0058[] = "SAS1068E PCI-Express Fusion-MPT SAS"; +static const char pci_device_1000_005a[] = "SAS1066E PCI-Express Fusion-MPT SAS"; +static const char pci_device_1000_005c[] = "SAS1064A PCI-X Fusion-MPT SAS"; +static const char pci_device_1000_005e[] = "SAS1066 PCI-X Fusion-MPT SAS"; +static const char pci_device_1000_0060[] = "SAS1078 PCI-X Fusion-MPT SAS"; +static const char pci_device_1000_0062[] = "SAS1078 PCI-Express Fusion-MPT SAS"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1000_0062_1000_0062[] = "SAS1078 PCI-Express Fusion-MPT SAS"; +#endif static const char pci_device_1000_008f[] = "53c875J"; #endif #ifdef INIT_SUBSYS_INFO @@ -551,6 +615,9 @@ static const char pci_device_1000_0627[] = "FC929X LAN"; static const char pci_device_1000_0628[] = "FC919X Fibre Channel Adapter"; static const char pci_device_1000_0629[] = "FC919X LAN"; +static const char pci_device_1000_0640[] = "FC949X Fibre Channel Adapter"; +static const char pci_device_1000_0642[] = "FC939X Fibre Channel Adapter"; +static const char pci_device_1000_0646[] = "FC949ES Fibre Channel Adapter"; static const char pci_device_1000_0701[] = "83C885 NT50 DigitalScape Fast Ethernet"; static const char pci_device_1000_0702[] = "Yellowfin G-NIC gigabit ethernet"; #ifdef INIT_SUBSYS_INFO @@ -626,6 +693,7 @@ #endif static const char pci_vendor_1002[] = "ATI Technologies Inc"; static const char pci_device_1002_3150[] = "M24 1P [Radeon Mobility X600]"; +static const char pci_device_1002_3152[] = "M22 [Radeon Mobility X300]"; static const char pci_device_1002_3154[] = "M24 1T [FireGL M24 GL]"; static const char pci_device_1002_3e50[] = "RV380 0x3e50 [Radeon X600]"; static const char pci_device_1002_3e54[] = "RV380 0x3e54 [FireGL V3200]"; @@ -648,6 +716,9 @@ static const char pci_subsys_1002_4150_1002_0003[] = "R9600 Pro secondary (Asus OEM for HP)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4150_1002_4722[] = "All-in-Wonder 2006 AGP Edition"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4150_1458_4024[] = "Giga-Byte GV-R96128D Primary"; #endif #ifdef INIT_SUBSYS_INFO @@ -677,9 +748,24 @@ static const char pci_subsys_1002_4152_1002_0002[] = "Radeon 9600XT"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4152_1002_4772[] = "All-in-Wonder 9600 XT"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4152_1043_c002[] = "Radeon 9600 XT TVD"; #endif -static const char pci_device_1002_4153[] = "RV350 AS [Radeon 9600 AS]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4152_1043_c01a[] = "A9600XT/TD"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4152_174b_7c29[] = "Sapphire Radeon 9600XT"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4152_1787_4002[] = "Radeon 9600 XT"; +#endif +static const char pci_device_1002_4153[] = "RV350 AS [Radeon 9550]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4153_1462_932c[] = "865PE Neo2-V (MS-6788) mainboard"; +#endif static const char pci_device_1002_4154[] = "RV350 AT [Fire GL T2]"; static const char pci_device_1002_4155[] = "RV350 AU [Fire GL T2]"; static const char pci_device_1002_4156[] = "RV350 AV [Fire GL T2]"; @@ -691,6 +777,12 @@ static const char pci_device_1002_4168[] = "Radeon R350 [Radeon 9800] (Secondary)"; static const char pci_device_1002_4170[] = "RV350 AP [Radeon 9600] (Secondary)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4170_1002_0003[] = "R9600 Pro secondary (Asus OEM for HP)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4170_1002_4723[] = "All-in-Wonder 2006 AGP Edition (Secondary)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4170_1458_4025[] = "Giga-Byte GV-R96128D Secondary"; #endif #ifdef INIT_SUBSYS_INFO @@ -714,8 +806,20 @@ static const char pci_subsys_1002_4172_1002_0003[] = "Radeon 9600XT (Secondary)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4172_1002_4773[] = "All-in-Wonder 9600 XT (Secondary)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4172_1043_c003[] = "A9600XT (Secondary)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4172_1043_c01b[] = "A9600XT/TD (Secondary)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4172_174b_7c28[] = "Sapphire Radeon 9600XT (Secondary)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4172_1787_4003[] = "Radeon 9600 XT (Secondary)"; +#endif static const char pci_device_1002_4173[] = "RV350 ? [Radeon 9550] (Secondary)"; static const char pci_device_1002_4237[] = "Radeon 7000 IGP"; static const char pci_device_1002_4242[] = "R200 BB [Radeon All in Wonder 8500DV]"; @@ -725,8 +829,14 @@ static const char pci_device_1002_4243[] = "R200 BC [Radeon All in Wonder 8500]"; static const char pci_device_1002_4336[] = "Radeon Mobility U1"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4336_1002_4336[] = "Pavilion ze4300 ATI Radeon Mobility U1 (IGP 320 M)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4336_103c_0024[] = "Pavilion ze4400 builtin Video"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4336_161f_2029[] = "eMachines M5312 builtin Video"; +#endif static const char pci_device_1002_4337[] = "Radeon IGP 330M/340M/350M"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4337_1014_053a[] = "ThinkPad R40e (2684-HVG) builtin VGA controller"; @@ -738,10 +848,51 @@ static const char pci_device_1002_4345[] = "EHCI USB Controller"; static const char pci_device_1002_4347[] = "OHCI USB Controller #1"; static const char pci_device_1002_4348[] = "OHCI USB Controller #2"; +static const char pci_device_1002_4349[] = "ATI Dual Channel Bus Master PCI IDE Controller"; static const char pci_device_1002_434d[] = "IXP AC'97 Modem"; static const char pci_device_1002_4353[] = "ATI SMBus"; static const char pci_device_1002_4354[] = "215CT [Mach64 CT]"; static const char pci_device_1002_4358[] = "210888CX [Mach64 CX]"; +static const char pci_device_1002_4363[] = "ATI SMBus"; +static const char pci_device_1002_436e[] = "ATI 436E Serial ATA Controller"; +static const char pci_device_1002_4370[] = "IXP SB400 AC'97 Audio Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4370_103c_308b[] = "nx6125"; +#endif +static const char pci_device_1002_4371[] = "IXP SB400 PCI-PCI Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4371_103c_308b[] = "nx6125"; +#endif +static const char pci_device_1002_4372[] = "IXP SB400 SMBus Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4372_103c_308b[] = "nx6125"; +#endif +static const char pci_device_1002_4373[] = "IXP SB400 USB2 Host Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4373_103c_308b[] = "nx6125"; +#endif +static const char pci_device_1002_4374[] = "IXP SB400 USB Host Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4374_103c_308b[] = "nx6125"; +#endif +static const char pci_device_1002_4375[] = "IXP SB400 USB Host Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4375_103c_308b[] = "nx6125"; +#endif +static const char pci_device_1002_4376[] = "Standard Dual Channel PCI IDE Controller ATI"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4376_103c_308b[] = "nx6125"; +#endif +static const char pci_device_1002_4377[] = "IXP SB400 PCI-ISA Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4377_103c_308b[] = "nx6125"; +#endif +static const char pci_device_1002_4378[] = "ATI SB400 - AC'97 Modem Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4378_103c_308b[] = "nx6125"; +#endif +static const char pci_device_1002_4379[] = "ATI 4379 Serial ATA Controller"; +static const char pci_device_1002_437a[] = "ATI 437A Serial ATA Controller"; static const char pci_device_1002_4437[] = "Radeon Mobility 7000 IGP"; static const char pci_device_1002_4554[] = "210888ET [Mach64 ET]"; static const char pci_device_1002_4654[] = "Mach64 VT"; @@ -871,6 +1022,12 @@ static const char pci_subsys_1002_4752_1028_00d9[] = "PowerEdge 2500"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4752_1028_0134[] = "Poweredge SC600"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4752_1734_007a[] = "Primergy RX300"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4752_8086_3411[] = "SDS2 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -952,6 +1109,12 @@ static const char pci_device_1002_4a4e[] = "M18 JN [Radeon Mobility 9800]"; static const char pci_device_1002_4a50[] = "R420 JP [Radeon X800XT]"; static const char pci_device_1002_4a70[] = "R420 [X800XT-PE] (Secondary)"; +static const char pci_device_1002_4b49[] = "R480 [Radeon X850XT]"; +static const char pci_device_1002_4b4b[] = "R480 [Radeon X850Pro]"; +static const char pci_device_1002_4b4c[] = "R481 [Radeon X850XT-PE]"; +static const char pci_device_1002_4b69[] = "R480 [Radeon X850XT secondary]"; +static const char pci_device_1002_4b6b[] = "R480 [Radeon X850Pro] (Secondary)"; +static const char pci_device_1002_4b6c[] = "R481 [Radeon X850XT-PE] Secondary"; static const char pci_device_1002_4c42[] = "3D Rage LT Pro AGP-133"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4c42_0e11_b0e7[] = "Rage LT Pro (Compaq Presario 5240)"; @@ -1008,11 +1171,23 @@ static const char pci_subsys_1002_4c4d_1002_0084[] = "Xpert 98 AGP 2X (Mobility)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1002_4c4d_1014_0154[] = "ThinkPad A20m"; +static const char pci_subsys_1002_4c4d_1014_0154[] = "ThinkPad A20m/A21m"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4c4d_1028_00aa[] = "Latitude CPt"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4c4d_1028_00bb[] = "Latitude CPx"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4c4d_10e1_10cf[] = "Fujitsu Siemens LifeBook C Series"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4c4d_1179_ff00[] = "Satellite 1715XCDS laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4c4d_13bd_1019[] = "PC-AR10"; +#endif static const char pci_device_1002_4c4e[] = "Rage Mobility L AGP 2x"; static const char pci_device_1002_4c50[] = "3D Rage LT Pro"; #ifdef INIT_SUBSYS_INFO @@ -1041,6 +1216,9 @@ static const char pci_device_1002_4c58[] = "Radeon RV200 LX [Mobility FireGL 7800 M7]"; static const char pci_device_1002_4c59[] = "Radeon Mobility M6 LY"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4c59_0e11_b111[] = "Evo N600c"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4c59_1014_0235[] = "ThinkPad A30/A30p (2652/2653)"; #endif #ifdef INIT_SUBSYS_INFO @@ -1049,6 +1227,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4c59_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4c59_1509_1930[] = "Medion MD9703"; +#endif static const char pci_device_1002_4c5a[] = "Radeon Mobility M6 LZ"; static const char pci_device_1002_4c64[] = "Radeon R250 Ld [Radeon Mobility 9000 M9]"; static const char pci_device_1002_4c65[] = "Radeon R250 Le [Radeon Mobility 9000 M9]"; @@ -1058,6 +1239,12 @@ static const char pci_device_1002_4d46[] = "Rage Mobility M4 AGP"; static const char pci_device_1002_4d4c[] = "Rage Mobility M4 AGP"; static const char pci_device_1002_4e44[] = "Radeon R300 ND [Radeon 9700 Pro]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4e44_1002_515e[] = "Radeon ES1000"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4e44_1002_5965[] = "Radeon ES1000"; +#endif static const char pci_device_1002_4e45[] = "Radeon R300 NE [Radeon 9500 Pro]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4e45_1002_0002[] = "Radeon R300 NE [Radeon 9500 Pro]"; @@ -1076,7 +1263,10 @@ static const char pci_subsys_1002_4e50_1025_005a[] = "TravelMate 290"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1002_4e50_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_1002_4e50_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4e50_103c_0890[] = "nc6000 laptop"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_4e50_1734_1055[] = "Amilo M1420W"; @@ -1099,6 +1289,10 @@ static const char pci_device_1002_4e68[] = "Radeon R350 [Radeon 9800 Pro] (Secondary)"; static const char pci_device_1002_4e69[] = "Radeon R350 [Radeon 9800] (Secondary)"; static const char pci_device_1002_4e6a[] = "RV350 NJ [Radeon 9800 XT] (Secondary)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_4e6a_1002_4e71[] = "ATI Technologies Inc M10 NQ [Radeon Mobility 9600]"; +#endif +static const char pci_device_1002_4e71[] = "M10 NQ [Radeon Mobility 9600] (secondary)"; static const char pci_device_1002_5041[] = "Rage 128 PA/PRO"; static const char pci_device_1002_5042[] = "Rage 128 PB/PRO AGP 2x"; static const char pci_device_1002_5043[] = "Rage 128 PC/PRO AGP 4x"; @@ -1291,6 +1485,15 @@ static const char pci_subsys_1002_5159_1002_013a[] = "Radeon 7000/Radeon VE"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5159_1014_029a[] = "Remote Supervisor Adapter II (RSA2)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5159_1014_02c8[] = "IBM eServer xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5159_1028_019a[] = "PowerEdge SC1425"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5159_1458_4002[] = "RV100 QY [RADEON 7000 PRO MAYA AV Series]"; #endif #ifdef INIT_SUBSYS_INFO @@ -1309,6 +1512,7 @@ static const char pci_subsys_1002_5159_1787_0202[] = "RV100 QY [Excalibur Radeon 7000]"; #endif static const char pci_device_1002_515a[] = "Radeon RV100 QZ [Radeon 7000/VE]"; +static const char pci_device_1002_515e[] = "ES1000"; static const char pci_device_1002_5168[] = "Radeon R200 Qh"; static const char pci_device_1002_5169[] = "Radeon R200 Qi"; static const char pci_device_1002_516a[] = "Radeon R200 Qj"; @@ -1413,15 +1617,25 @@ static const char pci_device_1002_5454[] = "Rage 128 Pro Ultra TT"; static const char pci_device_1002_5455[] = "Rage 128 Pro Ultra TU"; static const char pci_device_1002_5460[] = "M22 [Radeon Mobility M300]"; +static const char pci_device_1002_5462[] = "M24 [Radeon Mobility X600]"; static const char pci_device_1002_5464[] = "M22 [FireGL GL]"; static const char pci_device_1002_5548[] = "R423 UH [Radeon X800 (PCIE)]"; static const char pci_device_1002_5549[] = "R423 UI [Radeon X800PRO (PCIE)]"; static const char pci_device_1002_554a[] = "R423 UJ [Radeon X800LE (PCIE)]"; static const char pci_device_1002_554b[] = "R423 UK [Radeon X800SE (PCIE)]"; +static const char pci_device_1002_554d[] = "R430 [Radeon X800 XL] (PCIe)"; +static const char pci_device_1002_554f[] = "R430 [Radeon X800 (PCIE)]"; +static const char pci_device_1002_5550[] = "R423 [Fire GL V7100]"; static const char pci_device_1002_5551[] = "R423 UQ [FireGL V7200 (PCIE)]"; static const char pci_device_1002_5552[] = "R423 UR [FireGL V5100 (PCIE)]"; static const char pci_device_1002_5554[] = "R423 UT [FireGL V7100 (PCIE)]"; static const char pci_device_1002_556b[] = "Radeon R423 UK (PCIE) [X800 SE] (Secondary)"; +static const char pci_device_1002_556d[] = "R430 [Radeon X800 XL] (PCIe) Secondary"; +static const char pci_device_1002_556f[] = "R430 [Radeon X800 (PCIE) Secondary]"; +static const char pci_device_1002_564a[] = "M26 [Mobility FireGL V5000]"; +static const char pci_device_1002_564b[] = "M26 [Mobility FireGL V5000]"; +static const char pci_device_1002_5652[] = "M26 [Radeon Mobility X700]"; +static const char pci_device_1002_5653[] = "Radeon Mobility X700 (PCIE)"; static const char pci_device_1002_5654[] = "264VT [Mach64 VT]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5654_1002_5654[] = "Mach64VT Reference"; @@ -1435,8 +1649,12 @@ static const char pci_device_1002_5834[] = "Radeon 9100 IGP"; static const char pci_device_1002_5835[] = "RS300M AGP [Radeon Mobility 9100IGP]"; static const char pci_device_1002_5838[] = "Radeon 9100 IGP AGP Bridge"; +static const char pci_device_1002_5940[] = "RV280 [Radeon 9200 PRO] (Secondary)"; static const char pci_device_1002_5941[] = "RV280 [Radeon 9200] (Secondary)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5941_1458_4019[] = "Gigabyte Radeon 9200"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5941_174b_7c12[] = "Sapphire Radeon 9200"; #endif #ifdef INIT_SUBSYS_INFO @@ -1446,12 +1664,31 @@ static const char pci_subsys_1002_5941_18bc_0050[] = "GeXcube GC-R9200-C3 (Secondary)"; #endif static const char pci_device_1002_5944[] = "RV280 [Radeon 9200 SE (PCI)]"; +static const char pci_device_1002_5950[] = "RS480 Host Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5950_103c_308b[] = "nx6125"; +#endif +static const char pci_device_1002_5951[] = "ATI Radeon Xpress 200 (RS480/RS482/RX480/RX482) Chipset - Host bridge"; +static const char pci_device_1002_5954[] = "RS480 [Radeon Xpress 200G Series]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5954_1002_5954[] = "RV370 [Radeon Xpress 200G Series]"; +#endif +static const char pci_device_1002_5955[] = "ATI Radeon XPRESS 200M 5955 (PCIE)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5955_1002_5955[] = "RS480 0x5955 [ATI Radeon XPRESS 200M 5955 (PCIE)]"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5955_103c_308b[] = "nx6125"; +#endif static const char pci_device_1002_5960[] = "RV280 [Radeon 9200 PRO]"; static const char pci_device_1002_5961[] = "RV280 [Radeon 9200]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5961_1002_2f72[] = "All-in-Wonder 9200 Series"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5961_1019_4c30[] = "Radeon 9200 VIVO"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5961_12ab_5961[] = "YUAN SMARTVGA Radeon 9200"; #endif #ifdef INIT_SUBSYS_INFO @@ -1481,6 +1718,9 @@ static const char pci_subsys_1002_5964_1458_4018[] = "Radeon 9200 SE"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5964_147b_6191[] = "R9200SE-DT"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5964_148c_2073[] = "CN-AG92E"; #endif #ifdef INIT_SUBSYS_INFO @@ -1498,15 +1738,42 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5964_18bc_0173[] = "GC-R9200L(SE)-C3H [Radeon 9200 Game Buster]"; #endif +static const char pci_device_1002_5969[] = "ES1000"; +static const char pci_device_1002_5974[] = "RS482 [Radeon Xpress 200]"; +static const char pci_device_1002_5975[] = "RS482 [Radeon Xpress 200M]"; +static const char pci_device_1002_5a34[] = "RS480 PCI-X Root Port"; +static const char pci_device_1002_5a38[] = "RS480 PCI Bridge"; +static const char pci_device_1002_5a3f[] = "RS480 PCI Bridge"; +static const char pci_device_1002_5a41[] = "RS400 [Radeon Xpress 200]"; +static const char pci_device_1002_5a42[] = "RS400 [Radeon Xpress 200M]"; +static const char pci_device_1002_5a61[] = "RC410 [Radeon Xpress 200]"; +static const char pci_device_1002_5a62[] = "RC410 [Radeon Xpress 200M]"; static const char pci_device_1002_5b60[] = "RV370 5B60 [Radeon X300 (PCIE)]"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1002_5b60_1043_002a[] = "EAX300SE"; +static const char pci_subsys_1002_5b60_1043_002a[] = "Extreme AX300SE-X"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5b60_1043_032e[] = "Extreme AX300/TD"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5b60_1462_0402[] = "RX300SE-TD128E (MS-8940)"; #endif static const char pci_device_1002_5b62[] = "RV370 5B62 [Radeon X600 (PCIE)]"; +static const char pci_device_1002_5b63[] = "RV370 [ATI Sapphire X550 Silent]"; static const char pci_device_1002_5b64[] = "RV370 5B64 [FireGL V3100 (PCIE)]"; static const char pci_device_1002_5b65[] = "RV370 5B65 [FireGL D1100 (PCIE)]"; +static const char pci_device_1002_5b70[] = "RV370 [Radeon X300SE]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5b70_1462_0403[] = "RX300SE-TD128E (MS-8940) (secondary display)"; +#endif +static const char pci_device_1002_5b72[] = "Radeon X600(RV380)"; +static const char pci_device_1002_5b73[] = "RV370 secondary [ATI Sapphire X550 Silent]"; +static const char pci_device_1002_5b74[] = "RV370 5B64 [FireGL V3100 (PCIE)] (Secondary)"; static const char pci_device_1002_5c61[] = "M9+ 5C61 [Radeon Mobility 9200 (AGP)]"; static const char pci_device_1002_5c63[] = "M9+ 5C63 [Radeon Mobility 9200 (AGP)]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5c63_1002_5c63[] = "Apple iBook G4 2004"; +#endif static const char pci_device_1002_5d44[] = "RV280 [Radeon 9200 SE] (Secondary)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5d44_1458_4019[] = "Radeon 9200 SE (Secondary)"; @@ -1526,14 +1793,85 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1002_5d44_18bc_0172[] = "GC-R9200L(SE)-C3H [Radeon 9200 Game Buster]"; #endif +static const char pci_device_1002_5d48[] = "M28 [Radeon Mobility X800XT]"; +static const char pci_device_1002_5d49[] = "M28 [Mobility FireGL V5100]"; +static const char pci_device_1002_5d4a[] = "Mobility Radeon X800"; +static const char pci_device_1002_5d4d[] = "R480 [Radeon X850XT Platinum (PCIE)]"; +static const char pci_device_1002_5d4f[] = "R480 [Radeon X800 GTO (PCIE)]"; +static const char pci_device_1002_5d52[] = "R480 [Radeon X850XT (PCIE)] (Primary)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5d52_1002_0b12[] = "PowerColor X850XT PCIe Primary"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5d52_1002_0b13[] = "PowerColor X850XT PCIe Secondary"; +#endif static const char pci_device_1002_5d57[] = "R423 5F57 [Radeon X800XT (PCIE)]"; +static const char pci_device_1002_5d6d[] = "R480 [Radeon X850XT Platinum (PCIE)] (Secondary)"; +static const char pci_device_1002_5d6f[] = "R480 [Radeon X800 GTO (PCIE)] (Secondary)"; +static const char pci_device_1002_5d72[] = "R480 [Radeon X850XT (PCIE)] (Secondary)"; +static const char pci_device_1002_5d77[] = "R423 5F57 [Radeon X800XT (PCIE)] (Secondary)"; +static const char pci_device_1002_5e48[] = "RV410 [FireGL V5000]"; +static const char pci_device_1002_5e49[] = "RV410 [FireGL V3300]"; +static const char pci_device_1002_5e4a[] = "RV410 [Radeon X700XT]"; +static const char pci_device_1002_5e4b[] = "RV410 [Radeon X700 Pro (PCIE)]"; +static const char pci_device_1002_5e4c[] = "RV410 [Radeon X700SE]"; +static const char pci_device_1002_5e4d[] = "RV410 [Radeon X700 (PCIE)]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5e4d_148c_2116[] = "PowerColor Bravo X700"; +#endif +static const char pci_device_1002_5e4f[] = "RV410 [Radeon X700]"; +static const char pci_device_1002_5e6b[] = "RV410 [Radeon X700 Pro (PCIE)] Secondary"; +static const char pci_device_1002_5e6d[] = "RV410 [Radeon X700 (PCIE)] (Secondary)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_5e6d_148c_2117[] = "PowerColor Bravo X700"; +#endif static const char pci_device_1002_700f[] = "PCI Bridge [IGP 320M]"; static const char pci_device_1002_7010[] = "PCI Bridge [IGP 340M]"; +static const char pci_device_1002_7100[] = "R520 [Radeon X1800]"; +static const char pci_device_1002_7105[] = "R520 [FireGL]"; +static const char pci_device_1002_7109[] = "R520 [Radeon X1800]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7109_1002_0322[] = "All-in-Wonder X1800XL"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7109_1002_0d02[] = "Radeon X1800 CrossFire Edition"; +#endif +static const char pci_device_1002_7120[] = "R520 [Radeon X1800] (Secondary)"; +static const char pci_device_1002_7129[] = "R520 [Radeon X1800] (Secondary)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7129_1002_0323[] = "All-in-Wonder X1800XL (Secondary)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7129_1002_0d03[] = "Radeon X1800 CrossFire Edition (Secondary)"; +#endif +static const char pci_device_1002_7142[] = "RV515 [Radeon X1300]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7142_1002_0322[] = "All-in-Wonder 2006 PCI-E Edition"; +#endif +static const char pci_device_1002_7146[] = "RV515 [Radeon X1300]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7146_1002_0322[] = "All-in-Wonder 2006 PCI-E Edition"; +#endif +static const char pci_device_1002_7162[] = "RV515 [Radeon X1300] (Secondary)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7162_1002_0323[] = "All-in-Wonder 2006 PCI-E Edition (Secondary)"; +#endif +static const char pci_device_1002_7166[] = "RV515 [Radeon X1300] (Secondary)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1002_7166_1002_0323[] = "All-in-Wonder 2006 PCI-E Edition (Secondary)"; +#endif +static const char pci_device_1002_71c0[] = "RV530 [Radeon X1600]"; +static const char pci_device_1002_71c2[] = "RV530 [Radeon X1600]"; +static const char pci_device_1002_71e0[] = "RV530 [Radeon X1600] (Secondary)"; +static const char pci_device_1002_71e2[] = "RV530 [Radeon X1600] (Secondary)"; +static const char pci_device_1002_7833[] = "Radeon 9100 IGP Host Bridge"; static const char pci_device_1002_7834[] = "Radeon 9100 PRO IGP"; static const char pci_device_1002_7835[] = "Radeon Mobility 9200 IGP"; +static const char pci_device_1002_7838[] = "Radeon 9100 IGP PCI/AGP Bridge"; static const char pci_device_1002_7c37[] = "RV350 AQ [Radeon 9600 SE]"; static const char pci_device_1002_cab0[] = "AGP Bridge [IGP 320M]"; static const char pci_device_1002_cab2[] = "RS200/RS200M AGP Bridge [IGP 340M]"; +static const char pci_device_1002_cab3[] = "R200 AGP Bridge [Mobility Radeon 7000 IGP]"; static const char pci_device_1002_cbb2[] = "RS200/RS200M AGP Bridge [IGP 340M]"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1003[] = "ULSI Systems"; @@ -1622,15 +1960,20 @@ static const char pci_subsys_100b_0020_103c_0024[] = "Pavilion ze4400 builtin Network"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_100b_0020_12d9_000c[] = "Aculab E1/T1 PMXc cPCI carrier card"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_100b_0020_1385_f311[] = "FA311 / FA312 (FA311 with WoL HW)"; #endif +static const char pci_device_100b_0021[] = "PC87200 PCI to ISA Bridge"; static const char pci_device_100b_0022[] = "DP83820 10/100/1000 Ethernet Controller"; -static const char pci_device_100b_0028[] = "CS5535 Host bridge"; +static const char pci_device_100b_0028[] = "Geode GX2 Host Bridge"; +static const char pci_device_100b_002a[] = "CS5535 South Bridge"; static const char pci_device_100b_002b[] = "CS5535 ISA bridge"; static const char pci_device_100b_002d[] = "CS5535 IDE"; static const char pci_device_100b_002e[] = "CS5535 Audio"; static const char pci_device_100b_002f[] = "CS5535 USB"; -static const char pci_device_100b_0030[] = "CS5535 Video"; +static const char pci_device_100b_0030[] = "Geode GX2 Graphics Processor"; static const char pci_device_100b_0035[] = "DP83065 [Saturn] 10/100/1000 Ethernet Controller"; static const char pci_device_100b_0500[] = "SCx200 Bridge"; static const char pci_device_100b_0501[] = "SCx200 SMI"; @@ -1921,6 +2264,7 @@ static const char pci_device_1013_1200[] = "GD 7542 [Nordic]"; static const char pci_device_1013_1202[] = "GD 7543 [Viking]"; static const char pci_device_1013_1204[] = "GD 7541 [Nordic Light]"; +static const char pci_device_1013_4000[] = "MD 5620 [CLM Data Fax Voice]"; static const char pci_device_1013_4400[] = "CD 4400"; static const char pci_device_1013_6001[] = "CS 4610/11 [CrystalClear SoundFusion Audio Accelerator]"; #ifdef INIT_SUBSYS_INFO @@ -1931,6 +2275,9 @@ static const char pci_subsys_1013_6003_1013_4280[] = "Crystal SoundFusion PCI Audio Accelerator"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1013_6003_153b_1136[] = "SiXPack 5.1+"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1013_6003_1681_0050[] = "Game Theater XP"; #endif #ifdef INIT_SUBSYS_INFO @@ -2132,8 +2479,31 @@ static const char pci_device_1014_0266[] = "PCI-X Dual Channel SCSI"; static const char pci_device_1014_0268[] = "Gigabit Ethernet-SX Adapter (PCI-X)"; static const char pci_device_1014_0269[] = "10/100/1000 Base-TX Ethernet Adapter (PCI-X)"; +static const char pci_device_1014_028c[] = "Citrine chipset SCSI controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_028c_1014_028d[] = "Dual Channel PCI-X DDR SAS RAID Adapter (572E)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_028c_1014_02be[] = "Dual Channel PCI-X DDR U320 SCSI RAID Adapter (571B)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_028c_1014_02c0[] = "Dual Channel PCI-X DDR U320 SCSI Adapter (571A)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_028c_1014_030d[] = "PCI-X DDR Auxiliary Cache Adapter (575B)"; +#endif +static const char pci_device_1014_02a1[] = "Calgary PCI-X Host Bridge"; +static const char pci_device_1014_02bd[] = "Obsidian chipset SCSI controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_02bd_1014_02c1[] = "PCI-X DDR 3Gb SAS Adapter (572A/572C)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1014_02bd_1014_02c2[] = "PCI-X DDR 3Gb SAS RAID Adapter (572B/571D)"; +#endif static const char pci_device_1014_0302[] = "Winnipeg PCI-X Host Bridge"; static const char pci_device_1014_0314[] = "ZISC 036 Neural accelerator card"; +static const char pci_device_1014_3022[] = "QLA3022 Network Adapter"; +static const char pci_device_1014_4022[] = "QLA3022 Network Adapter"; static const char pci_device_1014_ffff[] = "MPIC-2 interrupt controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -2175,6 +2545,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_101e[] = "American Megatrends Inc."; +static const char pci_device_101e_0009[] = "MegaRAID 428 Ultra RAID Controller (rev 03)"; static const char pci_device_101e_1960[] = "MegaRAID"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_101e_1960_101e_0471[] = "MegaRAID 471 Enterprise 1600 RAID Controller"; @@ -2220,6 +2591,11 @@ static const char pci_subsys_101e_1960_1028_0511[] = "PowerEdge Cost Effective RAID Controller ATA100/4Ch"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_101e_1960_103c_60e7[] = "NetRAID-1M"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_101e_9010[] = "MegaRAID 428 Ultra RAID Controller"; static const char pci_device_101e_9030[] = "EIDE Controller"; static const char pci_device_101e_9031[] = "EIDE Controller"; @@ -2287,6 +2663,12 @@ static const char pci_subsys_1022_2000_1259_2701[] = "AT-2700FX 100Mb Ethernet"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1022_2000_1259_2702[] = "AT-2700FTX 10/100 Mb Fiber/Copper Fast Ethernet"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1022_2000_1259_2703[] = "AT-2701FX"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1022_2000_4c53_1000[] = "CC7/CR7/CP7/VC7/VP7/VR7 mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -2314,6 +2696,17 @@ static const char pci_device_1022_2003[] = "Am 1771 MBW [Alchemy]"; static const char pci_device_1022_2020[] = "53c974 [PCscsi]"; static const char pci_device_1022_2040[] = "79c974"; +static const char pci_device_1022_2081[] = "Geode LX Video"; +static const char pci_device_1022_2082[] = "Geode LX AES Security Block"; +static const char pci_device_1022_208f[] = "CS5536 GeodeLink PCI South Bridge"; +static const char pci_device_1022_2090[] = "CS5536 [Geode companion] ISA"; +static const char pci_device_1022_2091[] = "CS5536 [Geode companion] FLASH"; +static const char pci_device_1022_2093[] = "CS5536 [Geode companion] Audio"; +static const char pci_device_1022_2094[] = "CS5536 [Geode companion] OHC"; +static const char pci_device_1022_2095[] = "CS5536 [Geode companion] EHC"; +static const char pci_device_1022_2096[] = "CS5536 [Geode companion] UDC"; +static const char pci_device_1022_2097[] = "CS5536 [Geode companion] UOC"; +static const char pci_device_1022_209a[] = "CS5536 [Geode companion] IDE"; static const char pci_device_1022_3000[] = "ELanSC520 Microcontroller"; static const char pci_device_1022_7006[] = "AMD-751 [Irongate] System Controller"; static const char pci_device_1022_7007[] = "AMD-751 [Irongate] AGP Bridge"; @@ -2349,9 +2742,11 @@ static const char pci_device_1022_7448[] = "AMD-768 [Opus] PCI"; static const char pci_device_1022_7449[] = "AMD-768 [Opus] USB"; static const char pci_device_1022_7450[] = "AMD-8131 PCI-X Bridge"; -static const char pci_device_1022_7451[] = "AMD-8131 PCI-X APIC"; +static const char pci_device_1022_7451[] = "AMD-8131 PCI-X IOAPIC"; static const char pci_device_1022_7454[] = "AMD-8151 System Controller"; static const char pci_device_1022_7455[] = "AMD-8151 AGP Bridge"; +static const char pci_device_1022_7458[] = "AMD-8132 PCI-X Bridge"; +static const char pci_device_1022_7459[] = "AMD-8132 PCI-X IOAPIC"; static const char pci_device_1022_7460[] = "AMD-8111 PCI"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1022_7460_161f_3017[] = "HDAMB"; @@ -2368,6 +2763,9 @@ #endif static const char pci_device_1022_7469[] = "AMD-8111 IDE"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1022_7469_1022_2b80[] = "AMD-8111 IDE [Quartet]"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1022_7469_161f_3017[] = "HDAMB"; #endif static const char pci_device_1022_746a[] = "AMD-8111 SMBus 2.0"; @@ -2389,6 +2787,7 @@ static const char pci_subsys_1023_2001_122d_1400[] = "Trident PCI288-Q3DII (NX)"; #endif static const char pci_device_1023_2100[] = "CyberBlade XP4m32"; +static const char pci_device_1023_2200[] = "XGI Volari XP5"; static const char pci_device_1023_8400[] = "CyberBlade/i7"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1023_8400_1023_8400[] = "CyberBlade i7 AGP"; @@ -2409,6 +2808,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1023_8620_1014_0502[] = "ThinkPad R30/T30"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1023_8620_1014_1025[] = "Travelmate 352TE"; +#endif static const char pci_device_1023_8820[] = "CyberBlade XPAi1"; static const char pci_device_1023_9320[] = "TGUI 9320"; static const char pci_device_1023_9350[] = "GUI Accelerator"; @@ -2568,6 +2970,7 @@ static const char pci_subsys_1028_0013_1028_0170[] = "PowerEdge Expandable RAID Controller 4e/Di"; #endif static const char pci_device_1028_0014[] = "Remote Access Card 4 Daughter Card SMIC interface"; +static const char pci_device_1028_0015[] = "PowerEdge Expandable RAID controller 5"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1029[] = "Siemens Nixdorf IS"; #endif @@ -2761,7 +3164,7 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_102b_0521_110a_0032[] = "MGA-G200 AGP"; #endif -static const char pci_device_102b_0525[] = "MGA G400 AGP"; +static const char pci_device_102b_0525[] = "G400/G450"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_102b_0525_0e11_b16f[] = "MGA-G400 AGP"; #endif @@ -2901,6 +3304,22 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_102b_0527_102b_0840[] = "Parhelia 128Mb"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_0527_102b_0850[] = "Parhelia 256MB AGP 4X"; +#endif +static const char pci_device_102b_0528[] = "Parhelia 8X"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_0528_102b_1020[] = "Parhelia 128MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_0528_102b_1030[] = "Parhelia 256 MB Dual DVI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_0528_102b_14e1[] = "Parhelia PCI 256MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_0528_102b_2021[] = "QID Pro"; +#endif static const char pci_device_102b_0d10[] = "MGA Ultima/Impression"; static const char pci_device_102b_1000[] = "MGA G100 [Productiva]"; #ifdef INIT_SUBSYS_INFO @@ -2942,7 +3361,41 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_102b_2527_102b_1e41[] = "Millennium G550"; #endif -static const char pci_device_102b_2537[] = "MGA G650 AGP"; +static const char pci_device_102b_2537[] = "Millenium P650/P750"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2537_102b_1820[] = "Millennium P750 64MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2537_102b_1830[] = "Millennium P650 64MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2537_102b_1c10[] = "QID 128MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2537_102b_2811[] = "Millennium P650 Low-profile PCI 64MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2537_102b_2c11[] = "QID Low-profile PCI"; +#endif +static const char pci_device_102b_2538[] = "Millenium P650 PCIe"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2538_102b_08c7[] = "Millennium P650 PCIe 128MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2538_102b_0907[] = "Millennium P650 PCIe 64MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2538_102b_1047[] = "Millennium P650 LP PCIe 128MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2538_102b_1087[] = "Millennium P650 LP PCIe 64MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2538_102b_2538[] = "Parhelia APVe"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102b_2538_102b_3007[] = "QID Low-profile PCIe"; +#endif static const char pci_device_102b_4536[] = "VIA Framegrabber"; static const char pci_device_102b_6573[] = "Shark 10/100 Multiport SwitchNIC"; static const char pci_vendor_102c[] = "Chips and Technologies"; @@ -2978,6 +3431,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_102c_00e5_0e11_b049[] = "Armada 1700 Laptop Display Controller"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_102c_00e5_1179_0001[] = "Satellite Pro"; +#endif static const char pci_device_102c_00f0[] = "F68554"; static const char pci_device_102c_00f4[] = "F68554 HiQVision"; static const char pci_device_102c_00f5[] = "F68555"; @@ -3050,15 +3506,27 @@ static const char pci_device_1033_002d[] = "PCI to C-bus Bridge"; static const char pci_device_1033_0035[] = "USB"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1033_0035_1033_0035[] = "Hama USB 2.0 CardBus"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1033_0035_1179_0001[] = "USB"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1033_0035_12ee_7000[] = "Root Hub"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1033_0035_14c2_0105[] = "PTI-205N USB 2.0 Host Controller"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1033_0035_1799_0001[] = "Root Hub"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1033_0035_1931_000a[] = "GlobeTrotter Fusion Quad Lite (PPP data)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1033_0035_1931_000b[] = "GlobeTrotter Fusion Quad Lite (GSM data)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1033_0035_807d_0035[] = "PCI-USB2 (OHCI subsystem)"; #endif static const char pci_device_1033_003b[] = "PCI to C-bus Bridge"; @@ -3091,6 +3559,7 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1033_0067_1010_0120[] = "PowerVR Neon 250 AGP 32Mb"; #endif +static const char pci_device_1033_0072[] = "uPD72874 IEEE1394 OHCI 1.1 3-port PHY-Link Ctrlr"; static const char pci_device_1033_0074[] = "56k Voice Modem"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1033_0074_1033_8014[] = "RCV56ACF 56k Voice Modem"; @@ -3106,10 +3575,10 @@ static const char pci_device_1033_00df[] = "Vr4131"; static const char pci_device_1033_00e0[] = "USB 2.0"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1033_00e0_0ee4_3383[] = "Sitecom IEEE 1394 / USB2.0 Combo Card"; +static const char pci_subsys_1033_00e0_12ee_7001[] = "Root hub"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1033_00e0_12ee_7001[] = "Root hub"; +static const char pci_subsys_1033_00e0_14c2_0205[] = "PTI-205N USB 2.0 Host Controller"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1033_00e0_1799_0002[] = "Root Hub"; @@ -3140,13 +3609,19 @@ static const char pci_vendor_1039[] = "Silicon Integrated Systems [SiS]"; static const char pci_device_1039_0001[] = "Virtual PCI-to-PCI bridge (AGP)"; static const char pci_device_1039_0002[] = "SG86C202"; +static const char pci_device_1039_0003[] = "SiS AGP Port (virtual PCI-to-PCI bridge)"; +static const char pci_device_1039_0004[] = "PCI-to-PCI bridge"; static const char pci_device_1039_0006[] = "85C501/2/3"; static const char pci_device_1039_0008[] = "SiS85C503/5513 (LPC Bridge)"; static const char pci_device_1039_0009[] = "ACPI"; +static const char pci_device_1039_000a[] = "PCI-to-PCI bridge"; static const char pci_device_1039_0016[] = "SiS961/2 SMBus Controller"; static const char pci_device_1039_0018[] = "SiS85C503/5513 (LPC Bridge)"; static const char pci_device_1039_0180[] = "RAID bus controller 180 SATA/PATA [SiS]"; -static const char pci_device_1039_0181[] = "SiS SATA"; +static const char pci_device_1039_0181[] = "SATA"; +static const char pci_device_1039_0182[] = "182 SATA/RAID Controller"; +static const char pci_device_1039_0190[] = "190 Gigabit Ethernet Adapter"; +static const char pci_device_1039_0191[] = "191 Gigabit Ethernet Adapter"; static const char pci_device_1039_0200[] = "5597/5598/6326 VGA"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_0200_1039_0000[] = "SiS5597 SVGA (Shared RAM)"; @@ -3174,7 +3649,7 @@ static const char pci_device_1039_0635[] = "635 Host"; static const char pci_device_1039_0645[] = "SiS645 Host & Memory & AGP Controller"; static const char pci_device_1039_0646[] = "SiS645DX Host & Memory & AGP Controller"; -static const char pci_device_1039_0648[] = "SiS 645xx"; +static const char pci_device_1039_0648[] = "645xx"; static const char pci_device_1039_0650[] = "650/M650 Host"; static const char pci_device_1039_0651[] = "651 Host"; static const char pci_device_1039_0655[] = "655 Host"; @@ -3189,6 +3664,7 @@ static const char pci_device_1039_0746[] = "746 Host"; static const char pci_device_1039_0755[] = "755 Host"; static const char pci_device_1039_0760[] = "760/M760 Host"; +static const char pci_device_1039_0761[] = "761/M761 Host"; static const char pci_device_1039_0900[] = "SiS900 PCI Fast Ethernet"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_0900_1019_0a14[] = "K7S5A motherboard"; @@ -3262,7 +3738,7 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_6326_1569_6326[] = "SiS6326 GUI Accelerator"; #endif -static const char pci_device_1039_6330[] = "661/741/760 PCI/AGP VGA Display Adapter"; +static const char pci_device_1039_6330[] = "661/741/760/761 PCI/AGP VGA Display Adapter"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_6330_1039_6330[] = "[M]661xX/[M]741[GX]/[M]760 PCI/AGP VGA Adapter"; #endif @@ -3273,12 +3749,18 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_7001_1039_7000[] = "Onboard USB Controller"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_7001_1462_5470[] = "K7SOM+ 5.2C Motherboard"; +#endif static const char pci_device_1039_7002[] = "USB 2.0 Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1039_7002_1509_7002[] = "Onboard USB Controller"; #endif static const char pci_device_1039_7007[] = "FireWire Controller"; -static const char pci_device_1039_7012[] = "Sound Controller"; +static const char pci_device_1039_7012[] = "AC'97 Sound Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1039_7012_15bd_1001[] = "DFI 661FX motherboard"; +#endif static const char pci_device_1039_7013[] = "AC'97 Modem Controller"; static const char pci_device_1039_7016[] = "SiS7016 PCI Fast Ethernet Adapter"; #ifdef INIT_SUBSYS_INFO @@ -3420,13 +3902,16 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_103c_1048_103c_1282[] = "Everest SP2"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_103c_1048_103c_1301[] = "Diva RMP3"; +#endif static const char pci_device_103c_1054[] = "PCI Local Bus Adapter"; static const char pci_device_103c_1064[] = "79C970 PCnet Ethernet Controller"; static const char pci_device_103c_108b[] = "Visualize FXe"; static const char pci_device_103c_10c1[] = "NetServer Smart IRQ Router"; static const char pci_device_103c_10ed[] = "TopTools Remote Control"; -static const char pci_device_103c_10f0[] = "reo System Bus Adapter"; -static const char pci_device_103c_10f1[] = "reo I/O Controller"; +static const char pci_device_103c_10f0[] = "rio System Bus Adapter"; +static const char pci_device_103c_10f1[] = "rio I/O Controller"; static const char pci_device_103c_1200[] = "82557B 10/100 NIC"; static const char pci_device_103c_1219[] = "NetServer PCI Hot-Plug Controller"; static const char pci_device_103c_121a[] = "NetServer SMIC Controller"; @@ -3437,9 +3922,14 @@ static const char pci_device_103c_122e[] = "zx1 Local Bus Adapter"; static const char pci_device_103c_127c[] = "sx1000 I/O Controller"; static const char pci_device_103c_1290[] = "Auxiliary Diva Serial Port"; +static const char pci_device_103c_1291[] = "Auxiliary Diva Serial Port"; static const char pci_device_103c_12b4[] = "zx1 QuickSilver AGP8x Local Bus Adapter"; +static const char pci_device_103c_12fa[] = "BCM4306 802.11b/g Wireless LAN Controller"; static const char pci_device_103c_2910[] = "E2910A PCIBus Exerciser"; static const char pci_device_103c_2925[] = "E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer"; +static const char pci_device_103c_3080[] = "Pavilion ze2028ea"; +static const char pci_device_103c_3220[] = "Hewlett-Packard Smart Array P600"; +static const char pci_device_103c_3230[] = "Hewlett-Packard Smart Array Controller"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_103e[] = "Solliday Engineering"; #endif @@ -3463,12 +3953,25 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1043[] = "ASUSTeK Computer Inc."; static const char pci_device_1043_0675[] = "ISDNLink P-IN100-ST-D"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1043_0675_0675_1704[] = "ISDN Adapter (PCI Bus, D, C)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1043_0675_0675_1707[] = "ISDN Adapter (PCI Bus, DV, W)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1043_0675_10cf_105e[] = "ISDN Adapter (PCI Bus, DV, W)"; +#endif static const char pci_device_1043_4015[] = "v7100 SDRAM [GeForce2 MX]"; static const char pci_device_1043_4021[] = "v7100 Combo Deluxe [GeForce2 MX + TV tuner]"; static const char pci_device_1043_4057[] = "v8200 GeForce 3"; static const char pci_device_1043_8043[] = "v8240 PAL 128M [P4T] Motherboard"; static const char pci_device_1043_807b[] = "v9280/TD [Geforce4 TI4200 8X With TV-Out and DVI]"; static const char pci_device_1043_80bb[] = "v9180 Magic/T [GeForce4 MX440 AGP 8x 64MB TV-out]"; +static const char pci_device_1043_80c5[] = "nForce3 chipset motherboard [SK8N]"; +static const char pci_device_1043_80df[] = "v9520 Magic/T"; +static const char pci_device_1043_8187[] = "802.11a/b/g Wireless LAN Card"; +static const char pci_device_1043_8188[] = "Tiger Hybrid TV Capture Device"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1044[] = "Adaptec (formerly DPT)"; @@ -3576,7 +4079,7 @@ static const char pci_subsys_1044_a501_1044_c064[] = "3010S Ultra3 Dual Channel"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1044_a501_1044_c065[] = "3010S Ultra3 Four Channel"; +static const char pci_subsys_1044_a501_1044_c065[] = "3410S Ultra160 Four Channel"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1044_a501_1044_c066[] = "3010S Fibre Channel"; @@ -3585,6 +4088,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1044_a511_1044_c032[] = "ASR-2005S I2O Zero Channel"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1044_a511_1044_c035[] = "ASR-2010S I2O Zero Channel"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1045[] = "OPTi Inc."; @@ -3624,6 +4130,9 @@ static const char pci_device_1048_1000[] = "QuickStep 1000"; static const char pci_device_1048_3000[] = "QuickStep 3000"; static const char pci_device_1048_8901[] = "Gloria XL"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1048_8901_1048_0935[] = "GLoria XL (Virge)"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1049[] = "Fountain Technologies, Inc."; @@ -3673,9 +4182,21 @@ static const char pci_subsys_104c_3d07_1048_0a32[] = "GLoria Synergy"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_3d07_1048_0a34[] = "GLoria Synergy"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_3d07_1048_0a35[] = "GLoria Synergy"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_3d07_1048_0a36[] = "GLoria Synergy"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_3d07_1048_0a43[] = "GLoria Synergy"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_3d07_1048_0a44[] = "GLoria Synergy"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_3d07_107d_2633[] = "WinFast 3D L2300"; #endif #ifdef INIT_SUBSYS_INFO @@ -3743,6 +4264,9 @@ static const char pci_subsys_104c_8019_e4bf_1010[] = "CF2-1-CYMBAL"; #endif static const char pci_device_104c_8020[] = "TSB12LV26 IEEE-1394 Controller (Link)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8020_11bd_000f[] = "Studio DV500-1394"; +#endif static const char pci_device_104c_8021[] = "TSB43AA22 IEEE-1394 Controller (PHY/Link Integrated)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8021_104d_80df[] = "Vaio PCG-FX403"; @@ -3752,12 +4276,24 @@ #endif static const char pci_device_104c_8022[] = "TSB43AB22 IEEE-1394a-2000 Controller (PHY/Link)"; static const char pci_device_104c_8023[] = "TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8023_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8023_1043_808b[] = "K8N4-E Mainboard"; +#endif static const char pci_device_104c_8024[] = "TSB43AB23 IEEE-1394a-2000 Controller (PHY/Link)"; static const char pci_device_104c_8025[] = "TSB82AA2 IEEE-1394b Link Layer Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_104c_8025_55aa_55aa[] = "FireWire 800 PCI Card"; +static const char pci_subsys_104c_8025_1458_1000[] = "GA-K8N Ultra-9 Mainboard"; #endif static const char pci_device_104c_8026[] = "TSB43AB21 IEEE-1394a-2000 Controller (PHY/Link)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8026_103c_006a[] = "nx9500"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8026_1043_808d[] = "A7V333 mainboard."; +#endif static const char pci_device_104c_8027[] = "PCI4451 IEEE-1394 Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8027_1028_00e6[] = "PCI4451 IEEE-1394 Controller (Dell Inspiron 8100)"; @@ -3767,34 +4303,98 @@ static const char pci_subsys_104c_8029_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8029_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8029_1071_8160[] = "MIM2900"; #endif +static const char pci_device_104c_802b[] = "PCI7410,7510,7610 OHCI-Lynx Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_802b_1028_0139[] = "Latitude D400"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_802b_1028_014e[] = "PCI7410,7510,7610 OHCI-Lynx Controller (Dell Latitude D800)"; +#endif static const char pci_device_104c_802e[] = "PCI7x20 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller"; +static const char pci_device_104c_8031[] = "PCIxx21/x515 Cardbus Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8031_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8031_103c_308b[] = "nx6125"; +#endif +static const char pci_device_104c_8032[] = "OHCI Compliant IEEE 1394 Host Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8032_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8032_103c_308b[] = "nx6125"; +#endif +static const char pci_device_104c_8033[] = "PCIxx21 Integrated FlashMedia Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8033_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8033_103c_308b[] = "nx6125"; +#endif +static const char pci_device_104c_8034[] = "PCI6411, PCI6421, PCI6611, PCI6621, PCI7411, PCI7421, PCI7611, PCI7621 Secure Digital (SD) Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8034_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8034_103c_308b[] = "nx6125"; +#endif +static const char pci_device_104c_8035[] = "PCI6411, PCI6421, PCI6611, PCI6621, PCI7411, PCI7421, PCI7611, PCI7621 Smart Card Controller (SMC)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8035_103c_099c[] = "nx6110/nc6120"; +#endif +static const char pci_device_104c_8036[] = "PCI6515 Cardbus Controller"; +static const char pci_device_104c_8038[] = "PCI6515 SmartCard Controller"; static const char pci_device_104c_8201[] = "PCI1620 Firmware Loading Function"; -static const char pci_device_104c_8400[] = "ACX 100 22Mbps Wireless Interface"; +static const char pci_device_104c_8204[] = "PCI7410,7510,7610 PCI Firmware Loading Function"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_104c_8400_00fc_16ec[] = "U.S. Robotics 22 Mbps Wireless PC Card (model 2210)"; +static const char pci_subsys_104c_8204_1028_0139[] = "Latitude D400"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_104c_8400_00fd_16ec[] = "U.S. Robotics 22Mbps Wireless PCI Adapter (model 2216)"; +static const char pci_subsys_104c_8204_1028_014e[] = "Latitude D800"; #endif +static const char pci_device_104c_8400[] = "ACX 100 22Mbps Wireless Interface"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8400_1186_3b00[] = "DWL-650+ PC Card cardbus 22Mbs Wireless Adapter [AirPlus]"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_8400_1186_3b01[] = "DWL-520+ 22Mbps PCI Wireless Adapter"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_8400_16ab_8501[] = "WL-8305 IEEE802.11b+ Wireless LAN PCI Adapter"; +#endif static const char pci_device_104c_8401[] = "ACX 100 22Mbps Wireless Interface"; static const char pci_device_104c_9000[] = "Wireless Interface (of unknown type)"; +static const char pci_device_104c_9065[] = "TMS320DM642"; static const char pci_device_104c_9066[] = "ACX 111 54Mbps Wireless Interface"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_9066_104c_9066[] = "DWL-G520+ Wireless PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_9066_1186_3b04[] = "DWL-G520+ Wireless PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_9066_1186_3b05[] = "DWL-G650+ AirPlusG+ CardBus Wireless LAN"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_9066_13d1_aba0[] = "SWLMP-54108 108Mbps Wireless mini PCI card 802.11g+"; +#endif static const char pci_device_104c_a001[] = "TDC1570"; static const char pci_device_104c_a100[] = "TDC1561"; static const char pci_device_104c_a102[] = "TNETA1575 HyperSAR Plus w/PCI Host i/f & UTOPIA i/f"; -static const char pci_device_104c_a106[] = "TMS320C6205 Fixed Point DSP"; +static const char pci_device_104c_a106[] = "TMS320C6414 TMS320C6415 TMS320C6416"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_a106_175c_5000[] = "ASI50xx Audio Adapter"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_a106_175c_6400[] = "ASI6400 Cobranet series"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_a106_175c_8700[] = "ASI87xx Radio Tuner card"; #endif static const char pci_device_104c_ac10[] = "PCI1050"; @@ -3814,12 +4414,15 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_ac1b_0e11_b113[] = "Armada M700"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_ac1b_1014_0130[] = "Thinkpad T20/T22/A21m"; +#endif static const char pci_device_104c_ac1c[] = "PCI1225"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_ac1c_0e11_b121[] = "Armada E500"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_104c_ac1c_1028_0088[] = "Dell Computer Corporation Latitude CPi A400XT"; +static const char pci_subsys_104c_ac1c_1028_0088[] = "Latitude CPi A400XT"; #endif static const char pci_device_104c_ac1d[] = "PCI1251A"; static const char pci_device_104c_ac1e[] = "PCI1211"; @@ -3841,12 +4444,32 @@ static const char pci_subsys_104c_ac44_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_ac44_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_ac44_1071_8160[] = "MIM2000"; #endif static const char pci_device_104c_ac46[] = "PCI4520 PC card Cardbus Controller"; +static const char pci_device_104c_ac47[] = "PCI7510 PC card Cardbus Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_ac47_1028_0139[] = "Latitude D400"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_ac47_1028_014e[] = "Latitude D800"; +#endif +static const char pci_device_104c_ac4a[] = "PCI7510,7610 PC card Cardbus Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_ac4a_1028_0139[] = "Latitude D400"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_ac4a_1028_014e[] = "Latitude D800"; +#endif static const char pci_device_104c_ac50[] = "PCI1410 PC card Cardbus Controller"; static const char pci_device_104c_ac51[] = "PCI1420"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_ac51_0e11_004e[] = "Evo N600c"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_ac51_1014_023b[] = "ThinkPad T23 (2647-4MG)"; #endif #ifdef INIT_SUBSYS_INFO @@ -3859,7 +4482,10 @@ static const char pci_subsys_104c_ac51_1033_80cd[] = "Versa Note VXi"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_104c_ac51_10cf_1095[] = "Lifebook C6155"; +static const char pci_subsys_104c_ac51_1095_10cf[] = "Fujitsu-Siemens LifeBook C Series"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_ac51_10cf_1095[] = "Lifebook S-4510/C6155"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_ac51_e4bf_1000[] = "CP2-2-HIPHOP"; @@ -3885,12 +4511,16 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_104c_ac60_175c_6200[] = "ASI62xx Audio Adapter"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_104c_ac60_175c_8800[] = "ASI88xx Audio Adapter"; +#endif static const char pci_device_104c_ac8d[] = "PCI 7620"; static const char pci_device_104c_ac8e[] = "PCI7420 CardBus Controller"; static const char pci_device_104c_ac8f[] = "PCI7420/PCI7620 Dual Socket CardBus and Smart Card Cont. w/ 1394a-2000 OHCI Two-Port PHY/Link-Layer Cont. and SD/MS-Pro Sockets"; static const char pci_device_104c_fe00[] = "FireWire Host Controller"; static const char pci_device_104c_fe03[] = "12C01A FireWire Host Controller"; static const char pci_vendor_104d[] = "Sony Corporation"; +static const char pci_device_104d_8004[] = "DTL-H2500 [Playstation development board]"; static const char pci_device_104d_8009[] = "CXD1947Q i.LINK Controller"; static const char pci_device_104d_8039[] = "CXD3222 i.LINK Controller"; static const char pci_device_104d_8056[] = "Rockwell HCF 56K modem"; @@ -3920,6 +4550,24 @@ static const char pci_device_1050_0940[] = "W89C940"; static const char pci_device_1050_5a5a[] = "W89C940F"; static const char pci_device_1050_6692[] = "W6692"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1050_6692_1043_1702[] = "ISDN Adapter (PCI Bus, D, W)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1050_6692_1043_1703[] = "ISDN Adapter (PCI Bus, DV, W)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1050_6692_1043_1707[] = "ISDN Adapter (PCI Bus, DV, W)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1050_6692_144f_1702[] = "ISDN Adapter (PCI Bus, D, W)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1050_6692_144f_1703[] = "ISDN Adapter (PCI Bus, DV, W)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1050_6692_144f_1707[] = "ISDN Adapter (PCI Bus, DV, W)"; +#endif static const char pci_device_1050_9921[] = "W99200F MPEG-1 Video Encoder"; static const char pci_device_1050_9922[] = "W99200F/W9922PF MPEG-1/2 Video Encoder"; static const char pci_device_1050_9970[] = "W9970CF"; @@ -3997,10 +4645,77 @@ static const char pci_subsys_1057_1801_175c_4400[] = "ASI4401 Audio Adapter"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1057_1801_ecc0_0030[] = "Layla"; +static const char pci_subsys_1057_1801_ecc0_0010[] = "Darla"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_1801_ecc0_0020[] = "Gina"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_1801_ecc0_0030[] = "Layla rev.0"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_1801_ecc0_0031[] = "Layla rev.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_1801_ecc0_0040[] = "Darla24 rev.0"; #endif -static const char pci_device_1057_18c0[] = "MPC8265A/MPC8266"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_1801_ecc0_0041[] = "Darla24 rev.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_1801_ecc0_0050[] = "Gina24 rev.0"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_1801_ecc0_0051[] = "Gina24 rev.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_1801_ecc0_0070[] = "Mona rev.0"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_1801_ecc0_0071[] = "Mona rev.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_1801_ecc0_0072[] = "Mona rev.2"; +#endif +static const char pci_device_1057_18c0[] = "MPC8265A/8266/8272"; static const char pci_device_1057_18c1[] = "MPC8271/MPC8272"; +static const char pci_device_1057_3410[] = "DSP56361 Digital Signal Processor"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_3410_ecc0_0050[] = "Gina24 rev.0"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_3410_ecc0_0051[] = "Gina24 rev.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_3410_ecc0_0060[] = "Layla24"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_3410_ecc0_0070[] = "Mona rev.0"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_3410_ecc0_0071[] = "Mona rev.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_3410_ecc0_0072[] = "Mona rev.2"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_3410_ecc0_0080[] = "Mia rev.0"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_3410_ecc0_0081[] = "Mia rev.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_3410_ecc0_0090[] = "Indigo"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_3410_ecc0_00a0[] = "Indigo IO"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_3410_ecc0_00b0[] = "Indigo DJ"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1057_3410_ecc0_0100[] = "3G"; +#endif static const char pci_device_1057_4801[] = "Raven"; static const char pci_device_1057_4802[] = "Falcon"; static const char pci_device_1057_4803[] = "Hawk"; @@ -4058,7 +4773,10 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1057_5600_1668_0302[] = "SM56 PCI Fax Modem"; #endif +static const char pci_device_1057_5608[] = "Wildcard X100P"; static const char pci_device_1057_5803[] = "MPC5200"; +static const char pci_device_1057_5806[] = "MCF54 Coldfire"; +static const char pci_device_1057_5808[] = "MPC8220"; static const char pci_device_1057_6400[] = "MPC190 Security Processor (S1 family, encryption)"; static const char pci_device_1057_6405[] = "MPC184 Security Processor (S1 family)"; #ifdef VENDOR_INCLUDE_NONVIDEO @@ -4088,7 +4806,7 @@ static const char pci_device_105a_3371[] = "PDC20371 (FastTrak S150 TX2plus)"; static const char pci_device_105a_3373[] = "PDC20378 (FastTrak 378/SATA 378)"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_105a_3373_1043_80f5[] = "PC-DL Deluxe motherboard"; +static const char pci_subsys_105a_3373_1043_80f5[] = "K8V Deluxe/PC-DL Deluxe motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_105a_3373_1462_702e[] = "K8T NEO FIS2R motherboard"; @@ -4098,8 +4816,16 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_105a_3376_1043_809e[] = "A7V8X motherboard"; #endif +static const char pci_device_105a_3515[] = "PDC40719"; +static const char pci_device_105a_3519[] = "PDC40519 (FastTrak TX4200)"; +static const char pci_device_105a_3570[] = "20771 (FastTrak TX2300)"; +static const char pci_device_105a_3571[] = "PDC20571 (FastTrak TX2200)"; static const char pci_device_105a_3574[] = "PDC20579 SATAII 150 IDE Controller"; -static const char pci_device_105a_3d18[] = "PDC20518 SATAII 150 IDE Controller"; +static const char pci_device_105a_3577[] = "PDC40779 (SATA 300 779)"; +static const char pci_device_105a_3d17[] = "PDC20718 (SATA 300 TX4)"; +static const char pci_device_105a_3d18[] = "PDC20518/PDC40518 (SATAII 150 TX4)"; +static const char pci_device_105a_3d73[] = "PDC40775 (SATA 300 TX2plus)"; +static const char pci_device_105a_3d75[] = "PDC20575 (SATAII150 TX2plus)"; static const char pci_device_105a_4d30[] = "PDC20267 (FastTrak100/Ultra100)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_105a_4d30_105a_4d33[] = "Ultra100"; @@ -4131,6 +4857,9 @@ #endif static const char pci_device_105a_5275[] = "PDC20276 (MBFastTrak133 Lite)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_105a_5275_1043_807e[] = "A7V333 motherboard."; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_105a_5275_105a_0275[] = "SuperTrak SX6000 IDE"; #endif #ifdef INIT_SUBSYS_INFO @@ -4150,9 +4879,11 @@ #endif static const char pci_device_105a_6621[] = "PDC20621 (FastTrak S150 SX4/FastTrak SX4000 lite)"; static const char pci_device_105a_6622[] = "PDC20621 [SATA150 SX4] 4 Channel IDE RAID Controller"; +static const char pci_device_105a_6624[] = "PDC20621 [FastTrak SX4100]"; static const char pci_device_105a_6626[] = "PDC20618 (Ultra 618)"; static const char pci_device_105a_6629[] = "PDC20619 (FastTrak TX4000)"; static const char pci_device_105a_7275[] = "PDC20277 (SBFastTrak133 Lite)"; +static const char pci_device_105a_8002[] = "SATAII150 SX8"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_105b[] = "Foxconn International, Inc."; @@ -4330,7 +5061,16 @@ static const char pci_device_1069_0010[] = "DAC960PG"; static const char pci_device_1069_0020[] = "DAC960LA"; static const char pci_device_1069_0050[] = "AcceleRAID 352/170/160 support Device"; -static const char pci_device_1069_b166[] = "Gemstone chipset SCSI controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1069_0050_1069_0050[] = "AcceleRAID 352 support Device"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1069_0050_1069_0052[] = "AcceleRAID 170 support Device"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1069_0050_1069_0054[] = "AcceleRAID 160 support Device"; +#endif +static const char pci_device_1069_b166[] = "AcceleRAID 600/500/400/Sapphire support Device"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1069_b166_1014_0242[] = "iSeries 2872 DASD IOA"; #endif @@ -4340,8 +5080,36 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1069_b166_1014_0278[] = "Dual Channel PCI-X U320 SCSI RAID Adapter"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1069_b166_1014_02d3[] = "Dual Channel PCI-X U320 SCSI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1069_b166_1014_02d4[] = "Dual Channel PCI-X U320 SCSI RAID Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1069_b166_1069_0200[] = "AcceleRAID 400, Single Channel, PCI-X, U320, SCSI RAID"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1069_b166_1069_0202[] = "AcceleRAID Sapphire, Dual Channel, PCI-X, U320, SCSI RAID"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1069_b166_1069_0204[] = "AcceleRAID 500, Dual Channel, Low-Profile, PCI-X, U320, SCSI RAID"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1069_b166_1069_0206[] = "AcceleRAID 600, Dual Channel, PCI-X, U320, SCSI RAID"; +#endif static const char pci_device_1069_ba55[] = "eXtremeRAID 1100 support Device"; static const char pci_device_1069_ba56[] = "eXtremeRAID 2000/3000 support Device"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1069_ba56_1069_0030[] = "eXtremeRAID 3000 support Device"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1069_ba56_1069_0040[] = "eXtremeRAID 2000 support Device"; +#endif +static const char pci_device_1069_ba57[] = "eXtremeRAID 4000/5000 support Device"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1069_ba57_1069_0072[] = "eXtremeRAID 5000 support Device"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_106a[] = "Aten Research Inc"; @@ -4353,6 +5121,7 @@ static const char pci_device_106b_0003[] = "Control Video"; static const char pci_device_106b_0004[] = "PlanB Video-In"; static const char pci_device_106b_0007[] = "O'Hare I/O"; +static const char pci_device_106b_000c[] = "DOS on Mac"; static const char pci_device_106b_000e[] = "Hydra Mac I/O"; static const char pci_device_106b_0010[] = "Heathrow Mac I/O"; static const char pci_device_106b_0017[] = "Paddington Mac I/O"; @@ -4374,6 +5143,9 @@ static const char pci_device_106b_002f[] = "UniNorth 1.5 Internal PCI"; static const char pci_device_106b_0030[] = "UniNorth/Pangea FireWire"; static const char pci_device_106b_0031[] = "UniNorth 2 FireWire"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_106b_0031_106b_5811[] = "iBook G4 2004"; +#endif static const char pci_device_106b_0032[] = "UniNorth 2 GMAC (Sun GEM)"; static const char pci_device_106b_0033[] = "UniNorth 2 ATA/100"; static const char pci_device_106b_0034[] = "UniNorth 2 AGP"; @@ -4401,6 +5173,13 @@ static const char pci_device_106b_0054[] = "Shasta PCI Bridge"; static const char pci_device_106b_0055[] = "Shasta PCI Bridge"; static const char pci_device_106b_0058[] = "U3L AGP Bridge"; +static const char pci_device_106b_0059[] = "U3H AGP Bridge"; +static const char pci_device_106b_0066[] = "Intrepid2 AGP Bridge"; +static const char pci_device_106b_0067[] = "Intrepid2 PCI Bridge"; +static const char pci_device_106b_0068[] = "Intrepid2 PCI Bridge"; +static const char pci_device_106b_0069[] = "Intrepid2 ATA/100"; +static const char pci_device_106b_006a[] = "Intrepid2 Firewire"; +static const char pci_device_106b_006b[] = "Intrepid2 GMAC (Sun GEM)"; static const char pci_device_106b_1645[] = "Tigon3 Gigabit Ethernet NIC (BCM5701)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -4516,6 +5295,15 @@ #endif static const char pci_device_1077_2300[] = "QLA2300 64-bit Fibre Channel Adapter"; static const char pci_device_1077_2312[] = "QLA2312 Fibre Channel Adapter"; +static const char pci_device_1077_2322[] = "QLA2322 Fibre Channel Adapter"; +static const char pci_device_1077_2422[] = "QLA2422 Fibre Channel Adapter"; +static const char pci_device_1077_2432[] = "QLA2432 Fibre Channel Adapter"; +static const char pci_device_1077_3010[] = "QLA3010 Network Adapter"; +static const char pci_device_1077_3022[] = "QLA3022 Network Adapter"; +static const char pci_device_1077_4010[] = "QLA4010 iSCSI TOE Adapter"; +static const char pci_device_1077_4022[] = "QLA4022 iSCSI TOE Adapter"; +static const char pci_device_1077_6312[] = "QLA6312 Fibre Channel Adapter"; +static const char pci_device_1077_6322[] = "QLA6322 Fibre Channel Adapter"; #endif static const char pci_vendor_1078[] = "Cyrix Corporation"; static const char pci_device_1078_0000[] = "5510 [Grappa]"; @@ -4656,6 +5444,7 @@ static const char pci_device_108e_1101[] = "RIO GEM"; static const char pci_device_108e_1102[] = "RIO 1394"; static const char pci_device_108e_1103[] = "RIO USB"; +static const char pci_device_108e_1648[] = "[bge] Gigabit Ethernet"; static const char pci_device_108e_2bad[] = "GEM"; static const char pci_device_108e_5000[] = "Simba Advanced PCI Bridge"; static const char pci_device_108e_5043[] = "SunPCI Co-processor"; @@ -4670,7 +5459,7 @@ static const char pci_vendor_108f[] = "Systemsoft"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1090[] = "Encore Computer Corporation"; +static const char pci_vendor_1090[] = "Compro Computer Services, Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1091[] = "Intergraph Corporation"; @@ -4712,6 +5501,7 @@ static const char pci_device_1093_1170[] = "PCI-MIO-16XE-10"; static const char pci_device_1093_1180[] = "PCI-MIO-16E-1"; static const char pci_device_1093_1190[] = "PCI-MIO-16E-4"; +static const char pci_device_1093_1310[] = "PCI-6602"; static const char pci_device_1093_1330[] = "PCI-6031E"; static const char pci_device_1093_1350[] = "PCI-6071E"; static const char pci_device_1093_14e0[] = "PCI-6110"; @@ -4727,6 +5517,8 @@ static const char pci_device_1093_2a80[] = "PCI-6025E"; static const char pci_device_1093_2c80[] = "PCI-6035E"; static const char pci_device_1093_2ca0[] = "PCI-6034E"; +static const char pci_device_1093_70a9[] = "PCI-6528"; +static const char pci_device_1093_70b8[] = "PCI-6251 [M Series - High Speed Multifunction DAQ]"; static const char pci_device_1093_b001[] = "IMAQ-PCI-1408"; static const char pci_device_1093_b011[] = "IMAQ-PXI-1408"; static const char pci_device_1093_b021[] = "IMAQ-PCI-1424"; @@ -4744,13 +5536,16 @@ static const char pci_vendor_1094[] = "First International Computers [FIC]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1095[] = "Silicon Image, Inc. (formerly CMD Technology Inc)"; +static const char pci_vendor_1095[] = "Silicon Image, Inc."; static const char pci_device_1095_0240[] = "Adaptec AAR-1210SA SATA HostRAID Controller"; static const char pci_device_1095_0640[] = "PCI0640"; static const char pci_device_1095_0643[] = "PCI0643"; static const char pci_device_1095_0646[] = "PCI0646"; static const char pci_device_1095_0647[] = "PCI0647"; static const char pci_device_1095_0648[] = "PCI0648"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1095_0648_1043_8025[] = "CUBX motherboard"; +#endif static const char pci_device_1095_0649[] = "SiI 0649 Ultra ATA/100 PCI to ATA Host Controller"; #endif #ifdef INIT_SUBSYS_INFO @@ -4782,6 +5577,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1095_3112_1095_6112[] = "SiI 3112 SATARaid Controller"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1095_3112_9005_0250[] = "SATAConnect 1205SA Host Controller"; +#endif static const char pci_device_1095_3114[] = "SiI 3114 [SATALink/SATARaid] Serial ATA Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1095_3114_1095_3114[] = "SiI 3114 SATALink Controller"; @@ -4793,6 +5591,7 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1095_3124_1095_3124[] = "SiI 3124 PCI-X Serial ATA Controller"; #endif +static const char pci_device_1095_3132[] = "SiI 3132 Serial ATA Raid II Controller"; static const char pci_device_1095_3512[] = "SiI 3512 [SATALink/SATARaid] Serial ATA Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1095_3512_1095_3512[] = "SiI 3512 SATALink Controller"; @@ -4828,6 +5627,7 @@ static const char pci_vendor_109d[] = "Zida Technologies Ltd."; #endif static const char pci_vendor_109e[] = "Brooktree Corporation"; +static const char pci_device_109e_032e[] = "Bt878 Video Capture"; static const char pci_device_109e_0350[] = "Bt848 Video Capture"; static const char pci_device_109e_0351[] = "Bt849A Video capture"; static const char pci_device_109e_0369[] = "Bt878 Video Capture"; @@ -4879,6 +5679,9 @@ static const char pci_subsys_109e_036e_1461_0002[] = "TV98 Series (TV/No FM/Remote)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_109e_036e_1461_0003[] = "AverMedia UltraTV PCI 350"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_109e_036e_1461_0004[] = "AVerTV WDM Video Capture"; #endif #ifdef INIT_SUBSYS_INFO @@ -4909,6 +5712,9 @@ static const char pci_subsys_109e_036e_1852_1852[] = "FlyVideo'98 - Video (with FM Tuner)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_109e_036e_18ac_d500[] = "DViCO FusionHDTV5 Lite"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_109e_036e_270f_fc00[] = "Digitop DTT-1000"; #endif #ifdef INIT_SUBSYS_INFO @@ -5053,6 +5859,9 @@ static const char pci_subsys_109e_0878_144f_3000[] = "MagicTView CPH060 - Audio"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_109e_0878_1461_0002[] = "Avermedia PCTV98 Audio Capture"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_109e_0878_1461_0004[] = "AVerTV WDM Audio Capture"; #endif #ifdef INIT_SUBSYS_INFO @@ -5074,6 +5883,9 @@ static const char pci_subsys_109e_0878_1822_0001[] = "VisionPlus DVB Card"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_109e_0878_18ac_d500[] = "DViCO FusionHDTV5 Lite"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_109e_0878_270f_fc00[] = "Digitop DTT-1000"; #endif #ifdef INIT_SUBSYS_INFO @@ -5227,8 +6039,12 @@ static const char pci_device_10a9_100a[] = "IOC4 I/O controller"; static const char pci_device_10a9_2001[] = "Fibre Channel"; static const char pci_device_10a9_2002[] = "ASDE"; +static const char pci_device_10a9_4001[] = "TIO-CE PCI Express Bridge"; +static const char pci_device_10a9_4002[] = "TIO-CE PCI Express Port"; static const char pci_device_10a9_8001[] = "O2 1394"; static const char pci_device_10a9_8002[] = "G-net NT"; +static const char pci_device_10a9_8010[] = "Broadcom e-net [SGI IO9/IO10 BaseIO]"; +static const char pci_device_10a9_8018[] = "Broadcom e-net [SGI A330 Server BaseIO]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10aa[] = "ACC Microelectronics"; @@ -5279,13 +6095,31 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10b5[] = "PLX Technology, Inc."; static const char pci_device_10b5_0001[] = "i960 PCI bus interface"; +static const char pci_device_10b5_1042[] = "Brandywine / jxi2, Inc. - PMC-SyncClock32, IRIG A & B, Nasa 36"; static const char pci_device_10b5_1076[] = "VScom 800 8 port serial adaptor"; static const char pci_device_10b5_1077[] = "VScom 400 4 port serial adaptor"; static const char pci_device_10b5_1078[] = "VScom 210 2 port serial and 1 port parallel adaptor"; static const char pci_device_10b5_1103[] = "VScom 200 2 port serial adaptor"; static const char pci_device_10b5_1146[] = "VScom 010 1 port parallel adaptor"; static const char pci_device_10b5_1147[] = "VScom 020 2 port parallel adaptor"; +static const char pci_device_10b5_2540[] = "IXXAT CAN-Interface PC-I 04/PCI"; static const char pci_device_10b5_2724[] = "Thales PCSM Security Card"; +static const char pci_device_10b5_6540[] = "PCI6540/6466 PCI-PCI bridge (transparent mode)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_6540_4c53_10e0[] = "PSL09 PrPMC"; +#endif +static const char pci_device_10b5_6541[] = "PCI6540/6466 PCI-PCI bridge (non-transparent mode, primary side)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_6541_4c53_10e0[] = "PSL09 PrPMC"; +#endif +static const char pci_device_10b5_6542[] = "PCI6540/6466 PCI-PCI bridge (non-transparent mode, secondary side)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_6542_4c53_10e0[] = "PSL09 PrPMC"; +#endif +static const char pci_device_10b5_8111[] = "PEX 8111 PCI Express-to-PCI Bridge"; +static const char pci_device_10b5_8114[] = "PEX 8114 PCI Express-to-PCI/PCI-X Bridge"; +static const char pci_device_10b5_8516[] = "PEX 8516 Versatile PCI Express Switch"; +static const char pci_device_10b5_8532[] = "PEX 8532 Versatile PCI Express Switch"; static const char pci_device_10b5_9030[] = "PCI <-> IOBus Bridge Hot Swap"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9030_10b5_2862[] = "Alpermann+Velte PCL PCI LV (3V/5V): Timecode Reader Board"; @@ -5297,6 +6131,27 @@ static const char pci_subsys_10b5_9030_10b5_2940[] = "Alpermann+Velte PCL PCI D (3V/5V): Timecode Reader Board"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_9030_10b5_2977[] = "IXXAT iPC-I XC16/PCI CAN Board"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_9030_10b5_2978[] = "SH ARC-PCIu SOHARD ARCNET card"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_9030_10b5_3025[] = "Alpermann+Velte PCL PCI L (3V/5V): Timecode Reader Board"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_9030_10b5_3068[] = "Alpermann+Velte PCL PCI HD (3V/5V): Timecode Reader Board"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_9030_1397_3136[] = "4xS0-ISDN PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_9030_1397_3137[] = "S2M-E1-ISDN PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_9030_1518_0200[] = "Kontron ThinkIO-C"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9030_15ed_1002[] = "MCCS 8-port Serial Hot Swap"; #endif #ifdef INIT_SUBSYS_INFO @@ -5317,7 +6172,7 @@ static const char pci_subsys_10b5_9050_10b5_2221[] = "Alpermann+Velte PCL PCI LV: Timecode Reader Board"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10b5_9050_10b5_2273[] = "SH-ARC SoHard ARCnet card"; +static const char pci_subsys_10b5_9050_10b5_2273[] = "SH ARC-PCI SOHARD ARCNET card"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9050_10b5_2431[] = "Alpermann+Velte PCL PCI D: Timecode Reader Board"; @@ -5438,6 +6293,9 @@ static const char pci_subsys_10b5_9054_10b5_2844[] = "Innes Corp TVS Encoder card"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b5_9054_12c7_4001[] = "Intel Dialogic DM/V960-4T1 PCI"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9054_12d9_0002[] = "PCI Prosody Card rev 1.5"; #endif #ifdef INIT_SUBSYS_INFO @@ -5447,7 +6305,7 @@ static const char pci_subsys_10b5_9054_16df_0012[] = "PIKA PrimeNet MM cPCI 8"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10b5_9054_16df_0013[] = "PIKA PrimeNet MM cPCI 8 (without CAS Signaling Option)"; +static const char pci_subsys_10b5_9054_16df_0013[] = "PIKA PrimeNet MM cPCI 8 (without CAS Signaling)"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b5_9054_16df_0014[] = "PIKA PrimeNet MM cPCI 4"; @@ -5471,7 +6329,7 @@ static const char pci_device_10b5_9080[] = "9080"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10b5_9080_103c_10eb[] = "(Agilent) E2777B 83K Series PCI based Optical Communication Interface"; +static const char pci_subsys_10b5_9080_103c_10eb[] = "(Agilent) E2777B 83K Series Optical Communication Interface"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #endif @@ -5563,7 +6421,7 @@ static const char pci_device_10b7_1202[] = "3c982-TXM 10/100baseTX Dual Port B [Hydra]"; static const char pci_device_10b7_1700[] = "3c940 10/100/1000Base-T [Marvell]"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10b7_1700_1043_80eb[] = "P4P800 Mainboard"; +static const char pci_subsys_10b7_1700_1043_80eb[] = "A7V600/P4P800/K8V motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b7_1700_10b7_0010[] = "3C940 Gigabit LOM Ethernet Adapter"; @@ -5916,12 +6774,12 @@ static const char pci_subsys_10b9_1523_10b9_1523[] = "ALI M1523 ISA Bridge"; #endif static const char pci_device_10b9_1531[] = "M1531 [Aladdin IV]"; -static const char pci_device_10b9_1533[] = "M1533 PCI to ISA Bridge [Aladdin IV]"; +static const char pci_device_10b9_1533[] = "M1533/M1535 PCI to ISA Bridge [Aladdin IV/V/V+]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b9_1533_1014_053b[] = "ThinkPad R40e (2684-HVG) PCI to ISA Bridge"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10b9_1533_10b9_1533[] = "ALI M1533 Aladdin IV ISA Bridge"; +static const char pci_subsys_10b9_1533_10b9_1533[] = "ALi M1533 Aladdin IV/V ISA Bridge"; #endif static const char pci_device_10b9_1541[] = "M1541"; #ifdef INIT_SUBSYS_INFO @@ -5929,6 +6787,7 @@ #endif static const char pci_device_10b9_1543[] = "M1543"; static const char pci_device_10b9_1563[] = "M1563 HyperTransport South Bridge"; +static const char pci_device_10b9_1573[] = "PCI to LPC Controller"; static const char pci_device_10b9_1621[] = "M1621"; static const char pci_device_10b9_1631[] = "ALI M1631 PCI North Bridge Aladdin Pro III"; static const char pci_device_10b9_1632[] = "M1632M Northbridge+Trident"; @@ -5942,6 +6801,8 @@ static const char pci_device_10b9_1681[] = "M1681 P4 Northbridge [AGP8X,HyperTransport and SDR/DDR]"; static const char pci_device_10b9_1687[] = "M1687 K8 Northbridge [AGP8X and HyperTransport]"; static const char pci_device_10b9_1689[] = "M1689 K8 Northbridge [Super K8 Single Chip]"; +static const char pci_device_10b9_1695[] = "M1695 K8 Northbridge [PCI Express and HyperTransport]"; +static const char pci_device_10b9_1697[] = "M1697 HTT Host Bridge"; static const char pci_device_10b9_3141[] = "M3141"; static const char pci_device_10b9_3143[] = "M3143"; static const char pci_device_10b9_3145[] = "M3145"; @@ -5956,6 +6817,7 @@ static const char pci_device_10b9_5217[] = "M5217H"; static const char pci_device_10b9_5219[] = "M5219"; static const char pci_device_10b9_5225[] = "M5225"; +static const char pci_device_10b9_5228[] = "M5228 ALi ATA/RAID Controller"; static const char pci_device_10b9_5229[] = "M5229 IDE"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10b9_5229_1014_050f[] = "ThinkPad R30"; @@ -5981,16 +6843,28 @@ static const char pci_subsys_10b9_5237_103c_0024[] = "Pavilion ze4400 builtin USB"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10b9_5237_104d_810f[] = "VAIO PCG-U1 USB/OHCI Revision 1.0"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_10b9_5239[] = "USB 2.0 Controller"; static const char pci_device_10b9_5243[] = "M1541 PCI to AGP Controller"; static const char pci_device_10b9_5246[] = "AGP8X Controller"; static const char pci_device_10b9_5247[] = "PCI to AGP Controller"; static const char pci_device_10b9_5249[] = "M5249 HTT to PCI Bridge"; +static const char pci_device_10b9_524b[] = "PCI Express Root Port"; +static const char pci_device_10b9_524c[] = "PCI Express Root Port"; +static const char pci_device_10b9_524d[] = "PCI Express Root Port"; +static const char pci_device_10b9_524e[] = "PCI Express Root Port"; static const char pci_device_10b9_5251[] = "M5251 P1394 OHCI 1.0 Controller"; static const char pci_device_10b9_5253[] = "M5253 P1394 OHCI 1.1 Controller"; static const char pci_device_10b9_5261[] = "M5261 Ethernet Controller"; static const char pci_device_10b9_5263[] = "M5263 Ethernet Controller"; static const char pci_device_10b9_5281[] = "ALi M5281 Serial ATA / RAID Host Controller"; +static const char pci_device_10b9_5287[] = "ULi 5287 SATA"; +static const char pci_device_10b9_5288[] = "ULi M5288 SATA"; +static const char pci_device_10b9_5289[] = "ULi 5289 SATA"; static const char pci_device_10b9_5450[] = "Lucent Technologies Soft Modem AMR"; static const char pci_device_10b9_5451[] = "M5451 PCI AC-Link Controller Audio Device"; #ifdef INIT_SUBSYS_INFO @@ -6020,6 +6894,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_10b9_5459[] = "SmartLink SmartPCI561 56K Modem"; static const char pci_device_10b9_545a[] = "SmartLink SmartPCI563 56K Modem"; +static const char pci_device_10b9_5461[] = "High Definition Audio/AC'97 Host Controller"; static const char pci_device_10b9_5471[] = "M5471 Memory Stick Controller"; static const char pci_device_10b9_5473[] = "M5473 SD-MMC Controller"; static const char pci_device_10b9_7101[] = "M7101 Power Management Controller [PMU]"; @@ -6253,12 +7128,14 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10d9[] = "Macronix, Inc. [MXIC]"; +static const char pci_device_10d9_0431[] = "MX98715"; static const char pci_device_10d9_0512[] = "MX98713"; static const char pci_device_10d9_0531[] = "MX987x5"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10d9_0531_1186_1200[] = "DFE-540TX ProFAST 10/100 Adapter"; #endif static const char pci_device_10d9_8625[] = "MX86250"; +static const char pci_device_10d9_8626[] = "Macronix MX86251 + 3Dfx Voodoo Rush"; static const char pci_device_10d9_8888[] = "MX86200"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -6279,6 +7156,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10dd[] = "Evans & Sutherland"; +static const char pci_device_10dd_0100[] = "Lightning 1200"; #endif static const char pci_vendor_10de[] = "nVidia Corporation"; static const char pci_device_10de_0008[] = "NV1 [EDGE 3D]"; @@ -6292,9 +7170,15 @@ static const char pci_subsys_10de_0020_1048_0c18[] = "Erazor II SGRAM"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0020_1048_0c19[] = "Erazor II"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0020_1048_0c1b[] = "Erazor II"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0020_1048_0c1c[] = "Erazor II"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0020_1092_0550[] = "Viper V550"; #endif #ifdef INIT_SUBSYS_INFO @@ -6365,7 +7249,28 @@ static const char pci_subsys_10de_0028_1048_0c21[] = "Synergy II"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10de_0028_1048_0c31[] = "Erazor III"; +static const char pci_subsys_10de_0028_1048_0c28[] = "Erazor III"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0028_1048_0c29[] = "Erazor III"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0028_1048_0c2a[] = "Erazor III"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0028_1048_0c2b[] = "Erazor III"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0028_1048_0c31[] = "Erazor III Pro"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0028_1048_0c32[] = "Erazor III Pro"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0028_1048_0c33[] = "Erazor III Pro"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0028_1048_0c34[] = "Erazor III Pro"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0028_107d_2134[] = "WinFast 3D S320 II + TV-Out"; @@ -6414,6 +7319,15 @@ static const char pci_subsys_10de_0029_1043_0205[] = "PCI-V3800 Ultra"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0029_1048_0c2e[] = "Erazor III Ultra"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0029_1048_0c2f[] = "Erazor III Ultra"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0029_1048_0c30[] = "Erazor III Ultra"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0029_1102_1021[] = "3D Blaster RIVA TNT2 Ultra"; #endif #ifdef INIT_SUBSYS_INFO @@ -6435,6 +7349,12 @@ static const char pci_subsys_10de_002c_1043_0201[] = "AGP-V3800 Combat"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_002c_1048_0c20[] = "TNT2 Vanta"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_002c_1048_0c21[] = "TNT2 Vanta"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_002c_1092_6820[] = "Viper V730"; #endif #ifdef INIT_SUBSYS_INFO @@ -6457,6 +7377,9 @@ static const char pci_subsys_10de_002d_1048_0c3a[] = "Erazor III LT"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_002d_1048_0c3b[] = "Erazor III LT"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_002d_10de_001e[] = "M64 AGP4x"; #endif #ifdef INIT_SUBSYS_INFO @@ -6474,6 +7397,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_002d_1554_1041[] = "Pixelview RIVA TNT2 M64"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_002d_1569_002d[] = "Palit Microsystems Daytona TNT2 M64"; +#endif static const char pci_device_10de_002e[] = "NV6 [Vanta]"; static const char pci_device_10de_002f[] = "NV6 [Vanta]"; static const char pci_device_10de_0034[] = "MCP04 SMBus"; @@ -6486,69 +7412,180 @@ static const char pci_device_10de_003c[] = "MCP04 USB Controller"; static const char pci_device_10de_003d[] = "MCP04 PCI Bridge"; static const char pci_device_10de_003e[] = "MCP04 Serial ATA Controller"; -static const char pci_device_10de_0040[] = "nv40 [GeForce 6800 Ultra]"; +static const char pci_device_10de_0040[] = "NV40 [GeForce 6800 Ultra]"; static const char pci_device_10de_0041[] = "NV40 [GeForce 6800]"; -static const char pci_device_10de_0042[] = "NV40.2"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0041_1043_817b[] = "V9999 Gamer Edition"; +#endif +static const char pci_device_10de_0042[] = "NV40.2 [GeForce 6800 LE]"; static const char pci_device_10de_0043[] = "NV40.3"; static const char pci_device_10de_0045[] = "NV40 [GeForce 6800 GT]"; +static const char pci_device_10de_0047[] = "NV40 [GeForce 6800 GS]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0047_1682_2109[] = "GeForce 6800 GS"; +#endif static const char pci_device_10de_0049[] = "NV40GL"; static const char pci_device_10de_004e[] = "NV40GL [Quadro FX 4000]"; +static const char pci_device_10de_0050[] = "CK804 ISA Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0050_1043_815a[] = "K8N4-E Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0050_1458_0c11[] = "GA-K8N Ultra-9 Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0050_1462_7100[] = "MSI K8N Diamond"; +#endif +static const char pci_device_10de_0051[] = "CK804 ISA Bridge"; static const char pci_device_10de_0052[] = "CK804 SMBus"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0052_1043_815a[] = "K8N4-E Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0052_1458_0c11[] = "GA-K8N Ultra-9 Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0052_1462_7100[] = "MSI K8N Diamond"; +#endif static const char pci_device_10de_0053[] = "CK804 IDE"; -static const char pci_device_10de_0054[] = "CK804 Serial ATA Controller"; -static const char pci_device_10de_0055[] = "CK804 Serial ATA Controller"; -static const char pci_device_10de_0056[] = "CK804 Ethernet Controller"; -static const char pci_device_10de_0057[] = "CK804 Ethernet Controller"; -static const char pci_device_10de_0059[] = "CK804 AC'97 Audio Controller"; -static const char pci_device_10de_005a[] = "CK804 USB Controller"; -static const char pci_device_10de_005b[] = "CK804 USB Controller"; -static const char pci_device_10de_005c[] = "CK804 PCI Bridge"; -static const char pci_device_10de_005d[] = "CK804 PCIE Bridge"; -static const char pci_device_10de_005e[] = "CK804 Memory Controller"; -static const char pci_device_10de_0060[] = "nForce2 ISA Bridge"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10de_0060_1043_80ad[] = "A7N8X Mainboard"; +static const char pci_subsys_10de_0053_1043_815a[] = "K8N4-E Mainboard"; #endif -static const char pci_device_10de_0064[] = "nForce2 SMBus (MCP)"; -static const char pci_device_10de_0065[] = "nForce2 IDE"; -static const char pci_device_10de_0066[] = "nForce2 Ethernet Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10de_0066_1043_80a7[] = "A7N8X Mainboard onboard nForce2 Ethernet"; +static const char pci_subsys_10de_0053_1458_5002[] = "GA-K8N Ultra-9 Mainboard"; #endif -static const char pci_device_10de_0067[] = "nForce2 USB Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10de_0067_1043_0c11[] = "A7N8X Mainboard"; +static const char pci_subsys_10de_0053_1462_7100[] = "MSI K8N Diamond"; #endif -static const char pci_device_10de_0068[] = "nForce2 USB Controller"; +static const char pci_device_10de_0054[] = "CK804 Serial ATA Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10de_0068_1043_0c11[] = "A7N8X Mainboard"; +static const char pci_subsys_10de_0054_1458_b003[] = "GA-K8N Ultra-9 Mainboard"; #endif -static const char pci_device_10de_006a[] = "nForce2 AC97 Audio Controler (MCP)"; -static const char pci_device_10de_006b[] = "nForce MultiMedia audio [Via VT82C686B]"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10de_006b_10de_006b[] = "nForce2 MCP Audio Processing Unit"; +static const char pci_subsys_10de_0054_1462_7100[] = "MSI K8N Diamond"; +#endif +static const char pci_device_10de_0055[] = "CK804 Serial ATA Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0055_1043_815a[] = "K8N4-E Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0055_1458_b003[] = "GA-K8N Ultra-9 Mainboard"; +#endif +static const char pci_device_10de_0056[] = "CK804 Ethernet Controller"; +static const char pci_device_10de_0057[] = "CK804 Ethernet Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0057_1043_8141[] = "K8N4-E Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0057_1458_e000[] = "GA-K8N Ultra-9 Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0057_1462_7100[] = "MSI K8N Diamond"; +#endif +static const char pci_device_10de_0058[] = "CK804 AC'97 Modem"; +static const char pci_device_10de_0059[] = "CK804 AC'97 Audio Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0059_1043_812a[] = "K8N4-E Mainboard"; +#endif +static const char pci_device_10de_005a[] = "CK804 USB Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005a_1043_815a[] = "K8N4-E Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005a_1458_5004[] = "GA-K8N Ultra-9 Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005a_1462_7100[] = "MSI K8N Diamond"; +#endif +static const char pci_device_10de_005b[] = "CK804 USB Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005b_1043_815a[] = "K8N4-E Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005b_1458_5004[] = "GA-K8N Ultra-9 Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005b_1462_7100[] = "MSI K8N Diamond"; +#endif +static const char pci_device_10de_005c[] = "CK804 PCI Bridge"; +static const char pci_device_10de_005d[] = "CK804 PCIE Bridge"; +static const char pci_device_10de_005e[] = "CK804 Memory Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005e_1458_5000[] = "GA-K8N Ultra-9 Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_005e_1462_7100[] = "MSI K8N Diamond"; +#endif +static const char pci_device_10de_005f[] = "CK804 Memory Controller"; +static const char pci_device_10de_0060[] = "nForce2 ISA Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0060_1043_80ad[] = "A7N8X Mainboard"; +#endif +static const char pci_device_10de_0064[] = "nForce2 SMBus (MCP)"; +static const char pci_device_10de_0065[] = "nForce2 IDE"; +static const char pci_device_10de_0066[] = "nForce2 Ethernet Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0066_1043_80a7[] = "A7N8X Mainboard onboard nForce2 Ethernet"; +#endif +static const char pci_device_10de_0067[] = "nForce2 USB Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0067_1043_0c11[] = "A7N8X Mainboard"; +#endif +static const char pci_device_10de_0068[] = "nForce2 USB Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0068_1043_0c11[] = "A7N8X Mainboard"; +#endif +static const char pci_device_10de_006a[] = "nForce2 AC97 Audio Controler (MCP)"; +static const char pci_device_10de_006b[] = "nForce Audio Processing Unit"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_006b_10de_006b[] = "nForce2 MCP Audio Processing Unit"; +#endif +static const char pci_device_10de_006c[] = "nForce2 External PCI Bridge"; +static const char pci_device_10de_006d[] = "nForce2 PCI Bridge"; +static const char pci_device_10de_006e[] = "nForce2 FireWire (IEEE 1394) Controller"; +static const char pci_device_10de_0080[] = "MCP2A ISA bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0080_147b_1c09[] = "NV7 Motherboard"; #endif -static const char pci_device_10de_006c[] = "nForce2 External PCI Bridge"; -static const char pci_device_10de_006d[] = "nForce2 PCI Bridge"; -static const char pci_device_10de_006e[] = "nForce2 FireWire (IEEE 1394) Controller"; static const char pci_device_10de_0084[] = "MCP2A SMBus"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0084_147b_1c09[] = "NV7 Motherboard"; +#endif static const char pci_device_10de_0085[] = "MCP2A IDE"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0085_147b_1c09[] = "NV7 Motherboard"; +#endif static const char pci_device_10de_0086[] = "MCP2A Ethernet Controller"; static const char pci_device_10de_0087[] = "MCP2A USB Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0087_147b_1c09[] = "NV7 Motherboard"; +#endif static const char pci_device_10de_0088[] = "MCP2A USB Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0088_147b_1c09[] = "NV7 Motherboard"; +#endif static const char pci_device_10de_008a[] = "MCP2S AC'97 Audio Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_008a_147b_1c09[] = "NV7 Motherboard"; +#endif static const char pci_device_10de_008b[] = "MCP2A PCI Bridge"; static const char pci_device_10de_008c[] = "MCP2A Ethernet Controller"; static const char pci_device_10de_008e[] = "nForce2 Serial ATA Controller"; +static const char pci_device_10de_0091[] = "GeForce 7800 GTX"; +static const char pci_device_10de_0092[] = "GeForce 7800 GT"; +static const char pci_device_10de_0099[] = "GE Force Go 7800 GTX"; static const char pci_device_10de_00a0[] = "NV5 [Aladdin TNT2]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_00a0_14af_5810[] = "Maxi Gamer Xentor"; #endif static const char pci_device_10de_00c0[] = "NV41.0"; -static const char pci_device_10de_00c1[] = "NV41.1"; -static const char pci_device_10de_00c2[] = "NV41.2"; -static const char pci_device_10de_00c8[] = "NV41.8"; -static const char pci_device_10de_00ce[] = "NV41GL"; +static const char pci_device_10de_00c1[] = "NV41.1 [GeForce 6800]"; +static const char pci_device_10de_00c2[] = "NV41.2 [GeForce 6800 LE]"; +static const char pci_device_10de_00c8[] = "NV41.8 [GeForce Go 6800]"; +static const char pci_device_10de_00c9[] = "NV41.9 [GeForce Go 6800 Ultra]"; +static const char pci_device_10de_00cc[] = "NV41 [Quadro FX Go1400]"; +static const char pci_device_10de_00cd[] = "NV41 [Quadro FX 3450/4000 SDI]"; +static const char pci_device_10de_00ce[] = "NV41GL [Quadro FX 1400]"; static const char pci_device_10de_00d0[] = "nForce3 LPC Bridge"; static const char pci_device_10de_00d1[] = "nForce3 Host Bridge"; static const char pci_device_10de_00d2[] = "nForce3 AGP Bridge"; @@ -6558,29 +7595,68 @@ static const char pci_device_10de_00d6[] = "nForce3 Ethernet"; static const char pci_device_10de_00d7[] = "nForce3 USB 1.1"; static const char pci_device_10de_00d8[] = "nForce3 USB 2.0"; +static const char pci_device_10de_00d9[] = "nForce3 Audio"; static const char pci_device_10de_00da[] = "nForce3 Audio"; static const char pci_device_10de_00dd[] = "nForce3 PCI Bridge"; static const char pci_device_10de_00df[] = "CK8S Ethernet Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00df_147b_1c0b[] = "NF8 Mainboard"; +#endif +static const char pci_device_10de_00e0[] = "nForce3 250Gb LPC Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e0_147b_1c0b[] = "NF8 Mainboard"; +#endif static const char pci_device_10de_00e1[] = "nForce3 250Gb Host Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e1_147b_1c0b[] = "NF8 Mainboard"; +#endif static const char pci_device_10de_00e2[] = "nForce3 250Gb AGP Host to PCI Bridge"; static const char pci_device_10de_00e3[] = "CK8S Serial ATA Controller (v2.5)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e3_147b_1c0b[] = "NF8 Mainboard"; +#endif static const char pci_device_10de_00e4[] = "nForce 250Gb PCI System Management"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e4_147b_1c0b[] = "NF8 Mainboard"; +#endif static const char pci_device_10de_00e5[] = "CK8S Parallel ATA Controller (v2.5)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e5_147b_1c0b[] = "NF8 Mainboard"; +#endif static const char pci_device_10de_00e6[] = "CK8S Ethernet Controller"; static const char pci_device_10de_00e7[] = "CK8S USB Controller"; -static const char pci_device_10de_00e8[] = "CK8S USB Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e7_147b_1c0b[] = "NF8 Mainboard"; +#endif +static const char pci_device_10de_00e8[] = "nForce3 EHCI USB 2.0 Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00e8_147b_1c0b[] = "NF8 Mainboard"; +#endif static const char pci_device_10de_00ea[] = "nForce3 250Gb AC'97 Audio Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00ea_147b_1c0b[] = "NF8 Mainboard"; +#endif static const char pci_device_10de_00ed[] = "nForce3 250Gb PCI-to-PCI Bridge"; static const char pci_device_10de_00ee[] = "CK8S Serial ATA Controller (v2.5)"; static const char pci_device_10de_00f0[] = "NV40 [GeForce 6800/GeForce 6800 Ultra]"; static const char pci_device_10de_00f1[] = "NV43 [GeForce 6600/GeForce 6600 GT]"; -static const char pci_device_10de_00f2[] = "NV43 [GeForce 6600 GT]"; -static const char pci_device_10de_00f8[] = "NV45GL [Quadro FX 3400]"; -static const char pci_device_10de_00f9[] = "NV40 [GeForce 6800 Ultra]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00f1_1043_81a6[] = "N6600GT TD 128M AGP"; +#endif +static const char pci_device_10de_00f2[] = "NV43 [GeForce 6600/GeForce 6600 GT]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00f2_1682_211c[] = "GeForce 6600 256MB DDR DUAL DVI TV"; +#endif +static const char pci_device_10de_00f3[] = "NV43 [GeForce 6200]"; +static const char pci_device_10de_00f8[] = "NV45GL [Quadro FX 3400/4400]"; +static const char pci_device_10de_00f9[] = "NV40 [GeForce 6800 Ultra/GeForce 6800 GT]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_00f9_1682_2120[] = "GEFORCE 6800 GT PCI-E"; +#endif static const char pci_device_10de_00fa[] = "NV36 [GeForce PCX 5750]"; static const char pci_device_10de_00fb[] = "NV35 [GeForce PCX 5900]"; static const char pci_device_10de_00fc[] = "NV37GL [Quadro FX 330/GeForce PCX 5300]"; -static const char pci_device_10de_00fd[] = "NV37GL [Quadro FX 330]"; +static const char pci_device_10de_00fd[] = "NV37GL [Quadro FX 330/Quadro NVS280]"; static const char pci_device_10de_00fe[] = "NV38GL [Quadro FX 1300]"; static const char pci_device_10de_00ff[] = "NV18 [GeForce PCX 4300]"; static const char pci_device_10de_0100[] = "NV10 [GeForce 256 SDR]"; @@ -6597,6 +7673,15 @@ static const char pci_subsys_10de_0100_1043_4009[] = "AGP-V6600 SDRAM"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0100_1048_0c41[] = "Erazor X"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0100_1048_0c43[] = "ERAZOR X PCI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0100_1048_0c48[] = "Synergy Force"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0100_1102_102d[] = "CT6941 GeForce 256"; #endif #ifdef INIT_SUBSYS_INFO @@ -6613,6 +7698,9 @@ static const char pci_subsys_10de_0101_1043_400b[] = "AGP-V6800 DDR SDRAM"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0101_1048_0c42[] = "Erazor X"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0101_107d_2822[] = "WinFast GeForce 256"; #endif #ifdef INIT_SUBSYS_INFO @@ -6622,6 +7710,21 @@ static const char pci_subsys_10de_0101_14af_5021[] = "3D Prophet DDR-DVI"; #endif static const char pci_device_10de_0103[] = "NV10GL [Quadro]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0103_1048_0c40[] = "GLoria II-64"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0103_1048_0c44[] = "GLoria II"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0103_1048_0c45[] = "GLoria II"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0103_1048_0c4a[] = "GLoria II-64 Pro"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0103_1048_0c4b[] = "GLoria II-64 Pro DVII"; +#endif static const char pci_device_10de_0110[] = "NV11 [GeForce2 MX/MX 400]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0110_1043_4015[] = "AGP-V7100 Pro"; @@ -6630,9 +7733,30 @@ static const char pci_subsys_10de_0110_1043_4031[] = "V7100 Pro with TV output"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0110_1048_0c60[] = "Gladiac MX"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0110_1048_0c61[] = "Gladiac 511PCI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0110_1048_0c63[] = "Gladiac 511TV-OUT 32MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0110_1048_0c64[] = "Gladiac 511TV-OUT 64MB"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0110_1048_0c65[] = "Gladiac 511TWIN"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0110_1048_0c66[] = "Gladiac 311"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0110_10de_0091[] = "Dell OEM GeForce 2 MX 400"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0110_10de_00a1[] = "Apple OEM GeForce2 MX"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0110_1462_8817[] = "MSI GeForce2 MX400 Pro32S [MS-8817]"; #endif #ifdef INIT_SUBSYS_INFO @@ -6643,12 +7767,30 @@ #endif static const char pci_device_10de_0111[] = "NV11DDR [GeForce2 MX 100 DDR/200 DDR]"; static const char pci_device_10de_0112[] = "NV11 [GeForce2 Go]"; -static const char pci_device_10de_0113[] = "NV11GL [Quadro2 MXR/EX]"; +static const char pci_device_10de_0113[] = "NV11GL [Quadro2 MXR/EX/Go]"; +static const char pci_device_10de_0140[] = "NV43 [GeForce 6600 GT]"; +static const char pci_device_10de_0141[] = "NV43 [GeForce 6600]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0141_1458_3124[] = "GV-NX66128DP Turbo Force Edition"; +#endif +static const char pci_device_10de_0142[] = "NV43 [GeForce 6600 PCIe]"; +static const char pci_device_10de_0144[] = "NV43 [GeForce Go 6600]"; +static const char pci_device_10de_0145[] = "NV43 [GeForce 6610 XL]"; +static const char pci_device_10de_0146[] = "NV43 [Geforce Go 6600TE/6200TE]"; +static const char pci_device_10de_0148[] = "NV43 [GeForce Go 6600]"; +static const char pci_device_10de_014e[] = "NV43GL [Quadro FX 540]"; +static const char pci_device_10de_014f[] = "NV43 [GeForce 6200]"; static const char pci_device_10de_0150[] = "NV15 [GeForce2 GTS/Pro]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0150_1043_4016[] = "V7700 AGP Video Card"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0150_1048_0c50[] = "Gladiac"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0150_1048_0c52[] = "Gladiac-64"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0150_107d_2840[] = "WinFast GeForce2 GTS with TV output"; #endif #ifdef INIT_SUBSYS_INFO @@ -6669,18 +7811,28 @@ static const char pci_subsys_10de_0152_1048_0c56[] = "GLADIAC Ultra"; #endif static const char pci_device_10de_0153[] = "NV15GL [Quadro2 Pro]"; +static const char pci_device_10de_0161[] = "GeForce 6200 TurboCache(TM)"; +static const char pci_device_10de_0164[] = "NV44 [GeForce Go 6200]"; +static const char pci_device_10de_0165[] = "NV44 [Quadro NVS 285]"; +static const char pci_device_10de_0167[] = "GeForce Go 6200 TurboCache"; static const char pci_device_10de_0170[] = "NV17 [GeForce4 MX 460]"; static const char pci_device_10de_0171[] = "NV17 [GeForce4 MX 440]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0171_10b0_0002[] = "Gainward Pro/600 TV"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0171_10de_0008[] = "Apple OEM GeForce4 MX 440"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0171_1462_8661[] = "G4MX440-VTP"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0171_1462_8730[] = "MX440SES-T (MS-8873)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0171_1462_8852[] = "GeForce4 MX440 PCI"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0171_147b_8f00[] = "Abit Siluro GeForce4MX440"; #endif static const char pci_device_10de_0172[] = "NV17 [GeForce4 MX 420]"; @@ -6693,13 +7845,13 @@ #endif static const char pci_device_10de_0177[] = "NV17 [GeForce4 460 Go]"; static const char pci_device_10de_0178[] = "NV17GL [Quadro4 550 XGL]"; -static const char pci_device_10de_0179[] = "NV17 [GeForce4 440 Go 64M]"; +static const char pci_device_10de_0179[] = "NV17 [GeForce4 420 Go 32M]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0179_10de_0179[] = "GeForce4 MX (Mac)"; #endif static const char pci_device_10de_017a[] = "NV17GL [Quadro4 200/400 NVS]"; static const char pci_device_10de_017b[] = "NV17GL [Quadro4 550 XGL]"; -static const char pci_device_10de_017c[] = "NV17GL [Quadro4 550 GoGL]"; +static const char pci_device_10de_017c[] = "NV17GL [Quadro4 500 GoGL]"; static const char pci_device_10de_017d[] = "NV17 [GeForce4 410 Go 16M]"; static const char pci_device_10de_0181[] = "NV18 [GeForce4 MX 440 AGP 8x]"; #ifdef INIT_SUBSYS_INFO @@ -6742,6 +7894,9 @@ static const char pci_device_10de_01c2[] = "nForce USB Controller"; static const char pci_device_10de_01c3[] = "nForce Ethernet Controller"; static const char pci_device_10de_01e0[] = "nForce2 AGP (different version?)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_01e0_147b_1c09[] = "NV7 Motherboard"; +#endif static const char pci_device_10de_01e8[] = "nForce2 AGP"; static const char pci_device_10de_01ea[] = "nForce2 Memory Controller 0"; static const char pci_device_10de_01eb[] = "nForce2 Memory Controller 1"; @@ -6754,6 +7909,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0200_1043_402f[] = "AGP-V8200 DDR"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0200_1048_0c70[] = "GLADIAC 920"; +#endif static const char pci_device_10de_0201[] = "NV20 [GeForce3 Ti 200]"; static const char pci_device_10de_0202[] = "NV20 [GeForce3 Ti 500]"; #ifdef INIT_SUBSYS_INFO @@ -6763,6 +7921,23 @@ static const char pci_subsys_10de_0202_1545_002f[] = "Xtasy 6964"; #endif static const char pci_device_10de_0203[] = "NV20DCC [Quadro DCC]"; +static const char pci_device_10de_0221[] = "GeForce 6200"; +static const char pci_device_10de_0240[] = "C51PV [GeForce 6150]"; +static const char pci_device_10de_0241[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_0242[] = "C51G [GeForce 6100]"; +static const char pci_device_10de_0243[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_0244[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_0245[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_0246[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_0247[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_0248[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_0249[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_024a[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_024b[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_024c[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_024d[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_024e[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_024f[] = "C51 PCI Express Bridge"; static const char pci_device_10de_0250[] = "NV25 [GeForce4 Ti 4600]"; static const char pci_device_10de_0251[] = "NV25 [GeForce4 Ti 4400]"; #ifdef INIT_SUBSYS_INFO @@ -6779,6 +7954,27 @@ static const char pci_device_10de_0258[] = "NV25GL [Quadro4 900 XGL]"; static const char pci_device_10de_0259[] = "NV25GL [Quadro4 750 XGL]"; static const char pci_device_10de_025b[] = "NV25GL [Quadro4 700 XGL]"; +static const char pci_device_10de_0260[] = "MCP51 LPC Bridge"; +static const char pci_device_10de_0261[] = "MCP51 LPC Bridge"; +static const char pci_device_10de_0262[] = "MCP51 LPC Bridge"; +static const char pci_device_10de_0263[] = "MCP51 LPC Bridge"; +static const char pci_device_10de_0264[] = "MCP51 SMBus"; +static const char pci_device_10de_0265[] = "MCP51 IDE"; +static const char pci_device_10de_0266[] = "MCP51 Serial ATA Controller"; +static const char pci_device_10de_0267[] = "MCP51 Serial ATA Controller"; +static const char pci_device_10de_0268[] = "MCP51 Ethernet Controller"; +static const char pci_device_10de_0269[] = "MCP51 Ethernet Controller"; +static const char pci_device_10de_026a[] = "MCP51 MCI"; +static const char pci_device_10de_026b[] = "MCP51 AC97 Audio Controller"; +static const char pci_device_10de_026c[] = "MCP51 High Definition Audio"; +static const char pci_device_10de_026d[] = "MCP51 USB Controller"; +static const char pci_device_10de_026e[] = "MCP51 USB Controller"; +static const char pci_device_10de_026f[] = "MCP51 PCI Bridge"; +static const char pci_device_10de_0270[] = "MCP51 Host Bridge"; +static const char pci_device_10de_0271[] = "MCP51 PMU"; +static const char pci_device_10de_0272[] = "MCP51 Memory Controller 0"; +static const char pci_device_10de_027e[] = "C51 Memory Controller 2"; +static const char pci_device_10de_027f[] = "C51 Memory Controller 3"; static const char pci_device_10de_0280[] = "NV28 [GeForce4 Ti 4800]"; static const char pci_device_10de_0281[] = "NV28 [GeForce4 Ti 4200 AGP 8x]"; static const char pci_device_10de_0282[] = "NV28 [GeForce4 Ti 4800 SE]"; @@ -6786,6 +7982,23 @@ static const char pci_device_10de_0288[] = "NV28GL [Quadro4 980 XGL]"; static const char pci_device_10de_0289[] = "NV28GL [Quadro4 780 XGL]"; static const char pci_device_10de_028c[] = "NV28GLM [Quadro4 700 GoGL]"; +static const char pci_device_10de_02a0[] = "NV2A [XGPU]"; +static const char pci_device_10de_02f0[] = "C51 Host Bridge"; +static const char pci_device_10de_02f1[] = "C51 Host Bridge"; +static const char pci_device_10de_02f2[] = "C51 Host Bridge"; +static const char pci_device_10de_02f3[] = "C51 Host Bridge"; +static const char pci_device_10de_02f4[] = "C51 Host Bridge"; +static const char pci_device_10de_02f5[] = "C51 Host Bridge"; +static const char pci_device_10de_02f6[] = "C51 Host Bridge"; +static const char pci_device_10de_02f7[] = "C51 Host Bridge"; +static const char pci_device_10de_02f8[] = "C51 Memory Controller 5"; +static const char pci_device_10de_02f9[] = "C51 Memory Controller 4"; +static const char pci_device_10de_02fa[] = "C51 Memory Controller 0"; +static const char pci_device_10de_02fb[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_02fc[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_02fd[] = "C51 PCI Express Bridge"; +static const char pci_device_10de_02fe[] = "C51 Memory Controller 1"; +static const char pci_device_10de_02ff[] = "C51 Host Bridge"; static const char pci_device_10de_0300[] = "NV30 [GeForce FX]"; static const char pci_device_10de_0301[] = "NV30 [GeForce FX 5800 Ultra]"; static const char pci_device_10de_0302[] = "NV30 [GeForce FX 5800]"; @@ -6798,35 +8011,41 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0314_1043_814a[] = "V9560XT/TD"; #endif -static const char pci_device_10de_0316[] = "NV31"; -static const char pci_device_10de_0317[] = "NV31"; -static const char pci_device_10de_031a[] = "NV31M [GeForce FX Go 5600]"; +static const char pci_device_10de_0316[] = "NV31M"; +static const char pci_device_10de_0317[] = "NV31M Pro"; +static const char pci_device_10de_031a[] = "NV31M [GeForce FX Go5600]"; static const char pci_device_10de_031b[] = "NV31M [GeForce FX Go5650]"; -static const char pci_device_10de_031c[] = "NVIDIA Quadro FX 700 Go"; -static const char pci_device_10de_031d[] = "NV31"; -static const char pci_device_10de_031e[] = "NV31"; -static const char pci_device_10de_031f[] = "NV31"; +static const char pci_device_10de_031c[] = "NVIDIA Quadro FX Go700"; +static const char pci_device_10de_031d[] = "NV31GLM"; +static const char pci_device_10de_031e[] = "NV31GLM Pro"; +static const char pci_device_10de_031f[] = "NV31GLM Pro"; static const char pci_device_10de_0320[] = "NV34 [GeForce FX 5200]"; static const char pci_device_10de_0321[] = "NV34 [GeForce FX 5200 Ultra]"; static const char pci_device_10de_0322[] = "NV34 [GeForce FX 5200]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0322_1462_9171[] = "MS-8917 (FX5200-T128)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0322_1462_9360[] = "MS-8936 (FX5200-T128)"; +#endif static const char pci_device_10de_0323[] = "NV34 [GeForce FX 5200LE]"; -static const char pci_device_10de_0324[] = "NV34M [GeForce FX Go 5200]"; +static const char pci_device_10de_0324[] = "NV34M [GeForce FX Go5200]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0324_1028_0196[] = "Inspiron 5160"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10de_0324_1071_8160[] = "MIM2000"; #endif static const char pci_device_10de_0325[] = "NV34M [GeForce FX Go5250]"; static const char pci_device_10de_0326[] = "NV34 [GeForce FX 5500]"; static const char pci_device_10de_0327[] = "NV34 [GeForce FX 5100]"; -static const char pci_device_10de_0328[] = "NV34M [GeForce FX Go 5200]"; +static const char pci_device_10de_0328[] = "NV34M [GeForce FX Go5200 32M/64M]"; static const char pci_device_10de_0329[] = "NV34M [GeForce FX Go5200]"; static const char pci_device_10de_032a[] = "NV34GL [Quadro NVS 280 PCI]"; static const char pci_device_10de_032b[] = "NV34GL [Quadro FX 500/600 PCI]"; static const char pci_device_10de_032c[] = "NV34GLM [GeForce FX Go 5300]"; static const char pci_device_10de_032d[] = "NV34 [GeForce FX Go5100]"; -static const char pci_device_10de_032f[] = "NV34"; +static const char pci_device_10de_032f[] = "NV34GL"; static const char pci_device_10de_0330[] = "NV35 [GeForce FX 5900 Ultra]"; static const char pci_device_10de_0331[] = "NV35 [GeForce FX 5900]"; #ifdef INIT_SUBSYS_INFO @@ -6843,38 +8062,66 @@ static const char pci_device_10de_0344[] = "NV36.4 [GeForce FX 5700VE]"; static const char pci_device_10de_0345[] = "NV36.5"; static const char pci_device_10de_0347[] = "NV36 [GeForce FX Go5700]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10de_0347_103c_006a[] = "nx9500"; +#endif static const char pci_device_10de_0348[] = "NV36 [GeForce FX Go5700]"; -static const char pci_device_10de_0349[] = "NV36"; -static const char pci_device_10de_034b[] = "NV36"; +static const char pci_device_10de_0349[] = "NV36M Pro"; +static const char pci_device_10de_034b[] = "NV36MAP"; static const char pci_device_10de_034c[] = "NV36 [Quadro FX Go1000]"; static const char pci_device_10de_034e[] = "NV36GL [Quadro FX 1100]"; static const char pci_device_10de_034f[] = "NV36GL"; +static const char pci_device_10de_0360[] = "MCP55 LPC Bridge"; +static const char pci_device_10de_0361[] = "MCP55 LPC Bridge"; +static const char pci_device_10de_0362[] = "MCP55 LPC Bridge"; +static const char pci_device_10de_0363[] = "MCP55 LPC Bridge"; +static const char pci_device_10de_0364[] = "MCP55 LPC Bridge"; +static const char pci_device_10de_0365[] = "MCP55 LPC Bridge"; +static const char pci_device_10de_0366[] = "MCP55 LPC Bridge"; +static const char pci_device_10de_0367[] = "MCP55 LPC Bridge"; +static const char pci_device_10de_0368[] = "MCP55 SMBus"; +static const char pci_device_10de_0369[] = "MCP55 Memory Controller"; +static const char pci_device_10de_036a[] = "MCP55 Memory Controller"; +static const char pci_device_10de_036c[] = "MCP55 USB Controller"; +static const char pci_device_10de_036d[] = "MCP55 USB Controller"; +static const char pci_device_10de_036e[] = "MCP55 IDE"; +static const char pci_device_10de_0371[] = "MCP55 High Definition Audio"; +static const char pci_device_10de_0372[] = "MCP55 Ethernet"; +static const char pci_device_10de_0373[] = "MCP55 Ethernet"; +static const char pci_device_10de_037a[] = "MCP55 Memory Controller"; +static const char pci_device_10de_037e[] = "MCP55 SATA Controller"; +static const char pci_device_10de_037f[] = "MCP55 SATA Controller"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10df[] = "Emulex Corporation"; static const char pci_device_10df_1ae5[] = "LP6000 Fibre Channel Host Adapter"; -static const char pci_device_10df_1ae6[] = "LP 8000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2)"; -static const char pci_device_10df_1ae7[] = "LP 8000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:2-3)"; -static const char pci_device_10df_f015[] = "LP1150e"; -static const char pci_device_10df_f085[] = "LP850 Fibre Channel Adapter"; -static const char pci_device_10df_f095[] = "LP952 Fibre Channel Adapter"; -static const char pci_device_10df_f098[] = "LP982 Fibre Channel Adapter"; -static const char pci_device_10df_f0a1[] = "LightPulse Fibre Channel Adapter"; -static const char pci_device_10df_f0a5[] = "LP1050"; -static const char pci_device_10df_f0d5[] = "LP1150"; -static const char pci_device_10df_f100[] = "LP11000e"; +static const char pci_device_10df_f085[] = "LP850 Fibre Channel Host Adapter"; +static const char pci_device_10df_f095[] = "LP952 Fibre Channel Host Adapter"; +static const char pci_device_10df_f098[] = "LP982 Fibre Channel Host Adapter"; +static const char pci_device_10df_f0a1[] = "Thor LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_f0a5[] = "Thor LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_f0b5[] = "Viper LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_f0d1[] = "Helios LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_f0d5[] = "Helios LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_f0e1[] = "Zephyr LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_f0e5[] = "Zephyr LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_f0f5[] = "Neptune LightPulse Fibre Channel Host Adapter"; static const char pci_device_10df_f700[] = "LP7000 Fibre Channel Host Adapter"; -static const char pci_device_10df_f701[] = "LP 7000EFibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2)"; +static const char pci_device_10df_f701[] = "LP7000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2)"; static const char pci_device_10df_f800[] = "LP8000 Fibre Channel Host Adapter"; -static const char pci_device_10df_f801[] = "LP 8000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2)"; +static const char pci_device_10df_f801[] = "LP8000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2)"; static const char pci_device_10df_f900[] = "LP9000 Fibre Channel Host Adapter"; -static const char pci_device_10df_f901[] = "LP 9000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2)"; -static const char pci_device_10df_f980[] = "LP9802 Fibre Channel Adapter"; -static const char pci_device_10df_f981[] = "LP 9802 Fibre Channel Host Adapter Alternate ID"; -static const char pci_device_10df_f982[] = "LP 9802 Fibre Channel Host Adapter Alternate ID"; -static const char pci_device_10df_fa00[] = "LP10000 Fibre Channel Host Adapter"; -static const char pci_device_10df_fa01[] = "LP101"; -static const char pci_device_10df_fb00[] = "LightPulse Fibre Channel Adapter"; -static const char pci_device_10df_fd00[] = "LP11000"; +static const char pci_device_10df_f901[] = "LP9000 Fibre Channel Host Adapter Alternate ID (JX1:2-3, JX2:1-2)"; +static const char pci_device_10df_f980[] = "LP9802 Fibre Channel Host Adapter"; +static const char pci_device_10df_f981[] = "LP9802 Fibre Channel Host Adapter Alternate ID"; +static const char pci_device_10df_f982[] = "LP9802 Fibre Channel Host Adapter Alternate ID"; +static const char pci_device_10df_fa00[] = "Thor-X LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_fb00[] = "Viper LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_fc00[] = "Thor-X LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_fc10[] = "Helios-X LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_fc20[] = "Zephyr-X LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_fd00[] = "Helios-X LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_fe00[] = "Zephyr-X LightPulse Fibre Channel Host Adapter"; +static const char pci_device_10df_ff00[] = "Neptune LightPulse Fibre Channel Host Adapter"; #endif static const char pci_vendor_10e0[] = "Integrated Micro Solutions Inc."; static const char pci_device_10e0_5026[] = "IMS5026/27/28"; @@ -6898,6 +8145,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10e3[] = "Tundra Semiconductor Corp."; static const char pci_device_10e3_0000[] = "CA91C042 [Universe]"; +static const char pci_device_10e3_0148[] = "Tsi148 [Tempe]"; static const char pci_device_10e3_0860[] = "CA91C860 [QSpan]"; static const char pci_device_10e3_0862[] = "CA91C862A [QSpan-II]"; static const char pci_device_10e3_8260[] = "CA91L8200B [Dual PCI PowerSpan II]"; @@ -6905,6 +8153,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10e4[] = "Tandem Computers"; +static const char pci_device_10e4_8029[] = "Realtek 8029 Network Card"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10e5[] = "Micro Industries Corporation"; @@ -6964,6 +8213,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10ec[] = "Realtek Semiconductor Co., Ltd."; +static const char pci_device_10ec_0139[] = "Zonet Zen3200"; static const char pci_device_10ec_8029[] = "RTL-8029(AS)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10ec_8029_10b8_2011[] = "EZ-Card (SMC1208)"; @@ -7007,6 +8257,14 @@ static const char pci_subsys_10ec_8139_1025_8921[] = "ALN-325"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ec_8139_103c_006a[] = "nx9500"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ec_8139_1043_8109[] = "P5P800-MX Mainboard"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10ec_8139_1071_8160[] = "MIM2000"; #endif @@ -7050,6 +8308,9 @@ static const char pci_subsys_10ec_8139_1458_e000[] = "GA-7VM400M/7VT600 Motherboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ec_8139_1462_788c[] = "865PE Neo2-V Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10ec_8139_146c_1439[] = "FE-1439TX"; #endif #ifdef INIT_SUBSYS_INFO @@ -7071,6 +8332,9 @@ static const char pci_subsys_10ec_8139_1799_5000[] = "F5D5000 PCI Card/Desktop Network PCI Card"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ec_8139_1904_8139[] = "RTL8139D Fast Ethernet Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10ec_8139_2646_0001[] = "EtheRx"; #endif #ifdef INIT_SUBSYS_INFO @@ -7080,6 +8344,9 @@ static const char pci_subsys_10ec_8139_8e2e_7100[] = "KF-230TX/2"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_10ec_8139_9001_1695[] = "Onboard RTL8101L 10/100 MBit"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_10ec_8139_a0a0_0007[] = "ALN-325C"; #endif static const char pci_device_10ec_8169[] = "RTL-8169 Gigabit Ethernet"; @@ -7090,7 +8357,7 @@ static const char pci_subsys_10ec_8169_1371_434e[] = "ProG-2000L"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_10ec_8169_1458_e000[] = "GA-K8VT800 Pro Motherboard"; +static const char pci_subsys_10ec_8169_1458_e000[] = "GA-8I915ME-G Mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_10ec_8169_1462_702c[] = "K8T NEO 2 motherboard"; @@ -7104,6 +8371,11 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_10ee[] = "Xilinx Corporation"; +static const char pci_device_10ee_0205[] = "Wildcard TE205P"; +static const char pci_device_10ee_0210[] = "Wildcard TE210P"; +static const char pci_device_10ee_0314[] = "Wildcard TE405P/TE410P (1st Gen)"; +static const char pci_device_10ee_0405[] = "Wildcard TE405P (2nd Gen)"; +static const char pci_device_10ee_0410[] = "Wildcard TE410P (2nd Gen)"; static const char pci_device_10ee_3fc0[] = "RME Digi96"; static const char pci_device_10ee_3fc1[] = "RME Digi96/8"; static const char pci_device_10ee_3fc2[] = "RME Digi96/8 Pro"; @@ -7153,7 +8425,7 @@ static const char pci_device_10fa_000c[] = "TARGA 1000"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_10fb[] = "Thesys Gesellschaft für Mikroelektronik mbH"; +static const char pci_vendor_10fb[] = "Thesys Gesellschaft fuer Mikroelektronik mbH"; static const char pci_device_10fb_186f[] = "TH 6255"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -7194,6 +8466,9 @@ static const char pci_subsys_1102_0002_1102_002f[] = "SBLive! mainboard implementation"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_0002_1102_100a[] = "SB Live! 5.1 Digital OEM [SB0220]"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1102_0002_1102_4001[] = "E-mu APS"; #endif #ifdef INIT_SUBSYS_INFO @@ -7230,7 +8505,7 @@ static const char pci_subsys_1102_0002_1102_8061[] = "SBLive! Player 5.1"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1102_0002_1102_8064[] = "SB Live! 5.1 Model SB0100"; +static const char pci_subsys_1102_0002_1102_8064[] = "SBLive! 5.1 Model SB0100"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1102_0002_1102_8065[] = "SBLive! 5.1 Digital Model SB0220"; @@ -7249,17 +8524,32 @@ static const char pci_subsys_1102_0004_1102_0058[] = "SB0090 Audigy Player/OEM"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_0004_1102_1007[] = "SB0240 Audigy 2 Platinum 6.1"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1102_0004_1102_2002[] = "SB Audigy 2 ZS (SB0350)"; #endif static const char pci_device_1102_0006[] = "[SB Live! Value] EMU10k1X"; static const char pci_device_1102_0007[] = "SB Audigy LS"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_0007_1102_0007[] = "SBLive! 24bit"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1102_0007_1102_1001[] = "SB0310 Audigy LS"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1102_0007_1102_1002[] = "SB0312 Audigy LS"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_0007_1102_1006[] = "SB0410 SBLive! 24-bit"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_0007_1462_1009[] = "K8N Diamond"; +#endif static const char pci_device_1102_0008[] = "SB0400 Audigy2 Value"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_0008_1102_0008[] = "EMU0404 Digital Audio System"; +#endif static const char pci_device_1102_4001[] = "SB Audigy FireWire Port"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1102_4001_1102_0010[] = "SB Audigy FireWire Port"; @@ -7282,10 +8572,55 @@ #endif static const char pci_device_1102_8064[] = "SB0100 [SBLive! 5.1 OEM]"; static const char pci_device_1102_8938[] = "Ectiva EV1938"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_1033_80e5[] = "SlimTower-Jim (NEC)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_1071_7150[] = "Mitac 7150"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_110a_5938[] = "Siemens Scenic Mobile 510PIII"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_13bd_100c[] = "Ceres-C (Sharp, Intel BX)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_13bd_100d[] = "Sharp, Intel Banister"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_13bd_100e[] = "TwinHead P09S/P09S3 (Sharp)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_13bd_f6f1[] = "Marlin (Sharp)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_14ff_0e70[] = "P88TE (TWINHEAD INTERNATIONAL Corp)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_14ff_c401[] = "Notebook 9100/9200/2000 (TWINHEAD INTERNATIONAL Corp)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_156d_b400[] = "G400 - Geo (AlphaTop (Taiwan))"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_156d_b550[] = "G560 (AlphaTop (Taiwan))"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_156d_b560[] = "G560 (AlphaTop (Taiwan))"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_156d_b700[] = "G700/U700 (AlphaTop (Taiwan))"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_156d_b795[] = "G795 (AlphaTop (Taiwan))"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1102_8938_156d_b797[] = "G797 (AlphaTop (Taiwan))"; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1103[] = "Triones Technologies, Inc."; static const char pci_device_1103_0003[] = "HPT343"; -static const char pci_device_1103_0004[] = "HPT366/368/370/370A/372"; +static const char pci_device_1103_0004[] = "HPT366/368/370/370A/372/372N"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1103_0004_1103_0001[] = "HPT370A"; #endif @@ -7307,9 +8642,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1103_0004_1103_0008[] = "HPT374 UDMA/ATA133 RAID Controller"; #endif -static const char pci_device_1103_0005[] = "HPT372A"; +static const char pci_device_1103_0005[] = "HPT372A/372N"; static const char pci_device_1103_0006[] = "HPT302"; -static const char pci_device_1103_0007[] = "HPT371"; +static const char pci_device_1103_0007[] = "HPT371/371N"; static const char pci_device_1103_0008[] = "HPT374"; static const char pci_device_1103_0009[] = "HPT372N"; #endif @@ -7325,7 +8660,13 @@ static const char pci_device_1105_8470[] = "EM8470 REALmagic DVD/MPEG-4 A/V Decoder"; static const char pci_device_1105_8471[] = "EM8471 REALmagic DVD/MPEG-4 A/V Decoder"; static const char pci_device_1105_8475[] = "EM8475 REALmagic DVD/MPEG-4 A/V Decoder"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1105_8475_1105_0001[] = "REALmagic X-Card"; +#endif static const char pci_device_1105_8476[] = "EM8476 REALmagic DVD/MPEG-4 A/V Decoder"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1105_8476_127d_0000[] = "CineView II"; +#endif static const char pci_device_1105_8485[] = "EM8485 REALmagic DVD/MPEG-4 A/V Decoder"; static const char pci_device_1105_8486[] = "EM8486 REALmagic DVD/MPEG-4 A/V Decoder"; #endif @@ -7333,8 +8674,22 @@ static const char pci_vendor_1106[] = "VIA Technologies, Inc."; static const char pci_device_1106_0102[] = "Embedded VIA Ethernet Controller"; static const char pci_device_1106_0130[] = "VT6305 1394.A Controller"; +static const char pci_device_1106_0204[] = "K8M800 Host Bridge"; +static const char pci_device_1106_0238[] = "K8T890 Host Bridge"; +static const char pci_device_1106_0258[] = "PT880 Host Bridge"; +static const char pci_device_1106_0259[] = "CN400/PM880 Host Bridge"; +static const char pci_device_1106_0269[] = "KT880 Host Bridge"; +static const char pci_device_1106_0282[] = "K8T800Pro Host Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_0282_1043_80a3[] = "A8V Deluxe"; +#endif +static const char pci_device_1106_0290[] = "K8M890 Host Bridge"; +static const char pci_device_1106_0296[] = "P4M800 Host Bridge"; static const char pci_device_1106_0305[] = "VT8363/8365 [KT133/KM133]"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_0305_1019_0987[] = "K7VZA (Rev. 1.0) Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_0305_1043_8033[] = "A7V Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -7346,6 +8701,8 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_0305_147b_a401[] = "KT7/KT7-RAID/KT7A/KT7A-RAID Mainboard"; #endif +static const char pci_device_1106_0308[] = "PT894 Host Bridge"; +static const char pci_device_1106_0314[] = "P4M800CE Host Bridge"; static const char pci_device_1106_0391[] = "VT8371 [KX133]"; static const char pci_device_1106_0501[] = "VT8501 [Apollo MVP4]"; static const char pci_device_1106_0505[] = "VT82C505"; @@ -7361,13 +8718,13 @@ static const char pci_subsys_1106_0571_1043_8052[] = "VT8233A Bus Master ATA100/66/33 IDE"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1106_0571_1043_808c[] = "A7V8X motherboard"; +static const char pci_subsys_1106_0571_1043_808c[] = "A7V8X / A7V333 motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_0571_1043_80a1[] = "A7V8X-X motherboard rev. 1.01"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1106_0571_1043_80ed[] = "A7V600 motherboard"; +static const char pci_subsys_1106_0571_1043_80ed[] = "A7V600/K8V-X/A8V Deluxe motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_0571_1106_0571[] = "VT82C586/B/VT82C686/A/B/VT8233/A/C/VT8235 PIPC Bus Master IDE"; @@ -7388,7 +8745,7 @@ static const char pci_subsys_1106_0571_147b_1407[] = "KV8-MAX3 motherboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1106_0571_1849_0571[] = "K7VT2 motherboard"; +static const char pci_subsys_1106_0571_1849_0571[] = "K7VT2 / K7VT6 motherboard"; #endif static const char pci_device_1106_0576[] = "VT82C576 3V [Apollo Master]"; static const char pci_device_1106_0585[] = "VT82C585VP [Apollo VP1/VPX]"; @@ -7396,6 +8753,7 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_0586_1106_0000[] = "MVP3 ISA Bridge"; #endif +static const char pci_device_1106_0591[] = "VT8237A SATA 2-Port Controller"; static const char pci_device_1106_0595[] = "VT82C595 [Apollo VP2]"; static const char pci_device_1106_0596[] = "VT82C596 ISA [Mobile South]"; #ifdef INIT_SUBSYS_INFO @@ -7458,8 +8816,35 @@ static const char pci_device_1106_0926[] = "VT82C926 [Amazon]"; static const char pci_device_1106_1000[] = "VT82C570MV"; static const char pci_device_1106_1106[] = "VT82C570MV"; +static const char pci_device_1106_1204[] = "K8M800 Host Bridge"; +static const char pci_device_1106_1208[] = "PT890 Host Bridge"; +static const char pci_device_1106_1238[] = "K8T890 Host Bridge"; +static const char pci_device_1106_1258[] = "PT880 Host Bridge"; +static const char pci_device_1106_1259[] = "CN400/PM880 Host Bridge"; +static const char pci_device_1106_1269[] = "KT880 Host Bridge"; +static const char pci_device_1106_1282[] = "K8T800Pro Host Bridge"; +static const char pci_device_1106_1290[] = "K8M890 Host Bridge"; +static const char pci_device_1106_1296[] = "P4M800 Host Bridge"; +static const char pci_device_1106_1308[] = "PT894 Host Bridge"; +static const char pci_device_1106_1314[] = "P4M800CE Host Bridge"; static const char pci_device_1106_1571[] = "VT82C576M/VT82C586"; static const char pci_device_1106_1595[] = "VT82C595/97 [Apollo VP2/97]"; +static const char pci_device_1106_2204[] = "K8M800 Host Bridge"; +static const char pci_device_1106_2208[] = "PT890 Host Bridge"; +static const char pci_device_1106_2238[] = "K8T890 Host Bridge"; +static const char pci_device_1106_2258[] = "PT880 Host Bridge"; +static const char pci_device_1106_2259[] = "CN400/PM880 Host Bridge"; +static const char pci_device_1106_2269[] = "KT880 Host Bridge"; +static const char pci_device_1106_2282[] = "K8T800Pro Host Bridge"; +static const char pci_device_1106_2290[] = "K8M890 Host Bridge"; +static const char pci_device_1106_2296[] = "P4M800 Host Bridge"; +static const char pci_device_1106_2308[] = "PT894 Host Bridge"; +static const char pci_device_1106_2314[] = "P4M800CE Host Bridge"; +static const char pci_device_1106_287a[] = "VT8251 PCI to PCI Bridge"; +static const char pci_device_1106_287b[] = "VT8251 PCI to PCIE Bridge"; +static const char pci_device_1106_287c[] = "VT8251 PCIE Root Port"; +static const char pci_device_1106_287d[] = "VT8251 PCIE Root Port"; +static const char pci_device_1106_287e[] = "VT8251 Ultra VLINK Controller"; static const char pci_device_1106_3022[] = "CLE266"; static const char pci_device_1106_3038[] = "VT82xxxxx UHCI USB 1.1 Controller"; #ifdef INIT_SUBSYS_INFO @@ -7472,13 +8857,16 @@ static const char pci_subsys_1106_3038_1019_0a81[] = "L7VTA v1.0 Motherboard (KT400-8235)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3038_1043_8080[] = "A7V333 motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3038_1043_808c[] = "VT6202 USB2.0 4 port controller"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3038_1043_80a1[] = "A7V8X-X motherboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1106_3038_1043_80ed[] = "A7V600 motherboard"; +static const char pci_subsys_1106_3038_1043_80ed[] = "A7V600/K8V-X/A8V Deluxe motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3038_1179_0001[] = "Magnia Z310"; @@ -7492,6 +8880,12 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3038_147b_1407[] = "KV8-MAX3 motherboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3038_182d_201d[] = "CN-029 USB2.0 4 port PCI Card"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3038_1849_3038[] = "K7VT6"; +#endif static const char pci_device_1106_3040[] = "VT82C586B ACPI"; static const char pci_device_1106_3043[] = "VT86C100A [Rhine]"; #ifdef INIT_SUBSYS_INFO @@ -7504,17 +8898,26 @@ static const char pci_subsys_1106_3043_1186_1400[] = "DFE-530TX rev A"; #endif static const char pci_device_1106_3044[] = "IEEE 1394 Host Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3044_0574_086c[] = "K8N Diamond"; +#endif #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3044_1025_005a[] = "TravelMate 290"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3044_1043_808a[] = "A8V Deluxe"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3044_1458_1000[] = "GA-7VT600-1394 Motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3044_1462_702d[] = "K8T NEO 2 motherboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3044_1462_971d[] = "MS-6917"; +#endif static const char pci_device_1106_3050[] = "VT82C596 Power Management"; static const char pci_device_1106_3051[] = "VT82C596 Power Management"; static const char pci_device_1106_3053[] = "VT6105M [Rhine-III]"; @@ -7523,6 +8926,9 @@ static const char pci_subsys_1106_3057_1019_0985[] = "P6VXA Motherboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3057_1019_0987[] = "K7VZA (Rev. 1.0) Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3057_1043_8033[] = "A7V Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -7552,6 +8958,9 @@ static const char pci_subsys_1106_3058_1019_0985[] = "P6VXA Motherboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3058_1019_0987[] = "K7VZA (Rev. 1.0) Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3058_1043_1106[] = "A7V133/A7V133-C Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -7580,7 +8989,10 @@ static const char pci_subsys_1106_3059_1043_80a1[] = "A7V8X-X Motherboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1106_3059_1043_80b0[] = "A7V600 motherboard (ADI AD1980 codec [SoundMAX])"; +static const char pci_subsys_1106_3059_1043_80b0[] = "A7V600/K8V Deluxe motherboard (ADI AD1980 codec [SoundMAX])"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3059_1043_812a[] = "A8V Deluxe motherboard (Realtek ALC850 codec)"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3059_1106_3059[] = "L7VMM2 Motherboard"; @@ -7603,6 +9015,23 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3059_147b_1407[] = "KV8-MAX3 motherboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3059_1849_9761[] = "K7VT6 motherboard"; +#endif +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3059_4005_4710[] = "MSI K7T266 Pro2-RU (MSI-6380 v2) onboard audio (Realtek/ALC 200/200P)"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3059_4170_1106[] = "PCPartner P4M800-8237R Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3059_4552_1106[] = "Soyo KT-600 Dragon Plus (Realtek ALC 650)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3059_a0a0_01b6[] = "AK77-8XN onboard audio"; +#endif static const char pci_device_1106_3065[] = "VT6102 [Rhine-II]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3065_1043_80a1[] = "A7V8X-X Motherboard"; @@ -7619,6 +9048,18 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3065_13b9_1421[] = "LD-10/100AL PCI Fast Ethernet Adapter (rev.B)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3065_147b_1c09[] = "NV7 Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3065_1695_3005[] = "VT6103"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3065_1695_300c[] = "Realtek ALC655 sound chip"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3065_1849_3065[] = "K7VT6 motherboard"; +#endif static const char pci_device_1106_3068[] = "AC'97 Modem Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3068_1462_309e[] = "MS-6309 Saturn Motherboard"; @@ -7652,7 +9093,7 @@ static const char pci_subsys_1106_3104_1043_80a1[] = "A7V8X-X motherboard rev 1.01"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1106_3104_1043_80ed[] = "A7V600 motherboard"; +static const char pci_subsys_1106_3104_1043_80ed[] = "A7V600/K8V-X/A8V Deluxe motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3104_1297_f641[] = "FX41 motherboard"; @@ -7666,6 +9107,12 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3104_147b_1407[] = "KV8-MAX3 motherboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3104_182d_201d[] = "CN-029 USB 2.0 4 port PCI Card"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3104_1849_3104[] = "K7VT6 motherboard"; +#endif static const char pci_device_1106_3106[] = "VT6105 [Rhine-III]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3106_1186_1403[] = "DFE-530TX rev C"; @@ -7673,6 +9120,7 @@ static const char pci_device_1106_3108[] = "S3 Unichrome Pro VGA Adapter"; static const char pci_device_1106_3109[] = "VT8233C PCI to ISA Bridge"; static const char pci_device_1106_3112[] = "VT8361 [KLE133] Host Bridge"; +static const char pci_device_1106_3113[] = "VPX/VPX2 PCI to PCI Bridge Controller"; static const char pci_device_1106_3116[] = "VT8375 [KM266/KL266] Host Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3116_1297_f641[] = "FX41 motherboard"; @@ -7684,10 +9132,13 @@ static const char pci_device_1106_3128[] = "VT8753 [P4X266 AGP]"; static const char pci_device_1106_3133[] = "VT3133 Host Bridge"; static const char pci_device_1106_3147[] = "VT8233A ISA Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3147_1043_808c[] = "A7V333 motherboard"; +#endif static const char pci_device_1106_3148[] = "P4M266 Host Bridge"; static const char pci_device_1106_3149[] = "VIA VT6420 SATA RAID Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1106_3149_1043_80ed[] = "A7V600 motherboard"; +static const char pci_subsys_1106_3149_1043_80ed[] = "A7V600/K8V Deluxe/K8V-X/A8V Deluxe motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3149_1458_b003[] = "GA-7VM400AM(F) Motherboard"; @@ -7695,8 +9146,23 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3149_1462_7020[] = "K8T Neo 2 Motherboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3149_147b_1407[] = "KV8-MAX3 motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3149_147b_1408[] = "KV7"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3149_1849_3149[] = "K7VT6 motherboard"; +#endif static const char pci_device_1106_3156[] = "P/KN266 Host Bridge"; static const char pci_device_1106_3164[] = "VT6410 ATA133 RAID controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3164_1043_80f4[] = "P4P800 Mainboard Deluxe ATX"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3164_1462_7028[] = "915P/G Neo2"; +#endif static const char pci_device_1106_3168[] = "VT8374 P4X400 Host Controller/AGP Bridge"; static const char pci_device_1106_3177[] = "VT8235 ISA Bridge"; #ifdef INIT_SUBSYS_INFO @@ -7717,8 +9183,12 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3177_1849_3177[] = "K7VT2 motherboard"; #endif +static const char pci_device_1106_3178[] = "ProSavageDDR P4N333 Host Bridge"; static const char pci_device_1106_3188[] = "VT8385 [K8T800 AGP] Host Bridge"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3188_1043_80a3[] = "K8V Deluxe/K8V-X motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3188_147b_1407[] = "KV8-MAX3 motherboard"; #endif static const char pci_device_1106_3189[] = "VT8377 [KT400/KT600 AGP] Host Bridge"; @@ -7728,14 +9198,20 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3189_1458_5000[] = "GA-7VAX Mainboard"; #endif -static const char pci_device_1106_3204[] = "K8M800"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3189_1849_3189[] = "K7VT6 motherboard"; +#endif +static const char pci_device_1106_3204[] = "K8M800 Host Bridge"; static const char pci_device_1106_3205[] = "VT8378 [KM400/A] Chipset Host Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3205_1458_5000[] = "GA-7VM400M Motherboard"; #endif -static const char pci_device_1106_3227[] = "VT8237 ISA bridge [KT600/K8T800 South]"; +static const char pci_device_1106_3208[] = "PT890 Host Bridge"; +static const char pci_device_1106_3213[] = "VPX/VPX2 PCI to PCI Bridge Controller"; +static const char pci_device_1106_3218[] = "K8T800M Host Bridge"; +static const char pci_device_1106_3227[] = "VT8237 ISA bridge [KT600/K8T800/K8T890 South]"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1106_3227_1043_80ed[] = "A7V600 motherboard"; +static const char pci_subsys_1106_3227_1043_80ed[] = "A7V600/K8V-X/A8V Deluxe motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3227_1106_3227[] = "DFI KT600-AL Motherboard"; @@ -7746,14 +9222,57 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_3227_147b_1407[] = "KV8-MAX3 motherboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1106_3227_1849_3227[] = "K7VT4 motherboard"; +#endif +static const char pci_device_1106_3238[] = "K8T890 Host Bridge"; +static const char pci_device_1106_3249[] = "VT6421 IDE RAID Controller"; +static const char pci_device_1106_3258[] = "PT880 Host Bridge"; +static const char pci_device_1106_3259[] = "CN400/PM880 Host Bridge"; +static const char pci_device_1106_3269[] = "KT880 Host Bridge"; +static const char pci_device_1106_3282[] = "K8T800Pro Host Bridge"; +static const char pci_device_1106_3287[] = "VT8251 PCI to ISA Bridge"; +static const char pci_device_1106_3288[] = "VIA High Definition Audio Controller"; +static const char pci_device_1106_3290[] = "K8M890 Host Bridge"; +static const char pci_device_1106_3296[] = "P4M800 Host Bridge"; +static const char pci_device_1106_3337[] = "VT8237A PCI to ISA Bridge"; +static const char pci_device_1106_3344[] = "UniChrome Pro IGP"; +static const char pci_device_1106_3349[] = "VT8251 AHCI/SATA 4-Port Controller"; +static const char pci_device_1106_337a[] = "VT8237A PCI to PCI Bridge"; +static const char pci_device_1106_337b[] = "VT8237A PCI to PCIE Bridge"; static const char pci_device_1106_4149[] = "VIA VT6420 (ATA133) Controller"; +static const char pci_device_1106_4204[] = "K8M800 Host Bridge"; +static const char pci_device_1106_4208[] = "PT890 Host Bridge"; +static const char pci_device_1106_4238[] = "K8T890 Host Bridge"; +static const char pci_device_1106_4258[] = "PT880 Host Bridge"; +static const char pci_device_1106_4259[] = "CN400/PM880 Host Bridge"; +static const char pci_device_1106_4269[] = "KT880 Host Bridge"; +static const char pci_device_1106_4282[] = "K8T800Pro Host Bridge"; +static const char pci_device_1106_4290[] = "K8M890 Host Bridge"; +static const char pci_device_1106_4296[] = "P4M800 Host Bridge"; +static const char pci_device_1106_4308[] = "PT894 Host Bridge"; +static const char pci_device_1106_4314[] = "P4M800CE Host Bridge"; static const char pci_device_1106_5030[] = "VT82C596 ACPI [Apollo PRO]"; +static const char pci_device_1106_5208[] = "PT890 I/O APIC Interrupt Controller"; +static const char pci_device_1106_5238[] = "K8T890 I/O APIC Interrupt Controller"; +static const char pci_device_1106_5290[] = "K8M890 I/O APIC Interrupt Controller"; +static const char pci_device_1106_5308[] = "PT894 I/O APIC Interrupt Controller"; static const char pci_device_1106_6100[] = "VT85C100A [Rhine II]"; -static const char pci_device_1106_7204[] = "K8M800"; +static const char pci_device_1106_7204[] = "K8M800 Host Bridge"; static const char pci_device_1106_7205[] = "VT8378 [S3 UniChrome] Integrated Video"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_7205_1458_d000[] = "Gigabyte GA-7VM400(A)M(F) Motherboard"; #endif +static const char pci_device_1106_7208[] = "PT890 Host Bridge"; +static const char pci_device_1106_7238[] = "K8T890 Host Bridge"; +static const char pci_device_1106_7258[] = "PT880 Host Bridge"; +static const char pci_device_1106_7259[] = "CN400/PM880 Host Bridge"; +static const char pci_device_1106_7269[] = "KT880 Host Bridge"; +static const char pci_device_1106_7282[] = "K8T800Pro Host Bridge"; +static const char pci_device_1106_7290[] = "K8M890 Host Bridge"; +static const char pci_device_1106_7296[] = "P4M800 Host Bridge"; +static const char pci_device_1106_7308[] = "PT894 Host Bridge"; +static const char pci_device_1106_7314[] = "P4M800CE Host Bridge"; static const char pci_device_1106_8231[] = "VT8231 [PCI-to-ISA Bridge]"; static const char pci_device_1106_8235[] = "VT8235 ACPI"; static const char pci_device_1106_8305[] = "VT8363/8365 [KT133/KM133 AGP]"; @@ -7769,19 +9288,33 @@ static const char pci_device_1106_8605[] = "VT8605 [PM133 AGP]"; static const char pci_device_1106_8691[] = "VT82C691 [Apollo Pro]"; static const char pci_device_1106_8693[] = "VT82C693 [Apollo Pro Plus] PCI Bridge"; +static const char pci_device_1106_a208[] = "PT890 PCI to PCI Bridge Controller"; +static const char pci_device_1106_a238[] = "K8T890 PCI to PCI Bridge Controller"; static const char pci_device_1106_b091[] = "VT8633 [Apollo Pro266 AGP]"; static const char pci_device_1106_b099[] = "VT8366/A/7 [Apollo KT266/A/333 AGP]"; static const char pci_device_1106_b101[] = "VT8653 AGP Bridge"; static const char pci_device_1106_b102[] = "VT8362 AGP Bridge"; static const char pci_device_1106_b103[] = "VT8615 AGP Bridge"; static const char pci_device_1106_b112[] = "VT8361 [KLE133] AGP Bridge"; +static const char pci_device_1106_b113[] = "VPX/VPX2 I/O APIC Interrupt Controller"; +static const char pci_device_1106_b115[] = "VT8363/8365 [KT133/KM133] PCI Bridge"; static const char pci_device_1106_b168[] = "VT8235 PCI Bridge"; -static const char pci_device_1106_b188[] = "VT8237 PCI bridge [K8T800 South]"; +static const char pci_device_1106_b188[] = "VT8237 PCI bridge [K8T800/K8T890 South]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1106_b188_147b_1407[] = "KV8-MAX3 motherboard"; #endif static const char pci_device_1106_b198[] = "VT8237 PCI Bridge"; +static const char pci_device_1106_b213[] = "VPX/VPX2 I/O APIC Interrupt Controller"; +static const char pci_device_1106_c208[] = "PT890 PCI to PCI Bridge Controller"; +static const char pci_device_1106_c238[] = "K8T890 PCI to PCI Bridge Controller"; static const char pci_device_1106_d104[] = "VT8237 Integrated Fast Ethernet Controller"; +static const char pci_device_1106_d208[] = "PT890 PCI to PCI Bridge Controller"; +static const char pci_device_1106_d213[] = "VPX/VPX2 PCI to PCI Bridge Controller"; +static const char pci_device_1106_d238[] = "K8T890 PCI to PCI Bridge Controller"; +static const char pci_device_1106_e208[] = "PT890 PCI to PCI Bridge Controller"; +static const char pci_device_1106_e238[] = "K8T890 PCI to PCI Bridge Controller"; +static const char pci_device_1106_f208[] = "PT890 PCI to PCI Bridge Controller"; +static const char pci_device_1106_f238[] = "K8T890 PCI to PCI Bridge Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1107[] = "Stratus Computers"; @@ -7812,7 +9345,8 @@ static const char pci_device_110a_007b[] = "FSC Remote Service Controller, mailbox device"; static const char pci_device_110a_007c[] = "FSC Remote Service Controller, shared memory device"; static const char pci_device_110a_007d[] = "FSC Remote Service Controller, SMIC device"; -static const char pci_device_110a_2102[] = "DSCC4 WAN adapter"; +static const char pci_device_110a_2101[] = "HST SAPHIR V Primary PCI (ISDN/PMx)"; +static const char pci_device_110a_2102[] = "DSCC4 PEB/PEF 20534 DMA Supported Serial Communication Controller with 4 Channels"; static const char pci_device_110a_2104[] = "Eicon Diva 2.02 compatible passive ISDN card"; static const char pci_device_110a_3142[] = "SIMATIC NET CP 5613A1 (Profibus Adapter)"; static const char pci_device_110a_4021[] = "SIMATIC NET CP 5512 (Profibus and MPI Cardbus Adapter)"; @@ -7882,7 +9416,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1114[] = "Atmel Corporation"; -static const char pci_device_1114_0506[] = "802.11b Wireless Network Adaptor (at76c506)"; +static const char pci_device_1114_0506[] = "at76c506 802.11b Wireless Network Adaptor"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1115[] = "3D Labs"; @@ -8095,6 +9629,7 @@ static const char pci_vendor_112f[] = "Imaging Technology Inc"; static const char pci_device_112f_0000[] = "MVC IC-PCI"; static const char pci_device_112f_0001[] = "MVC IM-PCI Video frame grabber/processor"; +static const char pci_device_112f_0008[] = "PC-CamLink PCI framegrabber"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1130[] = "Computervision"; @@ -8106,19 +9641,205 @@ static const char pci_device_1131_3400[] = "SmartPCI56(UCB1500) 56K Modem"; static const char pci_device_1131_5400[] = "TriMedia TM1000/1100"; static const char pci_device_1131_5402[] = "TriMedia TM-1300"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_5402_1244_0f00[] = "Fritz!Card DSL"; +#endif +static const char pci_device_1131_5405[] = "TriMedia TM1500"; +static const char pci_device_1131_5406[] = "TriMedia TM1700"; static const char pci_device_1131_7130[] = "SAA7130 Video Broadcast Decoder"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7130_102b_48d0[] = "Matrox CronosPlus"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7130_1048_226b[] = "ELSA EX-VISION 300TV"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7130_1131_2001[] = "10MOONS PCI TV CAPTURE CARD"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7130_1131_2005[] = "Techcom (India) TV Tuner Card (SSD-TV-670)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7130_1461_050c[] = "Nagase Sangyo TransGear 3000TV"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7130_1461_10ff[] = "AVerMedia DVD EZMaker"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7130_1461_2108[] = "AverMedia AverTV/305"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7130_1461_2115[] = "AverMedia AverTV Studio 305"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7130_153b_1152[] = "Terratec Cinergy 200 TV"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7130_185b_c100[] = "Compro VideoMate TV PVR/FM"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7130_185b_c901[] = "Videomate DVB-T200"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7130_5168_0138[] = "LifeView FlyVIDEO2000"; +#endif +static const char pci_device_1131_7133[] = "SAA7133/SAA7135 Video Broadcast Decoder"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_0000_4091[] = "Beholder BeholdTV 409 FM"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_002b_11bd[] = "Pinnacle PCTV Stereo"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1019_4cb5[] = "Elitegroup ECS TVP3XP FM1236 Tuner Card (NTSC,FM)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1043_0210[] = "FlyTV mini Asus Digimatrix"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1043_4843[] = "ASUS TV-FM 7133"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1043_4845[] = "TV-FM 7135"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1043_4862[] = "P7131 Dual"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1131_2001[] = "Proteus Pro [philips reference design]"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1131_2018[] = "Tiger reference design"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1131_4ee9[] = "MonsterTV Mobile"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_11bd_002e[] = "PCTV 110i (saa7133)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_12ab_0800[] = "PURPLE TV"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1421_1370[] = "Instant TV (saa7135)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1435_7330[] = "VFG7330"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1435_7350[] = "VFG7350"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1461_1044[] = "AVerTVHD MCE A180"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1461_f31f[] = "Avermedia AVerTV GO 007 FM"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1462_6231[] = "TV@Anywhere plus"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_1489_0214[] = "LifeView FlyTV Platinum FM"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_14c0_1212[] = "LifeView FlyTV Platinum Mini2"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_153b_1160[] = "Cinergy 250 PCI TV"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_153b_1162[] = "Terratec Cinergy 400 mobile"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_185b_c100[] = "VideoMate TV"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_4e42_0212[] = "LifeView FlyTV Platinum Mini"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_4e42_0502[] = "Typhoon DVB-T Duo Digital/Analog Cardbus"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_5168_0306[] = "LifeView FlyDVB-T DUO"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_5168_0319[] = "LifeView FlyDVB Trio"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7133_5456_7135[] = "GoTView 7135 PCI"; +#endif +static const char pci_device_1131_7134[] = "SAA7134 Video Broadcast Decoder"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1019_4cb4[] = "Elitegroup ECS TVP3XP FM1216 Tuner Card(PAL-BG,FM)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1043_0210[] = "Digimatrix TV"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1043_4840[] = "ASUS TV-FM 7134"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1131_2004[] = "EUROPA V3 reference design"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1131_4e85[] = "SKNet Monster TV"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1131_6752[] = "EMPRESS"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_11bd_002b[] = "Pinnacle PCTV Stereo (saa7134)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_11bd_002d[] = "Pinnacle PCTV 300i DVB-T + PAL"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1461_9715[] = "AVerTV Studio 307"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1461_a70a[] = "Avermedia AVerTV 307"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1461_a70b[] = "AverMedia M156 / Medion 2819"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1461_d6ee[] = "Cardbus TV/Radio (E500)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1471_b7e9[] = "AVerTV Cardbus plus"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_153b_1142[] = "Terratec Cinergy 400 TV"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_153b_1143[] = "Terratec Cinergy 600 TV"; +#endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1131_7130_5168_0138[] = "LiveView FlyVideo 2000"; +static const char pci_subsys_1131_7134_153b_1158[] = "Terratec Cinergy 600 TV MK3"; #endif -static const char pci_device_1131_7133[] = "SAA713X Audio+video broadcast decoder"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1131_7133_5168_0138[] = "LifeView FlyVideo 3000"; +static const char pci_subsys_1131_7134_1540_9524[] = "ProVideo PV952"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1131_7133_5168_0212[] = "LifeView FlyTV Platinum mini"; +static const char pci_subsys_1131_7134_16be_0003[] = "Medion 7134"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_185b_c200[] = "Compro VideoMate Gold+ Pal"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_185b_c900[] = "Videomate DVB-T300"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1894_a006[] = "KNC One TV-Station DVR"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_1894_fe01[] = "KNC One TV-Station RDS / Typhoon TV Tuner RDS"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7134_4e42_0138[] = "LifeView FlyVIDEO3000"; #endif -static const char pci_device_1131_7134[] = "SAA7134"; -static const char pci_device_1131_7135[] = "SAA7135 Audio+video broadcast decoder"; static const char pci_device_1131_7145[] = "SAA7145"; static const char pci_device_1131_7146[] = "SAA7146"; #ifdef INIT_SUBSYS_INFO @@ -8131,7 +9852,13 @@ static const char pci_subsys_1131_7146_1131_4f56[] = "KNC1 DVB-S Budget"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1131_7146_1131_4f61[] = "Fujitsu-Siemens Activy DVB-S Budget"; +static const char pci_subsys_1131_7146_1131_4f60[] = "Fujitsu-Siemens Activy DVB-S Budget Rev AL"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7146_1131_4f61[] = "Activy DVB-S Budget Rev GR"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7146_1131_5f61[] = "Activy DVB-T Budget"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1131_7146_114b_2003[] = "DVRaptor Video Edit/Capture Card"; @@ -8143,6 +9870,9 @@ static const char pci_subsys_1131_7146_11bd_000a[] = "DV500 Overlay"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7146_11bd_000f[] = "DV500 Overlay"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1131_7146_13c2_0000[] = "Siemens/Technotrend/Hauppauge DVB card rev1.3 or rev1.5"; #endif #ifdef INIT_SUBSYS_INFO @@ -8188,8 +9918,12 @@ static const char pci_subsys_1131_7146_13c2_1013[] = "SATELCO Multimedia DVB"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1131_7146_13c2_1016[] = "WinTV-NOVA-SE DVB card"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1131_7146_13c2_1102[] = "Technotrend/Hauppauge DVB card rev2.1"; #endif +static const char pci_device_1131_9730[] = "SAA9730 Integrated Multimedia and Peripheral Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1132[] = "Mitel Corp."; @@ -8225,14 +9959,8 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e010_110a_0021[] = "Fujitsu Siemens ISDN S0"; #endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e010_8001_0014[] = "Diva Server BRI-2M PCI Cornet NQ"; -#endif static const char pci_device_1133_e011[] = "Diva Server BRI S/T Rev 2"; static const char pci_device_1133_e012[] = "Diva Server 4BRI-8M PCI"; -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e012_8001_0014[] = "Diva Server 4BRI-8M PCI Cornet NQ"; -#endif static const char pci_device_1133_e013[] = "Diva Server 4BRI Rev 2"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e013_1133_1300[] = "Diva Server V-4BRI-8"; @@ -8240,34 +9968,16 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e013_1133_e013[] = "Diva Server 4BRI-8M 2.0 PCI"; #endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e013_8001_0014[] = "Diva Server 4BRI-8M 2.0 PCI Cornet NQ"; -#endif static const char pci_device_1133_e014[] = "Diva Server PRI-30M PCI"; -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e014_0008_0100[] = "Diva Server PRI-30M PCI"; -#endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e014_8001_0014[] = "Diva Server PRI-30M PCI Cornet NQ"; -#endif static const char pci_device_1133_e015[] = "DIVA Server PRI Rev 2"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e015_1133_e015[] = "Diva Server PRI 2.0 PCI"; #endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e015_8001_0014[] = "Diva Server PRI 2.0 PCI Cornet NQ"; -#endif static const char pci_device_1133_e016[] = "Diva Server Voice 4BRI PCI"; -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e016_8001_0014[] = "Diva Server PRI Cornet NQ"; -#endif static const char pci_device_1133_e017[] = "Diva Server Voice 4BRI Rev 2"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e017_1133_e017[] = "Diva Server Voice 4BRI-8M 2.0 PCI"; #endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e017_8001_0014[] = "Diva Server Voice 4BRI-8M 2.0 PCI Cornet NQ"; -#endif static const char pci_device_1133_e018[] = "Diva Server BRI-2M 2.0 PCI"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e018_1133_1800[] = "Diva Server V-BRI-2"; @@ -8275,24 +9985,15 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e018_1133_e018[] = "Diva Server BRI-2M 2.0 PCI"; #endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e018_8001_0014[] = "Diva Server BRI-2M 2.0 PCI Cornet NQ"; -#endif static const char pci_device_1133_e019[] = "Diva Server Voice PRI Rev 2"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e019_1133_e019[] = "Diva Server Voice PRI 2.0 PCI"; #endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e019_8001_0014[] = "Diva Server Voice PRI 2.0 PCI Cornet NQ"; -#endif static const char pci_device_1133_e01a[] = "Diva Server 2FX"; static const char pci_device_1133_e01b[] = "Diva Server Voice BRI-2M 2.0 PCI"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e01b_1133_e01b[] = "Diva Server Voice BRI-2M 2.0 PCI"; #endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e01b_8001_0014[] = "Diva Server Voice BRI-2M 2.0 PCI Cornet NQ"; -#endif static const char pci_device_1133_e01c[] = "Diva Server PRI Rev 3"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e01c_1133_1c01[] = "Diva Server PRI/E1/T1-8"; @@ -8331,31 +10032,7 @@ static const char pci_subsys_1133_e01c_1133_1c0c[] = "Diva Server V-PRI/E1-30 Cornet NQ"; #endif static const char pci_device_1133_e01e[] = "Diva Server 2PRI"; -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e01e_1133_1e00[] = "Diva Server V-2PRI/E1-60"; -#endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e01e_1133_1e01[] = "Diva Server V-2PRI/T1-48"; -#endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e01e_1133_1e02[] = "Diva Server 2PRI/E1-60"; -#endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e01e_1133_1e03[] = "Diva Server 2PRI/T1-48"; -#endif static const char pci_device_1133_e020[] = "Diva Server 4PRI"; -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e020_1133_2000[] = "Diva Server V-4PRI/E1-120"; -#endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e020_1133_2001[] = "Diva Server V-4PRI/T1-96"; -#endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e020_1133_2002[] = "Diva Server 4PRI/E1-120"; -#endif -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1133_e020_1133_2003[] = "Diva Server 4PRI/T1-96"; -#endif static const char pci_device_1133_e024[] = "Diva Server Analog-4P"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e024_1133_2400[] = "Diva Server V-Analog-4P"; @@ -8370,6 +10047,8 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1133_e028_1133_e028[] = "Diva Server Analog-8P"; #endif +static const char pci_device_1133_e02a[] = "Diva Server IPM-300"; +static const char pci_device_1133_e02c[] = "Diva Server IPM-600"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1134[] = "Mercury Computer Systems"; @@ -8452,6 +10131,7 @@ static const char pci_device_1145_f012[] = "NinjaSCSI-32 Logitec"; static const char pci_device_1145_f013[] = "NinjaSCSI-32 Logitec"; static const char pci_device_1145_f015[] = "NinjaSCSI-32 Melco"; +static const char pci_device_1145_f020[] = "NinjaSCSI-32 Sony PCGA-DVD51"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1146[] = "Force Computers"; @@ -8518,7 +10198,7 @@ static const char pci_subsys_1148_4000_1148_5844[] = "FDDI SK-5844 (SK-NET FDDI-LP64 DAS)"; #endif static const char pci_device_1148_4200[] = "Token Ring adapter"; -static const char pci_device_1148_4300[] = "SK-98xx Gigabit Ethernet Server Adapter"; +static const char pci_device_1148_4300[] = "SK-9872 Gigabit Ethernet Server Adapter (SK-NET GE-ZX dual link)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1148_4300_1148_9821[] = "SK-9821 Gigabit Ethernet Server Adapter (SK-NET GE-T)"; #endif @@ -8573,7 +10253,7 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1148_4300_1259_2977[] = "AT-2970TX/2TX Gigabit Ethernet Adapter"; #endif -static const char pci_device_1148_4320[] = "SK-98xx V2.0 Gigabit Ethernet Adapter"; +static const char pci_device_1148_4320[] = "SysKonnect SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter, PCI64, Fiber ZX/SC"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1148_4320_1148_0121[] = "Marvell RDK-8001 Adapter"; #endif @@ -8630,7 +10310,9 @@ #endif static const char pci_device_1148_4400[] = "SK-9Dxx Gigabit Ethernet Adapter"; static const char pci_device_1148_4500[] = "SK-9Mxx Gigabit Ethernet Adapter"; -static const char pci_device_1148_9e00[] = "SK-9Exx 10/100/1000Base-T Adapter"; +static const char pci_device_1148_9000[] = "SK-9S21 10/100/1000Base-T Server Adapter, PCI-X, Copper RJ-45"; +static const char pci_device_1148_9843[] = "[Fujitsu] Gigabit Ethernet"; +static const char pci_device_1148_9e00[] = "SK-9E21D 10/100/1000Base-T Adapter, Copper RJ-45"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1148_9e00_1148_2100[] = "SK-9E21 Server Adapter"; #endif @@ -8688,7 +10370,6 @@ static const char pci_device_114f_000d[] = "SyncPort 2-Port (x.25/FR)"; static const char pci_device_114f_0011[] = "AccelePort 8r EIA-232 (IBM)"; static const char pci_device_114f_0012[] = "AccelePort 8r EIA-422"; -static const char pci_device_114f_0013[] = "AccelePort Xr"; static const char pci_device_114f_0014[] = "AccelePort 8r EIA-422"; static const char pci_device_114f_0015[] = "AccelePort Xem"; static const char pci_device_114f_0016[] = "AccelePort EPC/X"; @@ -8804,6 +10485,9 @@ static const char pci_subsys_115d_0003_115d_0181[] = "Cardbus Ethernet 10/100"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_115d_0003_115d_0182[] = "RealPort2 CardBus Ethernet 10/100 (R2BE-100)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_115d_0003_115d_1181[] = "Cardbus Ethernet 10/100"; #endif #ifdef INIT_SUBSYS_INFO @@ -8910,7 +10594,7 @@ static const char pci_device_1165_0001[] = "Motion TPEG Recorder/Player with audio"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1166[] = "ServerWorks"; +static const char pci_vendor_1166[] = "Broadcom"; static const char pci_device_1166_0000[] = "CMIC-LE"; static const char pci_device_1166_0005[] = "CNB20-LE Host Bridge"; static const char pci_device_1166_0006[] = "CNB20HE Host Bridge"; @@ -8925,36 +10609,66 @@ static const char pci_device_1166_0015[] = "CMIC-GC Host Bridge"; static const char pci_device_1166_0016[] = "CMIC-GC Host Bridge"; static const char pci_device_1166_0017[] = "GCNB-LE Host Bridge"; +static const char pci_device_1166_0036[] = "HT1000 PCI/PCI-X bridge"; static const char pci_device_1166_0101[] = "CIOB-X2 PCI-X I/O Bridge"; +static const char pci_device_1166_0104[] = "HT1000 PCI/PCI-X bridge"; static const char pci_device_1166_0110[] = "CIOB-E I/O Bridge with Gigabit Ethernet"; +static const char pci_device_1166_0130[] = "HT1000 PCI-X bridge"; +static const char pci_device_1166_0132[] = "HT1000 PCI-Express bridge"; static const char pci_device_1166_0200[] = "OSB4 South Bridge"; static const char pci_device_1166_0201[] = "CSB5 South Bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1166_0201_4c53_1080[] = "CT8 mainboard"; #endif static const char pci_device_1166_0203[] = "CSB6 South Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1166_0203_1734_1012[] = "Primergy RX300"; +#endif +static const char pci_device_1166_0205[] = "HT1000 Legacy South Bridge"; static const char pci_device_1166_0211[] = "OSB4 IDE Controller"; static const char pci_device_1166_0212[] = "CSB5 IDE Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1166_0212_4c53_1080[] = "CT8 mainboard"; #endif static const char pci_device_1166_0213[] = "CSB6 RAID/IDE Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1166_0213_1028_c134[] = "Poweredge SC600"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1166_0213_1734_1012[] = "Primergy RX300"; +#endif +static const char pci_device_1166_0214[] = "HT1000 Legacy IDE controller"; static const char pci_device_1166_0217[] = "CSB6 IDE Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1166_0217_1028_4134[] = "Poweredge SC600"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_1166_0220[] = "OSB4/CSB5 OHCI USB Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1166_0220_4c53_1080[] = "CT8 mainboard"; #endif static const char pci_device_1166_0221[] = "CSB6 OHCI USB Controller"; -static const char pci_device_1166_0225[] = "CSB5 LPC bridge"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1166_0225_4c53_1080[] = "CT8 mainboard"; +static const char pci_subsys_1166_0221_1734_1012[] = "Primergy RX300"; #endif +static const char pci_device_1166_0223[] = "HT1000 USB Controller"; +static const char pci_device_1166_0225[] = "CSB5 LPC bridge"; static const char pci_device_1166_0227[] = "GCLE-2 Host Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1166_0227_1734_1012[] = "Primergy RX300"; +#endif static const char pci_device_1166_0230[] = "CSB5 LPC bridge"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1166_0230_4c53_1080[] = "CT8 mainboard"; #endif +static const char pci_device_1166_0234[] = "HT1000 LPC Bridge"; static const char pci_device_1166_0240[] = "K2 SATA"; +static const char pci_device_1166_0241[] = "RAIDCore RC4000"; +static const char pci_device_1166_0242[] = "RAIDCore BC4000"; +static const char pci_device_1166_024a[] = "BCM5785 (HT1000) SATA Native SATA Mode"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1167[] = "Mutoh Industries Inc"; @@ -9017,13 +10731,20 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1179[] = "Toshiba America Info Systems"; +static const char pci_device_1179_0102[] = "Extended IDE Controller"; static const char pci_device_1179_0103[] = "EX-IDE Type-B"; static const char pci_device_1179_0404[] = "DVD Decoder card"; static const char pci_device_1179_0406[] = "Tecra Video Capture device"; static const char pci_device_1179_0407[] = "DVD Decoder card (Version 2)"; -static const char pci_device_1179_0601[] = "601"; +static const char pci_device_1179_0601[] = "CPU to PCI bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1179_0601_1179_0001[] = "Satellite Pro"; +#endif static const char pci_device_1179_0603[] = "ToPIC95 PCI to CardBus Bridge for Notebooks"; static const char pci_device_1179_060a[] = "ToPIC95"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1179_060a_1179_0001[] = "Satellite Pro"; +#endif static const char pci_device_1179_060f[] = "ToPIC97"; static const char pci_device_1179_0617[] = "ToPIC100 PCI to Cardbus Bridge with ZV Support"; static const char pci_device_1179_0618[] = "CPU to PCI and PCI to ISA bridge"; @@ -9043,6 +10764,13 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_117c[] = "Atto Technology"; +static const char pci_device_117c_0030[] = "Ultra320 SCSI Host Adapter"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_117c_0030_117c_8013[] = "ExpressPCI UL4D"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_117c_0030_117c_8014[] = "ExpressPCI UL4S"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_117d[] = "Becton & Dickinson"; @@ -9067,6 +10795,17 @@ #endif #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0476_1028_0188[] = "Inspiron 6000 laptop"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0476_1043_1967[] = "V6800V"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0476_1043_1987[] = "Asus A4K and Z81K notebooks, possibly others ( mid-2005 machines )"; +#endif +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1180_0476_104d_80df[] = "Vaio PCG-FX403"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -9083,10 +10822,14 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1180_0478_1014_0184[] = "ThinkPad A30p (2653-64G)"; #endif +static const char pci_device_1180_0511[] = "R5C511"; static const char pci_device_1180_0522[] = "R5C522 IEEE 1394 Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1180_0522_1014_01cf[] = "ThinkPad A30p (2653-64G)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0522_1043_1967[] = "V6800V"; +#endif static const char pci_device_1180_0551[] = "R5C551 IEEE 1394 Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1180_0551_144d_c006[] = "vpr Matrix 170B4"; @@ -9096,6 +10839,41 @@ static const char pci_subsys_1180_0552_1014_0511[] = "ThinkPad A/T/X Series"; #endif #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0552_1028_0188[] = "Inspiron 6000 laptop"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_1180_0554[] = "R5C554"; +static const char pci_device_1180_0575[] = "R5C575 SD Bus Host Adapter"; +static const char pci_device_1180_0576[] = "R5C576 SD Bus Host Adapter"; +static const char pci_device_1180_0592[] = "R5C592 Memory Stick Bus Host Adapter"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0592_1043_1967[] = "V6800V"; +#endif +static const char pci_device_1180_0811[] = "R5C811"; +static const char pci_device_1180_0822[] = "R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0822_1014_0556[] = "Thinkpad X40"; +#endif +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0822_1028_0188[] = "Inspiron 6000 laptop"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0822_1028_01a2[] = "Inspiron 9200"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0822_1043_1967[] = "ASUS V6800V"; +#endif +static const char pci_device_1180_0841[] = "R5C841 CardBus/SD/SDIO/MMC/MS/MSPro/xD/IEEE1394"; +static const char pci_device_1180_0852[] = "xD-Picture Card Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1180_0852_1043_1967[] = "V6800V"; +#endif +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1181[] = "Telmatics International"; #endif @@ -9128,6 +10906,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1186_1300_1186_1301[] = "DFE-530TX+ 10/100 Ethernet Adapter"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1186_1300_1186_1303[] = "DFE-528TX 10/100 Fast Ethernet PCI Adapter"; +#endif static const char pci_device_1186_1340[] = "DFE-690TXD CardBus PC Card"; static const char pci_device_1186_1541[] = "DFE-680TXD CardBus PC Card"; static const char pci_device_1186_1561[] = "DRP-32TXD Cardbus PC Card"; @@ -9145,8 +10926,8 @@ static const char pci_device_1186_3a13[] = "AirPlus DWL-G520 Wireless PCI Adapter(rev.B)"; static const char pci_device_1186_3a14[] = "AirPremier DWL-AG530 Wireless PCI Adapter"; static const char pci_device_1186_3a63[] = "AirXpert DWL-AG660 Wireless Cardbus Adapter"; -static const char pci_device_1186_3b05[] = "DWL-G650+ CardBus PC Card"; static const char pci_device_1186_4000[] = "DL2000-based Gigabit Ethernet"; +static const char pci_device_1186_4300[] = "DGE-528T Gigabit Ethernet Adapter"; static const char pci_device_1186_4c00[] = "Gigabit Ethernet Adapter"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1186_4c00_1186_4c00[] = "DGE-530T Gigabit Ethernet Adapter"; @@ -9218,6 +10999,10 @@ static const char pci_device_1191_8030[] = "AEC6712S SCSI"; static const char pci_device_1191_8040[] = "AEC6712D SCSI"; static const char pci_device_1191_8050[] = "AEC6712SUW SCSI"; +static const char pci_device_1191_8060[] = "AEC6712 SCSI"; +static const char pci_device_1191_8080[] = "AEC67160 SCSI"; +static const char pci_device_1191_8081[] = "AEC67160S SCSI"; +static const char pci_device_1191_808a[] = "AEC67162 2-ch. LVD SCSI"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1192[] = "Densan Company Ltd"; @@ -9306,7 +11091,12 @@ static const char pci_device_11ab_0146[] = "GT-64010/64010A System Controller"; static const char pci_device_11ab_138f[] = "W8300 802.11 Adapter (rev 07)"; static const char pci_device_11ab_1fa6[] = "Marvell W8300 802.11 Adapter"; -static const char pci_device_11ab_4320[] = "Gigabit Ethernet Controller"; +static const char pci_device_11ab_1fa7[] = "88W8310 and 88W8000G [Libertas] 802.11g client chipset"; +static const char pci_device_11ab_1faa[] = "88w8335 [Libertas] 802.11b/g Wireless"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_11ab_1faa_1385_4e00[] = "WG511 v2 54MBit/ Wireless PC-Card"; +#endif +static const char pci_device_11ab_4320[] = "88E8001 Gigabit Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4320_1019_0f38[] = "Marvell 88E8001 Gigabit Ethernet Controller (ECS)"; #endif @@ -9323,7 +11113,7 @@ static const char pci_subsys_11ab_4320_105b_0c19[] = "Marvell 88E8001 Gigabit Ethernet Controller (Foxconn)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_11ab_4320_10b8_b452[] = "SMC EZ Card 1000 (SMC9452TXV.2)"; +static const char pci_subsys_11ab_4320_10b8_b452[] = "EZ Card 1000 (SMC9452TXV.2)"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4320_11ab_0121[] = "Marvell RDK-8001"; @@ -9358,7 +11148,15 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4320_270f_2803[] = "Marvell 88E8001 Gigabit Ethernet Controller (Chaintech)"; #endif -static const char pci_device_11ab_4350[] = "Fast Ethernet Controller"; +static const char pci_device_11ab_4340[] = "88E8021 PCI-X IPMI Gigabit Ethernet Controller"; +static const char pci_device_11ab_4341[] = "88E8022 PCI-X IPMI Gigabit Ethernet Controller"; +static const char pci_device_11ab_4342[] = "88E8061 PCI-E IPMI Gigabit Ethernet Controller"; +static const char pci_device_11ab_4343[] = "88E8062 PCI-E IPMI Gigabit Ethernet Controller"; +static const char pci_device_11ab_4344[] = "88E8021 PCI-X IPMI Gigabit Ethernet Controller"; +static const char pci_device_11ab_4345[] = "88E8022 PCI-X IPMI Gigabit Ethernet Controller"; +static const char pci_device_11ab_4346[] = "88E8061 PCI-E IPMI Gigabit Ethernet Controller"; +static const char pci_device_11ab_4347[] = "88E8062 PCI-E IPMI Gigabit Ethernet Controller"; +static const char pci_device_11ab_4350[] = "88E8035 PCI-E Fast Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4350_1179_0001[] = "Marvell 88E8035 Fast Ethernet Controller (Toshiba)"; #endif @@ -9401,7 +11199,7 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4350_1854_0020[] = "Marvell 88E8035 Fast Ethernet Controller (LGE)"; #endif -static const char pci_device_11ab_4351[] = "Fast Ethernet Controller"; +static const char pci_device_11ab_4351[] = "88E8036 PCI-E Fast Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4351_107b_4009[] = "Marvell 88E8036 Fast Ethernet Controller (Wistron)"; #endif @@ -9462,7 +11260,8 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4351_1854_0020[] = "Marvell 88E8036 Fast Ethernet Controller (LGE)"; #endif -static const char pci_device_11ab_4360[] = "Gigabit Ethernet Controller"; +static const char pci_device_11ab_4352[] = "88E8038 PCI-E Fast Ethernet Controller"; +static const char pci_device_11ab_4360[] = "88E8052 PCI-E ASF Gigabit Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4360_1043_8134[] = "Marvell 88E8052 Gigabit Ethernet Controller (Asus)"; #endif @@ -9482,12 +11281,9 @@ static const char pci_subsys_11ab_4360_1849_8052[] = "Marvell 88E8052 Gigabit Ethernet Controller (ASRock)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_11ab_4360_1940_e000[] = "Marvell 88E8052 Gigabit Ethernet Controller (Gigabyte)"; -#endif -#ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4360_a0a0_0509[] = "Marvell 88E8052 Gigabit Ethernet Controller (Aopen)"; #endif -static const char pci_device_11ab_4361[] = "Gigabit Ethernet Controller"; +static const char pci_device_11ab_4361[] = "88E8050 PCI-E ASF Gigabit Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4361_107b_3015[] = "Marvell 88E8050 Gigabit Ethernet Controller (Gateway)"; #endif @@ -9499,14 +11295,19 @@ static const char pci_subsys_11ab_4361_8086_3063[] = "D925XCVLK mainboard"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_device_11ab_4362[] = "Gigabit Ethernet Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_11ab_4361_8086_3439[] = "Marvell 88E8050 Gigabit Ethernet Controller (Intel)"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_11ab_4362[] = "88E8053 PCI-E Gigabit Ethernet Controller"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4362_103c_2a0d[] = "Marvell 88E8053 Gigabit Ethernet Controller (Asus)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_11ab_4362_1043_8142[] = "Marvell 88E8053 Gigabit Ethernet Controller (Asus)"; +static const char pci_subsys_11ab_4362_1043_8142[] = "Marvell 88E8053 Gigabit Ethernet controller PCIe (Asus)"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4362_109f_3197[] = "Marvell 88E8053 Gigabit Ethernet Controller (Trigem)"; @@ -9545,7 +11346,7 @@ static const char pci_subsys_11ab_4362_1297_c244[] = "Marvell 88E8053 Gigabit Ethernet Controller (Shuttle)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_11ab_4362_13d1_ac11[] = "Abocom EGE5K - Giga Ethernet Expresscard"; +static const char pci_subsys_11ab_4362_13d1_ac11[] = "EGE5K - Giga Ethernet Expresscard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4362_1458_e000[] = "Marvell 88E8053 Gigabit Ethernet Controller (Gigabyte)"; @@ -9617,17 +11418,16 @@ static const char pci_subsys_11ab_4362_1854_0022[] = "Marvell 88E8053 Gigabit Ethernet Controller (LGE)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_11ab_4362_1940_e000[] = "Marvell 88E8053 Gigabit Ethernet Controller (Gigabyte)"; -#endif -#ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4362_270f_2801[] = "Marvell 88E8053 Gigabit Ethernet Controller (Chaintech)"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11ab_4362_a0a0_0506[] = "Marvell 88E8053 Gigabit Ethernet Controller (Aopen)"; #endif +static const char pci_device_11ab_4363[] = "88E8055 PCI-E Gigabit Ethernet Controller"; static const char pci_device_11ab_4611[] = "GT-64115 System Controller"; static const char pci_device_11ab_4620[] = "GT-64120/64120A/64121A System Controller"; static const char pci_device_11ab_4801[] = "GT-48001"; +static const char pci_device_11ab_5005[] = "Belkin F5D5005 Gigabit Desktop Network PCI Card"; static const char pci_device_11ab_5040[] = "MV88SX5040 4-port SATA I PCI-X Controller"; static const char pci_device_11ab_5041[] = "MV88SX5041 4-port SATA I PCI-X Controller"; static const char pci_device_11ab_5080[] = "MV88SX5080 8-port SATA I PCI-X Controller"; @@ -9635,6 +11435,7 @@ static const char pci_device_11ab_6041[] = "MV88SX6041 4-port SATA II PCI-X Controller"; static const char pci_device_11ab_6081[] = "MV88SX6081 8-port SATA II PCI-X Controller"; static const char pci_device_11ab_6460[] = "MV64360/64361/64362 System Controller"; +static const char pci_device_11ab_6480[] = "MV64460/64461/64462 System Controller"; static const char pci_device_11ab_f003[] = "GT-64010 Primary Image Piranha Image Generator"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -9668,7 +11469,8 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_11af[] = "Avid Technology Inc."; -static const char pci_device_11af_0001[] = "[Cinema]"; +static const char pci_device_11af_0001[] = "Cinema"; +static const char pci_device_11af_ee40[] = "Digidesign Audiomedia III"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_11b0[] = "V3 Semiconductor Inc."; @@ -9718,6 +11520,8 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_11bd[] = "Pinnacle Systems Inc."; +static const char pci_device_11bd_002e[] = "PCTV 40i"; +static const char pci_device_11bd_bede[] = "Pinnacle AV/DV Studio Capture Card"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_11be[] = "International Microcircuits Inc"; @@ -9729,7 +11533,7 @@ static const char pci_vendor_11c0[] = "Hewlett Packard"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_11c1[] = "Agere Systems (former Lucent Microelectronics)"; +static const char pci_vendor_11c1[] = "Agere Systems"; static const char pci_device_11c1_0440[] = "56k WinModem"; #endif #ifdef INIT_SUBSYS_INFO @@ -9976,10 +11780,18 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11c1_0450_144f_4005[] = "Magnia SG20"; #endif -static const char pci_device_11c1_0451[] = "LT WinModem"; -static const char pci_device_11c1_0452[] = "LT WinModem"; -static const char pci_device_11c1_0453[] = "LT WinModem"; -static const char pci_device_11c1_0454[] = "LT WinModem"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_11c1_0450_1468_0450[] = "Evo N600c"; +#endif +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_11c1_0450_4005_144f[] = "LifeBook C Series"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_11c1_0451[] = "LT WinModem"; +static const char pci_device_11c1_0452[] = "LT WinModem"; +static const char pci_device_11c1_0453[] = "LT WinModem"; +static const char pci_device_11c1_0454[] = "LT WinModem"; static const char pci_device_11c1_0455[] = "LT WinModem"; static const char pci_device_11c1_0456[] = "LT WinModem"; static const char pci_device_11c1_0457[] = "LT WinModem"; @@ -10004,6 +11816,10 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11c1_5811_dead_0800[] = "FireWire Host Bus Adapter"; #endif +static const char pci_device_11c1_8110[] = "T8110 H.100/H.110 TDM switch"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_11c1_8110_12d9_000c[] = "E1/T1 PMXc cPCI carrier card"; +#endif static const char pci_device_11c1_ab10[] = "WL60010 Wireless LAN MAC"; static const char pci_device_11c1_ab11[] = "WL60040 Multimode Wireles LAN MAC"; #ifdef INIT_SUBSYS_INFO @@ -10024,6 +11840,7 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11c1_ab30_14cd_2012[] = "Hermes2 Mini-PCI WaveLAN a/b/g"; #endif +static const char pci_device_11c1_ed00[] = "ET-131x PCI-E Ethernet Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_11c2[] = "Sand Microelectronics"; @@ -10099,6 +11916,7 @@ static const char pci_device_11d4_1535[] = "Blackfin BF535 processor"; static const char pci_device_11d4_1805[] = "SM56 PCI modem"; static const char pci_device_11d4_1889[] = "AD1889 sound chip"; +static const char pci_device_11d4_5340[] = "AD1881 sound chip"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_11d5[] = "Ikon Corporation"; @@ -10143,12 +11961,21 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_11de_6057_12f8_8a02[] = "Tekram Video Kit"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_11de_6057_13ca_4231[] = "JPEG/TV Card"; #endif static const char pci_device_11de_6120[] = "ZR36120"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_11de_6120_1328_f001[] = "Cinemaster C DVD Decoder"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_11de_6120_13c2_0000[] = "MediaFocus Satellite TV Card"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_11de_6120_1de1_9fff[] = "Video Kit C210"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_11df[] = "New Wave PDG"; @@ -10164,6 +11991,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_11e3[] = "Quicklogic Corporation"; +static const char pci_device_11e3_0001[] = "COM-ON-AIR Dosch&Amand DECT"; static const char pci_device_11e3_5030[] = "PC Watchdog"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -10288,6 +12116,7 @@ static const char pci_device_11fe_0805[] = "RocketPort UPCI 8 port w/octa cable"; static const char pci_device_11fe_080c[] = "RocketModem III 8 port"; static const char pci_device_11fe_080d[] = "RocketModem III 4 port"; +static const char pci_device_11fe_0812[] = "RocketPort UPCI Plus 8 port RS422"; static const char pci_device_11fe_0903[] = "RocketPort Compact PCI 16 port w/external I/F"; static const char pci_device_11fe_8015[] = "RocketPort 4-port UART 16954"; #endif @@ -10395,41 +12224,53 @@ static const char pci_vendor_1217[] = "O2 Micro, Inc."; static const char pci_device_1217_6729[] = "OZ6729"; static const char pci_device_1217_673a[] = "OZ6730"; -static const char pci_device_1217_6832[] = "OZ6832/6833 Cardbus Controller"; -static const char pci_device_1217_6836[] = "OZ6836/6860 Cardbus Controller"; -static const char pci_device_1217_6872[] = "OZ6812 Cardbus Controller"; -static const char pci_device_1217_6925[] = "OZ6922 Cardbus Controller"; -static const char pci_device_1217_6933[] = "OZ6933 Cardbus Controller"; +static const char pci_device_1217_6832[] = "OZ6832/6833 CardBus Controller"; +static const char pci_device_1217_6836[] = "OZ6836/6860 CardBus Controller"; +static const char pci_device_1217_6872[] = "OZ6812 CardBus Controller"; +static const char pci_device_1217_6925[] = "OZ6922 CardBus Controller"; +static const char pci_device_1217_6933[] = "OZ6933/711E1 CardBus/SmartCardBus Controller"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1217_6933_1025_1016[] = "Travelmate 612 TX"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_device_1217_6972[] = "OZ6912 Cardbus Controller"; +static const char pci_device_1217_6972[] = "OZ601/6912/711E0 CardBus/SmartCardBus Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1217_6972_1014_020c[] = "ThinkPad R30"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1217_6972_1179_0001[] = "Magnia Z310"; #endif -static const char pci_device_1217_7110[] = "OZ711Mx MultiMediaBay Accelerator"; +static const char pci_device_1217_7110[] = "OZ711Mx 4-in-1 MemoryCardBus Accelerator"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1217_7110_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1217_7110_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_1217_7110_103c_0890[] = "nc6000 laptop"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_device_1217_7112[] = "OZ711EC1/M1 SmartCardBus MultiMediaBay Controller"; +static const char pci_device_1217_7112[] = "OZ711EC1/M1 SmartCardBus/MemoryCardBus Controller"; static const char pci_device_1217_7113[] = "OZ711EC1 SmartCardBus Controller"; -static const char pci_device_1217_7114[] = "OZ711M1 SmartCardBus MultiMediaBay Controller"; +static const char pci_device_1217_7114[] = "OZ711M1/MC1 4-in-1 MemoryCardBus Controller"; +static const char pci_device_1217_7134[] = "OZ711MP1/MS1 MemoryCardBus Controller"; static const char pci_device_1217_71e2[] = "OZ711E2 SmartCardBus Controller"; -static const char pci_device_1217_7212[] = "OZ711M2 SmartCardBus MultiMediaBay Controller"; +static const char pci_device_1217_7212[] = "OZ711M2 4-in-1 MemoryCardBus Controller"; static const char pci_device_1217_7213[] = "OZ6933E CardBus Controller"; -static const char pci_device_1217_7223[] = "OZ711M3 SmartCardBus MultiMediaBay Controller"; +static const char pci_device_1217_7223[] = "OZ711M3/MC3 4-in-1 MemoryCardBus Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1217_7223_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1217_7223_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_1217_7223_103c_0890[] = "nc6000 laptop"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_1217_7233[] = "OZ711MP3/MS3 4-in-1 MemoryCardBus Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1218[] = "Hybricon Corp."; @@ -10534,6 +12375,9 @@ static const char pci_subsys_121a_0005_121a_0052[] = "Voodoo3 AGP"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_121a_0005_121a_0057[] = "Voodoo3 3000 PCI"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_121a_0005_121a_0060[] = "Voodoo3 3500 TV (NTSC)"; #endif #ifdef INIT_SUBSYS_INFO @@ -10597,6 +12441,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1227[] = "Tech-Source"; static const char pci_device_1227_0006[] = "Raptor GFX 8P"; +static const char pci_device_1227_0023[] = "Raptor GFX [1100T]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1228[] = "Norsk Elektro Optikk A/S"; @@ -10692,6 +12537,12 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_123f_8120_11bd_000a[] = "DV500 E4"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_123f_8120_11bd_000f[] = "DV500 E4"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_123f_8120_1809_0016[] = "Emuzed MAUI-III PCI PVR FM TV"; +#endif static const char pci_device_123f_8888[] = "Cinemaster C 3.0 DVD Decoder"; #endif #ifdef INIT_SUBSYS_INFO @@ -10782,7 +12633,7 @@ static const char pci_vendor_124e[] = "Cylink"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_124f[] = "Infotrend Technology, Inc."; +static const char pci_vendor_124f[] = "Infortrend Technology, Inc."; static const char pci_device_124f_0041[] = "IFT-2000 Series RAID Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -10829,6 +12680,9 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_125b[] = "Asix Electronics Corporation"; static const char pci_device_125b_1400[] = "ALFA GFC2204 Fast Ethernet"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_125b_1400_1186_1100[] = "AX8814X Based PCI Fast Ethernet Adapter"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_125c[] = "Aurora Technologies, Inc."; @@ -10857,6 +12711,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_125d_1969_125d_8888[] = "Solo-1 Audio Adapter"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_125d_1969_153b_111b[] = "Terratec 128i PCI"; +#endif static const char pci_device_125d_1978[] = "ES1978 Maestro 2E"; #endif #ifdef INIT_SUBSYS_INFO @@ -10884,6 +12741,11 @@ static const char pci_device_125d_1988[] = "ES1988 Allegro-1"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_125d_1988_0e11_0098[] = "Evo N600c"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_125d_1988_1092_4100[] = "Sonic Impact S100"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -10977,9 +12839,9 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_1260_3886[] = "ISL3886 [Prism Javelin/Prism Xbow]"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1260_3886_17cf_0037[] = "Z-Com XG-901 and clones Wireless Adapter"; +static const char pci_subsys_1260_3886_17cf_0037[] = "XG-901 and clones Wireless Adapter"; #endif -static const char pci_device_1260_3890[] = "Intersil ISL3890 [Prism GT/Prism Duette]"; +static const char pci_device_1260_3890[] = "ISL3890 [Prism GT/Prism Duette]/ISL3886 [Prism Javelin/Prism Xbow]"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1260_3890_10b8_2802[] = "SMC2802W Wireless PCI Adapter"; #endif @@ -10990,7 +12852,13 @@ static const char pci_subsys_1260_3890_10b8_a835[] = "SMC2835W V2 Wireless Cardbus Adapter"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1260_3890_1113_ee03[] = "SMC2802W V2 Wireless PCI Adapter"; +static const char pci_subsys_1260_3890_1113_4203[] = "WN4201B"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1260_3890_1113_ee03[] = "SMC2802W V2 Wireless PCI Adapter [ISL3886]"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1260_3890_1113_ee08[] = "SMC2835W V3 EU Wireless Cardbus Adapter"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1260_3890_1186_3202[] = "DWL-G650 A1 Wireless Adapter"; @@ -11005,13 +12873,17 @@ static const char pci_subsys_1260_3890_16a5_1605[] = "ALLNET ALL0271 Wireless PCI Adapter"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1260_3890_17cf_0014[] = "Z-Com XG-600 and clones Wireless Adapter"; +static const char pci_subsys_1260_3890_17cf_0014[] = "XG-600 and clones Wireless Adapter"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_1260_3890_17cf_0020[] = "Z-Com XG-900 and clones Wireless Adapter"; +static const char pci_subsys_1260_3890_17cf_0020[] = "XG-900 and clones Wireless Adapter"; #endif static const char pci_device_1260_8130[] = "HMP8130 NTSC/PAL Video Decoder"; static const char pci_device_1260_8131[] = "HMP8131 NTSC/PAL Video Decoder"; +static const char pci_device_1260_ffff[] = "ISL3886IK"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1260_ffff_1260_0000[] = "Senao 3054MP+ (J) mini-PCI WLAN 802.11g adapter"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1261[] = "Matsushita-Kotobuki Electronics Industries, Ltd."; @@ -11065,7 +12937,8 @@ static const char pci_vendor_126e[] = "Sumitomo Metal Industries, Ltd."; #endif static const char pci_vendor_126f[] = "Silicon Motion, Inc."; -static const char pci_device_126f_0501[] = "SM501 VoyagerGX"; +static const char pci_device_126f_0501[] = "SM501 VoyagerGX Rev. AA"; +static const char pci_device_126f_0510[] = "SM501 VoyagerGX Rev. B"; static const char pci_device_126f_0710[] = "SM710 LynxEM"; static const char pci_device_126f_0712[] = "SM712 LynxEM+"; static const char pci_device_126f_0720[] = "SM720 Lynx3DM"; @@ -11109,6 +12982,9 @@ static const char pci_subsys_1274_1371_1274_1371[] = "Creative Sound Blaster AudioPCI64V, AudioPCI128"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1274_1371_1274_8001[] = "CT4751 board"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1274_1371_1462_6470[] = "ES1371, ES1373 AudioPCI On Motherboard MS-6147 1.1A"; #endif #ifdef INIT_SUBSYS_INFO @@ -11226,6 +13102,9 @@ static const char pci_subsys_1274_1371_8086_4343[] = "ES1371, ES1373 AudioPCI On Motherboard Cape Cod"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1274_1371_8086_4541[] = "D815EEA Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1274_1371_8086_4649[] = "ES1371, ES1373 AudioPCI On Motherboard Fire Island"; #endif #ifdef INIT_SUBSYS_INFO @@ -11294,6 +13173,8 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1279[] = "Transmeta Corporation"; +static const char pci_device_1279_0060[] = "TM8000 Northbridge"; +static const char pci_device_1279_0061[] = "TM8000 AGP bridge"; static const char pci_device_1279_0295[] = "Northbridge"; static const char pci_device_1279_0395[] = "LongRun Northbridge"; static const char pci_device_1279_0396[] = "SDRAM controller"; @@ -11381,6 +13262,11 @@ static const char pci_device_127a_1005[] = "HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_127a_1005_1005_127a[] = "AOpen FM56-P"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_127a_1005_1033_8029[] = "229-DFSV"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -11648,6 +13534,10 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1283[] = "Integrated Technology Express, Inc."; static const char pci_device_1283_673a[] = "IT8330G"; +static const char pci_device_1283_8211[] = "ITE 8211F Single Channel UDMA 133 (ASUS 8211 (ITE IT8212 ATA RAID Controller))"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1283_8211_1043_8138[] = "P5GD1-VW Mainboard"; +#endif static const char pci_device_1283_8212[] = "IT/ITE8212 Dual channel ATA RAID controller (PCI version seems to be IT8212, embedded seems to be ITE8212)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1283_8212_1283_0001[] = "IT/ITE8212 Dual channel ATA RAID controller"; @@ -11847,7 +13737,7 @@ static const char pci_vendor_12b8[] = "Korg"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_12b9[] = "3Com Corp, Modem Division (formerly US Robotics)"; +static const char pci_vendor_12b9[] = "3Com Corp, Modem Division"; static const char pci_device_12b9_1006[] = "WinModem"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_12b9_1006_12b9_005c[] = "USR 56k Internal Voice WinModem (Model 3472)"; @@ -11936,6 +13826,34 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12c4[] = "Connect Tech Inc"; +static const char pci_device_12c4_0001[] = "Blue HEAT/PCI 8 (RS232/CL/RJ11)"; +static const char pci_device_12c4_0002[] = "Blue HEAT/PCI 4 (RS232)"; +static const char pci_device_12c4_0003[] = "Blue HEAT/PCI 2 (RS232)"; +static const char pci_device_12c4_0004[] = "Blue HEAT/PCI 8 (UNIV, RS485)"; +static const char pci_device_12c4_0005[] = "Blue HEAT/PCI 4+4/6+2 (UNIV, RS232/485)"; +static const char pci_device_12c4_0006[] = "Blue HEAT/PCI 4 (OPTO, RS485)"; +static const char pci_device_12c4_0007[] = "Blue HEAT/PCI 2+2 (RS232/485)"; +static const char pci_device_12c4_0008[] = "Blue HEAT/PCI 2 (OPTO, Tx, RS485)"; +static const char pci_device_12c4_0009[] = "Blue HEAT/PCI 2+6 (RS232/485)"; +static const char pci_device_12c4_000a[] = "Blue HEAT/PCI 8 (Tx, RS485)"; +static const char pci_device_12c4_000b[] = "Blue HEAT/PCI 4 (Tx, RS485)"; +static const char pci_device_12c4_000c[] = "Blue HEAT/PCI 2 (20 MHz, RS485)"; +static const char pci_device_12c4_000d[] = "Blue HEAT/PCI 2 PTM"; +static const char pci_device_12c4_0100[] = "NT960/PCI"; +static const char pci_device_12c4_0201[] = "cPCI Titan - 2 Port"; +static const char pci_device_12c4_0202[] = "cPCI Titan - 4 Port"; +static const char pci_device_12c4_0300[] = "CTI PCI UART 2 (RS232)"; +static const char pci_device_12c4_0301[] = "CTI PCI UART 4 (RS232)"; +static const char pci_device_12c4_0302[] = "CTI PCI UART 8 (RS232)"; +static const char pci_device_12c4_0310[] = "CTI PCI UART 1+1 (RS232/485)"; +static const char pci_device_12c4_0311[] = "CTI PCI UART 2+2 (RS232/485)"; +static const char pci_device_12c4_0312[] = "CTI PCI UART 4+4 (RS232/485)"; +static const char pci_device_12c4_0320[] = "CTI PCI UART 2"; +static const char pci_device_12c4_0321[] = "CTI PCI UART 4"; +static const char pci_device_12c4_0322[] = "CTI PCI UART 8"; +static const char pci_device_12c4_0330[] = "CTI PCI UART 2 (RS485)"; +static const char pci_device_12c4_0331[] = "CTI PCI UART 4 (RS485)"; +static const char pci_device_12c4_0332[] = "CTI PCI UART 8 (RS485)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12c5[] = "Picture Elements Incorporated"; @@ -12054,6 +13972,8 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12d5[] = "Equator Technologies Inc"; +static const char pci_device_12d5_0003[] = "BSP16"; +static const char pci_device_12d5_1000[] = "BSP15"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12d6[] = "Analogic Corp"; @@ -12063,6 +13983,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12d8[] = "Pericom Semiconductor"; +static const char pci_device_12d8_8150[] = "PCI to PCI Bridge"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12d9[] = "Aculab PLC"; @@ -12199,9 +14120,6 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_12eb_0002_12eb_0001[] = "AU8830 Vortex 3D Digital Audio Processor"; -#endif -#ifdef INIT_SUBSYS_INFO static const char pci_subsys_12eb_0002_12eb_0002[] = "AU8830 Vortex 3D Digital Audio Processor"; #endif #ifdef INIT_SUBSYS_INFO @@ -12295,6 +14213,20 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12fb[] = "Spectrum Signal Processing"; +static const char pci_device_12fb_0001[] = "PMC-MAI"; +static const char pci_device_12fb_00f5[] = "F5 Dakar"; +static const char pci_device_12fb_02ad[] = "PMC-2MAI"; +static const char pci_device_12fb_2adc[] = "ePMC-2ADC"; +static const char pci_device_12fb_3100[] = "PRO-3100"; +static const char pci_device_12fb_3500[] = "PRO-3500"; +static const char pci_device_12fb_4d4f[] = "Modena"; +static const char pci_device_12fb_8120[] = "ePMC-8120"; +static const char pci_device_12fb_da62[] = "Daytona C6201 PCI (Hurricane)"; +static const char pci_device_12fb_db62[] = "Ingliston XBIF"; +static const char pci_device_12fb_dc62[] = "Ingliston PLX9054"; +static const char pci_device_12fb_dd62[] = "Ingliston JTAG/ISP"; +static const char pci_device_12fb_eddc[] = "ePMC-MSDDC"; +static const char pci_device_12fb_fa01[] = "ePMC-FPGA"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_12fc[] = "Capital Equipment Corp"; @@ -12365,6 +14297,7 @@ static const char pci_device_1307_004c[] = "PCI-DAS1000"; static const char pci_device_1307_004d[] = "PCI-QUAD04"; static const char pci_device_1307_0052[] = "PCI-DAS4020/12"; +static const char pci_device_1307_0054[] = "PCI-DIO96"; static const char pci_device_1307_005e[] = "PCI-DAS6025"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -12416,6 +14349,7 @@ static const char pci_device_1317_0985[] = "NC100 Network Everywhere Fast Ethernet 10/100"; static const char pci_device_1317_1985[] = "21x4x DEC-Tulip compatible 10/100 Ethernet"; static const char pci_device_1317_2850[] = "HSP MicroModem 56"; +static const char pci_device_1317_5120[] = "ADMtek ADM5120 OpenGate System-on-Chip"; static const char pci_device_1317_8201[] = "ADMtek ADM8211 802.11b Wireless Interface"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1317_8201_10b8_2635[] = "SMC2635W 802.11b (11Mbps) wireless lan pcmcia (cardbus) card"; @@ -12433,7 +14367,13 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1319[] = "Fortemedia, Inc"; static const char pci_device_1319_0801[] = "Xwave QS3000A [FM801]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1319_0801_1319_1319[] = "FM801 PCI Audio"; +#endif static const char pci_device_1319_0802[] = "Xwave QS3000A [FM801 game port]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1319_0802_1319_1319[] = "FM801 PCI Joystick"; +#endif static const char pci_device_1319_1000[] = "FM801 PCI Audio"; static const char pci_device_1319_1001[] = "FM801 PCI Joystick"; #endif @@ -12550,6 +14490,7 @@ static const char pci_vendor_1332[] = "Micro Memory"; static const char pci_device_1332_5415[] = "MM-5415CN PCI Memory Module with Battery Backup"; static const char pci_device_1332_5425[] = "MM-5425CN PCI 64/66 Memory Module with Battery Backup"; +static const char pci_device_1332_6140[] = "MM-6140D"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1334[] = "Redcreek Communications, Inc"; @@ -12713,7 +14654,8 @@ static const char pci_device_1360_0201[] = "GPS167PCI GPS Receiver"; static const char pci_device_1360_0202[] = "GPS168PCI GPS Receiver"; static const char pci_device_1360_0203[] = "GPS169PCI GPS Receiver"; -static const char pci_device_1360_0301[] = "TCR510PCI IRIG Receiver"; +static const char pci_device_1360_0301[] = "TCR510PCI IRIG Timecode Reader"; +static const char pci_device_1360_0302[] = "TCR167PCI IRIG Timecode Reader"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1361[] = "Soliton Systems K.K."; @@ -12772,7 +14714,28 @@ static const char pci_vendor_1373[] = "Silicon Vision Inc"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1374[] = "Silicom Ltd"; +static const char pci_vendor_1374[] = "Silicom Ltd."; +static const char pci_device_1374_0024[] = "Silicom Dual port Giga Ethernet BGE Bypass Server Adapter"; +static const char pci_device_1374_0025[] = "Silicom Quad port Giga Ethernet BGE Bypass Server Adapter"; +static const char pci_device_1374_0026[] = "Silicom Dual port Fiber Giga Ethernet 546 Bypass Server Adapter"; +static const char pci_device_1374_0027[] = "Silicom Dual port Fiber LX Giga Ethernet 546 Bypass Server Adapter"; +static const char pci_device_1374_0029[] = "Silicom Dual port Copper Giga Ethernet 546GB Bypass Server Adapter"; +static const char pci_device_1374_002a[] = "Silicom Dual port Fiber Giga Ethernet 546 TAP/Bypass Server Adapter"; +static const char pci_device_1374_002b[] = "Silicom Dual port Copper Fast Ethernet 546 TAP/Bypass Server Adapter"; +static const char pci_device_1374_002c[] = "Silicom Quad port Copper Giga Ethernet 546GB Bypass Server Adapter"; +static const char pci_device_1374_002d[] = "Silicom Quad port Fiber-SX Giga Ethernet 546GB Bypass Server Adapter"; +static const char pci_device_1374_002e[] = "Silicom Quad port Fiber-LX Giga Ethernet 546GB Bypass Server Adapter"; +static const char pci_device_1374_002f[] = "Silicom Dual port Fiber-SX Giga Ethernet 546GB Low profile Bypass Server Adapter"; +static const char pci_device_1374_0030[] = "Silicom Dual port Fiber-LX Giga Ethernet 546GB Low profile Bypass Server Adapter"; +static const char pci_device_1374_0031[] = "Silicom Quad port Copper Giga Ethernet PCI-E Bypass Server Adapter"; +static const char pci_device_1374_0032[] = "Silicom Dual port Copper Fast Ethernet 546 TAP/Bypass Server Adapter"; +static const char pci_device_1374_0034[] = "Silicom Dual port Copper Giga Ethernet PCI-E BGE Bypass Server Adapter"; +static const char pci_device_1374_0035[] = "Silicom Quad port Copper Giga Ethernet PCI-E BGE Bypass Server Adapter"; +static const char pci_device_1374_0036[] = "Silicom Dual port Fiber Giga Ethernet PCI-E BGE Bypass Server Adapter"; +static const char pci_device_1374_0037[] = "Silicom Quad port Copper Ethernet PCI-E Intel based Bypass Server Adapter"; +static const char pci_device_1374_0038[] = "Silicom Quad port Copper Ethernet PCI-E Intel based Bypass Server Adapter"; +static const char pci_device_1374_0039[] = "Silicom Dual port Fiber-SX Ethernet PCI-E Intel based Bypass Server Adapter"; +static const char pci_device_1374_003a[] = "Silicom Dual port Fiber-LX Ethernet PCI-E Intel based Bypass Server Adapter"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1375[] = "Argosystems Inc"; @@ -12817,7 +14780,15 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1382[] = "Marian - Electronic & Software"; static const char pci_device_1382_0001[] = "ARC88 audio recording card"; -static const char pci_device_1382_2088[] = "Marc-8 MIDI 8 channel audio card"; +static const char pci_device_1382_2008[] = "Prodif 96 Pro sound system"; +static const char pci_device_1382_2088[] = "Marc 8 Midi sound system"; +static const char pci_device_1382_20c8[] = "Marc A sound system"; +static const char pci_device_1382_4008[] = "Marc 2 sound system"; +static const char pci_device_1382_4010[] = "Marc 2 Pro sound system"; +static const char pci_device_1382_4048[] = "Marc 4 MIDI sound system"; +static const char pci_device_1382_4088[] = "Marc 4 Digi sound system"; +static const char pci_device_1382_4248[] = "Marc X sound system"; +static const char pci_device_1382_4424[] = "TRACE D4 Sound System"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1383[] = "Controlnet Inc"; @@ -12827,18 +14798,28 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1385[] = "Netgear"; -static const char pci_device_1385_0013[] = "WG311T"; +static const char pci_device_1385_0013[] = "WG311T 108 Mbps Wireless PCI Adapter"; +static const char pci_device_1385_311a[] = "GA511 Gigabit Ethernet"; static const char pci_device_1385_4100[] = "802.11b Wireless Adapter (MA301)"; static const char pci_device_1385_4105[] = "MA311 802.11b wireless adapter"; static const char pci_device_1385_4400[] = "WAG511 802.11a/b/g Dual Band Wireless PC Card"; static const char pci_device_1385_4600[] = "WAG511 802.11a/b/g Dual Band Wireless PC Card"; static const char pci_device_1385_4601[] = "WAG511 802.11a/b/g Dual Band Wireless PC Card"; static const char pci_device_1385_4610[] = "WAG511 802.11a/b/g Dual Band Wireless PC Card"; +static const char pci_device_1385_4800[] = "WG511(v1) 54 Mbps Wireless PC Card"; +static const char pci_device_1385_4900[] = "WG311v1 54 Mbps Wireless PCI Adapter"; static const char pci_device_1385_4a00[] = "WAG311 802.11a/g Wireless PCI Adapter"; +static const char pci_device_1385_4b00[] = "WG511T 108 Mbps Wireless PC Card"; static const char pci_device_1385_4c00[] = "WG311v2 54 Mbps Wireless PCI Adapter"; +static const char pci_device_1385_4d00[] = "WG311T 108 Mbps Wireless PCI Adapter"; +static const char pci_device_1385_4e00[] = "WG511v2 54 Mbps Wireless PC Card"; +static const char pci_device_1385_4f00[] = "WG511U Double 108 Mbps Wireless PC Card"; +static const char pci_device_1385_5200[] = "GA511 Gigabit PC Card"; static const char pci_device_1385_620a[] = "GA620 Gigabit Ethernet"; static const char pci_device_1385_622a[] = "GA622"; static const char pci_device_1385_630a[] = "GA630 Gigabit Ethernet"; +static const char pci_device_1385_6b00[] = "WG311v3 54 Mbps Wireless PCI Adapter"; +static const char pci_device_1385_6d00[] = "WPNT511 RangeMax™ 240 Mbps Wireless PC Card"; static const char pci_device_1385_f004[] = "FA310TX"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -12905,8 +14886,16 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1397[] = "Cologne Chip Designs GmbH"; +static const char pci_device_1397_08b4[] = "ISDN network Controller [HFC-4S]"; +static const char pci_device_1397_16b8[] = "ISDN network Controller [HFC-8S]"; static const char pci_device_1397_2bd0[] = "ISDN network controller [HFC-PCI]"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1397_2bd0_0675_1704[] = "ISDN Adapter (PCI Bus, D, C)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1397_2bd0_0675_1708[] = "ISDN Adapter (PCI Bus, D, C, ACPI)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1397_2bd0_1397_2bd0[] = "ISDN Board"; #endif #ifdef INIT_SUBSYS_INFO @@ -12959,6 +14948,9 @@ static const char pci_device_13a3_0016[] = "8065 Security Processor"; static const char pci_device_13a3_0017[] = "8165 Security Processor"; static const char pci_device_13a3_0018[] = "8154 Security Processor"; +static const char pci_device_13a3_001d[] = "7956 Security Processor"; +static const char pci_device_13a3_0020[] = "7955 Security Processor"; +static const char pci_device_13a3_0026[] = "8155 Security Processor"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_13a4[] = "Rascom Inc"; @@ -12974,6 +14966,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_13a8[] = "Exar Corp."; +static const char pci_device_13a8_0152[] = "XR17C/D152 Dual PCI UART"; static const char pci_device_13a8_0154[] = "XR17C154 Quad UART"; static const char pci_device_13a8_0158[] = "XR17C158 Octal UART"; #endif @@ -13055,12 +15048,13 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_13c1[] = "3ware Inc"; -static const char pci_device_13c1_1000[] = "3ware Inc 3ware 5xxx/6xxx-series PATA-RAID"; -static const char pci_device_13c1_1001[] = "3ware Inc 3ware 7xxx/8xxx-series PATA/SATA-RAID"; +static const char pci_device_13c1_1000[] = "5xxx/6xxx-series PATA-RAID"; +static const char pci_device_13c1_1001[] = "7xxx/8xxx-series PATA/SATA-RAID"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_13c1_1001_13c1_1001[] = "3ware Inc 3ware 7xxx/8xxx-series PATA/SATA-RAID"; +static const char pci_subsys_13c1_1001_13c1_1001[] = "7xxx/8xxx-series PATA/SATA-RAID"; #endif -static const char pci_device_13c1_1002[] = "3ware Inc 3ware 9xxx-series SATA-RAID"; +static const char pci_device_13c1_1002[] = "9xxx-series SATA-RAID"; +static const char pci_device_13c1_1003[] = "9550SX SATA-RAID"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_13c2[] = "Technotrend Systemtechnik GmbH"; @@ -13214,8 +15208,10 @@ static const char pci_vendor_13ef[] = "Coppercom Inc"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_13f0[] = "Sundance Technology Inc"; +static const char pci_vendor_13f0[] = "Sundance Technology Inc / IC Plus Corp"; +static const char pci_device_13f0_0200[] = "IC Plus IP100A Integrated 10/100 Ethernet MAC + PHY"; static const char pci_device_13f0_0201[] = "ST201 Sundance Ethernet"; +static const char pci_device_13f0_1023[] = "IC Plus IP1000 Family Gigabit Ethernet"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_13f1[] = "Oce' - Technologies B.V."; @@ -13288,8 +15284,9 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_13fe[] = "Advantech Co. Ltd"; -static const char pci_device_13fe_1240[] = "PCI-1240 4-channel stepper motor controller card w. Nova Electronics MCX314"; -static const char pci_device_13fe_1600[] = "PCI-1612 4-port RS-232/422/485 PCI Communication Card"; +static const char pci_device_13fe_1240[] = "PCI-1240 4-channel stepper motor controller card"; +static const char pci_device_13fe_1600[] = "PCI-1612 4-port RS-232/422/485 PCI communication card"; +static const char pci_device_13fe_1733[] = "PCI-1733 32-channel isolated digital input card"; static const char pci_device_13fe_1752[] = "PCI-1752"; static const char pci_device_13fe_1754[] = "PCI-1754"; static const char pci_device_13fe_1756[] = "PCI-1756"; @@ -13324,6 +15321,8 @@ static const char pci_device_1407_0100[] = "Lava Dual Serial"; static const char pci_device_1407_0101[] = "Lava Quatro A"; static const char pci_device_1407_0102[] = "Lava Quatro B"; +static const char pci_device_1407_0110[] = "Lava DSerial-PCI Port A"; +static const char pci_device_1407_0111[] = "Lava DSerial-PCI Port B"; static const char pci_device_1407_0120[] = "Quattro-PCI A"; static const char pci_device_1407_0121[] = "Quattro-PCI B"; static const char pci_device_1407_0180[] = "Lava Octo A"; @@ -13376,9 +15375,90 @@ static const char pci_vendor_1412[] = "VIA Technologies Inc."; static const char pci_device_1412_1712[] = "ICE1712 [Envy24] PCI Multi-Channel I/O Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_1412_1712[] = "Hoontech ST Audio DSP 24"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_1412_d630[] = "M-Audio Delta 1010"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_1412_d631[] = "M-Audio Delta DiO"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_1412_d632[] = "M-Audio Delta 66"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_1412_d633[] = "M-Audio Delta 44"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_1412_d634[] = "M-Audio Delta Audiophile"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_1412_d635[] = "M-Audio Delta TDIF"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_1412_d637[] = "M-Audio Delta RBUS"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1412_1712_1412_d638[] = "M-Audio Delta 410"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_1412_d63b[] = "M-Audio Delta 1010LT"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_1412_d63c[] = "Digigram VX442"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_1416_1712[] = "Hoontech ST Audio DSP 24 Media 7.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_153b_1115[] = "EWS88 MT"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_153b_1125[] = "EWS88 MT (Master)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_153b_112b[] = "EWS88 D"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_153b_112c[] = "EWS88 D (Master)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_153b_1130[] = "EWX 24/96"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_153b_1138[] = "DMX 6fire 24/96"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_153b_1151[] = "PHASE88"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1712_16ce_1040[] = "Edirol DA-2496"; +#endif static const char pci_device_1412_1724[] = "VT1720/24 [Envy24PT/HT] PCI Multi-Channel Audio Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1724_1412_1724[] = "Albatron PX865PE 7.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1724_1412_3630[] = "M-Audio Revolution 7.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1724_1412_3631[] = "M-Audio Revolution 5.1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1724_153b_1145[] = "Aureon 7.1 Space"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1724_153b_1147[] = "Aureon 5.1 Sky"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1724_153b_1153[] = "Aureon 7.1 Universe"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1724_270f_f641[] = "ZNF3-150"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1412_1724_270f_f645[] = "ZNF3-250"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1413[] = "Addonics"; @@ -13394,6 +15474,9 @@ static const char pci_subsys_1415_9501_131f_2050[] = "CyberPro (4-port)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1415_9501_131f_2051[] = "CyberSerial 4S Plus"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_1415_9501_15ed_2000[] = "MCCR Serial p0-3 of 8"; #endif #ifdef INIT_SUBSYS_INFO @@ -13401,6 +15484,7 @@ #endif static const char pci_device_1415_950a[] = "EXSYS EX-41092 Dual 16950 Serial adapter"; static const char pci_device_1415_950b[] = "OXCB950 Cardbus 16950 UART"; +static const char pci_device_1415_9510[] = "OX16PCI954 (Quad 16950 UART) function 1 (Disabled)"; static const char pci_device_1415_9511[] = "OX16PCI954 (Quad 16950 UART) function 1"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1415_9511_15ed_2000[] = "MCCR Serial p4-7 of 8"; @@ -13409,6 +15493,7 @@ static const char pci_subsys_1415_9511_15ed_2001[] = "MCCR Serial p4-15 of 16"; #endif static const char pci_device_1415_9521[] = "OX16PCI952 (Dual 16950 UART)"; +static const char pci_device_1415_9523[] = "OX16PCI952 Integrated Parallel Port"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1416[] = "Multiwave Innovation pte Ltd"; @@ -13456,6 +15541,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1425[] = "Chelsio Communications Inc"; +static const char pci_device_1425_000b[] = "T210 Protocol Engine"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1426[] = "Storage Technology Corp."; @@ -13484,6 +15570,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_142e[] = "Vitec Multimedia"; static const char pci_device_142e_4020[] = "VM2-2 [Video Maker 2] MPEG1/2 Encoder"; +static const char pci_device_142e_4337[] = "VM2-2-C7 [Video Maker 2 rev. C7] MPEG1/2 Encoder"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_142f[] = "Radicom Research Inc"; @@ -13502,7 +15589,7 @@ static const char pci_vendor_1433[] = "Eltec Elektronik GmbH"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1435[] = "Real Time Devices US Inc."; +static const char pci_vendor_1435[] = "RTD Embedded Technologies, Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1436[] = "CIS Technology Inc"; @@ -13616,6 +15703,8 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1458[] = "Giga-byte Technology"; +static const char pci_device_1458_0c11[] = "K8NS Pro Mainboard"; +static const char pci_device_1458_e911[] = "GN-WIAG02"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1459[] = "DOOIN Electronics"; @@ -13644,13 +15733,19 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1461[] = "Avermedia Technologies Inc"; +static const char pci_device_1461_f436[] = "AVerTV Hybrid+FM"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1462[] = "Micro-Star International Co., Ltd."; +static const char pci_device_1462_5501[] = "nVidia NV15DDR [GeForce2 Ti]"; +static const char pci_device_1462_6819[] = "Broadcom Corporation BCM4306 802.11b/g Wireless LAN Controller [MSI CB54G]"; static const char pci_device_1462_6825[] = "PCI Card wireless 11g [PC54G]"; +static const char pci_device_1462_6834[] = "RaLink RT2500 802.11g [PC54G2]"; static const char pci_device_1462_8725[] = "NVIDIA NV25 [GeForce4 Ti 4600] VGA Adapter"; static const char pci_device_1462_9000[] = "NVIDIA NV28 [GeForce4 Ti 4800] VGA Adapter"; +static const char pci_device_1462_9110[] = "GeFORCE FX5200"; static const char pci_device_1462_9119[] = "NVIDIA NV31 [GeForce FX 5600XT] VGA Adapter"; +static const char pci_device_1462_9591[] = "nVidia Corporation NV36 [GeForce FX 5700LE]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1463[] = "Fast Corporation"; @@ -13812,9 +15907,13 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1497[] = "SMA Regelsysteme GmBH"; +static const char pci_device_1497_1497[] = "SMA Technologie AG"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1498[] = "TEWS Datentechnik GmBH"; +static const char pci_device_1498_0330[] = "TPMC816 2 Channel CAN bus controller."; +static const char pci_device_1498_0385[] = "TPMC901 Extended CAN bus with 2/4/6 CAN controller"; +static const char pci_device_1498_21cd[] = "TCP461 CompactPCI 8 Channel Serial Interface RS232/RS422"; static const char pci_device_1498_30c8[] = "TPCI200"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -14057,6 +16156,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_14db[] = "AFAVLAB Technology Inc"; static const char pci_device_14db_2120[] = "TK9902"; +static const char pci_device_14db_2182[] = "AFAVLAB Technology Inc. 8-port serial card"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_14dc[] = "Amplicon Liveline Ltd"; @@ -14101,6 +16201,8 @@ static const char pci_device_14e4_080f[] = "Sentry5 DDR/SDR RAM Controller"; static const char pci_device_14e4_0811[] = "Sentry5 External Interface Core"; static const char pci_device_14e4_0816[] = "BCM3302 Sentry5 MIPS32 CPU"; +static const char pci_device_14e4_1600[] = "NetXtreme BCM5752 Gigabit Ethernet PCI Express"; +static const char pci_device_14e4_1601[] = "NetXtreme BCM5752M Gigabit Ethernet PCI Express"; static const char pci_device_14e4_1644[] = "NetXtreme BCM5700 Gigabit Ethernet"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_1644_1014_0277[] = "Broadcom Vigil B5700 1000Base-T"; @@ -14199,32 +16301,37 @@ #ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_14e4_1645_103c_128a[] = "HP 1000Base-T (PCI) [A7061A]"; +static const char pci_subsys_14e4_1645_103c_128a[] = "1000Base-T (PCI) [A7061A]"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1645_103c_128b[] = "1000Base-SX (PCI) [A7073A]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_14e4_1645_103c_128b[] = "HP 1000Base-SX (PCI) [A7073A]"; +static const char pci_subsys_14e4_1645_103c_12a4[] = "Core Lan 1000Base-T"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_14e4_1645_103c_12a4[] = "HP Core Lan 1000Base-T"; +static const char pci_subsys_14e4_1645_103c_12c1[] = "IOX Core Lan 1000Base-T [A7109AX]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_14e4_1645_103c_12c1[] = "HP IOX Core Lan 1000Base-T [A7109AX]"; +static const char pci_subsys_14e4_1645_103c_1300[] = "Core LAN/SCSI Combo [A6794A]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_14e4_1645_10a9_8010[] = "SGI IO9 Gigabit Ethernet (Copper)"; +static const char pci_subsys_14e4_1645_10a9_8010[] = "IO9/IO10 Gigabit Ethernet (Copper)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_14e4_1645_10a9_8011[] = "SGI Gigabit Ethernet (Copper)"; +static const char pci_subsys_14e4_1645_10a9_8011[] = "Gigabit Ethernet (Copper)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_14e4_1645_10a9_8012[] = "SGI Gigabit Ethernet (Fiber)"; +static const char pci_subsys_14e4_1645_10a9_8012[] = "Gigabit Ethernet (Fiber)"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_1645_10b7_1004[] = "3C996-SX 1000Base-SX"; @@ -14324,7 +16431,16 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_1648_1166_1648[] = "NetXtreme CIOB-E 1000Base-T"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1648_1734_100b[] = "Primergy RX300"; +#endif static const char pci_device_14e4_164a[] = "NetXtreme II BCM5706 Gigabit Ethernet"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_164a_103c_3101[] = "NC370T Multifunction Gigabit Server Adapter"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_14e4_164c[] = "NetXtreme II BCM5708 Gigabit Ethernet"; static const char pci_device_14e4_164d[] = "NetXtreme BCM5702FE Gigabit Ethernet"; static const char pci_device_14e4_1653[] = "NetXtreme BCM5705 Gigabit Ethernet"; #endif @@ -14343,14 +16459,58 @@ static const char pci_subsys_14e4_1654_103c_3100[] = "NC1020 HP ProLiant Gigabit Server Adapter 32 PCI"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1654_103c_3226[] = "NC150T 4-port Gigabit Combo Switch & Adapter"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_14e4_1659[] = "NetXtreme BCM5721 Gigabit Ethernet PCI Express"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1659_1014_02c6[] = "eServer xSeries server mainboard"; +#endif +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1659_103c_7031[] = "NC320T PCIe Gigabit Server Adapter"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1659_103c_7032[] = "NC320i PCIe Gigabit Server Adapter"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1659_1734_1061[] = "Primergy RX300 S2"; +#endif static const char pci_device_14e4_165d[] = "NetXtreme BCM5705M Gigabit Ethernet"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_165d_1028_865d[] = "Latitude D400"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_14e4_165e[] = "NetXtreme BCM5705M_2 Gigabit Ethernet"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_14e4_165e_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_14e4_165e_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_165e_103c_0890[] = "nc6000 laptop"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_165e_103c_099c[] = "nx6110/nc6120"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_14e4_1668[] = "NetXtreme BCM5714 Gigabit Ethernet"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1668_103c_7039[] = "NC324i PCIe Dual Port Gigabit Server Adapter"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_14e4_166a[] = "NetXtreme BCM5780 Gigabit Ethernet"; +static const char pci_device_14e4_166b[] = "NetXtreme BCM5780S Gigabit Ethernet"; static const char pci_device_14e4_166e[] = "570x 10/100 Integrated Controller"; static const char pci_device_14e4_1677[] = "NetXtreme BCM5751 Gigabit Ethernet PCI Express"; #endif @@ -14358,6 +16518,20 @@ static const char pci_subsys_14e4_1677_1028_0179[] = "Optiplex GX280"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1677_1028_0182[] = "Latitude D610"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1677_1028_01ad[] = "Optiplex GX620"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_1677_1734_105d[] = "Scenic W620"; +#endif +static const char pci_device_14e4_1678[] = "NetXtreme BCM5715 Gigabit Ethernet"; static const char pci_device_14e4_167d[] = "NetXtreme BCM5751M Gigabit Ethernet PCI Express"; static const char pci_device_14e4_167e[] = "NetXtreme BCM5751F Fast Ethernet PCI Express"; static const char pci_device_14e4_1696[] = "NetXtreme BCM5782 Gigabit Ethernet"; @@ -14370,6 +16544,11 @@ static const char pci_subsys_14e4_1696_14e4_000d[] = "NetXtreme BCM5782 1000Base-T"; #endif static const char pci_device_14e4_169c[] = "NetXtreme BCM5788 Gigabit Ethernet"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_169c_103c_308b[] = "nx6125"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_14e4_169d[] = "NetLink BCM5789 Gigabit Ethernet PCI Express"; static const char pci_device_14e4_16a6[] = "NetXtreme BCM5702X Gigabit Ethernet"; #endif @@ -14416,6 +16595,12 @@ static const char pci_subsys_14e4_16a8_10b7_2001[] = "3C998-SX Dual Port 1000-SX PCI-X"; #endif static const char pci_device_14e4_16aa[] = "NetXtreme II BCM5706S Gigabit Ethernet"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_16aa_103c_3102[] = "NC370F Multifunction Gigabit Server Adapter"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_14e4_16ac[] = "NetXtreme II BCM5708S Gigabit Ethernet"; static const char pci_device_14e4_16c6[] = "NetXtreme BCM5702A3 Gigabit Ethernet"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_16c6_10b7_1100[] = "3C1000B-T 10/100/1000 PCI"; @@ -14439,12 +16624,12 @@ #ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_14e4_16c7_103c_12c3[] = "HP Combo FC/GigE-SX [A9782A]"; +static const char pci_subsys_14e4_16c7_103c_12c3[] = "Combo FC/GigE-SX [A9782A]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_14e4_16c7_103c_12ca[] = "HP Combo FC/GigE-T [A9784A]"; +static const char pci_subsys_14e4_16c7_103c_12ca[] = "Combo FC/GigE-T [A9784A]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO @@ -14458,6 +16643,21 @@ static const char pci_device_14e4_16fd[] = "NetXtreme BCM5753M Gigabit Ethernet PCI Express"; static const char pci_device_14e4_16fe[] = "NetXtreme BCM5753F Fast Ethernet PCI Express"; static const char pci_device_14e4_170c[] = "BCM4401-B0 100Base-TX"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_170c_1028_0188[] = "Inspiron 6000 laptop"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_170c_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_170c_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_14e4_170d[] = "NetXtreme BCM5901 100Base-TX"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_170d_1014_0545[] = "ThinkPad R40e (2684-HVG) builtin ethernet controller"; @@ -14484,6 +16684,28 @@ static const char pci_device_14e4_4312[] = "BCM4310 UART"; static const char pci_device_14e4_4313[] = "BCM4310 Ethernet Controller"; static const char pci_device_14e4_4315[] = "BCM4310 USB Controller"; +static const char pci_device_14e4_4318[] = "BCM4318 [AirForce One 54g] 802.11g Wireless LAN Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4318_103c_1356[] = "nx6125"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4318_1468_0311[] = "Aspire 3022WLMi"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4318_1468_0312[] = "TravelMate 2410"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4318_14e4_0449[] = "Gateway 7510GX"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4318_14e4_4318[] = "WPC54G version 3 [Wireless-G Notebook Adapter] 802.11g Wireless Lan Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4318_16ec_0119[] = "U.S.Robotics Wireless MAXg PC Card"; +#endif +static const char pci_device_14e4_4319[] = "Dell Wireless 1470 DualBand WLAN"; static const char pci_device_14e4_4320[] = "BCM4306 802.11b/g Wireless LAN Controller"; #endif #ifdef INIT_SUBSYS_INFO @@ -14495,9 +16717,30 @@ static const char pci_subsys_14e4_4320_1028_0003[] = "Wireless 1350 WLAN Mini-PCI Card"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4320_103c_12f4[] = "nx9500 Built-in Wireless"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4320_103c_12fa[] = "Presario R3000 802.11b/g"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_4320_1043_100f[] = "WL-100G"; #endif +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4320_1057_7025[] = "WN825G"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4320_106b_004e[] = "AirPort Extreme"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4320_144f_7050[] = "eMachines M6805 802.11g Built-in Wireless"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_4320_14e4_4320[] = "Linksys WMP54G PCI"; #endif @@ -14505,8 +16748,14 @@ static const char pci_subsys_14e4_4320_1737_4320[] = "WPC54G"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4320_1799_7001[] = "Belkin F5D7001 High-Speed Mode Wireless G Network Card"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_14e4_4320_1799_7010[] = "Belkin F5D7010 54g Wireless Network card"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14e4_4320_185f_1220[] = "Acer TravelMate 290E WLAN Mini-PCI Card"; +#endif static const char pci_device_14e4_4321[] = "BCM4306 802.11a Wireless LAN Controller"; static const char pci_device_14e4_4322[] = "BCM4306 UART"; static const char pci_device_14e4_4324[] = "BCM4309 802.11a/b/g"; @@ -14559,6 +16808,7 @@ static const char pci_device_14e4_4716[] = "BCM47xx Sentry5 USB Host Controller"; static const char pci_device_14e4_4717[] = "BCM47xx Sentry5 USB Device Controller"; static const char pci_device_14e4_4718[] = "Sentry5 Crypto Accelerator"; +static const char pci_device_14e4_4719[] = "BCM47xx/53xx RoboSwitch Core"; static const char pci_device_14e4_4720[] = "BCM4712 MIPS CPU"; static const char pci_device_14e4_5365[] = "BCM5365P Sentry5 Host Bridge"; static const char pci_device_14e4_5600[] = "BCM5600 StrataSwitch 24+2 Ethernet Switch Controller"; @@ -14570,6 +16820,7 @@ static const char pci_device_14e4_5680[] = "BCM5680 G-Switch 8 Port Gigabit Ethernet Switch Controller"; static const char pci_device_14e4_5690[] = "BCM5690 12-port Multi-Layer Gigabit Ethernet Switch"; static const char pci_device_14e4_5691[] = "BCM5691 GE/10GE 8+2 Gigabit Ethernet Switch Controller"; +static const char pci_device_14e4_5692[] = "BCM5692 12-port Multi-Layer Gigabit Ethernet Switch"; static const char pci_device_14e4_5820[] = "BCM5820 Crypto Accelerator"; static const char pci_device_14e4_5821[] = "BCM5821 Crypto Accelerator"; static const char pci_device_14e4_5822[] = "BCM5822 Crypto Accelerator"; @@ -14598,6 +16849,7 @@ static const char pci_vendor_14ea[] = "Planex Communications, Inc"; static const char pci_device_14ea_ab06[] = "FNW-3603-TX CardBus Fast Ethernet"; static const char pci_device_14ea_ab07[] = "RTL81xx RealTek Ethernet"; +static const char pci_device_14ea_ab08[] = "FNW-3602-TX CardBus Fast Ethernet"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_14eb[] = "SEIKO EPSON Corp"; @@ -14727,6 +16979,7 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_14f1_1066_122d_4033[] = "Dell Athena - MDP3900V-U"; #endif +static const char pci_device_14f1_1085[] = "HCF V90 56k Data/Fax/Voice/Spkp PCI Modem"; static const char pci_device_14f1_1433[] = "HCF 56k Data/Fax Modem"; static const char pci_device_14f1_1434[] = "HCF 56k Data/Fax/Voice Modem"; static const char pci_device_14f1_1435[] = "HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem"; @@ -14755,7 +17008,7 @@ #endif static const char pci_device_14f1_1610[] = "ADSL AccessRunner PCI Arbitration Device"; static const char pci_device_14f1_1611[] = "AccessRunner PCI ADSL Interface Device"; -static const char pci_device_14f1_1620[] = "ADSL AccessRunner V2 PCI Arbitration Device"; +static const char pci_device_14f1_1620[] = "AccessRunner V2 PCI ADSL Arbitration Device"; static const char pci_device_14f1_1621[] = "AccessRunner V2 PCI ADSL Interface Device"; static const char pci_device_14f1_1622[] = "AccessRunner V2 PCI ADSL Yukon WAN Adapter"; static const char pci_device_14f1_1803[] = "HCF 56k Modem"; @@ -14769,6 +17022,7 @@ static const char pci_subsys_14f1_1803_0e11_0043[] = "623-LAN Yogi"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_14f1_1811[] = "Conextant MiniPCI Network Adapter"; static const char pci_device_14f1_1815[] = "HCF 56k Modem"; #endif #ifdef INIT_SUBSYS_INFO @@ -14827,6 +17081,9 @@ static const char pci_device_14f1_2043[] = "HSF 56k Data/Fax Modem (WorldW SmartDAA)"; static const char pci_device_14f1_2044[] = "HSF 56k Data/Fax/Voice Modem (WorldW SmartDAA)"; static const char pci_device_14f1_2045[] = "HSF 56k Data/Fax/Voice/Spkp (w/Handset) Modem (WorldW SmartDAA)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_2045_14f1_2045[] = "Generic SoftK56"; +#endif static const char pci_device_14f1_2046[] = "HSF 56k Data/Fax/Voice/Spkp Modem (WorldW SmartDAA)"; static const char pci_device_14f1_2063[] = "HSF 56k Data/Fax Modem (SmartDAA)"; static const char pci_device_14f1_2064[] = "HSF 56k Data/Fax/Voice Modem (SmartDAA)"; @@ -14887,8 +17144,200 @@ #endif static const char pci_device_14f1_2f02[] = "HSF 56k HSFi Data/Fax"; static const char pci_device_14f1_2f11[] = "HSF 56k HSFi Modem"; +static const char pci_device_14f1_2f20[] = "HSF 56k Data/Fax Modem"; static const char pci_device_14f1_8234[] = "RS8234 ATM SAR Controller [ServiceSAR Plus]"; -static const char pci_device_14f1_8800[] = "Winfast TV2000 XP"; +static const char pci_device_14f1_8800[] = "CX23880/1/2/3 PCI Video and Audio Decoder"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_0070_2801[] = "Hauppauge WinTV 28xxx (Roslyn) models"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_0070_3401[] = "Hauppauge WinTV 34xxx models"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_0070_9001[] = "Nova-T DVB-T"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_0070_9200[] = "Nova-SE2 DVB-S"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_0070_9202[] = "Nova-S-Plus DVB-S"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_0070_9402[] = "WinTV-HVR1100 DVB-T/Hybrid"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_0070_9802[] = "WinTV-HVR1100 DVB-T/Hybrid (Low Profile)"; +#endif +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_1002_00f8[] = "ATI TV Wonder Pro"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_1002_a101[] = "HDTV Wonder"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_1043_4823[] = "ASUS PVR-416"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_107d_6613[] = "Leadtek Winfast 2000XP Expert"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_107d_6620[] = "Leadtek Winfast DV2000"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_107d_663c[] = "Leadtek PVR 2000"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_107d_665f[] = "WinFast DTV1000-T"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_10fc_d003[] = "IODATA GV-VCP3/PCI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_10fc_d035[] = "IODATA GV/BCTV7E"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_1421_0334[] = "Instant TV DVB-T PCI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_1461_000a[] = "AVerTV 303 (M126)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_1461_000b[] = "AverTV Studio 303 (M126)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_1461_8011[] = "UltraTV Media Center PCI 550"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_1462_8606[] = "MSI TV-@nywhere Master"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_14c7_0107[] = "GDI Black Gold"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_14f1_0187[] = "Conexant DVB-T reference design"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_14f1_0342[] = "Digital-Logic MICROSPACE Entertainment Center (MEC)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_153b_1166[] = "Cinergy 1400 DVB-T"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_1540_2580[] = "Provideo PV259"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_1554_4811[] = "PixelView"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_1554_4813[] = "Club 3D ZAP1000 MCE Edition"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_17de_08a1[] = "KWorld/VStream XPert DVB-T with cx22702"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_17de_08a6[] = "KWorld/VStream XPert DVB-T"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_17de_08b2[] = "KWorld DVB-S 100"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_17de_a8a6[] = "digitalnow DNTV Live! DVB-T"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_1822_0025[] = "digitalnow DNTV Live! DVB-T Pro"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_18ac_d500[] = "FusionHDTV 5 Gold"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_18ac_d810[] = "FusionHDTV 3 Gold-Q"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_18ac_d820[] = "FusionHDTV 3 Gold-T"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_18ac_db00[] = "FusionHDTV DVB-T1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_18ac_db11[] = "FusionHDTV DVB-T Plus"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_18ac_db50[] = "FusionHDTV DVB-T Dual Digital"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8800_7063_3000[] = "pcHDTV HD3000 HDTV"; +#endif +static const char pci_device_14f1_8801[] = "CX23880/1/2/3 PCI Video and Audio Decoder [Audio Port]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8801_0070_2801[] = "Hauppauge WinTV 28xxx (Roslyn) models"; +#endif +static const char pci_device_14f1_8802[] = "CX23880/1/2/3 PCI Video and Audio Decoder [MPEG Port]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_0070_2801[] = "Hauppauge WinTV 28xxx (Roslyn) models"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_0070_9002[] = "Nova-T DVB-T Model 909"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_1043_4823[] = "ASUS PVR-416"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_107d_663c[] = "Leadtek PVR 2000"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_14f1_0187[] = "Conexant DVB-T reference design"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_17de_08a1[] = "XPert DVB-T PCI BDA DVBT 23880 Transport Stream Capture"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_17de_08a6[] = "KWorld/VStream XPert DVB-T"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_18ac_d500[] = "DViCO FusionHDTV5 Gold"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_18ac_d810[] = "DViCO FusionHDTV3 Gold-Q"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_18ac_d820[] = "DViCO FusionHDTV3 Gold-T"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_18ac_db00[] = "DVICO FusionHDTV DVB-T1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_18ac_db10[] = "DVICO FusionHDTV DVB-T Plus"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8802_7063_3000[] = "pcHDTV HD3000 HDTV"; +#endif +static const char pci_device_14f1_8804[] = "CX23880/1/2/3 PCI Video and Audio Decoder [IR Port]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8804_0070_9002[] = "Nova-T DVB-T Model 909"; +#endif +static const char pci_device_14f1_8811[] = "CX23880/1/2/3 PCI Video and Audio Decoder [Audio Port]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8811_0070_3401[] = "Hauppauge WinTV 34xxx models"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8811_1462_8606[] = "MSI TV-@nywhere Master"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8811_18ac_d500[] = "DViCO FusionHDTV5 Gold"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8811_18ac_d810[] = "DViCO FusionHDTV3 Gold-Q"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8811_18ac_d820[] = "DViCO FusionHDTV3 Gold-T"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_14f1_8811_18ac_db00[] = "DVICO FusionHDTV DVB-T1"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_14f2[] = "MOBILITY Electronics"; @@ -14924,7 +17373,7 @@ static const char pci_vendor_14f9[] = "AG COMMUNICATIONS"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_14fa[] = "WANDEL & GOCHERMANN"; +static const char pci_vendor_14fa[] = "WANDEL & GOLTERMANN"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_14fb[] = "TRANSAS MARINE (UK) Ltd"; @@ -15048,6 +17497,8 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_151c[] = "DIGITAL AUDIO LABS Inc"; +static const char pci_device_151c_0003[] = "Prodif T 2496"; +static const char pci_device_151c_4000[] = "Prodif 88"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_151d[] = "Fujitsu Computer Products Of America"; @@ -15098,6 +17549,30 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1522_0100_1522_1d00[] = "RockForceOCTO+ 8 Port V.92/V.44 Data, V.34 Super-G3 Fax, Voice Modem"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_2000[] = "RockForceD1 1 Port V.90 Data Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_2100[] = "RockForceF1 1 Port V.34 Super-G3 Fax Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_2200[] = "RockForceD2 2 Port V.90 Data Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_2300[] = "RockForceF2 2 Port V.34 Super-G3 Fax Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_2400[] = "RockForceD4 4 Port V.90 Data Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_2500[] = "RockForceF4 4 Port V.34 Super-G3 Fax Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_2600[] = "RockForceD8 8 Port V.90 Data Modem"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1522_0100_1522_2700[] = "RockForceF8 8 Port V.34 Super-G3 Fax Modem"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1523[] = "MUSIC Semiconductors"; @@ -15105,6 +17580,14 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1524[] = "ENE Technology Inc"; static const char pci_device_1524_0510[] = "CB710 Memory Card Reader Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1524_0510_103c_006a[] = "nx9500"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_1524_0520[] = "FLASH memory: ENE Technology Inc:"; +static const char pci_device_1524_0530[] = "ENE PCI Memory Stick Card Reader Controller"; +static const char pci_device_1524_0550[] = "ENE PCI Secure Digital Card Reader Controller"; static const char pci_device_1524_0610[] = "PCI Smart Card Reader Controller"; static const char pci_device_1524_1211[] = "CB1211 Cardbus Controller"; static const char pci_device_1524_1225[] = "CB1225 Cardbus Controller"; @@ -15115,6 +17598,11 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_1524_1411[] = "CB-710/2/4 Cardbus Controller"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1524_1411_103c_006a[] = "nx9500"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_device_1524_1412[] = "CB-712/4 Cardbus Controller"; static const char pci_device_1524_1420[] = "CB1420 Cardbus Controller"; static const char pci_device_1524_1421[] = "CB-720/2/4 Cardbus Controller"; @@ -15161,6 +17649,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1532[] = "ECHELON Corp"; +static const char pci_device_1532_0020[] = "LonWorks PCLTA-20 PCI LonTalk Adapter"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1533[] = "BALTIMORE"; @@ -15200,7 +17689,8 @@ static const char pci_vendor_153e[] = "TECHWELL Inc"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_153f[] = "MIPS DENMARK"; +static const char pci_vendor_153f[] = "MIPS Technologies, Inc."; +static const char pci_device_153f_0001[] = "SOC-it 101 System Controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1540[] = "PROVIDEO MULTIMEDIA Co Ltd"; @@ -15209,7 +17699,7 @@ static const char pci_vendor_1541[] = "MACHONE Communications"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_1542[] = "VIVID Technology Inc"; +static const char pci_vendor_1542[] = "Concurrent Computer Corporation"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1543[] = "SILICON Laboratories"; @@ -15390,6 +17880,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1578[] = "HITT"; +static const char pci_device_1578_5615[] = "VPMK3 [Video Processor Mk III]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1579[] = "Dual Technology Corp"; @@ -15576,8 +18067,8 @@ static const char pci_device_15b3_5a44[] = "MT23108 InfiniHost"; static const char pci_device_15b3_5a45[] = "MT23108 [Infinihost HCA Flash Recovery]"; static const char pci_device_15b3_5a46[] = "MT23108 PCI Bridge"; -static const char pci_device_15b3_5e8c[] = "MT24204 [InfiniHost III Lx HCA]"; -static const char pci_device_15b3_5e8d[] = "MT24204 [InfiniHost III Lx HCA Flash Recovery]"; +static const char pci_device_15b3_5e8d[] = "MT25204 [InfiniHost III Lx HCA Flash Recovery]"; +static const char pci_device_15b3_6274[] = "MT25204 [InfiniHost III Lx HCA]"; static const char pci_device_15b3_6278[] = "MT25208 InfiniHost III Ex (Tavor compatibility mode)"; static const char pci_device_15b3_6279[] = "MT25208 [InfiniHost III Ex HCA Flash Recovery]"; static const char pci_device_15b3_6282[] = "MT25208 InfiniHost III Ex"; @@ -15608,6 +18099,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_15bc[] = "Agilent Technologies"; +static const char pci_device_15bc_1100[] = "E8001-66442 PCI Express CIC"; static const char pci_device_15bc_2922[] = "64 Bit, 133MHz PCI-X Exerciser & Protocol Checker"; static const char pci_device_15bc_2928[] = "64 Bit, 66MHz PCI Exerciser & Analyzer"; static const char pci_device_15bc_2929[] = "64 Bit, 133MHz PCI-X Analyzer & Exerciser"; @@ -15854,6 +18346,11 @@ static const char pci_vendor_1619[] = "FarSite Communications Ltd"; static const char pci_device_1619_0400[] = "FarSync T2P (2 port X.21/V.35/V.24)"; static const char pci_device_1619_0440[] = "FarSync T4P (4 port X.21/V.35/V.24)"; +static const char pci_device_1619_0610[] = "FarSync T1U (1 port X.21/V.35/V.24)"; +static const char pci_device_1619_0620[] = "FarSync T2U (1 port X.21/V.35/V.24)"; +static const char pci_device_1619_0640[] = "FarSync T4U (4 port X.21/V.35/V.24)"; +static const char pci_device_1619_1610[] = "FarSync TE1 (T1,E1)"; +static const char pci_device_1619_2610[] = "FarSync DSL-S1 (SHDSL)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_161f[] = "Rioworks"; @@ -15893,6 +18390,10 @@ static const char pci_vendor_165d[] = "Hsing Tech. Enterprise Co., Ltd."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_165f[] = "Linux Media Labs, LLC"; +static const char pci_device_165f_1020[] = "LMLM4 MPEG-4 encoder"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1661[] = "Worldspace Corp."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -15910,8 +18411,18 @@ static const char pci_device_1677_12d7[] = "5LS172.61 B&R Dual CAN Interface Card"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_167b[] = "ZyDAS Technology Corp."; +static const char pci_device_167b_2102[] = "ZyDAS ZD1202"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_167b_2102_187e_3406[] = "ZyAIR B-122 CardBus 11Mbs Wireless LAN Card"; +#endif +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1681[] = "Hercules"; -static const char pci_device_1681_0010[] = "Hercules 3d Prophet II Ultra 64MB [ 350 MHz NV15BR core, 128-bit DDR @ 460 MHz, 1.5v AGP4x ]"; +static const char pci_device_1681_0010[] = "Hercules 3d Prophet II Ultra 64MB (350 MHz NV15BR core)"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1682[] = "XFX Pine Group Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1688[] = "CastleNet Technology Inc."; @@ -15924,13 +18435,31 @@ static const char pci_device_168c_0012[] = "AR5211 802.11ab NIC"; static const char pci_device_168c_0013[] = "AR5212 802.11abg NIC"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_168c_0013_1186_3202[] = "D-link DWL-G650 B3 Wireless cardbus adapter"; +static const char pci_subsys_168c_0013_1113_d301[] = "Philips CPWNA100 Wireless CardBus adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_1186_3202[] = "D-link DWL-G650 (Rev B3,B5) Wireless cardbus adapter"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_0013_1186_3203[] = "DWL-G520 Wireless PCI Adapter"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_168c_0013_1186_3a13[] = "DWL-G520 Wireless PCI Adapter rev. B"; +static const char pci_subsys_168c_0013_1186_3a12[] = "D-Link AirPlus DWL-G650 Wireless Cardbus Adapter(rev.C)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_1186_3a13[] = "D-Link AirPlus DWL-G520 Wireless PCI Adapter(rev.B)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_1186_3a14[] = "D-Link AirPremier DWL-AG530 Wireless PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_1186_3a17[] = "D-Link AirPremier DWL-G680 Wireless Cardbus Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_1186_3a18[] = "D-Link AirPremier DWL-G550 Wireless PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_1186_3a63[] = "D-Link AirPremier DWL-AG660 Wireless Cardbus Adapter"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_0013_1186_3a94[] = "C54C Wireless 801.11g cardbus"; @@ -15939,20 +18468,66 @@ static const char pci_subsys_168c_0013_1385_4d00[] = "Netgear WG311T Wireless PCI Adapter"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_1458_e911[] = "Gigabyte GN-WIAG02"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_0013_14b7_0a60[] = "8482-WD ORiNOCO 11a/b/g Wireless PCI Adapter"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_168c_0013_168c_0013[] = "WG511T Wireless CardBus Adapter"; +static const char pci_subsys_168c_0013_168c_0013[] = "AirPlus XtremeG DWL-G650 Wireless PCMCIA Adapter"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_0013_168c_1025[] = "DWL-G650B2 Wireless CardBus Adapter"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_168c_1027[] = "Netgate NL-3054CB ARIES b/g CardBus Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_168c_0013_168c_2026[] = "Netgate 5354MP ARIES a(108Mb turbo)/b/g MiniPCI Adapter"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_168c_2041[] = "Netgate 5354MP Plus ARIES2 b/g MiniPCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_168c_2042[] = "Netgate 5354MP Plus ARIES2 a/b/g MiniPCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_0013_16ab_7302[] = "Trust Speedshare Turbo Pro Wireless PCI Adapter"; +#endif +static const char pci_device_168c_001a[] = "AR5005G 802.11abg NIC"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_001a_1186_3a15[] = "D-Link AirPlus G DWL-G630 Wireless Cardbus Adapter(rev.D)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_001a_1186_3a16[] = "D-Link AirPlus G DWL-G510 Wireless PCI Adapter(rev.B)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_001a_1186_3a23[] = "D-Link AirPlus G DWL-G520+A Wireless PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_001a_1186_3a24[] = "D-Link AirPlus G DWL-G650+A Wireless Cardbus Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_001a_168c_1052[] = "TP-Link TL-WN510G Wireless CardBus Adapter"; +#endif +static const char pci_device_168c_001b[] = "AR5006X 802.11abg NIC"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_001b_1186_3a19[] = "D-Link AirPremier AG DWL-AG660 Wireless Cardbus Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_168c_001b_1186_3a22[] = "D-Link AirPremier AG DWL-AG530 Wireless PCI Adapter"; +#endif +static const char pci_device_168c_0020[] = "AR5005VL 802.11bg Wireless NIC"; static const char pci_device_168c_1014[] = "AR5212 802.11abg NIC"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1695[] = "EPoX Computer Co., Ltd."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_169c[] = "Netcell Corporation"; +static const char pci_device_169c_0044[] = "Revolution Storage Processing Card"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16a5[] = "Tekram Technology Co.,Ltd."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -15960,18 +18535,31 @@ static const char pci_device_16ab_1100[] = "GL24110P"; static const char pci_device_16ab_1101[] = "PLX9052 PCMCIA-to-PCI Wireless LAN"; static const char pci_device_16ab_1102[] = "PCMCIA-to-PCI Wireless Network Bridge"; +static const char pci_device_16ab_8501[] = "WL-8305 Wireless LAN PCI Adapter"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16ae[] = "Safenet Inc"; static const char pci_device_16ae_1141[] = "SafeXcel-1141"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_16af[] = "SparkLAN Communications, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16b4[] = "Aspex Semiconductor Ltd"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_16b8[] = "Sonnet Technologies, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16be[] = "Creatix Polymedia GmbH"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_16c8[] = "Octasic Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_16c9[] = "EONIC B.V. The Netherlands"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16ca[] = "CENATEK Inc"; static const char pci_device_16ca_0001[] = "Rocket Drive DL"; #endif @@ -15979,6 +18567,9 @@ static const char pci_vendor_16cd[] = "Densitron Technologies"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_16ce[] = "Roland Corp."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16df[] = "PIKA Technologies Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -15988,6 +18579,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_16ec[] = "U.S. Robotics"; static const char pci_device_16ec_00ff[] = "USR997900 10/100 Mbps PCI Network Card"; +static const char pci_device_16ec_0116[] = "USR997902 10/100/1000 Mbps PCI Network Card"; static const char pci_device_16ec_3685[] = "Wireless Access PCI Adapter Model 022415"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -16023,6 +18615,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_172a[] = "Accelerated Encryption"; +static const char pci_device_172a_13c8[] = "AEP SureWare Runner 1000V3"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1734[] = "Fujitsu Siemens Computer GmbH"; @@ -16035,6 +18628,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1737_1032_1737_0015[] = "EG1032 v2 Instant Gigabit Network Adapter"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1737_1032_1737_0024[] = "EG1032 v3 Instant Gigabit Network Adapter"; +#endif static const char pci_device_1737_1064[] = "Gigabit Network Adapter"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1737_1064_1737_0016[] = "EG1064 v2 Instant Gigabit Network Adapter"; @@ -16072,6 +18668,9 @@ static const char pci_vendor_175e[] = "Sanera Systems, Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1775[] = "SBS Technologies"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1787[] = "Hightech Information System Ltd."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -16092,6 +18691,16 @@ static const char pci_device_1799_6020[] = "Wireless PCMCIA Card - F5D6020"; static const char pci_device_1799_6060[] = "Wireless PDA Card - F5D6060"; static const char pci_device_1799_7000[] = "Wireless PCI Card - F5D7000"; +static const char pci_device_1799_7010[] = "BCM4306 802.11b/g Wireless Lan Controller F5D7010"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_179c[] = "Data Patterns"; +static const char pci_device_179c_0557[] = "DP-PCI-557 [PCI 1553B]"; +static const char pci_device_179c_0566[] = "DP-PCI-566 [Intelligent PCI 1553B]"; +static const char pci_device_179c_5031[] = "DP-CPCI-5031-Synchro Module"; +static const char pci_device_179c_5121[] = "DP-CPCI-5121-IP Carrier"; +static const char pci_device_179c_5211[] = "DP-CPCI-5211-IP Carrier"; +static const char pci_device_179c_5679[] = "AGE Display Module"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_17a0[] = "Genesys Logic, Inc"; @@ -16099,6 +18708,9 @@ static const char pci_device_17a0_8034[] = "GL880S USB 2.0 controller"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_17aa[] = "Lenovo"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_17af[] = "Hightech Information System Ltd."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -16116,18 +18728,55 @@ static const char pci_vendor_17c2[] = "Newisys, Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_17cb[] = "Airgo Networks Inc"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_17cc[] = "NetChip Technology, Inc"; static const char pci_device_17cc_2280[] = "USB 2.0"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_17cf[] = "Z-Com, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_17d3[] = "Areca Technology Corp."; +static const char pci_device_17d3_1110[] = "ARC-1110 4-Port PCI-X to SATA RAID Controller"; +static const char pci_device_17d3_1120[] = "ARC-1120 8-Port PCI-X to SATA RAID Controller"; +static const char pci_device_17d3_1130[] = "ARC-1130 12-Port PCI-X to SATA RAID Controller"; +static const char pci_device_17d3_1160[] = "ARC-1160 16-Port PCI-X to SATA RAID Controller"; +static const char pci_device_17d3_1210[] = "ARC-1210 4-Port PCI-Express to SATA RAID Controller"; +static const char pci_device_17d3_1220[] = "ARC-1220 8-Port PCI-Express to SATA RAID Controller"; +static const char pci_device_17d3_1230[] = "ARC-1230 12-Port PCI-Express to SATA RAID Controller"; +static const char pci_device_17d3_1260[] = "ARC-1260 16-Port PCI-Express to SATA RAID Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_17d5[] = "S2io Inc."; +static const char pci_device_17d5_5831[] = "Xframe 10 Gigabit Ethernet PCI-X"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_17d5_5831_103c_12d5[] = "HP PCI-X 133MHz 10GbE SR Fiber"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_17d5_5832[] = "Xframe II 10 Gigabit Ethernet PCI-X"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_17de[] = "KWorld Computer Co. Ltd."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_17ee[] = "Connect Components Ltd"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_17f2[] = "Albatron Corp."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_17fe[] = "Linksys, A Division of Cisco Systems"; +static const char pci_device_17fe_2120[] = "WMP11v4 802.11b PCI card"; static const char pci_device_17fe_2220[] = "[AirConn] INPROCOMM IPN 2220 Wireless LAN Adapter (rev 01)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_17fe_2220_17fe_2220[] = "WPC54G ver. 4"; +#endif +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_17ff[] = "Benq Corporation"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1813[] = "Ambient Technologies Inc"; @@ -16142,8 +18791,18 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1814[] = "RaLink"; -static const char pci_device_1814_0101[] = "Wireless PCI Adpator RT2400 / RT2460"; -static const char pci_device_1814_0201[] = "Ralink RT2500 802.11 Cardbus Reference Card"; +static const char pci_device_1814_0101[] = "Wireless PCI Adapter RT2400 / RT2460"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0101_1043_0127[] = "WiFi-b add-on Card"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0101_1462_6828[] = "PC11B2 (MS-6828) Wireless 11b PCI Card"; +#endif +static const char pci_device_1814_0200[] = "RT2500 802.11g PCI [PC54G2]"; +static const char pci_device_1814_0201[] = "RT2500 802.11g Cardbus/mini-PCI"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0201_1043_130f[] = "WL-130g"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1814_0201_1371_001e[] = "CWC-854 Wireless-G CardBus Adapter"; #endif @@ -16153,16 +18812,44 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_1814_0201_1371_0020[] = "CWP-854 Wireless-G PCI Adapter"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0201_1458_e381[] = "GN-WMKG 802.11b/g Wireless CardBus Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0201_1458_e931[] = "GN-WIKG 802.11b/g mini-PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0201_1462_6835[] = "Wireless 11G CardBus CB54G2"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0201_1737_0032[] = "WMP54G 2.0 PCI Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0201_1799_700a[] = "F5D7000 Wireless G Desktop Network Card"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0201_1799_701a[] = "F5D7010 Wireless G Notebook Network Card"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0201_185f_22a0[] = "CN-WF513 Wireless Cardbus Adapter"; +#endif +static const char pci_device_1814_0301[] = "RT2561/RT61 802.11g PCI"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_1814_0301_2561_1814[] = "Intellinet Wireless G PCI Adapter"; +#endif +static const char pci_device_1814_0401[] = "Ralink RT2600 802.11 MIMO"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1820[] = "InfiniCon Systems Inc."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1822[] = "Twinhan Technology Co. Ltd"; +static const char pci_device_1822_4e35[] = "Mantis DTV PCI Bridge Controller [Ver 1.0]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_182d[] = "SiteCom Europe BV"; static const char pci_device_182d_3069[] = "ISDN PCI DC-105V2"; +static const char pci_device_182d_9790[] = "WL-121 Wireless Network Adapter 100g+ [Ver.3]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1830[] = "Credence Systems Corporation"; @@ -16183,14 +18870,30 @@ static const char pci_vendor_1852[] = "Anritsu Corp."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1854[] = "LG Electronics, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_185b[] = "Compro Technology, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_185f[] = "Wistron NeWeb Corp."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1864[] = "SilverBack"; +static const char pci_device_1864_2110[] = "ISNAP 2110"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1867[] = "Topspin Communications"; -static const char pci_device_1867_5a44[] = "MT23108 PCI-X HCA"; -static const char pci_device_1867_5a45[] = "MT23108 PCI-X HCA flash recovery"; -static const char pci_device_1867_5a46[] = "MT23108 PCI-X HCA bridge"; +static const char pci_device_1867_5a44[] = "MT23108 InfiniHost HCA"; +static const char pci_device_1867_5a45[] = "MT23108 InfiniHost HCA flash recovery"; +static const char pci_device_1867_5a46[] = "MT23108 InfiniHost HCA bridge"; static const char pci_device_1867_6278[] = "MT25208 InfiniHost III Ex (Tavor compatibility mode)"; static const char pci_device_1867_6282[] = "MT25208 InfiniHost III Ex"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_187e[] = "ZyXEL Communication Corporation"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1888[] = "Varisys Ltd"; static const char pci_device_1888_0301[] = "VMFX1 FPGA PMC module"; static const char pci_device_1888_0601[] = "VSM2 dual PMC carrier"; @@ -16198,6 +18901,9 @@ static const char pci_device_1888_0720[] = "VS24x series PowerPC PCI board"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1890[] = "Egenera, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1894[] = "KNC One"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -16208,7 +18914,13 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_18ac[] = "DViCO Corporation"; +static const char pci_device_18ac_d500[] = "FusionHDTV 5"; static const char pci_device_18ac_d810[] = "FusionHDTV 3 Gold"; +static const char pci_device_18ac_d820[] = "FusionHDTV 3 Gold-T"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_18b8[] = "Ammasso"; +static const char pci_device_18b8_b001[] = "AMSO 1100 iWARP/RDMA Gigabit Ethernet Coprocessor"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_18bc[] = "Info-Tek Corp."; @@ -16219,26 +18931,135 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_18c9[] = "ARVOO Engineering BV"; #endif -#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_18ca[] = "XGI - Xabre Graphics Inc"; -static const char pci_device_18ca_0040[] = "Volari V8"; +static const char pci_device_18ca_0020[] = "Volari Z7"; +static const char pci_device_18ca_0040[] = "Volari V3XT/V5/V8"; +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_18d2[] = "Sitecom"; +static const char pci_device_18d2_3069[] = "DC-105v2 ISDN controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_18dd[] = "Artimi Inc"; +static const char pci_device_18dd_4c6f[] = "Artimi RTMI-100 UWB adapter"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_18e6[] = "MPL AG"; static const char pci_device_18e6_0001[] = "OSCI [Octal Serial Communication Interface]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_18f7[] = "Commtech, Inc."; -static const char pci_device_18f7_0001[] = "Fastcom ESCC-PCI-335"; -static const char pci_device_18f7_0002[] = "Fastcom 422/4-PCI-335"; -static const char pci_device_18f7_0004[] = "Fastcom 422/2-PCI-335"; -static const char pci_device_18f7_0005[] = "Fastcom IGESCC-PCI-ISO/1"; -static const char pci_device_18f7_000a[] = "Fastcom 232/4-PCI-335"; +static const char pci_vendor_18ec[] = "Cesnet, z.s.p.o."; +static const char pci_device_18ec_c006[] = "COMBO6"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_18ec_c006_18ec_d001[] = "COMBO-4MTX"; #endif -#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_18ec_c006_18ec_d002[] = "COMBO-4SFP"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_18ec_c006_18ec_d003[] = "COMBO-4SFPRO"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_18ec_c006_18ec_d004[] = "COMBO-2XFP"; +#endif +static const char pci_device_18ec_c045[] = "COMBO6E"; +static const char pci_device_18ec_c050[] = "COMBO-PTM"; +static const char pci_device_18ec_c058[] = "COMBO6X"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_18ec_c058_18ec_d001[] = "COMBO-4MTX"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_18ec_c058_18ec_d002[] = "COMBO-4SFP"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_18ec_c058_18ec_d003[] = "COMBO-4SFPRO"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_18ec_c058_18ec_d004[] = "COMBO-2XFP"; +#endif +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_18f7[] = "Commtech, Inc."; +static const char pci_device_18f7_0001[] = "Fastcom ESCC-PCI-335"; +static const char pci_device_18f7_0002[] = "Fastcom 422/4-PCI-335"; +static const char pci_device_18f7_0004[] = "Fastcom 422/2-PCI-335"; +static const char pci_device_18f7_0005[] = "Fastcom IGESCC-PCI-ISO/1"; +static const char pci_device_18f7_000a[] = "Fastcom 232/4-PCI-335"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_18fb[] = "Resilience Corporation"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1923[] = "Sangoma Technologies Corp."; +static const char pci_device_1923_0100[] = "A104d QUAD T1/E1 AFT card"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1924[] = "Level 5 Networks Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_192e[] = "TransDimension"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1931[] = "Option N.V."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1942[] = "ClearSpeed Technology plc"; +static const char pci_device_1942_e511[] = "CSX600 Advance Accelerator Board"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1957[] = "Freescale Semiconductor Inc"; +static const char pci_device_1957_0080[] = "MPC8349E"; +static const char pci_device_1957_0081[] = "MPC8349"; +static const char pci_device_1957_0082[] = "MPC8347E TBGA"; +static const char pci_device_1957_0083[] = "MPC8347 TBGA"; +static const char pci_device_1957_0084[] = "MPC8347E PBGA"; +static const char pci_device_1957_0085[] = "MPC8347 PBGA"; +static const char pci_device_1957_0086[] = "MPC8343E"; +static const char pci_device_1957_0087[] = "MPC8343"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1958[] = "Faster Technology, LLC."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1966[] = "Orad Hi-Tec Systems"; +static const char pci_device_1966_1975[] = "DVG64 family"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_196a[] = "Sensory Networks Inc."; +static const char pci_device_196a_0101[] = "NodalCore C-1000 Content Classification Accelerator"; +static const char pci_device_196a_0102[] = "NodalCore C-2000 Content Classification Accelerator"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_197b[] = "JMicron Technologies, Inc."; +static const char pci_device_197b_2360[] = "JMicron 20360/20363 AHCI Controller"; +static const char pci_device_197b_2363[] = "JMicron 20360/20363 AHCI Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1989[] = "Montilio Inc."; +static const char pci_device_1989_0001[] = "RapidFile Bridge"; +static const char pci_device_1989_8001[] = "RapidFile"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1993[] = "Innominate Security Technologies AG"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_19a8[] = "DAQDATA GmbH"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_19ac[] = "Kasten Chase Applied Research"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_19ae[] = "Progeny Systems Corporation"; +static const char pci_device_19ae_0520[] = "4135 HFT Interface Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_19d4[] = "Quixant Limited"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_19e2[] = "Vector Informatik GmbH"; +#endif +static const char pci_vendor_1a03[] = "Aspeed Technology Co., Ltd"; +static const char pci_device_1a03_2000[] = "AST2000"; +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_1a08[] = "Sierra semiconductor"; static const char pci_device_1a08_0000[] = "SC15064"; #endif @@ -16265,6 +19086,14 @@ static const char pci_device_1fc0_0300[] = "E2200 Dual E1/Rawpipe Card"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1fc1[] = "PathScale, Inc"; +static const char pci_device_1fc1_000d[] = "InfiniPath HT-400"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_1fce[] = "Cognio Inc."; +static const char pci_device_1fce_0001[] = "Spectrum Analyzer PC Card (SAgE)"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_2000[] = "Smart Link Ltd."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -16317,6 +19146,9 @@ static const char pci_subsys_3388_0021_4c53_1080[] = "CT8 mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_3388_0021_4c53_1090[] = "Cx9 mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_3388_0021_4c53_10a0[] = "CA3/CR3 mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -16325,6 +19157,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_3388_0021_4c53_3011[] = "PPCI mezzanine (64-bit PMC)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_3388_0021_4c53_4000[] = "PMCCARR1 carrier board"; +#endif static const char pci_device_3388_0022[] = "HiNT HB4 PCI-PCI Bridge (PCI6150)"; static const char pci_device_3388_0026[] = "HB2 PCI-PCI Bridge"; static const char pci_device_3388_101a[] = "E.Band [AudioTrak Inca88]"; @@ -16350,6 +19185,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_3842[] = "eVga.com. Corp."; +static const char pci_device_3842_c370[] = "e-GeFORCE 6600 256 DDR PCI-e"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_38ef[] = "4Links"; @@ -16357,17 +19193,35 @@ static const char pci_vendor_3d3d[] = "3DLabs"; static const char pci_device_3d3d_0001[] = "GLINT 300SX"; static const char pci_device_3d3d_0002[] = "GLINT 500TX"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_3d3d_0002_0000_0000[] = "GLoria L"; +#endif static const char pci_device_3d3d_0003[] = "GLINT Delta"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_3d3d_0003_0000_0000[] = "GLoria XL"; +#endif static const char pci_device_3d3d_0004[] = "Permedia"; static const char pci_device_3d3d_0005[] = "Permedia"; static const char pci_device_3d3d_0006[] = "GLINT MX"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_3d3d_0006_0000_0000[] = "GLoria XL"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_3d3d_0006_1048_0a42[] = "GLoria XXL"; +#endif static const char pci_device_3d3d_0007[] = "3D Extreme"; static const char pci_device_3d3d_0008[] = "GLINT Gamma G1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_3d3d_0008_1048_0a42[] = "GLoria XXL"; +#endif static const char pci_device_3d3d_0009[] = "Permedia II 2D+3D"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_3d3d_0009_1040_0011[] = "AccelStar II"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_3d3d_0009_1048_0a42[] = "GLoria XXL"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_3d3d_0009_13e9_1000[] = "6221L-4U"; #endif #ifdef INIT_SUBSYS_INFO @@ -16443,6 +19297,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_4144[] = "Alpha Data"; +static const char pci_device_4144_0044[] = "ADM-XRCIIPro"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_416c[] = "Aladdin Knowledge Systems"; @@ -16450,11 +19305,71 @@ static const char pci_device_416c_0200[] = "CPC"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_4321[] = "Tata Power Strategic Electronics Division"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_4444[] = "Internext Compression Inc"; static const char pci_device_4444_0016[] = "iTVC16 (CX23416) MPEG-2 Encoder"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0070_0003[] = "WinTV PVR 250"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0070_0009[] = "WinTV PVR 150"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0070_0801[] = "WinTV PVR 150"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0070_0807[] = "WinTV PVR 150"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0070_4001[] = "WinTV PVR 250"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_4444_0016_0070_4009[] = "WinTV PVR 250"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0070_4801[] = "WinTV PVR 250"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0070_4803[] = "WinTV PVR 250"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0070_8003[] = "WinTV PVR 150"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0070_8801[] = "WinTV PVR 150"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0070_c801[] = "WinTV PVR 150"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0070_e807[] = "WinTV PVR 500 (1st unit)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0070_e817[] = "WinTV PVR 500 (2nd unit)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_0270_0801[] = "WinTV PVR 150"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_12ab_fff3[] = "MPG600"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_12ab_ffff[] = "MPG600"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_4070_8801[] = "WinTV PVR 150"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_9005_0092[] = "VideOh! AVC-2010"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_9005_0093[] = "VideOh! AVC-2410"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0016_ff92_0070[] = "PVR-550"; +#endif static const char pci_device_4444_0803[] = "iTVC15 MPEG-2 Encoder"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_4444_0803_0070_4000[] = "WinTV PVR-350"; @@ -16462,6 +19377,18 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_4444_0803_0070_4001[] = "WinTV PVR-250"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0803_0070_4800[] = "WinTV PVR-350 (V1)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0803_12ab_0000[] = "MPG160"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0803_1461_a3ce[] = "M179"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_4444_0803_1461_a3cf[] = "M179"; +#endif #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_4468[] = "Bridgeport machines"; @@ -16567,6 +19494,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_5168[] = "Animation Technologies Inc."; +static const char pci_device_5168_0301[] = "FlyDVB-T"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_5301[] = "Alliance Semiconductor Corp."; @@ -16670,7 +19598,7 @@ static const char pci_subsys_5333_8a22_1033_8069[] = "Savage 4"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_5333_8a22_1033_8110[] = "Savage4 LT"; +static const char pci_subsys_5333_8a22_1033_8110[] = "Savage 4 LT"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_5333_8a22_105d_0018[] = "SR9 8Mb SDRAM"; @@ -16764,7 +19692,10 @@ static const char pci_device_5333_8c11[] = "82C270-294 Savage/MX"; static const char pci_device_5333_8c12[] = "86C270-294 Savage/IX-MV"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_5333_8c12_1014_017f[] = "ThinkPad T20"; +static const char pci_subsys_5333_8c12_1014_017f[] = "Thinkpad T20/T22"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_5333_8c12_1179_0001[] = "86C584 SuperSavage/IXC Toshiba"; #endif static const char pci_device_5333_8c13[] = "86C270-294 Savage/IX"; #ifdef INIT_SUBSYS_INFO @@ -16845,7 +19776,7 @@ static const char pci_vendor_6356[] = "UltraStor"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_6374[] = "c't Magazin für Computertechnik"; +static const char pci_vendor_6374[] = "c't Magazin fuer Computertechnik"; static const char pci_device_6374_6773[] = "GPPCI"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -16855,6 +19786,13 @@ static const char pci_vendor_6666[] = "Decision Computer International Co."; static const char pci_device_6666_0001[] = "PCCOM4"; static const char pci_device_6666_0002[] = "PCCOM8"; +static const char pci_device_6666_0004[] = "PCCOM2"; +static const char pci_device_6666_0101[] = "PCI 8255/8254 I/O Card"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_7063[] = "pcHDTV"; +static const char pci_device_7063_2000[] = "HD-2000"; +static const char pci_device_7063_3000[] = "HD-3000"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_7604[] = "O.N. Electronic Co Ltd."; @@ -16873,12 +19811,9 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_807d[] = "Asustek Computer, Inc."; #endif -static const char pci_vendor_8086[] = "Intel Corp."; +static const char pci_vendor_8086[] = "Intel Corporation"; static const char pci_device_8086_0007[] = "82379AB"; static const char pci_device_8086_0008[] = "Extended Express System Support Controller"; -#ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_0008_0008_1000[] = "WorldMark 4300 INCA ASIC"; -#endif static const char pci_device_8086_0039[] = "21145 Fast Ethernet"; static const char pci_device_8086_0122[] = "82437FX"; static const char pci_device_8086_0309[] = "80303 I/O Processor PCI-to-PCI Bridge"; @@ -16888,15 +19823,20 @@ static const char pci_device_8086_0329[] = "6700PXH PCI Express-to-PCI Bridge A"; static const char pci_device_8086_032a[] = "6700PXH PCI Express-to-PCI Bridge B"; static const char pci_device_8086_032c[] = "6702PXH PCI Express-to-PCI Bridge A"; -static const char pci_device_8086_0330[] = "80332 [Dobson] I/O processor"; -static const char pci_device_8086_0331[] = "80332 [Dobson] I/O processor"; -static const char pci_device_8086_0332[] = "80332 [Dobson] I/O processor"; -static const char pci_device_8086_0333[] = "80332 [Dobson] I/O processor"; -static const char pci_device_8086_0334[] = "80332 [Dobson] I/O processor"; -static const char pci_device_8086_0335[] = "80331 [Lindsay] I/O processor"; -static const char pci_device_8086_0336[] = "80331 [Lindsay] I/O processor"; -static const char pci_device_8086_0340[] = "41210 [Lanai] Serial to Parallel PCI Bridge"; -static const char pci_device_8086_0341[] = "41210 [Lanai] Serial to Parallel PCI Bridge"; +static const char pci_device_8086_0330[] = "80332 [Dobson] I/O processor (A-Segment Bridge)"; +static const char pci_device_8086_0331[] = "80332 [Dobson] I/O processor (A-Segment IOAPIC)"; +static const char pci_device_8086_0332[] = "80332 [Dobson] I/O processor (B-Segment Bridge)"; +static const char pci_device_8086_0333[] = "80332 [Dobson] I/O processor (B-Segment IOAPIC)"; +static const char pci_device_8086_0334[] = "80332 [Dobson] I/O processor (ATU)"; +static const char pci_device_8086_0335[] = "80331 [Lindsay] I/O processor (PCI-X Bridge)"; +static const char pci_device_8086_0336[] = "80331 [Lindsay] I/O processor (ATU)"; +static const char pci_device_8086_0340[] = "41210 [Lanai] Serial to Parallel PCI Bridge (A-Segment Bridge)"; +static const char pci_device_8086_0341[] = "41210 [Lanai] Serial to Parallel PCI Bridge (B-Segment Bridge)"; +static const char pci_device_8086_0370[] = "80333 Segment-A PCI Express-to-PCI Express Bridge"; +static const char pci_device_8086_0371[] = "80333 A-Bus IOAPIC"; +static const char pci_device_8086_0372[] = "80333 Segment-B PCI Express-to-PCI Express Bridge"; +static const char pci_device_8086_0373[] = "80333 B-Bus IOAPIC"; +static const char pci_device_8086_0374[] = "80333 Address Translation Unit"; static const char pci_device_8086_0482[] = "82375EB/SB PCI to EISA Bridge"; static const char pci_device_8086_0483[] = "82424TX/ZX [Saturn] CPU to PCI bridge"; static const char pci_device_8086_0484[] = "82378ZB/IB, 82379AB (SIO, SIO.A) PCI to ISA Bridge"; @@ -16924,6 +19864,9 @@ static const char pci_device_8086_0537[] = "E8870SP Interleave registers 2 and 3"; static const char pci_device_8086_0600[] = "RAID Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_0600_8086_01af[] = "SRCZCR"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_0600_8086_01c1[] = "ICP Vortex GDT8546RZ"; #endif #ifdef INIT_SUBSYS_INFO @@ -17017,6 +19960,7 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1009_8086_2109[] = "PRO/1000 XF Server Adapter"; #endif +static const char pci_device_8086_100a[] = "82540EM Gigabit Ethernet Controller"; static const char pci_device_8086_100c[] = "82544GC Gigabit Ethernet Controller (Copper)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_100c_8086_1112[] = "PRO/1000 T Desktop Adapter"; @@ -17048,6 +19992,9 @@ static const char pci_subsys_8086_100e_1014_026a[] = "PRO/1000 MT Network Connection"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_100e_1024_0134[] = "Poweredge SC600"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_100e_1028_002e[] = "Optiplex GX260"; #endif #ifdef INIT_SUBSYS_INFO @@ -17062,6 +20009,12 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_100e_8086_002e[] = "PRO/1000 MT Desktop Adapter"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_100e_8086_1376[] = "PRO/1000 GT Desktop Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_100e_8086_1476[] = "PRO/1000 GT Desktop Adapter"; +#endif static const char pci_device_8086_100f[] = "82545EM Gigabit Ethernet Controller (Copper)"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_100f_1014_0269[] = "iSeries 1000/100/10 Ethernet Adapter"; @@ -17077,12 +20030,18 @@ #endif static const char pci_device_8086_1010[] = "82546EB Gigabit Ethernet Controller (Copper)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1010_0e11_00db[] = "NC7170 Gigabit Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1010_1014_027c[] = "PRO/1000 MT Dual Port Network Adapter"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1010_18fb_7872[] = "RESlink-X"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1010_1fc1_0026[] = "Niagara 2260 Bypass Card"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1010_4c53_1080[] = "CT8 mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -17092,6 +20051,9 @@ static const char pci_subsys_8086_1010_8086_1011[] = "PRO/1000 MT Dual Port Server Adapter"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1010_8086_1012[] = "Primergy RX300"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1010_8086_101a[] = "PRO/1000 MT Dual Port Network Adapter"; #endif #ifdef INIT_SUBSYS_INFO @@ -17109,6 +20071,9 @@ #endif static const char pci_device_8086_1012[] = "82546EB Gigabit Ethernet Controller (Fiber)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1012_0e11_00dc[] = "NC6170 Gigabit Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1012_8086_1012[] = "PRO/1000 MF Dual Port Server Adapter"; #endif static const char pci_device_8086_1013[] = "82541EI Gigabit Ethernet Controller (Copper)"; @@ -17146,6 +20111,9 @@ static const char pci_subsys_8086_1019_1458_1019[] = "GA-8IPE1000 Pro2 motherboard (865PE)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1019_1458_e000[] = "Intel Gigabit Ethernet (Kenai II)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1019_8086_1019[] = "PRO/1000 CT Desktop Connection"; #endif #ifdef INIT_SUBSYS_INFO @@ -17154,6 +20122,7 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1019_8086_3427[] = "S875WP1-E mainboard"; #endif +static const char pci_device_8086_101a[] = "82547EI Gigabit Ethernet Controller (Mobile)"; static const char pci_device_8086_101d[] = "82546EB Gigabit Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_101d_8086_1000[] = "PRO/1000 MT Quad Port Server Adapter"; @@ -17170,6 +20139,9 @@ #endif static const char pci_device_8086_1026[] = "82545GM Gigabit Ethernet Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1026_1028_0169[] = "Precision 470"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1026_8086_1000[] = "PRO/1000 MT Server Connection"; #endif #ifdef INIT_SUBSYS_INFO @@ -17183,6 +20155,9 @@ #endif static const char pci_device_8086_1027[] = "82545GM Gigabit Ethernet Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1027_103c_3103[] = "NC310F PCI-X Gigabit Server Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1027_8086_1001[] = "PRO/1000 MF Server Adapter(LX)"; #endif #ifdef INIT_SUBSYS_INFO @@ -17225,6 +20200,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1031_144d_c006[] = "vpr Matrix 170B4"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1031_813c_104d[] = "Vaio PCG-GRV616G"; +#endif static const char pci_device_8086_1032[] = "82801CAM (ICH3) PRO/100 VE Ethernet Controller"; static const char pci_device_8086_1033[] = "82801CAM (ICH3) PRO/100 VM (LOM) Ethernet Controller"; static const char pci_device_8086_1034[] = "82801CAM (ICH3) PRO/100 VM Ethernet Controller"; @@ -17232,6 +20210,9 @@ static const char pci_device_8086_1036[] = "82801CAM (ICH3) 82562EH Ethernet Controller"; static const char pci_device_8086_1037[] = "82801CAM (ICH3) Chipset Ethernet Controller"; static const char pci_device_8086_1038[] = "82801CAM (ICH3) PRO/100 VM (KM) Ethernet Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1038_0e11_0098[] = "Evo N600c"; +#endif static const char pci_device_8086_1039[] = "82801DB PRO/100 VE (LOM) Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1039_1014_0267[] = "NetVista A30p"; @@ -17256,6 +20237,7 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1048_8086_a11f[] = "PRO/10GbE LR Server Adapter"; #endif +static const char pci_device_8086_104b[] = "Ethernet Controller"; static const char pci_device_8086_1050[] = "82562EZ 10/100 Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1050_1462_728c[] = "865PE Neo2 (MS-6728)"; @@ -17264,18 +20246,35 @@ static const char pci_subsys_8086_1050_1462_758c[] = "MS-6758 (875P Neo)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1050_8086_3020[] = "D865PERL mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1050_8086_302f[] = "Desktop Board D865GBF"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1050_8086_3427[] = "S875WP1-E mainboard"; #endif static const char pci_device_8086_1051[] = "82801EB/ER (ICH5/ICH5R) integrated LAN Controller"; +static const char pci_device_8086_1052[] = "PRO/100 VM Network Connection"; +static const char pci_device_8086_1053[] = "PRO/100 VM Network Connection"; static const char pci_device_8086_1059[] = "82551QM Ethernet Controller"; +static const char pci_device_8086_105e[] = "82571EB Gigabit Ethernet Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_105e_1775_6003[] = "Telum GE-QT"; +#endif +static const char pci_device_8086_105f[] = "82571EB Gigabit Ethernet Controller"; +static const char pci_device_8086_1060[] = "82571EB Gigabit Ethernet Controller"; static const char pci_device_8086_1064[] = "82562ET/EZ/GT/GZ - PRO/100 VE (LOM) Ethernet Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1064_1043_80f8[] = "P5GD1-VW Mainboard"; +#endif static const char pci_device_8086_1065[] = "82562ET/EZ/GT/GZ - PRO/100 VE Ethernet Controller"; static const char pci_device_8086_1066[] = "82562 EM/EX/GX - PRO/100 VM (LOM) Ethernet Controller"; static const char pci_device_8086_1067[] = "82562 EM/EX/GX - PRO/100 VM Ethernet Controller"; static const char pci_device_8086_1068[] = "82562ET/EZ/GT/GZ - PRO/100 VE (LOM) Ethernet Controller Mobile"; -static const char pci_device_8086_1069[] = "82562 EM/EX/GX - PRO/100 VM (LOM) Ethernet Controller Mobile"; -static const char pci_device_8086_106a[] = "82562G \t- PRO/100 VE (LOM) Ethernet Controller"; -static const char pci_device_8086_106b[] = "82562G \t- PRO/100 VE Ethernet Controller Mobile"; +static const char pci_device_8086_1069[] = "82562EM/EX/GX - PRO/100 VM (LOM) Ethernet Controller Mobile"; +static const char pci_device_8086_106a[] = "82562G - PRO/100 VE (LOM) Ethernet Controller"; +static const char pci_device_8086_106b[] = "82562G - PRO/100 VE Ethernet Controller Mobile"; static const char pci_device_8086_1075[] = "82547GI Gigabit Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1075_1028_0165[] = "PowerEdge 750"; @@ -17291,6 +20290,9 @@ static const char pci_subsys_8086_1076_1028_0165[] = "PowerEdge 750"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1076_1028_019a[] = "PowerEdge SC1425"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1076_8086_0076[] = "PRO/1000 MT Network Connection"; #endif #ifdef INIT_SUBSYS_INFO @@ -17324,6 +20326,9 @@ static const char pci_subsys_8086_1079_103c_12cf[] = "HP Core Dual Port 1000Base-T [AB352A]"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1079_1fc1_0027[] = "Niagara 2261 Failover NIC"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1079_4c53_1090[] = "Cx9 / Vx9 mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -17358,6 +20363,38 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_107b_8086_107b[] = "PRO/1000 MB Dual Port Server Connection"; #endif +static const char pci_device_8086_107c[] = "82541PI Gigabit Ethernet Controller"; +static const char pci_device_8086_107d[] = "82572EI Gigabit Ethernet Controller"; +static const char pci_device_8086_107e[] = "82572EI Gigabit Ethernet Controller"; +static const char pci_device_8086_107f[] = "82572EI Gigabit Ethernet Controller"; +static const char pci_device_8086_1080[] = "FA82537EP 56K V.92 Data/Fax Modem PCI"; +static const char pci_device_8086_1081[] = "Enterprise Southbridge LAN Copper"; +static const char pci_device_8086_1082[] = "Enterprise Southbridge LAN fiber"; +static const char pci_device_8086_1083[] = "Enterprise Southbridge LAN SERDES"; +static const char pci_device_8086_1084[] = "Enterprise Southbridge IDE Redirection"; +static const char pci_device_8086_1085[] = "Enterprise Southbridge Serial Port Redirection"; +static const char pci_device_8086_1086[] = "Enterprise Southbridge IPMI/KCS0"; +static const char pci_device_8086_1087[] = "Enterprise Southbridge UHCI Redirection"; +static const char pci_device_8086_1089[] = "Enterprise Southbridge BT"; +static const char pci_device_8086_108a[] = "82546EB Gigabit Ethernet Controller"; +static const char pci_device_8086_108b[] = "82573V Gigabit Ethernet Controller (Copper)"; +static const char pci_device_8086_108c[] = "82573E Gigabit Ethernet Controller (Copper)"; +static const char pci_device_8086_108e[] = "82573E KCS"; +static const char pci_device_8086_108f[] = "Intel(R) Active Management Technology - SOL"; +static const char pci_device_8086_1092[] = "Intel(R) PRO/100 VE Network Connection"; +static const char pci_device_8086_1096[] = "PRO/1000 EB Network Connection with I/O Acceleration"; +static const char pci_device_8086_1097[] = "Enterprise Southbridge DPT LAN fiber"; +static const char pci_device_8086_1098[] = "PRO/1000 EB Backplane Connection with I/O Acceleration"; +static const char pci_device_8086_1099[] = "82546GB Quad Port Server Adapter"; +static const char pci_device_8086_109a[] = "82573L Gigabit Ethernet Controller"; +static const char pci_device_8086_109b[] = "82546GB PRO/1000 GF Quad Port Server Adapter"; +static const char pci_device_8086_10a0[] = "82571EB PRO/1000 AT Quad Port Bypass Adapter"; +static const char pci_device_8086_10a1[] = "82571EB PRO/1000 AF Quad Port Bypass Adapter"; +static const char pci_device_8086_10b0[] = "82573L PRO/1000 PL Network Connection"; +static const char pci_device_8086_10b2[] = "82573V PRO/1000 PM Network Connection"; +static const char pci_device_8086_10b3[] = "82573E PRO/1000 PM Network Connection"; +static const char pci_device_8086_10b4[] = "82573L PRO/1000 PL Network Connection"; +static const char pci_device_8086_10b5[] = "82546GB PRO/1000 GT Quad Port Server Adapter"; static const char pci_device_8086_1107[] = "PRO/1000 MF Server Adapter (LX)"; static const char pci_device_8086_1130[] = "82815 815 Chipset Host Bridge and Memory Controller Hub"; #ifdef INIT_SUBSYS_INFO @@ -17387,6 +20424,9 @@ static const char pci_subsys_8086_1132_8086_4532[] = "D815EEA2 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1132_8086_4541[] = "D815EEA Motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1132_8086_4557[] = "D815EGEW Mainboard"; #endif static const char pci_device_8086_1161[] = "82806AA PCI64 Hub Advanced Programmable Interrupt Controller"; @@ -17576,6 +20616,9 @@ static const char pci_subsys_8086_1229_103c_1200[] = "NetServer 10/100TX"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1229_108e_10cf[] = "EtherExpress PRO/100(B)"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1229_10c3_1100[] = "SmartEther100 SC1100"; #endif #ifdef INIT_SUBSYS_INFO @@ -17585,6 +20628,9 @@ static const char pci_subsys_8086_1229_10cf_1143[] = "8255x-based Ethernet Adapter (10/100)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1229_110a_008b[] = "82551QM Fast Ethernet Multifuction PCI/CardBus Controller"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1229_1179_0001[] = "8255x-based Ethernet Adapter (10/100)"; #endif #ifdef INIT_SUBSYS_INFO @@ -17618,6 +20664,9 @@ static const char pci_subsys_8086_1229_4c53_1080[] = "CT8 mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_1229_4c53_10e0[] = "PSL09 PrPMC"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1229_8086_0001[] = "EtherExpress PRO/100B (TX)"; #endif #ifdef INIT_SUBSYS_INFO @@ -17642,9 +20691,6 @@ static const char pci_subsys_8086_1229_8086_0008[] = "82558 10/100 with Wake on LAN"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_1229_8086_0009[] = "EtherExpress PRO/100+"; -#endif -#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_1229_8086_000a[] = "EtherExpress PRO/100+ Management Adapter"; #endif #ifdef INIT_SUBSYS_INFO @@ -17902,7 +20948,7 @@ static const char pci_subsys_8086_1461_15d9_3480[] = "P4DP6"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_1461_4c53_1090[] = "Cx9 / Vx9 mainboard"; +static const char pci_subsys_8086_1461_4c53_1090[] = "Cx9/Vx9 mainboard"; #endif static const char pci_device_8086_1462[] = "82870P2 P64H2 Hot Plug Controller"; static const char pci_device_8086_1960[] = "80960RP [i960RP Microprocessor]"; @@ -17990,6 +21036,8 @@ static const char pci_subsys_8086_1a30_1028_010e[] = "Optiplex GX240"; #endif static const char pci_device_8086_1a31[] = "82845 845 (Brookdale) Chipset AGP Bridge"; +static const char pci_device_8086_1a38[] = "Server DMA Controller"; +static const char pci_device_8086_1a48[] = "PRO/10GbE SR Server Adapter"; static const char pci_device_8086_2410[] = "82801AA ISA Bridge (LPC)"; static const char pci_device_8086_2411[] = "82801AA IDE"; static const char pci_device_8086_2412[] = "82801AA USB"; @@ -17999,6 +21047,9 @@ static const char pci_subsys_8086_2415_1028_0095[] = "Precision Workstation 220 Integrated Digital Audio"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2415_110a_0051[] = "Activy 2xx"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2415_11d4_0040[] = "SoundMAX Integrated Digital Audio"; #endif #ifdef INIT_SUBSYS_INFO @@ -18007,6 +21058,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2415_11d4_5340[] = "SoundMAX Integrated Digital Audio"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2415_1734_1025[] = "Activy 3xx"; +#endif static const char pci_device_8086_2416[] = "82801AA AC'97 Modem"; static const char pci_device_8086_2418[] = "82801AA PCI Bridge"; static const char pci_device_8086_2420[] = "82801AB ISA Bridge (LPC)"; @@ -18119,6 +21173,12 @@ static const char pci_subsys_8086_2446_104d_80df[] = "Vaio PCG-FX403"; #endif static const char pci_device_8086_2448[] = "82801 Mobile PCI Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2448_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2448_1734_1055[] = "Amilo M1420"; +#endif static const char pci_device_8086_2449[] = "82801BA/BAM/CA/CAM Ethernet Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2449_0e11_0012[] = "EtherExpress PRO/100 VM"; @@ -18251,6 +21311,9 @@ static const char pci_device_8086_2480[] = "82801CA LPC Interface Controller"; static const char pci_device_8086_2482[] = "82801CA/CAM USB (Hub #1)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2482_0e11_0030[] = "Evo N600c"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2482_1014_0220[] = "ThinkPad A/T/X Series"; #endif #ifdef INIT_SUBSYS_INFO @@ -18283,6 +21346,9 @@ #endif static const char pci_device_8086_2484[] = "82801CA/CAM USB (Hub #2)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2484_0e11_0030[] = "Evo N600c"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2484_1014_0220[] = "ThinkPad A/T/X Series"; #endif #ifdef INIT_SUBSYS_INFO @@ -18330,9 +21396,6 @@ static const char pci_subsys_8086_2486_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_2486_1179_0001[] = "Toshiba Satellite 1110 Z15 internal Modem"; -#endif -#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2486_134d_4c21[] = "Dell Inspiron 2100 internal modem"; #endif #ifdef INIT_SUBSYS_INFO @@ -18343,6 +21406,9 @@ #endif static const char pci_device_8086_2487[] = "82801CA/CAM USB (Hub #3)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2487_0e11_0030[] = "Evo N600c"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2487_1014_0220[] = "ThinkPad A/T/X Series"; #endif #ifdef INIT_SUBSYS_INFO @@ -18356,6 +21422,9 @@ #endif static const char pci_device_8086_248a[] = "82801CAM IDE U100"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_248a_0e11_0030[] = "Evo N600c"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_248a_1014_0220[] = "ThinkPad A/T/X Series"; #endif #ifdef INIT_SUBSYS_INFO @@ -18394,7 +21463,13 @@ static const char pci_subsys_8086_24c2_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c2_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_8086_24c2_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c2_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c2_103c_0890[] = "nc6000 laptop"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c2_1071_8160[] = "MIM2000"; @@ -18406,8 +21481,14 @@ static const char pci_subsys_8086_24c2_1509_2990[] = "Averatec 5110H laptop"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c2_1734_1055[] = "Amilo M1420"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c2_4c53_1090[] = "Cx9 / Vx9 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c2_8086_4541[] = "Latitude D400"; +#endif static const char pci_device_8086_24c3[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) SMBus Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c3_1014_0267[] = "NetVista A30p"; @@ -18419,7 +21500,10 @@ static const char pci_subsys_8086_24c3_1028_0126[] = "Optiplex GX260"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c3_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_8086_24c3_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c3_103c_0890[] = "nc6000 laptop"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c3_1071_8160[] = "MIM2000"; @@ -18431,6 +21515,9 @@ static const char pci_subsys_8086_24c3_1462_5800[] = "845PE Max (MS-6580)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c3_1734_1055[] = "Amilo M1420"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c3_4c53_1090[] = "Cx9 / Vx9 mainboard"; #endif static const char pci_device_8086_24c4[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) USB UHCI Controller #2"; @@ -18447,7 +21534,13 @@ static const char pci_subsys_8086_24c4_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c4_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_8086_24c4_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c4_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c4_103c_0890[] = "nc6000 laptop"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c4_1071_8160[] = "MIM2000"; @@ -18461,6 +21554,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c4_4c53_1090[] = "Cx9 / Vx9 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c4_8086_4541[] = "Latitude D400"; +#endif static const char pci_device_8086_24c5[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) AC'97 Audio Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c5_0e11_00b8[] = "Analog Devices Inc. codec [SoundMAX]"; @@ -18472,10 +21568,19 @@ static const char pci_subsys_8086_24c5_1025_005a[] = "TravelMate 290"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c5_1028_0139[] = "Latitude D400"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c5_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c5_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_8086_24c5_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c5_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c5_103c_0890[] = "nc6000 laptop"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c5_1071_8160[] = "MIM2000"; @@ -18486,12 +21591,24 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c5_1462_5800[] = "845PE Max (MS-6580)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c5_1734_1055[] = "Amilo M1420"; +#endif static const char pci_device_8086_24c6[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) AC'97 Modem Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c6_003c_1025[] = "Acer Aspire 2001WLCi (Compal CL50 motherboard) implementation"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c6_1025_005a[] = "TravelMate 290"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c6_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_8086_24c6_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c6_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c6_103c_0890[] = "nc6000 laptop"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c6_1071_8160[] = "MIM2000"; @@ -18510,7 +21627,13 @@ static const char pci_subsys_8086_24c7_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24c7_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_8086_24c7_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c7_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c7_103c_0890[] = "nc6000 laptop"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c7_1071_8160[] = "MIM2000"; @@ -18524,6 +21647,9 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24c7_4c53_1090[] = "Cx9 / Vx9 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24c7_8086_4541[] = "Latitude D400"; +#endif static const char pci_device_8086_24ca[] = "82801DBM (ICH4-M) IDE Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24ca_1025_005a[] = "TravelMate 290"; @@ -18532,11 +21658,23 @@ static const char pci_subsys_8086_24ca_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24ca_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_8086_24ca_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24ca_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24ca_103c_0890[] = "nc6000 laptop"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24ca_1071_8160[] = "MIM2000"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24ca_1734_1055[] = "Amilo M1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24ca_8086_4541[] = "Latitude D400"; +#endif static const char pci_device_8086_24cb[] = "82801DB (ICH4) IDE Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cb_1014_0267[] = "NetVista A30p"; @@ -18554,6 +21692,9 @@ static const char pci_subsys_8086_24cb_4c53_1090[] = "Cx9 / Vx9 mainboard"; #endif static const char pci_device_8086_24cc[] = "82801DBM (ICH4-M) LPC Interface Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cc_1734_1055[] = "Amilo M1420"; +#endif static const char pci_device_8086_24cd[] = "82801DB/DBM (ICH4/ICH4-M) USB2 EHCI Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cd_1014_0267[] = "NetVista A30p"; @@ -18562,13 +21703,25 @@ static const char pci_subsys_8086_24cd_1025_005a[] = "TravelMate 290"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cd_1028_011d[] = "Latitude D600"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cd_1028_0126[] = "Optiplex GX260"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cd_1028_0139[] = "Latitude D400"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cd_1028_0163[] = "Latitude D505"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24cd_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_8086_24cd_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cd_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cd_103c_0890[] = "nc6000 laptop"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cd_1071_8160[] = "MIM2000"; @@ -18580,46 +21733,97 @@ static const char pci_subsys_8086_24cd_1509_1968[] = "Averatec 5110H"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24cd_1734_1055[] = "Amilo M1420"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24cd_4c53_1090[] = "Cx9 / Vx9 mainboard"; #endif static const char pci_device_8086_24d0[] = "82801EB/ER (ICH5/ICH5R) LPC Interface Bridge"; static const char pci_device_8086_24d1[] = "82801EB (ICH5) SATA Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d1_1028_0169[] = "Precision 470"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d1_1028_019a[] = "PowerEdge SC1425"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d1_103c_12bc[] = "d530 CMT (DG746A)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d1_1043_80a6[] = "P4P800 SE Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d1_1458_24d1[] = "GA-8IPE1000 Pro2 motherboard (865PE)"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d1_1462_7280[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d1_15d9_4580[] = "P4SCE Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d1_8086_3427[] = "S875WP1-E mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d1_8086_4246[] = "Desktop Board D865GBF"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d1_8086_524c[] = "D865PERL mainboard"; #endif static const char pci_device_8086_24d2[] = "82801EB/ER (ICH5/ICH5R) USB UHCI Controller #1"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d2_1014_02ed[] = "xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d2_1028_0169[] = "Precision 470"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d2_1028_0183[] = "PowerEdge 1800"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d2_1028_019a[] = "PowerEdge SC1425"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d2_103c_006a[] = "nx9500"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d2_103c_12bc[] = "d530 CMT (DG746A)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d2_1043_80a6[] = "P4P800 Mainboard"; +static const char pci_subsys_8086_24d2_1043_80a6[] = "P5P800-MX Mainboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d2_1458_24d2[] = "GA-8KNXP motherboard (875P)"; +static const char pci_subsys_8086_24d2_1458_24d2[] = "GA-8IPE1000/8KNXP motherboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d2_1462_7280[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d2_15d9_4580[] = "P4SCE Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d2_1734_101c[] = "Primergy RX300 S2"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d2_8086_3427[] = "S875WP1-E mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d2_8086_4246[] = "Desktop Board D865GBF"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d2_8086_524c[] = "D865PERL mainboard"; #endif static const char pci_device_8086_24d3[] = "82801EB/ER (ICH5/ICH5R) SMBus Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d3_1014_02ed[] = "xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d3_1028_0156[] = "Precision 360"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d3_1028_0169[] = "Precision 470"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d3_1043_80a6[] = "P4P800 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO @@ -18629,17 +21833,41 @@ static const char pci_subsys_8086_24d3_1462_7280[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d3_15d9_4580[] = "P4SCE Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d3_1734_101c[] = "Primergy RX300 S2"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d3_8086_3427[] = "S875WP1-E mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d3_8086_4246[] = "Desktop Board D865GBF"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d3_8086_524c[] = "D865PERL mainboard"; #endif static const char pci_device_8086_24d4[] = "82801EB/ER (ICH5/ICH5R) USB UHCI Controller #2"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d4_1014_02ed[] = "xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d4_1028_0169[] = "Precision 470"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d4_1028_0183[] = "PowerEdge 1800"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d4_1028_019a[] = "PowerEdge SC1425"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d4_103c_006a[] = "nx9500"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d4_103c_12bc[] = "d530 CMT (DG746A)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d4_1043_80a6[] = "P4P800 Mainboard"; +static const char pci_subsys_8086_24d4_1043_80a6[] = "P5P800-MX Mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d4_1458_24d2[] = "GA-8IPE1000 Pro2 motherboard (865PE)"; @@ -18648,20 +21876,38 @@ static const char pci_subsys_8086_24d4_1462_7280[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d4_15d9_4580[] = "P4SCE Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d4_1734_101c[] = "Primergy RX300 S2"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d4_8086_3427[] = "S875WP1-E mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d4_8086_4246[] = "Desktop Board D865GBF"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d4_8086_524c[] = "D865PERL mainboard"; #endif static const char pci_device_8086_24d5[] = "82801EB/ER (ICH5/ICH5R) AC'97 Audio Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d5_103c_12bc[] = "Analog Devices codec [SoundMAX Integrated Digital Audio]"; +static const char pci_subsys_8086_24d5_1028_0169[] = "Precision 470"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d5_103c_006a[] = "nx9500"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d5_1043_80f3[] = "P4P800 Mainboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d5_1458_a002[] = "GA-8KNXP motherboard (875P)"; +static const char pci_subsys_8086_24d5_1043_810f[] = "P5P800-MX Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d5_1458_a002[] = "GA-8IPE1000/8KNXP motherboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d5_1462_0080[] = "65PE Neo2-V (MS-6788) mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d5_1462_7280[] = "865PE Neo2 (MS-6728)"; @@ -18669,13 +21915,34 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d5_8086_a000[] = "D865PERL mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d5_8086_e000[] = "D865PERL mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d5_8086_e001[] = "Desktop Board D865GBF"; +#endif static const char pci_device_8086_24d6[] = "82801EB/ER (ICH5/ICH5R) AC'97 Modem Controller"; -static const char pci_device_8086_24d7[] = "82801EB/ER (ICH5/ICH5R) USB UHCI #3"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d6_103c_006a[] = "nx9500"; +#endif +static const char pci_device_8086_24d7[] = "82801EB/ER (ICH5/ICH5R) USB UHCI Controller #3"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d7_1014_02ed[] = "xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d7_1028_0169[] = "Precision 470"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d7_1028_0183[] = "PowerEdge 1800"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d7_103c_006a[] = "nx9500"; +#endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d7_103c_12bc[] = "d530 CMT (DG746A)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24d7_1043_80a6[] = "P4P800 Mainboard"; +static const char pci_subsys_8086_24d7_1043_80a6[] = "P5P800-MX Mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d7_1458_24d2[] = "GA-8IPE1000 Pro2 motherboard (865PE)"; @@ -18684,17 +21951,38 @@ static const char pci_subsys_8086_24d7_1462_7280[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d7_15d9_4580[] = "P4SCE Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d7_1734_101c[] = "Primergy RX300 S2"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d7_8086_3427[] = "S875WP1-E mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24d7_8086_4246[] = "Desktop Board D865GBF"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24d7_8086_524c[] = "D865PERL mainboard"; #endif static const char pci_device_8086_24db[] = "82801EB/ER (ICH5/ICH5R) IDE Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24db_1014_02ed[] = "xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24db_1028_0169[] = "Precision 470"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24db_1028_019a[] = "PowerEdge SC1425"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24db_103c_006a[] = "nx9500"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24db_103c_12bc[] = "d530 CMT (DG746A)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24db_1043_80a6[] = "P4P800 Mainboard"; +static const char pci_subsys_8086_24db_1043_80a6[] = "P5P800-MX Mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24db_1458_24d2[] = "GA-8IPE1000 Pro2 motherboard (865PE)"; @@ -18706,18 +21994,45 @@ static const char pci_subsys_8086_24db_1462_7580[] = "MSI 875P"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24db_15d9_4580[] = "P4SCE Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24db_1734_101c[] = "Primergy RX300 S2"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24db_8086_24db[] = "P4C800 Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24db_8086_3427[] = "S875WP1-E mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24db_8086_4246[] = "Desktop Board D865GBF"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24db_8086_524c[] = "D865PERL mainboard"; #endif static const char pci_device_8086_24dc[] = "82801EB (ICH5) LPC Interface Bridge"; static const char pci_device_8086_24dd[] = "82801EB/ER (ICH5/ICH5R) USB2 EHCI Controller"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24dd_1014_02ed[] = "xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24dd_1028_0169[] = "Precision 470"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24dd_1028_0183[] = "PowerEdge 1800"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24dd_1028_019a[] = "PowerEdge SC1425"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24dd_103c_006a[] = "nx9500"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24dd_103c_12bc[] = "d530 CMT (DG746A)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24dd_1043_80a6[] = "P4P800 Mainboard"; +static const char pci_subsys_8086_24dd_1043_80a6[] = "P5P800-MX Mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24dd_1458_5006[] = "GA-8IPE1000 Pro2 motherboard (865PE)"; @@ -18729,11 +22044,20 @@ static const char pci_subsys_8086_24dd_8086_3427[] = "S875WP1-E mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24dd_8086_4246[] = "Desktop Board D865GBF"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24dd_8086_524c[] = "D865PERL mainboard"; #endif static const char pci_device_8086_24de[] = "82801EB/ER (ICH5/ICH5R) USB UHCI Controller #4"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_24de_1043_80a6[] = "P4P800 Mainboard"; +static const char pci_subsys_8086_24de_1014_02ed[] = "xSeries server mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24de_1028_0169[] = "Precision 470"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24de_1043_80a6[] = "P5P800-MX Mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24de_1458_24d2[] = "GA-8IPE1000 Pro2 motherboard (865PE)"; @@ -18742,9 +22066,18 @@ static const char pci_subsys_8086_24de_1462_7280[] = "865PE Neo2 (MS-6728)"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24de_15d9_4580[] = "P4SCE Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24de_1734_101c[] = "Primergy RX300 S2"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24de_8086_3427[] = "S875WP1-E mainboard"; #endif #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_24de_8086_4246[] = "Desktop Board D865GBF"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_24de_8086_524c[] = "D865PERL mainboard"; #endif static const char pci_device_8086_24df[] = "82801ER (ICH5R) SATA Controller"; @@ -18824,13 +22157,25 @@ #endif static const char pci_device_8086_2570[] = "82865G/PE/P DRAM Controller/Host-Hub Interface"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_2570_1043_80f2[] = "P4P800 Mainboard"; +static const char pci_subsys_8086_2570_103c_006a[] = "nx9500"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2570_1043_80f2[] = "P5P800-MX Mainboard"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2570_1458_2570[] = "GA-8IPE1000 Pro2 motherboard (865PE)"; #endif static const char pci_device_8086_2571[] = "82865G/PE/P PCI to AGP Controller"; -static const char pci_device_8086_2572[] = "82865G Integrated Graphics Device"; +static const char pci_device_8086_2572[] = "82865G Integrated Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2572_1028_019d[] = "Dimension 3000"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2572_1043_80a5[] = "P5P800-MX Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2572_8086_4246[] = "Desktop Board D865GBF"; +#endif static const char pci_device_8086_2573[] = "82865G/PE/P PCI to CSA Bridge"; static const char pci_device_8086_2576[] = "82865G/PE/P Processor to I/O Memory Interface"; static const char pci_device_8086_2578[] = "82875P/E7210 Memory Controller Hub"; @@ -18841,38 +22186,86 @@ static const char pci_subsys_8086_2578_1462_7580[] = "MS-6758 (875P Neo)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_2578_15d9_4580[] = "Super Micro Computer Inc. P4SCE"; +static const char pci_subsys_8086_2578_15d9_4580[] = "P4SCE Motherboard"; #endif static const char pci_device_8086_2579[] = "82875P Processor to AGP Controller"; static const char pci_device_8086_257b[] = "82875P/E7210 Processor to PCI to CSA Bridge"; static const char pci_device_8086_257e[] = "82875P/E7210 Processor to I/O Memory Interface"; -static const char pci_device_8086_2580[] = "915G/P/GV Processor to I/O Controller"; -static const char pci_device_8086_2581[] = "915G/P/GV PCI Express Root Port"; -static const char pci_device_8086_2582[] = "82915G Express Chipset Family Graphics Controller"; +static const char pci_device_8086_2580[] = "915G/P/GV/GL/PL/910GL Express Memory Controller Hub"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2580_1458_2580[] = "GA-8I915ME-G Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2580_1462_7028[] = "915P/G Neo2"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2580_1734_105b[] = "Scenic W620"; +#endif +static const char pci_device_8086_2581[] = "915G/P/GV/GL/PL/910GL Express PCI Express Root Port"; +static const char pci_device_8086_2582[] = "82915G/GV/910GL Express Chipset Family Graphics Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2582_1028_1079[] = "Optiplex GX280"; #endif -static const char pci_device_8086_2584[] = "925X/XE Memory Controller Hub"; -static const char pci_device_8086_2585[] = "925X/XE PCI Express Root Port"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2582_1043_2582[] = "P5GD1-VW Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2582_1458_2582[] = "GA-8I915ME-G Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2582_1734_105b[] = "Scenic W620"; +#endif +static const char pci_device_8086_2584[] = "925X/XE Express Memory Controller Hub"; +static const char pci_device_8086_2585[] = "925X/XE Express PCI Express Root Port"; static const char pci_device_8086_2588[] = "E7220/E7221 Memory Controller Hub"; static const char pci_device_8086_2589[] = "E7220/E7221 PCI Express Root Port"; static const char pci_device_8086_258a[] = "E7221 Integrated Graphics Controller"; -static const char pci_device_8086_2590[] = "Mobile Memory Controller Hub"; -static const char pci_device_8086_2591[] = "Mobile Memory Controller Hub PCI Express Port"; -static const char pci_device_8086_2592[] = "Mobile Graphics Controller"; +static const char pci_device_8086_2590[] = "Mobile 915GM/PM/GMS/910GML Express Processor to DRAM Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2590_1028_0182[] = "Dell Latidude C610"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2590_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2590_a304_81b7[] = "Vaio VGN-S3XP"; +#endif +static const char pci_device_8086_2591[] = "Mobile 915GM/PM Express PCI Express Root Port"; +static const char pci_device_8086_2592[] = "Mobile 915GM/GMS/910GML Express Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2592_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2592_1043_1881[] = "GMA 900 915GM Integrated Graphics"; +#endif static const char pci_device_8086_25a1[] = "6300ESB LPC Interface Controller"; static const char pci_device_8086_25a2[] = "6300ESB PATA Storage Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25a2_4c53_10b0[] = "CL9 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25a2_4c53_10e0[] = "PSL09 PrPMC"; +#endif static const char pci_device_8086_25a3[] = "6300ESB SATA Storage Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25a3_4c53_10b0[] = "CL9 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25a3_4c53_10d0[] = "Telum ASLP10 Processor AMC"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25a3_4c53_10e0[] = "PSL09 PrPMC"; +#endif static const char pci_device_8086_25a4[] = "6300ESB SMBus Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25a4_4c53_10b0[] = "CL9 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25a4_4c53_10d0[] = "Telum ASLP10 Processor AMC"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25a4_4c53_10e0[] = "PSL09 PrPMC"; +#endif static const char pci_device_8086_25a6[] = "6300ESB AC'97 Audio Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25a6_4c53_10b0[] = "CL9 mainboard"; @@ -18882,159 +22275,611 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25a9_4c53_10b0[] = "CL9 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25a9_4c53_10d0[] = "Telum ASLP10 Processor AMC"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25a9_4c53_10e0[] = "PSL09 PrPMC"; +#endif static const char pci_device_8086_25aa[] = "6300ESB USB Universal Host Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25aa_4c53_10b0[] = "CL9 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25aa_4c53_10e0[] = "PSL09 PrPMC"; +#endif static const char pci_device_8086_25ab[] = "6300ESB Watchdog Timer"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25ab_4c53_10b0[] = "CL9 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25ab_4c53_10d0[] = "Telum ASLP10 Processor AMC"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25ab_4c53_10e0[] = "PSL09 PrPMC"; +#endif static const char pci_device_8086_25ac[] = "6300ESB I/O Advanced Programmable Interrupt Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_25ac_4c53_10b0[] = "CL9 mainboard"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25ac_4c53_10d0[] = "Telum ASLP10 Processor AMC"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25ac_4c53_10e0[] = "PSL09 PrPMC"; +#endif static const char pci_device_8086_25ad[] = "6300ESB USB2 Enhanced Host Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25ad_4c53_10b0[] = "CL9 mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25ad_4c53_10d0[] = "Telum ASLP10 Processor AMC"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25ad_4c53_10e0[] = "PSL09 PrPMC"; +#endif static const char pci_device_8086_25ae[] = "6300ESB 64-bit PCI-X Bridge"; static const char pci_device_8086_25b0[] = "6300ESB SATA RAID Controller"; -static const char pci_device_8086_2600[] = "Server Hub Interface"; -static const char pci_device_8086_2601[] = "Server Hub PCI Express x4 Port D"; -static const char pci_device_8086_2602[] = "Server Hub PCI Express x4 Port C0"; -static const char pci_device_8086_2603[] = "Server Hub PCI Express x4 Port C1"; -static const char pci_device_8086_2604[] = "Server Hub PCI Express x4 Port B0"; -static const char pci_device_8086_2605[] = "Server Hub PCI Express x4 Port B1"; -static const char pci_device_8086_2606[] = "Server Hub PCI Express x4 Port A0"; -static const char pci_device_8086_2607[] = "Server Hub PCI Express x4 Port A1"; -static const char pci_device_8086_2608[] = "Server Hub PCI Express x8 Port C"; -static const char pci_device_8086_2609[] = "Server Hub PCI Express x8 Port B"; -static const char pci_device_8086_260a[] = "Server Hub PCI Express x8 Port A"; -static const char pci_device_8086_260c[] = "Server Hub IMI Registers"; -static const char pci_device_8086_2610[] = "Server Hub System Bus, Boot, and Interrupt Registers"; -static const char pci_device_8086_2611[] = "Server Hub Address Mapping Registers"; -static const char pci_device_8086_2612[] = "Server Hub RAS Registers"; -static const char pci_device_8086_2613[] = "Server Hub Reserved Registers"; -static const char pci_device_8086_2614[] = "Server Hub Reserved Registers"; -static const char pci_device_8086_2615[] = "Server Hub Miscellaneous Registers"; -static const char pci_device_8086_2617[] = "Server Hub Reserved Registers"; -static const char pci_device_8086_2618[] = "Server Hub Reserved Registers"; -static const char pci_device_8086_2619[] = "Server Hub Reserved Registers"; -static const char pci_device_8086_261a[] = "Server Hub Reserved Registers"; -static const char pci_device_8086_261b[] = "Server Hub Reserved Registers"; -static const char pci_device_8086_261c[] = "Server Hub Reserved Registers"; -static const char pci_device_8086_261d[] = "Server Hub Reserved Registers"; -static const char pci_device_8086_261e[] = "Server Hub Reserved Registers"; -static const char pci_device_8086_2620[] = "External Memory Bridge"; -static const char pci_device_8086_2621[] = "External Memory Bridge Control Registers"; -static const char pci_device_8086_2622[] = "External Memory Bridge Memory Interleaving Registers"; -static const char pci_device_8086_2623[] = "External Memory Bridge DDR Initialization and Calibration"; -static const char pci_device_8086_2624[] = "External Memory Bridge Reserved Registers"; -static const char pci_device_8086_2625[] = "External Memory Bridge Reserved Registers"; -static const char pci_device_8086_2626[] = "External Memory Bridge Reserved Registers"; -static const char pci_device_8086_2627[] = "External Memory Bridge Reserved Registers"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25b0_4c53_10d0[] = "Telum ASLP10 Processor AMC"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_25b0_4c53_10e0[] = "PSL09 PrPMC"; +#endif +static const char pci_device_8086_25c0[] = "Workstation Memory Controller Hub"; +static const char pci_device_8086_25d0[] = "Server Memory Controller Hub"; +static const char pci_device_8086_25d4[] = "Server Memory Contoller Hub"; +static const char pci_device_8086_25d8[] = "Server Memory Controller Hub"; +static const char pci_device_8086_25e2[] = "Server PCI Express x4 Port 2"; +static const char pci_device_8086_25e3[] = "Server PCI Express x4 Port 3"; +static const char pci_device_8086_25e4[] = "Server PCI Express x4 Port 4"; +static const char pci_device_8086_25e5[] = "Server PCI Express x4 Port 5"; +static const char pci_device_8086_25e6[] = "Server PCI Express x4 Port 6"; +static const char pci_device_8086_25e7[] = "Server PCI Express x4 Port 7"; +static const char pci_device_8086_25e8[] = "Server AMB Memory Mapped Registers"; +static const char pci_device_8086_25f0[] = "Server Error Reporting Registers"; +static const char pci_device_8086_25f1[] = "Reserved Registers"; +static const char pci_device_8086_25f3[] = "Reserved Registers"; +static const char pci_device_8086_25f5[] = "Server FBD Registers"; +static const char pci_device_8086_25f6[] = "Server FBD Registers"; +static const char pci_device_8086_25f7[] = "Server PCI Express x8 Port 2-3"; +static const char pci_device_8086_25f8[] = "Server PCI Express x8 Port 4-5"; +static const char pci_device_8086_25f9[] = "Server PCI Express x8 Port 6-7"; +static const char pci_device_8086_25fa[] = "Server PCI Express x16 Port 4-7"; +static const char pci_device_8086_2600[] = "E8500/E8501 Hub Interface 1.5"; +static const char pci_device_8086_2601[] = "E8500/E8501 PCI Express x4 Port D"; +static const char pci_device_8086_2602[] = "E8500/E8501 PCI Express x4 Port C0"; +static const char pci_device_8086_2603[] = "E8500/E8501 PCI Express x4 Port C1"; +static const char pci_device_8086_2604[] = "E8500/E8501 PCI Express x4 Port B0"; +static const char pci_device_8086_2605[] = "E8500/E8501 PCI Express x4 Port B1"; +static const char pci_device_8086_2606[] = "E8500/E8501 PCI Express x4 Port A0"; +static const char pci_device_8086_2607[] = "E8500/E8501 PCI Express x4 Port A1"; +static const char pci_device_8086_2608[] = "E8500/E8501 PCI Express x8 Port C"; +static const char pci_device_8086_2609[] = "E8500/E8501 PCI Express x8 Port B"; +static const char pci_device_8086_260a[] = "E8500/E8501 PCI Express x8 Port A"; +static const char pci_device_8086_260c[] = "E8500/E8501 IMI Registers"; +static const char pci_device_8086_2610[] = "E8500/E8501 Front Side Bus, Boot, and Interrupt Registers"; +static const char pci_device_8086_2611[] = "E8500/E8501 Address Mapping Registers"; +static const char pci_device_8086_2612[] = "E8500/E8501 RAS Registers"; +static const char pci_device_8086_2613[] = "E8500/E8501 Reserved Registers"; +static const char pci_device_8086_2614[] = "E8500/E8501 Reserved Registers"; +static const char pci_device_8086_2615[] = "E8500/E8501 Miscellaneous Registers"; +static const char pci_device_8086_2617[] = "E8500/E8501 Reserved Registers"; +static const char pci_device_8086_2618[] = "E8500/E8501 Reserved Registers"; +static const char pci_device_8086_2619[] = "E8500/E8501 Reserved Registers"; +static const char pci_device_8086_261a[] = "E8500/E8501 Reserved Registers"; +static const char pci_device_8086_261b[] = "E8500/E8501 Reserved Registers"; +static const char pci_device_8086_261c[] = "E8500/E8501 Reserved Registers"; +static const char pci_device_8086_261d[] = "E8500/E8501 Reserved Registers"; +static const char pci_device_8086_261e[] = "E8500/E8501 Reserved Registers"; +static const char pci_device_8086_2620[] = "E8500/E8501 eXternal Memory Bridge"; +static const char pci_device_8086_2621[] = "E8500/E8501 XMB Miscellaneous Registers"; +static const char pci_device_8086_2622[] = "E8500/E8501 XMB Memory Interleaving Registers"; +static const char pci_device_8086_2623[] = "E8500/E8501 XMB DDR Initialization and Calibration"; +static const char pci_device_8086_2624[] = "E8500/E8501 XMB Reserved Registers"; +static const char pci_device_8086_2625[] = "E8500/E8501 XMB Reserved Registers"; +static const char pci_device_8086_2626[] = "E8500/E8501 XMB Reserved Registers"; +static const char pci_device_8086_2627[] = "E8500/E8501 XMB Reserved Registers"; static const char pci_device_8086_2640[] = "82801FB/FR (ICH6/ICH6R) LPC Interface Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2640_1462_7028[] = "915P/G Neo2"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2640_1734_105c[] = "Scenic W620"; +#endif static const char pci_device_8086_2641[] = "82801FBM (ICH6M) LPC Interface Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2641_103c_099c[] = "nx6110/nc6120"; +#endif static const char pci_device_8086_2642[] = "82801FW/FRW (ICH6W/ICH6RW) LPC Interface Bridge"; static const char pci_device_8086_2651[] = "82801FB/FW (ICH6/ICH6W) SATA Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2651_1028_0179[] = "Optiplex GX280"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2651_1043_2601[] = "P5GD1-VW Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2651_1734_105c[] = "Scenic W620"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2651_8086_4147[] = "D915GAG Motherboard"; +#endif static const char pci_device_8086_2652[] = "82801FR/FRW (ICH6R/ICH6RW) SATA Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2652_1462_7028[] = "915P/G Neo2"; +#endif static const char pci_device_8086_2653[] = "82801FBM (ICH6M) SATA Controller"; static const char pci_device_8086_2658[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #1"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2658_1028_0179[] = "Optiplex GX280"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2658_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2658_1043_80a6[] = "P5GD1-VW Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2658_1458_2558[] = "GA-8I915ME-G Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2658_1462_7028[] = "915P/G Neo2"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2658_1734_105c[] = "Scenic W620"; +#endif static const char pci_device_8086_2659[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #2"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_2659_1028_0179[] = "Optiplex GX280"; #endif -static const char pci_device_8086_265a[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #3"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_265a_1028_0179[] = "Optiplex GX280"; +static const char pci_subsys_8086_2659_103c_099c[] = "nx6110/nc6120"; #endif -static const char pci_device_8086_265b[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #4"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_265b_1028_0179[] = "Optiplex GX280"; +static const char pci_subsys_8086_2659_1043_80a6[] = "P5GD1-VW Mainboard"; #endif -static const char pci_device_8086_265c[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB2 EHCI Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_265c_1028_0179[] = "Optiplex GX280"; +static const char pci_subsys_8086_2659_1458_2659[] = "GA-8I915ME-G Mainboard"; #endif -static const char pci_device_8086_2660[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 1"; -static const char pci_device_8086_2662[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 2"; -static const char pci_device_8086_2664[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 3"; -static const char pci_device_8086_2666[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 4"; -static const char pci_device_8086_2668[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) High Definition Audio Controller"; -static const char pci_device_8086_266a[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) SMBus Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_266a_1028_0179[] = "Optiplex GX280"; +static const char pci_subsys_8086_2659_1462_7028[] = "915P/G Neo2"; #endif -static const char pci_device_8086_266c[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) LAN Controller"; -static const char pci_device_8086_266d[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Modem Controller"; -static const char pci_device_8086_266e[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Audio Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_266e_1028_0179[] = "Optiplex GX280"; +static const char pci_subsys_8086_2659_1734_105c[] = "Scenic W620"; #endif -static const char pci_device_8086_266f[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) IDE Controller"; -static const char pci_device_8086_2782[] = "82915G Express Chipset Family Graphics Controller"; -static const char pci_device_8086_2792[] = "Mobile Graphics Controller"; -static const char pci_device_8086_3092[] = "Integrated RAID"; -static const char pci_device_8086_3200[] = "GD31244 PCI-X SATA HBA"; -static const char pci_device_8086_3340[] = "82855PM Processor to I/O Controller"; +static const char pci_device_8086_265a[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #3"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3340_1025_005a[] = "TravelMate 290"; +static const char pci_subsys_8086_265a_1028_0179[] = "Optiplex GX280"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3340_103c_0890[] = "NC6000 laptop"; +static const char pci_subsys_8086_265a_103c_099c[] = "nx6110/nc6120"; #endif -static const char pci_device_8086_3341[] = "82855PM Processor to AGP Controller"; -static const char pci_device_8086_3575[] = "82830 830 Chipset Host Bridge"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3575_1014_021d[] = "ThinkPad A/T/X Series"; +static const char pci_subsys_8086_265a_1043_80a6[] = "P5GD1-VW Mainboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3575_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP"; +static const char pci_subsys_8086_265a_1458_265a[] = "GA-8I915ME-G Mainboard"; #endif -static const char pci_device_8086_3576[] = "82830 830 Chipset AGP Bridge"; -static const char pci_device_8086_3577[] = "82830 CGC [Chipset Graphics Controller]"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3577_1014_0513[] = "ThinkPad A/T/X Series"; +static const char pci_subsys_8086_265a_1462_7028[] = "915P/G Neo2"; #endif -static const char pci_device_8086_3578[] = "82830 830 Chipset Host Bridge"; -static const char pci_device_8086_3580[] = "82852/82855 GM/GME/PM/GMV Processor to I/O Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3580_1028_0163[] = "Latitude D505"; +static const char pci_subsys_8086_265a_1734_105c[] = "Scenic W620"; #endif +static const char pci_device_8086_265b[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #4"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3580_4c53_10b0[] = "CL9 mainboard"; +static const char pci_subsys_8086_265b_1028_0179[] = "Optiplex GX280"; #endif -static const char pci_device_8086_3581[] = "82852/82855 GM/GME/PM/GMV Processor to AGP Controller"; -static const char pci_device_8086_3582[] = "82852/855GM Integrated Graphics Device"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3582_1028_0163[] = "Latitude D505"; +static const char pci_subsys_8086_265b_103c_099c[] = "nx6110/nc6120"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3582_4c53_10b0[] = "CL9 mainboard"; +static const char pci_subsys_8086_265b_1043_80a6[] = "P5GD1-VW Mainboard"; #endif -static const char pci_device_8086_3584[] = "82852/82855 GM/GME/PM/GMV Processor to I/O Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3584_1028_0163[] = "Latitude D505"; +static const char pci_subsys_8086_265b_1458_265a[] = "GA-8I915ME-G Mainboard"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3584_4c53_10b0[] = "CL9 mainboard"; +static const char pci_subsys_8086_265b_1462_7028[] = "915P/G Neo2"; #endif -static const char pci_device_8086_3585[] = "82852/82855 GM/GME/PM/GMV Processor to I/O Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3585_1028_0163[] = "Latitude D505"; +static const char pci_subsys_8086_265b_1734_105c[] = "Scenic W620"; #endif +static const char pci_device_8086_265c[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB2 EHCI Controller"; #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_8086_3585_4c53_10b0[] = "CL9 mainboard"; +static const char pci_subsys_8086_265c_1028_0179[] = "Optiplex GX280"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265c_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265c_1043_80a6[] = "P5GD1-VW Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265c_1458_5006[] = "GA-8I915ME-G Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265c_1462_7028[] = "915P/G Neo2"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_265c_1734_105c[] = "Scenic W620"; +#endif +static const char pci_device_8086_2660[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2660_103c_099c[] = "nx6110/nc6120"; +#endif +static const char pci_device_8086_2662[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 2"; +static const char pci_device_8086_2664[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 3"; +static const char pci_device_8086_2666[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 4"; +static const char pci_device_8086_2668[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) High Definition Audio Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2668_1043_814e[] = "P5GD1-VW Mainboard"; +#endif +static const char pci_device_8086_266a[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) SMBus Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266a_1028_0179[] = "Optiplex GX280"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266a_1043_80a6[] = "P5GD1-VW Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266a_1458_266a[] = "GA-8I915ME-G Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266a_1462_7028[] = "915P/G Neo2"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266a_1734_105c[] = "Scenic W620"; +#endif +static const char pci_device_8086_266c[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) LAN Controller"; +static const char pci_device_8086_266d[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Modem Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266d_1025_006a[] = "Conexant AC'97 CoDec (in Acer TravelMate 2410 serie laptop)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266d_103c_099c[] = "nx6110/nc6120"; +#endif +static const char pci_device_8086_266e[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Audio Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266e_1025_006a[] = "Realtek ALC 655 codec (in Acer TravelMate 2410 serie laptop)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266e_1028_0179[] = "Optiplex GX280"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266e_1028_0182[] = "Latitude D610 Laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266e_1028_0188[] = "Inspiron 6000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266e_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266e_1458_a002[] = "GA-8I915ME-G Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266e_1734_105a[] = "Scenic W620"; +#endif +static const char pci_device_8086_266f[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) IDE Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266f_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266f_1043_80a6[] = "P5GD1-VW Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266f_1458_266f[] = "GA-8I915ME-G Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266f_1462_7028[] = "915P/G Neo2"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_266f_1734_105c[] = "Scenic W620"; +#endif +static const char pci_device_8086_2670[] = "Enterprise Southbridge LPC"; +static const char pci_device_8086_2680[] = "Enterprise Southbridge SATA IDE"; +static const char pci_device_8086_2681[] = "Enterprise Southbridge SATA AHCI"; +static const char pci_device_8086_2682[] = "Enterprise Southbridge SATA RAID"; +static const char pci_device_8086_2683[] = "Enterprise Southbridge SATA RAID"; +static const char pci_device_8086_2688[] = "Enterprise Southbridge UHCI USB #1"; +static const char pci_device_8086_2689[] = "Enterprise Southbridge UHCI USB #2"; +static const char pci_device_8086_268a[] = "Enterprise Southbridge UHCI USB #3"; +static const char pci_device_8086_268b[] = "Enterprise Southbridge UHCI USB #4"; +static const char pci_device_8086_268c[] = "Enterprise Southbridge EHCI USB"; +static const char pci_device_8086_2690[] = "Enterprise Southbridge PCI Express Root Port 1"; +static const char pci_device_8086_2692[] = "Enterprise Southbridge PCI Express Root Port 2"; +static const char pci_device_8086_2694[] = "Enterprise Southbridge PCI Express Root Port 3"; +static const char pci_device_8086_2696[] = "Enterprise Southbridge PCI Express Root Port 4"; +static const char pci_device_8086_2698[] = "Enterprise Southbridge AC '97 Audio"; +static const char pci_device_8086_2699[] = "Enterprise Southbridge AC '97 Modem"; +static const char pci_device_8086_269a[] = "Enterprise Southbridge High Definition Audio"; +static const char pci_device_8086_269b[] = "Enterprise Southbridge SMBus"; +static const char pci_device_8086_269e[] = "Enterprise Southbridge PATA"; +static const char pci_device_8086_2770[] = "945G/GZ/P/PL Express Memory Controller Hub"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2770_8086_544e[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_2771[] = "945G/GZ/P/PL Express PCI Express Root Port"; +static const char pci_device_8086_2772[] = "945G/GZ Express Integrated Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2772_8086_544e[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_2774[] = "955X Express Memory Controller Hub"; +static const char pci_device_8086_2775[] = "955X Express PCI Express Root Port"; +static const char pci_device_8086_2776[] = "945G/GZ Express Integrated Graphics Controller"; +static const char pci_device_8086_2778[] = "E7230 Memory Controller Hub"; +static const char pci_device_8086_2779[] = "E7230 PCI Express Root Port"; +static const char pci_device_8086_277a[] = "975X Express PCI Express Root Port"; +static const char pci_device_8086_277c[] = "975X Express Memory Controller Hub"; +static const char pci_device_8086_277d[] = "975X Express PCI Express Root Port"; +static const char pci_device_8086_2782[] = "82915G Express Chipset Family Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2782_1043_2582[] = "P5GD1-VW Mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2782_1734_105b[] = "Scenic W620"; +#endif +static const char pci_device_8086_2792[] = "Mobile 915GM/GMS/910GML Express Graphics Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2792_103c_099c[] = "nx6110/nc6120"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_2792_1043_1881[] = "GMA 900 915GM Integrated Graphics"; +#endif +static const char pci_device_8086_27a0[] = "Mobile 945GM/PM/GMS/940GML and 945GT Express Memory Controller Hub"; +static const char pci_device_8086_27a1[] = "Mobile 945GM/PM/GMS/940GML and 945GT Express PCI Express Root Port"; +static const char pci_device_8086_27a2[] = "Mobile 945GM/GMS/940GML Express Integrated Graphics Controller"; +static const char pci_device_8086_27a6[] = "Mobile 945GM/GMS/940GML Express Integrated Graphics Controller"; +static const char pci_device_8086_27b0[] = "82801GH (ICH7DH) LPC Interface Bridge"; +static const char pci_device_8086_27b8[] = "82801GB/GR (ICH7 Family) LPC Interface Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27b8_8086_544e[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_27b9[] = "82801GBM (ICH7-M) LPC Interface Bridge"; +static const char pci_device_8086_27bd[] = "82801GHM (ICH7-M DH) LPC Interface Bridge"; +static const char pci_device_8086_27c0[] = "82801GB/GR/GH (ICH7 Family) Serial ATA Storage Controller IDE"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c0_8086_544e[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_27c1[] = "82801GR/GH (ICH7 Family) Serial ATA Storage Controller AHCI"; +static const char pci_device_8086_27c3[] = "82801GR/GH (ICH7 Family) Serial ATA Storage Controller RAID"; +static const char pci_device_8086_27c4[] = "82801GBM/GHM (ICH7 Family) Serial ATA Storage Controller IDE"; +static const char pci_device_8086_27c5[] = "82801GBM/GHM (ICH7 Family) Serial ATA Storage Controller AHCI"; +static const char pci_device_8086_27c6[] = "82801GHM (ICH7-M DH) Serial ATA Storage Controller RAID"; +static const char pci_device_8086_27c8[] = "82801G (ICH7 Family) USB UHCI #1"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c8_8086_544e[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_27c9[] = "82801G (ICH7 Family) USB UHCI #2"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27c9_8086_544e[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_27ca[] = "82801G (ICH7 Family) USB UHCI #3"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27ca_8086_544e[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_27cb[] = "82801G (ICH7 Family) USB UHCI #4"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27cb_8086_544e[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_27cc[] = "82801G (ICH7 Family) USB2 EHCI Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27cc_8086_544e[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_27d0[] = "82801G (ICH7 Family) PCI Express Port 1"; +static const char pci_device_8086_27d2[] = "82801G (ICH7 Family) PCI Express Port 2"; +static const char pci_device_8086_27d4[] = "82801G (ICH7 Family) PCI Express Port 3"; +static const char pci_device_8086_27d6[] = "82801G (ICH7 Family) PCI Express Port 4"; +static const char pci_device_8086_27d8[] = "82801G (ICH7 Family) High Definition Audio Controller"; +static const char pci_device_8086_27da[] = "82801G (ICH7 Family) SMBus Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27da_8086_544e[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_27dc[] = "82801G (ICH7 Family) LAN Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27dc_8086_308d[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_27dd[] = "82801G (ICH7 Family) AC'97 Modem Controller"; +static const char pci_device_8086_27de[] = "82801G (ICH7 Family) AC'97 Audio Controller"; +static const char pci_device_8086_27df[] = "82801G (ICH7 Family) IDE Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_27df_8086_544e[] = "DeskTop Board D945GTP"; +#endif +static const char pci_device_8086_27e0[] = "82801GR/GH/GHM (ICH7 Family) PCI Express Port 5"; +static const char pci_device_8086_27e2[] = "82801GR/GH/GHM (ICH7 Family) PCI Express Port 6"; +static const char pci_device_8086_2810[] = "LPC Interface Controller"; +static const char pci_device_8086_2811[] = "Mobile LPC Interface Controller"; +static const char pci_device_8086_2812[] = "LPC Interface Controller"; +static const char pci_device_8086_2814[] = "LPC Interface Controller"; +static const char pci_device_8086_2815[] = "Mobile LPC Interface Controller"; +static const char pci_device_8086_2820[] = "SATA Controller 1 IDE"; +static const char pci_device_8086_2821[] = "SATA Controller AHCI"; +static const char pci_device_8086_2822[] = "SATA Controller RAID"; +static const char pci_device_8086_2824[] = "SATA Controller AHCI"; +static const char pci_device_8086_2825[] = "SATA Controller 2 IDE"; +static const char pci_device_8086_2828[] = "Mobile SATA Controller IDE"; +static const char pci_device_8086_2829[] = "Mobile SATA Controller AHCI"; +static const char pci_device_8086_282a[] = "Mobile SATA Controller RAID"; +static const char pci_device_8086_2830[] = "USB UHCI Controller #1"; +static const char pci_device_8086_2831[] = "USB UHCI Controller #2"; +static const char pci_device_8086_2832[] = "USB UHCI Controller #3"; +static const char pci_device_8086_2834[] = "USB UHCI Controller #4"; +static const char pci_device_8086_2835[] = "USB UHCI Controller #5"; +static const char pci_device_8086_2836[] = "USB2 EHCI Controller #1"; +static const char pci_device_8086_283a[] = "USB2 EHCI Controller #2"; +static const char pci_device_8086_283e[] = "SMBus Controller"; +static const char pci_device_8086_283f[] = "PCI Express Port 1"; +static const char pci_device_8086_2841[] = "PCI Express Port 2"; +static const char pci_device_8086_2843[] = "PCI Express Port 3"; +static const char pci_device_8086_2845[] = "PCI Express Port 4"; +static const char pci_device_8086_2847[] = "PCI Express Port 5"; +static const char pci_device_8086_2849[] = "PCI Express Port 6"; +static const char pci_device_8086_284b[] = "HD Audio Controller"; +static const char pci_device_8086_284f[] = "Thermal Subsystem"; +static const char pci_device_8086_2850[] = "Mobile IDE Controller"; +static const char pci_device_8086_2970[] = "Memory Controller Hub"; +static const char pci_device_8086_2971[] = "PCI Express Root Port"; +static const char pci_device_8086_2972[] = "Integrated Graphics Controller"; +static const char pci_device_8086_2973[] = "Integrated Graphics Controller"; +static const char pci_device_8086_2974[] = "HECI Controller"; +static const char pci_device_8086_2976[] = "PT IDER Controller"; +static const char pci_device_8086_2977[] = "KT Controller"; +static const char pci_device_8086_2990[] = "Memory Controller Hub"; +static const char pci_device_8086_2991[] = "PCI Express Root Port"; +static const char pci_device_8086_2992[] = "Integrated Graphics Controller"; +static const char pci_device_8086_2993[] = "Integrated Graphics Controller"; +static const char pci_device_8086_2994[] = "HECI Controller"; +static const char pci_device_8086_2995[] = "HECI Controller"; +static const char pci_device_8086_2996[] = "PT IDER Controller"; +static const char pci_device_8086_2997[] = "KT Controller"; +static const char pci_device_8086_29a0[] = "Memory Controller Hub"; +static const char pci_device_8086_29a1[] = "PCI Express Root Port"; +static const char pci_device_8086_29a2[] = "Integrated Graphics Controller"; +static const char pci_device_8086_29a3[] = "Integrated Graphics Controller"; +static const char pci_device_8086_29a4[] = "HECI Controller"; +static const char pci_device_8086_29a5[] = "HECI Controller"; +static const char pci_device_8086_29a6[] = "PT IDER Controller"; +static const char pci_device_8086_29a7[] = "KT Controller"; +static const char pci_device_8086_3092[] = "Integrated RAID"; +static const char pci_device_8086_3200[] = "GD31244 PCI-X SATA HBA"; +static const char pci_device_8086_3340[] = "82855PM Processor to I/O Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3340_1025_005a[] = "TravelMate 290"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3340_103c_088c[] = "nc8000 laptop"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3340_103c_0890[] = "nc6000 laptop"; +#endif +static const char pci_device_8086_3341[] = "82855PM Processor to AGP Controller"; +static const char pci_device_8086_3500[] = "Enterprise Southbridge PCI Express Upstream Port"; +static const char pci_device_8086_3501[] = "Enterprise Southbridge PCI Express Upstream Port"; +static const char pci_device_8086_3504[] = "Enterprise Southbridge IOxAPIC"; +static const char pci_device_8086_3505[] = "Enterprise Southbridge IOxAPIC"; +static const char pci_device_8086_350c[] = "Enterprise Southbridge PCI Express to PCI-X Bridge"; +static const char pci_device_8086_350d[] = "Enterprise Southbridge PCI Express to PCI-X Bridge"; +static const char pci_device_8086_3510[] = "Enterprise Southbridge PCI Express Downstream Port E1"; +static const char pci_device_8086_3511[] = "Enterprise Southbridge PCI Express Downstream Port E1"; +static const char pci_device_8086_3514[] = "Enterprise Southbridge PCI Express Downstream Port E2"; +static const char pci_device_8086_3515[] = "Enterprise Southbridge PCI Express Downstream Port E2"; +static const char pci_device_8086_3518[] = "Enterprise Southbridge PCI Express Downstream Port E3"; +static const char pci_device_8086_3519[] = "Enterprise Southbridge PCI Express Downstream Port E3"; +static const char pci_device_8086_3575[] = "82830 830 Chipset Host Bridge"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3575_0e11_0030[] = "Evo N600c"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3575_1014_021d[] = "ThinkPad A/T/X Series"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3575_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP"; +#endif +static const char pci_device_8086_3576[] = "82830 830 Chipset AGP Bridge"; +static const char pci_device_8086_3577[] = "82830 CGC [Chipset Graphics Controller]"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3577_1014_0513[] = "ThinkPad A/T/X Series"; +#endif +static const char pci_device_8086_3578[] = "82830 830 Chipset Host Bridge"; +static const char pci_device_8086_3580[] = "82852/82855 GM/GME/PM/GMV Processor to I/O Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3580_1028_0139[] = "Latitude D400"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3580_1028_0163[] = "Latitude D505"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3580_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3580_1734_1055[] = "Amilo M1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3580_4c53_10b0[] = "CL9 mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3580_4c53_10e0[] = "PSL09 PrPMC"; +#endif +static const char pci_device_8086_3581[] = "82852/82855 GM/GME/PM/GMV Processor to AGP Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3581_1734_1055[] = "Amilo M1420"; +#endif +static const char pci_device_8086_3582[] = "82852/855GM Integrated Graphics Device"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3582_1028_0139[] = "Latitude D400"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3582_1028_0163[] = "Latitude D505"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3582_4c53_10b0[] = "CL9 mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3582_4c53_10e0[] = "PSL09 PrPMC"; +#endif +static const char pci_device_8086_3584[] = "82852/82855 GM/GME/PM/GMV Processor to I/O Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3584_1028_0139[] = "Latitude D400"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3584_1028_0163[] = "Latitude D505"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3584_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3584_1734_1055[] = "Amilo M1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3584_4c53_10b0[] = "CL9 mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3584_4c53_10e0[] = "PSL09 PrPMC"; +#endif +static const char pci_device_8086_3585[] = "82852/82855 GM/GME/PM/GMV Processor to I/O Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3585_1028_0139[] = "Latitude D400"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3585_1028_0163[] = "Latitude D505"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3585_1028_0196[] = "Inspiron 5160"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3585_1734_1055[] = "Amilo M1420"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3585_4c53_10b0[] = "CL9 mainboard"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3585_4c53_10e0[] = "PSL09 PrPMC"; #endif static const char pci_device_8086_3590[] = "E7520 Memory Controller Hub"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3590_1028_019a[] = "PowerEdge SC1425"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3590_1734_103e[] = "Primergy RX300 S2"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3590_4c53_10d0[] = "Telum ASLP10 Processor AMC"; +#endif static const char pci_device_8086_3591[] = "E7525/E7520 Error Reporting Registers"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3591_1028_0169[] = "Precision 470"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3591_4c53_10d0[] = "Telum ASLP10 Processor AMC"; +#endif static const char pci_device_8086_3592[] = "E7320 Memory Controller Hub"; static const char pci_device_8086_3593[] = "E7320 Error Reporting Registers"; static const char pci_device_8086_3594[] = "E7520 DMA Controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_3594_4c53_10d0[] = "Telum ASLP10 Processor AMC"; +#endif static const char pci_device_8086_3595[] = "E7525/E7520/E7320 PCI Express Port A"; static const char pci_device_8086_3596[] = "E7525/E7520/E7320 PCI Express Port A1"; static const char pci_device_8086_3597[] = "E7525/E7520 PCI Express Port B"; @@ -19043,8 +22888,26 @@ static const char pci_device_8086_359a[] = "E7520 PCI Express Port C1"; static const char pci_device_8086_359b[] = "E7525/E7520/E7320 Extended Configuration Registers"; static const char pci_device_8086_359e[] = "E7525 Memory Controller Hub"; -static const char pci_device_8086_4220[] = "PRO/Wireless 2200BG"; -static const char pci_device_8086_4223[] = "PRO/Wireless 2915ABG MiniPCI Adapter"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_359e_1028_0169[] = "Precision 470"; +#endif +static const char pci_device_8086_4220[] = "PRO/Wireless 2200BG Network Connection"; +static const char pci_device_8086_4222[] = "PRO/Wireless 3945ABG Network Connection"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4222_8086_1005[] = "PRO/Wireless 3945BG Network Connection"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4222_8086_1034[] = "PRO/Wireless 3945BG Network Connection"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4222_8086_1044[] = "PRO/Wireless 3945BG Network Connection"; +#endif +static const char pci_device_8086_4223[] = "PRO/Wireless 2915ABG Network Connection"; +static const char pci_device_8086_4224[] = "PRO/Wireless 2915ABG Network Connection"; +static const char pci_device_8086_4227[] = "PRO/Wireless 3945ABG Network Connection"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_4227_8086_1014[] = "PRO/Wireless 3945BG Network Connection"; +#endif static const char pci_device_8086_5200[] = "EtherExpress PRO/100 Intelligent Server"; static const char pci_device_8086_5201[] = "EtherExpress PRO/100 Intelligent Server"; #ifdef INIT_SUBSYS_INFO @@ -19055,7 +22918,8 @@ static const char pci_device_8086_7010[] = "82371SB PIIX3 IDE [Natoma/Triton II]"; static const char pci_device_8086_7020[] = "82371SB PIIX3 USB [Natoma/Triton II]"; static const char pci_device_8086_7030[] = "430VX - 82437VX TVX [Triton VX]"; -static const char pci_device_8086_7050[] = "Intel Intercast Video Capture Card"; +static const char pci_device_8086_7050[] = "Intercast Video Capture Card"; +static const char pci_device_8086_7051[] = "PB 642365-003 (Business Video Conferencing Card)"; static const char pci_device_8086_7100[] = "430TX - 82439TX MTXC"; static const char pci_device_8086_7110[] = "82371AB/EB/MB PIIX4 ISA"; #ifdef INIT_SUBSYS_INFO @@ -19200,16 +23064,24 @@ static const char pci_device_8086_84e4[] = "460GX - 84460GX Memory Data Controller (MDC)"; static const char pci_device_8086_84e6[] = "460GX - 82466GX Wide and fast PCI eXpander Bridge (WXB)"; static const char pci_device_8086_84ea[] = "460GX - 84460GX AGP Bridge (GXB function 1)"; -static const char pci_device_8086_8500[] = "IXP4XX - Intel Network Processor family. IXP420, IXP421, IXP422, IXP425 and IXC1100"; +static const char pci_device_8086_8500[] = "IXP4XX Intel Network Processor (IXP420/421/422/425/IXC1100)"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_8500_1993_0ded[] = "mGuard-PCI AV#2"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_8500_1993_0dee[] = "mGuard-PCI AV#1"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_8086_8500_1993_0def[] = "mGuard-PCI AV#0"; +#endif static const char pci_device_8086_9000[] = "IXP2000 Family Network Processor"; static const char pci_device_8086_9001[] = "IXP2400 Network Processor"; +static const char pci_device_8086_9002[] = "IXP2300 Network Processor"; static const char pci_device_8086_9004[] = "IXP2800 Network Processor"; static const char pci_device_8086_9621[] = "Integrated RAID"; static const char pci_device_8086_9622[] = "Integrated RAID"; static const char pci_device_8086_9641[] = "Integrated RAID"; static const char pci_device_8086_96a1[] = "Integrated RAID"; -static const char pci_device_8086_a01f[] = "PRO/10GbE LR Server Adapter"; -static const char pci_device_8086_a11f[] = "PRO/10GbE LR Server Adapter"; static const char pci_device_8086_b152[] = "21152 PCI-to-PCI Bridge"; static const char pci_device_8086_b154[] = "21154 PCI-to-PCI Bridge"; static const char pci_device_8086_b555[] = "21555 Non transparent PCI-to-PCI Bridge"; @@ -19225,7 +23097,6 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_8086_b555_e4bf_1000[] = "CC8-1-BLUES"; #endif -static const char pci_device_8086_ffff[] = "450NX/GX [Orion] - 82453KX/GX Memory controller [BUG]"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_8401[] = "TRENDware International Inc."; #endif @@ -19240,6 +23111,9 @@ static const char pci_vendor_8888[] = "Silicon Magic"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_8912[] = "TRX"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_8c4a[] = "Winbond"; static const char pci_device_8c4a_1980[] = "W89C940 misprogrammed [ne2k]"; #endif @@ -19553,6 +23427,7 @@ static const char pci_subsys_9005_00cf_8086_3411[] = "SDS2 Mainboard"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_device_9005_0241[] = "Serial ATA II RAID 1420SA"; static const char pci_device_9005_0250[] = "ServeRAID Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_0250_1014_0279[] = "ServeRAID-xx"; @@ -19575,6 +23450,9 @@ static const char pci_subsys_9005_0285_0e11_0295[] = "SATA 6Ch (Bearcat)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_1014_02f2[] = "ServeRAID 8i"; +#endif #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_0285_1028_0287[] = "PowerEdge Expandable RAID Controller 320/DC"; @@ -19585,6 +23463,11 @@ static const char pci_subsys_9005_0285_1028_0291[] = "CERC SATA RAID 2 PCI SATA 6ch (DellCorsair)"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_103c_3227[] = "AAR-2610SA"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_0285_17aa_0286[] = "Legend S220 (Legend Crusader)"; #endif @@ -19610,7 +23493,13 @@ static const char pci_subsys_9005_0285_9005_028a[] = "ASR-2020S PCI-X ZCR (Skyhawk)"; #endif #ifdef INIT_SUBSYS_INFO -static const char pci_subsys_9005_0285_9005_028b[] = "ASR-2020S SO-DIMM PCI-X ZCR (Terminator)"; +static const char pci_subsys_9005_0285_9005_028b[] = "ASR-2025S (Terminator)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_9005_028e[] = "ASR-2020SA (Skyhawk)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_9005_028f[] = "ASR-2025SA"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_0285_9005_0290[] = "AAR-2410SA PCI SATA 4ch (Jaguar II)"; @@ -19624,14 +23513,105 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_0285_9005_0294[] = "ESD SO-DIMM PCI-X SATA ZCR (Prowler)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_9005_0296[] = "ASR-2240S"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_9005_0297[] = "ASR-4005SAS"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_9005_0298[] = "ASR-4000SAS"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_9005_0299[] = "ASR-4800SAS"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0285_9005_029a[] = "ASR-4805SAS"; +#endif static const char pci_device_9005_0286[] = "AAC-RAID (Rocket)"; #ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_1014_9540[] = "ServeRAID 8k/8k-l4"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_1014_9580[] = "ServeRAID 8k/8k-l8"; +#endif +#ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_0286_9005_028c[] = "ASR-2230S + ASR-2230SLP PCI-X (Lancer)"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_028d[] = "ASR-2130S"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_029b[] = "ASR-2820SA"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_029c[] = "ASR-2620SA"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_029d[] = "ASR-2420SA"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_029e[] = "ICP ICP9024R0"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_029f[] = "ICP ICP9014R0"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_02a0[] = "ICP ICP9047MA"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_02a1[] = "ICP ICP9087MA"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_02a2[] = "ASR-4810SAS"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_02a3[] = "ICP ICP5085AU"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_02a4[] = "ICP ICP5085LI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_02a5[] = "ICP ICP5085BR"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_02a6[] = "ICP9067MA"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_02a7[] = "AAR-2830SA"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_02a8[] = "AAR-2430SA"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_02a9[] = "ICP5087AU"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_02aa[] = "ICP5047AU"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0286_9005_0800[] = "Callisto"; +#endif +static const char pci_device_9005_0500[] = "Obsidian chipset SCSI controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0500_1014_02c1[] = "PCI-X DDR 3Gb SAS Adapter (572A/572C)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0500_1014_02c2[] = "PCI-X DDR 3Gb SAS RAID Adapter (572B/572D)"; +#endif +static const char pci_device_9005_0503[] = "Scamp chipset SCSI controller"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0503_1014_02bf[] = "Quad Channel PCI-X DDR U320 SCSI RAID Adapter (571E)"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_0503_1014_02d5[] = "Quad Channel PCI-X DDR U320 SCSI RAID Adapter (571F)"; +#endif +static const char pci_device_9005_0910[] = "AUA-3100B"; +static const char pci_device_9005_091e[] = "AUA-3100B"; static const char pci_device_9005_8000[] = "ASC-29320A U320"; static const char pci_device_9005_800f[] = "AIC-7901 U320"; static const char pci_device_9005_8010[] = "ASC-39320 U320"; -static const char pci_device_9005_8011[] = "ASC-32320D U320"; +static const char pci_device_9005_8011[] = "ASC-39320D"; #endif #ifdef INIT_SUBSYS_INFO static const char pci_subsys_9005_8011_0e11_00ac[] = "ASC-39320D U320"; @@ -19650,6 +23630,9 @@ static const char pci_device_9005_801d[] = "AIC-7902B U320"; static const char pci_device_9005_801e[] = "AIC-7901A U320"; static const char pci_device_9005_801f[] = "AIC-7902 U320"; +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_9005_801f_1734_1011[] = "Primergy RX300"; +#endif static const char pci_device_9005_8080[] = "ASC-29320A U320 w/HostRAID"; static const char pci_device_9005_808f[] = "AIC-7901 U320 w/HostRAID"; static const char pci_device_9005_8090[] = "ASC-39320 U320 w/HostRAID"; @@ -19683,6 +23666,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_9710[] = "NetMos Technology"; static const char pci_device_9710_7780[] = "USB IRDA-port"; +static const char pci_device_9710_9805[] = "PCI 1 port parallel adapter"; static const char pci_device_9710_9815[] = "PCI 9815 Multi-I/O Controller"; #ifdef INIT_SUBSYS_INFO static const char pci_subsys_9710_9815_1000_0020[] = "2P0S (2 port parallel adaptor)"; @@ -19745,6 +23729,11 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_aecb[] = "Adrienne Electronics Corporation"; +static const char pci_device_aecb_6250[] = "VITC/LTC Timecode Reader card [PCI-VLTC/RDR]"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_affe[] = "Sirrix AG security technologies"; +static const char pci_device_affe_dead[] = "Sirrix.PCI4S0 4-port ISDN S0 interface"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_b1b3[] = "Shiva Europe Limited"; @@ -19769,6 +23758,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_cafe[] = "Chrysalis-ITS"; +static const char pci_device_cafe_0003[] = "Luna K3 Hardware Security Module"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_cccc[] = "Catapult Communications"; @@ -19779,6 +23769,14 @@ static const char pci_device_cddd_0200[] = "DeepSea 2 High Speed Stereo Vision Frame Grabber"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_d161[] = "Digium, Inc."; +static const char pci_device_d161_0205[] = "Wildcard TE205P"; +static const char pci_device_d161_0210[] = "Wildcard TE210P"; +static const char pci_device_d161_0405[] = "Wildcard TE405P (2nd Gen)"; +static const char pci_device_d161_0410[] = "Wildcard TE410P (2nd Gen)"; +static const char pci_device_d161_2400[] = "Wildcard TDM2400P"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_d4d4[] = "Dy4 Systems Inc"; static const char pci_device_d4d4_0601[] = "PCI Mezzanine Card"; #endif @@ -19792,6 +23790,12 @@ static const char pci_vendor_dead[] = "Indigita Corporation"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_deaf[] = "Middle Digital Inc."; +static const char pci_device_deaf_9050[] = "PC Weasel Virtual VGA"; +static const char pci_device_deaf_9051[] = "PC Weasel Serial Port"; +static const char pci_device_deaf_9052[] = "PC Weasel Watchdog Timer"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_e000[] = "Winbond"; static const char pci_device_e000_e000[] = "W89C940"; #endif @@ -19804,6 +23808,26 @@ #ifdef INIT_SUBSYS_INFO static const char pci_subsys_e159_0001_0059_0003[] = "128k ISDN-U Adapter"; #endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_e159_0001_00a7_0001[] = "TELES.S0/PCI 2.x ISDN Adapter"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_e159_0001_6159_0001[] = "Digium Wildcard T100P T1/PRI"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_e159_0001_79fe_0001[] = "Digium Wildcard TE110P T1/E1 Interface"; +#endif +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_e159_0001_8086_0003[] = "Digium X100P/X101P analogue PSTN FXO interface"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_e159_0001_b1b9_0001[] = "Digium Wildcard TDM400P REV I 4-port POTS interface"; +#endif +#ifdef INIT_SUBSYS_INFO +static const char pci_subsys_e159_0001_b1b9_0003[] = "Digium Wildcard TDM400P REV I 4-port POTS interface"; +#endif static const char pci_device_e159_0002[] = "Tiger100APC ISDN chipset"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -19814,6 +23838,14 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_ea01[] = "Eagle Technology"; +static const char pci_device_ea01_000a[] = "PCI-773 Temperature Card"; +static const char pci_device_ea01_0032[] = "PCI-730 & PC104P-30 Card"; +static const char pci_device_ea01_003e[] = "PCI-762 Opto-Isolator Card"; +static const char pci_device_ea01_0041[] = "PCI-763 Reed Relay Card"; +static const char pci_device_ea01_0043[] = "PCI-769 Opto-Isolator Reed Relay Combo Card"; +static const char pci_device_ea01_0046[] = "PCI-766 Analog Output Card"; +static const char pci_device_ea01_0052[] = "PCI-703 Analog I/O Card"; +static const char pci_device_ea01_0800[] = "PCI-800 Digital I/O Card"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_ea60[] = "RME"; @@ -19844,13 +23876,6 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_ecc0[] = "Echo Digital Audio Corporation"; -static const char pci_device_ecc0_0050[] = "Gina24_301"; -static const char pci_device_ecc0_0051[] = "Gina24_361"; -static const char pci_device_ecc0_0060[] = "Layla24"; -static const char pci_device_ecc0_0070[] = "Mona_301_80"; -static const char pci_device_ecc0_0071[] = "Mona_301_66"; -static const char pci_device_ecc0_0072[] = "Mona_361"; -static const char pci_device_ecc0_0080[] = "Mia"; #endif static const char pci_vendor_edd8[] = "ARK Logic Inc"; static const char pci_device_edd8_a091[] = "1000PV [Stingray]"; @@ -19859,19 +23884,27 @@ static const char pci_device_edd8_a0a9[] = "2000MI"; #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_f1d0[] = "AJA Video"; -static const char pci_device_f1d0_cafe[] = "KONA SD SMPTE 259M I/O"; -static const char pci_device_f1d0_efac[] = "KONA SD SMPTE 259M I/O"; -static const char pci_device_f1d0_facd[] = "KONA HD SMPTE 292M I/O"; +static const char pci_device_f1d0_c0fe[] = "Xena HS/HD-R"; +static const char pci_device_f1d0_c0ff[] = "Kona/Xena 2"; +static const char pci_device_f1d0_cafe[] = "Kona SD"; +static const char pci_device_f1d0_cfee[] = "Xena LS/SD-22-DA/SD-DA"; +static const char pci_device_f1d0_dcaf[] = "Kona HD"; +static const char pci_device_f1d0_dfee[] = "Xena HD-DA"; +static const char pci_device_f1d0_efac[] = "Xena SD-MM/SD-22-MM"; +static const char pci_device_f1d0_facd[] = "Xena HD-MM"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_fa57[] = "Interagon AS"; static const char pci_device_fa57_0001[] = "PMC [Pattern Matching Chip]"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_fab7[] = "Fabric7 Systems, Inc."; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_febd[] = "Ultraview Corp."; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const char pci_vendor_feda[] = "Broadcom Inc (nee Epigram)"; +static const char pci_vendor_feda[] = "Broadcom Inc"; static const char pci_device_feda_a0fa[] = "BCM4210 iLine10 HomePNA 2.0"; static const char pci_device_feda_a10e[] = "BCM4230 iLine10 HomePNA 2.0"; #endif @@ -19880,6 +23913,10 @@ static const char pci_device_fede_0003[] = "TABIC PCI v3"; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const char pci_vendor_fffd[] = "XenSource, Inc."; +static const char pci_device_fffd_0101[] = "PCI Event Channel Controller"; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const char pci_vendor_fffe[] = "VMWare Inc"; static const char pci_device_fffe_0405[] = "Virtual SVGA 4.0"; static const char pci_device_fffe_0710[] = "Virtual SVGA"; @@ -20088,6 +24125,12 @@ #undef pci_ss_info_4c53_1310 #define pci_ss_info_4c53_1310 pci_ss_info_1000_0021_4c53_1310 #endif +static const pciSubsystemInfo pci_ss_info_1000_0030_0e11_00da = + {0x0e11, 0x00da, pci_subsys_1000_0030_0e11_00da, 0}; +#undef pci_ss_info_0e11_00da +#define pci_ss_info_0e11_00da pci_ss_info_1000_0030_0e11_00da +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_1000_0030_1028_0123 = {0x1028, 0x0123, pci_subsys_1000_0030_1028_0123, 0}; #undef pci_ss_info_1028_0123 @@ -20106,11 +24149,25 @@ #define pci_ss_info_1028_016c pci_ss_info_1000_0030_1028_016c #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_1000_0030_1028_0183 = + {0x1028, 0x0183, pci_subsys_1000_0030_1028_0183, 0}; +#undef pci_ss_info_1028_0183 +#define pci_ss_info_1028_0183 pci_ss_info_1000_0030_1028_0183 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_1000_0030_1028_1010 = {0x1028, 0x1010, pci_subsys_1000_0030_1028_1010, 0}; #undef pci_ss_info_1028_1010 #define pci_ss_info_1028_1010 pci_ss_info_1000_0030_1028_1010 #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1000_0030_124b_1170 = + {0x124b, 0x1170, pci_subsys_1000_0030_124b_1170, 0}; +#undef pci_ss_info_124b_1170 +#define pci_ss_info_124b_1170 pci_ss_info_1000_0030_124b_1170 +static const pciSubsystemInfo pci_ss_info_1000_0030_1734_1052 = + {0x1734, 0x1052, pci_subsys_1000_0030_1734_1052, 0}; +#undef pci_ss_info_1734_1052 +#define pci_ss_info_1734_1052 pci_ss_info_1000_0030_1734_1052 static const pciSubsystemInfo pci_ss_info_1000_0032_1000_1000 = {0x1000, 0x1000, pci_subsys_1000_0032_1000_1000, 0}; #undef pci_ss_info_1000_1000 @@ -20123,6 +24180,10 @@ {0x1000, 0x0066, pci_subsys_1000_0040_1000_0066, 0}; #undef pci_ss_info_1000_0066 #define pci_ss_info_1000_0066 pci_ss_info_1000_0040_1000_0066 +static const pciSubsystemInfo pci_ss_info_1000_0062_1000_0062 = + {0x1000, 0x0062, pci_subsys_1000_0062_1000_0062, 0}; +#undef pci_ss_info_1000_0062 +#define pci_ss_info_1000_0062 pci_ss_info_1000_0062_1000_0062 #endif static const pciSubsystemInfo pci_ss_info_1000_008f_1092_8000 = {0x1092, 0x8000, pci_subsys_1000_008f_1092_8000, 0}; @@ -20314,6 +24375,10 @@ {0x1002, 0x0003, pci_subsys_1002_4150_1002_0003, 0}; #undef pci_ss_info_1002_0003 #define pci_ss_info_1002_0003 pci_ss_info_1002_4150_1002_0003 +static const pciSubsystemInfo pci_ss_info_1002_4150_1002_4722 = + {0x1002, 0x4722, pci_subsys_1002_4150_1002_4722, 0}; +#undef pci_ss_info_1002_4722 +#define pci_ss_info_1002_4722 pci_ss_info_1002_4150_1002_4722 static const pciSubsystemInfo pci_ss_info_1002_4150_1458_4024 = {0x1458, 0x4024, pci_subsys_1002_4150_1458_4024, 0}; #undef pci_ss_info_1458_4024 @@ -20350,10 +24415,38 @@ {0x1002, 0x0002, pci_subsys_1002_4152_1002_0002, 0}; #undef pci_ss_info_1002_0002 #define pci_ss_info_1002_0002 pci_ss_info_1002_4152_1002_0002 +static const pciSubsystemInfo pci_ss_info_1002_4152_1002_4772 = + {0x1002, 0x4772, pci_subsys_1002_4152_1002_4772, 0}; +#undef pci_ss_info_1002_4772 +#define pci_ss_info_1002_4772 pci_ss_info_1002_4152_1002_4772 static const pciSubsystemInfo pci_ss_info_1002_4152_1043_c002 = {0x1043, 0xc002, pci_subsys_1002_4152_1043_c002, 0}; #undef pci_ss_info_1043_c002 #define pci_ss_info_1043_c002 pci_ss_info_1002_4152_1043_c002 +static const pciSubsystemInfo pci_ss_info_1002_4152_1043_c01a = + {0x1043, 0xc01a, pci_subsys_1002_4152_1043_c01a, 0}; +#undef pci_ss_info_1043_c01a +#define pci_ss_info_1043_c01a pci_ss_info_1002_4152_1043_c01a +static const pciSubsystemInfo pci_ss_info_1002_4152_174b_7c29 = + {0x174b, 0x7c29, pci_subsys_1002_4152_174b_7c29, 0}; +#undef pci_ss_info_174b_7c29 +#define pci_ss_info_174b_7c29 pci_ss_info_1002_4152_174b_7c29 +static const pciSubsystemInfo pci_ss_info_1002_4152_1787_4002 = + {0x1787, 0x4002, pci_subsys_1002_4152_1787_4002, 0}; +#undef pci_ss_info_1787_4002 +#define pci_ss_info_1787_4002 pci_ss_info_1002_4152_1787_4002 +static const pciSubsystemInfo pci_ss_info_1002_4153_1462_932c = + {0x1462, 0x932c, pci_subsys_1002_4153_1462_932c, 0}; +#undef pci_ss_info_1462_932c +#define pci_ss_info_1462_932c pci_ss_info_1002_4153_1462_932c +static const pciSubsystemInfo pci_ss_info_1002_4170_1002_0003 = + {0x1002, 0x0003, pci_subsys_1002_4170_1002_0003, 0}; +#undef pci_ss_info_1002_0003 +#define pci_ss_info_1002_0003 pci_ss_info_1002_4170_1002_0003 +static const pciSubsystemInfo pci_ss_info_1002_4170_1002_4723 = + {0x1002, 0x4723, pci_subsys_1002_4170_1002_4723, 0}; +#undef pci_ss_info_1002_4723 +#define pci_ss_info_1002_4723 pci_ss_info_1002_4170_1002_4723 static const pciSubsystemInfo pci_ss_info_1002_4170_1458_4025 = {0x1458, 0x4025, pci_subsys_1002_4170_1458_4025, 0}; #undef pci_ss_info_1458_4025 @@ -20382,18 +24475,42 @@ {0x1002, 0x0003, pci_subsys_1002_4172_1002_0003, 0}; #undef pci_ss_info_1002_0003 #define pci_ss_info_1002_0003 pci_ss_info_1002_4172_1002_0003 +static const pciSubsystemInfo pci_ss_info_1002_4172_1002_4773 = + {0x1002, 0x4773, pci_subsys_1002_4172_1002_4773, 0}; +#undef pci_ss_info_1002_4773 +#define pci_ss_info_1002_4773 pci_ss_info_1002_4172_1002_4773 static const pciSubsystemInfo pci_ss_info_1002_4172_1043_c003 = {0x1043, 0xc003, pci_subsys_1002_4172_1043_c003, 0}; #undef pci_ss_info_1043_c003 #define pci_ss_info_1043_c003 pci_ss_info_1002_4172_1043_c003 +static const pciSubsystemInfo pci_ss_info_1002_4172_1043_c01b = + {0x1043, 0xc01b, pci_subsys_1002_4172_1043_c01b, 0}; +#undef pci_ss_info_1043_c01b +#define pci_ss_info_1043_c01b pci_ss_info_1002_4172_1043_c01b +static const pciSubsystemInfo pci_ss_info_1002_4172_174b_7c28 = + {0x174b, 0x7c28, pci_subsys_1002_4172_174b_7c28, 0}; +#undef pci_ss_info_174b_7c28 +#define pci_ss_info_174b_7c28 pci_ss_info_1002_4172_174b_7c28 +static const pciSubsystemInfo pci_ss_info_1002_4172_1787_4003 = + {0x1787, 0x4003, pci_subsys_1002_4172_1787_4003, 0}; +#undef pci_ss_info_1787_4003 +#define pci_ss_info_1787_4003 pci_ss_info_1002_4172_1787_4003 static const pciSubsystemInfo pci_ss_info_1002_4242_1002_02aa = {0x1002, 0x02aa, pci_subsys_1002_4242_1002_02aa, 0}; #undef pci_ss_info_1002_02aa #define pci_ss_info_1002_02aa pci_ss_info_1002_4242_1002_02aa +static const pciSubsystemInfo pci_ss_info_1002_4336_1002_4336 = + {0x1002, 0x4336, pci_subsys_1002_4336_1002_4336, 0}; +#undef pci_ss_info_1002_4336 +#define pci_ss_info_1002_4336 pci_ss_info_1002_4336_1002_4336 static const pciSubsystemInfo pci_ss_info_1002_4336_103c_0024 = {0x103c, 0x0024, pci_subsys_1002_4336_103c_0024, 0}; #undef pci_ss_info_103c_0024 #define pci_ss_info_103c_0024 pci_ss_info_1002_4336_103c_0024 +static const pciSubsystemInfo pci_ss_info_1002_4336_161f_2029 = + {0x161f, 0x2029, pci_subsys_1002_4336_161f_2029, 0}; +#undef pci_ss_info_161f_2029 +#define pci_ss_info_161f_2029 pci_ss_info_1002_4336_161f_2029 static const pciSubsystemInfo pci_ss_info_1002_4337_1014_053a = {0x1014, 0x053a, pci_subsys_1002_4337_1014_053a, 0}; #undef pci_ss_info_1014_053a @@ -20402,6 +24519,42 @@ {0x103c, 0x0850, pci_subsys_1002_4337_103c_0850, 0}; #undef pci_ss_info_103c_0850 #define pci_ss_info_103c_0850 pci_ss_info_1002_4337_103c_0850 +static const pciSubsystemInfo pci_ss_info_1002_4370_103c_308b = + {0x103c, 0x308b, pci_subsys_1002_4370_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_1002_4370_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4371_103c_308b = + {0x103c, 0x308b, pci_subsys_1002_4371_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_1002_4371_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4372_103c_308b = + {0x103c, 0x308b, pci_subsys_1002_4372_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_1002_4372_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4373_103c_308b = + {0x103c, 0x308b, pci_subsys_1002_4373_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_1002_4373_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4374_103c_308b = + {0x103c, 0x308b, pci_subsys_1002_4374_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_1002_4374_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4375_103c_308b = + {0x103c, 0x308b, pci_subsys_1002_4375_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_1002_4375_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4376_103c_308b = + {0x103c, 0x308b, pci_subsys_1002_4376_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_1002_4376_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4377_103c_308b = + {0x103c, 0x308b, pci_subsys_1002_4377_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_1002_4377_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_4378_103c_308b = + {0x103c, 0x308b, pci_subsys_1002_4378_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_1002_4378_103c_308b static const pciSubsystemInfo pci_ss_info_1002_4742_1002_0040 = {0x1002, 0x0040, pci_subsys_1002_4742_1002_0040, 0}; #undef pci_ss_info_1002_0040 @@ -20554,6 +24707,14 @@ {0x1028, 0x00d9, pci_subsys_1002_4752_1028_00d9, 0}; #undef pci_ss_info_1028_00d9 #define pci_ss_info_1028_00d9 pci_ss_info_1002_4752_1028_00d9 +static const pciSubsystemInfo pci_ss_info_1002_4752_1028_0134 = + {0x1028, 0x0134, pci_subsys_1002_4752_1028_0134, 0}; +#undef pci_ss_info_1028_0134 +#define pci_ss_info_1028_0134 pci_ss_info_1002_4752_1028_0134 +static const pciSubsystemInfo pci_ss_info_1002_4752_1734_007a = + {0x1734, 0x007a, pci_subsys_1002_4752_1734_007a, 0}; +#undef pci_ss_info_1734_007a +#define pci_ss_info_1734_007a pci_ss_info_1002_4752_1734_007a static const pciSubsystemInfo pci_ss_info_1002_4752_8086_3411 = {0x8086, 0x3411, pci_subsys_1002_4752_8086_3411, 0}; #undef pci_ss_info_8086_3411 @@ -20706,6 +24867,22 @@ {0x1028, 0x00aa, pci_subsys_1002_4c4d_1028_00aa, 0}; #undef pci_ss_info_1028_00aa #define pci_ss_info_1028_00aa pci_ss_info_1002_4c4d_1028_00aa +static const pciSubsystemInfo pci_ss_info_1002_4c4d_1028_00bb = + {0x1028, 0x00bb, pci_subsys_1002_4c4d_1028_00bb, 0}; +#undef pci_ss_info_1028_00bb +#define pci_ss_info_1028_00bb pci_ss_info_1002_4c4d_1028_00bb +static const pciSubsystemInfo pci_ss_info_1002_4c4d_10e1_10cf = + {0x10e1, 0x10cf, pci_subsys_1002_4c4d_10e1_10cf, 0}; +#undef pci_ss_info_10e1_10cf +#define pci_ss_info_10e1_10cf pci_ss_info_1002_4c4d_10e1_10cf +static const pciSubsystemInfo pci_ss_info_1002_4c4d_1179_ff00 = + {0x1179, 0xff00, pci_subsys_1002_4c4d_1179_ff00, 0}; +#undef pci_ss_info_1179_ff00 +#define pci_ss_info_1179_ff00 pci_ss_info_1002_4c4d_1179_ff00 +static const pciSubsystemInfo pci_ss_info_1002_4c4d_13bd_1019 = + {0x13bd, 0x1019, pci_subsys_1002_4c4d_13bd_1019, 0}; +#undef pci_ss_info_13bd_1019 +#define pci_ss_info_13bd_1019 pci_ss_info_1002_4c4d_13bd_1019 static const pciSubsystemInfo pci_ss_info_1002_4c50_1002_4c50 = {0x1002, 0x4c50, pci_subsys_1002_4c50_1002_4c50, 0}; #undef pci_ss_info_1002_4c50 @@ -20730,6 +24907,10 @@ {0x144d, 0xc006, pci_subsys_1002_4c57_144d_c006, 0}; #undef pci_ss_info_144d_c006 #define pci_ss_info_144d_c006 pci_ss_info_1002_4c57_144d_c006 +static const pciSubsystemInfo pci_ss_info_1002_4c59_0e11_b111 = + {0x0e11, 0xb111, pci_subsys_1002_4c59_0e11_b111, 0}; +#undef pci_ss_info_0e11_b111 +#define pci_ss_info_0e11_b111 pci_ss_info_1002_4c59_0e11_b111 static const pciSubsystemInfo pci_ss_info_1002_4c59_1014_0235 = {0x1014, 0x0235, pci_subsys_1002_4c59_1014_0235, 0}; #undef pci_ss_info_1014_0235 @@ -20742,6 +24923,18 @@ {0x104d, 0x80e7, pci_subsys_1002_4c59_104d_80e7, 0}; #undef pci_ss_info_104d_80e7 #define pci_ss_info_104d_80e7 pci_ss_info_1002_4c59_104d_80e7 +static const pciSubsystemInfo pci_ss_info_1002_4c59_1509_1930 = + {0x1509, 0x1930, pci_subsys_1002_4c59_1509_1930, 0}; +#undef pci_ss_info_1509_1930 +#define pci_ss_info_1509_1930 pci_ss_info_1002_4c59_1509_1930 +static const pciSubsystemInfo pci_ss_info_1002_4e44_1002_515e = + {0x1002, 0x515e, pci_subsys_1002_4e44_1002_515e, 0}; +#undef pci_ss_info_1002_515e +#define pci_ss_info_1002_515e pci_ss_info_1002_4e44_1002_515e +static const pciSubsystemInfo pci_ss_info_1002_4e44_1002_5965 = + {0x1002, 0x5965, pci_subsys_1002_4e44_1002_5965, 0}; +#undef pci_ss_info_1002_5965 +#define pci_ss_info_1002_5965 pci_ss_info_1002_4e44_1002_5965 static const pciSubsystemInfo pci_ss_info_1002_4e45_1002_0002 = {0x1002, 0x0002, pci_subsys_1002_4e45_1002_0002, 0}; #undef pci_ss_info_1002_0002 @@ -20754,6 +24947,10 @@ {0x1025, 0x005a, pci_subsys_1002_4e50_1025_005a, 0}; #undef pci_ss_info_1025_005a #define pci_ss_info_1025_005a pci_ss_info_1002_4e50_1025_005a +static const pciSubsystemInfo pci_ss_info_1002_4e50_103c_088c = + {0x103c, 0x088c, pci_subsys_1002_4e50_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_1002_4e50_103c_088c static const pciSubsystemInfo pci_ss_info_1002_4e50_103c_0890 = {0x103c, 0x0890, pci_subsys_1002_4e50_103c_0890, 0}; #undef pci_ss_info_103c_0890 @@ -20770,6 +24967,10 @@ {0x1681, 0x0003, pci_subsys_1002_4e65_1681_0003, 0}; #undef pci_ss_info_1681_0003 #define pci_ss_info_1681_0003 pci_ss_info_1002_4e65_1681_0003 +static const pciSubsystemInfo pci_ss_info_1002_4e6a_1002_4e71 = + {0x1002, 0x4e71, pci_subsys_1002_4e6a_1002_4e71, 0}; +#undef pci_ss_info_1002_4e71 +#define pci_ss_info_1002_4e71 pci_ss_info_1002_4e6a_1002_4e71 static const pciSubsystemInfo pci_ss_info_1002_5044_1002_0028 = {0x1002, 0x0028, pci_subsys_1002_5044_1002_0028, 0}; #undef pci_ss_info_1002_0028 @@ -20970,6 +25171,18 @@ {0x1002, 0x013a, pci_subsys_1002_5159_1002_013a, 0}; #undef pci_ss_info_1002_013a #define pci_ss_info_1002_013a pci_ss_info_1002_5159_1002_013a +static const pciSubsystemInfo pci_ss_info_1002_5159_1014_029a = + {0x1014, 0x029a, pci_subsys_1002_5159_1014_029a, 0}; +#undef pci_ss_info_1014_029a +#define pci_ss_info_1014_029a pci_ss_info_1002_5159_1014_029a +static const pciSubsystemInfo pci_ss_info_1002_5159_1014_02c8 = + {0x1014, 0x02c8, pci_subsys_1002_5159_1014_02c8, 0}; +#undef pci_ss_info_1014_02c8 +#define pci_ss_info_1014_02c8 pci_ss_info_1002_5159_1014_02c8 +static const pciSubsystemInfo pci_ss_info_1002_5159_1028_019a = + {0x1028, 0x019a, pci_subsys_1002_5159_1028_019a, 0}; +#undef pci_ss_info_1028_019a +#define pci_ss_info_1028_019a pci_ss_info_1002_5159_1028_019a static const pciSubsystemInfo pci_ss_info_1002_5159_1458_4002 = {0x1458, 0x4002, pci_subsys_1002_5159_1458_4002, 0}; #undef pci_ss_info_1458_4002 @@ -21102,6 +25315,10 @@ {0x1002, 0x5654, pci_subsys_1002_5654_1002_5654, 0}; #undef pci_ss_info_1002_5654 #define pci_ss_info_1002_5654 pci_ss_info_1002_5654_1002_5654 +static const pciSubsystemInfo pci_ss_info_1002_5941_1458_4019 = + {0x1458, 0x4019, pci_subsys_1002_5941_1458_4019, 0}; +#undef pci_ss_info_1458_4019 +#define pci_ss_info_1458_4019 pci_ss_info_1002_5941_1458_4019 static const pciSubsystemInfo pci_ss_info_1002_5941_174b_7c12 = {0x174b, 0x7c12, pci_subsys_1002_5941_174b_7c12, 0}; #undef pci_ss_info_174b_7c12 @@ -21114,10 +25331,30 @@ {0x18bc, 0x0050, pci_subsys_1002_5941_18bc_0050, 0}; #undef pci_ss_info_18bc_0050 #define pci_ss_info_18bc_0050 pci_ss_info_1002_5941_18bc_0050 +static const pciSubsystemInfo pci_ss_info_1002_5950_103c_308b = + {0x103c, 0x308b, pci_subsys_1002_5950_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_1002_5950_103c_308b +static const pciSubsystemInfo pci_ss_info_1002_5954_1002_5954 = + {0x1002, 0x5954, pci_subsys_1002_5954_1002_5954, 0}; +#undef pci_ss_info_1002_5954 +#define pci_ss_info_1002_5954 pci_ss_info_1002_5954_1002_5954 +static const pciSubsystemInfo pci_ss_info_1002_5955_1002_5955 = + {0x1002, 0x5955, pci_subsys_1002_5955_1002_5955, 0}; +#undef pci_ss_info_1002_5955 +#define pci_ss_info_1002_5955 pci_ss_info_1002_5955_1002_5955 +static const pciSubsystemInfo pci_ss_info_1002_5955_103c_308b = + {0x103c, 0x308b, pci_subsys_1002_5955_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_1002_5955_103c_308b static const pciSubsystemInfo pci_ss_info_1002_5961_1002_2f72 = {0x1002, 0x2f72, pci_subsys_1002_5961_1002_2f72, 0}; #undef pci_ss_info_1002_2f72 #define pci_ss_info_1002_2f72 pci_ss_info_1002_5961_1002_2f72 +static const pciSubsystemInfo pci_ss_info_1002_5961_1019_4c30 = + {0x1019, 0x4c30, pci_subsys_1002_5961_1019_4c30, 0}; +#undef pci_ss_info_1019_4c30 +#define pci_ss_info_1019_4c30 pci_ss_info_1002_5961_1019_4c30 static const pciSubsystemInfo pci_ss_info_1002_5961_12ab_5961 = {0x12ab, 0x5961, pci_subsys_1002_5961_12ab_5961, 0}; #undef pci_ss_info_12ab_5961 @@ -21154,6 +25391,10 @@ {0x1458, 0x4018, pci_subsys_1002_5964_1458_4018, 0}; #undef pci_ss_info_1458_4018 #define pci_ss_info_1458_4018 pci_ss_info_1002_5964_1458_4018 +static const pciSubsystemInfo pci_ss_info_1002_5964_147b_6191 = + {0x147b, 0x6191, pci_subsys_1002_5964_147b_6191, 0}; +#undef pci_ss_info_147b_6191 +#define pci_ss_info_147b_6191 pci_ss_info_1002_5964_147b_6191 static const pciSubsystemInfo pci_ss_info_1002_5964_148c_2073 = {0x148c, 0x2073, pci_subsys_1002_5964_148c_2073, 0}; #undef pci_ss_info_148c_2073 @@ -21182,6 +25423,22 @@ {0x1043, 0x002a, pci_subsys_1002_5b60_1043_002a, 0}; #undef pci_ss_info_1043_002a #define pci_ss_info_1043_002a pci_ss_info_1002_5b60_1043_002a +static const pciSubsystemInfo pci_ss_info_1002_5b60_1043_032e = + {0x1043, 0x032e, pci_subsys_1002_5b60_1043_032e, 0}; +#undef pci_ss_info_1043_032e +#define pci_ss_info_1043_032e pci_ss_info_1002_5b60_1043_032e +static const pciSubsystemInfo pci_ss_info_1002_5b60_1462_0402 = + {0x1462, 0x0402, pci_subsys_1002_5b60_1462_0402, 0}; +#undef pci_ss_info_1462_0402 +#define pci_ss_info_1462_0402 pci_ss_info_1002_5b60_1462_0402 +static const pciSubsystemInfo pci_ss_info_1002_5b70_1462_0403 = + {0x1462, 0x0403, pci_subsys_1002_5b70_1462_0403, 0}; +#undef pci_ss_info_1462_0403 +#define pci_ss_info_1462_0403 pci_ss_info_1002_5b70_1462_0403 +static const pciSubsystemInfo pci_ss_info_1002_5c63_1002_5c63 = + {0x1002, 0x5c63, pci_subsys_1002_5c63_1002_5c63, 0}; +#undef pci_ss_info_1002_5c63 +#define pci_ss_info_1002_5c63 pci_ss_info_1002_5c63_1002_5c63 static const pciSubsystemInfo pci_ss_info_1002_5d44_1458_4019 = {0x1458, 0x4019, pci_subsys_1002_5d44_1458_4019, 0}; #undef pci_ss_info_1458_4019 @@ -21206,6 +25463,54 @@ {0x18bc, 0x0172, pci_subsys_1002_5d44_18bc_0172, 0}; #undef pci_ss_info_18bc_0172 #define pci_ss_info_18bc_0172 pci_ss_info_1002_5d44_18bc_0172 +static const pciSubsystemInfo pci_ss_info_1002_5d52_1002_0b12 = + {0x1002, 0x0b12, pci_subsys_1002_5d52_1002_0b12, 0}; +#undef pci_ss_info_1002_0b12 +#define pci_ss_info_1002_0b12 pci_ss_info_1002_5d52_1002_0b12 +static const pciSubsystemInfo pci_ss_info_1002_5d52_1002_0b13 = + {0x1002, 0x0b13, pci_subsys_1002_5d52_1002_0b13, 0}; +#undef pci_ss_info_1002_0b13 +#define pci_ss_info_1002_0b13 pci_ss_info_1002_5d52_1002_0b13 +static const pciSubsystemInfo pci_ss_info_1002_5e4d_148c_2116 = + {0x148c, 0x2116, pci_subsys_1002_5e4d_148c_2116, 0}; +#undef pci_ss_info_148c_2116 +#define pci_ss_info_148c_2116 pci_ss_info_1002_5e4d_148c_2116 +static const pciSubsystemInfo pci_ss_info_1002_5e6d_148c_2117 = + {0x148c, 0x2117, pci_subsys_1002_5e6d_148c_2117, 0}; +#undef pci_ss_info_148c_2117 +#define pci_ss_info_148c_2117 pci_ss_info_1002_5e6d_148c_2117 +static const pciSubsystemInfo pci_ss_info_1002_7109_1002_0322 = + {0x1002, 0x0322, pci_subsys_1002_7109_1002_0322, 0}; +#undef pci_ss_info_1002_0322 +#define pci_ss_info_1002_0322 pci_ss_info_1002_7109_1002_0322 +static const pciSubsystemInfo pci_ss_info_1002_7109_1002_0d02 = + {0x1002, 0x0d02, pci_subsys_1002_7109_1002_0d02, 0}; +#undef pci_ss_info_1002_0d02 +#define pci_ss_info_1002_0d02 pci_ss_info_1002_7109_1002_0d02 +static const pciSubsystemInfo pci_ss_info_1002_7129_1002_0323 = + {0x1002, 0x0323, pci_subsys_1002_7129_1002_0323, 0}; +#undef pci_ss_info_1002_0323 +#define pci_ss_info_1002_0323 pci_ss_info_1002_7129_1002_0323 +static const pciSubsystemInfo pci_ss_info_1002_7129_1002_0d03 = + {0x1002, 0x0d03, pci_subsys_1002_7129_1002_0d03, 0}; +#undef pci_ss_info_1002_0d03 +#define pci_ss_info_1002_0d03 pci_ss_info_1002_7129_1002_0d03 +static const pciSubsystemInfo pci_ss_info_1002_7142_1002_0322 = + {0x1002, 0x0322, pci_subsys_1002_7142_1002_0322, 0}; +#undef pci_ss_info_1002_0322 +#define pci_ss_info_1002_0322 pci_ss_info_1002_7142_1002_0322 +static const pciSubsystemInfo pci_ss_info_1002_7146_1002_0322 = + {0x1002, 0x0322, pci_subsys_1002_7146_1002_0322, 0}; +#undef pci_ss_info_1002_0322 +#define pci_ss_info_1002_0322 pci_ss_info_1002_7146_1002_0322 +static const pciSubsystemInfo pci_ss_info_1002_7162_1002_0323 = + {0x1002, 0x0323, pci_subsys_1002_7162_1002_0323, 0}; +#undef pci_ss_info_1002_0323 +#define pci_ss_info_1002_0323 pci_ss_info_1002_7162_1002_0323 +static const pciSubsystemInfo pci_ss_info_1002_7166_1002_0323 = + {0x1002, 0x0323, pci_subsys_1002_7166_1002_0323, 0}; +#undef pci_ss_info_1002_0323 +#define pci_ss_info_1002_0323 pci_ss_info_1002_7166_1002_0323 #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1004_0304_1004_0304 = {0x1004, 0x0304, pci_subsys_1004_0304_1004_0304, 0}; @@ -21248,6 +25553,10 @@ {0x103c, 0x0024, pci_subsys_100b_0020_103c_0024, 0}; #undef pci_ss_info_103c_0024 #define pci_ss_info_103c_0024 pci_ss_info_100b_0020_103c_0024 +static const pciSubsystemInfo pci_ss_info_100b_0020_12d9_000c = + {0x12d9, 0x000c, pci_subsys_100b_0020_12d9_000c, 0}; +#undef pci_ss_info_12d9_000c +#define pci_ss_info_12d9_000c pci_ss_info_100b_0020_12d9_000c static const pciSubsystemInfo pci_ss_info_100b_0020_1385_f311 = {0x1385, 0xf311, pci_subsys_100b_0020_1385_f311, 0}; #undef pci_ss_info_1385_f311 @@ -21540,6 +25849,10 @@ {0x1013, 0x4280, pci_subsys_1013_6003_1013_4280, 0}; #undef pci_ss_info_1013_4280 #define pci_ss_info_1013_4280 pci_ss_info_1013_6003_1013_4280 +static const pciSubsystemInfo pci_ss_info_1013_6003_153b_1136 = + {0x153b, 0x1136, pci_subsys_1013_6003_153b_1136, 0}; +#undef pci_ss_info_153b_1136 +#define pci_ss_info_153b_1136 pci_ss_info_1013_6003_153b_1136 static const pciSubsystemInfo pci_ss_info_1013_6003_1681_0050 = {0x1681, 0x0050, pci_subsys_1013_6003_1681_0050, 0}; #undef pci_ss_info_1681_0050 @@ -21707,6 +26020,30 @@ {0x1014, 0x0252, pci_subsys_1014_0219_1014_0252, 0}; #undef pci_ss_info_1014_0252 #define pci_ss_info_1014_0252 pci_ss_info_1014_0219_1014_0252 +static const pciSubsystemInfo pci_ss_info_1014_028c_1014_028d = + {0x1014, 0x028d, pci_subsys_1014_028c_1014_028d, 0}; +#undef pci_ss_info_1014_028d +#define pci_ss_info_1014_028d pci_ss_info_1014_028c_1014_028d +static const pciSubsystemInfo pci_ss_info_1014_028c_1014_02be = + {0x1014, 0x02be, pci_subsys_1014_028c_1014_02be, 0}; +#undef pci_ss_info_1014_02be +#define pci_ss_info_1014_02be pci_ss_info_1014_028c_1014_02be +static const pciSubsystemInfo pci_ss_info_1014_028c_1014_02c0 = + {0x1014, 0x02c0, pci_subsys_1014_028c_1014_02c0, 0}; +#undef pci_ss_info_1014_02c0 +#define pci_ss_info_1014_02c0 pci_ss_info_1014_028c_1014_02c0 +static const pciSubsystemInfo pci_ss_info_1014_028c_1014_030d = + {0x1014, 0x030d, pci_subsys_1014_028c_1014_030d, 0}; +#undef pci_ss_info_1014_030d +#define pci_ss_info_1014_030d pci_ss_info_1014_028c_1014_030d +static const pciSubsystemInfo pci_ss_info_1014_02bd_1014_02c1 = + {0x1014, 0x02c1, pci_subsys_1014_02bd_1014_02c1, 0}; +#undef pci_ss_info_1014_02c1 +#define pci_ss_info_1014_02c1 pci_ss_info_1014_02bd_1014_02c1 +static const pciSubsystemInfo pci_ss_info_1014_02bd_1014_02c2 = + {0x1014, 0x02c2, pci_subsys_1014_02bd_1014_02c2, 0}; +#undef pci_ss_info_1014_02c2 +#define pci_ss_info_1014_02c2 pci_ss_info_1014_02bd_1014_02c2 #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_101e_1960_101e_0471 = @@ -21765,6 +26102,12 @@ #undef pci_ss_info_1028_0511 #define pci_ss_info_1028_0511 pci_ss_info_101e_1960_1028_0511 #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_101e_1960_103c_60e7 = + {0x103c, 0x60e7, pci_subsys_101e_1960_103c_60e7, 0}; +#undef pci_ss_info_103c_60e7 +#define pci_ss_info_103c_60e7 pci_ss_info_101e_1960_103c_60e7 +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_101e_9063_101e_0767 = {0x101e, 0x0767, pci_subsys_101e_9063_101e_0767, 0}; #undef pci_ss_info_101e_0767 @@ -21822,6 +26165,14 @@ {0x1259, 0x2701, pci_subsys_1022_2000_1259_2701, 0}; #undef pci_ss_info_1259_2701 #define pci_ss_info_1259_2701 pci_ss_info_1022_2000_1259_2701 +static const pciSubsystemInfo pci_ss_info_1022_2000_1259_2702 = + {0x1259, 0x2702, pci_subsys_1022_2000_1259_2702, 0}; +#undef pci_ss_info_1259_2702 +#define pci_ss_info_1259_2702 pci_ss_info_1022_2000_1259_2702 +static const pciSubsystemInfo pci_ss_info_1022_2000_1259_2703 = + {0x1259, 0x2703, pci_subsys_1022_2000_1259_2703, 0}; +#undef pci_ss_info_1259_2703 +#define pci_ss_info_1259_2703 pci_ss_info_1022_2000_1259_2703 static const pciSubsystemInfo pci_ss_info_1022_2000_4c53_1000 = {0x4c53, 0x1000, pci_subsys_1022_2000_4c53_1000, 0}; #undef pci_ss_info_4c53_1000 @@ -21874,6 +26225,10 @@ {0x161f, 0x3017, pci_subsys_1022_7468_161f_3017, 0}; #undef pci_ss_info_161f_3017 #define pci_ss_info_161f_3017 pci_ss_info_1022_7468_161f_3017 +static const pciSubsystemInfo pci_ss_info_1022_7469_1022_2b80 = + {0x1022, 0x2b80, pci_subsys_1022_7469_1022_2b80, 0}; +#undef pci_ss_info_1022_2b80 +#define pci_ss_info_1022_2b80 pci_ss_info_1022_7469_1022_2b80 static const pciSubsystemInfo pci_ss_info_1022_7469_161f_3017 = {0x161f, 0x3017, pci_subsys_1022_7469_161f_3017, 0}; #undef pci_ss_info_161f_3017 @@ -21910,6 +26265,10 @@ {0x1014, 0x0502, pci_subsys_1023_8620_1014_0502, 0}; #undef pci_ss_info_1014_0502 #define pci_ss_info_1014_0502 pci_ss_info_1023_8620_1014_0502 +static const pciSubsystemInfo pci_ss_info_1023_8620_1014_1025 = + {0x1014, 0x1025, pci_subsys_1023_8620_1014_1025, 0}; +#undef pci_ss_info_1014_1025 +#define pci_ss_info_1014_1025 pci_ss_info_1023_8620_1014_1025 static const pciSubsystemInfo pci_ss_info_1023_9525_10cf_1094 = {0x10cf, 0x1094, pci_subsys_1023_9525_10cf_1094, 0}; #undef pci_ss_info_10cf_1094 @@ -22390,6 +26749,26 @@ {0x102b, 0x0840, pci_subsys_102b_0527_102b_0840, 0}; #undef pci_ss_info_102b_0840 #define pci_ss_info_102b_0840 pci_ss_info_102b_0527_102b_0840 +static const pciSubsystemInfo pci_ss_info_102b_0527_102b_0850 = + {0x102b, 0x0850, pci_subsys_102b_0527_102b_0850, 0}; +#undef pci_ss_info_102b_0850 +#define pci_ss_info_102b_0850 pci_ss_info_102b_0527_102b_0850 +static const pciSubsystemInfo pci_ss_info_102b_0528_102b_1020 = + {0x102b, 0x1020, pci_subsys_102b_0528_102b_1020, 0}; +#undef pci_ss_info_102b_1020 +#define pci_ss_info_102b_1020 pci_ss_info_102b_0528_102b_1020 +static const pciSubsystemInfo pci_ss_info_102b_0528_102b_1030 = + {0x102b, 0x1030, pci_subsys_102b_0528_102b_1030, 0}; +#undef pci_ss_info_102b_1030 +#define pci_ss_info_102b_1030 pci_ss_info_102b_0528_102b_1030 +static const pciSubsystemInfo pci_ss_info_102b_0528_102b_14e1 = + {0x102b, 0x14e1, pci_subsys_102b_0528_102b_14e1, 0}; +#undef pci_ss_info_102b_14e1 +#define pci_ss_info_102b_14e1 pci_ss_info_102b_0528_102b_14e1 +static const pciSubsystemInfo pci_ss_info_102b_0528_102b_2021 = + {0x102b, 0x2021, pci_subsys_102b_0528_102b_2021, 0}; +#undef pci_ss_info_102b_2021 +#define pci_ss_info_102b_2021 pci_ss_info_102b_0528_102b_2021 static const pciSubsystemInfo pci_ss_info_102b_1000_102b_ff01 = {0x102b, 0xff01, pci_subsys_102b_1000_102b_ff01, 0}; #undef pci_ss_info_102b_ff01 @@ -22438,6 +26817,50 @@ {0x102b, 0x1e41, pci_subsys_102b_2527_102b_1e41, 0}; #undef pci_ss_info_102b_1e41 #define pci_ss_info_102b_1e41 pci_ss_info_102b_2527_102b_1e41 +static const pciSubsystemInfo pci_ss_info_102b_2537_102b_1820 = + {0x102b, 0x1820, pci_subsys_102b_2537_102b_1820, 0}; +#undef pci_ss_info_102b_1820 +#define pci_ss_info_102b_1820 pci_ss_info_102b_2537_102b_1820 +static const pciSubsystemInfo pci_ss_info_102b_2537_102b_1830 = + {0x102b, 0x1830, pci_subsys_102b_2537_102b_1830, 0}; +#undef pci_ss_info_102b_1830 +#define pci_ss_info_102b_1830 pci_ss_info_102b_2537_102b_1830 +static const pciSubsystemInfo pci_ss_info_102b_2537_102b_1c10 = + {0x102b, 0x1c10, pci_subsys_102b_2537_102b_1c10, 0}; +#undef pci_ss_info_102b_1c10 +#define pci_ss_info_102b_1c10 pci_ss_info_102b_2537_102b_1c10 +static const pciSubsystemInfo pci_ss_info_102b_2537_102b_2811 = + {0x102b, 0x2811, pci_subsys_102b_2537_102b_2811, 0}; +#undef pci_ss_info_102b_2811 +#define pci_ss_info_102b_2811 pci_ss_info_102b_2537_102b_2811 +static const pciSubsystemInfo pci_ss_info_102b_2537_102b_2c11 = + {0x102b, 0x2c11, pci_subsys_102b_2537_102b_2c11, 0}; +#undef pci_ss_info_102b_2c11 +#define pci_ss_info_102b_2c11 pci_ss_info_102b_2537_102b_2c11 +static const pciSubsystemInfo pci_ss_info_102b_2538_102b_08c7 = + {0x102b, 0x08c7, pci_subsys_102b_2538_102b_08c7, 0}; +#undef pci_ss_info_102b_08c7 +#define pci_ss_info_102b_08c7 pci_ss_info_102b_2538_102b_08c7 +static const pciSubsystemInfo pci_ss_info_102b_2538_102b_0907 = + {0x102b, 0x0907, pci_subsys_102b_2538_102b_0907, 0}; +#undef pci_ss_info_102b_0907 +#define pci_ss_info_102b_0907 pci_ss_info_102b_2538_102b_0907 +static const pciSubsystemInfo pci_ss_info_102b_2538_102b_1047 = + {0x102b, 0x1047, pci_subsys_102b_2538_102b_1047, 0}; +#undef pci_ss_info_102b_1047 +#define pci_ss_info_102b_1047 pci_ss_info_102b_2538_102b_1047 +static const pciSubsystemInfo pci_ss_info_102b_2538_102b_1087 = + {0x102b, 0x1087, pci_subsys_102b_2538_102b_1087, 0}; +#undef pci_ss_info_102b_1087 +#define pci_ss_info_102b_1087 pci_ss_info_102b_2538_102b_1087 +static const pciSubsystemInfo pci_ss_info_102b_2538_102b_2538 = + {0x102b, 0x2538, pci_subsys_102b_2538_102b_2538, 0}; +#undef pci_ss_info_102b_2538 +#define pci_ss_info_102b_2538 pci_ss_info_102b_2538_102b_2538 +static const pciSubsystemInfo pci_ss_info_102b_2538_102b_3007 = + {0x102b, 0x3007, pci_subsys_102b_2538_102b_3007, 0}; +#undef pci_ss_info_102b_3007 +#define pci_ss_info_102b_3007 pci_ss_info_102b_2538_102b_3007 static const pciSubsystemInfo pci_ss_info_102c_00c0_102c_00c0 = {0x102c, 0x00c0, pci_subsys_102c_00c0_102c_00c0, 0}; #undef pci_ss_info_102c_00c0 @@ -22470,6 +26893,10 @@ {0x0e11, 0xb049, pci_subsys_102c_00e5_0e11_b049, 0}; #undef pci_ss_info_0e11_b049 #define pci_ss_info_0e11_b049 pci_ss_info_102c_00e5_0e11_b049 +static const pciSubsystemInfo pci_ss_info_102c_00e5_1179_0001 = + {0x1179, 0x0001, pci_subsys_102c_00e5_1179_0001, 0}; +#undef pci_ss_info_1179_0001 +#define pci_ss_info_1179_0001 pci_ss_info_102c_00e5_1179_0001 static const pciSubsystemInfo pci_ss_info_102c_0c30_4c53_1000 = {0x4c53, 0x1000, pci_subsys_102c_0c30_4c53_1000, 0}; #undef pci_ss_info_4c53_1000 @@ -22492,6 +26919,10 @@ #undef pci_ss_info_102f_00f8 #define pci_ss_info_102f_00f8 pci_ss_info_102f_0020_102f_00f8 #endif +static const pciSubsystemInfo pci_ss_info_1033_0035_1033_0035 = + {0x1033, 0x0035, pci_subsys_1033_0035_1033_0035, 0}; +#undef pci_ss_info_1033_0035 +#define pci_ss_info_1033_0035 pci_ss_info_1033_0035_1033_0035 static const pciSubsystemInfo pci_ss_info_1033_0035_1179_0001 = {0x1179, 0x0001, pci_subsys_1033_0035_1179_0001, 0}; #undef pci_ss_info_1179_0001 @@ -22500,10 +26931,22 @@ {0x12ee, 0x7000, pci_subsys_1033_0035_12ee_7000, 0}; #undef pci_ss_info_12ee_7000 #define pci_ss_info_12ee_7000 pci_ss_info_1033_0035_12ee_7000 +static const pciSubsystemInfo pci_ss_info_1033_0035_14c2_0105 = + {0x14c2, 0x0105, pci_subsys_1033_0035_14c2_0105, 0}; +#undef pci_ss_info_14c2_0105 +#define pci_ss_info_14c2_0105 pci_ss_info_1033_0035_14c2_0105 static const pciSubsystemInfo pci_ss_info_1033_0035_1799_0001 = {0x1799, 0x0001, pci_subsys_1033_0035_1799_0001, 0}; #undef pci_ss_info_1799_0001 #define pci_ss_info_1799_0001 pci_ss_info_1033_0035_1799_0001 +static const pciSubsystemInfo pci_ss_info_1033_0035_1931_000a = + {0x1931, 0x000a, pci_subsys_1033_0035_1931_000a, 0}; +#undef pci_ss_info_1931_000a +#define pci_ss_info_1931_000a pci_ss_info_1033_0035_1931_000a +static const pciSubsystemInfo pci_ss_info_1033_0035_1931_000b = + {0x1931, 0x000b, pci_subsys_1033_0035_1931_000b, 0}; +#undef pci_ss_info_1931_000b +#define pci_ss_info_1931_000b pci_ss_info_1033_0035_1931_000b static const pciSubsystemInfo pci_ss_info_1033_0035_807d_0035 = {0x807d, 0x0035, pci_subsys_1033_0035_807d_0035, 0}; #undef pci_ss_info_807d_0035 @@ -22548,14 +26991,14 @@ {0x12ee, 0x8011, pci_subsys_1033_00cd_12ee_8011, 0}; #undef pci_ss_info_12ee_8011 #define pci_ss_info_12ee_8011 pci_ss_info_1033_00cd_12ee_8011 -static const pciSubsystemInfo pci_ss_info_1033_00e0_0ee4_3383 = - {0x0ee4, 0x3383, pci_subsys_1033_00e0_0ee4_3383, 0}; -#undef pci_ss_info_0ee4_3383 -#define pci_ss_info_0ee4_3383 pci_ss_info_1033_00e0_0ee4_3383 static const pciSubsystemInfo pci_ss_info_1033_00e0_12ee_7001 = {0x12ee, 0x7001, pci_subsys_1033_00e0_12ee_7001, 0}; #undef pci_ss_info_12ee_7001 #define pci_ss_info_12ee_7001 pci_ss_info_1033_00e0_12ee_7001 +static const pciSubsystemInfo pci_ss_info_1033_00e0_14c2_0205 = + {0x14c2, 0x0205, pci_subsys_1033_00e0_14c2_0205, 0}; +#undef pci_ss_info_14c2_0205 +#define pci_ss_info_14c2_0205 pci_ss_info_1033_00e0_14c2_0205 static const pciSubsystemInfo pci_ss_info_1033_00e0_1799_0002 = {0x1799, 0x0002, pci_subsys_1033_00e0_1799_0002, 0}; #undef pci_ss_info_1799_0002 @@ -22644,10 +27087,18 @@ {0x1039, 0x7000, pci_subsys_1039_7001_1039_7000, 0}; #undef pci_ss_info_1039_7000 #define pci_ss_info_1039_7000 pci_ss_info_1039_7001_1039_7000 +static const pciSubsystemInfo pci_ss_info_1039_7001_1462_5470 = + {0x1462, 0x5470, pci_subsys_1039_7001_1462_5470, 0}; +#undef pci_ss_info_1462_5470 +#define pci_ss_info_1462_5470 pci_ss_info_1039_7001_1462_5470 static const pciSubsystemInfo pci_ss_info_1039_7002_1509_7002 = {0x1509, 0x7002, pci_subsys_1039_7002_1509_7002, 0}; #undef pci_ss_info_1509_7002 #define pci_ss_info_1509_7002 pci_ss_info_1039_7002_1509_7002 +static const pciSubsystemInfo pci_ss_info_1039_7012_15bd_1001 = + {0x15bd, 0x1001, pci_subsys_1039_7012_15bd_1001, 0}; +#undef pci_ss_info_15bd_1001 +#define pci_ss_info_15bd_1001 pci_ss_info_1039_7012_15bd_1001 static const pciSubsystemInfo pci_ss_info_1039_7016_1039_7016 = {0x1039, 0x7016, pci_subsys_1039_7016_1039_7016, 0}; #undef pci_ss_info_1039_7016 @@ -22804,6 +27255,24 @@ {0x103c, 0x1282, pci_subsys_103c_1048_103c_1282, 0}; #undef pci_ss_info_103c_1282 #define pci_ss_info_103c_1282 pci_ss_info_103c_1048_103c_1282 +static const pciSubsystemInfo pci_ss_info_103c_1048_103c_1301 = + {0x103c, 0x1301, pci_subsys_103c_1048_103c_1301, 0}; +#undef pci_ss_info_103c_1301 +#define pci_ss_info_103c_1301 pci_ss_info_103c_1048_103c_1301 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1043_0675_0675_1704 = + {0x0675, 0x1704, pci_subsys_1043_0675_0675_1704, 0}; +#undef pci_ss_info_0675_1704 +#define pci_ss_info_0675_1704 pci_ss_info_1043_0675_0675_1704 +static const pciSubsystemInfo pci_ss_info_1043_0675_0675_1707 = + {0x0675, 0x1707, pci_subsys_1043_0675_0675_1707, 0}; +#undef pci_ss_info_0675_1707 +#define pci_ss_info_0675_1707 pci_ss_info_1043_0675_0675_1707 +static const pciSubsystemInfo pci_ss_info_1043_0675_10cf_105e = + {0x10cf, 0x105e, pci_subsys_1043_0675_10cf_105e, 0}; +#undef pci_ss_info_10cf_105e +#define pci_ss_info_10cf_105e pci_ss_info_1043_0675_10cf_105e +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1044_a501_1044_c001 = {0x1044, 0xc001, pci_subsys_1044_a501_1044_c001, 0}; @@ -22949,6 +27418,16 @@ {0x1044, 0xc032, pci_subsys_1044_a511_1044_c032, 0}; #undef pci_ss_info_1044_c032 #define pci_ss_info_1044_c032 pci_ss_info_1044_a511_1044_c032 +static const pciSubsystemInfo pci_ss_info_1044_a511_1044_c035 = + {0x1044, 0xc035, pci_subsys_1044_a511_1044_c035, 0}; +#undef pci_ss_info_1044_c035 +#define pci_ss_info_1044_c035 pci_ss_info_1044_a511_1044_c035 +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1048_8901_1048_0935 = + {0x1048, 0x0935, pci_subsys_1048_8901_1048_0935, 0}; +#undef pci_ss_info_1048_0935 +#define pci_ss_info_1048_0935 pci_ss_info_1048_8901_1048_0935 #endif static const pciSubsystemInfo pci_ss_info_104c_3d07_1011_4d10 = {0x1011, 0x4d10, pci_subsys_104c_3d07_1011_4d10, 0}; @@ -22970,10 +27449,26 @@ {0x1048, 0x0a32, pci_subsys_104c_3d07_1048_0a32, 0}; #undef pci_ss_info_1048_0a32 #define pci_ss_info_1048_0a32 pci_ss_info_104c_3d07_1048_0a32 +static const pciSubsystemInfo pci_ss_info_104c_3d07_1048_0a34 = + {0x1048, 0x0a34, pci_subsys_104c_3d07_1048_0a34, 0}; +#undef pci_ss_info_1048_0a34 +#define pci_ss_info_1048_0a34 pci_ss_info_104c_3d07_1048_0a34 static const pciSubsystemInfo pci_ss_info_104c_3d07_1048_0a35 = {0x1048, 0x0a35, pci_subsys_104c_3d07_1048_0a35, 0}; #undef pci_ss_info_1048_0a35 #define pci_ss_info_1048_0a35 pci_ss_info_104c_3d07_1048_0a35 +static const pciSubsystemInfo pci_ss_info_104c_3d07_1048_0a36 = + {0x1048, 0x0a36, pci_subsys_104c_3d07_1048_0a36, 0}; +#undef pci_ss_info_1048_0a36 +#define pci_ss_info_1048_0a36 pci_ss_info_104c_3d07_1048_0a36 +static const pciSubsystemInfo pci_ss_info_104c_3d07_1048_0a43 = + {0x1048, 0x0a43, pci_subsys_104c_3d07_1048_0a43, 0}; +#undef pci_ss_info_1048_0a43 +#define pci_ss_info_1048_0a43 pci_ss_info_104c_3d07_1048_0a43 +static const pciSubsystemInfo pci_ss_info_104c_3d07_1048_0a44 = + {0x1048, 0x0a44, pci_subsys_104c_3d07_1048_0a44, 0}; +#undef pci_ss_info_1048_0a44 +#define pci_ss_info_1048_0a44 pci_ss_info_104c_3d07_1048_0a44 static const pciSubsystemInfo pci_ss_info_104c_3d07_107d_2633 = {0x107d, 0x2633, pci_subsys_104c_3d07_107d_2633, 0}; #undef pci_ss_info_107d_2633 @@ -23058,6 +27553,10 @@ {0xe4bf, 0x1010, pci_subsys_104c_8019_e4bf_1010, 0}; #undef pci_ss_info_e4bf_1010 #define pci_ss_info_e4bf_1010 pci_ss_info_104c_8019_e4bf_1010 +static const pciSubsystemInfo pci_ss_info_104c_8020_11bd_000f = + {0x11bd, 0x000f, pci_subsys_104c_8020_11bd_000f, 0}; +#undef pci_ss_info_11bd_000f +#define pci_ss_info_11bd_000f pci_ss_info_104c_8020_11bd_000f static const pciSubsystemInfo pci_ss_info_104c_8021_104d_80df = {0x104d, 0x80df, pci_subsys_104c_8021_104d_80df, 0}; #undef pci_ss_info_104d_80df @@ -23066,10 +27565,26 @@ {0x104d, 0x80e7, pci_subsys_104c_8021_104d_80e7, 0}; #undef pci_ss_info_104d_80e7 #define pci_ss_info_104d_80e7 pci_ss_info_104c_8021_104d_80e7 -static const pciSubsystemInfo pci_ss_info_104c_8025_55aa_55aa = - {0x55aa, 0x55aa, pci_subsys_104c_8025_55aa_55aa, 0}; -#undef pci_ss_info_55aa_55aa -#define pci_ss_info_55aa_55aa pci_ss_info_104c_8025_55aa_55aa +static const pciSubsystemInfo pci_ss_info_104c_8023_103c_088c = + {0x103c, 0x088c, pci_subsys_104c_8023_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_104c_8023_103c_088c +static const pciSubsystemInfo pci_ss_info_104c_8023_1043_808b = + {0x1043, 0x808b, pci_subsys_104c_8023_1043_808b, 0}; +#undef pci_ss_info_1043_808b +#define pci_ss_info_1043_808b pci_ss_info_104c_8023_1043_808b +static const pciSubsystemInfo pci_ss_info_104c_8025_1458_1000 = + {0x1458, 0x1000, pci_subsys_104c_8025_1458_1000, 0}; +#undef pci_ss_info_1458_1000 +#define pci_ss_info_1458_1000 pci_ss_info_104c_8025_1458_1000 +static const pciSubsystemInfo pci_ss_info_104c_8026_103c_006a = + {0x103c, 0x006a, pci_subsys_104c_8026_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_104c_8026_103c_006a +static const pciSubsystemInfo pci_ss_info_104c_8026_1043_808d = + {0x1043, 0x808d, pci_subsys_104c_8026_1043_808d, 0}; +#undef pci_ss_info_1043_808d +#define pci_ss_info_1043_808d pci_ss_info_104c_8026_1043_808d static const pciSubsystemInfo pci_ss_info_104c_8027_1028_00e6 = {0x1028, 0x00e6, pci_subsys_104c_8027_1028_00e6, 0}; #undef pci_ss_info_1028_00e6 @@ -23078,18 +27593,66 @@ {0x1028, 0x0163, pci_subsys_104c_8029_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_104c_8029_1028_0163 +static const pciSubsystemInfo pci_ss_info_104c_8029_1028_0196 = + {0x1028, 0x0196, pci_subsys_104c_8029_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_104c_8029_1028_0196 static const pciSubsystemInfo pci_ss_info_104c_8029_1071_8160 = {0x1071, 0x8160, pci_subsys_104c_8029_1071_8160, 0}; #undef pci_ss_info_1071_8160 #define pci_ss_info_1071_8160 pci_ss_info_104c_8029_1071_8160 -static const pciSubsystemInfo pci_ss_info_104c_8400_00fc_16ec = - {0x00fc, 0x16ec, pci_subsys_104c_8400_00fc_16ec, 0}; -#undef pci_ss_info_00fc_16ec -#define pci_ss_info_00fc_16ec pci_ss_info_104c_8400_00fc_16ec -static const pciSubsystemInfo pci_ss_info_104c_8400_00fd_16ec = - {0x00fd, 0x16ec, pci_subsys_104c_8400_00fd_16ec, 0}; -#undef pci_ss_info_00fd_16ec -#define pci_ss_info_00fd_16ec pci_ss_info_104c_8400_00fd_16ec +static const pciSubsystemInfo pci_ss_info_104c_802b_1028_0139 = + {0x1028, 0x0139, pci_subsys_104c_802b_1028_0139, 0}; +#undef pci_ss_info_1028_0139 +#define pci_ss_info_1028_0139 pci_ss_info_104c_802b_1028_0139 +static const pciSubsystemInfo pci_ss_info_104c_802b_1028_014e = + {0x1028, 0x014e, pci_subsys_104c_802b_1028_014e, 0}; +#undef pci_ss_info_1028_014e +#define pci_ss_info_1028_014e pci_ss_info_104c_802b_1028_014e +static const pciSubsystemInfo pci_ss_info_104c_8031_103c_099c = + {0x103c, 0x099c, pci_subsys_104c_8031_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_104c_8031_103c_099c +static const pciSubsystemInfo pci_ss_info_104c_8031_103c_308b = + {0x103c, 0x308b, pci_subsys_104c_8031_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_104c_8031_103c_308b +static const pciSubsystemInfo pci_ss_info_104c_8032_103c_099c = + {0x103c, 0x099c, pci_subsys_104c_8032_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_104c_8032_103c_099c +static const pciSubsystemInfo pci_ss_info_104c_8032_103c_308b = + {0x103c, 0x308b, pci_subsys_104c_8032_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_104c_8032_103c_308b +static const pciSubsystemInfo pci_ss_info_104c_8033_103c_099c = + {0x103c, 0x099c, pci_subsys_104c_8033_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_104c_8033_103c_099c +static const pciSubsystemInfo pci_ss_info_104c_8033_103c_308b = + {0x103c, 0x308b, pci_subsys_104c_8033_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_104c_8033_103c_308b +static const pciSubsystemInfo pci_ss_info_104c_8034_103c_099c = + {0x103c, 0x099c, pci_subsys_104c_8034_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_104c_8034_103c_099c +static const pciSubsystemInfo pci_ss_info_104c_8034_103c_308b = + {0x103c, 0x308b, pci_subsys_104c_8034_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_104c_8034_103c_308b +static const pciSubsystemInfo pci_ss_info_104c_8035_103c_099c = + {0x103c, 0x099c, pci_subsys_104c_8035_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_104c_8035_103c_099c +static const pciSubsystemInfo pci_ss_info_104c_8204_1028_0139 = + {0x1028, 0x0139, pci_subsys_104c_8204_1028_0139, 0}; +#undef pci_ss_info_1028_0139 +#define pci_ss_info_1028_0139 pci_ss_info_104c_8204_1028_0139 +static const pciSubsystemInfo pci_ss_info_104c_8204_1028_014e = + {0x1028, 0x014e, pci_subsys_104c_8204_1028_014e, 0}; +#undef pci_ss_info_1028_014e +#define pci_ss_info_1028_014e pci_ss_info_104c_8204_1028_014e static const pciSubsystemInfo pci_ss_info_104c_8400_1186_3b00 = {0x1186, 0x3b00, pci_subsys_104c_8400_1186_3b00, 0}; #undef pci_ss_info_1186_3b00 @@ -23098,10 +27661,34 @@ {0x1186, 0x3b01, pci_subsys_104c_8400_1186_3b01, 0}; #undef pci_ss_info_1186_3b01 #define pci_ss_info_1186_3b01 pci_ss_info_104c_8400_1186_3b01 +static const pciSubsystemInfo pci_ss_info_104c_8400_16ab_8501 = + {0x16ab, 0x8501, pci_subsys_104c_8400_16ab_8501, 0}; +#undef pci_ss_info_16ab_8501 +#define pci_ss_info_16ab_8501 pci_ss_info_104c_8400_16ab_8501 +static const pciSubsystemInfo pci_ss_info_104c_9066_104c_9066 = + {0x104c, 0x9066, pci_subsys_104c_9066_104c_9066, 0}; +#undef pci_ss_info_104c_9066 +#define pci_ss_info_104c_9066 pci_ss_info_104c_9066_104c_9066 +static const pciSubsystemInfo pci_ss_info_104c_9066_1186_3b04 = + {0x1186, 0x3b04, pci_subsys_104c_9066_1186_3b04, 0}; +#undef pci_ss_info_1186_3b04 +#define pci_ss_info_1186_3b04 pci_ss_info_104c_9066_1186_3b04 +static const pciSubsystemInfo pci_ss_info_104c_9066_1186_3b05 = + {0x1186, 0x3b05, pci_subsys_104c_9066_1186_3b05, 0}; +#undef pci_ss_info_1186_3b05 +#define pci_ss_info_1186_3b05 pci_ss_info_104c_9066_1186_3b05 +static const pciSubsystemInfo pci_ss_info_104c_9066_13d1_aba0 = + {0x13d1, 0xaba0, pci_subsys_104c_9066_13d1_aba0, 0}; +#undef pci_ss_info_13d1_aba0 +#define pci_ss_info_13d1_aba0 pci_ss_info_104c_9066_13d1_aba0 static const pciSubsystemInfo pci_ss_info_104c_a106_175c_5000 = {0x175c, 0x5000, pci_subsys_104c_a106_175c_5000, 0}; #undef pci_ss_info_175c_5000 #define pci_ss_info_175c_5000 pci_ss_info_104c_a106_175c_5000 +static const pciSubsystemInfo pci_ss_info_104c_a106_175c_6400 = + {0x175c, 0x6400, pci_subsys_104c_a106_175c_6400, 0}; +#undef pci_ss_info_175c_6400 +#define pci_ss_info_175c_6400 pci_ss_info_104c_a106_175c_6400 static const pciSubsystemInfo pci_ss_info_104c_a106_175c_8700 = {0x175c, 0x8700, pci_subsys_104c_a106_175c_8700, 0}; #undef pci_ss_info_175c_8700 @@ -23114,6 +27701,10 @@ {0x0e11, 0xb113, pci_subsys_104c_ac1b_0e11_b113, 0}; #undef pci_ss_info_0e11_b113 #define pci_ss_info_0e11_b113 pci_ss_info_104c_ac1b_0e11_b113 +static const pciSubsystemInfo pci_ss_info_104c_ac1b_1014_0130 = + {0x1014, 0x0130, pci_subsys_104c_ac1b_1014_0130, 0}; +#undef pci_ss_info_1014_0130 +#define pci_ss_info_1014_0130 pci_ss_info_104c_ac1b_1014_0130 static const pciSubsystemInfo pci_ss_info_104c_ac1c_0e11_b121 = {0x0e11, 0xb121, pci_subsys_104c_ac1c_0e11_b121, 0}; #undef pci_ss_info_0e11_b121 @@ -23130,10 +27721,34 @@ {0x1028, 0x0163, pci_subsys_104c_ac44_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_104c_ac44_1028_0163 +static const pciSubsystemInfo pci_ss_info_104c_ac44_1028_0196 = + {0x1028, 0x0196, pci_subsys_104c_ac44_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_104c_ac44_1028_0196 static const pciSubsystemInfo pci_ss_info_104c_ac44_1071_8160 = {0x1071, 0x8160, pci_subsys_104c_ac44_1071_8160, 0}; #undef pci_ss_info_1071_8160 #define pci_ss_info_1071_8160 pci_ss_info_104c_ac44_1071_8160 +static const pciSubsystemInfo pci_ss_info_104c_ac47_1028_0139 = + {0x1028, 0x0139, pci_subsys_104c_ac47_1028_0139, 0}; +#undef pci_ss_info_1028_0139 +#define pci_ss_info_1028_0139 pci_ss_info_104c_ac47_1028_0139 +static const pciSubsystemInfo pci_ss_info_104c_ac47_1028_014e = + {0x1028, 0x014e, pci_subsys_104c_ac47_1028_014e, 0}; +#undef pci_ss_info_1028_014e +#define pci_ss_info_1028_014e pci_ss_info_104c_ac47_1028_014e +static const pciSubsystemInfo pci_ss_info_104c_ac4a_1028_0139 = + {0x1028, 0x0139, pci_subsys_104c_ac4a_1028_0139, 0}; +#undef pci_ss_info_1028_0139 +#define pci_ss_info_1028_0139 pci_ss_info_104c_ac4a_1028_0139 +static const pciSubsystemInfo pci_ss_info_104c_ac4a_1028_014e = + {0x1028, 0x014e, pci_subsys_104c_ac4a_1028_014e, 0}; +#undef pci_ss_info_1028_014e +#define pci_ss_info_1028_014e pci_ss_info_104c_ac4a_1028_014e +static const pciSubsystemInfo pci_ss_info_104c_ac51_0e11_004e = + {0x0e11, 0x004e, pci_subsys_104c_ac51_0e11_004e, 0}; +#undef pci_ss_info_0e11_004e +#define pci_ss_info_0e11_004e pci_ss_info_104c_ac51_0e11_004e static const pciSubsystemInfo pci_ss_info_104c_ac51_1014_023b = {0x1014, 0x023b, pci_subsys_104c_ac51_1014_023b, 0}; #undef pci_ss_info_1014_023b @@ -23150,6 +27765,10 @@ {0x1033, 0x80cd, pci_subsys_104c_ac51_1033_80cd, 0}; #undef pci_ss_info_1033_80cd #define pci_ss_info_1033_80cd pci_ss_info_104c_ac51_1033_80cd +static const pciSubsystemInfo pci_ss_info_104c_ac51_1095_10cf = + {0x1095, 0x10cf, pci_subsys_104c_ac51_1095_10cf, 0}; +#undef pci_ss_info_1095_10cf +#define pci_ss_info_1095_10cf pci_ss_info_104c_ac51_1095_10cf static const pciSubsystemInfo pci_ss_info_104c_ac51_10cf_1095 = {0x10cf, 0x1095, pci_subsys_104c_ac51_10cf_1095, 0}; #undef pci_ss_info_10cf_1095 @@ -23178,6 +27797,10 @@ {0x175c, 0x6200, pci_subsys_104c_ac60_175c_6200, 0}; #undef pci_ss_info_175c_6200 #define pci_ss_info_175c_6200 pci_ss_info_104c_ac60_175c_6200 +static const pciSubsystemInfo pci_ss_info_104c_ac60_175c_8800 = + {0x175c, 0x8800, pci_subsys_104c_ac60_175c_8800, 0}; +#undef pci_ss_info_175c_8800 +#define pci_ss_info_175c_8800 pci_ss_info_104c_ac60_175c_8800 #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1050_0840_1050_0001 = {0x1050, 0x0001, pci_subsys_1050_0840_1050_0001, 0}; @@ -23187,6 +27810,30 @@ {0x1050, 0x0840, pci_subsys_1050_0840_1050_0840, 0}; #undef pci_ss_info_1050_0840 #define pci_ss_info_1050_0840 pci_ss_info_1050_0840_1050_0840 +static const pciSubsystemInfo pci_ss_info_1050_6692_1043_1702 = + {0x1043, 0x1702, pci_subsys_1050_6692_1043_1702, 0}; +#undef pci_ss_info_1043_1702 +#define pci_ss_info_1043_1702 pci_ss_info_1050_6692_1043_1702 +static const pciSubsystemInfo pci_ss_info_1050_6692_1043_1703 = + {0x1043, 0x1703, pci_subsys_1050_6692_1043_1703, 0}; +#undef pci_ss_info_1043_1703 +#define pci_ss_info_1043_1703 pci_ss_info_1050_6692_1043_1703 +static const pciSubsystemInfo pci_ss_info_1050_6692_1043_1707 = + {0x1043, 0x1707, pci_subsys_1050_6692_1043_1707, 0}; +#undef pci_ss_info_1043_1707 +#define pci_ss_info_1043_1707 pci_ss_info_1050_6692_1043_1707 +static const pciSubsystemInfo pci_ss_info_1050_6692_144f_1702 = + {0x144f, 0x1702, pci_subsys_1050_6692_144f_1702, 0}; +#undef pci_ss_info_144f_1702 +#define pci_ss_info_144f_1702 pci_ss_info_1050_6692_144f_1702 +static const pciSubsystemInfo pci_ss_info_1050_6692_144f_1703 = + {0x144f, 0x1703, pci_subsys_1050_6692_144f_1703, 0}; +#undef pci_ss_info_144f_1703 +#define pci_ss_info_144f_1703 pci_ss_info_1050_6692_144f_1703 +static const pciSubsystemInfo pci_ss_info_1050_6692_144f_1707 = + {0x144f, 0x1707, pci_subsys_1050_6692_144f_1707, 0}; +#undef pci_ss_info_144f_1707 +#define pci_ss_info_144f_1707 pci_ss_info_1050_6692_144f_1707 #endif static const pciSubsystemInfo pci_ss_info_1057_1801_14fb_0101 = {0x14fb, 0x0101, pci_subsys_1057_1801_14fb_0101, 0}; @@ -23240,10 +27887,98 @@ {0x175c, 0x4400, pci_subsys_1057_1801_175c_4400, 0}; #undef pci_ss_info_175c_4400 #define pci_ss_info_175c_4400 pci_ss_info_1057_1801_175c_4400 +static const pciSubsystemInfo pci_ss_info_1057_1801_ecc0_0010 = + {0xecc0, 0x0010, pci_subsys_1057_1801_ecc0_0010, 0}; +#undef pci_ss_info_ecc0_0010 +#define pci_ss_info_ecc0_0010 pci_ss_info_1057_1801_ecc0_0010 +static const pciSubsystemInfo pci_ss_info_1057_1801_ecc0_0020 = + {0xecc0, 0x0020, pci_subsys_1057_1801_ecc0_0020, 0}; +#undef pci_ss_info_ecc0_0020 +#define pci_ss_info_ecc0_0020 pci_ss_info_1057_1801_ecc0_0020 static const pciSubsystemInfo pci_ss_info_1057_1801_ecc0_0030 = {0xecc0, 0x0030, pci_subsys_1057_1801_ecc0_0030, 0}; #undef pci_ss_info_ecc0_0030 #define pci_ss_info_ecc0_0030 pci_ss_info_1057_1801_ecc0_0030 +static const pciSubsystemInfo pci_ss_info_1057_1801_ecc0_0031 = + {0xecc0, 0x0031, pci_subsys_1057_1801_ecc0_0031, 0}; +#undef pci_ss_info_ecc0_0031 +#define pci_ss_info_ecc0_0031 pci_ss_info_1057_1801_ecc0_0031 +static const pciSubsystemInfo pci_ss_info_1057_1801_ecc0_0040 = + {0xecc0, 0x0040, pci_subsys_1057_1801_ecc0_0040, 0}; +#undef pci_ss_info_ecc0_0040 +#define pci_ss_info_ecc0_0040 pci_ss_info_1057_1801_ecc0_0040 +static const pciSubsystemInfo pci_ss_info_1057_1801_ecc0_0041 = + {0xecc0, 0x0041, pci_subsys_1057_1801_ecc0_0041, 0}; +#undef pci_ss_info_ecc0_0041 +#define pci_ss_info_ecc0_0041 pci_ss_info_1057_1801_ecc0_0041 +static const pciSubsystemInfo pci_ss_info_1057_1801_ecc0_0050 = + {0xecc0, 0x0050, pci_subsys_1057_1801_ecc0_0050, 0}; +#undef pci_ss_info_ecc0_0050 +#define pci_ss_info_ecc0_0050 pci_ss_info_1057_1801_ecc0_0050 +static const pciSubsystemInfo pci_ss_info_1057_1801_ecc0_0051 = + {0xecc0, 0x0051, pci_subsys_1057_1801_ecc0_0051, 0}; +#undef pci_ss_info_ecc0_0051 +#define pci_ss_info_ecc0_0051 pci_ss_info_1057_1801_ecc0_0051 +static const pciSubsystemInfo pci_ss_info_1057_1801_ecc0_0070 = + {0xecc0, 0x0070, pci_subsys_1057_1801_ecc0_0070, 0}; +#undef pci_ss_info_ecc0_0070 +#define pci_ss_info_ecc0_0070 pci_ss_info_1057_1801_ecc0_0070 +static const pciSubsystemInfo pci_ss_info_1057_1801_ecc0_0071 = + {0xecc0, 0x0071, pci_subsys_1057_1801_ecc0_0071, 0}; +#undef pci_ss_info_ecc0_0071 +#define pci_ss_info_ecc0_0071 pci_ss_info_1057_1801_ecc0_0071 +static const pciSubsystemInfo pci_ss_info_1057_1801_ecc0_0072 = + {0xecc0, 0x0072, pci_subsys_1057_1801_ecc0_0072, 0}; +#undef pci_ss_info_ecc0_0072 +#define pci_ss_info_ecc0_0072 pci_ss_info_1057_1801_ecc0_0072 +static const pciSubsystemInfo pci_ss_info_1057_3410_ecc0_0050 = + {0xecc0, 0x0050, pci_subsys_1057_3410_ecc0_0050, 0}; +#undef pci_ss_info_ecc0_0050 +#define pci_ss_info_ecc0_0050 pci_ss_info_1057_3410_ecc0_0050 +static const pciSubsystemInfo pci_ss_info_1057_3410_ecc0_0051 = + {0xecc0, 0x0051, pci_subsys_1057_3410_ecc0_0051, 0}; +#undef pci_ss_info_ecc0_0051 +#define pci_ss_info_ecc0_0051 pci_ss_info_1057_3410_ecc0_0051 +static const pciSubsystemInfo pci_ss_info_1057_3410_ecc0_0060 = + {0xecc0, 0x0060, pci_subsys_1057_3410_ecc0_0060, 0}; +#undef pci_ss_info_ecc0_0060 +#define pci_ss_info_ecc0_0060 pci_ss_info_1057_3410_ecc0_0060 +static const pciSubsystemInfo pci_ss_info_1057_3410_ecc0_0070 = + {0xecc0, 0x0070, pci_subsys_1057_3410_ecc0_0070, 0}; +#undef pci_ss_info_ecc0_0070 +#define pci_ss_info_ecc0_0070 pci_ss_info_1057_3410_ecc0_0070 +static const pciSubsystemInfo pci_ss_info_1057_3410_ecc0_0071 = + {0xecc0, 0x0071, pci_subsys_1057_3410_ecc0_0071, 0}; +#undef pci_ss_info_ecc0_0071 +#define pci_ss_info_ecc0_0071 pci_ss_info_1057_3410_ecc0_0071 +static const pciSubsystemInfo pci_ss_info_1057_3410_ecc0_0072 = + {0xecc0, 0x0072, pci_subsys_1057_3410_ecc0_0072, 0}; +#undef pci_ss_info_ecc0_0072 +#define pci_ss_info_ecc0_0072 pci_ss_info_1057_3410_ecc0_0072 +static const pciSubsystemInfo pci_ss_info_1057_3410_ecc0_0080 = + {0xecc0, 0x0080, pci_subsys_1057_3410_ecc0_0080, 0}; +#undef pci_ss_info_ecc0_0080 +#define pci_ss_info_ecc0_0080 pci_ss_info_1057_3410_ecc0_0080 +static const pciSubsystemInfo pci_ss_info_1057_3410_ecc0_0081 = + {0xecc0, 0x0081, pci_subsys_1057_3410_ecc0_0081, 0}; +#undef pci_ss_info_ecc0_0081 +#define pci_ss_info_ecc0_0081 pci_ss_info_1057_3410_ecc0_0081 +static const pciSubsystemInfo pci_ss_info_1057_3410_ecc0_0090 = + {0xecc0, 0x0090, pci_subsys_1057_3410_ecc0_0090, 0}; +#undef pci_ss_info_ecc0_0090 +#define pci_ss_info_ecc0_0090 pci_ss_info_1057_3410_ecc0_0090 +static const pciSubsystemInfo pci_ss_info_1057_3410_ecc0_00a0 = + {0xecc0, 0x00a0, pci_subsys_1057_3410_ecc0_00a0, 0}; +#undef pci_ss_info_ecc0_00a0 +#define pci_ss_info_ecc0_00a0 pci_ss_info_1057_3410_ecc0_00a0 +static const pciSubsystemInfo pci_ss_info_1057_3410_ecc0_00b0 = + {0xecc0, 0x00b0, pci_subsys_1057_3410_ecc0_00b0, 0}; +#undef pci_ss_info_ecc0_00b0 +#define pci_ss_info_ecc0_00b0 pci_ss_info_1057_3410_ecc0_00b0 +static const pciSubsystemInfo pci_ss_info_1057_3410_ecc0_0100 = + {0xecc0, 0x0100, pci_subsys_1057_3410_ecc0_0100, 0}; +#undef pci_ss_info_ecc0_0100 +#define pci_ss_info_ecc0_0100 pci_ss_info_1057_3410_ecc0_0100 static const pciSubsystemInfo pci_ss_info_1057_5600_1057_0300 = {0x1057, 0x0300, pci_subsys_1057_5600_1057_0300, 0}; #undef pci_ss_info_1057_0300 @@ -23371,6 +28106,10 @@ {0x105a, 0x4d68, pci_subsys_105a_4d69_105a_4d68, 0}; #undef pci_ss_info_105a_4d68 #define pci_ss_info_105a_4d68 pci_ss_info_105a_4d69_105a_4d68 +static const pciSubsystemInfo pci_ss_info_105a_5275_1043_807e = + {0x1043, 0x807e, pci_subsys_105a_5275_1043_807e, 0}; +#undef pci_ss_info_1043_807e +#define pci_ss_info_1043_807e pci_ss_info_105a_5275_1043_807e static const pciSubsystemInfo pci_ss_info_105a_5275_105a_0275 = {0x105a, 0x0275, pci_subsys_105a_5275_105a_0275, 0}; #undef pci_ss_info_105a_0275 @@ -23513,6 +28252,18 @@ #undef pci_ss_info_105d_0037 #define pci_ss_info_105d_0037 pci_ss_info_105d_5348_105d_0037 #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1069_0050_1069_0050 = + {0x1069, 0x0050, pci_subsys_1069_0050_1069_0050, 0}; +#undef pci_ss_info_1069_0050 +#define pci_ss_info_1069_0050 pci_ss_info_1069_0050_1069_0050 +static const pciSubsystemInfo pci_ss_info_1069_0050_1069_0052 = + {0x1069, 0x0052, pci_subsys_1069_0050_1069_0052, 0}; +#undef pci_ss_info_1069_0052 +#define pci_ss_info_1069_0052 pci_ss_info_1069_0050_1069_0052 +static const pciSubsystemInfo pci_ss_info_1069_0050_1069_0054 = + {0x1069, 0x0054, pci_subsys_1069_0050_1069_0054, 0}; +#undef pci_ss_info_1069_0054 +#define pci_ss_info_1069_0054 pci_ss_info_1069_0050_1069_0054 static const pciSubsystemInfo pci_ss_info_1069_b166_1014_0242 = {0x1014, 0x0242, pci_subsys_1069_b166_1014_0242, 0}; #undef pci_ss_info_1014_0242 @@ -23525,6 +28276,48 @@ {0x1014, 0x0278, pci_subsys_1069_b166_1014_0278, 0}; #undef pci_ss_info_1014_0278 #define pci_ss_info_1014_0278 pci_ss_info_1069_b166_1014_0278 +static const pciSubsystemInfo pci_ss_info_1069_b166_1014_02d3 = + {0x1014, 0x02d3, pci_subsys_1069_b166_1014_02d3, 0}; +#undef pci_ss_info_1014_02d3 +#define pci_ss_info_1014_02d3 pci_ss_info_1069_b166_1014_02d3 +static const pciSubsystemInfo pci_ss_info_1069_b166_1014_02d4 = + {0x1014, 0x02d4, pci_subsys_1069_b166_1014_02d4, 0}; +#undef pci_ss_info_1014_02d4 +#define pci_ss_info_1014_02d4 pci_ss_info_1069_b166_1014_02d4 +static const pciSubsystemInfo pci_ss_info_1069_b166_1069_0200 = + {0x1069, 0x0200, pci_subsys_1069_b166_1069_0200, 0}; +#undef pci_ss_info_1069_0200 +#define pci_ss_info_1069_0200 pci_ss_info_1069_b166_1069_0200 +static const pciSubsystemInfo pci_ss_info_1069_b166_1069_0202 = + {0x1069, 0x0202, pci_subsys_1069_b166_1069_0202, 0}; +#undef pci_ss_info_1069_0202 +#define pci_ss_info_1069_0202 pci_ss_info_1069_b166_1069_0202 +static const pciSubsystemInfo pci_ss_info_1069_b166_1069_0204 = + {0x1069, 0x0204, pci_subsys_1069_b166_1069_0204, 0}; +#undef pci_ss_info_1069_0204 +#define pci_ss_info_1069_0204 pci_ss_info_1069_b166_1069_0204 +static const pciSubsystemInfo pci_ss_info_1069_b166_1069_0206 = + {0x1069, 0x0206, pci_subsys_1069_b166_1069_0206, 0}; +#undef pci_ss_info_1069_0206 +#define pci_ss_info_1069_0206 pci_ss_info_1069_b166_1069_0206 +static const pciSubsystemInfo pci_ss_info_1069_ba56_1069_0030 = + {0x1069, 0x0030, pci_subsys_1069_ba56_1069_0030, 0}; +#undef pci_ss_info_1069_0030 +#define pci_ss_info_1069_0030 pci_ss_info_1069_ba56_1069_0030 +static const pciSubsystemInfo pci_ss_info_1069_ba56_1069_0040 = + {0x1069, 0x0040, pci_subsys_1069_ba56_1069_0040, 0}; +#undef pci_ss_info_1069_0040 +#define pci_ss_info_1069_0040 pci_ss_info_1069_ba56_1069_0040 +static const pciSubsystemInfo pci_ss_info_1069_ba57_1069_0072 = + {0x1069, 0x0072, pci_subsys_1069_ba57_1069_0072, 0}; +#undef pci_ss_info_1069_0072 +#define pci_ss_info_1069_0072 pci_ss_info_1069_ba57_1069_0072 +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_106b_0031_106b_5811 = + {0x106b, 0x5811, pci_subsys_106b_0031_106b_5811, 0}; +#undef pci_ss_info_106b_5811 +#define pci_ss_info_106b_5811 pci_ss_info_106b_0031_106b_5811 #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1073_0004_1073_0004 = @@ -23613,6 +28406,10 @@ #define pci_ss_info_108d_0017 pci_ss_info_108d_0019_108d_0017 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1095_0648_1043_8025 = + {0x1043, 0x8025, pci_subsys_1095_0648_1043_8025, 0}; +#undef pci_ss_info_1043_8025 +#define pci_ss_info_1043_8025 pci_ss_info_1095_0648_1043_8025 #endif static const pciSubsystemInfo pci_ss_info_1095_0649_0e11_005d = {0x0e11, 0x005d, pci_subsys_1095_0649_0e11_005d, 0}; @@ -23645,6 +28442,10 @@ {0x1095, 0x6112, pci_subsys_1095_3112_1095_6112, 0}; #undef pci_ss_info_1095_6112 #define pci_ss_info_1095_6112 pci_ss_info_1095_3112_1095_6112 +static const pciSubsystemInfo pci_ss_info_1095_3112_9005_0250 = + {0x9005, 0x0250, pci_subsys_1095_3112_9005_0250, 0}; +#undef pci_ss_info_9005_0250 +#define pci_ss_info_9005_0250 pci_ss_info_1095_3112_9005_0250 static const pciSubsystemInfo pci_ss_info_1095_3114_1095_3114 = {0x1095, 0x3114, pci_subsys_1095_3114_1095_3114, 0}; #undef pci_ss_info_1095_3114 @@ -23726,6 +28527,10 @@ {0x1461, 0x0002, pci_subsys_109e_036e_1461_0002, 0}; #undef pci_ss_info_1461_0002 #define pci_ss_info_1461_0002 pci_ss_info_109e_036e_1461_0002 +static const pciSubsystemInfo pci_ss_info_109e_036e_1461_0003 = + {0x1461, 0x0003, pci_subsys_109e_036e_1461_0003, 0}; +#undef pci_ss_info_1461_0003 +#define pci_ss_info_1461_0003 pci_ss_info_109e_036e_1461_0003 static const pciSubsystemInfo pci_ss_info_109e_036e_1461_0004 = {0x1461, 0x0004, pci_subsys_109e_036e_1461_0004, 0}; #undef pci_ss_info_1461_0004 @@ -23766,6 +28571,10 @@ {0x1852, 0x1852, pci_subsys_109e_036e_1852_1852, 0}; #undef pci_ss_info_1852_1852 #define pci_ss_info_1852_1852 pci_ss_info_109e_036e_1852_1852 +static const pciSubsystemInfo pci_ss_info_109e_036e_18ac_d500 = + {0x18ac, 0xd500, pci_subsys_109e_036e_18ac_d500, 0}; +#undef pci_ss_info_18ac_d500 +#define pci_ss_info_18ac_d500 pci_ss_info_109e_036e_18ac_d500 static const pciSubsystemInfo pci_ss_info_109e_036e_270f_fc00 = {0x270f, 0xfc00, pci_subsys_109e_036e_270f_fc00, 0}; #undef pci_ss_info_270f_fc00 @@ -23954,6 +28763,10 @@ {0x144f, 0x3000, pci_subsys_109e_0878_144f_3000, 0}; #undef pci_ss_info_144f_3000 #define pci_ss_info_144f_3000 pci_ss_info_109e_0878_144f_3000 +static const pciSubsystemInfo pci_ss_info_109e_0878_1461_0002 = + {0x1461, 0x0002, pci_subsys_109e_0878_1461_0002, 0}; +#undef pci_ss_info_1461_0002 +#define pci_ss_info_1461_0002 pci_ss_info_109e_0878_1461_0002 static const pciSubsystemInfo pci_ss_info_109e_0878_1461_0004 = {0x1461, 0x0004, pci_subsys_109e_0878_1461_0004, 0}; #undef pci_ss_info_1461_0004 @@ -23982,6 +28795,10 @@ {0x1822, 0x0001, pci_subsys_109e_0878_1822_0001, 0}; #undef pci_ss_info_1822_0001 #define pci_ss_info_1822_0001 pci_ss_info_109e_0878_1822_0001 +static const pciSubsystemInfo pci_ss_info_109e_0878_18ac_d500 = + {0x18ac, 0xd500, pci_subsys_109e_0878_18ac_d500, 0}; +#undef pci_ss_info_18ac_d500 +#define pci_ss_info_18ac_d500 pci_ss_info_109e_0878_18ac_d500 static const pciSubsystemInfo pci_ss_info_109e_0878_270f_fc00 = {0x270f, 0xfc00, pci_subsys_109e_0878_270f_fc00, 0}; #undef pci_ss_info_270f_fc00 @@ -24107,6 +28924,18 @@ #define pci_ss_info_10b4_237e pci_ss_info_10b4_1b1d_10b4_237e #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_10b5_6540_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_10b5_6540_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_10b5_6540_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_10b5_6541_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_10b5_6541_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_10b5_6541_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_10b5_6542_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_10b5_6542_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_10b5_6542_4c53_10e0 static const pciSubsystemInfo pci_ss_info_10b5_9030_10b5_2862 = {0x10b5, 0x2862, pci_subsys_10b5_9030_10b5_2862, 0}; #undef pci_ss_info_10b5_2862 @@ -24119,6 +28948,34 @@ {0x10b5, 0x2940, pci_subsys_10b5_9030_10b5_2940, 0}; #undef pci_ss_info_10b5_2940 #define pci_ss_info_10b5_2940 pci_ss_info_10b5_9030_10b5_2940 +static const pciSubsystemInfo pci_ss_info_10b5_9030_10b5_2977 = + {0x10b5, 0x2977, pci_subsys_10b5_9030_10b5_2977, 0}; +#undef pci_ss_info_10b5_2977 +#define pci_ss_info_10b5_2977 pci_ss_info_10b5_9030_10b5_2977 +static const pciSubsystemInfo pci_ss_info_10b5_9030_10b5_2978 = + {0x10b5, 0x2978, pci_subsys_10b5_9030_10b5_2978, 0}; +#undef pci_ss_info_10b5_2978 +#define pci_ss_info_10b5_2978 pci_ss_info_10b5_9030_10b5_2978 +static const pciSubsystemInfo pci_ss_info_10b5_9030_10b5_3025 = + {0x10b5, 0x3025, pci_subsys_10b5_9030_10b5_3025, 0}; +#undef pci_ss_info_10b5_3025 +#define pci_ss_info_10b5_3025 pci_ss_info_10b5_9030_10b5_3025 +static const pciSubsystemInfo pci_ss_info_10b5_9030_10b5_3068 = + {0x10b5, 0x3068, pci_subsys_10b5_9030_10b5_3068, 0}; +#undef pci_ss_info_10b5_3068 +#define pci_ss_info_10b5_3068 pci_ss_info_10b5_9030_10b5_3068 +static const pciSubsystemInfo pci_ss_info_10b5_9030_1397_3136 = + {0x1397, 0x3136, pci_subsys_10b5_9030_1397_3136, 0}; +#undef pci_ss_info_1397_3136 +#define pci_ss_info_1397_3136 pci_ss_info_10b5_9030_1397_3136 +static const pciSubsystemInfo pci_ss_info_10b5_9030_1397_3137 = + {0x1397, 0x3137, pci_subsys_10b5_9030_1397_3137, 0}; +#undef pci_ss_info_1397_3137 +#define pci_ss_info_1397_3137 pci_ss_info_10b5_9030_1397_3137 +static const pciSubsystemInfo pci_ss_info_10b5_9030_1518_0200 = + {0x1518, 0x0200, pci_subsys_10b5_9030_1518_0200, 0}; +#undef pci_ss_info_1518_0200 +#define pci_ss_info_1518_0200 pci_ss_info_10b5_9030_1518_0200 static const pciSubsystemInfo pci_ss_info_10b5_9030_15ed_1002 = {0x15ed, 0x1002, pci_subsys_10b5_9030_15ed_1002, 0}; #undef pci_ss_info_15ed_1002 @@ -24303,6 +29160,10 @@ {0x10b5, 0x2844, pci_subsys_10b5_9054_10b5_2844, 0}; #undef pci_ss_info_10b5_2844 #define pci_ss_info_10b5_2844 pci_ss_info_10b5_9054_10b5_2844 +static const pciSubsystemInfo pci_ss_info_10b5_9054_12c7_4001 = + {0x12c7, 0x4001, pci_subsys_10b5_9054_12c7_4001, 0}; +#undef pci_ss_info_12c7_4001 +#define pci_ss_info_12c7_4001 pci_ss_info_10b5_9054_12c7_4001 static const pciSubsystemInfo pci_ss_info_10b5_9054_12d9_0002 = {0x12d9, 0x0002, pci_subsys_10b5_9054_12d9_0002, 0}; #undef pci_ss_info_12d9_0002 @@ -24813,6 +29674,12 @@ #undef pci_ss_info_103c_0024 #define pci_ss_info_103c_0024 pci_ss_info_10b9_5237_103c_0024 #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_10b9_5237_104d_810f = + {0x104d, 0x810f, pci_subsys_10b9_5237_104d_810f, 0}; +#undef pci_ss_info_104d_810f +#define pci_ss_info_104d_810f pci_ss_info_10b9_5237_104d_810f +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_10b9_5451_1014_0506 = {0x1014, 0x0506, pci_subsys_10b9_5451_1014_0506, 0}; #undef pci_ss_info_1014_0506 @@ -25008,10 +29875,18 @@ {0x1048, 0x0c18, pci_subsys_10de_0020_1048_0c18, 0}; #undef pci_ss_info_1048_0c18 #define pci_ss_info_1048_0c18 pci_ss_info_10de_0020_1048_0c18 +static const pciSubsystemInfo pci_ss_info_10de_0020_1048_0c19 = + {0x1048, 0x0c19, pci_subsys_10de_0020_1048_0c19, 0}; +#undef pci_ss_info_1048_0c19 +#define pci_ss_info_1048_0c19 pci_ss_info_10de_0020_1048_0c19 static const pciSubsystemInfo pci_ss_info_10de_0020_1048_0c1b = {0x1048, 0x0c1b, pci_subsys_10de_0020_1048_0c1b, 0}; #undef pci_ss_info_1048_0c1b #define pci_ss_info_1048_0c1b pci_ss_info_10de_0020_1048_0c1b +static const pciSubsystemInfo pci_ss_info_10de_0020_1048_0c1c = + {0x1048, 0x0c1c, pci_subsys_10de_0020_1048_0c1c, 0}; +#undef pci_ss_info_1048_0c1c +#define pci_ss_info_1048_0c1c pci_ss_info_10de_0020_1048_0c1c static const pciSubsystemInfo pci_ss_info_10de_0020_1092_0550 = {0x1092, 0x0550, pci_subsys_10de_0020_1092_0550, 0}; #undef pci_ss_info_1092_0550 @@ -25104,10 +29979,38 @@ {0x1048, 0x0c21, pci_subsys_10de_0028_1048_0c21, 0}; #undef pci_ss_info_1048_0c21 #define pci_ss_info_1048_0c21 pci_ss_info_10de_0028_1048_0c21 +static const pciSubsystemInfo pci_ss_info_10de_0028_1048_0c28 = + {0x1048, 0x0c28, pci_subsys_10de_0028_1048_0c28, 0}; +#undef pci_ss_info_1048_0c28 +#define pci_ss_info_1048_0c28 pci_ss_info_10de_0028_1048_0c28 +static const pciSubsystemInfo pci_ss_info_10de_0028_1048_0c29 = + {0x1048, 0x0c29, pci_subsys_10de_0028_1048_0c29, 0}; +#undef pci_ss_info_1048_0c29 +#define pci_ss_info_1048_0c29 pci_ss_info_10de_0028_1048_0c29 +static const pciSubsystemInfo pci_ss_info_10de_0028_1048_0c2a = + {0x1048, 0x0c2a, pci_subsys_10de_0028_1048_0c2a, 0}; +#undef pci_ss_info_1048_0c2a +#define pci_ss_info_1048_0c2a pci_ss_info_10de_0028_1048_0c2a +static const pciSubsystemInfo pci_ss_info_10de_0028_1048_0c2b = + {0x1048, 0x0c2b, pci_subsys_10de_0028_1048_0c2b, 0}; +#undef pci_ss_info_1048_0c2b +#define pci_ss_info_1048_0c2b pci_ss_info_10de_0028_1048_0c2b static const pciSubsystemInfo pci_ss_info_10de_0028_1048_0c31 = {0x1048, 0x0c31, pci_subsys_10de_0028_1048_0c31, 0}; #undef pci_ss_info_1048_0c31 #define pci_ss_info_1048_0c31 pci_ss_info_10de_0028_1048_0c31 +static const pciSubsystemInfo pci_ss_info_10de_0028_1048_0c32 = + {0x1048, 0x0c32, pci_subsys_10de_0028_1048_0c32, 0}; +#undef pci_ss_info_1048_0c32 +#define pci_ss_info_1048_0c32 pci_ss_info_10de_0028_1048_0c32 +static const pciSubsystemInfo pci_ss_info_10de_0028_1048_0c33 = + {0x1048, 0x0c33, pci_subsys_10de_0028_1048_0c33, 0}; +#undef pci_ss_info_1048_0c33 +#define pci_ss_info_1048_0c33 pci_ss_info_10de_0028_1048_0c33 +static const pciSubsystemInfo pci_ss_info_10de_0028_1048_0c34 = + {0x1048, 0x0c34, pci_subsys_10de_0028_1048_0c34, 0}; +#undef pci_ss_info_1048_0c34 +#define pci_ss_info_1048_0c34 pci_ss_info_10de_0028_1048_0c34 static const pciSubsystemInfo pci_ss_info_10de_0028_107d_2134 = {0x107d, 0x2134, pci_subsys_10de_0028_107d_2134, 0}; #undef pci_ss_info_107d_2134 @@ -25168,6 +30071,18 @@ {0x1043, 0x0205, pci_subsys_10de_0029_1043_0205, 0}; #undef pci_ss_info_1043_0205 #define pci_ss_info_1043_0205 pci_ss_info_10de_0029_1043_0205 +static const pciSubsystemInfo pci_ss_info_10de_0029_1048_0c2e = + {0x1048, 0x0c2e, pci_subsys_10de_0029_1048_0c2e, 0}; +#undef pci_ss_info_1048_0c2e +#define pci_ss_info_1048_0c2e pci_ss_info_10de_0029_1048_0c2e +static const pciSubsystemInfo pci_ss_info_10de_0029_1048_0c2f = + {0x1048, 0x0c2f, pci_subsys_10de_0029_1048_0c2f, 0}; +#undef pci_ss_info_1048_0c2f +#define pci_ss_info_1048_0c2f pci_ss_info_10de_0029_1048_0c2f +static const pciSubsystemInfo pci_ss_info_10de_0029_1048_0c30 = + {0x1048, 0x0c30, pci_subsys_10de_0029_1048_0c30, 0}; +#undef pci_ss_info_1048_0c30 +#define pci_ss_info_1048_0c30 pci_ss_info_10de_0029_1048_0c30 static const pciSubsystemInfo pci_ss_info_10de_0029_1102_1021 = {0x1102, 0x1021, pci_subsys_10de_0029_1102_1021, 0}; #undef pci_ss_info_1102_1021 @@ -25192,6 +30107,14 @@ {0x1043, 0x0201, pci_subsys_10de_002c_1043_0201, 0}; #undef pci_ss_info_1043_0201 #define pci_ss_info_1043_0201 pci_ss_info_10de_002c_1043_0201 +static const pciSubsystemInfo pci_ss_info_10de_002c_1048_0c20 = + {0x1048, 0x0c20, pci_subsys_10de_002c_1048_0c20, 0}; +#undef pci_ss_info_1048_0c20 +#define pci_ss_info_1048_0c20 pci_ss_info_10de_002c_1048_0c20 +static const pciSubsystemInfo pci_ss_info_10de_002c_1048_0c21 = + {0x1048, 0x0c21, pci_subsys_10de_002c_1048_0c21, 0}; +#undef pci_ss_info_1048_0c21 +#define pci_ss_info_1048_0c21 pci_ss_info_10de_002c_1048_0c21 static const pciSubsystemInfo pci_ss_info_10de_002c_1092_6820 = {0x1092, 0x6820, pci_subsys_10de_002c_1092_6820, 0}; #undef pci_ss_info_1092_6820 @@ -25220,6 +30143,10 @@ {0x1048, 0x0c3a, pci_subsys_10de_002d_1048_0c3a, 0}; #undef pci_ss_info_1048_0c3a #define pci_ss_info_1048_0c3a pci_ss_info_10de_002d_1048_0c3a +static const pciSubsystemInfo pci_ss_info_10de_002d_1048_0c3b = + {0x1048, 0x0c3b, pci_subsys_10de_002d_1048_0c3b, 0}; +#undef pci_ss_info_1048_0c3b +#define pci_ss_info_1048_0c3b pci_ss_info_10de_002d_1048_0c3b static const pciSubsystemInfo pci_ss_info_10de_002d_10de_001e = {0x10de, 0x001e, pci_subsys_10de_002d_10de_001e, 0}; #undef pci_ss_info_10de_001e @@ -25244,6 +30171,118 @@ {0x1554, 0x1041, pci_subsys_10de_002d_1554_1041, 0}; #undef pci_ss_info_1554_1041 #define pci_ss_info_1554_1041 pci_ss_info_10de_002d_1554_1041 +static const pciSubsystemInfo pci_ss_info_10de_002d_1569_002d = + {0x1569, 0x002d, pci_subsys_10de_002d_1569_002d, 0}; +#undef pci_ss_info_1569_002d +#define pci_ss_info_1569_002d pci_ss_info_10de_002d_1569_002d +static const pciSubsystemInfo pci_ss_info_10de_0041_1043_817b = + {0x1043, 0x817b, pci_subsys_10de_0041_1043_817b, 0}; +#undef pci_ss_info_1043_817b +#define pci_ss_info_1043_817b pci_ss_info_10de_0041_1043_817b +static const pciSubsystemInfo pci_ss_info_10de_0047_1682_2109 = + {0x1682, 0x2109, pci_subsys_10de_0047_1682_2109, 0}; +#undef pci_ss_info_1682_2109 +#define pci_ss_info_1682_2109 pci_ss_info_10de_0047_1682_2109 +static const pciSubsystemInfo pci_ss_info_10de_0050_1043_815a = + {0x1043, 0x815a, pci_subsys_10de_0050_1043_815a, 0}; +#undef pci_ss_info_1043_815a +#define pci_ss_info_1043_815a pci_ss_info_10de_0050_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_0050_1458_0c11 = + {0x1458, 0x0c11, pci_subsys_10de_0050_1458_0c11, 0}; +#undef pci_ss_info_1458_0c11 +#define pci_ss_info_1458_0c11 pci_ss_info_10de_0050_1458_0c11 +static const pciSubsystemInfo pci_ss_info_10de_0050_1462_7100 = + {0x1462, 0x7100, pci_subsys_10de_0050_1462_7100, 0}; +#undef pci_ss_info_1462_7100 +#define pci_ss_info_1462_7100 pci_ss_info_10de_0050_1462_7100 +static const pciSubsystemInfo pci_ss_info_10de_0052_1043_815a = + {0x1043, 0x815a, pci_subsys_10de_0052_1043_815a, 0}; +#undef pci_ss_info_1043_815a +#define pci_ss_info_1043_815a pci_ss_info_10de_0052_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_0052_1458_0c11 = + {0x1458, 0x0c11, pci_subsys_10de_0052_1458_0c11, 0}; +#undef pci_ss_info_1458_0c11 +#define pci_ss_info_1458_0c11 pci_ss_info_10de_0052_1458_0c11 +static const pciSubsystemInfo pci_ss_info_10de_0052_1462_7100 = + {0x1462, 0x7100, pci_subsys_10de_0052_1462_7100, 0}; +#undef pci_ss_info_1462_7100 +#define pci_ss_info_1462_7100 pci_ss_info_10de_0052_1462_7100 +static const pciSubsystemInfo pci_ss_info_10de_0053_1043_815a = + {0x1043, 0x815a, pci_subsys_10de_0053_1043_815a, 0}; +#undef pci_ss_info_1043_815a +#define pci_ss_info_1043_815a pci_ss_info_10de_0053_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_0053_1458_5002 = + {0x1458, 0x5002, pci_subsys_10de_0053_1458_5002, 0}; +#undef pci_ss_info_1458_5002 +#define pci_ss_info_1458_5002 pci_ss_info_10de_0053_1458_5002 +static const pciSubsystemInfo pci_ss_info_10de_0053_1462_7100 = + {0x1462, 0x7100, pci_subsys_10de_0053_1462_7100, 0}; +#undef pci_ss_info_1462_7100 +#define pci_ss_info_1462_7100 pci_ss_info_10de_0053_1462_7100 +static const pciSubsystemInfo pci_ss_info_10de_0054_1458_b003 = + {0x1458, 0xb003, pci_subsys_10de_0054_1458_b003, 0}; +#undef pci_ss_info_1458_b003 +#define pci_ss_info_1458_b003 pci_ss_info_10de_0054_1458_b003 +static const pciSubsystemInfo pci_ss_info_10de_0054_1462_7100 = + {0x1462, 0x7100, pci_subsys_10de_0054_1462_7100, 0}; +#undef pci_ss_info_1462_7100 +#define pci_ss_info_1462_7100 pci_ss_info_10de_0054_1462_7100 +static const pciSubsystemInfo pci_ss_info_10de_0055_1043_815a = + {0x1043, 0x815a, pci_subsys_10de_0055_1043_815a, 0}; +#undef pci_ss_info_1043_815a +#define pci_ss_info_1043_815a pci_ss_info_10de_0055_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_0055_1458_b003 = + {0x1458, 0xb003, pci_subsys_10de_0055_1458_b003, 0}; +#undef pci_ss_info_1458_b003 +#define pci_ss_info_1458_b003 pci_ss_info_10de_0055_1458_b003 +static const pciSubsystemInfo pci_ss_info_10de_0057_1043_8141 = + {0x1043, 0x8141, pci_subsys_10de_0057_1043_8141, 0}; +#undef pci_ss_info_1043_8141 +#define pci_ss_info_1043_8141 pci_ss_info_10de_0057_1043_8141 +static const pciSubsystemInfo pci_ss_info_10de_0057_1458_e000 = + {0x1458, 0xe000, pci_subsys_10de_0057_1458_e000, 0}; +#undef pci_ss_info_1458_e000 +#define pci_ss_info_1458_e000 pci_ss_info_10de_0057_1458_e000 +static const pciSubsystemInfo pci_ss_info_10de_0057_1462_7100 = + {0x1462, 0x7100, pci_subsys_10de_0057_1462_7100, 0}; +#undef pci_ss_info_1462_7100 +#define pci_ss_info_1462_7100 pci_ss_info_10de_0057_1462_7100 +static const pciSubsystemInfo pci_ss_info_10de_0059_1043_812a = + {0x1043, 0x812a, pci_subsys_10de_0059_1043_812a, 0}; +#undef pci_ss_info_1043_812a +#define pci_ss_info_1043_812a pci_ss_info_10de_0059_1043_812a +static const pciSubsystemInfo pci_ss_info_10de_005a_1043_815a = + {0x1043, 0x815a, pci_subsys_10de_005a_1043_815a, 0}; +#undef pci_ss_info_1043_815a +#define pci_ss_info_1043_815a pci_ss_info_10de_005a_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_005a_1458_5004 = + {0x1458, 0x5004, pci_subsys_10de_005a_1458_5004, 0}; +#undef pci_ss_info_1458_5004 +#define pci_ss_info_1458_5004 pci_ss_info_10de_005a_1458_5004 +static const pciSubsystemInfo pci_ss_info_10de_005a_1462_7100 = + {0x1462, 0x7100, pci_subsys_10de_005a_1462_7100, 0}; +#undef pci_ss_info_1462_7100 +#define pci_ss_info_1462_7100 pci_ss_info_10de_005a_1462_7100 +static const pciSubsystemInfo pci_ss_info_10de_005b_1043_815a = + {0x1043, 0x815a, pci_subsys_10de_005b_1043_815a, 0}; +#undef pci_ss_info_1043_815a +#define pci_ss_info_1043_815a pci_ss_info_10de_005b_1043_815a +static const pciSubsystemInfo pci_ss_info_10de_005b_1458_5004 = + {0x1458, 0x5004, pci_subsys_10de_005b_1458_5004, 0}; +#undef pci_ss_info_1458_5004 +#define pci_ss_info_1458_5004 pci_ss_info_10de_005b_1458_5004 +static const pciSubsystemInfo pci_ss_info_10de_005b_1462_7100 = + {0x1462, 0x7100, pci_subsys_10de_005b_1462_7100, 0}; +#undef pci_ss_info_1462_7100 +#define pci_ss_info_1462_7100 pci_ss_info_10de_005b_1462_7100 +static const pciSubsystemInfo pci_ss_info_10de_005e_1458_5000 = + {0x1458, 0x5000, pci_subsys_10de_005e_1458_5000, 0}; +#undef pci_ss_info_1458_5000 +#define pci_ss_info_1458_5000 pci_ss_info_10de_005e_1458_5000 +static const pciSubsystemInfo pci_ss_info_10de_005e_1462_7100 = + {0x1462, 0x7100, pci_subsys_10de_005e_1462_7100, 0}; +#undef pci_ss_info_1462_7100 +#define pci_ss_info_1462_7100 pci_ss_info_10de_005e_1462_7100 static const pciSubsystemInfo pci_ss_info_10de_0060_1043_80ad = {0x1043, 0x80ad, pci_subsys_10de_0060_1043_80ad, 0}; #undef pci_ss_info_1043_80ad @@ -25264,10 +30303,82 @@ {0x10de, 0x006b, pci_subsys_10de_006b_10de_006b, 0}; #undef pci_ss_info_10de_006b #define pci_ss_info_10de_006b pci_ss_info_10de_006b_10de_006b +static const pciSubsystemInfo pci_ss_info_10de_0080_147b_1c09 = + {0x147b, 0x1c09, pci_subsys_10de_0080_147b_1c09, 0}; +#undef pci_ss_info_147b_1c09 +#define pci_ss_info_147b_1c09 pci_ss_info_10de_0080_147b_1c09 +static const pciSubsystemInfo pci_ss_info_10de_0084_147b_1c09 = + {0x147b, 0x1c09, pci_subsys_10de_0084_147b_1c09, 0}; +#undef pci_ss_info_147b_1c09 +#define pci_ss_info_147b_1c09 pci_ss_info_10de_0084_147b_1c09 +static const pciSubsystemInfo pci_ss_info_10de_0085_147b_1c09 = + {0x147b, 0x1c09, pci_subsys_10de_0085_147b_1c09, 0}; +#undef pci_ss_info_147b_1c09 +#define pci_ss_info_147b_1c09 pci_ss_info_10de_0085_147b_1c09 +static const pciSubsystemInfo pci_ss_info_10de_0087_147b_1c09 = + {0x147b, 0x1c09, pci_subsys_10de_0087_147b_1c09, 0}; +#undef pci_ss_info_147b_1c09 +#define pci_ss_info_147b_1c09 pci_ss_info_10de_0087_147b_1c09 +static const pciSubsystemInfo pci_ss_info_10de_0088_147b_1c09 = + {0x147b, 0x1c09, pci_subsys_10de_0088_147b_1c09, 0}; +#undef pci_ss_info_147b_1c09 +#define pci_ss_info_147b_1c09 pci_ss_info_10de_0088_147b_1c09 +static const pciSubsystemInfo pci_ss_info_10de_008a_147b_1c09 = + {0x147b, 0x1c09, pci_subsys_10de_008a_147b_1c09, 0}; +#undef pci_ss_info_147b_1c09 +#define pci_ss_info_147b_1c09 pci_ss_info_10de_008a_147b_1c09 static const pciSubsystemInfo pci_ss_info_10de_00a0_14af_5810 = {0x14af, 0x5810, pci_subsys_10de_00a0_14af_5810, 0}; #undef pci_ss_info_14af_5810 #define pci_ss_info_14af_5810 pci_ss_info_10de_00a0_14af_5810 +static const pciSubsystemInfo pci_ss_info_10de_00df_147b_1c0b = + {0x147b, 0x1c0b, pci_subsys_10de_00df_147b_1c0b, 0}; +#undef pci_ss_info_147b_1c0b +#define pci_ss_info_147b_1c0b pci_ss_info_10de_00df_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e0_147b_1c0b = + {0x147b, 0x1c0b, pci_subsys_10de_00e0_147b_1c0b, 0}; +#undef pci_ss_info_147b_1c0b +#define pci_ss_info_147b_1c0b pci_ss_info_10de_00e0_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e1_147b_1c0b = + {0x147b, 0x1c0b, pci_subsys_10de_00e1_147b_1c0b, 0}; +#undef pci_ss_info_147b_1c0b +#define pci_ss_info_147b_1c0b pci_ss_info_10de_00e1_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e3_147b_1c0b = + {0x147b, 0x1c0b, pci_subsys_10de_00e3_147b_1c0b, 0}; +#undef pci_ss_info_147b_1c0b +#define pci_ss_info_147b_1c0b pci_ss_info_10de_00e3_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e4_147b_1c0b = + {0x147b, 0x1c0b, pci_subsys_10de_00e4_147b_1c0b, 0}; +#undef pci_ss_info_147b_1c0b +#define pci_ss_info_147b_1c0b pci_ss_info_10de_00e4_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e5_147b_1c0b = + {0x147b, 0x1c0b, pci_subsys_10de_00e5_147b_1c0b, 0}; +#undef pci_ss_info_147b_1c0b +#define pci_ss_info_147b_1c0b pci_ss_info_10de_00e5_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e7_147b_1c0b = + {0x147b, 0x1c0b, pci_subsys_10de_00e7_147b_1c0b, 0}; +#undef pci_ss_info_147b_1c0b +#define pci_ss_info_147b_1c0b pci_ss_info_10de_00e7_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00e8_147b_1c0b = + {0x147b, 0x1c0b, pci_subsys_10de_00e8_147b_1c0b, 0}; +#undef pci_ss_info_147b_1c0b +#define pci_ss_info_147b_1c0b pci_ss_info_10de_00e8_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00ea_147b_1c0b = + {0x147b, 0x1c0b, pci_subsys_10de_00ea_147b_1c0b, 0}; +#undef pci_ss_info_147b_1c0b +#define pci_ss_info_147b_1c0b pci_ss_info_10de_00ea_147b_1c0b +static const pciSubsystemInfo pci_ss_info_10de_00f1_1043_81a6 = + {0x1043, 0x81a6, pci_subsys_10de_00f1_1043_81a6, 0}; +#undef pci_ss_info_1043_81a6 +#define pci_ss_info_1043_81a6 pci_ss_info_10de_00f1_1043_81a6 +static const pciSubsystemInfo pci_ss_info_10de_00f2_1682_211c = + {0x1682, 0x211c, pci_subsys_10de_00f2_1682_211c, 0}; +#undef pci_ss_info_1682_211c +#define pci_ss_info_1682_211c pci_ss_info_10de_00f2_1682_211c +static const pciSubsystemInfo pci_ss_info_10de_00f9_1682_2120 = + {0x1682, 0x2120, pci_subsys_10de_00f9_1682_2120, 0}; +#undef pci_ss_info_1682_2120 +#define pci_ss_info_1682_2120 pci_ss_info_10de_00f9_1682_2120 static const pciSubsystemInfo pci_ss_info_10de_0100_1043_0200 = {0x1043, 0x0200, pci_subsys_10de_0100_1043_0200, 0}; #undef pci_ss_info_1043_0200 @@ -25284,6 +30395,18 @@ {0x1043, 0x4009, pci_subsys_10de_0100_1043_4009, 0}; #undef pci_ss_info_1043_4009 #define pci_ss_info_1043_4009 pci_ss_info_10de_0100_1043_4009 +static const pciSubsystemInfo pci_ss_info_10de_0100_1048_0c41 = + {0x1048, 0x0c41, pci_subsys_10de_0100_1048_0c41, 0}; +#undef pci_ss_info_1048_0c41 +#define pci_ss_info_1048_0c41 pci_ss_info_10de_0100_1048_0c41 +static const pciSubsystemInfo pci_ss_info_10de_0100_1048_0c43 = + {0x1048, 0x0c43, pci_subsys_10de_0100_1048_0c43, 0}; +#undef pci_ss_info_1048_0c43 +#define pci_ss_info_1048_0c43 pci_ss_info_10de_0100_1048_0c43 +static const pciSubsystemInfo pci_ss_info_10de_0100_1048_0c48 = + {0x1048, 0x0c48, pci_subsys_10de_0100_1048_0c48, 0}; +#undef pci_ss_info_1048_0c48 +#define pci_ss_info_1048_0c48 pci_ss_info_10de_0100_1048_0c48 static const pciSubsystemInfo pci_ss_info_10de_0100_1102_102d = {0x1102, 0x102d, pci_subsys_10de_0100_1102_102d, 0}; #undef pci_ss_info_1102_102d @@ -25304,6 +30427,10 @@ {0x1043, 0x400b, pci_subsys_10de_0101_1043_400b, 0}; #undef pci_ss_info_1043_400b #define pci_ss_info_1043_400b pci_ss_info_10de_0101_1043_400b +static const pciSubsystemInfo pci_ss_info_10de_0101_1048_0c42 = + {0x1048, 0x0c42, pci_subsys_10de_0101_1048_0c42, 0}; +#undef pci_ss_info_1048_0c42 +#define pci_ss_info_1048_0c42 pci_ss_info_10de_0101_1048_0c42 static const pciSubsystemInfo pci_ss_info_10de_0101_107d_2822 = {0x107d, 0x2822, pci_subsys_10de_0101_107d_2822, 0}; #undef pci_ss_info_107d_2822 @@ -25316,6 +30443,26 @@ {0x14af, 0x5021, pci_subsys_10de_0101_14af_5021, 0}; #undef pci_ss_info_14af_5021 #define pci_ss_info_14af_5021 pci_ss_info_10de_0101_14af_5021 +static const pciSubsystemInfo pci_ss_info_10de_0103_1048_0c40 = + {0x1048, 0x0c40, pci_subsys_10de_0103_1048_0c40, 0}; +#undef pci_ss_info_1048_0c40 +#define pci_ss_info_1048_0c40 pci_ss_info_10de_0103_1048_0c40 +static const pciSubsystemInfo pci_ss_info_10de_0103_1048_0c44 = + {0x1048, 0x0c44, pci_subsys_10de_0103_1048_0c44, 0}; +#undef pci_ss_info_1048_0c44 +#define pci_ss_info_1048_0c44 pci_ss_info_10de_0103_1048_0c44 +static const pciSubsystemInfo pci_ss_info_10de_0103_1048_0c45 = + {0x1048, 0x0c45, pci_subsys_10de_0103_1048_0c45, 0}; +#undef pci_ss_info_1048_0c45 +#define pci_ss_info_1048_0c45 pci_ss_info_10de_0103_1048_0c45 +static const pciSubsystemInfo pci_ss_info_10de_0103_1048_0c4a = + {0x1048, 0x0c4a, pci_subsys_10de_0103_1048_0c4a, 0}; +#undef pci_ss_info_1048_0c4a +#define pci_ss_info_1048_0c4a pci_ss_info_10de_0103_1048_0c4a +static const pciSubsystemInfo pci_ss_info_10de_0103_1048_0c4b = + {0x1048, 0x0c4b, pci_subsys_10de_0103_1048_0c4b, 0}; +#undef pci_ss_info_1048_0c4b +#define pci_ss_info_1048_0c4b pci_ss_info_10de_0103_1048_0c4b static const pciSubsystemInfo pci_ss_info_10de_0110_1043_4015 = {0x1043, 0x4015, pci_subsys_10de_0110_1043_4015, 0}; #undef pci_ss_info_1043_4015 @@ -25324,10 +30471,38 @@ {0x1043, 0x4031, pci_subsys_10de_0110_1043_4031, 0}; #undef pci_ss_info_1043_4031 #define pci_ss_info_1043_4031 pci_ss_info_10de_0110_1043_4031 +static const pciSubsystemInfo pci_ss_info_10de_0110_1048_0c60 = + {0x1048, 0x0c60, pci_subsys_10de_0110_1048_0c60, 0}; +#undef pci_ss_info_1048_0c60 +#define pci_ss_info_1048_0c60 pci_ss_info_10de_0110_1048_0c60 +static const pciSubsystemInfo pci_ss_info_10de_0110_1048_0c61 = + {0x1048, 0x0c61, pci_subsys_10de_0110_1048_0c61, 0}; +#undef pci_ss_info_1048_0c61 +#define pci_ss_info_1048_0c61 pci_ss_info_10de_0110_1048_0c61 +static const pciSubsystemInfo pci_ss_info_10de_0110_1048_0c63 = + {0x1048, 0x0c63, pci_subsys_10de_0110_1048_0c63, 0}; +#undef pci_ss_info_1048_0c63 +#define pci_ss_info_1048_0c63 pci_ss_info_10de_0110_1048_0c63 +static const pciSubsystemInfo pci_ss_info_10de_0110_1048_0c64 = + {0x1048, 0x0c64, pci_subsys_10de_0110_1048_0c64, 0}; +#undef pci_ss_info_1048_0c64 +#define pci_ss_info_1048_0c64 pci_ss_info_10de_0110_1048_0c64 +static const pciSubsystemInfo pci_ss_info_10de_0110_1048_0c65 = + {0x1048, 0x0c65, pci_subsys_10de_0110_1048_0c65, 0}; +#undef pci_ss_info_1048_0c65 +#define pci_ss_info_1048_0c65 pci_ss_info_10de_0110_1048_0c65 +static const pciSubsystemInfo pci_ss_info_10de_0110_1048_0c66 = + {0x1048, 0x0c66, pci_subsys_10de_0110_1048_0c66, 0}; +#undef pci_ss_info_1048_0c66 +#define pci_ss_info_1048_0c66 pci_ss_info_10de_0110_1048_0c66 static const pciSubsystemInfo pci_ss_info_10de_0110_10de_0091 = {0x10de, 0x0091, pci_subsys_10de_0110_10de_0091, 0}; #undef pci_ss_info_10de_0091 #define pci_ss_info_10de_0091 pci_ss_info_10de_0110_10de_0091 +static const pciSubsystemInfo pci_ss_info_10de_0110_10de_00a1 = + {0x10de, 0x00a1, pci_subsys_10de_0110_10de_00a1, 0}; +#undef pci_ss_info_10de_00a1 +#define pci_ss_info_10de_00a1 pci_ss_info_10de_0110_10de_00a1 static const pciSubsystemInfo pci_ss_info_10de_0110_1462_8817 = {0x1462, 0x8817, pci_subsys_10de_0110_1462_8817, 0}; #undef pci_ss_info_1462_8817 @@ -25340,10 +30515,22 @@ {0x14af, 0x7103, pci_subsys_10de_0110_14af_7103, 0}; #undef pci_ss_info_14af_7103 #define pci_ss_info_14af_7103 pci_ss_info_10de_0110_14af_7103 +static const pciSubsystemInfo pci_ss_info_10de_0141_1458_3124 = + {0x1458, 0x3124, pci_subsys_10de_0141_1458_3124, 0}; +#undef pci_ss_info_1458_3124 +#define pci_ss_info_1458_3124 pci_ss_info_10de_0141_1458_3124 static const pciSubsystemInfo pci_ss_info_10de_0150_1043_4016 = {0x1043, 0x4016, pci_subsys_10de_0150_1043_4016, 0}; #undef pci_ss_info_1043_4016 #define pci_ss_info_1043_4016 pci_ss_info_10de_0150_1043_4016 +static const pciSubsystemInfo pci_ss_info_10de_0150_1048_0c50 = + {0x1048, 0x0c50, pci_subsys_10de_0150_1048_0c50, 0}; +#undef pci_ss_info_1048_0c50 +#define pci_ss_info_1048_0c50 pci_ss_info_10de_0150_1048_0c50 +static const pciSubsystemInfo pci_ss_info_10de_0150_1048_0c52 = + {0x1048, 0x0c52, pci_subsys_10de_0150_1048_0c52, 0}; +#undef pci_ss_info_1048_0c52 +#define pci_ss_info_1048_0c52 pci_ss_info_10de_0150_1048_0c52 static const pciSubsystemInfo pci_ss_info_10de_0150_107d_2840 = {0x107d, 0x2840, pci_subsys_10de_0150_107d_2840, 0}; #undef pci_ss_info_107d_2840 @@ -25372,6 +30559,10 @@ {0x10b0, 0x0002, pci_subsys_10de_0171_10b0_0002, 0}; #undef pci_ss_info_10b0_0002 #define pci_ss_info_10b0_0002 pci_ss_info_10de_0171_10b0_0002 +static const pciSubsystemInfo pci_ss_info_10de_0171_10de_0008 = + {0x10de, 0x0008, pci_subsys_10de_0171_10de_0008, 0}; +#undef pci_ss_info_10de_0008 +#define pci_ss_info_10de_0008 pci_ss_info_10de_0171_10de_0008 static const pciSubsystemInfo pci_ss_info_10de_0171_1462_8661 = {0x1462, 0x8661, pci_subsys_10de_0171_1462_8661, 0}; #undef pci_ss_info_1462_8661 @@ -25380,6 +30571,10 @@ {0x1462, 0x8730, pci_subsys_10de_0171_1462_8730, 0}; #undef pci_ss_info_1462_8730 #define pci_ss_info_1462_8730 pci_ss_info_10de_0171_1462_8730 +static const pciSubsystemInfo pci_ss_info_10de_0171_1462_8852 = + {0x1462, 0x8852, pci_subsys_10de_0171_1462_8852, 0}; +#undef pci_ss_info_1462_8852 +#define pci_ss_info_1462_8852 pci_ss_info_10de_0171_1462_8852 static const pciSubsystemInfo pci_ss_info_10de_0171_147b_8f00 = {0x147b, 0x8f00, pci_subsys_10de_0171_147b_8f00, 0}; #undef pci_ss_info_147b_8f00 @@ -25412,10 +30607,18 @@ {0x147b, 0x8f0d, pci_subsys_10de_0181_147b_8f0d, 0}; #undef pci_ss_info_147b_8f0d #define pci_ss_info_147b_8f0d pci_ss_info_10de_0181_147b_8f0d +static const pciSubsystemInfo pci_ss_info_10de_01e0_147b_1c09 = + {0x147b, 0x1c09, pci_subsys_10de_01e0_147b_1c09, 0}; +#undef pci_ss_info_147b_1c09 +#define pci_ss_info_147b_1c09 pci_ss_info_10de_01e0_147b_1c09 static const pciSubsystemInfo pci_ss_info_10de_0200_1043_402f = {0x1043, 0x402f, pci_subsys_10de_0200_1043_402f, 0}; #undef pci_ss_info_1043_402f #define pci_ss_info_1043_402f pci_ss_info_10de_0200_1043_402f +static const pciSubsystemInfo pci_ss_info_10de_0200_1048_0c70 = + {0x1048, 0x0c70, pci_subsys_10de_0200_1048_0c70, 0}; +#undef pci_ss_info_1048_0c70 +#define pci_ss_info_1048_0c70 pci_ss_info_10de_0200_1048_0c70 static const pciSubsystemInfo pci_ss_info_10de_0202_1043_405b = {0x1043, 0x405b, pci_subsys_10de_0202_1043_405b, 0}; #undef pci_ss_info_1043_405b @@ -25444,6 +30647,14 @@ {0x1462, 0x9171, pci_subsys_10de_0322_1462_9171, 0}; #undef pci_ss_info_1462_9171 #define pci_ss_info_1462_9171 pci_ss_info_10de_0322_1462_9171 +static const pciSubsystemInfo pci_ss_info_10de_0322_1462_9360 = + {0x1462, 0x9360, pci_subsys_10de_0322_1462_9360, 0}; +#undef pci_ss_info_1462_9360 +#define pci_ss_info_1462_9360 pci_ss_info_10de_0322_1462_9360 +static const pciSubsystemInfo pci_ss_info_10de_0324_1028_0196 = + {0x1028, 0x0196, pci_subsys_10de_0324_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_10de_0324_1028_0196 static const pciSubsystemInfo pci_ss_info_10de_0324_1071_8160 = {0x1071, 0x8160, pci_subsys_10de_0324_1071_8160, 0}; #undef pci_ss_info_1071_8160 @@ -25452,6 +30663,10 @@ {0x1043, 0x8145, pci_subsys_10de_0331_1043_8145, 0}; #undef pci_ss_info_1043_8145 #define pci_ss_info_1043_8145 pci_ss_info_10de_0331_1043_8145 +static const pciSubsystemInfo pci_ss_info_10de_0347_103c_006a = + {0x103c, 0x006a, pci_subsys_10de_0347_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_10de_0347_103c_006a #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_10e1_0391_10e1_0391 = {0x10e1, 0x0391, pci_subsys_10e1_0391_10e1_0391, 0}; @@ -25509,6 +30724,16 @@ #undef pci_ss_info_1025_8921 #define pci_ss_info_1025_8921 pci_ss_info_10ec_8139_1025_8921 #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_10ec_8139_103c_006a = + {0x103c, 0x006a, pci_subsys_10ec_8139_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_10ec_8139_103c_006a +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_10ec_8139_1043_8109 = + {0x1043, 0x8109, pci_subsys_10ec_8139_1043_8109, 0}; +#undef pci_ss_info_1043_8109 +#define pci_ss_info_1043_8109 pci_ss_info_10ec_8139_1043_8109 static const pciSubsystemInfo pci_ss_info_10ec_8139_1071_8160 = {0x1071, 0x8160, pci_subsys_10ec_8139_1071_8160, 0}; #undef pci_ss_info_1071_8160 @@ -25565,6 +30790,10 @@ {0x1458, 0xe000, pci_subsys_10ec_8139_1458_e000, 0}; #undef pci_ss_info_1458_e000 #define pci_ss_info_1458_e000 pci_ss_info_10ec_8139_1458_e000 +static const pciSubsystemInfo pci_ss_info_10ec_8139_1462_788c = + {0x1462, 0x788c, pci_subsys_10ec_8139_1462_788c, 0}; +#undef pci_ss_info_1462_788c +#define pci_ss_info_1462_788c pci_ss_info_10ec_8139_1462_788c static const pciSubsystemInfo pci_ss_info_10ec_8139_146c_1439 = {0x146c, 0x1439, pci_subsys_10ec_8139_146c_1439, 0}; #undef pci_ss_info_146c_1439 @@ -25593,6 +30822,10 @@ {0x1799, 0x5000, pci_subsys_10ec_8139_1799_5000, 0}; #undef pci_ss_info_1799_5000 #define pci_ss_info_1799_5000 pci_ss_info_10ec_8139_1799_5000 +static const pciSubsystemInfo pci_ss_info_10ec_8139_1904_8139 = + {0x1904, 0x8139, pci_subsys_10ec_8139_1904_8139, 0}; +#undef pci_ss_info_1904_8139 +#define pci_ss_info_1904_8139 pci_ss_info_10ec_8139_1904_8139 static const pciSubsystemInfo pci_ss_info_10ec_8139_2646_0001 = {0x2646, 0x0001, pci_subsys_10ec_8139_2646_0001, 0}; #undef pci_ss_info_2646_0001 @@ -25605,6 +30838,10 @@ {0x8e2e, 0x7100, pci_subsys_10ec_8139_8e2e_7100, 0}; #undef pci_ss_info_8e2e_7100 #define pci_ss_info_8e2e_7100 pci_ss_info_10ec_8139_8e2e_7100 +static const pciSubsystemInfo pci_ss_info_10ec_8139_9001_1695 = + {0x9001, 0x1695, pci_subsys_10ec_8139_9001_1695, 0}; +#undef pci_ss_info_9001_1695 +#define pci_ss_info_9001_1695 pci_ss_info_10ec_8139_9001_1695 static const pciSubsystemInfo pci_ss_info_10ec_8139_a0a0_0007 = {0xa0a0, 0x0007, pci_subsys_10ec_8139_a0a0_0007, 0}; #undef pci_ss_info_a0a0_0007 @@ -25638,6 +30875,10 @@ {0x1102, 0x002f, pci_subsys_1102_0002_1102_002f, 0}; #undef pci_ss_info_1102_002f #define pci_ss_info_1102_002f pci_ss_info_1102_0002_1102_002f +static const pciSubsystemInfo pci_ss_info_1102_0002_1102_100a = + {0x1102, 0x100a, pci_subsys_1102_0002_1102_100a, 0}; +#undef pci_ss_info_1102_100a +#define pci_ss_info_1102_100a pci_ss_info_1102_0002_1102_100a static const pciSubsystemInfo pci_ss_info_1102_0002_1102_4001 = {0x1102, 0x4001, pci_subsys_1102_0002_1102_4001, 0}; #undef pci_ss_info_1102_4001 @@ -25710,10 +30951,18 @@ {0x1102, 0x0058, pci_subsys_1102_0004_1102_0058, 0}; #undef pci_ss_info_1102_0058 #define pci_ss_info_1102_0058 pci_ss_info_1102_0004_1102_0058 +static const pciSubsystemInfo pci_ss_info_1102_0004_1102_1007 = + {0x1102, 0x1007, pci_subsys_1102_0004_1102_1007, 0}; +#undef pci_ss_info_1102_1007 +#define pci_ss_info_1102_1007 pci_ss_info_1102_0004_1102_1007 static const pciSubsystemInfo pci_ss_info_1102_0004_1102_2002 = {0x1102, 0x2002, pci_subsys_1102_0004_1102_2002, 0}; #undef pci_ss_info_1102_2002 #define pci_ss_info_1102_2002 pci_ss_info_1102_0004_1102_2002 +static const pciSubsystemInfo pci_ss_info_1102_0007_1102_0007 = + {0x1102, 0x0007, pci_subsys_1102_0007_1102_0007, 0}; +#undef pci_ss_info_1102_0007 +#define pci_ss_info_1102_0007 pci_ss_info_1102_0007_1102_0007 static const pciSubsystemInfo pci_ss_info_1102_0007_1102_1001 = {0x1102, 0x1001, pci_subsys_1102_0007_1102_1001, 0}; #undef pci_ss_info_1102_1001 @@ -25722,6 +30971,18 @@ {0x1102, 0x1002, pci_subsys_1102_0007_1102_1002, 0}; #undef pci_ss_info_1102_1002 #define pci_ss_info_1102_1002 pci_ss_info_1102_0007_1102_1002 +static const pciSubsystemInfo pci_ss_info_1102_0007_1102_1006 = + {0x1102, 0x1006, pci_subsys_1102_0007_1102_1006, 0}; +#undef pci_ss_info_1102_1006 +#define pci_ss_info_1102_1006 pci_ss_info_1102_0007_1102_1006 +static const pciSubsystemInfo pci_ss_info_1102_0007_1462_1009 = + {0x1462, 0x1009, pci_subsys_1102_0007_1462_1009, 0}; +#undef pci_ss_info_1462_1009 +#define pci_ss_info_1462_1009 pci_ss_info_1102_0007_1462_1009 +static const pciSubsystemInfo pci_ss_info_1102_0008_1102_0008 = + {0x1102, 0x0008, pci_subsys_1102_0008_1102_0008, 0}; +#undef pci_ss_info_1102_0008 +#define pci_ss_info_1102_0008 pci_ss_info_1102_0008_1102_0008 static const pciSubsystemInfo pci_ss_info_1102_4001_1102_0010 = {0x1102, 0x0010, pci_subsys_1102_4001_1102_0010, 0}; #undef pci_ss_info_1102_0010 @@ -25742,6 +31003,66 @@ {0x1102, 0x1002, pci_subsys_1102_7005_1102_1002, 0}; #undef pci_ss_info_1102_1002 #define pci_ss_info_1102_1002 pci_ss_info_1102_7005_1102_1002 +static const pciSubsystemInfo pci_ss_info_1102_8938_1033_80e5 = + {0x1033, 0x80e5, pci_subsys_1102_8938_1033_80e5, 0}; +#undef pci_ss_info_1033_80e5 +#define pci_ss_info_1033_80e5 pci_ss_info_1102_8938_1033_80e5 +static const pciSubsystemInfo pci_ss_info_1102_8938_1071_7150 = + {0x1071, 0x7150, pci_subsys_1102_8938_1071_7150, 0}; +#undef pci_ss_info_1071_7150 +#define pci_ss_info_1071_7150 pci_ss_info_1102_8938_1071_7150 +static const pciSubsystemInfo pci_ss_info_1102_8938_110a_5938 = + {0x110a, 0x5938, pci_subsys_1102_8938_110a_5938, 0}; +#undef pci_ss_info_110a_5938 +#define pci_ss_info_110a_5938 pci_ss_info_1102_8938_110a_5938 +static const pciSubsystemInfo pci_ss_info_1102_8938_13bd_100c = + {0x13bd, 0x100c, pci_subsys_1102_8938_13bd_100c, 0}; +#undef pci_ss_info_13bd_100c +#define pci_ss_info_13bd_100c pci_ss_info_1102_8938_13bd_100c +static const pciSubsystemInfo pci_ss_info_1102_8938_13bd_100d = + {0x13bd, 0x100d, pci_subsys_1102_8938_13bd_100d, 0}; +#undef pci_ss_info_13bd_100d +#define pci_ss_info_13bd_100d pci_ss_info_1102_8938_13bd_100d +static const pciSubsystemInfo pci_ss_info_1102_8938_13bd_100e = + {0x13bd, 0x100e, pci_subsys_1102_8938_13bd_100e, 0}; +#undef pci_ss_info_13bd_100e +#define pci_ss_info_13bd_100e pci_ss_info_1102_8938_13bd_100e +static const pciSubsystemInfo pci_ss_info_1102_8938_13bd_f6f1 = + {0x13bd, 0xf6f1, pci_subsys_1102_8938_13bd_f6f1, 0}; +#undef pci_ss_info_13bd_f6f1 +#define pci_ss_info_13bd_f6f1 pci_ss_info_1102_8938_13bd_f6f1 +static const pciSubsystemInfo pci_ss_info_1102_8938_14ff_0e70 = + {0x14ff, 0x0e70, pci_subsys_1102_8938_14ff_0e70, 0}; +#undef pci_ss_info_14ff_0e70 +#define pci_ss_info_14ff_0e70 pci_ss_info_1102_8938_14ff_0e70 +static const pciSubsystemInfo pci_ss_info_1102_8938_14ff_c401 = + {0x14ff, 0xc401, pci_subsys_1102_8938_14ff_c401, 0}; +#undef pci_ss_info_14ff_c401 +#define pci_ss_info_14ff_c401 pci_ss_info_1102_8938_14ff_c401 +static const pciSubsystemInfo pci_ss_info_1102_8938_156d_b400 = + {0x156d, 0xb400, pci_subsys_1102_8938_156d_b400, 0}; +#undef pci_ss_info_156d_b400 +#define pci_ss_info_156d_b400 pci_ss_info_1102_8938_156d_b400 +static const pciSubsystemInfo pci_ss_info_1102_8938_156d_b550 = + {0x156d, 0xb550, pci_subsys_1102_8938_156d_b550, 0}; +#undef pci_ss_info_156d_b550 +#define pci_ss_info_156d_b550 pci_ss_info_1102_8938_156d_b550 +static const pciSubsystemInfo pci_ss_info_1102_8938_156d_b560 = + {0x156d, 0xb560, pci_subsys_1102_8938_156d_b560, 0}; +#undef pci_ss_info_156d_b560 +#define pci_ss_info_156d_b560 pci_ss_info_1102_8938_156d_b560 +static const pciSubsystemInfo pci_ss_info_1102_8938_156d_b700 = + {0x156d, 0xb700, pci_subsys_1102_8938_156d_b700, 0}; +#undef pci_ss_info_156d_b700 +#define pci_ss_info_156d_b700 pci_ss_info_1102_8938_156d_b700 +static const pciSubsystemInfo pci_ss_info_1102_8938_156d_b795 = + {0x156d, 0xb795, pci_subsys_1102_8938_156d_b795, 0}; +#undef pci_ss_info_156d_b795 +#define pci_ss_info_156d_b795 pci_ss_info_1102_8938_156d_b795 +static const pciSubsystemInfo pci_ss_info_1102_8938_156d_b797 = + {0x156d, 0xb797, pci_subsys_1102_8938_156d_b797, 0}; +#undef pci_ss_info_156d_b797 +#define pci_ss_info_156d_b797 pci_ss_info_1102_8938_156d_b797 #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1103_0004_1103_0001 = {0x1103, 0x0001, pci_subsys_1103_0004_1103_0001, 0}; @@ -25773,6 +31094,24 @@ #define pci_ss_info_1103_0008 pci_ss_info_1103_0004_1103_0008 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1105_8475_1105_0001 = + {0x1105, 0x0001, pci_subsys_1105_8475_1105_0001, 0}; +#undef pci_ss_info_1105_0001 +#define pci_ss_info_1105_0001 pci_ss_info_1105_8475_1105_0001 +static const pciSubsystemInfo pci_ss_info_1105_8476_127d_0000 = + {0x127d, 0x0000, pci_subsys_1105_8476_127d_0000, 0}; +#undef pci_ss_info_127d_0000 +#define pci_ss_info_127d_0000 pci_ss_info_1105_8476_127d_0000 +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1106_0282_1043_80a3 = + {0x1043, 0x80a3, pci_subsys_1106_0282_1043_80a3, 0}; +#undef pci_ss_info_1043_80a3 +#define pci_ss_info_1043_80a3 pci_ss_info_1106_0282_1043_80a3 +static const pciSubsystemInfo pci_ss_info_1106_0305_1019_0987 = + {0x1019, 0x0987, pci_subsys_1106_0305_1019_0987, 0}; +#undef pci_ss_info_1019_0987 +#define pci_ss_info_1019_0987 pci_ss_info_1106_0305_1019_0987 static const pciSubsystemInfo pci_ss_info_1106_0305_1043_8033 = {0x1043, 0x8033, pci_subsys_1106_0305_1043_8033, 0}; #undef pci_ss_info_1043_8033 @@ -25921,6 +31260,10 @@ {0x1019, 0x0a81, pci_subsys_1106_3038_1019_0a81, 0}; #undef pci_ss_info_1019_0a81 #define pci_ss_info_1019_0a81 pci_ss_info_1106_3038_1019_0a81 +static const pciSubsystemInfo pci_ss_info_1106_3038_1043_8080 = + {0x1043, 0x8080, pci_subsys_1106_3038_1043_8080, 0}; +#undef pci_ss_info_1043_8080 +#define pci_ss_info_1043_8080 pci_ss_info_1106_3038_1043_8080 static const pciSubsystemInfo pci_ss_info_1106_3038_1043_808c = {0x1043, 0x808c, pci_subsys_1106_3038_1043_808c, 0}; #undef pci_ss_info_1043_808c @@ -25949,6 +31292,14 @@ {0x147b, 0x1407, pci_subsys_1106_3038_147b_1407, 0}; #undef pci_ss_info_147b_1407 #define pci_ss_info_147b_1407 pci_ss_info_1106_3038_147b_1407 +static const pciSubsystemInfo pci_ss_info_1106_3038_182d_201d = + {0x182d, 0x201d, pci_subsys_1106_3038_182d_201d, 0}; +#undef pci_ss_info_182d_201d +#define pci_ss_info_182d_201d pci_ss_info_1106_3038_182d_201d +static const pciSubsystemInfo pci_ss_info_1106_3038_1849_3038 = + {0x1849, 0x3038, pci_subsys_1106_3038_1849_3038, 0}; +#undef pci_ss_info_1849_3038 +#define pci_ss_info_1849_3038 pci_ss_info_1106_3038_1849_3038 static const pciSubsystemInfo pci_ss_info_1106_3043_10bd_0000 = {0x10bd, 0x0000, pci_subsys_1106_3043_10bd_0000, 0}; #undef pci_ss_info_10bd_0000 @@ -25961,12 +31312,20 @@ {0x1186, 0x1400, pci_subsys_1106_3043_1186_1400, 0}; #undef pci_ss_info_1186_1400 #define pci_ss_info_1186_1400 pci_ss_info_1106_3043_1186_1400 +static const pciSubsystemInfo pci_ss_info_1106_3044_0574_086c = + {0x0574, 0x086c, pci_subsys_1106_3044_0574_086c, 0}; +#undef pci_ss_info_0574_086c +#define pci_ss_info_0574_086c pci_ss_info_1106_3044_0574_086c #endif static const pciSubsystemInfo pci_ss_info_1106_3044_1025_005a = {0x1025, 0x005a, pci_subsys_1106_3044_1025_005a, 0}; #undef pci_ss_info_1025_005a #define pci_ss_info_1025_005a pci_ss_info_1106_3044_1025_005a #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1106_3044_1043_808a = + {0x1043, 0x808a, pci_subsys_1106_3044_1043_808a, 0}; +#undef pci_ss_info_1043_808a +#define pci_ss_info_1043_808a pci_ss_info_1106_3044_1043_808a static const pciSubsystemInfo pci_ss_info_1106_3044_1458_1000 = {0x1458, 0x1000, pci_subsys_1106_3044_1458_1000, 0}; #undef pci_ss_info_1458_1000 @@ -25975,10 +31334,18 @@ {0x1462, 0x702d, pci_subsys_1106_3044_1462_702d, 0}; #undef pci_ss_info_1462_702d #define pci_ss_info_1462_702d pci_ss_info_1106_3044_1462_702d +static const pciSubsystemInfo pci_ss_info_1106_3044_1462_971d = + {0x1462, 0x971d, pci_subsys_1106_3044_1462_971d, 0}; +#undef pci_ss_info_1462_971d +#define pci_ss_info_1462_971d pci_ss_info_1106_3044_1462_971d static const pciSubsystemInfo pci_ss_info_1106_3057_1019_0985 = {0x1019, 0x0985, pci_subsys_1106_3057_1019_0985, 0}; #undef pci_ss_info_1019_0985 #define pci_ss_info_1019_0985 pci_ss_info_1106_3057_1019_0985 +static const pciSubsystemInfo pci_ss_info_1106_3057_1019_0987 = + {0x1019, 0x0987, pci_subsys_1106_3057_1019_0987, 0}; +#undef pci_ss_info_1019_0987 +#define pci_ss_info_1019_0987 pci_ss_info_1106_3057_1019_0987 static const pciSubsystemInfo pci_ss_info_1106_3057_1043_8033 = {0x1043, 0x8033, pci_subsys_1106_3057_1043_8033, 0}; #undef pci_ss_info_1043_8033 @@ -26015,6 +31382,10 @@ {0x1019, 0x0985, pci_subsys_1106_3058_1019_0985, 0}; #undef pci_ss_info_1019_0985 #define pci_ss_info_1019_0985 pci_ss_info_1106_3058_1019_0985 +static const pciSubsystemInfo pci_ss_info_1106_3058_1019_0987 = + {0x1019, 0x0987, pci_subsys_1106_3058_1019_0987, 0}; +#undef pci_ss_info_1019_0987 +#define pci_ss_info_1019_0987 pci_ss_info_1106_3058_1019_0987 static const pciSubsystemInfo pci_ss_info_1106_3058_1043_1106 = {0x1043, 0x1106, pci_subsys_1106_3058_1043_1106, 0}; #undef pci_ss_info_1043_1106 @@ -26055,6 +31426,10 @@ {0x1043, 0x80b0, pci_subsys_1106_3059_1043_80b0, 0}; #undef pci_ss_info_1043_80b0 #define pci_ss_info_1043_80b0 pci_ss_info_1106_3059_1043_80b0 +static const pciSubsystemInfo pci_ss_info_1106_3059_1043_812a = + {0x1043, 0x812a, pci_subsys_1106_3059_1043_812a, 0}; +#undef pci_ss_info_1043_812a +#define pci_ss_info_1043_812a pci_ss_info_1106_3059_1043_812a static const pciSubsystemInfo pci_ss_info_1106_3059_1106_3059 = {0x1106, 0x3059, pci_subsys_1106_3059_1106_3059, 0}; #undef pci_ss_info_1106_3059 @@ -26083,6 +31458,28 @@ {0x147b, 0x1407, pci_subsys_1106_3059_147b_1407, 0}; #undef pci_ss_info_147b_1407 #define pci_ss_info_147b_1407 pci_ss_info_1106_3059_147b_1407 +static const pciSubsystemInfo pci_ss_info_1106_3059_1849_9761 = + {0x1849, 0x9761, pci_subsys_1106_3059_1849_9761, 0}; +#undef pci_ss_info_1849_9761 +#define pci_ss_info_1849_9761 pci_ss_info_1106_3059_1849_9761 +#endif +static const pciSubsystemInfo pci_ss_info_1106_3059_4005_4710 = + {0x4005, 0x4710, pci_subsys_1106_3059_4005_4710, 0}; +#undef pci_ss_info_4005_4710 +#define pci_ss_info_4005_4710 pci_ss_info_1106_3059_4005_4710 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1106_3059_4170_1106 = + {0x4170, 0x1106, pci_subsys_1106_3059_4170_1106, 0}; +#undef pci_ss_info_4170_1106 +#define pci_ss_info_4170_1106 pci_ss_info_1106_3059_4170_1106 +static const pciSubsystemInfo pci_ss_info_1106_3059_4552_1106 = + {0x4552, 0x1106, pci_subsys_1106_3059_4552_1106, 0}; +#undef pci_ss_info_4552_1106 +#define pci_ss_info_4552_1106 pci_ss_info_1106_3059_4552_1106 +static const pciSubsystemInfo pci_ss_info_1106_3059_a0a0_01b6 = + {0xa0a0, 0x01b6, pci_subsys_1106_3059_a0a0_01b6, 0}; +#undef pci_ss_info_a0a0_01b6 +#define pci_ss_info_a0a0_01b6 pci_ss_info_1106_3059_a0a0_01b6 static const pciSubsystemInfo pci_ss_info_1106_3065_1043_80a1 = {0x1043, 0x80a1, pci_subsys_1106_3065_1043_80a1, 0}; #undef pci_ss_info_1043_80a1 @@ -26103,6 +31500,22 @@ {0x13b9, 0x1421, pci_subsys_1106_3065_13b9_1421, 0}; #undef pci_ss_info_13b9_1421 #define pci_ss_info_13b9_1421 pci_ss_info_1106_3065_13b9_1421 +static const pciSubsystemInfo pci_ss_info_1106_3065_147b_1c09 = + {0x147b, 0x1c09, pci_subsys_1106_3065_147b_1c09, 0}; +#undef pci_ss_info_147b_1c09 +#define pci_ss_info_147b_1c09 pci_ss_info_1106_3065_147b_1c09 +static const pciSubsystemInfo pci_ss_info_1106_3065_1695_3005 = + {0x1695, 0x3005, pci_subsys_1106_3065_1695_3005, 0}; +#undef pci_ss_info_1695_3005 +#define pci_ss_info_1695_3005 pci_ss_info_1106_3065_1695_3005 +static const pciSubsystemInfo pci_ss_info_1106_3065_1695_300c = + {0x1695, 0x300c, pci_subsys_1106_3065_1695_300c, 0}; +#undef pci_ss_info_1695_300c +#define pci_ss_info_1695_300c pci_ss_info_1106_3065_1695_300c +static const pciSubsystemInfo pci_ss_info_1106_3065_1849_3065 = + {0x1849, 0x3065, pci_subsys_1106_3065_1849_3065, 0}; +#undef pci_ss_info_1849_3065 +#define pci_ss_info_1849_3065 pci_ss_info_1106_3065_1849_3065 static const pciSubsystemInfo pci_ss_info_1106_3068_1462_309e = {0x1462, 0x309e, pci_subsys_1106_3068_1462_309e, 0}; #undef pci_ss_info_1462_309e @@ -26155,6 +31568,14 @@ {0x147b, 0x1407, pci_subsys_1106_3104_147b_1407, 0}; #undef pci_ss_info_147b_1407 #define pci_ss_info_147b_1407 pci_ss_info_1106_3104_147b_1407 +static const pciSubsystemInfo pci_ss_info_1106_3104_182d_201d = + {0x182d, 0x201d, pci_subsys_1106_3104_182d_201d, 0}; +#undef pci_ss_info_182d_201d +#define pci_ss_info_182d_201d pci_ss_info_1106_3104_182d_201d +static const pciSubsystemInfo pci_ss_info_1106_3104_1849_3104 = + {0x1849, 0x3104, pci_subsys_1106_3104_1849_3104, 0}; +#undef pci_ss_info_1849_3104 +#define pci_ss_info_1849_3104 pci_ss_info_1106_3104_1849_3104 static const pciSubsystemInfo pci_ss_info_1106_3106_1186_1403 = {0x1186, 0x1403, pci_subsys_1106_3106_1186_1403, 0}; #undef pci_ss_info_1186_1403 @@ -26163,6 +31584,10 @@ {0x1297, 0xf641, pci_subsys_1106_3116_1297_f641, 0}; #undef pci_ss_info_1297_f641 #define pci_ss_info_1297_f641 pci_ss_info_1106_3116_1297_f641 +static const pciSubsystemInfo pci_ss_info_1106_3147_1043_808c = + {0x1043, 0x808c, pci_subsys_1106_3147_1043_808c, 0}; +#undef pci_ss_info_1043_808c +#define pci_ss_info_1043_808c pci_ss_info_1106_3147_1043_808c static const pciSubsystemInfo pci_ss_info_1106_3149_1043_80ed = {0x1043, 0x80ed, pci_subsys_1106_3149_1043_80ed, 0}; #undef pci_ss_info_1043_80ed @@ -26175,6 +31600,26 @@ {0x1462, 0x7020, pci_subsys_1106_3149_1462_7020, 0}; #undef pci_ss_info_1462_7020 #define pci_ss_info_1462_7020 pci_ss_info_1106_3149_1462_7020 +static const pciSubsystemInfo pci_ss_info_1106_3149_147b_1407 = + {0x147b, 0x1407, pci_subsys_1106_3149_147b_1407, 0}; +#undef pci_ss_info_147b_1407 +#define pci_ss_info_147b_1407 pci_ss_info_1106_3149_147b_1407 +static const pciSubsystemInfo pci_ss_info_1106_3149_147b_1408 = + {0x147b, 0x1408, pci_subsys_1106_3149_147b_1408, 0}; +#undef pci_ss_info_147b_1408 +#define pci_ss_info_147b_1408 pci_ss_info_1106_3149_147b_1408 +static const pciSubsystemInfo pci_ss_info_1106_3149_1849_3149 = + {0x1849, 0x3149, pci_subsys_1106_3149_1849_3149, 0}; +#undef pci_ss_info_1849_3149 +#define pci_ss_info_1849_3149 pci_ss_info_1106_3149_1849_3149 +static const pciSubsystemInfo pci_ss_info_1106_3164_1043_80f4 = + {0x1043, 0x80f4, pci_subsys_1106_3164_1043_80f4, 0}; +#undef pci_ss_info_1043_80f4 +#define pci_ss_info_1043_80f4 pci_ss_info_1106_3164_1043_80f4 +static const pciSubsystemInfo pci_ss_info_1106_3164_1462_7028 = + {0x1462, 0x7028, pci_subsys_1106_3164_1462_7028, 0}; +#undef pci_ss_info_1462_7028 +#define pci_ss_info_1462_7028 pci_ss_info_1106_3164_1462_7028 static const pciSubsystemInfo pci_ss_info_1106_3177_1019_0a81 = {0x1019, 0x0a81, pci_subsys_1106_3177_1019_0a81, 0}; #undef pci_ss_info_1019_0a81 @@ -26199,6 +31644,10 @@ {0x1849, 0x3177, pci_subsys_1106_3177_1849_3177, 0}; #undef pci_ss_info_1849_3177 #define pci_ss_info_1849_3177 pci_ss_info_1106_3177_1849_3177 +static const pciSubsystemInfo pci_ss_info_1106_3188_1043_80a3 = + {0x1043, 0x80a3, pci_subsys_1106_3188_1043_80a3, 0}; +#undef pci_ss_info_1043_80a3 +#define pci_ss_info_1043_80a3 pci_ss_info_1106_3188_1043_80a3 static const pciSubsystemInfo pci_ss_info_1106_3188_147b_1407 = {0x147b, 0x1407, pci_subsys_1106_3188_147b_1407, 0}; #undef pci_ss_info_147b_1407 @@ -26211,6 +31660,10 @@ {0x1458, 0x5000, pci_subsys_1106_3189_1458_5000, 0}; #undef pci_ss_info_1458_5000 #define pci_ss_info_1458_5000 pci_ss_info_1106_3189_1458_5000 +static const pciSubsystemInfo pci_ss_info_1106_3189_1849_3189 = + {0x1849, 0x3189, pci_subsys_1106_3189_1849_3189, 0}; +#undef pci_ss_info_1849_3189 +#define pci_ss_info_1849_3189 pci_ss_info_1106_3189_1849_3189 static const pciSubsystemInfo pci_ss_info_1106_3205_1458_5000 = {0x1458, 0x5000, pci_subsys_1106_3205_1458_5000, 0}; #undef pci_ss_info_1458_5000 @@ -26231,6 +31684,10 @@ {0x147b, 0x1407, pci_subsys_1106_3227_147b_1407, 0}; #undef pci_ss_info_147b_1407 #define pci_ss_info_147b_1407 pci_ss_info_1106_3227_147b_1407 +static const pciSubsystemInfo pci_ss_info_1106_3227_1849_3227 = + {0x1849, 0x3227, pci_subsys_1106_3227_1849_3227, 0}; +#undef pci_ss_info_1849_3227 +#define pci_ss_info_1849_3227 pci_ss_info_1106_3227_1849_3227 static const pciSubsystemInfo pci_ss_info_1106_7205_1458_d000 = {0x1458, 0xd000, pci_subsys_1106_7205_1458_d000, 0}; #undef pci_ss_info_1458_d000 @@ -26313,18 +31770,264 @@ #define pci_ss_info_1127_0400 pci_ss_info_1127_0400_1127_0400 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1131_5402_1244_0f00 = + {0x1244, 0x0f00, pci_subsys_1131_5402_1244_0f00, 0}; +#undef pci_ss_info_1244_0f00 +#define pci_ss_info_1244_0f00 pci_ss_info_1131_5402_1244_0f00 +#endif +static const pciSubsystemInfo pci_ss_info_1131_7130_102b_48d0 = + {0x102b, 0x48d0, pci_subsys_1131_7130_102b_48d0, 0}; +#undef pci_ss_info_102b_48d0 +#define pci_ss_info_102b_48d0 pci_ss_info_1131_7130_102b_48d0 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1131_7130_1048_226b = + {0x1048, 0x226b, pci_subsys_1131_7130_1048_226b, 0}; +#undef pci_ss_info_1048_226b +#define pci_ss_info_1048_226b pci_ss_info_1131_7130_1048_226b +static const pciSubsystemInfo pci_ss_info_1131_7130_1131_2001 = + {0x1131, 0x2001, pci_subsys_1131_7130_1131_2001, 0}; +#undef pci_ss_info_1131_2001 +#define pci_ss_info_1131_2001 pci_ss_info_1131_7130_1131_2001 +static const pciSubsystemInfo pci_ss_info_1131_7130_1131_2005 = + {0x1131, 0x2005, pci_subsys_1131_7130_1131_2005, 0}; +#undef pci_ss_info_1131_2005 +#define pci_ss_info_1131_2005 pci_ss_info_1131_7130_1131_2005 +static const pciSubsystemInfo pci_ss_info_1131_7130_1461_050c = + {0x1461, 0x050c, pci_subsys_1131_7130_1461_050c, 0}; +#undef pci_ss_info_1461_050c +#define pci_ss_info_1461_050c pci_ss_info_1131_7130_1461_050c +static const pciSubsystemInfo pci_ss_info_1131_7130_1461_10ff = + {0x1461, 0x10ff, pci_subsys_1131_7130_1461_10ff, 0}; +#undef pci_ss_info_1461_10ff +#define pci_ss_info_1461_10ff pci_ss_info_1131_7130_1461_10ff +static const pciSubsystemInfo pci_ss_info_1131_7130_1461_2108 = + {0x1461, 0x2108, pci_subsys_1131_7130_1461_2108, 0}; +#undef pci_ss_info_1461_2108 +#define pci_ss_info_1461_2108 pci_ss_info_1131_7130_1461_2108 +static const pciSubsystemInfo pci_ss_info_1131_7130_1461_2115 = + {0x1461, 0x2115, pci_subsys_1131_7130_1461_2115, 0}; +#undef pci_ss_info_1461_2115 +#define pci_ss_info_1461_2115 pci_ss_info_1131_7130_1461_2115 +static const pciSubsystemInfo pci_ss_info_1131_7130_153b_1152 = + {0x153b, 0x1152, pci_subsys_1131_7130_153b_1152, 0}; +#undef pci_ss_info_153b_1152 +#define pci_ss_info_153b_1152 pci_ss_info_1131_7130_153b_1152 +static const pciSubsystemInfo pci_ss_info_1131_7130_185b_c100 = + {0x185b, 0xc100, pci_subsys_1131_7130_185b_c100, 0}; +#undef pci_ss_info_185b_c100 +#define pci_ss_info_185b_c100 pci_ss_info_1131_7130_185b_c100 +static const pciSubsystemInfo pci_ss_info_1131_7130_185b_c901 = + {0x185b, 0xc901, pci_subsys_1131_7130_185b_c901, 0}; +#undef pci_ss_info_185b_c901 +#define pci_ss_info_185b_c901 pci_ss_info_1131_7130_185b_c901 static const pciSubsystemInfo pci_ss_info_1131_7130_5168_0138 = {0x5168, 0x0138, pci_subsys_1131_7130_5168_0138, 0}; #undef pci_ss_info_5168_0138 #define pci_ss_info_5168_0138 pci_ss_info_1131_7130_5168_0138 -static const pciSubsystemInfo pci_ss_info_1131_7133_5168_0138 = - {0x5168, 0x0138, pci_subsys_1131_7133_5168_0138, 0}; -#undef pci_ss_info_5168_0138 -#define pci_ss_info_5168_0138 pci_ss_info_1131_7133_5168_0138 -static const pciSubsystemInfo pci_ss_info_1131_7133_5168_0212 = - {0x5168, 0x0212, pci_subsys_1131_7133_5168_0212, 0}; -#undef pci_ss_info_5168_0212 -#define pci_ss_info_5168_0212 pci_ss_info_1131_7133_5168_0212 +static const pciSubsystemInfo pci_ss_info_1131_7133_0000_4091 = + {0x0000, 0x4091, pci_subsys_1131_7133_0000_4091, 0}; +#undef pci_ss_info_0000_4091 +#define pci_ss_info_0000_4091 pci_ss_info_1131_7133_0000_4091 +static const pciSubsystemInfo pci_ss_info_1131_7133_002b_11bd = + {0x002b, 0x11bd, pci_subsys_1131_7133_002b_11bd, 0}; +#undef pci_ss_info_002b_11bd +#define pci_ss_info_002b_11bd pci_ss_info_1131_7133_002b_11bd +static const pciSubsystemInfo pci_ss_info_1131_7133_1019_4cb5 = + {0x1019, 0x4cb5, pci_subsys_1131_7133_1019_4cb5, 0}; +#undef pci_ss_info_1019_4cb5 +#define pci_ss_info_1019_4cb5 pci_ss_info_1131_7133_1019_4cb5 +static const pciSubsystemInfo pci_ss_info_1131_7133_1043_0210 = + {0x1043, 0x0210, pci_subsys_1131_7133_1043_0210, 0}; +#undef pci_ss_info_1043_0210 +#define pci_ss_info_1043_0210 pci_ss_info_1131_7133_1043_0210 +static const pciSubsystemInfo pci_ss_info_1131_7133_1043_4843 = + {0x1043, 0x4843, pci_subsys_1131_7133_1043_4843, 0}; +#undef pci_ss_info_1043_4843 +#define pci_ss_info_1043_4843 pci_ss_info_1131_7133_1043_4843 +static const pciSubsystemInfo pci_ss_info_1131_7133_1043_4845 = + {0x1043, 0x4845, pci_subsys_1131_7133_1043_4845, 0}; +#undef pci_ss_info_1043_4845 +#define pci_ss_info_1043_4845 pci_ss_info_1131_7133_1043_4845 +static const pciSubsystemInfo pci_ss_info_1131_7133_1043_4862 = + {0x1043, 0x4862, pci_subsys_1131_7133_1043_4862, 0}; +#undef pci_ss_info_1043_4862 +#define pci_ss_info_1043_4862 pci_ss_info_1131_7133_1043_4862 +static const pciSubsystemInfo pci_ss_info_1131_7133_1131_2001 = + {0x1131, 0x2001, pci_subsys_1131_7133_1131_2001, 0}; +#undef pci_ss_info_1131_2001 +#define pci_ss_info_1131_2001 pci_ss_info_1131_7133_1131_2001 +static const pciSubsystemInfo pci_ss_info_1131_7133_1131_2018 = + {0x1131, 0x2018, pci_subsys_1131_7133_1131_2018, 0}; +#undef pci_ss_info_1131_2018 +#define pci_ss_info_1131_2018 pci_ss_info_1131_7133_1131_2018 +static const pciSubsystemInfo pci_ss_info_1131_7133_1131_4ee9 = + {0x1131, 0x4ee9, pci_subsys_1131_7133_1131_4ee9, 0}; +#undef pci_ss_info_1131_4ee9 +#define pci_ss_info_1131_4ee9 pci_ss_info_1131_7133_1131_4ee9 +static const pciSubsystemInfo pci_ss_info_1131_7133_11bd_002e = + {0x11bd, 0x002e, pci_subsys_1131_7133_11bd_002e, 0}; +#undef pci_ss_info_11bd_002e +#define pci_ss_info_11bd_002e pci_ss_info_1131_7133_11bd_002e +static const pciSubsystemInfo pci_ss_info_1131_7133_12ab_0800 = + {0x12ab, 0x0800, pci_subsys_1131_7133_12ab_0800, 0}; +#undef pci_ss_info_12ab_0800 +#define pci_ss_info_12ab_0800 pci_ss_info_1131_7133_12ab_0800 +static const pciSubsystemInfo pci_ss_info_1131_7133_1421_1370 = + {0x1421, 0x1370, pci_subsys_1131_7133_1421_1370, 0}; +#undef pci_ss_info_1421_1370 +#define pci_ss_info_1421_1370 pci_ss_info_1131_7133_1421_1370 +static const pciSubsystemInfo pci_ss_info_1131_7133_1435_7330 = + {0x1435, 0x7330, pci_subsys_1131_7133_1435_7330, 0}; +#undef pci_ss_info_1435_7330 +#define pci_ss_info_1435_7330 pci_ss_info_1131_7133_1435_7330 +static const pciSubsystemInfo pci_ss_info_1131_7133_1435_7350 = + {0x1435, 0x7350, pci_subsys_1131_7133_1435_7350, 0}; +#undef pci_ss_info_1435_7350 +#define pci_ss_info_1435_7350 pci_ss_info_1131_7133_1435_7350 +static const pciSubsystemInfo pci_ss_info_1131_7133_1461_1044 = + {0x1461, 0x1044, pci_subsys_1131_7133_1461_1044, 0}; +#undef pci_ss_info_1461_1044 +#define pci_ss_info_1461_1044 pci_ss_info_1131_7133_1461_1044 +static const pciSubsystemInfo pci_ss_info_1131_7133_1461_f31f = + {0x1461, 0xf31f, pci_subsys_1131_7133_1461_f31f, 0}; +#undef pci_ss_info_1461_f31f +#define pci_ss_info_1461_f31f pci_ss_info_1131_7133_1461_f31f +static const pciSubsystemInfo pci_ss_info_1131_7133_1462_6231 = + {0x1462, 0x6231, pci_subsys_1131_7133_1462_6231, 0}; +#undef pci_ss_info_1462_6231 +#define pci_ss_info_1462_6231 pci_ss_info_1131_7133_1462_6231 +static const pciSubsystemInfo pci_ss_info_1131_7133_1489_0214 = + {0x1489, 0x0214, pci_subsys_1131_7133_1489_0214, 0}; +#undef pci_ss_info_1489_0214 +#define pci_ss_info_1489_0214 pci_ss_info_1131_7133_1489_0214 +static const pciSubsystemInfo pci_ss_info_1131_7133_14c0_1212 = + {0x14c0, 0x1212, pci_subsys_1131_7133_14c0_1212, 0}; +#undef pci_ss_info_14c0_1212 +#define pci_ss_info_14c0_1212 pci_ss_info_1131_7133_14c0_1212 +static const pciSubsystemInfo pci_ss_info_1131_7133_153b_1160 = + {0x153b, 0x1160, pci_subsys_1131_7133_153b_1160, 0}; +#undef pci_ss_info_153b_1160 +#define pci_ss_info_153b_1160 pci_ss_info_1131_7133_153b_1160 +static const pciSubsystemInfo pci_ss_info_1131_7133_153b_1162 = + {0x153b, 0x1162, pci_subsys_1131_7133_153b_1162, 0}; +#undef pci_ss_info_153b_1162 +#define pci_ss_info_153b_1162 pci_ss_info_1131_7133_153b_1162 +static const pciSubsystemInfo pci_ss_info_1131_7133_185b_c100 = + {0x185b, 0xc100, pci_subsys_1131_7133_185b_c100, 0}; +#undef pci_ss_info_185b_c100 +#define pci_ss_info_185b_c100 pci_ss_info_1131_7133_185b_c100 +static const pciSubsystemInfo pci_ss_info_1131_7133_4e42_0212 = + {0x4e42, 0x0212, pci_subsys_1131_7133_4e42_0212, 0}; +#undef pci_ss_info_4e42_0212 +#define pci_ss_info_4e42_0212 pci_ss_info_1131_7133_4e42_0212 +static const pciSubsystemInfo pci_ss_info_1131_7133_4e42_0502 = + {0x4e42, 0x0502, pci_subsys_1131_7133_4e42_0502, 0}; +#undef pci_ss_info_4e42_0502 +#define pci_ss_info_4e42_0502 pci_ss_info_1131_7133_4e42_0502 +static const pciSubsystemInfo pci_ss_info_1131_7133_5168_0306 = + {0x5168, 0x0306, pci_subsys_1131_7133_5168_0306, 0}; +#undef pci_ss_info_5168_0306 +#define pci_ss_info_5168_0306 pci_ss_info_1131_7133_5168_0306 +static const pciSubsystemInfo pci_ss_info_1131_7133_5168_0319 = + {0x5168, 0x0319, pci_subsys_1131_7133_5168_0319, 0}; +#undef pci_ss_info_5168_0319 +#define pci_ss_info_5168_0319 pci_ss_info_1131_7133_5168_0319 +static const pciSubsystemInfo pci_ss_info_1131_7133_5456_7135 = + {0x5456, 0x7135, pci_subsys_1131_7133_5456_7135, 0}; +#undef pci_ss_info_5456_7135 +#define pci_ss_info_5456_7135 pci_ss_info_1131_7133_5456_7135 +static const pciSubsystemInfo pci_ss_info_1131_7134_1019_4cb4 = + {0x1019, 0x4cb4, pci_subsys_1131_7134_1019_4cb4, 0}; +#undef pci_ss_info_1019_4cb4 +#define pci_ss_info_1019_4cb4 pci_ss_info_1131_7134_1019_4cb4 +static const pciSubsystemInfo pci_ss_info_1131_7134_1043_0210 = + {0x1043, 0x0210, pci_subsys_1131_7134_1043_0210, 0}; +#undef pci_ss_info_1043_0210 +#define pci_ss_info_1043_0210 pci_ss_info_1131_7134_1043_0210 +static const pciSubsystemInfo pci_ss_info_1131_7134_1043_4840 = + {0x1043, 0x4840, pci_subsys_1131_7134_1043_4840, 0}; +#undef pci_ss_info_1043_4840 +#define pci_ss_info_1043_4840 pci_ss_info_1131_7134_1043_4840 +static const pciSubsystemInfo pci_ss_info_1131_7134_1131_2004 = + {0x1131, 0x2004, pci_subsys_1131_7134_1131_2004, 0}; +#undef pci_ss_info_1131_2004 +#define pci_ss_info_1131_2004 pci_ss_info_1131_7134_1131_2004 +static const pciSubsystemInfo pci_ss_info_1131_7134_1131_4e85 = + {0x1131, 0x4e85, pci_subsys_1131_7134_1131_4e85, 0}; +#undef pci_ss_info_1131_4e85 +#define pci_ss_info_1131_4e85 pci_ss_info_1131_7134_1131_4e85 +static const pciSubsystemInfo pci_ss_info_1131_7134_1131_6752 = + {0x1131, 0x6752, pci_subsys_1131_7134_1131_6752, 0}; +#undef pci_ss_info_1131_6752 +#define pci_ss_info_1131_6752 pci_ss_info_1131_7134_1131_6752 +static const pciSubsystemInfo pci_ss_info_1131_7134_11bd_002b = + {0x11bd, 0x002b, pci_subsys_1131_7134_11bd_002b, 0}; +#undef pci_ss_info_11bd_002b +#define pci_ss_info_11bd_002b pci_ss_info_1131_7134_11bd_002b +static const pciSubsystemInfo pci_ss_info_1131_7134_11bd_002d = + {0x11bd, 0x002d, pci_subsys_1131_7134_11bd_002d, 0}; +#undef pci_ss_info_11bd_002d +#define pci_ss_info_11bd_002d pci_ss_info_1131_7134_11bd_002d +static const pciSubsystemInfo pci_ss_info_1131_7134_1461_9715 = + {0x1461, 0x9715, pci_subsys_1131_7134_1461_9715, 0}; +#undef pci_ss_info_1461_9715 +#define pci_ss_info_1461_9715 pci_ss_info_1131_7134_1461_9715 +static const pciSubsystemInfo pci_ss_info_1131_7134_1461_a70a = + {0x1461, 0xa70a, pci_subsys_1131_7134_1461_a70a, 0}; +#undef pci_ss_info_1461_a70a +#define pci_ss_info_1461_a70a pci_ss_info_1131_7134_1461_a70a +static const pciSubsystemInfo pci_ss_info_1131_7134_1461_a70b = + {0x1461, 0xa70b, pci_subsys_1131_7134_1461_a70b, 0}; +#undef pci_ss_info_1461_a70b +#define pci_ss_info_1461_a70b pci_ss_info_1131_7134_1461_a70b +static const pciSubsystemInfo pci_ss_info_1131_7134_1461_d6ee = + {0x1461, 0xd6ee, pci_subsys_1131_7134_1461_d6ee, 0}; +#undef pci_ss_info_1461_d6ee +#define pci_ss_info_1461_d6ee pci_ss_info_1131_7134_1461_d6ee +static const pciSubsystemInfo pci_ss_info_1131_7134_1471_b7e9 = + {0x1471, 0xb7e9, pci_subsys_1131_7134_1471_b7e9, 0}; +#undef pci_ss_info_1471_b7e9 +#define pci_ss_info_1471_b7e9 pci_ss_info_1131_7134_1471_b7e9 +static const pciSubsystemInfo pci_ss_info_1131_7134_153b_1142 = + {0x153b, 0x1142, pci_subsys_1131_7134_153b_1142, 0}; +#undef pci_ss_info_153b_1142 +#define pci_ss_info_153b_1142 pci_ss_info_1131_7134_153b_1142 +static const pciSubsystemInfo pci_ss_info_1131_7134_153b_1143 = + {0x153b, 0x1143, pci_subsys_1131_7134_153b_1143, 0}; +#undef pci_ss_info_153b_1143 +#define pci_ss_info_153b_1143 pci_ss_info_1131_7134_153b_1143 +static const pciSubsystemInfo pci_ss_info_1131_7134_153b_1158 = + {0x153b, 0x1158, pci_subsys_1131_7134_153b_1158, 0}; +#undef pci_ss_info_153b_1158 +#define pci_ss_info_153b_1158 pci_ss_info_1131_7134_153b_1158 +static const pciSubsystemInfo pci_ss_info_1131_7134_1540_9524 = + {0x1540, 0x9524, pci_subsys_1131_7134_1540_9524, 0}; +#undef pci_ss_info_1540_9524 +#define pci_ss_info_1540_9524 pci_ss_info_1131_7134_1540_9524 +static const pciSubsystemInfo pci_ss_info_1131_7134_16be_0003 = + {0x16be, 0x0003, pci_subsys_1131_7134_16be_0003, 0}; +#undef pci_ss_info_16be_0003 +#define pci_ss_info_16be_0003 pci_ss_info_1131_7134_16be_0003 +static const pciSubsystemInfo pci_ss_info_1131_7134_185b_c200 = + {0x185b, 0xc200, pci_subsys_1131_7134_185b_c200, 0}; +#undef pci_ss_info_185b_c200 +#define pci_ss_info_185b_c200 pci_ss_info_1131_7134_185b_c200 +static const pciSubsystemInfo pci_ss_info_1131_7134_185b_c900 = + {0x185b, 0xc900, pci_subsys_1131_7134_185b_c900, 0}; +#undef pci_ss_info_185b_c900 +#define pci_ss_info_185b_c900 pci_ss_info_1131_7134_185b_c900 +static const pciSubsystemInfo pci_ss_info_1131_7134_1894_a006 = + {0x1894, 0xa006, pci_subsys_1131_7134_1894_a006, 0}; +#undef pci_ss_info_1894_a006 +#define pci_ss_info_1894_a006 pci_ss_info_1131_7134_1894_a006 +static const pciSubsystemInfo pci_ss_info_1131_7134_1894_fe01 = + {0x1894, 0xfe01, pci_subsys_1131_7134_1894_fe01, 0}; +#undef pci_ss_info_1894_fe01 +#define pci_ss_info_1894_fe01 pci_ss_info_1131_7134_1894_fe01 +static const pciSubsystemInfo pci_ss_info_1131_7134_4e42_0138 = + {0x4e42, 0x0138, pci_subsys_1131_7134_4e42_0138, 0}; +#undef pci_ss_info_4e42_0138 +#define pci_ss_info_4e42_0138 pci_ss_info_1131_7134_4e42_0138 static const pciSubsystemInfo pci_ss_info_1131_7146_110a_0000 = {0x110a, 0x0000, pci_subsys_1131_7146_110a_0000, 0}; #undef pci_ss_info_110a_0000 @@ -26337,10 +32040,18 @@ {0x1131, 0x4f56, pci_subsys_1131_7146_1131_4f56, 0}; #undef pci_ss_info_1131_4f56 #define pci_ss_info_1131_4f56 pci_ss_info_1131_7146_1131_4f56 +static const pciSubsystemInfo pci_ss_info_1131_7146_1131_4f60 = + {0x1131, 0x4f60, pci_subsys_1131_7146_1131_4f60, 0}; +#undef pci_ss_info_1131_4f60 +#define pci_ss_info_1131_4f60 pci_ss_info_1131_7146_1131_4f60 static const pciSubsystemInfo pci_ss_info_1131_7146_1131_4f61 = {0x1131, 0x4f61, pci_subsys_1131_7146_1131_4f61, 0}; #undef pci_ss_info_1131_4f61 #define pci_ss_info_1131_4f61 pci_ss_info_1131_7146_1131_4f61 +static const pciSubsystemInfo pci_ss_info_1131_7146_1131_5f61 = + {0x1131, 0x5f61, pci_subsys_1131_7146_1131_5f61, 0}; +#undef pci_ss_info_1131_5f61 +#define pci_ss_info_1131_5f61 pci_ss_info_1131_7146_1131_5f61 static const pciSubsystemInfo pci_ss_info_1131_7146_114b_2003 = {0x114b, 0x2003, pci_subsys_1131_7146_114b_2003, 0}; #undef pci_ss_info_114b_2003 @@ -26353,6 +32064,10 @@ {0x11bd, 0x000a, pci_subsys_1131_7146_11bd_000a, 0}; #undef pci_ss_info_11bd_000a #define pci_ss_info_11bd_000a pci_ss_info_1131_7146_11bd_000a +static const pciSubsystemInfo pci_ss_info_1131_7146_11bd_000f = + {0x11bd, 0x000f, pci_subsys_1131_7146_11bd_000f, 0}; +#undef pci_ss_info_11bd_000f +#define pci_ss_info_11bd_000f pci_ss_info_1131_7146_11bd_000f static const pciSubsystemInfo pci_ss_info_1131_7146_13c2_0000 = {0x13c2, 0x0000, pci_subsys_1131_7146_13c2_0000, 0}; #undef pci_ss_info_13c2_0000 @@ -26413,6 +32128,10 @@ {0x13c2, 0x1013, pci_subsys_1131_7146_13c2_1013, 0}; #undef pci_ss_info_13c2_1013 #define pci_ss_info_13c2_1013 pci_ss_info_1131_7146_13c2_1013 +static const pciSubsystemInfo pci_ss_info_1131_7146_13c2_1016 = + {0x13c2, 0x1016, pci_subsys_1131_7146_13c2_1016, 0}; +#undef pci_ss_info_13c2_1016 +#define pci_ss_info_13c2_1016 pci_ss_info_1131_7146_13c2_1016 static const pciSubsystemInfo pci_ss_info_1131_7146_13c2_1102 = {0x13c2, 0x1102, pci_subsys_1131_7146_13c2_1102, 0}; #undef pci_ss_info_13c2_1102 @@ -26423,14 +32142,6 @@ {0x110a, 0x0021, pci_subsys_1133_e010_110a_0021, 0}; #undef pci_ss_info_110a_0021 #define pci_ss_info_110a_0021 pci_ss_info_1133_e010_110a_0021 -static const pciSubsystemInfo pci_ss_info_1133_e010_8001_0014 = - {0x8001, 0x0014, pci_subsys_1133_e010_8001_0014, 0}; -#undef pci_ss_info_8001_0014 -#define pci_ss_info_8001_0014 pci_ss_info_1133_e010_8001_0014 -static const pciSubsystemInfo pci_ss_info_1133_e012_8001_0014 = - {0x8001, 0x0014, pci_subsys_1133_e012_8001_0014, 0}; -#undef pci_ss_info_8001_0014 -#define pci_ss_info_8001_0014 pci_ss_info_1133_e012_8001_0014 static const pciSubsystemInfo pci_ss_info_1133_e013_1133_1300 = {0x1133, 0x1300, pci_subsys_1133_e013_1133_1300, 0}; #undef pci_ss_info_1133_1300 @@ -26439,38 +32150,14 @@ {0x1133, 0xe013, pci_subsys_1133_e013_1133_e013, 0}; #undef pci_ss_info_1133_e013 #define pci_ss_info_1133_e013 pci_ss_info_1133_e013_1133_e013 -static const pciSubsystemInfo pci_ss_info_1133_e013_8001_0014 = - {0x8001, 0x0014, pci_subsys_1133_e013_8001_0014, 0}; -#undef pci_ss_info_8001_0014 -#define pci_ss_info_8001_0014 pci_ss_info_1133_e013_8001_0014 -static const pciSubsystemInfo pci_ss_info_1133_e014_0008_0100 = - {0x0008, 0x0100, pci_subsys_1133_e014_0008_0100, 0}; -#undef pci_ss_info_0008_0100 -#define pci_ss_info_0008_0100 pci_ss_info_1133_e014_0008_0100 -static const pciSubsystemInfo pci_ss_info_1133_e014_8001_0014 = - {0x8001, 0x0014, pci_subsys_1133_e014_8001_0014, 0}; -#undef pci_ss_info_8001_0014 -#define pci_ss_info_8001_0014 pci_ss_info_1133_e014_8001_0014 static const pciSubsystemInfo pci_ss_info_1133_e015_1133_e015 = {0x1133, 0xe015, pci_subsys_1133_e015_1133_e015, 0}; #undef pci_ss_info_1133_e015 #define pci_ss_info_1133_e015 pci_ss_info_1133_e015_1133_e015 -static const pciSubsystemInfo pci_ss_info_1133_e015_8001_0014 = - {0x8001, 0x0014, pci_subsys_1133_e015_8001_0014, 0}; -#undef pci_ss_info_8001_0014 -#define pci_ss_info_8001_0014 pci_ss_info_1133_e015_8001_0014 -static const pciSubsystemInfo pci_ss_info_1133_e016_8001_0014 = - {0x8001, 0x0014, pci_subsys_1133_e016_8001_0014, 0}; -#undef pci_ss_info_8001_0014 -#define pci_ss_info_8001_0014 pci_ss_info_1133_e016_8001_0014 static const pciSubsystemInfo pci_ss_info_1133_e017_1133_e017 = {0x1133, 0xe017, pci_subsys_1133_e017_1133_e017, 0}; #undef pci_ss_info_1133_e017 #define pci_ss_info_1133_e017 pci_ss_info_1133_e017_1133_e017 -static const pciSubsystemInfo pci_ss_info_1133_e017_8001_0014 = - {0x8001, 0x0014, pci_subsys_1133_e017_8001_0014, 0}; -#undef pci_ss_info_8001_0014 -#define pci_ss_info_8001_0014 pci_ss_info_1133_e017_8001_0014 static const pciSubsystemInfo pci_ss_info_1133_e018_1133_1800 = {0x1133, 0x1800, pci_subsys_1133_e018_1133_1800, 0}; #undef pci_ss_info_1133_1800 @@ -26479,26 +32166,14 @@ {0x1133, 0xe018, pci_subsys_1133_e018_1133_e018, 0}; #undef pci_ss_info_1133_e018 #define pci_ss_info_1133_e018 pci_ss_info_1133_e018_1133_e018 -static const pciSubsystemInfo pci_ss_info_1133_e018_8001_0014 = - {0x8001, 0x0014, pci_subsys_1133_e018_8001_0014, 0}; -#undef pci_ss_info_8001_0014 -#define pci_ss_info_8001_0014 pci_ss_info_1133_e018_8001_0014 static const pciSubsystemInfo pci_ss_info_1133_e019_1133_e019 = {0x1133, 0xe019, pci_subsys_1133_e019_1133_e019, 0}; #undef pci_ss_info_1133_e019 #define pci_ss_info_1133_e019 pci_ss_info_1133_e019_1133_e019 -static const pciSubsystemInfo pci_ss_info_1133_e019_8001_0014 = - {0x8001, 0x0014, pci_subsys_1133_e019_8001_0014, 0}; -#undef pci_ss_info_8001_0014 -#define pci_ss_info_8001_0014 pci_ss_info_1133_e019_8001_0014 static const pciSubsystemInfo pci_ss_info_1133_e01b_1133_e01b = {0x1133, 0xe01b, pci_subsys_1133_e01b_1133_e01b, 0}; #undef pci_ss_info_1133_e01b #define pci_ss_info_1133_e01b pci_ss_info_1133_e01b_1133_e01b -static const pciSubsystemInfo pci_ss_info_1133_e01b_8001_0014 = - {0x8001, 0x0014, pci_subsys_1133_e01b_8001_0014, 0}; -#undef pci_ss_info_8001_0014 -#define pci_ss_info_8001_0014 pci_ss_info_1133_e01b_8001_0014 static const pciSubsystemInfo pci_ss_info_1133_e01c_1133_1c01 = {0x1133, 0x1c01, pci_subsys_1133_e01c_1133_1c01, 0}; #undef pci_ss_info_1133_1c01 @@ -26547,38 +32222,6 @@ {0x1133, 0x1c0c, pci_subsys_1133_e01c_1133_1c0c, 0}; #undef pci_ss_info_1133_1c0c #define pci_ss_info_1133_1c0c pci_ss_info_1133_e01c_1133_1c0c -static const pciSubsystemInfo pci_ss_info_1133_e01e_1133_1e00 = - {0x1133, 0x1e00, pci_subsys_1133_e01e_1133_1e00, 0}; -#undef pci_ss_info_1133_1e00 -#define pci_ss_info_1133_1e00 pci_ss_info_1133_e01e_1133_1e00 -static const pciSubsystemInfo pci_ss_info_1133_e01e_1133_1e01 = - {0x1133, 0x1e01, pci_subsys_1133_e01e_1133_1e01, 0}; -#undef pci_ss_info_1133_1e01 -#define pci_ss_info_1133_1e01 pci_ss_info_1133_e01e_1133_1e01 -static const pciSubsystemInfo pci_ss_info_1133_e01e_1133_1e02 = - {0x1133, 0x1e02, pci_subsys_1133_e01e_1133_1e02, 0}; -#undef pci_ss_info_1133_1e02 -#define pci_ss_info_1133_1e02 pci_ss_info_1133_e01e_1133_1e02 -static const pciSubsystemInfo pci_ss_info_1133_e01e_1133_1e03 = - {0x1133, 0x1e03, pci_subsys_1133_e01e_1133_1e03, 0}; -#undef pci_ss_info_1133_1e03 -#define pci_ss_info_1133_1e03 pci_ss_info_1133_e01e_1133_1e03 -static const pciSubsystemInfo pci_ss_info_1133_e020_1133_2000 = - {0x1133, 0x2000, pci_subsys_1133_e020_1133_2000, 0}; -#undef pci_ss_info_1133_2000 -#define pci_ss_info_1133_2000 pci_ss_info_1133_e020_1133_2000 -static const pciSubsystemInfo pci_ss_info_1133_e020_1133_2001 = - {0x1133, 0x2001, pci_subsys_1133_e020_1133_2001, 0}; -#undef pci_ss_info_1133_2001 -#define pci_ss_info_1133_2001 pci_ss_info_1133_e020_1133_2001 -static const pciSubsystemInfo pci_ss_info_1133_e020_1133_2002 = - {0x1133, 0x2002, pci_subsys_1133_e020_1133_2002, 0}; -#undef pci_ss_info_1133_2002 -#define pci_ss_info_1133_2002 pci_ss_info_1133_e020_1133_2002 -static const pciSubsystemInfo pci_ss_info_1133_e020_1133_2003 = - {0x1133, 0x2003, pci_subsys_1133_e020_1133_2003, 0}; -#undef pci_ss_info_1133_2003 -#define pci_ss_info_1133_2003 pci_ss_info_1133_e020_1133_2003 static const pciSubsystemInfo pci_ss_info_1133_e024_1133_2400 = {0x1133, 0x2400, pci_subsys_1133_e024_1133_2400, 0}; #undef pci_ss_info_1133_2400 @@ -26887,6 +32530,10 @@ {0x115d, 0x0181, pci_subsys_115d_0003_115d_0181, 0}; #undef pci_ss_info_115d_0181 #define pci_ss_info_115d_0181 pci_ss_info_115d_0003_115d_0181 +static const pciSubsystemInfo pci_ss_info_115d_0003_115d_0182 = + {0x115d, 0x0182, pci_subsys_115d_0003_115d_0182, 0}; +#undef pci_ss_info_115d_0182 +#define pci_ss_info_115d_0182 pci_ss_info_115d_0003_115d_0182 static const pciSubsystemInfo pci_ss_info_115d_0003_115d_1181 = {0x115d, 0x1181, pci_subsys_115d_0003_115d_1181, 0}; #undef pci_ss_info_115d_1181 @@ -26987,30 +32634,72 @@ {0x4c53, 0x1080, pci_subsys_1166_0201_4c53_1080, 0}; #undef pci_ss_info_4c53_1080 #define pci_ss_info_4c53_1080 pci_ss_info_1166_0201_4c53_1080 +static const pciSubsystemInfo pci_ss_info_1166_0203_1734_1012 = + {0x1734, 0x1012, pci_subsys_1166_0203_1734_1012, 0}; +#undef pci_ss_info_1734_1012 +#define pci_ss_info_1734_1012 pci_ss_info_1166_0203_1734_1012 static const pciSubsystemInfo pci_ss_info_1166_0212_4c53_1080 = {0x4c53, 0x1080, pci_subsys_1166_0212_4c53_1080, 0}; #undef pci_ss_info_4c53_1080 #define pci_ss_info_4c53_1080 pci_ss_info_1166_0212_4c53_1080 +#endif +static const pciSubsystemInfo pci_ss_info_1166_0213_1028_c134 = + {0x1028, 0xc134, pci_subsys_1166_0213_1028_c134, 0}; +#undef pci_ss_info_1028_c134 +#define pci_ss_info_1028_c134 pci_ss_info_1166_0213_1028_c134 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1166_0213_1734_1012 = + {0x1734, 0x1012, pci_subsys_1166_0213_1734_1012, 0}; +#undef pci_ss_info_1734_1012 +#define pci_ss_info_1734_1012 pci_ss_info_1166_0213_1734_1012 +#endif +static const pciSubsystemInfo pci_ss_info_1166_0217_1028_4134 = + {0x1028, 0x4134, pci_subsys_1166_0217_1028_4134, 0}; +#undef pci_ss_info_1028_4134 +#define pci_ss_info_1028_4134 pci_ss_info_1166_0217_1028_4134 +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1166_0220_4c53_1080 = {0x4c53, 0x1080, pci_subsys_1166_0220_4c53_1080, 0}; #undef pci_ss_info_4c53_1080 #define pci_ss_info_4c53_1080 pci_ss_info_1166_0220_4c53_1080 -static const pciSubsystemInfo pci_ss_info_1166_0225_4c53_1080 = - {0x4c53, 0x1080, pci_subsys_1166_0225_4c53_1080, 0}; -#undef pci_ss_info_4c53_1080 -#define pci_ss_info_4c53_1080 pci_ss_info_1166_0225_4c53_1080 +static const pciSubsystemInfo pci_ss_info_1166_0221_1734_1012 = + {0x1734, 0x1012, pci_subsys_1166_0221_1734_1012, 0}; +#undef pci_ss_info_1734_1012 +#define pci_ss_info_1734_1012 pci_ss_info_1166_0221_1734_1012 +static const pciSubsystemInfo pci_ss_info_1166_0227_1734_1012 = + {0x1734, 0x1012, pci_subsys_1166_0227_1734_1012, 0}; +#undef pci_ss_info_1734_1012 +#define pci_ss_info_1734_1012 pci_ss_info_1166_0227_1734_1012 static const pciSubsystemInfo pci_ss_info_1166_0230_4c53_1080 = {0x4c53, 0x1080, pci_subsys_1166_0230_4c53_1080, 0}; #undef pci_ss_info_4c53_1080 #define pci_ss_info_4c53_1080 pci_ss_info_1166_0230_4c53_1080 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1179_0601_1179_0001 = + {0x1179, 0x0001, pci_subsys_1179_0601_1179_0001, 0}; +#undef pci_ss_info_1179_0001 +#define pci_ss_info_1179_0001 pci_ss_info_1179_0601_1179_0001 +static const pciSubsystemInfo pci_ss_info_1179_060a_1179_0001 = + {0x1179, 0x0001, pci_subsys_1179_060a_1179_0001, 0}; +#undef pci_ss_info_1179_0001 +#define pci_ss_info_1179_0001 pci_ss_info_1179_060a_1179_0001 static const pciSubsystemInfo pci_ss_info_1179_0d01_1179_0001 = {0x1179, 0x0001, pci_subsys_1179_0d01_1179_0001, 0}; #undef pci_ss_info_1179_0001 #define pci_ss_info_1179_0001 pci_ss_info_1179_0d01_1179_0001 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_117c_0030_117c_8013 = + {0x117c, 0x8013, pci_subsys_117c_0030_117c_8013, 0}; +#undef pci_ss_info_117c_8013 +#define pci_ss_info_117c_8013 pci_ss_info_117c_0030_117c_8013 +static const pciSubsystemInfo pci_ss_info_117c_0030_117c_8014 = + {0x117c, 0x8014, pci_subsys_117c_0030_117c_8014, 0}; +#undef pci_ss_info_117c_8014 +#define pci_ss_info_117c_8014 pci_ss_info_117c_0030_117c_8014 +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1180_0475_144d_c006 = {0x144d, 0xc006, pci_subsys_1180_0475_144d_c006, 0}; #undef pci_ss_info_144d_c006 @@ -27020,6 +32709,20 @@ #undef pci_ss_info_1014_0185 #define pci_ss_info_1014_0185 pci_ss_info_1180_0476_1014_0185 #endif +static const pciSubsystemInfo pci_ss_info_1180_0476_1028_0188 = + {0x1028, 0x0188, pci_subsys_1180_0476_1028_0188, 0}; +#undef pci_ss_info_1028_0188 +#define pci_ss_info_1028_0188 pci_ss_info_1180_0476_1028_0188 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1180_0476_1043_1967 = + {0x1043, 0x1967, pci_subsys_1180_0476_1043_1967, 0}; +#undef pci_ss_info_1043_1967 +#define pci_ss_info_1043_1967 pci_ss_info_1180_0476_1043_1967 +static const pciSubsystemInfo pci_ss_info_1180_0476_1043_1987 = + {0x1043, 0x1987, pci_subsys_1180_0476_1043_1987, 0}; +#undef pci_ss_info_1043_1987 +#define pci_ss_info_1043_1987 pci_ss_info_1180_0476_1043_1987 +#endif static const pciSubsystemInfo pci_ss_info_1180_0476_104d_80df = {0x104d, 0x80df, pci_subsys_1180_0476_104d_80df, 0}; #undef pci_ss_info_104d_80df @@ -27043,6 +32746,10 @@ {0x1014, 0x01cf, pci_subsys_1180_0522_1014_01cf, 0}; #undef pci_ss_info_1014_01cf #define pci_ss_info_1014_01cf pci_ss_info_1180_0522_1014_01cf +static const pciSubsystemInfo pci_ss_info_1180_0522_1043_1967 = + {0x1043, 0x1967, pci_subsys_1180_0522_1043_1967, 0}; +#undef pci_ss_info_1043_1967 +#define pci_ss_info_1043_1967 pci_ss_info_1180_0522_1043_1967 static const pciSubsystemInfo pci_ss_info_1180_0551_144d_c006 = {0x144d, 0xc006, pci_subsys_1180_0551_144d_c006, 0}; #undef pci_ss_info_144d_c006 @@ -27052,6 +32759,40 @@ #undef pci_ss_info_1014_0511 #define pci_ss_info_1014_0511 pci_ss_info_1180_0552_1014_0511 #endif +static const pciSubsystemInfo pci_ss_info_1180_0552_1028_0188 = + {0x1028, 0x0188, pci_subsys_1180_0552_1028_0188, 0}; +#undef pci_ss_info_1028_0188 +#define pci_ss_info_1028_0188 pci_ss_info_1180_0552_1028_0188 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1180_0592_1043_1967 = + {0x1043, 0x1967, pci_subsys_1180_0592_1043_1967, 0}; +#undef pci_ss_info_1043_1967 +#define pci_ss_info_1043_1967 pci_ss_info_1180_0592_1043_1967 +static const pciSubsystemInfo pci_ss_info_1180_0822_1014_0556 = + {0x1014, 0x0556, pci_subsys_1180_0822_1014_0556, 0}; +#undef pci_ss_info_1014_0556 +#define pci_ss_info_1014_0556 pci_ss_info_1180_0822_1014_0556 +#endif +static const pciSubsystemInfo pci_ss_info_1180_0822_1028_0188 = + {0x1028, 0x0188, pci_subsys_1180_0822_1028_0188, 0}; +#undef pci_ss_info_1028_0188 +#define pci_ss_info_1028_0188 pci_ss_info_1180_0822_1028_0188 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_1180_0822_1028_01a2 = + {0x1028, 0x01a2, pci_subsys_1180_0822_1028_01a2, 0}; +#undef pci_ss_info_1028_01a2 +#define pci_ss_info_1028_01a2 pci_ss_info_1180_0822_1028_01a2 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1180_0822_1043_1967 = + {0x1043, 0x1967, pci_subsys_1180_0822_1043_1967, 0}; +#undef pci_ss_info_1043_1967 +#define pci_ss_info_1043_1967 pci_ss_info_1180_0822_1043_1967 +static const pciSubsystemInfo pci_ss_info_1180_0852_1043_1967 = + {0x1043, 0x1967, pci_subsys_1180_0852_1043_1967, 0}; +#undef pci_ss_info_1043_1967 +#define pci_ss_info_1043_1967 pci_ss_info_1180_0852_1043_1967 +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1186_1002_1186_1002 = {0x1186, 0x1002, pci_subsys_1186_1002_1186_1002, 0}; @@ -27069,12 +32810,20 @@ {0x1186, 0x1301, pci_subsys_1186_1300_1186_1301, 0}; #undef pci_ss_info_1186_1301 #define pci_ss_info_1186_1301 pci_ss_info_1186_1300_1186_1301 +static const pciSubsystemInfo pci_ss_info_1186_1300_1186_1303 = + {0x1186, 0x1303, pci_subsys_1186_1300_1186_1303, 0}; +#undef pci_ss_info_1186_1303 +#define pci_ss_info_1186_1303 pci_ss_info_1186_1300_1186_1303 static const pciSubsystemInfo pci_ss_info_1186_4c00_1186_4c00 = {0x1186, 0x4c00, pci_subsys_1186_4c00_1186_4c00, 0}; #undef pci_ss_info_1186_4c00 #define pci_ss_info_1186_4c00 pci_ss_info_1186_4c00_1186_4c00 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_11ab_1faa_1385_4e00 = + {0x1385, 0x4e00, pci_subsys_11ab_1faa_1385_4e00, 0}; +#undef pci_ss_info_1385_4e00 +#define pci_ss_info_1385_4e00 pci_ss_info_11ab_1faa_1385_4e00 static const pciSubsystemInfo pci_ss_info_11ab_4320_1019_0f38 = {0x1019, 0x0f38, pci_subsys_11ab_4320_1019_0f38, 0}; #undef pci_ss_info_1019_0f38 @@ -27303,10 +33052,6 @@ {0x1849, 0x8052, pci_subsys_11ab_4360_1849_8052, 0}; #undef pci_ss_info_1849_8052 #define pci_ss_info_1849_8052 pci_ss_info_11ab_4360_1849_8052 -static const pciSubsystemInfo pci_ss_info_11ab_4360_1940_e000 = - {0x1940, 0xe000, pci_subsys_11ab_4360_1940_e000, 0}; -#undef pci_ss_info_1940_e000 -#define pci_ss_info_1940_e000 pci_ss_info_11ab_4360_1940_e000 static const pciSubsystemInfo pci_ss_info_11ab_4360_a0a0_0509 = {0xa0a0, 0x0509, pci_subsys_11ab_4360_a0a0_0509, 0}; #undef pci_ss_info_a0a0_0509 @@ -27326,6 +33071,12 @@ #define pci_ss_info_8086_3063 pci_ss_info_11ab_4361_8086_3063 #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_11ab_4361_8086_3439 = + {0x8086, 0x3439, pci_subsys_11ab_4361_8086_3439, 0}; +#undef pci_ss_info_8086_3439 +#define pci_ss_info_8086_3439 pci_ss_info_11ab_4361_8086_3439 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_11ab_4362_103c_2a0d = {0x103c, 0x2a0d, pci_subsys_11ab_4362_103c_2a0d, 0}; #undef pci_ss_info_103c_2a0d @@ -27479,10 +33230,6 @@ {0x1854, 0x0022, pci_subsys_11ab_4362_1854_0022, 0}; #undef pci_ss_info_1854_0022 #define pci_ss_info_1854_0022 pci_ss_info_11ab_4362_1854_0022 -static const pciSubsystemInfo pci_ss_info_11ab_4362_1940_e000 = - {0x1940, 0xe000, pci_subsys_11ab_4362_1940_e000, 0}; -#undef pci_ss_info_1940_e000 -#define pci_ss_info_1940_e000 pci_ss_info_11ab_4362_1940_e000 static const pciSubsystemInfo pci_ss_info_11ab_4362_270f_2801 = {0x270f, 0x2801, pci_subsys_11ab_4362_270f_2801, 0}; #undef pci_ss_info_270f_2801 @@ -27817,6 +33564,16 @@ {0x144f, 0x4005, pci_subsys_11c1_0450_144f_4005, 0}; #undef pci_ss_info_144f_4005 #define pci_ss_info_144f_4005 pci_ss_info_11c1_0450_144f_4005 +static const pciSubsystemInfo pci_ss_info_11c1_0450_1468_0450 = + {0x1468, 0x0450, pci_subsys_11c1_0450_1468_0450, 0}; +#undef pci_ss_info_1468_0450 +#define pci_ss_info_1468_0450 pci_ss_info_11c1_0450_1468_0450 +#endif +static const pciSubsystemInfo pci_ss_info_11c1_0450_4005_144f = + {0x4005, 0x144f, pci_subsys_11c1_0450_4005_144f, 0}; +#undef pci_ss_info_4005_144f +#define pci_ss_info_4005_144f pci_ss_info_11c1_0450_4005_144f +#ifdef VENDOR_INCLUDE_NONVIDEO #endif static const pciSubsystemInfo pci_ss_info_11c1_5811_8086_524c = {0x8086, 0x524c, pci_subsys_11c1_5811_8086_524c, 0}; @@ -27827,6 +33584,10 @@ {0xdead, 0x0800, pci_subsys_11c1_5811_dead_0800, 0}; #undef pci_ss_info_dead_0800 #define pci_ss_info_dead_0800 pci_ss_info_11c1_5811_dead_0800 +static const pciSubsystemInfo pci_ss_info_11c1_8110_12d9_000c = + {0x12d9, 0x000c, pci_subsys_11c1_8110_12d9_000c, 0}; +#undef pci_ss_info_12d9_000c +#define pci_ss_info_12d9_000c pci_ss_info_11c1_8110_12d9_000c static const pciSubsystemInfo pci_ss_info_11c1_ab11_11c1_ab12 = {0x11c1, 0xab12, pci_subsys_11c1_ab11_11c1_ab12, 0}; #undef pci_ss_info_11c1_ab12 @@ -27871,6 +33632,10 @@ #undef pci_ss_info_1031_fc00 #define pci_ss_info_1031_fc00 pci_ss_info_11de_6057_1031_fc00 #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_11de_6057_12f8_8a02 = + {0x12f8, 0x8a02, pci_subsys_11de_6057_12f8_8a02, 0}; +#undef pci_ss_info_12f8_8a02 +#define pci_ss_info_12f8_8a02 pci_ss_info_11de_6057_12f8_8a02 static const pciSubsystemInfo pci_ss_info_11de_6057_13ca_4231 = {0x13ca, 0x4231, pci_subsys_11de_6057_13ca_4231, 0}; #undef pci_ss_info_13ca_4231 @@ -27879,6 +33644,14 @@ {0x1328, 0xf001, pci_subsys_11de_6120_1328_f001, 0}; #undef pci_ss_info_1328_f001 #define pci_ss_info_1328_f001 pci_ss_info_11de_6120_1328_f001 +static const pciSubsystemInfo pci_ss_info_11de_6120_13c2_0000 = + {0x13c2, 0x0000, pci_subsys_11de_6120_13c2_0000, 0}; +#undef pci_ss_info_13c2_0000 +#define pci_ss_info_13c2_0000 pci_ss_info_11de_6120_13c2_0000 +static const pciSubsystemInfo pci_ss_info_11de_6120_1de1_9fff = + {0x1de1, 0x9fff, pci_subsys_11de_6120_1de1_9fff, 0}; +#undef pci_ss_info_1de1_9fff +#define pci_ss_info_1de1_9fff pci_ss_info_11de_6120_1de1_9fff #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_11f6_2011_11f6_2011 = @@ -27924,12 +33697,24 @@ #undef pci_ss_info_1179_0001 #define pci_ss_info_1179_0001 pci_ss_info_1217_6972_1179_0001 #endif +static const pciSubsystemInfo pci_ss_info_1217_7110_103c_088c = + {0x103c, 0x088c, pci_subsys_1217_7110_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_1217_7110_103c_088c +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_1217_7110_103c_0890 = {0x103c, 0x0890, pci_subsys_1217_7110_103c_0890, 0}; #undef pci_ss_info_103c_0890 #define pci_ss_info_103c_0890 pci_ss_info_1217_7110_103c_0890 #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_1217_7223_103c_088c = + {0x103c, 0x088c, pci_subsys_1217_7223_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_1217_7223_103c_088c +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_1217_7223_103c_0890 = {0x103c, 0x0890, pci_subsys_1217_7223_103c_0890, 0}; #undef pci_ss_info_103c_0890 @@ -28056,6 +33841,10 @@ {0x121a, 0x0052, pci_subsys_121a_0005_121a_0052, 0}; #undef pci_ss_info_121a_0052 #define pci_ss_info_121a_0052 pci_ss_info_121a_0005_121a_0052 +static const pciSubsystemInfo pci_ss_info_121a_0005_121a_0057 = + {0x121a, 0x0057, pci_subsys_121a_0005_121a_0057, 0}; +#undef pci_ss_info_121a_0057 +#define pci_ss_info_121a_0057 pci_ss_info_121a_0005_121a_0057 static const pciSubsystemInfo pci_ss_info_121a_0005_121a_0060 = {0x121a, 0x0060, pci_subsys_121a_0005_121a_0060, 0}; #undef pci_ss_info_121a_0060 @@ -28095,6 +33884,14 @@ {0x11bd, 0x000a, pci_subsys_123f_8120_11bd_000a, 0}; #undef pci_ss_info_11bd_000a #define pci_ss_info_11bd_000a pci_ss_info_123f_8120_11bd_000a +static const pciSubsystemInfo pci_ss_info_123f_8120_11bd_000f = + {0x11bd, 0x000f, pci_subsys_123f_8120_11bd_000f, 0}; +#undef pci_ss_info_11bd_000f +#define pci_ss_info_11bd_000f pci_ss_info_123f_8120_11bd_000f +static const pciSubsystemInfo pci_ss_info_123f_8120_1809_0016 = + {0x1809, 0x0016, pci_subsys_123f_8120_1809_0016, 0}; +#undef pci_ss_info_1809_0016 +#define pci_ss_info_1809_0016 pci_ss_info_123f_8120_1809_0016 #endif static const pciSubsystemInfo pci_ss_info_123f_8888_1002_0001 = {0x1002, 0x0001, pci_subsys_123f_8888_1002_0001, 0}; @@ -28135,6 +33932,12 @@ #define pci_ss_info_124b_9080 pci_ss_info_124b_0040_124b_9080 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_125b_1400_1186_1100 = + {0x1186, 0x1100, pci_subsys_125b_1400_1186_1100, 0}; +#undef pci_ss_info_1186_1100 +#define pci_ss_info_1186_1100 pci_ss_info_125b_1400_1186_1100 +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #endif static const pciSubsystemInfo pci_ss_info_125d_1968_1028_0085 = {0x1028, 0x0085, pci_subsys_125d_1968_1028_0085, 0}; @@ -28155,6 +33958,10 @@ {0x125d, 0x8888, pci_subsys_125d_1969_125d_8888, 0}; #undef pci_ss_info_125d_8888 #define pci_ss_info_125d_8888 pci_ss_info_125d_1969_125d_8888 +static const pciSubsystemInfo pci_ss_info_125d_1969_153b_111b = + {0x153b, 0x111b, pci_subsys_125d_1969_153b_111b, 0}; +#undef pci_ss_info_153b_111b +#define pci_ss_info_153b_111b pci_ss_info_125d_1969_153b_111b #endif static const pciSubsystemInfo pci_ss_info_125d_1978_0e11_b112 = {0x0e11, 0xb112, pci_subsys_125d_1978_0e11_b112, 0}; @@ -28184,6 +33991,12 @@ #undef pci_ss_info_1179_0001 #define pci_ss_info_1179_0001 pci_ss_info_125d_1978_1179_0001 #endif +static const pciSubsystemInfo pci_ss_info_125d_1988_0e11_0098 = + {0x0e11, 0x0098, pci_subsys_125d_1988_0e11_0098, 0}; +#undef pci_ss_info_0e11_0098 +#define pci_ss_info_0e11_0098 pci_ss_info_125d_1988_0e11_0098 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_125d_1988_1092_4100 = {0x1092, 0x4100, pci_subsys_125d_1988_1092_4100, 0}; #undef pci_ss_info_1092_4100 @@ -28297,10 +34110,18 @@ {0x10b8, 0xa835, pci_subsys_1260_3890_10b8_a835, 0}; #undef pci_ss_info_10b8_a835 #define pci_ss_info_10b8_a835 pci_ss_info_1260_3890_10b8_a835 +static const pciSubsystemInfo pci_ss_info_1260_3890_1113_4203 = + {0x1113, 0x4203, pci_subsys_1260_3890_1113_4203, 0}; +#undef pci_ss_info_1113_4203 +#define pci_ss_info_1113_4203 pci_ss_info_1260_3890_1113_4203 static const pciSubsystemInfo pci_ss_info_1260_3890_1113_ee03 = {0x1113, 0xee03, pci_subsys_1260_3890_1113_ee03, 0}; #undef pci_ss_info_1113_ee03 #define pci_ss_info_1113_ee03 pci_ss_info_1260_3890_1113_ee03 +static const pciSubsystemInfo pci_ss_info_1260_3890_1113_ee08 = + {0x1113, 0xee08, pci_subsys_1260_3890_1113_ee08, 0}; +#undef pci_ss_info_1113_ee08 +#define pci_ss_info_1113_ee08 pci_ss_info_1260_3890_1113_ee08 static const pciSubsystemInfo pci_ss_info_1260_3890_1186_3202 = {0x1186, 0x3202, pci_subsys_1260_3890_1186_3202, 0}; #undef pci_ss_info_1186_3202 @@ -28325,6 +34146,10 @@ {0x17cf, 0x0020, pci_subsys_1260_3890_17cf_0020, 0}; #undef pci_ss_info_17cf_0020 #define pci_ss_info_17cf_0020 pci_ss_info_1260_3890_17cf_0020 +static const pciSubsystemInfo pci_ss_info_1260_ffff_1260_0000 = + {0x1260, 0x0000, pci_subsys_1260_ffff_1260_0000, 0}; +#undef pci_ss_info_1260_0000 +#define pci_ss_info_1260_0000 pci_ss_info_1260_ffff_1260_0000 #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1266_1910_1266_1910 = @@ -28356,6 +34181,10 @@ {0x1274, 0x1371, pci_subsys_1274_1371_1274_1371, 0}; #undef pci_ss_info_1274_1371 #define pci_ss_info_1274_1371 pci_ss_info_1274_1371_1274_1371 +static const pciSubsystemInfo pci_ss_info_1274_1371_1274_8001 = + {0x1274, 0x8001, pci_subsys_1274_1371_1274_8001, 0}; +#undef pci_ss_info_1274_8001 +#define pci_ss_info_1274_8001 pci_ss_info_1274_1371_1274_8001 static const pciSubsystemInfo pci_ss_info_1274_1371_1462_6470 = {0x1462, 0x6470, pci_subsys_1274_1371_1462_6470, 0}; #undef pci_ss_info_1462_6470 @@ -28512,6 +34341,10 @@ {0x8086, 0x4343, pci_subsys_1274_1371_8086_4343, 0}; #undef pci_ss_info_8086_4343 #define pci_ss_info_8086_4343 pci_ss_info_1274_1371_8086_4343 +static const pciSubsystemInfo pci_ss_info_1274_1371_8086_4541 = + {0x8086, 0x4541, pci_subsys_1274_1371_8086_4541, 0}; +#undef pci_ss_info_8086_4541 +#define pci_ss_info_8086_4541 pci_ss_info_1274_1371_8086_4541 static const pciSubsystemInfo pci_ss_info_1274_1371_8086_4649 = {0x8086, 0x4649, pci_subsys_1274_1371_8086_4649, 0}; #undef pci_ss_info_8086_4649 @@ -28678,6 +34511,12 @@ #undef pci_ss_info_10cf_1059 #define pci_ss_info_10cf_1059 pci_ss_info_127a_1004_10cf_1059 #endif +static const pciSubsystemInfo pci_ss_info_127a_1005_1005_127a = + {0x1005, 0x127a, pci_subsys_127a_1005_1005_127a, 0}; +#undef pci_ss_info_1005_127a +#define pci_ss_info_1005_127a pci_ss_info_127a_1005_1005_127a +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_127a_1005_1033_8029 = {0x1033, 0x8029, pci_subsys_127a_1005_1033_8029, 0}; #undef pci_ss_info_1033_8029 @@ -28961,6 +34800,10 @@ #define pci_ss_info_108d_0027 pci_ss_info_127a_8234_108d_0027 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1283_8211_1043_8138 = + {0x1043, 0x8138, pci_subsys_1283_8211_1043_8138, 0}; +#undef pci_ss_info_1043_8138 +#define pci_ss_info_1043_8138 pci_ss_info_1283_8211_1043_8138 static const pciSubsystemInfo pci_ss_info_1283_8212_1283_0001 = {0x1283, 0x0001, pci_subsys_1283_8212_1283_0001, 0}; #undef pci_ss_info_1283_0001 @@ -29213,10 +35056,6 @@ #undef pci_ss_info_1092_3004 #define pci_ss_info_1092_3004 pci_ss_info_12eb_0002_1092_3004 #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciSubsystemInfo pci_ss_info_12eb_0002_12eb_0001 = - {0x12eb, 0x0001, pci_subsys_12eb_0002_12eb_0001, 0}; -#undef pci_ss_info_12eb_0001 -#define pci_ss_info_12eb_0001 pci_ss_info_12eb_0002_12eb_0001 static const pciSubsystemInfo pci_ss_info_12eb_0002_12eb_0002 = {0x12eb, 0x0002, pci_subsys_12eb_0002_12eb_0002, 0}; #undef pci_ss_info_12eb_0002 @@ -29295,6 +35134,16 @@ #define pci_ss_info_1317_8201 pci_ss_info_1317_8201_1317_8201 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1319_0801_1319_1319 = + {0x1319, 0x1319, pci_subsys_1319_0801_1319_1319, 0}; +#undef pci_ss_info_1319_1319 +#define pci_ss_info_1319_1319 pci_ss_info_1319_0801_1319_1319 +static const pciSubsystemInfo pci_ss_info_1319_0802_1319_1319 = + {0x1319, 0x1319, pci_subsys_1319_0802_1319_1319, 0}; +#undef pci_ss_info_1319_1319 +#define pci_ss_info_1319_1319 pci_ss_info_1319_0802_1319_1319 +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_131f_2030_131f_2030 = {0x131f, 0x2030, pci_subsys_131f_2030_131f_2030, 0}; #undef pci_ss_info_131f_2030 @@ -29323,6 +35172,14 @@ #define pci_ss_info_1394_0001 pci_ss_info_1394_0001_1394_0001 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1397_2bd0_0675_1704 = + {0x0675, 0x1704, pci_subsys_1397_2bd0_0675_1704, 0}; +#undef pci_ss_info_0675_1704 +#define pci_ss_info_0675_1704 pci_ss_info_1397_2bd0_0675_1704 +static const pciSubsystemInfo pci_ss_info_1397_2bd0_0675_1708 = + {0x0675, 0x1708, pci_subsys_1397_2bd0_0675_1708, 0}; +#undef pci_ss_info_0675_1708 +#define pci_ss_info_0675_1708 pci_ss_info_1397_2bd0_0675_1708 static const pciSubsystemInfo pci_ss_info_1397_2bd0_1397_2bd0 = {0x1397, 0x2bd0, pci_subsys_1397_2bd0_1397_2bd0, 0}; #undef pci_ss_info_1397_2bd0 @@ -29379,16 +35236,128 @@ #define pci_ss_info_1681_a000 pci_ss_info_13f6_0111_1681_a000 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1412_1712_1412_1712 = + {0x1412, 0x1712, pci_subsys_1412_1712_1412_1712, 0}; +#undef pci_ss_info_1412_1712 +#define pci_ss_info_1412_1712 pci_ss_info_1412_1712_1412_1712 +static const pciSubsystemInfo pci_ss_info_1412_1712_1412_d630 = + {0x1412, 0xd630, pci_subsys_1412_1712_1412_d630, 0}; +#undef pci_ss_info_1412_d630 +#define pci_ss_info_1412_d630 pci_ss_info_1412_1712_1412_d630 +static const pciSubsystemInfo pci_ss_info_1412_1712_1412_d631 = + {0x1412, 0xd631, pci_subsys_1412_1712_1412_d631, 0}; +#undef pci_ss_info_1412_d631 +#define pci_ss_info_1412_d631 pci_ss_info_1412_1712_1412_d631 +static const pciSubsystemInfo pci_ss_info_1412_1712_1412_d632 = + {0x1412, 0xd632, pci_subsys_1412_1712_1412_d632, 0}; +#undef pci_ss_info_1412_d632 +#define pci_ss_info_1412_d632 pci_ss_info_1412_1712_1412_d632 +static const pciSubsystemInfo pci_ss_info_1412_1712_1412_d633 = + {0x1412, 0xd633, pci_subsys_1412_1712_1412_d633, 0}; +#undef pci_ss_info_1412_d633 +#define pci_ss_info_1412_d633 pci_ss_info_1412_1712_1412_d633 +static const pciSubsystemInfo pci_ss_info_1412_1712_1412_d634 = + {0x1412, 0xd634, pci_subsys_1412_1712_1412_d634, 0}; +#undef pci_ss_info_1412_d634 +#define pci_ss_info_1412_d634 pci_ss_info_1412_1712_1412_d634 +static const pciSubsystemInfo pci_ss_info_1412_1712_1412_d635 = + {0x1412, 0xd635, pci_subsys_1412_1712_1412_d635, 0}; +#undef pci_ss_info_1412_d635 +#define pci_ss_info_1412_d635 pci_ss_info_1412_1712_1412_d635 +static const pciSubsystemInfo pci_ss_info_1412_1712_1412_d637 = + {0x1412, 0xd637, pci_subsys_1412_1712_1412_d637, 0}; +#undef pci_ss_info_1412_d637 +#define pci_ss_info_1412_d637 pci_ss_info_1412_1712_1412_d637 static const pciSubsystemInfo pci_ss_info_1412_1712_1412_d638 = {0x1412, 0xd638, pci_subsys_1412_1712_1412_d638, 0}; #undef pci_ss_info_1412_d638 #define pci_ss_info_1412_d638 pci_ss_info_1412_1712_1412_d638 +static const pciSubsystemInfo pci_ss_info_1412_1712_1412_d63b = + {0x1412, 0xd63b, pci_subsys_1412_1712_1412_d63b, 0}; +#undef pci_ss_info_1412_d63b +#define pci_ss_info_1412_d63b pci_ss_info_1412_1712_1412_d63b +static const pciSubsystemInfo pci_ss_info_1412_1712_1412_d63c = + {0x1412, 0xd63c, pci_subsys_1412_1712_1412_d63c, 0}; +#undef pci_ss_info_1412_d63c +#define pci_ss_info_1412_d63c pci_ss_info_1412_1712_1412_d63c +static const pciSubsystemInfo pci_ss_info_1412_1712_1416_1712 = + {0x1416, 0x1712, pci_subsys_1412_1712_1416_1712, 0}; +#undef pci_ss_info_1416_1712 +#define pci_ss_info_1416_1712 pci_ss_info_1412_1712_1416_1712 +static const pciSubsystemInfo pci_ss_info_1412_1712_153b_1115 = + {0x153b, 0x1115, pci_subsys_1412_1712_153b_1115, 0}; +#undef pci_ss_info_153b_1115 +#define pci_ss_info_153b_1115 pci_ss_info_1412_1712_153b_1115 +static const pciSubsystemInfo pci_ss_info_1412_1712_153b_1125 = + {0x153b, 0x1125, pci_subsys_1412_1712_153b_1125, 0}; +#undef pci_ss_info_153b_1125 +#define pci_ss_info_153b_1125 pci_ss_info_1412_1712_153b_1125 +static const pciSubsystemInfo pci_ss_info_1412_1712_153b_112b = + {0x153b, 0x112b, pci_subsys_1412_1712_153b_112b, 0}; +#undef pci_ss_info_153b_112b +#define pci_ss_info_153b_112b pci_ss_info_1412_1712_153b_112b +static const pciSubsystemInfo pci_ss_info_1412_1712_153b_112c = + {0x153b, 0x112c, pci_subsys_1412_1712_153b_112c, 0}; +#undef pci_ss_info_153b_112c +#define pci_ss_info_153b_112c pci_ss_info_1412_1712_153b_112c +static const pciSubsystemInfo pci_ss_info_1412_1712_153b_1130 = + {0x153b, 0x1130, pci_subsys_1412_1712_153b_1130, 0}; +#undef pci_ss_info_153b_1130 +#define pci_ss_info_153b_1130 pci_ss_info_1412_1712_153b_1130 +static const pciSubsystemInfo pci_ss_info_1412_1712_153b_1138 = + {0x153b, 0x1138, pci_subsys_1412_1712_153b_1138, 0}; +#undef pci_ss_info_153b_1138 +#define pci_ss_info_153b_1138 pci_ss_info_1412_1712_153b_1138 +static const pciSubsystemInfo pci_ss_info_1412_1712_153b_1151 = + {0x153b, 0x1151, pci_subsys_1412_1712_153b_1151, 0}; +#undef pci_ss_info_153b_1151 +#define pci_ss_info_153b_1151 pci_ss_info_1412_1712_153b_1151 +static const pciSubsystemInfo pci_ss_info_1412_1712_16ce_1040 = + {0x16ce, 0x1040, pci_subsys_1412_1712_16ce_1040, 0}; +#undef pci_ss_info_16ce_1040 +#define pci_ss_info_16ce_1040 pci_ss_info_1412_1712_16ce_1040 +static const pciSubsystemInfo pci_ss_info_1412_1724_1412_1724 = + {0x1412, 0x1724, pci_subsys_1412_1724_1412_1724, 0}; +#undef pci_ss_info_1412_1724 +#define pci_ss_info_1412_1724 pci_ss_info_1412_1724_1412_1724 +static const pciSubsystemInfo pci_ss_info_1412_1724_1412_3630 = + {0x1412, 0x3630, pci_subsys_1412_1724_1412_3630, 0}; +#undef pci_ss_info_1412_3630 +#define pci_ss_info_1412_3630 pci_ss_info_1412_1724_1412_3630 +static const pciSubsystemInfo pci_ss_info_1412_1724_1412_3631 = + {0x1412, 0x3631, pci_subsys_1412_1724_1412_3631, 0}; +#undef pci_ss_info_1412_3631 +#define pci_ss_info_1412_3631 pci_ss_info_1412_1724_1412_3631 +static const pciSubsystemInfo pci_ss_info_1412_1724_153b_1145 = + {0x153b, 0x1145, pci_subsys_1412_1724_153b_1145, 0}; +#undef pci_ss_info_153b_1145 +#define pci_ss_info_153b_1145 pci_ss_info_1412_1724_153b_1145 +static const pciSubsystemInfo pci_ss_info_1412_1724_153b_1147 = + {0x153b, 0x1147, pci_subsys_1412_1724_153b_1147, 0}; +#undef pci_ss_info_153b_1147 +#define pci_ss_info_153b_1147 pci_ss_info_1412_1724_153b_1147 +static const pciSubsystemInfo pci_ss_info_1412_1724_153b_1153 = + {0x153b, 0x1153, pci_subsys_1412_1724_153b_1153, 0}; +#undef pci_ss_info_153b_1153 +#define pci_ss_info_153b_1153 pci_ss_info_1412_1724_153b_1153 +static const pciSubsystemInfo pci_ss_info_1412_1724_270f_f641 = + {0x270f, 0xf641, pci_subsys_1412_1724_270f_f641, 0}; +#undef pci_ss_info_270f_f641 +#define pci_ss_info_270f_f641 pci_ss_info_1412_1724_270f_f641 +static const pciSubsystemInfo pci_ss_info_1412_1724_270f_f645 = + {0x270f, 0xf645, pci_subsys_1412_1724_270f_f645, 0}; +#undef pci_ss_info_270f_f645 +#define pci_ss_info_270f_f645 pci_ss_info_1412_1724_270f_f645 #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1415_9501_131f_2050 = {0x131f, 0x2050, pci_subsys_1415_9501_131f_2050, 0}; #undef pci_ss_info_131f_2050 #define pci_ss_info_131f_2050 pci_ss_info_1415_9501_131f_2050 +static const pciSubsystemInfo pci_ss_info_1415_9501_131f_2051 = + {0x131f, 0x2051, pci_subsys_1415_9501_131f_2051, 0}; +#undef pci_ss_info_131f_2051 +#define pci_ss_info_131f_2051 pci_ss_info_1415_9501_131f_2051 static const pciSubsystemInfo pci_ss_info_1415_9501_15ed_2000 = {0x15ed, 0x2000, pci_subsys_1415_9501_15ed_2000, 0}; #undef pci_ss_info_15ed_2000 @@ -29549,6 +35518,12 @@ #undef pci_ss_info_103c_12c1 #define pci_ss_info_103c_12c1 pci_ss_info_14e4_1645_103c_12c1 #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_14e4_1645_103c_1300 = + {0x103c, 0x1300, pci_subsys_14e4_1645_103c_1300, 0}; +#undef pci_ss_info_103c_1300 +#define pci_ss_info_103c_1300 pci_ss_info_14e4_1645_103c_1300 +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_14e4_1645_10a9_8010 = {0x10a9, 0x8010, pci_subsys_14e4_1645_10a9_8010, 0}; #undef pci_ss_info_10a9_8010 @@ -29683,6 +35658,16 @@ {0x1166, 0x1648, pci_subsys_14e4_1648_1166_1648, 0}; #undef pci_ss_info_1166_1648 #define pci_ss_info_1166_1648 pci_ss_info_14e4_1648_1166_1648 +static const pciSubsystemInfo pci_ss_info_14e4_1648_1734_100b = + {0x1734, 0x100b, pci_subsys_14e4_1648_1734_100b, 0}; +#undef pci_ss_info_1734_100b +#define pci_ss_info_1734_100b pci_ss_info_14e4_1648_1734_100b +#endif +static const pciSubsystemInfo pci_ss_info_14e4_164a_103c_3101 = + {0x103c, 0x3101, pci_subsys_14e4_164a_103c_3101, 0}; +#undef pci_ss_info_103c_3101 +#define pci_ss_info_103c_3101 pci_ss_info_14e4_164a_103c_3101 +#ifdef VENDOR_INCLUDE_NONVIDEO #endif static const pciSubsystemInfo pci_ss_info_14e4_1653_0e11_00e3 = {0x0e11, 0x00e3, pci_subsys_14e4_1653_0e11_00e3, 0}; @@ -29702,18 +35687,84 @@ #define pci_ss_info_103c_3100 pci_ss_info_14e4_1654_103c_3100 #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_14e4_1654_103c_3226 = + {0x103c, 0x3226, pci_subsys_14e4_1654_103c_3226, 0}; +#undef pci_ss_info_103c_3226 +#define pci_ss_info_103c_3226 pci_ss_info_14e4_1654_103c_3226 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_14e4_1659_1014_02c6 = + {0x1014, 0x02c6, pci_subsys_14e4_1659_1014_02c6, 0}; +#undef pci_ss_info_1014_02c6 +#define pci_ss_info_1014_02c6 pci_ss_info_14e4_1659_1014_02c6 +#endif +static const pciSubsystemInfo pci_ss_info_14e4_1659_103c_7031 = + {0x103c, 0x7031, pci_subsys_14e4_1659_103c_7031, 0}; +#undef pci_ss_info_103c_7031 +#define pci_ss_info_103c_7031 pci_ss_info_14e4_1659_103c_7031 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_14e4_1659_103c_7032 = + {0x103c, 0x7032, pci_subsys_14e4_1659_103c_7032, 0}; +#undef pci_ss_info_103c_7032 +#define pci_ss_info_103c_7032 pci_ss_info_14e4_1659_103c_7032 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_14e4_1659_1734_1061 = + {0x1734, 0x1061, pci_subsys_14e4_1659_1734_1061, 0}; +#undef pci_ss_info_1734_1061 +#define pci_ss_info_1734_1061 pci_ss_info_14e4_1659_1734_1061 +#endif +static const pciSubsystemInfo pci_ss_info_14e4_165d_1028_865d = + {0x1028, 0x865d, pci_subsys_14e4_165d_1028_865d, 0}; +#undef pci_ss_info_1028_865d +#define pci_ss_info_1028_865d pci_ss_info_14e4_165d_1028_865d +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_14e4_165e_103c_088c = + {0x103c, 0x088c, pci_subsys_14e4_165e_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_14e4_165e_103c_088c +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_14e4_165e_103c_0890 = {0x103c, 0x0890, pci_subsys_14e4_165e_103c_0890, 0}; #undef pci_ss_info_103c_0890 #define pci_ss_info_103c_0890 pci_ss_info_14e4_165e_103c_0890 #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_14e4_165e_103c_099c = + {0x103c, 0x099c, pci_subsys_14e4_165e_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_14e4_165e_103c_099c +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_14e4_1668_103c_7039 = + {0x103c, 0x7039, pci_subsys_14e4_1668_103c_7039, 0}; +#undef pci_ss_info_103c_7039 +#define pci_ss_info_103c_7039 pci_ss_info_14e4_1668_103c_7039 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_14e4_1677_1028_0179 = {0x1028, 0x0179, pci_subsys_14e4_1677_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_14e4_1677_1028_0179 #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_14e4_1677_1028_0182 = + {0x1028, 0x0182, pci_subsys_14e4_1677_1028_0182, 0}; +#undef pci_ss_info_1028_0182 +#define pci_ss_info_1028_0182 pci_ss_info_14e4_1677_1028_0182 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_14e4_1677_1028_01ad = + {0x1028, 0x01ad, pci_subsys_14e4_1677_1028_01ad, 0}; +#undef pci_ss_info_1028_01ad +#define pci_ss_info_1028_01ad pci_ss_info_14e4_1677_1028_01ad +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_14e4_1677_1734_105d = + {0x1734, 0x105d, pci_subsys_14e4_1677_1734_105d, 0}; +#undef pci_ss_info_1734_105d +#define pci_ss_info_1734_105d pci_ss_info_14e4_1677_1734_105d +#endif static const pciSubsystemInfo pci_ss_info_14e4_1696_103c_12bc = {0x103c, 0x12bc, pci_subsys_14e4_1696_103c_12bc, 0}; #undef pci_ss_info_103c_12bc @@ -29724,6 +35775,12 @@ #undef pci_ss_info_14e4_000d #define pci_ss_info_14e4_000d pci_ss_info_14e4_1696_14e4_000d #endif +static const pciSubsystemInfo pci_ss_info_14e4_169c_103c_308b = + {0x103c, 0x308b, pci_subsys_14e4_169c_103c_308b, 0}; +#undef pci_ss_info_103c_308b +#define pci_ss_info_103c_308b pci_ss_info_14e4_169c_103c_308b +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif static const pciSubsystemInfo pci_ss_info_14e4_16a6_0e11_00bb = {0x0e11, 0x00bb, pci_subsys_14e4_16a6_0e11_00bb, 0}; #undef pci_ss_info_0e11_00bb @@ -29775,6 +35832,12 @@ {0x10b7, 0x2001, pci_subsys_14e4_16a8_10b7_2001, 0}; #undef pci_ss_info_10b7_2001 #define pci_ss_info_10b7_2001 pci_ss_info_14e4_16a8_10b7_2001 +#endif +static const pciSubsystemInfo pci_ss_info_14e4_16aa_103c_3102 = + {0x103c, 0x3102, pci_subsys_14e4_16aa_103c_3102, 0}; +#undef pci_ss_info_103c_3102 +#define pci_ss_info_103c_3102 pci_ss_info_14e4_16aa_103c_3102 +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_14e4_16c6_10b7_1100 = {0x10b7, 0x1100, pci_subsys_14e4_16c6_10b7_1100, 0}; #undef pci_ss_info_10b7_1100 @@ -29819,6 +35882,24 @@ {0x14e4, 0x000a, pci_subsys_14e4_16c7_14e4_000a, 0}; #undef pci_ss_info_14e4_000a #define pci_ss_info_14e4_000a pci_ss_info_14e4_16c7_14e4_000a +#endif +static const pciSubsystemInfo pci_ss_info_14e4_170c_1028_0188 = + {0x1028, 0x0188, pci_subsys_14e4_170c_1028_0188, 0}; +#undef pci_ss_info_1028_0188 +#define pci_ss_info_1028_0188 pci_ss_info_14e4_170c_1028_0188 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_14e4_170c_1028_0196 = + {0x1028, 0x0196, pci_subsys_14e4_170c_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_14e4_170c_1028_0196 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_14e4_170c_103c_099c = + {0x103c, 0x099c, pci_subsys_14e4_170c_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_14e4_170c_103c_099c +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_14e4_170d_1014_0545 = {0x1014, 0x0545, pci_subsys_14e4_170d_1014_0545, 0}; #undef pci_ss_info_1014_0545 @@ -29834,6 +35915,32 @@ #undef pci_ss_info_1043_0120 #define pci_ss_info_1043_0120 pci_ss_info_14e4_4301_1043_0120 #endif +static const pciSubsystemInfo pci_ss_info_14e4_4318_103c_1356 = + {0x103c, 0x1356, pci_subsys_14e4_4318_103c_1356, 0}; +#undef pci_ss_info_103c_1356 +#define pci_ss_info_103c_1356 pci_ss_info_14e4_4318_103c_1356 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_14e4_4318_1468_0311 = + {0x1468, 0x0311, pci_subsys_14e4_4318_1468_0311, 0}; +#undef pci_ss_info_1468_0311 +#define pci_ss_info_1468_0311 pci_ss_info_14e4_4318_1468_0311 +static const pciSubsystemInfo pci_ss_info_14e4_4318_1468_0312 = + {0x1468, 0x0312, pci_subsys_14e4_4318_1468_0312, 0}; +#undef pci_ss_info_1468_0312 +#define pci_ss_info_1468_0312 pci_ss_info_14e4_4318_1468_0312 +static const pciSubsystemInfo pci_ss_info_14e4_4318_14e4_0449 = + {0x14e4, 0x0449, pci_subsys_14e4_4318_14e4_0449, 0}; +#undef pci_ss_info_14e4_0449 +#define pci_ss_info_14e4_0449 pci_ss_info_14e4_4318_14e4_0449 +static const pciSubsystemInfo pci_ss_info_14e4_4318_14e4_4318 = + {0x14e4, 0x4318, pci_subsys_14e4_4318_14e4_4318, 0}; +#undef pci_ss_info_14e4_4318 +#define pci_ss_info_14e4_4318 pci_ss_info_14e4_4318_14e4_4318 +static const pciSubsystemInfo pci_ss_info_14e4_4318_16ec_0119 = + {0x16ec, 0x0119, pci_subsys_14e4_4318_16ec_0119, 0}; +#undef pci_ss_info_16ec_0119 +#define pci_ss_info_16ec_0119 pci_ss_info_14e4_4318_16ec_0119 +#endif static const pciSubsystemInfo pci_ss_info_14e4_4320_1028_0001 = {0x1028, 0x0001, pci_subsys_14e4_4320_1028_0001, 0}; #undef pci_ss_info_1028_0001 @@ -29845,10 +35952,36 @@ #undef pci_ss_info_1028_0003 #define pci_ss_info_1028_0003 pci_ss_info_14e4_4320_1028_0003 #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_14e4_4320_103c_12f4 = + {0x103c, 0x12f4, pci_subsys_14e4_4320_103c_12f4, 0}; +#undef pci_ss_info_103c_12f4 +#define pci_ss_info_103c_12f4 pci_ss_info_14e4_4320_103c_12f4 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_14e4_4320_103c_12fa = + {0x103c, 0x12fa, pci_subsys_14e4_4320_103c_12fa, 0}; +#undef pci_ss_info_103c_12fa +#define pci_ss_info_103c_12fa pci_ss_info_14e4_4320_103c_12fa +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_14e4_4320_1043_100f = {0x1043, 0x100f, pci_subsys_14e4_4320_1043_100f, 0}; #undef pci_ss_info_1043_100f #define pci_ss_info_1043_100f pci_ss_info_14e4_4320_1043_100f +#endif +static const pciSubsystemInfo pci_ss_info_14e4_4320_1057_7025 = + {0x1057, 0x7025, pci_subsys_14e4_4320_1057_7025, 0}; +#undef pci_ss_info_1057_7025 +#define pci_ss_info_1057_7025 pci_ss_info_14e4_4320_1057_7025 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_14e4_4320_106b_004e = + {0x106b, 0x004e, pci_subsys_14e4_4320_106b_004e, 0}; +#undef pci_ss_info_106b_004e +#define pci_ss_info_106b_004e pci_ss_info_14e4_4320_106b_004e +static const pciSubsystemInfo pci_ss_info_14e4_4320_144f_7050 = + {0x144f, 0x7050, pci_subsys_14e4_4320_144f_7050, 0}; +#undef pci_ss_info_144f_7050 +#define pci_ss_info_144f_7050 pci_ss_info_14e4_4320_144f_7050 static const pciSubsystemInfo pci_ss_info_14e4_4320_14e4_4320 = {0x14e4, 0x4320, pci_subsys_14e4_4320_14e4_4320, 0}; #undef pci_ss_info_14e4_4320 @@ -29857,10 +35990,18 @@ {0x1737, 0x4320, pci_subsys_14e4_4320_1737_4320, 0}; #undef pci_ss_info_1737_4320 #define pci_ss_info_1737_4320 pci_ss_info_14e4_4320_1737_4320 +static const pciSubsystemInfo pci_ss_info_14e4_4320_1799_7001 = + {0x1799, 0x7001, pci_subsys_14e4_4320_1799_7001, 0}; +#undef pci_ss_info_1799_7001 +#define pci_ss_info_1799_7001 pci_ss_info_14e4_4320_1799_7001 static const pciSubsystemInfo pci_ss_info_14e4_4320_1799_7010 = {0x1799, 0x7010, pci_subsys_14e4_4320_1799_7010, 0}; #undef pci_ss_info_1799_7010 #define pci_ss_info_1799_7010 pci_ss_info_14e4_4320_1799_7010 +static const pciSubsystemInfo pci_ss_info_14e4_4320_185f_1220 = + {0x185f, 0x1220, pci_subsys_14e4_4320_185f_1220, 0}; +#undef pci_ss_info_185f_1220 +#define pci_ss_info_185f_1220 pci_ss_info_14e4_4320_185f_1220 #endif static const pciSubsystemInfo pci_ss_info_14e4_4324_1028_0001 = {0x1028, 0x0001, pci_subsys_14e4_4324_1028_0001, 0}; @@ -30087,6 +36228,10 @@ {0x155d, 0x8850, pci_subsys_14f1_2013_155d_8850, 0}; #undef pci_ss_info_155d_8850 #define pci_ss_info_155d_8850 pci_ss_info_14f1_2013_155d_8850 +static const pciSubsystemInfo pci_ss_info_14f1_2045_14f1_2045 = + {0x14f1, 0x2045, pci_subsys_14f1_2045_14f1_2045, 0}; +#undef pci_ss_info_14f1_2045 +#define pci_ss_info_14f1_2045 pci_ss_info_14f1_2045_14f1_2045 static const pciSubsystemInfo pci_ss_info_14f1_2093_155d_2f07 = {0x155d, 0x2f07, pci_subsys_14f1_2093_155d_2f07, 0}; #undef pci_ss_info_155d_2f07 @@ -30121,6 +36266,254 @@ {0x14f1, 0x2004, pci_subsys_14f1_2f00_14f1_2004, 0}; #undef pci_ss_info_14f1_2004 #define pci_ss_info_14f1_2004 pci_ss_info_14f1_2f00_14f1_2004 +static const pciSubsystemInfo pci_ss_info_14f1_8800_0070_2801 = + {0x0070, 0x2801, pci_subsys_14f1_8800_0070_2801, 0}; +#undef pci_ss_info_0070_2801 +#define pci_ss_info_0070_2801 pci_ss_info_14f1_8800_0070_2801 +static const pciSubsystemInfo pci_ss_info_14f1_8800_0070_3401 = + {0x0070, 0x3401, pci_subsys_14f1_8800_0070_3401, 0}; +#undef pci_ss_info_0070_3401 +#define pci_ss_info_0070_3401 pci_ss_info_14f1_8800_0070_3401 +static const pciSubsystemInfo pci_ss_info_14f1_8800_0070_9001 = + {0x0070, 0x9001, pci_subsys_14f1_8800_0070_9001, 0}; +#undef pci_ss_info_0070_9001 +#define pci_ss_info_0070_9001 pci_ss_info_14f1_8800_0070_9001 +static const pciSubsystemInfo pci_ss_info_14f1_8800_0070_9200 = + {0x0070, 0x9200, pci_subsys_14f1_8800_0070_9200, 0}; +#undef pci_ss_info_0070_9200 +#define pci_ss_info_0070_9200 pci_ss_info_14f1_8800_0070_9200 +static const pciSubsystemInfo pci_ss_info_14f1_8800_0070_9202 = + {0x0070, 0x9202, pci_subsys_14f1_8800_0070_9202, 0}; +#undef pci_ss_info_0070_9202 +#define pci_ss_info_0070_9202 pci_ss_info_14f1_8800_0070_9202 +static const pciSubsystemInfo pci_ss_info_14f1_8800_0070_9402 = + {0x0070, 0x9402, pci_subsys_14f1_8800_0070_9402, 0}; +#undef pci_ss_info_0070_9402 +#define pci_ss_info_0070_9402 pci_ss_info_14f1_8800_0070_9402 +static const pciSubsystemInfo pci_ss_info_14f1_8800_0070_9802 = + {0x0070, 0x9802, pci_subsys_14f1_8800_0070_9802, 0}; +#undef pci_ss_info_0070_9802 +#define pci_ss_info_0070_9802 pci_ss_info_14f1_8800_0070_9802 +#endif +static const pciSubsystemInfo pci_ss_info_14f1_8800_1002_00f8 = + {0x1002, 0x00f8, pci_subsys_14f1_8800_1002_00f8, 0}; +#undef pci_ss_info_1002_00f8 +#define pci_ss_info_1002_00f8 pci_ss_info_14f1_8800_1002_00f8 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_14f1_8800_1002_a101 = + {0x1002, 0xa101, pci_subsys_14f1_8800_1002_a101, 0}; +#undef pci_ss_info_1002_a101 +#define pci_ss_info_1002_a101 pci_ss_info_14f1_8800_1002_a101 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_14f1_8800_1043_4823 = + {0x1043, 0x4823, pci_subsys_14f1_8800_1043_4823, 0}; +#undef pci_ss_info_1043_4823 +#define pci_ss_info_1043_4823 pci_ss_info_14f1_8800_1043_4823 +static const pciSubsystemInfo pci_ss_info_14f1_8800_107d_6613 = + {0x107d, 0x6613, pci_subsys_14f1_8800_107d_6613, 0}; +#undef pci_ss_info_107d_6613 +#define pci_ss_info_107d_6613 pci_ss_info_14f1_8800_107d_6613 +static const pciSubsystemInfo pci_ss_info_14f1_8800_107d_6620 = + {0x107d, 0x6620, pci_subsys_14f1_8800_107d_6620, 0}; +#undef pci_ss_info_107d_6620 +#define pci_ss_info_107d_6620 pci_ss_info_14f1_8800_107d_6620 +static const pciSubsystemInfo pci_ss_info_14f1_8800_107d_663c = + {0x107d, 0x663c, pci_subsys_14f1_8800_107d_663c, 0}; +#undef pci_ss_info_107d_663c +#define pci_ss_info_107d_663c pci_ss_info_14f1_8800_107d_663c +static const pciSubsystemInfo pci_ss_info_14f1_8800_107d_665f = + {0x107d, 0x665f, pci_subsys_14f1_8800_107d_665f, 0}; +#undef pci_ss_info_107d_665f +#define pci_ss_info_107d_665f pci_ss_info_14f1_8800_107d_665f +static const pciSubsystemInfo pci_ss_info_14f1_8800_10fc_d003 = + {0x10fc, 0xd003, pci_subsys_14f1_8800_10fc_d003, 0}; +#undef pci_ss_info_10fc_d003 +#define pci_ss_info_10fc_d003 pci_ss_info_14f1_8800_10fc_d003 +static const pciSubsystemInfo pci_ss_info_14f1_8800_10fc_d035 = + {0x10fc, 0xd035, pci_subsys_14f1_8800_10fc_d035, 0}; +#undef pci_ss_info_10fc_d035 +#define pci_ss_info_10fc_d035 pci_ss_info_14f1_8800_10fc_d035 +static const pciSubsystemInfo pci_ss_info_14f1_8800_1421_0334 = + {0x1421, 0x0334, pci_subsys_14f1_8800_1421_0334, 0}; +#undef pci_ss_info_1421_0334 +#define pci_ss_info_1421_0334 pci_ss_info_14f1_8800_1421_0334 +static const pciSubsystemInfo pci_ss_info_14f1_8800_1461_000a = + {0x1461, 0x000a, pci_subsys_14f1_8800_1461_000a, 0}; +#undef pci_ss_info_1461_000a +#define pci_ss_info_1461_000a pci_ss_info_14f1_8800_1461_000a +static const pciSubsystemInfo pci_ss_info_14f1_8800_1461_000b = + {0x1461, 0x000b, pci_subsys_14f1_8800_1461_000b, 0}; +#undef pci_ss_info_1461_000b +#define pci_ss_info_1461_000b pci_ss_info_14f1_8800_1461_000b +static const pciSubsystemInfo pci_ss_info_14f1_8800_1461_8011 = + {0x1461, 0x8011, pci_subsys_14f1_8800_1461_8011, 0}; +#undef pci_ss_info_1461_8011 +#define pci_ss_info_1461_8011 pci_ss_info_14f1_8800_1461_8011 +static const pciSubsystemInfo pci_ss_info_14f1_8800_1462_8606 = + {0x1462, 0x8606, pci_subsys_14f1_8800_1462_8606, 0}; +#undef pci_ss_info_1462_8606 +#define pci_ss_info_1462_8606 pci_ss_info_14f1_8800_1462_8606 +static const pciSubsystemInfo pci_ss_info_14f1_8800_14c7_0107 = + {0x14c7, 0x0107, pci_subsys_14f1_8800_14c7_0107, 0}; +#undef pci_ss_info_14c7_0107 +#define pci_ss_info_14c7_0107 pci_ss_info_14f1_8800_14c7_0107 +static const pciSubsystemInfo pci_ss_info_14f1_8800_14f1_0187 = + {0x14f1, 0x0187, pci_subsys_14f1_8800_14f1_0187, 0}; +#undef pci_ss_info_14f1_0187 +#define pci_ss_info_14f1_0187 pci_ss_info_14f1_8800_14f1_0187 +static const pciSubsystemInfo pci_ss_info_14f1_8800_14f1_0342 = + {0x14f1, 0x0342, pci_subsys_14f1_8800_14f1_0342, 0}; +#undef pci_ss_info_14f1_0342 +#define pci_ss_info_14f1_0342 pci_ss_info_14f1_8800_14f1_0342 +static const pciSubsystemInfo pci_ss_info_14f1_8800_153b_1166 = + {0x153b, 0x1166, pci_subsys_14f1_8800_153b_1166, 0}; +#undef pci_ss_info_153b_1166 +#define pci_ss_info_153b_1166 pci_ss_info_14f1_8800_153b_1166 +static const pciSubsystemInfo pci_ss_info_14f1_8800_1540_2580 = + {0x1540, 0x2580, pci_subsys_14f1_8800_1540_2580, 0}; +#undef pci_ss_info_1540_2580 +#define pci_ss_info_1540_2580 pci_ss_info_14f1_8800_1540_2580 +static const pciSubsystemInfo pci_ss_info_14f1_8800_1554_4811 = + {0x1554, 0x4811, pci_subsys_14f1_8800_1554_4811, 0}; +#undef pci_ss_info_1554_4811 +#define pci_ss_info_1554_4811 pci_ss_info_14f1_8800_1554_4811 +static const pciSubsystemInfo pci_ss_info_14f1_8800_1554_4813 = + {0x1554, 0x4813, pci_subsys_14f1_8800_1554_4813, 0}; +#undef pci_ss_info_1554_4813 +#define pci_ss_info_1554_4813 pci_ss_info_14f1_8800_1554_4813 +static const pciSubsystemInfo pci_ss_info_14f1_8800_17de_08a1 = + {0x17de, 0x08a1, pci_subsys_14f1_8800_17de_08a1, 0}; +#undef pci_ss_info_17de_08a1 +#define pci_ss_info_17de_08a1 pci_ss_info_14f1_8800_17de_08a1 +static const pciSubsystemInfo pci_ss_info_14f1_8800_17de_08a6 = + {0x17de, 0x08a6, pci_subsys_14f1_8800_17de_08a6, 0}; +#undef pci_ss_info_17de_08a6 +#define pci_ss_info_17de_08a6 pci_ss_info_14f1_8800_17de_08a6 +static const pciSubsystemInfo pci_ss_info_14f1_8800_17de_08b2 = + {0x17de, 0x08b2, pci_subsys_14f1_8800_17de_08b2, 0}; +#undef pci_ss_info_17de_08b2 +#define pci_ss_info_17de_08b2 pci_ss_info_14f1_8800_17de_08b2 +static const pciSubsystemInfo pci_ss_info_14f1_8800_17de_a8a6 = + {0x17de, 0xa8a6, pci_subsys_14f1_8800_17de_a8a6, 0}; +#undef pci_ss_info_17de_a8a6 +#define pci_ss_info_17de_a8a6 pci_ss_info_14f1_8800_17de_a8a6 +static const pciSubsystemInfo pci_ss_info_14f1_8800_1822_0025 = + {0x1822, 0x0025, pci_subsys_14f1_8800_1822_0025, 0}; +#undef pci_ss_info_1822_0025 +#define pci_ss_info_1822_0025 pci_ss_info_14f1_8800_1822_0025 +static const pciSubsystemInfo pci_ss_info_14f1_8800_18ac_d500 = + {0x18ac, 0xd500, pci_subsys_14f1_8800_18ac_d500, 0}; +#undef pci_ss_info_18ac_d500 +#define pci_ss_info_18ac_d500 pci_ss_info_14f1_8800_18ac_d500 +static const pciSubsystemInfo pci_ss_info_14f1_8800_18ac_d810 = + {0x18ac, 0xd810, pci_subsys_14f1_8800_18ac_d810, 0}; +#undef pci_ss_info_18ac_d810 +#define pci_ss_info_18ac_d810 pci_ss_info_14f1_8800_18ac_d810 +static const pciSubsystemInfo pci_ss_info_14f1_8800_18ac_d820 = + {0x18ac, 0xd820, pci_subsys_14f1_8800_18ac_d820, 0}; +#undef pci_ss_info_18ac_d820 +#define pci_ss_info_18ac_d820 pci_ss_info_14f1_8800_18ac_d820 +static const pciSubsystemInfo pci_ss_info_14f1_8800_18ac_db00 = + {0x18ac, 0xdb00, pci_subsys_14f1_8800_18ac_db00, 0}; +#undef pci_ss_info_18ac_db00 +#define pci_ss_info_18ac_db00 pci_ss_info_14f1_8800_18ac_db00 +static const pciSubsystemInfo pci_ss_info_14f1_8800_18ac_db11 = + {0x18ac, 0xdb11, pci_subsys_14f1_8800_18ac_db11, 0}; +#undef pci_ss_info_18ac_db11 +#define pci_ss_info_18ac_db11 pci_ss_info_14f1_8800_18ac_db11 +static const pciSubsystemInfo pci_ss_info_14f1_8800_18ac_db50 = + {0x18ac, 0xdb50, pci_subsys_14f1_8800_18ac_db50, 0}; +#undef pci_ss_info_18ac_db50 +#define pci_ss_info_18ac_db50 pci_ss_info_14f1_8800_18ac_db50 +static const pciSubsystemInfo pci_ss_info_14f1_8800_7063_3000 = + {0x7063, 0x3000, pci_subsys_14f1_8800_7063_3000, 0}; +#undef pci_ss_info_7063_3000 +#define pci_ss_info_7063_3000 pci_ss_info_14f1_8800_7063_3000 +static const pciSubsystemInfo pci_ss_info_14f1_8801_0070_2801 = + {0x0070, 0x2801, pci_subsys_14f1_8801_0070_2801, 0}; +#undef pci_ss_info_0070_2801 +#define pci_ss_info_0070_2801 pci_ss_info_14f1_8801_0070_2801 +static const pciSubsystemInfo pci_ss_info_14f1_8802_0070_2801 = + {0x0070, 0x2801, pci_subsys_14f1_8802_0070_2801, 0}; +#undef pci_ss_info_0070_2801 +#define pci_ss_info_0070_2801 pci_ss_info_14f1_8802_0070_2801 +static const pciSubsystemInfo pci_ss_info_14f1_8802_0070_9002 = + {0x0070, 0x9002, pci_subsys_14f1_8802_0070_9002, 0}; +#undef pci_ss_info_0070_9002 +#define pci_ss_info_0070_9002 pci_ss_info_14f1_8802_0070_9002 +static const pciSubsystemInfo pci_ss_info_14f1_8802_1043_4823 = + {0x1043, 0x4823, pci_subsys_14f1_8802_1043_4823, 0}; +#undef pci_ss_info_1043_4823 +#define pci_ss_info_1043_4823 pci_ss_info_14f1_8802_1043_4823 +static const pciSubsystemInfo pci_ss_info_14f1_8802_107d_663c = + {0x107d, 0x663c, pci_subsys_14f1_8802_107d_663c, 0}; +#undef pci_ss_info_107d_663c +#define pci_ss_info_107d_663c pci_ss_info_14f1_8802_107d_663c +static const pciSubsystemInfo pci_ss_info_14f1_8802_14f1_0187 = + {0x14f1, 0x0187, pci_subsys_14f1_8802_14f1_0187, 0}; +#undef pci_ss_info_14f1_0187 +#define pci_ss_info_14f1_0187 pci_ss_info_14f1_8802_14f1_0187 +static const pciSubsystemInfo pci_ss_info_14f1_8802_17de_08a1 = + {0x17de, 0x08a1, pci_subsys_14f1_8802_17de_08a1, 0}; +#undef pci_ss_info_17de_08a1 +#define pci_ss_info_17de_08a1 pci_ss_info_14f1_8802_17de_08a1 +static const pciSubsystemInfo pci_ss_info_14f1_8802_17de_08a6 = + {0x17de, 0x08a6, pci_subsys_14f1_8802_17de_08a6, 0}; +#undef pci_ss_info_17de_08a6 +#define pci_ss_info_17de_08a6 pci_ss_info_14f1_8802_17de_08a6 +static const pciSubsystemInfo pci_ss_info_14f1_8802_18ac_d500 = + {0x18ac, 0xd500, pci_subsys_14f1_8802_18ac_d500, 0}; +#undef pci_ss_info_18ac_d500 +#define pci_ss_info_18ac_d500 pci_ss_info_14f1_8802_18ac_d500 +static const pciSubsystemInfo pci_ss_info_14f1_8802_18ac_d810 = + {0x18ac, 0xd810, pci_subsys_14f1_8802_18ac_d810, 0}; +#undef pci_ss_info_18ac_d810 +#define pci_ss_info_18ac_d810 pci_ss_info_14f1_8802_18ac_d810 +static const pciSubsystemInfo pci_ss_info_14f1_8802_18ac_d820 = + {0x18ac, 0xd820, pci_subsys_14f1_8802_18ac_d820, 0}; +#undef pci_ss_info_18ac_d820 +#define pci_ss_info_18ac_d820 pci_ss_info_14f1_8802_18ac_d820 +static const pciSubsystemInfo pci_ss_info_14f1_8802_18ac_db00 = + {0x18ac, 0xdb00, pci_subsys_14f1_8802_18ac_db00, 0}; +#undef pci_ss_info_18ac_db00 +#define pci_ss_info_18ac_db00 pci_ss_info_14f1_8802_18ac_db00 +static const pciSubsystemInfo pci_ss_info_14f1_8802_18ac_db10 = + {0x18ac, 0xdb10, pci_subsys_14f1_8802_18ac_db10, 0}; +#undef pci_ss_info_18ac_db10 +#define pci_ss_info_18ac_db10 pci_ss_info_14f1_8802_18ac_db10 +static const pciSubsystemInfo pci_ss_info_14f1_8802_7063_3000 = + {0x7063, 0x3000, pci_subsys_14f1_8802_7063_3000, 0}; +#undef pci_ss_info_7063_3000 +#define pci_ss_info_7063_3000 pci_ss_info_14f1_8802_7063_3000 +static const pciSubsystemInfo pci_ss_info_14f1_8804_0070_9002 = + {0x0070, 0x9002, pci_subsys_14f1_8804_0070_9002, 0}; +#undef pci_ss_info_0070_9002 +#define pci_ss_info_0070_9002 pci_ss_info_14f1_8804_0070_9002 +static const pciSubsystemInfo pci_ss_info_14f1_8811_0070_3401 = + {0x0070, 0x3401, pci_subsys_14f1_8811_0070_3401, 0}; +#undef pci_ss_info_0070_3401 +#define pci_ss_info_0070_3401 pci_ss_info_14f1_8811_0070_3401 +static const pciSubsystemInfo pci_ss_info_14f1_8811_1462_8606 = + {0x1462, 0x8606, pci_subsys_14f1_8811_1462_8606, 0}; +#undef pci_ss_info_1462_8606 +#define pci_ss_info_1462_8606 pci_ss_info_14f1_8811_1462_8606 +static const pciSubsystemInfo pci_ss_info_14f1_8811_18ac_d500 = + {0x18ac, 0xd500, pci_subsys_14f1_8811_18ac_d500, 0}; +#undef pci_ss_info_18ac_d500 +#define pci_ss_info_18ac_d500 pci_ss_info_14f1_8811_18ac_d500 +static const pciSubsystemInfo pci_ss_info_14f1_8811_18ac_d810 = + {0x18ac, 0xd810, pci_subsys_14f1_8811_18ac_d810, 0}; +#undef pci_ss_info_18ac_d810 +#define pci_ss_info_18ac_d810 pci_ss_info_14f1_8811_18ac_d810 +static const pciSubsystemInfo pci_ss_info_14f1_8811_18ac_d820 = + {0x18ac, 0xd820, pci_subsys_14f1_8811_18ac_d820, 0}; +#undef pci_ss_info_18ac_d820 +#define pci_ss_info_18ac_d820 pci_ss_info_14f1_8811_18ac_d820 +static const pciSubsystemInfo pci_ss_info_14f1_8811_18ac_db00 = + {0x18ac, 0xdb00, pci_subsys_14f1_8811_18ac_db00, 0}; +#undef pci_ss_info_18ac_db00 +#define pci_ss_info_18ac_db00 pci_ss_info_14f1_8811_18ac_db00 #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1516_0803_1320_10bd = @@ -30169,7 +36562,45 @@ {0x1522, 0x1d00, pci_subsys_1522_0100_1522_1d00, 0}; #undef pci_ss_info_1522_1d00 #define pci_ss_info_1522_1d00 pci_ss_info_1522_0100_1522_1d00 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_2000 = + {0x1522, 0x2000, pci_subsys_1522_0100_1522_2000, 0}; +#undef pci_ss_info_1522_2000 +#define pci_ss_info_1522_2000 pci_ss_info_1522_0100_1522_2000 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_2100 = + {0x1522, 0x2100, pci_subsys_1522_0100_1522_2100, 0}; +#undef pci_ss_info_1522_2100 +#define pci_ss_info_1522_2100 pci_ss_info_1522_0100_1522_2100 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_2200 = + {0x1522, 0x2200, pci_subsys_1522_0100_1522_2200, 0}; +#undef pci_ss_info_1522_2200 +#define pci_ss_info_1522_2200 pci_ss_info_1522_0100_1522_2200 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_2300 = + {0x1522, 0x2300, pci_subsys_1522_0100_1522_2300, 0}; +#undef pci_ss_info_1522_2300 +#define pci_ss_info_1522_2300 pci_ss_info_1522_0100_1522_2300 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_2400 = + {0x1522, 0x2400, pci_subsys_1522_0100_1522_2400, 0}; +#undef pci_ss_info_1522_2400 +#define pci_ss_info_1522_2400 pci_ss_info_1522_0100_1522_2400 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_2500 = + {0x1522, 0x2500, pci_subsys_1522_0100_1522_2500, 0}; +#undef pci_ss_info_1522_2500 +#define pci_ss_info_1522_2500 pci_ss_info_1522_0100_1522_2500 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_2600 = + {0x1522, 0x2600, pci_subsys_1522_0100_1522_2600, 0}; +#undef pci_ss_info_1522_2600 +#define pci_ss_info_1522_2600 pci_ss_info_1522_0100_1522_2600 +static const pciSubsystemInfo pci_ss_info_1522_0100_1522_2700 = + {0x1522, 0x2700, pci_subsys_1522_0100_1522_2700, 0}; +#undef pci_ss_info_1522_2700 +#define pci_ss_info_1522_2700 pci_ss_info_1522_0100_1522_2700 +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_1524_0510_103c_006a = + {0x103c, 0x006a, pci_subsys_1524_0510_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_1524_0510_103c_006a #ifdef VENDOR_INCLUDE_NONVIDEO #endif static const pciSubsystemInfo pci_ss_info_1524_1410_1025_005a = @@ -30178,7 +36609,23 @@ #define pci_ss_info_1025_005a pci_ss_info_1524_1410_1025_005a #ifdef VENDOR_INCLUDE_NONVIDEO #endif +static const pciSubsystemInfo pci_ss_info_1524_1411_103c_006a = + {0x103c, 0x006a, pci_subsys_1524_1411_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_1524_1411_103c_006a +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_167b_2102_187e_3406 = + {0x187e, 0x3406, pci_subsys_167b_2102_187e_3406, 0}; +#undef pci_ss_info_187e_3406 +#define pci_ss_info_187e_3406 pci_ss_info_167b_2102_187e_3406 +#endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_168c_0013_1113_d301 = + {0x1113, 0xd301, pci_subsys_168c_0013_1113_d301, 0}; +#undef pci_ss_info_1113_d301 +#define pci_ss_info_1113_d301 pci_ss_info_168c_0013_1113_d301 static const pciSubsystemInfo pci_ss_info_168c_0013_1186_3202 = {0x1186, 0x3202, pci_subsys_168c_0013_1186_3202, 0}; #undef pci_ss_info_1186_3202 @@ -30187,10 +36634,30 @@ {0x1186, 0x3203, pci_subsys_168c_0013_1186_3203, 0}; #undef pci_ss_info_1186_3203 #define pci_ss_info_1186_3203 pci_ss_info_168c_0013_1186_3203 +static const pciSubsystemInfo pci_ss_info_168c_0013_1186_3a12 = + {0x1186, 0x3a12, pci_subsys_168c_0013_1186_3a12, 0}; +#undef pci_ss_info_1186_3a12 +#define pci_ss_info_1186_3a12 pci_ss_info_168c_0013_1186_3a12 static const pciSubsystemInfo pci_ss_info_168c_0013_1186_3a13 = {0x1186, 0x3a13, pci_subsys_168c_0013_1186_3a13, 0}; #undef pci_ss_info_1186_3a13 #define pci_ss_info_1186_3a13 pci_ss_info_168c_0013_1186_3a13 +static const pciSubsystemInfo pci_ss_info_168c_0013_1186_3a14 = + {0x1186, 0x3a14, pci_subsys_168c_0013_1186_3a14, 0}; +#undef pci_ss_info_1186_3a14 +#define pci_ss_info_1186_3a14 pci_ss_info_168c_0013_1186_3a14 +static const pciSubsystemInfo pci_ss_info_168c_0013_1186_3a17 = + {0x1186, 0x3a17, pci_subsys_168c_0013_1186_3a17, 0}; +#undef pci_ss_info_1186_3a17 +#define pci_ss_info_1186_3a17 pci_ss_info_168c_0013_1186_3a17 +static const pciSubsystemInfo pci_ss_info_168c_0013_1186_3a18 = + {0x1186, 0x3a18, pci_subsys_168c_0013_1186_3a18, 0}; +#undef pci_ss_info_1186_3a18 +#define pci_ss_info_1186_3a18 pci_ss_info_168c_0013_1186_3a18 +static const pciSubsystemInfo pci_ss_info_168c_0013_1186_3a63 = + {0x1186, 0x3a63, pci_subsys_168c_0013_1186_3a63, 0}; +#undef pci_ss_info_1186_3a63 +#define pci_ss_info_1186_3a63 pci_ss_info_168c_0013_1186_3a63 static const pciSubsystemInfo pci_ss_info_168c_0013_1186_3a94 = {0x1186, 0x3a94, pci_subsys_168c_0013_1186_3a94, 0}; #undef pci_ss_info_1186_3a94 @@ -30199,6 +36666,10 @@ {0x1385, 0x4d00, pci_subsys_168c_0013_1385_4d00, 0}; #undef pci_ss_info_1385_4d00 #define pci_ss_info_1385_4d00 pci_ss_info_168c_0013_1385_4d00 +static const pciSubsystemInfo pci_ss_info_168c_0013_1458_e911 = + {0x1458, 0xe911, pci_subsys_168c_0013_1458_e911, 0}; +#undef pci_ss_info_1458_e911 +#define pci_ss_info_1458_e911 pci_ss_info_168c_0013_1458_e911 static const pciSubsystemInfo pci_ss_info_168c_0013_14b7_0a60 = {0x14b7, 0x0a60, pci_subsys_168c_0013_14b7_0a60, 0}; #undef pci_ss_info_14b7_0a60 @@ -30211,16 +36682,64 @@ {0x168c, 0x1025, pci_subsys_168c_0013_168c_1025, 0}; #undef pci_ss_info_168c_1025 #define pci_ss_info_168c_1025 pci_ss_info_168c_0013_168c_1025 +static const pciSubsystemInfo pci_ss_info_168c_0013_168c_1027 = + {0x168c, 0x1027, pci_subsys_168c_0013_168c_1027, 0}; +#undef pci_ss_info_168c_1027 +#define pci_ss_info_168c_1027 pci_ss_info_168c_0013_168c_1027 static const pciSubsystemInfo pci_ss_info_168c_0013_168c_2026 = {0x168c, 0x2026, pci_subsys_168c_0013_168c_2026, 0}; #undef pci_ss_info_168c_2026 #define pci_ss_info_168c_2026 pci_ss_info_168c_0013_168c_2026 +static const pciSubsystemInfo pci_ss_info_168c_0013_168c_2041 = + {0x168c, 0x2041, pci_subsys_168c_0013_168c_2041, 0}; +#undef pci_ss_info_168c_2041 +#define pci_ss_info_168c_2041 pci_ss_info_168c_0013_168c_2041 +static const pciSubsystemInfo pci_ss_info_168c_0013_168c_2042 = + {0x168c, 0x2042, pci_subsys_168c_0013_168c_2042, 0}; +#undef pci_ss_info_168c_2042 +#define pci_ss_info_168c_2042 pci_ss_info_168c_0013_168c_2042 +static const pciSubsystemInfo pci_ss_info_168c_0013_16ab_7302 = + {0x16ab, 0x7302, pci_subsys_168c_0013_16ab_7302, 0}; +#undef pci_ss_info_16ab_7302 +#define pci_ss_info_16ab_7302 pci_ss_info_168c_0013_16ab_7302 +static const pciSubsystemInfo pci_ss_info_168c_001a_1186_3a15 = + {0x1186, 0x3a15, pci_subsys_168c_001a_1186_3a15, 0}; +#undef pci_ss_info_1186_3a15 +#define pci_ss_info_1186_3a15 pci_ss_info_168c_001a_1186_3a15 +static const pciSubsystemInfo pci_ss_info_168c_001a_1186_3a16 = + {0x1186, 0x3a16, pci_subsys_168c_001a_1186_3a16, 0}; +#undef pci_ss_info_1186_3a16 +#define pci_ss_info_1186_3a16 pci_ss_info_168c_001a_1186_3a16 +static const pciSubsystemInfo pci_ss_info_168c_001a_1186_3a23 = + {0x1186, 0x3a23, pci_subsys_168c_001a_1186_3a23, 0}; +#undef pci_ss_info_1186_3a23 +#define pci_ss_info_1186_3a23 pci_ss_info_168c_001a_1186_3a23 +static const pciSubsystemInfo pci_ss_info_168c_001a_1186_3a24 = + {0x1186, 0x3a24, pci_subsys_168c_001a_1186_3a24, 0}; +#undef pci_ss_info_1186_3a24 +#define pci_ss_info_1186_3a24 pci_ss_info_168c_001a_1186_3a24 +static const pciSubsystemInfo pci_ss_info_168c_001a_168c_1052 = + {0x168c, 0x1052, pci_subsys_168c_001a_168c_1052, 0}; +#undef pci_ss_info_168c_1052 +#define pci_ss_info_168c_1052 pci_ss_info_168c_001a_168c_1052 +static const pciSubsystemInfo pci_ss_info_168c_001b_1186_3a19 = + {0x1186, 0x3a19, pci_subsys_168c_001b_1186_3a19, 0}; +#undef pci_ss_info_1186_3a19 +#define pci_ss_info_1186_3a19 pci_ss_info_168c_001b_1186_3a19 +static const pciSubsystemInfo pci_ss_info_168c_001b_1186_3a22 = + {0x1186, 0x3a22, pci_subsys_168c_001b_1186_3a22, 0}; +#undef pci_ss_info_1186_3a22 +#define pci_ss_info_1186_3a22 pci_ss_info_168c_001b_1186_3a22 #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1737_1032_1737_0015 = {0x1737, 0x0015, pci_subsys_1737_1032_1737_0015, 0}; #undef pci_ss_info_1737_0015 #define pci_ss_info_1737_0015 pci_ss_info_1737_1032_1737_0015 +static const pciSubsystemInfo pci_ss_info_1737_1032_1737_0024 = + {0x1737, 0x0024, pci_subsys_1737_1032_1737_0024, 0}; +#undef pci_ss_info_1737_0024 +#define pci_ss_info_1737_0024 pci_ss_info_1737_1032_1737_0024 static const pciSubsystemInfo pci_ss_info_1737_1064_1737_0016 = {0x1737, 0x0016, pci_subsys_1737_1064_1737_0016, 0}; #undef pci_ss_info_1737_0016 @@ -30233,6 +36752,20 @@ #define pci_ss_info_173b_0001 pci_ss_info_173b_03ea_173b_0001 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_17d5_5831_103c_12d5 = + {0x103c, 0x12d5, pci_subsys_17d5_5831_103c_12d5, 0}; +#undef pci_ss_info_103c_12d5 +#define pci_ss_info_103c_12d5 pci_ss_info_17d5_5831_103c_12d5 +#ifdef VENDOR_INCLUDE_NONVIDEO +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_17fe_2220_17fe_2220 = + {0x17fe, 0x2220, pci_subsys_17fe_2220_17fe_2220, 0}; +#undef pci_ss_info_17fe_2220 +#define pci_ss_info_17fe_2220 pci_ss_info_17fe_2220_17fe_2220 +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_1813_4000_16be_0001 = {0x16be, 0x0001, pci_subsys_1813_4000_16be_0001, 0}; #undef pci_ss_info_16be_0001 @@ -30243,6 +36776,18 @@ #define pci_ss_info_16be_0002 pci_ss_info_1813_4100_16be_0002 #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_1814_0101_1043_0127 = + {0x1043, 0x0127, pci_subsys_1814_0101_1043_0127, 0}; +#undef pci_ss_info_1043_0127 +#define pci_ss_info_1043_0127 pci_ss_info_1814_0101_1043_0127 +static const pciSubsystemInfo pci_ss_info_1814_0101_1462_6828 = + {0x1462, 0x6828, pci_subsys_1814_0101_1462_6828, 0}; +#undef pci_ss_info_1462_6828 +#define pci_ss_info_1462_6828 pci_ss_info_1814_0101_1462_6828 +static const pciSubsystemInfo pci_ss_info_1814_0201_1043_130f = + {0x1043, 0x130f, pci_subsys_1814_0201_1043_130f, 0}; +#undef pci_ss_info_1043_130f +#define pci_ss_info_1043_130f pci_ss_info_1814_0201_1043_130f static const pciSubsystemInfo pci_ss_info_1814_0201_1371_001e = {0x1371, 0x001e, pci_subsys_1814_0201_1371_001e, 0}; #undef pci_ss_info_1371_001e @@ -30255,6 +36800,72 @@ {0x1371, 0x0020, pci_subsys_1814_0201_1371_0020, 0}; #undef pci_ss_info_1371_0020 #define pci_ss_info_1371_0020 pci_ss_info_1814_0201_1371_0020 +static const pciSubsystemInfo pci_ss_info_1814_0201_1458_e381 = + {0x1458, 0xe381, pci_subsys_1814_0201_1458_e381, 0}; +#undef pci_ss_info_1458_e381 +#define pci_ss_info_1458_e381 pci_ss_info_1814_0201_1458_e381 +static const pciSubsystemInfo pci_ss_info_1814_0201_1458_e931 = + {0x1458, 0xe931, pci_subsys_1814_0201_1458_e931, 0}; +#undef pci_ss_info_1458_e931 +#define pci_ss_info_1458_e931 pci_ss_info_1814_0201_1458_e931 +static const pciSubsystemInfo pci_ss_info_1814_0201_1462_6835 = + {0x1462, 0x6835, pci_subsys_1814_0201_1462_6835, 0}; +#undef pci_ss_info_1462_6835 +#define pci_ss_info_1462_6835 pci_ss_info_1814_0201_1462_6835 +static const pciSubsystemInfo pci_ss_info_1814_0201_1737_0032 = + {0x1737, 0x0032, pci_subsys_1814_0201_1737_0032, 0}; +#undef pci_ss_info_1737_0032 +#define pci_ss_info_1737_0032 pci_ss_info_1814_0201_1737_0032 +static const pciSubsystemInfo pci_ss_info_1814_0201_1799_700a = + {0x1799, 0x700a, pci_subsys_1814_0201_1799_700a, 0}; +#undef pci_ss_info_1799_700a +#define pci_ss_info_1799_700a pci_ss_info_1814_0201_1799_700a +static const pciSubsystemInfo pci_ss_info_1814_0201_1799_701a = + {0x1799, 0x701a, pci_subsys_1814_0201_1799_701a, 0}; +#undef pci_ss_info_1799_701a +#define pci_ss_info_1799_701a pci_ss_info_1814_0201_1799_701a +static const pciSubsystemInfo pci_ss_info_1814_0201_185f_22a0 = + {0x185f, 0x22a0, pci_subsys_1814_0201_185f_22a0, 0}; +#undef pci_ss_info_185f_22a0 +#define pci_ss_info_185f_22a0 pci_ss_info_1814_0201_185f_22a0 +static const pciSubsystemInfo pci_ss_info_1814_0301_2561_1814 = + {0x2561, 0x1814, pci_subsys_1814_0301_2561_1814, 0}; +#undef pci_ss_info_2561_1814 +#define pci_ss_info_2561_1814 pci_ss_info_1814_0301_2561_1814 +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_18ec_c006_18ec_d001 = + {0x18ec, 0xd001, pci_subsys_18ec_c006_18ec_d001, 0}; +#undef pci_ss_info_18ec_d001 +#define pci_ss_info_18ec_d001 pci_ss_info_18ec_c006_18ec_d001 +static const pciSubsystemInfo pci_ss_info_18ec_c006_18ec_d002 = + {0x18ec, 0xd002, pci_subsys_18ec_c006_18ec_d002, 0}; +#undef pci_ss_info_18ec_d002 +#define pci_ss_info_18ec_d002 pci_ss_info_18ec_c006_18ec_d002 +static const pciSubsystemInfo pci_ss_info_18ec_c006_18ec_d003 = + {0x18ec, 0xd003, pci_subsys_18ec_c006_18ec_d003, 0}; +#undef pci_ss_info_18ec_d003 +#define pci_ss_info_18ec_d003 pci_ss_info_18ec_c006_18ec_d003 +static const pciSubsystemInfo pci_ss_info_18ec_c006_18ec_d004 = + {0x18ec, 0xd004, pci_subsys_18ec_c006_18ec_d004, 0}; +#undef pci_ss_info_18ec_d004 +#define pci_ss_info_18ec_d004 pci_ss_info_18ec_c006_18ec_d004 +static const pciSubsystemInfo pci_ss_info_18ec_c058_18ec_d001 = + {0x18ec, 0xd001, pci_subsys_18ec_c058_18ec_d001, 0}; +#undef pci_ss_info_18ec_d001 +#define pci_ss_info_18ec_d001 pci_ss_info_18ec_c058_18ec_d001 +static const pciSubsystemInfo pci_ss_info_18ec_c058_18ec_d002 = + {0x18ec, 0xd002, pci_subsys_18ec_c058_18ec_d002, 0}; +#undef pci_ss_info_18ec_d002 +#define pci_ss_info_18ec_d002 pci_ss_info_18ec_c058_18ec_d002 +static const pciSubsystemInfo pci_ss_info_18ec_c058_18ec_d003 = + {0x18ec, 0xd003, pci_subsys_18ec_c058_18ec_d003, 0}; +#undef pci_ss_info_18ec_d003 +#define pci_ss_info_18ec_d003 pci_ss_info_18ec_c058_18ec_d003 +static const pciSubsystemInfo pci_ss_info_18ec_c058_18ec_d004 = + {0x18ec, 0xd004, pci_subsys_18ec_c058_18ec_d004, 0}; +#undef pci_ss_info_18ec_d004 +#define pci_ss_info_18ec_d004 pci_ss_info_18ec_c058_18ec_d004 #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_3388_0021_4c53_1050 = @@ -30265,6 +36876,10 @@ {0x4c53, 0x1080, pci_subsys_3388_0021_4c53_1080, 0}; #undef pci_ss_info_4c53_1080 #define pci_ss_info_4c53_1080 pci_ss_info_3388_0021_4c53_1080 +static const pciSubsystemInfo pci_ss_info_3388_0021_4c53_1090 = + {0x4c53, 0x1090, pci_subsys_3388_0021_4c53_1090, 0}; +#undef pci_ss_info_4c53_1090 +#define pci_ss_info_4c53_1090 pci_ss_info_3388_0021_4c53_1090 static const pciSubsystemInfo pci_ss_info_3388_0021_4c53_10a0 = {0x4c53, 0x10a0, pci_subsys_3388_0021_4c53_10a0, 0}; #undef pci_ss_info_4c53_10a0 @@ -30277,6 +36892,10 @@ {0x4c53, 0x3011, pci_subsys_3388_0021_4c53_3011, 0}; #undef pci_ss_info_4c53_3011 #define pci_ss_info_4c53_3011 pci_ss_info_3388_0021_4c53_3011 +static const pciSubsystemInfo pci_ss_info_3388_0021_4c53_4000 = + {0x4c53, 0x4000, pci_subsys_3388_0021_4c53_4000, 0}; +#undef pci_ss_info_4c53_4000 +#define pci_ss_info_4c53_4000 pci_ss_info_3388_0021_4c53_4000 static const pciSubsystemInfo pci_ss_info_3388_8011_3388_8011 = {0x3388, 0x8011, pci_subsys_3388_8011_3388_8011, 0}; #undef pci_ss_info_3388_8011 @@ -30290,10 +36909,34 @@ #undef pci_ss_info_3388_8013 #define pci_ss_info_3388_8013 pci_ss_info_3388_8013_3388_8013 #endif +static const pciSubsystemInfo pci_ss_info_3d3d_0002_0000_0000 = + {0x0000, 0x0000, pci_subsys_3d3d_0002_0000_0000, 0}; +#undef pci_ss_info_0000_0000 +#define pci_ss_info_0000_0000 pci_ss_info_3d3d_0002_0000_0000 +static const pciSubsystemInfo pci_ss_info_3d3d_0003_0000_0000 = + {0x0000, 0x0000, pci_subsys_3d3d_0003_0000_0000, 0}; +#undef pci_ss_info_0000_0000 +#define pci_ss_info_0000_0000 pci_ss_info_3d3d_0003_0000_0000 +static const pciSubsystemInfo pci_ss_info_3d3d_0006_0000_0000 = + {0x0000, 0x0000, pci_subsys_3d3d_0006_0000_0000, 0}; +#undef pci_ss_info_0000_0000 +#define pci_ss_info_0000_0000 pci_ss_info_3d3d_0006_0000_0000 +static const pciSubsystemInfo pci_ss_info_3d3d_0006_1048_0a42 = + {0x1048, 0x0a42, pci_subsys_3d3d_0006_1048_0a42, 0}; +#undef pci_ss_info_1048_0a42 +#define pci_ss_info_1048_0a42 pci_ss_info_3d3d_0006_1048_0a42 +static const pciSubsystemInfo pci_ss_info_3d3d_0008_1048_0a42 = + {0x1048, 0x0a42, pci_subsys_3d3d_0008_1048_0a42, 0}; +#undef pci_ss_info_1048_0a42 +#define pci_ss_info_1048_0a42 pci_ss_info_3d3d_0008_1048_0a42 static const pciSubsystemInfo pci_ss_info_3d3d_0009_1040_0011 = {0x1040, 0x0011, pci_subsys_3d3d_0009_1040_0011, 0}; #undef pci_ss_info_1040_0011 #define pci_ss_info_1040_0011 pci_ss_info_3d3d_0009_1040_0011 +static const pciSubsystemInfo pci_ss_info_3d3d_0009_1048_0a42 = + {0x1048, 0x0a42, pci_subsys_3d3d_0009_1048_0a42, 0}; +#undef pci_ss_info_1048_0a42 +#define pci_ss_info_1048_0a42 pci_ss_info_3d3d_0009_1048_0a42 static const pciSubsystemInfo pci_ss_info_3d3d_0009_13e9_1000 = {0x13e9, 0x1000, pci_subsys_3d3d_0009_13e9_1000, 0}; #undef pci_ss_info_13e9_1000 @@ -30343,10 +36986,86 @@ #undef pci_ss_info_4005_4000 #define pci_ss_info_4005_4000 pci_ss_info_4005_4000_4005_4000 #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_4444_0016_0070_0003 = + {0x0070, 0x0003, pci_subsys_4444_0016_0070_0003, 0}; +#undef pci_ss_info_0070_0003 +#define pci_ss_info_0070_0003 pci_ss_info_4444_0016_0070_0003 +static const pciSubsystemInfo pci_ss_info_4444_0016_0070_0009 = + {0x0070, 0x0009, pci_subsys_4444_0016_0070_0009, 0}; +#undef pci_ss_info_0070_0009 +#define pci_ss_info_0070_0009 pci_ss_info_4444_0016_0070_0009 +static const pciSubsystemInfo pci_ss_info_4444_0016_0070_0801 = + {0x0070, 0x0801, pci_subsys_4444_0016_0070_0801, 0}; +#undef pci_ss_info_0070_0801 +#define pci_ss_info_0070_0801 pci_ss_info_4444_0016_0070_0801 +static const pciSubsystemInfo pci_ss_info_4444_0016_0070_0807 = + {0x0070, 0x0807, pci_subsys_4444_0016_0070_0807, 0}; +#undef pci_ss_info_0070_0807 +#define pci_ss_info_0070_0807 pci_ss_info_4444_0016_0070_0807 +static const pciSubsystemInfo pci_ss_info_4444_0016_0070_4001 = + {0x0070, 0x4001, pci_subsys_4444_0016_0070_4001, 0}; +#undef pci_ss_info_0070_4001 +#define pci_ss_info_0070_4001 pci_ss_info_4444_0016_0070_4001 static const pciSubsystemInfo pci_ss_info_4444_0016_0070_4009 = {0x0070, 0x4009, pci_subsys_4444_0016_0070_4009, 0}; #undef pci_ss_info_0070_4009 #define pci_ss_info_0070_4009 pci_ss_info_4444_0016_0070_4009 +static const pciSubsystemInfo pci_ss_info_4444_0016_0070_4801 = + {0x0070, 0x4801, pci_subsys_4444_0016_0070_4801, 0}; +#undef pci_ss_info_0070_4801 +#define pci_ss_info_0070_4801 pci_ss_info_4444_0016_0070_4801 +static const pciSubsystemInfo pci_ss_info_4444_0016_0070_4803 = + {0x0070, 0x4803, pci_subsys_4444_0016_0070_4803, 0}; +#undef pci_ss_info_0070_4803 +#define pci_ss_info_0070_4803 pci_ss_info_4444_0016_0070_4803 +static const pciSubsystemInfo pci_ss_info_4444_0016_0070_8003 = + {0x0070, 0x8003, pci_subsys_4444_0016_0070_8003, 0}; +#undef pci_ss_info_0070_8003 +#define pci_ss_info_0070_8003 pci_ss_info_4444_0016_0070_8003 +static const pciSubsystemInfo pci_ss_info_4444_0016_0070_8801 = + {0x0070, 0x8801, pci_subsys_4444_0016_0070_8801, 0}; +#undef pci_ss_info_0070_8801 +#define pci_ss_info_0070_8801 pci_ss_info_4444_0016_0070_8801 +static const pciSubsystemInfo pci_ss_info_4444_0016_0070_c801 = + {0x0070, 0xc801, pci_subsys_4444_0016_0070_c801, 0}; +#undef pci_ss_info_0070_c801 +#define pci_ss_info_0070_c801 pci_ss_info_4444_0016_0070_c801 +static const pciSubsystemInfo pci_ss_info_4444_0016_0070_e807 = + {0x0070, 0xe807, pci_subsys_4444_0016_0070_e807, 0}; +#undef pci_ss_info_0070_e807 +#define pci_ss_info_0070_e807 pci_ss_info_4444_0016_0070_e807 +static const pciSubsystemInfo pci_ss_info_4444_0016_0070_e817 = + {0x0070, 0xe817, pci_subsys_4444_0016_0070_e817, 0}; +#undef pci_ss_info_0070_e817 +#define pci_ss_info_0070_e817 pci_ss_info_4444_0016_0070_e817 +static const pciSubsystemInfo pci_ss_info_4444_0016_0270_0801 = + {0x0270, 0x0801, pci_subsys_4444_0016_0270_0801, 0}; +#undef pci_ss_info_0270_0801 +#define pci_ss_info_0270_0801 pci_ss_info_4444_0016_0270_0801 +static const pciSubsystemInfo pci_ss_info_4444_0016_12ab_fff3 = + {0x12ab, 0xfff3, pci_subsys_4444_0016_12ab_fff3, 0}; +#undef pci_ss_info_12ab_fff3 +#define pci_ss_info_12ab_fff3 pci_ss_info_4444_0016_12ab_fff3 +static const pciSubsystemInfo pci_ss_info_4444_0016_12ab_ffff = + {0x12ab, 0xffff, pci_subsys_4444_0016_12ab_ffff, 0}; +#undef pci_ss_info_12ab_ffff +#define pci_ss_info_12ab_ffff pci_ss_info_4444_0016_12ab_ffff +static const pciSubsystemInfo pci_ss_info_4444_0016_4070_8801 = + {0x4070, 0x8801, pci_subsys_4444_0016_4070_8801, 0}; +#undef pci_ss_info_4070_8801 +#define pci_ss_info_4070_8801 pci_ss_info_4444_0016_4070_8801 +static const pciSubsystemInfo pci_ss_info_4444_0016_9005_0092 = + {0x9005, 0x0092, pci_subsys_4444_0016_9005_0092, 0}; +#undef pci_ss_info_9005_0092 +#define pci_ss_info_9005_0092 pci_ss_info_4444_0016_9005_0092 +static const pciSubsystemInfo pci_ss_info_4444_0016_9005_0093 = + {0x9005, 0x0093, pci_subsys_4444_0016_9005_0093, 0}; +#undef pci_ss_info_9005_0093 +#define pci_ss_info_9005_0093 pci_ss_info_4444_0016_9005_0093 +static const pciSubsystemInfo pci_ss_info_4444_0016_ff92_0070 = + {0xff92, 0x0070, pci_subsys_4444_0016_ff92_0070, 0}; +#undef pci_ss_info_ff92_0070 +#define pci_ss_info_ff92_0070 pci_ss_info_4444_0016_ff92_0070 static const pciSubsystemInfo pci_ss_info_4444_0803_0070_4000 = {0x0070, 0x4000, pci_subsys_4444_0803_0070_4000, 0}; #undef pci_ss_info_0070_4000 @@ -30355,6 +37074,22 @@ {0x0070, 0x4001, pci_subsys_4444_0803_0070_4001, 0}; #undef pci_ss_info_0070_4001 #define pci_ss_info_0070_4001 pci_ss_info_4444_0803_0070_4001 +static const pciSubsystemInfo pci_ss_info_4444_0803_0070_4800 = + {0x0070, 0x4800, pci_subsys_4444_0803_0070_4800, 0}; +#undef pci_ss_info_0070_4800 +#define pci_ss_info_0070_4800 pci_ss_info_4444_0803_0070_4800 +static const pciSubsystemInfo pci_ss_info_4444_0803_12ab_0000 = + {0x12ab, 0x0000, pci_subsys_4444_0803_12ab_0000, 0}; +#undef pci_ss_info_12ab_0000 +#define pci_ss_info_12ab_0000 pci_ss_info_4444_0803_12ab_0000 +static const pciSubsystemInfo pci_ss_info_4444_0803_1461_a3ce = + {0x1461, 0xa3ce, pci_subsys_4444_0803_1461_a3ce, 0}; +#undef pci_ss_info_1461_a3ce +#define pci_ss_info_1461_a3ce pci_ss_info_4444_0803_1461_a3ce +static const pciSubsystemInfo pci_ss_info_4444_0803_1461_a3cf = + {0x1461, 0xa3cf, pci_subsys_4444_0803_1461_a3cf, 0}; +#undef pci_ss_info_1461_a3cf +#define pci_ss_info_1461_a3cf pci_ss_info_4444_0803_1461_a3cf #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_4a14_5000_4a14_5000 = @@ -30548,6 +37283,10 @@ {0x1014, 0x017f, pci_subsys_5333_8c12_1014_017f, 0}; #undef pci_ss_info_1014_017f #define pci_ss_info_1014_017f pci_ss_info_5333_8c12_1014_017f +static const pciSubsystemInfo pci_ss_info_5333_8c12_1179_0001 = + {0x1179, 0x0001, pci_subsys_5333_8c12_1179_0001, 0}; +#undef pci_ss_info_1179_0001 +#define pci_ss_info_1179_0001 pci_ss_info_5333_8c12_1179_0001 static const pciSubsystemInfo pci_ss_info_5333_8c13_1179_0001 = {0x1179, 0x0001, pci_subsys_5333_8c13_1179_0001, 0}; #undef pci_ss_info_1179_0001 @@ -30588,10 +37327,10 @@ {0x1092, 0x5a57, pci_subsys_5333_9102_1092_5a57, 0}; #undef pci_ss_info_1092_5a57 #define pci_ss_info_1092_5a57 pci_ss_info_5333_9102_1092_5a57 -static const pciSubsystemInfo pci_ss_info_8086_0008_0008_1000 = - {0x0008, 0x1000, pci_subsys_8086_0008_0008_1000, 0}; -#undef pci_ss_info_0008_1000 -#define pci_ss_info_0008_1000 pci_ss_info_8086_0008_0008_1000 +static const pciSubsystemInfo pci_ss_info_8086_0600_8086_01af = + {0x8086, 0x01af, pci_subsys_8086_0600_8086_01af, 0}; +#undef pci_ss_info_8086_01af +#define pci_ss_info_8086_01af pci_ss_info_8086_0600_8086_01af static const pciSubsystemInfo pci_ss_info_8086_0600_8086_01c1 = {0x8086, 0x01c1, pci_subsys_8086_0600_8086_01c1, 0}; #undef pci_ss_info_8086_01c1 @@ -30740,6 +37479,10 @@ {0x1014, 0x026a, pci_subsys_8086_100e_1014_026a, 0}; #undef pci_ss_info_1014_026a #define pci_ss_info_1014_026a pci_ss_info_8086_100e_1014_026a +static const pciSubsystemInfo pci_ss_info_8086_100e_1024_0134 = + {0x1024, 0x0134, pci_subsys_8086_100e_1024_0134, 0}; +#undef pci_ss_info_1024_0134 +#define pci_ss_info_1024_0134 pci_ss_info_8086_100e_1024_0134 static const pciSubsystemInfo pci_ss_info_8086_100e_1028_002e = {0x1028, 0x002e, pci_subsys_8086_100e_1028_002e, 0}; #undef pci_ss_info_1028_002e @@ -30760,6 +37503,14 @@ {0x8086, 0x002e, pci_subsys_8086_100e_8086_002e, 0}; #undef pci_ss_info_8086_002e #define pci_ss_info_8086_002e pci_ss_info_8086_100e_8086_002e +static const pciSubsystemInfo pci_ss_info_8086_100e_8086_1376 = + {0x8086, 0x1376, pci_subsys_8086_100e_8086_1376, 0}; +#undef pci_ss_info_8086_1376 +#define pci_ss_info_8086_1376 pci_ss_info_8086_100e_8086_1376 +static const pciSubsystemInfo pci_ss_info_8086_100e_8086_1476 = + {0x8086, 0x1476, pci_subsys_8086_100e_8086_1476, 0}; +#undef pci_ss_info_8086_1476 +#define pci_ss_info_8086_1476 pci_ss_info_8086_100e_8086_1476 static const pciSubsystemInfo pci_ss_info_8086_100f_1014_0269 = {0x1014, 0x0269, pci_subsys_8086_100f_1014_0269, 0}; #undef pci_ss_info_1014_0269 @@ -30776,6 +37527,10 @@ {0x8086, 0x1001, pci_subsys_8086_100f_8086_1001, 0}; #undef pci_ss_info_8086_1001 #define pci_ss_info_8086_1001 pci_ss_info_8086_100f_8086_1001 +static const pciSubsystemInfo pci_ss_info_8086_1010_0e11_00db = + {0x0e11, 0x00db, pci_subsys_8086_1010_0e11_00db, 0}; +#undef pci_ss_info_0e11_00db +#define pci_ss_info_0e11_00db pci_ss_info_8086_1010_0e11_00db static const pciSubsystemInfo pci_ss_info_8086_1010_1014_027c = {0x1014, 0x027c, pci_subsys_8086_1010_1014_027c, 0}; #undef pci_ss_info_1014_027c @@ -30784,6 +37539,10 @@ {0x18fb, 0x7872, pci_subsys_8086_1010_18fb_7872, 0}; #undef pci_ss_info_18fb_7872 #define pci_ss_info_18fb_7872 pci_ss_info_8086_1010_18fb_7872 +static const pciSubsystemInfo pci_ss_info_8086_1010_1fc1_0026 = + {0x1fc1, 0x0026, pci_subsys_8086_1010_1fc1_0026, 0}; +#undef pci_ss_info_1fc1_0026 +#define pci_ss_info_1fc1_0026 pci_ss_info_8086_1010_1fc1_0026 static const pciSubsystemInfo pci_ss_info_8086_1010_4c53_1080 = {0x4c53, 0x1080, pci_subsys_8086_1010_4c53_1080, 0}; #undef pci_ss_info_4c53_1080 @@ -30796,6 +37555,10 @@ {0x8086, 0x1011, pci_subsys_8086_1010_8086_1011, 0}; #undef pci_ss_info_8086_1011 #define pci_ss_info_8086_1011 pci_ss_info_8086_1010_8086_1011 +static const pciSubsystemInfo pci_ss_info_8086_1010_8086_1012 = + {0x8086, 0x1012, pci_subsys_8086_1010_8086_1012, 0}; +#undef pci_ss_info_8086_1012 +#define pci_ss_info_8086_1012 pci_ss_info_8086_1010_8086_1012 static const pciSubsystemInfo pci_ss_info_8086_1010_8086_101a = {0x8086, 0x101a, pci_subsys_8086_1010_8086_101a, 0}; #undef pci_ss_info_8086_101a @@ -30816,6 +37579,10 @@ {0x8086, 0x1003, pci_subsys_8086_1011_8086_1003, 0}; #undef pci_ss_info_8086_1003 #define pci_ss_info_8086_1003 pci_ss_info_8086_1011_8086_1003 +static const pciSubsystemInfo pci_ss_info_8086_1012_0e11_00dc = + {0x0e11, 0x00dc, pci_subsys_8086_1012_0e11_00dc, 0}; +#undef pci_ss_info_0e11_00dc +#define pci_ss_info_0e11_00dc pci_ss_info_8086_1012_0e11_00dc static const pciSubsystemInfo pci_ss_info_8086_1012_8086_1012 = {0x8086, 0x1012, pci_subsys_8086_1012_8086_1012, 0}; #undef pci_ss_info_8086_1012 @@ -30856,6 +37623,10 @@ {0x1458, 0x1019, pci_subsys_8086_1019_1458_1019, 0}; #undef pci_ss_info_1458_1019 #define pci_ss_info_1458_1019 pci_ss_info_8086_1019_1458_1019 +static const pciSubsystemInfo pci_ss_info_8086_1019_1458_e000 = + {0x1458, 0xe000, pci_subsys_8086_1019_1458_e000, 0}; +#undef pci_ss_info_1458_e000 +#define pci_ss_info_1458_e000 pci_ss_info_8086_1019_1458_e000 static const pciSubsystemInfo pci_ss_info_8086_1019_8086_1019 = {0x8086, 0x1019, pci_subsys_8086_1019_8086_1019, 0}; #undef pci_ss_info_8086_1019 @@ -30884,6 +37655,10 @@ {0x8086, 0x101e, pci_subsys_8086_101e_8086_101e, 0}; #undef pci_ss_info_8086_101e #define pci_ss_info_8086_101e pci_ss_info_8086_101e_8086_101e +static const pciSubsystemInfo pci_ss_info_8086_1026_1028_0169 = + {0x1028, 0x0169, pci_subsys_8086_1026_1028_0169, 0}; +#undef pci_ss_info_1028_0169 +#define pci_ss_info_1028_0169 pci_ss_info_8086_1026_1028_0169 static const pciSubsystemInfo pci_ss_info_8086_1026_8086_1000 = {0x8086, 0x1000, pci_subsys_8086_1026_8086_1000, 0}; #undef pci_ss_info_8086_1000 @@ -30900,6 +37675,10 @@ {0x8086, 0x1026, pci_subsys_8086_1026_8086_1026, 0}; #undef pci_ss_info_8086_1026 #define pci_ss_info_8086_1026 pci_ss_info_8086_1026_8086_1026 +static const pciSubsystemInfo pci_ss_info_8086_1027_103c_3103 = + {0x103c, 0x3103, pci_subsys_8086_1027_103c_3103, 0}; +#undef pci_ss_info_103c_3103 +#define pci_ss_info_103c_3103 pci_ss_info_8086_1027_103c_3103 static const pciSubsystemInfo pci_ss_info_8086_1027_8086_1001 = {0x8086, 0x1001, pci_subsys_8086_1027_8086_1001, 0}; #undef pci_ss_info_8086_1001 @@ -30952,6 +37731,14 @@ {0x144d, 0xc006, pci_subsys_8086_1031_144d_c006, 0}; #undef pci_ss_info_144d_c006 #define pci_ss_info_144d_c006 pci_ss_info_8086_1031_144d_c006 +static const pciSubsystemInfo pci_ss_info_8086_1031_813c_104d = + {0x813c, 0x104d, pci_subsys_8086_1031_813c_104d, 0}; +#undef pci_ss_info_813c_104d +#define pci_ss_info_813c_104d pci_ss_info_8086_1031_813c_104d +static const pciSubsystemInfo pci_ss_info_8086_1038_0e11_0098 = + {0x0e11, 0x0098, pci_subsys_8086_1038_0e11_0098, 0}; +#undef pci_ss_info_0e11_0098 +#define pci_ss_info_0e11_0098 pci_ss_info_8086_1038_0e11_0098 static const pciSubsystemInfo pci_ss_info_8086_1039_1014_0267 = {0x1014, 0x0267, pci_subsys_8086_1039_1014_0267, 0}; #undef pci_ss_info_1014_0267 @@ -30980,10 +37767,26 @@ {0x1462, 0x758c, pci_subsys_8086_1050_1462_758c, 0}; #undef pci_ss_info_1462_758c #define pci_ss_info_1462_758c pci_ss_info_8086_1050_1462_758c +static const pciSubsystemInfo pci_ss_info_8086_1050_8086_3020 = + {0x8086, 0x3020, pci_subsys_8086_1050_8086_3020, 0}; +#undef pci_ss_info_8086_3020 +#define pci_ss_info_8086_3020 pci_ss_info_8086_1050_8086_3020 +static const pciSubsystemInfo pci_ss_info_8086_1050_8086_302f = + {0x8086, 0x302f, pci_subsys_8086_1050_8086_302f, 0}; +#undef pci_ss_info_8086_302f +#define pci_ss_info_8086_302f pci_ss_info_8086_1050_8086_302f static const pciSubsystemInfo pci_ss_info_8086_1050_8086_3427 = {0x8086, 0x3427, pci_subsys_8086_1050_8086_3427, 0}; #undef pci_ss_info_8086_3427 #define pci_ss_info_8086_3427 pci_ss_info_8086_1050_8086_3427 +static const pciSubsystemInfo pci_ss_info_8086_105e_1775_6003 = + {0x1775, 0x6003, pci_subsys_8086_105e_1775_6003, 0}; +#undef pci_ss_info_1775_6003 +#define pci_ss_info_1775_6003 pci_ss_info_8086_105e_1775_6003 +static const pciSubsystemInfo pci_ss_info_8086_1064_1043_80f8 = + {0x1043, 0x80f8, pci_subsys_8086_1064_1043_80f8, 0}; +#undef pci_ss_info_1043_80f8 +#define pci_ss_info_1043_80f8 pci_ss_info_8086_1064_1043_80f8 static const pciSubsystemInfo pci_ss_info_8086_1075_1028_0165 = {0x1028, 0x0165, pci_subsys_8086_1075_1028_0165, 0}; #undef pci_ss_info_1028_0165 @@ -31000,6 +37803,10 @@ {0x1028, 0x0165, pci_subsys_8086_1076_1028_0165, 0}; #undef pci_ss_info_1028_0165 #define pci_ss_info_1028_0165 pci_ss_info_8086_1076_1028_0165 +static const pciSubsystemInfo pci_ss_info_8086_1076_1028_019a = + {0x1028, 0x019a, pci_subsys_8086_1076_1028_019a, 0}; +#undef pci_ss_info_1028_019a +#define pci_ss_info_1028_019a pci_ss_info_8086_1076_1028_019a static const pciSubsystemInfo pci_ss_info_8086_1076_8086_0076 = {0x8086, 0x0076, pci_subsys_8086_1076_8086_0076, 0}; #undef pci_ss_info_8086_0076 @@ -31040,6 +37847,10 @@ {0x103c, 0x12cf, pci_subsys_8086_1079_103c_12cf, 0}; #undef pci_ss_info_103c_12cf #define pci_ss_info_103c_12cf pci_ss_info_8086_1079_103c_12cf +static const pciSubsystemInfo pci_ss_info_8086_1079_1fc1_0027 = + {0x1fc1, 0x0027, pci_subsys_8086_1079_1fc1_0027, 0}; +#undef pci_ss_info_1fc1_0027 +#define pci_ss_info_1fc1_0027 pci_ss_info_8086_1079_1fc1_0027 static const pciSubsystemInfo pci_ss_info_8086_1079_4c53_1090 = {0x4c53, 0x1090, pci_subsys_8086_1079_4c53_1090, 0}; #undef pci_ss_info_4c53_1090 @@ -31116,6 +37927,10 @@ {0x8086, 0x4532, pci_subsys_8086_1132_8086_4532, 0}; #undef pci_ss_info_8086_4532 #define pci_ss_info_8086_4532 pci_ss_info_8086_1132_8086_4532 +static const pciSubsystemInfo pci_ss_info_8086_1132_8086_4541 = + {0x8086, 0x4541, pci_subsys_8086_1132_8086_4541, 0}; +#undef pci_ss_info_8086_4541 +#define pci_ss_info_8086_4541 pci_ss_info_8086_1132_8086_4541 static const pciSubsystemInfo pci_ss_info_8086_1132_8086_4557 = {0x8086, 0x4557, pci_subsys_8086_1132_8086_4557, 0}; #undef pci_ss_info_8086_4557 @@ -31352,6 +38167,10 @@ {0x103c, 0x1200, pci_subsys_8086_1229_103c_1200, 0}; #undef pci_ss_info_103c_1200 #define pci_ss_info_103c_1200 pci_ss_info_8086_1229_103c_1200 +static const pciSubsystemInfo pci_ss_info_8086_1229_108e_10cf = + {0x108e, 0x10cf, pci_subsys_8086_1229_108e_10cf, 0}; +#undef pci_ss_info_108e_10cf +#define pci_ss_info_108e_10cf pci_ss_info_8086_1229_108e_10cf static const pciSubsystemInfo pci_ss_info_8086_1229_10c3_1100 = {0x10c3, 0x1100, pci_subsys_8086_1229_10c3_1100, 0}; #undef pci_ss_info_10c3_1100 @@ -31364,6 +38183,10 @@ {0x10cf, 0x1143, pci_subsys_8086_1229_10cf_1143, 0}; #undef pci_ss_info_10cf_1143 #define pci_ss_info_10cf_1143 pci_ss_info_8086_1229_10cf_1143 +static const pciSubsystemInfo pci_ss_info_8086_1229_110a_008b = + {0x110a, 0x008b, pci_subsys_8086_1229_110a_008b, 0}; +#undef pci_ss_info_110a_008b +#define pci_ss_info_110a_008b pci_ss_info_8086_1229_110a_008b static const pciSubsystemInfo pci_ss_info_8086_1229_1179_0001 = {0x1179, 0x0001, pci_subsys_8086_1229_1179_0001, 0}; #undef pci_ss_info_1179_0001 @@ -31408,6 +38231,10 @@ {0x4c53, 0x1080, pci_subsys_8086_1229_4c53_1080, 0}; #undef pci_ss_info_4c53_1080 #define pci_ss_info_4c53_1080 pci_ss_info_8086_1229_4c53_1080 +static const pciSubsystemInfo pci_ss_info_8086_1229_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_1229_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_1229_4c53_10e0 static const pciSubsystemInfo pci_ss_info_8086_1229_8086_0001 = {0x8086, 0x0001, pci_subsys_8086_1229_8086_0001, 0}; #undef pci_ss_info_8086_0001 @@ -31440,10 +38267,6 @@ {0x8086, 0x0008, pci_subsys_8086_1229_8086_0008, 0}; #undef pci_ss_info_8086_0008 #define pci_ss_info_8086_0008 pci_ss_info_8086_1229_8086_0008 -static const pciSubsystemInfo pci_ss_info_8086_1229_8086_0009 = - {0x8086, 0x0009, pci_subsys_8086_1229_8086_0009, 0}; -#undef pci_ss_info_8086_0009 -#define pci_ss_info_8086_0009 pci_ss_info_8086_1229_8086_0009 static const pciSubsystemInfo pci_ss_info_8086_1229_8086_000a = {0x8086, 0x000a, pci_subsys_8086_1229_8086_000a, 0}; #undef pci_ss_info_8086_000a @@ -31872,6 +38695,10 @@ {0x1028, 0x0095, pci_subsys_8086_2415_1028_0095, 0}; #undef pci_ss_info_1028_0095 #define pci_ss_info_1028_0095 pci_ss_info_8086_2415_1028_0095 +static const pciSubsystemInfo pci_ss_info_8086_2415_110a_0051 = + {0x110a, 0x0051, pci_subsys_8086_2415_110a_0051, 0}; +#undef pci_ss_info_110a_0051 +#define pci_ss_info_110a_0051 pci_ss_info_8086_2415_110a_0051 static const pciSubsystemInfo pci_ss_info_8086_2415_11d4_0040 = {0x11d4, 0x0040, pci_subsys_8086_2415_11d4_0040, 0}; #undef pci_ss_info_11d4_0040 @@ -31884,6 +38711,10 @@ {0x11d4, 0x5340, pci_subsys_8086_2415_11d4_5340, 0}; #undef pci_ss_info_11d4_5340 #define pci_ss_info_11d4_5340 pci_ss_info_8086_2415_11d4_5340 +static const pciSubsystemInfo pci_ss_info_8086_2415_1734_1025 = + {0x1734, 0x1025, pci_subsys_8086_2415_1734_1025, 0}; +#undef pci_ss_info_1734_1025 +#define pci_ss_info_1734_1025 pci_ss_info_8086_2415_1734_1025 static const pciSubsystemInfo pci_ss_info_8086_2425_11d4_0040 = {0x11d4, 0x0040, pci_subsys_8086_2425_11d4_0040, 0}; #undef pci_ss_info_11d4_0040 @@ -32012,6 +38843,14 @@ {0x104d, 0x80df, pci_subsys_8086_2446_104d_80df, 0}; #undef pci_ss_info_104d_80df #define pci_ss_info_104d_80df pci_ss_info_8086_2446_104d_80df +static const pciSubsystemInfo pci_ss_info_8086_2448_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_2448_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_2448_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_2448_1734_1055 = + {0x1734, 0x1055, pci_subsys_8086_2448_1734_1055, 0}; +#undef pci_ss_info_1734_1055 +#define pci_ss_info_1734_1055 pci_ss_info_8086_2448_1734_1055 static const pciSubsystemInfo pci_ss_info_8086_2449_0e11_0012 = {0x0e11, 0x0012, pci_subsys_8086_2449_0e11_0012, 0}; #undef pci_ss_info_0e11_0012 @@ -32168,6 +39007,10 @@ {0x1014, 0x0267, pci_subsys_8086_244e_1014_0267, 0}; #undef pci_ss_info_1014_0267 #define pci_ss_info_1014_0267 pci_ss_info_8086_244e_1014_0267 +static const pciSubsystemInfo pci_ss_info_8086_2482_0e11_0030 = + {0x0e11, 0x0030, pci_subsys_8086_2482_0e11_0030, 0}; +#undef pci_ss_info_0e11_0030 +#define pci_ss_info_0e11_0030 pci_ss_info_8086_2482_0e11_0030 static const pciSubsystemInfo pci_ss_info_8086_2482_1014_0220 = {0x1014, 0x0220, pci_subsys_8086_2482_1014_0220, 0}; #undef pci_ss_info_1014_0220 @@ -32208,6 +39051,10 @@ {0x8086, 0x1958, pci_subsys_8086_2483_8086_1958, 0}; #undef pci_ss_info_8086_1958 #define pci_ss_info_8086_1958 pci_ss_info_8086_2483_8086_1958 +static const pciSubsystemInfo pci_ss_info_8086_2484_0e11_0030 = + {0x0e11, 0x0030, pci_subsys_8086_2484_0e11_0030, 0}; +#undef pci_ss_info_0e11_0030 +#define pci_ss_info_0e11_0030 pci_ss_info_8086_2484_0e11_0030 static const pciSubsystemInfo pci_ss_info_8086_2484_1014_0220 = {0x1014, 0x0220, pci_subsys_8086_2484_1014_0220, 0}; #undef pci_ss_info_1014_0220 @@ -32268,10 +39115,6 @@ {0x104d, 0x80e7, pci_subsys_8086_2486_104d_80e7, 0}; #undef pci_ss_info_104d_80e7 #define pci_ss_info_104d_80e7 pci_ss_info_8086_2486_104d_80e7 -static const pciSubsystemInfo pci_ss_info_8086_2486_1179_0001 = - {0x1179, 0x0001, pci_subsys_8086_2486_1179_0001, 0}; -#undef pci_ss_info_1179_0001 -#define pci_ss_info_1179_0001 pci_ss_info_8086_2486_1179_0001 static const pciSubsystemInfo pci_ss_info_8086_2486_134d_4c21 = {0x134d, 0x4c21, pci_subsys_8086_2486_134d_4c21, 0}; #undef pci_ss_info_134d_4c21 @@ -32284,6 +39127,10 @@ {0x14f1, 0x5421, pci_subsys_8086_2486_14f1_5421, 0}; #undef pci_ss_info_14f1_5421 #define pci_ss_info_14f1_5421 pci_ss_info_8086_2486_14f1_5421 +static const pciSubsystemInfo pci_ss_info_8086_2487_0e11_0030 = + {0x0e11, 0x0030, pci_subsys_8086_2487_0e11_0030, 0}; +#undef pci_ss_info_0e11_0030 +#define pci_ss_info_0e11_0030 pci_ss_info_8086_2487_0e11_0030 static const pciSubsystemInfo pci_ss_info_8086_2487_1014_0220 = {0x1014, 0x0220, pci_subsys_8086_2487_1014_0220, 0}; #undef pci_ss_info_1014_0220 @@ -32300,6 +39147,10 @@ {0x8086, 0x1958, pci_subsys_8086_2487_8086_1958, 0}; #undef pci_ss_info_8086_1958 #define pci_ss_info_8086_1958 pci_ss_info_8086_2487_8086_1958 +static const pciSubsystemInfo pci_ss_info_8086_248a_0e11_0030 = + {0x0e11, 0x0030, pci_subsys_8086_248a_0e11_0030, 0}; +#undef pci_ss_info_0e11_0030 +#define pci_ss_info_0e11_0030 pci_ss_info_8086_248a_0e11_0030 static const pciSubsystemInfo pci_ss_info_8086_248a_1014_0220 = {0x1014, 0x0220, pci_subsys_8086_248a_1014_0220, 0}; #undef pci_ss_info_1014_0220 @@ -32344,6 +39195,14 @@ {0x1028, 0x0163, pci_subsys_8086_24c2_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_24c2_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_24c2_1028_0196 = + {0x1028, 0x0196, pci_subsys_8086_24c2_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_8086_24c2_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_24c2_103c_088c = + {0x103c, 0x088c, pci_subsys_8086_24c2_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_8086_24c2_103c_088c static const pciSubsystemInfo pci_ss_info_8086_24c2_103c_0890 = {0x103c, 0x0890, pci_subsys_8086_24c2_103c_0890, 0}; #undef pci_ss_info_103c_0890 @@ -32360,10 +39219,18 @@ {0x1509, 0x2990, pci_subsys_8086_24c2_1509_2990, 0}; #undef pci_ss_info_1509_2990 #define pci_ss_info_1509_2990 pci_ss_info_8086_24c2_1509_2990 +static const pciSubsystemInfo pci_ss_info_8086_24c2_1734_1055 = + {0x1734, 0x1055, pci_subsys_8086_24c2_1734_1055, 0}; +#undef pci_ss_info_1734_1055 +#define pci_ss_info_1734_1055 pci_ss_info_8086_24c2_1734_1055 static const pciSubsystemInfo pci_ss_info_8086_24c2_4c53_1090 = {0x4c53, 0x1090, pci_subsys_8086_24c2_4c53_1090, 0}; #undef pci_ss_info_4c53_1090 #define pci_ss_info_4c53_1090 pci_ss_info_8086_24c2_4c53_1090 +static const pciSubsystemInfo pci_ss_info_8086_24c2_8086_4541 = + {0x8086, 0x4541, pci_subsys_8086_24c2_8086_4541, 0}; +#undef pci_ss_info_8086_4541 +#define pci_ss_info_8086_4541 pci_ss_info_8086_24c2_8086_4541 static const pciSubsystemInfo pci_ss_info_8086_24c3_1014_0267 = {0x1014, 0x0267, pci_subsys_8086_24c3_1014_0267, 0}; #undef pci_ss_info_1014_0267 @@ -32376,6 +39243,10 @@ {0x1028, 0x0126, pci_subsys_8086_24c3_1028_0126, 0}; #undef pci_ss_info_1028_0126 #define pci_ss_info_1028_0126 pci_ss_info_8086_24c3_1028_0126 +static const pciSubsystemInfo pci_ss_info_8086_24c3_103c_088c = + {0x103c, 0x088c, pci_subsys_8086_24c3_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_8086_24c3_103c_088c static const pciSubsystemInfo pci_ss_info_8086_24c3_103c_0890 = {0x103c, 0x0890, pci_subsys_8086_24c3_103c_0890, 0}; #undef pci_ss_info_103c_0890 @@ -32392,6 +39263,10 @@ {0x1462, 0x5800, pci_subsys_8086_24c3_1462_5800, 0}; #undef pci_ss_info_1462_5800 #define pci_ss_info_1462_5800 pci_ss_info_8086_24c3_1462_5800 +static const pciSubsystemInfo pci_ss_info_8086_24c3_1734_1055 = + {0x1734, 0x1055, pci_subsys_8086_24c3_1734_1055, 0}; +#undef pci_ss_info_1734_1055 +#define pci_ss_info_1734_1055 pci_ss_info_8086_24c3_1734_1055 static const pciSubsystemInfo pci_ss_info_8086_24c3_4c53_1090 = {0x4c53, 0x1090, pci_subsys_8086_24c3_4c53_1090, 0}; #undef pci_ss_info_4c53_1090 @@ -32412,6 +39287,14 @@ {0x1028, 0x0163, pci_subsys_8086_24c4_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_24c4_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_24c4_1028_0196 = + {0x1028, 0x0196, pci_subsys_8086_24c4_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_8086_24c4_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_24c4_103c_088c = + {0x103c, 0x088c, pci_subsys_8086_24c4_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_8086_24c4_103c_088c static const pciSubsystemInfo pci_ss_info_8086_24c4_103c_0890 = {0x103c, 0x0890, pci_subsys_8086_24c4_103c_0890, 0}; #undef pci_ss_info_103c_0890 @@ -32432,6 +39315,10 @@ {0x4c53, 0x1090, pci_subsys_8086_24c4_4c53_1090, 0}; #undef pci_ss_info_4c53_1090 #define pci_ss_info_4c53_1090 pci_ss_info_8086_24c4_4c53_1090 +static const pciSubsystemInfo pci_ss_info_8086_24c4_8086_4541 = + {0x8086, 0x4541, pci_subsys_8086_24c4_8086_4541, 0}; +#undef pci_ss_info_8086_4541 +#define pci_ss_info_8086_4541 pci_ss_info_8086_24c4_8086_4541 static const pciSubsystemInfo pci_ss_info_8086_24c5_0e11_00b8 = {0x0e11, 0x00b8, pci_subsys_8086_24c5_0e11_00b8, 0}; #undef pci_ss_info_0e11_00b8 @@ -32444,10 +39331,22 @@ {0x1025, 0x005a, pci_subsys_8086_24c5_1025_005a, 0}; #undef pci_ss_info_1025_005a #define pci_ss_info_1025_005a pci_ss_info_8086_24c5_1025_005a +static const pciSubsystemInfo pci_ss_info_8086_24c5_1028_0139 = + {0x1028, 0x0139, pci_subsys_8086_24c5_1028_0139, 0}; +#undef pci_ss_info_1028_0139 +#define pci_ss_info_1028_0139 pci_ss_info_8086_24c5_1028_0139 static const pciSubsystemInfo pci_ss_info_8086_24c5_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_24c5_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_24c5_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_24c5_1028_0196 = + {0x1028, 0x0196, pci_subsys_8086_24c5_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_8086_24c5_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_24c5_103c_088c = + {0x103c, 0x088c, pci_subsys_8086_24c5_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_8086_24c5_103c_088c static const pciSubsystemInfo pci_ss_info_8086_24c5_103c_0890 = {0x103c, 0x0890, pci_subsys_8086_24c5_103c_0890, 0}; #undef pci_ss_info_103c_0890 @@ -32464,10 +39363,26 @@ {0x1462, 0x5800, pci_subsys_8086_24c5_1462_5800, 0}; #undef pci_ss_info_1462_5800 #define pci_ss_info_1462_5800 pci_ss_info_8086_24c5_1462_5800 +static const pciSubsystemInfo pci_ss_info_8086_24c5_1734_1055 = + {0x1734, 0x1055, pci_subsys_8086_24c5_1734_1055, 0}; +#undef pci_ss_info_1734_1055 +#define pci_ss_info_1734_1055 pci_ss_info_8086_24c5_1734_1055 +static const pciSubsystemInfo pci_ss_info_8086_24c6_003c_1025 = + {0x003c, 0x1025, pci_subsys_8086_24c6_003c_1025, 0}; +#undef pci_ss_info_003c_1025 +#define pci_ss_info_003c_1025 pci_ss_info_8086_24c6_003c_1025 static const pciSubsystemInfo pci_ss_info_8086_24c6_1025_005a = {0x1025, 0x005a, pci_subsys_8086_24c6_1025_005a, 0}; #undef pci_ss_info_1025_005a #define pci_ss_info_1025_005a pci_ss_info_8086_24c6_1025_005a +static const pciSubsystemInfo pci_ss_info_8086_24c6_1028_0196 = + {0x1028, 0x0196, pci_subsys_8086_24c6_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_8086_24c6_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_24c6_103c_088c = + {0x103c, 0x088c, pci_subsys_8086_24c6_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_8086_24c6_103c_088c static const pciSubsystemInfo pci_ss_info_8086_24c6_103c_0890 = {0x103c, 0x0890, pci_subsys_8086_24c6_103c_0890, 0}; #undef pci_ss_info_103c_0890 @@ -32492,6 +39407,14 @@ {0x1028, 0x0163, pci_subsys_8086_24c7_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_24c7_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_24c7_1028_0196 = + {0x1028, 0x0196, pci_subsys_8086_24c7_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_8086_24c7_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_24c7_103c_088c = + {0x103c, 0x088c, pci_subsys_8086_24c7_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_8086_24c7_103c_088c static const pciSubsystemInfo pci_ss_info_8086_24c7_103c_0890 = {0x103c, 0x0890, pci_subsys_8086_24c7_103c_0890, 0}; #undef pci_ss_info_103c_0890 @@ -32512,6 +39435,10 @@ {0x4c53, 0x1090, pci_subsys_8086_24c7_4c53_1090, 0}; #undef pci_ss_info_4c53_1090 #define pci_ss_info_4c53_1090 pci_ss_info_8086_24c7_4c53_1090 +static const pciSubsystemInfo pci_ss_info_8086_24c7_8086_4541 = + {0x8086, 0x4541, pci_subsys_8086_24c7_8086_4541, 0}; +#undef pci_ss_info_8086_4541 +#define pci_ss_info_8086_4541 pci_ss_info_8086_24c7_8086_4541 static const pciSubsystemInfo pci_ss_info_8086_24ca_1025_005a = {0x1025, 0x005a, pci_subsys_8086_24ca_1025_005a, 0}; #undef pci_ss_info_1025_005a @@ -32520,6 +39447,14 @@ {0x1028, 0x0163, pci_subsys_8086_24ca_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_24ca_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_24ca_1028_0196 = + {0x1028, 0x0196, pci_subsys_8086_24ca_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_8086_24ca_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_24ca_103c_088c = + {0x103c, 0x088c, pci_subsys_8086_24ca_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_8086_24ca_103c_088c static const pciSubsystemInfo pci_ss_info_8086_24ca_103c_0890 = {0x103c, 0x0890, pci_subsys_8086_24ca_103c_0890, 0}; #undef pci_ss_info_103c_0890 @@ -32528,6 +39463,14 @@ {0x1071, 0x8160, pci_subsys_8086_24ca_1071_8160, 0}; #undef pci_ss_info_1071_8160 #define pci_ss_info_1071_8160 pci_ss_info_8086_24ca_1071_8160 +static const pciSubsystemInfo pci_ss_info_8086_24ca_1734_1055 = + {0x1734, 0x1055, pci_subsys_8086_24ca_1734_1055, 0}; +#undef pci_ss_info_1734_1055 +#define pci_ss_info_1734_1055 pci_ss_info_8086_24ca_1734_1055 +static const pciSubsystemInfo pci_ss_info_8086_24ca_8086_4541 = + {0x8086, 0x4541, pci_subsys_8086_24ca_8086_4541, 0}; +#undef pci_ss_info_8086_4541 +#define pci_ss_info_8086_4541 pci_ss_info_8086_24ca_8086_4541 static const pciSubsystemInfo pci_ss_info_8086_24cb_1014_0267 = {0x1014, 0x0267, pci_subsys_8086_24cb_1014_0267, 0}; #undef pci_ss_info_1014_0267 @@ -32548,6 +39491,10 @@ {0x4c53, 0x1090, pci_subsys_8086_24cb_4c53_1090, 0}; #undef pci_ss_info_4c53_1090 #define pci_ss_info_4c53_1090 pci_ss_info_8086_24cb_4c53_1090 +static const pciSubsystemInfo pci_ss_info_8086_24cc_1734_1055 = + {0x1734, 0x1055, pci_subsys_8086_24cc_1734_1055, 0}; +#undef pci_ss_info_1734_1055 +#define pci_ss_info_1734_1055 pci_ss_info_8086_24cc_1734_1055 static const pciSubsystemInfo pci_ss_info_8086_24cd_1014_0267 = {0x1014, 0x0267, pci_subsys_8086_24cd_1014_0267, 0}; #undef pci_ss_info_1014_0267 @@ -32556,14 +39503,30 @@ {0x1025, 0x005a, pci_subsys_8086_24cd_1025_005a, 0}; #undef pci_ss_info_1025_005a #define pci_ss_info_1025_005a pci_ss_info_8086_24cd_1025_005a +static const pciSubsystemInfo pci_ss_info_8086_24cd_1028_011d = + {0x1028, 0x011d, pci_subsys_8086_24cd_1028_011d, 0}; +#undef pci_ss_info_1028_011d +#define pci_ss_info_1028_011d pci_ss_info_8086_24cd_1028_011d static const pciSubsystemInfo pci_ss_info_8086_24cd_1028_0126 = {0x1028, 0x0126, pci_subsys_8086_24cd_1028_0126, 0}; #undef pci_ss_info_1028_0126 #define pci_ss_info_1028_0126 pci_ss_info_8086_24cd_1028_0126 +static const pciSubsystemInfo pci_ss_info_8086_24cd_1028_0139 = + {0x1028, 0x0139, pci_subsys_8086_24cd_1028_0139, 0}; +#undef pci_ss_info_1028_0139 +#define pci_ss_info_1028_0139 pci_ss_info_8086_24cd_1028_0139 static const pciSubsystemInfo pci_ss_info_8086_24cd_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_24cd_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_24cd_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_24cd_1028_0196 = + {0x1028, 0x0196, pci_subsys_8086_24cd_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_8086_24cd_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_24cd_103c_088c = + {0x103c, 0x088c, pci_subsys_8086_24cd_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_8086_24cd_103c_088c static const pciSubsystemInfo pci_ss_info_8086_24cd_103c_0890 = {0x103c, 0x0890, pci_subsys_8086_24cd_103c_0890, 0}; #undef pci_ss_info_103c_0890 @@ -32580,14 +39543,30 @@ {0x1509, 0x1968, pci_subsys_8086_24cd_1509_1968, 0}; #undef pci_ss_info_1509_1968 #define pci_ss_info_1509_1968 pci_ss_info_8086_24cd_1509_1968 +static const pciSubsystemInfo pci_ss_info_8086_24cd_1734_1055 = + {0x1734, 0x1055, pci_subsys_8086_24cd_1734_1055, 0}; +#undef pci_ss_info_1734_1055 +#define pci_ss_info_1734_1055 pci_ss_info_8086_24cd_1734_1055 static const pciSubsystemInfo pci_ss_info_8086_24cd_4c53_1090 = {0x4c53, 0x1090, pci_subsys_8086_24cd_4c53_1090, 0}; #undef pci_ss_info_4c53_1090 #define pci_ss_info_4c53_1090 pci_ss_info_8086_24cd_4c53_1090 +static const pciSubsystemInfo pci_ss_info_8086_24d1_1028_0169 = + {0x1028, 0x0169, pci_subsys_8086_24d1_1028_0169, 0}; +#undef pci_ss_info_1028_0169 +#define pci_ss_info_1028_0169 pci_ss_info_8086_24d1_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_24d1_1028_019a = + {0x1028, 0x019a, pci_subsys_8086_24d1_1028_019a, 0}; +#undef pci_ss_info_1028_019a +#define pci_ss_info_1028_019a pci_ss_info_8086_24d1_1028_019a static const pciSubsystemInfo pci_ss_info_8086_24d1_103c_12bc = {0x103c, 0x12bc, pci_subsys_8086_24d1_103c_12bc, 0}; #undef pci_ss_info_103c_12bc #define pci_ss_info_103c_12bc pci_ss_info_8086_24d1_103c_12bc +static const pciSubsystemInfo pci_ss_info_8086_24d1_1043_80a6 = + {0x1043, 0x80a6, pci_subsys_8086_24d1_1043_80a6, 0}; +#undef pci_ss_info_1043_80a6 +#define pci_ss_info_1043_80a6 pci_ss_info_8086_24d1_1043_80a6 static const pciSubsystemInfo pci_ss_info_8086_24d1_1458_24d1 = {0x1458, 0x24d1, pci_subsys_8086_24d1_1458_24d1, 0}; #undef pci_ss_info_1458_24d1 @@ -32596,14 +39575,42 @@ {0x1462, 0x7280, pci_subsys_8086_24d1_1462_7280, 0}; #undef pci_ss_info_1462_7280 #define pci_ss_info_1462_7280 pci_ss_info_8086_24d1_1462_7280 +static const pciSubsystemInfo pci_ss_info_8086_24d1_15d9_4580 = + {0x15d9, 0x4580, pci_subsys_8086_24d1_15d9_4580, 0}; +#undef pci_ss_info_15d9_4580 +#define pci_ss_info_15d9_4580 pci_ss_info_8086_24d1_15d9_4580 static const pciSubsystemInfo pci_ss_info_8086_24d1_8086_3427 = {0x8086, 0x3427, pci_subsys_8086_24d1_8086_3427, 0}; #undef pci_ss_info_8086_3427 #define pci_ss_info_8086_3427 pci_ss_info_8086_24d1_8086_3427 +static const pciSubsystemInfo pci_ss_info_8086_24d1_8086_4246 = + {0x8086, 0x4246, pci_subsys_8086_24d1_8086_4246, 0}; +#undef pci_ss_info_8086_4246 +#define pci_ss_info_8086_4246 pci_ss_info_8086_24d1_8086_4246 static const pciSubsystemInfo pci_ss_info_8086_24d1_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24d1_8086_524c, 0}; #undef pci_ss_info_8086_524c #define pci_ss_info_8086_524c pci_ss_info_8086_24d1_8086_524c +static const pciSubsystemInfo pci_ss_info_8086_24d2_1014_02ed = + {0x1014, 0x02ed, pci_subsys_8086_24d2_1014_02ed, 0}; +#undef pci_ss_info_1014_02ed +#define pci_ss_info_1014_02ed pci_ss_info_8086_24d2_1014_02ed +static const pciSubsystemInfo pci_ss_info_8086_24d2_1028_0169 = + {0x1028, 0x0169, pci_subsys_8086_24d2_1028_0169, 0}; +#undef pci_ss_info_1028_0169 +#define pci_ss_info_1028_0169 pci_ss_info_8086_24d2_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_24d2_1028_0183 = + {0x1028, 0x0183, pci_subsys_8086_24d2_1028_0183, 0}; +#undef pci_ss_info_1028_0183 +#define pci_ss_info_1028_0183 pci_ss_info_8086_24d2_1028_0183 +static const pciSubsystemInfo pci_ss_info_8086_24d2_1028_019a = + {0x1028, 0x019a, pci_subsys_8086_24d2_1028_019a, 0}; +#undef pci_ss_info_1028_019a +#define pci_ss_info_1028_019a pci_ss_info_8086_24d2_1028_019a +static const pciSubsystemInfo pci_ss_info_8086_24d2_103c_006a = + {0x103c, 0x006a, pci_subsys_8086_24d2_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_8086_24d2_103c_006a static const pciSubsystemInfo pci_ss_info_8086_24d2_103c_12bc = {0x103c, 0x12bc, pci_subsys_8086_24d2_103c_12bc, 0}; #undef pci_ss_info_103c_12bc @@ -32620,14 +39627,38 @@ {0x1462, 0x7280, pci_subsys_8086_24d2_1462_7280, 0}; #undef pci_ss_info_1462_7280 #define pci_ss_info_1462_7280 pci_ss_info_8086_24d2_1462_7280 +static const pciSubsystemInfo pci_ss_info_8086_24d2_15d9_4580 = + {0x15d9, 0x4580, pci_subsys_8086_24d2_15d9_4580, 0}; +#undef pci_ss_info_15d9_4580 +#define pci_ss_info_15d9_4580 pci_ss_info_8086_24d2_15d9_4580 +static const pciSubsystemInfo pci_ss_info_8086_24d2_1734_101c = + {0x1734, 0x101c, pci_subsys_8086_24d2_1734_101c, 0}; +#undef pci_ss_info_1734_101c +#define pci_ss_info_1734_101c pci_ss_info_8086_24d2_1734_101c static const pciSubsystemInfo pci_ss_info_8086_24d2_8086_3427 = {0x8086, 0x3427, pci_subsys_8086_24d2_8086_3427, 0}; #undef pci_ss_info_8086_3427 #define pci_ss_info_8086_3427 pci_ss_info_8086_24d2_8086_3427 +static const pciSubsystemInfo pci_ss_info_8086_24d2_8086_4246 = + {0x8086, 0x4246, pci_subsys_8086_24d2_8086_4246, 0}; +#undef pci_ss_info_8086_4246 +#define pci_ss_info_8086_4246 pci_ss_info_8086_24d2_8086_4246 static const pciSubsystemInfo pci_ss_info_8086_24d2_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24d2_8086_524c, 0}; #undef pci_ss_info_8086_524c #define pci_ss_info_8086_524c pci_ss_info_8086_24d2_8086_524c +static const pciSubsystemInfo pci_ss_info_8086_24d3_1014_02ed = + {0x1014, 0x02ed, pci_subsys_8086_24d3_1014_02ed, 0}; +#undef pci_ss_info_1014_02ed +#define pci_ss_info_1014_02ed pci_ss_info_8086_24d3_1014_02ed +static const pciSubsystemInfo pci_ss_info_8086_24d3_1028_0156 = + {0x1028, 0x0156, pci_subsys_8086_24d3_1028_0156, 0}; +#undef pci_ss_info_1028_0156 +#define pci_ss_info_1028_0156 pci_ss_info_8086_24d3_1028_0156 +static const pciSubsystemInfo pci_ss_info_8086_24d3_1028_0169 = + {0x1028, 0x0169, pci_subsys_8086_24d3_1028_0169, 0}; +#undef pci_ss_info_1028_0169 +#define pci_ss_info_1028_0169 pci_ss_info_8086_24d3_1028_0169 static const pciSubsystemInfo pci_ss_info_8086_24d3_1043_80a6 = {0x1043, 0x80a6, pci_subsys_8086_24d3_1043_80a6, 0}; #undef pci_ss_info_1043_80a6 @@ -32640,14 +39671,46 @@ {0x1462, 0x7280, pci_subsys_8086_24d3_1462_7280, 0}; #undef pci_ss_info_1462_7280 #define pci_ss_info_1462_7280 pci_ss_info_8086_24d3_1462_7280 +static const pciSubsystemInfo pci_ss_info_8086_24d3_15d9_4580 = + {0x15d9, 0x4580, pci_subsys_8086_24d3_15d9_4580, 0}; +#undef pci_ss_info_15d9_4580 +#define pci_ss_info_15d9_4580 pci_ss_info_8086_24d3_15d9_4580 +static const pciSubsystemInfo pci_ss_info_8086_24d3_1734_101c = + {0x1734, 0x101c, pci_subsys_8086_24d3_1734_101c, 0}; +#undef pci_ss_info_1734_101c +#define pci_ss_info_1734_101c pci_ss_info_8086_24d3_1734_101c static const pciSubsystemInfo pci_ss_info_8086_24d3_8086_3427 = {0x8086, 0x3427, pci_subsys_8086_24d3_8086_3427, 0}; #undef pci_ss_info_8086_3427 #define pci_ss_info_8086_3427 pci_ss_info_8086_24d3_8086_3427 +static const pciSubsystemInfo pci_ss_info_8086_24d3_8086_4246 = + {0x8086, 0x4246, pci_subsys_8086_24d3_8086_4246, 0}; +#undef pci_ss_info_8086_4246 +#define pci_ss_info_8086_4246 pci_ss_info_8086_24d3_8086_4246 static const pciSubsystemInfo pci_ss_info_8086_24d3_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24d3_8086_524c, 0}; #undef pci_ss_info_8086_524c #define pci_ss_info_8086_524c pci_ss_info_8086_24d3_8086_524c +static const pciSubsystemInfo pci_ss_info_8086_24d4_1014_02ed = + {0x1014, 0x02ed, pci_subsys_8086_24d4_1014_02ed, 0}; +#undef pci_ss_info_1014_02ed +#define pci_ss_info_1014_02ed pci_ss_info_8086_24d4_1014_02ed +static const pciSubsystemInfo pci_ss_info_8086_24d4_1028_0169 = + {0x1028, 0x0169, pci_subsys_8086_24d4_1028_0169, 0}; +#undef pci_ss_info_1028_0169 +#define pci_ss_info_1028_0169 pci_ss_info_8086_24d4_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_24d4_1028_0183 = + {0x1028, 0x0183, pci_subsys_8086_24d4_1028_0183, 0}; +#undef pci_ss_info_1028_0183 +#define pci_ss_info_1028_0183 pci_ss_info_8086_24d4_1028_0183 +static const pciSubsystemInfo pci_ss_info_8086_24d4_1028_019a = + {0x1028, 0x019a, pci_subsys_8086_24d4_1028_019a, 0}; +#undef pci_ss_info_1028_019a +#define pci_ss_info_1028_019a pci_ss_info_8086_24d4_1028_019a +static const pciSubsystemInfo pci_ss_info_8086_24d4_103c_006a = + {0x103c, 0x006a, pci_subsys_8086_24d4_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_8086_24d4_103c_006a static const pciSubsystemInfo pci_ss_info_8086_24d4_103c_12bc = {0x103c, 0x12bc, pci_subsys_8086_24d4_103c_12bc, 0}; #undef pci_ss_info_103c_12bc @@ -32664,26 +39727,50 @@ {0x1462, 0x7280, pci_subsys_8086_24d4_1462_7280, 0}; #undef pci_ss_info_1462_7280 #define pci_ss_info_1462_7280 pci_ss_info_8086_24d4_1462_7280 +static const pciSubsystemInfo pci_ss_info_8086_24d4_15d9_4580 = + {0x15d9, 0x4580, pci_subsys_8086_24d4_15d9_4580, 0}; +#undef pci_ss_info_15d9_4580 +#define pci_ss_info_15d9_4580 pci_ss_info_8086_24d4_15d9_4580 +static const pciSubsystemInfo pci_ss_info_8086_24d4_1734_101c = + {0x1734, 0x101c, pci_subsys_8086_24d4_1734_101c, 0}; +#undef pci_ss_info_1734_101c +#define pci_ss_info_1734_101c pci_ss_info_8086_24d4_1734_101c static const pciSubsystemInfo pci_ss_info_8086_24d4_8086_3427 = {0x8086, 0x3427, pci_subsys_8086_24d4_8086_3427, 0}; #undef pci_ss_info_8086_3427 #define pci_ss_info_8086_3427 pci_ss_info_8086_24d4_8086_3427 +static const pciSubsystemInfo pci_ss_info_8086_24d4_8086_4246 = + {0x8086, 0x4246, pci_subsys_8086_24d4_8086_4246, 0}; +#undef pci_ss_info_8086_4246 +#define pci_ss_info_8086_4246 pci_ss_info_8086_24d4_8086_4246 static const pciSubsystemInfo pci_ss_info_8086_24d4_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24d4_8086_524c, 0}; #undef pci_ss_info_8086_524c #define pci_ss_info_8086_524c pci_ss_info_8086_24d4_8086_524c -static const pciSubsystemInfo pci_ss_info_8086_24d5_103c_12bc = - {0x103c, 0x12bc, pci_subsys_8086_24d5_103c_12bc, 0}; -#undef pci_ss_info_103c_12bc -#define pci_ss_info_103c_12bc pci_ss_info_8086_24d5_103c_12bc +static const pciSubsystemInfo pci_ss_info_8086_24d5_1028_0169 = + {0x1028, 0x0169, pci_subsys_8086_24d5_1028_0169, 0}; +#undef pci_ss_info_1028_0169 +#define pci_ss_info_1028_0169 pci_ss_info_8086_24d5_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_24d5_103c_006a = + {0x103c, 0x006a, pci_subsys_8086_24d5_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_8086_24d5_103c_006a static const pciSubsystemInfo pci_ss_info_8086_24d5_1043_80f3 = {0x1043, 0x80f3, pci_subsys_8086_24d5_1043_80f3, 0}; #undef pci_ss_info_1043_80f3 #define pci_ss_info_1043_80f3 pci_ss_info_8086_24d5_1043_80f3 +static const pciSubsystemInfo pci_ss_info_8086_24d5_1043_810f = + {0x1043, 0x810f, pci_subsys_8086_24d5_1043_810f, 0}; +#undef pci_ss_info_1043_810f +#define pci_ss_info_1043_810f pci_ss_info_8086_24d5_1043_810f static const pciSubsystemInfo pci_ss_info_8086_24d5_1458_a002 = {0x1458, 0xa002, pci_subsys_8086_24d5_1458_a002, 0}; #undef pci_ss_info_1458_a002 #define pci_ss_info_1458_a002 pci_ss_info_8086_24d5_1458_a002 +static const pciSubsystemInfo pci_ss_info_8086_24d5_1462_0080 = + {0x1462, 0x0080, pci_subsys_8086_24d5_1462_0080, 0}; +#undef pci_ss_info_1462_0080 +#define pci_ss_info_1462_0080 pci_ss_info_8086_24d5_1462_0080 static const pciSubsystemInfo pci_ss_info_8086_24d5_1462_7280 = {0x1462, 0x7280, pci_subsys_8086_24d5_1462_7280, 0}; #undef pci_ss_info_1462_7280 @@ -32692,6 +39779,34 @@ {0x8086, 0xa000, pci_subsys_8086_24d5_8086_a000, 0}; #undef pci_ss_info_8086_a000 #define pci_ss_info_8086_a000 pci_ss_info_8086_24d5_8086_a000 +static const pciSubsystemInfo pci_ss_info_8086_24d5_8086_e000 = + {0x8086, 0xe000, pci_subsys_8086_24d5_8086_e000, 0}; +#undef pci_ss_info_8086_e000 +#define pci_ss_info_8086_e000 pci_ss_info_8086_24d5_8086_e000 +static const pciSubsystemInfo pci_ss_info_8086_24d5_8086_e001 = + {0x8086, 0xe001, pci_subsys_8086_24d5_8086_e001, 0}; +#undef pci_ss_info_8086_e001 +#define pci_ss_info_8086_e001 pci_ss_info_8086_24d5_8086_e001 +static const pciSubsystemInfo pci_ss_info_8086_24d6_103c_006a = + {0x103c, 0x006a, pci_subsys_8086_24d6_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_8086_24d6_103c_006a +static const pciSubsystemInfo pci_ss_info_8086_24d7_1014_02ed = + {0x1014, 0x02ed, pci_subsys_8086_24d7_1014_02ed, 0}; +#undef pci_ss_info_1014_02ed +#define pci_ss_info_1014_02ed pci_ss_info_8086_24d7_1014_02ed +static const pciSubsystemInfo pci_ss_info_8086_24d7_1028_0169 = + {0x1028, 0x0169, pci_subsys_8086_24d7_1028_0169, 0}; +#undef pci_ss_info_1028_0169 +#define pci_ss_info_1028_0169 pci_ss_info_8086_24d7_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_24d7_1028_0183 = + {0x1028, 0x0183, pci_subsys_8086_24d7_1028_0183, 0}; +#undef pci_ss_info_1028_0183 +#define pci_ss_info_1028_0183 pci_ss_info_8086_24d7_1028_0183 +static const pciSubsystemInfo pci_ss_info_8086_24d7_103c_006a = + {0x103c, 0x006a, pci_subsys_8086_24d7_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_8086_24d7_103c_006a static const pciSubsystemInfo pci_ss_info_8086_24d7_103c_12bc = {0x103c, 0x12bc, pci_subsys_8086_24d7_103c_12bc, 0}; #undef pci_ss_info_103c_12bc @@ -32708,14 +39823,42 @@ {0x1462, 0x7280, pci_subsys_8086_24d7_1462_7280, 0}; #undef pci_ss_info_1462_7280 #define pci_ss_info_1462_7280 pci_ss_info_8086_24d7_1462_7280 +static const pciSubsystemInfo pci_ss_info_8086_24d7_15d9_4580 = + {0x15d9, 0x4580, pci_subsys_8086_24d7_15d9_4580, 0}; +#undef pci_ss_info_15d9_4580 +#define pci_ss_info_15d9_4580 pci_ss_info_8086_24d7_15d9_4580 +static const pciSubsystemInfo pci_ss_info_8086_24d7_1734_101c = + {0x1734, 0x101c, pci_subsys_8086_24d7_1734_101c, 0}; +#undef pci_ss_info_1734_101c +#define pci_ss_info_1734_101c pci_ss_info_8086_24d7_1734_101c static const pciSubsystemInfo pci_ss_info_8086_24d7_8086_3427 = {0x8086, 0x3427, pci_subsys_8086_24d7_8086_3427, 0}; #undef pci_ss_info_8086_3427 #define pci_ss_info_8086_3427 pci_ss_info_8086_24d7_8086_3427 +static const pciSubsystemInfo pci_ss_info_8086_24d7_8086_4246 = + {0x8086, 0x4246, pci_subsys_8086_24d7_8086_4246, 0}; +#undef pci_ss_info_8086_4246 +#define pci_ss_info_8086_4246 pci_ss_info_8086_24d7_8086_4246 static const pciSubsystemInfo pci_ss_info_8086_24d7_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24d7_8086_524c, 0}; #undef pci_ss_info_8086_524c #define pci_ss_info_8086_524c pci_ss_info_8086_24d7_8086_524c +static const pciSubsystemInfo pci_ss_info_8086_24db_1014_02ed = + {0x1014, 0x02ed, pci_subsys_8086_24db_1014_02ed, 0}; +#undef pci_ss_info_1014_02ed +#define pci_ss_info_1014_02ed pci_ss_info_8086_24db_1014_02ed +static const pciSubsystemInfo pci_ss_info_8086_24db_1028_0169 = + {0x1028, 0x0169, pci_subsys_8086_24db_1028_0169, 0}; +#undef pci_ss_info_1028_0169 +#define pci_ss_info_1028_0169 pci_ss_info_8086_24db_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_24db_1028_019a = + {0x1028, 0x019a, pci_subsys_8086_24db_1028_019a, 0}; +#undef pci_ss_info_1028_019a +#define pci_ss_info_1028_019a pci_ss_info_8086_24db_1028_019a +static const pciSubsystemInfo pci_ss_info_8086_24db_103c_006a = + {0x103c, 0x006a, pci_subsys_8086_24db_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_8086_24db_103c_006a static const pciSubsystemInfo pci_ss_info_8086_24db_103c_12bc = {0x103c, 0x12bc, pci_subsys_8086_24db_103c_12bc, 0}; #undef pci_ss_info_103c_12bc @@ -32736,14 +39879,50 @@ {0x1462, 0x7580, pci_subsys_8086_24db_1462_7580, 0}; #undef pci_ss_info_1462_7580 #define pci_ss_info_1462_7580 pci_ss_info_8086_24db_1462_7580 +static const pciSubsystemInfo pci_ss_info_8086_24db_15d9_4580 = + {0x15d9, 0x4580, pci_subsys_8086_24db_15d9_4580, 0}; +#undef pci_ss_info_15d9_4580 +#define pci_ss_info_15d9_4580 pci_ss_info_8086_24db_15d9_4580 +static const pciSubsystemInfo pci_ss_info_8086_24db_1734_101c = + {0x1734, 0x101c, pci_subsys_8086_24db_1734_101c, 0}; +#undef pci_ss_info_1734_101c +#define pci_ss_info_1734_101c pci_ss_info_8086_24db_1734_101c +static const pciSubsystemInfo pci_ss_info_8086_24db_8086_24db = + {0x8086, 0x24db, pci_subsys_8086_24db_8086_24db, 0}; +#undef pci_ss_info_8086_24db +#define pci_ss_info_8086_24db pci_ss_info_8086_24db_8086_24db static const pciSubsystemInfo pci_ss_info_8086_24db_8086_3427 = {0x8086, 0x3427, pci_subsys_8086_24db_8086_3427, 0}; #undef pci_ss_info_8086_3427 #define pci_ss_info_8086_3427 pci_ss_info_8086_24db_8086_3427 +static const pciSubsystemInfo pci_ss_info_8086_24db_8086_4246 = + {0x8086, 0x4246, pci_subsys_8086_24db_8086_4246, 0}; +#undef pci_ss_info_8086_4246 +#define pci_ss_info_8086_4246 pci_ss_info_8086_24db_8086_4246 static const pciSubsystemInfo pci_ss_info_8086_24db_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24db_8086_524c, 0}; #undef pci_ss_info_8086_524c #define pci_ss_info_8086_524c pci_ss_info_8086_24db_8086_524c +static const pciSubsystemInfo pci_ss_info_8086_24dd_1014_02ed = + {0x1014, 0x02ed, pci_subsys_8086_24dd_1014_02ed, 0}; +#undef pci_ss_info_1014_02ed +#define pci_ss_info_1014_02ed pci_ss_info_8086_24dd_1014_02ed +static const pciSubsystemInfo pci_ss_info_8086_24dd_1028_0169 = + {0x1028, 0x0169, pci_subsys_8086_24dd_1028_0169, 0}; +#undef pci_ss_info_1028_0169 +#define pci_ss_info_1028_0169 pci_ss_info_8086_24dd_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_24dd_1028_0183 = + {0x1028, 0x0183, pci_subsys_8086_24dd_1028_0183, 0}; +#undef pci_ss_info_1028_0183 +#define pci_ss_info_1028_0183 pci_ss_info_8086_24dd_1028_0183 +static const pciSubsystemInfo pci_ss_info_8086_24dd_1028_019a = + {0x1028, 0x019a, pci_subsys_8086_24dd_1028_019a, 0}; +#undef pci_ss_info_1028_019a +#define pci_ss_info_1028_019a pci_ss_info_8086_24dd_1028_019a +static const pciSubsystemInfo pci_ss_info_8086_24dd_103c_006a = + {0x103c, 0x006a, pci_subsys_8086_24dd_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_8086_24dd_103c_006a static const pciSubsystemInfo pci_ss_info_8086_24dd_103c_12bc = {0x103c, 0x12bc, pci_subsys_8086_24dd_103c_12bc, 0}; #undef pci_ss_info_103c_12bc @@ -32764,10 +39943,22 @@ {0x8086, 0x3427, pci_subsys_8086_24dd_8086_3427, 0}; #undef pci_ss_info_8086_3427 #define pci_ss_info_8086_3427 pci_ss_info_8086_24dd_8086_3427 +static const pciSubsystemInfo pci_ss_info_8086_24dd_8086_4246 = + {0x8086, 0x4246, pci_subsys_8086_24dd_8086_4246, 0}; +#undef pci_ss_info_8086_4246 +#define pci_ss_info_8086_4246 pci_ss_info_8086_24dd_8086_4246 static const pciSubsystemInfo pci_ss_info_8086_24dd_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24dd_8086_524c, 0}; #undef pci_ss_info_8086_524c #define pci_ss_info_8086_524c pci_ss_info_8086_24dd_8086_524c +static const pciSubsystemInfo pci_ss_info_8086_24de_1014_02ed = + {0x1014, 0x02ed, pci_subsys_8086_24de_1014_02ed, 0}; +#undef pci_ss_info_1014_02ed +#define pci_ss_info_1014_02ed pci_ss_info_8086_24de_1014_02ed +static const pciSubsystemInfo pci_ss_info_8086_24de_1028_0169 = + {0x1028, 0x0169, pci_subsys_8086_24de_1028_0169, 0}; +#undef pci_ss_info_1028_0169 +#define pci_ss_info_1028_0169 pci_ss_info_8086_24de_1028_0169 static const pciSubsystemInfo pci_ss_info_8086_24de_1043_80a6 = {0x1043, 0x80a6, pci_subsys_8086_24de_1043_80a6, 0}; #undef pci_ss_info_1043_80a6 @@ -32780,10 +39971,22 @@ {0x1462, 0x7280, pci_subsys_8086_24de_1462_7280, 0}; #undef pci_ss_info_1462_7280 #define pci_ss_info_1462_7280 pci_ss_info_8086_24de_1462_7280 +static const pciSubsystemInfo pci_ss_info_8086_24de_15d9_4580 = + {0x15d9, 0x4580, pci_subsys_8086_24de_15d9_4580, 0}; +#undef pci_ss_info_15d9_4580 +#define pci_ss_info_15d9_4580 pci_ss_info_8086_24de_15d9_4580 +static const pciSubsystemInfo pci_ss_info_8086_24de_1734_101c = + {0x1734, 0x101c, pci_subsys_8086_24de_1734_101c, 0}; +#undef pci_ss_info_1734_101c +#define pci_ss_info_1734_101c pci_ss_info_8086_24de_1734_101c static const pciSubsystemInfo pci_ss_info_8086_24de_8086_3427 = {0x8086, 0x3427, pci_subsys_8086_24de_8086_3427, 0}; #undef pci_ss_info_8086_3427 #define pci_ss_info_8086_3427 pci_ss_info_8086_24de_8086_3427 +static const pciSubsystemInfo pci_ss_info_8086_24de_8086_4246 = + {0x8086, 0x4246, pci_subsys_8086_24de_8086_4246, 0}; +#undef pci_ss_info_8086_4246 +#define pci_ss_info_8086_4246 pci_ss_info_8086_24de_8086_4246 static const pciSubsystemInfo pci_ss_info_8086_24de_8086_524c = {0x8086, 0x524c, pci_subsys_8086_24de_8086_524c, 0}; #undef pci_ss_info_8086_524c @@ -32848,6 +40051,10 @@ {0x1014, 0x0267, pci_subsys_8086_2562_1014_0267, 0}; #undef pci_ss_info_1014_0267 #define pci_ss_info_1014_0267 pci_ss_info_8086_2562_1014_0267 +static const pciSubsystemInfo pci_ss_info_8086_2570_103c_006a = + {0x103c, 0x006a, pci_subsys_8086_2570_103c_006a, 0}; +#undef pci_ss_info_103c_006a +#define pci_ss_info_103c_006a pci_ss_info_8086_2570_103c_006a static const pciSubsystemInfo pci_ss_info_8086_2570_1043_80f2 = {0x1043, 0x80f2, pci_subsys_8086_2570_1043_80f2, 0}; #undef pci_ss_info_1043_80f2 @@ -32856,6 +40063,18 @@ {0x1458, 0x2570, pci_subsys_8086_2570_1458_2570, 0}; #undef pci_ss_info_1458_2570 #define pci_ss_info_1458_2570 pci_ss_info_8086_2570_1458_2570 +static const pciSubsystemInfo pci_ss_info_8086_2572_1028_019d = + {0x1028, 0x019d, pci_subsys_8086_2572_1028_019d, 0}; +#undef pci_ss_info_1028_019d +#define pci_ss_info_1028_019d pci_ss_info_8086_2572_1028_019d +static const pciSubsystemInfo pci_ss_info_8086_2572_1043_80a5 = + {0x1043, 0x80a5, pci_subsys_8086_2572_1043_80a5, 0}; +#undef pci_ss_info_1043_80a5 +#define pci_ss_info_1043_80a5 pci_ss_info_8086_2572_1043_80a5 +static const pciSubsystemInfo pci_ss_info_8086_2572_8086_4246 = + {0x8086, 0x4246, pci_subsys_8086_2572_8086_4246, 0}; +#undef pci_ss_info_8086_4246 +#define pci_ss_info_8086_4246 pci_ss_info_8086_2572_8086_4246 static const pciSubsystemInfo pci_ss_info_8086_2578_1458_2578 = {0x1458, 0x2578, pci_subsys_8086_2578_1458_2578, 0}; #undef pci_ss_info_1458_2578 @@ -32868,22 +40087,86 @@ {0x15d9, 0x4580, pci_subsys_8086_2578_15d9_4580, 0}; #undef pci_ss_info_15d9_4580 #define pci_ss_info_15d9_4580 pci_ss_info_8086_2578_15d9_4580 +static const pciSubsystemInfo pci_ss_info_8086_2580_1458_2580 = + {0x1458, 0x2580, pci_subsys_8086_2580_1458_2580, 0}; +#undef pci_ss_info_1458_2580 +#define pci_ss_info_1458_2580 pci_ss_info_8086_2580_1458_2580 +static const pciSubsystemInfo pci_ss_info_8086_2580_1462_7028 = + {0x1462, 0x7028, pci_subsys_8086_2580_1462_7028, 0}; +#undef pci_ss_info_1462_7028 +#define pci_ss_info_1462_7028 pci_ss_info_8086_2580_1462_7028 +static const pciSubsystemInfo pci_ss_info_8086_2580_1734_105b = + {0x1734, 0x105b, pci_subsys_8086_2580_1734_105b, 0}; +#undef pci_ss_info_1734_105b +#define pci_ss_info_1734_105b pci_ss_info_8086_2580_1734_105b static const pciSubsystemInfo pci_ss_info_8086_2582_1028_1079 = {0x1028, 0x1079, pci_subsys_8086_2582_1028_1079, 0}; #undef pci_ss_info_1028_1079 #define pci_ss_info_1028_1079 pci_ss_info_8086_2582_1028_1079 +static const pciSubsystemInfo pci_ss_info_8086_2582_1043_2582 = + {0x1043, 0x2582, pci_subsys_8086_2582_1043_2582, 0}; +#undef pci_ss_info_1043_2582 +#define pci_ss_info_1043_2582 pci_ss_info_8086_2582_1043_2582 +static const pciSubsystemInfo pci_ss_info_8086_2582_1458_2582 = + {0x1458, 0x2582, pci_subsys_8086_2582_1458_2582, 0}; +#undef pci_ss_info_1458_2582 +#define pci_ss_info_1458_2582 pci_ss_info_8086_2582_1458_2582 +static const pciSubsystemInfo pci_ss_info_8086_2582_1734_105b = + {0x1734, 0x105b, pci_subsys_8086_2582_1734_105b, 0}; +#undef pci_ss_info_1734_105b +#define pci_ss_info_1734_105b pci_ss_info_8086_2582_1734_105b +static const pciSubsystemInfo pci_ss_info_8086_2590_1028_0182 = + {0x1028, 0x0182, pci_subsys_8086_2590_1028_0182, 0}; +#undef pci_ss_info_1028_0182 +#define pci_ss_info_1028_0182 pci_ss_info_8086_2590_1028_0182 +static const pciSubsystemInfo pci_ss_info_8086_2590_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_2590_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_2590_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_2590_a304_81b7 = + {0xa304, 0x81b7, pci_subsys_8086_2590_a304_81b7, 0}; +#undef pci_ss_info_a304_81b7 +#define pci_ss_info_a304_81b7 pci_ss_info_8086_2590_a304_81b7 +static const pciSubsystemInfo pci_ss_info_8086_2592_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_2592_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_2592_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_2592_1043_1881 = + {0x1043, 0x1881, pci_subsys_8086_2592_1043_1881, 0}; +#undef pci_ss_info_1043_1881 +#define pci_ss_info_1043_1881 pci_ss_info_8086_2592_1043_1881 static const pciSubsystemInfo pci_ss_info_8086_25a2_4c53_10b0 = {0x4c53, 0x10b0, pci_subsys_8086_25a2_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_25a2_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_25a2_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_25a2_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_25a2_4c53_10e0 static const pciSubsystemInfo pci_ss_info_8086_25a3_4c53_10b0 = {0x4c53, 0x10b0, pci_subsys_8086_25a3_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_25a3_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_25a3_4c53_10d0 = + {0x4c53, 0x10d0, pci_subsys_8086_25a3_4c53_10d0, 0}; +#undef pci_ss_info_4c53_10d0 +#define pci_ss_info_4c53_10d0 pci_ss_info_8086_25a3_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25a3_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_25a3_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_25a3_4c53_10e0 static const pciSubsystemInfo pci_ss_info_8086_25a4_4c53_10b0 = {0x4c53, 0x10b0, pci_subsys_8086_25a4_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_25a4_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_25a4_4c53_10d0 = + {0x4c53, 0x10d0, pci_subsys_8086_25a4_4c53_10d0, 0}; +#undef pci_ss_info_4c53_10d0 +#define pci_ss_info_4c53_10d0 pci_ss_info_8086_25a4_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25a4_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_25a4_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_25a4_4c53_10e0 static const pciSubsystemInfo pci_ss_info_8086_25a6_4c53_10b0 = {0x4c53, 0x10b0, pci_subsys_8086_25a6_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 @@ -32892,58 +40175,382 @@ {0x4c53, 0x10b0, pci_subsys_8086_25a9_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_25a9_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_25a9_4c53_10d0 = + {0x4c53, 0x10d0, pci_subsys_8086_25a9_4c53_10d0, 0}; +#undef pci_ss_info_4c53_10d0 +#define pci_ss_info_4c53_10d0 pci_ss_info_8086_25a9_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25a9_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_25a9_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_25a9_4c53_10e0 static const pciSubsystemInfo pci_ss_info_8086_25aa_4c53_10b0 = {0x4c53, 0x10b0, pci_subsys_8086_25aa_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_25aa_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_25aa_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_25aa_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_25aa_4c53_10e0 static const pciSubsystemInfo pci_ss_info_8086_25ab_4c53_10b0 = {0x4c53, 0x10b0, pci_subsys_8086_25ab_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_25ab_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_25ab_4c53_10d0 = + {0x4c53, 0x10d0, pci_subsys_8086_25ab_4c53_10d0, 0}; +#undef pci_ss_info_4c53_10d0 +#define pci_ss_info_4c53_10d0 pci_ss_info_8086_25ab_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25ab_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_25ab_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_25ab_4c53_10e0 static const pciSubsystemInfo pci_ss_info_8086_25ac_4c53_10b0 = {0x4c53, 0x10b0, pci_subsys_8086_25ac_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_25ac_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_25ac_4c53_10d0 = + {0x4c53, 0x10d0, pci_subsys_8086_25ac_4c53_10d0, 0}; +#undef pci_ss_info_4c53_10d0 +#define pci_ss_info_4c53_10d0 pci_ss_info_8086_25ac_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25ac_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_25ac_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_25ac_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_8086_25ad_4c53_10b0 = + {0x4c53, 0x10b0, pci_subsys_8086_25ad_4c53_10b0, 0}; +#undef pci_ss_info_4c53_10b0 +#define pci_ss_info_4c53_10b0 pci_ss_info_8086_25ad_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_25ad_4c53_10d0 = + {0x4c53, 0x10d0, pci_subsys_8086_25ad_4c53_10d0, 0}; +#undef pci_ss_info_4c53_10d0 +#define pci_ss_info_4c53_10d0 pci_ss_info_8086_25ad_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25ad_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_25ad_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_25ad_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_8086_25b0_4c53_10d0 = + {0x4c53, 0x10d0, pci_subsys_8086_25b0_4c53_10d0, 0}; +#undef pci_ss_info_4c53_10d0 +#define pci_ss_info_4c53_10d0 pci_ss_info_8086_25b0_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_25b0_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_25b0_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_25b0_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_8086_2640_1462_7028 = + {0x1462, 0x7028, pci_subsys_8086_2640_1462_7028, 0}; +#undef pci_ss_info_1462_7028 +#define pci_ss_info_1462_7028 pci_ss_info_8086_2640_1462_7028 +static const pciSubsystemInfo pci_ss_info_8086_2640_1734_105c = + {0x1734, 0x105c, pci_subsys_8086_2640_1734_105c, 0}; +#undef pci_ss_info_1734_105c +#define pci_ss_info_1734_105c pci_ss_info_8086_2640_1734_105c +static const pciSubsystemInfo pci_ss_info_8086_2641_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_2641_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_2641_103c_099c static const pciSubsystemInfo pci_ss_info_8086_2651_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_2651_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_8086_2651_1028_0179 +static const pciSubsystemInfo pci_ss_info_8086_2651_1043_2601 = + {0x1043, 0x2601, pci_subsys_8086_2651_1043_2601, 0}; +#undef pci_ss_info_1043_2601 +#define pci_ss_info_1043_2601 pci_ss_info_8086_2651_1043_2601 +static const pciSubsystemInfo pci_ss_info_8086_2651_1734_105c = + {0x1734, 0x105c, pci_subsys_8086_2651_1734_105c, 0}; +#undef pci_ss_info_1734_105c +#define pci_ss_info_1734_105c pci_ss_info_8086_2651_1734_105c +static const pciSubsystemInfo pci_ss_info_8086_2651_8086_4147 = + {0x8086, 0x4147, pci_subsys_8086_2651_8086_4147, 0}; +#undef pci_ss_info_8086_4147 +#define pci_ss_info_8086_4147 pci_ss_info_8086_2651_8086_4147 +static const pciSubsystemInfo pci_ss_info_8086_2652_1462_7028 = + {0x1462, 0x7028, pci_subsys_8086_2652_1462_7028, 0}; +#undef pci_ss_info_1462_7028 +#define pci_ss_info_1462_7028 pci_ss_info_8086_2652_1462_7028 static const pciSubsystemInfo pci_ss_info_8086_2658_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_2658_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_8086_2658_1028_0179 +static const pciSubsystemInfo pci_ss_info_8086_2658_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_2658_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_2658_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_2658_1043_80a6 = + {0x1043, 0x80a6, pci_subsys_8086_2658_1043_80a6, 0}; +#undef pci_ss_info_1043_80a6 +#define pci_ss_info_1043_80a6 pci_ss_info_8086_2658_1043_80a6 +static const pciSubsystemInfo pci_ss_info_8086_2658_1458_2558 = + {0x1458, 0x2558, pci_subsys_8086_2658_1458_2558, 0}; +#undef pci_ss_info_1458_2558 +#define pci_ss_info_1458_2558 pci_ss_info_8086_2658_1458_2558 +static const pciSubsystemInfo pci_ss_info_8086_2658_1462_7028 = + {0x1462, 0x7028, pci_subsys_8086_2658_1462_7028, 0}; +#undef pci_ss_info_1462_7028 +#define pci_ss_info_1462_7028 pci_ss_info_8086_2658_1462_7028 +static const pciSubsystemInfo pci_ss_info_8086_2658_1734_105c = + {0x1734, 0x105c, pci_subsys_8086_2658_1734_105c, 0}; +#undef pci_ss_info_1734_105c +#define pci_ss_info_1734_105c pci_ss_info_8086_2658_1734_105c static const pciSubsystemInfo pci_ss_info_8086_2659_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_2659_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_8086_2659_1028_0179 +static const pciSubsystemInfo pci_ss_info_8086_2659_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_2659_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_2659_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_2659_1043_80a6 = + {0x1043, 0x80a6, pci_subsys_8086_2659_1043_80a6, 0}; +#undef pci_ss_info_1043_80a6 +#define pci_ss_info_1043_80a6 pci_ss_info_8086_2659_1043_80a6 +static const pciSubsystemInfo pci_ss_info_8086_2659_1458_2659 = + {0x1458, 0x2659, pci_subsys_8086_2659_1458_2659, 0}; +#undef pci_ss_info_1458_2659 +#define pci_ss_info_1458_2659 pci_ss_info_8086_2659_1458_2659 +static const pciSubsystemInfo pci_ss_info_8086_2659_1462_7028 = + {0x1462, 0x7028, pci_subsys_8086_2659_1462_7028, 0}; +#undef pci_ss_info_1462_7028 +#define pci_ss_info_1462_7028 pci_ss_info_8086_2659_1462_7028 +static const pciSubsystemInfo pci_ss_info_8086_2659_1734_105c = + {0x1734, 0x105c, pci_subsys_8086_2659_1734_105c, 0}; +#undef pci_ss_info_1734_105c +#define pci_ss_info_1734_105c pci_ss_info_8086_2659_1734_105c static const pciSubsystemInfo pci_ss_info_8086_265a_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_265a_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_8086_265a_1028_0179 +static const pciSubsystemInfo pci_ss_info_8086_265a_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_265a_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_265a_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_265a_1043_80a6 = + {0x1043, 0x80a6, pci_subsys_8086_265a_1043_80a6, 0}; +#undef pci_ss_info_1043_80a6 +#define pci_ss_info_1043_80a6 pci_ss_info_8086_265a_1043_80a6 +static const pciSubsystemInfo pci_ss_info_8086_265a_1458_265a = + {0x1458, 0x265a, pci_subsys_8086_265a_1458_265a, 0}; +#undef pci_ss_info_1458_265a +#define pci_ss_info_1458_265a pci_ss_info_8086_265a_1458_265a +static const pciSubsystemInfo pci_ss_info_8086_265a_1462_7028 = + {0x1462, 0x7028, pci_subsys_8086_265a_1462_7028, 0}; +#undef pci_ss_info_1462_7028 +#define pci_ss_info_1462_7028 pci_ss_info_8086_265a_1462_7028 +static const pciSubsystemInfo pci_ss_info_8086_265a_1734_105c = + {0x1734, 0x105c, pci_subsys_8086_265a_1734_105c, 0}; +#undef pci_ss_info_1734_105c +#define pci_ss_info_1734_105c pci_ss_info_8086_265a_1734_105c static const pciSubsystemInfo pci_ss_info_8086_265b_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_265b_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_8086_265b_1028_0179 +static const pciSubsystemInfo pci_ss_info_8086_265b_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_265b_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_265b_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_265b_1043_80a6 = + {0x1043, 0x80a6, pci_subsys_8086_265b_1043_80a6, 0}; +#undef pci_ss_info_1043_80a6 +#define pci_ss_info_1043_80a6 pci_ss_info_8086_265b_1043_80a6 +static const pciSubsystemInfo pci_ss_info_8086_265b_1458_265a = + {0x1458, 0x265a, pci_subsys_8086_265b_1458_265a, 0}; +#undef pci_ss_info_1458_265a +#define pci_ss_info_1458_265a pci_ss_info_8086_265b_1458_265a +static const pciSubsystemInfo pci_ss_info_8086_265b_1462_7028 = + {0x1462, 0x7028, pci_subsys_8086_265b_1462_7028, 0}; +#undef pci_ss_info_1462_7028 +#define pci_ss_info_1462_7028 pci_ss_info_8086_265b_1462_7028 +static const pciSubsystemInfo pci_ss_info_8086_265b_1734_105c = + {0x1734, 0x105c, pci_subsys_8086_265b_1734_105c, 0}; +#undef pci_ss_info_1734_105c +#define pci_ss_info_1734_105c pci_ss_info_8086_265b_1734_105c static const pciSubsystemInfo pci_ss_info_8086_265c_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_265c_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_8086_265c_1028_0179 +static const pciSubsystemInfo pci_ss_info_8086_265c_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_265c_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_265c_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_265c_1043_80a6 = + {0x1043, 0x80a6, pci_subsys_8086_265c_1043_80a6, 0}; +#undef pci_ss_info_1043_80a6 +#define pci_ss_info_1043_80a6 pci_ss_info_8086_265c_1043_80a6 +static const pciSubsystemInfo pci_ss_info_8086_265c_1458_5006 = + {0x1458, 0x5006, pci_subsys_8086_265c_1458_5006, 0}; +#undef pci_ss_info_1458_5006 +#define pci_ss_info_1458_5006 pci_ss_info_8086_265c_1458_5006 +static const pciSubsystemInfo pci_ss_info_8086_265c_1462_7028 = + {0x1462, 0x7028, pci_subsys_8086_265c_1462_7028, 0}; +#undef pci_ss_info_1462_7028 +#define pci_ss_info_1462_7028 pci_ss_info_8086_265c_1462_7028 +static const pciSubsystemInfo pci_ss_info_8086_265c_1734_105c = + {0x1734, 0x105c, pci_subsys_8086_265c_1734_105c, 0}; +#undef pci_ss_info_1734_105c +#define pci_ss_info_1734_105c pci_ss_info_8086_265c_1734_105c +static const pciSubsystemInfo pci_ss_info_8086_2660_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_2660_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_2660_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_2668_1043_814e = + {0x1043, 0x814e, pci_subsys_8086_2668_1043_814e, 0}; +#undef pci_ss_info_1043_814e +#define pci_ss_info_1043_814e pci_ss_info_8086_2668_1043_814e static const pciSubsystemInfo pci_ss_info_8086_266a_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_266a_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_8086_266a_1028_0179 +static const pciSubsystemInfo pci_ss_info_8086_266a_1043_80a6 = + {0x1043, 0x80a6, pci_subsys_8086_266a_1043_80a6, 0}; +#undef pci_ss_info_1043_80a6 +#define pci_ss_info_1043_80a6 pci_ss_info_8086_266a_1043_80a6 +static const pciSubsystemInfo pci_ss_info_8086_266a_1458_266a = + {0x1458, 0x266a, pci_subsys_8086_266a_1458_266a, 0}; +#undef pci_ss_info_1458_266a +#define pci_ss_info_1458_266a pci_ss_info_8086_266a_1458_266a +static const pciSubsystemInfo pci_ss_info_8086_266a_1462_7028 = + {0x1462, 0x7028, pci_subsys_8086_266a_1462_7028, 0}; +#undef pci_ss_info_1462_7028 +#define pci_ss_info_1462_7028 pci_ss_info_8086_266a_1462_7028 +static const pciSubsystemInfo pci_ss_info_8086_266a_1734_105c = + {0x1734, 0x105c, pci_subsys_8086_266a_1734_105c, 0}; +#undef pci_ss_info_1734_105c +#define pci_ss_info_1734_105c pci_ss_info_8086_266a_1734_105c +static const pciSubsystemInfo pci_ss_info_8086_266d_1025_006a = + {0x1025, 0x006a, pci_subsys_8086_266d_1025_006a, 0}; +#undef pci_ss_info_1025_006a +#define pci_ss_info_1025_006a pci_ss_info_8086_266d_1025_006a +static const pciSubsystemInfo pci_ss_info_8086_266d_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_266d_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_266d_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_266e_1025_006a = + {0x1025, 0x006a, pci_subsys_8086_266e_1025_006a, 0}; +#undef pci_ss_info_1025_006a +#define pci_ss_info_1025_006a pci_ss_info_8086_266e_1025_006a static const pciSubsystemInfo pci_ss_info_8086_266e_1028_0179 = {0x1028, 0x0179, pci_subsys_8086_266e_1028_0179, 0}; #undef pci_ss_info_1028_0179 #define pci_ss_info_1028_0179 pci_ss_info_8086_266e_1028_0179 +static const pciSubsystemInfo pci_ss_info_8086_266e_1028_0182 = + {0x1028, 0x0182, pci_subsys_8086_266e_1028_0182, 0}; +#undef pci_ss_info_1028_0182 +#define pci_ss_info_1028_0182 pci_ss_info_8086_266e_1028_0182 +static const pciSubsystemInfo pci_ss_info_8086_266e_1028_0188 = + {0x1028, 0x0188, pci_subsys_8086_266e_1028_0188, 0}; +#undef pci_ss_info_1028_0188 +#define pci_ss_info_1028_0188 pci_ss_info_8086_266e_1028_0188 +static const pciSubsystemInfo pci_ss_info_8086_266e_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_266e_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_266e_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_266e_1458_a002 = + {0x1458, 0xa002, pci_subsys_8086_266e_1458_a002, 0}; +#undef pci_ss_info_1458_a002 +#define pci_ss_info_1458_a002 pci_ss_info_8086_266e_1458_a002 +static const pciSubsystemInfo pci_ss_info_8086_266e_1734_105a = + {0x1734, 0x105a, pci_subsys_8086_266e_1734_105a, 0}; +#undef pci_ss_info_1734_105a +#define pci_ss_info_1734_105a pci_ss_info_8086_266e_1734_105a +static const pciSubsystemInfo pci_ss_info_8086_266f_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_266f_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_266f_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_266f_1043_80a6 = + {0x1043, 0x80a6, pci_subsys_8086_266f_1043_80a6, 0}; +#undef pci_ss_info_1043_80a6 +#define pci_ss_info_1043_80a6 pci_ss_info_8086_266f_1043_80a6 +static const pciSubsystemInfo pci_ss_info_8086_266f_1458_266f = + {0x1458, 0x266f, pci_subsys_8086_266f_1458_266f, 0}; +#undef pci_ss_info_1458_266f +#define pci_ss_info_1458_266f pci_ss_info_8086_266f_1458_266f +static const pciSubsystemInfo pci_ss_info_8086_266f_1462_7028 = + {0x1462, 0x7028, pci_subsys_8086_266f_1462_7028, 0}; +#undef pci_ss_info_1462_7028 +#define pci_ss_info_1462_7028 pci_ss_info_8086_266f_1462_7028 +static const pciSubsystemInfo pci_ss_info_8086_266f_1734_105c = + {0x1734, 0x105c, pci_subsys_8086_266f_1734_105c, 0}; +#undef pci_ss_info_1734_105c +#define pci_ss_info_1734_105c pci_ss_info_8086_266f_1734_105c +static const pciSubsystemInfo pci_ss_info_8086_2770_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_2770_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_2770_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_2772_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_2772_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_2772_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_2782_1043_2582 = + {0x1043, 0x2582, pci_subsys_8086_2782_1043_2582, 0}; +#undef pci_ss_info_1043_2582 +#define pci_ss_info_1043_2582 pci_ss_info_8086_2782_1043_2582 +static const pciSubsystemInfo pci_ss_info_8086_2782_1734_105b = + {0x1734, 0x105b, pci_subsys_8086_2782_1734_105b, 0}; +#undef pci_ss_info_1734_105b +#define pci_ss_info_1734_105b pci_ss_info_8086_2782_1734_105b +static const pciSubsystemInfo pci_ss_info_8086_2792_103c_099c = + {0x103c, 0x099c, pci_subsys_8086_2792_103c_099c, 0}; +#undef pci_ss_info_103c_099c +#define pci_ss_info_103c_099c pci_ss_info_8086_2792_103c_099c +static const pciSubsystemInfo pci_ss_info_8086_2792_1043_1881 = + {0x1043, 0x1881, pci_subsys_8086_2792_1043_1881, 0}; +#undef pci_ss_info_1043_1881 +#define pci_ss_info_1043_1881 pci_ss_info_8086_2792_1043_1881 +static const pciSubsystemInfo pci_ss_info_8086_27b8_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_27b8_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_27b8_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27c0_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_27c0_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_27c0_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27c8_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_27c8_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_27c8_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27c9_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_27c9_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_27c9_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27ca_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_27ca_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_27ca_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27cb_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_27cb_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_27cb_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27cc_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_27cc_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_27cc_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27da_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_27da_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_27da_8086_544e +static const pciSubsystemInfo pci_ss_info_8086_27dc_8086_308d = + {0x8086, 0x308d, pci_subsys_8086_27dc_8086_308d, 0}; +#undef pci_ss_info_8086_308d +#define pci_ss_info_8086_308d pci_ss_info_8086_27dc_8086_308d +static const pciSubsystemInfo pci_ss_info_8086_27df_8086_544e = + {0x8086, 0x544e, pci_subsys_8086_27df_8086_544e, 0}; +#undef pci_ss_info_8086_544e +#define pci_ss_info_8086_544e pci_ss_info_8086_27df_8086_544e static const pciSubsystemInfo pci_ss_info_8086_3340_1025_005a = {0x1025, 0x005a, pci_subsys_8086_3340_1025_005a, 0}; #undef pci_ss_info_1025_005a #define pci_ss_info_1025_005a pci_ss_info_8086_3340_1025_005a +static const pciSubsystemInfo pci_ss_info_8086_3340_103c_088c = + {0x103c, 0x088c, pci_subsys_8086_3340_103c_088c, 0}; +#undef pci_ss_info_103c_088c +#define pci_ss_info_103c_088c pci_ss_info_8086_3340_103c_088c static const pciSubsystemInfo pci_ss_info_8086_3340_103c_0890 = {0x103c, 0x0890, pci_subsys_8086_3340_103c_0890, 0}; #undef pci_ss_info_103c_0890 #define pci_ss_info_103c_0890 pci_ss_info_8086_3340_103c_0890 +static const pciSubsystemInfo pci_ss_info_8086_3575_0e11_0030 = + {0x0e11, 0x0030, pci_subsys_8086_3575_0e11_0030, 0}; +#undef pci_ss_info_0e11_0030 +#define pci_ss_info_0e11_0030 pci_ss_info_8086_3575_0e11_0030 static const pciSubsystemInfo pci_ss_info_8086_3575_1014_021d = {0x1014, 0x021d, pci_subsys_8086_3575_1014_021d, 0}; #undef pci_ss_info_1014_021d @@ -32956,14 +40563,38 @@ {0x1014, 0x0513, pci_subsys_8086_3577_1014_0513, 0}; #undef pci_ss_info_1014_0513 #define pci_ss_info_1014_0513 pci_ss_info_8086_3577_1014_0513 +static const pciSubsystemInfo pci_ss_info_8086_3580_1028_0139 = + {0x1028, 0x0139, pci_subsys_8086_3580_1028_0139, 0}; +#undef pci_ss_info_1028_0139 +#define pci_ss_info_1028_0139 pci_ss_info_8086_3580_1028_0139 static const pciSubsystemInfo pci_ss_info_8086_3580_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_3580_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_3580_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_3580_1028_0196 = + {0x1028, 0x0196, pci_subsys_8086_3580_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_8086_3580_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_3580_1734_1055 = + {0x1734, 0x1055, pci_subsys_8086_3580_1734_1055, 0}; +#undef pci_ss_info_1734_1055 +#define pci_ss_info_1734_1055 pci_ss_info_8086_3580_1734_1055 static const pciSubsystemInfo pci_ss_info_8086_3580_4c53_10b0 = {0x4c53, 0x10b0, pci_subsys_8086_3580_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_3580_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_3580_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_3580_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_3580_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_8086_3581_1734_1055 = + {0x1734, 0x1055, pci_subsys_8086_3581_1734_1055, 0}; +#undef pci_ss_info_1734_1055 +#define pci_ss_info_1734_1055 pci_ss_info_8086_3581_1734_1055 +static const pciSubsystemInfo pci_ss_info_8086_3582_1028_0139 = + {0x1028, 0x0139, pci_subsys_8086_3582_1028_0139, 0}; +#undef pci_ss_info_1028_0139 +#define pci_ss_info_1028_0139 pci_ss_info_8086_3582_1028_0139 static const pciSubsystemInfo pci_ss_info_8086_3582_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_3582_1028_0163, 0}; #undef pci_ss_info_1028_0163 @@ -32972,22 +40603,102 @@ {0x4c53, 0x10b0, pci_subsys_8086_3582_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_3582_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_3582_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_3582_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_3582_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_8086_3584_1028_0139 = + {0x1028, 0x0139, pci_subsys_8086_3584_1028_0139, 0}; +#undef pci_ss_info_1028_0139 +#define pci_ss_info_1028_0139 pci_ss_info_8086_3584_1028_0139 static const pciSubsystemInfo pci_ss_info_8086_3584_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_3584_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_3584_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_3584_1028_0196 = + {0x1028, 0x0196, pci_subsys_8086_3584_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_8086_3584_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_3584_1734_1055 = + {0x1734, 0x1055, pci_subsys_8086_3584_1734_1055, 0}; +#undef pci_ss_info_1734_1055 +#define pci_ss_info_1734_1055 pci_ss_info_8086_3584_1734_1055 static const pciSubsystemInfo pci_ss_info_8086_3584_4c53_10b0 = {0x4c53, 0x10b0, pci_subsys_8086_3584_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_3584_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_3584_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_3584_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_3584_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_8086_3585_1028_0139 = + {0x1028, 0x0139, pci_subsys_8086_3585_1028_0139, 0}; +#undef pci_ss_info_1028_0139 +#define pci_ss_info_1028_0139 pci_ss_info_8086_3585_1028_0139 static const pciSubsystemInfo pci_ss_info_8086_3585_1028_0163 = {0x1028, 0x0163, pci_subsys_8086_3585_1028_0163, 0}; #undef pci_ss_info_1028_0163 #define pci_ss_info_1028_0163 pci_ss_info_8086_3585_1028_0163 +static const pciSubsystemInfo pci_ss_info_8086_3585_1028_0196 = + {0x1028, 0x0196, pci_subsys_8086_3585_1028_0196, 0}; +#undef pci_ss_info_1028_0196 +#define pci_ss_info_1028_0196 pci_ss_info_8086_3585_1028_0196 +static const pciSubsystemInfo pci_ss_info_8086_3585_1734_1055 = + {0x1734, 0x1055, pci_subsys_8086_3585_1734_1055, 0}; +#undef pci_ss_info_1734_1055 +#define pci_ss_info_1734_1055 pci_ss_info_8086_3585_1734_1055 static const pciSubsystemInfo pci_ss_info_8086_3585_4c53_10b0 = {0x4c53, 0x10b0, pci_subsys_8086_3585_4c53_10b0, 0}; #undef pci_ss_info_4c53_10b0 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_3585_4c53_10b0 +static const pciSubsystemInfo pci_ss_info_8086_3585_4c53_10e0 = + {0x4c53, 0x10e0, pci_subsys_8086_3585_4c53_10e0, 0}; +#undef pci_ss_info_4c53_10e0 +#define pci_ss_info_4c53_10e0 pci_ss_info_8086_3585_4c53_10e0 +static const pciSubsystemInfo pci_ss_info_8086_3590_1028_019a = + {0x1028, 0x019a, pci_subsys_8086_3590_1028_019a, 0}; +#undef pci_ss_info_1028_019a +#define pci_ss_info_1028_019a pci_ss_info_8086_3590_1028_019a +static const pciSubsystemInfo pci_ss_info_8086_3590_1734_103e = + {0x1734, 0x103e, pci_subsys_8086_3590_1734_103e, 0}; +#undef pci_ss_info_1734_103e +#define pci_ss_info_1734_103e pci_ss_info_8086_3590_1734_103e +static const pciSubsystemInfo pci_ss_info_8086_3590_4c53_10d0 = + {0x4c53, 0x10d0, pci_subsys_8086_3590_4c53_10d0, 0}; +#undef pci_ss_info_4c53_10d0 +#define pci_ss_info_4c53_10d0 pci_ss_info_8086_3590_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_3591_1028_0169 = + {0x1028, 0x0169, pci_subsys_8086_3591_1028_0169, 0}; +#undef pci_ss_info_1028_0169 +#define pci_ss_info_1028_0169 pci_ss_info_8086_3591_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_3591_4c53_10d0 = + {0x4c53, 0x10d0, pci_subsys_8086_3591_4c53_10d0, 0}; +#undef pci_ss_info_4c53_10d0 +#define pci_ss_info_4c53_10d0 pci_ss_info_8086_3591_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_3594_4c53_10d0 = + {0x4c53, 0x10d0, pci_subsys_8086_3594_4c53_10d0, 0}; +#undef pci_ss_info_4c53_10d0 +#define pci_ss_info_4c53_10d0 pci_ss_info_8086_3594_4c53_10d0 +static const pciSubsystemInfo pci_ss_info_8086_359e_1028_0169 = + {0x1028, 0x0169, pci_subsys_8086_359e_1028_0169, 0}; +#undef pci_ss_info_1028_0169 +#define pci_ss_info_1028_0169 pci_ss_info_8086_359e_1028_0169 +static const pciSubsystemInfo pci_ss_info_8086_4222_8086_1005 = + {0x8086, 0x1005, pci_subsys_8086_4222_8086_1005, 0}; +#undef pci_ss_info_8086_1005 +#define pci_ss_info_8086_1005 pci_ss_info_8086_4222_8086_1005 +static const pciSubsystemInfo pci_ss_info_8086_4222_8086_1034 = + {0x8086, 0x1034, pci_subsys_8086_4222_8086_1034, 0}; +#undef pci_ss_info_8086_1034 +#define pci_ss_info_8086_1034 pci_ss_info_8086_4222_8086_1034 +static const pciSubsystemInfo pci_ss_info_8086_4222_8086_1044 = + {0x8086, 0x1044, pci_subsys_8086_4222_8086_1044, 0}; +#undef pci_ss_info_8086_1044 +#define pci_ss_info_8086_1044 pci_ss_info_8086_4222_8086_1044 +static const pciSubsystemInfo pci_ss_info_8086_4227_8086_1014 = + {0x8086, 0x1014, pci_subsys_8086_4227_8086_1014, 0}; +#undef pci_ss_info_8086_1014 +#define pci_ss_info_8086_1014 pci_ss_info_8086_4227_8086_1014 static const pciSubsystemInfo pci_ss_info_8086_5201_8086_0001 = {0x8086, 0x0001, pci_subsys_8086_5201_8086_0001, 0}; #undef pci_ss_info_8086_0001 @@ -33124,6 +40835,18 @@ {0x8086, 0x0100, pci_subsys_8086_7800_8086_0100, 0}; #undef pci_ss_info_8086_0100 #define pci_ss_info_8086_0100 pci_ss_info_8086_7800_8086_0100 +static const pciSubsystemInfo pci_ss_info_8086_8500_1993_0ded = + {0x1993, 0x0ded, pci_subsys_8086_8500_1993_0ded, 0}; +#undef pci_ss_info_1993_0ded +#define pci_ss_info_1993_0ded pci_ss_info_8086_8500_1993_0ded +static const pciSubsystemInfo pci_ss_info_8086_8500_1993_0dee = + {0x1993, 0x0dee, pci_subsys_8086_8500_1993_0dee, 0}; +#undef pci_ss_info_1993_0dee +#define pci_ss_info_1993_0dee pci_ss_info_8086_8500_1993_0dee +static const pciSubsystemInfo pci_ss_info_8086_8500_1993_0def = + {0x1993, 0x0def, pci_subsys_8086_8500_1993_0def, 0}; +#undef pci_ss_info_1993_0def +#define pci_ss_info_1993_0def pci_ss_info_8086_8500_1993_0def static const pciSubsystemInfo pci_ss_info_8086_b555_12d9_000a = {0x12d9, 0x000a, pci_subsys_8086_b555_12d9_000a, 0}; #undef pci_ss_info_12d9_000a @@ -33427,6 +41150,10 @@ #undef pci_ss_info_0e11_0295 #define pci_ss_info_0e11_0295 pci_ss_info_9005_0285_0e11_0295 #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_9005_0285_1014_02f2 = + {0x1014, 0x02f2, pci_subsys_9005_0285_1014_02f2, 0}; +#undef pci_ss_info_1014_02f2 +#define pci_ss_info_1014_02f2 pci_ss_info_9005_0285_1014_02f2 #endif static const pciSubsystemInfo pci_ss_info_9005_0285_1028_0287 = {0x1028, 0x0287, pci_subsys_9005_0285_1028_0287, 0}; @@ -33439,6 +41166,12 @@ #undef pci_ss_info_1028_0291 #define pci_ss_info_1028_0291 pci_ss_info_9005_0285_1028_0291 #ifdef VENDOR_INCLUDE_NONVIDEO +#endif +static const pciSubsystemInfo pci_ss_info_9005_0285_103c_3227 = + {0x103c, 0x3227, pci_subsys_9005_0285_103c_3227, 0}; +#undef pci_ss_info_103c_3227 +#define pci_ss_info_103c_3227 pci_ss_info_9005_0285_103c_3227 +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_9005_0285_17aa_0286 = {0x17aa, 0x0286, pci_subsys_9005_0285_17aa_0286, 0}; #undef pci_ss_info_17aa_0286 @@ -33475,6 +41208,14 @@ {0x9005, 0x028b, pci_subsys_9005_0285_9005_028b, 0}; #undef pci_ss_info_9005_028b #define pci_ss_info_9005_028b pci_ss_info_9005_0285_9005_028b +static const pciSubsystemInfo pci_ss_info_9005_0285_9005_028e = + {0x9005, 0x028e, pci_subsys_9005_0285_9005_028e, 0}; +#undef pci_ss_info_9005_028e +#define pci_ss_info_9005_028e pci_ss_info_9005_0285_9005_028e +static const pciSubsystemInfo pci_ss_info_9005_0285_9005_028f = + {0x9005, 0x028f, pci_subsys_9005_0285_9005_028f, 0}; +#undef pci_ss_info_9005_028f +#define pci_ss_info_9005_028f pci_ss_info_9005_0285_9005_028f static const pciSubsystemInfo pci_ss_info_9005_0285_9005_0290 = {0x9005, 0x0290, pci_subsys_9005_0285_9005_0290, 0}; #undef pci_ss_info_9005_0290 @@ -33491,10 +41232,126 @@ {0x9005, 0x0294, pci_subsys_9005_0285_9005_0294, 0}; #undef pci_ss_info_9005_0294 #define pci_ss_info_9005_0294 pci_ss_info_9005_0285_9005_0294 +static const pciSubsystemInfo pci_ss_info_9005_0285_9005_0296 = + {0x9005, 0x0296, pci_subsys_9005_0285_9005_0296, 0}; +#undef pci_ss_info_9005_0296 +#define pci_ss_info_9005_0296 pci_ss_info_9005_0285_9005_0296 +static const pciSubsystemInfo pci_ss_info_9005_0285_9005_0297 = + {0x9005, 0x0297, pci_subsys_9005_0285_9005_0297, 0}; +#undef pci_ss_info_9005_0297 +#define pci_ss_info_9005_0297 pci_ss_info_9005_0285_9005_0297 +static const pciSubsystemInfo pci_ss_info_9005_0285_9005_0298 = + {0x9005, 0x0298, pci_subsys_9005_0285_9005_0298, 0}; +#undef pci_ss_info_9005_0298 +#define pci_ss_info_9005_0298 pci_ss_info_9005_0285_9005_0298 +static const pciSubsystemInfo pci_ss_info_9005_0285_9005_0299 = + {0x9005, 0x0299, pci_subsys_9005_0285_9005_0299, 0}; +#undef pci_ss_info_9005_0299 +#define pci_ss_info_9005_0299 pci_ss_info_9005_0285_9005_0299 +static const pciSubsystemInfo pci_ss_info_9005_0285_9005_029a = + {0x9005, 0x029a, pci_subsys_9005_0285_9005_029a, 0}; +#undef pci_ss_info_9005_029a +#define pci_ss_info_9005_029a pci_ss_info_9005_0285_9005_029a +static const pciSubsystemInfo pci_ss_info_9005_0286_1014_9540 = + {0x1014, 0x9540, pci_subsys_9005_0286_1014_9540, 0}; +#undef pci_ss_info_1014_9540 +#define pci_ss_info_1014_9540 pci_ss_info_9005_0286_1014_9540 +static const pciSubsystemInfo pci_ss_info_9005_0286_1014_9580 = + {0x1014, 0x9580, pci_subsys_9005_0286_1014_9580, 0}; +#undef pci_ss_info_1014_9580 +#define pci_ss_info_1014_9580 pci_ss_info_9005_0286_1014_9580 static const pciSubsystemInfo pci_ss_info_9005_0286_9005_028c = {0x9005, 0x028c, pci_subsys_9005_0286_9005_028c, 0}; #undef pci_ss_info_9005_028c #define pci_ss_info_9005_028c pci_ss_info_9005_0286_9005_028c +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_028d = + {0x9005, 0x028d, pci_subsys_9005_0286_9005_028d, 0}; +#undef pci_ss_info_9005_028d +#define pci_ss_info_9005_028d pci_ss_info_9005_0286_9005_028d +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_029b = + {0x9005, 0x029b, pci_subsys_9005_0286_9005_029b, 0}; +#undef pci_ss_info_9005_029b +#define pci_ss_info_9005_029b pci_ss_info_9005_0286_9005_029b +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_029c = + {0x9005, 0x029c, pci_subsys_9005_0286_9005_029c, 0}; +#undef pci_ss_info_9005_029c +#define pci_ss_info_9005_029c pci_ss_info_9005_0286_9005_029c +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_029d = + {0x9005, 0x029d, pci_subsys_9005_0286_9005_029d, 0}; +#undef pci_ss_info_9005_029d +#define pci_ss_info_9005_029d pci_ss_info_9005_0286_9005_029d +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_029e = + {0x9005, 0x029e, pci_subsys_9005_0286_9005_029e, 0}; +#undef pci_ss_info_9005_029e +#define pci_ss_info_9005_029e pci_ss_info_9005_0286_9005_029e +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_029f = + {0x9005, 0x029f, pci_subsys_9005_0286_9005_029f, 0}; +#undef pci_ss_info_9005_029f +#define pci_ss_info_9005_029f pci_ss_info_9005_0286_9005_029f +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02a0 = + {0x9005, 0x02a0, pci_subsys_9005_0286_9005_02a0, 0}; +#undef pci_ss_info_9005_02a0 +#define pci_ss_info_9005_02a0 pci_ss_info_9005_0286_9005_02a0 +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02a1 = + {0x9005, 0x02a1, pci_subsys_9005_0286_9005_02a1, 0}; +#undef pci_ss_info_9005_02a1 +#define pci_ss_info_9005_02a1 pci_ss_info_9005_0286_9005_02a1 +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02a2 = + {0x9005, 0x02a2, pci_subsys_9005_0286_9005_02a2, 0}; +#undef pci_ss_info_9005_02a2 +#define pci_ss_info_9005_02a2 pci_ss_info_9005_0286_9005_02a2 +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02a3 = + {0x9005, 0x02a3, pci_subsys_9005_0286_9005_02a3, 0}; +#undef pci_ss_info_9005_02a3 +#define pci_ss_info_9005_02a3 pci_ss_info_9005_0286_9005_02a3 +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02a4 = + {0x9005, 0x02a4, pci_subsys_9005_0286_9005_02a4, 0}; +#undef pci_ss_info_9005_02a4 +#define pci_ss_info_9005_02a4 pci_ss_info_9005_0286_9005_02a4 +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02a5 = + {0x9005, 0x02a5, pci_subsys_9005_0286_9005_02a5, 0}; +#undef pci_ss_info_9005_02a5 +#define pci_ss_info_9005_02a5 pci_ss_info_9005_0286_9005_02a5 +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02a6 = + {0x9005, 0x02a6, pci_subsys_9005_0286_9005_02a6, 0}; +#undef pci_ss_info_9005_02a6 +#define pci_ss_info_9005_02a6 pci_ss_info_9005_0286_9005_02a6 +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02a7 = + {0x9005, 0x02a7, pci_subsys_9005_0286_9005_02a7, 0}; +#undef pci_ss_info_9005_02a7 +#define pci_ss_info_9005_02a7 pci_ss_info_9005_0286_9005_02a7 +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02a8 = + {0x9005, 0x02a8, pci_subsys_9005_0286_9005_02a8, 0}; +#undef pci_ss_info_9005_02a8 +#define pci_ss_info_9005_02a8 pci_ss_info_9005_0286_9005_02a8 +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02a9 = + {0x9005, 0x02a9, pci_subsys_9005_0286_9005_02a9, 0}; +#undef pci_ss_info_9005_02a9 +#define pci_ss_info_9005_02a9 pci_ss_info_9005_0286_9005_02a9 +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02aa = + {0x9005, 0x02aa, pci_subsys_9005_0286_9005_02aa, 0}; +#undef pci_ss_info_9005_02aa +#define pci_ss_info_9005_02aa pci_ss_info_9005_0286_9005_02aa +static const pciSubsystemInfo pci_ss_info_9005_0286_9005_0800 = + {0x9005, 0x0800, pci_subsys_9005_0286_9005_0800, 0}; +#undef pci_ss_info_9005_0800 +#define pci_ss_info_9005_0800 pci_ss_info_9005_0286_9005_0800 +static const pciSubsystemInfo pci_ss_info_9005_0500_1014_02c1 = + {0x1014, 0x02c1, pci_subsys_9005_0500_1014_02c1, 0}; +#undef pci_ss_info_1014_02c1 +#define pci_ss_info_1014_02c1 pci_ss_info_9005_0500_1014_02c1 +static const pciSubsystemInfo pci_ss_info_9005_0500_1014_02c2 = + {0x1014, 0x02c2, pci_subsys_9005_0500_1014_02c2, 0}; +#undef pci_ss_info_1014_02c2 +#define pci_ss_info_1014_02c2 pci_ss_info_9005_0500_1014_02c2 +static const pciSubsystemInfo pci_ss_info_9005_0503_1014_02bf = + {0x1014, 0x02bf, pci_subsys_9005_0503_1014_02bf, 0}; +#undef pci_ss_info_1014_02bf +#define pci_ss_info_1014_02bf pci_ss_info_9005_0503_1014_02bf +static const pciSubsystemInfo pci_ss_info_9005_0503_1014_02d5 = + {0x1014, 0x02d5, pci_subsys_9005_0503_1014_02d5, 0}; +#undef pci_ss_info_1014_02d5 +#define pci_ss_info_1014_02d5 pci_ss_info_9005_0503_1014_02d5 #endif static const pciSubsystemInfo pci_ss_info_9005_8011_0e11_00ac = {0x0e11, 0x00ac, pci_subsys_9005_8011_0e11_00ac, 0}; @@ -33505,6 +41362,10 @@ {0x9005, 0x0041, pci_subsys_9005_8011_9005_0041, 0}; #undef pci_ss_info_9005_0041 #define pci_ss_info_9005_0041 pci_ss_info_9005_8011_9005_0041 +static const pciSubsystemInfo pci_ss_info_9005_801f_1734_1011 = + {0x1734, 0x1011, pci_subsys_9005_801f_1734_1011, 0}; +#undef pci_ss_info_1734_1011 +#define pci_ss_info_1734_1011 pci_ss_info_9005_801f_1734_1011 #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo pci_ss_info_9710_9815_1000_0020 = @@ -33541,20 +41402,50 @@ {0x0059, 0x0003, pci_subsys_e159_0001_0059_0003, 0}; #undef pci_ss_info_0059_0003 #define pci_ss_info_0059_0003 pci_ss_info_e159_0001_0059_0003 +static const pciSubsystemInfo pci_ss_info_e159_0001_00a7_0001 = + {0x00a7, 0x0001, pci_subsys_e159_0001_00a7_0001, 0}; +#undef pci_ss_info_00a7_0001 +#define pci_ss_info_00a7_0001 pci_ss_info_e159_0001_00a7_0001 +static const pciSubsystemInfo pci_ss_info_e159_0001_6159_0001 = + {0x6159, 0x0001, pci_subsys_e159_0001_6159_0001, 0}; +#undef pci_ss_info_6159_0001 +#define pci_ss_info_6159_0001 pci_ss_info_e159_0001_6159_0001 +static const pciSubsystemInfo pci_ss_info_e159_0001_79fe_0001 = + {0x79fe, 0x0001, pci_subsys_e159_0001_79fe_0001, 0}; +#undef pci_ss_info_79fe_0001 +#define pci_ss_info_79fe_0001 pci_ss_info_e159_0001_79fe_0001 +#endif +static const pciSubsystemInfo pci_ss_info_e159_0001_8086_0003 = + {0x8086, 0x0003, pci_subsys_e159_0001_8086_0003, 0}; +#undef pci_ss_info_8086_0003 +#define pci_ss_info_8086_0003 pci_ss_info_e159_0001_8086_0003 +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo pci_ss_info_e159_0001_b1b9_0001 = + {0xb1b9, 0x0001, pci_subsys_e159_0001_b1b9_0001, 0}; +#undef pci_ss_info_b1b9_0001 +#define pci_ss_info_b1b9_0001 pci_ss_info_e159_0001_b1b9_0001 +static const pciSubsystemInfo pci_ss_info_e159_0001_b1b9_0003 = + {0xb1b9, 0x0003, pci_subsys_e159_0001_b1b9_0003, 0}; +#undef pci_ss_info_b1b9_0003 +#define pci_ss_info_b1b9_0003 pci_ss_info_e159_0001_b1b9_0003 #endif -#define pci_ss_list_0070_4000 NULL -#define pci_ss_list_0070_4001 NULL -#define pci_ss_list_0070_4009 NULL -#define pci_ss_list_0070_4801 NULL #define pci_ss_list_0095_0680 NULL #define pci_ss_list_018a_0106 NULL #define pci_ss_list_021b_8139 NULL #define pci_ss_list_0291_8212 NULL #define pci_ss_list_02ac_1012 NULL #define pci_ss_list_0357_000a NULL +#define pci_ss_list_0432_0001 NULL +#define pci_ss_list_045e_006e NULL +#define pci_ss_list_045e_00c2 NULL +#define pci_ss_list_04cf_8818 NULL +#define pci_ss_list_050d_7050 NULL #define pci_ss_list_05e3_0701 NULL #define pci_ss_list_0675_1700 NULL #define pci_ss_list_0675_1702 NULL +#define pci_ss_list_0675_1703 NULL +#define pci_ss_list_0675_1704 NULL +#define pci_ss_list_067b_3507 NULL #define pci_ss_list_09c1_0704 NULL #define pci_ss_list_0b49_064f NULL #define pci_ss_list_0e11_0001 NULL @@ -33568,9 +41459,11 @@ }; #define pci_ss_list_0e11_0049 NULL #define pci_ss_list_0e11_004a NULL +#define pci_ss_list_0e11_005a NULL #define pci_ss_list_0e11_007c NULL #define pci_ss_list_0e11_007d NULL #define pci_ss_list_0e11_0085 NULL +#define pci_ss_list_0e11_00b1 NULL #define pci_ss_list_0e11_00bb NULL #define pci_ss_list_0e11_00ca NULL #define pci_ss_list_0e11_00cb NULL @@ -33746,10 +41639,14 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_1000_0030[] = { + &pci_ss_info_1000_0030_0e11_00da, &pci_ss_info_1000_0030_1028_0123, &pci_ss_info_1000_0030_1028_014a, &pci_ss_info_1000_0030_1028_016c, + &pci_ss_info_1000_0030_1028_0183, &pci_ss_info_1000_0030_1028_1010, + &pci_ss_info_1000_0030_124b_1170, + &pci_ss_info_1000_0030_1734_1052, NULL }; #define pci_ss_list_1000_0031 NULL @@ -33764,6 +41661,18 @@ NULL }; #define pci_ss_list_1000_0041 NULL +#define pci_ss_list_1000_0050 NULL +#define pci_ss_list_1000_0054 NULL +#define pci_ss_list_1000_0056 NULL +#define pci_ss_list_1000_0058 NULL +#define pci_ss_list_1000_005a NULL +#define pci_ss_list_1000_005c NULL +#define pci_ss_list_1000_005e NULL +#define pci_ss_list_1000_0060 NULL +static const pciSubsystemInfo *pci_ss_list_1000_0062[] = { + &pci_ss_info_1000_0062_1000_0062, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1000_008f[] = { &pci_ss_info_1000_008f_1092_8000, &pci_ss_info_1000_008f_1092_8760, @@ -33812,6 +41721,9 @@ #define pci_ss_list_1000_0627 NULL #define pci_ss_list_1000_0628 NULL #define pci_ss_list_1000_0629 NULL +#define pci_ss_list_1000_0640 NULL +#define pci_ss_list_1000_0642 NULL +#define pci_ss_list_1000_0646 NULL #define pci_ss_list_1000_0701 NULL static const pciSubsystemInfo *pci_ss_list_1000_0702[] = { &pci_ss_info_1000_0702_1318_0000, @@ -33849,6 +41761,7 @@ #define pci_ss_list_1001_0017 NULL #define pci_ss_list_1001_9100 NULL #define pci_ss_list_1002_3150 NULL +#define pci_ss_list_1002_3152 NULL #define pci_ss_list_1002_3154 NULL #define pci_ss_list_1002_3e50 NULL #define pci_ss_list_1002_3e54 NULL @@ -33866,6 +41779,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_4150[] = { &pci_ss_info_1002_4150_1002_0002, &pci_ss_info_1002_4150_1002_0003, + &pci_ss_info_1002_4150_1002_4722, &pci_ss_info_1002_4150_1458_4024, &pci_ss_info_1002_4150_148c_2064, &pci_ss_info_1002_4150_148c_2066, @@ -33881,10 +41795,17 @@ }; static const pciSubsystemInfo *pci_ss_list_1002_4152[] = { &pci_ss_info_1002_4152_1002_0002, + &pci_ss_info_1002_4152_1002_4772, &pci_ss_info_1002_4152_1043_c002, + &pci_ss_info_1002_4152_1043_c01a, + &pci_ss_info_1002_4152_174b_7c29, + &pci_ss_info_1002_4152_1787_4002, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4153[] = { + &pci_ss_info_1002_4153_1462_932c, NULL }; -#define pci_ss_list_1002_4153 NULL #define pci_ss_list_1002_4154 NULL #define pci_ss_list_1002_4155 NULL #define pci_ss_list_1002_4156 NULL @@ -33895,6 +41816,8 @@ #define pci_ss_list_1002_4166 NULL #define pci_ss_list_1002_4168 NULL static const pciSubsystemInfo *pci_ss_list_1002_4170[] = { + &pci_ss_info_1002_4170_1002_0003, + &pci_ss_info_1002_4170_1002_4723, &pci_ss_info_1002_4170_1458_4025, &pci_ss_info_1002_4170_148c_2067, &pci_ss_info_1002_4170_174b_7c28, @@ -33908,7 +41831,11 @@ }; static const pciSubsystemInfo *pci_ss_list_1002_4172[] = { &pci_ss_info_1002_4172_1002_0003, + &pci_ss_info_1002_4172_1002_4773, &pci_ss_info_1002_4172_1043_c003, + &pci_ss_info_1002_4172_1043_c01b, + &pci_ss_info_1002_4172_174b_7c28, + &pci_ss_info_1002_4172_1787_4003, NULL }; #define pci_ss_list_1002_4173 NULL @@ -33919,7 +41846,9 @@ }; #define pci_ss_list_1002_4243 NULL static const pciSubsystemInfo *pci_ss_list_1002_4336[] = { + &pci_ss_info_1002_4336_1002_4336, &pci_ss_info_1002_4336_103c_0024, + &pci_ss_info_1002_4336_161f_2029, NULL }; static const pciSubsystemInfo *pci_ss_list_1002_4337[] = { @@ -33931,10 +41860,51 @@ #define pci_ss_list_1002_4345 NULL #define pci_ss_list_1002_4347 NULL #define pci_ss_list_1002_4348 NULL +#define pci_ss_list_1002_4349 NULL #define pci_ss_list_1002_434d NULL #define pci_ss_list_1002_4353 NULL #define pci_ss_list_1002_4354 NULL #define pci_ss_list_1002_4358 NULL +#define pci_ss_list_1002_4363 NULL +#define pci_ss_list_1002_436e NULL +static const pciSubsystemInfo *pci_ss_list_1002_4370[] = { + &pci_ss_info_1002_4370_103c_308b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4371[] = { + &pci_ss_info_1002_4371_103c_308b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4372[] = { + &pci_ss_info_1002_4372_103c_308b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4373[] = { + &pci_ss_info_1002_4373_103c_308b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4374[] = { + &pci_ss_info_1002_4374_103c_308b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4375[] = { + &pci_ss_info_1002_4375_103c_308b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4376[] = { + &pci_ss_info_1002_4376_103c_308b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4377[] = { + &pci_ss_info_1002_4377_103c_308b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_4378[] = { + &pci_ss_info_1002_4378_103c_308b, + NULL +}; +#define pci_ss_list_1002_4379 NULL +#define pci_ss_list_1002_437a NULL #define pci_ss_list_1002_4437 NULL #define pci_ss_list_1002_4554 NULL #define pci_ss_list_1002_4654 NULL @@ -34001,6 +41971,8 @@ &pci_ss_info_1002_4752_1028_00ce, &pci_ss_info_1002_4752_1028_00d1, &pci_ss_info_1002_4752_1028_00d9, + &pci_ss_info_1002_4752_1028_0134, + &pci_ss_info_1002_4752_1734_007a, &pci_ss_info_1002_4752_8086_3411, &pci_ss_info_1002_4752_8086_3427, NULL @@ -34055,6 +42027,12 @@ #define pci_ss_list_1002_4a4e NULL #define pci_ss_list_1002_4a50 NULL #define pci_ss_list_1002_4a70 NULL +#define pci_ss_list_1002_4b49 NULL +#define pci_ss_list_1002_4b4b NULL +#define pci_ss_list_1002_4b4c NULL +#define pci_ss_list_1002_4b69 NULL +#define pci_ss_list_1002_4b6b NULL +#define pci_ss_list_1002_4b6c NULL static const pciSubsystemInfo *pci_ss_list_1002_4c42[] = { &pci_ss_info_1002_4c42_0e11_b0e7, &pci_ss_info_1002_4c42_0e11_b0e8, @@ -34086,6 +42064,10 @@ &pci_ss_info_1002_4c4d_1002_0084, &pci_ss_info_1002_4c4d_1014_0154, &pci_ss_info_1002_4c4d_1028_00aa, + &pci_ss_info_1002_4c4d_1028_00bb, + &pci_ss_info_1002_4c4d_10e1_10cf, + &pci_ss_info_1002_4c4d_1179_ff00, + &pci_ss_info_1002_4c4d_13bd_1019, NULL }; #define pci_ss_list_1002_4c4e NULL @@ -34109,9 +42091,11 @@ }; #define pci_ss_list_1002_4c58 NULL static const pciSubsystemInfo *pci_ss_list_1002_4c59[] = { + &pci_ss_info_1002_4c59_0e11_b111, &pci_ss_info_1002_4c59_1014_0235, &pci_ss_info_1002_4c59_1014_0239, &pci_ss_info_1002_4c59_104d_80e7, + &pci_ss_info_1002_4c59_1509_1930, NULL }; #define pci_ss_list_1002_4c5a NULL @@ -34122,7 +42106,11 @@ #define pci_ss_list_1002_4c6e NULL #define pci_ss_list_1002_4d46 NULL #define pci_ss_list_1002_4d4c NULL -#define pci_ss_list_1002_4e44 NULL +static const pciSubsystemInfo *pci_ss_list_1002_4e44[] = { + &pci_ss_info_1002_4e44_1002_515e, + &pci_ss_info_1002_4e44_1002_5965, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1002_4e45[] = { &pci_ss_info_1002_4e45_1002_0002, &pci_ss_info_1002_4e45_1681_0002, @@ -34136,6 +42124,7 @@ #define pci_ss_list_1002_4e4b NULL static const pciSubsystemInfo *pci_ss_list_1002_4e50[] = { &pci_ss_info_1002_4e50_1025_005a, + &pci_ss_info_1002_4e50_103c_088c, &pci_ss_info_1002_4e50_103c_0890, &pci_ss_info_1002_4e50_1734_1055, NULL @@ -34155,7 +42144,11 @@ #define pci_ss_list_1002_4e67 NULL #define pci_ss_list_1002_4e68 NULL #define pci_ss_list_1002_4e69 NULL -#define pci_ss_list_1002_4e6a NULL +static const pciSubsystemInfo *pci_ss_list_1002_4e6a[] = { + &pci_ss_info_1002_4e6a_1002_4e71, + NULL +}; +#define pci_ss_list_1002_4e71 NULL #define pci_ss_list_1002_5041 NULL #define pci_ss_list_1002_5042 NULL #define pci_ss_list_1002_5043 NULL @@ -34261,6 +42254,9 @@ &pci_ss_info_1002_5159_1002_003a, &pci_ss_info_1002_5159_1002_00ba, &pci_ss_info_1002_5159_1002_013a, + &pci_ss_info_1002_5159_1014_029a, + &pci_ss_info_1002_5159_1014_02c8, + &pci_ss_info_1002_5159_1028_019a, &pci_ss_info_1002_5159_1458_4002, &pci_ss_info_1002_5159_148c_2003, &pci_ss_info_1002_5159_148c_2023, @@ -34270,6 +42266,7 @@ NULL }; #define pci_ss_list_1002_515a NULL +#define pci_ss_list_1002_515e NULL #define pci_ss_list_1002_5168 NULL #define pci_ss_list_1002_5169 NULL #define pci_ss_list_1002_516a NULL @@ -34338,15 +42335,25 @@ #define pci_ss_list_1002_5454 NULL #define pci_ss_list_1002_5455 NULL #define pci_ss_list_1002_5460 NULL +#define pci_ss_list_1002_5462 NULL #define pci_ss_list_1002_5464 NULL #define pci_ss_list_1002_5548 NULL #define pci_ss_list_1002_5549 NULL #define pci_ss_list_1002_554a NULL #define pci_ss_list_1002_554b NULL +#define pci_ss_list_1002_554d NULL +#define pci_ss_list_1002_554f NULL +#define pci_ss_list_1002_5550 NULL #define pci_ss_list_1002_5551 NULL #define pci_ss_list_1002_5552 NULL #define pci_ss_list_1002_5554 NULL #define pci_ss_list_1002_556b NULL +#define pci_ss_list_1002_556d NULL +#define pci_ss_list_1002_556f NULL +#define pci_ss_list_1002_564a NULL +#define pci_ss_list_1002_564b NULL +#define pci_ss_list_1002_5652 NULL +#define pci_ss_list_1002_5653 NULL static const pciSubsystemInfo *pci_ss_list_1002_5654[] = { &pci_ss_info_1002_5654_1002_5654, NULL @@ -34360,16 +42367,33 @@ #define pci_ss_list_1002_5834 NULL #define pci_ss_list_1002_5835 NULL #define pci_ss_list_1002_5838 NULL +#define pci_ss_list_1002_5940 NULL static const pciSubsystemInfo *pci_ss_list_1002_5941[] = { + &pci_ss_info_1002_5941_1458_4019, &pci_ss_info_1002_5941_174b_7c12, &pci_ss_info_1002_5941_17af_200d, &pci_ss_info_1002_5941_18bc_0050, NULL }; #define pci_ss_list_1002_5944 NULL +static const pciSubsystemInfo *pci_ss_list_1002_5950[] = { + &pci_ss_info_1002_5950_103c_308b, + NULL +}; +#define pci_ss_list_1002_5951 NULL +static const pciSubsystemInfo *pci_ss_list_1002_5954[] = { + &pci_ss_info_1002_5954_1002_5954, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_5955[] = { + &pci_ss_info_1002_5955_1002_5955, + &pci_ss_info_1002_5955_103c_308b, + NULL +}; #define pci_ss_list_1002_5960 NULL static const pciSubsystemInfo *pci_ss_list_1002_5961[] = { &pci_ss_info_1002_5961_1002_2f72, + &pci_ss_info_1002_5961_1019_4c30, &pci_ss_info_1002_5961_12ab_5961, &pci_ss_info_1002_5961_1458_4018, &pci_ss_info_1002_5961_174b_7c13, @@ -34383,6 +42407,7 @@ static const pciSubsystemInfo *pci_ss_list_1002_5964[] = { &pci_ss_info_1002_5964_1043_c006, &pci_ss_info_1002_5964_1458_4018, + &pci_ss_info_1002_5964_147b_6191, &pci_ss_info_1002_5964_148c_2073, &pci_ss_info_1002_5964_174b_7c13, &pci_ss_info_1002_5964_1787_5964, @@ -34391,15 +42416,38 @@ &pci_ss_info_1002_5964_18bc_0173, NULL }; +#define pci_ss_list_1002_5969 NULL +#define pci_ss_list_1002_5974 NULL +#define pci_ss_list_1002_5975 NULL +#define pci_ss_list_1002_5a34 NULL +#define pci_ss_list_1002_5a38 NULL +#define pci_ss_list_1002_5a3f NULL +#define pci_ss_list_1002_5a41 NULL +#define pci_ss_list_1002_5a42 NULL +#define pci_ss_list_1002_5a61 NULL +#define pci_ss_list_1002_5a62 NULL static const pciSubsystemInfo *pci_ss_list_1002_5b60[] = { &pci_ss_info_1002_5b60_1043_002a, + &pci_ss_info_1002_5b60_1043_032e, + &pci_ss_info_1002_5b60_1462_0402, NULL }; #define pci_ss_list_1002_5b62 NULL +#define pci_ss_list_1002_5b63 NULL #define pci_ss_list_1002_5b64 NULL #define pci_ss_list_1002_5b65 NULL +static const pciSubsystemInfo *pci_ss_list_1002_5b70[] = { + &pci_ss_info_1002_5b70_1462_0403, + NULL +}; +#define pci_ss_list_1002_5b72 NULL +#define pci_ss_list_1002_5b73 NULL +#define pci_ss_list_1002_5b74 NULL #define pci_ss_list_1002_5c61 NULL -#define pci_ss_list_1002_5c63 NULL +static const pciSubsystemInfo *pci_ss_list_1002_5c63[] = { + &pci_ss_info_1002_5c63_1002_5c63, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1002_5d44[] = { &pci_ss_info_1002_5d44_1458_4019, &pci_ss_info_1002_5d44_174b_7c12, @@ -34409,14 +42457,79 @@ &pci_ss_info_1002_5d44_18bc_0172, NULL }; +#define pci_ss_list_1002_5d48 NULL +#define pci_ss_list_1002_5d49 NULL +#define pci_ss_list_1002_5d4a NULL +#define pci_ss_list_1002_5d4d NULL +#define pci_ss_list_1002_5d4f NULL +static const pciSubsystemInfo *pci_ss_list_1002_5d52[] = { + &pci_ss_info_1002_5d52_1002_0b12, + &pci_ss_info_1002_5d52_1002_0b13, + NULL +}; #define pci_ss_list_1002_5d57 NULL +#define pci_ss_list_1002_5d6d NULL +#define pci_ss_list_1002_5d6f NULL +#define pci_ss_list_1002_5d72 NULL +#define pci_ss_list_1002_5d77 NULL +#define pci_ss_list_1002_5e48 NULL +#define pci_ss_list_1002_5e49 NULL +#define pci_ss_list_1002_5e4a NULL +#define pci_ss_list_1002_5e4b NULL +#define pci_ss_list_1002_5e4c NULL +static const pciSubsystemInfo *pci_ss_list_1002_5e4d[] = { + &pci_ss_info_1002_5e4d_148c_2116, + NULL +}; +#define pci_ss_list_1002_5e4f NULL +#define pci_ss_list_1002_5e6b NULL +static const pciSubsystemInfo *pci_ss_list_1002_5e6d[] = { + &pci_ss_info_1002_5e6d_148c_2117, + NULL +}; #define pci_ss_list_1002_700f NULL #define pci_ss_list_1002_7010 NULL +#define pci_ss_list_1002_7100 NULL +#define pci_ss_list_1002_7105 NULL +static const pciSubsystemInfo *pci_ss_list_1002_7109[] = { + &pci_ss_info_1002_7109_1002_0322, + &pci_ss_info_1002_7109_1002_0d02, + NULL +}; +#define pci_ss_list_1002_7120 NULL +static const pciSubsystemInfo *pci_ss_list_1002_7129[] = { + &pci_ss_info_1002_7129_1002_0323, + &pci_ss_info_1002_7129_1002_0d03, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_7142[] = { + &pci_ss_info_1002_7142_1002_0322, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_7146[] = { + &pci_ss_info_1002_7146_1002_0322, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_7162[] = { + &pci_ss_info_1002_7162_1002_0323, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1002_7166[] = { + &pci_ss_info_1002_7166_1002_0323, + NULL +}; +#define pci_ss_list_1002_71c0 NULL +#define pci_ss_list_1002_71c2 NULL +#define pci_ss_list_1002_71e0 NULL +#define pci_ss_list_1002_71e2 NULL +#define pci_ss_list_1002_7833 NULL #define pci_ss_list_1002_7834 NULL #define pci_ss_list_1002_7835 NULL +#define pci_ss_list_1002_7838 NULL #define pci_ss_list_1002_7c37 NULL #define pci_ss_list_1002_cab0 NULL #define pci_ss_list_1002_cab2 NULL +#define pci_ss_list_1002_cab3 NULL #define pci_ss_list_1002_cbb2 NULL #define pci_ss_list_1003_0201 NULL #define pci_ss_list_1004_0005 NULL @@ -34472,11 +42585,14 @@ #define pci_ss_list_100b_0012 NULL static const pciSubsystemInfo *pci_ss_list_100b_0020[] = { &pci_ss_info_100b_0020_103c_0024, + &pci_ss_info_100b_0020_12d9_000c, &pci_ss_info_100b_0020_1385_f311, NULL }; +#define pci_ss_list_100b_0021 NULL #define pci_ss_list_100b_0022 NULL #define pci_ss_list_100b_0028 NULL +#define pci_ss_list_100b_002a NULL #define pci_ss_list_100b_002b NULL #define pci_ss_list_100b_002d NULL #define pci_ss_list_100b_002e NULL @@ -34637,6 +42753,7 @@ #define pci_ss_list_1013_1200 NULL #define pci_ss_list_1013_1202 NULL #define pci_ss_list_1013_1204 NULL +#define pci_ss_list_1013_4000 NULL #define pci_ss_list_1013_4400 NULL static const pciSubsystemInfo *pci_ss_list_1013_6001[] = { &pci_ss_info_1013_6001_1014_1010, @@ -34644,6 +42761,7 @@ }; static const pciSubsystemInfo *pci_ss_list_1013_6003[] = { &pci_ss_info_1013_6003_1013_4280, + &pci_ss_info_1013_6003_153b_1136, &pci_ss_info_1013_6003_1681_0050, &pci_ss_info_1013_6003_1681_a011, NULL @@ -34787,8 +42905,23 @@ #define pci_ss_list_1014_0266 NULL #define pci_ss_list_1014_0268 NULL #define pci_ss_list_1014_0269 NULL +static const pciSubsystemInfo *pci_ss_list_1014_028c[] = { + &pci_ss_info_1014_028c_1014_028d, + &pci_ss_info_1014_028c_1014_02be, + &pci_ss_info_1014_028c_1014_02c0, + &pci_ss_info_1014_028c_1014_030d, + NULL +}; +#define pci_ss_list_1014_02a1 NULL +static const pciSubsystemInfo *pci_ss_list_1014_02bd[] = { + &pci_ss_info_1014_02bd_1014_02c1, + &pci_ss_info_1014_02bd_1014_02c2, + NULL +}; #define pci_ss_list_1014_0302 NULL #define pci_ss_list_1014_0314 NULL +#define pci_ss_list_1014_3022 NULL +#define pci_ss_list_1014_4022 NULL #define pci_ss_list_1014_ffff NULL #endif #define pci_ss_list_1017_5343 NULL @@ -34804,6 +42937,7 @@ #define pci_ss_list_101c_9710 NULL #define pci_ss_list_101c_9712 NULL #define pci_ss_list_101c_c24a NULL +#define pci_ss_list_101e_0009 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_101e_1960[] = { &pci_ss_info_101e_1960_101e_0471, @@ -34818,6 +42952,7 @@ &pci_ss_info_101e_1960_1028_0475, &pci_ss_info_101e_1960_1028_0493, &pci_ss_info_101e_1960_1028_0511, + &pci_ss_info_101e_1960_103c_60e7, NULL }; #define pci_ss_list_101e_9010 NULL @@ -34850,6 +42985,8 @@ &pci_ss_info_1022_2000_1259_2454, &pci_ss_info_1022_2000_1259_2700, &pci_ss_info_1022_2000_1259_2701, + &pci_ss_info_1022_2000_1259_2702, + &pci_ss_info_1022_2000_1259_2703, &pci_ss_info_1022_2000_4c53_1000, &pci_ss_info_1022_2000_4c53_1010, &pci_ss_info_1022_2000_4c53_1020, @@ -34866,6 +43003,17 @@ #define pci_ss_list_1022_2003 NULL #define pci_ss_list_1022_2020 NULL #define pci_ss_list_1022_2040 NULL +#define pci_ss_list_1022_2081 NULL +#define pci_ss_list_1022_2082 NULL +#define pci_ss_list_1022_208f NULL +#define pci_ss_list_1022_2090 NULL +#define pci_ss_list_1022_2091 NULL +#define pci_ss_list_1022_2093 NULL +#define pci_ss_list_1022_2094 NULL +#define pci_ss_list_1022_2095 NULL +#define pci_ss_list_1022_2096 NULL +#define pci_ss_list_1022_2097 NULL +#define pci_ss_list_1022_209a NULL #define pci_ss_list_1022_3000 NULL #define pci_ss_list_1022_7006 NULL #define pci_ss_list_1022_7007 NULL @@ -34904,6 +43052,8 @@ #define pci_ss_list_1022_7451 NULL #define pci_ss_list_1022_7454 NULL #define pci_ss_list_1022_7455 NULL +#define pci_ss_list_1022_7458 NULL +#define pci_ss_list_1022_7459 NULL static const pciSubsystemInfo *pci_ss_list_1022_7460[] = { &pci_ss_info_1022_7460_161f_3017, NULL @@ -34919,6 +43069,7 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_1022_7469[] = { + &pci_ss_info_1022_7469_1022_2b80, &pci_ss_info_1022_7469_161f_3017, NULL }; @@ -34940,6 +43091,7 @@ NULL }; #define pci_ss_list_1023_2100 NULL +#define pci_ss_list_1023_2200 NULL static const pciSubsystemInfo *pci_ss_list_1023_8400[] = { &pci_ss_info_1023_8400_1023_8400, NULL @@ -34956,6 +43108,7 @@ }; static const pciSubsystemInfo *pci_ss_list_1023_8620[] = { &pci_ss_info_1023_8620_1014_0502, + &pci_ss_info_1023_8620_1014_1025, NULL }; #define pci_ss_list_1023_8820 NULL @@ -35102,6 +43255,7 @@ NULL }; #define pci_ss_list_1028_0014 NULL +#define pci_ss_list_1028_0015 NULL #define pci_ss_list_102a_0000 NULL #define pci_ss_list_102a_0010 NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -35238,6 +43392,14 @@ }; static const pciSubsystemInfo *pci_ss_list_102b_0527[] = { &pci_ss_info_102b_0527_102b_0840, + &pci_ss_info_102b_0527_102b_0850, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_102b_0528[] = { + &pci_ss_info_102b_0528_102b_1020, + &pci_ss_info_102b_0528_102b_1030, + &pci_ss_info_102b_0528_102b_14e1, + &pci_ss_info_102b_0528_102b_2021, NULL }; #define pci_ss_list_102b_0d10 NULL @@ -35263,7 +43425,23 @@ &pci_ss_info_102b_2527_102b_1e41, NULL }; -#define pci_ss_list_102b_2537 NULL +static const pciSubsystemInfo *pci_ss_list_102b_2537[] = { + &pci_ss_info_102b_2537_102b_1820, + &pci_ss_info_102b_2537_102b_1830, + &pci_ss_info_102b_2537_102b_1c10, + &pci_ss_info_102b_2537_102b_2811, + &pci_ss_info_102b_2537_102b_2c11, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_102b_2538[] = { + &pci_ss_info_102b_2538_102b_08c7, + &pci_ss_info_102b_2538_102b_0907, + &pci_ss_info_102b_2538_102b_1047, + &pci_ss_info_102b_2538_102b_1087, + &pci_ss_info_102b_2538_102b_2538, + &pci_ss_info_102b_2538_102b_3007, + NULL +}; #define pci_ss_list_102b_4536 NULL #define pci_ss_list_102b_6573 NULL #define pci_ss_list_102c_00b8 NULL @@ -35284,6 +43462,7 @@ #define pci_ss_list_102c_00e4 NULL static const pciSubsystemInfo *pci_ss_list_102c_00e5[] = { &pci_ss_info_102c_00e5_0e11_b049, + &pci_ss_info_102c_00e5_1179_0001, NULL }; #define pci_ss_list_102c_00f0 NULL @@ -35336,9 +43515,13 @@ #define pci_ss_list_1033_002c NULL #define pci_ss_list_1033_002d NULL static const pciSubsystemInfo *pci_ss_list_1033_0035[] = { + &pci_ss_info_1033_0035_1033_0035, &pci_ss_info_1033_0035_1179_0001, &pci_ss_info_1033_0035_12ee_7000, + &pci_ss_info_1033_0035_14c2_0105, &pci_ss_info_1033_0035_1799_0001, + &pci_ss_info_1033_0035_1931_000a, + &pci_ss_info_1033_0035_1931_000b, &pci_ss_info_1033_0035_807d_0035, NULL }; @@ -35358,6 +43541,7 @@ &pci_ss_info_1033_0067_1010_0120, NULL }; +#define pci_ss_list_1033_0072 NULL static const pciSubsystemInfo *pci_ss_list_1033_0074[] = { &pci_ss_info_1033_0074_1033_8014, NULL @@ -35372,8 +43556,8 @@ #define pci_ss_list_1033_00ce NULL #define pci_ss_list_1033_00df NULL static const pciSubsystemInfo *pci_ss_list_1033_00e0[] = { - &pci_ss_info_1033_00e0_0ee4_3383, &pci_ss_info_1033_00e0_12ee_7001, + &pci_ss_info_1033_00e0_14c2_0205, &pci_ss_info_1033_00e0_1799_0002, &pci_ss_info_1033_00e0_807d_1043, NULL @@ -35385,13 +43569,19 @@ #define pci_ss_list_1036_0000 NULL #define pci_ss_list_1039_0001 NULL #define pci_ss_list_1039_0002 NULL +#define pci_ss_list_1039_0003 NULL +#define pci_ss_list_1039_0004 NULL #define pci_ss_list_1039_0006 NULL #define pci_ss_list_1039_0008 NULL #define pci_ss_list_1039_0009 NULL +#define pci_ss_list_1039_000a NULL #define pci_ss_list_1039_0016 NULL #define pci_ss_list_1039_0018 NULL #define pci_ss_list_1039_0180 NULL #define pci_ss_list_1039_0181 NULL +#define pci_ss_list_1039_0182 NULL +#define pci_ss_list_1039_0190 NULL +#define pci_ss_list_1039_0191 NULL static const pciSubsystemInfo *pci_ss_list_1039_0200[] = { &pci_ss_info_1039_0200_1039_0000, NULL @@ -35434,6 +43624,7 @@ #define pci_ss_list_1039_0746 NULL #define pci_ss_list_1039_0755 NULL #define pci_ss_list_1039_0760 NULL +#define pci_ss_list_1039_0761 NULL static const pciSubsystemInfo *pci_ss_list_1039_0900[] = { &pci_ss_info_1039_0900_1019_0a14, &pci_ss_info_1039_0900_1039_0900, @@ -35494,6 +43685,7 @@ static const pciSubsystemInfo *pci_ss_list_1039_7001[] = { &pci_ss_info_1039_7001_1019_0a14, &pci_ss_info_1039_7001_1039_7000, + &pci_ss_info_1039_7001_1462_5470, NULL }; static const pciSubsystemInfo *pci_ss_list_1039_7002[] = { @@ -35501,7 +43693,10 @@ NULL }; #define pci_ss_list_1039_7007 NULL -#define pci_ss_list_1039_7012 NULL +static const pciSubsystemInfo *pci_ss_list_1039_7012[] = { + &pci_ss_info_1039_7012_15bd_1001, + NULL +}; #define pci_ss_list_1039_7013 NULL static const pciSubsystemInfo *pci_ss_list_1039_7016[] = { &pci_ss_info_1039_7016_1039_7016, @@ -35568,6 +43763,7 @@ &pci_ss_info_103c_1048_103c_1226, &pci_ss_info_103c_1048_103c_1227, &pci_ss_info_103c_1048_103c_1282, + &pci_ss_info_103c_1048_103c_1301, NULL }; #define pci_ss_list_103c_1054 NULL @@ -35587,21 +43783,37 @@ #define pci_ss_list_103c_122e NULL #define pci_ss_list_103c_127c NULL #define pci_ss_list_103c_1290 NULL +#define pci_ss_list_103c_1291 NULL #define pci_ss_list_103c_12b4 NULL +#define pci_ss_list_103c_12fa NULL #define pci_ss_list_103c_2910 NULL #define pci_ss_list_103c_2925 NULL +#define pci_ss_list_103c_3080 NULL +#define pci_ss_list_103c_3220 NULL +#define pci_ss_list_103c_3230 NULL #define pci_ss_list_1042_1000 NULL #define pci_ss_list_1042_1001 NULL #define pci_ss_list_1042_3000 NULL #define pci_ss_list_1042_3010 NULL #define pci_ss_list_1042_3020 NULL -#define pci_ss_list_1043_0675 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1043_0675[] = { + &pci_ss_info_1043_0675_0675_1704, + &pci_ss_info_1043_0675_0675_1707, + &pci_ss_info_1043_0675_10cf_105e, + NULL +}; #define pci_ss_list_1043_4015 NULL #define pci_ss_list_1043_4021 NULL #define pci_ss_list_1043_4057 NULL #define pci_ss_list_1043_8043 NULL #define pci_ss_list_1043_807b NULL #define pci_ss_list_1043_80bb NULL +#define pci_ss_list_1043_80c5 NULL +#define pci_ss_list_1043_80df NULL +#define pci_ss_list_1043_8187 NULL +#define pci_ss_list_1043_8188 NULL +#endif #define pci_ss_list_1044_1012 NULL #define pci_ss_list_1044_a400 NULL #define pci_ss_list_1044_a500 NULL @@ -35646,6 +43858,7 @@ }; static const pciSubsystemInfo *pci_ss_list_1044_a511[] = { &pci_ss_info_1044_a511_1044_c032, + &pci_ss_info_1044_a511_1044_c035, NULL }; #endif @@ -35675,7 +43888,12 @@ #define pci_ss_list_1048_0d22 NULL #define pci_ss_list_1048_1000 NULL #define pci_ss_list_1048_3000 NULL -#define pci_ss_list_1048_8901 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1048_8901[] = { + &pci_ss_info_1048_8901_1048_0935, + NULL +}; +#endif #define pci_ss_list_104a_0008 NULL #define pci_ss_list_104a_0009 NULL #define pci_ss_list_104a_0010 NULL @@ -35705,7 +43923,11 @@ &pci_ss_info_104c_3d07_1040_0011, &pci_ss_info_104c_3d07_1048_0a31, &pci_ss_info_104c_3d07_1048_0a32, + &pci_ss_info_104c_3d07_1048_0a34, &pci_ss_info_104c_3d07_1048_0a35, + &pci_ss_info_104c_3d07_1048_0a36, + &pci_ss_info_104c_3d07_1048_0a43, + &pci_ss_info_104c_3d07_1048_0a44, &pci_ss_info_104c_3d07_107d_2633, &pci_ss_info_104c_3d07_1092_0127, &pci_ss_info_104c_3d07_1092_0136, @@ -35739,46 +43961,101 @@ &pci_ss_info_104c_8019_e4bf_1010, NULL }; -#define pci_ss_list_104c_8020 NULL +static const pciSubsystemInfo *pci_ss_list_104c_8020[] = { + &pci_ss_info_104c_8020_11bd_000f, + NULL +}; static const pciSubsystemInfo *pci_ss_list_104c_8021[] = { &pci_ss_info_104c_8021_104d_80df, &pci_ss_info_104c_8021_104d_80e7, NULL }; #define pci_ss_list_104c_8022 NULL -#define pci_ss_list_104c_8023 NULL +static const pciSubsystemInfo *pci_ss_list_104c_8023[] = { + &pci_ss_info_104c_8023_103c_088c, + &pci_ss_info_104c_8023_1043_808b, + NULL +}; #define pci_ss_list_104c_8024 NULL static const pciSubsystemInfo *pci_ss_list_104c_8025[] = { - &pci_ss_info_104c_8025_55aa_55aa, + &pci_ss_info_104c_8025_1458_1000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_104c_8026[] = { + &pci_ss_info_104c_8026_103c_006a, + &pci_ss_info_104c_8026_1043_808d, NULL }; -#define pci_ss_list_104c_8026 NULL static const pciSubsystemInfo *pci_ss_list_104c_8027[] = { &pci_ss_info_104c_8027_1028_00e6, NULL }; static const pciSubsystemInfo *pci_ss_list_104c_8029[] = { &pci_ss_info_104c_8029_1028_0163, + &pci_ss_info_104c_8029_1028_0196, &pci_ss_info_104c_8029_1071_8160, NULL }; +static const pciSubsystemInfo *pci_ss_list_104c_802b[] = { + &pci_ss_info_104c_802b_1028_0139, + &pci_ss_info_104c_802b_1028_014e, + NULL +}; #define pci_ss_list_104c_802e NULL -#define pci_ss_list_104c_8201 NULL -static const pciSubsystemInfo *pci_ss_list_104c_8400[] = { - &pci_ss_info_104c_8400_00fc_16ec, - &pci_ss_info_104c_8400_00fd_16ec, +static const pciSubsystemInfo *pci_ss_list_104c_8031[] = { + &pci_ss_info_104c_8031_103c_099c, + &pci_ss_info_104c_8031_103c_308b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_104c_8032[] = { + &pci_ss_info_104c_8032_103c_099c, + &pci_ss_info_104c_8032_103c_308b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_104c_8033[] = { + &pci_ss_info_104c_8033_103c_099c, + &pci_ss_info_104c_8033_103c_308b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_104c_8034[] = { + &pci_ss_info_104c_8034_103c_099c, + &pci_ss_info_104c_8034_103c_308b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_104c_8035[] = { + &pci_ss_info_104c_8035_103c_099c, + NULL +}; +#define pci_ss_list_104c_8036 NULL +#define pci_ss_list_104c_8038 NULL +#define pci_ss_list_104c_8201 NULL +static const pciSubsystemInfo *pci_ss_list_104c_8204[] = { + &pci_ss_info_104c_8204_1028_0139, + &pci_ss_info_104c_8204_1028_014e, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_104c_8400[] = { &pci_ss_info_104c_8400_1186_3b00, &pci_ss_info_104c_8400_1186_3b01, + &pci_ss_info_104c_8400_16ab_8501, NULL }; #define pci_ss_list_104c_8401 NULL #define pci_ss_list_104c_9000 NULL -#define pci_ss_list_104c_9066 NULL +#define pci_ss_list_104c_9065 NULL +static const pciSubsystemInfo *pci_ss_list_104c_9066[] = { + &pci_ss_info_104c_9066_104c_9066, + &pci_ss_info_104c_9066_1186_3b04, + &pci_ss_info_104c_9066_1186_3b05, + &pci_ss_info_104c_9066_13d1_aba0, + NULL +}; #define pci_ss_list_104c_a001 NULL #define pci_ss_list_104c_a100 NULL #define pci_ss_list_104c_a102 NULL static const pciSubsystemInfo *pci_ss_list_104c_a106[] = { &pci_ss_info_104c_a106_175c_5000, + &pci_ss_info_104c_a106_175c_6400, &pci_ss_info_104c_a106_175c_8700, NULL }; @@ -35797,6 +44074,7 @@ #define pci_ss_list_104c_ac1a NULL static const pciSubsystemInfo *pci_ss_list_104c_ac1b[] = { &pci_ss_info_104c_ac1b_0e11_b113, + &pci_ss_info_104c_ac1b_1014_0130, NULL }; static const pciSubsystemInfo *pci_ss_list_104c_ac1c[] = { @@ -35821,16 +44099,29 @@ }; static const pciSubsystemInfo *pci_ss_list_104c_ac44[] = { &pci_ss_info_104c_ac44_1028_0163, + &pci_ss_info_104c_ac44_1028_0196, &pci_ss_info_104c_ac44_1071_8160, NULL }; #define pci_ss_list_104c_ac46 NULL +static const pciSubsystemInfo *pci_ss_list_104c_ac47[] = { + &pci_ss_info_104c_ac47_1028_0139, + &pci_ss_info_104c_ac47_1028_014e, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_104c_ac4a[] = { + &pci_ss_info_104c_ac4a_1028_0139, + &pci_ss_info_104c_ac4a_1028_014e, + NULL +}; #define pci_ss_list_104c_ac50 NULL static const pciSubsystemInfo *pci_ss_list_104c_ac51[] = { + &pci_ss_info_104c_ac51_0e11_004e, &pci_ss_info_104c_ac51_1014_023b, &pci_ss_info_104c_ac51_1028_00b1, &pci_ss_info_104c_ac51_1028_012a, &pci_ss_info_104c_ac51_1033_80cd, + &pci_ss_info_104c_ac51_1095_10cf, &pci_ss_info_104c_ac51_10cf_1095, &pci_ss_info_104c_ac51_e4bf_1000, NULL @@ -35850,6 +44141,7 @@ &pci_ss_info_104c_ac60_175c_5100, &pci_ss_info_104c_ac60_175c_6100, &pci_ss_info_104c_ac60_175c_6200, + &pci_ss_info_104c_ac60_175c_8800, NULL }; #define pci_ss_list_104c_ac8d NULL @@ -35857,6 +44149,7 @@ #define pci_ss_list_104c_ac8f NULL #define pci_ss_list_104c_fe00 NULL #define pci_ss_list_104c_fe03 NULL +#define pci_ss_list_104d_8004 NULL #define pci_ss_list_104d_8009 NULL #define pci_ss_list_104d_8039 NULL #define pci_ss_list_104d_8056 NULL @@ -35878,7 +44171,15 @@ }; #define pci_ss_list_1050_0940 NULL #define pci_ss_list_1050_5a5a NULL -#define pci_ss_list_1050_6692 NULL +static const pciSubsystemInfo *pci_ss_list_1050_6692[] = { + &pci_ss_info_1050_6692_1043_1702, + &pci_ss_info_1050_6692_1043_1703, + &pci_ss_info_1050_6692_1043_1707, + &pci_ss_info_1050_6692_144f_1702, + &pci_ss_info_1050_6692_144f_1703, + &pci_ss_info_1050_6692_144f_1707, + NULL +}; #define pci_ss_list_1050_9921 NULL #define pci_ss_list_1050_9922 NULL #define pci_ss_list_1050_9970 NULL @@ -35910,11 +44211,36 @@ &pci_ss_info_1057_1801_175c_4200, &pci_ss_info_1057_1801_175c_4300, &pci_ss_info_1057_1801_175c_4400, + &pci_ss_info_1057_1801_ecc0_0010, + &pci_ss_info_1057_1801_ecc0_0020, &pci_ss_info_1057_1801_ecc0_0030, + &pci_ss_info_1057_1801_ecc0_0031, + &pci_ss_info_1057_1801_ecc0_0040, + &pci_ss_info_1057_1801_ecc0_0041, + &pci_ss_info_1057_1801_ecc0_0050, + &pci_ss_info_1057_1801_ecc0_0051, + &pci_ss_info_1057_1801_ecc0_0070, + &pci_ss_info_1057_1801_ecc0_0071, + &pci_ss_info_1057_1801_ecc0_0072, NULL }; #define pci_ss_list_1057_18c0 NULL #define pci_ss_list_1057_18c1 NULL +static const pciSubsystemInfo *pci_ss_list_1057_3410[] = { + &pci_ss_info_1057_3410_ecc0_0050, + &pci_ss_info_1057_3410_ecc0_0051, + &pci_ss_info_1057_3410_ecc0_0060, + &pci_ss_info_1057_3410_ecc0_0070, + &pci_ss_info_1057_3410_ecc0_0071, + &pci_ss_info_1057_3410_ecc0_0072, + &pci_ss_info_1057_3410_ecc0_0080, + &pci_ss_info_1057_3410_ecc0_0081, + &pci_ss_info_1057_3410_ecc0_0090, + &pci_ss_info_1057_3410_ecc0_00a0, + &pci_ss_info_1057_3410_ecc0_00b0, + &pci_ss_info_1057_3410_ecc0_0100, + NULL +}; #define pci_ss_list_1057_4801 NULL #define pci_ss_list_1057_4802 NULL #define pci_ss_list_1057_4803 NULL @@ -35940,7 +44266,10 @@ &pci_ss_info_1057_5600_1668_0302, NULL }; +#define pci_ss_list_1057_5608 NULL #define pci_ss_list_1057_5803 NULL +#define pci_ss_list_1057_5806 NULL +#define pci_ss_list_1057_5808 NULL #define pci_ss_list_1057_6400 NULL #define pci_ss_list_1057_6405 NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -35969,8 +44298,16 @@ &pci_ss_info_105a_3376_1043_809e, NULL }; +#define pci_ss_list_105a_3515 NULL +#define pci_ss_list_105a_3519 NULL +#define pci_ss_list_105a_3570 NULL +#define pci_ss_list_105a_3571 NULL #define pci_ss_list_105a_3574 NULL +#define pci_ss_list_105a_3577 NULL +#define pci_ss_list_105a_3d17 NULL #define pci_ss_list_105a_3d18 NULL +#define pci_ss_list_105a_3d73 NULL +#define pci_ss_list_105a_3d75 NULL static const pciSubsystemInfo *pci_ss_list_105a_4d30[] = { &pci_ss_info_105a_4d30_105a_4d33, &pci_ss_info_105a_4d30_105a_4d39, @@ -35995,6 +44332,7 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_105a_5275[] = { + &pci_ss_info_105a_5275_1043_807e, &pci_ss_info_105a_5275_105a_0275, &pci_ss_info_105a_5275_105a_1275, &pci_ss_info_105a_5275_1458_b001, @@ -36011,9 +44349,11 @@ }; #define pci_ss_list_105a_6621 NULL #define pci_ss_list_105a_6622 NULL +#define pci_ss_list_105a_6624 NULL #define pci_ss_list_105a_6626 NULL #define pci_ss_list_105a_6629 NULL #define pci_ss_list_105a_7275 NULL +#define pci_ss_list_105a_8002 NULL #endif #define pci_ss_list_105d_2309 NULL static const pciSubsystemInfo *pci_ss_list_105d_2339[] = { @@ -36094,22 +44434,42 @@ #define pci_ss_list_1069_0002 NULL #define pci_ss_list_1069_0010 NULL #define pci_ss_list_1069_0020 NULL -#define pci_ss_list_1069_0050 NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1069_0050[] = { + &pci_ss_info_1069_0050_1069_0050, + &pci_ss_info_1069_0050_1069_0052, + &pci_ss_info_1069_0050_1069_0054, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1069_b166[] = { &pci_ss_info_1069_b166_1014_0242, &pci_ss_info_1069_b166_1014_0266, &pci_ss_info_1069_b166_1014_0278, + &pci_ss_info_1069_b166_1014_02d3, + &pci_ss_info_1069_b166_1014_02d4, + &pci_ss_info_1069_b166_1069_0200, + &pci_ss_info_1069_b166_1069_0202, + &pci_ss_info_1069_b166_1069_0204, + &pci_ss_info_1069_b166_1069_0206, NULL }; #define pci_ss_list_1069_ba55 NULL -#define pci_ss_list_1069_ba56 NULL +static const pciSubsystemInfo *pci_ss_list_1069_ba56[] = { + &pci_ss_info_1069_ba56_1069_0030, + &pci_ss_info_1069_ba56_1069_0040, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1069_ba57[] = { + &pci_ss_info_1069_ba57_1069_0072, + NULL +}; #endif #define pci_ss_list_106b_0001 NULL #define pci_ss_list_106b_0002 NULL #define pci_ss_list_106b_0003 NULL #define pci_ss_list_106b_0004 NULL #define pci_ss_list_106b_0007 NULL +#define pci_ss_list_106b_000c NULL #define pci_ss_list_106b_000e NULL #define pci_ss_list_106b_0010 NULL #define pci_ss_list_106b_0017 NULL @@ -36130,7 +44490,11 @@ #define pci_ss_list_106b_002e NULL #define pci_ss_list_106b_002f NULL #define pci_ss_list_106b_0030 NULL -#define pci_ss_list_106b_0031 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_106b_0031[] = { + &pci_ss_info_106b_0031_106b_5811, + NULL +}; #define pci_ss_list_106b_0032 NULL #define pci_ss_list_106b_0033 NULL #define pci_ss_list_106b_0034 NULL @@ -36158,7 +44522,15 @@ #define pci_ss_list_106b_0054 NULL #define pci_ss_list_106b_0055 NULL #define pci_ss_list_106b_0058 NULL +#define pci_ss_list_106b_0059 NULL +#define pci_ss_list_106b_0066 NULL +#define pci_ss_list_106b_0067 NULL +#define pci_ss_list_106b_0068 NULL +#define pci_ss_list_106b_0069 NULL +#define pci_ss_list_106b_006a NULL +#define pci_ss_list_106b_006b NULL #define pci_ss_list_106b_1645 NULL +#endif #define pci_ss_list_106c_8801 NULL #define pci_ss_list_106c_8802 NULL #define pci_ss_list_106c_8803 NULL @@ -36234,6 +44606,15 @@ }; #define pci_ss_list_1077_2300 NULL #define pci_ss_list_1077_2312 NULL +#define pci_ss_list_1077_2322 NULL +#define pci_ss_list_1077_2422 NULL +#define pci_ss_list_1077_2432 NULL +#define pci_ss_list_1077_3010 NULL +#define pci_ss_list_1077_3022 NULL +#define pci_ss_list_1077_4010 NULL +#define pci_ss_list_1077_4022 NULL +#define pci_ss_list_1077_6312 NULL +#define pci_ss_list_1077_6322 NULL #endif #define pci_ss_list_1078_0000 NULL #define pci_ss_list_1078_0001 NULL @@ -36312,6 +44693,7 @@ #define pci_ss_list_108e_1101 NULL #define pci_ss_list_108e_1102 NULL #define pci_ss_list_108e_1103 NULL +#define pci_ss_list_108e_1648 NULL #define pci_ss_list_108e_2bad NULL #define pci_ss_list_108e_5000 NULL #define pci_ss_list_108e_5043 NULL @@ -36356,6 +44738,7 @@ #define pci_ss_list_1093_1170 NULL #define pci_ss_list_1093_1180 NULL #define pci_ss_list_1093_1190 NULL +#define pci_ss_list_1093_1310 NULL #define pci_ss_list_1093_1330 NULL #define pci_ss_list_1093_1350 NULL #define pci_ss_list_1093_14e0 NULL @@ -36371,6 +44754,8 @@ #define pci_ss_list_1093_2a80 NULL #define pci_ss_list_1093_2c80 NULL #define pci_ss_list_1093_2ca0 NULL +#define pci_ss_list_1093_70a9 NULL +#define pci_ss_list_1093_70b8 NULL #define pci_ss_list_1093_b001 NULL #define pci_ss_list_1093_b011 NULL #define pci_ss_list_1093_b021 NULL @@ -36388,8 +44773,11 @@ #define pci_ss_list_1095_0643 NULL #define pci_ss_list_1095_0646 NULL #define pci_ss_list_1095_0647 NULL -#define pci_ss_list_1095_0648 NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1095_0648[] = { + &pci_ss_info_1095_0648_1043_8025, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1095_0649[] = { &pci_ss_info_1095_0649_0e11_005d, &pci_ss_info_1095_0649_0e11_007e, @@ -36409,6 +44797,7 @@ static const pciSubsystemInfo *pci_ss_list_1095_3112[] = { &pci_ss_info_1095_3112_1095_3112, &pci_ss_info_1095_3112_1095_6112, + &pci_ss_info_1095_3112_9005_0250, NULL }; static const pciSubsystemInfo *pci_ss_list_1095_3114[] = { @@ -36420,6 +44809,7 @@ &pci_ss_info_1095_3124_1095_3124, NULL }; +#define pci_ss_list_1095_3132 NULL static const pciSubsystemInfo *pci_ss_list_1095_3512[] = { &pci_ss_info_1095_3512_1095_3512, &pci_ss_info_1095_3512_1095_6512, @@ -36428,6 +44818,7 @@ #endif #define pci_ss_list_1098_0001 NULL #define pci_ss_list_1098_0002 NULL +#define pci_ss_list_109e_032e NULL #define pci_ss_list_109e_0350 NULL #define pci_ss_list_109e_0351 NULL static const pciSubsystemInfo *pci_ss_list_109e_0369[] = { @@ -36452,6 +44843,7 @@ &pci_ss_info_109e_036e_127a_0048, &pci_ss_info_109e_036e_144f_3000, &pci_ss_info_109e_036e_1461_0002, + &pci_ss_info_109e_036e_1461_0003, &pci_ss_info_109e_036e_1461_0004, &pci_ss_info_109e_036e_1461_0761, &pci_ss_info_109e_036e_14f1_0001, @@ -36462,6 +44854,7 @@ &pci_ss_info_109e_036e_1851_1850, &pci_ss_info_109e_036e_1851_1851, &pci_ss_info_109e_036e_1852_1852, + &pci_ss_info_109e_036e_18ac_d500, &pci_ss_info_109e_036e_270f_fc00, &pci_ss_info_109e_036e_bd11_1200, NULL @@ -36518,6 +44911,7 @@ &pci_ss_info_109e_0878_127a_0048, &pci_ss_info_109e_0878_13e9_0070, &pci_ss_info_109e_0878_144f_3000, + &pci_ss_info_109e_0878_1461_0002, &pci_ss_info_109e_0878_1461_0004, &pci_ss_info_109e_0878_1461_0761, &pci_ss_info_109e_0878_14f1_0001, @@ -36525,6 +44919,7 @@ &pci_ss_info_109e_0878_14f1_0003, &pci_ss_info_109e_0878_14f1_0048, &pci_ss_info_109e_0878_1822_0001, + &pci_ss_info_109e_0878_18ac_d500, &pci_ss_info_109e_0878_270f_fc00, &pci_ss_info_109e_0878_bd11_1200, NULL @@ -36596,8 +44991,12 @@ #define pci_ss_list_10a9_100a NULL #define pci_ss_list_10a9_2001 NULL #define pci_ss_list_10a9_2002 NULL +#define pci_ss_list_10a9_4001 NULL +#define pci_ss_list_10a9_4002 NULL #define pci_ss_list_10a9_8001 NULL #define pci_ss_list_10a9_8002 NULL +#define pci_ss_list_10a9_8010 NULL +#define pci_ss_list_10a9_8018 NULL #endif #define pci_ss_list_10aa_0000 NULL #define pci_ss_list_10ad_0001 NULL @@ -36615,18 +45014,43 @@ }; #endif #define pci_ss_list_10b5_0001 NULL +#define pci_ss_list_10b5_1042 NULL #define pci_ss_list_10b5_1076 NULL #define pci_ss_list_10b5_1077 NULL #define pci_ss_list_10b5_1078 NULL #define pci_ss_list_10b5_1103 NULL #define pci_ss_list_10b5_1146 NULL #define pci_ss_list_10b5_1147 NULL +#define pci_ss_list_10b5_2540 NULL #define pci_ss_list_10b5_2724 NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_10b5_6540[] = { + &pci_ss_info_10b5_6540_4c53_10e0, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10b5_6541[] = { + &pci_ss_info_10b5_6541_4c53_10e0, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10b5_6542[] = { + &pci_ss_info_10b5_6542_4c53_10e0, + NULL +}; +#define pci_ss_list_10b5_8111 NULL +#define pci_ss_list_10b5_8114 NULL +#define pci_ss_list_10b5_8516 NULL +#define pci_ss_list_10b5_8532 NULL static const pciSubsystemInfo *pci_ss_list_10b5_9030[] = { &pci_ss_info_10b5_9030_10b5_2862, &pci_ss_info_10b5_9030_10b5_2906, &pci_ss_info_10b5_9030_10b5_2940, + &pci_ss_info_10b5_9030_10b5_2977, + &pci_ss_info_10b5_9030_10b5_2978, + &pci_ss_info_10b5_9030_10b5_3025, + &pci_ss_info_10b5_9030_10b5_3068, + &pci_ss_info_10b5_9030_1397_3136, + &pci_ss_info_10b5_9030_1397_3137, + &pci_ss_info_10b5_9030_1518_0200, &pci_ss_info_10b5_9030_15ed_1002, &pci_ss_info_10b5_9030_15ed_1003, NULL @@ -36680,6 +45104,7 @@ &pci_ss_info_10b5_9054_10b5_2696, &pci_ss_info_10b5_9054_10b5_2717, &pci_ss_info_10b5_9054_10b5_2844, + &pci_ss_info_10b5_9054_12c7_4001, &pci_ss_info_10b5_9054_12d9_0002, &pci_ss_info_10b5_9054_16df_0011, &pci_ss_info_10b5_9054_16df_0012, @@ -36986,6 +45411,7 @@ }; #define pci_ss_list_10b9_1543 NULL #define pci_ss_list_10b9_1563 NULL +#define pci_ss_list_10b9_1573 NULL #define pci_ss_list_10b9_1621 NULL #define pci_ss_list_10b9_1631 NULL #define pci_ss_list_10b9_1632 NULL @@ -36999,6 +45425,8 @@ #define pci_ss_list_10b9_1681 NULL #define pci_ss_list_10b9_1687 NULL #define pci_ss_list_10b9_1689 NULL +#define pci_ss_list_10b9_1695 NULL +#define pci_ss_list_10b9_1697 NULL #define pci_ss_list_10b9_3141 NULL #define pci_ss_list_10b9_3143 NULL #define pci_ss_list_10b9_3145 NULL @@ -37013,6 +45441,7 @@ #define pci_ss_list_10b9_5217 NULL #define pci_ss_list_10b9_5219 NULL #define pci_ss_list_10b9_5225 NULL +#define pci_ss_list_10b9_5228 NULL static const pciSubsystemInfo *pci_ss_list_10b9_5229[] = { &pci_ss_info_10b9_5229_1014_050f, &pci_ss_info_10b9_5229_1014_053d, @@ -37024,6 +45453,7 @@ static const pciSubsystemInfo *pci_ss_list_10b9_5237[] = { &pci_ss_info_10b9_5237_1014_0540, &pci_ss_info_10b9_5237_103c_0024, + &pci_ss_info_10b9_5237_104d_810f, NULL }; #define pci_ss_list_10b9_5239 NULL @@ -37031,11 +45461,18 @@ #define pci_ss_list_10b9_5246 NULL #define pci_ss_list_10b9_5247 NULL #define pci_ss_list_10b9_5249 NULL +#define pci_ss_list_10b9_524b NULL +#define pci_ss_list_10b9_524c NULL +#define pci_ss_list_10b9_524d NULL +#define pci_ss_list_10b9_524e NULL #define pci_ss_list_10b9_5251 NULL #define pci_ss_list_10b9_5253 NULL #define pci_ss_list_10b9_5261 NULL #define pci_ss_list_10b9_5263 NULL #define pci_ss_list_10b9_5281 NULL +#define pci_ss_list_10b9_5287 NULL +#define pci_ss_list_10b9_5288 NULL +#define pci_ss_list_10b9_5289 NULL #define pci_ss_list_10b9_5450 NULL static const pciSubsystemInfo *pci_ss_list_10b9_5451[] = { &pci_ss_info_10b9_5451_1014_0506, @@ -37053,6 +45490,7 @@ }; #define pci_ss_list_10b9_5459 NULL #define pci_ss_list_10b9_545a NULL +#define pci_ss_list_10b9_5461 NULL #define pci_ss_list_10b9_5471 NULL #define pci_ss_list_10b9_5473 NULL static const pciSubsystemInfo *pci_ss_list_10b9_7101[] = { @@ -37134,6 +45572,7 @@ #define pci_ss_list_10cd_2500 NULL #endif #define pci_ss_list_10cf_2001 NULL +#define pci_ss_list_10d9_0431 NULL #define pci_ss_list_10d9_0512 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_10d9_0531[] = { @@ -37141,6 +45580,7 @@ NULL }; #define pci_ss_list_10d9_8625 NULL +#define pci_ss_list_10d9_8626 NULL #define pci_ss_list_10d9_8888 NULL #endif #define pci_ss_list_10da_0508 NULL @@ -37150,13 +45590,16 @@ #define pci_ss_list_10dc_0021 NULL #define pci_ss_list_10dc_0022 NULL #define pci_ss_list_10dc_10dc NULL +#define pci_ss_list_10dd_0100 NULL #define pci_ss_list_10de_0008 NULL #define pci_ss_list_10de_0009 NULL #define pci_ss_list_10de_0010 NULL static const pciSubsystemInfo *pci_ss_list_10de_0020[] = { &pci_ss_info_10de_0020_1043_0200, &pci_ss_info_10de_0020_1048_0c18, + &pci_ss_info_10de_0020_1048_0c19, &pci_ss_info_10de_0020_1048_0c1b, + &pci_ss_info_10de_0020_1048_0c1c, &pci_ss_info_10de_0020_1092_0550, &pci_ss_info_10de_0020_1092_0552, &pci_ss_info_10de_0020_1092_4804, @@ -37183,7 +45626,14 @@ &pci_ss_info_10de_0028_1043_0205, &pci_ss_info_10de_0028_1043_4000, &pci_ss_info_10de_0028_1048_0c21, + &pci_ss_info_10de_0028_1048_0c28, + &pci_ss_info_10de_0028_1048_0c29, + &pci_ss_info_10de_0028_1048_0c2a, + &pci_ss_info_10de_0028_1048_0c2b, &pci_ss_info_10de_0028_1048_0c31, + &pci_ss_info_10de_0028_1048_0c32, + &pci_ss_info_10de_0028_1048_0c33, + &pci_ss_info_10de_0028_1048_0c34, &pci_ss_info_10de_0028_107d_2134, &pci_ss_info_10de_0028_1092_4804, &pci_ss_info_10de_0028_1092_4a00, @@ -37202,6 +45652,9 @@ &pci_ss_info_10de_0029_1043_0200, &pci_ss_info_10de_0029_1043_0201, &pci_ss_info_10de_0029_1043_0205, + &pci_ss_info_10de_0029_1048_0c2e, + &pci_ss_info_10de_0029_1048_0c2f, + &pci_ss_info_10de_0029_1048_0c30, &pci_ss_info_10de_0029_1102_1021, &pci_ss_info_10de_0029_1102_1029, &pci_ss_info_10de_0029_1102_102f, @@ -37213,6 +45666,8 @@ static const pciSubsystemInfo *pci_ss_list_10de_002c[] = { &pci_ss_info_10de_002c_1043_0200, &pci_ss_info_10de_002c_1043_0201, + &pci_ss_info_10de_002c_1048_0c20, + &pci_ss_info_10de_002c_1048_0c21, &pci_ss_info_10de_002c_1092_6820, &pci_ss_info_10de_002c_1102_1031, &pci_ss_info_10de_002c_1102_1034, @@ -37223,12 +45678,14 @@ &pci_ss_info_10de_002d_1043_0200, &pci_ss_info_10de_002d_1043_0201, &pci_ss_info_10de_002d_1048_0c3a, + &pci_ss_info_10de_002d_1048_0c3b, &pci_ss_info_10de_002d_10de_001e, &pci_ss_info_10de_002d_1102_1023, &pci_ss_info_10de_002d_1102_1024, &pci_ss_info_10de_002d_1102_102c, &pci_ss_info_10de_002d_1462_8808, &pci_ss_info_10de_002d_1554_1041, + &pci_ss_info_10de_002d_1569_002d, NULL }; #define pci_ss_list_10de_002e NULL @@ -37244,24 +45701,80 @@ #define pci_ss_list_10de_003d NULL #define pci_ss_list_10de_003e NULL #define pci_ss_list_10de_0040 NULL -#define pci_ss_list_10de_0041 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0041[] = { + &pci_ss_info_10de_0041_1043_817b, + NULL +}; #define pci_ss_list_10de_0042 NULL #define pci_ss_list_10de_0043 NULL #define pci_ss_list_10de_0045 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0047[] = { + &pci_ss_info_10de_0047_1682_2109, + NULL +}; #define pci_ss_list_10de_0049 NULL #define pci_ss_list_10de_004e NULL -#define pci_ss_list_10de_0052 NULL -#define pci_ss_list_10de_0053 NULL -#define pci_ss_list_10de_0054 NULL -#define pci_ss_list_10de_0055 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0050[] = { + &pci_ss_info_10de_0050_1043_815a, + &pci_ss_info_10de_0050_1458_0c11, + &pci_ss_info_10de_0050_1462_7100, + NULL +}; +#define pci_ss_list_10de_0051 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0052[] = { + &pci_ss_info_10de_0052_1043_815a, + &pci_ss_info_10de_0052_1458_0c11, + &pci_ss_info_10de_0052_1462_7100, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_0053[] = { + &pci_ss_info_10de_0053_1043_815a, + &pci_ss_info_10de_0053_1458_5002, + &pci_ss_info_10de_0053_1462_7100, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_0054[] = { + &pci_ss_info_10de_0054_1458_b003, + &pci_ss_info_10de_0054_1462_7100, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_0055[] = { + &pci_ss_info_10de_0055_1043_815a, + &pci_ss_info_10de_0055_1458_b003, + NULL +}; #define pci_ss_list_10de_0056 NULL -#define pci_ss_list_10de_0057 NULL -#define pci_ss_list_10de_0059 NULL -#define pci_ss_list_10de_005a NULL -#define pci_ss_list_10de_005b NULL +static const pciSubsystemInfo *pci_ss_list_10de_0057[] = { + &pci_ss_info_10de_0057_1043_8141, + &pci_ss_info_10de_0057_1458_e000, + &pci_ss_info_10de_0057_1462_7100, + NULL +}; +#define pci_ss_list_10de_0058 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0059[] = { + &pci_ss_info_10de_0059_1043_812a, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_005a[] = { + &pci_ss_info_10de_005a_1043_815a, + &pci_ss_info_10de_005a_1458_5004, + &pci_ss_info_10de_005a_1462_7100, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_005b[] = { + &pci_ss_info_10de_005b_1043_815a, + &pci_ss_info_10de_005b_1458_5004, + &pci_ss_info_10de_005b_1462_7100, + NULL +}; #define pci_ss_list_10de_005c NULL #define pci_ss_list_10de_005d NULL -#define pci_ss_list_10de_005e NULL +static const pciSubsystemInfo *pci_ss_list_10de_005e[] = { + &pci_ss_info_10de_005e_1458_5000, + &pci_ss_info_10de_005e_1462_7100, + NULL +}; +#define pci_ss_list_10de_005f NULL static const pciSubsystemInfo *pci_ss_list_10de_0060[] = { &pci_ss_info_10de_0060_1043_80ad, NULL @@ -37288,15 +45801,37 @@ #define pci_ss_list_10de_006c NULL #define pci_ss_list_10de_006d NULL #define pci_ss_list_10de_006e NULL -#define pci_ss_list_10de_0084 NULL -#define pci_ss_list_10de_0085 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0080[] = { + &pci_ss_info_10de_0080_147b_1c09, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_0084[] = { + &pci_ss_info_10de_0084_147b_1c09, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_0085[] = { + &pci_ss_info_10de_0085_147b_1c09, + NULL +}; #define pci_ss_list_10de_0086 NULL -#define pci_ss_list_10de_0087 NULL -#define pci_ss_list_10de_0088 NULL -#define pci_ss_list_10de_008a NULL +static const pciSubsystemInfo *pci_ss_list_10de_0087[] = { + &pci_ss_info_10de_0087_147b_1c09, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_0088[] = { + &pci_ss_info_10de_0088_147b_1c09, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_008a[] = { + &pci_ss_info_10de_008a_147b_1c09, + NULL +}; #define pci_ss_list_10de_008b NULL #define pci_ss_list_10de_008c NULL #define pci_ss_list_10de_008e NULL +#define pci_ss_list_10de_0091 NULL +#define pci_ss_list_10de_0092 NULL +#define pci_ss_list_10de_0099 NULL static const pciSubsystemInfo *pci_ss_list_10de_00a0[] = { &pci_ss_info_10de_00a0_14af_5810, NULL @@ -37305,6 +45840,9 @@ #define pci_ss_list_10de_00c1 NULL #define pci_ss_list_10de_00c2 NULL #define pci_ss_list_10de_00c8 NULL +#define pci_ss_list_10de_00c9 NULL +#define pci_ss_list_10de_00cc NULL +#define pci_ss_list_10de_00cd NULL #define pci_ss_list_10de_00ce NULL #define pci_ss_list_10de_00d0 NULL #define pci_ss_list_10de_00d1 NULL @@ -37315,25 +45853,64 @@ #define pci_ss_list_10de_00d6 NULL #define pci_ss_list_10de_00d7 NULL #define pci_ss_list_10de_00d8 NULL +#define pci_ss_list_10de_00d9 NULL #define pci_ss_list_10de_00da NULL #define pci_ss_list_10de_00dd NULL -#define pci_ss_list_10de_00df NULL -#define pci_ss_list_10de_00e1 NULL +static const pciSubsystemInfo *pci_ss_list_10de_00df[] = { + &pci_ss_info_10de_00df_147b_1c0b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_00e0[] = { + &pci_ss_info_10de_00e0_147b_1c0b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_00e1[] = { + &pci_ss_info_10de_00e1_147b_1c0b, + NULL +}; #define pci_ss_list_10de_00e2 NULL -#define pci_ss_list_10de_00e3 NULL -#define pci_ss_list_10de_00e4 NULL -#define pci_ss_list_10de_00e5 NULL +static const pciSubsystemInfo *pci_ss_list_10de_00e3[] = { + &pci_ss_info_10de_00e3_147b_1c0b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_00e4[] = { + &pci_ss_info_10de_00e4_147b_1c0b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_00e5[] = { + &pci_ss_info_10de_00e5_147b_1c0b, + NULL +}; #define pci_ss_list_10de_00e6 NULL -#define pci_ss_list_10de_00e7 NULL -#define pci_ss_list_10de_00e8 NULL -#define pci_ss_list_10de_00ea NULL +static const pciSubsystemInfo *pci_ss_list_10de_00e7[] = { + &pci_ss_info_10de_00e7_147b_1c0b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_00e8[] = { + &pci_ss_info_10de_00e8_147b_1c0b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_00ea[] = { + &pci_ss_info_10de_00ea_147b_1c0b, + NULL +}; #define pci_ss_list_10de_00ed NULL #define pci_ss_list_10de_00ee NULL #define pci_ss_list_10de_00f0 NULL -#define pci_ss_list_10de_00f1 NULL -#define pci_ss_list_10de_00f2 NULL +static const pciSubsystemInfo *pci_ss_list_10de_00f1[] = { + &pci_ss_info_10de_00f1_1043_81a6, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_10de_00f2[] = { + &pci_ss_info_10de_00f2_1682_211c, + NULL +}; +#define pci_ss_list_10de_00f3 NULL #define pci_ss_list_10de_00f8 NULL -#define pci_ss_list_10de_00f9 NULL +static const pciSubsystemInfo *pci_ss_list_10de_00f9[] = { + &pci_ss_info_10de_00f9_1682_2120, + NULL +}; #define pci_ss_list_10de_00fa NULL #define pci_ss_list_10de_00fb NULL #define pci_ss_list_10de_00fc NULL @@ -37345,6 +45922,9 @@ &pci_ss_info_10de_0100_1043_0201, &pci_ss_info_10de_0100_1043_4008, &pci_ss_info_10de_0100_1043_4009, + &pci_ss_info_10de_0100_1048_0c41, + &pci_ss_info_10de_0100_1048_0c43, + &pci_ss_info_10de_0100_1048_0c48, &pci_ss_info_10de_0100_1102_102d, &pci_ss_info_10de_0100_14af_5022, NULL @@ -37353,16 +45933,31 @@ &pci_ss_info_10de_0101_1043_0202, &pci_ss_info_10de_0101_1043_400a, &pci_ss_info_10de_0101_1043_400b, + &pci_ss_info_10de_0101_1048_0c42, &pci_ss_info_10de_0101_107d_2822, &pci_ss_info_10de_0101_1102_102e, &pci_ss_info_10de_0101_14af_5021, NULL }; -#define pci_ss_list_10de_0103 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0103[] = { + &pci_ss_info_10de_0103_1048_0c40, + &pci_ss_info_10de_0103_1048_0c44, + &pci_ss_info_10de_0103_1048_0c45, + &pci_ss_info_10de_0103_1048_0c4a, + &pci_ss_info_10de_0103_1048_0c4b, + NULL +}; static const pciSubsystemInfo *pci_ss_list_10de_0110[] = { &pci_ss_info_10de_0110_1043_4015, &pci_ss_info_10de_0110_1043_4031, + &pci_ss_info_10de_0110_1048_0c60, + &pci_ss_info_10de_0110_1048_0c61, + &pci_ss_info_10de_0110_1048_0c63, + &pci_ss_info_10de_0110_1048_0c64, + &pci_ss_info_10de_0110_1048_0c65, + &pci_ss_info_10de_0110_1048_0c66, &pci_ss_info_10de_0110_10de_0091, + &pci_ss_info_10de_0110_10de_00a1, &pci_ss_info_10de_0110_1462_8817, &pci_ss_info_10de_0110_14af_7102, &pci_ss_info_10de_0110_14af_7103, @@ -37371,8 +45966,22 @@ #define pci_ss_list_10de_0111 NULL #define pci_ss_list_10de_0112 NULL #define pci_ss_list_10de_0113 NULL +#define pci_ss_list_10de_0140 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0141[] = { + &pci_ss_info_10de_0141_1458_3124, + NULL +}; +#define pci_ss_list_10de_0142 NULL +#define pci_ss_list_10de_0144 NULL +#define pci_ss_list_10de_0145 NULL +#define pci_ss_list_10de_0146 NULL +#define pci_ss_list_10de_0148 NULL +#define pci_ss_list_10de_014e NULL +#define pci_ss_list_10de_014f NULL static const pciSubsystemInfo *pci_ss_list_10de_0150[] = { &pci_ss_info_10de_0150_1043_4016, + &pci_ss_info_10de_0150_1048_0c50, + &pci_ss_info_10de_0150_1048_0c52, &pci_ss_info_10de_0150_107d_2840, &pci_ss_info_10de_0150_107d_2842, &pci_ss_info_10de_0150_1462_8831, @@ -37388,11 +45997,17 @@ NULL }; #define pci_ss_list_10de_0153 NULL +#define pci_ss_list_10de_0161 NULL +#define pci_ss_list_10de_0164 NULL +#define pci_ss_list_10de_0165 NULL +#define pci_ss_list_10de_0167 NULL #define pci_ss_list_10de_0170 NULL static const pciSubsystemInfo *pci_ss_list_10de_0171[] = { &pci_ss_info_10de_0171_10b0_0002, + &pci_ss_info_10de_0171_10de_0008, &pci_ss_info_10de_0171_1462_8661, &pci_ss_info_10de_0171_1462_8730, + &pci_ss_info_10de_0171_1462_8852, &pci_ss_info_10de_0171_147b_8f00, NULL }; @@ -37446,7 +46061,10 @@ #define pci_ss_list_10de_01c1 NULL #define pci_ss_list_10de_01c2 NULL #define pci_ss_list_10de_01c3 NULL -#define pci_ss_list_10de_01e0 NULL +static const pciSubsystemInfo *pci_ss_list_10de_01e0[] = { + &pci_ss_info_10de_01e0_147b_1c09, + NULL +}; #define pci_ss_list_10de_01e8 NULL #define pci_ss_list_10de_01ea NULL #define pci_ss_list_10de_01eb NULL @@ -37457,6 +46075,7 @@ #define pci_ss_list_10de_01f0 NULL static const pciSubsystemInfo *pci_ss_list_10de_0200[] = { &pci_ss_info_10de_0200_1043_402f, + &pci_ss_info_10de_0200_1048_0c70, NULL }; #define pci_ss_list_10de_0201 NULL @@ -37466,6 +46085,23 @@ NULL }; #define pci_ss_list_10de_0203 NULL +#define pci_ss_list_10de_0221 NULL +#define pci_ss_list_10de_0240 NULL +#define pci_ss_list_10de_0241 NULL +#define pci_ss_list_10de_0242 NULL +#define pci_ss_list_10de_0243 NULL +#define pci_ss_list_10de_0244 NULL +#define pci_ss_list_10de_0245 NULL +#define pci_ss_list_10de_0246 NULL +#define pci_ss_list_10de_0247 NULL +#define pci_ss_list_10de_0248 NULL +#define pci_ss_list_10de_0249 NULL +#define pci_ss_list_10de_024a NULL +#define pci_ss_list_10de_024b NULL +#define pci_ss_list_10de_024c NULL +#define pci_ss_list_10de_024d NULL +#define pci_ss_list_10de_024e NULL +#define pci_ss_list_10de_024f NULL #define pci_ss_list_10de_0250 NULL static const pciSubsystemInfo *pci_ss_list_10de_0251[] = { &pci_ss_info_10de_0251_1043_8023, @@ -37480,6 +46116,27 @@ #define pci_ss_list_10de_0258 NULL #define pci_ss_list_10de_0259 NULL #define pci_ss_list_10de_025b NULL +#define pci_ss_list_10de_0260 NULL +#define pci_ss_list_10de_0261 NULL +#define pci_ss_list_10de_0262 NULL +#define pci_ss_list_10de_0263 NULL +#define pci_ss_list_10de_0264 NULL +#define pci_ss_list_10de_0265 NULL +#define pci_ss_list_10de_0266 NULL +#define pci_ss_list_10de_0267 NULL +#define pci_ss_list_10de_0268 NULL +#define pci_ss_list_10de_0269 NULL +#define pci_ss_list_10de_026a NULL +#define pci_ss_list_10de_026b NULL +#define pci_ss_list_10de_026c NULL +#define pci_ss_list_10de_026d NULL +#define pci_ss_list_10de_026e NULL +#define pci_ss_list_10de_026f NULL +#define pci_ss_list_10de_0270 NULL +#define pci_ss_list_10de_0271 NULL +#define pci_ss_list_10de_0272 NULL +#define pci_ss_list_10de_027e NULL +#define pci_ss_list_10de_027f NULL #define pci_ss_list_10de_0280 NULL #define pci_ss_list_10de_0281 NULL #define pci_ss_list_10de_0282 NULL @@ -37487,6 +46144,23 @@ #define pci_ss_list_10de_0288 NULL #define pci_ss_list_10de_0289 NULL #define pci_ss_list_10de_028c NULL +#define pci_ss_list_10de_02a0 NULL +#define pci_ss_list_10de_02f0 NULL +#define pci_ss_list_10de_02f1 NULL +#define pci_ss_list_10de_02f2 NULL +#define pci_ss_list_10de_02f3 NULL +#define pci_ss_list_10de_02f4 NULL +#define pci_ss_list_10de_02f5 NULL +#define pci_ss_list_10de_02f6 NULL +#define pci_ss_list_10de_02f7 NULL +#define pci_ss_list_10de_02f8 NULL +#define pci_ss_list_10de_02f9 NULL +#define pci_ss_list_10de_02fa NULL +#define pci_ss_list_10de_02fb NULL +#define pci_ss_list_10de_02fc NULL +#define pci_ss_list_10de_02fd NULL +#define pci_ss_list_10de_02fe NULL +#define pci_ss_list_10de_02ff NULL #define pci_ss_list_10de_0300 NULL #define pci_ss_list_10de_0301 NULL #define pci_ss_list_10de_0302 NULL @@ -37511,10 +46185,12 @@ #define pci_ss_list_10de_0321 NULL static const pciSubsystemInfo *pci_ss_list_10de_0322[] = { &pci_ss_info_10de_0322_1462_9171, + &pci_ss_info_10de_0322_1462_9360, NULL }; #define pci_ss_list_10de_0323 NULL static const pciSubsystemInfo *pci_ss_list_10de_0324[] = { + &pci_ss_info_10de_0324_1028_0196, &pci_ss_info_10de_0324_1071_8160, NULL }; @@ -37543,24 +46219,48 @@ #define pci_ss_list_10de_0343 NULL #define pci_ss_list_10de_0344 NULL #define pci_ss_list_10de_0345 NULL -#define pci_ss_list_10de_0347 NULL +static const pciSubsystemInfo *pci_ss_list_10de_0347[] = { + &pci_ss_info_10de_0347_103c_006a, + NULL +}; #define pci_ss_list_10de_0348 NULL #define pci_ss_list_10de_0349 NULL #define pci_ss_list_10de_034b NULL #define pci_ss_list_10de_034c NULL #define pci_ss_list_10de_034e NULL #define pci_ss_list_10de_034f NULL +#define pci_ss_list_10de_0360 NULL +#define pci_ss_list_10de_0361 NULL +#define pci_ss_list_10de_0362 NULL +#define pci_ss_list_10de_0363 NULL +#define pci_ss_list_10de_0364 NULL +#define pci_ss_list_10de_0365 NULL +#define pci_ss_list_10de_0366 NULL +#define pci_ss_list_10de_0367 NULL +#define pci_ss_list_10de_0368 NULL +#define pci_ss_list_10de_0369 NULL +#define pci_ss_list_10de_036a NULL +#define pci_ss_list_10de_036c NULL +#define pci_ss_list_10de_036d NULL +#define pci_ss_list_10de_036e NULL +#define pci_ss_list_10de_0371 NULL +#define pci_ss_list_10de_0372 NULL +#define pci_ss_list_10de_0373 NULL +#define pci_ss_list_10de_037a NULL +#define pci_ss_list_10de_037e NULL +#define pci_ss_list_10de_037f NULL #define pci_ss_list_10df_1ae5 NULL -#define pci_ss_list_10df_1ae6 NULL -#define pci_ss_list_10df_1ae7 NULL -#define pci_ss_list_10df_f015 NULL #define pci_ss_list_10df_f085 NULL #define pci_ss_list_10df_f095 NULL #define pci_ss_list_10df_f098 NULL #define pci_ss_list_10df_f0a1 NULL #define pci_ss_list_10df_f0a5 NULL +#define pci_ss_list_10df_f0b5 NULL +#define pci_ss_list_10df_f0d1 NULL #define pci_ss_list_10df_f0d5 NULL -#define pci_ss_list_10df_f100 NULL +#define pci_ss_list_10df_f0e1 NULL +#define pci_ss_list_10df_f0e5 NULL +#define pci_ss_list_10df_f0f5 NULL #define pci_ss_list_10df_f700 NULL #define pci_ss_list_10df_f701 NULL #define pci_ss_list_10df_f800 NULL @@ -37571,9 +46271,13 @@ #define pci_ss_list_10df_f981 NULL #define pci_ss_list_10df_f982 NULL #define pci_ss_list_10df_fa00 NULL -#define pci_ss_list_10df_fa01 NULL #define pci_ss_list_10df_fb00 NULL +#define pci_ss_list_10df_fc00 NULL +#define pci_ss_list_10df_fc10 NULL +#define pci_ss_list_10df_fc20 NULL #define pci_ss_list_10df_fd00 NULL +#define pci_ss_list_10df_fe00 NULL +#define pci_ss_list_10df_ff00 NULL #define pci_ss_list_10e0_5026 NULL #define pci_ss_list_10e0_5027 NULL #define pci_ss_list_10e0_5028 NULL @@ -37589,10 +46293,12 @@ #define pci_ss_list_10e1_dc29 NULL #endif #define pci_ss_list_10e3_0000 NULL +#define pci_ss_list_10e3_0148 NULL #define pci_ss_list_10e3_0860 NULL #define pci_ss_list_10e3_0862 NULL #define pci_ss_list_10e3_8260 NULL #define pci_ss_list_10e3_8261 NULL +#define pci_ss_list_10e4_8029 NULL #define pci_ss_list_10e8_1072 NULL #define pci_ss_list_10e8_2011 NULL #define pci_ss_list_10e8_4750 NULL @@ -37630,6 +46336,7 @@ #define pci_ss_list_10ea_5252 NULL #define pci_ss_list_10eb_0101 NULL #define pci_ss_list_10eb_8111 NULL +#define pci_ss_list_10ec_0139 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_10ec_8029[] = { &pci_ss_info_10ec_8029_10b8_2011, @@ -37652,6 +46359,8 @@ &pci_ss_info_10ec_8139_1025_005a, &pci_ss_info_10ec_8139_1025_8920, &pci_ss_info_10ec_8139_1025_8921, + &pci_ss_info_10ec_8139_103c_006a, + &pci_ss_info_10ec_8139_1043_8109, &pci_ss_info_10ec_8139_1071_8160, &pci_ss_info_10ec_8139_10bd_0320, &pci_ss_info_10ec_8139_10ec_8139, @@ -37666,6 +46375,7 @@ &pci_ss_info_10ec_8139_1432_9130, &pci_ss_info_10ec_8139_1436_8139, &pci_ss_info_10ec_8139_1458_e000, + &pci_ss_info_10ec_8139_1462_788c, &pci_ss_info_10ec_8139_146c_1439, &pci_ss_info_10ec_8139_1489_6001, &pci_ss_info_10ec_8139_1489_6002, @@ -37673,9 +46383,11 @@ &pci_ss_info_10ec_8139_149c_8139, &pci_ss_info_10ec_8139_14cb_0200, &pci_ss_info_10ec_8139_1799_5000, + &pci_ss_info_10ec_8139_1904_8139, &pci_ss_info_10ec_8139_2646_0001, &pci_ss_info_10ec_8139_8e2e_7000, &pci_ss_info_10ec_8139_8e2e_7100, + &pci_ss_info_10ec_8139_9001_1695, &pci_ss_info_10ec_8139_a0a0_0007, NULL }; @@ -37690,6 +46402,11 @@ #define pci_ss_list_10ec_8197 NULL #endif #define pci_ss_list_10ed_7310 NULL +#define pci_ss_list_10ee_0205 NULL +#define pci_ss_list_10ee_0210 NULL +#define pci_ss_list_10ee_0314 NULL +#define pci_ss_list_10ee_0405 NULL +#define pci_ss_list_10ee_0410 NULL #define pci_ss_list_10ee_3fc0 NULL #define pci_ss_list_10ee_3fc1 NULL #define pci_ss_list_10ee_3fc2 NULL @@ -37714,6 +46431,7 @@ &pci_ss_info_1102_0002_1102_0020, &pci_ss_info_1102_0002_1102_0021, &pci_ss_info_1102_0002_1102_002f, + &pci_ss_info_1102_0002_1102_100a, &pci_ss_info_1102_0002_1102_4001, &pci_ss_info_1102_0002_1102_8022, &pci_ss_info_1102_0002_1102_8023, @@ -37735,16 +46453,23 @@ &pci_ss_info_1102_0004_1102_0051, &pci_ss_info_1102_0004_1102_0053, &pci_ss_info_1102_0004_1102_0058, + &pci_ss_info_1102_0004_1102_1007, &pci_ss_info_1102_0004_1102_2002, NULL }; #define pci_ss_list_1102_0006 NULL static const pciSubsystemInfo *pci_ss_list_1102_0007[] = { + &pci_ss_info_1102_0007_1102_0007, &pci_ss_info_1102_0007_1102_1001, &pci_ss_info_1102_0007_1102_1002, + &pci_ss_info_1102_0007_1102_1006, + &pci_ss_info_1102_0007_1462_1009, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1102_0008[] = { + &pci_ss_info_1102_0008_1102_0008, NULL }; -#define pci_ss_list_1102_0008 NULL static const pciSubsystemInfo *pci_ss_list_1102_4001[] = { &pci_ss_info_1102_4001_1102_0010, NULL @@ -37764,7 +46489,24 @@ NULL }; #define pci_ss_list_1102_8064 NULL -#define pci_ss_list_1102_8938 NULL +static const pciSubsystemInfo *pci_ss_list_1102_8938[] = { + &pci_ss_info_1102_8938_1033_80e5, + &pci_ss_info_1102_8938_1071_7150, + &pci_ss_info_1102_8938_110a_5938, + &pci_ss_info_1102_8938_13bd_100c, + &pci_ss_info_1102_8938_13bd_100d, + &pci_ss_info_1102_8938_13bd_100e, + &pci_ss_info_1102_8938_13bd_f6f1, + &pci_ss_info_1102_8938_14ff_0e70, + &pci_ss_info_1102_8938_14ff_c401, + &pci_ss_info_1102_8938_156d_b400, + &pci_ss_info_1102_8938_156d_b550, + &pci_ss_info_1102_8938_156d_b560, + &pci_ss_info_1102_8938_156d_b700, + &pci_ss_info_1102_8938_156d_b795, + &pci_ss_info_1102_8938_156d_b797, + NULL +}; #define pci_ss_list_1103_0003 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1103_0004[] = { @@ -37789,20 +46531,42 @@ #define pci_ss_list_1105_8401 NULL #define pci_ss_list_1105_8470 NULL #define pci_ss_list_1105_8471 NULL -#define pci_ss_list_1105_8475 NULL -#define pci_ss_list_1105_8476 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1105_8475[] = { + &pci_ss_info_1105_8475_1105_0001, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1105_8476[] = { + &pci_ss_info_1105_8476_127d_0000, + NULL +}; #define pci_ss_list_1105_8485 NULL #define pci_ss_list_1105_8486 NULL +#endif #define pci_ss_list_1106_0102 NULL #define pci_ss_list_1106_0130 NULL +#define pci_ss_list_1106_0204 NULL +#define pci_ss_list_1106_0238 NULL +#define pci_ss_list_1106_0258 NULL +#define pci_ss_list_1106_0259 NULL +#define pci_ss_list_1106_0269 NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1106_0282[] = { + &pci_ss_info_1106_0282_1043_80a3, + NULL +}; +#define pci_ss_list_1106_0290 NULL +#define pci_ss_list_1106_0296 NULL static const pciSubsystemInfo *pci_ss_list_1106_0305[] = { + &pci_ss_info_1106_0305_1019_0987, &pci_ss_info_1106_0305_1043_8033, &pci_ss_info_1106_0305_1043_803e, &pci_ss_info_1106_0305_1043_8042, &pci_ss_info_1106_0305_147b_a401, NULL }; +#define pci_ss_list_1106_0308 NULL +#define pci_ss_list_1106_0314 NULL #define pci_ss_list_1106_0391 NULL #define pci_ss_list_1106_0501 NULL #define pci_ss_list_1106_0505 NULL @@ -37829,6 +46593,7 @@ &pci_ss_info_1106_0586_1106_0000, NULL }; +#define pci_ss_list_1106_0591 NULL #define pci_ss_list_1106_0595 NULL static const pciSubsystemInfo *pci_ss_list_1106_0596[] = { &pci_ss_info_1106_0596_1106_0000, @@ -37867,13 +46632,41 @@ #define pci_ss_list_1106_0926 NULL #define pci_ss_list_1106_1000 NULL #define pci_ss_list_1106_1106 NULL +#define pci_ss_list_1106_1204 NULL +#define pci_ss_list_1106_1208 NULL +#define pci_ss_list_1106_1238 NULL +#define pci_ss_list_1106_1258 NULL +#define pci_ss_list_1106_1259 NULL +#define pci_ss_list_1106_1269 NULL +#define pci_ss_list_1106_1282 NULL +#define pci_ss_list_1106_1290 NULL +#define pci_ss_list_1106_1296 NULL +#define pci_ss_list_1106_1308 NULL +#define pci_ss_list_1106_1314 NULL #define pci_ss_list_1106_1571 NULL #define pci_ss_list_1106_1595 NULL +#define pci_ss_list_1106_2204 NULL +#define pci_ss_list_1106_2208 NULL +#define pci_ss_list_1106_2238 NULL +#define pci_ss_list_1106_2258 NULL +#define pci_ss_list_1106_2259 NULL +#define pci_ss_list_1106_2269 NULL +#define pci_ss_list_1106_2282 NULL +#define pci_ss_list_1106_2290 NULL +#define pci_ss_list_1106_2296 NULL +#define pci_ss_list_1106_2308 NULL +#define pci_ss_list_1106_2314 NULL +#define pci_ss_list_1106_287a NULL +#define pci_ss_list_1106_287b NULL +#define pci_ss_list_1106_287c NULL +#define pci_ss_list_1106_287d NULL +#define pci_ss_list_1106_287e NULL #define pci_ss_list_1106_3022 NULL static const pciSubsystemInfo *pci_ss_list_1106_3038[] = { &pci_ss_info_1106_3038_0925_1234, &pci_ss_info_1106_3038_1019_0985, &pci_ss_info_1106_3038_1019_0a81, + &pci_ss_info_1106_3038_1043_8080, &pci_ss_info_1106_3038_1043_808c, &pci_ss_info_1106_3038_1043_80a1, &pci_ss_info_1106_3038_1043_80ed, @@ -37881,6 +46674,8 @@ &pci_ss_info_1106_3038_1458_5004, &pci_ss_info_1106_3038_1462_7020, &pci_ss_info_1106_3038_147b_1407, + &pci_ss_info_1106_3038_182d_201d, + &pci_ss_info_1106_3038_1849_3038, NULL }; #define pci_ss_list_1106_3040 NULL @@ -37891,9 +46686,12 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_1106_3044[] = { + &pci_ss_info_1106_3044_0574_086c, &pci_ss_info_1106_3044_1025_005a, + &pci_ss_info_1106_3044_1043_808a, &pci_ss_info_1106_3044_1458_1000, &pci_ss_info_1106_3044_1462_702d, + &pci_ss_info_1106_3044_1462_971d, NULL }; #define pci_ss_list_1106_3050 NULL @@ -37901,6 +46699,7 @@ #define pci_ss_list_1106_3053 NULL static const pciSubsystemInfo *pci_ss_list_1106_3057[] = { &pci_ss_info_1106_3057_1019_0985, + &pci_ss_info_1106_3057_1019_0987, &pci_ss_info_1106_3057_1043_8033, &pci_ss_info_1106_3057_1043_803e, &pci_ss_info_1106_3057_1043_8040, @@ -37912,6 +46711,7 @@ &pci_ss_info_1106_3058_0e11_0097, &pci_ss_info_1106_3058_0e11_b194, &pci_ss_info_1106_3058_1019_0985, + &pci_ss_info_1106_3058_1019_0987, &pci_ss_info_1106_3058_1043_1106, &pci_ss_info_1106_3058_1106_4511, &pci_ss_info_1106_3058_1458_7600, @@ -37925,6 +46725,7 @@ &pci_ss_info_1106_3059_1043_8095, &pci_ss_info_1106_3059_1043_80a1, &pci_ss_info_1106_3059_1043_80b0, + &pci_ss_info_1106_3059_1043_812a, &pci_ss_info_1106_3059_1106_3059, &pci_ss_info_1106_3059_1106_4161, &pci_ss_info_1106_3059_1297_c160, @@ -37932,6 +46733,11 @@ &pci_ss_info_1106_3059_1462_0080, &pci_ss_info_1106_3059_1462_3800, &pci_ss_info_1106_3059_147b_1407, + &pci_ss_info_1106_3059_1849_9761, + &pci_ss_info_1106_3059_4005_4710, + &pci_ss_info_1106_3059_4170_1106, + &pci_ss_info_1106_3059_4552_1106, + &pci_ss_info_1106_3059_a0a0_01b6, NULL }; static const pciSubsystemInfo *pci_ss_list_1106_3065[] = { @@ -37940,6 +46746,10 @@ &pci_ss_info_1106_3065_1186_1400, &pci_ss_info_1106_3065_1186_1401, &pci_ss_info_1106_3065_13b9_1421, + &pci_ss_info_1106_3065_147b_1c09, + &pci_ss_info_1106_3065_1695_3005, + &pci_ss_info_1106_3065_1695_300c, + &pci_ss_info_1106_3065_1849_3065, NULL }; static const pciSubsystemInfo *pci_ss_list_1106_3068[] = { @@ -37969,6 +46779,8 @@ &pci_ss_info_1106_3104_1458_5004, &pci_ss_info_1106_3104_1462_7020, &pci_ss_info_1106_3104_147b_1407, + &pci_ss_info_1106_3104_182d_201d, + &pci_ss_info_1106_3104_1849_3104, NULL }; static const pciSubsystemInfo *pci_ss_list_1106_3106[] = { @@ -37978,6 +46790,7 @@ #define pci_ss_list_1106_3108 NULL #define pci_ss_list_1106_3109 NULL #define pci_ss_list_1106_3112 NULL +#define pci_ss_list_1106_3113 NULL static const pciSubsystemInfo *pci_ss_list_1106_3116[] = { &pci_ss_info_1106_3116_1297_f641, NULL @@ -37988,16 +46801,26 @@ #define pci_ss_list_1106_3123 NULL #define pci_ss_list_1106_3128 NULL #define pci_ss_list_1106_3133 NULL -#define pci_ss_list_1106_3147 NULL +static const pciSubsystemInfo *pci_ss_list_1106_3147[] = { + &pci_ss_info_1106_3147_1043_808c, + NULL +}; #define pci_ss_list_1106_3148 NULL static const pciSubsystemInfo *pci_ss_list_1106_3149[] = { &pci_ss_info_1106_3149_1043_80ed, &pci_ss_info_1106_3149_1458_b003, &pci_ss_info_1106_3149_1462_7020, + &pci_ss_info_1106_3149_147b_1407, + &pci_ss_info_1106_3149_147b_1408, + &pci_ss_info_1106_3149_1849_3149, NULL }; #define pci_ss_list_1106_3156 NULL -#define pci_ss_list_1106_3164 NULL +static const pciSubsystemInfo *pci_ss_list_1106_3164[] = { + &pci_ss_info_1106_3164_1043_80f4, + &pci_ss_info_1106_3164_1462_7028, + NULL +}; #define pci_ss_list_1106_3168 NULL static const pciSubsystemInfo *pci_ss_list_1106_3177[] = { &pci_ss_info_1106_3177_1019_0a81, @@ -38008,13 +46831,16 @@ &pci_ss_info_1106_3177_1849_3177, NULL }; +#define pci_ss_list_1106_3178 NULL static const pciSubsystemInfo *pci_ss_list_1106_3188[] = { + &pci_ss_info_1106_3188_1043_80a3, &pci_ss_info_1106_3188_147b_1407, NULL }; static const pciSubsystemInfo *pci_ss_list_1106_3189[] = { &pci_ss_info_1106_3189_1043_807f, &pci_ss_info_1106_3189_1458_5000, + &pci_ss_info_1106_3189_1849_3189, NULL }; #define pci_ss_list_1106_3204 NULL @@ -38022,21 +46848,65 @@ &pci_ss_info_1106_3205_1458_5000, NULL }; +#define pci_ss_list_1106_3208 NULL +#define pci_ss_list_1106_3213 NULL +#define pci_ss_list_1106_3218 NULL static const pciSubsystemInfo *pci_ss_list_1106_3227[] = { &pci_ss_info_1106_3227_1043_80ed, &pci_ss_info_1106_3227_1106_3227, &pci_ss_info_1106_3227_1458_5001, &pci_ss_info_1106_3227_147b_1407, + &pci_ss_info_1106_3227_1849_3227, NULL }; +#define pci_ss_list_1106_3238 NULL +#define pci_ss_list_1106_3249 NULL +#define pci_ss_list_1106_3258 NULL +#define pci_ss_list_1106_3259 NULL +#define pci_ss_list_1106_3269 NULL +#define pci_ss_list_1106_3282 NULL +#define pci_ss_list_1106_3287 NULL +#define pci_ss_list_1106_3288 NULL +#define pci_ss_list_1106_3290 NULL +#define pci_ss_list_1106_3296 NULL +#define pci_ss_list_1106_3337 NULL +#define pci_ss_list_1106_3344 NULL +#define pci_ss_list_1106_3349 NULL +#define pci_ss_list_1106_337a NULL +#define pci_ss_list_1106_337b NULL #define pci_ss_list_1106_4149 NULL +#define pci_ss_list_1106_4204 NULL +#define pci_ss_list_1106_4208 NULL +#define pci_ss_list_1106_4238 NULL +#define pci_ss_list_1106_4258 NULL +#define pci_ss_list_1106_4259 NULL +#define pci_ss_list_1106_4269 NULL +#define pci_ss_list_1106_4282 NULL +#define pci_ss_list_1106_4290 NULL +#define pci_ss_list_1106_4296 NULL +#define pci_ss_list_1106_4308 NULL +#define pci_ss_list_1106_4314 NULL #define pci_ss_list_1106_5030 NULL +#define pci_ss_list_1106_5208 NULL +#define pci_ss_list_1106_5238 NULL +#define pci_ss_list_1106_5290 NULL +#define pci_ss_list_1106_5308 NULL #define pci_ss_list_1106_6100 NULL #define pci_ss_list_1106_7204 NULL static const pciSubsystemInfo *pci_ss_list_1106_7205[] = { &pci_ss_info_1106_7205_1458_d000, NULL }; +#define pci_ss_list_1106_7208 NULL +#define pci_ss_list_1106_7238 NULL +#define pci_ss_list_1106_7258 NULL +#define pci_ss_list_1106_7259 NULL +#define pci_ss_list_1106_7269 NULL +#define pci_ss_list_1106_7282 NULL +#define pci_ss_list_1106_7290 NULL +#define pci_ss_list_1106_7296 NULL +#define pci_ss_list_1106_7308 NULL +#define pci_ss_list_1106_7314 NULL #define pci_ss_list_1106_8231 NULL #define pci_ss_list_1106_8235 NULL #define pci_ss_list_1106_8305 NULL @@ -38052,19 +46922,33 @@ #define pci_ss_list_1106_8605 NULL #define pci_ss_list_1106_8691 NULL #define pci_ss_list_1106_8693 NULL +#define pci_ss_list_1106_a208 NULL +#define pci_ss_list_1106_a238 NULL #define pci_ss_list_1106_b091 NULL #define pci_ss_list_1106_b099 NULL #define pci_ss_list_1106_b101 NULL #define pci_ss_list_1106_b102 NULL #define pci_ss_list_1106_b103 NULL #define pci_ss_list_1106_b112 NULL +#define pci_ss_list_1106_b113 NULL +#define pci_ss_list_1106_b115 NULL #define pci_ss_list_1106_b168 NULL static const pciSubsystemInfo *pci_ss_list_1106_b188[] = { &pci_ss_info_1106_b188_147b_1407, NULL }; #define pci_ss_list_1106_b198 NULL +#define pci_ss_list_1106_b213 NULL +#define pci_ss_list_1106_c208 NULL +#define pci_ss_list_1106_c238 NULL #define pci_ss_list_1106_d104 NULL +#define pci_ss_list_1106_d208 NULL +#define pci_ss_list_1106_d213 NULL +#define pci_ss_list_1106_d238 NULL +#define pci_ss_list_1106_e208 NULL +#define pci_ss_list_1106_e238 NULL +#define pci_ss_list_1106_f208 NULL +#define pci_ss_list_1106_f238 NULL #endif #define pci_ss_list_1107_0576 NULL #define pci_ss_list_1108_0100 NULL @@ -38084,6 +46968,7 @@ #define pci_ss_list_110a_007b NULL #define pci_ss_list_110a_007c NULL #define pci_ss_list_110a_007d NULL +#define pci_ss_list_110a_2101 NULL #define pci_ss_list_110a_2102 NULL #define pci_ss_list_110a_2104 NULL #define pci_ss_list_110a_3142 NULL @@ -38247,32 +47132,102 @@ #endif #define pci_ss_list_112f_0000 NULL #define pci_ss_list_112f_0001 NULL +#define pci_ss_list_112f_0008 NULL #define pci_ss_list_1131_1561 NULL #define pci_ss_list_1131_1562 NULL #define pci_ss_list_1131_3400 NULL #define pci_ss_list_1131_5400 NULL -#define pci_ss_list_1131_5402 NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1131_5402[] = { + &pci_ss_info_1131_5402_1244_0f00, + NULL +}; +#define pci_ss_list_1131_5405 NULL +#define pci_ss_list_1131_5406 NULL static const pciSubsystemInfo *pci_ss_list_1131_7130[] = { + &pci_ss_info_1131_7130_102b_48d0, + &pci_ss_info_1131_7130_1048_226b, + &pci_ss_info_1131_7130_1131_2001, + &pci_ss_info_1131_7130_1131_2005, + &pci_ss_info_1131_7130_1461_050c, + &pci_ss_info_1131_7130_1461_10ff, + &pci_ss_info_1131_7130_1461_2108, + &pci_ss_info_1131_7130_1461_2115, + &pci_ss_info_1131_7130_153b_1152, + &pci_ss_info_1131_7130_185b_c100, + &pci_ss_info_1131_7130_185b_c901, &pci_ss_info_1131_7130_5168_0138, NULL }; static const pciSubsystemInfo *pci_ss_list_1131_7133[] = { - &pci_ss_info_1131_7133_5168_0138, - &pci_ss_info_1131_7133_5168_0212, + &pci_ss_info_1131_7133_0000_4091, + &pci_ss_info_1131_7133_002b_11bd, + &pci_ss_info_1131_7133_1019_4cb5, + &pci_ss_info_1131_7133_1043_0210, + &pci_ss_info_1131_7133_1043_4843, + &pci_ss_info_1131_7133_1043_4845, + &pci_ss_info_1131_7133_1043_4862, + &pci_ss_info_1131_7133_1131_2001, + &pci_ss_info_1131_7133_1131_2018, + &pci_ss_info_1131_7133_1131_4ee9, + &pci_ss_info_1131_7133_11bd_002e, + &pci_ss_info_1131_7133_12ab_0800, + &pci_ss_info_1131_7133_1421_1370, + &pci_ss_info_1131_7133_1435_7330, + &pci_ss_info_1131_7133_1435_7350, + &pci_ss_info_1131_7133_1461_1044, + &pci_ss_info_1131_7133_1461_f31f, + &pci_ss_info_1131_7133_1462_6231, + &pci_ss_info_1131_7133_1489_0214, + &pci_ss_info_1131_7133_14c0_1212, + &pci_ss_info_1131_7133_153b_1160, + &pci_ss_info_1131_7133_153b_1162, + &pci_ss_info_1131_7133_185b_c100, + &pci_ss_info_1131_7133_4e42_0212, + &pci_ss_info_1131_7133_4e42_0502, + &pci_ss_info_1131_7133_5168_0306, + &pci_ss_info_1131_7133_5168_0319, + &pci_ss_info_1131_7133_5456_7135, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1131_7134[] = { + &pci_ss_info_1131_7134_1019_4cb4, + &pci_ss_info_1131_7134_1043_0210, + &pci_ss_info_1131_7134_1043_4840, + &pci_ss_info_1131_7134_1131_2004, + &pci_ss_info_1131_7134_1131_4e85, + &pci_ss_info_1131_7134_1131_6752, + &pci_ss_info_1131_7134_11bd_002b, + &pci_ss_info_1131_7134_11bd_002d, + &pci_ss_info_1131_7134_1461_9715, + &pci_ss_info_1131_7134_1461_a70a, + &pci_ss_info_1131_7134_1461_a70b, + &pci_ss_info_1131_7134_1461_d6ee, + &pci_ss_info_1131_7134_1471_b7e9, + &pci_ss_info_1131_7134_153b_1142, + &pci_ss_info_1131_7134_153b_1143, + &pci_ss_info_1131_7134_153b_1158, + &pci_ss_info_1131_7134_1540_9524, + &pci_ss_info_1131_7134_16be_0003, + &pci_ss_info_1131_7134_185b_c200, + &pci_ss_info_1131_7134_185b_c900, + &pci_ss_info_1131_7134_1894_a006, + &pci_ss_info_1131_7134_1894_fe01, + &pci_ss_info_1131_7134_4e42_0138, NULL }; -#define pci_ss_list_1131_7134 NULL -#define pci_ss_list_1131_7135 NULL #define pci_ss_list_1131_7145 NULL static const pciSubsystemInfo *pci_ss_list_1131_7146[] = { &pci_ss_info_1131_7146_110a_0000, &pci_ss_info_1131_7146_110a_ffff, &pci_ss_info_1131_7146_1131_4f56, + &pci_ss_info_1131_7146_1131_4f60, &pci_ss_info_1131_7146_1131_4f61, + &pci_ss_info_1131_7146_1131_5f61, &pci_ss_info_1131_7146_114b_2003, &pci_ss_info_1131_7146_11bd_0006, &pci_ss_info_1131_7146_11bd_000a, + &pci_ss_info_1131_7146_11bd_000f, &pci_ss_info_1131_7146_13c2_0000, &pci_ss_info_1131_7146_13c2_0001, &pci_ss_info_1131_7146_13c2_0002, @@ -38288,9 +47243,11 @@ &pci_ss_info_1131_7146_13c2_100f, &pci_ss_info_1131_7146_13c2_1011, &pci_ss_info_1131_7146_13c2_1013, + &pci_ss_info_1131_7146_13c2_1016, &pci_ss_info_1131_7146_13c2_1102, NULL }; +#define pci_ss_list_1131_9730 NULL #endif #define pci_ss_list_1133_7901 NULL #define pci_ss_list_1133_7902 NULL @@ -38320,54 +47277,37 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1133_e010[] = { &pci_ss_info_1133_e010_110a_0021, - &pci_ss_info_1133_e010_8001_0014, NULL }; #define pci_ss_list_1133_e011 NULL -static const pciSubsystemInfo *pci_ss_list_1133_e012[] = { - &pci_ss_info_1133_e012_8001_0014, - NULL -}; +#define pci_ss_list_1133_e012 NULL static const pciSubsystemInfo *pci_ss_list_1133_e013[] = { &pci_ss_info_1133_e013_1133_1300, &pci_ss_info_1133_e013_1133_e013, - &pci_ss_info_1133_e013_8001_0014, - NULL -}; -static const pciSubsystemInfo *pci_ss_list_1133_e014[] = { - &pci_ss_info_1133_e014_0008_0100, - &pci_ss_info_1133_e014_8001_0014, NULL }; +#define pci_ss_list_1133_e014 NULL static const pciSubsystemInfo *pci_ss_list_1133_e015[] = { &pci_ss_info_1133_e015_1133_e015, - &pci_ss_info_1133_e015_8001_0014, - NULL -}; -static const pciSubsystemInfo *pci_ss_list_1133_e016[] = { - &pci_ss_info_1133_e016_8001_0014, NULL }; +#define pci_ss_list_1133_e016 NULL static const pciSubsystemInfo *pci_ss_list_1133_e017[] = { &pci_ss_info_1133_e017_1133_e017, - &pci_ss_info_1133_e017_8001_0014, NULL }; static const pciSubsystemInfo *pci_ss_list_1133_e018[] = { &pci_ss_info_1133_e018_1133_1800, &pci_ss_info_1133_e018_1133_e018, - &pci_ss_info_1133_e018_8001_0014, NULL }; static const pciSubsystemInfo *pci_ss_list_1133_e019[] = { &pci_ss_info_1133_e019_1133_e019, - &pci_ss_info_1133_e019_8001_0014, NULL }; #define pci_ss_list_1133_e01a NULL static const pciSubsystemInfo *pci_ss_list_1133_e01b[] = { &pci_ss_info_1133_e01b_1133_e01b, - &pci_ss_info_1133_e01b_8001_0014, NULL }; static const pciSubsystemInfo *pci_ss_list_1133_e01c[] = { @@ -38385,20 +47325,8 @@ &pci_ss_info_1133_e01c_1133_1c0c, NULL }; -static const pciSubsystemInfo *pci_ss_list_1133_e01e[] = { - &pci_ss_info_1133_e01e_1133_1e00, - &pci_ss_info_1133_e01e_1133_1e01, - &pci_ss_info_1133_e01e_1133_1e02, - &pci_ss_info_1133_e01e_1133_1e03, - NULL -}; -static const pciSubsystemInfo *pci_ss_list_1133_e020[] = { - &pci_ss_info_1133_e020_1133_2000, - &pci_ss_info_1133_e020_1133_2001, - &pci_ss_info_1133_e020_1133_2002, - &pci_ss_info_1133_e020_1133_2003, - NULL -}; +#define pci_ss_list_1133_e01e NULL +#define pci_ss_list_1133_e020 NULL static const pciSubsystemInfo *pci_ss_list_1133_e024[] = { &pci_ss_info_1133_e024_1133_2400, &pci_ss_info_1133_e024_1133_e024, @@ -38409,6 +47337,8 @@ &pci_ss_info_1133_e028_1133_e028, NULL }; +#define pci_ss_list_1133_e02a NULL +#define pci_ss_list_1133_e02c NULL #endif #define pci_ss_list_1134_0001 NULL #define pci_ss_list_1134_0002 NULL @@ -38440,6 +47370,7 @@ #define pci_ss_list_1145_f012 NULL #define pci_ss_list_1145_f013 NULL #define pci_ss_list_1145_f015 NULL +#define pci_ss_list_1145_f020 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1148_4000[] = { &pci_ss_info_1148_4000_0e11_b03b, @@ -38504,6 +47435,8 @@ }; #define pci_ss_list_1148_4400 NULL #define pci_ss_list_1148_4500 NULL +#define pci_ss_list_1148_9000 NULL +#define pci_ss_list_1148_9843 NULL static const pciSubsystemInfo *pci_ss_list_1148_9e00[] = { &pci_ss_info_1148_9e00_1148_2100, &pci_ss_info_1148_9e00_1148_21d0, @@ -38530,7 +47463,6 @@ #define pci_ss_list_114f_000d NULL #define pci_ss_list_114f_0011 NULL #define pci_ss_list_114f_0012 NULL -#define pci_ss_list_114f_0013 NULL #define pci_ss_list_114f_0014 NULL #define pci_ss_list_114f_0015 NULL #define pci_ss_list_114f_0016 NULL @@ -38588,6 +47520,7 @@ &pci_ss_info_115d_0003_1014_8181, &pci_ss_info_115d_0003_1014_9181, &pci_ss_info_115d_0003_115d_0181, + &pci_ss_info_115d_0003_115d_0182, &pci_ss_info_115d_0003_115d_1181, &pci_ss_info_115d_0003_1179_0181, &pci_ss_info_115d_0003_8086_8181, @@ -38652,62 +47585,100 @@ #define pci_ss_list_1166_0015 NULL #define pci_ss_list_1166_0016 NULL #define pci_ss_list_1166_0017 NULL +#define pci_ss_list_1166_0036 NULL #define pci_ss_list_1166_0101 NULL +#define pci_ss_list_1166_0104 NULL #define pci_ss_list_1166_0110 NULL +#define pci_ss_list_1166_0130 NULL +#define pci_ss_list_1166_0132 NULL #define pci_ss_list_1166_0200 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1166_0201[] = { &pci_ss_info_1166_0201_4c53_1080, NULL }; -#define pci_ss_list_1166_0203 NULL +static const pciSubsystemInfo *pci_ss_list_1166_0203[] = { + &pci_ss_info_1166_0203_1734_1012, + NULL +}; +#define pci_ss_list_1166_0205 NULL #define pci_ss_list_1166_0211 NULL static const pciSubsystemInfo *pci_ss_list_1166_0212[] = { &pci_ss_info_1166_0212_4c53_1080, NULL }; -#define pci_ss_list_1166_0213 NULL -#define pci_ss_list_1166_0217 NULL +static const pciSubsystemInfo *pci_ss_list_1166_0213[] = { + &pci_ss_info_1166_0213_1028_c134, + &pci_ss_info_1166_0213_1734_1012, + NULL +}; +#define pci_ss_list_1166_0214 NULL +static const pciSubsystemInfo *pci_ss_list_1166_0217[] = { + &pci_ss_info_1166_0217_1028_4134, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1166_0220[] = { &pci_ss_info_1166_0220_4c53_1080, NULL }; -#define pci_ss_list_1166_0221 NULL -static const pciSubsystemInfo *pci_ss_list_1166_0225[] = { - &pci_ss_info_1166_0225_4c53_1080, +static const pciSubsystemInfo *pci_ss_list_1166_0221[] = { + &pci_ss_info_1166_0221_1734_1012, + NULL +}; +#define pci_ss_list_1166_0223 NULL +#define pci_ss_list_1166_0225 NULL +static const pciSubsystemInfo *pci_ss_list_1166_0227[] = { + &pci_ss_info_1166_0227_1734_1012, NULL }; -#define pci_ss_list_1166_0227 NULL static const pciSubsystemInfo *pci_ss_list_1166_0230[] = { &pci_ss_info_1166_0230_4c53_1080, NULL }; +#define pci_ss_list_1166_0234 NULL #define pci_ss_list_1166_0240 NULL +#define pci_ss_list_1166_0241 NULL +#define pci_ss_list_1166_0242 NULL +#define pci_ss_list_1166_024a NULL #endif #define pci_ss_list_116a_6100 NULL #define pci_ss_list_116a_6800 NULL #define pci_ss_list_116a_7100 NULL #define pci_ss_list_116a_7800 NULL #define pci_ss_list_1178_afa1 NULL +#define pci_ss_list_1179_0102 NULL #define pci_ss_list_1179_0103 NULL #define pci_ss_list_1179_0404 NULL #define pci_ss_list_1179_0406 NULL #define pci_ss_list_1179_0407 NULL -#define pci_ss_list_1179_0601 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1179_0601[] = { + &pci_ss_info_1179_0601_1179_0001, + NULL +}; #define pci_ss_list_1179_0603 NULL -#define pci_ss_list_1179_060a NULL +static const pciSubsystemInfo *pci_ss_list_1179_060a[] = { + &pci_ss_info_1179_060a_1179_0001, + NULL +}; #define pci_ss_list_1179_060f NULL #define pci_ss_list_1179_0617 NULL #define pci_ss_list_1179_0618 NULL #define pci_ss_list_1179_0701 NULL #define pci_ss_list_1179_0804 NULL #define pci_ss_list_1179_0805 NULL -#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1179_0d01[] = { &pci_ss_info_1179_0d01_1179_0001, NULL }; #endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_117c_0030[] = { + &pci_ss_info_117c_0030_117c_8013, + &pci_ss_info_117c_0030_117c_8014, + NULL +}; +#endif #define pci_ss_list_1180_0465 NULL #define pci_ss_list_1180_0466 NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -38717,6 +47688,9 @@ }; static const pciSubsystemInfo *pci_ss_list_1180_0476[] = { &pci_ss_info_1180_0476_1014_0185, + &pci_ss_info_1180_0476_1028_0188, + &pci_ss_info_1180_0476_1043_1967, + &pci_ss_info_1180_0476_1043_1987, &pci_ss_info_1180_0476_104d_80df, &pci_ss_info_1180_0476_104d_80e7, &pci_ss_info_1180_0476_14ef_0220, @@ -38727,8 +47701,10 @@ &pci_ss_info_1180_0478_1014_0184, NULL }; +#define pci_ss_list_1180_0511 NULL static const pciSubsystemInfo *pci_ss_list_1180_0522[] = { &pci_ss_info_1180_0522_1014_01cf, + &pci_ss_info_1180_0522_1043_1967, NULL }; static const pciSubsystemInfo *pci_ss_list_1180_0551[] = { @@ -38737,6 +47713,27 @@ }; static const pciSubsystemInfo *pci_ss_list_1180_0552[] = { &pci_ss_info_1180_0552_1014_0511, + &pci_ss_info_1180_0552_1028_0188, + NULL +}; +#define pci_ss_list_1180_0554 NULL +#define pci_ss_list_1180_0575 NULL +#define pci_ss_list_1180_0576 NULL +static const pciSubsystemInfo *pci_ss_list_1180_0592[] = { + &pci_ss_info_1180_0592_1043_1967, + NULL +}; +#define pci_ss_list_1180_0811 NULL +static const pciSubsystemInfo *pci_ss_list_1180_0822[] = { + &pci_ss_info_1180_0822_1014_0556, + &pci_ss_info_1180_0822_1028_0188, + &pci_ss_info_1180_0822_1028_01a2, + &pci_ss_info_1180_0822_1043_1967, + NULL +}; +#define pci_ss_list_1180_0841 NULL +static const pciSubsystemInfo *pci_ss_list_1180_0852[] = { + &pci_ss_info_1180_0852_1043_1967, NULL }; #endif @@ -38753,6 +47750,7 @@ static const pciSubsystemInfo *pci_ss_list_1186_1300[] = { &pci_ss_info_1186_1300_1186_1300, &pci_ss_info_1186_1300_1186_1301, + &pci_ss_info_1186_1300_1186_1303, NULL }; #define pci_ss_list_1186_1340 NULL @@ -38772,8 +47770,8 @@ #define pci_ss_list_1186_3a13 NULL #define pci_ss_list_1186_3a14 NULL #define pci_ss_list_1186_3a63 NULL -#define pci_ss_list_1186_3b05 NULL #define pci_ss_list_1186_4000 NULL +#define pci_ss_list_1186_4300 NULL static const pciSubsystemInfo *pci_ss_list_1186_4c00[] = { &pci_ss_info_1186_4c00_1186_4c00, NULL @@ -38813,6 +47811,10 @@ #define pci_ss_list_1191_8030 NULL #define pci_ss_list_1191_8040 NULL #define pci_ss_list_1191_8050 NULL +#define pci_ss_list_1191_8060 NULL +#define pci_ss_list_1191_8080 NULL +#define pci_ss_list_1191_8081 NULL +#define pci_ss_list_1191_808a NULL #define pci_ss_list_1193_0001 NULL #define pci_ss_list_1193_0002 NULL #define pci_ss_list_1197_010c NULL @@ -38823,7 +47825,12 @@ #define pci_ss_list_11ab_0146 NULL #define pci_ss_list_11ab_138f NULL #define pci_ss_list_11ab_1fa6 NULL +#define pci_ss_list_11ab_1fa7 NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_11ab_1faa[] = { + &pci_ss_info_11ab_1faa_1385_4e00, + NULL +}; static const pciSubsystemInfo *pci_ss_list_11ab_4320[] = { &pci_ss_info_11ab_4320_1019_0f38, &pci_ss_info_11ab_4320_1019_8001, @@ -38844,6 +47851,14 @@ &pci_ss_info_11ab_4320_270f_2803, NULL }; +#define pci_ss_list_11ab_4340 NULL +#define pci_ss_list_11ab_4341 NULL +#define pci_ss_list_11ab_4342 NULL +#define pci_ss_list_11ab_4343 NULL +#define pci_ss_list_11ab_4344 NULL +#define pci_ss_list_11ab_4345 NULL +#define pci_ss_list_11ab_4346 NULL +#define pci_ss_list_11ab_4347 NULL static const pciSubsystemInfo *pci_ss_list_11ab_4350[] = { &pci_ss_info_11ab_4350_1179_0001, &pci_ss_info_11ab_4350_11ab_3521, @@ -38884,6 +47899,7 @@ &pci_ss_info_11ab_4351_1854_0020, NULL }; +#define pci_ss_list_11ab_4352 NULL static const pciSubsystemInfo *pci_ss_list_11ab_4360[] = { &pci_ss_info_11ab_4360_1043_8134, &pci_ss_info_11ab_4360_107b_4009, @@ -38891,7 +47907,6 @@ &pci_ss_info_11ab_4360_1458_e000, &pci_ss_info_11ab_4360_1462_052c, &pci_ss_info_11ab_4360_1849_8052, - &pci_ss_info_11ab_4360_1940_e000, &pci_ss_info_11ab_4360_a0a0_0509, NULL }; @@ -38899,6 +47914,7 @@ &pci_ss_info_11ab_4361_107b_3015, &pci_ss_info_11ab_4361_11ab_5021, &pci_ss_info_11ab_4361_8086_3063, + &pci_ss_info_11ab_4361_8086_3439, NULL }; static const pciSubsystemInfo *pci_ss_list_11ab_4362[] = { @@ -38940,14 +47956,15 @@ &pci_ss_info_11ab_4362_1854_001f, &pci_ss_info_11ab_4362_1854_0021, &pci_ss_info_11ab_4362_1854_0022, - &pci_ss_info_11ab_4362_1940_e000, &pci_ss_info_11ab_4362_270f_2801, &pci_ss_info_11ab_4362_a0a0_0506, NULL }; +#define pci_ss_list_11ab_4363 NULL #define pci_ss_list_11ab_4611 NULL #define pci_ss_list_11ab_4620 NULL #define pci_ss_list_11ab_4801 NULL +#define pci_ss_list_11ab_5005 NULL #define pci_ss_list_11ab_5040 NULL #define pci_ss_list_11ab_5041 NULL #define pci_ss_list_11ab_5080 NULL @@ -38955,6 +47972,7 @@ #define pci_ss_list_11ab_6041 NULL #define pci_ss_list_11ab_6081 NULL #define pci_ss_list_11ab_6460 NULL +#define pci_ss_list_11ab_6480 NULL #define pci_ss_list_11ab_f003 NULL #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -38972,6 +47990,7 @@ }; #endif #define pci_ss_list_11af_0001 NULL +#define pci_ss_list_11af_ee40 NULL #define pci_ss_list_11b0_0002 NULL #define pci_ss_list_11b0_0292 NULL #define pci_ss_list_11b0_0960 NULL @@ -38979,6 +47998,8 @@ #define pci_ss_list_11b8_0001 NULL #define pci_ss_list_11b9_c0ed NULL #define pci_ss_list_11bc_0001 NULL +#define pci_ss_list_11bd_002e NULL +#define pci_ss_list_11bd_bede NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_11c1_0440[] = { &pci_ss_info_11c1_0440_1033_8015, @@ -39080,6 +48101,8 @@ static const pciSubsystemInfo *pci_ss_list_11c1_0450[] = { &pci_ss_info_11c1_0450_1033_80a8, &pci_ss_info_11c1_0450_144f_4005, + &pci_ss_info_11c1_0450_1468_0450, + &pci_ss_info_11c1_0450_4005_144f, NULL }; #define pci_ss_list_11c1_0451 NULL @@ -39106,6 +48129,10 @@ &pci_ss_info_11c1_5811_dead_0800, NULL }; +static const pciSubsystemInfo *pci_ss_list_11c1_8110[] = { + &pci_ss_info_11c1_8110_12d9_000c, + NULL +}; #define pci_ss_list_11c1_ab10 NULL static const pciSubsystemInfo *pci_ss_list_11c1_ab11[] = { &pci_ss_info_11c1_ab11_11c1_ab12, @@ -39120,6 +48147,7 @@ &pci_ss_info_11c1_ab30_14cd_2012, NULL }; +#define pci_ss_list_11c1_ed00 NULL #endif #define pci_ss_list_11c8_0658 NULL #define pci_ss_list_11c8_d665 NULL @@ -39139,20 +48167,25 @@ #define pci_ss_list_11d4_1535 NULL #define pci_ss_list_11d4_1805 NULL #define pci_ss_list_11d4_1889 NULL +#define pci_ss_list_11d4_5340 NULL #define pci_ss_list_11d5_0115 NULL #define pci_ss_list_11d5_0117 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_11de_6057[] = { &pci_ss_info_11de_6057_1031_7efe, &pci_ss_info_11de_6057_1031_fc00, + &pci_ss_info_11de_6057_12f8_8a02, &pci_ss_info_11de_6057_13ca_4231, NULL }; static const pciSubsystemInfo *pci_ss_list_11de_6120[] = { &pci_ss_info_11de_6120_1328_f001, + &pci_ss_info_11de_6120_13c2_0000, + &pci_ss_info_11de_6120_1de1_9fff, NULL }; #endif +#define pci_ss_list_11e3_0001 NULL #define pci_ss_list_11e3_5030 NULL #define pci_ss_list_11f0_4231 NULL #define pci_ss_list_11f0_4232 NULL @@ -39198,6 +48231,7 @@ #define pci_ss_list_11fe_0805 NULL #define pci_ss_list_11fe_080c NULL #define pci_ss_list_11fe_080d NULL +#define pci_ss_list_11fe_0812 NULL #define pci_ss_list_11fe_0903 NULL #define pci_ss_list_11fe_8015 NULL #define pci_ss_list_11ff_0003 NULL @@ -39244,19 +48278,23 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_1217_7110[] = { + &pci_ss_info_1217_7110_103c_088c, &pci_ss_info_1217_7110_103c_0890, NULL }; #define pci_ss_list_1217_7112 NULL #define pci_ss_list_1217_7113 NULL #define pci_ss_list_1217_7114 NULL +#define pci_ss_list_1217_7134 NULL #define pci_ss_list_1217_71e2 NULL #define pci_ss_list_1217_7212 NULL #define pci_ss_list_1217_7213 NULL static const pciSubsystemInfo *pci_ss_list_1217_7223[] = { + &pci_ss_info_1217_7223_103c_088c, &pci_ss_info_1217_7223_103c_0890, NULL }; +#define pci_ss_list_1217_7233 NULL #endif #define pci_ss_list_121a_0001 NULL #define pci_ss_list_121a_0002 NULL @@ -39295,6 +48333,7 @@ &pci_ss_info_121a_0005_121a_004e, &pci_ss_info_121a_0005_121a_0051, &pci_ss_info_121a_0005_121a_0052, + &pci_ss_info_121a_0005_121a_0057, &pci_ss_info_121a_0005_121a_0060, &pci_ss_info_121a_0005_121a_0061, &pci_ss_info_121a_0005_121a_0062, @@ -39318,6 +48357,7 @@ #define pci_ss_list_1223_000d NULL #define pci_ss_list_1223_000e NULL #define pci_ss_list_1227_0006 NULL +#define pci_ss_list_1227_0023 NULL #define pci_ss_list_122d_1206 NULL #define pci_ss_list_122d_1400 NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -39340,6 +48380,8 @@ static const pciSubsystemInfo *pci_ss_list_123f_8120[] = { &pci_ss_info_123f_8120_11bd_0006, &pci_ss_info_123f_8120_11bd_000a, + &pci_ss_info_123f_8120_11bd_000f, + &pci_ss_info_123f_8120_1809_0016, NULL }; static const pciSubsystemInfo *pci_ss_list_123f_8888[] = { @@ -39394,7 +48436,12 @@ #define pci_ss_list_1259_2560 NULL #define pci_ss_list_1259_a117 NULL #define pci_ss_list_1259_a120 NULL -#define pci_ss_list_125b_1400 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_125b_1400[] = { + &pci_ss_info_125b_1400_1186_1100, + NULL +}; +#endif #define pci_ss_list_125c_0101 NULL #define pci_ss_list_125c_0640 NULL #define pci_ss_list_125d_0000 NULL @@ -39408,6 +48455,7 @@ static const pciSubsystemInfo *pci_ss_list_125d_1969[] = { &pci_ss_info_125d_1969_1014_0166, &pci_ss_info_125d_1969_125d_8888, + &pci_ss_info_125d_1969_153b_111b, NULL }; static const pciSubsystemInfo *pci_ss_list_125d_1978[] = { @@ -39419,6 +48467,7 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_125d_1988[] = { + &pci_ss_info_125d_1988_0e11_0098, &pci_ss_info_125d_1988_1092_4100, &pci_ss_info_125d_1988_125d_1988, NULL @@ -39473,7 +48522,9 @@ &pci_ss_info_1260_3890_10b8_2802, &pci_ss_info_1260_3890_10b8_2835, &pci_ss_info_1260_3890_10b8_a835, + &pci_ss_info_1260_3890_1113_4203, &pci_ss_info_1260_3890_1113_ee03, + &pci_ss_info_1260_3890_1113_ee08, &pci_ss_info_1260_3890_1186_3202, &pci_ss_info_1260_3890_1259_c104, &pci_ss_info_1260_3890_1385_4800, @@ -39484,6 +48535,10 @@ }; #define pci_ss_list_1260_8130 NULL #define pci_ss_list_1260_8131 NULL +static const pciSubsystemInfo *pci_ss_list_1260_ffff[] = { + &pci_ss_info_1260_ffff_1260_0000, + NULL +}; #endif #define pci_ss_list_1266_0001 NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -39497,6 +48552,7 @@ #define pci_ss_list_126c_1211 NULL #define pci_ss_list_126c_126c NULL #define pci_ss_list_126f_0501 NULL +#define pci_ss_list_126f_0510 NULL #define pci_ss_list_126f_0710 NULL #define pci_ss_list_126f_0712 NULL #define pci_ss_list_126f_0720 NULL @@ -39514,6 +48570,7 @@ &pci_ss_info_1274_1371_1042_1854, &pci_ss_info_1274_1371_107b_8054, &pci_ss_info_1274_1371_1274_1371, + &pci_ss_info_1274_1371_1274_8001, &pci_ss_info_1274_1371_1462_6470, &pci_ss_info_1274_1371_1462_6560, &pci_ss_info_1274_1371_1462_6630, @@ -39553,6 +48610,7 @@ &pci_ss_info_1274_1371_8086_425a, &pci_ss_info_1274_1371_8086_4341, &pci_ss_info_1274_1371_8086_4343, + &pci_ss_info_1274_1371_8086_4541, &pci_ss_info_1274_1371_8086_4649, &pci_ss_info_1274_1371_8086_464a, &pci_ss_info_1274_1371_8086_4d4f, @@ -39578,6 +48636,8 @@ }; #define pci_ss_list_1278_0701 NULL #define pci_ss_list_1278_0710 NULL +#define pci_ss_list_1279_0060 NULL +#define pci_ss_list_1279_0061 NULL #define pci_ss_list_1279_0295 NULL #define pci_ss_list_1279_0395 NULL #define pci_ss_list_1279_0396 NULL @@ -39615,6 +48675,7 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_127a_1005[] = { + &pci_ss_info_127a_1005_1005_127a, &pci_ss_info_127a_1005_1033_8029, &pci_ss_info_127a_1005_1033_8054, &pci_ss_info_127a_1005_10cf_103c, @@ -39737,6 +48798,10 @@ #define pci_ss_list_1282_9132 NULL #define pci_ss_list_1283_673a NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1283_8211[] = { + &pci_ss_info_1283_8211_1043_8138, + NULL +}; static const pciSubsystemInfo *pci_ss_list_1283_8212[] = { &pci_ss_info_1283_8212_1283_0001, NULL @@ -39809,6 +48874,34 @@ #endif #define pci_ss_list_12c3_0058 NULL #define pci_ss_list_12c3_5598 NULL +#define pci_ss_list_12c4_0001 NULL +#define pci_ss_list_12c4_0002 NULL +#define pci_ss_list_12c4_0003 NULL +#define pci_ss_list_12c4_0004 NULL +#define pci_ss_list_12c4_0005 NULL +#define pci_ss_list_12c4_0006 NULL +#define pci_ss_list_12c4_0007 NULL +#define pci_ss_list_12c4_0008 NULL +#define pci_ss_list_12c4_0009 NULL +#define pci_ss_list_12c4_000a NULL +#define pci_ss_list_12c4_000b NULL +#define pci_ss_list_12c4_000c NULL +#define pci_ss_list_12c4_000d NULL +#define pci_ss_list_12c4_0100 NULL +#define pci_ss_list_12c4_0201 NULL +#define pci_ss_list_12c4_0202 NULL +#define pci_ss_list_12c4_0300 NULL +#define pci_ss_list_12c4_0301 NULL +#define pci_ss_list_12c4_0302 NULL +#define pci_ss_list_12c4_0310 NULL +#define pci_ss_list_12c4_0311 NULL +#define pci_ss_list_12c4_0312 NULL +#define pci_ss_list_12c4_0320 NULL +#define pci_ss_list_12c4_0321 NULL +#define pci_ss_list_12c4_0322 NULL +#define pci_ss_list_12c4_0330 NULL +#define pci_ss_list_12c4_0331 NULL +#define pci_ss_list_12c4_0332 NULL #define pci_ss_list_12c5_007e NULL #define pci_ss_list_12c5_007f NULL #define pci_ss_list_12c5_0081 NULL @@ -39844,6 +48937,9 @@ #define pci_ss_list_12d2_002c NULL #define pci_ss_list_12d2_00a0 NULL #define pci_ss_list_12d4_0200 NULL +#define pci_ss_list_12d5_0003 NULL +#define pci_ss_list_12d5_1000 NULL +#define pci_ss_list_12d8_8150 NULL #define pci_ss_list_12d9_0002 NULL #define pci_ss_list_12d9_0004 NULL #define pci_ss_list_12d9_0005 NULL @@ -39871,7 +48967,6 @@ &pci_ss_info_12eb_0002_1092_3002, &pci_ss_info_12eb_0002_1092_3003, &pci_ss_info_12eb_0002_1092_3004, - &pci_ss_info_12eb_0002_12eb_0001, &pci_ss_info_12eb_0002_12eb_0002, &pci_ss_info_12eb_0002_12eb_0088, &pci_ss_info_12eb_0002_144d_3510, @@ -39896,6 +48991,20 @@ }; #endif #define pci_ss_list_12f8_0002 NULL +#define pci_ss_list_12fb_0001 NULL +#define pci_ss_list_12fb_00f5 NULL +#define pci_ss_list_12fb_02ad NULL +#define pci_ss_list_12fb_2adc NULL +#define pci_ss_list_12fb_3100 NULL +#define pci_ss_list_12fb_3500 NULL +#define pci_ss_list_12fb_4d4f NULL +#define pci_ss_list_12fb_8120 NULL +#define pci_ss_list_12fb_da62 NULL +#define pci_ss_list_12fb_db62 NULL +#define pci_ss_list_12fb_dc62 NULL +#define pci_ss_list_12fb_dd62 NULL +#define pci_ss_list_12fb_eddc NULL +#define pci_ss_list_12fb_fa01 NULL #define pci_ss_list_1307_0001 NULL #define pci_ss_list_1307_000b NULL #define pci_ss_list_1307_000c NULL @@ -39933,6 +49042,7 @@ #define pci_ss_list_1307_004c NULL #define pci_ss_list_1307_004d NULL #define pci_ss_list_1307_0052 NULL +#define pci_ss_list_1307_0054 NULL #define pci_ss_list_1307_005e NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1308_0001[] = { @@ -39944,6 +49054,7 @@ #define pci_ss_list_1317_0985 NULL #define pci_ss_list_1317_1985 NULL #define pci_ss_list_1317_2850 NULL +#define pci_ss_list_1317_5120 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1317_8201[] = { &pci_ss_info_1317_8201_10b8_2635, @@ -39954,10 +49065,18 @@ #define pci_ss_list_1317_9511 NULL #endif #define pci_ss_list_1318_0911 NULL -#define pci_ss_list_1319_0801 NULL -#define pci_ss_list_1319_0802 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1319_0801[] = { + &pci_ss_info_1319_0801_1319_1319, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1319_0802[] = { + &pci_ss_info_1319_0802_1319_1319, + NULL +}; #define pci_ss_list_1319_1000 NULL #define pci_ss_list_1319_1001 NULL +#endif #define pci_ss_list_131f_1000 NULL #define pci_ss_list_131f_1001 NULL #define pci_ss_list_131f_1002 NULL @@ -40008,6 +49127,7 @@ #define pci_ss_list_1331_8210 NULL #define pci_ss_list_1332_5415 NULL #define pci_ss_list_1332_5425 NULL +#define pci_ss_list_1332_6140 NULL #define pci_ss_list_134a_0001 NULL #define pci_ss_list_134a_0002 NULL #define pci_ss_list_134d_2189 NULL @@ -40060,6 +49180,7 @@ #define pci_ss_list_1360_0202 NULL #define pci_ss_list_1360_0203 NULL #define pci_ss_list_1360_0301 NULL +#define pci_ss_list_1360_0302 NULL #define pci_ss_list_136b_ff01 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1371_434e[] = { @@ -40067,21 +49188,60 @@ NULL }; #endif +#define pci_ss_list_1374_0024 NULL +#define pci_ss_list_1374_0025 NULL +#define pci_ss_list_1374_0026 NULL +#define pci_ss_list_1374_0027 NULL +#define pci_ss_list_1374_0029 NULL +#define pci_ss_list_1374_002a NULL +#define pci_ss_list_1374_002b NULL +#define pci_ss_list_1374_002c NULL +#define pci_ss_list_1374_002d NULL +#define pci_ss_list_1374_002e NULL +#define pci_ss_list_1374_002f NULL +#define pci_ss_list_1374_0030 NULL +#define pci_ss_list_1374_0031 NULL +#define pci_ss_list_1374_0032 NULL +#define pci_ss_list_1374_0034 NULL +#define pci_ss_list_1374_0035 NULL +#define pci_ss_list_1374_0036 NULL +#define pci_ss_list_1374_0037 NULL +#define pci_ss_list_1374_0038 NULL +#define pci_ss_list_1374_0039 NULL +#define pci_ss_list_1374_003a NULL #define pci_ss_list_137a_0001 NULL #define pci_ss_list_1382_0001 NULL +#define pci_ss_list_1382_2008 NULL #define pci_ss_list_1382_2088 NULL +#define pci_ss_list_1382_20c8 NULL +#define pci_ss_list_1382_4008 NULL +#define pci_ss_list_1382_4010 NULL +#define pci_ss_list_1382_4048 NULL +#define pci_ss_list_1382_4088 NULL +#define pci_ss_list_1382_4248 NULL +#define pci_ss_list_1382_4424 NULL #define pci_ss_list_1385_0013 NULL +#define pci_ss_list_1385_311a NULL #define pci_ss_list_1385_4100 NULL #define pci_ss_list_1385_4105 NULL #define pci_ss_list_1385_4400 NULL #define pci_ss_list_1385_4600 NULL #define pci_ss_list_1385_4601 NULL #define pci_ss_list_1385_4610 NULL +#define pci_ss_list_1385_4800 NULL +#define pci_ss_list_1385_4900 NULL #define pci_ss_list_1385_4a00 NULL +#define pci_ss_list_1385_4b00 NULL #define pci_ss_list_1385_4c00 NULL +#define pci_ss_list_1385_4d00 NULL +#define pci_ss_list_1385_4e00 NULL +#define pci_ss_list_1385_4f00 NULL +#define pci_ss_list_1385_5200 NULL #define pci_ss_list_1385_620a NULL #define pci_ss_list_1385_622a NULL #define pci_ss_list_1385_630a NULL +#define pci_ss_list_1385_6b00 NULL +#define pci_ss_list_1385_6d00 NULL #define pci_ss_list_1385_f004 NULL #define pci_ss_list_1389_0001 NULL #define pci_ss_list_1393_1040 NULL @@ -40096,8 +49256,12 @@ NULL }; #endif +#define pci_ss_list_1397_08b4 NULL +#define pci_ss_list_1397_16b8 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1397_2bd0[] = { + &pci_ss_info_1397_2bd0_0675_1704, + &pci_ss_info_1397_2bd0_0675_1708, &pci_ss_info_1397_2bd0_1397_2bd0, &pci_ss_info_1397_2bd0_e4bf_1000, NULL @@ -40114,6 +49278,10 @@ #define pci_ss_list_13a3_0016 NULL #define pci_ss_list_13a3_0017 NULL #define pci_ss_list_13a3_0018 NULL +#define pci_ss_list_13a3_001d NULL +#define pci_ss_list_13a3_0020 NULL +#define pci_ss_list_13a3_0026 NULL +#define pci_ss_list_13a8_0152 NULL #define pci_ss_list_13a8_0154 NULL #define pci_ss_list_13a8_0158 NULL #define pci_ss_list_13c0_0010 NULL @@ -40127,6 +49295,7 @@ NULL }; #define pci_ss_list_13c1_1002 NULL +#define pci_ss_list_13c1_1003 NULL #endif #define pci_ss_list_13c6_0520 NULL #define pci_ss_list_13c6_0620 NULL @@ -40143,7 +49312,9 @@ NULL }; #endif +#define pci_ss_list_13f0_0200 NULL #define pci_ss_list_13f0_0201 NULL +#define pci_ss_list_13f0_1023 NULL #define pci_ss_list_13f4_1401 NULL #define pci_ss_list_13f6_0011 NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -40168,6 +49339,7 @@ #endif #define pci_ss_list_13fe_1240 NULL #define pci_ss_list_13fe_1600 NULL +#define pci_ss_list_13fe_1733 NULL #define pci_ss_list_13fe_1752 NULL #define pci_ss_list_13fe_1754 NULL #define pci_ss_list_13fe_1756 NULL @@ -40175,6 +49347,8 @@ #define pci_ss_list_1407_0100 NULL #define pci_ss_list_1407_0101 NULL #define pci_ss_list_1407_0102 NULL +#define pci_ss_list_1407_0110 NULL +#define pci_ss_list_1407_0111 NULL #define pci_ss_list_1407_0120 NULL #define pci_ss_list_1407_0121 NULL #define pci_ss_list_1407_0180 NULL @@ -40194,31 +49368,65 @@ #define pci_ss_list_1409_7168 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1412_1712[] = { + &pci_ss_info_1412_1712_1412_1712, + &pci_ss_info_1412_1712_1412_d630, + &pci_ss_info_1412_1712_1412_d631, + &pci_ss_info_1412_1712_1412_d632, + &pci_ss_info_1412_1712_1412_d633, + &pci_ss_info_1412_1712_1412_d634, + &pci_ss_info_1412_1712_1412_d635, + &pci_ss_info_1412_1712_1412_d637, &pci_ss_info_1412_1712_1412_d638, + &pci_ss_info_1412_1712_1412_d63b, + &pci_ss_info_1412_1712_1412_d63c, + &pci_ss_info_1412_1712_1416_1712, + &pci_ss_info_1412_1712_153b_1115, + &pci_ss_info_1412_1712_153b_1125, + &pci_ss_info_1412_1712_153b_112b, + &pci_ss_info_1412_1712_153b_112c, + &pci_ss_info_1412_1712_153b_1130, + &pci_ss_info_1412_1712_153b_1138, + &pci_ss_info_1412_1712_153b_1151, + &pci_ss_info_1412_1712_16ce_1040, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_1412_1724[] = { + &pci_ss_info_1412_1724_1412_1724, + &pci_ss_info_1412_1724_1412_3630, + &pci_ss_info_1412_1724_1412_3631, + &pci_ss_info_1412_1724_153b_1145, + &pci_ss_info_1412_1724_153b_1147, + &pci_ss_info_1412_1724_153b_1153, + &pci_ss_info_1412_1724_270f_f641, + &pci_ss_info_1412_1724_270f_f645, NULL }; -#define pci_ss_list_1412_1724 NULL #endif #define pci_ss_list_1415_8403 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1415_9501[] = { &pci_ss_info_1415_9501_131f_2050, + &pci_ss_info_1415_9501_131f_2051, &pci_ss_info_1415_9501_15ed_2000, &pci_ss_info_1415_9501_15ed_2001, NULL }; #define pci_ss_list_1415_950a NULL #define pci_ss_list_1415_950b NULL +#define pci_ss_list_1415_9510 NULL static const pciSubsystemInfo *pci_ss_list_1415_9511[] = { &pci_ss_info_1415_9511_15ed_2000, &pci_ss_info_1415_9511_15ed_2001, NULL }; #define pci_ss_list_1415_9521 NULL +#define pci_ss_list_1415_9523 NULL #endif #define pci_ss_list_1420_8002 NULL #define pci_ss_list_1420_8003 NULL +#define pci_ss_list_1425_000b NULL #define pci_ss_list_142e_4020 NULL +#define pci_ss_list_142e_4337 NULL #define pci_ss_list_1432_9130 NULL #define pci_ss_list_144a_7296 NULL #define pci_ss_list_144a_7432 NULL @@ -40231,13 +49439,25 @@ #define pci_ss_list_144a_9111 NULL #define pci_ss_list_144a_9113 NULL #define pci_ss_list_144a_9114 NULL +#define pci_ss_list_1458_0c11 NULL +#define pci_ss_list_1458_e911 NULL #define pci_ss_list_145f_0001 NULL +#define pci_ss_list_1461_f436 NULL +#define pci_ss_list_1462_5501 NULL +#define pci_ss_list_1462_6819 NULL #define pci_ss_list_1462_6825 NULL +#define pci_ss_list_1462_6834 NULL #define pci_ss_list_1462_8725 NULL #define pci_ss_list_1462_9000 NULL +#define pci_ss_list_1462_9110 NULL #define pci_ss_list_1462_9119 NULL +#define pci_ss_list_1462_9591 NULL #define pci_ss_list_146c_1430 NULL #define pci_ss_list_148d_1003 NULL +#define pci_ss_list_1497_1497 NULL +#define pci_ss_list_1498_0330 NULL +#define pci_ss_list_1498_0385 NULL +#define pci_ss_list_1498_21cd NULL #define pci_ss_list_1498_30c8 NULL #define pci_ss_list_149d_0001 NULL #define pci_ss_list_14af_7102 NULL @@ -40279,6 +49499,7 @@ #define pci_ss_list_14d9_0010 NULL #define pci_ss_list_14d9_9000 NULL #define pci_ss_list_14db_2120 NULL +#define pci_ss_list_14db_2182 NULL #define pci_ss_list_14dc_0000 NULL #define pci_ss_list_14dc_0001 NULL #define pci_ss_list_14dc_0002 NULL @@ -40299,6 +49520,8 @@ #define pci_ss_list_14e4_080f NULL #define pci_ss_list_14e4_0811 NULL #define pci_ss_list_14e4_0816 NULL +#define pci_ss_list_14e4_1600 NULL +#define pci_ss_list_14e4_1601 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_14e4_1644[] = { &pci_ss_info_14e4_1644_1014_0277, @@ -40332,6 +49555,7 @@ &pci_ss_info_14e4_1645_103c_128b, &pci_ss_info_14e4_1645_103c_12a4, &pci_ss_info_14e4_1645_103c_12c1, + &pci_ss_info_14e4_1645_103c_1300, &pci_ss_info_14e4_1645_10a9_8010, &pci_ss_info_14e4_1645_10a9_8011, &pci_ss_info_14e4_1645_10a9_8012, @@ -40371,9 +49595,14 @@ &pci_ss_info_14e4_1648_10b7_2000, &pci_ss_info_14e4_1648_10b7_3000, &pci_ss_info_14e4_1648_1166_1648, + &pci_ss_info_14e4_1648_1734_100b, NULL }; -#define pci_ss_list_14e4_164a NULL +static const pciSubsystemInfo *pci_ss_list_14e4_164a[] = { + &pci_ss_info_14e4_164a_103c_3101, + NULL +}; +#define pci_ss_list_14e4_164c NULL #define pci_ss_list_14e4_164d NULL static const pciSubsystemInfo *pci_ss_list_14e4_1653[] = { &pci_ss_info_14e4_1653_0e11_00e3, @@ -40382,19 +49611,41 @@ static const pciSubsystemInfo *pci_ss_list_14e4_1654[] = { &pci_ss_info_14e4_1654_0e11_00e3, &pci_ss_info_14e4_1654_103c_3100, + &pci_ss_info_14e4_1654_103c_3226, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_14e4_1659[] = { + &pci_ss_info_14e4_1659_1014_02c6, + &pci_ss_info_14e4_1659_103c_7031, + &pci_ss_info_14e4_1659_103c_7032, + &pci_ss_info_14e4_1659_1734_1061, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_14e4_165d[] = { + &pci_ss_info_14e4_165d_1028_865d, NULL }; -#define pci_ss_list_14e4_1659 NULL -#define pci_ss_list_14e4_165d NULL static const pciSubsystemInfo *pci_ss_list_14e4_165e[] = { + &pci_ss_info_14e4_165e_103c_088c, &pci_ss_info_14e4_165e_103c_0890, + &pci_ss_info_14e4_165e_103c_099c, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_14e4_1668[] = { + &pci_ss_info_14e4_1668_103c_7039, NULL }; +#define pci_ss_list_14e4_166a NULL +#define pci_ss_list_14e4_166b NULL #define pci_ss_list_14e4_166e NULL static const pciSubsystemInfo *pci_ss_list_14e4_1677[] = { &pci_ss_info_14e4_1677_1028_0179, + &pci_ss_info_14e4_1677_1028_0182, + &pci_ss_info_14e4_1677_1028_01ad, + &pci_ss_info_14e4_1677_1734_105d, NULL }; +#define pci_ss_list_14e4_1678 NULL #define pci_ss_list_14e4_167d NULL #define pci_ss_list_14e4_167e NULL static const pciSubsystemInfo *pci_ss_list_14e4_1696[] = { @@ -40402,7 +49653,10 @@ &pci_ss_info_14e4_1696_14e4_000d, NULL }; -#define pci_ss_list_14e4_169c NULL +static const pciSubsystemInfo *pci_ss_list_14e4_169c[] = { + &pci_ss_info_14e4_169c_103c_308b, + NULL +}; #define pci_ss_list_14e4_169d NULL static const pciSubsystemInfo *pci_ss_list_14e4_16a6[] = { &pci_ss_info_14e4_16a6_0e11_00bb, @@ -40424,7 +49678,11 @@ &pci_ss_info_14e4_16a8_10b7_2001, NULL }; -#define pci_ss_list_14e4_16aa NULL +static const pciSubsystemInfo *pci_ss_list_14e4_16aa[] = { + &pci_ss_info_14e4_16aa_103c_3102, + NULL +}; +#define pci_ss_list_14e4_16ac NULL static const pciSubsystemInfo *pci_ss_list_14e4_16c6[] = { &pci_ss_info_14e4_16c6_10b7_1100, &pci_ss_info_14e4_16c6_14e4_000c, @@ -40444,7 +49702,12 @@ #define pci_ss_list_14e4_16f7 NULL #define pci_ss_list_14e4_16fd NULL #define pci_ss_list_14e4_16fe NULL -#define pci_ss_list_14e4_170c NULL +static const pciSubsystemInfo *pci_ss_list_14e4_170c[] = { + &pci_ss_info_14e4_170c_1028_0188, + &pci_ss_info_14e4_170c_1028_0196, + &pci_ss_info_14e4_170c_103c_099c, + NULL +}; static const pciSubsystemInfo *pci_ss_list_14e4_170d[] = { &pci_ss_info_14e4_170d_1014_0545, NULL @@ -40467,13 +49730,30 @@ #define pci_ss_list_14e4_4312 NULL #define pci_ss_list_14e4_4313 NULL #define pci_ss_list_14e4_4315 NULL +static const pciSubsystemInfo *pci_ss_list_14e4_4318[] = { + &pci_ss_info_14e4_4318_103c_1356, + &pci_ss_info_14e4_4318_1468_0311, + &pci_ss_info_14e4_4318_1468_0312, + &pci_ss_info_14e4_4318_14e4_0449, + &pci_ss_info_14e4_4318_14e4_4318, + &pci_ss_info_14e4_4318_16ec_0119, + NULL +}; +#define pci_ss_list_14e4_4319 NULL static const pciSubsystemInfo *pci_ss_list_14e4_4320[] = { &pci_ss_info_14e4_4320_1028_0001, &pci_ss_info_14e4_4320_1028_0003, + &pci_ss_info_14e4_4320_103c_12f4, + &pci_ss_info_14e4_4320_103c_12fa, &pci_ss_info_14e4_4320_1043_100f, + &pci_ss_info_14e4_4320_1057_7025, + &pci_ss_info_14e4_4320_106b_004e, + &pci_ss_info_14e4_4320_144f_7050, &pci_ss_info_14e4_4320_14e4_4320, &pci_ss_info_14e4_4320_1737_4320, + &pci_ss_info_14e4_4320_1799_7001, &pci_ss_info_14e4_4320_1799_7010, + &pci_ss_info_14e4_4320_185f_1220, NULL }; #define pci_ss_list_14e4_4321 NULL @@ -40520,6 +49800,7 @@ #define pci_ss_list_14e4_4716 NULL #define pci_ss_list_14e4_4717 NULL #define pci_ss_list_14e4_4718 NULL +#define pci_ss_list_14e4_4719 NULL #define pci_ss_list_14e4_4720 NULL #define pci_ss_list_14e4_5365 NULL #define pci_ss_list_14e4_5600 NULL @@ -40531,6 +49812,7 @@ #define pci_ss_list_14e4_5680 NULL #define pci_ss_list_14e4_5690 NULL #define pci_ss_list_14e4_5691 NULL +#define pci_ss_list_14e4_5692 NULL #define pci_ss_list_14e4_5820 NULL #define pci_ss_list_14e4_5821 NULL #define pci_ss_list_14e4_5822 NULL @@ -40542,6 +49824,7 @@ #endif #define pci_ss_list_14ea_ab06 NULL #define pci_ss_list_14ea_ab07 NULL +#define pci_ss_list_14ea_ab08 NULL #define pci_ss_list_14f1_1002 NULL #define pci_ss_list_14f1_1003 NULL #define pci_ss_list_14f1_1004 NULL @@ -40603,6 +49886,7 @@ &pci_ss_info_14f1_1066_122d_4033, NULL }; +#define pci_ss_list_14f1_1085 NULL #define pci_ss_list_14f1_1433 NULL #define pci_ss_list_14f1_1434 NULL #define pci_ss_list_14f1_1435 NULL @@ -40631,6 +49915,7 @@ &pci_ss_info_14f1_1803_0e11_0043, NULL }; +#define pci_ss_list_14f1_1811 NULL static const pciSubsystemInfo *pci_ss_list_14f1_1815[] = { &pci_ss_info_14f1_1815_0e11_0022, &pci_ss_info_14f1_1815_0e11_0042, @@ -40656,7 +49941,10 @@ #define pci_ss_list_14f1_2016 NULL #define pci_ss_list_14f1_2043 NULL #define pci_ss_list_14f1_2044 NULL -#define pci_ss_list_14f1_2045 NULL +static const pciSubsystemInfo *pci_ss_list_14f1_2045[] = { + &pci_ss_info_14f1_2045_14f1_2045, + NULL +}; #define pci_ss_list_14f1_2046 NULL #define pci_ss_list_14f1_2063 NULL #define pci_ss_list_14f1_2064 NULL @@ -40703,8 +49991,84 @@ }; #define pci_ss_list_14f1_2f02 NULL #define pci_ss_list_14f1_2f11 NULL +#define pci_ss_list_14f1_2f20 NULL #define pci_ss_list_14f1_8234 NULL -#define pci_ss_list_14f1_8800 NULL +static const pciSubsystemInfo *pci_ss_list_14f1_8800[] = { + &pci_ss_info_14f1_8800_0070_2801, + &pci_ss_info_14f1_8800_0070_3401, + &pci_ss_info_14f1_8800_0070_9001, + &pci_ss_info_14f1_8800_0070_9200, + &pci_ss_info_14f1_8800_0070_9202, + &pci_ss_info_14f1_8800_0070_9402, + &pci_ss_info_14f1_8800_0070_9802, + &pci_ss_info_14f1_8800_1002_00f8, + &pci_ss_info_14f1_8800_1002_a101, + &pci_ss_info_14f1_8800_1043_4823, + &pci_ss_info_14f1_8800_107d_6613, + &pci_ss_info_14f1_8800_107d_6620, + &pci_ss_info_14f1_8800_107d_663c, + &pci_ss_info_14f1_8800_107d_665f, + &pci_ss_info_14f1_8800_10fc_d003, + &pci_ss_info_14f1_8800_10fc_d035, + &pci_ss_info_14f1_8800_1421_0334, + &pci_ss_info_14f1_8800_1461_000a, + &pci_ss_info_14f1_8800_1461_000b, + &pci_ss_info_14f1_8800_1461_8011, + &pci_ss_info_14f1_8800_1462_8606, + &pci_ss_info_14f1_8800_14c7_0107, + &pci_ss_info_14f1_8800_14f1_0187, + &pci_ss_info_14f1_8800_14f1_0342, + &pci_ss_info_14f1_8800_153b_1166, + &pci_ss_info_14f1_8800_1540_2580, + &pci_ss_info_14f1_8800_1554_4811, + &pci_ss_info_14f1_8800_1554_4813, + &pci_ss_info_14f1_8800_17de_08a1, + &pci_ss_info_14f1_8800_17de_08a6, + &pci_ss_info_14f1_8800_17de_08b2, + &pci_ss_info_14f1_8800_17de_a8a6, + &pci_ss_info_14f1_8800_1822_0025, + &pci_ss_info_14f1_8800_18ac_d500, + &pci_ss_info_14f1_8800_18ac_d810, + &pci_ss_info_14f1_8800_18ac_d820, + &pci_ss_info_14f1_8800_18ac_db00, + &pci_ss_info_14f1_8800_18ac_db11, + &pci_ss_info_14f1_8800_18ac_db50, + &pci_ss_info_14f1_8800_7063_3000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_14f1_8801[] = { + &pci_ss_info_14f1_8801_0070_2801, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_14f1_8802[] = { + &pci_ss_info_14f1_8802_0070_2801, + &pci_ss_info_14f1_8802_0070_9002, + &pci_ss_info_14f1_8802_1043_4823, + &pci_ss_info_14f1_8802_107d_663c, + &pci_ss_info_14f1_8802_14f1_0187, + &pci_ss_info_14f1_8802_17de_08a1, + &pci_ss_info_14f1_8802_17de_08a6, + &pci_ss_info_14f1_8802_18ac_d500, + &pci_ss_info_14f1_8802_18ac_d810, + &pci_ss_info_14f1_8802_18ac_d820, + &pci_ss_info_14f1_8802_18ac_db00, + &pci_ss_info_14f1_8802_18ac_db10, + &pci_ss_info_14f1_8802_7063_3000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_14f1_8804[] = { + &pci_ss_info_14f1_8804_0070_9002, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_14f1_8811[] = { + &pci_ss_info_14f1_8811_0070_3401, + &pci_ss_info_14f1_8811_1462_8606, + &pci_ss_info_14f1_8811_18ac_d500, + &pci_ss_info_14f1_8811_18ac_d810, + &pci_ss_info_14f1_8811_18ac_d820, + &pci_ss_info_14f1_8811_18ac_db00, + NULL +}; #endif #define pci_ss_list_14f2_0120 NULL #define pci_ss_list_14f2_0121 NULL @@ -40738,6 +50102,8 @@ #define pci_ss_list_151a_1002 NULL #define pci_ss_list_151a_1004 NULL #define pci_ss_list_151a_1008 NULL +#define pci_ss_list_151c_0003 NULL +#define pci_ss_list_151c_4000 NULL #define pci_ss_list_151f_0000 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1522_0100[] = { @@ -40751,28 +50117,47 @@ &pci_ss_info_1522_0100_1522_0c00, &pci_ss_info_1522_0100_1522_0d00, &pci_ss_info_1522_0100_1522_1d00, + &pci_ss_info_1522_0100_1522_2000, + &pci_ss_info_1522_0100_1522_2100, + &pci_ss_info_1522_0100_1522_2200, + &pci_ss_info_1522_0100_1522_2300, + &pci_ss_info_1522_0100_1522_2400, + &pci_ss_info_1522_0100_1522_2500, + &pci_ss_info_1522_0100_1522_2600, + &pci_ss_info_1522_0100_1522_2700, NULL }; #endif -#define pci_ss_list_1524_0510 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1524_0510[] = { + &pci_ss_info_1524_0510_103c_006a, + NULL +}; +#define pci_ss_list_1524_0520 NULL +#define pci_ss_list_1524_0530 NULL +#define pci_ss_list_1524_0550 NULL #define pci_ss_list_1524_0610 NULL #define pci_ss_list_1524_1211 NULL #define pci_ss_list_1524_1225 NULL -#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1524_1410[] = { &pci_ss_info_1524_1410_1025_005a, NULL }; -#define pci_ss_list_1524_1411 NULL +static const pciSubsystemInfo *pci_ss_list_1524_1411[] = { + &pci_ss_info_1524_1411_103c_006a, + NULL +}; #define pci_ss_list_1524_1412 NULL #define pci_ss_list_1524_1420 NULL #define pci_ss_list_1524_1421 NULL #define pci_ss_list_1524_1422 NULL #endif +#define pci_ss_list_1532_0020 NULL #define pci_ss_list_1538_0303 NULL #define pci_ss_list_153b_1144 NULL #define pci_ss_list_153b_1147 NULL #define pci_ss_list_153b_1158 NULL +#define pci_ss_list_153f_0001 NULL #define pci_ss_list_1543_3052 NULL #define pci_ss_list_1543_4c22 NULL #define pci_ss_list_1571_a001 NULL @@ -40794,6 +50179,7 @@ #define pci_ss_list_1571_a204 NULL #define pci_ss_list_1571_a205 NULL #define pci_ss_list_1571_a206 NULL +#define pci_ss_list_1578_5615 NULL #define pci_ss_list_157c_8001 NULL #define pci_ss_list_1592_0781 NULL #define pci_ss_list_1592_0782 NULL @@ -40811,11 +50197,12 @@ #define pci_ss_list_15b3_5a44 NULL #define pci_ss_list_15b3_5a45 NULL #define pci_ss_list_15b3_5a46 NULL -#define pci_ss_list_15b3_5e8c NULL #define pci_ss_list_15b3_5e8d NULL +#define pci_ss_list_15b3_6274 NULL #define pci_ss_list_15b3_6278 NULL #define pci_ss_list_15b3_6279 NULL #define pci_ss_list_15b3_6282 NULL +#define pci_ss_list_15bc_1100 NULL #define pci_ss_list_15bc_2922 NULL #define pci_ss_list_15bc_2928 NULL #define pci_ss_list_15bc_2929 NULL @@ -40828,6 +50215,11 @@ #define pci_ss_list_15ec_5102 NULL #define pci_ss_list_1619_0400 NULL #define pci_ss_list_1619_0440 NULL +#define pci_ss_list_1619_0610 NULL +#define pci_ss_list_1619_0620 NULL +#define pci_ss_list_1619_0640 NULL +#define pci_ss_list_1619_1610 NULL +#define pci_ss_list_1619_2610 NULL #define pci_ss_list_1626_8410 NULL #define pci_ss_list_1629_1003 NULL #define pci_ss_list_1629_2002 NULL @@ -40838,11 +50230,18 @@ #define pci_ss_list_165a_c100 NULL #define pci_ss_list_165a_d200 NULL #define pci_ss_list_165a_d300 NULL +#define pci_ss_list_165f_1020 NULL #define pci_ss_list_1668_0100 NULL #define pci_ss_list_166d_0001 NULL #define pci_ss_list_166d_0002 NULL #define pci_ss_list_1677_104e NULL #define pci_ss_list_1677_12d7 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_167b_2102[] = { + &pci_ss_info_167b_2102_187e_3406, + NULL +}; +#endif #define pci_ss_list_1681_0010 NULL #define pci_ss_list_1688_1170 NULL #define pci_ss_list_168c_0007 NULL @@ -40850,36 +50249,66 @@ #define pci_ss_list_168c_0012 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_168c_0013[] = { + &pci_ss_info_168c_0013_1113_d301, &pci_ss_info_168c_0013_1186_3202, &pci_ss_info_168c_0013_1186_3203, + &pci_ss_info_168c_0013_1186_3a12, &pci_ss_info_168c_0013_1186_3a13, + &pci_ss_info_168c_0013_1186_3a14, + &pci_ss_info_168c_0013_1186_3a17, + &pci_ss_info_168c_0013_1186_3a18, + &pci_ss_info_168c_0013_1186_3a63, &pci_ss_info_168c_0013_1186_3a94, &pci_ss_info_168c_0013_1385_4d00, + &pci_ss_info_168c_0013_1458_e911, &pci_ss_info_168c_0013_14b7_0a60, &pci_ss_info_168c_0013_168c_0013, &pci_ss_info_168c_0013_168c_1025, + &pci_ss_info_168c_0013_168c_1027, &pci_ss_info_168c_0013_168c_2026, + &pci_ss_info_168c_0013_168c_2041, + &pci_ss_info_168c_0013_168c_2042, + &pci_ss_info_168c_0013_16ab_7302, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_168c_001a[] = { + &pci_ss_info_168c_001a_1186_3a15, + &pci_ss_info_168c_001a_1186_3a16, + &pci_ss_info_168c_001a_1186_3a23, + &pci_ss_info_168c_001a_1186_3a24, + &pci_ss_info_168c_001a_168c_1052, NULL }; +static const pciSubsystemInfo *pci_ss_list_168c_001b[] = { + &pci_ss_info_168c_001b_1186_3a19, + &pci_ss_info_168c_001b_1186_3a22, + NULL +}; +#define pci_ss_list_168c_0020 NULL #define pci_ss_list_168c_1014 NULL #endif +#define pci_ss_list_169c_0044 NULL #define pci_ss_list_16ab_1100 NULL #define pci_ss_list_16ab_1101 NULL #define pci_ss_list_16ab_1102 NULL +#define pci_ss_list_16ab_8501 NULL #define pci_ss_list_16ae_1141 NULL #define pci_ss_list_16ca_0001 NULL #define pci_ss_list_16e3_1e0f NULL #define pci_ss_list_16ec_00ff NULL +#define pci_ss_list_16ec_0116 NULL #define pci_ss_list_16ec_3685 NULL #define pci_ss_list_16ed_1001 NULL #define pci_ss_list_16f4_8000 NULL #define pci_ss_list_170b_0100 NULL #define pci_ss_list_1725_7174 NULL +#define pci_ss_list_172a_13c8 NULL #define pci_ss_list_1737_0013 NULL #define pci_ss_list_1737_0015 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1737_1032[] = { &pci_ss_info_1737_1032_1737_0015, + &pci_ss_info_1737_1032_1737_0024, NULL }; static const pciSubsystemInfo *pci_ss_list_1737_1064[] = { @@ -40909,12 +50338,40 @@ #define pci_ss_list_1799_6020 NULL #define pci_ss_list_1799_6060 NULL #define pci_ss_list_1799_7000 NULL +#define pci_ss_list_1799_7010 NULL +#define pci_ss_list_179c_0557 NULL +#define pci_ss_list_179c_0566 NULL +#define pci_ss_list_179c_5031 NULL +#define pci_ss_list_179c_5121 NULL +#define pci_ss_list_179c_5211 NULL +#define pci_ss_list_179c_5679 NULL #define pci_ss_list_17a0_8033 NULL #define pci_ss_list_17a0_8034 NULL #define pci_ss_list_17b3_ab08 NULL #define pci_ss_list_17b4_0011 NULL #define pci_ss_list_17cc_2280 NULL -#define pci_ss_list_17fe_2220 NULL +#define pci_ss_list_17d3_1110 NULL +#define pci_ss_list_17d3_1120 NULL +#define pci_ss_list_17d3_1130 NULL +#define pci_ss_list_17d3_1160 NULL +#define pci_ss_list_17d3_1210 NULL +#define pci_ss_list_17d3_1220 NULL +#define pci_ss_list_17d3_1230 NULL +#define pci_ss_list_17d3_1260 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_17d5_5831[] = { + &pci_ss_info_17d5_5831_103c_12d5, + NULL +}; +#define pci_ss_list_17d5_5832 NULL +#endif +#define pci_ss_list_17fe_2120 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_17fe_2220[] = { + &pci_ss_info_17fe_2220_17fe_2220, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1813_4000[] = { &pci_ss_info_1813_4000_16be_0001, @@ -40925,19 +50382,40 @@ NULL }; #endif -#define pci_ss_list_1814_0101 NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1814_0101[] = { + &pci_ss_info_1814_0101_1043_0127, + &pci_ss_info_1814_0101_1462_6828, + NULL +}; +#define pci_ss_list_1814_0200 NULL static const pciSubsystemInfo *pci_ss_list_1814_0201[] = { + &pci_ss_info_1814_0201_1043_130f, &pci_ss_info_1814_0201_1371_001e, &pci_ss_info_1814_0201_1371_001f, &pci_ss_info_1814_0201_1371_0020, + &pci_ss_info_1814_0201_1458_e381, + &pci_ss_info_1814_0201_1458_e931, + &pci_ss_info_1814_0201_1462_6835, + &pci_ss_info_1814_0201_1737_0032, + &pci_ss_info_1814_0201_1799_700a, + &pci_ss_info_1814_0201_1799_701a, + &pci_ss_info_1814_0201_185f_22a0, NULL }; +static const pciSubsystemInfo *pci_ss_list_1814_0301[] = { + &pci_ss_info_1814_0301_2561_1814, + NULL +}; +#define pci_ss_list_1814_0401 NULL #endif +#define pci_ss_list_1822_4e35 NULL #define pci_ss_list_182d_3069 NULL +#define pci_ss_list_182d_9790 NULL #define pci_ss_list_183b_08a7 NULL #define pci_ss_list_183b_08a8 NULL #define pci_ss_list_183b_08a9 NULL +#define pci_ss_list_1864_2110 NULL #define pci_ss_list_1867_5a44 NULL #define pci_ss_list_1867_5a45 NULL #define pci_ss_list_1867_5a46 NULL @@ -40947,14 +50425,57 @@ #define pci_ss_list_1888_0601 NULL #define pci_ss_list_1888_0710 NULL #define pci_ss_list_1888_0720 NULL +#define pci_ss_list_18ac_d500 NULL #define pci_ss_list_18ac_d810 NULL +#define pci_ss_list_18ac_d820 NULL +#define pci_ss_list_18b8_b001 NULL +#define pci_ss_list_18ca_0020 NULL #define pci_ss_list_18ca_0040 NULL +#define pci_ss_list_18d2_3069 NULL +#define pci_ss_list_18dd_4c6f NULL #define pci_ss_list_18e6_0001 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_18ec_c006[] = { + &pci_ss_info_18ec_c006_18ec_d001, + &pci_ss_info_18ec_c006_18ec_d002, + &pci_ss_info_18ec_c006_18ec_d003, + &pci_ss_info_18ec_c006_18ec_d004, + NULL +}; +#define pci_ss_list_18ec_c045 NULL +#define pci_ss_list_18ec_c050 NULL +static const pciSubsystemInfo *pci_ss_list_18ec_c058[] = { + &pci_ss_info_18ec_c058_18ec_d001, + &pci_ss_info_18ec_c058_18ec_d002, + &pci_ss_info_18ec_c058_18ec_d003, + &pci_ss_info_18ec_c058_18ec_d004, + NULL +}; +#endif #define pci_ss_list_18f7_0001 NULL #define pci_ss_list_18f7_0002 NULL #define pci_ss_list_18f7_0004 NULL #define pci_ss_list_18f7_0005 NULL #define pci_ss_list_18f7_000a NULL +#define pci_ss_list_1923_0100 NULL +#define pci_ss_list_1942_e511 NULL +#define pci_ss_list_1957_0080 NULL +#define pci_ss_list_1957_0081 NULL +#define pci_ss_list_1957_0082 NULL +#define pci_ss_list_1957_0083 NULL +#define pci_ss_list_1957_0084 NULL +#define pci_ss_list_1957_0085 NULL +#define pci_ss_list_1957_0086 NULL +#define pci_ss_list_1957_0087 NULL +#define pci_ss_list_1966_1975 NULL +#define pci_ss_list_196a_0101 NULL +#define pci_ss_list_196a_0102 NULL +#define pci_ss_list_197b_2360 NULL +#define pci_ss_list_197b_2363 NULL +#define pci_ss_list_1989_0001 NULL +#define pci_ss_list_1989_8001 NULL +#define pci_ss_list_19ae_0520 NULL +#define pci_ss_list_1a03_2000 NULL #define pci_ss_list_1a08_0000 NULL #define pci_ss_list_1c1c_0001 NULL #define pci_ss_list_1d44_a400 NULL @@ -40963,6 +50484,8 @@ #define pci_ss_list_1de1_690c NULL #define pci_ss_list_1de1_dc29 NULL #define pci_ss_list_1fc0_0300 NULL +#define pci_ss_list_1fc1_000d NULL +#define pci_ss_list_1fce_0001 NULL #define pci_ss_list_2348_2010 NULL #define pci_ss_list_3388_0013 NULL #define pci_ss_list_3388_0014 NULL @@ -40971,9 +50494,11 @@ static const pciSubsystemInfo *pci_ss_list_3388_0021[] = { &pci_ss_info_3388_0021_4c53_1050, &pci_ss_info_3388_0021_4c53_1080, + &pci_ss_info_3388_0021_4c53_1090, &pci_ss_info_3388_0021_4c53_10a0, &pci_ss_info_3388_0021_4c53_3010, &pci_ss_info_3388_0021_4c53_3011, + &pci_ss_info_3388_0021_4c53_4000, NULL }; #define pci_ss_list_3388_0022 NULL @@ -40993,16 +50518,31 @@ NULL }; #endif +#define pci_ss_list_3842_c370 NULL #define pci_ss_list_3d3d_0001 NULL -#define pci_ss_list_3d3d_0002 NULL -#define pci_ss_list_3d3d_0003 NULL +static const pciSubsystemInfo *pci_ss_list_3d3d_0002[] = { + &pci_ss_info_3d3d_0002_0000_0000, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_3d3d_0003[] = { + &pci_ss_info_3d3d_0003_0000_0000, + NULL +}; #define pci_ss_list_3d3d_0004 NULL #define pci_ss_list_3d3d_0005 NULL -#define pci_ss_list_3d3d_0006 NULL +static const pciSubsystemInfo *pci_ss_list_3d3d_0006[] = { + &pci_ss_info_3d3d_0006_0000_0000, + &pci_ss_info_3d3d_0006_1048_0a42, + NULL +}; #define pci_ss_list_3d3d_0007 NULL -#define pci_ss_list_3d3d_0008 NULL +static const pciSubsystemInfo *pci_ss_list_3d3d_0008[] = { + &pci_ss_info_3d3d_0008_1048_0a42, + NULL +}; static const pciSubsystemInfo *pci_ss_list_3d3d_0009[] = { &pci_ss_info_3d3d_0009_1040_0011, + &pci_ss_info_3d3d_0009_1048_0a42, &pci_ss_info_3d3d_0009_13e9_1000, &pci_ss_info_3d3d_0009_3d3d_0100, &pci_ss_info_3d3d_0009_3d3d_0111, @@ -41054,16 +50594,40 @@ }; #define pci_ss_list_4005_4710 NULL #define pci_ss_list_4033_1360 NULL +#define pci_ss_list_4144_0044 NULL #define pci_ss_list_416c_0100 NULL #define pci_ss_list_416c_0200 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_4444_0016[] = { + &pci_ss_info_4444_0016_0070_0003, + &pci_ss_info_4444_0016_0070_0009, + &pci_ss_info_4444_0016_0070_0801, + &pci_ss_info_4444_0016_0070_0807, + &pci_ss_info_4444_0016_0070_4001, &pci_ss_info_4444_0016_0070_4009, + &pci_ss_info_4444_0016_0070_4801, + &pci_ss_info_4444_0016_0070_4803, + &pci_ss_info_4444_0016_0070_8003, + &pci_ss_info_4444_0016_0070_8801, + &pci_ss_info_4444_0016_0070_c801, + &pci_ss_info_4444_0016_0070_e807, + &pci_ss_info_4444_0016_0070_e817, + &pci_ss_info_4444_0016_0270_0801, + &pci_ss_info_4444_0016_12ab_fff3, + &pci_ss_info_4444_0016_12ab_ffff, + &pci_ss_info_4444_0016_4070_8801, + &pci_ss_info_4444_0016_9005_0092, + &pci_ss_info_4444_0016_9005_0093, + &pci_ss_info_4444_0016_ff92_0070, NULL }; static const pciSubsystemInfo *pci_ss_list_4444_0803[] = { &pci_ss_info_4444_0803_0070_4000, &pci_ss_info_4444_0803_0070_4001, + &pci_ss_info_4444_0803_0070_4800, + &pci_ss_info_4444_0803_12ab_0000, + &pci_ss_info_4444_0803_1461_a3ce, + &pci_ss_info_4444_0803_1461_a3cf, NULL }; #endif @@ -41107,6 +50671,7 @@ #define pci_ss_list_5046_1001 NULL #define pci_ss_list_5053_2010 NULL #define pci_ss_list_5145_3031 NULL +#define pci_ss_list_5168_0301 NULL #define pci_ss_list_5301_0001 NULL #define pci_ss_list_5333_0551 NULL #define pci_ss_list_5333_5631 NULL @@ -41235,6 +50800,7 @@ #define pci_ss_list_5333_8c11 NULL static const pciSubsystemInfo *pci_ss_list_5333_8c12[] = { &pci_ss_info_5333_8c12_1014_017f, + &pci_ss_info_5333_8c12_1179_0001, NULL }; static const pciSubsystemInfo *pci_ss_list_5333_8c13[] = { @@ -41277,13 +50843,14 @@ #define pci_ss_list_6374_6773 NULL #define pci_ss_list_6666_0001 NULL #define pci_ss_list_6666_0002 NULL +#define pci_ss_list_6666_0004 NULL +#define pci_ss_list_6666_0101 NULL +#define pci_ss_list_7063_2000 NULL +#define pci_ss_list_7063_3000 NULL #define pci_ss_list_8008_0010 NULL #define pci_ss_list_8008_0011 NULL #define pci_ss_list_8086_0007 NULL -static const pciSubsystemInfo *pci_ss_list_8086_0008[] = { - &pci_ss_info_8086_0008_0008_1000, - NULL -}; +#define pci_ss_list_8086_0008 NULL #define pci_ss_list_8086_0039 NULL #define pci_ss_list_8086_0122 NULL #define pci_ss_list_8086_0309 NULL @@ -41302,6 +50869,11 @@ #define pci_ss_list_8086_0336 NULL #define pci_ss_list_8086_0340 NULL #define pci_ss_list_8086_0341 NULL +#define pci_ss_list_8086_0370 NULL +#define pci_ss_list_8086_0371 NULL +#define pci_ss_list_8086_0372 NULL +#define pci_ss_list_8086_0373 NULL +#define pci_ss_list_8086_0374 NULL #define pci_ss_list_8086_0482 NULL #define pci_ss_list_8086_0483 NULL #define pci_ss_list_8086_0484 NULL @@ -41328,6 +50900,7 @@ #define pci_ss_list_8086_0536 NULL #define pci_ss_list_8086_0537 NULL static const pciSubsystemInfo *pci_ss_list_8086_0600[] = { + &pci_ss_info_8086_0600_8086_01af, &pci_ss_info_8086_0600_8086_01c1, &pci_ss_info_8086_0600_8086_01f7, NULL @@ -41380,6 +50953,7 @@ &pci_ss_info_8086_1009_8086_2109, NULL }; +#define pci_ss_list_8086_100a NULL static const pciSubsystemInfo *pci_ss_list_8086_100c[] = { &pci_ss_info_8086_100c_8086_1112, &pci_ss_info_8086_100c_8086_2112, @@ -41396,11 +50970,14 @@ &pci_ss_info_8086_100e_1014_0265, &pci_ss_info_8086_100e_1014_0267, &pci_ss_info_8086_100e_1014_026a, + &pci_ss_info_8086_100e_1024_0134, &pci_ss_info_8086_100e_1028_002e, &pci_ss_info_8086_100e_1028_0151, &pci_ss_info_8086_100e_107b_8920, &pci_ss_info_8086_100e_8086_001e, &pci_ss_info_8086_100e_8086_002e, + &pci_ss_info_8086_100e_8086_1376, + &pci_ss_info_8086_100e_8086_1476, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_100f[] = { @@ -41411,11 +50988,14 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_8086_1010[] = { + &pci_ss_info_8086_1010_0e11_00db, &pci_ss_info_8086_1010_1014_027c, &pci_ss_info_8086_1010_18fb_7872, + &pci_ss_info_8086_1010_1fc1_0026, &pci_ss_info_8086_1010_4c53_1080, &pci_ss_info_8086_1010_4c53_10a0, &pci_ss_info_8086_1010_8086_1011, + &pci_ss_info_8086_1010_8086_1012, &pci_ss_info_8086_1010_8086_101a, &pci_ss_info_8086_1010_8086_3424, NULL @@ -41427,6 +51007,7 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_8086_1012[] = { + &pci_ss_info_8086_1012_0e11_00dc, &pci_ss_info_8086_1012_8086_1012, NULL }; @@ -41454,11 +51035,13 @@ }; static const pciSubsystemInfo *pci_ss_list_8086_1019[] = { &pci_ss_info_8086_1019_1458_1019, + &pci_ss_info_8086_1019_1458_e000, &pci_ss_info_8086_1019_8086_1019, &pci_ss_info_8086_1019_8086_301f, &pci_ss_info_8086_1019_8086_3427, NULL }; +#define pci_ss_list_8086_101a NULL static const pciSubsystemInfo *pci_ss_list_8086_101d[] = { &pci_ss_info_8086_101d_8086_1000, NULL @@ -41470,6 +51053,7 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_8086_1026[] = { + &pci_ss_info_8086_1026_1028_0169, &pci_ss_info_8086_1026_8086_1000, &pci_ss_info_8086_1026_8086_1001, &pci_ss_info_8086_1026_8086_1002, @@ -41477,6 +51061,7 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_8086_1027[] = { + &pci_ss_info_8086_1027_103c_3103, &pci_ss_info_8086_1027_8086_1001, &pci_ss_info_8086_1027_8086_1002, &pci_ss_info_8086_1027_8086_1003, @@ -41498,6 +51083,7 @@ &pci_ss_info_8086_1031_144d_c001, &pci_ss_info_8086_1031_144d_c003, &pci_ss_info_8086_1031_144d_c006, + &pci_ss_info_8086_1031_813c_104d, NULL }; #define pci_ss_list_8086_1032 NULL @@ -41506,7 +51092,10 @@ #define pci_ss_list_8086_1035 NULL #define pci_ss_list_8086_1036 NULL #define pci_ss_list_8086_1037 NULL -#define pci_ss_list_8086_1038 NULL +static const pciSubsystemInfo *pci_ss_list_8086_1038[] = { + &pci_ss_info_8086_1038_0e11_0098, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_1039[] = { &pci_ss_info_8086_1039_1014_0267, NULL @@ -41529,15 +51118,29 @@ &pci_ss_info_8086_1048_8086_a11f, NULL }; +#define pci_ss_list_8086_104b NULL static const pciSubsystemInfo *pci_ss_list_8086_1050[] = { &pci_ss_info_8086_1050_1462_728c, &pci_ss_info_8086_1050_1462_758c, + &pci_ss_info_8086_1050_8086_3020, + &pci_ss_info_8086_1050_8086_302f, &pci_ss_info_8086_1050_8086_3427, NULL }; #define pci_ss_list_8086_1051 NULL +#define pci_ss_list_8086_1052 NULL +#define pci_ss_list_8086_1053 NULL #define pci_ss_list_8086_1059 NULL -#define pci_ss_list_8086_1064 NULL +static const pciSubsystemInfo *pci_ss_list_8086_105e[] = { + &pci_ss_info_8086_105e_1775_6003, + NULL +}; +#define pci_ss_list_8086_105f NULL +#define pci_ss_list_8086_1060 NULL +static const pciSubsystemInfo *pci_ss_list_8086_1064[] = { + &pci_ss_info_8086_1064_1043_80f8, + NULL +}; #define pci_ss_list_8086_1065 NULL #define pci_ss_list_8086_1066 NULL #define pci_ss_list_8086_1067 NULL @@ -41553,6 +51156,7 @@ }; static const pciSubsystemInfo *pci_ss_list_8086_1076[] = { &pci_ss_info_8086_1076_1028_0165, + &pci_ss_info_8086_1076_1028_019a, &pci_ss_info_8086_1076_8086_0076, &pci_ss_info_8086_1076_8086_1076, &pci_ss_info_8086_1076_8086_1176, @@ -41572,6 +51176,7 @@ static const pciSubsystemInfo *pci_ss_list_8086_1079[] = { &pci_ss_info_8086_1079_103c_12a6, &pci_ss_info_8086_1079_103c_12cf, + &pci_ss_info_8086_1079_1fc1_0027, &pci_ss_info_8086_1079_4c53_1090, &pci_ss_info_8086_1079_4c53_10b0, &pci_ss_info_8086_1079_8086_0079, @@ -41591,6 +51196,38 @@ &pci_ss_info_8086_107b_8086_107b, NULL }; +#define pci_ss_list_8086_107c NULL +#define pci_ss_list_8086_107d NULL +#define pci_ss_list_8086_107e NULL +#define pci_ss_list_8086_107f NULL +#define pci_ss_list_8086_1080 NULL +#define pci_ss_list_8086_1081 NULL +#define pci_ss_list_8086_1082 NULL +#define pci_ss_list_8086_1083 NULL +#define pci_ss_list_8086_1084 NULL +#define pci_ss_list_8086_1085 NULL +#define pci_ss_list_8086_1086 NULL +#define pci_ss_list_8086_1087 NULL +#define pci_ss_list_8086_1089 NULL +#define pci_ss_list_8086_108a NULL +#define pci_ss_list_8086_108b NULL +#define pci_ss_list_8086_108c NULL +#define pci_ss_list_8086_108e NULL +#define pci_ss_list_8086_108f NULL +#define pci_ss_list_8086_1092 NULL +#define pci_ss_list_8086_1096 NULL +#define pci_ss_list_8086_1097 NULL +#define pci_ss_list_8086_1098 NULL +#define pci_ss_list_8086_1099 NULL +#define pci_ss_list_8086_109a NULL +#define pci_ss_list_8086_109b NULL +#define pci_ss_list_8086_10a0 NULL +#define pci_ss_list_8086_10a1 NULL +#define pci_ss_list_8086_10b0 NULL +#define pci_ss_list_8086_10b2 NULL +#define pci_ss_list_8086_10b3 NULL +#define pci_ss_list_8086_10b4 NULL +#define pci_ss_list_8086_10b5 NULL #define pci_ss_list_8086_1107 NULL static const pciSubsystemInfo *pci_ss_list_8086_1130[] = { &pci_ss_info_8086_1130_1025_1016, @@ -41605,6 +51242,7 @@ &pci_ss_info_8086_1132_1025_1016, &pci_ss_info_8086_1132_104d_80df, &pci_ss_info_8086_1132_8086_4532, + &pci_ss_info_8086_1132_8086_4541, &pci_ss_info_8086_1132_8086_4557, NULL }; @@ -41684,9 +51322,11 @@ &pci_ss_info_8086_1229_103c_10e3, &pci_ss_info_8086_1229_103c_10e4, &pci_ss_info_8086_1229_103c_1200, + &pci_ss_info_8086_1229_108e_10cf, &pci_ss_info_8086_1229_10c3_1100, &pci_ss_info_8086_1229_10cf_1115, &pci_ss_info_8086_1229_10cf_1143, + &pci_ss_info_8086_1229_110a_008b, &pci_ss_info_8086_1229_1179_0001, &pci_ss_info_8086_1229_1179_0002, &pci_ss_info_8086_1229_1179_0003, @@ -41698,6 +51338,7 @@ &pci_ss_info_8086_1229_144d_2502, &pci_ss_info_8086_1229_1668_1100, &pci_ss_info_8086_1229_4c53_1080, + &pci_ss_info_8086_1229_4c53_10e0, &pci_ss_info_8086_1229_8086_0001, &pci_ss_info_8086_1229_8086_0002, &pci_ss_info_8086_1229_8086_0003, @@ -41706,7 +51347,6 @@ &pci_ss_info_8086_1229_8086_0006, &pci_ss_info_8086_1229_8086_0007, &pci_ss_info_8086_1229_8086_0008, - &pci_ss_info_8086_1229_8086_0009, &pci_ss_info_8086_1229_8086_000a, &pci_ss_info_8086_1229_8086_000b, &pci_ss_info_8086_1229_8086_000c, @@ -41853,15 +51493,19 @@ NULL }; #define pci_ss_list_8086_1a31 NULL +#define pci_ss_list_8086_1a38 NULL +#define pci_ss_list_8086_1a48 NULL #define pci_ss_list_8086_2410 NULL #define pci_ss_list_8086_2411 NULL #define pci_ss_list_8086_2412 NULL #define pci_ss_list_8086_2413 NULL static const pciSubsystemInfo *pci_ss_list_8086_2415[] = { &pci_ss_info_8086_2415_1028_0095, + &pci_ss_info_8086_2415_110a_0051, &pci_ss_info_8086_2415_11d4_0040, &pci_ss_info_8086_2415_11d4_0048, &pci_ss_info_8086_2415_11d4_5340, + &pci_ss_info_8086_2415_1734_1025, NULL }; #define pci_ss_list_8086_2416 NULL @@ -41923,7 +51567,11 @@ &pci_ss_info_8086_2446_104d_80df, NULL }; -#define pci_ss_list_8086_2448 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2448[] = { + &pci_ss_info_8086_2448_103c_099c, + &pci_ss_info_8086_2448_1734_1055, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_2449[] = { &pci_ss_info_8086_2449_0e11_0012, &pci_ss_info_8086_2449_0e11_0091, @@ -41985,6 +51633,7 @@ #define pci_ss_list_8086_245e NULL #define pci_ss_list_8086_2480 NULL static const pciSubsystemInfo *pci_ss_list_8086_2482[] = { + &pci_ss_info_8086_2482_0e11_0030, &pci_ss_info_8086_2482_1014_0220, &pci_ss_info_8086_2482_104d_80e7, &pci_ss_info_8086_2482_15d9_3480, @@ -42001,6 +51650,7 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_8086_2484[] = { + &pci_ss_info_8086_2484_0e11_0030, &pci_ss_info_8086_2484_1014_0220, &pci_ss_info_8086_2484_104d_80e7, &pci_ss_info_8086_2484_15d9_3480, @@ -42022,13 +51672,13 @@ &pci_ss_info_8086_2486_1014_051a, &pci_ss_info_8086_2486_101f_1025, &pci_ss_info_8086_2486_104d_80e7, - &pci_ss_info_8086_2486_1179_0001, &pci_ss_info_8086_2486_134d_4c21, &pci_ss_info_8086_2486_144d_2115, &pci_ss_info_8086_2486_14f1_5421, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_2487[] = { + &pci_ss_info_8086_2487_0e11_0030, &pci_ss_info_8086_2487_1014_0220, &pci_ss_info_8086_2487_104d_80e7, &pci_ss_info_8086_2487_15d9_3480, @@ -42036,6 +51686,7 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_8086_248a[] = { + &pci_ss_info_8086_248a_0e11_0030, &pci_ss_info_8086_248a_1014_0220, &pci_ss_info_8086_248a_104d_80e7, &pci_ss_info_8086_248a_8086_1958, @@ -42058,21 +51709,27 @@ &pci_ss_info_8086_24c2_1025_005a, &pci_ss_info_8086_24c2_1028_0126, &pci_ss_info_8086_24c2_1028_0163, + &pci_ss_info_8086_24c2_1028_0196, + &pci_ss_info_8086_24c2_103c_088c, &pci_ss_info_8086_24c2_103c_0890, &pci_ss_info_8086_24c2_1071_8160, &pci_ss_info_8086_24c2_1462_5800, &pci_ss_info_8086_24c2_1509_2990, + &pci_ss_info_8086_24c2_1734_1055, &pci_ss_info_8086_24c2_4c53_1090, + &pci_ss_info_8086_24c2_8086_4541, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24c3[] = { &pci_ss_info_8086_24c3_1014_0267, &pci_ss_info_8086_24c3_1025_005a, &pci_ss_info_8086_24c3_1028_0126, + &pci_ss_info_8086_24c3_103c_088c, &pci_ss_info_8086_24c3_103c_0890, &pci_ss_info_8086_24c3_1071_8160, &pci_ss_info_8086_24c3_1458_24c2, &pci_ss_info_8086_24c3_1462_5800, + &pci_ss_info_8086_24c3_1734_1055, &pci_ss_info_8086_24c3_4c53_1090, NULL }; @@ -42081,26 +51738,36 @@ &pci_ss_info_8086_24c4_1025_005a, &pci_ss_info_8086_24c4_1028_0126, &pci_ss_info_8086_24c4_1028_0163, + &pci_ss_info_8086_24c4_1028_0196, + &pci_ss_info_8086_24c4_103c_088c, &pci_ss_info_8086_24c4_103c_0890, &pci_ss_info_8086_24c4_1071_8160, &pci_ss_info_8086_24c4_1462_5800, &pci_ss_info_8086_24c4_1509_2990, &pci_ss_info_8086_24c4_4c53_1090, + &pci_ss_info_8086_24c4_8086_4541, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24c5[] = { &pci_ss_info_8086_24c5_0e11_00b8, &pci_ss_info_8086_24c5_1014_0267, &pci_ss_info_8086_24c5_1025_005a, + &pci_ss_info_8086_24c5_1028_0139, &pci_ss_info_8086_24c5_1028_0163, + &pci_ss_info_8086_24c5_1028_0196, + &pci_ss_info_8086_24c5_103c_088c, &pci_ss_info_8086_24c5_103c_0890, &pci_ss_info_8086_24c5_1071_8160, &pci_ss_info_8086_24c5_1458_a002, &pci_ss_info_8086_24c5_1462_5800, + &pci_ss_info_8086_24c5_1734_1055, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24c6[] = { + &pci_ss_info_8086_24c6_003c_1025, &pci_ss_info_8086_24c6_1025_005a, + &pci_ss_info_8086_24c6_1028_0196, + &pci_ss_info_8086_24c6_103c_088c, &pci_ss_info_8086_24c6_103c_0890, &pci_ss_info_8086_24c6_1071_8160, NULL @@ -42110,18 +51777,25 @@ &pci_ss_info_8086_24c7_1025_005a, &pci_ss_info_8086_24c7_1028_0126, &pci_ss_info_8086_24c7_1028_0163, + &pci_ss_info_8086_24c7_1028_0196, + &pci_ss_info_8086_24c7_103c_088c, &pci_ss_info_8086_24c7_103c_0890, &pci_ss_info_8086_24c7_1071_8160, &pci_ss_info_8086_24c7_1462_5800, &pci_ss_info_8086_24c7_1509_2990, &pci_ss_info_8086_24c7_4c53_1090, + &pci_ss_info_8086_24c7_8086_4541, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24ca[] = { &pci_ss_info_8086_24ca_1025_005a, &pci_ss_info_8086_24ca_1028_0163, + &pci_ss_info_8086_24ca_1028_0196, + &pci_ss_info_8086_24ca_103c_088c, &pci_ss_info_8086_24ca_103c_0890, &pci_ss_info_8086_24ca_1071_8160, + &pci_ss_info_8086_24ca_1734_1055, + &pci_ss_info_8086_24ca_8086_4541, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24cb[] = { @@ -42132,97 +51806,166 @@ &pci_ss_info_8086_24cb_4c53_1090, NULL }; -#define pci_ss_list_8086_24cc NULL +static const pciSubsystemInfo *pci_ss_list_8086_24cc[] = { + &pci_ss_info_8086_24cc_1734_1055, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_24cd[] = { &pci_ss_info_8086_24cd_1014_0267, &pci_ss_info_8086_24cd_1025_005a, + &pci_ss_info_8086_24cd_1028_011d, &pci_ss_info_8086_24cd_1028_0126, + &pci_ss_info_8086_24cd_1028_0139, &pci_ss_info_8086_24cd_1028_0163, + &pci_ss_info_8086_24cd_1028_0196, + &pci_ss_info_8086_24cd_103c_088c, &pci_ss_info_8086_24cd_103c_0890, &pci_ss_info_8086_24cd_1071_8160, &pci_ss_info_8086_24cd_1462_3981, &pci_ss_info_8086_24cd_1509_1968, + &pci_ss_info_8086_24cd_1734_1055, &pci_ss_info_8086_24cd_4c53_1090, NULL }; #define pci_ss_list_8086_24d0 NULL static const pciSubsystemInfo *pci_ss_list_8086_24d1[] = { + &pci_ss_info_8086_24d1_1028_0169, + &pci_ss_info_8086_24d1_1028_019a, &pci_ss_info_8086_24d1_103c_12bc, + &pci_ss_info_8086_24d1_1043_80a6, &pci_ss_info_8086_24d1_1458_24d1, &pci_ss_info_8086_24d1_1462_7280, + &pci_ss_info_8086_24d1_15d9_4580, &pci_ss_info_8086_24d1_8086_3427, + &pci_ss_info_8086_24d1_8086_4246, &pci_ss_info_8086_24d1_8086_524c, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24d2[] = { + &pci_ss_info_8086_24d2_1014_02ed, + &pci_ss_info_8086_24d2_1028_0169, + &pci_ss_info_8086_24d2_1028_0183, + &pci_ss_info_8086_24d2_1028_019a, + &pci_ss_info_8086_24d2_103c_006a, &pci_ss_info_8086_24d2_103c_12bc, &pci_ss_info_8086_24d2_1043_80a6, &pci_ss_info_8086_24d2_1458_24d2, &pci_ss_info_8086_24d2_1462_7280, + &pci_ss_info_8086_24d2_15d9_4580, + &pci_ss_info_8086_24d2_1734_101c, &pci_ss_info_8086_24d2_8086_3427, + &pci_ss_info_8086_24d2_8086_4246, &pci_ss_info_8086_24d2_8086_524c, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24d3[] = { + &pci_ss_info_8086_24d3_1014_02ed, + &pci_ss_info_8086_24d3_1028_0156, + &pci_ss_info_8086_24d3_1028_0169, &pci_ss_info_8086_24d3_1043_80a6, &pci_ss_info_8086_24d3_1458_24d2, &pci_ss_info_8086_24d3_1462_7280, + &pci_ss_info_8086_24d3_15d9_4580, + &pci_ss_info_8086_24d3_1734_101c, &pci_ss_info_8086_24d3_8086_3427, + &pci_ss_info_8086_24d3_8086_4246, &pci_ss_info_8086_24d3_8086_524c, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24d4[] = { + &pci_ss_info_8086_24d4_1014_02ed, + &pci_ss_info_8086_24d4_1028_0169, + &pci_ss_info_8086_24d4_1028_0183, + &pci_ss_info_8086_24d4_1028_019a, + &pci_ss_info_8086_24d4_103c_006a, &pci_ss_info_8086_24d4_103c_12bc, &pci_ss_info_8086_24d4_1043_80a6, &pci_ss_info_8086_24d4_1458_24d2, &pci_ss_info_8086_24d4_1462_7280, + &pci_ss_info_8086_24d4_15d9_4580, + &pci_ss_info_8086_24d4_1734_101c, &pci_ss_info_8086_24d4_8086_3427, + &pci_ss_info_8086_24d4_8086_4246, &pci_ss_info_8086_24d4_8086_524c, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24d5[] = { - &pci_ss_info_8086_24d5_103c_12bc, + &pci_ss_info_8086_24d5_1028_0169, + &pci_ss_info_8086_24d5_103c_006a, &pci_ss_info_8086_24d5_1043_80f3, + &pci_ss_info_8086_24d5_1043_810f, &pci_ss_info_8086_24d5_1458_a002, + &pci_ss_info_8086_24d5_1462_0080, &pci_ss_info_8086_24d5_1462_7280, &pci_ss_info_8086_24d5_8086_a000, + &pci_ss_info_8086_24d5_8086_e000, + &pci_ss_info_8086_24d5_8086_e001, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_24d6[] = { + &pci_ss_info_8086_24d6_103c_006a, NULL }; -#define pci_ss_list_8086_24d6 NULL static const pciSubsystemInfo *pci_ss_list_8086_24d7[] = { + &pci_ss_info_8086_24d7_1014_02ed, + &pci_ss_info_8086_24d7_1028_0169, + &pci_ss_info_8086_24d7_1028_0183, + &pci_ss_info_8086_24d7_103c_006a, &pci_ss_info_8086_24d7_103c_12bc, &pci_ss_info_8086_24d7_1043_80a6, &pci_ss_info_8086_24d7_1458_24d2, &pci_ss_info_8086_24d7_1462_7280, + &pci_ss_info_8086_24d7_15d9_4580, + &pci_ss_info_8086_24d7_1734_101c, &pci_ss_info_8086_24d7_8086_3427, + &pci_ss_info_8086_24d7_8086_4246, &pci_ss_info_8086_24d7_8086_524c, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24db[] = { + &pci_ss_info_8086_24db_1014_02ed, + &pci_ss_info_8086_24db_1028_0169, + &pci_ss_info_8086_24db_1028_019a, + &pci_ss_info_8086_24db_103c_006a, &pci_ss_info_8086_24db_103c_12bc, &pci_ss_info_8086_24db_1043_80a6, &pci_ss_info_8086_24db_1458_24d2, &pci_ss_info_8086_24db_1462_7280, &pci_ss_info_8086_24db_1462_7580, + &pci_ss_info_8086_24db_15d9_4580, + &pci_ss_info_8086_24db_1734_101c, + &pci_ss_info_8086_24db_8086_24db, &pci_ss_info_8086_24db_8086_3427, + &pci_ss_info_8086_24db_8086_4246, &pci_ss_info_8086_24db_8086_524c, NULL }; #define pci_ss_list_8086_24dc NULL static const pciSubsystemInfo *pci_ss_list_8086_24dd[] = { + &pci_ss_info_8086_24dd_1014_02ed, + &pci_ss_info_8086_24dd_1028_0169, + &pci_ss_info_8086_24dd_1028_0183, + &pci_ss_info_8086_24dd_1028_019a, + &pci_ss_info_8086_24dd_103c_006a, &pci_ss_info_8086_24dd_103c_12bc, &pci_ss_info_8086_24dd_1043_80a6, &pci_ss_info_8086_24dd_1458_5006, &pci_ss_info_8086_24dd_1462_7280, &pci_ss_info_8086_24dd_8086_3427, + &pci_ss_info_8086_24dd_8086_4246, &pci_ss_info_8086_24dd_8086_524c, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_24de[] = { + &pci_ss_info_8086_24de_1014_02ed, + &pci_ss_info_8086_24de_1028_0169, &pci_ss_info_8086_24de_1043_80a6, &pci_ss_info_8086_24de_1458_24d2, &pci_ss_info_8086_24de_1462_7280, + &pci_ss_info_8086_24de_15d9_4580, + &pci_ss_info_8086_24de_1734_101c, &pci_ss_info_8086_24de_8086_3427, + &pci_ss_info_8086_24de_8086_4246, &pci_ss_info_8086_24de_8086_524c, NULL }; @@ -42290,12 +52033,18 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_8086_2570[] = { + &pci_ss_info_8086_2570_103c_006a, &pci_ss_info_8086_2570_1043_80f2, &pci_ss_info_8086_2570_1458_2570, NULL }; #define pci_ss_list_8086_2571 NULL -#define pci_ss_list_8086_2572 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2572[] = { + &pci_ss_info_8086_2572_1028_019d, + &pci_ss_info_8086_2572_1043_80a5, + &pci_ss_info_8086_2572_8086_4246, + NULL +}; #define pci_ss_list_8086_2573 NULL #define pci_ss_list_8086_2576 NULL static const pciSubsystemInfo *pci_ss_list_8086_2578[] = { @@ -42307,10 +52056,18 @@ #define pci_ss_list_8086_2579 NULL #define pci_ss_list_8086_257b NULL #define pci_ss_list_8086_257e NULL -#define pci_ss_list_8086_2580 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2580[] = { + &pci_ss_info_8086_2580_1458_2580, + &pci_ss_info_8086_2580_1462_7028, + &pci_ss_info_8086_2580_1734_105b, + NULL +}; #define pci_ss_list_8086_2581 NULL static const pciSubsystemInfo *pci_ss_list_8086_2582[] = { &pci_ss_info_8086_2582_1028_1079, + &pci_ss_info_8086_2582_1043_2582, + &pci_ss_info_8086_2582_1458_2582, + &pci_ss_info_8086_2582_1734_105b, NULL }; #define pci_ss_list_8086_2584 NULL @@ -42318,20 +52075,34 @@ #define pci_ss_list_8086_2588 NULL #define pci_ss_list_8086_2589 NULL #define pci_ss_list_8086_258a NULL -#define pci_ss_list_8086_2590 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2590[] = { + &pci_ss_info_8086_2590_1028_0182, + &pci_ss_info_8086_2590_103c_099c, + &pci_ss_info_8086_2590_a304_81b7, + NULL +}; #define pci_ss_list_8086_2591 NULL -#define pci_ss_list_8086_2592 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2592[] = { + &pci_ss_info_8086_2592_103c_099c, + &pci_ss_info_8086_2592_1043_1881, + NULL +}; #define pci_ss_list_8086_25a1 NULL static const pciSubsystemInfo *pci_ss_list_8086_25a2[] = { &pci_ss_info_8086_25a2_4c53_10b0, + &pci_ss_info_8086_25a2_4c53_10e0, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_25a3[] = { &pci_ss_info_8086_25a3_4c53_10b0, + &pci_ss_info_8086_25a3_4c53_10d0, + &pci_ss_info_8086_25a3_4c53_10e0, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_25a4[] = { &pci_ss_info_8086_25a4_4c53_10b0, + &pci_ss_info_8086_25a4_4c53_10d0, + &pci_ss_info_8086_25a4_4c53_10e0, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_25a6[] = { @@ -42341,23 +52112,59 @@ #define pci_ss_list_8086_25a7 NULL static const pciSubsystemInfo *pci_ss_list_8086_25a9[] = { &pci_ss_info_8086_25a9_4c53_10b0, + &pci_ss_info_8086_25a9_4c53_10d0, + &pci_ss_info_8086_25a9_4c53_10e0, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_25aa[] = { &pci_ss_info_8086_25aa_4c53_10b0, + &pci_ss_info_8086_25aa_4c53_10e0, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_25ab[] = { &pci_ss_info_8086_25ab_4c53_10b0, + &pci_ss_info_8086_25ab_4c53_10d0, + &pci_ss_info_8086_25ab_4c53_10e0, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_25ac[] = { &pci_ss_info_8086_25ac_4c53_10b0, + &pci_ss_info_8086_25ac_4c53_10d0, + &pci_ss_info_8086_25ac_4c53_10e0, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_25ad[] = { + &pci_ss_info_8086_25ad_4c53_10b0, + &pci_ss_info_8086_25ad_4c53_10d0, + &pci_ss_info_8086_25ad_4c53_10e0, NULL }; -#define pci_ss_list_8086_25ad NULL #define pci_ss_list_8086_25ae NULL -#define pci_ss_list_8086_25b0 NULL +static const pciSubsystemInfo *pci_ss_list_8086_25b0[] = { + &pci_ss_info_8086_25b0_4c53_10d0, + &pci_ss_info_8086_25b0_4c53_10e0, + NULL +}; +#define pci_ss_list_8086_25c0 NULL +#define pci_ss_list_8086_25d0 NULL +#define pci_ss_list_8086_25d4 NULL +#define pci_ss_list_8086_25d8 NULL +#define pci_ss_list_8086_25e2 NULL +#define pci_ss_list_8086_25e3 NULL +#define pci_ss_list_8086_25e4 NULL +#define pci_ss_list_8086_25e5 NULL +#define pci_ss_list_8086_25e6 NULL +#define pci_ss_list_8086_25e7 NULL +#define pci_ss_list_8086_25e8 NULL +#define pci_ss_list_8086_25f0 NULL +#define pci_ss_list_8086_25f1 NULL +#define pci_ss_list_8086_25f3 NULL +#define pci_ss_list_8086_25f5 NULL +#define pci_ss_list_8086_25f6 NULL +#define pci_ss_list_8086_25f7 NULL +#define pci_ss_list_8086_25f8 NULL +#define pci_ss_list_8086_25f9 NULL +#define pci_ss_list_8086_25fa NULL #define pci_ss_list_8086_2600 NULL #define pci_ss_list_8086_2601 NULL #define pci_ss_list_8086_2602 NULL @@ -42392,62 +52199,299 @@ #define pci_ss_list_8086_2625 NULL #define pci_ss_list_8086_2626 NULL #define pci_ss_list_8086_2627 NULL -#define pci_ss_list_8086_2640 NULL -#define pci_ss_list_8086_2641 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2640[] = { + &pci_ss_info_8086_2640_1462_7028, + &pci_ss_info_8086_2640_1734_105c, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2641[] = { + &pci_ss_info_8086_2641_103c_099c, + NULL +}; #define pci_ss_list_8086_2642 NULL static const pciSubsystemInfo *pci_ss_list_8086_2651[] = { &pci_ss_info_8086_2651_1028_0179, + &pci_ss_info_8086_2651_1043_2601, + &pci_ss_info_8086_2651_1734_105c, + &pci_ss_info_8086_2651_8086_4147, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2652[] = { + &pci_ss_info_8086_2652_1462_7028, NULL }; -#define pci_ss_list_8086_2652 NULL #define pci_ss_list_8086_2653 NULL static const pciSubsystemInfo *pci_ss_list_8086_2658[] = { &pci_ss_info_8086_2658_1028_0179, + &pci_ss_info_8086_2658_103c_099c, + &pci_ss_info_8086_2658_1043_80a6, + &pci_ss_info_8086_2658_1458_2558, + &pci_ss_info_8086_2658_1462_7028, + &pci_ss_info_8086_2658_1734_105c, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_2659[] = { &pci_ss_info_8086_2659_1028_0179, + &pci_ss_info_8086_2659_103c_099c, + &pci_ss_info_8086_2659_1043_80a6, + &pci_ss_info_8086_2659_1458_2659, + &pci_ss_info_8086_2659_1462_7028, + &pci_ss_info_8086_2659_1734_105c, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_265a[] = { &pci_ss_info_8086_265a_1028_0179, + &pci_ss_info_8086_265a_103c_099c, + &pci_ss_info_8086_265a_1043_80a6, + &pci_ss_info_8086_265a_1458_265a, + &pci_ss_info_8086_265a_1462_7028, + &pci_ss_info_8086_265a_1734_105c, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_265b[] = { &pci_ss_info_8086_265b_1028_0179, + &pci_ss_info_8086_265b_103c_099c, + &pci_ss_info_8086_265b_1043_80a6, + &pci_ss_info_8086_265b_1458_265a, + &pci_ss_info_8086_265b_1462_7028, + &pci_ss_info_8086_265b_1734_105c, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_265c[] = { &pci_ss_info_8086_265c_1028_0179, + &pci_ss_info_8086_265c_103c_099c, + &pci_ss_info_8086_265c_1043_80a6, + &pci_ss_info_8086_265c_1458_5006, + &pci_ss_info_8086_265c_1462_7028, + &pci_ss_info_8086_265c_1734_105c, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2660[] = { + &pci_ss_info_8086_2660_103c_099c, NULL }; -#define pci_ss_list_8086_2660 NULL #define pci_ss_list_8086_2662 NULL #define pci_ss_list_8086_2664 NULL #define pci_ss_list_8086_2666 NULL -#define pci_ss_list_8086_2668 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2668[] = { + &pci_ss_info_8086_2668_1043_814e, + NULL +}; static const pciSubsystemInfo *pci_ss_list_8086_266a[] = { &pci_ss_info_8086_266a_1028_0179, + &pci_ss_info_8086_266a_1043_80a6, + &pci_ss_info_8086_266a_1458_266a, + &pci_ss_info_8086_266a_1462_7028, + &pci_ss_info_8086_266a_1734_105c, NULL }; #define pci_ss_list_8086_266c NULL -#define pci_ss_list_8086_266d NULL -static const pciSubsystemInfo *pci_ss_list_8086_266e[] = { - &pci_ss_info_8086_266e_1028_0179, +static const pciSubsystemInfo *pci_ss_list_8086_266d[] = { + &pci_ss_info_8086_266d_1025_006a, + &pci_ss_info_8086_266d_103c_099c, NULL }; -#define pci_ss_list_8086_266f NULL -#define pci_ss_list_8086_2782 NULL -#define pci_ss_list_8086_2792 NULL +static const pciSubsystemInfo *pci_ss_list_8086_266e[] = { + &pci_ss_info_8086_266e_1025_006a, + &pci_ss_info_8086_266e_1028_0179, + &pci_ss_info_8086_266e_1028_0182, + &pci_ss_info_8086_266e_1028_0188, + &pci_ss_info_8086_266e_103c_099c, + &pci_ss_info_8086_266e_1458_a002, + &pci_ss_info_8086_266e_1734_105a, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_266f[] = { + &pci_ss_info_8086_266f_103c_099c, + &pci_ss_info_8086_266f_1043_80a6, + &pci_ss_info_8086_266f_1458_266f, + &pci_ss_info_8086_266f_1462_7028, + &pci_ss_info_8086_266f_1734_105c, + NULL +}; +#define pci_ss_list_8086_2670 NULL +#define pci_ss_list_8086_2680 NULL +#define pci_ss_list_8086_2681 NULL +#define pci_ss_list_8086_2682 NULL +#define pci_ss_list_8086_2683 NULL +#define pci_ss_list_8086_2688 NULL +#define pci_ss_list_8086_2689 NULL +#define pci_ss_list_8086_268a NULL +#define pci_ss_list_8086_268b NULL +#define pci_ss_list_8086_268c NULL +#define pci_ss_list_8086_2690 NULL +#define pci_ss_list_8086_2692 NULL +#define pci_ss_list_8086_2694 NULL +#define pci_ss_list_8086_2696 NULL +#define pci_ss_list_8086_2698 NULL +#define pci_ss_list_8086_2699 NULL +#define pci_ss_list_8086_269a NULL +#define pci_ss_list_8086_269b NULL +#define pci_ss_list_8086_269e NULL +static const pciSubsystemInfo *pci_ss_list_8086_2770[] = { + &pci_ss_info_8086_2770_8086_544e, + NULL +}; +#define pci_ss_list_8086_2771 NULL +static const pciSubsystemInfo *pci_ss_list_8086_2772[] = { + &pci_ss_info_8086_2772_8086_544e, + NULL +}; +#define pci_ss_list_8086_2774 NULL +#define pci_ss_list_8086_2775 NULL +#define pci_ss_list_8086_2776 NULL +#define pci_ss_list_8086_2778 NULL +#define pci_ss_list_8086_2779 NULL +#define pci_ss_list_8086_277a NULL +#define pci_ss_list_8086_277c NULL +#define pci_ss_list_8086_277d NULL +static const pciSubsystemInfo *pci_ss_list_8086_2782[] = { + &pci_ss_info_8086_2782_1043_2582, + &pci_ss_info_8086_2782_1734_105b, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_2792[] = { + &pci_ss_info_8086_2792_103c_099c, + &pci_ss_info_8086_2792_1043_1881, + NULL +}; +#define pci_ss_list_8086_27a0 NULL +#define pci_ss_list_8086_27a1 NULL +#define pci_ss_list_8086_27a2 NULL +#define pci_ss_list_8086_27a6 NULL +#define pci_ss_list_8086_27b0 NULL +static const pciSubsystemInfo *pci_ss_list_8086_27b8[] = { + &pci_ss_info_8086_27b8_8086_544e, + NULL +}; +#define pci_ss_list_8086_27b9 NULL +#define pci_ss_list_8086_27bd NULL +static const pciSubsystemInfo *pci_ss_list_8086_27c0[] = { + &pci_ss_info_8086_27c0_8086_544e, + NULL +}; +#define pci_ss_list_8086_27c1 NULL +#define pci_ss_list_8086_27c3 NULL +#define pci_ss_list_8086_27c4 NULL +#define pci_ss_list_8086_27c5 NULL +#define pci_ss_list_8086_27c6 NULL +static const pciSubsystemInfo *pci_ss_list_8086_27c8[] = { + &pci_ss_info_8086_27c8_8086_544e, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_27c9[] = { + &pci_ss_info_8086_27c9_8086_544e, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_27ca[] = { + &pci_ss_info_8086_27ca_8086_544e, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_27cb[] = { + &pci_ss_info_8086_27cb_8086_544e, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_27cc[] = { + &pci_ss_info_8086_27cc_8086_544e, + NULL +}; +#define pci_ss_list_8086_27d0 NULL +#define pci_ss_list_8086_27d2 NULL +#define pci_ss_list_8086_27d4 NULL +#define pci_ss_list_8086_27d6 NULL +#define pci_ss_list_8086_27d8 NULL +static const pciSubsystemInfo *pci_ss_list_8086_27da[] = { + &pci_ss_info_8086_27da_8086_544e, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_27dc[] = { + &pci_ss_info_8086_27dc_8086_308d, + NULL +}; +#define pci_ss_list_8086_27dd NULL +#define pci_ss_list_8086_27de NULL +static const pciSubsystemInfo *pci_ss_list_8086_27df[] = { + &pci_ss_info_8086_27df_8086_544e, + NULL +}; +#define pci_ss_list_8086_27e0 NULL +#define pci_ss_list_8086_27e2 NULL +#define pci_ss_list_8086_2810 NULL +#define pci_ss_list_8086_2811 NULL +#define pci_ss_list_8086_2812 NULL +#define pci_ss_list_8086_2814 NULL +#define pci_ss_list_8086_2815 NULL +#define pci_ss_list_8086_2820 NULL +#define pci_ss_list_8086_2821 NULL +#define pci_ss_list_8086_2822 NULL +#define pci_ss_list_8086_2824 NULL +#define pci_ss_list_8086_2825 NULL +#define pci_ss_list_8086_2828 NULL +#define pci_ss_list_8086_2829 NULL +#define pci_ss_list_8086_282a NULL +#define pci_ss_list_8086_2830 NULL +#define pci_ss_list_8086_2831 NULL +#define pci_ss_list_8086_2832 NULL +#define pci_ss_list_8086_2834 NULL +#define pci_ss_list_8086_2835 NULL +#define pci_ss_list_8086_2836 NULL +#define pci_ss_list_8086_283a NULL +#define pci_ss_list_8086_283e NULL +#define pci_ss_list_8086_283f NULL +#define pci_ss_list_8086_2841 NULL +#define pci_ss_list_8086_2843 NULL +#define pci_ss_list_8086_2845 NULL +#define pci_ss_list_8086_2847 NULL +#define pci_ss_list_8086_2849 NULL +#define pci_ss_list_8086_284b NULL +#define pci_ss_list_8086_284f NULL +#define pci_ss_list_8086_2850 NULL +#define pci_ss_list_8086_2970 NULL +#define pci_ss_list_8086_2971 NULL +#define pci_ss_list_8086_2972 NULL +#define pci_ss_list_8086_2973 NULL +#define pci_ss_list_8086_2974 NULL +#define pci_ss_list_8086_2976 NULL +#define pci_ss_list_8086_2977 NULL +#define pci_ss_list_8086_2990 NULL +#define pci_ss_list_8086_2991 NULL +#define pci_ss_list_8086_2992 NULL +#define pci_ss_list_8086_2993 NULL +#define pci_ss_list_8086_2994 NULL +#define pci_ss_list_8086_2995 NULL +#define pci_ss_list_8086_2996 NULL +#define pci_ss_list_8086_2997 NULL +#define pci_ss_list_8086_29a0 NULL +#define pci_ss_list_8086_29a1 NULL +#define pci_ss_list_8086_29a2 NULL +#define pci_ss_list_8086_29a3 NULL +#define pci_ss_list_8086_29a4 NULL +#define pci_ss_list_8086_29a5 NULL +#define pci_ss_list_8086_29a6 NULL +#define pci_ss_list_8086_29a7 NULL #define pci_ss_list_8086_3092 NULL #define pci_ss_list_8086_3200 NULL static const pciSubsystemInfo *pci_ss_list_8086_3340[] = { &pci_ss_info_8086_3340_1025_005a, + &pci_ss_info_8086_3340_103c_088c, &pci_ss_info_8086_3340_103c_0890, NULL }; #define pci_ss_list_8086_3341 NULL +#define pci_ss_list_8086_3500 NULL +#define pci_ss_list_8086_3501 NULL +#define pci_ss_list_8086_3504 NULL +#define pci_ss_list_8086_3505 NULL +#define pci_ss_list_8086_350c NULL +#define pci_ss_list_8086_350d NULL +#define pci_ss_list_8086_3510 NULL +#define pci_ss_list_8086_3511 NULL +#define pci_ss_list_8086_3514 NULL +#define pci_ss_list_8086_3515 NULL +#define pci_ss_list_8086_3518 NULL +#define pci_ss_list_8086_3519 NULL static const pciSubsystemInfo *pci_ss_list_8086_3575[] = { + &pci_ss_info_8086_3575_0e11_0030, &pci_ss_info_8086_3575_1014_021d, &pci_ss_info_8086_3575_104d_80e7, NULL @@ -42459,31 +52503,60 @@ }; #define pci_ss_list_8086_3578 NULL static const pciSubsystemInfo *pci_ss_list_8086_3580[] = { + &pci_ss_info_8086_3580_1028_0139, &pci_ss_info_8086_3580_1028_0163, + &pci_ss_info_8086_3580_1028_0196, + &pci_ss_info_8086_3580_1734_1055, &pci_ss_info_8086_3580_4c53_10b0, + &pci_ss_info_8086_3580_4c53_10e0, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_3581[] = { + &pci_ss_info_8086_3581_1734_1055, NULL }; -#define pci_ss_list_8086_3581 NULL static const pciSubsystemInfo *pci_ss_list_8086_3582[] = { + &pci_ss_info_8086_3582_1028_0139, &pci_ss_info_8086_3582_1028_0163, &pci_ss_info_8086_3582_4c53_10b0, + &pci_ss_info_8086_3582_4c53_10e0, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_3584[] = { + &pci_ss_info_8086_3584_1028_0139, &pci_ss_info_8086_3584_1028_0163, + &pci_ss_info_8086_3584_1028_0196, + &pci_ss_info_8086_3584_1734_1055, &pci_ss_info_8086_3584_4c53_10b0, + &pci_ss_info_8086_3584_4c53_10e0, NULL }; static const pciSubsystemInfo *pci_ss_list_8086_3585[] = { + &pci_ss_info_8086_3585_1028_0139, &pci_ss_info_8086_3585_1028_0163, + &pci_ss_info_8086_3585_1028_0196, + &pci_ss_info_8086_3585_1734_1055, &pci_ss_info_8086_3585_4c53_10b0, + &pci_ss_info_8086_3585_4c53_10e0, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_3590[] = { + &pci_ss_info_8086_3590_1028_019a, + &pci_ss_info_8086_3590_1734_103e, + &pci_ss_info_8086_3590_4c53_10d0, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_8086_3591[] = { + &pci_ss_info_8086_3591_1028_0169, + &pci_ss_info_8086_3591_4c53_10d0, NULL }; -#define pci_ss_list_8086_3590 NULL -#define pci_ss_list_8086_3591 NULL #define pci_ss_list_8086_3592 NULL #define pci_ss_list_8086_3593 NULL -#define pci_ss_list_8086_3594 NULL +static const pciSubsystemInfo *pci_ss_list_8086_3594[] = { + &pci_ss_info_8086_3594_4c53_10d0, + NULL +}; #define pci_ss_list_8086_3595 NULL #define pci_ss_list_8086_3596 NULL #define pci_ss_list_8086_3597 NULL @@ -42491,9 +52564,23 @@ #define pci_ss_list_8086_3599 NULL #define pci_ss_list_8086_359a NULL #define pci_ss_list_8086_359b NULL -#define pci_ss_list_8086_359e NULL +static const pciSubsystemInfo *pci_ss_list_8086_359e[] = { + &pci_ss_info_8086_359e_1028_0169, + NULL +}; #define pci_ss_list_8086_4220 NULL +static const pciSubsystemInfo *pci_ss_list_8086_4222[] = { + &pci_ss_info_8086_4222_8086_1005, + &pci_ss_info_8086_4222_8086_1034, + &pci_ss_info_8086_4222_8086_1044, + NULL +}; #define pci_ss_list_8086_4223 NULL +#define pci_ss_list_8086_4224 NULL +static const pciSubsystemInfo *pci_ss_list_8086_4227[] = { + &pci_ss_info_8086_4227_8086_1014, + NULL +}; #define pci_ss_list_8086_5200 NULL static const pciSubsystemInfo *pci_ss_list_8086_5201[] = { &pci_ss_info_8086_5201_8086_0001, @@ -42505,6 +52592,7 @@ #define pci_ss_list_8086_7020 NULL #define pci_ss_list_8086_7030 NULL #define pci_ss_list_8086_7050 NULL +#define pci_ss_list_8086_7051 NULL #define pci_ss_list_8086_7100 NULL static const pciSubsystemInfo *pci_ss_list_8086_7110[] = { &pci_ss_info_8086_7110_15ad_1976, @@ -42609,16 +52697,20 @@ #define pci_ss_list_8086_84e4 NULL #define pci_ss_list_8086_84e6 NULL #define pci_ss_list_8086_84ea NULL -#define pci_ss_list_8086_8500 NULL +static const pciSubsystemInfo *pci_ss_list_8086_8500[] = { + &pci_ss_info_8086_8500_1993_0ded, + &pci_ss_info_8086_8500_1993_0dee, + &pci_ss_info_8086_8500_1993_0def, + NULL +}; #define pci_ss_list_8086_9000 NULL #define pci_ss_list_8086_9001 NULL +#define pci_ss_list_8086_9002 NULL #define pci_ss_list_8086_9004 NULL #define pci_ss_list_8086_9621 NULL #define pci_ss_list_8086_9622 NULL #define pci_ss_list_8086_9641 NULL #define pci_ss_list_8086_96a1 NULL -#define pci_ss_list_8086_a01f NULL -#define pci_ss_list_8086_a11f NULL #define pci_ss_list_8086_b152 NULL #define pci_ss_list_8086_b154 NULL static const pciSubsystemInfo *pci_ss_list_8086_b555[] = { @@ -42628,7 +52720,6 @@ &pci_ss_info_8086_b555_e4bf_1000, NULL }; -#define pci_ss_list_8086_ffff NULL #define pci_ss_list_8800_2008 NULL #define pci_ss_list_8c4a_1980 NULL #define pci_ss_list_8e2e_3000 NULL @@ -42841,6 +52932,7 @@ &pci_ss_info_9005_00cf_8086_3411, NULL }; +#define pci_ss_list_9005_0241 NULL static const pciSubsystemInfo *pci_ss_list_9005_0250[] = { &pci_ss_info_9005_0250_1014_0279, &pci_ss_info_9005_0250_1014_028c, @@ -42857,8 +52949,10 @@ }; static const pciSubsystemInfo *pci_ss_list_9005_0285[] = { &pci_ss_info_9005_0285_0e11_0295, + &pci_ss_info_9005_0285_1014_02f2, &pci_ss_info_9005_0285_1028_0287, &pci_ss_info_9005_0285_1028_0291, + &pci_ss_info_9005_0285_103c_3227, &pci_ss_info_9005_0285_17aa_0286, &pci_ss_info_9005_0285_17aa_0287, &pci_ss_info_9005_0285_9005_0285, @@ -42868,16 +52962,55 @@ &pci_ss_info_9005_0285_9005_0289, &pci_ss_info_9005_0285_9005_028a, &pci_ss_info_9005_0285_9005_028b, + &pci_ss_info_9005_0285_9005_028e, + &pci_ss_info_9005_0285_9005_028f, &pci_ss_info_9005_0285_9005_0290, &pci_ss_info_9005_0285_9005_0292, &pci_ss_info_9005_0285_9005_0293, &pci_ss_info_9005_0285_9005_0294, + &pci_ss_info_9005_0285_9005_0296, + &pci_ss_info_9005_0285_9005_0297, + &pci_ss_info_9005_0285_9005_0298, + &pci_ss_info_9005_0285_9005_0299, + &pci_ss_info_9005_0285_9005_029a, NULL }; static const pciSubsystemInfo *pci_ss_list_9005_0286[] = { + &pci_ss_info_9005_0286_1014_9540, + &pci_ss_info_9005_0286_1014_9580, &pci_ss_info_9005_0286_9005_028c, + &pci_ss_info_9005_0286_9005_028d, + &pci_ss_info_9005_0286_9005_029b, + &pci_ss_info_9005_0286_9005_029c, + &pci_ss_info_9005_0286_9005_029d, + &pci_ss_info_9005_0286_9005_029e, + &pci_ss_info_9005_0286_9005_029f, + &pci_ss_info_9005_0286_9005_02a0, + &pci_ss_info_9005_0286_9005_02a1, + &pci_ss_info_9005_0286_9005_02a2, + &pci_ss_info_9005_0286_9005_02a3, + &pci_ss_info_9005_0286_9005_02a4, + &pci_ss_info_9005_0286_9005_02a5, + &pci_ss_info_9005_0286_9005_02a6, + &pci_ss_info_9005_0286_9005_02a7, + &pci_ss_info_9005_0286_9005_02a8, + &pci_ss_info_9005_0286_9005_02a9, + &pci_ss_info_9005_0286_9005_02aa, + &pci_ss_info_9005_0286_9005_0800, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_9005_0500[] = { + &pci_ss_info_9005_0500_1014_02c1, + &pci_ss_info_9005_0500_1014_02c2, + NULL +}; +static const pciSubsystemInfo *pci_ss_list_9005_0503[] = { + &pci_ss_info_9005_0503_1014_02bf, + &pci_ss_info_9005_0503_1014_02d5, NULL }; +#define pci_ss_list_9005_0910 NULL +#define pci_ss_list_9005_091e NULL #define pci_ss_list_9005_8000 NULL #define pci_ss_list_9005_800f NULL #define pci_ss_list_9005_8010 NULL @@ -42895,7 +53028,10 @@ #define pci_ss_list_9005_801c NULL #define pci_ss_list_9005_801d NULL #define pci_ss_list_9005_801e NULL -#define pci_ss_list_9005_801f NULL +static const pciSubsystemInfo *pci_ss_list_9005_801f[] = { + &pci_ss_info_9005_801f_1734_1011, + NULL +}; #define pci_ss_list_9005_8080 NULL #define pci_ss_list_9005_808f NULL #define pci_ss_list_9005_8090 NULL @@ -42915,6 +53051,7 @@ #define pci_ss_list_9412_6565 NULL #define pci_ss_list_9699_6565 NULL #define pci_ss_list_9710_7780 NULL +#define pci_ss_list_9710_9805 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_9710_9815[] = { &pci_ss_info_9710_9815_1000_0020, @@ -42939,18 +53076,43 @@ #define pci_ss_list_9902_0002 NULL #define pci_ss_list_9902_0003 NULL #define pci_ss_list_a727_0013 NULL +#define pci_ss_list_aecb_6250 NULL +#define pci_ss_list_affe_dead NULL +#define pci_ss_list_cafe_0003 NULL #define pci_ss_list_cddd_0101 NULL #define pci_ss_list_cddd_0200 NULL +#define pci_ss_list_d161_0205 NULL +#define pci_ss_list_d161_0210 NULL +#define pci_ss_list_d161_0405 NULL +#define pci_ss_list_d161_0410 NULL +#define pci_ss_list_d161_2400 NULL #define pci_ss_list_d4d4_0601 NULL +#define pci_ss_list_deaf_9050 NULL +#define pci_ss_list_deaf_9051 NULL +#define pci_ss_list_deaf_9052 NULL #define pci_ss_list_e000_e000 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_e159_0001[] = { &pci_ss_info_e159_0001_0059_0001, &pci_ss_info_e159_0001_0059_0003, + &pci_ss_info_e159_0001_00a7_0001, + &pci_ss_info_e159_0001_6159_0001, + &pci_ss_info_e159_0001_79fe_0001, + &pci_ss_info_e159_0001_8086_0003, + &pci_ss_info_e159_0001_b1b9_0001, + &pci_ss_info_e159_0001_b1b9_0003, NULL }; #define pci_ss_list_e159_0002 NULL #endif +#define pci_ss_list_ea01_000a NULL +#define pci_ss_list_ea01_0032 NULL +#define pci_ss_list_ea01_003e NULL +#define pci_ss_list_ea01_0041 NULL +#define pci_ss_list_ea01_0043 NULL +#define pci_ss_list_ea01_0046 NULL +#define pci_ss_list_ea01_0052 NULL +#define pci_ss_list_ea01_0800 NULL #define pci_ss_list_ea60_9896 NULL #define pci_ss_list_ea60_9897 NULL #define pci_ss_list_ea60_9898 NULL @@ -42966,28 +53128,33 @@ #define pci_ss_list_eace_4220 NULL #define pci_ss_list_eace_422e NULL #define pci_ss_list_ec80_ec00 NULL -#define pci_ss_list_ecc0_0050 NULL -#define pci_ss_list_ecc0_0051 NULL -#define pci_ss_list_ecc0_0060 NULL -#define pci_ss_list_ecc0_0070 NULL -#define pci_ss_list_ecc0_0071 NULL -#define pci_ss_list_ecc0_0072 NULL -#define pci_ss_list_ecc0_0080 NULL #define pci_ss_list_edd8_a091 NULL #define pci_ss_list_edd8_a099 NULL #define pci_ss_list_edd8_a0a1 NULL #define pci_ss_list_edd8_a0a9 NULL +#define pci_ss_list_f1d0_c0fe NULL +#define pci_ss_list_f1d0_c0ff NULL #define pci_ss_list_f1d0_cafe NULL +#define pci_ss_list_f1d0_cfee NULL +#define pci_ss_list_f1d0_dcaf NULL +#define pci_ss_list_f1d0_dfee NULL #define pci_ss_list_f1d0_efac NULL #define pci_ss_list_f1d0_facd NULL #define pci_ss_list_fa57_0001 NULL #define pci_ss_list_feda_a0fa NULL #define pci_ss_list_feda_a10e NULL #define pci_ss_list_fede_0003 NULL +#define pci_ss_list_fffd_0101 NULL #define pci_ss_list_fffe_0405 NULL #define pci_ss_list_fffe_0710 NULL #ifdef INIT_VENDOR_SUBSYS_INFO -#define pci_ss_list_0000 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_0000[] = { + &pci_ss_info_0000_0000, + &pci_ss_info_0000_4091, + NULL +}; +#endif #define pci_ss_list_001a NULL #define pci_ss_list_0033 NULL static const pciSubsystemInfo *pci_ss_list_003d[] = { @@ -43004,10 +53171,30 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_0070[] = { + &pci_ss_info_0070_0003, + &pci_ss_info_0070_0009, + &pci_ss_info_0070_0801, + &pci_ss_info_0070_0807, &pci_ss_info_0070_13eb, + &pci_ss_info_0070_2801, + &pci_ss_info_0070_3401, &pci_ss_info_0070_4000, &pci_ss_info_0070_4001, &pci_ss_info_0070_4009, + &pci_ss_info_0070_4800, + &pci_ss_info_0070_4801, + &pci_ss_info_0070_4803, + &pci_ss_info_0070_8003, + &pci_ss_info_0070_8801, + &pci_ss_info_0070_9001, + &pci_ss_info_0070_9002, + &pci_ss_info_0070_9200, + &pci_ss_info_0070_9202, + &pci_ss_info_0070_9402, + &pci_ss_info_0070_9802, + &pci_ss_info_0070_c801, + &pci_ss_info_0070_e807, + &pci_ss_info_0070_e817, &pci_ss_info_0070_ff01, NULL }; @@ -43019,9 +53206,21 @@ }; #endif #define pci_ss_list_0095 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_00a7[] = { + &pci_ss_info_00a7_0001, + NULL +}; +#endif #define pci_ss_list_0100 NULL #define pci_ss_list_018a NULL #define pci_ss_list_021b NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_0270[] = { + &pci_ss_info_0270_0801, + NULL +}; +#endif #define pci_ss_list_0291 NULL #define pci_ss_list_02ac NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -43030,8 +53229,23 @@ NULL }; #endif +#define pci_ss_list_0432 NULL +#define pci_ss_list_045e NULL +#define pci_ss_list_04cf NULL +#define pci_ss_list_050d NULL #define pci_ss_list_05e3 NULL -#define pci_ss_list_0675 NULL +#define pci_ss_list_066f NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_0675[] = { + &pci_ss_info_0675_1704, + &pci_ss_info_0675_1707, + &pci_ss_info_0675_1708, + NULL +}; +#endif +#define pci_ss_list_067b NULL +#define pci_ss_list_0721 NULL +#define pci_ss_list_07e2 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_0925[] = { &pci_ss_info_0925_1234, @@ -43046,10 +53260,12 @@ &pci_ss_info_0e11_0022, &pci_ss_info_0e11_0023, &pci_ss_info_0e11_0024, + &pci_ss_info_0e11_0030, &pci_ss_info_0e11_0042, &pci_ss_info_0e11_0043, &pci_ss_info_0e11_0049, &pci_ss_info_0e11_004a, + &pci_ss_info_0e11_004e, &pci_ss_info_0e11_005d, &pci_ss_info_0e11_007c, &pci_ss_info_0e11_007d, @@ -43057,6 +53273,7 @@ &pci_ss_info_0e11_0085, &pci_ss_info_0e11_0091, &pci_ss_info_0e11_0097, + &pci_ss_info_0e11_0098, &pci_ss_info_0e11_0099, &pci_ss_info_0e11_009a, &pci_ss_info_0e11_00ac, @@ -43068,6 +53285,9 @@ &pci_ss_info_0e11_00cf, &pci_ss_info_0e11_00d0, &pci_ss_info_0e11_00d1, + &pci_ss_info_0e11_00da, + &pci_ss_info_0e11_00db, + &pci_ss_info_0e11_00dc, &pci_ss_info_0e11_00e3, &pci_ss_info_0e11_0295, &pci_ss_info_0e11_0460, @@ -43161,6 +53381,7 @@ &pci_ss_info_1000_0014, &pci_ss_info_1000_0020, &pci_ss_info_1000_0033, + &pci_ss_info_1000_0062, &pci_ss_info_1000_0066, &pci_ss_info_1000_0518, &pci_ss_info_1000_0520, @@ -43213,6 +53434,7 @@ &pci_ss_info_1002_0088, &pci_ss_info_1002_008a, &pci_ss_info_1002_00ba, + &pci_ss_info_1002_00f8, &pci_ss_info_1002_010a, &pci_ss_info_1002_0139, &pci_ss_info_1002_013a, @@ -43221,12 +53443,21 @@ &pci_ss_info_1002_0172, &pci_ss_info_1002_028a, &pci_ss_info_1002_02aa, + &pci_ss_info_1002_0322, + &pci_ss_info_1002_0323, &pci_ss_info_1002_0448, &pci_ss_info_1002_053a, + &pci_ss_info_1002_0b12, + &pci_ss_info_1002_0b13, + &pci_ss_info_1002_0d02, + &pci_ss_info_1002_0d03, &pci_ss_info_1002_103a, &pci_ss_info_1002_2000, &pci_ss_info_1002_2001, &pci_ss_info_1002_2f72, + &pci_ss_info_1002_4336, + &pci_ss_info_1002_4722, + &pci_ss_info_1002_4723, &pci_ss_info_1002_4742, &pci_ss_info_1002_4744, &pci_ss_info_1002_474d, @@ -43238,12 +53469,21 @@ &pci_ss_info_1002_4756, &pci_ss_info_1002_4757, &pci_ss_info_1002_475a, + &pci_ss_info_1002_4772, + &pci_ss_info_1002_4773, &pci_ss_info_1002_4c42, &pci_ss_info_1002_4c49, &pci_ss_info_1002_4c50, + &pci_ss_info_1002_4e71, + &pci_ss_info_1002_515e, &pci_ss_info_1002_5654, + &pci_ss_info_1002_5954, + &pci_ss_info_1002_5955, + &pci_ss_info_1002_5965, + &pci_ss_info_1002_5c63, &pci_ss_info_1002_8001, &pci_ss_info_1002_8008, + &pci_ss_info_1002_a101, NULL }; #define pci_ss_list_1003 NULL @@ -43255,7 +53495,10 @@ NULL }; #endif -#define pci_ss_list_1005 NULL +static const pciSubsystemInfo *pci_ss_list_1005[] = { + &pci_ss_info_1005_127a, + NULL +}; #define pci_ss_list_1006 NULL #define pci_ss_list_1007 NULL #define pci_ss_list_1008 NULL @@ -43311,6 +53554,7 @@ &pci_ss_info_1014_00e5, &pci_ss_info_1014_0104, &pci_ss_info_1014_0119, + &pci_ss_info_1014_0130, &pci_ss_info_1014_0131, &pci_ss_info_1014_0143, &pci_ss_info_1014_0145, @@ -43379,7 +53623,22 @@ &pci_ss_info_1014_0279, &pci_ss_info_1014_027c, &pci_ss_info_1014_028c, + &pci_ss_info_1014_028d, &pci_ss_info_1014_028e, + &pci_ss_info_1014_029a, + &pci_ss_info_1014_02be, + &pci_ss_info_1014_02bf, + &pci_ss_info_1014_02c0, + &pci_ss_info_1014_02c1, + &pci_ss_info_1014_02c2, + &pci_ss_info_1014_02c6, + &pci_ss_info_1014_02c8, + &pci_ss_info_1014_02d3, + &pci_ss_info_1014_02d4, + &pci_ss_info_1014_02d5, + &pci_ss_info_1014_02ed, + &pci_ss_info_1014_02f2, + &pci_ss_info_1014_030d, &pci_ss_info_1014_0502, &pci_ss_info_1014_0503, &pci_ss_info_1014_0506, @@ -43403,7 +53662,9 @@ &pci_ss_info_1014_0540, &pci_ss_info_1014_0545, &pci_ss_info_1014_0549, + &pci_ss_info_1014_0556, &pci_ss_info_1014_1010, + &pci_ss_info_1014_1025, &pci_ss_info_1014_105c, &pci_ss_info_1014_10f2, &pci_ss_info_1014_1181, @@ -43418,6 +53679,8 @@ &pci_ss_info_1014_805c, &pci_ss_info_1014_8181, &pci_ss_info_1014_9181, + &pci_ss_info_1014_9540, + &pci_ss_info_1014_9580, &pci_ss_info_1014_9750, &pci_ss_info_1014_ff03, NULL @@ -43431,9 +53694,13 @@ static const pciSubsystemInfo *pci_ss_list_1019[] = { &pci_ss_info_1019_0970, &pci_ss_info_1019_0985, + &pci_ss_info_1019_0987, &pci_ss_info_1019_0a14, &pci_ss_info_1019_0a81, &pci_ss_info_1019_0f38, + &pci_ss_info_1019_4c30, + &pci_ss_info_1019_4cb4, + &pci_ss_info_1019_4cb5, &pci_ss_info_1019_7018, &pci_ss_info_1019_8001, NULL @@ -43476,6 +53743,7 @@ #define pci_ss_list_1021 NULL static const pciSubsystemInfo *pci_ss_list_1022[] = { &pci_ss_info_1022_2000, + &pci_ss_info_1022_2b80, NULL }; static const pciSubsystemInfo *pci_ss_list_1023[] = { @@ -43485,12 +53753,18 @@ &pci_ss_info_1023_9880, NULL }; -#define pci_ss_list_1024 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1024[] = { + &pci_ss_info_1024_0134, + NULL +}; +#endif static const pciSubsystemInfo *pci_ss_list_1025[] = { &pci_ss_info_1025_000e, &pci_ss_info_1025_0018, &pci_ss_info_1025_004d, &pci_ss_info_1025_005a, + &pci_ss_info_1025_006a, &pci_ss_info_1025_0310, &pci_ss_info_1025_0315, &pci_ss_info_1025_1003, @@ -43534,6 +53808,7 @@ &pci_ss_info_1028_009b, &pci_ss_info_1028_00aa, &pci_ss_info_1028_00b1, + &pci_ss_info_1028_00bb, &pci_ss_info_1028_00c5, &pci_ss_info_1028_00ce, &pci_ss_info_1028_00d1, @@ -43545,20 +53820,34 @@ &pci_ss_info_1028_010a, &pci_ss_info_1028_010e, &pci_ss_info_1028_011c, + &pci_ss_info_1028_011d, &pci_ss_info_1028_0121, &pci_ss_info_1028_0123, &pci_ss_info_1028_0126, &pci_ss_info_1028_012a, + &pci_ss_info_1028_0134, + &pci_ss_info_1028_0139, &pci_ss_info_1028_014a, + &pci_ss_info_1028_014e, &pci_ss_info_1028_0151, + &pci_ss_info_1028_0156, &pci_ss_info_1028_0163, &pci_ss_info_1028_0165, + &pci_ss_info_1028_0169, &pci_ss_info_1028_016c, &pci_ss_info_1028_016d, &pci_ss_info_1028_016e, &pci_ss_info_1028_016f, &pci_ss_info_1028_0170, &pci_ss_info_1028_0179, + &pci_ss_info_1028_0182, + &pci_ss_info_1028_0183, + &pci_ss_info_1028_0188, + &pci_ss_info_1028_0196, + &pci_ss_info_1028_019a, + &pci_ss_info_1028_019d, + &pci_ss_info_1028_01a2, + &pci_ss_info_1028_01ad, &pci_ss_info_1028_0287, &pci_ss_info_1028_0291, &pci_ss_info_1028_0407, @@ -43575,8 +53864,11 @@ &pci_ss_info_1028_1079, &pci_ss_info_1028_1111, &pci_ss_info_1028_4082, + &pci_ss_info_1028_4134, &pci_ss_info_1028_8082, + &pci_ss_info_1028_865d, &pci_ss_info_1028_c082, + &pci_ss_info_1028_c134, NULL }; #define pci_ss_list_1029 NULL @@ -43596,6 +53888,9 @@ &pci_ss_info_102b_07c0, &pci_ss_info_102b_07c1, &pci_ss_info_102b_0840, + &pci_ss_info_102b_0850, + &pci_ss_info_102b_08c7, + &pci_ss_info_102b_0907, &pci_ss_info_102b_0d41, &pci_ss_info_102b_0d42, &pci_ss_info_102b_0d43, @@ -43609,11 +53904,20 @@ &pci_ss_info_102b_0f83, &pci_ss_info_102b_0f84, &pci_ss_info_102b_1001, + &pci_ss_info_102b_1020, + &pci_ss_info_102b_1030, + &pci_ss_info_102b_1047, + &pci_ss_info_102b_1087, &pci_ss_info_102b_1100, &pci_ss_info_102b_1200, + &pci_ss_info_102b_14e1, + &pci_ss_info_102b_1820, + &pci_ss_info_102b_1830, &pci_ss_info_102b_19d8, &pci_ss_info_102b_19f8, + &pci_ss_info_102b_1c10, &pci_ss_info_102b_1e41, + &pci_ss_info_102b_2021, &pci_ss_info_102b_2159, &pci_ss_info_102b_2179, &pci_ss_info_102b_217d, @@ -43621,9 +53925,14 @@ &pci_ss_info_102b_23c1, &pci_ss_info_102b_23c2, &pci_ss_info_102b_23c3, + &pci_ss_info_102b_2538, + &pci_ss_info_102b_2811, + &pci_ss_info_102b_2c11, &pci_ss_info_102b_2f58, &pci_ss_info_102b_2f78, + &pci_ss_info_102b_3007, &pci_ss_info_102b_3693, + &pci_ss_info_102b_48d0, &pci_ss_info_102b_48e9, &pci_ss_info_102b_48f8, &pci_ss_info_102b_4a60, @@ -43687,6 +53996,7 @@ #define pci_ss_list_1032 NULL static const pciSubsystemInfo *pci_ss_list_1033[] = { &pci_ss_info_1033_0000, + &pci_ss_info_1033_0035, &pci_ss_info_1033_8000, &pci_ss_info_1033_800c, &pci_ss_info_1033_800d, @@ -43719,6 +54029,7 @@ &pci_ss_info_1033_80bc, &pci_ss_info_1033_80cc, &pci_ss_info_1033_80cd, + &pci_ss_info_1033_80e5, &pci_ss_info_1033_8110, &pci_ss_info_1033_8112, NULL @@ -43747,9 +54058,12 @@ &pci_ss_info_103c_0008, &pci_ss_info_103c_000d, &pci_ss_info_103c_0024, + &pci_ss_info_103c_006a, &pci_ss_info_103c_03a2, &pci_ss_info_103c_0850, + &pci_ss_info_103c_088c, &pci_ss_info_103c_0890, + &pci_ss_info_103c_099c, &pci_ss_info_103c_1040, &pci_ss_info_103c_1041, &pci_ss_info_103c_1042, @@ -43792,8 +54106,24 @@ &pci_ss_info_103c_12c3, &pci_ss_info_103c_12ca, &pci_ss_info_103c_12cf, + &pci_ss_info_103c_12d5, + &pci_ss_info_103c_12f4, + &pci_ss_info_103c_12fa, + &pci_ss_info_103c_1300, + &pci_ss_info_103c_1301, + &pci_ss_info_103c_1356, &pci_ss_info_103c_2a0d, + &pci_ss_info_103c_308b, &pci_ss_info_103c_3100, + &pci_ss_info_103c_3101, + &pci_ss_info_103c_3102, + &pci_ss_info_103c_3103, + &pci_ss_info_103c_3226, + &pci_ss_info_103c_3227, + &pci_ss_info_103c_60e7, + &pci_ss_info_103c_7031, + &pci_ss_info_103c_7032, + &pci_ss_info_103c_7039, NULL }; #define pci_ss_list_103e NULL @@ -43816,14 +54146,26 @@ static const pciSubsystemInfo *pci_ss_list_1043[] = { &pci_ss_info_1043_002a, &pci_ss_info_1043_0120, + &pci_ss_info_1043_0127, &pci_ss_info_1043_0200, &pci_ss_info_1043_0201, &pci_ss_info_1043_0202, &pci_ss_info_1043_0205, + &pci_ss_info_1043_0210, + &pci_ss_info_1043_032e, &pci_ss_info_1043_0c11, &pci_ss_info_1043_100f, &pci_ss_info_1043_1106, + &pci_ss_info_1043_130f, + &pci_ss_info_1043_1702, + &pci_ss_info_1043_1703, + &pci_ss_info_1043_1707, &pci_ss_info_1043_173c, + &pci_ss_info_1043_1881, + &pci_ss_info_1043_1967, + &pci_ss_info_1043_1987, + &pci_ss_info_1043_2582, + &pci_ss_info_1043_2601, &pci_ss_info_1043_4000, &pci_ss_info_1043_4008, &pci_ss_info_1043_4009, @@ -43835,9 +54177,15 @@ &pci_ss_info_1043_4031, &pci_ss_info_1043_405b, &pci_ss_info_1043_405f, + &pci_ss_info_1043_4823, + &pci_ss_info_1043_4840, + &pci_ss_info_1043_4843, + &pci_ss_info_1043_4845, + &pci_ss_info_1043_4862, &pci_ss_info_1043_800b, &pci_ss_info_1043_801c, &pci_ss_info_1043_8023, + &pci_ss_info_1043_8025, &pci_ss_info_1043_8027, &pci_ss_info_1043_802c, &pci_ss_info_1043_8033, @@ -43851,11 +54199,18 @@ &pci_ss_info_1043_8064, &pci_ss_info_1043_806f, &pci_ss_info_1043_8077, + &pci_ss_info_1043_807e, &pci_ss_info_1043_807f, + &pci_ss_info_1043_8080, + &pci_ss_info_1043_808a, + &pci_ss_info_1043_808b, &pci_ss_info_1043_808c, + &pci_ss_info_1043_808d, &pci_ss_info_1043_8095, &pci_ss_info_1043_809e, &pci_ss_info_1043_80a1, + &pci_ss_info_1043_80a3, + &pci_ss_info_1043_80a5, &pci_ss_info_1043_80a6, &pci_ss_info_1043_80a7, &pci_ss_info_1043_80a8, @@ -43867,17 +54222,30 @@ &pci_ss_info_1043_80ed, &pci_ss_info_1043_80f2, &pci_ss_info_1043_80f3, + &pci_ss_info_1043_80f4, &pci_ss_info_1043_80f5, + &pci_ss_info_1043_80f8, + &pci_ss_info_1043_8109, + &pci_ss_info_1043_810f, &pci_ss_info_1043_811a, + &pci_ss_info_1043_812a, &pci_ss_info_1043_8134, + &pci_ss_info_1043_8138, + &pci_ss_info_1043_8141, &pci_ss_info_1043_8142, &pci_ss_info_1043_8145, &pci_ss_info_1043_814a, + &pci_ss_info_1043_814e, + &pci_ss_info_1043_815a, + &pci_ss_info_1043_817b, + &pci_ss_info_1043_81a6, &pci_ss_info_1043_c002, &pci_ss_info_1043_c003, &pci_ss_info_1043_c004, &pci_ss_info_1043_c005, &pci_ss_info_1043_c006, + &pci_ss_info_1043_c01a, + &pci_ss_info_1043_c01b, NULL }; #endif @@ -43905,6 +54273,7 @@ &pci_ss_info_1044_c029, &pci_ss_info_1044_c02a, &pci_ss_info_1044_c032, + &pci_ss_info_1044_c035, &pci_ss_info_1044_c03c, &pci_ss_info_1044_c03d, &pci_ss_info_1044_c03e, @@ -43927,24 +54296,66 @@ #define pci_ss_list_1047 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1048[] = { + &pci_ss_info_1048_0935, &pci_ss_info_1048_0a31, &pci_ss_info_1048_0a32, + &pci_ss_info_1048_0a34, &pci_ss_info_1048_0a35, + &pci_ss_info_1048_0a36, + &pci_ss_info_1048_0a42, + &pci_ss_info_1048_0a43, + &pci_ss_info_1048_0a44, &pci_ss_info_1048_0c10, &pci_ss_info_1048_0c18, + &pci_ss_info_1048_0c19, &pci_ss_info_1048_0c1b, + &pci_ss_info_1048_0c1c, + &pci_ss_info_1048_0c20, &pci_ss_info_1048_0c21, + &pci_ss_info_1048_0c28, + &pci_ss_info_1048_0c29, + &pci_ss_info_1048_0c2a, + &pci_ss_info_1048_0c2b, + &pci_ss_info_1048_0c2e, + &pci_ss_info_1048_0c2f, + &pci_ss_info_1048_0c30, &pci_ss_info_1048_0c31, + &pci_ss_info_1048_0c32, + &pci_ss_info_1048_0c33, + &pci_ss_info_1048_0c34, &pci_ss_info_1048_0c3a, + &pci_ss_info_1048_0c3b, + &pci_ss_info_1048_0c40, + &pci_ss_info_1048_0c41, + &pci_ss_info_1048_0c42, + &pci_ss_info_1048_0c43, + &pci_ss_info_1048_0c44, + &pci_ss_info_1048_0c45, + &pci_ss_info_1048_0c48, + &pci_ss_info_1048_0c4a, + &pci_ss_info_1048_0c4b, + &pci_ss_info_1048_0c50, + &pci_ss_info_1048_0c52, &pci_ss_info_1048_0c56, + &pci_ss_info_1048_0c60, + &pci_ss_info_1048_0c61, + &pci_ss_info_1048_0c63, + &pci_ss_info_1048_0c64, + &pci_ss_info_1048_0c65, + &pci_ss_info_1048_0c66, + &pci_ss_info_1048_0c70, &pci_ss_info_1048_1500, + &pci_ss_info_1048_226b, NULL }; #endif #define pci_ss_list_1049 NULL #define pci_ss_list_104a NULL #define pci_ss_list_104b NULL -#define pci_ss_list_104c NULL +static const pciSubsystemInfo *pci_ss_list_104c[] = { + &pci_ss_info_104c_9066, + NULL +}; static const pciSubsystemInfo *pci_ss_list_104d[] = { &pci_ss_info_104d_801b, &pci_ss_info_104d_802f, @@ -43966,6 +54377,7 @@ &pci_ss_info_104d_8097, &pci_ss_info_104d_80df, &pci_ss_info_104d_80e7, + &pci_ss_info_104d_810f, &pci_ss_info_104d_830b, NULL }; @@ -44004,6 +54416,7 @@ &pci_ss_info_1057_0301, &pci_ss_info_1057_0302, &pci_ss_info_1057_5600, + &pci_ss_info_1057_7025, NULL }; #define pci_ss_list_1058 NULL @@ -44064,11 +54477,27 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1069[] = { &pci_ss_info_1069_0020, + &pci_ss_info_1069_0030, + &pci_ss_info_1069_0040, + &pci_ss_info_1069_0050, + &pci_ss_info_1069_0052, + &pci_ss_info_1069_0054, + &pci_ss_info_1069_0072, + &pci_ss_info_1069_0200, + &pci_ss_info_1069_0202, + &pci_ss_info_1069_0204, + &pci_ss_info_1069_0206, NULL }; #endif #define pci_ss_list_106a NULL -#define pci_ss_list_106b NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_106b[] = { + &pci_ss_info_106b_004e, + &pci_ss_info_106b_5811, + NULL +}; +#endif #define pci_ss_list_106c NULL #define pci_ss_list_106d NULL #define pci_ss_list_106e NULL @@ -44076,6 +54505,7 @@ #define pci_ss_list_1070 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1071[] = { + &pci_ss_info_1071_7150, &pci_ss_info_1071_8160, NULL }; @@ -44142,6 +54572,10 @@ &pci_ss_info_107d_5330, &pci_ss_info_107d_5350, &pci_ss_info_107d_6606, + &pci_ss_info_107d_6613, + &pci_ss_info_107d_6620, + &pci_ss_info_107d_663c, + &pci_ss_info_107d_665f, NULL }; #endif @@ -44177,7 +54611,10 @@ NULL }; #endif -#define pci_ss_list_108e NULL +static const pciSubsystemInfo *pci_ss_list_108e[] = { + &pci_ss_info_108e_10cf, + NULL +}; #define pci_ss_list_108f NULL #define pci_ss_list_1090 NULL #define pci_ss_list_1091 NULL @@ -44267,6 +54704,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1095[] = { &pci_ss_info_1095_0670, + &pci_ss_info_1095_10cf, &pci_ss_info_1095_3112, &pci_ss_info_1095_3114, &pci_ss_info_1095_3124, @@ -44377,7 +54815,11 @@ &pci_ss_info_10b5_2905, &pci_ss_info_10b5_2906, &pci_ss_info_10b5_2940, + &pci_ss_info_10b5_2977, + &pci_ss_info_10b5_2978, &pci_ss_info_10b5_2979, + &pci_ss_info_10b5_3025, + &pci_ss_info_10b5_3068, &pci_ss_info_10b5_9050, &pci_ss_info_10b5_9080, NULL @@ -44529,6 +54971,7 @@ &pci_ss_info_10cf_1056, &pci_ss_info_10cf_1057, &pci_ss_info_10cf_1059, + &pci_ss_info_10cf_105e, &pci_ss_info_10cf_105f, &pci_ss_info_10cf_1063, &pci_ss_info_10cf_1064, @@ -44565,11 +55008,13 @@ #define pci_ss_list_10dd NULL static const pciSubsystemInfo *pci_ss_list_10de[] = { &pci_ss_info_10de_0005, + &pci_ss_info_10de_0008, &pci_ss_info_10de_000f, &pci_ss_info_10de_001e, &pci_ss_info_10de_0020, &pci_ss_info_10de_006b, &pci_ss_info_10de_0091, + &pci_ss_info_10de_00a1, &pci_ss_info_10de_0179, NULL }; @@ -44578,6 +55023,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_10e1[] = { &pci_ss_info_10e1_0391, + &pci_ss_info_10e1_10cf, NULL }; #endif @@ -44637,7 +55083,13 @@ #define pci_ss_list_10f9 NULL #define pci_ss_list_10fa NULL #define pci_ss_list_10fb NULL -#define pci_ss_list_10fc NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_10fc[] = { + &pci_ss_info_10fc_d003, + &pci_ss_info_10fc_d035, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_10fd[] = { &pci_ss_info_10fd_a430, @@ -44654,6 +55106,8 @@ #endif #define pci_ss_list_1101 NULL static const pciSubsystemInfo *pci_ss_list_1102[] = { + &pci_ss_info_1102_0007, + &pci_ss_info_1102_0008, &pci_ss_info_1102_0010, &pci_ss_info_1102_0020, &pci_ss_info_1102_0021, @@ -44664,6 +55118,9 @@ &pci_ss_info_1102_0058, &pci_ss_info_1102_1001, &pci_ss_info_1102_1002, + &pci_ss_info_1102_1006, + &pci_ss_info_1102_1007, + &pci_ss_info_1102_100a, &pci_ss_info_1102_100f, &pci_ss_info_1102_1015, &pci_ss_info_1102_1016, @@ -44713,7 +55170,12 @@ }; #endif #define pci_ss_list_1104 NULL -#define pci_ss_list_1105 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1105[] = { + &pci_ss_info_1105_0001, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1106[] = { &pci_ss_info_1106_0000, @@ -44746,6 +55208,9 @@ &pci_ss_info_110a_001e, &pci_ss_info_110a_0021, &pci_ss_info_110a_0032, + &pci_ss_info_110a_0051, + &pci_ss_info_110a_008b, + &pci_ss_info_110a_5938, &pci_ss_info_110a_8005, &pci_ss_info_110a_ffff, NULL @@ -44780,9 +55245,12 @@ &pci_ss_info_1113_1220, &pci_ss_info_1113_2220, &pci_ss_info_1113_2242, + &pci_ss_info_1113_4203, &pci_ss_info_1113_9211, + &pci_ss_info_1113_d301, &pci_ss_info_1113_ec01, &pci_ss_info_1113_ee03, + &pci_ss_info_1113_ee08, NULL }; #endif @@ -44840,8 +55308,17 @@ #define pci_ss_list_1130 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1131[] = { + &pci_ss_info_1131_2001, + &pci_ss_info_1131_2004, + &pci_ss_info_1131_2005, + &pci_ss_info_1131_2018, + &pci_ss_info_1131_4e85, + &pci_ss_info_1131_4ee9, &pci_ss_info_1131_4f56, + &pci_ss_info_1131_4f60, &pci_ss_info_1131_4f61, + &pci_ss_info_1131_5f61, + &pci_ss_info_1131_6752, NULL }; #endif @@ -44862,14 +55339,6 @@ &pci_ss_info_1133_1c0a, &pci_ss_info_1133_1c0b, &pci_ss_info_1133_1c0c, - &pci_ss_info_1133_1e00, - &pci_ss_info_1133_1e01, - &pci_ss_info_1133_1e02, - &pci_ss_info_1133_1e03, - &pci_ss_info_1133_2000, - &pci_ss_info_1133_2001, - &pci_ss_info_1133_2002, - &pci_ss_info_1133_2003, &pci_ss_info_1133_2400, &pci_ss_info_1133_2800, &pci_ss_info_1133_e013, @@ -45058,7 +55527,13 @@ #endif #define pci_ss_list_117a NULL #define pci_ss_list_117b NULL -#define pci_ss_list_117c NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_117c[] = { + &pci_ss_info_117c_8013, + &pci_ss_info_117c_8014, + NULL +}; +#endif #define pci_ss_list_117d NULL #define pci_ss_list_117e NULL #define pci_ss_list_117f NULL @@ -45082,6 +55557,7 @@ &pci_ss_info_1186_1200, &pci_ss_info_1186_1300, &pci_ss_info_1186_1301, + &pci_ss_info_1186_1303, &pci_ss_info_1186_1320, &pci_ss_info_1186_1400, &pci_ss_info_1186_1401, @@ -45090,10 +55566,23 @@ &pci_ss_info_1186_3203, &pci_ss_info_1186_3501, &pci_ss_info_1186_3700, + &pci_ss_info_1186_3a12, &pci_ss_info_1186_3a13, + &pci_ss_info_1186_3a14, + &pci_ss_info_1186_3a15, + &pci_ss_info_1186_3a16, + &pci_ss_info_1186_3a17, + &pci_ss_info_1186_3a18, + &pci_ss_info_1186_3a19, + &pci_ss_info_1186_3a22, + &pci_ss_info_1186_3a23, + &pci_ss_info_1186_3a24, + &pci_ss_info_1186_3a63, &pci_ss_info_1186_3a94, &pci_ss_info_1186_3b00, &pci_ss_info_1186_3b01, + &pci_ss_info_1186_3b04, + &pci_ss_info_1186_3b05, &pci_ss_info_1186_4c00, &pci_ss_info_1186_7801, &pci_ss_info_1186_8139, @@ -45187,8 +55676,12 @@ &pci_ss_info_11bd_0006, &pci_ss_info_11bd_000a, &pci_ss_info_11bd_000e, + &pci_ss_info_11bd_000f, &pci_ss_info_11bd_0012, &pci_ss_info_11bd_001c, + &pci_ss_info_11bd_002b, + &pci_ss_info_11bd_002d, + &pci_ss_info_11bd_002e, NULL }; #endif @@ -45341,6 +55834,7 @@ &pci_ss_info_121a_004e, &pci_ss_info_121a_0051, &pci_ss_info_121a_0052, + &pci_ss_info_121a_0057, &pci_ss_info_121a_0060, &pci_ss_info_121a_0061, &pci_ss_info_121a_0062, @@ -45453,6 +55947,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1244[] = { &pci_ss_info_1244_0a00, + &pci_ss_info_1244_0f00, NULL }; #endif @@ -45465,6 +55960,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_124b[] = { &pci_ss_info_124b_1070, + &pci_ss_info_124b_1170, &pci_ss_info_124b_9080, NULL }; @@ -45492,6 +55988,8 @@ &pci_ss_info_1259_2561, &pci_ss_info_1259_2700, &pci_ss_info_1259_2701, + &pci_ss_info_1259_2702, + &pci_ss_info_1259_2703, &pci_ss_info_1259_2800, &pci_ss_info_1259_2970, &pci_ss_info_1259_2971, @@ -45530,7 +56028,12 @@ #endif #define pci_ss_list_125e NULL #define pci_ss_list_125f NULL -#define pci_ss_list_1260 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1260[] = { + &pci_ss_info_1260_0000, + NULL +}; +#endif #define pci_ss_list_1261 NULL #define pci_ss_list_1262 NULL #define pci_ss_list_1263 NULL @@ -45596,7 +56099,12 @@ #endif #define pci_ss_list_127b NULL #define pci_ss_list_127c NULL -#define pci_ss_list_127d NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_127d[] = { + &pci_ss_info_127d_0000, + NULL +}; +#endif #define pci_ss_list_127e NULL #define pci_ss_list_127f NULL #define pci_ss_list_1280 NULL @@ -45670,7 +56178,11 @@ #define pci_ss_list_12aa NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_12ab[] = { + &pci_ss_info_12ab_0000, + &pci_ss_info_12ab_0800, &pci_ss_info_12ab_5961, + &pci_ss_info_12ab_fff3, + &pci_ss_info_12ab_ffff, NULL }; #endif @@ -45736,7 +56248,12 @@ #define pci_ss_list_12c4 NULL #define pci_ss_list_12c5 NULL #define pci_ss_list_12c6 NULL -#define pci_ss_list_12c7 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_12c7[] = { + &pci_ss_info_12c7_4001, + NULL +}; +#endif #define pci_ss_list_12c8 NULL #define pci_ss_list_12c9 NULL #define pci_ss_list_12ca NULL @@ -45758,6 +56275,7 @@ static const pciSubsystemInfo *pci_ss_list_12d9[] = { &pci_ss_info_12d9_0002, &pci_ss_info_12d9_000a, + &pci_ss_info_12d9_000c, NULL }; #endif @@ -45812,7 +56330,12 @@ #define pci_ss_list_12f5 NULL #define pci_ss_list_12f6 NULL #define pci_ss_list_12f7 NULL -#define pci_ss_list_12f8 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_12f8[] = { + &pci_ss_info_12f8_8a02, + NULL +}; +#endif #define pci_ss_list_12f9 NULL #define pci_ss_list_12fb NULL #define pci_ss_list_12fc NULL @@ -45856,7 +56379,12 @@ NULL }; #endif -#define pci_ss_list_1319 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1319[] = { + &pci_ss_info_1319_1319, + NULL +}; +#endif #define pci_ss_list_131a NULL #define pci_ss_list_131c NULL #define pci_ss_list_131d NULL @@ -45865,6 +56393,7 @@ static const pciSubsystemInfo *pci_ss_list_131f[] = { &pci_ss_info_131f_2030, &pci_ss_info_131f_2050, + &pci_ss_info_131f_2051, NULL }; #endif @@ -45998,6 +56527,7 @@ &pci_ss_info_1385_4105, &pci_ss_info_1385_4800, &pci_ss_info_1385_4d00, + &pci_ss_info_1385_4e00, &pci_ss_info_1385_f004, &pci_ss_info_1385_f311, NULL @@ -46033,6 +56563,8 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1397[] = { &pci_ss_info_1397_2bd0, + &pci_ss_info_1397_3136, + &pci_ss_info_1397_3137, NULL }; #endif @@ -46090,7 +56622,16 @@ #define pci_ss_list_13ba NULL #define pci_ss_list_13bb NULL #define pci_ss_list_13bc NULL -#define pci_ss_list_13bd NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_13bd[] = { + &pci_ss_info_13bd_100c, + &pci_ss_info_13bd_100d, + &pci_ss_info_13bd_100e, + &pci_ss_info_13bd_1019, + &pci_ss_info_13bd_f6f1, + NULL +}; +#endif #define pci_ss_list_13be NULL #define pci_ss_list_13bf NULL #define pci_ss_list_13c0 NULL @@ -46117,6 +56658,7 @@ &pci_ss_info_13c2_100f, &pci_ss_info_13c2_1011, &pci_ss_info_13c2_1013, + &pci_ss_info_13c2_1016, &pci_ss_info_13c2_1102, NULL }; @@ -46168,6 +56710,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_13d1[] = { &pci_ss_info_13d1_ab01, + &pci_ss_info_13d1_aba0, &pci_ss_info_13d1_ac11, &pci_ss_info_13d1_ac12, NULL @@ -46327,7 +56870,20 @@ #define pci_ss_list_1411 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1412[] = { + &pci_ss_info_1412_1712, + &pci_ss_info_1412_1724, + &pci_ss_info_1412_3630, + &pci_ss_info_1412_3631, + &pci_ss_info_1412_d630, + &pci_ss_info_1412_d631, + &pci_ss_info_1412_d632, + &pci_ss_info_1412_d633, + &pci_ss_info_1412_d634, + &pci_ss_info_1412_d635, + &pci_ss_info_1412_d637, &pci_ss_info_1412_d638, + &pci_ss_info_1412_d63b, + &pci_ss_info_1412_d63c, NULL }; #endif @@ -46342,6 +56898,7 @@ #define pci_ss_list_1415 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1416[] = { + &pci_ss_info_1416_1712, &pci_ss_info_1416_9804, NULL }; @@ -46360,7 +56917,13 @@ #define pci_ss_list_141e NULL #define pci_ss_list_141f NULL #define pci_ss_list_1420 NULL -#define pci_ss_list_1421 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1421[] = { + &pci_ss_info_1421_0334, + &pci_ss_info_1421_1370, + NULL +}; +#endif #define pci_ss_list_1422 NULL #define pci_ss_list_1423 NULL #define pci_ss_list_1424 NULL @@ -46389,7 +56952,13 @@ }; #endif #define pci_ss_list_1433 NULL -#define pci_ss_list_1435 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1435[] = { + &pci_ss_info_1435_7330, + &pci_ss_info_1435_7350, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1436[] = { &pci_ss_info_1436_0300, @@ -46467,8 +57036,12 @@ &pci_ss_info_144f_150a, &pci_ss_info_144f_150b, &pci_ss_info_144f_1510, + &pci_ss_info_144f_1702, + &pci_ss_info_144f_1703, + &pci_ss_info_144f_1707, &pci_ss_info_144f_3000, &pci_ss_info_144f_4005, + &pci_ss_info_144f_7050, NULL }; #endif @@ -46484,14 +57057,23 @@ &pci_ss_info_1458_0400, &pci_ss_info_1458_0596, &pci_ss_info_1458_0691, + &pci_ss_info_1458_0c11, &pci_ss_info_1458_1000, &pci_ss_info_1458_1019, &pci_ss_info_1458_24c2, &pci_ss_info_1458_24d1, &pci_ss_info_1458_24d2, + &pci_ss_info_1458_2558, &pci_ss_info_1458_2560, &pci_ss_info_1458_2570, &pci_ss_info_1458_2578, + &pci_ss_info_1458_2580, + &pci_ss_info_1458_2582, + &pci_ss_info_1458_2659, + &pci_ss_info_1458_265a, + &pci_ss_info_1458_266a, + &pci_ss_info_1458_266f, + &pci_ss_info_1458_3124, &pci_ss_info_1458_4000, &pci_ss_info_1458_4002, &pci_ss_info_1458_4018, @@ -46510,6 +57092,9 @@ &pci_ss_info_1458_b003, &pci_ss_info_1458_d000, &pci_ss_info_1458_e000, + &pci_ss_info_1458_e381, + &pci_ss_info_1458_e911, + &pci_ss_info_1458_e931, NULL }; #endif @@ -46524,16 +57109,35 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1461[] = { &pci_ss_info_1461_0002, + &pci_ss_info_1461_0003, &pci_ss_info_1461_0004, + &pci_ss_info_1461_000a, + &pci_ss_info_1461_000b, + &pci_ss_info_1461_050c, &pci_ss_info_1461_0761, + &pci_ss_info_1461_1044, + &pci_ss_info_1461_10ff, + &pci_ss_info_1461_2108, + &pci_ss_info_1461_2115, + &pci_ss_info_1461_8011, + &pci_ss_info_1461_9715, + &pci_ss_info_1461_a3ce, + &pci_ss_info_1461_a3cf, + &pci_ss_info_1461_a70a, + &pci_ss_info_1461_a70b, + &pci_ss_info_1461_d6ee, + &pci_ss_info_1461_f31f, NULL }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1462[] = { &pci_ss_info_1462_0080, + &pci_ss_info_1462_0402, + &pci_ss_info_1462_0403, &pci_ss_info_1462_052c, &pci_ss_info_1462_058c, + &pci_ss_info_1462_1009, &pci_ss_info_1462_3091, &pci_ss_info_1462_309e, &pci_ss_info_1462_3300, @@ -46541,8 +57145,10 @@ &pci_ss_info_1462_3800, &pci_ss_info_1462_3981, &pci_ss_info_1462_400a, + &pci_ss_info_1462_5470, &pci_ss_info_1462_5506, &pci_ss_info_1462_5800, + &pci_ss_info_1462_6231, &pci_ss_info_1462_6470, &pci_ss_info_1462_6560, &pci_ss_info_1462_6630, @@ -46552,7 +57158,9 @@ &pci_ss_info_1462_6780, &pci_ss_info_1462_6820, &pci_ss_info_1462_6822, + &pci_ss_info_1462_6828, &pci_ss_info_1462_6830, + &pci_ss_info_1462_6835, &pci_ss_info_1462_6880, &pci_ss_info_1462_6900, &pci_ss_info_1462_6910, @@ -46560,22 +57168,30 @@ &pci_ss_info_1462_6990, &pci_ss_info_1462_6991, &pci_ss_info_1462_7020, + &pci_ss_info_1462_7028, &pci_ss_info_1462_702c, &pci_ss_info_1462_702d, &pci_ss_info_1462_702e, + &pci_ss_info_1462_7100, &pci_ss_info_1462_7280, &pci_ss_info_1462_728c, &pci_ss_info_1462_7580, &pci_ss_info_1462_758c, + &pci_ss_info_1462_788c, + &pci_ss_info_1462_8606, &pci_ss_info_1462_8661, &pci_ss_info_1462_8730, &pci_ss_info_1462_8808, &pci_ss_info_1462_8817, &pci_ss_info_1462_8831, + &pci_ss_info_1462_8852, &pci_ss_info_1462_8880, &pci_ss_info_1462_8900, &pci_ss_info_1462_9171, + &pci_ss_info_1462_932c, &pci_ss_info_1462_9350, + &pci_ss_info_1462_9360, + &pci_ss_info_1462_971d, NULL }; #endif @@ -46587,10 +57203,13 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1468[] = { &pci_ss_info_1468_0202, + &pci_ss_info_1468_0311, + &pci_ss_info_1468_0312, &pci_ss_info_1468_0410, &pci_ss_info_1468_0440, &pci_ss_info_1468_0441, &pci_ss_info_1468_0449, + &pci_ss_info_1468_0450, &pci_ss_info_1468_2015, NULL }; @@ -46608,7 +57227,12 @@ #define pci_ss_list_146e NULL #define pci_ss_list_146f NULL #define pci_ss_list_1470 NULL -#define pci_ss_list_1471 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1471[] = { + &pci_ss_info_1471_b7e9, + NULL +}; +#endif #define pci_ss_list_1472 NULL #define pci_ss_list_1473 NULL #define pci_ss_list_1474 NULL @@ -46628,6 +57252,10 @@ &pci_ss_info_147b_0507, &pci_ss_info_147b_1406, &pci_ss_info_147b_1407, + &pci_ss_info_147b_1408, + &pci_ss_info_147b_1c09, + &pci_ss_info_147b_1c0b, + &pci_ss_info_147b_6191, &pci_ss_info_147b_8f00, &pci_ss_info_147b_8f09, &pci_ss_info_147b_8f0d, @@ -46658,6 +57286,7 @@ #define pci_ss_list_1488 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1489[] = { + &pci_ss_info_1489_0214, &pci_ss_info_1489_6001, &pci_ss_info_1489_6002, NULL @@ -46678,6 +57307,8 @@ &pci_ss_info_148c_2066, &pci_ss_info_148c_2067, &pci_ss_info_148c_2073, + &pci_ss_info_148c_2116, + &pci_ss_info_148c_2117, NULL }; #endif @@ -46789,16 +57420,28 @@ &pci_ss_info_14c0_0004, &pci_ss_info_14c0_000c, &pci_ss_info_14c0_0012, + &pci_ss_info_14c0_1212, NULL }; #endif #define pci_ss_list_14c1 NULL -#define pci_ss_list_14c2 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_14c2[] = { + &pci_ss_info_14c2_0105, + &pci_ss_info_14c2_0205, + NULL +}; +#endif #define pci_ss_list_14c3 NULL #define pci_ss_list_14c4 NULL #define pci_ss_list_14c5 NULL #define pci_ss_list_14c6 NULL -#define pci_ss_list_14c7 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_14c7[] = { + &pci_ss_info_14c7_0107, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_14c8[] = { &pci_ss_info_14c8_0300, @@ -46859,8 +57502,10 @@ &pci_ss_info_14e4_000b, &pci_ss_info_14e4_000c, &pci_ss_info_14e4_000d, + &pci_ss_info_14e4_0449, &pci_ss_info_14e4_1028, &pci_ss_info_14e4_1644, + &pci_ss_info_14e4_4318, &pci_ss_info_14e4_4320, &pci_ss_info_14e4_8008, &pci_ss_info_14e4_8009, @@ -46894,9 +57539,11 @@ &pci_ss_info_14f1_0048, &pci_ss_info_14f1_0122, &pci_ss_info_14f1_0144, + &pci_ss_info_14f1_0187, &pci_ss_info_14f1_0222, &pci_ss_info_14f1_0244, &pci_ss_info_14f1_0322, + &pci_ss_info_14f1_0342, &pci_ss_info_14f1_0422, &pci_ss_info_14f1_1122, &pci_ss_info_14f1_1222, @@ -46905,6 +57552,7 @@ &pci_ss_info_14f1_1622, &pci_ss_info_14f1_1722, &pci_ss_info_14f1_2004, + &pci_ss_info_14f1_2045, &pci_ss_info_14f1_5421, NULL }; @@ -46944,7 +57592,9 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_14ff[] = { + &pci_ss_info_14ff_0e70, &pci_ss_info_14ff_1100, + &pci_ss_info_14ff_c401, NULL }; #endif @@ -46959,6 +57609,7 @@ #define pci_ss_list_1508 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1509[] = { + &pci_ss_info_1509_1930, &pci_ss_info_1509_1968, &pci_ss_info_1509_2990, &pci_ss_info_1509_7002, @@ -46984,7 +57635,12 @@ #define pci_ss_list_1515 NULL #define pci_ss_list_1516 NULL #define pci_ss_list_1517 NULL -#define pci_ss_list_1518 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1518[] = { + &pci_ss_info_1518_0200, + NULL +}; +#endif #define pci_ss_list_1519 NULL #define pci_ss_list_151a NULL #define pci_ss_list_151b NULL @@ -47012,6 +57668,14 @@ &pci_ss_info_1522_0c00, &pci_ss_info_1522_0d00, &pci_ss_info_1522_1d00, + &pci_ss_info_1522_2000, + &pci_ss_info_1522_2100, + &pci_ss_info_1522_2200, + &pci_ss_info_1522_2300, + &pci_ss_info_1522_2400, + &pci_ss_info_1522_2500, + &pci_ss_info_1522_2600, + &pci_ss_info_1522_2700, NULL }; #endif @@ -47048,12 +57712,41 @@ #define pci_ss_list_1538 NULL #define pci_ss_list_1539 NULL #define pci_ss_list_153a NULL -#define pci_ss_list_153b NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_153b[] = { + &pci_ss_info_153b_1115, + &pci_ss_info_153b_111b, + &pci_ss_info_153b_1125, + &pci_ss_info_153b_112b, + &pci_ss_info_153b_112c, + &pci_ss_info_153b_1130, + &pci_ss_info_153b_1136, + &pci_ss_info_153b_1138, + &pci_ss_info_153b_1142, + &pci_ss_info_153b_1143, + &pci_ss_info_153b_1145, + &pci_ss_info_153b_1147, + &pci_ss_info_153b_1151, + &pci_ss_info_153b_1152, + &pci_ss_info_153b_1153, + &pci_ss_info_153b_1158, + &pci_ss_info_153b_1160, + &pci_ss_info_153b_1162, + &pci_ss_info_153b_1166, + NULL +}; +#endif #define pci_ss_list_153c NULL #define pci_ss_list_153d NULL #define pci_ss_list_153e NULL #define pci_ss_list_153f NULL -#define pci_ss_list_1540 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1540[] = { + &pci_ss_info_1540_2580, + &pci_ss_info_1540_9524, + NULL +}; +#endif #define pci_ss_list_1541 NULL #define pci_ss_list_1542 NULL #define pci_ss_list_1543 NULL @@ -47081,6 +57774,8 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1554[] = { &pci_ss_info_1554_1041, + &pci_ss_info_1554_4811, + &pci_ss_info_1554_4813, NULL }; #endif @@ -47125,6 +57820,7 @@ #define pci_ss_list_1568 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1569[] = { + &pci_ss_info_1569_002d, &pci_ss_info_1569_6326, NULL }; @@ -47132,7 +57828,17 @@ #define pci_ss_list_156a NULL #define pci_ss_list_156b NULL #define pci_ss_list_156c NULL -#define pci_ss_list_156d NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_156d[] = { + &pci_ss_info_156d_b400, + &pci_ss_info_156d_b550, + &pci_ss_info_156d_b560, + &pci_ss_info_156d_b700, + &pci_ss_info_156d_b795, + &pci_ss_info_156d_b797, + NULL +}; +#endif #define pci_ss_list_156e NULL #define pci_ss_list_156f NULL #define pci_ss_list_1570 NULL @@ -47214,6 +57920,7 @@ #define pci_ss_list_15bc NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_15bd[] = { + &pci_ss_info_15bd_1001, &pci_ss_info_15bd_1003, NULL }; @@ -47329,6 +58036,7 @@ #define pci_ss_list_1619 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_161f[] = { + &pci_ss_info_161f_2029, &pci_ss_info_161f_203c, &pci_ss_info_161f_203d, &pci_ss_info_161f_3017, @@ -47343,6 +58051,7 @@ #define pci_ss_list_1657 NULL #define pci_ss_list_165a NULL #define pci_ss_list_165d NULL +#define pci_ss_list_165f NULL #define pci_ss_list_1661 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1668[] = { @@ -47358,6 +58067,7 @@ #endif #define pci_ss_list_166d NULL #define pci_ss_list_1677 NULL +#define pci_ss_list_167b NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1681[] = { &pci_ss_info_1681_0002, @@ -47370,15 +58080,37 @@ NULL }; #endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1682[] = { + &pci_ss_info_1682_2109, + &pci_ss_info_1682_211c, + &pci_ss_info_1682_2120, + NULL +}; +#endif #define pci_ss_list_1688 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_168c[] = { &pci_ss_info_168c_0013, &pci_ss_info_168c_1025, + &pci_ss_info_168c_1027, + &pci_ss_info_168c_1052, &pci_ss_info_168c_2026, + &pci_ss_info_168c_2041, + &pci_ss_info_168c_2042, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1695[] = { + &pci_ss_info_1695_3005, + &pci_ss_info_1695_300c, + &pci_ss_info_1695_9025, + &pci_ss_info_1695_9029, NULL }; #endif +#define pci_ss_list_169c NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_16a5[] = { &pci_ss_info_16a5_1601, @@ -47386,20 +58118,37 @@ NULL }; #endif -#define pci_ss_list_16ab NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_16ab[] = { + &pci_ss_info_16ab_7302, + &pci_ss_info_16ab_8501, + NULL +}; +#endif #define pci_ss_list_16ae NULL +#define pci_ss_list_16af NULL #define pci_ss_list_16b4 NULL +#define pci_ss_list_16b8 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_16be[] = { &pci_ss_info_16be_0001, &pci_ss_info_16be_0002, + &pci_ss_info_16be_0003, &pci_ss_info_16be_1040, NULL }; #endif +#define pci_ss_list_16c8 NULL +#define pci_ss_list_16c9 NULL #define pci_ss_list_16ca NULL #define pci_ss_list_16cd NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_16ce[] = { + &pci_ss_info_16ce_1040, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_16df[] = { &pci_ss_info_16df_0011, &pci_ss_info_16df_0012, @@ -47411,7 +58160,12 @@ }; #endif #define pci_ss_list_16e3 NULL -#define pci_ss_list_16ec NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_16ec[] = { + &pci_ss_info_16ec_0119, + NULL +}; +#endif #define pci_ss_list_16ed NULL #define pci_ss_list_16f3 NULL #define pci_ss_list_16f4 NULL @@ -47437,7 +58191,20 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1734[] = { + &pci_ss_info_1734_007a, + &pci_ss_info_1734_100b, + &pci_ss_info_1734_1011, + &pci_ss_info_1734_1012, + &pci_ss_info_1734_101c, + &pci_ss_info_1734_1025, + &pci_ss_info_1734_103e, + &pci_ss_info_1734_1052, &pci_ss_info_1734_1055, + &pci_ss_info_1734_105a, + &pci_ss_info_1734_105b, + &pci_ss_info_1734_105c, + &pci_ss_info_1734_105d, + &pci_ss_info_1734_1061, &pci_ss_info_1734_1065, NULL }; @@ -47446,6 +58213,8 @@ static const pciSubsystemInfo *pci_ss_list_1737[] = { &pci_ss_info_1737_0015, &pci_ss_info_1737_0016, + &pci_ss_info_1737_0024, + &pci_ss_info_1737_0032, &pci_ss_info_1737_3874, &pci_ss_info_1737_4320, NULL @@ -47486,14 +58255,24 @@ &pci_ss_info_175c_5100, &pci_ss_info_175c_6100, &pci_ss_info_175c_6200, + &pci_ss_info_175c_6400, &pci_ss_info_175c_8700, + &pci_ss_info_175c_8800, NULL }; #endif #define pci_ss_list_175e NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1775[] = { + &pci_ss_info_1775_6003, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1787[] = { &pci_ss_info_1787_0202, + &pci_ss_info_1787_4002, + &pci_ss_info_1787_4003, &pci_ss_info_1787_5964, &pci_ss_info_1787_5965, NULL @@ -47506,12 +58285,23 @@ &pci_ss_info_1799_0001, &pci_ss_info_1799_0002, &pci_ss_info_1799_5000, + &pci_ss_info_1799_7001, + &pci_ss_info_1799_700a, &pci_ss_info_1799_7010, + &pci_ss_info_1799_701a, NULL }; #endif +#define pci_ss_list_179c NULL #define pci_ss_list_17a0 NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_17aa[] = { + &pci_ss_info_17aa_0286, + &pci_ss_info_17aa_0287, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_17af[] = { &pci_ss_info_17af_0202, &pci_ss_info_17af_2005, @@ -47527,35 +58317,85 @@ #define pci_ss_list_17b4 NULL #define pci_ss_list_17c0 NULL #define pci_ss_list_17c2 NULL +#define pci_ss_list_17cb NULL #define pci_ss_list_17cc NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_17cf[] = { + &pci_ss_info_17cf_0014, + &pci_ss_info_17cf_0020, + &pci_ss_info_17cf_0037, + NULL +}; +#endif +#define pci_ss_list_17d3 NULL #define pci_ss_list_17d5 NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_17de[] = { + &pci_ss_info_17de_08a1, + &pci_ss_info_17de_08a6, + &pci_ss_info_17de_08b2, + &pci_ss_info_17de_a8a6, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_17ee[] = { &pci_ss_info_17ee_2002, &pci_ss_info_17ee_2003, NULL }; #endif -#define pci_ss_list_17fe NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_17f2[] = { + &pci_ss_info_17f2_1c03, + &pci_ss_info_17f2_2c08, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_17fe[] = { + &pci_ss_info_17fe_2220, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_17ff[] = { + &pci_ss_info_17ff_0585, + NULL +}; +#endif #define pci_ss_list_1813 NULL #define pci_ss_list_1814 NULL #define pci_ss_list_1820 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1822[] = { &pci_ss_info_1822_0001, + &pci_ss_info_1822_0025, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_182d[] = { + &pci_ss_info_182d_201d, NULL }; #endif -#define pci_ss_list_182d NULL #define pci_ss_list_1830 NULL #define pci_ss_list_183b NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_1849[] = { &pci_ss_info_1849_0571, + &pci_ss_info_1849_3038, + &pci_ss_info_1849_3065, &pci_ss_info_1849_3099, + &pci_ss_info_1849_3104, + &pci_ss_info_1849_3149, &pci_ss_info_1849_3177, + &pci_ss_info_1849_3189, + &pci_ss_info_1849_3227, &pci_ss_info_1849_8052, &pci_ss_info_1849_8053, + &pci_ss_info_1849_9761, NULL }; #endif @@ -47572,12 +58412,83 @@ NULL }; #endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1854[] = { + &pci_ss_info_1854_000b, + &pci_ss_info_1854_000c, + &pci_ss_info_1854_000d, + &pci_ss_info_1854_000e, + &pci_ss_info_1854_000f, + &pci_ss_info_1854_0010, + &pci_ss_info_1854_0011, + &pci_ss_info_1854_0012, + &pci_ss_info_1854_0013, + &pci_ss_info_1854_0014, + &pci_ss_info_1854_0015, + &pci_ss_info_1854_0016, + &pci_ss_info_1854_0017, + &pci_ss_info_1854_0018, + &pci_ss_info_1854_0019, + &pci_ss_info_1854_001a, + &pci_ss_info_1854_001b, + &pci_ss_info_1854_001c, + &pci_ss_info_1854_001d, + &pci_ss_info_1854_001e, + &pci_ss_info_1854_001f, + &pci_ss_info_1854_0020, + &pci_ss_info_1854_0021, + &pci_ss_info_1854_0022, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_185b[] = { + &pci_ss_info_185b_c100, + &pci_ss_info_185b_c200, + &pci_ss_info_185b_c900, + &pci_ss_info_185b_c901, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_185f[] = { + &pci_ss_info_185f_1220, + &pci_ss_info_185f_22a0, + NULL +}; +#endif +#define pci_ss_list_1864 NULL #define pci_ss_list_1867 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_187e[] = { + &pci_ss_info_187e_3406, + NULL +}; +#endif #define pci_ss_list_1888 NULL -#define pci_ss_list_1894 NULL +#define pci_ss_list_1890 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1894[] = { + &pci_ss_info_1894_a006, + &pci_ss_info_1894_fe01, + NULL +}; +#endif #define pci_ss_list_1896 NULL #define pci_ss_list_18a1 NULL -#define pci_ss_list_18ac NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_18ac[] = { + &pci_ss_info_18ac_d500, + &pci_ss_info_18ac_d810, + &pci_ss_info_18ac_d820, + &pci_ss_info_18ac_db00, + &pci_ss_info_18ac_db10, + &pci_ss_info_18ac_db11, + &pci_ss_info_18ac_db50, + NULL +}; +#endif +#define pci_ss_list_18b8 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_18bc[] = { &pci_ss_info_18bc_0050, @@ -47595,7 +58506,18 @@ #define pci_ss_list_18c8 NULL #define pci_ss_list_18c9 NULL #define pci_ss_list_18ca NULL +#define pci_ss_list_18d2 NULL +#define pci_ss_list_18dd NULL #define pci_ss_list_18e6 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_18ec[] = { + &pci_ss_info_18ec_d001, + &pci_ss_info_18ec_d002, + &pci_ss_info_18ec_d003, + &pci_ss_info_18ec_d004, + NULL +}; +#endif #define pci_ss_list_18f7 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_18fb[] = { @@ -47603,6 +58525,37 @@ NULL }; #endif +#define pci_ss_list_1923 NULL +#define pci_ss_list_1924 NULL +#define pci_ss_list_192e NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1931[] = { + &pci_ss_info_1931_000a, + &pci_ss_info_1931_000b, + NULL +}; +#endif +#define pci_ss_list_1942 NULL +#define pci_ss_list_1957 NULL +#define pci_ss_list_1958 NULL +#define pci_ss_list_1966 NULL +#define pci_ss_list_196a NULL +#define pci_ss_list_197b NULL +#define pci_ss_list_1989 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1993[] = { + &pci_ss_info_1993_0ded, + &pci_ss_info_1993_0dee, + &pci_ss_info_1993_0def, + NULL +}; +#endif +#define pci_ss_list_19a8 NULL +#define pci_ss_list_19ac NULL +#define pci_ss_list_19ae NULL +#define pci_ss_list_19d4 NULL +#define pci_ss_list_19e2 NULL +#define pci_ss_list_1a03 NULL #define pci_ss_list_1a08 NULL #define pci_ss_list_1b13 NULL #define pci_ss_list_1c1c NULL @@ -47613,10 +58566,19 @@ &pci_ss_info_1de1_3904, &pci_ss_info_1de1_3906, &pci_ss_info_1de1_3907, + &pci_ss_info_1de1_9fff, NULL }; #endif #define pci_ss_list_1fc0 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_1fc1[] = { + &pci_ss_info_1fc1_0026, + &pci_ss_info_1fc1_0027, + NULL +}; +#endif +#define pci_ss_list_1fce NULL #define pci_ss_list_2000 NULL #define pci_ss_list_2001 NULL #define pci_ss_list_2003 NULL @@ -47642,6 +58604,8 @@ &pci_ss_info_270f_7040, &pci_ss_info_270f_7060, &pci_ss_info_270f_a171, + &pci_ss_info_270f_f641, + &pci_ss_info_270f_f645, &pci_ss_info_270f_fc00, NULL }; @@ -47681,13 +58645,16 @@ NULL }; static const pciSubsystemInfo *pci_ss_list_4005[] = { + &pci_ss_info_4005_144f, &pci_ss_info_4005_4000, + &pci_ss_info_4005_4710, NULL }; #define pci_ss_list_4033 NULL #define pci_ss_list_4143 NULL #define pci_ss_list_4144 NULL #define pci_ss_list_416c NULL +#define pci_ss_list_4321 NULL #define pci_ss_list_4444 NULL #define pci_ss_list_4468 NULL #define pci_ss_list_4594 NULL @@ -47721,6 +58688,8 @@ &pci_ss_info_4c53_1090, &pci_ss_info_4c53_10a0, &pci_ss_info_4c53_10b0, + &pci_ss_info_4c53_10d0, + &pci_ss_info_4c53_10e0, &pci_ss_info_4c53_1300, &pci_ss_info_4c53_1310, &pci_ss_info_4c53_3000, @@ -47728,6 +58697,7 @@ &pci_ss_info_4c53_3002, &pci_ss_info_4c53_3010, &pci_ss_info_4c53_3011, + &pci_ss_info_4c53_4000, NULL }; #endif @@ -47749,7 +58719,8 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_5168[] = { &pci_ss_info_5168_0138, - &pci_ss_info_5168_0212, + &pci_ss_info_5168_0306, + &pci_ss_info_5168_0319, NULL }; #endif @@ -47791,6 +58762,12 @@ #define pci_ss_list_6374 NULL #define pci_ss_list_6409 NULL #define pci_ss_list_6666 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_7063[] = { + &pci_ss_info_7063_3000, + NULL +}; +#endif #define pci_ss_list_7604 NULL #define pci_ss_list_7bde NULL #define pci_ss_list_7fed NULL @@ -47812,7 +58789,6 @@ &pci_ss_info_8086_0006, &pci_ss_info_8086_0007, &pci_ss_info_8086_0008, - &pci_ss_info_8086_0009, &pci_ss_info_8086_000a, &pci_ss_info_8086_000b, &pci_ss_info_8086_000c, @@ -47839,6 +58815,7 @@ &pci_ss_info_8086_0079, &pci_ss_info_8086_007b, &pci_ss_info_8086_0100, + &pci_ss_info_8086_01af, &pci_ss_info_8086_01c1, &pci_ss_info_8086_01f7, &pci_ss_info_8086_0520, @@ -47850,11 +58827,13 @@ &pci_ss_info_8086_1002, &pci_ss_info_8086_1003, &pci_ss_info_8086_1004, + &pci_ss_info_8086_1005, &pci_ss_info_8086_1009, &pci_ss_info_8086_100c, &pci_ss_info_8086_1011, &pci_ss_info_8086_1012, &pci_ss_info_8086_1013, + &pci_ss_info_8086_1014, &pci_ss_info_8086_1015, &pci_ss_info_8086_1016, &pci_ss_info_8086_1017, @@ -47866,9 +58845,11 @@ &pci_ss_info_8086_1027, &pci_ss_info_8086_1028, &pci_ss_info_8086_1030, + &pci_ss_info_8086_1034, &pci_ss_info_8086_1040, &pci_ss_info_8086_1041, &pci_ss_info_8086_1042, + &pci_ss_info_8086_1044, &pci_ss_info_8086_1050, &pci_ss_info_8086_1051, &pci_ss_info_8086_1052, @@ -47892,6 +58873,8 @@ &pci_ss_info_8086_1276, &pci_ss_info_8086_127a, &pci_ss_info_8086_1361, + &pci_ss_info_8086_1376, + &pci_ss_info_8086_1476, &pci_ss_info_8086_1958, &pci_ss_info_8086_2004, &pci_ss_info_8086_2009, @@ -47933,6 +58916,7 @@ &pci_ss_info_8086_2411, &pci_ss_info_8086_2412, &pci_ss_info_8086_2413, + &pci_ss_info_8086_24db, &pci_ss_info_8086_2513, &pci_ss_info_8086_2527, &pci_ss_info_8086_3000, @@ -47951,14 +58935,20 @@ &pci_ss_info_8086_3017, &pci_ss_info_8086_3018, &pci_ss_info_8086_301f, + &pci_ss_info_8086_3020, + &pci_ss_info_8086_302f, &pci_ss_info_8086_3063, + &pci_ss_info_8086_308d, &pci_ss_info_8086_3108, &pci_ss_info_8086_3411, &pci_ss_info_8086_3424, &pci_ss_info_8086_3427, &pci_ss_info_8086_3431, + &pci_ss_info_8086_3439, &pci_ss_info_8086_3499, + &pci_ss_info_8086_4147, &pci_ss_info_8086_4152, + &pci_ss_info_8086_4246, &pci_ss_info_8086_4249, &pci_ss_info_8086_424c, &pci_ss_info_8086_425a, @@ -47974,6 +58964,7 @@ &pci_ss_info_8086_5243, &pci_ss_info_8086_524c, &pci_ss_info_8086_5352, + &pci_ss_info_8086_544e, &pci_ss_info_8086_5643, &pci_ss_info_8086_5753, &pci_ss_info_8086_8000, @@ -47982,12 +58973,15 @@ &pci_ss_info_8086_a000, &pci_ss_info_8086_a01f, &pci_ss_info_8086_a11f, + &pci_ss_info_8086_e000, + &pci_ss_info_8086_e001, NULL }; #define pci_ss_list_8401 NULL #define pci_ss_list_8800 NULL #define pci_ss_list_8866 NULL #define pci_ss_list_8888 NULL +#define pci_ss_list_8912 NULL #define pci_ss_list_8c4a NULL #define pci_ss_list_8e0e NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -48043,7 +59037,10 @@ &pci_ss_info_9005_0003, &pci_ss_info_9005_000f, &pci_ss_info_9005_0041, + &pci_ss_info_9005_0092, + &pci_ss_info_9005_0093, &pci_ss_info_9005_0106, + &pci_ss_info_9005_0250, &pci_ss_info_9005_0283, &pci_ss_info_9005_0284, &pci_ss_info_9005_0285, @@ -48054,12 +59051,37 @@ &pci_ss_info_9005_028a, &pci_ss_info_9005_028b, &pci_ss_info_9005_028c, + &pci_ss_info_9005_028d, + &pci_ss_info_9005_028e, + &pci_ss_info_9005_028f, &pci_ss_info_9005_0290, &pci_ss_info_9005_0292, &pci_ss_info_9005_0293, &pci_ss_info_9005_0294, + &pci_ss_info_9005_0296, + &pci_ss_info_9005_0297, + &pci_ss_info_9005_0298, + &pci_ss_info_9005_0299, + &pci_ss_info_9005_029a, + &pci_ss_info_9005_029b, + &pci_ss_info_9005_029c, + &pci_ss_info_9005_029d, + &pci_ss_info_9005_029e, + &pci_ss_info_9005_029f, + &pci_ss_info_9005_02a0, + &pci_ss_info_9005_02a1, + &pci_ss_info_9005_02a2, + &pci_ss_info_9005_02a3, + &pci_ss_info_9005_02a4, + &pci_ss_info_9005_02a5, + &pci_ss_info_9005_02a6, + &pci_ss_info_9005_02a7, + &pci_ss_info_9005_02a8, + &pci_ss_info_9005_02a9, + &pci_ss_info_9005_02aa, &pci_ss_info_9005_0364, &pci_ss_info_9005_0365, + &pci_ss_info_9005_0800, &pci_ss_info_9005_1364, &pci_ss_info_9005_1365, &pci_ss_info_9005_2180, @@ -48089,6 +59111,7 @@ static const pciSubsystemInfo *pci_ss_list_a0a0[] = { &pci_ss_info_a0a0_0007, &pci_ss_info_a0a0_0022, + &pci_ss_info_a0a0_01b6, &pci_ss_info_a0a0_0506, &pci_ss_info_a0a0_0509, NULL @@ -48098,12 +59121,18 @@ #define pci_ss_list_a200 NULL #define pci_ss_list_a259 NULL #define pci_ss_list_a25b NULL -#define pci_ss_list_a304 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciSubsystemInfo *pci_ss_list_a304[] = { + &pci_ss_info_a304_81b7, + NULL +}; +#endif #define pci_ss_list_a727 NULL #define pci_ss_list_aa42 NULL #define pci_ss_list_ac1e NULL #define pci_ss_list_ac3d NULL #define pci_ss_list_aecb NULL +#define pci_ss_list_affe NULL #define pci_ss_list_b1b3 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_bd11[] = { @@ -48119,6 +59148,7 @@ #define pci_ss_list_cafe NULL #define pci_ss_list_cccc NULL #define pci_ss_list_cddd NULL +#define pci_ss_list_d161 NULL #define pci_ss_list_d4d4 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_d531[] = { @@ -48154,6 +59184,7 @@ NULL }; #endif +#define pci_ss_list_deaf NULL #define pci_ss_list_e000 NULL #define pci_ss_list_e159 NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -48174,52 +59205,77 @@ #define pci_ss_list_ec80 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciSubsystemInfo *pci_ss_list_ecc0[] = { + &pci_ss_info_ecc0_0010, + &pci_ss_info_ecc0_0020, &pci_ss_info_ecc0_0030, + &pci_ss_info_ecc0_0031, + &pci_ss_info_ecc0_0040, + &pci_ss_info_ecc0_0041, + &pci_ss_info_ecc0_0050, + &pci_ss_info_ecc0_0051, + &pci_ss_info_ecc0_0060, + &pci_ss_info_ecc0_0070, + &pci_ss_info_ecc0_0071, + &pci_ss_info_ecc0_0072, + &pci_ss_info_ecc0_0080, + &pci_ss_info_ecc0_0081, + &pci_ss_info_ecc0_0090, + &pci_ss_info_ecc0_00a0, + &pci_ss_info_ecc0_00b0, + &pci_ss_info_ecc0_0100, NULL }; #endif #define pci_ss_list_edd8 NULL #define pci_ss_list_f1d0 NULL #define pci_ss_list_fa57 NULL +#define pci_ss_list_fab7 NULL #define pci_ss_list_febd NULL #define pci_ss_list_feda NULL #define pci_ss_list_fede NULL +#define pci_ss_list_fffd NULL #define pci_ss_list_fffe NULL #define pci_ss_list_ffff NULL #endif /* INIT_VENDOR_SUBSYS_INFO */ #endif /* INIT_SUBSYS_INFO */ #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_0070_4000 = { - 0x4000, pci_device_0070_4000, +static const pciDeviceInfo pci_dev_info_0095_0680 = { + 0x0680, pci_device_0095_0680, #ifdef INIT_SUBSYS_INFO - pci_ss_list_0070_4000, + pci_ss_list_0095_0680, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_0070_4001 = { - 0x4001, pci_device_0070_4001, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_018a_0106 = { + 0x0106, pci_device_018a_0106, #ifdef INIT_SUBSYS_INFO - pci_ss_list_0070_4001, + pci_ss_list_018a_0106, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_0070_4009 = { - 0x4009, pci_device_0070_4009, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_021b_8139 = { + 0x8139, pci_device_021b_8139, #ifdef INIT_SUBSYS_INFO - pci_ss_list_0070_4009, + pci_ss_list_021b_8139, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_0070_4801 = { - 0x4801, pci_device_0070_4801, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_0070_4801, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_0291_8212 = { + 0x8212, pci_device_0291_8212, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_0291_8212, #else NULL, #endif @@ -48227,10 +59283,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_0095_0680 = { - 0x0680, pci_device_0095_0680, +static const pciDeviceInfo pci_dev_info_02ac_1012 = { + 0x1012, pci_device_02ac_1012, #ifdef INIT_SUBSYS_INFO - pci_ss_list_0095_0680, + pci_ss_list_02ac_1012, #else NULL, #endif @@ -48238,10 +59294,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_018a_0106 = { - 0x0106, pci_device_018a_0106, +static const pciDeviceInfo pci_dev_info_0357_000a = { + 0x000a, pci_device_0357_000a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_018a_0106, + pci_ss_list_0357_000a, #else NULL, #endif @@ -48249,10 +59305,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_021b_8139 = { - 0x8139, pci_device_021b_8139, +static const pciDeviceInfo pci_dev_info_0432_0001 = { + 0x0001, pci_device_0432_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_021b_8139, + pci_ss_list_0432_0001, #else NULL, #endif @@ -48260,10 +59316,19 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_0291_8212 = { - 0x8212, pci_device_0291_8212, +static const pciDeviceInfo pci_dev_info_045e_006e = { + 0x006e, pci_device_045e_006e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_0291_8212, + pci_ss_list_045e_006e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_045e_00c2 = { + 0x00c2, pci_device_045e_00c2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_045e_00c2, #else NULL, #endif @@ -48271,10 +59336,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_02ac_1012 = { - 0x1012, pci_device_02ac_1012, +static const pciDeviceInfo pci_dev_info_04cf_8818 = { + 0x8818, pci_device_04cf_8818, #ifdef INIT_SUBSYS_INFO - pci_ss_list_02ac_1012, + pci_ss_list_04cf_8818, #else NULL, #endif @@ -48282,10 +59347,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_0357_000a = { - 0x000a, pci_device_0357_000a, +static const pciDeviceInfo pci_dev_info_050d_7050 = { + 0x7050, pci_device_050d_7050, #ifdef INIT_SUBSYS_INFO - pci_ss_list_0357_000a, + pci_ss_list_050d_7050, #else NULL, #endif @@ -48322,6 +59387,35 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_0675_1703 = { + 0x1703, pci_device_0675_1703, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_0675_1703, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_0675_1704 = { + 0x1704, pci_device_0675_1704, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_0675_1704, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_067b_3507 = { + 0x3507, pci_device_067b_3507, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_067b_3507, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_09c1_0704 = { @@ -48390,6 +59484,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_0e11_005a = { + 0x005a, pci_device_0e11_005a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_0e11_005a, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_0e11_007c = { 0x007c, pci_device_0e11_007c, #ifdef INIT_SUBSYS_INFO @@ -48417,6 +59520,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_0e11_00b1 = { + 0x00b1, pci_device_0e11_00b1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_0e11_00b1, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_0e11_00bb = { 0x00bb, pci_device_0e11_00bb, #ifdef INIT_SUBSYS_INFO @@ -49372,6 +60484,87 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1000_0050 = { + 0x0050, pci_device_1000_0050, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_0050, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1000_0054 = { + 0x0054, pci_device_1000_0054, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_0054, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1000_0056 = { + 0x0056, pci_device_1000_0056, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_0056, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1000_0058 = { + 0x0058, pci_device_1000_0058, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_0058, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1000_005a = { + 0x005a, pci_device_1000_005a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_005a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1000_005c = { + 0x005c, pci_device_1000_005c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_005c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1000_005e = { + 0x005e, pci_device_1000_005e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_005e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1000_0060 = { + 0x0060, pci_device_1000_0060, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_0060, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1000_0062 = { + 0x0062, pci_device_1000_0062, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_0062, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1000_008f = { 0x008f, pci_device_1000_008f, #ifdef INIT_SUBSYS_INFO @@ -49489,6 +60682,33 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1000_0640 = { + 0x0640, pci_device_1000_0640, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_0640, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1000_0642 = { + 0x0642, pci_device_1000_0642, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_0642, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1000_0646 = { + 0x0646, pci_device_1000_0646, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1000_0646, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1000_0701 = { 0x0701, pci_device_1000_0701, #ifdef INIT_SUBSYS_INFO @@ -49663,6 +60883,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_3152 = { + 0x3152, pci_device_1002_3152, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_3152, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_3154 = { 0x3154, pci_device_1002_3154, #ifdef INIT_SUBSYS_INFO @@ -50023,6 +61252,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_4349 = { + 0x4349, pci_device_1002_4349, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4349, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_434d = { 0x434d, pci_device_1002_434d, #ifdef INIT_SUBSYS_INFO @@ -50059,6 +61297,123 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_4363 = { + 0x4363, pci_device_1002_4363, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4363, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_436e = { + 0x436e, pci_device_1002_436e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_436e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4370 = { + 0x4370, pci_device_1002_4370, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4370, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4371 = { + 0x4371, pci_device_1002_4371, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4371, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4372 = { + 0x4372, pci_device_1002_4372, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4372, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4373 = { + 0x4373, pci_device_1002_4373, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4373, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4374 = { + 0x4374, pci_device_1002_4374, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4374, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4375 = { + 0x4375, pci_device_1002_4375, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4375, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4376 = { + 0x4376, pci_device_1002_4376, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4376, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4377 = { + 0x4377, pci_device_1002_4377, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4377, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4378 = { + 0x4378, pci_device_1002_4378, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4378, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4379 = { + 0x4379, pci_device_1002_4379, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4379, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_437a = { + 0x437a, pci_device_1002_437a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_437a, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_4437 = { 0x4437, pci_device_1002_4437, #ifdef INIT_SUBSYS_INFO @@ -50383,6 +61738,60 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_4b49 = { + 0x4b49, pci_device_1002_4b49, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4b49, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4b4b = { + 0x4b4b, pci_device_1002_4b4b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4b4b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4b4c = { + 0x4b4c, pci_device_1002_4b4c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4b4c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4b69 = { + 0x4b69, pci_device_1002_4b69, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4b69, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4b6b = { + 0x4b6b, pci_device_1002_4b6b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4b6b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_4b6c = { + 0x4b6c, pci_device_1002_4b6c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4b6c, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_4c42 = { 0x4c42, pci_device_1002_4c42, #ifdef INIT_SUBSYS_INFO @@ -50788,6 +62197,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_4e71 = { + 0x4e71, pci_device_1002_4e71, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_4e71, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_5041 = { 0x5041, pci_device_1002_5041, #ifdef INIT_SUBSYS_INFO @@ -51166,6 +62584,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_515e = { + 0x515e, pci_device_1002_515e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_515e, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_5168 = { 0x5168, pci_device_1002_5168, #ifdef INIT_SUBSYS_INFO @@ -51400,6 +62827,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_5462 = { + 0x5462, pci_device_1002_5462, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5462, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_5464 = { 0x5464, pci_device_1002_5464, #ifdef INIT_SUBSYS_INFO @@ -51445,6 +62881,33 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_554d = { + 0x554d, pci_device_1002_554d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_554d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_554f = { + 0x554f, pci_device_1002_554f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_554f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5550 = { + 0x5550, pci_device_1002_5550, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5550, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_5551 = { 0x5551, pci_device_1002_5551, #ifdef INIT_SUBSYS_INFO @@ -51481,6 +62944,60 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_556d = { + 0x556d, pci_device_1002_556d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_556d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_556f = { + 0x556f, pci_device_1002_556f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_556f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_564a = { + 0x564a, pci_device_1002_564a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_564a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_564b = { + 0x564b, pci_device_1002_564b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_564b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5652 = { + 0x5652, pci_device_1002_5652, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5652, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5653 = { + 0x5653, pci_device_1002_5653, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5653, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_5654 = { 0x5654, pci_device_1002_5654, #ifdef INIT_SUBSYS_INFO @@ -51571,6 +63088,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_5940 = { + 0x5940, pci_device_1002_5940, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5940, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_5941 = { 0x5941, pci_device_1002_5941, #ifdef INIT_SUBSYS_INFO @@ -51589,6 +63115,42 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1002_5950 = { + 0x5950, pci_device_1002_5950, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5950, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5951 = { + 0x5951, pci_device_1002_5951, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5951, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5954 = { + 0x5954, pci_device_1002_5954, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5954, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5955 = { + 0x5955, pci_device_1002_5955, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5955, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1002_5960 = { 0x5960, pci_device_1002_5960, #ifdef INIT_SUBSYS_INFO @@ -51625,354 +63187,804 @@ #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_5b60 = { - 0x5b60, pci_device_1002_5b60, +static const pciDeviceInfo pci_dev_info_1002_5969 = { + 0x5969, pci_device_1002_5969, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_5b60, + pci_ss_list_1002_5969, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_5b62 = { - 0x5b62, pci_device_1002_5b62, +static const pciDeviceInfo pci_dev_info_1002_5974 = { + 0x5974, pci_device_1002_5974, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_5b62, + pci_ss_list_1002_5974, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_5b64 = { - 0x5b64, pci_device_1002_5b64, +static const pciDeviceInfo pci_dev_info_1002_5975 = { + 0x5975, pci_device_1002_5975, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_5b64, + pci_ss_list_1002_5975, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_5b65 = { - 0x5b65, pci_device_1002_5b65, +static const pciDeviceInfo pci_dev_info_1002_5a34 = { + 0x5a34, pci_device_1002_5a34, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_5b65, + pci_ss_list_1002_5a34, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_5c61 = { - 0x5c61, pci_device_1002_5c61, +static const pciDeviceInfo pci_dev_info_1002_5a38 = { + 0x5a38, pci_device_1002_5a38, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_5c61, + pci_ss_list_1002_5a38, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_5c63 = { - 0x5c63, pci_device_1002_5c63, +static const pciDeviceInfo pci_dev_info_1002_5a3f = { + 0x5a3f, pci_device_1002_5a3f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_5c63, + pci_ss_list_1002_5a3f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_5d44 = { - 0x5d44, pci_device_1002_5d44, +static const pciDeviceInfo pci_dev_info_1002_5a41 = { + 0x5a41, pci_device_1002_5a41, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_5d44, + pci_ss_list_1002_5a41, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_5d57 = { - 0x5d57, pci_device_1002_5d57, +static const pciDeviceInfo pci_dev_info_1002_5a42 = { + 0x5a42, pci_device_1002_5a42, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_5d57, + pci_ss_list_1002_5a42, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_700f = { - 0x700f, pci_device_1002_700f, +static const pciDeviceInfo pci_dev_info_1002_5a61 = { + 0x5a61, pci_device_1002_5a61, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_700f, + pci_ss_list_1002_5a61, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_7010 = { - 0x7010, pci_device_1002_7010, +static const pciDeviceInfo pci_dev_info_1002_5a62 = { + 0x5a62, pci_device_1002_5a62, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_7010, + pci_ss_list_1002_5a62, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_7834 = { - 0x7834, pci_device_1002_7834, +static const pciDeviceInfo pci_dev_info_1002_5b60 = { + 0x5b60, pci_device_1002_5b60, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_7834, + pci_ss_list_1002_5b60, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_7835 = { - 0x7835, pci_device_1002_7835, +static const pciDeviceInfo pci_dev_info_1002_5b62 = { + 0x5b62, pci_device_1002_5b62, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_7835, + pci_ss_list_1002_5b62, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_7c37 = { - 0x7c37, pci_device_1002_7c37, +static const pciDeviceInfo pci_dev_info_1002_5b63 = { + 0x5b63, pci_device_1002_5b63, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_7c37, + pci_ss_list_1002_5b63, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_cab0 = { - 0xcab0, pci_device_1002_cab0, +static const pciDeviceInfo pci_dev_info_1002_5b64 = { + 0x5b64, pci_device_1002_5b64, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_cab0, + pci_ss_list_1002_5b64, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_cab2 = { - 0xcab2, pci_device_1002_cab2, +static const pciDeviceInfo pci_dev_info_1002_5b65 = { + 0x5b65, pci_device_1002_5b65, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_cab2, + pci_ss_list_1002_5b65, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1002_cbb2 = { - 0xcbb2, pci_device_1002_cbb2, +static const pciDeviceInfo pci_dev_info_1002_5b70 = { + 0x5b70, pci_device_1002_5b70, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1002_cbb2, + pci_ss_list_1002_5b70, #else NULL, #endif 0 }; -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1003_0201 = { - 0x0201, pci_device_1003_0201, +static const pciDeviceInfo pci_dev_info_1002_5b72 = { + 0x5b72, pci_device_1002_5b72, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1003_0201, + pci_ss_list_1002_5b72, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1004_0005 = { - 0x0005, pci_device_1004_0005, +static const pciDeviceInfo pci_dev_info_1002_5b73 = { + 0x5b73, pci_device_1002_5b73, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0005, + pci_ss_list_1002_5b73, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0006 = { - 0x0006, pci_device_1004_0006, +static const pciDeviceInfo pci_dev_info_1002_5b74 = { + 0x5b74, pci_device_1002_5b74, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0006, + pci_ss_list_1002_5b74, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0007 = { - 0x0007, pci_device_1004_0007, +static const pciDeviceInfo pci_dev_info_1002_5c61 = { + 0x5c61, pci_device_1002_5c61, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0007, + pci_ss_list_1002_5c61, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0008 = { - 0x0008, pci_device_1004_0008, +static const pciDeviceInfo pci_dev_info_1002_5c63 = { + 0x5c63, pci_device_1002_5c63, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0008, + pci_ss_list_1002_5c63, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0009 = { - 0x0009, pci_device_1004_0009, +static const pciDeviceInfo pci_dev_info_1002_5d44 = { + 0x5d44, pci_device_1002_5d44, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0009, + pci_ss_list_1002_5d44, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_000c = { - 0x000c, pci_device_1004_000c, +static const pciDeviceInfo pci_dev_info_1002_5d48 = { + 0x5d48, pci_device_1002_5d48, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_000c, + pci_ss_list_1002_5d48, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_000d = { - 0x000d, pci_device_1004_000d, +static const pciDeviceInfo pci_dev_info_1002_5d49 = { + 0x5d49, pci_device_1002_5d49, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_000d, + pci_ss_list_1002_5d49, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0101 = { - 0x0101, pci_device_1004_0101, +static const pciDeviceInfo pci_dev_info_1002_5d4a = { + 0x5d4a, pci_device_1002_5d4a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0101, + pci_ss_list_1002_5d4a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0102 = { - 0x0102, pci_device_1004_0102, +static const pciDeviceInfo pci_dev_info_1002_5d4d = { + 0x5d4d, pci_device_1002_5d4d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0102, + pci_ss_list_1002_5d4d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0103 = { - 0x0103, pci_device_1004_0103, +static const pciDeviceInfo pci_dev_info_1002_5d4f = { + 0x5d4f, pci_device_1002_5d4f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0103, + pci_ss_list_1002_5d4f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0104 = { - 0x0104, pci_device_1004_0104, +static const pciDeviceInfo pci_dev_info_1002_5d52 = { + 0x5d52, pci_device_1002_5d52, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0104, + pci_ss_list_1002_5d52, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0105 = { - 0x0105, pci_device_1004_0105, +static const pciDeviceInfo pci_dev_info_1002_5d57 = { + 0x5d57, pci_device_1002_5d57, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0105, + pci_ss_list_1002_5d57, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0200 = { - 0x0200, pci_device_1004_0200, +static const pciDeviceInfo pci_dev_info_1002_5d6d = { + 0x5d6d, pci_device_1002_5d6d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0200, + pci_ss_list_1002_5d6d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0280 = { - 0x0280, pci_device_1004_0280, +static const pciDeviceInfo pci_dev_info_1002_5d6f = { + 0x5d6f, pci_device_1002_5d6f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0280, + pci_ss_list_1002_5d6f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0304 = { - 0x0304, pci_device_1004_0304, +static const pciDeviceInfo pci_dev_info_1002_5d72 = { + 0x5d72, pci_device_1002_5d72, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0304, + pci_ss_list_1002_5d72, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0305 = { - 0x0305, pci_device_1004_0305, +static const pciDeviceInfo pci_dev_info_1002_5d77 = { + 0x5d77, pci_device_1002_5d77, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0305, + pci_ss_list_1002_5d77, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0306 = { - 0x0306, pci_device_1004_0306, +static const pciDeviceInfo pci_dev_info_1002_5e48 = { + 0x5e48, pci_device_1002_5e48, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0306, + pci_ss_list_1002_5e48, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0307 = { - 0x0307, pci_device_1004_0307, +static const pciDeviceInfo pci_dev_info_1002_5e49 = { + 0x5e49, pci_device_1002_5e49, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0307, + pci_ss_list_1002_5e49, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0308 = { - 0x0308, pci_device_1004_0308, +static const pciDeviceInfo pci_dev_info_1002_5e4a = { + 0x5e4a, pci_device_1002_5e4a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0308, + pci_ss_list_1002_5e4a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0702 = { - 0x0702, pci_device_1004_0702, +static const pciDeviceInfo pci_dev_info_1002_5e4b = { + 0x5e4b, pci_device_1002_5e4b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0702, + pci_ss_list_1002_5e4b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1004_0703 = { - 0x0703, pci_device_1004_0703, +static const pciDeviceInfo pci_dev_info_1002_5e4c = { + 0x5e4c, pci_device_1002_5e4c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1004_0703, + pci_ss_list_1002_5e4c, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_1005_2064 = { - 0x2064, pci_device_1005_2064, +static const pciDeviceInfo pci_dev_info_1002_5e4d = { + 0x5e4d, pci_device_1002_5e4d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5e4d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5e4f = { + 0x5e4f, pci_device_1002_5e4f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5e4f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5e6b = { + 0x5e6b, pci_device_1002_5e6b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5e6b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_5e6d = { + 0x5e6d, pci_device_1002_5e6d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_5e6d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_700f = { + 0x700f, pci_device_1002_700f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_700f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7010 = { + 0x7010, pci_device_1002_7010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7100 = { + 0x7100, pci_device_1002_7100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7100, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7105 = { + 0x7105, pci_device_1002_7105, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7105, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7109 = { + 0x7109, pci_device_1002_7109, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7109, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7120 = { + 0x7120, pci_device_1002_7120, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7120, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7129 = { + 0x7129, pci_device_1002_7129, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7129, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7142 = { + 0x7142, pci_device_1002_7142, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7142, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7146 = { + 0x7146, pci_device_1002_7146, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7146, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7162 = { + 0x7162, pci_device_1002_7162, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7162, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7166 = { + 0x7166, pci_device_1002_7166, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7166, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_71c0 = { + 0x71c0, pci_device_1002_71c0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_71c0, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_71c2 = { + 0x71c2, pci_device_1002_71c2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_71c2, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_71e0 = { + 0x71e0, pci_device_1002_71e0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_71e0, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_71e2 = { + 0x71e2, pci_device_1002_71e2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_71e2, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7833 = { + 0x7833, pci_device_1002_7833, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7833, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7834 = { + 0x7834, pci_device_1002_7834, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7834, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7835 = { + 0x7835, pci_device_1002_7835, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7835, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7838 = { + 0x7838, pci_device_1002_7838, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7838, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_7c37 = { + 0x7c37, pci_device_1002_7c37, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_7c37, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_cab0 = { + 0xcab0, pci_device_1002_cab0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_cab0, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_cab2 = { + 0xcab2, pci_device_1002_cab2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_cab2, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_cab3 = { + 0xcab3, pci_device_1002_cab3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_cab3, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1002_cbb2 = { + 0xcbb2, pci_device_1002_cbb2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1002_cbb2, +#else + NULL, +#endif + 0 +}; +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1003_0201 = { + 0x0201, pci_device_1003_0201, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1003_0201, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1004_0005 = { + 0x0005, pci_device_1004_0005, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0005, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0006 = { + 0x0006, pci_device_1004_0006, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0006, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0007 = { + 0x0007, pci_device_1004_0007, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0007, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0008 = { + 0x0008, pci_device_1004_0008, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0008, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0009 = { + 0x0009, pci_device_1004_0009, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0009, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_000c = { + 0x000c, pci_device_1004_000c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_000c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_000d = { + 0x000d, pci_device_1004_000d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_000d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0101 = { + 0x0101, pci_device_1004_0101, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0101, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0102 = { + 0x0102, pci_device_1004_0102, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0102, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0103 = { + 0x0103, pci_device_1004_0103, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0103, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0104 = { + 0x0104, pci_device_1004_0104, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0104, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0105 = { + 0x0105, pci_device_1004_0105, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0105, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0200 = { + 0x0200, pci_device_1004_0200, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0200, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0280 = { + 0x0280, pci_device_1004_0280, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0280, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0304 = { + 0x0304, pci_device_1004_0304, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0304, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0305 = { + 0x0305, pci_device_1004_0305, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0305, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0306 = { + 0x0306, pci_device_1004_0306, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0306, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0307 = { + 0x0307, pci_device_1004_0307, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0307, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0308 = { + 0x0308, pci_device_1004_0308, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0308, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0702 = { + 0x0702, pci_device_1004_0702, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0702, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1004_0703 = { + 0x0703, pci_device_1004_0703, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1004_0703, +#else + NULL, +#endif + 0 +}; +#endif +static const pciDeviceInfo pci_dev_info_1005_2064 = { + 0x2064, pci_device_1005_2064, #ifdef INIT_SUBSYS_INFO pci_ss_list_1005_2064, #else @@ -52097,6 +64109,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_100b_0021 = { + 0x0021, pci_device_100b_0021, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_100b_0021, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_100b_0022 = { 0x0022, pci_device_100b_0022, #ifdef INIT_SUBSYS_INFO @@ -52115,6 +64136,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_100b_002a = { + 0x002a, pci_device_100b_002a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_100b_002a, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_100b_002b = { 0x002b, pci_device_100b_002b, #ifdef INIT_SUBSYS_INFO @@ -52781,6 +64811,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1013_4000 = { + 0x4000, pci_device_1013_4000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1013_4000, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1013_4400 = { 0x4400, pci_device_1013_4400, #ifdef INIT_SUBSYS_INFO @@ -53484,6 +65523,33 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1014_028c = { + 0x028c, pci_device_1014_028c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1014_028c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1014_02a1 = { + 0x02a1, pci_device_1014_02a1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1014_02a1, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1014_02bd = { + 0x02bd, pci_device_1014_02bd, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1014_02bd, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1014_0302 = { 0x0302, pci_device_1014_0302, #ifdef INIT_SUBSYS_INFO @@ -53502,6 +65568,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1014_3022 = { + 0x3022, pci_device_1014_3022, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1014_3022, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1014_4022 = { + 0x4022, pci_device_1014_4022, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1014_4022, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1014_ffff = { 0xffff, pci_device_1014_ffff, #ifdef INIT_SUBSYS_INFO @@ -53636,6 +65720,15 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_101e_0009 = { + 0x0009, pci_device_101e_0009, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_101e_0009, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_101e_1960 = { 0x1960, pci_device_101e_1960, #ifdef INIT_SUBSYS_INFO @@ -53799,145 +65892,244 @@ #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_3000 = { - 0x3000, pci_device_1022_3000, +static const pciDeviceInfo pci_dev_info_1022_2081 = { + 0x2081, pci_device_1022_2081, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_3000, + pci_ss_list_1022_2081, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_7006 = { - 0x7006, pci_device_1022_7006, +static const pciDeviceInfo pci_dev_info_1022_2082 = { + 0x2082, pci_device_1022_2082, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_7006, + pci_ss_list_1022_2082, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_7007 = { - 0x7007, pci_device_1022_7007, +static const pciDeviceInfo pci_dev_info_1022_208f = { + 0x208f, pci_device_1022_208f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_7007, + pci_ss_list_1022_208f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_700a = { - 0x700a, pci_device_1022_700a, +static const pciDeviceInfo pci_dev_info_1022_2090 = { + 0x2090, pci_device_1022_2090, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_700a, + pci_ss_list_1022_2090, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_700b = { - 0x700b, pci_device_1022_700b, +static const pciDeviceInfo pci_dev_info_1022_2091 = { + 0x2091, pci_device_1022_2091, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_700b, + pci_ss_list_1022_2091, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_700c = { - 0x700c, pci_device_1022_700c, +static const pciDeviceInfo pci_dev_info_1022_2093 = { + 0x2093, pci_device_1022_2093, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_700c, + pci_ss_list_1022_2093, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_700d = { - 0x700d, pci_device_1022_700d, +static const pciDeviceInfo pci_dev_info_1022_2094 = { + 0x2094, pci_device_1022_2094, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_700d, + pci_ss_list_1022_2094, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_700e = { - 0x700e, pci_device_1022_700e, +static const pciDeviceInfo pci_dev_info_1022_2095 = { + 0x2095, pci_device_1022_2095, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_700e, + pci_ss_list_1022_2095, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_700f = { - 0x700f, pci_device_1022_700f, +static const pciDeviceInfo pci_dev_info_1022_2096 = { + 0x2096, pci_device_1022_2096, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_700f, + pci_ss_list_1022_2096, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_7400 = { - 0x7400, pci_device_1022_7400, +static const pciDeviceInfo pci_dev_info_1022_2097 = { + 0x2097, pci_device_1022_2097, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_7400, + pci_ss_list_1022_2097, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_7401 = { - 0x7401, pci_device_1022_7401, +static const pciDeviceInfo pci_dev_info_1022_209a = { + 0x209a, pci_device_1022_209a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_7401, + pci_ss_list_1022_209a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_7403 = { - 0x7403, pci_device_1022_7403, +static const pciDeviceInfo pci_dev_info_1022_3000 = { + 0x3000, pci_device_1022_3000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_7403, + pci_ss_list_1022_3000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_7404 = { - 0x7404, pci_device_1022_7404, +static const pciDeviceInfo pci_dev_info_1022_7006 = { + 0x7006, pci_device_1022_7006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_7404, + pci_ss_list_1022_7006, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_7408 = { - 0x7408, pci_device_1022_7408, +static const pciDeviceInfo pci_dev_info_1022_7007 = { + 0x7007, pci_device_1022_7007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_7408, + pci_ss_list_1022_7007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_7409 = { - 0x7409, pci_device_1022_7409, +static const pciDeviceInfo pci_dev_info_1022_700a = { + 0x700a, pci_device_1022_700a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_7409, + pci_ss_list_1022_700a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1022_740b = { - 0x740b, pci_device_1022_740b, +static const pciDeviceInfo pci_dev_info_1022_700b = { + 0x700b, pci_device_1022_700b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1022_740b, + pci_ss_list_1022_700b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_700c = { + 0x700c, pci_device_1022_700c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_700c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_700d = { + 0x700d, pci_device_1022_700d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_700d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_700e = { + 0x700e, pci_device_1022_700e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_700e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_700f = { + 0x700f, pci_device_1022_700f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_700f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_7400 = { + 0x7400, pci_device_1022_7400, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_7400, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_7401 = { + 0x7401, pci_device_1022_7401, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_7401, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_7403 = { + 0x7403, pci_device_1022_7403, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_7403, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_7404 = { + 0x7404, pci_device_1022_7404, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_7404, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_7408 = { + 0x7408, pci_device_1022_7408, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_7408, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_7409 = { + 0x7409, pci_device_1022_7409, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_7409, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_740b = { + 0x740b, pci_device_1022_740b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_740b, #else NULL, #endif @@ -54087,6 +66279,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1022_7458 = { + 0x7458, pci_device_1022_7458, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_7458, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1022_7459 = { + 0x7459, pci_device_1022_7459, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1022_7459, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1022_7460 = { 0x7460, pci_device_1022_7460, #ifdef INIT_SUBSYS_INFO @@ -54222,6 +66432,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1023_2200 = { + 0x2200, pci_device_1023_2200, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1023_2200, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1023_8400 = { 0x8400, pci_device_1023_8400, #ifdef INIT_SUBSYS_INFO @@ -55194,6 +67413,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1028_0015 = { + 0x0015, pci_device_1028_0015, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1028_0015, +#else + NULL, +#endif + 0 +}; #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_102a_0000 = { 0x0000, pci_device_102a_0000, @@ -55349,6 +67577,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_102b_0528 = { + 0x0528, pci_device_102b_0528, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_102b_0528, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_102b_0d10 = { 0x0d10, pci_device_102b_0d10, #ifdef INIT_SUBSYS_INFO @@ -55403,6 +67640,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_102b_2538 = { + 0x2538, pci_device_102b_2538, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_102b_2538, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_102b_4536 = { 0x4536, pci_device_102b_4536, #ifdef INIT_SUBSYS_INFO @@ -55902,6 +68148,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1033_0072 = { + 0x0072, pci_device_1033_0072, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1033_0072, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1033_0074 = { 0x0074, pci_device_1033_0074, #ifdef INIT_SUBSYS_INFO @@ -56039,6 +68294,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1039_0003 = { + 0x0003, pci_device_1039_0003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1039_0003, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1039_0004 = { + 0x0004, pci_device_1039_0004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1039_0004, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1039_0006 = { 0x0006, pci_device_1039_0006, #ifdef INIT_SUBSYS_INFO @@ -56066,6 +68339,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1039_000a = { + 0x000a, pci_device_1039_000a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1039_000a, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1039_0016 = { 0x0016, pci_device_1039_0016, #ifdef INIT_SUBSYS_INFO @@ -56102,6 +68384,33 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1039_0182 = { + 0x0182, pci_device_1039_0182, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1039_0182, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1039_0190 = { + 0x0190, pci_device_1039_0190, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1039_0190, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1039_0191 = { + 0x0191, pci_device_1039_0191, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1039_0191, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1039_0200 = { 0x0200, pci_device_1039_0200, #ifdef INIT_SUBSYS_INFO @@ -56426,6 +68735,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1039_0761 = { + 0x0761, pci_device_1039_0761, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1039_0761, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1039_0900 = { 0x0900, pci_device_1039_0900, #ifdef INIT_SUBSYS_INFO @@ -57029,6 +69347,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_103c_1291 = { + 0x1291, pci_device_103c_1291, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_103c_1291, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_103c_12b4 = { 0x12b4, pci_device_103c_12b4, #ifdef INIT_SUBSYS_INFO @@ -57038,6 +69365,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_103c_12fa = { + 0x12fa, pci_device_103c_12fa, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_103c_12fa, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_103c_2910 = { 0x2910, pci_device_103c_2910, #ifdef INIT_SUBSYS_INFO @@ -57056,6 +69392,33 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_103c_3080 = { + 0x3080, pci_device_103c_3080, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_103c_3080, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_103c_3220 = { + 0x3220, pci_device_103c_3220, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_103c_3220, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_103c_3230 = { + 0x3230, pci_device_103c_3230, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_103c_3230, +#else + NULL, +#endif + 0 +}; #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1042_1000 = { 0x1000, pci_device_1042_1000, @@ -57167,6 +69530,42 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1043_80c5 = { + 0x80c5, pci_device_1043_80c5, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1043_80c5, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1043_80df = { + 0x80df, pci_device_1043_80df, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1043_80df, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1043_8187 = { + 0x8187, pci_device_1043_8187, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1043_8187, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1043_8188 = { + 0x8188, pci_device_1043_8188, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1043_8188, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_1044_1012 = { @@ -57797,6 +70196,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_104c_802b = { + 0x802b, pci_device_104c_802b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_802b, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_104c_802e = { 0x802e, pci_device_104c_802e, #ifdef INIT_SUBSYS_INFO @@ -57806,6 +70214,69 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_104c_8031 = { + 0x8031, pci_device_104c_8031, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_8031, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_104c_8032 = { + 0x8032, pci_device_104c_8032, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_8032, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_104c_8033 = { + 0x8033, pci_device_104c_8033, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_8033, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_104c_8034 = { + 0x8034, pci_device_104c_8034, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_8034, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_104c_8035 = { + 0x8035, pci_device_104c_8035, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_8035, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_104c_8036 = { + 0x8036, pci_device_104c_8036, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_8036, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_104c_8038 = { + 0x8038, pci_device_104c_8038, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_8038, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_104c_8201 = { 0x8201, pci_device_104c_8201, #ifdef INIT_SUBSYS_INFO @@ -57815,6 +70286,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_104c_8204 = { + 0x8204, pci_device_104c_8204, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_8204, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_104c_8400 = { 0x8400, pci_device_104c_8400, #ifdef INIT_SUBSYS_INFO @@ -57842,6 +70322,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_104c_9065 = { + 0x9065, pci_device_104c_9065, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_9065, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_104c_9066 = { 0x9066, pci_device_104c_9066, #ifdef INIT_SUBSYS_INFO @@ -58121,6 +70610,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_104c_ac47 = { + 0xac47, pci_device_104c_ac47, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_ac47, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_104c_ac4a = { + 0xac4a, pci_device_104c_ac4a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104c_ac4a, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_104c_ac50 = { 0xac50, pci_device_104c_ac50, #ifdef INIT_SUBSYS_INFO @@ -58238,6 +70745,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_104d_8004 = { + 0x8004, pci_device_104d_8004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_104d_8004, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_104d_8009 = { 0x8009, pci_device_104d_8009, #ifdef INIT_SUBSYS_INFO @@ -58566,6 +71082,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1057_3410 = { + 0x3410, pci_device_1057_3410, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1057_3410, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1057_4801 = { 0x4801, pci_device_1057_4801, #ifdef INIT_SUBSYS_INFO @@ -58620,6 +71145,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1057_5608 = { + 0x5608, pci_device_1057_5608, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1057_5608, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1057_5803 = { 0x5803, pci_device_1057_5803, #ifdef INIT_SUBSYS_INFO @@ -58629,6 +71163,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1057_5806 = { + 0x5806, pci_device_1057_5806, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1057_5806, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1057_5808 = { + 0x5808, pci_device_1057_5808, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1057_5808, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1057_6400 = { 0x6400, pci_device_1057_6400, #ifdef INIT_SUBSYS_INFO @@ -58729,6 +71281,42 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_105a_3515 = { + 0x3515, pci_device_105a_3515, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_105a_3515, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_105a_3519 = { + 0x3519, pci_device_105a_3519, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_105a_3519, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_105a_3570 = { + 0x3570, pci_device_105a_3570, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_105a_3570, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_105a_3571 = { + 0x3571, pci_device_105a_3571, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_105a_3571, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_105a_3574 = { 0x3574, pci_device_105a_3574, #ifdef INIT_SUBSYS_INFO @@ -58738,6 +71326,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_105a_3577 = { + 0x3577, pci_device_105a_3577, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_105a_3577, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_105a_3d17 = { + 0x3d17, pci_device_105a_3d17, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_105a_3d17, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_105a_3d18 = { 0x3d18, pci_device_105a_3d18, #ifdef INIT_SUBSYS_INFO @@ -58747,6 +71353,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_105a_3d73 = { + 0x3d73, pci_device_105a_3d73, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_105a_3d73, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_105a_3d75 = { + 0x3d75, pci_device_105a_3d75, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_105a_3d75, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_105a_4d30 = { 0x4d30, pci_device_105a_4d30, #ifdef INIT_SUBSYS_INFO @@ -58846,6 +71470,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_105a_6624 = { + 0x6624, pci_device_105a_6624, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_105a_6624, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_105a_6626 = { 0x6626, pci_device_105a_6626, #ifdef INIT_SUBSYS_INFO @@ -58873,6 +71506,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_105a_8002 = { + 0x8002, pci_device_105a_8002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_105a_8002, +#else + NULL, +#endif + 0 +}; #endif static const pciDeviceInfo pci_dev_info_105d_2309 = { 0x2309, pci_device_105d_2309, @@ -59306,6 +71948,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1069_ba57 = { + 0xba57, pci_device_1069_ba57, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1069_ba57, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_106b_0001 = { @@ -59353,6 +72004,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_106b_000c = { + 0x000c, pci_device_106b_000c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_106b_000c, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_106b_000e = { 0x000e, pci_device_106b_000e, #ifdef INIT_SUBSYS_INFO @@ -59785,6 +72445,69 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_106b_0059 = { + 0x0059, pci_device_106b_0059, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_106b_0059, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_106b_0066 = { + 0x0066, pci_device_106b_0066, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_106b_0066, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_106b_0067 = { + 0x0067, pci_device_106b_0067, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_106b_0067, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_106b_0068 = { + 0x0068, pci_device_106b_0068, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_106b_0068, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_106b_0069 = { + 0x0069, pci_device_106b_0069, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_106b_0069, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_106b_006a = { + 0x006a, pci_device_106b_006a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_106b_006a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_106b_006b = { + 0x006b, pci_device_106b_006b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_106b_006b, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_106b_1645 = { 0x1645, pci_device_106b_1645, #ifdef INIT_SUBSYS_INFO @@ -60101,6 +72824,87 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1077_2322 = { + 0x2322, pci_device_1077_2322, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1077_2322, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1077_2422 = { + 0x2422, pci_device_1077_2422, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1077_2422, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1077_2432 = { + 0x2432, pci_device_1077_2432, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1077_2432, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1077_3010 = { + 0x3010, pci_device_1077_3010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1077_3010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1077_3022 = { + 0x3022, pci_device_1077_3022, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1077_3022, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1077_4010 = { + 0x4010, pci_device_1077_4010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1077_4010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1077_4022 = { + 0x4022, pci_device_1077_4022, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1077_4022, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1077_6312 = { + 0x6312, pci_device_1077_6312, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1077_6312, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1077_6322 = { + 0x6322, pci_device_1077_6322, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1077_6322, +#else + NULL, +#endif + 0 +}; #endif static const pciDeviceInfo pci_dev_info_1078_0000 = { 0x0000, pci_device_1078_0000, @@ -60676,16 +73480,25 @@ #endif 0 }; -static const pciDeviceInfo pci_dev_info_108e_2bad = { - 0x2bad, pci_device_108e_2bad, +static const pciDeviceInfo pci_dev_info_108e_1648 = { + 0x1648, pci_device_108e_1648, #ifdef INIT_SUBSYS_INFO - pci_ss_list_108e_2bad, + pci_ss_list_108e_1648, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_108e_5000 = { +static const pciDeviceInfo pci_dev_info_108e_2bad = { + 0x2bad, pci_device_108e_2bad, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_108e_2bad, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_108e_5000 = { 0x5000, pci_device_108e_5000, #ifdef INIT_SUBSYS_INFO pci_ss_list_108e_5000, @@ -61075,6 +73888,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1093_1310 = { + 0x1310, pci_device_1093_1310, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1093_1310, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1093_1330 = { 0x1330, pci_device_1093_1330, #ifdef INIT_SUBSYS_INFO @@ -61210,6 +74032,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1093_70a9 = { + 0x70a9, pci_device_1093_70a9, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1093_70a9, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1093_70b8 = { + 0x70b8, pci_device_1093_70b8, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1093_70b8, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1093_b001 = { 0xb001, pci_device_1093_b001, #ifdef INIT_SUBSYS_INFO @@ -61446,6 +74286,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_1095_3132 = { + 0x3132, pci_device_1095_3132, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1095_3132, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_1095_3512 = { 0x3512, pci_device_1095_3512, #ifdef INIT_SUBSYS_INFO @@ -61476,6 +74325,15 @@ 0 }; #endif +static const pciDeviceInfo pci_dev_info_109e_032e = { + 0x032e, pci_device_109e_032e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_109e_032e, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_109e_0350 = { 0x0350, pci_device_109e_0350, #ifdef INIT_SUBSYS_INFO @@ -61868,6 +74726,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10a9_4001 = { + 0x4001, pci_device_10a9_4001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10a9_4001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10a9_4002 = { + 0x4002, pci_device_10a9_4002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10a9_4002, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10a9_8001 = { 0x8001, pci_device_10a9_8001, #ifdef INIT_SUBSYS_INFO @@ -61886,6 +74762,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10a9_8010 = { + 0x8010, pci_device_10a9_8010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10a9_8010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10a9_8018 = { + 0x8018, pci_device_10a9_8018, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10a9_8018, +#else + NULL, +#endif + 0 +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_10aa_0000 = { @@ -61995,6 +74889,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b5_1042 = { + 0x1042, pci_device_10b5_1042, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_1042, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b5_1076 = { 0x1076, pci_device_10b5_1076, #ifdef INIT_SUBSYS_INFO @@ -62049,6 +74952,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b5_2540 = { + 0x2540, pci_device_10b5_2540, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_2540, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b5_2724 = { 0x2724, pci_device_10b5_2724, #ifdef INIT_SUBSYS_INFO @@ -62058,6 +74970,69 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b5_6540 = { + 0x6540, pci_device_10b5_6540, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_6540, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_6541 = { + 0x6541, pci_device_10b5_6541, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_6541, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_6542 = { + 0x6542, pci_device_10b5_6542, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_6542, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8111 = { + 0x8111, pci_device_10b5_8111, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8111, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8114 = { + 0x8114, pci_device_10b5_8114, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8114, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8516 = { + 0x8516, pci_device_10b5_8516, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8516, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b5_8532 = { + 0x8532, pci_device_10b5_8532, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b5_8532, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b5_9030 = { 0x9030, pci_device_10b5_9030, #ifdef INIT_SUBSYS_INFO @@ -63101,6 +76076,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b9_1573 = { + 0x1573, pci_device_10b9_1573, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b9_1573, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b9_1621 = { 0x1621, pci_device_10b9_1621, #ifdef INIT_SUBSYS_INFO @@ -63218,6 +76202,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b9_1695 = { + 0x1695, pci_device_10b9_1695, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b9_1695, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b9_1697 = { + 0x1697, pci_device_10b9_1697, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b9_1697, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b9_3141 = { 0x3141, pci_device_10b9_3141, #ifdef INIT_SUBSYS_INFO @@ -63344,6 +76346,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b9_5228 = { + 0x5228, pci_device_10b9_5228, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b9_5228, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b9_5229 = { 0x5229, pci_device_10b9_5229, #ifdef INIT_SUBSYS_INFO @@ -63416,6 +76427,42 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b9_524b = { + 0x524b, pci_device_10b9_524b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b9_524b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b9_524c = { + 0x524c, pci_device_10b9_524c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b9_524c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b9_524d = { + 0x524d, pci_device_10b9_524d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b9_524d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b9_524e = { + 0x524e, pci_device_10b9_524e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b9_524e, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b9_5251 = { 0x5251, pci_device_10b9_5251, #ifdef INIT_SUBSYS_INFO @@ -63461,6 +76508,33 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b9_5287 = { + 0x5287, pci_device_10b9_5287, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b9_5287, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b9_5288 = { + 0x5288, pci_device_10b9_5288, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b9_5288, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10b9_5289 = { + 0x5289, pci_device_10b9_5289, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b9_5289, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b9_5450 = { 0x5450, pci_device_10b9_5450, #ifdef INIT_SUBSYS_INFO @@ -63524,6 +76598,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10b9_5461 = { + 0x5461, pci_device_10b9_5461, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10b9_5461, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10b9_5471 = { 0x5471, pci_device_10b9_5471, #ifdef INIT_SUBSYS_INFO @@ -63799,6 +76882,15 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10d9_0431 = { + 0x0431, pci_device_10d9_0431, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10d9_0431, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10d9_0512 = { 0x0512, pci_device_10d9_0512, #ifdef INIT_SUBSYS_INFO @@ -63826,6 +76918,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10d9_8626 = { + 0x8626, pci_device_10d9_8626, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10d9_8626, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10d9_8888 = { 0x8888, pci_device_10d9_8888, #ifdef INIT_SUBSYS_INFO @@ -63903,6 +77004,17 @@ 0 }; #endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10dd_0100 = { + 0x0100, pci_device_10dd_0100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10dd_0100, +#else + NULL, +#endif + 0 +}; +#endif static const pciDeviceInfo pci_dev_info_10de_0008 = { 0x0008, pci_device_10de_0008, #ifdef INIT_SUBSYS_INFO @@ -64146,6 +77258,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_0047 = { + 0x0047, pci_device_10de_0047, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0047, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_0049 = { 0x0049, pci_device_10de_0049, #ifdef INIT_SUBSYS_INFO @@ -64164,6 +77285,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_0050 = { + 0x0050, pci_device_10de_0050, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0050, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0051 = { + 0x0051, pci_device_10de_0051, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0051, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_0052 = { 0x0052, pci_device_10de_0052, #ifdef INIT_SUBSYS_INFO @@ -64218,6 +77357,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_0058 = { + 0x0058, pci_device_10de_0058, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0058, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_0059 = { 0x0059, pci_device_10de_0059, #ifdef INIT_SUBSYS_INFO @@ -64272,6 +77420,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_005f = { + 0x005f, pci_device_10de_005f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_005f, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_0060 = { 0x0060, pci_device_10de_0060, #ifdef INIT_SUBSYS_INFO @@ -64371,6 +77528,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_0080 = { + 0x0080, pci_device_10de_0080, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0080, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_0084 = { 0x0084, pci_device_10de_0084, #ifdef INIT_SUBSYS_INFO @@ -64452,6 +77618,33 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_0091 = { + 0x0091, pci_device_10de_0091, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0091, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0092 = { + 0x0092, pci_device_10de_0092, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0092, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0099 = { + 0x0099, pci_device_10de_0099, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0099, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_00a0 = { 0x00a0, pci_device_10de_00a0, #ifdef INIT_SUBSYS_INFO @@ -64497,6 +77690,33 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_00c9 = { + 0x00c9, pci_device_10de_00c9, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_00c9, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_00cc = { + 0x00cc, pci_device_10de_00cc, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_00cc, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_00cd = { + 0x00cd, pci_device_10de_00cd, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_00cd, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_00ce = { 0x00ce, pci_device_10de_00ce, #ifdef INIT_SUBSYS_INFO @@ -64587,6 +77807,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_00d9 = { + 0x00d9, pci_device_10de_00d9, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_00d9, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_00da = { 0x00da, pci_device_10de_00da, #ifdef INIT_SUBSYS_INFO @@ -64614,6 +77843,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_00e0 = { + 0x00e0, pci_device_10de_00e0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_00e0, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_00e1 = { 0x00e1, pci_device_10de_00e1, #ifdef INIT_SUBSYS_INFO @@ -64740,6 +77978,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_00f3 = { + 0x00f3, pci_device_10de_00f3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_00f3, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_00f8 = { 0x00f8, pci_device_10de_00f8, #ifdef INIT_SUBSYS_INFO @@ -64875,6 +78122,87 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_0140 = { + 0x0140, pci_device_10de_0140, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0140, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0141 = { + 0x0141, pci_device_10de_0141, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0141, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0142 = { + 0x0142, pci_device_10de_0142, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0142, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0144 = { + 0x0144, pci_device_10de_0144, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0144, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0145 = { + 0x0145, pci_device_10de_0145, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0145, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0146 = { + 0x0146, pci_device_10de_0146, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0146, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0148 = { + 0x0148, pci_device_10de_0148, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0148, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_014e = { + 0x014e, pci_device_10de_014e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_014e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_014f = { + 0x014f, pci_device_10de_014f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_014f, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_0150 = { 0x0150, pci_device_10de_0150, #ifdef INIT_SUBSYS_INFO @@ -64911,6 +78239,42 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_10de_0161 = { + 0x0161, pci_device_10de_0161, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0161, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0164 = { + 0x0164, pci_device_10de_0164, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0164, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0165 = { + 0x0165, pci_device_10de_0165, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0165, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_10de_0167 = { + 0x0167, pci_device_10de_0167, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10de_0167, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_10de_0170 = { 0x0170, pci_device_10de_0170, #ifdef INIT_SUBSYS_INFO @@ -65379,4797 +78743,4752 @@ #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0250 = { - 0x0250, pci_device_10de_0250, +static const pciDeviceInfo pci_dev_info_10de_0221 = { + 0x0221, pci_device_10de_0221, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0250, + pci_ss_list_10de_0221, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0251 = { - 0x0251, pci_device_10de_0251, +static const pciDeviceInfo pci_dev_info_10de_0240 = { + 0x0240, pci_device_10de_0240, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0251, + pci_ss_list_10de_0240, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0252 = { - 0x0252, pci_device_10de_0252, +static const pciDeviceInfo pci_dev_info_10de_0241 = { + 0x0241, pci_device_10de_0241, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0252, + pci_ss_list_10de_0241, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0253 = { - 0x0253, pci_device_10de_0253, +static const pciDeviceInfo pci_dev_info_10de_0242 = { + 0x0242, pci_device_10de_0242, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0253, + pci_ss_list_10de_0242, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0258 = { - 0x0258, pci_device_10de_0258, +static const pciDeviceInfo pci_dev_info_10de_0243 = { + 0x0243, pci_device_10de_0243, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0258, + pci_ss_list_10de_0243, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0259 = { - 0x0259, pci_device_10de_0259, +static const pciDeviceInfo pci_dev_info_10de_0244 = { + 0x0244, pci_device_10de_0244, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0259, + pci_ss_list_10de_0244, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_025b = { - 0x025b, pci_device_10de_025b, +static const pciDeviceInfo pci_dev_info_10de_0245 = { + 0x0245, pci_device_10de_0245, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_025b, + pci_ss_list_10de_0245, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0280 = { - 0x0280, pci_device_10de_0280, +static const pciDeviceInfo pci_dev_info_10de_0246 = { + 0x0246, pci_device_10de_0246, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0280, + pci_ss_list_10de_0246, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0281 = { - 0x0281, pci_device_10de_0281, +static const pciDeviceInfo pci_dev_info_10de_0247 = { + 0x0247, pci_device_10de_0247, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0281, + pci_ss_list_10de_0247, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0282 = { - 0x0282, pci_device_10de_0282, +static const pciDeviceInfo pci_dev_info_10de_0248 = { + 0x0248, pci_device_10de_0248, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0282, + pci_ss_list_10de_0248, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0286 = { - 0x0286, pci_device_10de_0286, +static const pciDeviceInfo pci_dev_info_10de_0249 = { + 0x0249, pci_device_10de_0249, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0286, + pci_ss_list_10de_0249, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0288 = { - 0x0288, pci_device_10de_0288, +static const pciDeviceInfo pci_dev_info_10de_024a = { + 0x024a, pci_device_10de_024a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0288, + pci_ss_list_10de_024a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0289 = { - 0x0289, pci_device_10de_0289, +static const pciDeviceInfo pci_dev_info_10de_024b = { + 0x024b, pci_device_10de_024b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0289, + pci_ss_list_10de_024b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_028c = { - 0x028c, pci_device_10de_028c, +static const pciDeviceInfo pci_dev_info_10de_024c = { + 0x024c, pci_device_10de_024c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_028c, + pci_ss_list_10de_024c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0300 = { - 0x0300, pci_device_10de_0300, +static const pciDeviceInfo pci_dev_info_10de_024d = { + 0x024d, pci_device_10de_024d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0300, + pci_ss_list_10de_024d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0301 = { - 0x0301, pci_device_10de_0301, +static const pciDeviceInfo pci_dev_info_10de_024e = { + 0x024e, pci_device_10de_024e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0301, + pci_ss_list_10de_024e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0302 = { - 0x0302, pci_device_10de_0302, +static const pciDeviceInfo pci_dev_info_10de_024f = { + 0x024f, pci_device_10de_024f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0302, + pci_ss_list_10de_024f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0308 = { - 0x0308, pci_device_10de_0308, +static const pciDeviceInfo pci_dev_info_10de_0250 = { + 0x0250, pci_device_10de_0250, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0308, + pci_ss_list_10de_0250, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0309 = { - 0x0309, pci_device_10de_0309, +static const pciDeviceInfo pci_dev_info_10de_0251 = { + 0x0251, pci_device_10de_0251, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0309, + pci_ss_list_10de_0251, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0311 = { - 0x0311, pci_device_10de_0311, +static const pciDeviceInfo pci_dev_info_10de_0252 = { + 0x0252, pci_device_10de_0252, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0311, + pci_ss_list_10de_0252, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0312 = { - 0x0312, pci_device_10de_0312, +static const pciDeviceInfo pci_dev_info_10de_0253 = { + 0x0253, pci_device_10de_0253, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0312, + pci_ss_list_10de_0253, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0313 = { - 0x0313, pci_device_10de_0313, +static const pciDeviceInfo pci_dev_info_10de_0258 = { + 0x0258, pci_device_10de_0258, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0313, + pci_ss_list_10de_0258, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0314 = { - 0x0314, pci_device_10de_0314, +static const pciDeviceInfo pci_dev_info_10de_0259 = { + 0x0259, pci_device_10de_0259, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0314, + pci_ss_list_10de_0259, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0316 = { - 0x0316, pci_device_10de_0316, +static const pciDeviceInfo pci_dev_info_10de_025b = { + 0x025b, pci_device_10de_025b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0316, + pci_ss_list_10de_025b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0317 = { - 0x0317, pci_device_10de_0317, +static const pciDeviceInfo pci_dev_info_10de_0260 = { + 0x0260, pci_device_10de_0260, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0317, + pci_ss_list_10de_0260, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_031a = { - 0x031a, pci_device_10de_031a, +static const pciDeviceInfo pci_dev_info_10de_0261 = { + 0x0261, pci_device_10de_0261, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_031a, + pci_ss_list_10de_0261, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_031b = { - 0x031b, pci_device_10de_031b, +static const pciDeviceInfo pci_dev_info_10de_0262 = { + 0x0262, pci_device_10de_0262, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_031b, + pci_ss_list_10de_0262, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_031c = { - 0x031c, pci_device_10de_031c, +static const pciDeviceInfo pci_dev_info_10de_0263 = { + 0x0263, pci_device_10de_0263, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_031c, + pci_ss_list_10de_0263, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_031d = { - 0x031d, pci_device_10de_031d, +static const pciDeviceInfo pci_dev_info_10de_0264 = { + 0x0264, pci_device_10de_0264, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_031d, + pci_ss_list_10de_0264, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_031e = { - 0x031e, pci_device_10de_031e, +static const pciDeviceInfo pci_dev_info_10de_0265 = { + 0x0265, pci_device_10de_0265, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_031e, + pci_ss_list_10de_0265, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_031f = { - 0x031f, pci_device_10de_031f, +static const pciDeviceInfo pci_dev_info_10de_0266 = { + 0x0266, pci_device_10de_0266, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_031f, + pci_ss_list_10de_0266, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0320 = { - 0x0320, pci_device_10de_0320, +static const pciDeviceInfo pci_dev_info_10de_0267 = { + 0x0267, pci_device_10de_0267, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0320, + pci_ss_list_10de_0267, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0321 = { - 0x0321, pci_device_10de_0321, +static const pciDeviceInfo pci_dev_info_10de_0268 = { + 0x0268, pci_device_10de_0268, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0321, + pci_ss_list_10de_0268, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0322 = { - 0x0322, pci_device_10de_0322, +static const pciDeviceInfo pci_dev_info_10de_0269 = { + 0x0269, pci_device_10de_0269, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0322, + pci_ss_list_10de_0269, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0323 = { - 0x0323, pci_device_10de_0323, +static const pciDeviceInfo pci_dev_info_10de_026a = { + 0x026a, pci_device_10de_026a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0323, + pci_ss_list_10de_026a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0324 = { - 0x0324, pci_device_10de_0324, +static const pciDeviceInfo pci_dev_info_10de_026b = { + 0x026b, pci_device_10de_026b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0324, + pci_ss_list_10de_026b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0325 = { - 0x0325, pci_device_10de_0325, +static const pciDeviceInfo pci_dev_info_10de_026c = { + 0x026c, pci_device_10de_026c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0325, + pci_ss_list_10de_026c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0326 = { - 0x0326, pci_device_10de_0326, +static const pciDeviceInfo pci_dev_info_10de_026d = { + 0x026d, pci_device_10de_026d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0326, + pci_ss_list_10de_026d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0327 = { - 0x0327, pci_device_10de_0327, +static const pciDeviceInfo pci_dev_info_10de_026e = { + 0x026e, pci_device_10de_026e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0327, + pci_ss_list_10de_026e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0328 = { - 0x0328, pci_device_10de_0328, +static const pciDeviceInfo pci_dev_info_10de_026f = { + 0x026f, pci_device_10de_026f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0328, + pci_ss_list_10de_026f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0329 = { - 0x0329, pci_device_10de_0329, +static const pciDeviceInfo pci_dev_info_10de_0270 = { + 0x0270, pci_device_10de_0270, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0329, + pci_ss_list_10de_0270, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_032a = { - 0x032a, pci_device_10de_032a, +static const pciDeviceInfo pci_dev_info_10de_0271 = { + 0x0271, pci_device_10de_0271, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_032a, + pci_ss_list_10de_0271, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_032b = { - 0x032b, pci_device_10de_032b, +static const pciDeviceInfo pci_dev_info_10de_0272 = { + 0x0272, pci_device_10de_0272, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_032b, + pci_ss_list_10de_0272, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_032c = { - 0x032c, pci_device_10de_032c, +static const pciDeviceInfo pci_dev_info_10de_027e = { + 0x027e, pci_device_10de_027e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_032c, + pci_ss_list_10de_027e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_032d = { - 0x032d, pci_device_10de_032d, +static const pciDeviceInfo pci_dev_info_10de_027f = { + 0x027f, pci_device_10de_027f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_032d, + pci_ss_list_10de_027f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_032f = { - 0x032f, pci_device_10de_032f, +static const pciDeviceInfo pci_dev_info_10de_0280 = { + 0x0280, pci_device_10de_0280, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_032f, + pci_ss_list_10de_0280, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0330 = { - 0x0330, pci_device_10de_0330, +static const pciDeviceInfo pci_dev_info_10de_0281 = { + 0x0281, pci_device_10de_0281, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0330, + pci_ss_list_10de_0281, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0331 = { - 0x0331, pci_device_10de_0331, +static const pciDeviceInfo pci_dev_info_10de_0282 = { + 0x0282, pci_device_10de_0282, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0331, + pci_ss_list_10de_0282, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0332 = { - 0x0332, pci_device_10de_0332, +static const pciDeviceInfo pci_dev_info_10de_0286 = { + 0x0286, pci_device_10de_0286, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0332, + pci_ss_list_10de_0286, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0333 = { - 0x0333, pci_device_10de_0333, +static const pciDeviceInfo pci_dev_info_10de_0288 = { + 0x0288, pci_device_10de_0288, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0333, + pci_ss_list_10de_0288, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0334 = { - 0x0334, pci_device_10de_0334, +static const pciDeviceInfo pci_dev_info_10de_0289 = { + 0x0289, pci_device_10de_0289, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0334, + pci_ss_list_10de_0289, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0338 = { - 0x0338, pci_device_10de_0338, +static const pciDeviceInfo pci_dev_info_10de_028c = { + 0x028c, pci_device_10de_028c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0338, + pci_ss_list_10de_028c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_033f = { - 0x033f, pci_device_10de_033f, +static const pciDeviceInfo pci_dev_info_10de_02a0 = { + 0x02a0, pci_device_10de_02a0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_033f, + pci_ss_list_10de_02a0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0341 = { - 0x0341, pci_device_10de_0341, +static const pciDeviceInfo pci_dev_info_10de_02f0 = { + 0x02f0, pci_device_10de_02f0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0341, + pci_ss_list_10de_02f0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0342 = { - 0x0342, pci_device_10de_0342, +static const pciDeviceInfo pci_dev_info_10de_02f1 = { + 0x02f1, pci_device_10de_02f1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0342, + pci_ss_list_10de_02f1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0343 = { - 0x0343, pci_device_10de_0343, +static const pciDeviceInfo pci_dev_info_10de_02f2 = { + 0x02f2, pci_device_10de_02f2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0343, + pci_ss_list_10de_02f2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0344 = { - 0x0344, pci_device_10de_0344, +static const pciDeviceInfo pci_dev_info_10de_02f3 = { + 0x02f3, pci_device_10de_02f3, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0344, + pci_ss_list_10de_02f3, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0345 = { - 0x0345, pci_device_10de_0345, +static const pciDeviceInfo pci_dev_info_10de_02f4 = { + 0x02f4, pci_device_10de_02f4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0345, + pci_ss_list_10de_02f4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0347 = { - 0x0347, pci_device_10de_0347, +static const pciDeviceInfo pci_dev_info_10de_02f5 = { + 0x02f5, pci_device_10de_02f5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0347, + pci_ss_list_10de_02f5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0348 = { - 0x0348, pci_device_10de_0348, +static const pciDeviceInfo pci_dev_info_10de_02f6 = { + 0x02f6, pci_device_10de_02f6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0348, + pci_ss_list_10de_02f6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_0349 = { - 0x0349, pci_device_10de_0349, +static const pciDeviceInfo pci_dev_info_10de_02f7 = { + 0x02f7, pci_device_10de_02f7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_0349, + pci_ss_list_10de_02f7, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_034b = { - 0x034b, pci_device_10de_034b, +static const pciDeviceInfo pci_dev_info_10de_02f8 = { + 0x02f8, pci_device_10de_02f8, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_034b, + pci_ss_list_10de_02f8, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_034c = { - 0x034c, pci_device_10de_034c, +static const pciDeviceInfo pci_dev_info_10de_02f9 = { + 0x02f9, pci_device_10de_02f9, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_034c, + pci_ss_list_10de_02f9, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_034e = { - 0x034e, pci_device_10de_034e, +static const pciDeviceInfo pci_dev_info_10de_02fa = { + 0x02fa, pci_device_10de_02fa, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_034e, + pci_ss_list_10de_02fa, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10de_034f = { - 0x034f, pci_device_10de_034f, +static const pciDeviceInfo pci_dev_info_10de_02fb = { + 0x02fb, pci_device_10de_02fb, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10de_034f, + pci_ss_list_10de_02fb, #else NULL, #endif 0 }; -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10df_1ae5 = { - 0x1ae5, pci_device_10df_1ae5, +static const pciDeviceInfo pci_dev_info_10de_02fc = { + 0x02fc, pci_device_10de_02fc, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_1ae5, + pci_ss_list_10de_02fc, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_1ae6 = { - 0x1ae6, pci_device_10df_1ae6, +static const pciDeviceInfo pci_dev_info_10de_02fd = { + 0x02fd, pci_device_10de_02fd, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_1ae6, + pci_ss_list_10de_02fd, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_1ae7 = { - 0x1ae7, pci_device_10df_1ae7, +static const pciDeviceInfo pci_dev_info_10de_02fe = { + 0x02fe, pci_device_10de_02fe, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_1ae7, + pci_ss_list_10de_02fe, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f015 = { - 0xf015, pci_device_10df_f015, +static const pciDeviceInfo pci_dev_info_10de_02ff = { + 0x02ff, pci_device_10de_02ff, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f015, + pci_ss_list_10de_02ff, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f085 = { - 0xf085, pci_device_10df_f085, +static const pciDeviceInfo pci_dev_info_10de_0300 = { + 0x0300, pci_device_10de_0300, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f085, + pci_ss_list_10de_0300, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f095 = { - 0xf095, pci_device_10df_f095, +static const pciDeviceInfo pci_dev_info_10de_0301 = { + 0x0301, pci_device_10de_0301, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f095, + pci_ss_list_10de_0301, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f098 = { - 0xf098, pci_device_10df_f098, +static const pciDeviceInfo pci_dev_info_10de_0302 = { + 0x0302, pci_device_10de_0302, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f098, + pci_ss_list_10de_0302, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f0a1 = { - 0xf0a1, pci_device_10df_f0a1, +static const pciDeviceInfo pci_dev_info_10de_0308 = { + 0x0308, pci_device_10de_0308, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f0a1, + pci_ss_list_10de_0308, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f0a5 = { - 0xf0a5, pci_device_10df_f0a5, +static const pciDeviceInfo pci_dev_info_10de_0309 = { + 0x0309, pci_device_10de_0309, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f0a5, + pci_ss_list_10de_0309, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f0d5 = { - 0xf0d5, pci_device_10df_f0d5, +static const pciDeviceInfo pci_dev_info_10de_0311 = { + 0x0311, pci_device_10de_0311, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f0d5, + pci_ss_list_10de_0311, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f100 = { - 0xf100, pci_device_10df_f100, +static const pciDeviceInfo pci_dev_info_10de_0312 = { + 0x0312, pci_device_10de_0312, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f100, + pci_ss_list_10de_0312, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f700 = { - 0xf700, pci_device_10df_f700, +static const pciDeviceInfo pci_dev_info_10de_0313 = { + 0x0313, pci_device_10de_0313, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f700, + pci_ss_list_10de_0313, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f701 = { - 0xf701, pci_device_10df_f701, +static const pciDeviceInfo pci_dev_info_10de_0314 = { + 0x0314, pci_device_10de_0314, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f701, + pci_ss_list_10de_0314, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f800 = { - 0xf800, pci_device_10df_f800, +static const pciDeviceInfo pci_dev_info_10de_0316 = { + 0x0316, pci_device_10de_0316, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f800, + pci_ss_list_10de_0316, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f801 = { - 0xf801, pci_device_10df_f801, +static const pciDeviceInfo pci_dev_info_10de_0317 = { + 0x0317, pci_device_10de_0317, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f801, + pci_ss_list_10de_0317, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f900 = { - 0xf900, pci_device_10df_f900, +static const pciDeviceInfo pci_dev_info_10de_031a = { + 0x031a, pci_device_10de_031a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f900, + pci_ss_list_10de_031a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f901 = { - 0xf901, pci_device_10df_f901, +static const pciDeviceInfo pci_dev_info_10de_031b = { + 0x031b, pci_device_10de_031b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f901, + pci_ss_list_10de_031b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f980 = { - 0xf980, pci_device_10df_f980, +static const pciDeviceInfo pci_dev_info_10de_031c = { + 0x031c, pci_device_10de_031c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f980, + pci_ss_list_10de_031c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f981 = { - 0xf981, pci_device_10df_f981, +static const pciDeviceInfo pci_dev_info_10de_031d = { + 0x031d, pci_device_10de_031d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f981, + pci_ss_list_10de_031d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_f982 = { - 0xf982, pci_device_10df_f982, +static const pciDeviceInfo pci_dev_info_10de_031e = { + 0x031e, pci_device_10de_031e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_f982, + pci_ss_list_10de_031e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_fa00 = { - 0xfa00, pci_device_10df_fa00, +static const pciDeviceInfo pci_dev_info_10de_031f = { + 0x031f, pci_device_10de_031f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_fa00, + pci_ss_list_10de_031f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_fa01 = { - 0xfa01, pci_device_10df_fa01, +static const pciDeviceInfo pci_dev_info_10de_0320 = { + 0x0320, pci_device_10de_0320, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_fa01, + pci_ss_list_10de_0320, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_fb00 = { - 0xfb00, pci_device_10df_fb00, +static const pciDeviceInfo pci_dev_info_10de_0321 = { + 0x0321, pci_device_10de_0321, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_fb00, + pci_ss_list_10de_0321, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10df_fd00 = { - 0xfd00, pci_device_10df_fd00, +static const pciDeviceInfo pci_dev_info_10de_0322 = { + 0x0322, pci_device_10de_0322, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10df_fd00, + pci_ss_list_10de_0322, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_10e0_5026 = { - 0x5026, pci_device_10e0_5026, +static const pciDeviceInfo pci_dev_info_10de_0323 = { + 0x0323, pci_device_10de_0323, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e0_5026, + pci_ss_list_10de_0323, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e0_5027 = { - 0x5027, pci_device_10e0_5027, +static const pciDeviceInfo pci_dev_info_10de_0324 = { + 0x0324, pci_device_10de_0324, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e0_5027, + pci_ss_list_10de_0324, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e0_5028 = { - 0x5028, pci_device_10e0_5028, +static const pciDeviceInfo pci_dev_info_10de_0325 = { + 0x0325, pci_device_10de_0325, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e0_5028, + pci_ss_list_10de_0325, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e0_8849 = { - 0x8849, pci_device_10e0_8849, +static const pciDeviceInfo pci_dev_info_10de_0326 = { + 0x0326, pci_device_10de_0326, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e0_8849, + pci_ss_list_10de_0326, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e0_8853 = { - 0x8853, pci_device_10e0_8853, +static const pciDeviceInfo pci_dev_info_10de_0327 = { + 0x0327, pci_device_10de_0327, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e0_8853, + pci_ss_list_10de_0327, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e0_9128 = { - 0x9128, pci_device_10e0_9128, +static const pciDeviceInfo pci_dev_info_10de_0328 = { + 0x0328, pci_device_10de_0328, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e0_9128, + pci_ss_list_10de_0328, #else NULL, #endif 0 }; -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10e1_0391 = { - 0x0391, pci_device_10e1_0391, +static const pciDeviceInfo pci_dev_info_10de_0329 = { + 0x0329, pci_device_10de_0329, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e1_0391, + pci_ss_list_10de_0329, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e1_690c = { - 0x690c, pci_device_10e1_690c, +static const pciDeviceInfo pci_dev_info_10de_032a = { + 0x032a, pci_device_10de_032a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e1_690c, + pci_ss_list_10de_032a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e1_dc29 = { - 0xdc29, pci_device_10e1_dc29, +static const pciDeviceInfo pci_dev_info_10de_032b = { + 0x032b, pci_device_10de_032b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e1_dc29, + pci_ss_list_10de_032b, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10e3_0000 = { - 0x0000, pci_device_10e3_0000, +static const pciDeviceInfo pci_dev_info_10de_032c = { + 0x032c, pci_device_10de_032c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e3_0000, + pci_ss_list_10de_032c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e3_0860 = { - 0x0860, pci_device_10e3_0860, +static const pciDeviceInfo pci_dev_info_10de_032d = { + 0x032d, pci_device_10de_032d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e3_0860, + pci_ss_list_10de_032d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e3_0862 = { - 0x0862, pci_device_10e3_0862, +static const pciDeviceInfo pci_dev_info_10de_032f = { + 0x032f, pci_device_10de_032f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e3_0862, + pci_ss_list_10de_032f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e3_8260 = { - 0x8260, pci_device_10e3_8260, +static const pciDeviceInfo pci_dev_info_10de_0330 = { + 0x0330, pci_device_10de_0330, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e3_8260, + pci_ss_list_10de_0330, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e3_8261 = { - 0x8261, pci_device_10e3_8261, +static const pciDeviceInfo pci_dev_info_10de_0331 = { + 0x0331, pci_device_10de_0331, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e3_8261, + pci_ss_list_10de_0331, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10e8_1072 = { - 0x1072, pci_device_10e8_1072, +static const pciDeviceInfo pci_dev_info_10de_0332 = { + 0x0332, pci_device_10de_0332, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_1072, + pci_ss_list_10de_0332, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_2011 = { - 0x2011, pci_device_10e8_2011, +static const pciDeviceInfo pci_dev_info_10de_0333 = { + 0x0333, pci_device_10de_0333, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_2011, + pci_ss_list_10de_0333, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_4750 = { - 0x4750, pci_device_10e8_4750, +static const pciDeviceInfo pci_dev_info_10de_0334 = { + 0x0334, pci_device_10de_0334, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_4750, + pci_ss_list_10de_0334, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_5920 = { - 0x5920, pci_device_10e8_5920, +static const pciDeviceInfo pci_dev_info_10de_0338 = { + 0x0338, pci_device_10de_0338, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_5920, + pci_ss_list_10de_0338, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_8043 = { - 0x8043, pci_device_10e8_8043, +static const pciDeviceInfo pci_dev_info_10de_033f = { + 0x033f, pci_device_10de_033f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_8043, + pci_ss_list_10de_033f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_8062 = { - 0x8062, pci_device_10e8_8062, +static const pciDeviceInfo pci_dev_info_10de_0341 = { + 0x0341, pci_device_10de_0341, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_8062, + pci_ss_list_10de_0341, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_807d = { - 0x807d, pci_device_10e8_807d, +static const pciDeviceInfo pci_dev_info_10de_0342 = { + 0x0342, pci_device_10de_0342, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_807d, + pci_ss_list_10de_0342, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_8088 = { - 0x8088, pci_device_10e8_8088, +static const pciDeviceInfo pci_dev_info_10de_0343 = { + 0x0343, pci_device_10de_0343, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_8088, + pci_ss_list_10de_0343, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_8089 = { - 0x8089, pci_device_10e8_8089, +static const pciDeviceInfo pci_dev_info_10de_0344 = { + 0x0344, pci_device_10de_0344, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_8089, + pci_ss_list_10de_0344, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_809c = { - 0x809c, pci_device_10e8_809c, +static const pciDeviceInfo pci_dev_info_10de_0345 = { + 0x0345, pci_device_10de_0345, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_809c, + pci_ss_list_10de_0345, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_80d7 = { - 0x80d7, pci_device_10e8_80d7, +static const pciDeviceInfo pci_dev_info_10de_0347 = { + 0x0347, pci_device_10de_0347, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_80d7, + pci_ss_list_10de_0347, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_80d9 = { - 0x80d9, pci_device_10e8_80d9, +static const pciDeviceInfo pci_dev_info_10de_0348 = { + 0x0348, pci_device_10de_0348, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_80d9, + pci_ss_list_10de_0348, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_80da = { - 0x80da, pci_device_10e8_80da, +static const pciDeviceInfo pci_dev_info_10de_0349 = { + 0x0349, pci_device_10de_0349, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_80da, + pci_ss_list_10de_0349, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_811a = { - 0x811a, pci_device_10e8_811a, +static const pciDeviceInfo pci_dev_info_10de_034b = { + 0x034b, pci_device_10de_034b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_811a, + pci_ss_list_10de_034b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_814c = { - 0x814c, pci_device_10e8_814c, +static const pciDeviceInfo pci_dev_info_10de_034c = { + 0x034c, pci_device_10de_034c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_814c, + pci_ss_list_10de_034c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_8170 = { - 0x8170, pci_device_10e8_8170, +static const pciDeviceInfo pci_dev_info_10de_034e = { + 0x034e, pci_device_10de_034e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_8170, + pci_ss_list_10de_034e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_81e6 = { - 0x81e6, pci_device_10e8_81e6, +static const pciDeviceInfo pci_dev_info_10de_034f = { + 0x034f, pci_device_10de_034f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_81e6, + pci_ss_list_10de_034f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_8291 = { - 0x8291, pci_device_10e8_8291, +static const pciDeviceInfo pci_dev_info_10de_0360 = { + 0x0360, pci_device_10de_0360, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_8291, + pci_ss_list_10de_0360, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_82c4 = { - 0x82c4, pci_device_10e8_82c4, +static const pciDeviceInfo pci_dev_info_10de_0361 = { + 0x0361, pci_device_10de_0361, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_82c4, + pci_ss_list_10de_0361, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_82c5 = { - 0x82c5, pci_device_10e8_82c5, +static const pciDeviceInfo pci_dev_info_10de_0362 = { + 0x0362, pci_device_10de_0362, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_82c5, + pci_ss_list_10de_0362, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_82c6 = { - 0x82c6, pci_device_10e8_82c6, +static const pciDeviceInfo pci_dev_info_10de_0363 = { + 0x0363, pci_device_10de_0363, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_82c6, + pci_ss_list_10de_0363, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_82c7 = { - 0x82c7, pci_device_10e8_82c7, +static const pciDeviceInfo pci_dev_info_10de_0364 = { + 0x0364, pci_device_10de_0364, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_82c7, + pci_ss_list_10de_0364, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_82ca = { - 0x82ca, pci_device_10e8_82ca, +static const pciDeviceInfo pci_dev_info_10de_0365 = { + 0x0365, pci_device_10de_0365, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_82ca, + pci_ss_list_10de_0365, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_82db = { - 0x82db, pci_device_10e8_82db, +static const pciDeviceInfo pci_dev_info_10de_0366 = { + 0x0366, pci_device_10de_0366, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_82db, + pci_ss_list_10de_0366, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_82e2 = { - 0x82e2, pci_device_10e8_82e2, +static const pciDeviceInfo pci_dev_info_10de_0367 = { + 0x0367, pci_device_10de_0367, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_82e2, + pci_ss_list_10de_0367, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10e8_8851 = { - 0x8851, pci_device_10e8_8851, +static const pciDeviceInfo pci_dev_info_10de_0368 = { + 0x0368, pci_device_10de_0368, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10e8_8851, + pci_ss_list_10de_0368, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_10ea_1680 = { - 0x1680, pci_device_10ea_1680, +static const pciDeviceInfo pci_dev_info_10de_0369 = { + 0x0369, pci_device_10de_0369, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ea_1680, + pci_ss_list_10de_0369, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ea_1682 = { - 0x1682, pci_device_10ea_1682, +static const pciDeviceInfo pci_dev_info_10de_036a = { + 0x036a, pci_device_10de_036a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ea_1682, + pci_ss_list_10de_036a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ea_1683 = { - 0x1683, pci_device_10ea_1683, +static const pciDeviceInfo pci_dev_info_10de_036c = { + 0x036c, pci_device_10de_036c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ea_1683, + pci_ss_list_10de_036c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ea_2000 = { - 0x2000, pci_device_10ea_2000, +static const pciDeviceInfo pci_dev_info_10de_036d = { + 0x036d, pci_device_10de_036d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ea_2000, + pci_ss_list_10de_036d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ea_2010 = { - 0x2010, pci_device_10ea_2010, +static const pciDeviceInfo pci_dev_info_10de_036e = { + 0x036e, pci_device_10de_036e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ea_2010, + pci_ss_list_10de_036e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ea_5000 = { - 0x5000, pci_device_10ea_5000, +static const pciDeviceInfo pci_dev_info_10de_0371 = { + 0x0371, pci_device_10de_0371, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ea_5000, + pci_ss_list_10de_0371, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ea_5050 = { - 0x5050, pci_device_10ea_5050, +static const pciDeviceInfo pci_dev_info_10de_0372 = { + 0x0372, pci_device_10de_0372, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ea_5050, + pci_ss_list_10de_0372, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ea_5202 = { - 0x5202, pci_device_10ea_5202, +static const pciDeviceInfo pci_dev_info_10de_0373 = { + 0x0373, pci_device_10de_0373, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ea_5202, + pci_ss_list_10de_0373, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ea_5252 = { - 0x5252, pci_device_10ea_5252, +static const pciDeviceInfo pci_dev_info_10de_037a = { + 0x037a, pci_device_10de_037a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ea_5252, + pci_ss_list_10de_037a, #else NULL, #endif 0 }; -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10eb_0101 = { - 0x0101, pci_device_10eb_0101, +static const pciDeviceInfo pci_dev_info_10de_037e = { + 0x037e, pci_device_10de_037e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10eb_0101, + pci_ss_list_10de_037e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10eb_8111 = { - 0x8111, pci_device_10eb_8111, +static const pciDeviceInfo pci_dev_info_10de_037f = { + 0x037f, pci_device_10de_037f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10eb_8111, + pci_ss_list_10de_037f, #else NULL, #endif 0 }; -#endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10ec_8029 = { - 0x8029, pci_device_10ec_8029, +static const pciDeviceInfo pci_dev_info_10df_1ae5 = { + 0x1ae5, pci_device_10df_1ae5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ec_8029, + pci_ss_list_10df_1ae5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ec_8129 = { - 0x8129, pci_device_10ec_8129, +static const pciDeviceInfo pci_dev_info_10df_f085 = { + 0xf085, pci_device_10df_f085, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ec_8129, + pci_ss_list_10df_f085, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ec_8138 = { - 0x8138, pci_device_10ec_8138, +static const pciDeviceInfo pci_dev_info_10df_f095 = { + 0xf095, pci_device_10df_f095, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ec_8138, + pci_ss_list_10df_f095, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ec_8139 = { - 0x8139, pci_device_10ec_8139, +static const pciDeviceInfo pci_dev_info_10df_f098 = { + 0xf098, pci_device_10df_f098, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ec_8139, + pci_ss_list_10df_f098, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ec_8169 = { - 0x8169, pci_device_10ec_8169, +static const pciDeviceInfo pci_dev_info_10df_f0a1 = { + 0xf0a1, pci_device_10df_f0a1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ec_8169, + pci_ss_list_10df_f0a1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ec_8180 = { - 0x8180, pci_device_10ec_8180, +static const pciDeviceInfo pci_dev_info_10df_f0a5 = { + 0xf0a5, pci_device_10df_f0a5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ec_8180, + pci_ss_list_10df_f0a5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ec_8197 = { - 0x8197, pci_device_10ec_8197, +static const pciDeviceInfo pci_dev_info_10df_f0b5 = { + 0xf0b5, pci_device_10df_f0b5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ec_8197, + pci_ss_list_10df_f0b5, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10ed_7310 = { - 0x7310, pci_device_10ed_7310, +static const pciDeviceInfo pci_dev_info_10df_f0d1 = { + 0xf0d1, pci_device_10df_f0d1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ed_7310, + pci_ss_list_10df_f0d1, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10ee_3fc0 = { - 0x3fc0, pci_device_10ee_3fc0, +static const pciDeviceInfo pci_dev_info_10df_f0d5 = { + 0xf0d5, pci_device_10df_f0d5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ee_3fc0, + pci_ss_list_10df_f0d5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ee_3fc1 = { - 0x3fc1, pci_device_10ee_3fc1, +static const pciDeviceInfo pci_dev_info_10df_f0e1 = { + 0xf0e1, pci_device_10df_f0e1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ee_3fc1, + pci_ss_list_10df_f0e1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ee_3fc2 = { - 0x3fc2, pci_device_10ee_3fc2, +static const pciDeviceInfo pci_dev_info_10df_f0e5 = { + 0xf0e5, pci_device_10df_f0e5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ee_3fc2, + pci_ss_list_10df_f0e5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ee_3fc3 = { - 0x3fc3, pci_device_10ee_3fc3, +static const pciDeviceInfo pci_dev_info_10df_f0f5 = { + 0xf0f5, pci_device_10df_f0f5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ee_3fc3, + pci_ss_list_10df_f0f5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ee_3fc4 = { - 0x3fc4, pci_device_10ee_3fc4, +static const pciDeviceInfo pci_dev_info_10df_f700 = { + 0xf700, pci_device_10df_f700, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ee_3fc4, + pci_ss_list_10df_f700, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ee_3fc5 = { - 0x3fc5, pci_device_10ee_3fc5, +static const pciDeviceInfo pci_dev_info_10df_f701 = { + 0xf701, pci_device_10df_f701, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ee_3fc5, + pci_ss_list_10df_f701, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ee_3fc6 = { - 0x3fc6, pci_device_10ee_3fc6, +static const pciDeviceInfo pci_dev_info_10df_f800 = { + 0xf800, pci_device_10df_f800, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ee_3fc6, + pci_ss_list_10df_f800, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10ee_8381 = { - 0x8381, pci_device_10ee_8381, +static const pciDeviceInfo pci_dev_info_10df_f801 = { + 0xf801, pci_device_10df_f801, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ee_8381, + pci_ss_list_10df_f801, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10ef_8154 = { - 0x8154, pci_device_10ef_8154, +static const pciDeviceInfo pci_dev_info_10df_f900 = { + 0xf900, pci_device_10df_f900, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10ef_8154, + pci_ss_list_10df_f900, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10f5_a001 = { - 0xa001, pci_device_10f5_a001, +static const pciDeviceInfo pci_dev_info_10df_f901 = { + 0xf901, pci_device_10df_f901, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10f5_a001, + pci_ss_list_10df_f901, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10fa_000c = { - 0x000c, pci_device_10fa_000c, +static const pciDeviceInfo pci_dev_info_10df_f980 = { + 0xf980, pci_device_10df_f980, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10fa_000c, + pci_ss_list_10df_f980, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10fb_186f = { - 0x186f, pci_device_10fb_186f, +static const pciDeviceInfo pci_dev_info_10df_f981 = { + 0xf981, pci_device_10df_f981, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10fb_186f, + pci_ss_list_10df_f981, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_10fc_0003 = { - 0x0003, pci_device_10fc_0003, +static const pciDeviceInfo pci_dev_info_10df_f982 = { + 0xf982, pci_device_10df_f982, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10fc_0003, + pci_ss_list_10df_f982, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_10fc_0005 = { - 0x0005, pci_device_10fc_0005, +static const pciDeviceInfo pci_dev_info_10df_fa00 = { + 0xfa00, pci_device_10df_fa00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_10fc_0005, + pci_ss_list_10df_fa00, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1101_1060 = { - 0x1060, pci_device_1101_1060, +static const pciDeviceInfo pci_dev_info_10df_fb00 = { + 0xfb00, pci_device_10df_fb00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1101_1060, + pci_ss_list_10df_fb00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1101_9100 = { - 0x9100, pci_device_1101_9100, +static const pciDeviceInfo pci_dev_info_10df_fc00 = { + 0xfc00, pci_device_10df_fc00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1101_9100, + pci_ss_list_10df_fc00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1101_9400 = { - 0x9400, pci_device_1101_9400, +static const pciDeviceInfo pci_dev_info_10df_fc10 = { + 0xfc10, pci_device_10df_fc10, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1101_9400, + pci_ss_list_10df_fc10, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1101_9401 = { - 0x9401, pci_device_1101_9401, +static const pciDeviceInfo pci_dev_info_10df_fc20 = { + 0xfc20, pci_device_10df_fc20, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1101_9401, + pci_ss_list_10df_fc20, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1101_9500 = { - 0x9500, pci_device_1101_9500, +static const pciDeviceInfo pci_dev_info_10df_fd00 = { + 0xfd00, pci_device_10df_fd00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1101_9500, + pci_ss_list_10df_fd00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1101_9502 = { - 0x9502, pci_device_1101_9502, +static const pciDeviceInfo pci_dev_info_10df_fe00 = { + 0xfe00, pci_device_10df_fe00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1101_9502, + pci_ss_list_10df_fe00, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_1102_0002 = { - 0x0002, pci_device_1102_0002, +static const pciDeviceInfo pci_dev_info_10df_ff00 = { + 0xff00, pci_device_10df_ff00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1102_0002, + pci_ss_list_10df_ff00, #else NULL, #endif - 0x0401 + 0 }; -static const pciDeviceInfo pci_dev_info_1102_0004 = { - 0x0004, pci_device_1102_0004, +#endif +static const pciDeviceInfo pci_dev_info_10e0_5026 = { + 0x5026, pci_device_10e0_5026, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1102_0004, + pci_ss_list_10e0_5026, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1102_0006 = { - 0x0006, pci_device_1102_0006, +static const pciDeviceInfo pci_dev_info_10e0_5027 = { + 0x5027, pci_device_10e0_5027, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1102_0006, + pci_ss_list_10e0_5027, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1102_0007 = { - 0x0007, pci_device_1102_0007, +static const pciDeviceInfo pci_dev_info_10e0_5028 = { + 0x5028, pci_device_10e0_5028, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1102_0007, + pci_ss_list_10e0_5028, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1102_0008 = { - 0x0008, pci_device_1102_0008, +static const pciDeviceInfo pci_dev_info_10e0_8849 = { + 0x8849, pci_device_10e0_8849, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1102_0008, + pci_ss_list_10e0_8849, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1102_4001 = { - 0x4001, pci_device_1102_4001, +static const pciDeviceInfo pci_dev_info_10e0_8853 = { + 0x8853, pci_device_10e0_8853, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1102_4001, + pci_ss_list_10e0_8853, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1102_7002 = { - 0x7002, pci_device_1102_7002, +static const pciDeviceInfo pci_dev_info_10e0_9128 = { + 0x9128, pci_device_10e0_9128, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1102_7002, + pci_ss_list_10e0_9128, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1102_7003 = { - 0x7003, pci_device_1102_7003, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10e1_0391 = { + 0x0391, pci_device_10e1_0391, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1102_7003, + pci_ss_list_10e1_0391, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1102_7004 = { - 0x7004, pci_device_1102_7004, +static const pciDeviceInfo pci_dev_info_10e1_690c = { + 0x690c, pci_device_10e1_690c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1102_7004, + pci_ss_list_10e1_690c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1102_7005 = { - 0x7005, pci_device_1102_7005, +static const pciDeviceInfo pci_dev_info_10e1_dc29 = { + 0xdc29, pci_device_10e1_dc29, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1102_7005, + pci_ss_list_10e1_dc29, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1102_8064 = { - 0x8064, pci_device_1102_8064, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10e3_0000 = { + 0x0000, pci_device_10e3_0000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1102_8064, + pci_ss_list_10e3_0000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1102_8938 = { - 0x8938, pci_device_1102_8938, +static const pciDeviceInfo pci_dev_info_10e3_0148 = { + 0x0148, pci_device_10e3_0148, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1102_8938, + pci_ss_list_10e3_0148, #else NULL, #endif 0 }; -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1103_0003 = { - 0x0003, pci_device_1103_0003, +static const pciDeviceInfo pci_dev_info_10e3_0860 = { + 0x0860, pci_device_10e3_0860, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1103_0003, + pci_ss_list_10e3_0860, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1103_0004 = { - 0x0004, pci_device_1103_0004, +static const pciDeviceInfo pci_dev_info_10e3_0862 = { + 0x0862, pci_device_10e3_0862, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1103_0004, + pci_ss_list_10e3_0862, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1103_0005 = { - 0x0005, pci_device_1103_0005, +static const pciDeviceInfo pci_dev_info_10e3_8260 = { + 0x8260, pci_device_10e3_8260, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1103_0005, + pci_ss_list_10e3_8260, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1103_0006 = { - 0x0006, pci_device_1103_0006, +static const pciDeviceInfo pci_dev_info_10e3_8261 = { + 0x8261, pci_device_10e3_8261, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1103_0006, + pci_ss_list_10e3_8261, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1103_0007 = { - 0x0007, pci_device_1103_0007, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10e4_8029 = { + 0x8029, pci_device_10e4_8029, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1103_0007, + pci_ss_list_10e4_8029, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1103_0008 = { - 0x0008, pci_device_1103_0008, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10e8_1072 = { + 0x1072, pci_device_10e8_1072, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1103_0008, + pci_ss_list_10e8_1072, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1103_0009 = { - 0x0009, pci_device_1103_0009, +static const pciDeviceInfo pci_dev_info_10e8_2011 = { + 0x2011, pci_device_10e8_2011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1103_0009, + pci_ss_list_10e8_2011, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1105_1105 = { - 0x1105, pci_device_1105_1105, +static const pciDeviceInfo pci_dev_info_10e8_4750 = { + 0x4750, pci_device_10e8_4750, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1105_1105, + pci_ss_list_10e8_4750, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1105_8300 = { - 0x8300, pci_device_1105_8300, +static const pciDeviceInfo pci_dev_info_10e8_5920 = { + 0x5920, pci_device_10e8_5920, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1105_8300, + pci_ss_list_10e8_5920, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1105_8400 = { - 0x8400, pci_device_1105_8400, +static const pciDeviceInfo pci_dev_info_10e8_8043 = { + 0x8043, pci_device_10e8_8043, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1105_8400, + pci_ss_list_10e8_8043, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1105_8401 = { - 0x8401, pci_device_1105_8401, +static const pciDeviceInfo pci_dev_info_10e8_8062 = { + 0x8062, pci_device_10e8_8062, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1105_8401, + pci_ss_list_10e8_8062, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1105_8470 = { - 0x8470, pci_device_1105_8470, +static const pciDeviceInfo pci_dev_info_10e8_807d = { + 0x807d, pci_device_10e8_807d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1105_8470, + pci_ss_list_10e8_807d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1105_8471 = { - 0x8471, pci_device_1105_8471, +static const pciDeviceInfo pci_dev_info_10e8_8088 = { + 0x8088, pci_device_10e8_8088, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1105_8471, + pci_ss_list_10e8_8088, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1105_8475 = { - 0x8475, pci_device_1105_8475, +static const pciDeviceInfo pci_dev_info_10e8_8089 = { + 0x8089, pci_device_10e8_8089, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1105_8475, + pci_ss_list_10e8_8089, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1105_8476 = { - 0x8476, pci_device_1105_8476, +static const pciDeviceInfo pci_dev_info_10e8_809c = { + 0x809c, pci_device_10e8_809c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1105_8476, + pci_ss_list_10e8_809c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1105_8485 = { - 0x8485, pci_device_1105_8485, +static const pciDeviceInfo pci_dev_info_10e8_80d7 = { + 0x80d7, pci_device_10e8_80d7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1105_8485, + pci_ss_list_10e8_80d7, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1105_8486 = { - 0x8486, pci_device_1105_8486, +static const pciDeviceInfo pci_dev_info_10e8_80d9 = { + 0x80d9, pci_device_10e8_80d9, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1105_8486, + pci_ss_list_10e8_80d9, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1106_0102 = { - 0x0102, pci_device_1106_0102, +static const pciDeviceInfo pci_dev_info_10e8_80da = { + 0x80da, pci_device_10e8_80da, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0102, + pci_ss_list_10e8_80da, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0130 = { - 0x0130, pci_device_1106_0130, +static const pciDeviceInfo pci_dev_info_10e8_811a = { + 0x811a, pci_device_10e8_811a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0130, + pci_ss_list_10e8_811a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0305 = { - 0x0305, pci_device_1106_0305, +static const pciDeviceInfo pci_dev_info_10e8_814c = { + 0x814c, pci_device_10e8_814c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0305, + pci_ss_list_10e8_814c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0391 = { - 0x0391, pci_device_1106_0391, +static const pciDeviceInfo pci_dev_info_10e8_8170 = { + 0x8170, pci_device_10e8_8170, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0391, + pci_ss_list_10e8_8170, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0501 = { - 0x0501, pci_device_1106_0501, +static const pciDeviceInfo pci_dev_info_10e8_81e6 = { + 0x81e6, pci_device_10e8_81e6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0501, + pci_ss_list_10e8_81e6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0505 = { - 0x0505, pci_device_1106_0505, +static const pciDeviceInfo pci_dev_info_10e8_8291 = { + 0x8291, pci_device_10e8_8291, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0505, + pci_ss_list_10e8_8291, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0561 = { - 0x0561, pci_device_1106_0561, +static const pciDeviceInfo pci_dev_info_10e8_82c4 = { + 0x82c4, pci_device_10e8_82c4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0561, + pci_ss_list_10e8_82c4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0571 = { - 0x0571, pci_device_1106_0571, +static const pciDeviceInfo pci_dev_info_10e8_82c5 = { + 0x82c5, pci_device_10e8_82c5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0571, + pci_ss_list_10e8_82c5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0576 = { - 0x0576, pci_device_1106_0576, +static const pciDeviceInfo pci_dev_info_10e8_82c6 = { + 0x82c6, pci_device_10e8_82c6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0576, + pci_ss_list_10e8_82c6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0585 = { - 0x0585, pci_device_1106_0585, +static const pciDeviceInfo pci_dev_info_10e8_82c7 = { + 0x82c7, pci_device_10e8_82c7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0585, + pci_ss_list_10e8_82c7, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0586 = { - 0x0586, pci_device_1106_0586, +static const pciDeviceInfo pci_dev_info_10e8_82ca = { + 0x82ca, pci_device_10e8_82ca, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0586, + pci_ss_list_10e8_82ca, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0595 = { - 0x0595, pci_device_1106_0595, +static const pciDeviceInfo pci_dev_info_10e8_82db = { + 0x82db, pci_device_10e8_82db, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0595, + pci_ss_list_10e8_82db, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0596 = { - 0x0596, pci_device_1106_0596, +static const pciDeviceInfo pci_dev_info_10e8_82e2 = { + 0x82e2, pci_device_10e8_82e2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0596, + pci_ss_list_10e8_82e2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0597 = { - 0x0597, pci_device_1106_0597, +static const pciDeviceInfo pci_dev_info_10e8_8851 = { + 0x8851, pci_device_10e8_8851, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0597, + pci_ss_list_10e8_8851, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0598 = { - 0x0598, pci_device_1106_0598, +#endif +static const pciDeviceInfo pci_dev_info_10ea_1680 = { + 0x1680, pci_device_10ea_1680, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0598, + pci_ss_list_10ea_1680, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0601 = { - 0x0601, pci_device_1106_0601, +static const pciDeviceInfo pci_dev_info_10ea_1682 = { + 0x1682, pci_device_10ea_1682, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0601, + pci_ss_list_10ea_1682, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0605 = { - 0x0605, pci_device_1106_0605, +static const pciDeviceInfo pci_dev_info_10ea_1683 = { + 0x1683, pci_device_10ea_1683, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0605, + pci_ss_list_10ea_1683, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0680 = { - 0x0680, pci_device_1106_0680, +static const pciDeviceInfo pci_dev_info_10ea_2000 = { + 0x2000, pci_device_10ea_2000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0680, + pci_ss_list_10ea_2000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0686 = { - 0x0686, pci_device_1106_0686, +static const pciDeviceInfo pci_dev_info_10ea_2010 = { + 0x2010, pci_device_10ea_2010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0686, + pci_ss_list_10ea_2010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0691 = { - 0x0691, pci_device_1106_0691, +static const pciDeviceInfo pci_dev_info_10ea_5000 = { + 0x5000, pci_device_10ea_5000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0691, + pci_ss_list_10ea_5000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0693 = { - 0x0693, pci_device_1106_0693, +static const pciDeviceInfo pci_dev_info_10ea_5050 = { + 0x5050, pci_device_10ea_5050, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0693, + pci_ss_list_10ea_5050, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0698 = { - 0x0698, pci_device_1106_0698, +static const pciDeviceInfo pci_dev_info_10ea_5202 = { + 0x5202, pci_device_10ea_5202, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0698, + pci_ss_list_10ea_5202, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_0926 = { - 0x0926, pci_device_1106_0926, +static const pciDeviceInfo pci_dev_info_10ea_5252 = { + 0x5252, pci_device_10ea_5252, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_0926, + pci_ss_list_10ea_5252, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_1000 = { - 0x1000, pci_device_1106_1000, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10eb_0101 = { + 0x0101, pci_device_10eb_0101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_1000, + pci_ss_list_10eb_0101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_1106 = { - 0x1106, pci_device_1106_1106, +static const pciDeviceInfo pci_dev_info_10eb_8111 = { + 0x8111, pci_device_10eb_8111, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_1106, + pci_ss_list_10eb_8111, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_1571 = { - 0x1571, pci_device_1106_1571, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10ec_0139 = { + 0x0139, pci_device_10ec_0139, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_1571, + pci_ss_list_10ec_0139, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_1595 = { - 0x1595, pci_device_1106_1595, +static const pciDeviceInfo pci_dev_info_10ec_8029 = { + 0x8029, pci_device_10ec_8029, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_1595, + pci_ss_list_10ec_8029, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3022 = { - 0x3022, pci_device_1106_3022, +static const pciDeviceInfo pci_dev_info_10ec_8129 = { + 0x8129, pci_device_10ec_8129, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3022, + pci_ss_list_10ec_8129, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3038 = { - 0x3038, pci_device_1106_3038, +static const pciDeviceInfo pci_dev_info_10ec_8138 = { + 0x8138, pci_device_10ec_8138, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3038, + pci_ss_list_10ec_8138, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3040 = { - 0x3040, pci_device_1106_3040, +static const pciDeviceInfo pci_dev_info_10ec_8139 = { + 0x8139, pci_device_10ec_8139, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3040, + pci_ss_list_10ec_8139, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3043 = { - 0x3043, pci_device_1106_3043, +static const pciDeviceInfo pci_dev_info_10ec_8169 = { + 0x8169, pci_device_10ec_8169, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3043, + pci_ss_list_10ec_8169, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3044 = { - 0x3044, pci_device_1106_3044, +static const pciDeviceInfo pci_dev_info_10ec_8180 = { + 0x8180, pci_device_10ec_8180, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3044, + pci_ss_list_10ec_8180, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3050 = { - 0x3050, pci_device_1106_3050, +static const pciDeviceInfo pci_dev_info_10ec_8197 = { + 0x8197, pci_device_10ec_8197, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3050, + pci_ss_list_10ec_8197, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3051 = { - 0x3051, pci_device_1106_3051, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10ed_7310 = { + 0x7310, pci_device_10ed_7310, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3051, + pci_ss_list_10ed_7310, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3053 = { - 0x3053, pci_device_1106_3053, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3053, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10ee_0205 = { + 0x0205, pci_device_10ee_0205, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_10ee_0205, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3057 = { - 0x3057, pci_device_1106_3057, +static const pciDeviceInfo pci_dev_info_10ee_0210 = { + 0x0210, pci_device_10ee_0210, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3057, + pci_ss_list_10ee_0210, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3058 = { - 0x3058, pci_device_1106_3058, +static const pciDeviceInfo pci_dev_info_10ee_0314 = { + 0x0314, pci_device_10ee_0314, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3058, + pci_ss_list_10ee_0314, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3059 = { - 0x3059, pci_device_1106_3059, +static const pciDeviceInfo pci_dev_info_10ee_0405 = { + 0x0405, pci_device_10ee_0405, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3059, + pci_ss_list_10ee_0405, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3065 = { - 0x3065, pci_device_1106_3065, +static const pciDeviceInfo pci_dev_info_10ee_0410 = { + 0x0410, pci_device_10ee_0410, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3065, + pci_ss_list_10ee_0410, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3068 = { - 0x3068, pci_device_1106_3068, +static const pciDeviceInfo pci_dev_info_10ee_3fc0 = { + 0x3fc0, pci_device_10ee_3fc0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3068, + pci_ss_list_10ee_3fc0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3074 = { - 0x3074, pci_device_1106_3074, +static const pciDeviceInfo pci_dev_info_10ee_3fc1 = { + 0x3fc1, pci_device_10ee_3fc1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3074, + pci_ss_list_10ee_3fc1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3091 = { - 0x3091, pci_device_1106_3091, +static const pciDeviceInfo pci_dev_info_10ee_3fc2 = { + 0x3fc2, pci_device_10ee_3fc2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3091, + pci_ss_list_10ee_3fc2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3099 = { - 0x3099, pci_device_1106_3099, +static const pciDeviceInfo pci_dev_info_10ee_3fc3 = { + 0x3fc3, pci_device_10ee_3fc3, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3099, + pci_ss_list_10ee_3fc3, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3101 = { - 0x3101, pci_device_1106_3101, +static const pciDeviceInfo pci_dev_info_10ee_3fc4 = { + 0x3fc4, pci_device_10ee_3fc4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3101, + pci_ss_list_10ee_3fc4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3102 = { - 0x3102, pci_device_1106_3102, +static const pciDeviceInfo pci_dev_info_10ee_3fc5 = { + 0x3fc5, pci_device_10ee_3fc5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3102, + pci_ss_list_10ee_3fc5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3103 = { - 0x3103, pci_device_1106_3103, +static const pciDeviceInfo pci_dev_info_10ee_3fc6 = { + 0x3fc6, pci_device_10ee_3fc6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3103, + pci_ss_list_10ee_3fc6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3104 = { - 0x3104, pci_device_1106_3104, +static const pciDeviceInfo pci_dev_info_10ee_8381 = { + 0x8381, pci_device_10ee_8381, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3104, + pci_ss_list_10ee_8381, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3106 = { - 0x3106, pci_device_1106_3106, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10ef_8154 = { + 0x8154, pci_device_10ef_8154, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3106, + pci_ss_list_10ef_8154, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3108 = { - 0x3108, pci_device_1106_3108, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10f5_a001 = { + 0xa001, pci_device_10f5_a001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3108, + pci_ss_list_10f5_a001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3109 = { - 0x3109, pci_device_1106_3109, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10fa_000c = { + 0x000c, pci_device_10fa_000c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3109, + pci_ss_list_10fa_000c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3112 = { - 0x3112, pci_device_1106_3112, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10fb_186f = { + 0x186f, pci_device_10fb_186f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3112, + pci_ss_list_10fb_186f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3116 = { - 0x3116, pci_device_1106_3116, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_10fc_0003 = { + 0x0003, pci_device_10fc_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3116, + pci_ss_list_10fc_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3118 = { - 0x3118, pci_device_1106_3118, +static const pciDeviceInfo pci_dev_info_10fc_0005 = { + 0x0005, pci_device_10fc_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3118, + pci_ss_list_10fc_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3119 = { - 0x3119, pci_device_1106_3119, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1101_1060 = { + 0x1060, pci_device_1101_1060, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3119, + pci_ss_list_1101_1060, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3122 = { - 0x3122, pci_device_1106_3122, +static const pciDeviceInfo pci_dev_info_1101_9100 = { + 0x9100, pci_device_1101_9100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3122, + pci_ss_list_1101_9100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3123 = { - 0x3123, pci_device_1106_3123, +static const pciDeviceInfo pci_dev_info_1101_9400 = { + 0x9400, pci_device_1101_9400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3123, + pci_ss_list_1101_9400, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3128 = { - 0x3128, pci_device_1106_3128, +static const pciDeviceInfo pci_dev_info_1101_9401 = { + 0x9401, pci_device_1101_9401, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3128, + pci_ss_list_1101_9401, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3133 = { - 0x3133, pci_device_1106_3133, +static const pciDeviceInfo pci_dev_info_1101_9500 = { + 0x9500, pci_device_1101_9500, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3133, + pci_ss_list_1101_9500, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3147 = { - 0x3147, pci_device_1106_3147, +static const pciDeviceInfo pci_dev_info_1101_9502 = { + 0x9502, pci_device_1101_9502, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3147, + pci_ss_list_1101_9502, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3148 = { - 0x3148, pci_device_1106_3148, +#endif +static const pciDeviceInfo pci_dev_info_1102_0002 = { + 0x0002, pci_device_1102_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3148, + pci_ss_list_1102_0002, #else NULL, #endif - 0 + 0x0401 }; -static const pciDeviceInfo pci_dev_info_1106_3149 = { - 0x3149, pci_device_1106_3149, +static const pciDeviceInfo pci_dev_info_1102_0004 = { + 0x0004, pci_device_1102_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3149, + pci_ss_list_1102_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3156 = { - 0x3156, pci_device_1106_3156, +static const pciDeviceInfo pci_dev_info_1102_0006 = { + 0x0006, pci_device_1102_0006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3156, + pci_ss_list_1102_0006, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3164 = { - 0x3164, pci_device_1106_3164, +static const pciDeviceInfo pci_dev_info_1102_0007 = { + 0x0007, pci_device_1102_0007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3164, + pci_ss_list_1102_0007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3168 = { - 0x3168, pci_device_1106_3168, +static const pciDeviceInfo pci_dev_info_1102_0008 = { + 0x0008, pci_device_1102_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3168, + pci_ss_list_1102_0008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3177 = { - 0x3177, pci_device_1106_3177, +static const pciDeviceInfo pci_dev_info_1102_4001 = { + 0x4001, pci_device_1102_4001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3177, + pci_ss_list_1102_4001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3188 = { - 0x3188, pci_device_1106_3188, +static const pciDeviceInfo pci_dev_info_1102_7002 = { + 0x7002, pci_device_1102_7002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3188, + pci_ss_list_1102_7002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3189 = { - 0x3189, pci_device_1106_3189, +static const pciDeviceInfo pci_dev_info_1102_7003 = { + 0x7003, pci_device_1102_7003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3189, + pci_ss_list_1102_7003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3204 = { - 0x3204, pci_device_1106_3204, +static const pciDeviceInfo pci_dev_info_1102_7004 = { + 0x7004, pci_device_1102_7004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3204, + pci_ss_list_1102_7004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3205 = { - 0x3205, pci_device_1106_3205, +static const pciDeviceInfo pci_dev_info_1102_7005 = { + 0x7005, pci_device_1102_7005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3205, + pci_ss_list_1102_7005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_3227 = { - 0x3227, pci_device_1106_3227, +static const pciDeviceInfo pci_dev_info_1102_8064 = { + 0x8064, pci_device_1102_8064, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_3227, + pci_ss_list_1102_8064, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_4149 = { - 0x4149, pci_device_1106_4149, +static const pciDeviceInfo pci_dev_info_1102_8938 = { + 0x8938, pci_device_1102_8938, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_4149, + pci_ss_list_1102_8938, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_5030 = { - 0x5030, pci_device_1106_5030, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1103_0003 = { + 0x0003, pci_device_1103_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_5030, + pci_ss_list_1103_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_6100 = { - 0x6100, pci_device_1106_6100, +static const pciDeviceInfo pci_dev_info_1103_0004 = { + 0x0004, pci_device_1103_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_6100, + pci_ss_list_1103_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_7204 = { - 0x7204, pci_device_1106_7204, +static const pciDeviceInfo pci_dev_info_1103_0005 = { + 0x0005, pci_device_1103_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_7204, + pci_ss_list_1103_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_7205 = { - 0x7205, pci_device_1106_7205, +static const pciDeviceInfo pci_dev_info_1103_0006 = { + 0x0006, pci_device_1103_0006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_7205, + pci_ss_list_1103_0006, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_8231 = { - 0x8231, pci_device_1106_8231, +static const pciDeviceInfo pci_dev_info_1103_0007 = { + 0x0007, pci_device_1103_0007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_8231, + pci_ss_list_1103_0007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_8235 = { - 0x8235, pci_device_1106_8235, +static const pciDeviceInfo pci_dev_info_1103_0008 = { + 0x0008, pci_device_1103_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_8235, + pci_ss_list_1103_0008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_8305 = { - 0x8305, pci_device_1106_8305, +static const pciDeviceInfo pci_dev_info_1103_0009 = { + 0x0009, pci_device_1103_0009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_8305, + pci_ss_list_1103_0009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_8391 = { - 0x8391, pci_device_1106_8391, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1105_1105 = { + 0x1105, pci_device_1105_1105, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_8391, + pci_ss_list_1105_1105, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_8501 = { - 0x8501, pci_device_1106_8501, +static const pciDeviceInfo pci_dev_info_1105_8300 = { + 0x8300, pci_device_1105_8300, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_8501, + pci_ss_list_1105_8300, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_8596 = { - 0x8596, pci_device_1106_8596, +static const pciDeviceInfo pci_dev_info_1105_8400 = { + 0x8400, pci_device_1105_8400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_8596, + pci_ss_list_1105_8400, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_8597 = { - 0x8597, pci_device_1106_8597, +static const pciDeviceInfo pci_dev_info_1105_8401 = { + 0x8401, pci_device_1105_8401, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_8597, + pci_ss_list_1105_8401, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_8598 = { - 0x8598, pci_device_1106_8598, +static const pciDeviceInfo pci_dev_info_1105_8470 = { + 0x8470, pci_device_1105_8470, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_8598, + pci_ss_list_1105_8470, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_8601 = { - 0x8601, pci_device_1106_8601, +static const pciDeviceInfo pci_dev_info_1105_8471 = { + 0x8471, pci_device_1105_8471, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_8601, + pci_ss_list_1105_8471, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_8605 = { - 0x8605, pci_device_1106_8605, +static const pciDeviceInfo pci_dev_info_1105_8475 = { + 0x8475, pci_device_1105_8475, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_8605, + pci_ss_list_1105_8475, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_8691 = { - 0x8691, pci_device_1106_8691, +static const pciDeviceInfo pci_dev_info_1105_8476 = { + 0x8476, pci_device_1105_8476, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_8691, + pci_ss_list_1105_8476, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_8693 = { - 0x8693, pci_device_1106_8693, +static const pciDeviceInfo pci_dev_info_1105_8485 = { + 0x8485, pci_device_1105_8485, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_8693, + pci_ss_list_1105_8485, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_b091 = { - 0xb091, pci_device_1106_b091, +static const pciDeviceInfo pci_dev_info_1105_8486 = { + 0x8486, pci_device_1105_8486, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_b091, + pci_ss_list_1105_8486, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_b099 = { - 0xb099, pci_device_1106_b099, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1106_0102 = { + 0x0102, pci_device_1106_0102, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_b099, + pci_ss_list_1106_0102, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_b101 = { - 0xb101, pci_device_1106_b101, +static const pciDeviceInfo pci_dev_info_1106_0130 = { + 0x0130, pci_device_1106_0130, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_b101, + pci_ss_list_1106_0130, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_b102 = { - 0xb102, pci_device_1106_b102, +static const pciDeviceInfo pci_dev_info_1106_0204 = { + 0x0204, pci_device_1106_0204, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_b102, + pci_ss_list_1106_0204, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_b103 = { - 0xb103, pci_device_1106_b103, +static const pciDeviceInfo pci_dev_info_1106_0238 = { + 0x0238, pci_device_1106_0238, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_b103, + pci_ss_list_1106_0238, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_b112 = { - 0xb112, pci_device_1106_b112, +static const pciDeviceInfo pci_dev_info_1106_0258 = { + 0x0258, pci_device_1106_0258, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_b112, + pci_ss_list_1106_0258, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_b168 = { - 0xb168, pci_device_1106_b168, +static const pciDeviceInfo pci_dev_info_1106_0259 = { + 0x0259, pci_device_1106_0259, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_b168, + pci_ss_list_1106_0259, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_b188 = { - 0xb188, pci_device_1106_b188, +static const pciDeviceInfo pci_dev_info_1106_0269 = { + 0x0269, pci_device_1106_0269, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_b188, + pci_ss_list_1106_0269, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_b198 = { - 0xb198, pci_device_1106_b198, +static const pciDeviceInfo pci_dev_info_1106_0282 = { + 0x0282, pci_device_1106_0282, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_b198, + pci_ss_list_1106_0282, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1106_d104 = { - 0xd104, pci_device_1106_d104, +static const pciDeviceInfo pci_dev_info_1106_0290 = { + 0x0290, pci_device_1106_0290, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1106_d104, + pci_ss_list_1106_0290, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1107_0576 = { - 0x0576, pci_device_1107_0576, +static const pciDeviceInfo pci_dev_info_1106_0296 = { + 0x0296, pci_device_1106_0296, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1107_0576, + pci_ss_list_1106_0296, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1108_0100 = { - 0x0100, pci_device_1108_0100, +static const pciDeviceInfo pci_dev_info_1106_0305 = { + 0x0305, pci_device_1106_0305, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1108_0100, + pci_ss_list_1106_0305, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1108_0101 = { - 0x0101, pci_device_1108_0101, +static const pciDeviceInfo pci_dev_info_1106_0308 = { + 0x0308, pci_device_1106_0308, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1108_0101, + pci_ss_list_1106_0308, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1108_0105 = { - 0x0105, pci_device_1108_0105, +static const pciDeviceInfo pci_dev_info_1106_0314 = { + 0x0314, pci_device_1106_0314, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1108_0105, + pci_ss_list_1106_0314, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1108_0108 = { - 0x0108, pci_device_1108_0108, +static const pciDeviceInfo pci_dev_info_1106_0391 = { + 0x0391, pci_device_1106_0391, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1108_0108, + pci_ss_list_1106_0391, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1108_0138 = { - 0x0138, pci_device_1108_0138, +static const pciDeviceInfo pci_dev_info_1106_0501 = { + 0x0501, pci_device_1106_0501, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1108_0138, + pci_ss_list_1106_0501, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1108_0139 = { - 0x0139, pci_device_1108_0139, +static const pciDeviceInfo pci_dev_info_1106_0505 = { + 0x0505, pci_device_1106_0505, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1108_0139, + pci_ss_list_1106_0505, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1108_013c = { - 0x013c, pci_device_1108_013c, +static const pciDeviceInfo pci_dev_info_1106_0561 = { + 0x0561, pci_device_1106_0561, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1108_013c, + pci_ss_list_1106_0561, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1108_013d = { - 0x013d, pci_device_1108_013d, +static const pciDeviceInfo pci_dev_info_1106_0571 = { + 0x0571, pci_device_1106_0571, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1108_013d, + pci_ss_list_1106_0571, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1109_1400 = { - 0x1400, pci_device_1109_1400, +static const pciDeviceInfo pci_dev_info_1106_0576 = { + 0x0576, pci_device_1106_0576, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1109_1400, + pci_ss_list_1106_0576, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_110a_0002 = { - 0x0002, pci_device_110a_0002, +static const pciDeviceInfo pci_dev_info_1106_0585 = { + 0x0585, pci_device_1106_0585, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_0002, + pci_ss_list_1106_0585, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_0005 = { - 0x0005, pci_device_110a_0005, +static const pciDeviceInfo pci_dev_info_1106_0586 = { + 0x0586, pci_device_1106_0586, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_0005, + pci_ss_list_1106_0586, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_0006 = { - 0x0006, pci_device_110a_0006, +static const pciDeviceInfo pci_dev_info_1106_0591 = { + 0x0591, pci_device_1106_0591, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_0006, + pci_ss_list_1106_0591, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_0015 = { - 0x0015, pci_device_110a_0015, +static const pciDeviceInfo pci_dev_info_1106_0595 = { + 0x0595, pci_device_1106_0595, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_0015, + pci_ss_list_1106_0595, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_001d = { - 0x001d, pci_device_110a_001d, +static const pciDeviceInfo pci_dev_info_1106_0596 = { + 0x0596, pci_device_1106_0596, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_001d, + pci_ss_list_1106_0596, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_007b = { - 0x007b, pci_device_110a_007b, +static const pciDeviceInfo pci_dev_info_1106_0597 = { + 0x0597, pci_device_1106_0597, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_007b, + pci_ss_list_1106_0597, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_007c = { - 0x007c, pci_device_110a_007c, +static const pciDeviceInfo pci_dev_info_1106_0598 = { + 0x0598, pci_device_1106_0598, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_007c, + pci_ss_list_1106_0598, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_007d = { - 0x007d, pci_device_110a_007d, +static const pciDeviceInfo pci_dev_info_1106_0601 = { + 0x0601, pci_device_1106_0601, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_007d, + pci_ss_list_1106_0601, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_2102 = { - 0x2102, pci_device_110a_2102, +static const pciDeviceInfo pci_dev_info_1106_0605 = { + 0x0605, pci_device_1106_0605, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_2102, + pci_ss_list_1106_0605, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_2104 = { - 0x2104, pci_device_110a_2104, +static const pciDeviceInfo pci_dev_info_1106_0680 = { + 0x0680, pci_device_1106_0680, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_2104, + pci_ss_list_1106_0680, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_3142 = { - 0x3142, pci_device_110a_3142, +static const pciDeviceInfo pci_dev_info_1106_0686 = { + 0x0686, pci_device_1106_0686, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_3142, + pci_ss_list_1106_0686, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_4021 = { - 0x4021, pci_device_110a_4021, +static const pciDeviceInfo pci_dev_info_1106_0691 = { + 0x0691, pci_device_1106_0691, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_4021, + pci_ss_list_1106_0691, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_4029 = { - 0x4029, pci_device_110a_4029, +static const pciDeviceInfo pci_dev_info_1106_0693 = { + 0x0693, pci_device_1106_0693, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_4029, + pci_ss_list_1106_0693, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_4942 = { - 0x4942, pci_device_110a_4942, +static const pciDeviceInfo pci_dev_info_1106_0698 = { + 0x0698, pci_device_1106_0698, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_4942, + pci_ss_list_1106_0698, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110a_6120 = { - 0x6120, pci_device_110a_6120, +static const pciDeviceInfo pci_dev_info_1106_0926 = { + 0x0926, pci_device_1106_0926, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110a_6120, + pci_ss_list_1106_0926, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_110b_0001 = { - 0x0001, pci_device_110b_0001, +static const pciDeviceInfo pci_dev_info_1106_1000 = { + 0x1000, pci_device_1106_1000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110b_0001, + pci_ss_list_1106_1000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_110b_0004 = { - 0x0004, pci_device_110b_0004, +static const pciDeviceInfo pci_dev_info_1106_1106 = { + 0x1106, pci_device_1106_1106, #ifdef INIT_SUBSYS_INFO - pci_ss_list_110b_0004, + pci_ss_list_1106_1106, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1110_6037 = { - 0x6037, pci_device_1110_6037, +static const pciDeviceInfo pci_dev_info_1106_1204 = { + 0x1204, pci_device_1106_1204, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1110_6037, + pci_ss_list_1106_1204, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1110_6073 = { - 0x6073, pci_device_1110_6073, +static const pciDeviceInfo pci_dev_info_1106_1208 = { + 0x1208, pci_device_1106_1208, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1110_6073, + pci_ss_list_1106_1208, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1112_2200 = { - 0x2200, pci_device_1112_2200, +static const pciDeviceInfo pci_dev_info_1106_1238 = { + 0x1238, pci_device_1106_1238, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1112_2200, + pci_ss_list_1106_1238, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1112_2300 = { - 0x2300, pci_device_1112_2300, +static const pciDeviceInfo pci_dev_info_1106_1258 = { + 0x1258, pci_device_1106_1258, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1112_2300, + pci_ss_list_1106_1258, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1112_2340 = { - 0x2340, pci_device_1112_2340, +static const pciDeviceInfo pci_dev_info_1106_1259 = { + 0x1259, pci_device_1106_1259, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1112_2340, + pci_ss_list_1106_1259, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1112_2400 = { - 0x2400, pci_device_1112_2400, +static const pciDeviceInfo pci_dev_info_1106_1269 = { + 0x1269, pci_device_1106_1269, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1112_2400, + pci_ss_list_1106_1269, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1113_1211 = { - 0x1211, pci_device_1113_1211, +static const pciDeviceInfo pci_dev_info_1106_1282 = { + 0x1282, pci_device_1106_1282, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1113_1211, + pci_ss_list_1106_1282, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1113_1216 = { - 0x1216, pci_device_1113_1216, +static const pciDeviceInfo pci_dev_info_1106_1290 = { + 0x1290, pci_device_1106_1290, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1113_1216, + pci_ss_list_1106_1290, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1113_1217 = { - 0x1217, pci_device_1113_1217, +static const pciDeviceInfo pci_dev_info_1106_1296 = { + 0x1296, pci_device_1106_1296, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1113_1217, + pci_ss_list_1106_1296, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1113_5105 = { - 0x5105, pci_device_1113_5105, +static const pciDeviceInfo pci_dev_info_1106_1308 = { + 0x1308, pci_device_1106_1308, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1113_5105, + pci_ss_list_1106_1308, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1113_9211 = { - 0x9211, pci_device_1113_9211, +static const pciDeviceInfo pci_dev_info_1106_1314 = { + 0x1314, pci_device_1106_1314, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1113_9211, + pci_ss_list_1106_1314, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1113_9511 = { - 0x9511, pci_device_1113_9511, +static const pciDeviceInfo pci_dev_info_1106_1571 = { + 0x1571, pci_device_1106_1571, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1113_9511, + pci_ss_list_1106_1571, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1113_d301 = { - 0xd301, pci_device_1113_d301, +static const pciDeviceInfo pci_dev_info_1106_1595 = { + 0x1595, pci_device_1106_1595, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1113_d301, + pci_ss_list_1106_1595, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1113_ec02 = { - 0xec02, pci_device_1113_ec02, +static const pciDeviceInfo pci_dev_info_1106_2204 = { + 0x2204, pci_device_1106_2204, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1113_ec02, + pci_ss_list_1106_2204, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1114_0506 = { - 0x0506, pci_device_1114_0506, +static const pciDeviceInfo pci_dev_info_1106_2208 = { + 0x2208, pci_device_1106_2208, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1114_0506, + pci_ss_list_1106_2208, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1116_0022 = { - 0x0022, pci_device_1116_0022, +static const pciDeviceInfo pci_dev_info_1106_2238 = { + 0x2238, pci_device_1106_2238, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1116_0022, + pci_ss_list_1106_2238, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1116_0023 = { - 0x0023, pci_device_1116_0023, +static const pciDeviceInfo pci_dev_info_1106_2258 = { + 0x2258, pci_device_1106_2258, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1116_0023, + pci_ss_list_1106_2258, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1116_0024 = { - 0x0024, pci_device_1116_0024, +static const pciDeviceInfo pci_dev_info_1106_2259 = { + 0x2259, pci_device_1106_2259, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1116_0024, + pci_ss_list_1106_2259, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1116_0025 = { - 0x0025, pci_device_1116_0025, +static const pciDeviceInfo pci_dev_info_1106_2269 = { + 0x2269, pci_device_1106_2269, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1116_0025, + pci_ss_list_1106_2269, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1116_0026 = { - 0x0026, pci_device_1116_0026, +static const pciDeviceInfo pci_dev_info_1106_2282 = { + 0x2282, pci_device_1106_2282, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1116_0026, + pci_ss_list_1106_2282, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1116_0027 = { - 0x0027, pci_device_1116_0027, +static const pciDeviceInfo pci_dev_info_1106_2290 = { + 0x2290, pci_device_1106_2290, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1116_0027, + pci_ss_list_1106_2290, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1116_0028 = { - 0x0028, pci_device_1116_0028, +static const pciDeviceInfo pci_dev_info_1106_2296 = { + 0x2296, pci_device_1106_2296, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1116_0028, + pci_ss_list_1106_2296, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1117_9500 = { - 0x9500, pci_device_1117_9500, +static const pciDeviceInfo pci_dev_info_1106_2308 = { + 0x2308, pci_device_1106_2308, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1117_9500, + pci_ss_list_1106_2308, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1117_9501 = { - 0x9501, pci_device_1117_9501, +static const pciDeviceInfo pci_dev_info_1106_2314 = { + 0x2314, pci_device_1106_2314, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1117_9501, + pci_ss_list_1106_2314, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1119_0000 = { - 0x0000, pci_device_1119_0000, +static const pciDeviceInfo pci_dev_info_1106_287a = { + 0x287a, pci_device_1106_287a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0000, + pci_ss_list_1106_287a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0001 = { - 0x0001, pci_device_1119_0001, +static const pciDeviceInfo pci_dev_info_1106_287b = { + 0x287b, pci_device_1106_287b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0001, + pci_ss_list_1106_287b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0002 = { - 0x0002, pci_device_1119_0002, +static const pciDeviceInfo pci_dev_info_1106_287c = { + 0x287c, pci_device_1106_287c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0002, + pci_ss_list_1106_287c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0003 = { - 0x0003, pci_device_1119_0003, +static const pciDeviceInfo pci_dev_info_1106_287d = { + 0x287d, pci_device_1106_287d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0003, + pci_ss_list_1106_287d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0004 = { - 0x0004, pci_device_1119_0004, +static const pciDeviceInfo pci_dev_info_1106_287e = { + 0x287e, pci_device_1106_287e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0004, + pci_ss_list_1106_287e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0005 = { - 0x0005, pci_device_1119_0005, +static const pciDeviceInfo pci_dev_info_1106_3022 = { + 0x3022, pci_device_1106_3022, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0005, + pci_ss_list_1106_3022, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0006 = { - 0x0006, pci_device_1119_0006, +static const pciDeviceInfo pci_dev_info_1106_3038 = { + 0x3038, pci_device_1106_3038, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0006, + pci_ss_list_1106_3038, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0007 = { - 0x0007, pci_device_1119_0007, +static const pciDeviceInfo pci_dev_info_1106_3040 = { + 0x3040, pci_device_1106_3040, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0007, + pci_ss_list_1106_3040, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0008 = { - 0x0008, pci_device_1119_0008, +static const pciDeviceInfo pci_dev_info_1106_3043 = { + 0x3043, pci_device_1106_3043, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0008, + pci_ss_list_1106_3043, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0009 = { - 0x0009, pci_device_1119_0009, +static const pciDeviceInfo pci_dev_info_1106_3044 = { + 0x3044, pci_device_1106_3044, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0009, + pci_ss_list_1106_3044, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_000a = { - 0x000a, pci_device_1119_000a, +static const pciDeviceInfo pci_dev_info_1106_3050 = { + 0x3050, pci_device_1106_3050, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_000a, + pci_ss_list_1106_3050, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_000b = { - 0x000b, pci_device_1119_000b, +static const pciDeviceInfo pci_dev_info_1106_3051 = { + 0x3051, pci_device_1106_3051, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_000b, + pci_ss_list_1106_3051, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_000c = { - 0x000c, pci_device_1119_000c, +static const pciDeviceInfo pci_dev_info_1106_3053 = { + 0x3053, pci_device_1106_3053, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_000c, + pci_ss_list_1106_3053, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_000d = { - 0x000d, pci_device_1119_000d, +static const pciDeviceInfo pci_dev_info_1106_3057 = { + 0x3057, pci_device_1106_3057, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_000d, + pci_ss_list_1106_3057, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0010 = { - 0x0010, pci_device_1119_0010, +static const pciDeviceInfo pci_dev_info_1106_3058 = { + 0x3058, pci_device_1106_3058, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0010, + pci_ss_list_1106_3058, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0011 = { - 0x0011, pci_device_1119_0011, +static const pciDeviceInfo pci_dev_info_1106_3059 = { + 0x3059, pci_device_1106_3059, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0011, + pci_ss_list_1106_3059, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0012 = { - 0x0012, pci_device_1119_0012, +static const pciDeviceInfo pci_dev_info_1106_3065 = { + 0x3065, pci_device_1106_3065, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0012, + pci_ss_list_1106_3065, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0013 = { - 0x0013, pci_device_1119_0013, +static const pciDeviceInfo pci_dev_info_1106_3068 = { + 0x3068, pci_device_1106_3068, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0013, + pci_ss_list_1106_3068, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0100 = { - 0x0100, pci_device_1119_0100, +static const pciDeviceInfo pci_dev_info_1106_3074 = { + 0x3074, pci_device_1106_3074, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0100, + pci_ss_list_1106_3074, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0101 = { - 0x0101, pci_device_1119_0101, +static const pciDeviceInfo pci_dev_info_1106_3091 = { + 0x3091, pci_device_1106_3091, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0101, + pci_ss_list_1106_3091, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0102 = { - 0x0102, pci_device_1119_0102, +static const pciDeviceInfo pci_dev_info_1106_3099 = { + 0x3099, pci_device_1106_3099, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0102, + pci_ss_list_1106_3099, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0103 = { - 0x0103, pci_device_1119_0103, +static const pciDeviceInfo pci_dev_info_1106_3101 = { + 0x3101, pci_device_1106_3101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0103, + pci_ss_list_1106_3101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0104 = { - 0x0104, pci_device_1119_0104, +static const pciDeviceInfo pci_dev_info_1106_3102 = { + 0x3102, pci_device_1106_3102, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0104, + pci_ss_list_1106_3102, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0105 = { - 0x0105, pci_device_1119_0105, +static const pciDeviceInfo pci_dev_info_1106_3103 = { + 0x3103, pci_device_1106_3103, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0105, + pci_ss_list_1106_3103, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0110 = { - 0x0110, pci_device_1119_0110, +static const pciDeviceInfo pci_dev_info_1106_3104 = { + 0x3104, pci_device_1106_3104, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0110, + pci_ss_list_1106_3104, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0111 = { - 0x0111, pci_device_1119_0111, +static const pciDeviceInfo pci_dev_info_1106_3106 = { + 0x3106, pci_device_1106_3106, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0111, + pci_ss_list_1106_3106, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0112 = { - 0x0112, pci_device_1119_0112, +static const pciDeviceInfo pci_dev_info_1106_3108 = { + 0x3108, pci_device_1106_3108, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0112, + pci_ss_list_1106_3108, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0113 = { - 0x0113, pci_device_1119_0113, +static const pciDeviceInfo pci_dev_info_1106_3109 = { + 0x3109, pci_device_1106_3109, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0113, + pci_ss_list_1106_3109, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0114 = { - 0x0114, pci_device_1119_0114, +static const pciDeviceInfo pci_dev_info_1106_3112 = { + 0x3112, pci_device_1106_3112, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0114, + pci_ss_list_1106_3112, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0115 = { - 0x0115, pci_device_1119_0115, +static const pciDeviceInfo pci_dev_info_1106_3113 = { + 0x3113, pci_device_1106_3113, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0115, + pci_ss_list_1106_3113, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0118 = { - 0x0118, pci_device_1119_0118, +static const pciDeviceInfo pci_dev_info_1106_3116 = { + 0x3116, pci_device_1106_3116, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0118, + pci_ss_list_1106_3116, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0119 = { - 0x0119, pci_device_1119_0119, +static const pciDeviceInfo pci_dev_info_1106_3118 = { + 0x3118, pci_device_1106_3118, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0119, + pci_ss_list_1106_3118, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_011a = { - 0x011a, pci_device_1119_011a, +static const pciDeviceInfo pci_dev_info_1106_3119 = { + 0x3119, pci_device_1106_3119, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_011a, + pci_ss_list_1106_3119, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_011b = { - 0x011b, pci_device_1119_011b, +static const pciDeviceInfo pci_dev_info_1106_3122 = { + 0x3122, pci_device_1106_3122, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_011b, + pci_ss_list_1106_3122, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0120 = { - 0x0120, pci_device_1119_0120, +static const pciDeviceInfo pci_dev_info_1106_3123 = { + 0x3123, pci_device_1106_3123, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0120, + pci_ss_list_1106_3123, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0121 = { - 0x0121, pci_device_1119_0121, +static const pciDeviceInfo pci_dev_info_1106_3128 = { + 0x3128, pci_device_1106_3128, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0121, + pci_ss_list_1106_3128, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0122 = { - 0x0122, pci_device_1119_0122, +static const pciDeviceInfo pci_dev_info_1106_3133 = { + 0x3133, pci_device_1106_3133, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0122, + pci_ss_list_1106_3133, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0123 = { - 0x0123, pci_device_1119_0123, +static const pciDeviceInfo pci_dev_info_1106_3147 = { + 0x3147, pci_device_1106_3147, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0123, + pci_ss_list_1106_3147, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0124 = { - 0x0124, pci_device_1119_0124, +static const pciDeviceInfo pci_dev_info_1106_3148 = { + 0x3148, pci_device_1106_3148, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0124, + pci_ss_list_1106_3148, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0125 = { - 0x0125, pci_device_1119_0125, +static const pciDeviceInfo pci_dev_info_1106_3149 = { + 0x3149, pci_device_1106_3149, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0125, + pci_ss_list_1106_3149, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0136 = { - 0x0136, pci_device_1119_0136, +static const pciDeviceInfo pci_dev_info_1106_3156 = { + 0x3156, pci_device_1106_3156, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0136, + pci_ss_list_1106_3156, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0137 = { - 0x0137, pci_device_1119_0137, +static const pciDeviceInfo pci_dev_info_1106_3164 = { + 0x3164, pci_device_1106_3164, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0137, + pci_ss_list_1106_3164, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0138 = { - 0x0138, pci_device_1119_0138, +static const pciDeviceInfo pci_dev_info_1106_3168 = { + 0x3168, pci_device_1106_3168, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0138, + pci_ss_list_1106_3168, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0139 = { - 0x0139, pci_device_1119_0139, +static const pciDeviceInfo pci_dev_info_1106_3177 = { + 0x3177, pci_device_1106_3177, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0139, + pci_ss_list_1106_3177, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_013a = { - 0x013a, pci_device_1119_013a, +static const pciDeviceInfo pci_dev_info_1106_3178 = { + 0x3178, pci_device_1106_3178, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_013a, + pci_ss_list_1106_3178, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_013b = { - 0x013b, pci_device_1119_013b, +static const pciDeviceInfo pci_dev_info_1106_3188 = { + 0x3188, pci_device_1106_3188, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_013b, + pci_ss_list_1106_3188, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_013c = { - 0x013c, pci_device_1119_013c, +static const pciDeviceInfo pci_dev_info_1106_3189 = { + 0x3189, pci_device_1106_3189, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_013c, + pci_ss_list_1106_3189, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_013d = { - 0x013d, pci_device_1119_013d, +static const pciDeviceInfo pci_dev_info_1106_3204 = { + 0x3204, pci_device_1106_3204, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_013d, + pci_ss_list_1106_3204, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_013e = { - 0x013e, pci_device_1119_013e, +static const pciDeviceInfo pci_dev_info_1106_3205 = { + 0x3205, pci_device_1106_3205, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_013e, + pci_ss_list_1106_3205, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_013f = { - 0x013f, pci_device_1119_013f, +static const pciDeviceInfo pci_dev_info_1106_3208 = { + 0x3208, pci_device_1106_3208, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_013f, + pci_ss_list_1106_3208, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0166 = { - 0x0166, pci_device_1119_0166, +static const pciDeviceInfo pci_dev_info_1106_3213 = { + 0x3213, pci_device_1106_3213, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0166, + pci_ss_list_1106_3213, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0167 = { - 0x0167, pci_device_1119_0167, +static const pciDeviceInfo pci_dev_info_1106_3218 = { + 0x3218, pci_device_1106_3218, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0167, + pci_ss_list_1106_3218, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0168 = { - 0x0168, pci_device_1119_0168, +static const pciDeviceInfo pci_dev_info_1106_3227 = { + 0x3227, pci_device_1106_3227, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0168, + pci_ss_list_1106_3227, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0169 = { - 0x0169, pci_device_1119_0169, +static const pciDeviceInfo pci_dev_info_1106_3238 = { + 0x3238, pci_device_1106_3238, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0169, + pci_ss_list_1106_3238, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_016a = { - 0x016a, pci_device_1119_016a, +static const pciDeviceInfo pci_dev_info_1106_3249 = { + 0x3249, pci_device_1106_3249, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_016a, + pci_ss_list_1106_3249, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_016b = { - 0x016b, pci_device_1119_016b, +static const pciDeviceInfo pci_dev_info_1106_3258 = { + 0x3258, pci_device_1106_3258, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_016b, + pci_ss_list_1106_3258, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_016c = { - 0x016c, pci_device_1119_016c, +static const pciDeviceInfo pci_dev_info_1106_3259 = { + 0x3259, pci_device_1106_3259, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_016c, + pci_ss_list_1106_3259, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_016d = { - 0x016d, pci_device_1119_016d, +static const pciDeviceInfo pci_dev_info_1106_3269 = { + 0x3269, pci_device_1106_3269, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_016d, + pci_ss_list_1106_3269, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_016e = { - 0x016e, pci_device_1119_016e, +static const pciDeviceInfo pci_dev_info_1106_3282 = { + 0x3282, pci_device_1106_3282, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_016e, + pci_ss_list_1106_3282, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_016f = { - 0x016f, pci_device_1119_016f, +static const pciDeviceInfo pci_dev_info_1106_3287 = { + 0x3287, pci_device_1106_3287, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_016f, + pci_ss_list_1106_3287, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_01d6 = { - 0x01d6, pci_device_1119_01d6, +static const pciDeviceInfo pci_dev_info_1106_3288 = { + 0x3288, pci_device_1106_3288, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_01d6, + pci_ss_list_1106_3288, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_01d7 = { - 0x01d7, pci_device_1119_01d7, +static const pciDeviceInfo pci_dev_info_1106_3290 = { + 0x3290, pci_device_1106_3290, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_01d7, + pci_ss_list_1106_3290, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_01f6 = { - 0x01f6, pci_device_1119_01f6, +static const pciDeviceInfo pci_dev_info_1106_3296 = { + 0x3296, pci_device_1106_3296, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_01f6, + pci_ss_list_1106_3296, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_01f7 = { - 0x01f7, pci_device_1119_01f7, +static const pciDeviceInfo pci_dev_info_1106_3337 = { + 0x3337, pci_device_1106_3337, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_01f7, + pci_ss_list_1106_3337, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_01fc = { - 0x01fc, pci_device_1119_01fc, +static const pciDeviceInfo pci_dev_info_1106_3344 = { + 0x3344, pci_device_1106_3344, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_01fc, + pci_ss_list_1106_3344, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_01fd = { - 0x01fd, pci_device_1119_01fd, +static const pciDeviceInfo pci_dev_info_1106_3349 = { + 0x3349, pci_device_1106_3349, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_01fd, + pci_ss_list_1106_3349, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_01fe = { - 0x01fe, pci_device_1119_01fe, +static const pciDeviceInfo pci_dev_info_1106_337a = { + 0x337a, pci_device_1106_337a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_01fe, + pci_ss_list_1106_337a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_01ff = { - 0x01ff, pci_device_1119_01ff, +static const pciDeviceInfo pci_dev_info_1106_337b = { + 0x337b, pci_device_1106_337b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_01ff, + pci_ss_list_1106_337b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0210 = { - 0x0210, pci_device_1119_0210, +static const pciDeviceInfo pci_dev_info_1106_4149 = { + 0x4149, pci_device_1106_4149, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0210, + pci_ss_list_1106_4149, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0211 = { - 0x0211, pci_device_1119_0211, +static const pciDeviceInfo pci_dev_info_1106_4204 = { + 0x4204, pci_device_1106_4204, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0211, + pci_ss_list_1106_4204, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0260 = { - 0x0260, pci_device_1119_0260, +static const pciDeviceInfo pci_dev_info_1106_4208 = { + 0x4208, pci_device_1106_4208, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0260, + pci_ss_list_1106_4208, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0261 = { - 0x0261, pci_device_1119_0261, +static const pciDeviceInfo pci_dev_info_1106_4238 = { + 0x4238, pci_device_1106_4238, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0261, + pci_ss_list_1106_4238, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_02ff = { - 0x02ff, pci_device_1119_02ff, +static const pciDeviceInfo pci_dev_info_1106_4258 = { + 0x4258, pci_device_1106_4258, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_02ff, + pci_ss_list_1106_4258, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1119_0300 = { - 0x0300, pci_device_1119_0300, +static const pciDeviceInfo pci_dev_info_1106_4259 = { + 0x4259, pci_device_1106_4259, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1119_0300, + pci_ss_list_1106_4259, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_111a_0000 = { - 0x0000, pci_device_111a_0000, +static const pciDeviceInfo pci_dev_info_1106_4269 = { + 0x4269, pci_device_1106_4269, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111a_0000, + pci_ss_list_1106_4269, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_111a_0002 = { - 0x0002, pci_device_111a_0002, +static const pciDeviceInfo pci_dev_info_1106_4282 = { + 0x4282, pci_device_1106_4282, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111a_0002, + pci_ss_list_1106_4282, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_111a_0003 = { - 0x0003, pci_device_111a_0003, +static const pciDeviceInfo pci_dev_info_1106_4290 = { + 0x4290, pci_device_1106_4290, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111a_0003, + pci_ss_list_1106_4290, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_111a_0005 = { - 0x0005, pci_device_111a_0005, +static const pciDeviceInfo pci_dev_info_1106_4296 = { + 0x4296, pci_device_1106_4296, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111a_0005, + pci_ss_list_1106_4296, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_111a_0007 = { - 0x0007, pci_device_111a_0007, +static const pciDeviceInfo pci_dev_info_1106_4308 = { + 0x4308, pci_device_1106_4308, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111a_0007, + pci_ss_list_1106_4308, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_111a_1203 = { - 0x1203, pci_device_111a_1203, +static const pciDeviceInfo pci_dev_info_1106_4314 = { + 0x4314, pci_device_1106_4314, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111a_1203, + pci_ss_list_1106_4314, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_111c_0001 = { - 0x0001, pci_device_111c_0001, +static const pciDeviceInfo pci_dev_info_1106_5030 = { + 0x5030, pci_device_1106_5030, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111c_0001, + pci_ss_list_1106_5030, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_111d_0001 = { - 0x0001, pci_device_111d_0001, +static const pciDeviceInfo pci_dev_info_1106_5208 = { + 0x5208, pci_device_1106_5208, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111d_0001, + pci_ss_list_1106_5208, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_111d_0003 = { - 0x0003, pci_device_111d_0003, +static const pciDeviceInfo pci_dev_info_1106_5238 = { + 0x5238, pci_device_1106_5238, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111d_0003, + pci_ss_list_1106_5238, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_111d_0004 = { - 0x0004, pci_device_111d_0004, +static const pciDeviceInfo pci_dev_info_1106_5290 = { + 0x5290, pci_device_1106_5290, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111d_0004, + pci_ss_list_1106_5290, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_111d_0005 = { - 0x0005, pci_device_111d_0005, +static const pciDeviceInfo pci_dev_info_1106_5308 = { + 0x5308, pci_device_1106_5308, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111d_0005, + pci_ss_list_1106_5308, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_111f_4a47 = { - 0x4a47, pci_device_111f_4a47, +static const pciDeviceInfo pci_dev_info_1106_6100 = { + 0x6100, pci_device_1106_6100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111f_4a47, + pci_ss_list_1106_6100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_111f_5243 = { - 0x5243, pci_device_111f_5243, +static const pciDeviceInfo pci_dev_info_1106_7204 = { + 0x7204, pci_device_1106_7204, #ifdef INIT_SUBSYS_INFO - pci_ss_list_111f_5243, + pci_ss_list_1106_7204, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1127_0200 = { - 0x0200, pci_device_1127_0200, +static const pciDeviceInfo pci_dev_info_1106_7205 = { + 0x7205, pci_device_1106_7205, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1127_0200, + pci_ss_list_1106_7205, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1127_0210 = { - 0x0210, pci_device_1127_0210, +static const pciDeviceInfo pci_dev_info_1106_7208 = { + 0x7208, pci_device_1106_7208, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1127_0210, + pci_ss_list_1106_7208, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1127_0250 = { - 0x0250, pci_device_1127_0250, +static const pciDeviceInfo pci_dev_info_1106_7238 = { + 0x7238, pci_device_1106_7238, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1127_0250, + pci_ss_list_1106_7238, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1127_0300 = { - 0x0300, pci_device_1127_0300, +static const pciDeviceInfo pci_dev_info_1106_7258 = { + 0x7258, pci_device_1106_7258, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1127_0300, + pci_ss_list_1106_7258, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1127_0310 = { - 0x0310, pci_device_1127_0310, +static const pciDeviceInfo pci_dev_info_1106_7259 = { + 0x7259, pci_device_1106_7259, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1127_0310, + pci_ss_list_1106_7259, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1127_0400 = { - 0x0400, pci_device_1127_0400, +static const pciDeviceInfo pci_dev_info_1106_7269 = { + 0x7269, pci_device_1106_7269, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1127_0400, + pci_ss_list_1106_7269, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_112f_0000 = { - 0x0000, pci_device_112f_0000, +static const pciDeviceInfo pci_dev_info_1106_7282 = { + 0x7282, pci_device_1106_7282, #ifdef INIT_SUBSYS_INFO - pci_ss_list_112f_0000, + pci_ss_list_1106_7282, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_112f_0001 = { - 0x0001, pci_device_112f_0001, +static const pciDeviceInfo pci_dev_info_1106_7290 = { + 0x7290, pci_device_1106_7290, #ifdef INIT_SUBSYS_INFO - pci_ss_list_112f_0001, + pci_ss_list_1106_7290, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1131_1561 = { - 0x1561, pci_device_1131_1561, +static const pciDeviceInfo pci_dev_info_1106_7296 = { + 0x7296, pci_device_1106_7296, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1131_1561, + pci_ss_list_1106_7296, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1131_1562 = { - 0x1562, pci_device_1131_1562, +static const pciDeviceInfo pci_dev_info_1106_7308 = { + 0x7308, pci_device_1106_7308, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1131_1562, + pci_ss_list_1106_7308, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1131_3400 = { - 0x3400, pci_device_1131_3400, +static const pciDeviceInfo pci_dev_info_1106_7314 = { + 0x7314, pci_device_1106_7314, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1131_3400, + pci_ss_list_1106_7314, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1131_5400 = { - 0x5400, pci_device_1131_5400, +static const pciDeviceInfo pci_dev_info_1106_8231 = { + 0x8231, pci_device_1106_8231, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1131_5400, + pci_ss_list_1106_8231, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1131_5402 = { - 0x5402, pci_device_1131_5402, +static const pciDeviceInfo pci_dev_info_1106_8235 = { + 0x8235, pci_device_1106_8235, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1131_5402, + pci_ss_list_1106_8235, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1131_7130 = { - 0x7130, pci_device_1131_7130, +static const pciDeviceInfo pci_dev_info_1106_8305 = { + 0x8305, pci_device_1106_8305, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1131_7130, + pci_ss_list_1106_8305, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1131_7133 = { - 0x7133, pci_device_1131_7133, +static const pciDeviceInfo pci_dev_info_1106_8391 = { + 0x8391, pci_device_1106_8391, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1131_7133, + pci_ss_list_1106_8391, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1131_7134 = { - 0x7134, pci_device_1131_7134, +static const pciDeviceInfo pci_dev_info_1106_8501 = { + 0x8501, pci_device_1106_8501, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1131_7134, + pci_ss_list_1106_8501, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1131_7135 = { - 0x7135, pci_device_1131_7135, +static const pciDeviceInfo pci_dev_info_1106_8596 = { + 0x8596, pci_device_1106_8596, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1131_7135, + pci_ss_list_1106_8596, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1131_7145 = { - 0x7145, pci_device_1131_7145, +static const pciDeviceInfo pci_dev_info_1106_8597 = { + 0x8597, pci_device_1106_8597, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1131_7145, + pci_ss_list_1106_8597, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1131_7146 = { - 0x7146, pci_device_1131_7146, +static const pciDeviceInfo pci_dev_info_1106_8598 = { + 0x8598, pci_device_1106_8598, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1131_7146, + pci_ss_list_1106_8598, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1133_7901 = { - 0x7901, pci_device_1133_7901, +static const pciDeviceInfo pci_dev_info_1106_8601 = { + 0x8601, pci_device_1106_8601, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_7901, + pci_ss_list_1106_8601, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_7902 = { - 0x7902, pci_device_1133_7902, +static const pciDeviceInfo pci_dev_info_1106_8605 = { + 0x8605, pci_device_1106_8605, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_7902, + pci_ss_list_1106_8605, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_7911 = { - 0x7911, pci_device_1133_7911, +static const pciDeviceInfo pci_dev_info_1106_8691 = { + 0x8691, pci_device_1106_8691, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_7911, + pci_ss_list_1106_8691, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_7912 = { - 0x7912, pci_device_1133_7912, +static const pciDeviceInfo pci_dev_info_1106_8693 = { + 0x8693, pci_device_1106_8693, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_7912, + pci_ss_list_1106_8693, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_7941 = { - 0x7941, pci_device_1133_7941, +static const pciDeviceInfo pci_dev_info_1106_a208 = { + 0xa208, pci_device_1106_a208, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_7941, + pci_ss_list_1106_a208, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_7942 = { - 0x7942, pci_device_1133_7942, +static const pciDeviceInfo pci_dev_info_1106_a238 = { + 0xa238, pci_device_1106_a238, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_7942, + pci_ss_list_1106_a238, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_7943 = { - 0x7943, pci_device_1133_7943, +static const pciDeviceInfo pci_dev_info_1106_b091 = { + 0xb091, pci_device_1106_b091, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_7943, + pci_ss_list_1106_b091, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_7944 = { - 0x7944, pci_device_1133_7944, +static const pciDeviceInfo pci_dev_info_1106_b099 = { + 0xb099, pci_device_1106_b099, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_7944, + pci_ss_list_1106_b099, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_b921 = { - 0xb921, pci_device_1133_b921, +static const pciDeviceInfo pci_dev_info_1106_b101 = { + 0xb101, pci_device_1106_b101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_b921, + pci_ss_list_1106_b101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_b922 = { - 0xb922, pci_device_1133_b922, +static const pciDeviceInfo pci_dev_info_1106_b102 = { + 0xb102, pci_device_1106_b102, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_b922, + pci_ss_list_1106_b102, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_b923 = { - 0xb923, pci_device_1133_b923, +static const pciDeviceInfo pci_dev_info_1106_b103 = { + 0xb103, pci_device_1106_b103, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_b923, + pci_ss_list_1106_b103, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e001 = { - 0xe001, pci_device_1133_e001, +static const pciDeviceInfo pci_dev_info_1106_b112 = { + 0xb112, pci_device_1106_b112, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e001, + pci_ss_list_1106_b112, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e002 = { - 0xe002, pci_device_1133_e002, +static const pciDeviceInfo pci_dev_info_1106_b113 = { + 0xb113, pci_device_1106_b113, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e002, + pci_ss_list_1106_b113, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e003 = { - 0xe003, pci_device_1133_e003, +static const pciDeviceInfo pci_dev_info_1106_b115 = { + 0xb115, pci_device_1106_b115, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e003, + pci_ss_list_1106_b115, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e004 = { - 0xe004, pci_device_1133_e004, +static const pciDeviceInfo pci_dev_info_1106_b168 = { + 0xb168, pci_device_1106_b168, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e004, + pci_ss_list_1106_b168, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e005 = { - 0xe005, pci_device_1133_e005, +static const pciDeviceInfo pci_dev_info_1106_b188 = { + 0xb188, pci_device_1106_b188, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e005, + pci_ss_list_1106_b188, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e006 = { - 0xe006, pci_device_1133_e006, +static const pciDeviceInfo pci_dev_info_1106_b198 = { + 0xb198, pci_device_1106_b198, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e006, + pci_ss_list_1106_b198, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e007 = { - 0xe007, pci_device_1133_e007, +static const pciDeviceInfo pci_dev_info_1106_b213 = { + 0xb213, pci_device_1106_b213, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e007, + pci_ss_list_1106_b213, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e008 = { - 0xe008, pci_device_1133_e008, +static const pciDeviceInfo pci_dev_info_1106_c208 = { + 0xc208, pci_device_1106_c208, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e008, + pci_ss_list_1106_c208, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e009 = { - 0xe009, pci_device_1133_e009, +static const pciDeviceInfo pci_dev_info_1106_c238 = { + 0xc238, pci_device_1106_c238, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e009, + pci_ss_list_1106_c238, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e00a = { - 0xe00a, pci_device_1133_e00a, +static const pciDeviceInfo pci_dev_info_1106_d104 = { + 0xd104, pci_device_1106_d104, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e00a, + pci_ss_list_1106_d104, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e00b = { - 0xe00b, pci_device_1133_e00b, +static const pciDeviceInfo pci_dev_info_1106_d208 = { + 0xd208, pci_device_1106_d208, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e00b, + pci_ss_list_1106_d208, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e00c = { - 0xe00c, pci_device_1133_e00c, +static const pciDeviceInfo pci_dev_info_1106_d213 = { + 0xd213, pci_device_1106_d213, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e00c, + pci_ss_list_1106_d213, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e00d = { - 0xe00d, pci_device_1133_e00d, +static const pciDeviceInfo pci_dev_info_1106_d238 = { + 0xd238, pci_device_1106_d238, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e00d, + pci_ss_list_1106_d238, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e00e = { - 0xe00e, pci_device_1133_e00e, +static const pciDeviceInfo pci_dev_info_1106_e208 = { + 0xe208, pci_device_1106_e208, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e00e, + pci_ss_list_1106_e208, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e010 = { - 0xe010, pci_device_1133_e010, +static const pciDeviceInfo pci_dev_info_1106_e238 = { + 0xe238, pci_device_1106_e238, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e010, + pci_ss_list_1106_e238, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e011 = { - 0xe011, pci_device_1133_e011, +static const pciDeviceInfo pci_dev_info_1106_f208 = { + 0xf208, pci_device_1106_f208, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e011, + pci_ss_list_1106_f208, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e012 = { - 0xe012, pci_device_1133_e012, +static const pciDeviceInfo pci_dev_info_1106_f238 = { + 0xf238, pci_device_1106_f238, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e012, + pci_ss_list_1106_f238, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e013 = { - 0xe013, pci_device_1133_e013, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e013, -#else - NULL, #endif - 0 -}; -static const pciDeviceInfo pci_dev_info_1133_e014 = { - 0xe014, pci_device_1133_e014, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1107_0576 = { + 0x0576, pci_device_1107_0576, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e014, + pci_ss_list_1107_0576, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e015 = { - 0xe015, pci_device_1133_e015, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1108_0100 = { + 0x0100, pci_device_1108_0100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e015, + pci_ss_list_1108_0100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e016 = { - 0xe016, pci_device_1133_e016, +static const pciDeviceInfo pci_dev_info_1108_0101 = { + 0x0101, pci_device_1108_0101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e016, + pci_ss_list_1108_0101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e017 = { - 0xe017, pci_device_1133_e017, +static const pciDeviceInfo pci_dev_info_1108_0105 = { + 0x0105, pci_device_1108_0105, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e017, + pci_ss_list_1108_0105, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e018 = { - 0xe018, pci_device_1133_e018, +static const pciDeviceInfo pci_dev_info_1108_0108 = { + 0x0108, pci_device_1108_0108, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e018, + pci_ss_list_1108_0108, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e019 = { - 0xe019, pci_device_1133_e019, +static const pciDeviceInfo pci_dev_info_1108_0138 = { + 0x0138, pci_device_1108_0138, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e019, + pci_ss_list_1108_0138, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e01a = { - 0xe01a, pci_device_1133_e01a, +static const pciDeviceInfo pci_dev_info_1108_0139 = { + 0x0139, pci_device_1108_0139, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e01a, + pci_ss_list_1108_0139, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e01b = { - 0xe01b, pci_device_1133_e01b, +static const pciDeviceInfo pci_dev_info_1108_013c = { + 0x013c, pci_device_1108_013c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e01b, + pci_ss_list_1108_013c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e01c = { - 0xe01c, pci_device_1133_e01c, +static const pciDeviceInfo pci_dev_info_1108_013d = { + 0x013d, pci_device_1108_013d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e01c, + pci_ss_list_1108_013d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e01e = { - 0xe01e, pci_device_1133_e01e, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1109_1400 = { + 0x1400, pci_device_1109_1400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e01e, + pci_ss_list_1109_1400, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e020 = { - 0xe020, pci_device_1133_e020, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_110a_0002 = { + 0x0002, pci_device_110a_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e020, + pci_ss_list_110a_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e024 = { - 0xe024, pci_device_1133_e024, +static const pciDeviceInfo pci_dev_info_110a_0005 = { + 0x0005, pci_device_110a_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e024, + pci_ss_list_110a_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1133_e028 = { - 0xe028, pci_device_1133_e028, +static const pciDeviceInfo pci_dev_info_110a_0006 = { + 0x0006, pci_device_110a_0006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1133_e028, + pci_ss_list_110a_0006, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1134_0001 = { - 0x0001, pci_device_1134_0001, +static const pciDeviceInfo pci_dev_info_110a_0015 = { + 0x0015, pci_device_110a_0015, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1134_0001, + pci_ss_list_110a_0015, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1134_0002 = { - 0x0002, pci_device_1134_0002, +static const pciDeviceInfo pci_dev_info_110a_001d = { + 0x001d, pci_device_110a_001d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1134_0002, + pci_ss_list_110a_001d, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1135_0001 = { - 0x0001, pci_device_1135_0001, +static const pciDeviceInfo pci_dev_info_110a_007b = { + 0x007b, pci_device_110a_007b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1135_0001, + pci_ss_list_110a_007b, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1138_8905 = { - 0x8905, pci_device_1138_8905, +static const pciDeviceInfo pci_dev_info_110a_007c = { + 0x007c, pci_device_110a_007c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1138_8905, + pci_ss_list_110a_007c, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1139_0001 = { - 0x0001, pci_device_1139_0001, +static const pciDeviceInfo pci_dev_info_110a_007d = { + 0x007d, pci_device_110a_007d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1139_0001, + pci_ss_list_110a_007d, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_113c_0000 = { - 0x0000, pci_device_113c_0000, +static const pciDeviceInfo pci_dev_info_110a_2101 = { + 0x2101, pci_device_110a_2101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113c_0000, + pci_ss_list_110a_2101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_113c_0001 = { - 0x0001, pci_device_113c_0001, +static const pciDeviceInfo pci_dev_info_110a_2102 = { + 0x2102, pci_device_110a_2102, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113c_0001, + pci_ss_list_110a_2102, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_113c_0911 = { - 0x0911, pci_device_113c_0911, +static const pciDeviceInfo pci_dev_info_110a_2104 = { + 0x2104, pci_device_110a_2104, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113c_0911, + pci_ss_list_110a_2104, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_113c_0912 = { - 0x0912, pci_device_113c_0912, +static const pciDeviceInfo pci_dev_info_110a_3142 = { + 0x3142, pci_device_110a_3142, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113c_0912, + pci_ss_list_110a_3142, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_113c_0913 = { - 0x0913, pci_device_113c_0913, +static const pciDeviceInfo pci_dev_info_110a_4021 = { + 0x4021, pci_device_110a_4021, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113c_0913, + pci_ss_list_110a_4021, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_113c_0914 = { - 0x0914, pci_device_113c_0914, +static const pciDeviceInfo pci_dev_info_110a_4029 = { + 0x4029, pci_device_110a_4029, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113c_0914, + pci_ss_list_110a_4029, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_113f_0808 = { - 0x0808, pci_device_113f_0808, +static const pciDeviceInfo pci_dev_info_110a_4942 = { + 0x4942, pci_device_110a_4942, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113f_0808, + pci_ss_list_110a_4942, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_113f_1010 = { - 0x1010, pci_device_113f_1010, +static const pciDeviceInfo pci_dev_info_110a_6120 = { + 0x6120, pci_device_110a_6120, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113f_1010, + pci_ss_list_110a_6120, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_113f_80c0 = { - 0x80c0, pci_device_113f_80c0, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_110b_0001 = { + 0x0001, pci_device_110b_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113f_80c0, + pci_ss_list_110b_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_113f_80c4 = { - 0x80c4, pci_device_113f_80c4, +static const pciDeviceInfo pci_dev_info_110b_0004 = { + 0x0004, pci_device_110b_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113f_80c4, + pci_ss_list_110b_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_113f_80c8 = { - 0x80c8, pci_device_113f_80c8, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1110_6037 = { + 0x6037, pci_device_1110_6037, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113f_80c8, + pci_ss_list_1110_6037, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_113f_8888 = { - 0x8888, pci_device_113f_8888, +static const pciDeviceInfo pci_dev_info_1110_6073 = { + 0x6073, pci_device_1110_6073, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113f_8888, + pci_ss_list_1110_6073, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_113f_9090 = { - 0x9090, pci_device_113f_9090, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1112_2200 = { + 0x2200, pci_device_1112_2200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_113f_9090, + pci_ss_list_1112_2200, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_1142_3210 = { - 0x3210, pci_device_1142_3210, +static const pciDeviceInfo pci_dev_info_1112_2300 = { + 0x2300, pci_device_1112_2300, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1142_3210, + pci_ss_list_1112_2300, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1142_6422 = { - 0x6422, pci_device_1142_6422, +static const pciDeviceInfo pci_dev_info_1112_2340 = { + 0x2340, pci_device_1112_2340, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1142_6422, + pci_ss_list_1112_2340, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1142_6424 = { - 0x6424, pci_device_1142_6424, +static const pciDeviceInfo pci_dev_info_1112_2400 = { + 0x2400, pci_device_1112_2400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1142_6424, + pci_ss_list_1112_2400, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1142_6425 = { - 0x6425, pci_device_1142_6425, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1113_1211 = { + 0x1211, pci_device_1113_1211, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1142_6425, + pci_ss_list_1113_1211, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1142_643d = { - 0x643d, pci_device_1142_643d, +static const pciDeviceInfo pci_dev_info_1113_1216 = { + 0x1216, pci_device_1113_1216, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1142_643d, + pci_ss_list_1113_1216, #else NULL, #endif 0 }; -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1144_0001 = { - 0x0001, pci_device_1144_0001, +static const pciDeviceInfo pci_dev_info_1113_1217 = { + 0x1217, pci_device_1113_1217, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1144_0001, + pci_ss_list_1113_1217, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1145_8007 = { - 0x8007, pci_device_1145_8007, +static const pciDeviceInfo pci_dev_info_1113_5105 = { + 0x5105, pci_device_1113_5105, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1145_8007, + pci_ss_list_1113_5105, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1145_f007 = { - 0xf007, pci_device_1145_f007, +static const pciDeviceInfo pci_dev_info_1113_9211 = { + 0x9211, pci_device_1113_9211, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1145_f007, + pci_ss_list_1113_9211, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1145_f010 = { - 0xf010, pci_device_1145_f010, +static const pciDeviceInfo pci_dev_info_1113_9511 = { + 0x9511, pci_device_1113_9511, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1145_f010, + pci_ss_list_1113_9511, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1145_f012 = { - 0xf012, pci_device_1145_f012, +static const pciDeviceInfo pci_dev_info_1113_d301 = { + 0xd301, pci_device_1113_d301, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1145_f012, + pci_ss_list_1113_d301, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1145_f013 = { - 0xf013, pci_device_1145_f013, +static const pciDeviceInfo pci_dev_info_1113_ec02 = { + 0xec02, pci_device_1113_ec02, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1145_f013, + pci_ss_list_1113_ec02, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1145_f015 = { - 0xf015, pci_device_1145_f015, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1114_0506 = { + 0x0506, pci_device_1114_0506, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1145_f015, + pci_ss_list_1114_0506, #else NULL, #endif @@ -70177,64 +83496,64 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1148_4000 = { - 0x4000, pci_device_1148_4000, +static const pciDeviceInfo pci_dev_info_1116_0022 = { + 0x0022, pci_device_1116_0022, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1148_4000, + pci_ss_list_1116_0022, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1148_4200 = { - 0x4200, pci_device_1148_4200, +static const pciDeviceInfo pci_dev_info_1116_0023 = { + 0x0023, pci_device_1116_0023, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1148_4200, + pci_ss_list_1116_0023, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1148_4300 = { - 0x4300, pci_device_1148_4300, +static const pciDeviceInfo pci_dev_info_1116_0024 = { + 0x0024, pci_device_1116_0024, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1148_4300, + pci_ss_list_1116_0024, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1148_4320 = { - 0x4320, pci_device_1148_4320, +static const pciDeviceInfo pci_dev_info_1116_0025 = { + 0x0025, pci_device_1116_0025, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1148_4320, + pci_ss_list_1116_0025, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1148_4400 = { - 0x4400, pci_device_1148_4400, +static const pciDeviceInfo pci_dev_info_1116_0026 = { + 0x0026, pci_device_1116_0026, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1148_4400, + pci_ss_list_1116_0026, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1148_4500 = { - 0x4500, pci_device_1148_4500, +static const pciDeviceInfo pci_dev_info_1116_0027 = { + 0x0027, pci_device_1116_0027, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1148_4500, + pci_ss_list_1116_0027, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1148_9e00 = { - 0x9e00, pci_device_1148_9e00, +static const pciDeviceInfo pci_dev_info_1116_0028 = { + 0x0028, pci_device_1116_0028, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1148_9e00, + pci_ss_list_1116_0028, #else NULL, #endif @@ -70242,868 +83561,868 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_114a_5579 = { - 0x5579, pci_device_114a_5579, +static const pciDeviceInfo pci_dev_info_1117_9500 = { + 0x9500, pci_device_1117_9500, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114a_5579, + pci_ss_list_1117_9500, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114a_5587 = { - 0x5587, pci_device_114a_5587, +static const pciDeviceInfo pci_dev_info_1117_9501 = { + 0x9501, pci_device_1117_9501, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114a_5587, + pci_ss_list_1117_9501, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114a_6504 = { - 0x6504, pci_device_114a_6504, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1119_0000 = { + 0x0000, pci_device_1119_0000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114a_6504, + pci_ss_list_1119_0000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114a_7587 = { - 0x7587, pci_device_114a_7587, +static const pciDeviceInfo pci_dev_info_1119_0001 = { + 0x0001, pci_device_1119_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114a_7587, + pci_ss_list_1119_0001, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_114f_0002 = { - 0x0002, pci_device_114f_0002, +static const pciDeviceInfo pci_dev_info_1119_0002 = { + 0x0002, pci_device_1119_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0002, + pci_ss_list_1119_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0003 = { - 0x0003, pci_device_114f_0003, +static const pciDeviceInfo pci_dev_info_1119_0003 = { + 0x0003, pci_device_1119_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0003, + pci_ss_list_1119_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0004 = { - 0x0004, pci_device_114f_0004, +static const pciDeviceInfo pci_dev_info_1119_0004 = { + 0x0004, pci_device_1119_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0004, + pci_ss_list_1119_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0005 = { - 0x0005, pci_device_114f_0005, +static const pciDeviceInfo pci_dev_info_1119_0005 = { + 0x0005, pci_device_1119_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0005, + pci_ss_list_1119_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0006 = { - 0x0006, pci_device_114f_0006, +static const pciDeviceInfo pci_dev_info_1119_0006 = { + 0x0006, pci_device_1119_0006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0006, + pci_ss_list_1119_0006, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0009 = { - 0x0009, pci_device_114f_0009, +static const pciDeviceInfo pci_dev_info_1119_0007 = { + 0x0007, pci_device_1119_0007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0009, + pci_ss_list_1119_0007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_000a = { - 0x000a, pci_device_114f_000a, +static const pciDeviceInfo pci_dev_info_1119_0008 = { + 0x0008, pci_device_1119_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_000a, + pci_ss_list_1119_0008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_000c = { - 0x000c, pci_device_114f_000c, +static const pciDeviceInfo pci_dev_info_1119_0009 = { + 0x0009, pci_device_1119_0009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_000c, + pci_ss_list_1119_0009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_000d = { - 0x000d, pci_device_114f_000d, +static const pciDeviceInfo pci_dev_info_1119_000a = { + 0x000a, pci_device_1119_000a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_000d, + pci_ss_list_1119_000a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0011 = { - 0x0011, pci_device_114f_0011, +static const pciDeviceInfo pci_dev_info_1119_000b = { + 0x000b, pci_device_1119_000b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0011, + pci_ss_list_1119_000b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0012 = { - 0x0012, pci_device_114f_0012, +static const pciDeviceInfo pci_dev_info_1119_000c = { + 0x000c, pci_device_1119_000c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0012, + pci_ss_list_1119_000c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0013 = { - 0x0013, pci_device_114f_0013, +static const pciDeviceInfo pci_dev_info_1119_000d = { + 0x000d, pci_device_1119_000d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0013, + pci_ss_list_1119_000d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0014 = { - 0x0014, pci_device_114f_0014, +static const pciDeviceInfo pci_dev_info_1119_0010 = { + 0x0010, pci_device_1119_0010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0014, + pci_ss_list_1119_0010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0015 = { - 0x0015, pci_device_114f_0015, +static const pciDeviceInfo pci_dev_info_1119_0011 = { + 0x0011, pci_device_1119_0011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0015, + pci_ss_list_1119_0011, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0016 = { - 0x0016, pci_device_114f_0016, +static const pciDeviceInfo pci_dev_info_1119_0012 = { + 0x0012, pci_device_1119_0012, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0016, + pci_ss_list_1119_0012, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0017 = { - 0x0017, pci_device_114f_0017, +static const pciDeviceInfo pci_dev_info_1119_0013 = { + 0x0013, pci_device_1119_0013, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0017, + pci_ss_list_1119_0013, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_001a = { - 0x001a, pci_device_114f_001a, +static const pciDeviceInfo pci_dev_info_1119_0100 = { + 0x0100, pci_device_1119_0100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_001a, + pci_ss_list_1119_0100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_001b = { - 0x001b, pci_device_114f_001b, +static const pciDeviceInfo pci_dev_info_1119_0101 = { + 0x0101, pci_device_1119_0101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_001b, + pci_ss_list_1119_0101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_001d = { - 0x001d, pci_device_114f_001d, +static const pciDeviceInfo pci_dev_info_1119_0102 = { + 0x0102, pci_device_1119_0102, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_001d, + pci_ss_list_1119_0102, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0023 = { - 0x0023, pci_device_114f_0023, +static const pciDeviceInfo pci_dev_info_1119_0103 = { + 0x0103, pci_device_1119_0103, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0023, + pci_ss_list_1119_0103, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0024 = { - 0x0024, pci_device_114f_0024, +static const pciDeviceInfo pci_dev_info_1119_0104 = { + 0x0104, pci_device_1119_0104, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0024, + pci_ss_list_1119_0104, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0026 = { - 0x0026, pci_device_114f_0026, +static const pciDeviceInfo pci_dev_info_1119_0105 = { + 0x0105, pci_device_1119_0105, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0026, + pci_ss_list_1119_0105, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0027 = { - 0x0027, pci_device_114f_0027, +static const pciDeviceInfo pci_dev_info_1119_0110 = { + 0x0110, pci_device_1119_0110, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0027, + pci_ss_list_1119_0110, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0028 = { - 0x0028, pci_device_114f_0028, +static const pciDeviceInfo pci_dev_info_1119_0111 = { + 0x0111, pci_device_1119_0111, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0028, + pci_ss_list_1119_0111, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0029 = { - 0x0029, pci_device_114f_0029, +static const pciDeviceInfo pci_dev_info_1119_0112 = { + 0x0112, pci_device_1119_0112, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0029, + pci_ss_list_1119_0112, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0034 = { - 0x0034, pci_device_114f_0034, +static const pciDeviceInfo pci_dev_info_1119_0113 = { + 0x0113, pci_device_1119_0113, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0034, + pci_ss_list_1119_0113, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0035 = { - 0x0035, pci_device_114f_0035, +static const pciDeviceInfo pci_dev_info_1119_0114 = { + 0x0114, pci_device_1119_0114, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0035, + pci_ss_list_1119_0114, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0040 = { - 0x0040, pci_device_114f_0040, +static const pciDeviceInfo pci_dev_info_1119_0115 = { + 0x0115, pci_device_1119_0115, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0040, + pci_ss_list_1119_0115, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0042 = { - 0x0042, pci_device_114f_0042, +static const pciDeviceInfo pci_dev_info_1119_0118 = { + 0x0118, pci_device_1119_0118, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0042, + pci_ss_list_1119_0118, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0043 = { - 0x0043, pci_device_114f_0043, +static const pciDeviceInfo pci_dev_info_1119_0119 = { + 0x0119, pci_device_1119_0119, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0043, + pci_ss_list_1119_0119, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0044 = { - 0x0044, pci_device_114f_0044, +static const pciDeviceInfo pci_dev_info_1119_011a = { + 0x011a, pci_device_1119_011a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0044, + pci_ss_list_1119_011a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0045 = { - 0x0045, pci_device_114f_0045, +static const pciDeviceInfo pci_dev_info_1119_011b = { + 0x011b, pci_device_1119_011b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0045, + pci_ss_list_1119_011b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_004e = { - 0x004e, pci_device_114f_004e, +static const pciDeviceInfo pci_dev_info_1119_0120 = { + 0x0120, pci_device_1119_0120, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_004e, + pci_ss_list_1119_0120, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0070 = { - 0x0070, pci_device_114f_0070, +static const pciDeviceInfo pci_dev_info_1119_0121 = { + 0x0121, pci_device_1119_0121, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0070, + pci_ss_list_1119_0121, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0071 = { - 0x0071, pci_device_114f_0071, +static const pciDeviceInfo pci_dev_info_1119_0122 = { + 0x0122, pci_device_1119_0122, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0071, + pci_ss_list_1119_0122, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0072 = { - 0x0072, pci_device_114f_0072, +static const pciDeviceInfo pci_dev_info_1119_0123 = { + 0x0123, pci_device_1119_0123, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0072, + pci_ss_list_1119_0123, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_0073 = { - 0x0073, pci_device_114f_0073, +static const pciDeviceInfo pci_dev_info_1119_0124 = { + 0x0124, pci_device_1119_0124, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_0073, + pci_ss_list_1119_0124, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_00b0 = { - 0x00b0, pci_device_114f_00b0, +static const pciDeviceInfo pci_dev_info_1119_0125 = { + 0x0125, pci_device_1119_0125, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_00b0, + pci_ss_list_1119_0125, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_00b1 = { - 0x00b1, pci_device_114f_00b1, +static const pciDeviceInfo pci_dev_info_1119_0136 = { + 0x0136, pci_device_1119_0136, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_00b1, + pci_ss_list_1119_0136, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_00c8 = { - 0x00c8, pci_device_114f_00c8, +static const pciDeviceInfo pci_dev_info_1119_0137 = { + 0x0137, pci_device_1119_0137, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_00c8, + pci_ss_list_1119_0137, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_00c9 = { - 0x00c9, pci_device_114f_00c9, +static const pciDeviceInfo pci_dev_info_1119_0138 = { + 0x0138, pci_device_1119_0138, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_00c9, + pci_ss_list_1119_0138, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_00ca = { - 0x00ca, pci_device_114f_00ca, +static const pciDeviceInfo pci_dev_info_1119_0139 = { + 0x0139, pci_device_1119_0139, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_00ca, + pci_ss_list_1119_0139, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_00cb = { - 0x00cb, pci_device_114f_00cb, +static const pciDeviceInfo pci_dev_info_1119_013a = { + 0x013a, pci_device_1119_013a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_00cb, + pci_ss_list_1119_013a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_00d0 = { - 0x00d0, pci_device_114f_00d0, +static const pciDeviceInfo pci_dev_info_1119_013b = { + 0x013b, pci_device_1119_013b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_00d0, + pci_ss_list_1119_013b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_00d1 = { - 0x00d1, pci_device_114f_00d1, +static const pciDeviceInfo pci_dev_info_1119_013c = { + 0x013c, pci_device_1119_013c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_00d1, + pci_ss_list_1119_013c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_114f_6001 = { - 0x6001, pci_device_114f_6001, +static const pciDeviceInfo pci_dev_info_1119_013d = { + 0x013d, pci_device_1119_013d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_114f_6001, + pci_ss_list_1119_013d, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1158_3011 = { - 0x3011, pci_device_1158_3011, +static const pciDeviceInfo pci_dev_info_1119_013e = { + 0x013e, pci_device_1119_013e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1158_3011, + pci_ss_list_1119_013e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1158_9050 = { - 0x9050, pci_device_1158_9050, +static const pciDeviceInfo pci_dev_info_1119_013f = { + 0x013f, pci_device_1119_013f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1158_9050, + pci_ss_list_1119_013f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1158_9051 = { - 0x9051, pci_device_1158_9051, +static const pciDeviceInfo pci_dev_info_1119_0166 = { + 0x0166, pci_device_1119_0166, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1158_9051, + pci_ss_list_1119_0166, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1159_0001 = { - 0x0001, pci_device_1159_0001, +static const pciDeviceInfo pci_dev_info_1119_0167 = { + 0x0167, pci_device_1119_0167, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1159_0001, + pci_ss_list_1119_0167, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_115d_0003 = { - 0x0003, pci_device_115d_0003, +static const pciDeviceInfo pci_dev_info_1119_0168 = { + 0x0168, pci_device_1119_0168, #ifdef INIT_SUBSYS_INFO - pci_ss_list_115d_0003, + pci_ss_list_1119_0168, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_115d_0005 = { - 0x0005, pci_device_115d_0005, +static const pciDeviceInfo pci_dev_info_1119_0169 = { + 0x0169, pci_device_1119_0169, #ifdef INIT_SUBSYS_INFO - pci_ss_list_115d_0005, + pci_ss_list_1119_0169, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_115d_0007 = { - 0x0007, pci_device_115d_0007, +static const pciDeviceInfo pci_dev_info_1119_016a = { + 0x016a, pci_device_1119_016a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_115d_0007, + pci_ss_list_1119_016a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_115d_000b = { - 0x000b, pci_device_115d_000b, +static const pciDeviceInfo pci_dev_info_1119_016b = { + 0x016b, pci_device_1119_016b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_115d_000b, + pci_ss_list_1119_016b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_115d_000c = { - 0x000c, pci_device_115d_000c, +static const pciDeviceInfo pci_dev_info_1119_016c = { + 0x016c, pci_device_1119_016c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_115d_000c, + pci_ss_list_1119_016c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_115d_000f = { - 0x000f, pci_device_115d_000f, +static const pciDeviceInfo pci_dev_info_1119_016d = { + 0x016d, pci_device_1119_016d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_115d_000f, + pci_ss_list_1119_016d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_115d_00d4 = { - 0x00d4, pci_device_115d_00d4, +static const pciDeviceInfo pci_dev_info_1119_016e = { + 0x016e, pci_device_1119_016e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_115d_00d4, + pci_ss_list_1119_016e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_115d_0101 = { - 0x0101, pci_device_115d_0101, +static const pciDeviceInfo pci_dev_info_1119_016f = { + 0x016f, pci_device_1119_016f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_115d_0101, + pci_ss_list_1119_016f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_115d_0103 = { - 0x0103, pci_device_115d_0103, +static const pciDeviceInfo pci_dev_info_1119_01d6 = { + 0x01d6, pci_device_1119_01d6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_115d_0103, + pci_ss_list_1119_01d6, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_1163_0001 = { - 0x0001, pci_device_1163_0001, +static const pciDeviceInfo pci_dev_info_1119_01d7 = { + 0x01d7, pci_device_1119_01d7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1163_0001, + pci_ss_list_1119_01d7, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1163_2000 = { - 0x2000, pci_device_1163_2000, +static const pciDeviceInfo pci_dev_info_1119_01f6 = { + 0x01f6, pci_device_1119_01f6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1163_2000, + pci_ss_list_1119_01f6, #else NULL, #endif 0 }; -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1165_0001 = { - 0x0001, pci_device_1165_0001, +static const pciDeviceInfo pci_dev_info_1119_01f7 = { + 0x01f7, pci_device_1119_01f7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1165_0001, + pci_ss_list_1119_01f7, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1166_0000 = { - 0x0000, pci_device_1166_0000, +static const pciDeviceInfo pci_dev_info_1119_01fc = { + 0x01fc, pci_device_1119_01fc, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0000, + pci_ss_list_1119_01fc, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0005 = { - 0x0005, pci_device_1166_0005, +static const pciDeviceInfo pci_dev_info_1119_01fd = { + 0x01fd, pci_device_1119_01fd, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0005, + pci_ss_list_1119_01fd, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0006 = { - 0x0006, pci_device_1166_0006, +static const pciDeviceInfo pci_dev_info_1119_01fe = { + 0x01fe, pci_device_1119_01fe, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0006, + pci_ss_list_1119_01fe, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0007 = { - 0x0007, pci_device_1166_0007, +static const pciDeviceInfo pci_dev_info_1119_01ff = { + 0x01ff, pci_device_1119_01ff, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0007, + pci_ss_list_1119_01ff, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0008 = { - 0x0008, pci_device_1166_0008, +static const pciDeviceInfo pci_dev_info_1119_0210 = { + 0x0210, pci_device_1119_0210, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0008, + pci_ss_list_1119_0210, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0009 = { - 0x0009, pci_device_1166_0009, +static const pciDeviceInfo pci_dev_info_1119_0211 = { + 0x0211, pci_device_1119_0211, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0009, + pci_ss_list_1119_0211, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0010 = { - 0x0010, pci_device_1166_0010, +static const pciDeviceInfo pci_dev_info_1119_0260 = { + 0x0260, pci_device_1119_0260, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0010, + pci_ss_list_1119_0260, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0011 = { - 0x0011, pci_device_1166_0011, +static const pciDeviceInfo pci_dev_info_1119_0261 = { + 0x0261, pci_device_1119_0261, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0011, + pci_ss_list_1119_0261, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0012 = { - 0x0012, pci_device_1166_0012, +static const pciDeviceInfo pci_dev_info_1119_02ff = { + 0x02ff, pci_device_1119_02ff, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0012, + pci_ss_list_1119_02ff, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0013 = { - 0x0013, pci_device_1166_0013, +static const pciDeviceInfo pci_dev_info_1119_0300 = { + 0x0300, pci_device_1119_0300, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0013, + pci_ss_list_1119_0300, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0014 = { - 0x0014, pci_device_1166_0014, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0014, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_111a_0000 = { + 0x0000, pci_device_111a_0000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_111a_0000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0015 = { - 0x0015, pci_device_1166_0015, +static const pciDeviceInfo pci_dev_info_111a_0002 = { + 0x0002, pci_device_111a_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0015, + pci_ss_list_111a_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0016 = { - 0x0016, pci_device_1166_0016, +static const pciDeviceInfo pci_dev_info_111a_0003 = { + 0x0003, pci_device_111a_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0016, + pci_ss_list_111a_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0017 = { - 0x0017, pci_device_1166_0017, +static const pciDeviceInfo pci_dev_info_111a_0005 = { + 0x0005, pci_device_111a_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0017, + pci_ss_list_111a_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0101 = { - 0x0101, pci_device_1166_0101, +static const pciDeviceInfo pci_dev_info_111a_0007 = { + 0x0007, pci_device_111a_0007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0101, + pci_ss_list_111a_0007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0110 = { - 0x0110, pci_device_1166_0110, +static const pciDeviceInfo pci_dev_info_111a_1203 = { + 0x1203, pci_device_111a_1203, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0110, + pci_ss_list_111a_1203, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0200 = { - 0x0200, pci_device_1166_0200, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_111c_0001 = { + 0x0001, pci_device_111c_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0200, + pci_ss_list_111c_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0201 = { - 0x0201, pci_device_1166_0201, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_111d_0001 = { + 0x0001, pci_device_111d_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0201, + pci_ss_list_111d_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0203 = { - 0x0203, pci_device_1166_0203, +static const pciDeviceInfo pci_dev_info_111d_0003 = { + 0x0003, pci_device_111d_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0203, + pci_ss_list_111d_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0211 = { - 0x0211, pci_device_1166_0211, +static const pciDeviceInfo pci_dev_info_111d_0004 = { + 0x0004, pci_device_111d_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0211, + pci_ss_list_111d_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0212 = { - 0x0212, pci_device_1166_0212, +static const pciDeviceInfo pci_dev_info_111d_0005 = { + 0x0005, pci_device_111d_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0212, + pci_ss_list_111d_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0213 = { - 0x0213, pci_device_1166_0213, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_111f_4a47 = { + 0x4a47, pci_device_111f_4a47, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0213, + pci_ss_list_111f_4a47, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0217 = { - 0x0217, pci_device_1166_0217, +static const pciDeviceInfo pci_dev_info_111f_5243 = { + 0x5243, pci_device_111f_5243, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0217, + pci_ss_list_111f_5243, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0220 = { - 0x0220, pci_device_1166_0220, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1127_0200 = { + 0x0200, pci_device_1127_0200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0220, + pci_ss_list_1127_0200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0221 = { - 0x0221, pci_device_1166_0221, +static const pciDeviceInfo pci_dev_info_1127_0210 = { + 0x0210, pci_device_1127_0210, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0221, + pci_ss_list_1127_0210, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0225 = { - 0x0225, pci_device_1166_0225, +static const pciDeviceInfo pci_dev_info_1127_0250 = { + 0x0250, pci_device_1127_0250, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0225, + pci_ss_list_1127_0250, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0227 = { - 0x0227, pci_device_1166_0227, +static const pciDeviceInfo pci_dev_info_1127_0300 = { + 0x0300, pci_device_1127_0300, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0227, + pci_ss_list_1127_0300, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0230 = { - 0x0230, pci_device_1166_0230, +static const pciDeviceInfo pci_dev_info_1127_0310 = { + 0x0310, pci_device_1127_0310, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0230, + pci_ss_list_1127_0310, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1166_0240 = { - 0x0240, pci_device_1166_0240, +static const pciDeviceInfo pci_dev_info_1127_0400 = { + 0x0400, pci_device_1127_0400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1166_0240, + pci_ss_list_1127_0400, #else NULL, #endif @@ -71111,840 +84430,840 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_116a_6100 = { - 0x6100, pci_device_116a_6100, +static const pciDeviceInfo pci_dev_info_112f_0000 = { + 0x0000, pci_device_112f_0000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_116a_6100, + pci_ss_list_112f_0000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_116a_6800 = { - 0x6800, pci_device_116a_6800, +static const pciDeviceInfo pci_dev_info_112f_0001 = { + 0x0001, pci_device_112f_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_116a_6800, + pci_ss_list_112f_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_116a_7100 = { - 0x7100, pci_device_116a_7100, +static const pciDeviceInfo pci_dev_info_112f_0008 = { + 0x0008, pci_device_112f_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_116a_7100, + pci_ss_list_112f_0008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_116a_7800 = { - 0x7800, pci_device_116a_7800, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1131_1561 = { + 0x1561, pci_device_1131_1561, #ifdef INIT_SUBSYS_INFO - pci_ss_list_116a_7800, + pci_ss_list_1131_1561, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1178_afa1 = { - 0xafa1, pci_device_1178_afa1, +static const pciDeviceInfo pci_dev_info_1131_1562 = { + 0x1562, pci_device_1131_1562, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1178_afa1, + pci_ss_list_1131_1562, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1179_0103 = { - 0x0103, pci_device_1179_0103, +static const pciDeviceInfo pci_dev_info_1131_3400 = { + 0x3400, pci_device_1131_3400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_0103, + pci_ss_list_1131_3400, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_0404 = { - 0x0404, pci_device_1179_0404, +static const pciDeviceInfo pci_dev_info_1131_5400 = { + 0x5400, pci_device_1131_5400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_0404, + pci_ss_list_1131_5400, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_0406 = { - 0x0406, pci_device_1179_0406, +static const pciDeviceInfo pci_dev_info_1131_5402 = { + 0x5402, pci_device_1131_5402, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_0406, + pci_ss_list_1131_5402, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_0407 = { - 0x0407, pci_device_1179_0407, +static const pciDeviceInfo pci_dev_info_1131_5405 = { + 0x5405, pci_device_1131_5405, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_0407, + pci_ss_list_1131_5405, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_0601 = { - 0x0601, pci_device_1179_0601, +static const pciDeviceInfo pci_dev_info_1131_5406 = { + 0x5406, pci_device_1131_5406, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_0601, + pci_ss_list_1131_5406, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_0603 = { - 0x0603, pci_device_1179_0603, +static const pciDeviceInfo pci_dev_info_1131_7130 = { + 0x7130, pci_device_1131_7130, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_0603, + pci_ss_list_1131_7130, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_060a = { - 0x060a, pci_device_1179_060a, +static const pciDeviceInfo pci_dev_info_1131_7133 = { + 0x7133, pci_device_1131_7133, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_060a, + pci_ss_list_1131_7133, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_060f = { - 0x060f, pci_device_1179_060f, +static const pciDeviceInfo pci_dev_info_1131_7134 = { + 0x7134, pci_device_1131_7134, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_060f, + pci_ss_list_1131_7134, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_0617 = { - 0x0617, pci_device_1179_0617, +static const pciDeviceInfo pci_dev_info_1131_7145 = { + 0x7145, pci_device_1131_7145, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_0617, + pci_ss_list_1131_7145, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_0618 = { - 0x0618, pci_device_1179_0618, +static const pciDeviceInfo pci_dev_info_1131_7146 = { + 0x7146, pci_device_1131_7146, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_0618, + pci_ss_list_1131_7146, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_0701 = { - 0x0701, pci_device_1179_0701, +static const pciDeviceInfo pci_dev_info_1131_9730 = { + 0x9730, pci_device_1131_9730, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_0701, + pci_ss_list_1131_9730, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_0804 = { - 0x0804, pci_device_1179_0804, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1133_7901 = { + 0x7901, pci_device_1133_7901, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_0804, + pci_ss_list_1133_7901, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_0805 = { - 0x0805, pci_device_1179_0805, +static const pciDeviceInfo pci_dev_info_1133_7902 = { + 0x7902, pci_device_1133_7902, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_0805, + pci_ss_list_1133_7902, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1179_0d01 = { - 0x0d01, pci_device_1179_0d01, +static const pciDeviceInfo pci_dev_info_1133_7911 = { + 0x7911, pci_device_1133_7911, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1179_0d01, + pci_ss_list_1133_7911, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1180_0465 = { - 0x0465, pci_device_1180_0465, +static const pciDeviceInfo pci_dev_info_1133_7912 = { + 0x7912, pci_device_1133_7912, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1180_0465, + pci_ss_list_1133_7912, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1180_0466 = { - 0x0466, pci_device_1180_0466, +static const pciDeviceInfo pci_dev_info_1133_7941 = { + 0x7941, pci_device_1133_7941, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1180_0466, + pci_ss_list_1133_7941, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1180_0475 = { - 0x0475, pci_device_1180_0475, +static const pciDeviceInfo pci_dev_info_1133_7942 = { + 0x7942, pci_device_1133_7942, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1180_0475, + pci_ss_list_1133_7942, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1180_0476 = { - 0x0476, pci_device_1180_0476, +static const pciDeviceInfo pci_dev_info_1133_7943 = { + 0x7943, pci_device_1133_7943, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1180_0476, + pci_ss_list_1133_7943, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1180_0477 = { - 0x0477, pci_device_1180_0477, +static const pciDeviceInfo pci_dev_info_1133_7944 = { + 0x7944, pci_device_1133_7944, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1180_0477, + pci_ss_list_1133_7944, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1180_0478 = { - 0x0478, pci_device_1180_0478, +static const pciDeviceInfo pci_dev_info_1133_b921 = { + 0xb921, pci_device_1133_b921, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1180_0478, + pci_ss_list_1133_b921, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1180_0522 = { - 0x0522, pci_device_1180_0522, +static const pciDeviceInfo pci_dev_info_1133_b922 = { + 0xb922, pci_device_1133_b922, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1180_0522, + pci_ss_list_1133_b922, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1180_0551 = { - 0x0551, pci_device_1180_0551, +static const pciDeviceInfo pci_dev_info_1133_b923 = { + 0xb923, pci_device_1133_b923, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1180_0551, + pci_ss_list_1133_b923, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1180_0552 = { - 0x0552, pci_device_1180_0552, +static const pciDeviceInfo pci_dev_info_1133_e001 = { + 0xe001, pci_device_1133_e001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1180_0552, + pci_ss_list_1133_e001, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1186_0100 = { - 0x0100, pci_device_1186_0100, +static const pciDeviceInfo pci_dev_info_1133_e002 = { + 0xe002, pci_device_1133_e002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_0100, + pci_ss_list_1133_e002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_1002 = { - 0x1002, pci_device_1186_1002, +static const pciDeviceInfo pci_dev_info_1133_e003 = { + 0xe003, pci_device_1133_e003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_1002, + pci_ss_list_1133_e003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_1025 = { - 0x1025, pci_device_1186_1025, +static const pciDeviceInfo pci_dev_info_1133_e004 = { + 0xe004, pci_device_1133_e004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_1025, + pci_ss_list_1133_e004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_1026 = { - 0x1026, pci_device_1186_1026, +static const pciDeviceInfo pci_dev_info_1133_e005 = { + 0xe005, pci_device_1133_e005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_1026, + pci_ss_list_1133_e005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_1043 = { - 0x1043, pci_device_1186_1043, +static const pciDeviceInfo pci_dev_info_1133_e006 = { + 0xe006, pci_device_1133_e006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_1043, + pci_ss_list_1133_e006, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_1300 = { - 0x1300, pci_device_1186_1300, +static const pciDeviceInfo pci_dev_info_1133_e007 = { + 0xe007, pci_device_1133_e007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_1300, + pci_ss_list_1133_e007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_1340 = { - 0x1340, pci_device_1186_1340, +static const pciDeviceInfo pci_dev_info_1133_e008 = { + 0xe008, pci_device_1133_e008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_1340, + pci_ss_list_1133_e008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_1541 = { - 0x1541, pci_device_1186_1541, +static const pciDeviceInfo pci_dev_info_1133_e009 = { + 0xe009, pci_device_1133_e009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_1541, + pci_ss_list_1133_e009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_1561 = { - 0x1561, pci_device_1186_1561, +static const pciDeviceInfo pci_dev_info_1133_e00a = { + 0xe00a, pci_device_1133_e00a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_1561, + pci_ss_list_1133_e00a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_2027 = { - 0x2027, pci_device_1186_2027, +static const pciDeviceInfo pci_dev_info_1133_e00b = { + 0xe00b, pci_device_1133_e00b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_2027, + pci_ss_list_1133_e00b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3203 = { - 0x3203, pci_device_1186_3203, +static const pciDeviceInfo pci_dev_info_1133_e00c = { + 0xe00c, pci_device_1133_e00c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3203, + pci_ss_list_1133_e00c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3300 = { - 0x3300, pci_device_1186_3300, +static const pciDeviceInfo pci_dev_info_1133_e00d = { + 0xe00d, pci_device_1133_e00d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3300, + pci_ss_list_1133_e00d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3a03 = { - 0x3a03, pci_device_1186_3a03, +static const pciDeviceInfo pci_dev_info_1133_e00e = { + 0xe00e, pci_device_1133_e00e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3a03, + pci_ss_list_1133_e00e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3a04 = { - 0x3a04, pci_device_1186_3a04, +static const pciDeviceInfo pci_dev_info_1133_e010 = { + 0xe010, pci_device_1133_e010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3a04, + pci_ss_list_1133_e010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3a05 = { - 0x3a05, pci_device_1186_3a05, +static const pciDeviceInfo pci_dev_info_1133_e011 = { + 0xe011, pci_device_1133_e011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3a05, + pci_ss_list_1133_e011, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3a07 = { - 0x3a07, pci_device_1186_3a07, +static const pciDeviceInfo pci_dev_info_1133_e012 = { + 0xe012, pci_device_1133_e012, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3a07, + pci_ss_list_1133_e012, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3a08 = { - 0x3a08, pci_device_1186_3a08, +static const pciDeviceInfo pci_dev_info_1133_e013 = { + 0xe013, pci_device_1133_e013, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3a08, + pci_ss_list_1133_e013, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3a10 = { - 0x3a10, pci_device_1186_3a10, +static const pciDeviceInfo pci_dev_info_1133_e014 = { + 0xe014, pci_device_1133_e014, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3a10, + pci_ss_list_1133_e014, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3a11 = { - 0x3a11, pci_device_1186_3a11, +static const pciDeviceInfo pci_dev_info_1133_e015 = { + 0xe015, pci_device_1133_e015, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3a11, + pci_ss_list_1133_e015, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3a12 = { - 0x3a12, pci_device_1186_3a12, +static const pciDeviceInfo pci_dev_info_1133_e016 = { + 0xe016, pci_device_1133_e016, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3a12, + pci_ss_list_1133_e016, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3a13 = { - 0x3a13, pci_device_1186_3a13, +static const pciDeviceInfo pci_dev_info_1133_e017 = { + 0xe017, pci_device_1133_e017, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3a13, + pci_ss_list_1133_e017, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3a14 = { - 0x3a14, pci_device_1186_3a14, +static const pciDeviceInfo pci_dev_info_1133_e018 = { + 0xe018, pci_device_1133_e018, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3a14, + pci_ss_list_1133_e018, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3a63 = { - 0x3a63, pci_device_1186_3a63, +static const pciDeviceInfo pci_dev_info_1133_e019 = { + 0xe019, pci_device_1133_e019, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3a63, + pci_ss_list_1133_e019, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_3b05 = { - 0x3b05, pci_device_1186_3b05, +static const pciDeviceInfo pci_dev_info_1133_e01a = { + 0xe01a, pci_device_1133_e01a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_3b05, + pci_ss_list_1133_e01a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_4000 = { - 0x4000, pci_device_1186_4000, +static const pciDeviceInfo pci_dev_info_1133_e01b = { + 0xe01b, pci_device_1133_e01b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_4000, + pci_ss_list_1133_e01b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_4c00 = { - 0x4c00, pci_device_1186_4c00, +static const pciDeviceInfo pci_dev_info_1133_e01c = { + 0xe01c, pci_device_1133_e01c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_4c00, + pci_ss_list_1133_e01c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1186_8400 = { - 0x8400, pci_device_1186_8400, +static const pciDeviceInfo pci_dev_info_1133_e01e = { + 0xe01e, pci_device_1133_e01e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1186_8400, + pci_ss_list_1133_e01e, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_118c_0014 = { - 0x0014, pci_device_118c_0014, +static const pciDeviceInfo pci_dev_info_1133_e020 = { + 0xe020, pci_device_1133_e020, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118c_0014, + pci_ss_list_1133_e020, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118c_1117 = { - 0x1117, pci_device_118c_1117, +static const pciDeviceInfo pci_dev_info_1133_e024 = { + 0xe024, pci_device_1133_e024, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118c_1117, + pci_ss_list_1133_e024, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_118d_0001 = { - 0x0001, pci_device_118d_0001, +static const pciDeviceInfo pci_dev_info_1133_e028 = { + 0xe028, pci_device_1133_e028, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0001, + pci_ss_list_1133_e028, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0012 = { - 0x0012, pci_device_118d_0012, +static const pciDeviceInfo pci_dev_info_1133_e02a = { + 0xe02a, pci_device_1133_e02a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0012, + pci_ss_list_1133_e02a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0014 = { - 0x0014, pci_device_118d_0014, +static const pciDeviceInfo pci_dev_info_1133_e02c = { + 0xe02c, pci_device_1133_e02c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0014, + pci_ss_list_1133_e02c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0024 = { - 0x0024, pci_device_118d_0024, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1134_0001 = { + 0x0001, pci_device_1134_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0024, + pci_ss_list_1134_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0044 = { - 0x0044, pci_device_118d_0044, +static const pciDeviceInfo pci_dev_info_1134_0002 = { + 0x0002, pci_device_1134_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0044, + pci_ss_list_1134_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0112 = { - 0x0112, pci_device_118d_0112, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1135_0001 = { + 0x0001, pci_device_1135_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0112, + pci_ss_list_1135_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0114 = { - 0x0114, pci_device_118d_0114, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1138_8905 = { + 0x8905, pci_device_1138_8905, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0114, + pci_ss_list_1138_8905, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0124 = { - 0x0124, pci_device_118d_0124, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0124, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1139_0001 = { + 0x0001, pci_device_1139_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1139_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0144 = { - 0x0144, pci_device_118d_0144, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_113c_0000 = { + 0x0000, pci_device_113c_0000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0144, + pci_ss_list_113c_0000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0212 = { - 0x0212, pci_device_118d_0212, +static const pciDeviceInfo pci_dev_info_113c_0001 = { + 0x0001, pci_device_113c_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0212, + pci_ss_list_113c_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0214 = { - 0x0214, pci_device_118d_0214, +static const pciDeviceInfo pci_dev_info_113c_0911 = { + 0x0911, pci_device_113c_0911, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0214, + pci_ss_list_113c_0911, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0224 = { - 0x0224, pci_device_118d_0224, +static const pciDeviceInfo pci_dev_info_113c_0912 = { + 0x0912, pci_device_113c_0912, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0224, + pci_ss_list_113c_0912, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0244 = { - 0x0244, pci_device_118d_0244, +static const pciDeviceInfo pci_dev_info_113c_0913 = { + 0x0913, pci_device_113c_0913, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0244, + pci_ss_list_113c_0913, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0312 = { - 0x0312, pci_device_118d_0312, +static const pciDeviceInfo pci_dev_info_113c_0914 = { + 0x0914, pci_device_113c_0914, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0312, + pci_ss_list_113c_0914, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0314 = { - 0x0314, pci_device_118d_0314, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_113f_0808 = { + 0x0808, pci_device_113f_0808, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0314, + pci_ss_list_113f_0808, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0324 = { - 0x0324, pci_device_118d_0324, +static const pciDeviceInfo pci_dev_info_113f_1010 = { + 0x1010, pci_device_113f_1010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0324, + pci_ss_list_113f_1010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_118d_0344 = { - 0x0344, pci_device_118d_0344, +static const pciDeviceInfo pci_dev_info_113f_80c0 = { + 0x80c0, pci_device_113f_80c0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_118d_0344, + pci_ss_list_113f_80c0, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1190_c731 = { - 0xc731, pci_device_1190_c731, +static const pciDeviceInfo pci_dev_info_113f_80c4 = { + 0x80c4, pci_device_113f_80c4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1190_c731, + pci_ss_list_113f_80c4, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1191_0003 = { - 0x0003, pci_device_1191_0003, +static const pciDeviceInfo pci_dev_info_113f_80c8 = { + 0x80c8, pci_device_113f_80c8, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_0003, + pci_ss_list_113f_80c8, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1191_0004 = { - 0x0004, pci_device_1191_0004, +static const pciDeviceInfo pci_dev_info_113f_8888 = { + 0x8888, pci_device_113f_8888, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_0004, + pci_ss_list_113f_8888, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1191_0005 = { - 0x0005, pci_device_1191_0005, +static const pciDeviceInfo pci_dev_info_113f_9090 = { + 0x9090, pci_device_113f_9090, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_0005, + pci_ss_list_113f_9090, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1191_0006 = { - 0x0006, pci_device_1191_0006, +#endif +static const pciDeviceInfo pci_dev_info_1142_3210 = { + 0x3210, pci_device_1142_3210, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_0006, + pci_ss_list_1142_3210, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1191_0007 = { - 0x0007, pci_device_1191_0007, +static const pciDeviceInfo pci_dev_info_1142_6422 = { + 0x6422, pci_device_1142_6422, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_0007, + pci_ss_list_1142_6422, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1191_0008 = { - 0x0008, pci_device_1191_0008, +static const pciDeviceInfo pci_dev_info_1142_6424 = { + 0x6424, pci_device_1142_6424, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_0008, + pci_ss_list_1142_6424, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1191_0009 = { - 0x0009, pci_device_1191_0009, +static const pciDeviceInfo pci_dev_info_1142_6425 = { + 0x6425, pci_device_1142_6425, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_0009, + pci_ss_list_1142_6425, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1191_8002 = { - 0x8002, pci_device_1191_8002, +static const pciDeviceInfo pci_dev_info_1142_643d = { + 0x643d, pci_device_1142_643d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_8002, + pci_ss_list_1142_643d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1191_8010 = { - 0x8010, pci_device_1191_8010, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1144_0001 = { + 0x0001, pci_device_1144_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_8010, + pci_ss_list_1144_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1191_8020 = { - 0x8020, pci_device_1191_8020, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1145_8007 = { + 0x8007, pci_device_1145_8007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_8020, + pci_ss_list_1145_8007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1191_8030 = { - 0x8030, pci_device_1191_8030, +static const pciDeviceInfo pci_dev_info_1145_f007 = { + 0xf007, pci_device_1145_f007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_8030, + pci_ss_list_1145_f007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1191_8040 = { - 0x8040, pci_device_1191_8040, +static const pciDeviceInfo pci_dev_info_1145_f010 = { + 0xf010, pci_device_1145_f010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_8040, + pci_ss_list_1145_f010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1191_8050 = { - 0x8050, pci_device_1191_8050, +static const pciDeviceInfo pci_dev_info_1145_f012 = { + 0xf012, pci_device_1145_f012, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1191_8050, + pci_ss_list_1145_f012, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1193_0001 = { - 0x0001, pci_device_1193_0001, +static const pciDeviceInfo pci_dev_info_1145_f013 = { + 0xf013, pci_device_1145_f013, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1193_0001, + pci_ss_list_1145_f013, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1193_0002 = { - 0x0002, pci_device_1193_0002, +static const pciDeviceInfo pci_dev_info_1145_f015 = { + 0xf015, pci_device_1145_f015, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1193_0002, + pci_ss_list_1145_f015, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1197_010c = { - 0x010c, pci_device_1197_010c, +static const pciDeviceInfo pci_dev_info_1145_f020 = { + 0xf020, pci_device_1145_f020, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1197_010c, + pci_ss_list_1145_f020, #else NULL, #endif @@ -71952,1248 +85271,1227 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_119b_1221 = { - 0x1221, pci_device_119b_1221, +static const pciDeviceInfo pci_dev_info_1148_4000 = { + 0x4000, pci_device_1148_4000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_119b_1221, + pci_ss_list_1148_4000, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_119e_0001 = { - 0x0001, pci_device_119e_0001, +static const pciDeviceInfo pci_dev_info_1148_4200 = { + 0x4200, pci_device_1148_4200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_119e_0001, + pci_ss_list_1148_4200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_119e_0003 = { - 0x0003, pci_device_119e_0003, +static const pciDeviceInfo pci_dev_info_1148_4300 = { + 0x4300, pci_device_1148_4300, #ifdef INIT_SUBSYS_INFO - pci_ss_list_119e_0003, + pci_ss_list_1148_4300, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11a9_4240 = { - 0x4240, pci_device_11a9_4240, +static const pciDeviceInfo pci_dev_info_1148_4320 = { + 0x4320, pci_device_1148_4320, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11a9_4240, + pci_ss_list_1148_4320, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11ab_0146 = { - 0x0146, pci_device_11ab_0146, +static const pciDeviceInfo pci_dev_info_1148_4400 = { + 0x4400, pci_device_1148_4400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_0146, + pci_ss_list_1148_4400, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_138f = { - 0x138f, pci_device_11ab_138f, +static const pciDeviceInfo pci_dev_info_1148_4500 = { + 0x4500, pci_device_1148_4500, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_138f, + pci_ss_list_1148_4500, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_1fa6 = { - 0x1fa6, pci_device_11ab_1fa6, +static const pciDeviceInfo pci_dev_info_1148_9000 = { + 0x9000, pci_device_1148_9000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_1fa6, + pci_ss_list_1148_9000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_4320 = { - 0x4320, pci_device_11ab_4320, +static const pciDeviceInfo pci_dev_info_1148_9843 = { + 0x9843, pci_device_1148_9843, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_4320, + pci_ss_list_1148_9843, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_4350 = { - 0x4350, pci_device_11ab_4350, +static const pciDeviceInfo pci_dev_info_1148_9e00 = { + 0x9e00, pci_device_1148_9e00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_4350, + pci_ss_list_1148_9e00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_4351 = { - 0x4351, pci_device_11ab_4351, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_114a_5579 = { + 0x5579, pci_device_114a_5579, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_4351, + pci_ss_list_114a_5579, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_4360 = { - 0x4360, pci_device_11ab_4360, +static const pciDeviceInfo pci_dev_info_114a_5587 = { + 0x5587, pci_device_114a_5587, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_4360, + pci_ss_list_114a_5587, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_4361 = { - 0x4361, pci_device_11ab_4361, +static const pciDeviceInfo pci_dev_info_114a_6504 = { + 0x6504, pci_device_114a_6504, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_4361, + pci_ss_list_114a_6504, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_4362 = { - 0x4362, pci_device_11ab_4362, +static const pciDeviceInfo pci_dev_info_114a_7587 = { + 0x7587, pci_device_114a_7587, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_4362, + pci_ss_list_114a_7587, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_4611 = { - 0x4611, pci_device_11ab_4611, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_114f_0002 = { + 0x0002, pci_device_114f_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_4611, + pci_ss_list_114f_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_4620 = { - 0x4620, pci_device_11ab_4620, +static const pciDeviceInfo pci_dev_info_114f_0003 = { + 0x0003, pci_device_114f_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_4620, + pci_ss_list_114f_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_4801 = { - 0x4801, pci_device_11ab_4801, +static const pciDeviceInfo pci_dev_info_114f_0004 = { + 0x0004, pci_device_114f_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_4801, + pci_ss_list_114f_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_5040 = { - 0x5040, pci_device_11ab_5040, +static const pciDeviceInfo pci_dev_info_114f_0005 = { + 0x0005, pci_device_114f_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_5040, + pci_ss_list_114f_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_5041 = { - 0x5041, pci_device_11ab_5041, +static const pciDeviceInfo pci_dev_info_114f_0006 = { + 0x0006, pci_device_114f_0006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_5041, + pci_ss_list_114f_0006, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_5080 = { - 0x5080, pci_device_11ab_5080, +static const pciDeviceInfo pci_dev_info_114f_0009 = { + 0x0009, pci_device_114f_0009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_5080, + pci_ss_list_114f_0009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_5081 = { - 0x5081, pci_device_11ab_5081, +static const pciDeviceInfo pci_dev_info_114f_000a = { + 0x000a, pci_device_114f_000a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_5081, + pci_ss_list_114f_000a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_6041 = { - 0x6041, pci_device_11ab_6041, +static const pciDeviceInfo pci_dev_info_114f_000c = { + 0x000c, pci_device_114f_000c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_6041, + pci_ss_list_114f_000c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_6081 = { - 0x6081, pci_device_11ab_6081, +static const pciDeviceInfo pci_dev_info_114f_000d = { + 0x000d, pci_device_114f_000d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_6081, + pci_ss_list_114f_000d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_6460 = { - 0x6460, pci_device_11ab_6460, +static const pciDeviceInfo pci_dev_info_114f_0011 = { + 0x0011, pci_device_114f_0011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_6460, + pci_ss_list_114f_0011, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ab_f003 = { - 0xf003, pci_device_11ab_f003, +static const pciDeviceInfo pci_dev_info_114f_0012 = { + 0x0012, pci_device_114f_0012, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ab_f003, + pci_ss_list_114f_0012, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11ad_0002 = { - 0x0002, pci_device_11ad_0002, +static const pciDeviceInfo pci_dev_info_114f_0014 = { + 0x0014, pci_device_114f_0014, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ad_0002, + pci_ss_list_114f_0014, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11ad_c115 = { - 0xc115, pci_device_11ad_c115, +static const pciDeviceInfo pci_dev_info_114f_0015 = { + 0x0015, pci_device_114f_0015, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ad_c115, + pci_ss_list_114f_0015, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11af_0001 = { - 0x0001, pci_device_11af_0001, +static const pciDeviceInfo pci_dev_info_114f_0016 = { + 0x0016, pci_device_114f_0016, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11af_0001, + pci_ss_list_114f_0016, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11b0_0002 = { - 0x0002, pci_device_11b0_0002, +static const pciDeviceInfo pci_dev_info_114f_0017 = { + 0x0017, pci_device_114f_0017, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11b0_0002, + pci_ss_list_114f_0017, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11b0_0292 = { - 0x0292, pci_device_11b0_0292, +static const pciDeviceInfo pci_dev_info_114f_001a = { + 0x001a, pci_device_114f_001a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11b0_0292, + pci_ss_list_114f_001a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11b0_0960 = { - 0x0960, pci_device_11b0_0960, +static const pciDeviceInfo pci_dev_info_114f_001b = { + 0x001b, pci_device_114f_001b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11b0_0960, + pci_ss_list_114f_001b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11b0_c960 = { - 0xc960, pci_device_11b0_c960, +static const pciDeviceInfo pci_dev_info_114f_001d = { + 0x001d, pci_device_114f_001d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11b0_c960, + pci_ss_list_114f_001d, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11b8_0001 = { - 0x0001, pci_device_11b8_0001, +static const pciDeviceInfo pci_dev_info_114f_0023 = { + 0x0023, pci_device_114f_0023, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11b8_0001, + pci_ss_list_114f_0023, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11b9_c0ed = { - 0xc0ed, pci_device_11b9_c0ed, +static const pciDeviceInfo pci_dev_info_114f_0024 = { + 0x0024, pci_device_114f_0024, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11b9_c0ed, + pci_ss_list_114f_0024, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11bc_0001 = { - 0x0001, pci_device_11bc_0001, +static const pciDeviceInfo pci_dev_info_114f_0026 = { + 0x0026, pci_device_114f_0026, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11bc_0001, + pci_ss_list_114f_0026, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11c1_0440 = { - 0x0440, pci_device_11c1_0440, +static const pciDeviceInfo pci_dev_info_114f_0027 = { + 0x0027, pci_device_114f_0027, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0440, + pci_ss_list_114f_0027, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0441 = { - 0x0441, pci_device_11c1_0441, +static const pciDeviceInfo pci_dev_info_114f_0028 = { + 0x0028, pci_device_114f_0028, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0441, + pci_ss_list_114f_0028, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0442 = { - 0x0442, pci_device_11c1_0442, +static const pciDeviceInfo pci_dev_info_114f_0029 = { + 0x0029, pci_device_114f_0029, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0442, + pci_ss_list_114f_0029, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0443 = { - 0x0443, pci_device_11c1_0443, +static const pciDeviceInfo pci_dev_info_114f_0034 = { + 0x0034, pci_device_114f_0034, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0443, + pci_ss_list_114f_0034, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0444 = { - 0x0444, pci_device_11c1_0444, +static const pciDeviceInfo pci_dev_info_114f_0035 = { + 0x0035, pci_device_114f_0035, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0444, + pci_ss_list_114f_0035, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0445 = { - 0x0445, pci_device_11c1_0445, +static const pciDeviceInfo pci_dev_info_114f_0040 = { + 0x0040, pci_device_114f_0040, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0445, + pci_ss_list_114f_0040, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0446 = { - 0x0446, pci_device_11c1_0446, +static const pciDeviceInfo pci_dev_info_114f_0042 = { + 0x0042, pci_device_114f_0042, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0446, + pci_ss_list_114f_0042, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0447 = { - 0x0447, pci_device_11c1_0447, +static const pciDeviceInfo pci_dev_info_114f_0043 = { + 0x0043, pci_device_114f_0043, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0447, + pci_ss_list_114f_0043, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0448 = { - 0x0448, pci_device_11c1_0448, +static const pciDeviceInfo pci_dev_info_114f_0044 = { + 0x0044, pci_device_114f_0044, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0448, + pci_ss_list_114f_0044, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0449 = { - 0x0449, pci_device_11c1_0449, +static const pciDeviceInfo pci_dev_info_114f_0045 = { + 0x0045, pci_device_114f_0045, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0449, + pci_ss_list_114f_0045, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_044a = { - 0x044a, pci_device_11c1_044a, +static const pciDeviceInfo pci_dev_info_114f_004e = { + 0x004e, pci_device_114f_004e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_044a, + pci_ss_list_114f_004e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_044b = { - 0x044b, pci_device_11c1_044b, +static const pciDeviceInfo pci_dev_info_114f_0070 = { + 0x0070, pci_device_114f_0070, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_044b, + pci_ss_list_114f_0070, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_044c = { - 0x044c, pci_device_11c1_044c, +static const pciDeviceInfo pci_dev_info_114f_0071 = { + 0x0071, pci_device_114f_0071, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_044c, + pci_ss_list_114f_0071, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_044d = { - 0x044d, pci_device_11c1_044d, +static const pciDeviceInfo pci_dev_info_114f_0072 = { + 0x0072, pci_device_114f_0072, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_044d, + pci_ss_list_114f_0072, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_044e = { - 0x044e, pci_device_11c1_044e, +static const pciDeviceInfo pci_dev_info_114f_0073 = { + 0x0073, pci_device_114f_0073, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_044e, + pci_ss_list_114f_0073, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_044f = { - 0x044f, pci_device_11c1_044f, +static const pciDeviceInfo pci_dev_info_114f_00b0 = { + 0x00b0, pci_device_114f_00b0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_044f, + pci_ss_list_114f_00b0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0450 = { - 0x0450, pci_device_11c1_0450, +static const pciDeviceInfo pci_dev_info_114f_00b1 = { + 0x00b1, pci_device_114f_00b1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0450, + pci_ss_list_114f_00b1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0451 = { - 0x0451, pci_device_11c1_0451, +static const pciDeviceInfo pci_dev_info_114f_00c8 = { + 0x00c8, pci_device_114f_00c8, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0451, + pci_ss_list_114f_00c8, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0452 = { - 0x0452, pci_device_11c1_0452, +static const pciDeviceInfo pci_dev_info_114f_00c9 = { + 0x00c9, pci_device_114f_00c9, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0452, + pci_ss_list_114f_00c9, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0453 = { - 0x0453, pci_device_11c1_0453, +static const pciDeviceInfo pci_dev_info_114f_00ca = { + 0x00ca, pci_device_114f_00ca, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0453, + pci_ss_list_114f_00ca, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0454 = { - 0x0454, pci_device_11c1_0454, +static const pciDeviceInfo pci_dev_info_114f_00cb = { + 0x00cb, pci_device_114f_00cb, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0454, + pci_ss_list_114f_00cb, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0455 = { - 0x0455, pci_device_11c1_0455, +static const pciDeviceInfo pci_dev_info_114f_00d0 = { + 0x00d0, pci_device_114f_00d0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0455, + pci_ss_list_114f_00d0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0456 = { - 0x0456, pci_device_11c1_0456, +static const pciDeviceInfo pci_dev_info_114f_00d1 = { + 0x00d1, pci_device_114f_00d1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0456, + pci_ss_list_114f_00d1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0457 = { - 0x0457, pci_device_11c1_0457, +static const pciDeviceInfo pci_dev_info_114f_6001 = { + 0x6001, pci_device_114f_6001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0457, + pci_ss_list_114f_6001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0458 = { - 0x0458, pci_device_11c1_0458, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1158_3011 = { + 0x3011, pci_device_1158_3011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0458, + pci_ss_list_1158_3011, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0459 = { - 0x0459, pci_device_11c1_0459, +static const pciDeviceInfo pci_dev_info_1158_9050 = { + 0x9050, pci_device_1158_9050, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0459, + pci_ss_list_1158_9050, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_045a = { - 0x045a, pci_device_11c1_045a, +static const pciDeviceInfo pci_dev_info_1158_9051 = { + 0x9051, pci_device_1158_9051, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_045a, + pci_ss_list_1158_9051, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_045c = { - 0x045c, pci_device_11c1_045c, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1159_0001 = { + 0x0001, pci_device_1159_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_045c, + pci_ss_list_1159_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0461 = { - 0x0461, pci_device_11c1_0461, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_115d_0003 = { + 0x0003, pci_device_115d_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0461, + pci_ss_list_115d_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0462 = { - 0x0462, pci_device_11c1_0462, +static const pciDeviceInfo pci_dev_info_115d_0005 = { + 0x0005, pci_device_115d_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0462, + pci_ss_list_115d_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_0480 = { - 0x0480, pci_device_11c1_0480, +static const pciDeviceInfo pci_dev_info_115d_0007 = { + 0x0007, pci_device_115d_0007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_0480, + pci_ss_list_115d_0007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_048c = { - 0x048c, pci_device_11c1_048c, +static const pciDeviceInfo pci_dev_info_115d_000b = { + 0x000b, pci_device_115d_000b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_048c, + pci_ss_list_115d_000b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_048f = { - 0x048f, pci_device_11c1_048f, +static const pciDeviceInfo pci_dev_info_115d_000c = { + 0x000c, pci_device_115d_000c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_048f, + pci_ss_list_115d_000c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_5801 = { - 0x5801, pci_device_11c1_5801, +static const pciDeviceInfo pci_dev_info_115d_000f = { + 0x000f, pci_device_115d_000f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_5801, + pci_ss_list_115d_000f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_5802 = { - 0x5802, pci_device_11c1_5802, +static const pciDeviceInfo pci_dev_info_115d_00d4 = { + 0x00d4, pci_device_115d_00d4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_5802, + pci_ss_list_115d_00d4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_5803 = { - 0x5803, pci_device_11c1_5803, +static const pciDeviceInfo pci_dev_info_115d_0101 = { + 0x0101, pci_device_115d_0101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_5803, + pci_ss_list_115d_0101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_5811 = { - 0x5811, pci_device_11c1_5811, +static const pciDeviceInfo pci_dev_info_115d_0103 = { + 0x0103, pci_device_115d_0103, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_5811, + pci_ss_list_115d_0103, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_ab10 = { - 0xab10, pci_device_11c1_ab10, +#endif +static const pciDeviceInfo pci_dev_info_1163_0001 = { + 0x0001, pci_device_1163_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_ab10, + pci_ss_list_1163_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_ab11 = { - 0xab11, pci_device_11c1_ab11, +static const pciDeviceInfo pci_dev_info_1163_2000 = { + 0x2000, pci_device_1163_2000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_ab11, + pci_ss_list_1163_2000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_ab20 = { - 0xab20, pci_device_11c1_ab20, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1165_0001 = { + 0x0001, pci_device_1165_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_ab20, + pci_ss_list_1165_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_ab21 = { - 0xab21, pci_device_11c1_ab21, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1166_0000 = { + 0x0000, pci_device_1166_0000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_ab21, + pci_ss_list_1166_0000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c1_ab30 = { - 0xab30, pci_device_11c1_ab30, +static const pciDeviceInfo pci_dev_info_1166_0005 = { + 0x0005, pci_device_1166_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c1_ab30, + pci_ss_list_1166_0005, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11c8_0658 = { - 0x0658, pci_device_11c8_0658, +static const pciDeviceInfo pci_dev_info_1166_0006 = { + 0x0006, pci_device_1166_0006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c8_0658, + pci_ss_list_1166_0006, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c8_d665 = { - 0xd665, pci_device_11c8_d665, +static const pciDeviceInfo pci_dev_info_1166_0007 = { + 0x0007, pci_device_1166_0007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c8_d665, + pci_ss_list_1166_0007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c8_d667 = { - 0xd667, pci_device_11c8_d667, +static const pciDeviceInfo pci_dev_info_1166_0008 = { + 0x0008, pci_device_1166_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c8_d667, + pci_ss_list_1166_0008, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11c9_0010 = { - 0x0010, pci_device_11c9_0010, +static const pciDeviceInfo pci_dev_info_1166_0009 = { + 0x0009, pci_device_1166_0009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c9_0010, + pci_ss_list_1166_0009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11c9_0011 = { - 0x0011, pci_device_11c9_0011, +static const pciDeviceInfo pci_dev_info_1166_0010 = { + 0x0010, pci_device_1166_0010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11c9_0011, + pci_ss_list_1166_0010, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11cb_2000 = { - 0x2000, pci_device_11cb_2000, +static const pciDeviceInfo pci_dev_info_1166_0011 = { + 0x0011, pci_device_1166_0011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11cb_2000, + pci_ss_list_1166_0011, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11cb_4000 = { - 0x4000, pci_device_11cb_4000, +static const pciDeviceInfo pci_dev_info_1166_0012 = { + 0x0012, pci_device_1166_0012, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11cb_4000, + pci_ss_list_1166_0012, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11cb_8000 = { - 0x8000, pci_device_11cb_8000, +static const pciDeviceInfo pci_dev_info_1166_0013 = { + 0x0013, pci_device_1166_0013, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11cb_8000, + pci_ss_list_1166_0013, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11d1_01f7 = { - 0x01f7, pci_device_11d1_01f7, +static const pciDeviceInfo pci_dev_info_1166_0014 = { + 0x0014, pci_device_1166_0014, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11d1_01f7, + pci_ss_list_1166_0014, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11d4_1535 = { - 0x1535, pci_device_11d4_1535, +static const pciDeviceInfo pci_dev_info_1166_0015 = { + 0x0015, pci_device_1166_0015, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11d4_1535, + pci_ss_list_1166_0015, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11d4_1805 = { - 0x1805, pci_device_11d4_1805, +static const pciDeviceInfo pci_dev_info_1166_0016 = { + 0x0016, pci_device_1166_0016, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11d4_1805, + pci_ss_list_1166_0016, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11d4_1889 = { - 0x1889, pci_device_11d4_1889, +static const pciDeviceInfo pci_dev_info_1166_0017 = { + 0x0017, pci_device_1166_0017, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11d4_1889, + pci_ss_list_1166_0017, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11d5_0115 = { - 0x0115, pci_device_11d5_0115, +static const pciDeviceInfo pci_dev_info_1166_0036 = { + 0x0036, pci_device_1166_0036, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11d5_0115, + pci_ss_list_1166_0036, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11d5_0117 = { - 0x0117, pci_device_11d5_0117, +static const pciDeviceInfo pci_dev_info_1166_0101 = { + 0x0101, pci_device_1166_0101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11d5_0117, + pci_ss_list_1166_0101, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11de_6057 = { - 0x6057, pci_device_11de_6057, +static const pciDeviceInfo pci_dev_info_1166_0104 = { + 0x0104, pci_device_1166_0104, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11de_6057, + pci_ss_list_1166_0104, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11de_6120 = { - 0x6120, pci_device_11de_6120, +static const pciDeviceInfo pci_dev_info_1166_0110 = { + 0x0110, pci_device_1166_0110, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11de_6120, + pci_ss_list_1166_0110, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11e3_5030 = { - 0x5030, pci_device_11e3_5030, +static const pciDeviceInfo pci_dev_info_1166_0130 = { + 0x0130, pci_device_1166_0130, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11e3_5030, + pci_ss_list_1166_0130, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11f0_4231 = { - 0x4231, pci_device_11f0_4231, +static const pciDeviceInfo pci_dev_info_1166_0132 = { + 0x0132, pci_device_1166_0132, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f0_4231, + pci_ss_list_1166_0132, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11f0_4232 = { - 0x4232, pci_device_11f0_4232, +static const pciDeviceInfo pci_dev_info_1166_0200 = { + 0x0200, pci_device_1166_0200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f0_4232, + pci_ss_list_1166_0200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11f0_4233 = { - 0x4233, pci_device_11f0_4233, +static const pciDeviceInfo pci_dev_info_1166_0201 = { + 0x0201, pci_device_1166_0201, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f0_4233, + pci_ss_list_1166_0201, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11f0_4234 = { - 0x4234, pci_device_11f0_4234, +static const pciDeviceInfo pci_dev_info_1166_0203 = { + 0x0203, pci_device_1166_0203, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f0_4234, + pci_ss_list_1166_0203, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11f0_4235 = { - 0x4235, pci_device_11f0_4235, +static const pciDeviceInfo pci_dev_info_1166_0205 = { + 0x0205, pci_device_1166_0205, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f0_4235, + pci_ss_list_1166_0205, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11f0_4236 = { - 0x4236, pci_device_11f0_4236, +static const pciDeviceInfo pci_dev_info_1166_0211 = { + 0x0211, pci_device_1166_0211, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f0_4236, + pci_ss_list_1166_0211, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11f0_4731 = { - 0x4731, pci_device_11f0_4731, +static const pciDeviceInfo pci_dev_info_1166_0212 = { + 0x0212, pci_device_1166_0212, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f0_4731, + pci_ss_list_1166_0212, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11f4_2915 = { - 0x2915, pci_device_11f4_2915, +static const pciDeviceInfo pci_dev_info_1166_0213 = { + 0x0213, pci_device_1166_0213, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f4_2915, + pci_ss_list_1166_0213, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11f6_0112 = { - 0x0112, pci_device_11f6_0112, +static const pciDeviceInfo pci_dev_info_1166_0214 = { + 0x0214, pci_device_1166_0214, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f6_0112, + pci_ss_list_1166_0214, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11f6_0113 = { - 0x0113, pci_device_11f6_0113, +static const pciDeviceInfo pci_dev_info_1166_0217 = { + 0x0217, pci_device_1166_0217, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f6_0113, + pci_ss_list_1166_0217, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11f6_1401 = { - 0x1401, pci_device_11f6_1401, +static const pciDeviceInfo pci_dev_info_1166_0220 = { + 0x0220, pci_device_1166_0220, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f6_1401, + pci_ss_list_1166_0220, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11f6_2011 = { - 0x2011, pci_device_11f6_2011, +static const pciDeviceInfo pci_dev_info_1166_0221 = { + 0x0221, pci_device_1166_0221, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f6_2011, + pci_ss_list_1166_0221, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11f6_2201 = { - 0x2201, pci_device_11f6_2201, +static const pciDeviceInfo pci_dev_info_1166_0223 = { + 0x0223, pci_device_1166_0223, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f6_2201, + pci_ss_list_1166_0223, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11f6_9881 = { - 0x9881, pci_device_11f6_9881, +static const pciDeviceInfo pci_dev_info_1166_0225 = { + 0x0225, pci_device_1166_0225, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f6_9881, + pci_ss_list_1166_0225, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11f8_7375 = { - 0x7375, pci_device_11f8_7375, +static const pciDeviceInfo pci_dev_info_1166_0227 = { + 0x0227, pci_device_1166_0227, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11f8_7375, + pci_ss_list_1166_0227, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11fe_0001 = { - 0x0001, pci_device_11fe_0001, +static const pciDeviceInfo pci_dev_info_1166_0230 = { + 0x0230, pci_device_1166_0230, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0001, + pci_ss_list_1166_0230, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0002 = { - 0x0002, pci_device_11fe_0002, +static const pciDeviceInfo pci_dev_info_1166_0234 = { + 0x0234, pci_device_1166_0234, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0002, + pci_ss_list_1166_0234, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0003 = { - 0x0003, pci_device_11fe_0003, +static const pciDeviceInfo pci_dev_info_1166_0240 = { + 0x0240, pci_device_1166_0240, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0003, + pci_ss_list_1166_0240, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0004 = { - 0x0004, pci_device_11fe_0004, +static const pciDeviceInfo pci_dev_info_1166_0241 = { + 0x0241, pci_device_1166_0241, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0004, + pci_ss_list_1166_0241, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0005 = { - 0x0005, pci_device_11fe_0005, +static const pciDeviceInfo pci_dev_info_1166_0242 = { + 0x0242, pci_device_1166_0242, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0005, + pci_ss_list_1166_0242, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0006 = { - 0x0006, pci_device_11fe_0006, +static const pciDeviceInfo pci_dev_info_1166_024a = { + 0x024a, pci_device_1166_024a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0006, + pci_ss_list_1166_024a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0007 = { - 0x0007, pci_device_11fe_0007, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_116a_6100 = { + 0x6100, pci_device_116a_6100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0007, + pci_ss_list_116a_6100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0008 = { - 0x0008, pci_device_11fe_0008, +static const pciDeviceInfo pci_dev_info_116a_6800 = { + 0x6800, pci_device_116a_6800, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0008, + pci_ss_list_116a_6800, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0009 = { - 0x0009, pci_device_11fe_0009, +static const pciDeviceInfo pci_dev_info_116a_7100 = { + 0x7100, pci_device_116a_7100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0009, + pci_ss_list_116a_7100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_000a = { - 0x000a, pci_device_11fe_000a, +static const pciDeviceInfo pci_dev_info_116a_7800 = { + 0x7800, pci_device_116a_7800, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_000a, + pci_ss_list_116a_7800, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_000b = { - 0x000b, pci_device_11fe_000b, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1178_afa1 = { + 0xafa1, pci_device_1178_afa1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_000b, + pci_ss_list_1178_afa1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_000c = { - 0x000c, pci_device_11fe_000c, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1179_0102 = { + 0x0102, pci_device_1179_0102, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_000c, + pci_ss_list_1179_0102, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_000d = { - 0x000d, pci_device_11fe_000d, +static const pciDeviceInfo pci_dev_info_1179_0103 = { + 0x0103, pci_device_1179_0103, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_000d, + pci_ss_list_1179_0103, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_000e = { - 0x000e, pci_device_11fe_000e, +static const pciDeviceInfo pci_dev_info_1179_0404 = { + 0x0404, pci_device_1179_0404, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_000e, + pci_ss_list_1179_0404, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_000f = { - 0x000f, pci_device_11fe_000f, +static const pciDeviceInfo pci_dev_info_1179_0406 = { + 0x0406, pci_device_1179_0406, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_000f, + pci_ss_list_1179_0406, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0801 = { - 0x0801, pci_device_11fe_0801, +static const pciDeviceInfo pci_dev_info_1179_0407 = { + 0x0407, pci_device_1179_0407, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0801, + pci_ss_list_1179_0407, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0802 = { - 0x0802, pci_device_11fe_0802, +static const pciDeviceInfo pci_dev_info_1179_0601 = { + 0x0601, pci_device_1179_0601, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0802, + pci_ss_list_1179_0601, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0803 = { - 0x0803, pci_device_11fe_0803, +static const pciDeviceInfo pci_dev_info_1179_0603 = { + 0x0603, pci_device_1179_0603, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0803, + pci_ss_list_1179_0603, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0805 = { - 0x0805, pci_device_11fe_0805, +static const pciDeviceInfo pci_dev_info_1179_060a = { + 0x060a, pci_device_1179_060a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0805, + pci_ss_list_1179_060a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_080c = { - 0x080c, pci_device_11fe_080c, +static const pciDeviceInfo pci_dev_info_1179_060f = { + 0x060f, pci_device_1179_060f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_080c, + pci_ss_list_1179_060f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_080d = { - 0x080d, pci_device_11fe_080d, +static const pciDeviceInfo pci_dev_info_1179_0617 = { + 0x0617, pci_device_1179_0617, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_080d, + pci_ss_list_1179_0617, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_0903 = { - 0x0903, pci_device_11fe_0903, +static const pciDeviceInfo pci_dev_info_1179_0618 = { + 0x0618, pci_device_1179_0618, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_0903, + pci_ss_list_1179_0618, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_11fe_8015 = { - 0x8015, pci_device_11fe_8015, +static const pciDeviceInfo pci_dev_info_1179_0701 = { + 0x0701, pci_device_1179_0701, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11fe_8015, + pci_ss_list_1179_0701, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_11ff_0003 = { - 0x0003, pci_device_11ff_0003, +static const pciDeviceInfo pci_dev_info_1179_0804 = { + 0x0804, pci_device_1179_0804, #ifdef INIT_SUBSYS_INFO - pci_ss_list_11ff_0003, + pci_ss_list_1179_0804, #else NULL, #endif 0 }; +static const pciDeviceInfo pci_dev_info_1179_0805 = { + 0x0805, pci_device_1179_0805, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1179_0805, +#else + NULL, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1202_4300 = { - 0x4300, pci_device_1202_4300, + 0 +}; +static const pciDeviceInfo pci_dev_info_1179_0d01 = { + 0x0d01, pci_device_1179_0d01, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1202_4300, + pci_ss_list_1179_0d01, #else NULL, #endif @@ -73201,10 +86499,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1208_4853 = { - 0x4853, pci_device_1208_4853, +static const pciDeviceInfo pci_dev_info_117c_0030 = { + 0x0030, pci_device_117c_0030, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1208_4853, + pci_ss_list_117c_0030, #else NULL, #endif @@ -73212,586 +86510,583 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_120e_0100 = { - 0x0100, pci_device_120e_0100, +static const pciDeviceInfo pci_dev_info_1180_0465 = { + 0x0465, pci_device_1180_0465, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0100, + pci_ss_list_1180_0465, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0101 = { - 0x0101, pci_device_120e_0101, +static const pciDeviceInfo pci_dev_info_1180_0466 = { + 0x0466, pci_device_1180_0466, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0101, + pci_ss_list_1180_0466, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0102 = { - 0x0102, pci_device_120e_0102, +static const pciDeviceInfo pci_dev_info_1180_0475 = { + 0x0475, pci_device_1180_0475, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0102, + pci_ss_list_1180_0475, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0103 = { - 0x0103, pci_device_120e_0103, +static const pciDeviceInfo pci_dev_info_1180_0476 = { + 0x0476, pci_device_1180_0476, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0103, + pci_ss_list_1180_0476, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0104 = { - 0x0104, pci_device_120e_0104, +static const pciDeviceInfo pci_dev_info_1180_0477 = { + 0x0477, pci_device_1180_0477, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0104, + pci_ss_list_1180_0477, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0105 = { - 0x0105, pci_device_120e_0105, +static const pciDeviceInfo pci_dev_info_1180_0478 = { + 0x0478, pci_device_1180_0478, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0105, + pci_ss_list_1180_0478, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0200 = { - 0x0200, pci_device_120e_0200, +static const pciDeviceInfo pci_dev_info_1180_0511 = { + 0x0511, pci_device_1180_0511, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0200, + pci_ss_list_1180_0511, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0201 = { - 0x0201, pci_device_120e_0201, +static const pciDeviceInfo pci_dev_info_1180_0522 = { + 0x0522, pci_device_1180_0522, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0201, + pci_ss_list_1180_0522, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0300 = { - 0x0300, pci_device_120e_0300, +static const pciDeviceInfo pci_dev_info_1180_0551 = { + 0x0551, pci_device_1180_0551, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0300, + pci_ss_list_1180_0551, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0301 = { - 0x0301, pci_device_120e_0301, +static const pciDeviceInfo pci_dev_info_1180_0552 = { + 0x0552, pci_device_1180_0552, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0301, + pci_ss_list_1180_0552, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0310 = { - 0x0310, pci_device_120e_0310, +static const pciDeviceInfo pci_dev_info_1180_0554 = { + 0x0554, pci_device_1180_0554, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0310, + pci_ss_list_1180_0554, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0311 = { - 0x0311, pci_device_120e_0311, +static const pciDeviceInfo pci_dev_info_1180_0575 = { + 0x0575, pci_device_1180_0575, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0311, + pci_ss_list_1180_0575, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0320 = { - 0x0320, pci_device_120e_0320, +static const pciDeviceInfo pci_dev_info_1180_0576 = { + 0x0576, pci_device_1180_0576, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0320, + pci_ss_list_1180_0576, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0321 = { - 0x0321, pci_device_120e_0321, +static const pciDeviceInfo pci_dev_info_1180_0592 = { + 0x0592, pci_device_1180_0592, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0321, + pci_ss_list_1180_0592, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_120e_0400 = { - 0x0400, pci_device_120e_0400, +static const pciDeviceInfo pci_dev_info_1180_0811 = { + 0x0811, pci_device_1180_0811, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120e_0400, + pci_ss_list_1180_0811, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_120f_0001 = { - 0x0001, pci_device_120f_0001, +static const pciDeviceInfo pci_dev_info_1180_0822 = { + 0x0822, pci_device_1180_0822, #ifdef INIT_SUBSYS_INFO - pci_ss_list_120f_0001, + pci_ss_list_1180_0822, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1217_6729 = { - 0x6729, pci_device_1217_6729, +static const pciDeviceInfo pci_dev_info_1180_0841 = { + 0x0841, pci_device_1180_0841, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_6729, + pci_ss_list_1180_0841, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_673a = { - 0x673a, pci_device_1217_673a, +static const pciDeviceInfo pci_dev_info_1180_0852 = { + 0x0852, pci_device_1180_0852, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_673a, + pci_ss_list_1180_0852, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_6832 = { - 0x6832, pci_device_1217_6832, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1186_0100 = { + 0x0100, pci_device_1186_0100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_6832, + pci_ss_list_1186_0100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_6836 = { - 0x6836, pci_device_1217_6836, +static const pciDeviceInfo pci_dev_info_1186_1002 = { + 0x1002, pci_device_1186_1002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_6836, + pci_ss_list_1186_1002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_6872 = { - 0x6872, pci_device_1217_6872, +static const pciDeviceInfo pci_dev_info_1186_1025 = { + 0x1025, pci_device_1186_1025, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_6872, + pci_ss_list_1186_1025, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_6925 = { - 0x6925, pci_device_1217_6925, +static const pciDeviceInfo pci_dev_info_1186_1026 = { + 0x1026, pci_device_1186_1026, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_6925, + pci_ss_list_1186_1026, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_6933 = { - 0x6933, pci_device_1217_6933, +static const pciDeviceInfo pci_dev_info_1186_1043 = { + 0x1043, pci_device_1186_1043, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_6933, + pci_ss_list_1186_1043, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_6972 = { - 0x6972, pci_device_1217_6972, +static const pciDeviceInfo pci_dev_info_1186_1300 = { + 0x1300, pci_device_1186_1300, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_6972, + pci_ss_list_1186_1300, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_7110 = { - 0x7110, pci_device_1217_7110, +static const pciDeviceInfo pci_dev_info_1186_1340 = { + 0x1340, pci_device_1186_1340, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_7110, + pci_ss_list_1186_1340, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_7112 = { - 0x7112, pci_device_1217_7112, +static const pciDeviceInfo pci_dev_info_1186_1541 = { + 0x1541, pci_device_1186_1541, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_7112, + pci_ss_list_1186_1541, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_7113 = { - 0x7113, pci_device_1217_7113, +static const pciDeviceInfo pci_dev_info_1186_1561 = { + 0x1561, pci_device_1186_1561, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_7113, + pci_ss_list_1186_1561, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_7114 = { - 0x7114, pci_device_1217_7114, +static const pciDeviceInfo pci_dev_info_1186_2027 = { + 0x2027, pci_device_1186_2027, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_7114, + pci_ss_list_1186_2027, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_71e2 = { - 0x71e2, pci_device_1217_71e2, +static const pciDeviceInfo pci_dev_info_1186_3203 = { + 0x3203, pci_device_1186_3203, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_71e2, + pci_ss_list_1186_3203, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_7212 = { - 0x7212, pci_device_1217_7212, +static const pciDeviceInfo pci_dev_info_1186_3300 = { + 0x3300, pci_device_1186_3300, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_7212, + pci_ss_list_1186_3300, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_7213 = { - 0x7213, pci_device_1217_7213, +static const pciDeviceInfo pci_dev_info_1186_3a03 = { + 0x3a03, pci_device_1186_3a03, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_7213, + pci_ss_list_1186_3a03, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1217_7223 = { - 0x7223, pci_device_1217_7223, +static const pciDeviceInfo pci_dev_info_1186_3a04 = { + 0x3a04, pci_device_1186_3a04, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1217_7223, + pci_ss_list_1186_3a04, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_121a_0001 = { - 0x0001, pci_device_121a_0001, +static const pciDeviceInfo pci_dev_info_1186_3a05 = { + 0x3a05, pci_device_1186_3a05, #ifdef INIT_SUBSYS_INFO - pci_ss_list_121a_0001, + pci_ss_list_1186_3a05, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_121a_0002 = { - 0x0002, pci_device_121a_0002, +static const pciDeviceInfo pci_dev_info_1186_3a07 = { + 0x3a07, pci_device_1186_3a07, #ifdef INIT_SUBSYS_INFO - pci_ss_list_121a_0002, + pci_ss_list_1186_3a07, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_121a_0003 = { - 0x0003, pci_device_121a_0003, +static const pciDeviceInfo pci_dev_info_1186_3a08 = { + 0x3a08, pci_device_1186_3a08, #ifdef INIT_SUBSYS_INFO - pci_ss_list_121a_0003, + pci_ss_list_1186_3a08, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_121a_0004 = { - 0x0004, pci_device_121a_0004, +static const pciDeviceInfo pci_dev_info_1186_3a10 = { + 0x3a10, pci_device_1186_3a10, #ifdef INIT_SUBSYS_INFO - pci_ss_list_121a_0004, + pci_ss_list_1186_3a10, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_121a_0005 = { - 0x0005, pci_device_121a_0005, +static const pciDeviceInfo pci_dev_info_1186_3a11 = { + 0x3a11, pci_device_1186_3a11, #ifdef INIT_SUBSYS_INFO - pci_ss_list_121a_0005, + pci_ss_list_1186_3a11, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_121a_0009 = { - 0x0009, pci_device_121a_0009, +static const pciDeviceInfo pci_dev_info_1186_3a12 = { + 0x3a12, pci_device_1186_3a12, #ifdef INIT_SUBSYS_INFO - pci_ss_list_121a_0009, + pci_ss_list_1186_3a12, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_121a_0057 = { - 0x0057, pci_device_121a_0057, +static const pciDeviceInfo pci_dev_info_1186_3a13 = { + 0x3a13, pci_device_1186_3a13, #ifdef INIT_SUBSYS_INFO - pci_ss_list_121a_0057, + pci_ss_list_1186_3a13, #else NULL, #endif 0 }; -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1220_1220 = { - 0x1220, pci_device_1220_1220, +static const pciDeviceInfo pci_dev_info_1186_3a14 = { + 0x3a14, pci_device_1186_3a14, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1220_1220, + pci_ss_list_1186_3a14, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1223_0003 = { - 0x0003, pci_device_1223_0003, +static const pciDeviceInfo pci_dev_info_1186_3a63 = { + 0x3a63, pci_device_1186_3a63, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1223_0003, + pci_ss_list_1186_3a63, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1223_0004 = { - 0x0004, pci_device_1223_0004, +static const pciDeviceInfo pci_dev_info_1186_4000 = { + 0x4000, pci_device_1186_4000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1223_0004, + pci_ss_list_1186_4000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1223_0005 = { - 0x0005, pci_device_1223_0005, +static const pciDeviceInfo pci_dev_info_1186_4300 = { + 0x4300, pci_device_1186_4300, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1223_0005, + pci_ss_list_1186_4300, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1223_0008 = { - 0x0008, pci_device_1223_0008, +static const pciDeviceInfo pci_dev_info_1186_4c00 = { + 0x4c00, pci_device_1186_4c00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1223_0008, + pci_ss_list_1186_4c00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1223_0009 = { - 0x0009, pci_device_1223_0009, +static const pciDeviceInfo pci_dev_info_1186_8400 = { + 0x8400, pci_device_1186_8400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1223_0009, + pci_ss_list_1186_8400, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1223_000a = { - 0x000a, pci_device_1223_000a, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_118c_0014 = { + 0x0014, pci_device_118c_0014, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1223_000a, + pci_ss_list_118c_0014, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1223_000b = { - 0x000b, pci_device_1223_000b, +static const pciDeviceInfo pci_dev_info_118c_1117 = { + 0x1117, pci_device_118c_1117, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1223_000b, + pci_ss_list_118c_1117, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1223_000c = { - 0x000c, pci_device_1223_000c, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_118d_0001 = { + 0x0001, pci_device_118d_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1223_000c, + pci_ss_list_118d_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1223_000d = { - 0x000d, pci_device_1223_000d, +static const pciDeviceInfo pci_dev_info_118d_0012 = { + 0x0012, pci_device_118d_0012, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1223_000d, + pci_ss_list_118d_0012, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1223_000e = { - 0x000e, pci_device_1223_000e, +static const pciDeviceInfo pci_dev_info_118d_0014 = { + 0x0014, pci_device_118d_0014, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1223_000e, + pci_ss_list_118d_0014, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1227_0006 = { - 0x0006, pci_device_1227_0006, +static const pciDeviceInfo pci_dev_info_118d_0024 = { + 0x0024, pci_device_118d_0024, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1227_0006, + pci_ss_list_118d_0024, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_122d_1206 = { - 0x1206, pci_device_122d_1206, +static const pciDeviceInfo pci_dev_info_118d_0044 = { + 0x0044, pci_device_118d_0044, #ifdef INIT_SUBSYS_INFO - pci_ss_list_122d_1206, + pci_ss_list_118d_0044, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_122d_1400 = { - 0x1400, pci_device_122d_1400, +static const pciDeviceInfo pci_dev_info_118d_0112 = { + 0x0112, pci_device_118d_0112, #ifdef INIT_SUBSYS_INFO - pci_ss_list_122d_1400, + pci_ss_list_118d_0112, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_122d_50dc = { - 0x50dc, pci_device_122d_50dc, +static const pciDeviceInfo pci_dev_info_118d_0114 = { + 0x0114, pci_device_118d_0114, #ifdef INIT_SUBSYS_INFO - pci_ss_list_122d_50dc, + pci_ss_list_118d_0114, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_122d_80da = { - 0x80da, pci_device_122d_80da, +static const pciDeviceInfo pci_dev_info_118d_0124 = { + 0x0124, pci_device_118d_0124, #ifdef INIT_SUBSYS_INFO - pci_ss_list_122d_80da, + pci_ss_list_118d_0124, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1236_0000 = { - 0x0000, pci_device_1236_0000, +static const pciDeviceInfo pci_dev_info_118d_0144 = { + 0x0144, pci_device_118d_0144, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1236_0000, + pci_ss_list_118d_0144, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1236_6401 = { - 0x6401, pci_device_1236_6401, +static const pciDeviceInfo pci_dev_info_118d_0212 = { + 0x0212, pci_device_118d_0212, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1236_6401, + pci_ss_list_118d_0212, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_123d_0000 = { - 0x0000, pci_device_123d_0000, +static const pciDeviceInfo pci_dev_info_118d_0214 = { + 0x0214, pci_device_118d_0214, #ifdef INIT_SUBSYS_INFO - pci_ss_list_123d_0000, + pci_ss_list_118d_0214, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_123d_0002 = { - 0x0002, pci_device_123d_0002, +static const pciDeviceInfo pci_dev_info_118d_0224 = { + 0x0224, pci_device_118d_0224, #ifdef INIT_SUBSYS_INFO - pci_ss_list_123d_0002, + pci_ss_list_118d_0224, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_123d_0003 = { - 0x0003, pci_device_123d_0003, +static const pciDeviceInfo pci_dev_info_118d_0244 = { + 0x0244, pci_device_118d_0244, #ifdef INIT_SUBSYS_INFO - pci_ss_list_123d_0003, + pci_ss_list_118d_0244, #else NULL, #endif 0 }; +static const pciDeviceInfo pci_dev_info_118d_0312 = { + 0x0312, pci_device_118d_0312, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_118d_0312, +#else + NULL, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_123f_00e4 = { - 0x00e4, pci_device_123f_00e4, + 0 +}; +static const pciDeviceInfo pci_dev_info_118d_0314 = { + 0x0314, pci_device_118d_0314, #ifdef INIT_SUBSYS_INFO - pci_ss_list_123f_00e4, + pci_ss_list_118d_0314, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_123f_8120 = { - 0x8120, pci_device_123f_8120, +static const pciDeviceInfo pci_dev_info_118d_0324 = { + 0x0324, pci_device_118d_0324, #ifdef INIT_SUBSYS_INFO - pci_ss_list_123f_8120, + pci_ss_list_118d_0324, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_123f_8888 = { - 0x8888, pci_device_123f_8888, +static const pciDeviceInfo pci_dev_info_118d_0344 = { + 0x0344, pci_device_118d_0344, #ifdef INIT_SUBSYS_INFO - pci_ss_list_123f_8888, + pci_ss_list_118d_0344, #else NULL, #endif @@ -73799,171 +87094,165 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1242_1560 = { - 0x1560, pci_device_1242_1560, +static const pciDeviceInfo pci_dev_info_1190_c731 = { + 0xc731, pci_device_1190_c731, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1242_1560, + pci_ss_list_1190_c731, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1242_4643 = { - 0x4643, pci_device_1242_4643, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1191_0003 = { + 0x0003, pci_device_1191_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1242_4643, + pci_ss_list_1191_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1242_6562 = { - 0x6562, pci_device_1242_6562, +static const pciDeviceInfo pci_dev_info_1191_0004 = { + 0x0004, pci_device_1191_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1242_6562, + pci_ss_list_1191_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1242_656a = { - 0x656a, pci_device_1242_656a, +static const pciDeviceInfo pci_dev_info_1191_0005 = { + 0x0005, pci_device_1191_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1242_656a, + pci_ss_list_1191_0005, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1244_0700 = { - 0x0700, pci_device_1244_0700, +static const pciDeviceInfo pci_dev_info_1191_0006 = { + 0x0006, pci_device_1191_0006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1244_0700, + pci_ss_list_1191_0006, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1244_0800 = { - 0x0800, pci_device_1244_0800, +static const pciDeviceInfo pci_dev_info_1191_0007 = { + 0x0007, pci_device_1191_0007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1244_0800, + pci_ss_list_1191_0007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1244_0a00 = { - 0x0a00, pci_device_1244_0a00, +static const pciDeviceInfo pci_dev_info_1191_0008 = { + 0x0008, pci_device_1191_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1244_0a00, + pci_ss_list_1191_0008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1244_0e00 = { - 0x0e00, pci_device_1244_0e00, +static const pciDeviceInfo pci_dev_info_1191_0009 = { + 0x0009, pci_device_1191_0009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1244_0e00, + pci_ss_list_1191_0009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1244_1100 = { - 0x1100, pci_device_1244_1100, +static const pciDeviceInfo pci_dev_info_1191_8002 = { + 0x8002, pci_device_1191_8002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1244_1100, + pci_ss_list_1191_8002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1244_1200 = { - 0x1200, pci_device_1244_1200, +static const pciDeviceInfo pci_dev_info_1191_8010 = { + 0x8010, pci_device_1191_8010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1244_1200, + pci_ss_list_1191_8010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1244_2700 = { - 0x2700, pci_device_1244_2700, +static const pciDeviceInfo pci_dev_info_1191_8020 = { + 0x8020, pci_device_1191_8020, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1244_2700, + pci_ss_list_1191_8020, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1244_2900 = { - 0x2900, pci_device_1244_2900, +static const pciDeviceInfo pci_dev_info_1191_8030 = { + 0x8030, pci_device_1191_8030, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1244_2900, + pci_ss_list_1191_8030, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_124b_0040 = { - 0x0040, pci_device_124b_0040, +static const pciDeviceInfo pci_dev_info_1191_8040 = { + 0x8040, pci_device_1191_8040, #ifdef INIT_SUBSYS_INFO - pci_ss_list_124b_0040, + pci_ss_list_1191_8040, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_124d_0000 = { - 0x0000, pci_device_124d_0000, +static const pciDeviceInfo pci_dev_info_1191_8050 = { + 0x8050, pci_device_1191_8050, #ifdef INIT_SUBSYS_INFO - pci_ss_list_124d_0000, + pci_ss_list_1191_8050, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_124d_0002 = { - 0x0002, pci_device_124d_0002, +static const pciDeviceInfo pci_dev_info_1191_8060 = { + 0x8060, pci_device_1191_8060, #ifdef INIT_SUBSYS_INFO - pci_ss_list_124d_0002, + pci_ss_list_1191_8060, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_124d_0003 = { - 0x0003, pci_device_124d_0003, +static const pciDeviceInfo pci_dev_info_1191_8080 = { + 0x8080, pci_device_1191_8080, #ifdef INIT_SUBSYS_INFO - pci_ss_list_124d_0003, + pci_ss_list_1191_8080, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_124d_0004 = { - 0x0004, pci_device_124d_0004, +static const pciDeviceInfo pci_dev_info_1191_8081 = { + 0x8081, pci_device_1191_8081, #ifdef INIT_SUBSYS_INFO - pci_ss_list_124d_0004, + pci_ss_list_1191_8081, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_124f_0041 = { - 0x0041, pci_device_124f_0041, +static const pciDeviceInfo pci_dev_info_1191_808a = { + 0x808a, pci_device_1191_808a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_124f_0041, + pci_ss_list_1191_808a, #else NULL, #endif @@ -73971,926 +87260,909 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1255_1110 = { - 0x1110, pci_device_1255_1110, +static const pciDeviceInfo pci_dev_info_1193_0001 = { + 0x0001, pci_device_1193_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1255_1110, + pci_ss_list_1193_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1255_1210 = { - 0x1210, pci_device_1255_1210, +static const pciDeviceInfo pci_dev_info_1193_0002 = { + 0x0002, pci_device_1193_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1255_1210, + pci_ss_list_1193_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1255_2110 = { - 0x2110, pci_device_1255_2110, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1197_010c = { + 0x010c, pci_device_1197_010c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1255_2110, + pci_ss_list_1197_010c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1255_2120 = { - 0x2120, pci_device_1255_2120, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_119b_1221 = { + 0x1221, pci_device_119b_1221, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1255_2120, + pci_ss_list_119b_1221, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1255_2130 = { - 0x2130, pci_device_1255_2130, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_119e_0001 = { + 0x0001, pci_device_119e_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1255_2130, + pci_ss_list_119e_0001, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1256_4201 = { - 0x4201, pci_device_1256_4201, +static const pciDeviceInfo pci_dev_info_119e_0003 = { + 0x0003, pci_device_119e_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1256_4201, + pci_ss_list_119e_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1256_4401 = { - 0x4401, pci_device_1256_4401, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11a9_4240 = { + 0x4240, pci_device_11a9_4240, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1256_4401, + pci_ss_list_11a9_4240, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1256_5201 = { - 0x5201, pci_device_1256_5201, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11ab_0146 = { + 0x0146, pci_device_11ab_0146, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1256_5201, + pci_ss_list_11ab_0146, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1259_2560 = { - 0x2560, pci_device_1259_2560, +static const pciDeviceInfo pci_dev_info_11ab_138f = { + 0x138f, pci_device_11ab_138f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1259_2560, + pci_ss_list_11ab_138f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1259_a117 = { - 0xa117, pci_device_1259_a117, +static const pciDeviceInfo pci_dev_info_11ab_1fa6 = { + 0x1fa6, pci_device_11ab_1fa6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1259_a117, + pci_ss_list_11ab_1fa6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1259_a120 = { - 0xa120, pci_device_1259_a120, +static const pciDeviceInfo pci_dev_info_11ab_1fa7 = { + 0x1fa7, pci_device_11ab_1fa7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1259_a120, + pci_ss_list_11ab_1fa7, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_125b_1400 = { - 0x1400, pci_device_125b_1400, +static const pciDeviceInfo pci_dev_info_11ab_1faa = { + 0x1faa, pci_device_11ab_1faa, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125b_1400, + pci_ss_list_11ab_1faa, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_125c_0101 = { - 0x0101, pci_device_125c_0101, +static const pciDeviceInfo pci_dev_info_11ab_4320 = { + 0x4320, pci_device_11ab_4320, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125c_0101, + pci_ss_list_11ab_4320, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125c_0640 = { - 0x0640, pci_device_125c_0640, +static const pciDeviceInfo pci_dev_info_11ab_4340 = { + 0x4340, pci_device_11ab_4340, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125c_0640, + pci_ss_list_11ab_4340, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_125d_0000 = { - 0x0000, pci_device_125d_0000, +static const pciDeviceInfo pci_dev_info_11ab_4341 = { + 0x4341, pci_device_11ab_4341, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_0000, + pci_ss_list_11ab_4341, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_1948 = { - 0x1948, pci_device_125d_1948, +static const pciDeviceInfo pci_dev_info_11ab_4342 = { + 0x4342, pci_device_11ab_4342, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_1948, + pci_ss_list_11ab_4342, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_1968 = { - 0x1968, pci_device_125d_1968, +static const pciDeviceInfo pci_dev_info_11ab_4343 = { + 0x4343, pci_device_11ab_4343, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_1968, + pci_ss_list_11ab_4343, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_1969 = { - 0x1969, pci_device_125d_1969, +static const pciDeviceInfo pci_dev_info_11ab_4344 = { + 0x4344, pci_device_11ab_4344, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_1969, + pci_ss_list_11ab_4344, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_1978 = { - 0x1978, pci_device_125d_1978, +static const pciDeviceInfo pci_dev_info_11ab_4345 = { + 0x4345, pci_device_11ab_4345, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_1978, + pci_ss_list_11ab_4345, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_1988 = { - 0x1988, pci_device_125d_1988, +static const pciDeviceInfo pci_dev_info_11ab_4346 = { + 0x4346, pci_device_11ab_4346, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_1988, + pci_ss_list_11ab_4346, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_1989 = { - 0x1989, pci_device_125d_1989, +static const pciDeviceInfo pci_dev_info_11ab_4347 = { + 0x4347, pci_device_11ab_4347, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_1989, + pci_ss_list_11ab_4347, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_1998 = { - 0x1998, pci_device_125d_1998, +static const pciDeviceInfo pci_dev_info_11ab_4350 = { + 0x4350, pci_device_11ab_4350, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_1998, + pci_ss_list_11ab_4350, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_1999 = { - 0x1999, pci_device_125d_1999, +static const pciDeviceInfo pci_dev_info_11ab_4351 = { + 0x4351, pci_device_11ab_4351, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_1999, + pci_ss_list_11ab_4351, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_199a = { - 0x199a, pci_device_125d_199a, +static const pciDeviceInfo pci_dev_info_11ab_4352 = { + 0x4352, pci_device_11ab_4352, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_199a, + pci_ss_list_11ab_4352, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_199b = { - 0x199b, pci_device_125d_199b, +static const pciDeviceInfo pci_dev_info_11ab_4360 = { + 0x4360, pci_device_11ab_4360, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_199b, + pci_ss_list_11ab_4360, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_2808 = { - 0x2808, pci_device_125d_2808, +static const pciDeviceInfo pci_dev_info_11ab_4361 = { + 0x4361, pci_device_11ab_4361, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_2808, + pci_ss_list_11ab_4361, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_2838 = { - 0x2838, pci_device_125d_2838, +static const pciDeviceInfo pci_dev_info_11ab_4362 = { + 0x4362, pci_device_11ab_4362, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_2838, + pci_ss_list_11ab_4362, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_125d_2898 = { - 0x2898, pci_device_125d_2898, +static const pciDeviceInfo pci_dev_info_11ab_4363 = { + 0x4363, pci_device_11ab_4363, #ifdef INIT_SUBSYS_INFO - pci_ss_list_125d_2898, + pci_ss_list_11ab_4363, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1260_3872 = { - 0x3872, pci_device_1260_3872, +static const pciDeviceInfo pci_dev_info_11ab_4611 = { + 0x4611, pci_device_11ab_4611, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1260_3872, + pci_ss_list_11ab_4611, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1260_3873 = { - 0x3873, pci_device_1260_3873, +static const pciDeviceInfo pci_dev_info_11ab_4620 = { + 0x4620, pci_device_11ab_4620, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1260_3873, + pci_ss_list_11ab_4620, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1260_3886 = { - 0x3886, pci_device_1260_3886, +static const pciDeviceInfo pci_dev_info_11ab_4801 = { + 0x4801, pci_device_11ab_4801, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1260_3886, + pci_ss_list_11ab_4801, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1260_3890 = { - 0x3890, pci_device_1260_3890, +static const pciDeviceInfo pci_dev_info_11ab_5005 = { + 0x5005, pci_device_11ab_5005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1260_3890, + pci_ss_list_11ab_5005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1260_8130 = { - 0x8130, pci_device_1260_8130, +static const pciDeviceInfo pci_dev_info_11ab_5040 = { + 0x5040, pci_device_11ab_5040, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1260_8130, + pci_ss_list_11ab_5040, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1260_8131 = { - 0x8131, pci_device_1260_8131, +static const pciDeviceInfo pci_dev_info_11ab_5041 = { + 0x5041, pci_device_11ab_5041, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1260_8131, + pci_ss_list_11ab_5041, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1266_0001 = { - 0x0001, pci_device_1266_0001, +static const pciDeviceInfo pci_dev_info_11ab_5080 = { + 0x5080, pci_device_11ab_5080, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1266_0001, + pci_ss_list_11ab_5080, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1266_1910 = { - 0x1910, pci_device_1266_1910, +static const pciDeviceInfo pci_dev_info_11ab_5081 = { + 0x5081, pci_device_11ab_5081, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1266_1910, + pci_ss_list_11ab_5081, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1267_5352 = { - 0x5352, pci_device_1267_5352, +static const pciDeviceInfo pci_dev_info_11ab_6041 = { + 0x6041, pci_device_11ab_6041, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1267_5352, + pci_ss_list_11ab_6041, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1267_5a4b = { - 0x5a4b, pci_device_1267_5a4b, +static const pciDeviceInfo pci_dev_info_11ab_6081 = { + 0x6081, pci_device_11ab_6081, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1267_5a4b, + pci_ss_list_11ab_6081, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_126c_1211 = { - 0x1211, pci_device_126c_1211, +static const pciDeviceInfo pci_dev_info_11ab_6460 = { + 0x6460, pci_device_11ab_6460, #ifdef INIT_SUBSYS_INFO - pci_ss_list_126c_1211, + pci_ss_list_11ab_6460, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_126c_126c = { - 0x126c, pci_device_126c_126c, +static const pciDeviceInfo pci_dev_info_11ab_6480 = { + 0x6480, pci_device_11ab_6480, #ifdef INIT_SUBSYS_INFO - pci_ss_list_126c_126c, + pci_ss_list_11ab_6480, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_126f_0501 = { - 0x0501, pci_device_126f_0501, +static const pciDeviceInfo pci_dev_info_11ab_f003 = { + 0xf003, pci_device_11ab_f003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_126f_0501, + pci_ss_list_11ab_f003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_126f_0710 = { - 0x0710, pci_device_126f_0710, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11ad_0002 = { + 0x0002, pci_device_11ad_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_126f_0710, + pci_ss_list_11ad_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_126f_0712 = { - 0x0712, pci_device_126f_0712, +static const pciDeviceInfo pci_dev_info_11ad_c115 = { + 0xc115, pci_device_11ad_c115, #ifdef INIT_SUBSYS_INFO - pci_ss_list_126f_0712, + pci_ss_list_11ad_c115, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_126f_0720 = { - 0x0720, pci_device_126f_0720, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11af_0001 = { + 0x0001, pci_device_11af_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_126f_0720, + pci_ss_list_11af_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_126f_0730 = { - 0x0730, pci_device_126f_0730, +static const pciDeviceInfo pci_dev_info_11af_ee40 = { + 0xee40, pci_device_11af_ee40, #ifdef INIT_SUBSYS_INFO - pci_ss_list_126f_0730, + pci_ss_list_11af_ee40, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_126f_0810 = { - 0x0810, pci_device_126f_0810, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11b0_0002 = { + 0x0002, pci_device_11b0_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_126f_0810, + pci_ss_list_11b0_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_126f_0811 = { - 0x0811, pci_device_126f_0811, +static const pciDeviceInfo pci_dev_info_11b0_0292 = { + 0x0292, pci_device_11b0_0292, #ifdef INIT_SUBSYS_INFO - pci_ss_list_126f_0811, + pci_ss_list_11b0_0292, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_126f_0820 = { - 0x0820, pci_device_126f_0820, +static const pciDeviceInfo pci_dev_info_11b0_0960 = { + 0x0960, pci_device_11b0_0960, #ifdef INIT_SUBSYS_INFO - pci_ss_list_126f_0820, + pci_ss_list_11b0_0960, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_126f_0910 = { - 0x0910, pci_device_126f_0910, +static const pciDeviceInfo pci_dev_info_11b0_c960 = { + 0xc960, pci_device_11b0_c960, #ifdef INIT_SUBSYS_INFO - pci_ss_list_126f_0910, + pci_ss_list_11b0_c960, #else NULL, #endif 0 }; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1273_0002 = { - 0x0002, pci_device_1273_0002, +static const pciDeviceInfo pci_dev_info_11b8_0001 = { + 0x0001, pci_device_11b8_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1273_0002, + pci_ss_list_11b8_0001, #else NULL, #endif 0 }; #endif -static const pciDeviceInfo pci_dev_info_1274_1171 = { - 0x1171, pci_device_1274_1171, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11b9_c0ed = { + 0xc0ed, pci_device_11b9_c0ed, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1274_1171, + pci_ss_list_11b9_c0ed, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1274_1371 = { - 0x1371, pci_device_1274_1371, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11bc_0001 = { + 0x0001, pci_device_11bc_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1274_1371, + pci_ss_list_11bc_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1274_5000 = { - 0x5000, pci_device_1274_5000, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11bd_002e = { + 0x002e, pci_device_11bd_002e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1274_5000, + pci_ss_list_11bd_002e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1274_5880 = { - 0x5880, pci_device_1274_5880, +static const pciDeviceInfo pci_dev_info_11bd_bede = { + 0xbede, pci_device_11bd_bede, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1274_5880, + pci_ss_list_11bd_bede, #else NULL, #endif - 0x0401 + 0 }; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1278_0701 = { - 0x0701, pci_device_1278_0701, +static const pciDeviceInfo pci_dev_info_11c1_0440 = { + 0x0440, pci_device_11c1_0440, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1278_0701, + pci_ss_list_11c1_0440, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1278_0710 = { - 0x0710, pci_device_1278_0710, +static const pciDeviceInfo pci_dev_info_11c1_0441 = { + 0x0441, pci_device_11c1_0441, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1278_0710, + pci_ss_list_11c1_0441, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1279_0295 = { - 0x0295, pci_device_1279_0295, +static const pciDeviceInfo pci_dev_info_11c1_0442 = { + 0x0442, pci_device_11c1_0442, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1279_0295, + pci_ss_list_11c1_0442, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1279_0395 = { - 0x0395, pci_device_1279_0395, +static const pciDeviceInfo pci_dev_info_11c1_0443 = { + 0x0443, pci_device_11c1_0443, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1279_0395, + pci_ss_list_11c1_0443, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1279_0396 = { - 0x0396, pci_device_1279_0396, +static const pciDeviceInfo pci_dev_info_11c1_0444 = { + 0x0444, pci_device_11c1_0444, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1279_0396, + pci_ss_list_11c1_0444, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1279_0397 = { - 0x0397, pci_device_1279_0397, +static const pciDeviceInfo pci_dev_info_11c1_0445 = { + 0x0445, pci_device_11c1_0445, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1279_0397, + pci_ss_list_11c1_0445, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_127a_1002 = { - 0x1002, pci_device_127a_1002, +static const pciDeviceInfo pci_dev_info_11c1_0446 = { + 0x0446, pci_device_11c1_0446, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1002, + pci_ss_list_11c1_0446, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1003 = { - 0x1003, pci_device_127a_1003, +static const pciDeviceInfo pci_dev_info_11c1_0447 = { + 0x0447, pci_device_11c1_0447, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1003, + pci_ss_list_11c1_0447, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1004 = { - 0x1004, pci_device_127a_1004, +static const pciDeviceInfo pci_dev_info_11c1_0448 = { + 0x0448, pci_device_11c1_0448, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1004, + pci_ss_list_11c1_0448, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1005 = { - 0x1005, pci_device_127a_1005, +static const pciDeviceInfo pci_dev_info_11c1_0449 = { + 0x0449, pci_device_11c1_0449, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1005, + pci_ss_list_11c1_0449, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1022 = { - 0x1022, pci_device_127a_1022, +static const pciDeviceInfo pci_dev_info_11c1_044a = { + 0x044a, pci_device_11c1_044a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1022, + pci_ss_list_11c1_044a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1023 = { - 0x1023, pci_device_127a_1023, +static const pciDeviceInfo pci_dev_info_11c1_044b = { + 0x044b, pci_device_11c1_044b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1023, + pci_ss_list_11c1_044b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1024 = { - 0x1024, pci_device_127a_1024, +static const pciDeviceInfo pci_dev_info_11c1_044c = { + 0x044c, pci_device_11c1_044c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1024, + pci_ss_list_11c1_044c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1025 = { - 0x1025, pci_device_127a_1025, +static const pciDeviceInfo pci_dev_info_11c1_044d = { + 0x044d, pci_device_11c1_044d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1025, + pci_ss_list_11c1_044d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1026 = { - 0x1026, pci_device_127a_1026, +static const pciDeviceInfo pci_dev_info_11c1_044e = { + 0x044e, pci_device_11c1_044e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1026, + pci_ss_list_11c1_044e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1032 = { - 0x1032, pci_device_127a_1032, +static const pciDeviceInfo pci_dev_info_11c1_044f = { + 0x044f, pci_device_11c1_044f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1032, + pci_ss_list_11c1_044f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1033 = { - 0x1033, pci_device_127a_1033, +static const pciDeviceInfo pci_dev_info_11c1_0450 = { + 0x0450, pci_device_11c1_0450, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1033, + pci_ss_list_11c1_0450, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1034 = { - 0x1034, pci_device_127a_1034, +static const pciDeviceInfo pci_dev_info_11c1_0451 = { + 0x0451, pci_device_11c1_0451, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1034, + pci_ss_list_11c1_0451, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1035 = { - 0x1035, pci_device_127a_1035, +static const pciDeviceInfo pci_dev_info_11c1_0452 = { + 0x0452, pci_device_11c1_0452, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1035, + pci_ss_list_11c1_0452, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1036 = { - 0x1036, pci_device_127a_1036, +static const pciDeviceInfo pci_dev_info_11c1_0453 = { + 0x0453, pci_device_11c1_0453, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1036, + pci_ss_list_11c1_0453, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_1085 = { - 0x1085, pci_device_127a_1085, +static const pciDeviceInfo pci_dev_info_11c1_0454 = { + 0x0454, pci_device_11c1_0454, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_1085, + pci_ss_list_11c1_0454, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_2005 = { - 0x2005, pci_device_127a_2005, +static const pciDeviceInfo pci_dev_info_11c1_0455 = { + 0x0455, pci_device_11c1_0455, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_2005, + pci_ss_list_11c1_0455, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_2013 = { - 0x2013, pci_device_127a_2013, +static const pciDeviceInfo pci_dev_info_11c1_0456 = { + 0x0456, pci_device_11c1_0456, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_2013, + pci_ss_list_11c1_0456, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_2014 = { - 0x2014, pci_device_127a_2014, +static const pciDeviceInfo pci_dev_info_11c1_0457 = { + 0x0457, pci_device_11c1_0457, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_2014, + pci_ss_list_11c1_0457, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_2015 = { - 0x2015, pci_device_127a_2015, +static const pciDeviceInfo pci_dev_info_11c1_0458 = { + 0x0458, pci_device_11c1_0458, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_2015, + pci_ss_list_11c1_0458, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_2016 = { - 0x2016, pci_device_127a_2016, +static const pciDeviceInfo pci_dev_info_11c1_0459 = { + 0x0459, pci_device_11c1_0459, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_2016, + pci_ss_list_11c1_0459, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_4311 = { - 0x4311, pci_device_127a_4311, +static const pciDeviceInfo pci_dev_info_11c1_045a = { + 0x045a, pci_device_11c1_045a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_4311, + pci_ss_list_11c1_045a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_4320 = { - 0x4320, pci_device_127a_4320, +static const pciDeviceInfo pci_dev_info_11c1_045c = { + 0x045c, pci_device_11c1_045c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_4320, + pci_ss_list_11c1_045c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_4321 = { - 0x4321, pci_device_127a_4321, +static const pciDeviceInfo pci_dev_info_11c1_0461 = { + 0x0461, pci_device_11c1_0461, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_4321, + pci_ss_list_11c1_0461, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_4322 = { - 0x4322, pci_device_127a_4322, +static const pciDeviceInfo pci_dev_info_11c1_0462 = { + 0x0462, pci_device_11c1_0462, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_4322, + pci_ss_list_11c1_0462, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_127a_8234 = { - 0x8234, pci_device_127a_8234, +static const pciDeviceInfo pci_dev_info_11c1_0480 = { + 0x0480, pci_device_11c1_0480, #ifdef INIT_SUBSYS_INFO - pci_ss_list_127a_8234, + pci_ss_list_11c1_0480, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1282_9009 = { - 0x9009, pci_device_1282_9009, +static const pciDeviceInfo pci_dev_info_11c1_048c = { + 0x048c, pci_device_11c1_048c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1282_9009, + pci_ss_list_11c1_048c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1282_9100 = { - 0x9100, pci_device_1282_9100, +static const pciDeviceInfo pci_dev_info_11c1_048f = { + 0x048f, pci_device_11c1_048f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1282_9100, + pci_ss_list_11c1_048f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1282_9102 = { - 0x9102, pci_device_1282_9102, +static const pciDeviceInfo pci_dev_info_11c1_5801 = { + 0x5801, pci_device_11c1_5801, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1282_9102, + pci_ss_list_11c1_5801, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1282_9132 = { - 0x9132, pci_device_1282_9132, +static const pciDeviceInfo pci_dev_info_11c1_5802 = { + 0x5802, pci_device_11c1_5802, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1282_9132, + pci_ss_list_11c1_5802, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1283_673a = { - 0x673a, pci_device_1283_673a, +static const pciDeviceInfo pci_dev_info_11c1_5803 = { + 0x5803, pci_device_11c1_5803, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1283_673a, + pci_ss_list_11c1_5803, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1283_8212 = { - 0x8212, pci_device_1283_8212, +static const pciDeviceInfo pci_dev_info_11c1_5811 = { + 0x5811, pci_device_11c1_5811, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1283_8212, + pci_ss_list_11c1_5811, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1283_8330 = { - 0x8330, pci_device_1283_8330, +static const pciDeviceInfo pci_dev_info_11c1_8110 = { + 0x8110, pci_device_11c1_8110, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1283_8330, + pci_ss_list_11c1_8110, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1283_8872 = { - 0x8872, pci_device_1283_8872, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_1283_8872, -#else - NULL, -#endif - 0 -}; -static const pciDeviceInfo pci_dev_info_1283_8888 = { - 0x8888, pci_device_1283_8888, +static const pciDeviceInfo pci_dev_info_11c1_ab10 = { + 0xab10, pci_device_11c1_ab10, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1283_8888, + pci_ss_list_11c1_ab10, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1283_8889 = { - 0x8889, pci_device_1283_8889, +static const pciDeviceInfo pci_dev_info_11c1_ab11 = { + 0xab11, pci_device_11c1_ab11, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1283_8889, + pci_ss_list_11c1_ab11, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1283_e886 = { - 0xe886, pci_device_1283_e886, +static const pciDeviceInfo pci_dev_info_11c1_ab20 = { + 0xab20, pci_device_11c1_ab20, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1283_e886, + pci_ss_list_11c1_ab20, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1285_0100 = { - 0x0100, pci_device_1285_0100, +static const pciDeviceInfo pci_dev_info_11c1_ab21 = { + 0xab21, pci_device_11c1_ab21, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1285_0100, + pci_ss_list_11c1_ab21, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1287_001e = { - 0x001e, pci_device_1287_001e, +static const pciDeviceInfo pci_dev_info_11c1_ab30 = { + 0xab30, pci_device_11c1_ab30, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1287_001e, + pci_ss_list_11c1_ab30, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1287_001f = { - 0x001f, pci_device_1287_001f, +static const pciDeviceInfo pci_dev_info_11c1_ed00 = { + 0xed00, pci_device_11c1_ed00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1287_001f, + pci_ss_list_11c1_ed00, #else NULL, #endif @@ -74898,57 +88170,48 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_128d_0021 = { - 0x0021, pci_device_128d_0021, +static const pciDeviceInfo pci_dev_info_11c8_0658 = { + 0x0658, pci_device_11c8_0658, #ifdef INIT_SUBSYS_INFO - pci_ss_list_128d_0021, + pci_ss_list_11c8_0658, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_128e_0008 = { - 0x0008, pci_device_128e_0008, +static const pciDeviceInfo pci_dev_info_11c8_d665 = { + 0xd665, pci_device_11c8_d665, #ifdef INIT_SUBSYS_INFO - pci_ss_list_128e_0008, + pci_ss_list_11c8_d665, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_128e_0009 = { - 0x0009, pci_device_128e_0009, +static const pciDeviceInfo pci_dev_info_11c8_d667 = { + 0xd667, pci_device_11c8_d667, #ifdef INIT_SUBSYS_INFO - pci_ss_list_128e_0009, + pci_ss_list_11c8_d667, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_128e_000a = { - 0x000a, pci_device_128e_000a, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_128e_000a, -#else - NULL, #endif - 0 -}; -static const pciDeviceInfo pci_dev_info_128e_000b = { - 0x000b, pci_device_128e_000b, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11c9_0010 = { + 0x0010, pci_device_11c9_0010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_128e_000b, + pci_ss_list_11c9_0010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_128e_000c = { - 0x000c, pci_device_128e_000c, +static const pciDeviceInfo pci_dev_info_11c9_0011 = { + 0x0011, pci_device_11c9_0011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_128e_000c, + pci_ss_list_11c9_0011, #else NULL, #endif @@ -74956,41 +88219,39 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_129a_0615 = { - 0x0615, pci_device_129a_0615, +static const pciDeviceInfo pci_dev_info_11cb_2000 = { + 0x2000, pci_device_11cb_2000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_129a_0615, + pci_ss_list_11cb_2000, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12a3_8105 = { - 0x8105, pci_device_12a3_8105, +static const pciDeviceInfo pci_dev_info_11cb_4000 = { + 0x4000, pci_device_11cb_4000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12a3_8105, + pci_ss_list_11cb_4000, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12ab_0002 = { - 0x0002, pci_device_12ab_0002, +static const pciDeviceInfo pci_dev_info_11cb_8000 = { + 0x8000, pci_device_11cb_8000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12ab_0002, + pci_ss_list_11cb_8000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12ab_3000 = { - 0x3000, pci_device_12ab_3000, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11d1_01f7 = { + 0x01f7, pci_device_11d1_01f7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12ab_3000, + pci_ss_list_11d1_01f7, #else NULL, #endif @@ -74998,57 +88259,57 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12ae_0001 = { - 0x0001, pci_device_12ae_0001, +static const pciDeviceInfo pci_dev_info_11d4_1535 = { + 0x1535, pci_device_11d4_1535, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12ae_0001, + pci_ss_list_11d4_1535, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12ae_0002 = { - 0x0002, pci_device_12ae_0002, +static const pciDeviceInfo pci_dev_info_11d4_1805 = { + 0x1805, pci_device_11d4_1805, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12ae_0002, + pci_ss_list_11d4_1805, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12ae_00fa = { - 0x00fa, pci_device_12ae_00fa, +static const pciDeviceInfo pci_dev_info_11d4_1889 = { + 0x1889, pci_device_11d4_1889, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12ae_00fa, + pci_ss_list_11d4_1889, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12b9_1006 = { - 0x1006, pci_device_12b9_1006, +static const pciDeviceInfo pci_dev_info_11d4_5340 = { + 0x5340, pci_device_11d4_5340, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12b9_1006, + pci_ss_list_11d4_5340, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12b9_1007 = { - 0x1007, pci_device_12b9_1007, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11d5_0115 = { + 0x0115, pci_device_11d5_0115, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12b9_1007, + pci_ss_list_11d5_0115, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12b9_1008 = { - 0x1008, pci_device_12b9_1008, +static const pciDeviceInfo pci_dev_info_11d5_0117 = { + 0x0117, pci_device_11d5_0117, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12b9_1008, + pci_ss_list_11d5_0117, #else NULL, #endif @@ -75056,19 +88317,19 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12be_3041 = { - 0x3041, pci_device_12be_3041, +static const pciDeviceInfo pci_dev_info_11de_6057 = { + 0x6057, pci_device_11de_6057, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12be_3041, + pci_ss_list_11de_6057, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12be_3042 = { - 0x3042, pci_device_12be_3042, +static const pciDeviceInfo pci_dev_info_11de_6120 = { + 0x6120, pci_device_11de_6120, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12be_3042, + pci_ss_list_11de_6120, #else NULL, #endif @@ -75076,19 +88337,19 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12c3_0058 = { - 0x0058, pci_device_12c3_0058, +static const pciDeviceInfo pci_dev_info_11e3_0001 = { + 0x0001, pci_device_11e3_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12c3_0058, + pci_ss_list_11e3_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12c3_5598 = { - 0x5598, pci_device_12c3_5598, +static const pciDeviceInfo pci_dev_info_11e3_5030 = { + 0x5030, pci_device_11e3_5030, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12c3_5598, + pci_ss_list_11e3_5030, #else NULL, #endif @@ -75096,138 +88357,142 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12c5_007e = { - 0x007e, pci_device_12c5_007e, +static const pciDeviceInfo pci_dev_info_11f0_4231 = { + 0x4231, pci_device_11f0_4231, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12c5_007e, + pci_ss_list_11f0_4231, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12c5_007f = { - 0x007f, pci_device_12c5_007f, +static const pciDeviceInfo pci_dev_info_11f0_4232 = { + 0x4232, pci_device_11f0_4232, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12c5_007f, + pci_ss_list_11f0_4232, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12c5_0081 = { - 0x0081, pci_device_12c5_0081, +static const pciDeviceInfo pci_dev_info_11f0_4233 = { + 0x4233, pci_device_11f0_4233, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12c5_0081, + pci_ss_list_11f0_4233, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12c5_0085 = { - 0x0085, pci_device_12c5_0085, +static const pciDeviceInfo pci_dev_info_11f0_4234 = { + 0x4234, pci_device_11f0_4234, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12c5_0085, + pci_ss_list_11f0_4234, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12c5_0086 = { - 0x0086, pci_device_12c5_0086, +static const pciDeviceInfo pci_dev_info_11f0_4235 = { + 0x4235, pci_device_11f0_4235, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12c5_0086, + pci_ss_list_11f0_4235, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_12d2_0008 = { - 0x0008, pci_device_12d2_0008, +static const pciDeviceInfo pci_dev_info_11f0_4236 = { + 0x4236, pci_device_11f0_4236, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d2_0008, + pci_ss_list_11f0_4236, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12d2_0009 = { - 0x0009, pci_device_12d2_0009, +static const pciDeviceInfo pci_dev_info_11f0_4731 = { + 0x4731, pci_device_11f0_4731, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d2_0009, + pci_ss_list_11f0_4731, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12d2_0018 = { - 0x0018, pci_device_12d2_0018, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11f4_2915 = { + 0x2915, pci_device_11f4_2915, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d2_0018, + pci_ss_list_11f4_2915, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12d2_0019 = { - 0x0019, pci_device_12d2_0019, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11f6_0112 = { + 0x0112, pci_device_11f6_0112, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d2_0019, + pci_ss_list_11f6_0112, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12d2_0020 = { - 0x0020, pci_device_12d2_0020, +static const pciDeviceInfo pci_dev_info_11f6_0113 = { + 0x0113, pci_device_11f6_0113, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d2_0020, + pci_ss_list_11f6_0113, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12d2_0028 = { - 0x0028, pci_device_12d2_0028, +static const pciDeviceInfo pci_dev_info_11f6_1401 = { + 0x1401, pci_device_11f6_1401, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d2_0028, + pci_ss_list_11f6_1401, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12d2_0029 = { - 0x0029, pci_device_12d2_0029, +static const pciDeviceInfo pci_dev_info_11f6_2011 = { + 0x2011, pci_device_11f6_2011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d2_0029, + pci_ss_list_11f6_2011, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12d2_002c = { - 0x002c, pci_device_12d2_002c, +static const pciDeviceInfo pci_dev_info_11f6_2201 = { + 0x2201, pci_device_11f6_2201, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d2_002c, + pci_ss_list_11f6_2201, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12d2_00a0 = { - 0x00a0, pci_device_12d2_00a0, +static const pciDeviceInfo pci_dev_info_11f6_9881 = { + 0x9881, pci_device_11f6_9881, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d2_00a0, + pci_ss_list_11f6_9881, #else NULL, #endif 0 }; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12d4_0200 = { - 0x0200, pci_device_12d4_0200, +static const pciDeviceInfo pci_dev_info_11f8_7375 = { + 0x7375, pci_device_11f8_7375, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d4_0200, + pci_ss_list_11f8_7375, #else NULL, #endif @@ -75235,977 +88500,987 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12d9_0002 = { - 0x0002, pci_device_12d9_0002, +static const pciDeviceInfo pci_dev_info_11fe_0001 = { + 0x0001, pci_device_11fe_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d9_0002, + pci_ss_list_11fe_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12d9_0004 = { - 0x0004, pci_device_12d9_0004, +static const pciDeviceInfo pci_dev_info_11fe_0002 = { + 0x0002, pci_device_11fe_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d9_0004, + pci_ss_list_11fe_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12d9_0005 = { - 0x0005, pci_device_12d9_0005, +static const pciDeviceInfo pci_dev_info_11fe_0003 = { + 0x0003, pci_device_11fe_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12d9_0005, + pci_ss_list_11fe_0003, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12de_0200 = { - 0x0200, pci_device_12de_0200, +static const pciDeviceInfo pci_dev_info_11fe_0004 = { + 0x0004, pci_device_11fe_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12de_0200, + pci_ss_list_11fe_0004, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12e0_0010 = { - 0x0010, pci_device_12e0_0010, +static const pciDeviceInfo pci_dev_info_11fe_0005 = { + 0x0005, pci_device_11fe_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12e0_0010, + pci_ss_list_11fe_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12e0_0020 = { - 0x0020, pci_device_12e0_0020, +static const pciDeviceInfo pci_dev_info_11fe_0006 = { + 0x0006, pci_device_11fe_0006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12e0_0020, + pci_ss_list_11fe_0006, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12e0_0030 = { - 0x0030, pci_device_12e0_0030, +static const pciDeviceInfo pci_dev_info_11fe_0007 = { + 0x0007, pci_device_11fe_0007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12e0_0030, + pci_ss_list_11fe_0007, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12eb_0001 = { - 0x0001, pci_device_12eb_0001, +static const pciDeviceInfo pci_dev_info_11fe_0008 = { + 0x0008, pci_device_11fe_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12eb_0001, + pci_ss_list_11fe_0008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12eb_0002 = { - 0x0002, pci_device_12eb_0002, +static const pciDeviceInfo pci_dev_info_11fe_0009 = { + 0x0009, pci_device_11fe_0009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12eb_0002, + pci_ss_list_11fe_0009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12eb_0003 = { - 0x0003, pci_device_12eb_0003, +static const pciDeviceInfo pci_dev_info_11fe_000a = { + 0x000a, pci_device_11fe_000a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12eb_0003, + pci_ss_list_11fe_000a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_12eb_8803 = { - 0x8803, pci_device_12eb_8803, +static const pciDeviceInfo pci_dev_info_11fe_000b = { + 0x000b, pci_device_11fe_000b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12eb_8803, + pci_ss_list_11fe_000b, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_12f8_0002 = { - 0x0002, pci_device_12f8_0002, +static const pciDeviceInfo pci_dev_info_11fe_000c = { + 0x000c, pci_device_11fe_000c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_12f8_0002, + pci_ss_list_11fe_000c, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1307_0001 = { - 0x0001, pci_device_1307_0001, +static const pciDeviceInfo pci_dev_info_11fe_000d = { + 0x000d, pci_device_11fe_000d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0001, + pci_ss_list_11fe_000d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_000b = { - 0x000b, pci_device_1307_000b, +static const pciDeviceInfo pci_dev_info_11fe_000e = { + 0x000e, pci_device_11fe_000e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_000b, + pci_ss_list_11fe_000e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_000c = { - 0x000c, pci_device_1307_000c, +static const pciDeviceInfo pci_dev_info_11fe_000f = { + 0x000f, pci_device_11fe_000f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_000c, + pci_ss_list_11fe_000f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_000d = { - 0x000d, pci_device_1307_000d, +static const pciDeviceInfo pci_dev_info_11fe_0801 = { + 0x0801, pci_device_11fe_0801, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_000d, + pci_ss_list_11fe_0801, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_000f = { - 0x000f, pci_device_1307_000f, +static const pciDeviceInfo pci_dev_info_11fe_0802 = { + 0x0802, pci_device_11fe_0802, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_000f, + pci_ss_list_11fe_0802, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0010 = { - 0x0010, pci_device_1307_0010, +static const pciDeviceInfo pci_dev_info_11fe_0803 = { + 0x0803, pci_device_11fe_0803, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0010, + pci_ss_list_11fe_0803, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0014 = { - 0x0014, pci_device_1307_0014, +static const pciDeviceInfo pci_dev_info_11fe_0805 = { + 0x0805, pci_device_11fe_0805, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0014, + pci_ss_list_11fe_0805, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0015 = { - 0x0015, pci_device_1307_0015, +static const pciDeviceInfo pci_dev_info_11fe_080c = { + 0x080c, pci_device_11fe_080c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0015, + pci_ss_list_11fe_080c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0016 = { - 0x0016, pci_device_1307_0016, +static const pciDeviceInfo pci_dev_info_11fe_080d = { + 0x080d, pci_device_11fe_080d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0016, + pci_ss_list_11fe_080d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0017 = { - 0x0017, pci_device_1307_0017, +static const pciDeviceInfo pci_dev_info_11fe_0812 = { + 0x0812, pci_device_11fe_0812, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0017, + pci_ss_list_11fe_0812, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0018 = { - 0x0018, pci_device_1307_0018, +static const pciDeviceInfo pci_dev_info_11fe_0903 = { + 0x0903, pci_device_11fe_0903, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0018, + pci_ss_list_11fe_0903, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0019 = { - 0x0019, pci_device_1307_0019, +static const pciDeviceInfo pci_dev_info_11fe_8015 = { + 0x8015, pci_device_11fe_8015, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0019, + pci_ss_list_11fe_8015, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_001a = { - 0x001a, pci_device_1307_001a, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_11ff_0003 = { + 0x0003, pci_device_11ff_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_001a, + pci_ss_list_11ff_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_001b = { - 0x001b, pci_device_1307_001b, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1202_4300 = { + 0x4300, pci_device_1202_4300, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_001b, + pci_ss_list_1202_4300, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_001c = { - 0x001c, pci_device_1307_001c, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1208_4853 = { + 0x4853, pci_device_1208_4853, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_001c, + pci_ss_list_1208_4853, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_001d = { - 0x001d, pci_device_1307_001d, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_120e_0100 = { + 0x0100, pci_device_120e_0100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_001d, + pci_ss_list_120e_0100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_001e = { - 0x001e, pci_device_1307_001e, +static const pciDeviceInfo pci_dev_info_120e_0101 = { + 0x0101, pci_device_120e_0101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_001e, + pci_ss_list_120e_0101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_001f = { - 0x001f, pci_device_1307_001f, +static const pciDeviceInfo pci_dev_info_120e_0102 = { + 0x0102, pci_device_120e_0102, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_001f, + pci_ss_list_120e_0102, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0020 = { - 0x0020, pci_device_1307_0020, +static const pciDeviceInfo pci_dev_info_120e_0103 = { + 0x0103, pci_device_120e_0103, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0020, + pci_ss_list_120e_0103, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0021 = { - 0x0021, pci_device_1307_0021, +static const pciDeviceInfo pci_dev_info_120e_0104 = { + 0x0104, pci_device_120e_0104, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0021, + pci_ss_list_120e_0104, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0022 = { - 0x0022, pci_device_1307_0022, +static const pciDeviceInfo pci_dev_info_120e_0105 = { + 0x0105, pci_device_120e_0105, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0022, + pci_ss_list_120e_0105, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0023 = { - 0x0023, pci_device_1307_0023, +static const pciDeviceInfo pci_dev_info_120e_0200 = { + 0x0200, pci_device_120e_0200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0023, + pci_ss_list_120e_0200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0024 = { - 0x0024, pci_device_1307_0024, +static const pciDeviceInfo pci_dev_info_120e_0201 = { + 0x0201, pci_device_120e_0201, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0024, + pci_ss_list_120e_0201, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0025 = { - 0x0025, pci_device_1307_0025, +static const pciDeviceInfo pci_dev_info_120e_0300 = { + 0x0300, pci_device_120e_0300, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0025, + pci_ss_list_120e_0300, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0026 = { - 0x0026, pci_device_1307_0026, +static const pciDeviceInfo pci_dev_info_120e_0301 = { + 0x0301, pci_device_120e_0301, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0026, + pci_ss_list_120e_0301, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0027 = { - 0x0027, pci_device_1307_0027, +static const pciDeviceInfo pci_dev_info_120e_0310 = { + 0x0310, pci_device_120e_0310, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0027, + pci_ss_list_120e_0310, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0028 = { - 0x0028, pci_device_1307_0028, +static const pciDeviceInfo pci_dev_info_120e_0311 = { + 0x0311, pci_device_120e_0311, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0028, + pci_ss_list_120e_0311, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0029 = { - 0x0029, pci_device_1307_0029, +static const pciDeviceInfo pci_dev_info_120e_0320 = { + 0x0320, pci_device_120e_0320, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0029, + pci_ss_list_120e_0320, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_002c = { - 0x002c, pci_device_1307_002c, +static const pciDeviceInfo pci_dev_info_120e_0321 = { + 0x0321, pci_device_120e_0321, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_002c, + pci_ss_list_120e_0321, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0033 = { - 0x0033, pci_device_1307_0033, +static const pciDeviceInfo pci_dev_info_120e_0400 = { + 0x0400, pci_device_120e_0400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0033, + pci_ss_list_120e_0400, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0034 = { - 0x0034, pci_device_1307_0034, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_120f_0001 = { + 0x0001, pci_device_120f_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0034, + pci_ss_list_120f_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0035 = { - 0x0035, pci_device_1307_0035, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1217_6729 = { + 0x6729, pci_device_1217_6729, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0035, + pci_ss_list_1217_6729, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0036 = { - 0x0036, pci_device_1307_0036, +static const pciDeviceInfo pci_dev_info_1217_673a = { + 0x673a, pci_device_1217_673a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0036, + pci_ss_list_1217_673a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0037 = { - 0x0037, pci_device_1307_0037, +static const pciDeviceInfo pci_dev_info_1217_6832 = { + 0x6832, pci_device_1217_6832, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0037, + pci_ss_list_1217_6832, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_004c = { - 0x004c, pci_device_1307_004c, +static const pciDeviceInfo pci_dev_info_1217_6836 = { + 0x6836, pci_device_1217_6836, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_004c, + pci_ss_list_1217_6836, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_004d = { - 0x004d, pci_device_1307_004d, +static const pciDeviceInfo pci_dev_info_1217_6872 = { + 0x6872, pci_device_1217_6872, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_004d, + pci_ss_list_1217_6872, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_0052 = { - 0x0052, pci_device_1307_0052, +static const pciDeviceInfo pci_dev_info_1217_6925 = { + 0x6925, pci_device_1217_6925, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_0052, + pci_ss_list_1217_6925, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1307_005e = { - 0x005e, pci_device_1307_005e, +static const pciDeviceInfo pci_dev_info_1217_6933 = { + 0x6933, pci_device_1217_6933, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1307_005e, + pci_ss_list_1217_6933, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1308_0001 = { - 0x0001, pci_device_1308_0001, +static const pciDeviceInfo pci_dev_info_1217_6972 = { + 0x6972, pci_device_1217_6972, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1308_0001, + pci_ss_list_1217_6972, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1317_0981 = { - 0x0981, pci_device_1317_0981, +static const pciDeviceInfo pci_dev_info_1217_7110 = { + 0x7110, pci_device_1217_7110, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1317_0981, + pci_ss_list_1217_7110, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1317_0985 = { - 0x0985, pci_device_1317_0985, +static const pciDeviceInfo pci_dev_info_1217_7112 = { + 0x7112, pci_device_1217_7112, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1317_0985, + pci_ss_list_1217_7112, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1317_1985 = { - 0x1985, pci_device_1317_1985, +static const pciDeviceInfo pci_dev_info_1217_7113 = { + 0x7113, pci_device_1217_7113, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1317_1985, + pci_ss_list_1217_7113, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1317_2850 = { - 0x2850, pci_device_1317_2850, +static const pciDeviceInfo pci_dev_info_1217_7114 = { + 0x7114, pci_device_1217_7114, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1317_2850, + pci_ss_list_1217_7114, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1317_8201 = { - 0x8201, pci_device_1317_8201, +static const pciDeviceInfo pci_dev_info_1217_7134 = { + 0x7134, pci_device_1217_7134, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1317_8201, + pci_ss_list_1217_7134, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1317_8211 = { - 0x8211, pci_device_1317_8211, +static const pciDeviceInfo pci_dev_info_1217_71e2 = { + 0x71e2, pci_device_1217_71e2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1317_8211, + pci_ss_list_1217_71e2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1317_9511 = { - 0x9511, pci_device_1317_9511, +static const pciDeviceInfo pci_dev_info_1217_7212 = { + 0x7212, pci_device_1217_7212, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1317_9511, + pci_ss_list_1217_7212, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1318_0911 = { - 0x0911, pci_device_1318_0911, +static const pciDeviceInfo pci_dev_info_1217_7213 = { + 0x7213, pci_device_1217_7213, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1318_0911, + pci_ss_list_1217_7213, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1319_0801 = { - 0x0801, pci_device_1319_0801, +static const pciDeviceInfo pci_dev_info_1217_7223 = { + 0x7223, pci_device_1217_7223, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1319_0801, + pci_ss_list_1217_7223, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1319_0802 = { - 0x0802, pci_device_1319_0802, +static const pciDeviceInfo pci_dev_info_1217_7233 = { + 0x7233, pci_device_1217_7233, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1319_0802, + pci_ss_list_1217_7233, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1319_1000 = { - 0x1000, pci_device_1319_1000, +#endif +static const pciDeviceInfo pci_dev_info_121a_0001 = { + 0x0001, pci_device_121a_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1319_1000, + pci_ss_list_121a_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1319_1001 = { - 0x1001, pci_device_1319_1001, +static const pciDeviceInfo pci_dev_info_121a_0002 = { + 0x0002, pci_device_121a_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1319_1001, + pci_ss_list_121a_0002, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_131f_1000 = { - 0x1000, pci_device_131f_1000, +static const pciDeviceInfo pci_dev_info_121a_0003 = { + 0x0003, pci_device_121a_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1000, + pci_ss_list_121a_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1001 = { - 0x1001, pci_device_131f_1001, +static const pciDeviceInfo pci_dev_info_121a_0004 = { + 0x0004, pci_device_121a_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1001, + pci_ss_list_121a_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1002 = { - 0x1002, pci_device_131f_1002, +static const pciDeviceInfo pci_dev_info_121a_0005 = { + 0x0005, pci_device_121a_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1002, + pci_ss_list_121a_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1010 = { - 0x1010, pci_device_131f_1010, +static const pciDeviceInfo pci_dev_info_121a_0009 = { + 0x0009, pci_device_121a_0009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1010, + pci_ss_list_121a_0009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1011 = { - 0x1011, pci_device_131f_1011, +static const pciDeviceInfo pci_dev_info_121a_0057 = { + 0x0057, pci_device_121a_0057, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1011, + pci_ss_list_121a_0057, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1012 = { - 0x1012, pci_device_131f_1012, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1220_1220 = { + 0x1220, pci_device_1220_1220, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1012, + pci_ss_list_1220_1220, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1020 = { - 0x1020, pci_device_131f_1020, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1223_0003 = { + 0x0003, pci_device_1223_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1020, + pci_ss_list_1223_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1021 = { - 0x1021, pci_device_131f_1021, +static const pciDeviceInfo pci_dev_info_1223_0004 = { + 0x0004, pci_device_1223_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1021, + pci_ss_list_1223_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1030 = { - 0x1030, pci_device_131f_1030, +static const pciDeviceInfo pci_dev_info_1223_0005 = { + 0x0005, pci_device_1223_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1030, + pci_ss_list_1223_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1031 = { - 0x1031, pci_device_131f_1031, +static const pciDeviceInfo pci_dev_info_1223_0008 = { + 0x0008, pci_device_1223_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1031, + pci_ss_list_1223_0008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1032 = { - 0x1032, pci_device_131f_1032, +static const pciDeviceInfo pci_dev_info_1223_0009 = { + 0x0009, pci_device_1223_0009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1032, + pci_ss_list_1223_0009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1034 = { - 0x1034, pci_device_131f_1034, +static const pciDeviceInfo pci_dev_info_1223_000a = { + 0x000a, pci_device_1223_000a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1034, + pci_ss_list_1223_000a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1035 = { - 0x1035, pci_device_131f_1035, +static const pciDeviceInfo pci_dev_info_1223_000b = { + 0x000b, pci_device_1223_000b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1035, + pci_ss_list_1223_000b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1036 = { - 0x1036, pci_device_131f_1036, +static const pciDeviceInfo pci_dev_info_1223_000c = { + 0x000c, pci_device_1223_000c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1036, + pci_ss_list_1223_000c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1050 = { - 0x1050, pci_device_131f_1050, +static const pciDeviceInfo pci_dev_info_1223_000d = { + 0x000d, pci_device_1223_000d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1050, + pci_ss_list_1223_000d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1051 = { - 0x1051, pci_device_131f_1051, +static const pciDeviceInfo pci_dev_info_1223_000e = { + 0x000e, pci_device_1223_000e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1051, + pci_ss_list_1223_000e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_1052 = { - 0x1052, pci_device_131f_1052, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1227_0006 = { + 0x0006, pci_device_1227_0006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_1052, + pci_ss_list_1227_0006, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2000 = { - 0x2000, pci_device_131f_2000, +static const pciDeviceInfo pci_dev_info_1227_0023 = { + 0x0023, pci_device_1227_0023, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2000, + pci_ss_list_1227_0023, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2001 = { - 0x2001, pci_device_131f_2001, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_122d_1206 = { + 0x1206, pci_device_122d_1206, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2001, + pci_ss_list_122d_1206, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2002 = { - 0x2002, pci_device_131f_2002, +static const pciDeviceInfo pci_dev_info_122d_1400 = { + 0x1400, pci_device_122d_1400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2002, + pci_ss_list_122d_1400, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2010 = { - 0x2010, pci_device_131f_2010, +static const pciDeviceInfo pci_dev_info_122d_50dc = { + 0x50dc, pci_device_122d_50dc, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2010, + pci_ss_list_122d_50dc, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2011 = { - 0x2011, pci_device_131f_2011, +static const pciDeviceInfo pci_dev_info_122d_80da = { + 0x80da, pci_device_122d_80da, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2011, + pci_ss_list_122d_80da, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2012 = { - 0x2012, pci_device_131f_2012, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1236_0000 = { + 0x0000, pci_device_1236_0000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2012, + pci_ss_list_1236_0000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2020 = { - 0x2020, pci_device_131f_2020, +static const pciDeviceInfo pci_dev_info_1236_6401 = { + 0x6401, pci_device_1236_6401, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2020, + pci_ss_list_1236_6401, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2021 = { - 0x2021, pci_device_131f_2021, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_123d_0000 = { + 0x0000, pci_device_123d_0000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2021, + pci_ss_list_123d_0000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2030 = { - 0x2030, pci_device_131f_2030, +static const pciDeviceInfo pci_dev_info_123d_0002 = { + 0x0002, pci_device_123d_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2030, + pci_ss_list_123d_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2031 = { - 0x2031, pci_device_131f_2031, +static const pciDeviceInfo pci_dev_info_123d_0003 = { + 0x0003, pci_device_123d_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2031, + pci_ss_list_123d_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2032 = { - 0x2032, pci_device_131f_2032, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_123f_00e4 = { + 0x00e4, pci_device_123f_00e4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2032, + pci_ss_list_123f_00e4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2040 = { - 0x2040, pci_device_131f_2040, +static const pciDeviceInfo pci_dev_info_123f_8120 = { + 0x8120, pci_device_123f_8120, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2040, + pci_ss_list_123f_8120, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2041 = { - 0x2041, pci_device_131f_2041, +static const pciDeviceInfo pci_dev_info_123f_8888 = { + 0x8888, pci_device_123f_8888, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2041, + pci_ss_list_123f_8888, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2042 = { - 0x2042, pci_device_131f_2042, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1242_1560 = { + 0x1560, pci_device_1242_1560, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2042, + pci_ss_list_1242_1560, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2050 = { - 0x2050, pci_device_131f_2050, +static const pciDeviceInfo pci_dev_info_1242_4643 = { + 0x4643, pci_device_1242_4643, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2050, + pci_ss_list_1242_4643, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2051 = { - 0x2051, pci_device_131f_2051, +static const pciDeviceInfo pci_dev_info_1242_6562 = { + 0x6562, pci_device_1242_6562, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2051, + pci_ss_list_1242_6562, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2052 = { - 0x2052, pci_device_131f_2052, +static const pciDeviceInfo pci_dev_info_1242_656a = { + 0x656a, pci_device_1242_656a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2052, + pci_ss_list_1242_656a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2060 = { - 0x2060, pci_device_131f_2060, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1244_0700 = { + 0x0700, pci_device_1244_0700, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2060, + pci_ss_list_1244_0700, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2061 = { - 0x2061, pci_device_131f_2061, +static const pciDeviceInfo pci_dev_info_1244_0800 = { + 0x0800, pci_device_1244_0800, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2061, + pci_ss_list_1244_0800, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2062 = { - 0x2062, pci_device_131f_2062, +static const pciDeviceInfo pci_dev_info_1244_0a00 = { + 0x0a00, pci_device_1244_0a00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2062, + pci_ss_list_1244_0a00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_131f_2081 = { - 0x2081, pci_device_131f_2081, +static const pciDeviceInfo pci_dev_info_1244_0e00 = { + 0x0e00, pci_device_1244_0e00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_131f_2081, + pci_ss_list_1244_0e00, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1331_0030 = { - 0x0030, pci_device_1331_0030, +static const pciDeviceInfo pci_dev_info_1244_1100 = { + 0x1100, pci_device_1244_1100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1331_0030, + pci_ss_list_1244_1100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1331_8200 = { - 0x8200, pci_device_1331_8200, +static const pciDeviceInfo pci_dev_info_1244_1200 = { + 0x1200, pci_device_1244_1200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1331_8200, + pci_ss_list_1244_1200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1331_8201 = { - 0x8201, pci_device_1331_8201, +static const pciDeviceInfo pci_dev_info_1244_2700 = { + 0x2700, pci_device_1244_2700, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1331_8201, + pci_ss_list_1244_2700, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1331_8202 = { - 0x8202, pci_device_1331_8202, +static const pciDeviceInfo pci_dev_info_1244_2900 = { + 0x2900, pci_device_1244_2900, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1331_8202, + pci_ss_list_1244_2900, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1331_8210 = { - 0x8210, pci_device_1331_8210, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_124b_0040 = { + 0x0040, pci_device_124b_0040, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1331_8210, + pci_ss_list_124b_0040, #else NULL, #endif @@ -76213,39 +89488,37 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1332_5415 = { - 0x5415, pci_device_1332_5415, +static const pciDeviceInfo pci_dev_info_124d_0000 = { + 0x0000, pci_device_124d_0000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1332_5415, + pci_ss_list_124d_0000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1332_5425 = { - 0x5425, pci_device_1332_5425, +static const pciDeviceInfo pci_dev_info_124d_0002 = { + 0x0002, pci_device_124d_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1332_5425, + pci_ss_list_124d_0002, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_134a_0001 = { - 0x0001, pci_device_134a_0001, +static const pciDeviceInfo pci_dev_info_124d_0003 = { + 0x0003, pci_device_124d_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_134a_0001, + pci_ss_list_124d_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_134a_0002 = { - 0x0002, pci_device_134a_0002, +static const pciDeviceInfo pci_dev_info_124d_0004 = { + 0x0004, pci_device_124d_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_134a_0002, + pci_ss_list_124d_0004, #else NULL, #endif @@ -76253,91 +89526,86 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_134d_2189 = { - 0x2189, pci_device_134d_2189, +static const pciDeviceInfo pci_dev_info_124f_0041 = { + 0x0041, pci_device_124f_0041, #ifdef INIT_SUBSYS_INFO - pci_ss_list_134d_2189, + pci_ss_list_124f_0041, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_134d_2486 = { - 0x2486, pci_device_134d_2486, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1255_1110 = { + 0x1110, pci_device_1255_1110, #ifdef INIT_SUBSYS_INFO - pci_ss_list_134d_2486, + pci_ss_list_1255_1110, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_134d_7890 = { - 0x7890, pci_device_134d_7890, +static const pciDeviceInfo pci_dev_info_1255_1210 = { + 0x1210, pci_device_1255_1210, #ifdef INIT_SUBSYS_INFO - pci_ss_list_134d_7890, + pci_ss_list_1255_1210, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_134d_7891 = { - 0x7891, pci_device_134d_7891, +static const pciDeviceInfo pci_dev_info_1255_2110 = { + 0x2110, pci_device_1255_2110, #ifdef INIT_SUBSYS_INFO - pci_ss_list_134d_7891, + pci_ss_list_1255_2110, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_134d_7892 = { - 0x7892, pci_device_134d_7892, +static const pciDeviceInfo pci_dev_info_1255_2120 = { + 0x2120, pci_device_1255_2120, #ifdef INIT_SUBSYS_INFO - pci_ss_list_134d_7892, + pci_ss_list_1255_2120, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_134d_7893 = { - 0x7893, pci_device_134d_7893, +static const pciDeviceInfo pci_dev_info_1255_2130 = { + 0x2130, pci_device_1255_2130, #ifdef INIT_SUBSYS_INFO - pci_ss_list_134d_7893, + pci_ss_list_1255_2130, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_134d_7894 = { - 0x7894, pci_device_134d_7894, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1256_4201 = { + 0x4201, pci_device_1256_4201, #ifdef INIT_SUBSYS_INFO - pci_ss_list_134d_7894, + pci_ss_list_1256_4201, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_134d_7895 = { - 0x7895, pci_device_134d_7895, +static const pciDeviceInfo pci_dev_info_1256_4401 = { + 0x4401, pci_device_1256_4401, #ifdef INIT_SUBSYS_INFO - pci_ss_list_134d_7895, -#else - NULL, -#endif - 0 -}; -static const pciDeviceInfo pci_dev_info_134d_7896 = { - 0x7896, pci_device_134d_7896, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_134d_7896, + pci_ss_list_1256_4401, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_134d_7897 = { - 0x7897, pci_device_134d_7897, +static const pciDeviceInfo pci_dev_info_1256_5201 = { + 0x5201, pci_device_1256_5201, #ifdef INIT_SUBSYS_INFO - pci_ss_list_134d_7897, + pci_ss_list_1256_5201, #else NULL, #endif @@ -76345,37 +89613,39 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1353_0002 = { - 0x0002, pci_device_1353_0002, +static const pciDeviceInfo pci_dev_info_1259_2560 = { + 0x2560, pci_device_1259_2560, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1353_0002, + pci_ss_list_1259_2560, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1353_0003 = { - 0x0003, pci_device_1353_0003, +static const pciDeviceInfo pci_dev_info_1259_a117 = { + 0xa117, pci_device_1259_a117, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1353_0003, + pci_ss_list_1259_a117, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1353_0004 = { - 0x0004, pci_device_1353_0004, +static const pciDeviceInfo pci_dev_info_1259_a120 = { + 0xa120, pci_device_1259_a120, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1353_0004, + pci_ss_list_1259_a120, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1353_0005 = { - 0x0005, pci_device_1353_0005, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_125b_1400 = { + 0x1400, pci_device_125b_1400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1353_0005, + pci_ss_list_125b_1400, #else NULL, #endif @@ -76383,257 +89653,252 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_135c_0010 = { - 0x0010, pci_device_135c_0010, +static const pciDeviceInfo pci_dev_info_125c_0101 = { + 0x0101, pci_device_125c_0101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_0010, + pci_ss_list_125c_0101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135c_0020 = { - 0x0020, pci_device_135c_0020, +static const pciDeviceInfo pci_dev_info_125c_0640 = { + 0x0640, pci_device_125c_0640, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_0020, + pci_ss_list_125c_0640, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135c_0030 = { - 0x0030, pci_device_135c_0030, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_0030, -#else - NULL, #endif - 0 -}; -static const pciDeviceInfo pci_dev_info_135c_0040 = { - 0x0040, pci_device_135c_0040, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_125d_0000 = { + 0x0000, pci_device_125d_0000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_0040, + pci_ss_list_125d_0000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135c_0050 = { - 0x0050, pci_device_135c_0050, +static const pciDeviceInfo pci_dev_info_125d_1948 = { + 0x1948, pci_device_125d_1948, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_0050, + pci_ss_list_125d_1948, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135c_0060 = { - 0x0060, pci_device_135c_0060, +static const pciDeviceInfo pci_dev_info_125d_1968 = { + 0x1968, pci_device_125d_1968, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_0060, + pci_ss_list_125d_1968, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135c_00f0 = { - 0x00f0, pci_device_135c_00f0, +static const pciDeviceInfo pci_dev_info_125d_1969 = { + 0x1969, pci_device_125d_1969, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_00f0, + pci_ss_list_125d_1969, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135c_0170 = { - 0x0170, pci_device_135c_0170, +static const pciDeviceInfo pci_dev_info_125d_1978 = { + 0x1978, pci_device_125d_1978, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_0170, + pci_ss_list_125d_1978, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135c_0180 = { - 0x0180, pci_device_135c_0180, +static const pciDeviceInfo pci_dev_info_125d_1988 = { + 0x1988, pci_device_125d_1988, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_0180, + pci_ss_list_125d_1988, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135c_0190 = { - 0x0190, pci_device_135c_0190, +static const pciDeviceInfo pci_dev_info_125d_1989 = { + 0x1989, pci_device_125d_1989, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_0190, + pci_ss_list_125d_1989, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135c_01a0 = { - 0x01a0, pci_device_135c_01a0, +static const pciDeviceInfo pci_dev_info_125d_1998 = { + 0x1998, pci_device_125d_1998, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_01a0, + pci_ss_list_125d_1998, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135c_01b0 = { - 0x01b0, pci_device_135c_01b0, +static const pciDeviceInfo pci_dev_info_125d_1999 = { + 0x1999, pci_device_125d_1999, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_01b0, + pci_ss_list_125d_1999, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135c_01c0 = { - 0x01c0, pci_device_135c_01c0, +static const pciDeviceInfo pci_dev_info_125d_199a = { + 0x199a, pci_device_125d_199a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135c_01c0, + pci_ss_list_125d_199a, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_135e_5101 = { - 0x5101, pci_device_135e_5101, +static const pciDeviceInfo pci_dev_info_125d_199b = { + 0x199b, pci_device_125d_199b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135e_5101, + pci_ss_list_125d_199b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135e_7101 = { - 0x7101, pci_device_135e_7101, +static const pciDeviceInfo pci_dev_info_125d_2808 = { + 0x2808, pci_device_125d_2808, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135e_7101, + pci_ss_list_125d_2808, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135e_7201 = { - 0x7201, pci_device_135e_7201, +static const pciDeviceInfo pci_dev_info_125d_2838 = { + 0x2838, pci_device_125d_2838, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135e_7201, + pci_ss_list_125d_2838, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135e_7202 = { - 0x7202, pci_device_135e_7202, +static const pciDeviceInfo pci_dev_info_125d_2898 = { + 0x2898, pci_device_125d_2898, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135e_7202, + pci_ss_list_125d_2898, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135e_7401 = { - 0x7401, pci_device_135e_7401, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1260_3872 = { + 0x3872, pci_device_1260_3872, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135e_7401, + pci_ss_list_1260_3872, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135e_7402 = { - 0x7402, pci_device_135e_7402, +static const pciDeviceInfo pci_dev_info_1260_3873 = { + 0x3873, pci_device_1260_3873, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135e_7402, + pci_ss_list_1260_3873, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135e_7801 = { - 0x7801, pci_device_135e_7801, +static const pciDeviceInfo pci_dev_info_1260_3886 = { + 0x3886, pci_device_1260_3886, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135e_7801, + pci_ss_list_1260_3886, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_135e_8001 = { - 0x8001, pci_device_135e_8001, +static const pciDeviceInfo pci_dev_info_1260_3890 = { + 0x3890, pci_device_1260_3890, #ifdef INIT_SUBSYS_INFO - pci_ss_list_135e_8001, + pci_ss_list_1260_3890, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1360_0101 = { - 0x0101, pci_device_1360_0101, +static const pciDeviceInfo pci_dev_info_1260_8130 = { + 0x8130, pci_device_1260_8130, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1360_0101, + pci_ss_list_1260_8130, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1360_0102 = { - 0x0102, pci_device_1360_0102, +static const pciDeviceInfo pci_dev_info_1260_8131 = { + 0x8131, pci_device_1260_8131, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1360_0102, + pci_ss_list_1260_8131, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1360_0103 = { - 0x0103, pci_device_1360_0103, +static const pciDeviceInfo pci_dev_info_1260_ffff = { + 0xffff, pci_device_1260_ffff, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1360_0103, + pci_ss_list_1260_ffff, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1360_0201 = { - 0x0201, pci_device_1360_0201, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1266_0001 = { + 0x0001, pci_device_1266_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1360_0201, + pci_ss_list_1266_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1360_0202 = { - 0x0202, pci_device_1360_0202, +static const pciDeviceInfo pci_dev_info_1266_1910 = { + 0x1910, pci_device_1266_1910, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1360_0202, + pci_ss_list_1266_1910, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1360_0203 = { - 0x0203, pci_device_1360_0203, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1267_5352 = { + 0x5352, pci_device_1267_5352, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1360_0203, + pci_ss_list_1267_5352, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1360_0301 = { - 0x0301, pci_device_1360_0301, +static const pciDeviceInfo pci_dev_info_1267_5a4b = { + 0x5a4b, pci_device_1267_5a4b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1360_0301, + pci_ss_list_1267_5a4b, #else NULL, #endif @@ -76641,182 +89906,176 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_136b_ff01 = { - 0xff01, pci_device_136b_ff01, +static const pciDeviceInfo pci_dev_info_126c_1211 = { + 0x1211, pci_device_126c_1211, #ifdef INIT_SUBSYS_INFO - pci_ss_list_136b_ff01, + pci_ss_list_126c_1211, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1371_434e = { - 0x434e, pci_device_1371_434e, +static const pciDeviceInfo pci_dev_info_126c_126c = { + 0x126c, pci_device_126c_126c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1371_434e, + pci_ss_list_126c_126c, #else NULL, #endif 0 }; #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_137a_0001 = { - 0x0001, pci_device_137a_0001, +static const pciDeviceInfo pci_dev_info_126f_0501 = { + 0x0501, pci_device_126f_0501, #ifdef INIT_SUBSYS_INFO - pci_ss_list_137a_0001, + pci_ss_list_126f_0501, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1382_0001 = { - 0x0001, pci_device_1382_0001, +static const pciDeviceInfo pci_dev_info_126f_0510 = { + 0x0510, pci_device_126f_0510, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1382_0001, + pci_ss_list_126f_0510, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1382_2088 = { - 0x2088, pci_device_1382_2088, +static const pciDeviceInfo pci_dev_info_126f_0710 = { + 0x0710, pci_device_126f_0710, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1382_2088, + pci_ss_list_126f_0710, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1385_0013 = { - 0x0013, pci_device_1385_0013, +static const pciDeviceInfo pci_dev_info_126f_0712 = { + 0x0712, pci_device_126f_0712, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_0013, + pci_ss_list_126f_0712, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1385_4100 = { - 0x4100, pci_device_1385_4100, +static const pciDeviceInfo pci_dev_info_126f_0720 = { + 0x0720, pci_device_126f_0720, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_4100, + pci_ss_list_126f_0720, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1385_4105 = { - 0x4105, pci_device_1385_4105, +static const pciDeviceInfo pci_dev_info_126f_0730 = { + 0x0730, pci_device_126f_0730, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_4105, + pci_ss_list_126f_0730, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1385_4400 = { - 0x4400, pci_device_1385_4400, +static const pciDeviceInfo pci_dev_info_126f_0810 = { + 0x0810, pci_device_126f_0810, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_4400, + pci_ss_list_126f_0810, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1385_4600 = { - 0x4600, pci_device_1385_4600, +static const pciDeviceInfo pci_dev_info_126f_0811 = { + 0x0811, pci_device_126f_0811, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_4600, + pci_ss_list_126f_0811, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1385_4601 = { - 0x4601, pci_device_1385_4601, +static const pciDeviceInfo pci_dev_info_126f_0820 = { + 0x0820, pci_device_126f_0820, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_4601, + pci_ss_list_126f_0820, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1385_4610 = { - 0x4610, pci_device_1385_4610, +static const pciDeviceInfo pci_dev_info_126f_0910 = { + 0x0910, pci_device_126f_0910, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_4610, + pci_ss_list_126f_0910, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1385_4a00 = { - 0x4a00, pci_device_1385_4a00, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1273_0002 = { + 0x0002, pci_device_1273_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_4a00, + pci_ss_list_1273_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1385_4c00 = { - 0x4c00, pci_device_1385_4c00, +#endif +static const pciDeviceInfo pci_dev_info_1274_1171 = { + 0x1171, pci_device_1274_1171, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_4c00, + pci_ss_list_1274_1171, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1385_620a = { - 0x620a, pci_device_1385_620a, +static const pciDeviceInfo pci_dev_info_1274_1371 = { + 0x1371, pci_device_1274_1371, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_620a, + pci_ss_list_1274_1371, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1385_622a = { - 0x622a, pci_device_1385_622a, +static const pciDeviceInfo pci_dev_info_1274_5000 = { + 0x5000, pci_device_1274_5000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_622a, + pci_ss_list_1274_5000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1385_630a = { - 0x630a, pci_device_1385_630a, +static const pciDeviceInfo pci_dev_info_1274_5880 = { + 0x5880, pci_device_1274_5880, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_630a, + pci_ss_list_1274_5880, #else NULL, #endif - 0 + 0x0401 }; -static const pciDeviceInfo pci_dev_info_1385_f004 = { - 0xf004, pci_device_1385_f004, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1278_0701 = { + 0x0701, pci_device_1278_0701, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1385_f004, + pci_ss_list_1278_0701, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1389_0001 = { - 0x0001, pci_device_1389_0001, +static const pciDeviceInfo pci_dev_info_1278_0710 = { + 0x0710, pci_device_1278_0710, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1389_0001, + pci_ss_list_1278_0710, #else NULL, #endif @@ -76824,55 +90083,55 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1393_1040 = { - 0x1040, pci_device_1393_1040, +static const pciDeviceInfo pci_dev_info_1279_0060 = { + 0x0060, pci_device_1279_0060, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1393_1040, + pci_ss_list_1279_0060, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1393_1141 = { - 0x1141, pci_device_1393_1141, +static const pciDeviceInfo pci_dev_info_1279_0061 = { + 0x0061, pci_device_1279_0061, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1393_1141, + pci_ss_list_1279_0061, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1393_1680 = { - 0x1680, pci_device_1393_1680, +static const pciDeviceInfo pci_dev_info_1279_0295 = { + 0x0295, pci_device_1279_0295, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1393_1680, + pci_ss_list_1279_0295, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1393_2040 = { - 0x2040, pci_device_1393_2040, +static const pciDeviceInfo pci_dev_info_1279_0395 = { + 0x0395, pci_device_1279_0395, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1393_2040, + pci_ss_list_1279_0395, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1393_2180 = { - 0x2180, pci_device_1393_2180, +static const pciDeviceInfo pci_dev_info_1279_0396 = { + 0x0396, pci_device_1279_0396, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1393_2180, + pci_ss_list_1279_0396, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1393_3200 = { - 0x3200, pci_device_1393_3200, +static const pciDeviceInfo pci_dev_info_1279_0397 = { + 0x0397, pci_device_1279_0397, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1393_3200, + pci_ss_list_1279_0397, #else NULL, #endif @@ -76880,240 +90139,226 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1394_0001 = { - 0x0001, pci_device_1394_0001, +static const pciDeviceInfo pci_dev_info_127a_1002 = { + 0x1002, pci_device_127a_1002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1394_0001, + pci_ss_list_127a_1002, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1397_2bd0 = { - 0x2bd0, pci_device_1397_2bd0, +static const pciDeviceInfo pci_dev_info_127a_1003 = { + 0x1003, pci_device_127a_1003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1397_2bd0, + pci_ss_list_127a_1003, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_139a_0001 = { - 0x0001, pci_device_139a_0001, +static const pciDeviceInfo pci_dev_info_127a_1004 = { + 0x1004, pci_device_127a_1004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_139a_0001, + pci_ss_list_127a_1004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_139a_0003 = { - 0x0003, pci_device_139a_0003, +static const pciDeviceInfo pci_dev_info_127a_1005 = { + 0x1005, pci_device_127a_1005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_139a_0003, + pci_ss_list_127a_1005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_139a_0005 = { - 0x0005, pci_device_139a_0005, +static const pciDeviceInfo pci_dev_info_127a_1022 = { + 0x1022, pci_device_127a_1022, #ifdef INIT_SUBSYS_INFO - pci_ss_list_139a_0005, + pci_ss_list_127a_1022, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_13a3_0005 = { - 0x0005, pci_device_13a3_0005, +static const pciDeviceInfo pci_dev_info_127a_1023 = { + 0x1023, pci_device_127a_1023, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13a3_0005, + pci_ss_list_127a_1023, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13a3_0006 = { - 0x0006, pci_device_13a3_0006, +static const pciDeviceInfo pci_dev_info_127a_1024 = { + 0x1024, pci_device_127a_1024, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13a3_0006, + pci_ss_list_127a_1024, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13a3_0007 = { - 0x0007, pci_device_13a3_0007, +static const pciDeviceInfo pci_dev_info_127a_1025 = { + 0x1025, pci_device_127a_1025, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13a3_0007, + pci_ss_list_127a_1025, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13a3_0012 = { - 0x0012, pci_device_13a3_0012, +static const pciDeviceInfo pci_dev_info_127a_1026 = { + 0x1026, pci_device_127a_1026, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13a3_0012, + pci_ss_list_127a_1026, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13a3_0014 = { - 0x0014, pci_device_13a3_0014, +static const pciDeviceInfo pci_dev_info_127a_1032 = { + 0x1032, pci_device_127a_1032, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13a3_0014, + pci_ss_list_127a_1032, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13a3_0016 = { - 0x0016, pci_device_13a3_0016, +static const pciDeviceInfo pci_dev_info_127a_1033 = { + 0x1033, pci_device_127a_1033, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13a3_0016, + pci_ss_list_127a_1033, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13a3_0017 = { - 0x0017, pci_device_13a3_0017, +static const pciDeviceInfo pci_dev_info_127a_1034 = { + 0x1034, pci_device_127a_1034, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13a3_0017, + pci_ss_list_127a_1034, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13a3_0018 = { - 0x0018, pci_device_13a3_0018, +static const pciDeviceInfo pci_dev_info_127a_1035 = { + 0x1035, pci_device_127a_1035, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13a3_0018, + pci_ss_list_127a_1035, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_13a8_0154 = { - 0x0154, pci_device_13a8_0154, +static const pciDeviceInfo pci_dev_info_127a_1036 = { + 0x1036, pci_device_127a_1036, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13a8_0154, + pci_ss_list_127a_1036, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13a8_0158 = { - 0x0158, pci_device_13a8_0158, +static const pciDeviceInfo pci_dev_info_127a_1085 = { + 0x1085, pci_device_127a_1085, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13a8_0158, + pci_ss_list_127a_1085, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_13c0_0010 = { - 0x0010, pci_device_13c0_0010, +static const pciDeviceInfo pci_dev_info_127a_2005 = { + 0x2005, pci_device_127a_2005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13c0_0010, + pci_ss_list_127a_2005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13c0_0020 = { - 0x0020, pci_device_13c0_0020, +static const pciDeviceInfo pci_dev_info_127a_2013 = { + 0x2013, pci_device_127a_2013, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13c0_0020, + pci_ss_list_127a_2013, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13c0_0030 = { - 0x0030, pci_device_13c0_0030, +static const pciDeviceInfo pci_dev_info_127a_2014 = { + 0x2014, pci_device_127a_2014, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13c0_0030, + pci_ss_list_127a_2014, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13c0_0210 = { - 0x0210, pci_device_13c0_0210, +static const pciDeviceInfo pci_dev_info_127a_2015 = { + 0x2015, pci_device_127a_2015, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13c0_0210, + pci_ss_list_127a_2015, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_13c1_1000 = { - 0x1000, pci_device_13c1_1000, +static const pciDeviceInfo pci_dev_info_127a_2016 = { + 0x2016, pci_device_127a_2016, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13c1_1000, + pci_ss_list_127a_2016, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13c1_1001 = { - 0x1001, pci_device_13c1_1001, +static const pciDeviceInfo pci_dev_info_127a_4311 = { + 0x4311, pci_device_127a_4311, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13c1_1001, + pci_ss_list_127a_4311, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13c1_1002 = { - 0x1002, pci_device_13c1_1002, +static const pciDeviceInfo pci_dev_info_127a_4320 = { + 0x4320, pci_device_127a_4320, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13c1_1002, + pci_ss_list_127a_4320, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_13c6_0520 = { - 0x0520, pci_device_13c6_0520, +static const pciDeviceInfo pci_dev_info_127a_4321 = { + 0x4321, pci_device_127a_4321, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13c6_0520, + pci_ss_list_127a_4321, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13c6_0620 = { - 0x0620, pci_device_13c6_0620, +static const pciDeviceInfo pci_dev_info_127a_4322 = { + 0x4322, pci_device_127a_4322, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13c6_0620, + pci_ss_list_127a_4322, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13c6_0820 = { - 0x0820, pci_device_13c6_0820, +static const pciDeviceInfo pci_dev_info_127a_8234 = { + 0x8234, pci_device_127a_8234, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13c6_0820, + pci_ss_list_127a_8234, #else NULL, #endif @@ -77121,137 +90366,122 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_13d0_2103 = { - 0x2103, pci_device_13d0_2103, +static const pciDeviceInfo pci_dev_info_1282_9009 = { + 0x9009, pci_device_1282_9009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13d0_2103, + pci_ss_list_1282_9009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13d0_2200 = { - 0x2200, pci_device_13d0_2200, +static const pciDeviceInfo pci_dev_info_1282_9100 = { + 0x9100, pci_device_1282_9100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13d0_2200, + pci_ss_list_1282_9100, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_13d1_ab02 = { - 0xab02, pci_device_13d1_ab02, +static const pciDeviceInfo pci_dev_info_1282_9102 = { + 0x9102, pci_device_1282_9102, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13d1_ab02, + pci_ss_list_1282_9102, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13d1_ab03 = { - 0xab03, pci_device_13d1_ab03, +static const pciDeviceInfo pci_dev_info_1282_9132 = { + 0x9132, pci_device_1282_9132, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13d1_ab03, + pci_ss_list_1282_9132, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13d1_ab06 = { - 0xab06, pci_device_13d1_ab06, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_13d1_ab06, -#else - NULL, #endif - 0 -}; -static const pciDeviceInfo pci_dev_info_13d1_ab08 = { - 0xab08, pci_device_13d1_ab08, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1283_673a = { + 0x673a, pci_device_1283_673a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13d1_ab08, + pci_ss_list_1283_673a, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_13df_0001 = { - 0x0001, pci_device_13df_0001, +static const pciDeviceInfo pci_dev_info_1283_8211 = { + 0x8211, pci_device_1283_8211, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13df_0001, + pci_ss_list_1283_8211, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_13f0_0201 = { - 0x0201, pci_device_13f0_0201, +static const pciDeviceInfo pci_dev_info_1283_8212 = { + 0x8212, pci_device_1283_8212, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13f0_0201, + pci_ss_list_1283_8212, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_13f4_1401 = { - 0x1401, pci_device_13f4_1401, +static const pciDeviceInfo pci_dev_info_1283_8330 = { + 0x8330, pci_device_1283_8330, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13f4_1401, + pci_ss_list_1283_8330, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_13f6_0011 = { - 0x0011, pci_device_13f6_0011, +static const pciDeviceInfo pci_dev_info_1283_8872 = { + 0x8872, pci_device_1283_8872, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13f6_0011, + pci_ss_list_1283_8872, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13f6_0100 = { - 0x0100, pci_device_13f6_0100, +static const pciDeviceInfo pci_dev_info_1283_8888 = { + 0x8888, pci_device_1283_8888, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13f6_0100, + pci_ss_list_1283_8888, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13f6_0101 = { - 0x0101, pci_device_13f6_0101, +static const pciDeviceInfo pci_dev_info_1283_8889 = { + 0x8889, pci_device_1283_8889, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13f6_0101, + pci_ss_list_1283_8889, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13f6_0111 = { - 0x0111, pci_device_13f6_0111, +static const pciDeviceInfo pci_dev_info_1283_e886 = { + 0xe886, pci_device_1283_e886, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13f6_0111, + pci_ss_list_1283_e886, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13f6_0211 = { - 0x0211, pci_device_13f6_0211, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1285_0100 = { + 0x0100, pci_device_1285_0100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13f6_0211, + pci_ss_list_1285_0100, #else NULL, #endif @@ -77259,471 +90489,471 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_13fe_1240 = { - 0x1240, pci_device_13fe_1240, +static const pciDeviceInfo pci_dev_info_1287_001e = { + 0x001e, pci_device_1287_001e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13fe_1240, + pci_ss_list_1287_001e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13fe_1600 = { - 0x1600, pci_device_13fe_1600, +static const pciDeviceInfo pci_dev_info_1287_001f = { + 0x001f, pci_device_1287_001f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13fe_1600, + pci_ss_list_1287_001f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13fe_1752 = { - 0x1752, pci_device_13fe_1752, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_128d_0021 = { + 0x0021, pci_device_128d_0021, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13fe_1752, + pci_ss_list_128d_0021, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13fe_1754 = { - 0x1754, pci_device_13fe_1754, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_128e_0008 = { + 0x0008, pci_device_128e_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13fe_1754, + pci_ss_list_128e_0008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_13fe_1756 = { - 0x1756, pci_device_13fe_1756, +static const pciDeviceInfo pci_dev_info_128e_0009 = { + 0x0009, pci_device_128e_0009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_13fe_1756, + pci_ss_list_128e_0009, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1400_1401 = { - 0x1401, pci_device_1400_1401, +static const pciDeviceInfo pci_dev_info_128e_000a = { + 0x000a, pci_device_128e_000a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1400_1401, + pci_ss_list_128e_000a, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1407_0100 = { - 0x0100, pci_device_1407_0100, +static const pciDeviceInfo pci_dev_info_128e_000b = { + 0x000b, pci_device_128e_000b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0100, + pci_ss_list_128e_000b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0101 = { - 0x0101, pci_device_1407_0101, +static const pciDeviceInfo pci_dev_info_128e_000c = { + 0x000c, pci_device_128e_000c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0101, + pci_ss_list_128e_000c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0102 = { - 0x0102, pci_device_1407_0102, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_129a_0615 = { + 0x0615, pci_device_129a_0615, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0102, + pci_ss_list_129a_0615, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0120 = { - 0x0120, pci_device_1407_0120, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12a3_8105 = { + 0x8105, pci_device_12a3_8105, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0120, + pci_ss_list_12a3_8105, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0121 = { - 0x0121, pci_device_1407_0121, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12ab_0002 = { + 0x0002, pci_device_12ab_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0121, + pci_ss_list_12ab_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0180 = { - 0x0180, pci_device_1407_0180, +static const pciDeviceInfo pci_dev_info_12ab_3000 = { + 0x3000, pci_device_12ab_3000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0180, + pci_ss_list_12ab_3000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0181 = { - 0x0181, pci_device_1407_0181, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12ae_0001 = { + 0x0001, pci_device_12ae_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0181, + pci_ss_list_12ae_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0200 = { - 0x0200, pci_device_1407_0200, +static const pciDeviceInfo pci_dev_info_12ae_0002 = { + 0x0002, pci_device_12ae_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0200, + pci_ss_list_12ae_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0201 = { - 0x0201, pci_device_1407_0201, +static const pciDeviceInfo pci_dev_info_12ae_00fa = { + 0x00fa, pci_device_12ae_00fa, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0201, + pci_ss_list_12ae_00fa, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0202 = { - 0x0202, pci_device_1407_0202, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12b9_1006 = { + 0x1006, pci_device_12b9_1006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0202, + pci_ss_list_12b9_1006, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0220 = { - 0x0220, pci_device_1407_0220, +static const pciDeviceInfo pci_dev_info_12b9_1007 = { + 0x1007, pci_device_12b9_1007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0220, + pci_ss_list_12b9_1007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0221 = { - 0x0221, pci_device_1407_0221, +static const pciDeviceInfo pci_dev_info_12b9_1008 = { + 0x1008, pci_device_12b9_1008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0221, + pci_ss_list_12b9_1008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0500 = { - 0x0500, pci_device_1407_0500, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12be_3041 = { + 0x3041, pci_device_12be_3041, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0500, + pci_ss_list_12be_3041, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_0600 = { - 0x0600, pci_device_1407_0600, +static const pciDeviceInfo pci_dev_info_12be_3042 = { + 0x3042, pci_device_12be_3042, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_0600, + pci_ss_list_12be_3042, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_8000 = { - 0x8000, pci_device_1407_8000, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12c3_0058 = { + 0x0058, pci_device_12c3_0058, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_8000, + pci_ss_list_12c3_0058, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_8001 = { - 0x8001, pci_device_1407_8001, +static const pciDeviceInfo pci_dev_info_12c3_5598 = { + 0x5598, pci_device_12c3_5598, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_8001, + pci_ss_list_12c3_5598, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_8002 = { - 0x8002, pci_device_1407_8002, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12c4_0001 = { + 0x0001, pci_device_12c4_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_8002, + pci_ss_list_12c4_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_8003 = { - 0x8003, pci_device_1407_8003, +static const pciDeviceInfo pci_dev_info_12c4_0002 = { + 0x0002, pci_device_12c4_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_8003, + pci_ss_list_12c4_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1407_8800 = { - 0x8800, pci_device_1407_8800, +static const pciDeviceInfo pci_dev_info_12c4_0003 = { + 0x0003, pci_device_12c4_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1407_8800, + pci_ss_list_12c4_0003, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1409_7168 = { - 0x7168, pci_device_1409_7168, +static const pciDeviceInfo pci_dev_info_12c4_0004 = { + 0x0004, pci_device_12c4_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1409_7168, + pci_ss_list_12c4_0004, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1412_1712 = { - 0x1712, pci_device_1412_1712, +static const pciDeviceInfo pci_dev_info_12c4_0005 = { + 0x0005, pci_device_12c4_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1412_1712, + pci_ss_list_12c4_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1412_1724 = { - 0x1724, pci_device_1412_1724, +static const pciDeviceInfo pci_dev_info_12c4_0006 = { + 0x0006, pci_device_12c4_0006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1412_1724, + pci_ss_list_12c4_0006, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1415_8403 = { - 0x8403, pci_device_1415_8403, +static const pciDeviceInfo pci_dev_info_12c4_0007 = { + 0x0007, pci_device_12c4_0007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1415_8403, + pci_ss_list_12c4_0007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1415_9501 = { - 0x9501, pci_device_1415_9501, +static const pciDeviceInfo pci_dev_info_12c4_0008 = { + 0x0008, pci_device_12c4_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1415_9501, + pci_ss_list_12c4_0008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1415_950a = { - 0x950a, pci_device_1415_950a, +static const pciDeviceInfo pci_dev_info_12c4_0009 = { + 0x0009, pci_device_12c4_0009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1415_950a, + pci_ss_list_12c4_0009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1415_950b = { - 0x950b, pci_device_1415_950b, +static const pciDeviceInfo pci_dev_info_12c4_000a = { + 0x000a, pci_device_12c4_000a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1415_950b, + pci_ss_list_12c4_000a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1415_9511 = { - 0x9511, pci_device_1415_9511, +static const pciDeviceInfo pci_dev_info_12c4_000b = { + 0x000b, pci_device_12c4_000b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1415_9511, + pci_ss_list_12c4_000b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1415_9521 = { - 0x9521, pci_device_1415_9521, +static const pciDeviceInfo pci_dev_info_12c4_000c = { + 0x000c, pci_device_12c4_000c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1415_9521, + pci_ss_list_12c4_000c, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1420_8002 = { - 0x8002, pci_device_1420_8002, +static const pciDeviceInfo pci_dev_info_12c4_000d = { + 0x000d, pci_device_12c4_000d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1420_8002, + pci_ss_list_12c4_000d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1420_8003 = { - 0x8003, pci_device_1420_8003, +static const pciDeviceInfo pci_dev_info_12c4_0100 = { + 0x0100, pci_device_12c4_0100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1420_8003, + pci_ss_list_12c4_0100, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_142e_4020 = { - 0x4020, pci_device_142e_4020, +static const pciDeviceInfo pci_dev_info_12c4_0201 = { + 0x0201, pci_device_12c4_0201, #ifdef INIT_SUBSYS_INFO - pci_ss_list_142e_4020, + pci_ss_list_12c4_0201, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1432_9130 = { - 0x9130, pci_device_1432_9130, +static const pciDeviceInfo pci_dev_info_12c4_0202 = { + 0x0202, pci_device_12c4_0202, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1432_9130, + pci_ss_list_12c4_0202, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_144a_7296 = { - 0x7296, pci_device_144a_7296, +static const pciDeviceInfo pci_dev_info_12c4_0300 = { + 0x0300, pci_device_12c4_0300, #ifdef INIT_SUBSYS_INFO - pci_ss_list_144a_7296, + pci_ss_list_12c4_0300, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_144a_7432 = { - 0x7432, pci_device_144a_7432, +static const pciDeviceInfo pci_dev_info_12c4_0301 = { + 0x0301, pci_device_12c4_0301, #ifdef INIT_SUBSYS_INFO - pci_ss_list_144a_7432, + pci_ss_list_12c4_0301, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_144a_7433 = { - 0x7433, pci_device_144a_7433, +static const pciDeviceInfo pci_dev_info_12c4_0302 = { + 0x0302, pci_device_12c4_0302, #ifdef INIT_SUBSYS_INFO - pci_ss_list_144a_7433, + pci_ss_list_12c4_0302, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_144a_7434 = { - 0x7434, pci_device_144a_7434, +static const pciDeviceInfo pci_dev_info_12c4_0310 = { + 0x0310, pci_device_12c4_0310, #ifdef INIT_SUBSYS_INFO - pci_ss_list_144a_7434, + pci_ss_list_12c4_0310, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_144a_7841 = { - 0x7841, pci_device_144a_7841, +static const pciDeviceInfo pci_dev_info_12c4_0311 = { + 0x0311, pci_device_12c4_0311, #ifdef INIT_SUBSYS_INFO - pci_ss_list_144a_7841, + pci_ss_list_12c4_0311, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_144a_8133 = { - 0x8133, pci_device_144a_8133, +static const pciDeviceInfo pci_dev_info_12c4_0312 = { + 0x0312, pci_device_12c4_0312, #ifdef INIT_SUBSYS_INFO - pci_ss_list_144a_8133, + pci_ss_list_12c4_0312, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_144a_8164 = { - 0x8164, pci_device_144a_8164, +static const pciDeviceInfo pci_dev_info_12c4_0320 = { + 0x0320, pci_device_12c4_0320, #ifdef INIT_SUBSYS_INFO - pci_ss_list_144a_8164, + pci_ss_list_12c4_0320, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_144a_8554 = { - 0x8554, pci_device_144a_8554, +static const pciDeviceInfo pci_dev_info_12c4_0321 = { + 0x0321, pci_device_12c4_0321, #ifdef INIT_SUBSYS_INFO - pci_ss_list_144a_8554, + pci_ss_list_12c4_0321, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_144a_9111 = { - 0x9111, pci_device_144a_9111, +static const pciDeviceInfo pci_dev_info_12c4_0322 = { + 0x0322, pci_device_12c4_0322, #ifdef INIT_SUBSYS_INFO - pci_ss_list_144a_9111, + pci_ss_list_12c4_0322, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_144a_9113 = { - 0x9113, pci_device_144a_9113, +static const pciDeviceInfo pci_dev_info_12c4_0330 = { + 0x0330, pci_device_12c4_0330, #ifdef INIT_SUBSYS_INFO - pci_ss_list_144a_9113, + pci_ss_list_12c4_0330, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_144a_9114 = { - 0x9114, pci_device_144a_9114, +static const pciDeviceInfo pci_dev_info_12c4_0331 = { + 0x0331, pci_device_12c4_0331, #ifdef INIT_SUBSYS_INFO - pci_ss_list_144a_9114, + pci_ss_list_12c4_0331, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_145f_0001 = { - 0x0001, pci_device_145f_0001, +static const pciDeviceInfo pci_dev_info_12c4_0332 = { + 0x0332, pci_device_12c4_0332, #ifdef INIT_SUBSYS_INFO - pci_ss_list_145f_0001, + pci_ss_list_12c4_0332, #else NULL, #endif @@ -77731,177 +90961,169 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1462_6825 = { - 0x6825, pci_device_1462_6825, +static const pciDeviceInfo pci_dev_info_12c5_007e = { + 0x007e, pci_device_12c5_007e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1462_6825, + pci_ss_list_12c5_007e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1462_8725 = { - 0x8725, pci_device_1462_8725, +static const pciDeviceInfo pci_dev_info_12c5_007f = { + 0x007f, pci_device_12c5_007f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1462_8725, + pci_ss_list_12c5_007f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1462_9000 = { - 0x9000, pci_device_1462_9000, +static const pciDeviceInfo pci_dev_info_12c5_0081 = { + 0x0081, pci_device_12c5_0081, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1462_9000, + pci_ss_list_12c5_0081, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1462_9119 = { - 0x9119, pci_device_1462_9119, +static const pciDeviceInfo pci_dev_info_12c5_0085 = { + 0x0085, pci_device_12c5_0085, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1462_9119, + pci_ss_list_12c5_0085, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_146c_1430 = { - 0x1430, pci_device_146c_1430, +static const pciDeviceInfo pci_dev_info_12c5_0086 = { + 0x0086, pci_device_12c5_0086, #ifdef INIT_SUBSYS_INFO - pci_ss_list_146c_1430, + pci_ss_list_12c5_0086, #else NULL, #endif 0 }; #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_148d_1003 = { - 0x1003, pci_device_148d_1003, +static const pciDeviceInfo pci_dev_info_12d2_0008 = { + 0x0008, pci_device_12d2_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_148d_1003, + pci_ss_list_12d2_0008, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1498_30c8 = { - 0x30c8, pci_device_1498_30c8, +static const pciDeviceInfo pci_dev_info_12d2_0009 = { + 0x0009, pci_device_12d2_0009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1498_30c8, + pci_ss_list_12d2_0009, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_149d_0001 = { - 0x0001, pci_device_149d_0001, +static const pciDeviceInfo pci_dev_info_12d2_0018 = { + 0x0018, pci_device_12d2_0018, #ifdef INIT_SUBSYS_INFO - pci_ss_list_149d_0001, + pci_ss_list_12d2_0018, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14af_7102 = { - 0x7102, pci_device_14af_7102, +static const pciDeviceInfo pci_dev_info_12d2_0019 = { + 0x0019, pci_device_12d2_0019, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14af_7102, + pci_ss_list_12d2_0019, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14b3_0000 = { - 0x0000, pci_device_14b3_0000, +static const pciDeviceInfo pci_dev_info_12d2_0020 = { + 0x0020, pci_device_12d2_0020, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b3_0000, + pci_ss_list_12d2_0020, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14b5_0200 = { - 0x0200, pci_device_14b5_0200, +static const pciDeviceInfo pci_dev_info_12d2_0028 = { + 0x0028, pci_device_12d2_0028, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b5_0200, + pci_ss_list_12d2_0028, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b5_0300 = { - 0x0300, pci_device_14b5_0300, +static const pciDeviceInfo pci_dev_info_12d2_0029 = { + 0x0029, pci_device_12d2_0029, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b5_0300, + pci_ss_list_12d2_0029, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b5_0400 = { - 0x0400, pci_device_14b5_0400, +static const pciDeviceInfo pci_dev_info_12d2_002c = { + 0x002c, pci_device_12d2_002c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b5_0400, + pci_ss_list_12d2_002c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b5_0600 = { - 0x0600, pci_device_14b5_0600, +static const pciDeviceInfo pci_dev_info_12d2_00a0 = { + 0x00a0, pci_device_12d2_00a0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b5_0600, + pci_ss_list_12d2_00a0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b5_0800 = { - 0x0800, pci_device_14b5_0800, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12d4_0200 = { + 0x0200, pci_device_12d4_0200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b5_0800, + pci_ss_list_12d4_0200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b5_0900 = { - 0x0900, pci_device_14b5_0900, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12d5_0003 = { + 0x0003, pci_device_12d5_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b5_0900, + pci_ss_list_12d5_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b5_0a00 = { - 0x0a00, pci_device_14b5_0a00, +static const pciDeviceInfo pci_dev_info_12d5_1000 = { + 0x1000, pci_device_12d5_1000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b5_0a00, + pci_ss_list_12d5_1000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b5_0b00 = { - 0x0b00, pci_device_14b5_0b00, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12d8_8150 = { + 0x8150, pci_device_12d8_8150, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b5_0b00, + pci_ss_list_12d8_8150, #else NULL, #endif @@ -77909,241 +91131,245 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14b7_0001 = { - 0x0001, pci_device_14b7_0001, +static const pciDeviceInfo pci_dev_info_12d9_0002 = { + 0x0002, pci_device_12d9_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b7_0001, + pci_ss_list_12d9_0002, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14b9_0001 = { - 0x0001, pci_device_14b9_0001, +static const pciDeviceInfo pci_dev_info_12d9_0004 = { + 0x0004, pci_device_12d9_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b9_0001, + pci_ss_list_12d9_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b9_0340 = { - 0x0340, pci_device_14b9_0340, +static const pciDeviceInfo pci_dev_info_12d9_0005 = { + 0x0005, pci_device_12d9_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b9_0340, + pci_ss_list_12d9_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b9_0350 = { - 0x0350, pci_device_14b9_0350, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12de_0200 = { + 0x0200, pci_device_12de_0200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b9_0350, + pci_ss_list_12de_0200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b9_4500 = { - 0x4500, pci_device_14b9_4500, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12e0_0010 = { + 0x0010, pci_device_12e0_0010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b9_4500, + pci_ss_list_12e0_0010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b9_4800 = { - 0x4800, pci_device_14b9_4800, +static const pciDeviceInfo pci_dev_info_12e0_0020 = { + 0x0020, pci_device_12e0_0020, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b9_4800, + pci_ss_list_12e0_0020, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b9_a504 = { - 0xa504, pci_device_14b9_a504, +static const pciDeviceInfo pci_dev_info_12e0_0030 = { + 0x0030, pci_device_12e0_0030, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b9_a504, + pci_ss_list_12e0_0030, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b9_a505 = { - 0xa505, pci_device_14b9_a505, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12eb_0001 = { + 0x0001, pci_device_12eb_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b9_a505, + pci_ss_list_12eb_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14b9_a506 = { - 0xa506, pci_device_14b9_a506, +static const pciDeviceInfo pci_dev_info_12eb_0002 = { + 0x0002, pci_device_12eb_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14b9_a506, + pci_ss_list_12eb_0002, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14c1_8043 = { - 0x8043, pci_device_14c1_8043, +static const pciDeviceInfo pci_dev_info_12eb_0003 = { + 0x0003, pci_device_12eb_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14c1_8043, + pci_ss_list_12eb_0003, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14d2_8001 = { - 0x8001, pci_device_14d2_8001, +static const pciDeviceInfo pci_dev_info_12eb_8803 = { + 0x8803, pci_device_12eb_8803, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_8001, + pci_ss_list_12eb_8803, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_8002 = { - 0x8002, pci_device_14d2_8002, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12f8_0002 = { + 0x0002, pci_device_12f8_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_8002, + pci_ss_list_12f8_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_8010 = { - 0x8010, pci_device_14d2_8010, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_12fb_0001 = { + 0x0001, pci_device_12fb_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_8010, + pci_ss_list_12fb_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_8011 = { - 0x8011, pci_device_14d2_8011, +static const pciDeviceInfo pci_dev_info_12fb_00f5 = { + 0x00f5, pci_device_12fb_00f5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_8011, + pci_ss_list_12fb_00f5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_8020 = { - 0x8020, pci_device_14d2_8020, +static const pciDeviceInfo pci_dev_info_12fb_02ad = { + 0x02ad, pci_device_12fb_02ad, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_8020, + pci_ss_list_12fb_02ad, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_8021 = { - 0x8021, pci_device_14d2_8021, +static const pciDeviceInfo pci_dev_info_12fb_2adc = { + 0x2adc, pci_device_12fb_2adc, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_8021, + pci_ss_list_12fb_2adc, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_8040 = { - 0x8040, pci_device_14d2_8040, +static const pciDeviceInfo pci_dev_info_12fb_3100 = { + 0x3100, pci_device_12fb_3100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_8040, + pci_ss_list_12fb_3100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_8080 = { - 0x8080, pci_device_14d2_8080, +static const pciDeviceInfo pci_dev_info_12fb_3500 = { + 0x3500, pci_device_12fb_3500, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_8080, + pci_ss_list_12fb_3500, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_a000 = { - 0xa000, pci_device_14d2_a000, +static const pciDeviceInfo pci_dev_info_12fb_4d4f = { + 0x4d4f, pci_device_12fb_4d4f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_a000, + pci_ss_list_12fb_4d4f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_a001 = { - 0xa001, pci_device_14d2_a001, +static const pciDeviceInfo pci_dev_info_12fb_8120 = { + 0x8120, pci_device_12fb_8120, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_a001, + pci_ss_list_12fb_8120, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_a003 = { - 0xa003, pci_device_14d2_a003, +static const pciDeviceInfo pci_dev_info_12fb_da62 = { + 0xda62, pci_device_12fb_da62, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_a003, + pci_ss_list_12fb_da62, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_a004 = { - 0xa004, pci_device_14d2_a004, +static const pciDeviceInfo pci_dev_info_12fb_db62 = { + 0xdb62, pci_device_12fb_db62, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_a004, + pci_ss_list_12fb_db62, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_a005 = { - 0xa005, pci_device_14d2_a005, +static const pciDeviceInfo pci_dev_info_12fb_dc62 = { + 0xdc62, pci_device_12fb_dc62, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_a005, + pci_ss_list_12fb_dc62, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_e001 = { - 0xe001, pci_device_14d2_e001, +static const pciDeviceInfo pci_dev_info_12fb_dd62 = { + 0xdd62, pci_device_12fb_dd62, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_e001, + pci_ss_list_12fb_dd62, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_e010 = { - 0xe010, pci_device_14d2_e010, +static const pciDeviceInfo pci_dev_info_12fb_eddc = { + 0xeddc, pci_device_12fb_eddc, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_e010, + pci_ss_list_12fb_eddc, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d2_e020 = { - 0xe020, pci_device_14d2_e020, +static const pciDeviceInfo pci_dev_info_12fb_fa01 = { + 0xfa01, pci_device_12fb_fa01, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d2_e020, + pci_ss_list_12fb_fa01, #else NULL, #endif @@ -78151,1948 +91377,1984 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14d9_0010 = { - 0x0010, pci_device_14d9_0010, +static const pciDeviceInfo pci_dev_info_1307_0001 = { + 0x0001, pci_device_1307_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d9_0010, + pci_ss_list_1307_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14d9_9000 = { - 0x9000, pci_device_14d9_9000, +static const pciDeviceInfo pci_dev_info_1307_000b = { + 0x000b, pci_device_1307_000b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14d9_9000, + pci_ss_list_1307_000b, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14db_2120 = { - 0x2120, pci_device_14db_2120, +static const pciDeviceInfo pci_dev_info_1307_000c = { + 0x000c, pci_device_1307_000c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14db_2120, + pci_ss_list_1307_000c, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14dc_0000 = { - 0x0000, pci_device_14dc_0000, +static const pciDeviceInfo pci_dev_info_1307_000d = { + 0x000d, pci_device_1307_000d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14dc_0000, + pci_ss_list_1307_000d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14dc_0001 = { - 0x0001, pci_device_14dc_0001, +static const pciDeviceInfo pci_dev_info_1307_000f = { + 0x000f, pci_device_1307_000f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14dc_0001, + pci_ss_list_1307_000f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14dc_0002 = { - 0x0002, pci_device_14dc_0002, +static const pciDeviceInfo pci_dev_info_1307_0010 = { + 0x0010, pci_device_1307_0010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14dc_0002, + pci_ss_list_1307_0010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14dc_0003 = { - 0x0003, pci_device_14dc_0003, +static const pciDeviceInfo pci_dev_info_1307_0014 = { + 0x0014, pci_device_1307_0014, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14dc_0003, + pci_ss_list_1307_0014, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14dc_0004 = { - 0x0004, pci_device_14dc_0004, +static const pciDeviceInfo pci_dev_info_1307_0015 = { + 0x0015, pci_device_1307_0015, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14dc_0004, + pci_ss_list_1307_0015, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14dc_0005 = { - 0x0005, pci_device_14dc_0005, +static const pciDeviceInfo pci_dev_info_1307_0016 = { + 0x0016, pci_device_1307_0016, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14dc_0005, + pci_ss_list_1307_0016, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14dc_0006 = { - 0x0006, pci_device_14dc_0006, +static const pciDeviceInfo pci_dev_info_1307_0017 = { + 0x0017, pci_device_1307_0017, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14dc_0006, + pci_ss_list_1307_0017, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14dc_0007 = { - 0x0007, pci_device_14dc_0007, +static const pciDeviceInfo pci_dev_info_1307_0018 = { + 0x0018, pci_device_1307_0018, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14dc_0007, + pci_ss_list_1307_0018, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14dc_0008 = { - 0x0008, pci_device_14dc_0008, +static const pciDeviceInfo pci_dev_info_1307_0019 = { + 0x0019, pci_device_1307_0019, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14dc_0008, + pci_ss_list_1307_0019, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14dc_0009 = { - 0x0009, pci_device_14dc_0009, +static const pciDeviceInfo pci_dev_info_1307_001a = { + 0x001a, pci_device_1307_001a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14dc_0009, + pci_ss_list_1307_001a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14dc_000a = { - 0x000a, pci_device_14dc_000a, +static const pciDeviceInfo pci_dev_info_1307_001b = { + 0x001b, pci_device_1307_001b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14dc_000a, + pci_ss_list_1307_001b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14dc_000b = { - 0x000b, pci_device_14dc_000b, +static const pciDeviceInfo pci_dev_info_1307_001c = { + 0x001c, pci_device_1307_001c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14dc_000b, + pci_ss_list_1307_001c, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14e4_0800 = { - 0x0800, pci_device_14e4_0800, +static const pciDeviceInfo pci_dev_info_1307_001d = { + 0x001d, pci_device_1307_001d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_0800, + pci_ss_list_1307_001d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_0804 = { - 0x0804, pci_device_14e4_0804, +static const pciDeviceInfo pci_dev_info_1307_001e = { + 0x001e, pci_device_1307_001e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_0804, + pci_ss_list_1307_001e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_0805 = { - 0x0805, pci_device_14e4_0805, +static const pciDeviceInfo pci_dev_info_1307_001f = { + 0x001f, pci_device_1307_001f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_0805, + pci_ss_list_1307_001f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_0806 = { - 0x0806, pci_device_14e4_0806, +static const pciDeviceInfo pci_dev_info_1307_0020 = { + 0x0020, pci_device_1307_0020, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_0806, + pci_ss_list_1307_0020, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_080b = { - 0x080b, pci_device_14e4_080b, +static const pciDeviceInfo pci_dev_info_1307_0021 = { + 0x0021, pci_device_1307_0021, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_080b, + pci_ss_list_1307_0021, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_080f = { - 0x080f, pci_device_14e4_080f, +static const pciDeviceInfo pci_dev_info_1307_0022 = { + 0x0022, pci_device_1307_0022, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_080f, + pci_ss_list_1307_0022, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_0811 = { - 0x0811, pci_device_14e4_0811, +static const pciDeviceInfo pci_dev_info_1307_0023 = { + 0x0023, pci_device_1307_0023, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_0811, + pci_ss_list_1307_0023, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_0816 = { - 0x0816, pci_device_14e4_0816, +static const pciDeviceInfo pci_dev_info_1307_0024 = { + 0x0024, pci_device_1307_0024, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_0816, + pci_ss_list_1307_0024, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_1644 = { - 0x1644, pci_device_14e4_1644, +static const pciDeviceInfo pci_dev_info_1307_0025 = { + 0x0025, pci_device_1307_0025, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_1644, + pci_ss_list_1307_0025, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_1645 = { - 0x1645, pci_device_14e4_1645, +static const pciDeviceInfo pci_dev_info_1307_0026 = { + 0x0026, pci_device_1307_0026, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_1645, + pci_ss_list_1307_0026, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_1646 = { - 0x1646, pci_device_14e4_1646, +static const pciDeviceInfo pci_dev_info_1307_0027 = { + 0x0027, pci_device_1307_0027, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_1646, + pci_ss_list_1307_0027, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_1647 = { - 0x1647, pci_device_14e4_1647, +static const pciDeviceInfo pci_dev_info_1307_0028 = { + 0x0028, pci_device_1307_0028, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_1647, + pci_ss_list_1307_0028, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_1648 = { - 0x1648, pci_device_14e4_1648, +static const pciDeviceInfo pci_dev_info_1307_0029 = { + 0x0029, pci_device_1307_0029, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_1648, + pci_ss_list_1307_0029, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_164a = { - 0x164a, pci_device_14e4_164a, +static const pciDeviceInfo pci_dev_info_1307_002c = { + 0x002c, pci_device_1307_002c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_164a, + pci_ss_list_1307_002c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_164d = { - 0x164d, pci_device_14e4_164d, +static const pciDeviceInfo pci_dev_info_1307_0033 = { + 0x0033, pci_device_1307_0033, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_164d, + pci_ss_list_1307_0033, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_1653 = { - 0x1653, pci_device_14e4_1653, +static const pciDeviceInfo pci_dev_info_1307_0034 = { + 0x0034, pci_device_1307_0034, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_1653, + pci_ss_list_1307_0034, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_1654 = { - 0x1654, pci_device_14e4_1654, +static const pciDeviceInfo pci_dev_info_1307_0035 = { + 0x0035, pci_device_1307_0035, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_1654, + pci_ss_list_1307_0035, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_1659 = { - 0x1659, pci_device_14e4_1659, +static const pciDeviceInfo pci_dev_info_1307_0036 = { + 0x0036, pci_device_1307_0036, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_1659, + pci_ss_list_1307_0036, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_165d = { - 0x165d, pci_device_14e4_165d, +static const pciDeviceInfo pci_dev_info_1307_0037 = { + 0x0037, pci_device_1307_0037, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_165d, + pci_ss_list_1307_0037, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_165e = { - 0x165e, pci_device_14e4_165e, +static const pciDeviceInfo pci_dev_info_1307_004c = { + 0x004c, pci_device_1307_004c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_165e, + pci_ss_list_1307_004c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_166e = { - 0x166e, pci_device_14e4_166e, +static const pciDeviceInfo pci_dev_info_1307_004d = { + 0x004d, pci_device_1307_004d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_166e, + pci_ss_list_1307_004d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_1677 = { - 0x1677, pci_device_14e4_1677, +static const pciDeviceInfo pci_dev_info_1307_0052 = { + 0x0052, pci_device_1307_0052, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_1677, + pci_ss_list_1307_0052, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_167d = { - 0x167d, pci_device_14e4_167d, +static const pciDeviceInfo pci_dev_info_1307_0054 = { + 0x0054, pci_device_1307_0054, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_167d, + pci_ss_list_1307_0054, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_167e = { - 0x167e, pci_device_14e4_167e, +static const pciDeviceInfo pci_dev_info_1307_005e = { + 0x005e, pci_device_1307_005e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_167e, + pci_ss_list_1307_005e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_1696 = { - 0x1696, pci_device_14e4_1696, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1308_0001 = { + 0x0001, pci_device_1308_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_1696, + pci_ss_list_1308_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_169c = { - 0x169c, pci_device_14e4_169c, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1317_0981 = { + 0x0981, pci_device_1317_0981, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_169c, + pci_ss_list_1317_0981, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_169d = { - 0x169d, pci_device_14e4_169d, +static const pciDeviceInfo pci_dev_info_1317_0985 = { + 0x0985, pci_device_1317_0985, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_169d, + pci_ss_list_1317_0985, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_16a6 = { - 0x16a6, pci_device_14e4_16a6, +static const pciDeviceInfo pci_dev_info_1317_1985 = { + 0x1985, pci_device_1317_1985, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_16a6, + pci_ss_list_1317_1985, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_16a7 = { - 0x16a7, pci_device_14e4_16a7, +static const pciDeviceInfo pci_dev_info_1317_2850 = { + 0x2850, pci_device_1317_2850, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_16a7, + pci_ss_list_1317_2850, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_16a8 = { - 0x16a8, pci_device_14e4_16a8, +static const pciDeviceInfo pci_dev_info_1317_5120 = { + 0x5120, pci_device_1317_5120, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_16a8, + pci_ss_list_1317_5120, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_16aa = { - 0x16aa, pci_device_14e4_16aa, +static const pciDeviceInfo pci_dev_info_1317_8201 = { + 0x8201, pci_device_1317_8201, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_16aa, + pci_ss_list_1317_8201, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_16c6 = { - 0x16c6, pci_device_14e4_16c6, +static const pciDeviceInfo pci_dev_info_1317_8211 = { + 0x8211, pci_device_1317_8211, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_16c6, + pci_ss_list_1317_8211, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_16c7 = { - 0x16c7, pci_device_14e4_16c7, +static const pciDeviceInfo pci_dev_info_1317_9511 = { + 0x9511, pci_device_1317_9511, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_16c7, + pci_ss_list_1317_9511, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_16dd = { - 0x16dd, pci_device_14e4_16dd, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1318_0911 = { + 0x0911, pci_device_1318_0911, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_16dd, + pci_ss_list_1318_0911, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_16f7 = { - 0x16f7, pci_device_14e4_16f7, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1319_0801 = { + 0x0801, pci_device_1319_0801, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_16f7, + pci_ss_list_1319_0801, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_16fd = { - 0x16fd, pci_device_14e4_16fd, +static const pciDeviceInfo pci_dev_info_1319_0802 = { + 0x0802, pci_device_1319_0802, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_16fd, + pci_ss_list_1319_0802, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_16fe = { - 0x16fe, pci_device_14e4_16fe, +static const pciDeviceInfo pci_dev_info_1319_1000 = { + 0x1000, pci_device_1319_1000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_16fe, + pci_ss_list_1319_1000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_170c = { - 0x170c, pci_device_14e4_170c, +static const pciDeviceInfo pci_dev_info_1319_1001 = { + 0x1001, pci_device_1319_1001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_170c, + pci_ss_list_1319_1001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_170d = { - 0x170d, pci_device_14e4_170d, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_131f_1000 = { + 0x1000, pci_device_131f_1000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_170d, + pci_ss_list_131f_1000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_170e = { - 0x170e, pci_device_14e4_170e, +static const pciDeviceInfo pci_dev_info_131f_1001 = { + 0x1001, pci_device_131f_1001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_170e, + pci_ss_list_131f_1001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_3352 = { - 0x3352, pci_device_14e4_3352, +static const pciDeviceInfo pci_dev_info_131f_1002 = { + 0x1002, pci_device_131f_1002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_3352, + pci_ss_list_131f_1002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_3360 = { - 0x3360, pci_device_14e4_3360, +static const pciDeviceInfo pci_dev_info_131f_1010 = { + 0x1010, pci_device_131f_1010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_3360, + pci_ss_list_131f_1010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4210 = { - 0x4210, pci_device_14e4_4210, +static const pciDeviceInfo pci_dev_info_131f_1011 = { + 0x1011, pci_device_131f_1011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4210, + pci_ss_list_131f_1011, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4211 = { - 0x4211, pci_device_14e4_4211, +static const pciDeviceInfo pci_dev_info_131f_1012 = { + 0x1012, pci_device_131f_1012, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4211, + pci_ss_list_131f_1012, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4212 = { - 0x4212, pci_device_14e4_4212, +static const pciDeviceInfo pci_dev_info_131f_1020 = { + 0x1020, pci_device_131f_1020, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4212, + pci_ss_list_131f_1020, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4301 = { - 0x4301, pci_device_14e4_4301, +static const pciDeviceInfo pci_dev_info_131f_1021 = { + 0x1021, pci_device_131f_1021, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4301, + pci_ss_list_131f_1021, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4305 = { - 0x4305, pci_device_14e4_4305, +static const pciDeviceInfo pci_dev_info_131f_1030 = { + 0x1030, pci_device_131f_1030, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4305, + pci_ss_list_131f_1030, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4306 = { - 0x4306, pci_device_14e4_4306, +static const pciDeviceInfo pci_dev_info_131f_1031 = { + 0x1031, pci_device_131f_1031, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4306, + pci_ss_list_131f_1031, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4307 = { - 0x4307, pci_device_14e4_4307, +static const pciDeviceInfo pci_dev_info_131f_1032 = { + 0x1032, pci_device_131f_1032, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4307, + pci_ss_list_131f_1032, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4310 = { - 0x4310, pci_device_14e4_4310, +static const pciDeviceInfo pci_dev_info_131f_1034 = { + 0x1034, pci_device_131f_1034, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4310, + pci_ss_list_131f_1034, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4312 = { - 0x4312, pci_device_14e4_4312, +static const pciDeviceInfo pci_dev_info_131f_1035 = { + 0x1035, pci_device_131f_1035, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4312, + pci_ss_list_131f_1035, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4313 = { - 0x4313, pci_device_14e4_4313, +static const pciDeviceInfo pci_dev_info_131f_1036 = { + 0x1036, pci_device_131f_1036, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4313, + pci_ss_list_131f_1036, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4315 = { - 0x4315, pci_device_14e4_4315, +static const pciDeviceInfo pci_dev_info_131f_1050 = { + 0x1050, pci_device_131f_1050, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4315, + pci_ss_list_131f_1050, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4320 = { - 0x4320, pci_device_14e4_4320, +static const pciDeviceInfo pci_dev_info_131f_1051 = { + 0x1051, pci_device_131f_1051, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4320, + pci_ss_list_131f_1051, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4321 = { - 0x4321, pci_device_14e4_4321, +static const pciDeviceInfo pci_dev_info_131f_1052 = { + 0x1052, pci_device_131f_1052, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4321, + pci_ss_list_131f_1052, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4322 = { - 0x4322, pci_device_14e4_4322, +static const pciDeviceInfo pci_dev_info_131f_2000 = { + 0x2000, pci_device_131f_2000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4322, + pci_ss_list_131f_2000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4324 = { - 0x4324, pci_device_14e4_4324, +static const pciDeviceInfo pci_dev_info_131f_2001 = { + 0x2001, pci_device_131f_2001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4324, + pci_ss_list_131f_2001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4325 = { - 0x4325, pci_device_14e4_4325, +static const pciDeviceInfo pci_dev_info_131f_2002 = { + 0x2002, pci_device_131f_2002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4325, + pci_ss_list_131f_2002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4326 = { - 0x4326, pci_device_14e4_4326, +static const pciDeviceInfo pci_dev_info_131f_2010 = { + 0x2010, pci_device_131f_2010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4326, + pci_ss_list_131f_2010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4401 = { - 0x4401, pci_device_14e4_4401, +static const pciDeviceInfo pci_dev_info_131f_2011 = { + 0x2011, pci_device_131f_2011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4401, + pci_ss_list_131f_2011, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4402 = { - 0x4402, pci_device_14e4_4402, +static const pciDeviceInfo pci_dev_info_131f_2012 = { + 0x2012, pci_device_131f_2012, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4402, + pci_ss_list_131f_2012, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4403 = { - 0x4403, pci_device_14e4_4403, +static const pciDeviceInfo pci_dev_info_131f_2020 = { + 0x2020, pci_device_131f_2020, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4403, + pci_ss_list_131f_2020, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4410 = { - 0x4410, pci_device_14e4_4410, +static const pciDeviceInfo pci_dev_info_131f_2021 = { + 0x2021, pci_device_131f_2021, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4410, + pci_ss_list_131f_2021, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4411 = { - 0x4411, pci_device_14e4_4411, +static const pciDeviceInfo pci_dev_info_131f_2030 = { + 0x2030, pci_device_131f_2030, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4411, + pci_ss_list_131f_2030, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4412 = { - 0x4412, pci_device_14e4_4412, +static const pciDeviceInfo pci_dev_info_131f_2031 = { + 0x2031, pci_device_131f_2031, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4412, + pci_ss_list_131f_2031, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4430 = { - 0x4430, pci_device_14e4_4430, +static const pciDeviceInfo pci_dev_info_131f_2032 = { + 0x2032, pci_device_131f_2032, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4430, + pci_ss_list_131f_2032, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4432 = { - 0x4432, pci_device_14e4_4432, +static const pciDeviceInfo pci_dev_info_131f_2040 = { + 0x2040, pci_device_131f_2040, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4432, + pci_ss_list_131f_2040, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4610 = { - 0x4610, pci_device_14e4_4610, +static const pciDeviceInfo pci_dev_info_131f_2041 = { + 0x2041, pci_device_131f_2041, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4610, + pci_ss_list_131f_2041, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4611 = { - 0x4611, pci_device_14e4_4611, +static const pciDeviceInfo pci_dev_info_131f_2042 = { + 0x2042, pci_device_131f_2042, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4611, + pci_ss_list_131f_2042, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4612 = { - 0x4612, pci_device_14e4_4612, +static const pciDeviceInfo pci_dev_info_131f_2050 = { + 0x2050, pci_device_131f_2050, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4612, + pci_ss_list_131f_2050, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4613 = { - 0x4613, pci_device_14e4_4613, +static const pciDeviceInfo pci_dev_info_131f_2051 = { + 0x2051, pci_device_131f_2051, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4613, + pci_ss_list_131f_2051, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4614 = { - 0x4614, pci_device_14e4_4614, +static const pciDeviceInfo pci_dev_info_131f_2052 = { + 0x2052, pci_device_131f_2052, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4614, + pci_ss_list_131f_2052, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4615 = { - 0x4615, pci_device_14e4_4615, +static const pciDeviceInfo pci_dev_info_131f_2060 = { + 0x2060, pci_device_131f_2060, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4615, + pci_ss_list_131f_2060, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4704 = { - 0x4704, pci_device_14e4_4704, +static const pciDeviceInfo pci_dev_info_131f_2061 = { + 0x2061, pci_device_131f_2061, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4704, + pci_ss_list_131f_2061, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4705 = { - 0x4705, pci_device_14e4_4705, +static const pciDeviceInfo pci_dev_info_131f_2062 = { + 0x2062, pci_device_131f_2062, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4705, + pci_ss_list_131f_2062, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4706 = { - 0x4706, pci_device_14e4_4706, +static const pciDeviceInfo pci_dev_info_131f_2081 = { + 0x2081, pci_device_131f_2081, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4706, + pci_ss_list_131f_2081, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4707 = { - 0x4707, pci_device_14e4_4707, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1331_0030 = { + 0x0030, pci_device_1331_0030, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4707, + pci_ss_list_1331_0030, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4708 = { - 0x4708, pci_device_14e4_4708, +static const pciDeviceInfo pci_dev_info_1331_8200 = { + 0x8200, pci_device_1331_8200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4708, + pci_ss_list_1331_8200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4710 = { - 0x4710, pci_device_14e4_4710, +static const pciDeviceInfo pci_dev_info_1331_8201 = { + 0x8201, pci_device_1331_8201, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4710, + pci_ss_list_1331_8201, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4711 = { - 0x4711, pci_device_14e4_4711, +static const pciDeviceInfo pci_dev_info_1331_8202 = { + 0x8202, pci_device_1331_8202, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4711, + pci_ss_list_1331_8202, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4712 = { - 0x4712, pci_device_14e4_4712, +static const pciDeviceInfo pci_dev_info_1331_8210 = { + 0x8210, pci_device_1331_8210, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4712, + pci_ss_list_1331_8210, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4713 = { - 0x4713, pci_device_14e4_4713, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1332_5415 = { + 0x5415, pci_device_1332_5415, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4713, + pci_ss_list_1332_5415, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4714 = { - 0x4714, pci_device_14e4_4714, +static const pciDeviceInfo pci_dev_info_1332_5425 = { + 0x5425, pci_device_1332_5425, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4714, + pci_ss_list_1332_5425, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4715 = { - 0x4715, pci_device_14e4_4715, +static const pciDeviceInfo pci_dev_info_1332_6140 = { + 0x6140, pci_device_1332_6140, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4715, + pci_ss_list_1332_6140, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4716 = { - 0x4716, pci_device_14e4_4716, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_134a_0001 = { + 0x0001, pci_device_134a_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4716, + pci_ss_list_134a_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4717 = { - 0x4717, pci_device_14e4_4717, +static const pciDeviceInfo pci_dev_info_134a_0002 = { + 0x0002, pci_device_134a_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4717, + pci_ss_list_134a_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4718 = { - 0x4718, pci_device_14e4_4718, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_134d_2189 = { + 0x2189, pci_device_134d_2189, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4718, + pci_ss_list_134d_2189, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_4720 = { - 0x4720, pci_device_14e4_4720, +static const pciDeviceInfo pci_dev_info_134d_2486 = { + 0x2486, pci_device_134d_2486, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_4720, + pci_ss_list_134d_2486, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5365 = { - 0x5365, pci_device_14e4_5365, +static const pciDeviceInfo pci_dev_info_134d_7890 = { + 0x7890, pci_device_134d_7890, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5365, + pci_ss_list_134d_7890, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5600 = { - 0x5600, pci_device_14e4_5600, +static const pciDeviceInfo pci_dev_info_134d_7891 = { + 0x7891, pci_device_134d_7891, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5600, + pci_ss_list_134d_7891, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5605 = { - 0x5605, pci_device_14e4_5605, +static const pciDeviceInfo pci_dev_info_134d_7892 = { + 0x7892, pci_device_134d_7892, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5605, + pci_ss_list_134d_7892, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5615 = { - 0x5615, pci_device_14e4_5615, +static const pciDeviceInfo pci_dev_info_134d_7893 = { + 0x7893, pci_device_134d_7893, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5615, + pci_ss_list_134d_7893, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5625 = { - 0x5625, pci_device_14e4_5625, +static const pciDeviceInfo pci_dev_info_134d_7894 = { + 0x7894, pci_device_134d_7894, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5625, + pci_ss_list_134d_7894, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5645 = { - 0x5645, pci_device_14e4_5645, +static const pciDeviceInfo pci_dev_info_134d_7895 = { + 0x7895, pci_device_134d_7895, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5645, + pci_ss_list_134d_7895, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5670 = { - 0x5670, pci_device_14e4_5670, +static const pciDeviceInfo pci_dev_info_134d_7896 = { + 0x7896, pci_device_134d_7896, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5670, + pci_ss_list_134d_7896, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5680 = { - 0x5680, pci_device_14e4_5680, +static const pciDeviceInfo pci_dev_info_134d_7897 = { + 0x7897, pci_device_134d_7897, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5680, + pci_ss_list_134d_7897, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5690 = { - 0x5690, pci_device_14e4_5690, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1353_0002 = { + 0x0002, pci_device_1353_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5690, + pci_ss_list_1353_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5691 = { - 0x5691, pci_device_14e4_5691, +static const pciDeviceInfo pci_dev_info_1353_0003 = { + 0x0003, pci_device_1353_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5691, + pci_ss_list_1353_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5820 = { - 0x5820, pci_device_14e4_5820, +static const pciDeviceInfo pci_dev_info_1353_0004 = { + 0x0004, pci_device_1353_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5820, + pci_ss_list_1353_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5821 = { - 0x5821, pci_device_14e4_5821, +static const pciDeviceInfo pci_dev_info_1353_0005 = { + 0x0005, pci_device_1353_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5821, + pci_ss_list_1353_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5822 = { - 0x5822, pci_device_14e4_5822, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_135c_0010 = { + 0x0010, pci_device_135c_0010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5822, + pci_ss_list_135c_0010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5823 = { - 0x5823, pci_device_14e4_5823, +static const pciDeviceInfo pci_dev_info_135c_0020 = { + 0x0020, pci_device_135c_0020, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5823, + pci_ss_list_135c_0020, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5824 = { - 0x5824, pci_device_14e4_5824, +static const pciDeviceInfo pci_dev_info_135c_0030 = { + 0x0030, pci_device_135c_0030, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5824, + pci_ss_list_135c_0030, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5840 = { - 0x5840, pci_device_14e4_5840, +static const pciDeviceInfo pci_dev_info_135c_0040 = { + 0x0040, pci_device_135c_0040, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5840, + pci_ss_list_135c_0040, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5841 = { - 0x5841, pci_device_14e4_5841, +static const pciDeviceInfo pci_dev_info_135c_0050 = { + 0x0050, pci_device_135c_0050, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5841, + pci_ss_list_135c_0050, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14e4_5850 = { - 0x5850, pci_device_14e4_5850, +static const pciDeviceInfo pci_dev_info_135c_0060 = { + 0x0060, pci_device_135c_0060, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14e4_5850, + pci_ss_list_135c_0060, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14ea_ab06 = { - 0xab06, pci_device_14ea_ab06, +static const pciDeviceInfo pci_dev_info_135c_00f0 = { + 0x00f0, pci_device_135c_00f0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14ea_ab06, + pci_ss_list_135c_00f0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14ea_ab07 = { - 0xab07, pci_device_14ea_ab07, +static const pciDeviceInfo pci_dev_info_135c_0170 = { + 0x0170, pci_device_135c_0170, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14ea_ab07, + pci_ss_list_135c_0170, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14f1_1002 = { - 0x1002, pci_device_14f1_1002, +static const pciDeviceInfo pci_dev_info_135c_0180 = { + 0x0180, pci_device_135c_0180, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1002, + pci_ss_list_135c_0180, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1003 = { - 0x1003, pci_device_14f1_1003, +static const pciDeviceInfo pci_dev_info_135c_0190 = { + 0x0190, pci_device_135c_0190, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1003, + pci_ss_list_135c_0190, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1004 = { - 0x1004, pci_device_14f1_1004, +static const pciDeviceInfo pci_dev_info_135c_01a0 = { + 0x01a0, pci_device_135c_01a0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1004, + pci_ss_list_135c_01a0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1005 = { - 0x1005, pci_device_14f1_1005, +static const pciDeviceInfo pci_dev_info_135c_01b0 = { + 0x01b0, pci_device_135c_01b0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1005, + pci_ss_list_135c_01b0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1006 = { - 0x1006, pci_device_14f1_1006, +static const pciDeviceInfo pci_dev_info_135c_01c0 = { + 0x01c0, pci_device_135c_01c0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1006, + pci_ss_list_135c_01c0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1022 = { - 0x1022, pci_device_14f1_1022, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_135e_5101 = { + 0x5101, pci_device_135e_5101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1022, + pci_ss_list_135e_5101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1023 = { - 0x1023, pci_device_14f1_1023, +static const pciDeviceInfo pci_dev_info_135e_7101 = { + 0x7101, pci_device_135e_7101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1023, + pci_ss_list_135e_7101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1024 = { - 0x1024, pci_device_14f1_1024, +static const pciDeviceInfo pci_dev_info_135e_7201 = { + 0x7201, pci_device_135e_7201, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1024, + pci_ss_list_135e_7201, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1025 = { - 0x1025, pci_device_14f1_1025, +static const pciDeviceInfo pci_dev_info_135e_7202 = { + 0x7202, pci_device_135e_7202, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1025, + pci_ss_list_135e_7202, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1026 = { - 0x1026, pci_device_14f1_1026, +static const pciDeviceInfo pci_dev_info_135e_7401 = { + 0x7401, pci_device_135e_7401, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1026, + pci_ss_list_135e_7401, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1032 = { - 0x1032, pci_device_14f1_1032, +static const pciDeviceInfo pci_dev_info_135e_7402 = { + 0x7402, pci_device_135e_7402, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1032, + pci_ss_list_135e_7402, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1033 = { - 0x1033, pci_device_14f1_1033, +static const pciDeviceInfo pci_dev_info_135e_7801 = { + 0x7801, pci_device_135e_7801, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1033, + pci_ss_list_135e_7801, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1034 = { - 0x1034, pci_device_14f1_1034, +static const pciDeviceInfo pci_dev_info_135e_8001 = { + 0x8001, pci_device_135e_8001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1034, + pci_ss_list_135e_8001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1035 = { - 0x1035, pci_device_14f1_1035, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1360_0101 = { + 0x0101, pci_device_1360_0101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1035, + pci_ss_list_1360_0101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1036 = { - 0x1036, pci_device_14f1_1036, +static const pciDeviceInfo pci_dev_info_1360_0102 = { + 0x0102, pci_device_1360_0102, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1036, + pci_ss_list_1360_0102, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1052 = { - 0x1052, pci_device_14f1_1052, +static const pciDeviceInfo pci_dev_info_1360_0103 = { + 0x0103, pci_device_1360_0103, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1052, + pci_ss_list_1360_0103, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1053 = { - 0x1053, pci_device_14f1_1053, +static const pciDeviceInfo pci_dev_info_1360_0201 = { + 0x0201, pci_device_1360_0201, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1053, + pci_ss_list_1360_0201, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1054 = { - 0x1054, pci_device_14f1_1054, +static const pciDeviceInfo pci_dev_info_1360_0202 = { + 0x0202, pci_device_1360_0202, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1054, + pci_ss_list_1360_0202, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1055 = { - 0x1055, pci_device_14f1_1055, +static const pciDeviceInfo pci_dev_info_1360_0203 = { + 0x0203, pci_device_1360_0203, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1055, + pci_ss_list_1360_0203, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1056 = { - 0x1056, pci_device_14f1_1056, +static const pciDeviceInfo pci_dev_info_1360_0301 = { + 0x0301, pci_device_1360_0301, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1056, + pci_ss_list_1360_0301, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1057 = { - 0x1057, pci_device_14f1_1057, +static const pciDeviceInfo pci_dev_info_1360_0302 = { + 0x0302, pci_device_1360_0302, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1057, + pci_ss_list_1360_0302, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1059 = { - 0x1059, pci_device_14f1_1059, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_136b_ff01 = { + 0xff01, pci_device_136b_ff01, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1059, + pci_ss_list_136b_ff01, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1063 = { - 0x1063, pci_device_14f1_1063, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1371_434e = { + 0x434e, pci_device_1371_434e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1063, + pci_ss_list_1371_434e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1064 = { - 0x1064, pci_device_14f1_1064, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1374_0024 = { + 0x0024, pci_device_1374_0024, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1064, + pci_ss_list_1374_0024, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1065 = { - 0x1065, pci_device_14f1_1065, +static const pciDeviceInfo pci_dev_info_1374_0025 = { + 0x0025, pci_device_1374_0025, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1065, + pci_ss_list_1374_0025, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1066 = { - 0x1066, pci_device_14f1_1066, +static const pciDeviceInfo pci_dev_info_1374_0026 = { + 0x0026, pci_device_1374_0026, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1066, + pci_ss_list_1374_0026, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1433 = { - 0x1433, pci_device_14f1_1433, +static const pciDeviceInfo pci_dev_info_1374_0027 = { + 0x0027, pci_device_1374_0027, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1433, + pci_ss_list_1374_0027, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1434 = { - 0x1434, pci_device_14f1_1434, +static const pciDeviceInfo pci_dev_info_1374_0029 = { + 0x0029, pci_device_1374_0029, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1434, + pci_ss_list_1374_0029, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1435 = { - 0x1435, pci_device_14f1_1435, +static const pciDeviceInfo pci_dev_info_1374_002a = { + 0x002a, pci_device_1374_002a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1435, + pci_ss_list_1374_002a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1436 = { - 0x1436, pci_device_14f1_1436, +static const pciDeviceInfo pci_dev_info_1374_002b = { + 0x002b, pci_device_1374_002b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1436, + pci_ss_list_1374_002b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1453 = { - 0x1453, pci_device_14f1_1453, +static const pciDeviceInfo pci_dev_info_1374_002c = { + 0x002c, pci_device_1374_002c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1453, + pci_ss_list_1374_002c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1454 = { - 0x1454, pci_device_14f1_1454, +static const pciDeviceInfo pci_dev_info_1374_002d = { + 0x002d, pci_device_1374_002d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1454, + pci_ss_list_1374_002d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1455 = { - 0x1455, pci_device_14f1_1455, +static const pciDeviceInfo pci_dev_info_1374_002e = { + 0x002e, pci_device_1374_002e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1455, + pci_ss_list_1374_002e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1456 = { - 0x1456, pci_device_14f1_1456, +static const pciDeviceInfo pci_dev_info_1374_002f = { + 0x002f, pci_device_1374_002f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1456, + pci_ss_list_1374_002f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1610 = { - 0x1610, pci_device_14f1_1610, +static const pciDeviceInfo pci_dev_info_1374_0030 = { + 0x0030, pci_device_1374_0030, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1610, + pci_ss_list_1374_0030, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1611 = { - 0x1611, pci_device_14f1_1611, +static const pciDeviceInfo pci_dev_info_1374_0031 = { + 0x0031, pci_device_1374_0031, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1611, + pci_ss_list_1374_0031, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1620 = { - 0x1620, pci_device_14f1_1620, +static const pciDeviceInfo pci_dev_info_1374_0032 = { + 0x0032, pci_device_1374_0032, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1620, + pci_ss_list_1374_0032, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1621 = { - 0x1621, pci_device_14f1_1621, +static const pciDeviceInfo pci_dev_info_1374_0034 = { + 0x0034, pci_device_1374_0034, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1621, + pci_ss_list_1374_0034, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1622 = { - 0x1622, pci_device_14f1_1622, +static const pciDeviceInfo pci_dev_info_1374_0035 = { + 0x0035, pci_device_1374_0035, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1622, + pci_ss_list_1374_0035, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1803 = { - 0x1803, pci_device_14f1_1803, +static const pciDeviceInfo pci_dev_info_1374_0036 = { + 0x0036, pci_device_1374_0036, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1803, + pci_ss_list_1374_0036, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_1815 = { - 0x1815, pci_device_14f1_1815, +static const pciDeviceInfo pci_dev_info_1374_0037 = { + 0x0037, pci_device_1374_0037, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_1815, + pci_ss_list_1374_0037, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2003 = { - 0x2003, pci_device_14f1_2003, +static const pciDeviceInfo pci_dev_info_1374_0038 = { + 0x0038, pci_device_1374_0038, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2003, + pci_ss_list_1374_0038, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2004 = { - 0x2004, pci_device_14f1_2004, +static const pciDeviceInfo pci_dev_info_1374_0039 = { + 0x0039, pci_device_1374_0039, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2004, + pci_ss_list_1374_0039, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2005 = { - 0x2005, pci_device_14f1_2005, +static const pciDeviceInfo pci_dev_info_1374_003a = { + 0x003a, pci_device_1374_003a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2005, + pci_ss_list_1374_003a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2006 = { - 0x2006, pci_device_14f1_2006, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_137a_0001 = { + 0x0001, pci_device_137a_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2006, + pci_ss_list_137a_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2013 = { - 0x2013, pci_device_14f1_2013, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1382_0001 = { + 0x0001, pci_device_1382_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2013, + pci_ss_list_1382_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2014 = { - 0x2014, pci_device_14f1_2014, +static const pciDeviceInfo pci_dev_info_1382_2008 = { + 0x2008, pci_device_1382_2008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2014, + pci_ss_list_1382_2008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2015 = { - 0x2015, pci_device_14f1_2015, +static const pciDeviceInfo pci_dev_info_1382_2088 = { + 0x2088, pci_device_1382_2088, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2015, + pci_ss_list_1382_2088, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2016 = { - 0x2016, pci_device_14f1_2016, +static const pciDeviceInfo pci_dev_info_1382_20c8 = { + 0x20c8, pci_device_1382_20c8, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2016, + pci_ss_list_1382_20c8, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2043 = { - 0x2043, pci_device_14f1_2043, +static const pciDeviceInfo pci_dev_info_1382_4008 = { + 0x4008, pci_device_1382_4008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2043, + pci_ss_list_1382_4008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2044 = { - 0x2044, pci_device_14f1_2044, +static const pciDeviceInfo pci_dev_info_1382_4010 = { + 0x4010, pci_device_1382_4010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2044, + pci_ss_list_1382_4010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2045 = { - 0x2045, pci_device_14f1_2045, +static const pciDeviceInfo pci_dev_info_1382_4048 = { + 0x4048, pci_device_1382_4048, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2045, + pci_ss_list_1382_4048, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2046 = { - 0x2046, pci_device_14f1_2046, +static const pciDeviceInfo pci_dev_info_1382_4088 = { + 0x4088, pci_device_1382_4088, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2046, + pci_ss_list_1382_4088, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2063 = { - 0x2063, pci_device_14f1_2063, +static const pciDeviceInfo pci_dev_info_1382_4248 = { + 0x4248, pci_device_1382_4248, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2063, + pci_ss_list_1382_4248, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2064 = { - 0x2064, pci_device_14f1_2064, +static const pciDeviceInfo pci_dev_info_1382_4424 = { + 0x4424, pci_device_1382_4424, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2064, + pci_ss_list_1382_4424, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2065 = { - 0x2065, pci_device_14f1_2065, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1385_0013 = { + 0x0013, pci_device_1385_0013, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2065, + pci_ss_list_1385_0013, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2066 = { - 0x2066, pci_device_14f1_2066, +static const pciDeviceInfo pci_dev_info_1385_311a = { + 0x311a, pci_device_1385_311a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2066, + pci_ss_list_1385_311a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2093 = { - 0x2093, pci_device_14f1_2093, +static const pciDeviceInfo pci_dev_info_1385_4100 = { + 0x4100, pci_device_1385_4100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2093, + pci_ss_list_1385_4100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2143 = { - 0x2143, pci_device_14f1_2143, +static const pciDeviceInfo pci_dev_info_1385_4105 = { + 0x4105, pci_device_1385_4105, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2143, + pci_ss_list_1385_4105, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2144 = { - 0x2144, pci_device_14f1_2144, +static const pciDeviceInfo pci_dev_info_1385_4400 = { + 0x4400, pci_device_1385_4400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2144, + pci_ss_list_1385_4400, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2145 = { - 0x2145, pci_device_14f1_2145, +static const pciDeviceInfo pci_dev_info_1385_4600 = { + 0x4600, pci_device_1385_4600, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2145, + pci_ss_list_1385_4600, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2146 = { - 0x2146, pci_device_14f1_2146, +static const pciDeviceInfo pci_dev_info_1385_4601 = { + 0x4601, pci_device_1385_4601, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2146, + pci_ss_list_1385_4601, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2163 = { - 0x2163, pci_device_14f1_2163, +static const pciDeviceInfo pci_dev_info_1385_4610 = { + 0x4610, pci_device_1385_4610, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2163, + pci_ss_list_1385_4610, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2164 = { - 0x2164, pci_device_14f1_2164, +static const pciDeviceInfo pci_dev_info_1385_4800 = { + 0x4800, pci_device_1385_4800, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2164, + pci_ss_list_1385_4800, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2165 = { - 0x2165, pci_device_14f1_2165, +static const pciDeviceInfo pci_dev_info_1385_4900 = { + 0x4900, pci_device_1385_4900, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2165, + pci_ss_list_1385_4900, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2166 = { - 0x2166, pci_device_14f1_2166, +static const pciDeviceInfo pci_dev_info_1385_4a00 = { + 0x4a00, pci_device_1385_4a00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2166, + pci_ss_list_1385_4a00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2343 = { - 0x2343, pci_device_14f1_2343, +static const pciDeviceInfo pci_dev_info_1385_4b00 = { + 0x4b00, pci_device_1385_4b00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2343, + pci_ss_list_1385_4b00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2344 = { - 0x2344, pci_device_14f1_2344, +static const pciDeviceInfo pci_dev_info_1385_4c00 = { + 0x4c00, pci_device_1385_4c00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2344, + pci_ss_list_1385_4c00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2345 = { - 0x2345, pci_device_14f1_2345, +static const pciDeviceInfo pci_dev_info_1385_4d00 = { + 0x4d00, pci_device_1385_4d00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2345, + pci_ss_list_1385_4d00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2346 = { - 0x2346, pci_device_14f1_2346, +static const pciDeviceInfo pci_dev_info_1385_4e00 = { + 0x4e00, pci_device_1385_4e00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2346, + pci_ss_list_1385_4e00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2363 = { - 0x2363, pci_device_14f1_2363, +static const pciDeviceInfo pci_dev_info_1385_4f00 = { + 0x4f00, pci_device_1385_4f00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2363, + pci_ss_list_1385_4f00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2364 = { - 0x2364, pci_device_14f1_2364, +static const pciDeviceInfo pci_dev_info_1385_5200 = { + 0x5200, pci_device_1385_5200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2364, + pci_ss_list_1385_5200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2365 = { - 0x2365, pci_device_14f1_2365, +static const pciDeviceInfo pci_dev_info_1385_620a = { + 0x620a, pci_device_1385_620a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2365, + pci_ss_list_1385_620a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2366 = { - 0x2366, pci_device_14f1_2366, +static const pciDeviceInfo pci_dev_info_1385_622a = { + 0x622a, pci_device_1385_622a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2366, + pci_ss_list_1385_622a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2443 = { - 0x2443, pci_device_14f1_2443, +static const pciDeviceInfo pci_dev_info_1385_630a = { + 0x630a, pci_device_1385_630a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2443, + pci_ss_list_1385_630a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2444 = { - 0x2444, pci_device_14f1_2444, +static const pciDeviceInfo pci_dev_info_1385_6b00 = { + 0x6b00, pci_device_1385_6b00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2444, + pci_ss_list_1385_6b00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2445 = { - 0x2445, pci_device_14f1_2445, +static const pciDeviceInfo pci_dev_info_1385_6d00 = { + 0x6d00, pci_device_1385_6d00, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2445, + pci_ss_list_1385_6d00, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2446 = { - 0x2446, pci_device_14f1_2446, +static const pciDeviceInfo pci_dev_info_1385_f004 = { + 0xf004, pci_device_1385_f004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2446, + pci_ss_list_1385_f004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2463 = { - 0x2463, pci_device_14f1_2463, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1389_0001 = { + 0x0001, pci_device_1389_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2463, + pci_ss_list_1389_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2464 = { - 0x2464, pci_device_14f1_2464, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1393_1040 = { + 0x1040, pci_device_1393_1040, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2464, + pci_ss_list_1393_1040, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2465 = { - 0x2465, pci_device_14f1_2465, +static const pciDeviceInfo pci_dev_info_1393_1141 = { + 0x1141, pci_device_1393_1141, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2465, + pci_ss_list_1393_1141, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2466 = { - 0x2466, pci_device_14f1_2466, +static const pciDeviceInfo pci_dev_info_1393_1680 = { + 0x1680, pci_device_1393_1680, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2466, + pci_ss_list_1393_1680, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2f00 = { - 0x2f00, pci_device_14f1_2f00, +static const pciDeviceInfo pci_dev_info_1393_2040 = { + 0x2040, pci_device_1393_2040, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2f00, + pci_ss_list_1393_2040, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2f02 = { - 0x2f02, pci_device_14f1_2f02, +static const pciDeviceInfo pci_dev_info_1393_2180 = { + 0x2180, pci_device_1393_2180, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2f02, + pci_ss_list_1393_2180, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_2f11 = { - 0x2f11, pci_device_14f1_2f11, +static const pciDeviceInfo pci_dev_info_1393_3200 = { + 0x3200, pci_device_1393_3200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_2f11, + pci_ss_list_1393_3200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_8234 = { - 0x8234, pci_device_14f1_8234, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1394_0001 = { + 0x0001, pci_device_1394_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_8234, + pci_ss_list_1394_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f1_8800 = { - 0x8800, pci_device_14f1_8800, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1397_08b4 = { + 0x08b4, pci_device_1397_08b4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f1_8800, + pci_ss_list_1397_08b4, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14f2_0120 = { - 0x0120, pci_device_14f2_0120, +static const pciDeviceInfo pci_dev_info_1397_16b8 = { + 0x16b8, pci_device_1397_16b8, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f2_0120, + pci_ss_list_1397_16b8, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f2_0121 = { - 0x0121, pci_device_14f2_0121, +static const pciDeviceInfo pci_dev_info_1397_2bd0 = { + 0x2bd0, pci_device_1397_2bd0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f2_0121, + pci_ss_list_1397_2bd0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f2_0122 = { - 0x0122, pci_device_14f2_0122, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_139a_0001 = { + 0x0001, pci_device_139a_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f2_0122, + pci_ss_list_139a_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f2_0123 = { - 0x0123, pci_device_14f2_0123, +static const pciDeviceInfo pci_dev_info_139a_0003 = { + 0x0003, pci_device_139a_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f2_0123, + pci_ss_list_139a_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f2_0124 = { - 0x0124, pci_device_14f2_0124, +static const pciDeviceInfo pci_dev_info_139a_0005 = { + 0x0005, pci_device_139a_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f2_0124, + pci_ss_list_139a_0005, #else NULL, #endif @@ -80100,211 +93362,205 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14f3_2030 = { - 0x2030, pci_device_14f3_2030, +static const pciDeviceInfo pci_dev_info_13a3_0005 = { + 0x0005, pci_device_13a3_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f3_2030, + pci_ss_list_13a3_0005, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f3_2050 = { - 0x2050, pci_device_14f3_2050, +static const pciDeviceInfo pci_dev_info_13a3_0006 = { + 0x0006, pci_device_13a3_0006, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f3_2050, + pci_ss_list_13a3_0006, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14f3_2060 = { - 0x2060, pci_device_14f3_2060, +static const pciDeviceInfo pci_dev_info_13a3_0007 = { + 0x0007, pci_device_13a3_0007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f3_2060, + pci_ss_list_13a3_0007, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14f8_2077 = { - 0x2077, pci_device_14f8_2077, +static const pciDeviceInfo pci_dev_info_13a3_0012 = { + 0x0012, pci_device_13a3_0012, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14f8_2077, + pci_ss_list_13a3_0012, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_14fc_0000 = { - 0x0000, pci_device_14fc_0000, +static const pciDeviceInfo pci_dev_info_13a3_0014 = { + 0x0014, pci_device_13a3_0014, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14fc_0000, + pci_ss_list_13a3_0014, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_14fc_0001 = { - 0x0001, pci_device_14fc_0001, +static const pciDeviceInfo pci_dev_info_13a3_0016 = { + 0x0016, pci_device_13a3_0016, #ifdef INIT_SUBSYS_INFO - pci_ss_list_14fc_0001, + pci_ss_list_13a3_0016, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1500_1360 = { - 0x1360, pci_device_1500_1360, +static const pciDeviceInfo pci_dev_info_13a3_0017 = { + 0x0017, pci_device_13a3_0017, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1500_1360, + pci_ss_list_13a3_0017, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1507_0001 = { - 0x0001, pci_device_1507_0001, +static const pciDeviceInfo pci_dev_info_13a3_0018 = { + 0x0018, pci_device_13a3_0018, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1507_0001, + pci_ss_list_13a3_0018, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1507_0002 = { - 0x0002, pci_device_1507_0002, +static const pciDeviceInfo pci_dev_info_13a3_001d = { + 0x001d, pci_device_13a3_001d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1507_0002, + pci_ss_list_13a3_001d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1507_0003 = { - 0x0003, pci_device_1507_0003, +static const pciDeviceInfo pci_dev_info_13a3_0020 = { + 0x0020, pci_device_13a3_0020, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1507_0003, + pci_ss_list_13a3_0020, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1507_0100 = { - 0x0100, pci_device_1507_0100, +static const pciDeviceInfo pci_dev_info_13a3_0026 = { + 0x0026, pci_device_13a3_0026, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1507_0100, + pci_ss_list_13a3_0026, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1507_0431 = { - 0x0431, pci_device_1507_0431, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_13a8_0152 = { + 0x0152, pci_device_13a8_0152, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1507_0431, + pci_ss_list_13a8_0152, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1507_4801 = { - 0x4801, pci_device_1507_4801, +static const pciDeviceInfo pci_dev_info_13a8_0154 = { + 0x0154, pci_device_13a8_0154, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1507_4801, + pci_ss_list_13a8_0154, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1507_4802 = { - 0x4802, pci_device_1507_4802, +static const pciDeviceInfo pci_dev_info_13a8_0158 = { + 0x0158, pci_device_13a8_0158, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1507_4802, + pci_ss_list_13a8_0158, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1507_4803 = { - 0x4803, pci_device_1507_4803, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_13c0_0010 = { + 0x0010, pci_device_13c0_0010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1507_4803, + pci_ss_list_13c0_0010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1507_4806 = { - 0x4806, pci_device_1507_4806, +static const pciDeviceInfo pci_dev_info_13c0_0020 = { + 0x0020, pci_device_13c0_0020, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1507_4806, + pci_ss_list_13c0_0020, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1516_0800 = { - 0x0800, pci_device_1516_0800, +static const pciDeviceInfo pci_dev_info_13c0_0030 = { + 0x0030, pci_device_13c0_0030, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1516_0800, + pci_ss_list_13c0_0030, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1516_0803 = { - 0x0803, pci_device_1516_0803, +static const pciDeviceInfo pci_dev_info_13c0_0210 = { + 0x0210, pci_device_13c0_0210, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1516_0803, + pci_ss_list_13c0_0210, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1516_0891 = { - 0x0891, pci_device_1516_0891, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_13c1_1000 = { + 0x1000, pci_device_13c1_1000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1516_0891, + pci_ss_list_13c1_1000, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_151a_1002 = { - 0x1002, pci_device_151a_1002, +static const pciDeviceInfo pci_dev_info_13c1_1001 = { + 0x1001, pci_device_13c1_1001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_151a_1002, + pci_ss_list_13c1_1001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_151a_1004 = { - 0x1004, pci_device_151a_1004, +static const pciDeviceInfo pci_dev_info_13c1_1002 = { + 0x1002, pci_device_13c1_1002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_151a_1004, + pci_ss_list_13c1_1002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_151a_1008 = { - 0x1008, pci_device_151a_1008, +static const pciDeviceInfo pci_dev_info_13c1_1003 = { + 0x1003, pci_device_13c1_1003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_151a_1008, + pci_ss_list_13c1_1003, #else NULL, #endif @@ -80312,21 +93568,28 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_151f_0000 = { - 0x0000, pci_device_151f_0000, +static const pciDeviceInfo pci_dev_info_13c6_0520 = { + 0x0520, pci_device_13c6_0520, #ifdef INIT_SUBSYS_INFO - pci_ss_list_151f_0000, + pci_ss_list_13c6_0520, #else NULL, #endif 0 }; +static const pciDeviceInfo pci_dev_info_13c6_0620 = { + 0x0620, pci_device_13c6_0620, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_13c6_0620, +#else + NULL, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1522_0100 = { - 0x0100, pci_device_1522_0100, + 0 +}; +static const pciDeviceInfo pci_dev_info_13c6_0820 = { + 0x0820, pci_device_13c6_0820, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1522_0100, + pci_ss_list_13c6_0820, #else NULL, #endif @@ -80334,91 +93597,97 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1524_0510 = { - 0x0510, pci_device_1524_0510, +static const pciDeviceInfo pci_dev_info_13d0_2103 = { + 0x2103, pci_device_13d0_2103, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1524_0510, + pci_ss_list_13d0_2103, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1524_0610 = { - 0x0610, pci_device_1524_0610, +static const pciDeviceInfo pci_dev_info_13d0_2200 = { + 0x2200, pci_device_13d0_2200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1524_0610, + pci_ss_list_13d0_2200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1524_1211 = { - 0x1211, pci_device_1524_1211, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_13d1_ab02 = { + 0xab02, pci_device_13d1_ab02, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1524_1211, + pci_ss_list_13d1_ab02, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1524_1225 = { - 0x1225, pci_device_1524_1225, +static const pciDeviceInfo pci_dev_info_13d1_ab03 = { + 0xab03, pci_device_13d1_ab03, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1524_1225, + pci_ss_list_13d1_ab03, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1524_1410 = { - 0x1410, pci_device_1524_1410, +static const pciDeviceInfo pci_dev_info_13d1_ab06 = { + 0xab06, pci_device_13d1_ab06, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1524_1410, + pci_ss_list_13d1_ab06, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1524_1411 = { - 0x1411, pci_device_1524_1411, +static const pciDeviceInfo pci_dev_info_13d1_ab08 = { + 0xab08, pci_device_13d1_ab08, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1524_1411, + pci_ss_list_13d1_ab08, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1524_1412 = { - 0x1412, pci_device_1524_1412, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_13df_0001 = { + 0x0001, pci_device_13df_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1524_1412, + pci_ss_list_13df_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1524_1420 = { - 0x1420, pci_device_1524_1420, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_13f0_0200 = { + 0x0200, pci_device_13f0_0200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1524_1420, + pci_ss_list_13f0_0200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1524_1421 = { - 0x1421, pci_device_1524_1421, +static const pciDeviceInfo pci_dev_info_13f0_0201 = { + 0x0201, pci_device_13f0_0201, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1524_1421, + pci_ss_list_13f0_0201, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1524_1422 = { - 0x1422, pci_device_1524_1422, +static const pciDeviceInfo pci_dev_info_13f0_1023 = { + 0x1023, pci_device_13f0_1023, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1524_1422, + pci_ss_list_13f0_1023, #else NULL, #endif @@ -80426,10 +93695,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1538_0303 = { - 0x0303, pci_device_1538_0303, +static const pciDeviceInfo pci_dev_info_13f4_1401 = { + 0x1401, pci_device_13f4_1401, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1538_0303, + pci_ss_list_13f4_1401, #else NULL, #endif @@ -80437,48 +93706,46 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_153b_1144 = { - 0x1144, pci_device_153b_1144, +static const pciDeviceInfo pci_dev_info_13f6_0011 = { + 0x0011, pci_device_13f6_0011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_153b_1144, + pci_ss_list_13f6_0011, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_153b_1147 = { - 0x1147, pci_device_153b_1147, +static const pciDeviceInfo pci_dev_info_13f6_0100 = { + 0x0100, pci_device_13f6_0100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_153b_1147, + pci_ss_list_13f6_0100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_153b_1158 = { - 0x1158, pci_device_153b_1158, +static const pciDeviceInfo pci_dev_info_13f6_0101 = { + 0x0101, pci_device_13f6_0101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_153b_1158, + pci_ss_list_13f6_0101, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1543_3052 = { - 0x3052, pci_device_1543_3052, +static const pciDeviceInfo pci_dev_info_13f6_0111 = { + 0x0111, pci_device_13f6_0111, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1543_3052, + pci_ss_list_13f6_0111, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1543_4c22 = { - 0x4c22, pci_device_1543_4c22, +static const pciDeviceInfo pci_dev_info_13f6_0211 = { + 0x0211, pci_device_13f6_0211, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1543_4c22, + pci_ss_list_13f6_0211, #else NULL, #endif @@ -80486,257 +93753,257 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1571_a001 = { - 0xa001, pci_device_1571_a001, +static const pciDeviceInfo pci_dev_info_13fe_1240 = { + 0x1240, pci_device_13fe_1240, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a001, + pci_ss_list_13fe_1240, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a002 = { - 0xa002, pci_device_1571_a002, +static const pciDeviceInfo pci_dev_info_13fe_1600 = { + 0x1600, pci_device_13fe_1600, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a002, + pci_ss_list_13fe_1600, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a003 = { - 0xa003, pci_device_1571_a003, +static const pciDeviceInfo pci_dev_info_13fe_1733 = { + 0x1733, pci_device_13fe_1733, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a003, + pci_ss_list_13fe_1733, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a004 = { - 0xa004, pci_device_1571_a004, +static const pciDeviceInfo pci_dev_info_13fe_1752 = { + 0x1752, pci_device_13fe_1752, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a004, + pci_ss_list_13fe_1752, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a005 = { - 0xa005, pci_device_1571_a005, +static const pciDeviceInfo pci_dev_info_13fe_1754 = { + 0x1754, pci_device_13fe_1754, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a005, + pci_ss_list_13fe_1754, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a006 = { - 0xa006, pci_device_1571_a006, +static const pciDeviceInfo pci_dev_info_13fe_1756 = { + 0x1756, pci_device_13fe_1756, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a006, + pci_ss_list_13fe_1756, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a007 = { - 0xa007, pci_device_1571_a007, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1400_1401 = { + 0x1401, pci_device_1400_1401, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a007, + pci_ss_list_1400_1401, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a008 = { - 0xa008, pci_device_1571_a008, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1407_0100 = { + 0x0100, pci_device_1407_0100, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a008, + pci_ss_list_1407_0100, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a009 = { - 0xa009, pci_device_1571_a009, +static const pciDeviceInfo pci_dev_info_1407_0101 = { + 0x0101, pci_device_1407_0101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a009, + pci_ss_list_1407_0101, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a00a = { - 0xa00a, pci_device_1571_a00a, +static const pciDeviceInfo pci_dev_info_1407_0102 = { + 0x0102, pci_device_1407_0102, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a00a, + pci_ss_list_1407_0102, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a00b = { - 0xa00b, pci_device_1571_a00b, +static const pciDeviceInfo pci_dev_info_1407_0110 = { + 0x0110, pci_device_1407_0110, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a00b, + pci_ss_list_1407_0110, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a00c = { - 0xa00c, pci_device_1571_a00c, +static const pciDeviceInfo pci_dev_info_1407_0111 = { + 0x0111, pci_device_1407_0111, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a00c, + pci_ss_list_1407_0111, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a00d = { - 0xa00d, pci_device_1571_a00d, +static const pciDeviceInfo pci_dev_info_1407_0120 = { + 0x0120, pci_device_1407_0120, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a00d, + pci_ss_list_1407_0120, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a201 = { - 0xa201, pci_device_1571_a201, +static const pciDeviceInfo pci_dev_info_1407_0121 = { + 0x0121, pci_device_1407_0121, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a201, + pci_ss_list_1407_0121, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a202 = { - 0xa202, pci_device_1571_a202, +static const pciDeviceInfo pci_dev_info_1407_0180 = { + 0x0180, pci_device_1407_0180, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a202, + pci_ss_list_1407_0180, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a203 = { - 0xa203, pci_device_1571_a203, +static const pciDeviceInfo pci_dev_info_1407_0181 = { + 0x0181, pci_device_1407_0181, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a203, + pci_ss_list_1407_0181, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a204 = { - 0xa204, pci_device_1571_a204, +static const pciDeviceInfo pci_dev_info_1407_0200 = { + 0x0200, pci_device_1407_0200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a204, + pci_ss_list_1407_0200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a205 = { - 0xa205, pci_device_1571_a205, +static const pciDeviceInfo pci_dev_info_1407_0201 = { + 0x0201, pci_device_1407_0201, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a205, + pci_ss_list_1407_0201, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1571_a206 = { - 0xa206, pci_device_1571_a206, +static const pciDeviceInfo pci_dev_info_1407_0202 = { + 0x0202, pci_device_1407_0202, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1571_a206, + pci_ss_list_1407_0202, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_157c_8001 = { - 0x8001, pci_device_157c_8001, +static const pciDeviceInfo pci_dev_info_1407_0220 = { + 0x0220, pci_device_1407_0220, #ifdef INIT_SUBSYS_INFO - pci_ss_list_157c_8001, + pci_ss_list_1407_0220, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1592_0781 = { - 0x0781, pci_device_1592_0781, +static const pciDeviceInfo pci_dev_info_1407_0221 = { + 0x0221, pci_device_1407_0221, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1592_0781, + pci_ss_list_1407_0221, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1592_0782 = { - 0x0782, pci_device_1592_0782, +static const pciDeviceInfo pci_dev_info_1407_0500 = { + 0x0500, pci_device_1407_0500, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1592_0782, + pci_ss_list_1407_0500, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1592_0783 = { - 0x0783, pci_device_1592_0783, +static const pciDeviceInfo pci_dev_info_1407_0600 = { + 0x0600, pci_device_1407_0600, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1592_0783, + pci_ss_list_1407_0600, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1592_0785 = { - 0x0785, pci_device_1592_0785, +static const pciDeviceInfo pci_dev_info_1407_8000 = { + 0x8000, pci_device_1407_8000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1592_0785, + pci_ss_list_1407_8000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1592_0786 = { - 0x0786, pci_device_1592_0786, +static const pciDeviceInfo pci_dev_info_1407_8001 = { + 0x8001, pci_device_1407_8001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1592_0786, + pci_ss_list_1407_8001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1592_0787 = { - 0x0787, pci_device_1592_0787, +static const pciDeviceInfo pci_dev_info_1407_8002 = { + 0x8002, pci_device_1407_8002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1592_0787, + pci_ss_list_1407_8002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1592_0788 = { - 0x0788, pci_device_1592_0788, +static const pciDeviceInfo pci_dev_info_1407_8003 = { + 0x8003, pci_device_1407_8003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1592_0788, + pci_ss_list_1407_8003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1592_078a = { - 0x078a, pci_device_1592_078a, +static const pciDeviceInfo pci_dev_info_1407_8800 = { + 0x8800, pci_device_1407_8800, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1592_078a, + pci_ss_list_1407_8800, #else NULL, #endif @@ -80744,120 +94011,124 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_15a2_0001 = { - 0x0001, pci_device_15a2_0001, +static const pciDeviceInfo pci_dev_info_1409_7168 = { + 0x7168, pci_device_1409_7168, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15a2_0001, + pci_ss_list_1409_7168, #else NULL, #endif 0 }; #endif -static const pciDeviceInfo pci_dev_info_15ad_0405 = { - 0x0405, pci_device_15ad_0405, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1412_1712 = { + 0x1712, pci_device_1412_1712, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15ad_0405, + pci_ss_list_1412_1712, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15ad_0710 = { - 0x0710, pci_device_15ad_0710, +static const pciDeviceInfo pci_dev_info_1412_1724 = { + 0x1724, pci_device_1412_1724, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15ad_0710, + pci_ss_list_1412_1724, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15ad_0720 = { - 0x0720, pci_device_15ad_0720, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1415_8403 = { + 0x8403, pci_device_1415_8403, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15ad_0720, + pci_ss_list_1415_8403, #else NULL, #endif 0 }; -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_15b3_5274 = { - 0x5274, pci_device_15b3_5274, +static const pciDeviceInfo pci_dev_info_1415_9501 = { + 0x9501, pci_device_1415_9501, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15b3_5274, + pci_ss_list_1415_9501, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15b3_5a44 = { - 0x5a44, pci_device_15b3_5a44, +static const pciDeviceInfo pci_dev_info_1415_950a = { + 0x950a, pci_device_1415_950a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15b3_5a44, + pci_ss_list_1415_950a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15b3_5a45 = { - 0x5a45, pci_device_15b3_5a45, +static const pciDeviceInfo pci_dev_info_1415_950b = { + 0x950b, pci_device_1415_950b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15b3_5a45, + pci_ss_list_1415_950b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15b3_5a46 = { - 0x5a46, pci_device_15b3_5a46, +static const pciDeviceInfo pci_dev_info_1415_9510 = { + 0x9510, pci_device_1415_9510, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15b3_5a46, + pci_ss_list_1415_9510, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15b3_5e8c = { - 0x5e8c, pci_device_15b3_5e8c, +static const pciDeviceInfo pci_dev_info_1415_9511 = { + 0x9511, pci_device_1415_9511, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15b3_5e8c, + pci_ss_list_1415_9511, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15b3_5e8d = { - 0x5e8d, pci_device_15b3_5e8d, +static const pciDeviceInfo pci_dev_info_1415_9521 = { + 0x9521, pci_device_1415_9521, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15b3_5e8d, + pci_ss_list_1415_9521, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15b3_6278 = { - 0x6278, pci_device_15b3_6278, +static const pciDeviceInfo pci_dev_info_1415_9523 = { + 0x9523, pci_device_1415_9523, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15b3_6278, + pci_ss_list_1415_9523, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15b3_6279 = { - 0x6279, pci_device_15b3_6279, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1420_8002 = { + 0x8002, pci_device_1420_8002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15b3_6279, + pci_ss_list_1420_8002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15b3_6282 = { - 0x6282, pci_device_15b3_6282, +static const pciDeviceInfo pci_dev_info_1420_8003 = { + 0x8003, pci_device_1420_8003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15b3_6282, + pci_ss_list_1420_8003, #else NULL, #endif @@ -80865,28 +94136,30 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_15bc_2922 = { - 0x2922, pci_device_15bc_2922, +static const pciDeviceInfo pci_dev_info_1425_000b = { + 0x000b, pci_device_1425_000b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15bc_2922, + pci_ss_list_1425_000b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15bc_2928 = { - 0x2928, pci_device_15bc_2928, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_142e_4020 = { + 0x4020, pci_device_142e_4020, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15bc_2928, + pci_ss_list_142e_4020, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15bc_2929 = { - 0x2929, pci_device_15bc_2929, +static const pciDeviceInfo pci_dev_info_142e_4337 = { + 0x4337, pci_device_142e_4337, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15bc_2929, + pci_ss_list_142e_4337, #else NULL, #endif @@ -80894,10 +94167,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_15c5_8010 = { - 0x8010, pci_device_15c5_8010, +static const pciDeviceInfo pci_dev_info_1432_9130 = { + 0x9130, pci_device_1432_9130, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15c5_8010, + pci_ss_list_1432_9130, #else NULL, #endif @@ -80905,114 +94178,100 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_15c7_0349 = { - 0x0349, pci_device_15c7_0349, +static const pciDeviceInfo pci_dev_info_144a_7296 = { + 0x7296, pci_device_144a_7296, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15c7_0349, + pci_ss_list_144a_7296, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_15dc_0001 = { - 0x0001, pci_device_15dc_0001, +static const pciDeviceInfo pci_dev_info_144a_7432 = { + 0x7432, pci_device_144a_7432, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15dc_0001, + pci_ss_list_144a_7432, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_15e8_0130 = { - 0x0130, pci_device_15e8_0130, +static const pciDeviceInfo pci_dev_info_144a_7433 = { + 0x7433, pci_device_144a_7433, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15e8_0130, + pci_ss_list_144a_7433, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_15e9_1841 = { - 0x1841, pci_device_15e9_1841, +static const pciDeviceInfo pci_dev_info_144a_7434 = { + 0x7434, pci_device_144a_7434, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15e9_1841, + pci_ss_list_144a_7434, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_15ec_3101 = { - 0x3101, pci_device_15ec_3101, +static const pciDeviceInfo pci_dev_info_144a_7841 = { + 0x7841, pci_device_144a_7841, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15ec_3101, + pci_ss_list_144a_7841, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_15ec_5102 = { - 0x5102, pci_device_15ec_5102, +static const pciDeviceInfo pci_dev_info_144a_8133 = { + 0x8133, pci_device_144a_8133, #ifdef INIT_SUBSYS_INFO - pci_ss_list_15ec_5102, + pci_ss_list_144a_8133, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1619_0400 = { - 0x0400, pci_device_1619_0400, +static const pciDeviceInfo pci_dev_info_144a_8164 = { + 0x8164, pci_device_144a_8164, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1619_0400, + pci_ss_list_144a_8164, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1619_0440 = { - 0x0440, pci_device_1619_0440, +static const pciDeviceInfo pci_dev_info_144a_8554 = { + 0x8554, pci_device_144a_8554, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1619_0440, + pci_ss_list_144a_8554, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1626_8410 = { - 0x8410, pci_device_1626_8410, +static const pciDeviceInfo pci_dev_info_144a_9111 = { + 0x9111, pci_device_144a_9111, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1626_8410, + pci_ss_list_144a_9111, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1629_1003 = { - 0x1003, pci_device_1629_1003, +static const pciDeviceInfo pci_dev_info_144a_9113 = { + 0x9113, pci_device_144a_9113, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1629_1003, + pci_ss_list_144a_9113, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1629_2002 = { - 0x2002, pci_device_1629_2002, +static const pciDeviceInfo pci_dev_info_144a_9114 = { + 0x9114, pci_device_144a_9114, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1629_2002, + pci_ss_list_144a_9114, #else NULL, #endif @@ -81020,21 +94279,19 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1637_3874 = { - 0x3874, pci_device_1637_3874, +static const pciDeviceInfo pci_dev_info_1458_0c11 = { + 0x0c11, pci_device_1458_0c11, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1637_3874, + pci_ss_list_1458_0c11, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1638_1100 = { - 0x1100, pci_device_1638_1100, +static const pciDeviceInfo pci_dev_info_1458_e911 = { + 0xe911, pci_device_1458_e911, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1638_1100, + pci_ss_list_1458_e911, #else NULL, #endif @@ -81042,19 +94299,21 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_163c_3052 = { - 0x3052, pci_device_163c_3052, +static const pciDeviceInfo pci_dev_info_145f_0001 = { + 0x0001, pci_device_145f_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_163c_3052, + pci_ss_list_145f_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_163c_5449 = { - 0x5449, pci_device_163c_5449, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1461_f436 = { + 0xf436, pci_device_1461_f436, #ifdef INIT_SUBSYS_INFO - pci_ss_list_163c_5449, + pci_ss_list_1461_f436, #else NULL, #endif @@ -81062,79 +94321,82 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_165a_c100 = { - 0xc100, pci_device_165a_c100, +static const pciDeviceInfo pci_dev_info_1462_5501 = { + 0x5501, pci_device_1462_5501, #ifdef INIT_SUBSYS_INFO - pci_ss_list_165a_c100, + pci_ss_list_1462_5501, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_165a_d200 = { - 0xd200, pci_device_165a_d200, +static const pciDeviceInfo pci_dev_info_1462_6819 = { + 0x6819, pci_device_1462_6819, #ifdef INIT_SUBSYS_INFO - pci_ss_list_165a_d200, + pci_ss_list_1462_6819, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_165a_d300 = { - 0xd300, pci_device_165a_d300, +static const pciDeviceInfo pci_dev_info_1462_6825 = { + 0x6825, pci_device_1462_6825, #ifdef INIT_SUBSYS_INFO - pci_ss_list_165a_d300, + pci_ss_list_1462_6825, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1668_0100 = { - 0x0100, pci_device_1668_0100, +static const pciDeviceInfo pci_dev_info_1462_6834 = { + 0x6834, pci_device_1462_6834, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1668_0100, + pci_ss_list_1462_6834, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_166d_0001 = { - 0x0001, pci_device_166d_0001, +static const pciDeviceInfo pci_dev_info_1462_8725 = { + 0x8725, pci_device_1462_8725, #ifdef INIT_SUBSYS_INFO - pci_ss_list_166d_0001, + pci_ss_list_1462_8725, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_166d_0002 = { - 0x0002, pci_device_166d_0002, +static const pciDeviceInfo pci_dev_info_1462_9000 = { + 0x9000, pci_device_1462_9000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_166d_0002, + pci_ss_list_1462_9000, #else NULL, #endif 0 }; +static const pciDeviceInfo pci_dev_info_1462_9110 = { + 0x9110, pci_device_1462_9110, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1462_9110, +#else + NULL, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1677_104e = { - 0x104e, pci_device_1677_104e, + 0 +}; +static const pciDeviceInfo pci_dev_info_1462_9119 = { + 0x9119, pci_device_1462_9119, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1677_104e, + pci_ss_list_1462_9119, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1677_12d7 = { - 0x12d7, pci_device_1677_12d7, +static const pciDeviceInfo pci_dev_info_1462_9591 = { + 0x9591, pci_device_1462_9591, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1677_12d7, + pci_ss_list_1462_9591, #else NULL, #endif @@ -81142,10 +94404,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1681_0010 = { - 0x0010, pci_device_1681_0010, +static const pciDeviceInfo pci_dev_info_146c_1430 = { + 0x1430, pci_device_146c_1430, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1681_0010, + pci_ss_list_146c_1430, #else NULL, #endif @@ -81153,10 +94415,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1688_1170 = { - 0x1170, pci_device_1688_1170, +static const pciDeviceInfo pci_dev_info_148d_1003 = { + 0x1003, pci_device_148d_1003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1688_1170, + pci_ss_list_148d_1003, #else NULL, #endif @@ -81164,46 +94426,48 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_168c_0007 = { - 0x0007, pci_device_168c_0007, +static const pciDeviceInfo pci_dev_info_1497_1497 = { + 0x1497, pci_device_1497_1497, #ifdef INIT_SUBSYS_INFO - pci_ss_list_168c_0007, + pci_ss_list_1497_1497, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_168c_0011 = { - 0x0011, pci_device_168c_0011, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1498_0330 = { + 0x0330, pci_device_1498_0330, #ifdef INIT_SUBSYS_INFO - pci_ss_list_168c_0011, + pci_ss_list_1498_0330, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_168c_0012 = { - 0x0012, pci_device_168c_0012, +static const pciDeviceInfo pci_dev_info_1498_0385 = { + 0x0385, pci_device_1498_0385, #ifdef INIT_SUBSYS_INFO - pci_ss_list_168c_0012, + pci_ss_list_1498_0385, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_168c_0013 = { - 0x0013, pci_device_168c_0013, +static const pciDeviceInfo pci_dev_info_1498_21cd = { + 0x21cd, pci_device_1498_21cd, #ifdef INIT_SUBSYS_INFO - pci_ss_list_168c_0013, + pci_ss_list_1498_21cd, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_168c_1014 = { - 0x1014, pci_device_168c_1014, +static const pciDeviceInfo pci_dev_info_1498_30c8 = { + 0x30c8, pci_device_1498_30c8, #ifdef INIT_SUBSYS_INFO - pci_ss_list_168c_1014, + pci_ss_list_1498_30c8, #else NULL, #endif @@ -81211,28 +94475,32 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_16ab_1100 = { - 0x1100, pci_device_16ab_1100, +static const pciDeviceInfo pci_dev_info_149d_0001 = { + 0x0001, pci_device_149d_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_16ab_1100, + pci_ss_list_149d_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_16ab_1101 = { - 0x1101, pci_device_16ab_1101, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_14af_7102 = { + 0x7102, pci_device_14af_7102, #ifdef INIT_SUBSYS_INFO - pci_ss_list_16ab_1101, + pci_ss_list_14af_7102, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_16ab_1102 = { - 0x1102, pci_device_16ab_1102, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_14b3_0000 = { + 0x0000, pci_device_14b3_0000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_16ab_1102, + pci_ss_list_14b3_0000, #else NULL, #endif @@ -81240,21 +94508,73 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_16ae_1141 = { - 0x1141, pci_device_16ae_1141, +static const pciDeviceInfo pci_dev_info_14b5_0200 = { + 0x0200, pci_device_14b5_0200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_16ae_1141, + pci_ss_list_14b5_0200, #else NULL, #endif 0 }; +static const pciDeviceInfo pci_dev_info_14b5_0300 = { + 0x0300, pci_device_14b5_0300, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14b5_0300, +#else + NULL, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_16ca_0001 = { - 0x0001, pci_device_16ca_0001, + 0 +}; +static const pciDeviceInfo pci_dev_info_14b5_0400 = { + 0x0400, pci_device_14b5_0400, #ifdef INIT_SUBSYS_INFO - pci_ss_list_16ca_0001, + pci_ss_list_14b5_0400, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14b5_0600 = { + 0x0600, pci_device_14b5_0600, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14b5_0600, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14b5_0800 = { + 0x0800, pci_device_14b5_0800, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14b5_0800, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14b5_0900 = { + 0x0900, pci_device_14b5_0900, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14b5_0900, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14b5_0a00 = { + 0x0a00, pci_device_14b5_0a00, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14b5_0a00, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14b5_0b00 = { + 0x0b00, pci_device_14b5_0b00, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14b5_0b00, #else NULL, #endif @@ -81262,10 +94582,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_16e3_1e0f = { - 0x1e0f, pci_device_16e3_1e0f, +static const pciDeviceInfo pci_dev_info_14b7_0001 = { + 0x0001, pci_device_14b7_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_16e3_1e0f, + pci_ss_list_14b7_0001, #else NULL, #endif @@ -81273,19 +94593,73 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_16ec_00ff = { - 0x00ff, pci_device_16ec_00ff, +static const pciDeviceInfo pci_dev_info_14b9_0001 = { + 0x0001, pci_device_14b9_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_16ec_00ff, + pci_ss_list_14b9_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_16ec_3685 = { - 0x3685, pci_device_16ec_3685, +static const pciDeviceInfo pci_dev_info_14b9_0340 = { + 0x0340, pci_device_14b9_0340, #ifdef INIT_SUBSYS_INFO - pci_ss_list_16ec_3685, + pci_ss_list_14b9_0340, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14b9_0350 = { + 0x0350, pci_device_14b9_0350, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14b9_0350, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14b9_4500 = { + 0x4500, pci_device_14b9_4500, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14b9_4500, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14b9_4800 = { + 0x4800, pci_device_14b9_4800, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14b9_4800, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14b9_a504 = { + 0xa504, pci_device_14b9_a504, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14b9_a504, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14b9_a505 = { + 0xa505, pci_device_14b9_a505, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14b9_a505, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14b9_a506 = { + 0xa506, pci_device_14b9_a506, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14b9_a506, #else NULL, #endif @@ -81293,10 +94667,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_16ed_1001 = { - 0x1001, pci_device_16ed_1001, +static const pciDeviceInfo pci_dev_info_14c1_8043 = { + 0x8043, pci_device_14c1_8043, #ifdef INIT_SUBSYS_INFO - pci_ss_list_16ed_1001, + pci_ss_list_14c1_8043, #else NULL, #endif @@ -81304,10 +94678,145 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_16f4_8000 = { - 0x8000, pci_device_16f4_8000, +static const pciDeviceInfo pci_dev_info_14d2_8001 = { + 0x8001, pci_device_14d2_8001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_16f4_8000, + pci_ss_list_14d2_8001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_8002 = { + 0x8002, pci_device_14d2_8002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_8002, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_8010 = { + 0x8010, pci_device_14d2_8010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_8010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_8011 = { + 0x8011, pci_device_14d2_8011, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_8011, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_8020 = { + 0x8020, pci_device_14d2_8020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_8020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_8021 = { + 0x8021, pci_device_14d2_8021, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_8021, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_8040 = { + 0x8040, pci_device_14d2_8040, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_8040, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_8080 = { + 0x8080, pci_device_14d2_8080, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_8080, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_a000 = { + 0xa000, pci_device_14d2_a000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_a000, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_a001 = { + 0xa001, pci_device_14d2_a001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_a001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_a003 = { + 0xa003, pci_device_14d2_a003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_a003, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_a004 = { + 0xa004, pci_device_14d2_a004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_a004, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_a005 = { + 0xa005, pci_device_14d2_a005, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_a005, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_e001 = { + 0xe001, pci_device_14d2_e001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_e001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_e010 = { + 0xe010, pci_device_14d2_e010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_e010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d2_e020 = { + 0xe020, pci_device_14d2_e020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d2_e020, #else NULL, #endif @@ -81315,10 +94824,19 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_170b_0100 = { - 0x0100, pci_device_170b_0100, +static const pciDeviceInfo pci_dev_info_14d9_0010 = { + 0x0010, pci_device_14d9_0010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_170b_0100, + pci_ss_list_14d9_0010, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14d9_9000 = { + 0x9000, pci_device_14d9_9000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14d9_9000, #else NULL, #endif @@ -81326,10 +94844,19 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1725_7174 = { - 0x7174, pci_device_1725_7174, +static const pciDeviceInfo pci_dev_info_14db_2120 = { + 0x2120, pci_device_14db_2120, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1725_7174, + pci_ss_list_14db_2120, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14db_2182 = { + 0x2182, pci_device_14db_2182, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14db_2182, #else NULL, #endif @@ -81337,93 +94864,109 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1737_0013 = { - 0x0013, pci_device_1737_0013, +static const pciDeviceInfo pci_dev_info_14dc_0000 = { + 0x0000, pci_device_14dc_0000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1737_0013, + pci_ss_list_14dc_0000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1737_0015 = { - 0x0015, pci_device_1737_0015, +static const pciDeviceInfo pci_dev_info_14dc_0001 = { + 0x0001, pci_device_14dc_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1737_0015, + pci_ss_list_14dc_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1737_1032 = { - 0x1032, pci_device_1737_1032, +static const pciDeviceInfo pci_dev_info_14dc_0002 = { + 0x0002, pci_device_14dc_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1737_1032, + pci_ss_list_14dc_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1737_1064 = { - 0x1064, pci_device_1737_1064, +static const pciDeviceInfo pci_dev_info_14dc_0003 = { + 0x0003, pci_device_14dc_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1737_1064, + pci_ss_list_14dc_0003, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1737_ab08 = { - 0xab08, pci_device_1737_ab08, +static const pciDeviceInfo pci_dev_info_14dc_0004 = { + 0x0004, pci_device_14dc_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1737_ab08, + pci_ss_list_14dc_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1737_ab09 = { - 0xab09, pci_device_1737_ab09, +static const pciDeviceInfo pci_dev_info_14dc_0005 = { + 0x0005, pci_device_14dc_0005, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1737_ab09, + pci_ss_list_14dc_0005, #else NULL, #endif 0 }; +static const pciDeviceInfo pci_dev_info_14dc_0006 = { + 0x0006, pci_device_14dc_0006, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14dc_0006, +#else + NULL, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_173b_03e8 = { - 0x03e8, pci_device_173b_03e8, + 0 +}; +static const pciDeviceInfo pci_dev_info_14dc_0007 = { + 0x0007, pci_device_14dc_0007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_173b_03e8, + pci_ss_list_14dc_0007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_173b_03e9 = { - 0x03e9, pci_device_173b_03e9, +static const pciDeviceInfo pci_dev_info_14dc_0008 = { + 0x0008, pci_device_14dc_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_173b_03e9, + pci_ss_list_14dc_0008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_173b_03ea = { - 0x03ea, pci_device_173b_03ea, +static const pciDeviceInfo pci_dev_info_14dc_0009 = { + 0x0009, pci_device_14dc_0009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_173b_03ea, + pci_ss_list_14dc_0009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_173b_03eb = { - 0x03eb, pci_device_173b_03eb, +static const pciDeviceInfo pci_dev_info_14dc_000a = { + 0x000a, pci_device_14dc_000a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_173b_03eb, + pci_ss_list_14dc_000a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14dc_000b = { + 0x000b, pci_device_14dc_000b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14dc_000b, #else NULL, #endif @@ -81431,157 +94974,6109 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1743_8139 = { - 0x8139, pci_device_1743_8139, +static const pciDeviceInfo pci_dev_info_14e4_0800 = { + 0x0800, pci_device_14e4_0800, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1743_8139, + pci_ss_list_14e4_0800, #else NULL, #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_0804 = { + 0x0804, pci_device_14e4_0804, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_0804, +#else + NULL, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1796_0001 = { - 0x0001, pci_device_1796_0001, + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_0805 = { + 0x0805, pci_device_14e4_0805, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1796_0001, + pci_ss_list_14e4_0805, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1796_0002 = { - 0x0002, pci_device_1796_0002, +static const pciDeviceInfo pci_dev_info_14e4_0806 = { + 0x0806, pci_device_14e4_0806, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1796_0002, + pci_ss_list_14e4_0806, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1796_0003 = { - 0x0003, pci_device_1796_0003, +static const pciDeviceInfo pci_dev_info_14e4_080b = { + 0x080b, pci_device_14e4_080b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1796_0003, + pci_ss_list_14e4_080b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1796_0004 = { - 0x0004, pci_device_1796_0004, +static const pciDeviceInfo pci_dev_info_14e4_080f = { + 0x080f, pci_device_14e4_080f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1796_0004, + pci_ss_list_14e4_080f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1796_0005 = { - 0x0005, pci_device_1796_0005, +static const pciDeviceInfo pci_dev_info_14e4_0811 = { + 0x0811, pci_device_14e4_0811, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1796_0005, + pci_ss_list_14e4_0811, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1796_0006 = { - 0x0006, pci_device_1796_0006, +static const pciDeviceInfo pci_dev_info_14e4_0816 = { + 0x0816, pci_device_14e4_0816, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1796_0006, + pci_ss_list_14e4_0816, #else NULL, #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_1600 = { + 0x1600, pci_device_14e4_1600, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1600, +#else + NULL, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1799_6001 = { - 0x6001, pci_device_1799_6001, + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_1601 = { + 0x1601, pci_device_14e4_1601, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1799_6001, + pci_ss_list_14e4_1601, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1799_6020 = { - 0x6020, pci_device_1799_6020, +static const pciDeviceInfo pci_dev_info_14e4_1644 = { + 0x1644, pci_device_14e4_1644, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1799_6020, + pci_ss_list_14e4_1644, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1799_6060 = { - 0x6060, pci_device_1799_6060, +static const pciDeviceInfo pci_dev_info_14e4_1645 = { + 0x1645, pci_device_14e4_1645, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1799_6060, + pci_ss_list_14e4_1645, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1799_7000 = { - 0x7000, pci_device_1799_7000, +static const pciDeviceInfo pci_dev_info_14e4_1646 = { + 0x1646, pci_device_14e4_1646, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1799_7000, + pci_ss_list_14e4_1646, #else NULL, #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_1647 = { + 0x1647, pci_device_14e4_1647, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1647, +#else + NULL, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_17a0_8033 = { - 0x8033, pci_device_17a0_8033, + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_1648 = { + 0x1648, pci_device_14e4_1648, #ifdef INIT_SUBSYS_INFO - pci_ss_list_17a0_8033, + pci_ss_list_14e4_1648, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_17a0_8034 = { - 0x8034, pci_device_17a0_8034, +static const pciDeviceInfo pci_dev_info_14e4_164a = { + 0x164a, pci_device_14e4_164a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_17a0_8034, + pci_ss_list_14e4_164a, #else NULL, #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_164c = { + 0x164c, pci_device_14e4_164c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_164c, +#else + NULL, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_17b3_ab08 = { - 0xab08, pci_device_17b3_ab08, + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_164d = { + 0x164d, pci_device_14e4_164d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_17b3_ab08, + pci_ss_list_14e4_164d, #else NULL, #endif 0 }; +static const pciDeviceInfo pci_dev_info_14e4_1653 = { + 0x1653, pci_device_14e4_1653, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1653, +#else + NULL, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_17b4_0011 = { - 0x0011, pci_device_17b4_0011, + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_1654 = { + 0x1654, pci_device_14e4_1654, #ifdef INIT_SUBSYS_INFO - pci_ss_list_17b4_0011, + pci_ss_list_14e4_1654, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_1659 = { + 0x1659, pci_device_14e4_1659, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1659, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_165d = { + 0x165d, pci_device_14e4_165d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_165d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_165e = { + 0x165e, pci_device_14e4_165e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_165e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_1668 = { + 0x1668, pci_device_14e4_1668, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1668, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_166a = { + 0x166a, pci_device_14e4_166a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_166a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_166b = { + 0x166b, pci_device_14e4_166b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_166b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_166e = { + 0x166e, pci_device_14e4_166e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_166e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_1677 = { + 0x1677, pci_device_14e4_1677, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1677, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_1678 = { + 0x1678, pci_device_14e4_1678, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1678, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_167d = { + 0x167d, pci_device_14e4_167d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_167d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_167e = { + 0x167e, pci_device_14e4_167e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_167e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_1696 = { + 0x1696, pci_device_14e4_1696, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_1696, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_169c = { + 0x169c, pci_device_14e4_169c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_169c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_169d = { + 0x169d, pci_device_14e4_169d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_169d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_16a6 = { + 0x16a6, pci_device_14e4_16a6, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_16a6, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_16a7 = { + 0x16a7, pci_device_14e4_16a7, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_16a7, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_16a8 = { + 0x16a8, pci_device_14e4_16a8, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_16a8, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_16aa = { + 0x16aa, pci_device_14e4_16aa, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_16aa, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_16ac = { + 0x16ac, pci_device_14e4_16ac, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_16ac, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_16c6 = { + 0x16c6, pci_device_14e4_16c6, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_16c6, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_16c7 = { + 0x16c7, pci_device_14e4_16c7, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_16c7, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_16dd = { + 0x16dd, pci_device_14e4_16dd, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_16dd, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_16f7 = { + 0x16f7, pci_device_14e4_16f7, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_16f7, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_16fd = { + 0x16fd, pci_device_14e4_16fd, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_16fd, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_16fe = { + 0x16fe, pci_device_14e4_16fe, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_16fe, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_170c = { + 0x170c, pci_device_14e4_170c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_170c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_170d = { + 0x170d, pci_device_14e4_170d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_170d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_170e = { + 0x170e, pci_device_14e4_170e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_170e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_3352 = { + 0x3352, pci_device_14e4_3352, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_3352, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_3360 = { + 0x3360, pci_device_14e4_3360, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_3360, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4210 = { + 0x4210, pci_device_14e4_4210, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4210, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4211 = { + 0x4211, pci_device_14e4_4211, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4211, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4212 = { + 0x4212, pci_device_14e4_4212, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4212, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4301 = { + 0x4301, pci_device_14e4_4301, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4301, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4305 = { + 0x4305, pci_device_14e4_4305, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4305, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4306 = { + 0x4306, pci_device_14e4_4306, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4306, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4307 = { + 0x4307, pci_device_14e4_4307, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4307, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4310 = { + 0x4310, pci_device_14e4_4310, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4310, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4312 = { + 0x4312, pci_device_14e4_4312, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4312, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4313 = { + 0x4313, pci_device_14e4_4313, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4313, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4315 = { + 0x4315, pci_device_14e4_4315, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4315, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4318 = { + 0x4318, pci_device_14e4_4318, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4318, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4319 = { + 0x4319, pci_device_14e4_4319, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4319, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4320 = { + 0x4320, pci_device_14e4_4320, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4320, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4321 = { + 0x4321, pci_device_14e4_4321, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4321, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4322 = { + 0x4322, pci_device_14e4_4322, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4322, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4324 = { + 0x4324, pci_device_14e4_4324, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4324, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4325 = { + 0x4325, pci_device_14e4_4325, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4325, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4326 = { + 0x4326, pci_device_14e4_4326, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4326, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4401 = { + 0x4401, pci_device_14e4_4401, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4401, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4402 = { + 0x4402, pci_device_14e4_4402, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4402, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4403 = { + 0x4403, pci_device_14e4_4403, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4403, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4410 = { + 0x4410, pci_device_14e4_4410, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4410, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4411 = { + 0x4411, pci_device_14e4_4411, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4411, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4412 = { + 0x4412, pci_device_14e4_4412, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4412, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4430 = { + 0x4430, pci_device_14e4_4430, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4430, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4432 = { + 0x4432, pci_device_14e4_4432, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4432, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4610 = { + 0x4610, pci_device_14e4_4610, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4610, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4611 = { + 0x4611, pci_device_14e4_4611, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4611, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4612 = { + 0x4612, pci_device_14e4_4612, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4612, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4613 = { + 0x4613, pci_device_14e4_4613, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4613, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4614 = { + 0x4614, pci_device_14e4_4614, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4614, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4615 = { + 0x4615, pci_device_14e4_4615, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4615, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4704 = { + 0x4704, pci_device_14e4_4704, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4704, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4705 = { + 0x4705, pci_device_14e4_4705, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4705, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4706 = { + 0x4706, pci_device_14e4_4706, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4706, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4707 = { + 0x4707, pci_device_14e4_4707, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4707, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4708 = { + 0x4708, pci_device_14e4_4708, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4708, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4710 = { + 0x4710, pci_device_14e4_4710, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4710, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4711 = { + 0x4711, pci_device_14e4_4711, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4711, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4712 = { + 0x4712, pci_device_14e4_4712, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4712, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4713 = { + 0x4713, pci_device_14e4_4713, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4713, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4714 = { + 0x4714, pci_device_14e4_4714, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4714, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4715 = { + 0x4715, pci_device_14e4_4715, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4715, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4716 = { + 0x4716, pci_device_14e4_4716, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4716, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4717 = { + 0x4717, pci_device_14e4_4717, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4717, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4718 = { + 0x4718, pci_device_14e4_4718, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4718, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4719 = { + 0x4719, pci_device_14e4_4719, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4719, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_4720 = { + 0x4720, pci_device_14e4_4720, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_4720, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5365 = { + 0x5365, pci_device_14e4_5365, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5365, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5600 = { + 0x5600, pci_device_14e4_5600, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5600, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5605 = { + 0x5605, pci_device_14e4_5605, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5605, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5615 = { + 0x5615, pci_device_14e4_5615, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5615, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5625 = { + 0x5625, pci_device_14e4_5625, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5625, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5645 = { + 0x5645, pci_device_14e4_5645, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5645, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5670 = { + 0x5670, pci_device_14e4_5670, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5670, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5680 = { + 0x5680, pci_device_14e4_5680, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5680, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5690 = { + 0x5690, pci_device_14e4_5690, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5690, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5691 = { + 0x5691, pci_device_14e4_5691, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5691, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5692 = { + 0x5692, pci_device_14e4_5692, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5692, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5820 = { + 0x5820, pci_device_14e4_5820, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5820, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5821 = { + 0x5821, pci_device_14e4_5821, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5821, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5822 = { + 0x5822, pci_device_14e4_5822, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5822, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5823 = { + 0x5823, pci_device_14e4_5823, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5823, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5824 = { + 0x5824, pci_device_14e4_5824, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5824, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5840 = { + 0x5840, pci_device_14e4_5840, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5840, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5841 = { + 0x5841, pci_device_14e4_5841, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5841, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14e4_5850 = { + 0x5850, pci_device_14e4_5850, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14e4_5850, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_14ea_ab06 = { + 0xab06, pci_device_14ea_ab06, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14ea_ab06, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14ea_ab07 = { + 0xab07, pci_device_14ea_ab07, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14ea_ab07, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14ea_ab08 = { + 0xab08, pci_device_14ea_ab08, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14ea_ab08, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_14f1_1002 = { + 0x1002, pci_device_14f1_1002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1002, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1003 = { + 0x1003, pci_device_14f1_1003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1003, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1004 = { + 0x1004, pci_device_14f1_1004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1004, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1005 = { + 0x1005, pci_device_14f1_1005, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1005, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1006 = { + 0x1006, pci_device_14f1_1006, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1006, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1022 = { + 0x1022, pci_device_14f1_1022, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1022, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1023 = { + 0x1023, pci_device_14f1_1023, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1023, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1024 = { + 0x1024, pci_device_14f1_1024, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1024, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1025 = { + 0x1025, pci_device_14f1_1025, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1025, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1026 = { + 0x1026, pci_device_14f1_1026, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1026, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1032 = { + 0x1032, pci_device_14f1_1032, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1032, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1033 = { + 0x1033, pci_device_14f1_1033, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1033, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1034 = { + 0x1034, pci_device_14f1_1034, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1034, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1035 = { + 0x1035, pci_device_14f1_1035, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1035, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1036 = { + 0x1036, pci_device_14f1_1036, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1036, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1052 = { + 0x1052, pci_device_14f1_1052, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1052, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1053 = { + 0x1053, pci_device_14f1_1053, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1053, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1054 = { + 0x1054, pci_device_14f1_1054, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1054, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1055 = { + 0x1055, pci_device_14f1_1055, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1055, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1056 = { + 0x1056, pci_device_14f1_1056, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1056, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1057 = { + 0x1057, pci_device_14f1_1057, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1057, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1059 = { + 0x1059, pci_device_14f1_1059, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1059, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1063 = { + 0x1063, pci_device_14f1_1063, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1063, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1064 = { + 0x1064, pci_device_14f1_1064, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1064, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1065 = { + 0x1065, pci_device_14f1_1065, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1065, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1066 = { + 0x1066, pci_device_14f1_1066, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1066, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1085 = { + 0x1085, pci_device_14f1_1085, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1085, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1433 = { + 0x1433, pci_device_14f1_1433, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1433, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1434 = { + 0x1434, pci_device_14f1_1434, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1434, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1435 = { + 0x1435, pci_device_14f1_1435, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1435, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1436 = { + 0x1436, pci_device_14f1_1436, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1436, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1453 = { + 0x1453, pci_device_14f1_1453, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1453, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1454 = { + 0x1454, pci_device_14f1_1454, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1454, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1455 = { + 0x1455, pci_device_14f1_1455, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1455, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1456 = { + 0x1456, pci_device_14f1_1456, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1456, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1610 = { + 0x1610, pci_device_14f1_1610, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1610, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1611 = { + 0x1611, pci_device_14f1_1611, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1611, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1620 = { + 0x1620, pci_device_14f1_1620, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1620, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1621 = { + 0x1621, pci_device_14f1_1621, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1621, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1622 = { + 0x1622, pci_device_14f1_1622, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1622, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1803 = { + 0x1803, pci_device_14f1_1803, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1803, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1811 = { + 0x1811, pci_device_14f1_1811, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1811, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_1815 = { + 0x1815, pci_device_14f1_1815, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_1815, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2003 = { + 0x2003, pci_device_14f1_2003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2003, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2004 = { + 0x2004, pci_device_14f1_2004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2004, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2005 = { + 0x2005, pci_device_14f1_2005, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2005, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2006 = { + 0x2006, pci_device_14f1_2006, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2006, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2013 = { + 0x2013, pci_device_14f1_2013, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2013, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2014 = { + 0x2014, pci_device_14f1_2014, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2014, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2015 = { + 0x2015, pci_device_14f1_2015, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2015, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2016 = { + 0x2016, pci_device_14f1_2016, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2016, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2043 = { + 0x2043, pci_device_14f1_2043, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2043, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2044 = { + 0x2044, pci_device_14f1_2044, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2044, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2045 = { + 0x2045, pci_device_14f1_2045, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2045, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2046 = { + 0x2046, pci_device_14f1_2046, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2046, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2063 = { + 0x2063, pci_device_14f1_2063, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2063, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2064 = { + 0x2064, pci_device_14f1_2064, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2064, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2065 = { + 0x2065, pci_device_14f1_2065, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2065, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2066 = { + 0x2066, pci_device_14f1_2066, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2066, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2093 = { + 0x2093, pci_device_14f1_2093, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2093, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2143 = { + 0x2143, pci_device_14f1_2143, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2143, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2144 = { + 0x2144, pci_device_14f1_2144, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2144, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2145 = { + 0x2145, pci_device_14f1_2145, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2145, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2146 = { + 0x2146, pci_device_14f1_2146, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2146, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2163 = { + 0x2163, pci_device_14f1_2163, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2163, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2164 = { + 0x2164, pci_device_14f1_2164, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2164, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2165 = { + 0x2165, pci_device_14f1_2165, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2165, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2166 = { + 0x2166, pci_device_14f1_2166, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2166, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2343 = { + 0x2343, pci_device_14f1_2343, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2343, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2344 = { + 0x2344, pci_device_14f1_2344, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2344, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2345 = { + 0x2345, pci_device_14f1_2345, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2345, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2346 = { + 0x2346, pci_device_14f1_2346, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2346, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2363 = { + 0x2363, pci_device_14f1_2363, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2363, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2364 = { + 0x2364, pci_device_14f1_2364, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2364, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2365 = { + 0x2365, pci_device_14f1_2365, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2365, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2366 = { + 0x2366, pci_device_14f1_2366, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2366, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2443 = { + 0x2443, pci_device_14f1_2443, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2443, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2444 = { + 0x2444, pci_device_14f1_2444, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2444, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2445 = { + 0x2445, pci_device_14f1_2445, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2445, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2446 = { + 0x2446, pci_device_14f1_2446, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2446, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2463 = { + 0x2463, pci_device_14f1_2463, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2463, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2464 = { + 0x2464, pci_device_14f1_2464, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2464, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2465 = { + 0x2465, pci_device_14f1_2465, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2465, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2466 = { + 0x2466, pci_device_14f1_2466, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2466, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2f00 = { + 0x2f00, pci_device_14f1_2f00, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2f00, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2f02 = { + 0x2f02, pci_device_14f1_2f02, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2f02, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2f11 = { + 0x2f11, pci_device_14f1_2f11, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2f11, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_2f20 = { + 0x2f20, pci_device_14f1_2f20, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_2f20, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_8234 = { + 0x8234, pci_device_14f1_8234, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_8234, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_8800 = { + 0x8800, pci_device_14f1_8800, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_8800, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_8801 = { + 0x8801, pci_device_14f1_8801, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_8801, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_8802 = { + 0x8802, pci_device_14f1_8802, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_8802, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_8804 = { + 0x8804, pci_device_14f1_8804, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_8804, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f1_8811 = { + 0x8811, pci_device_14f1_8811, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f1_8811, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_14f2_0120 = { + 0x0120, pci_device_14f2_0120, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f2_0120, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f2_0121 = { + 0x0121, pci_device_14f2_0121, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f2_0121, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f2_0122 = { + 0x0122, pci_device_14f2_0122, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f2_0122, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f2_0123 = { + 0x0123, pci_device_14f2_0123, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f2_0123, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f2_0124 = { + 0x0124, pci_device_14f2_0124, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f2_0124, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_14f3_2030 = { + 0x2030, pci_device_14f3_2030, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f3_2030, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f3_2050 = { + 0x2050, pci_device_14f3_2050, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f3_2050, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14f3_2060 = { + 0x2060, pci_device_14f3_2060, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f3_2060, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_14f8_2077 = { + 0x2077, pci_device_14f8_2077, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14f8_2077, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_14fc_0000 = { + 0x0000, pci_device_14fc_0000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14fc_0000, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_14fc_0001 = { + 0x0001, pci_device_14fc_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_14fc_0001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1500_1360 = { + 0x1360, pci_device_1500_1360, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1500_1360, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1507_0001 = { + 0x0001, pci_device_1507_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1507_0001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1507_0002 = { + 0x0002, pci_device_1507_0002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1507_0002, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1507_0003 = { + 0x0003, pci_device_1507_0003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1507_0003, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1507_0100 = { + 0x0100, pci_device_1507_0100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1507_0100, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1507_0431 = { + 0x0431, pci_device_1507_0431, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1507_0431, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1507_4801 = { + 0x4801, pci_device_1507_4801, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1507_4801, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1507_4802 = { + 0x4802, pci_device_1507_4802, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1507_4802, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1507_4803 = { + 0x4803, pci_device_1507_4803, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1507_4803, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1507_4806 = { + 0x4806, pci_device_1507_4806, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1507_4806, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1516_0800 = { + 0x0800, pci_device_1516_0800, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1516_0800, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1516_0803 = { + 0x0803, pci_device_1516_0803, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1516_0803, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1516_0891 = { + 0x0891, pci_device_1516_0891, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1516_0891, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_151a_1002 = { + 0x1002, pci_device_151a_1002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_151a_1002, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_151a_1004 = { + 0x1004, pci_device_151a_1004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_151a_1004, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_151a_1008 = { + 0x1008, pci_device_151a_1008, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_151a_1008, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_151c_0003 = { + 0x0003, pci_device_151c_0003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_151c_0003, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_151c_4000 = { + 0x4000, pci_device_151c_4000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_151c_4000, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_151f_0000 = { + 0x0000, pci_device_151f_0000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_151f_0000, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1522_0100 = { + 0x0100, pci_device_1522_0100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1522_0100, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1524_0510 = { + 0x0510, pci_device_1524_0510, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_0510, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_0520 = { + 0x0520, pci_device_1524_0520, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_0520, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_0530 = { + 0x0530, pci_device_1524_0530, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_0530, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_0550 = { + 0x0550, pci_device_1524_0550, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_0550, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_0610 = { + 0x0610, pci_device_1524_0610, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_0610, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_1211 = { + 0x1211, pci_device_1524_1211, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_1211, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_1225 = { + 0x1225, pci_device_1524_1225, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_1225, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_1410 = { + 0x1410, pci_device_1524_1410, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_1410, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_1411 = { + 0x1411, pci_device_1524_1411, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_1411, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_1412 = { + 0x1412, pci_device_1524_1412, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_1412, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_1420 = { + 0x1420, pci_device_1524_1420, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_1420, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_1421 = { + 0x1421, pci_device_1524_1421, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_1421, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1524_1422 = { + 0x1422, pci_device_1524_1422, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1524_1422, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1532_0020 = { + 0x0020, pci_device_1532_0020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1532_0020, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1538_0303 = { + 0x0303, pci_device_1538_0303, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1538_0303, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_153b_1144 = { + 0x1144, pci_device_153b_1144, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_153b_1144, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_153b_1147 = { + 0x1147, pci_device_153b_1147, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_153b_1147, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_153b_1158 = { + 0x1158, pci_device_153b_1158, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_153b_1158, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_153f_0001 = { + 0x0001, pci_device_153f_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_153f_0001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1543_3052 = { + 0x3052, pci_device_1543_3052, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1543_3052, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1543_4c22 = { + 0x4c22, pci_device_1543_4c22, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1543_4c22, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1571_a001 = { + 0xa001, pci_device_1571_a001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a002 = { + 0xa002, pci_device_1571_a002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a002, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a003 = { + 0xa003, pci_device_1571_a003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a003, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a004 = { + 0xa004, pci_device_1571_a004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a004, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a005 = { + 0xa005, pci_device_1571_a005, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a005, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a006 = { + 0xa006, pci_device_1571_a006, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a006, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a007 = { + 0xa007, pci_device_1571_a007, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a007, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a008 = { + 0xa008, pci_device_1571_a008, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a008, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a009 = { + 0xa009, pci_device_1571_a009, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a009, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a00a = { + 0xa00a, pci_device_1571_a00a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a00a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a00b = { + 0xa00b, pci_device_1571_a00b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a00b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a00c = { + 0xa00c, pci_device_1571_a00c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a00c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a00d = { + 0xa00d, pci_device_1571_a00d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a00d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a201 = { + 0xa201, pci_device_1571_a201, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a201, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a202 = { + 0xa202, pci_device_1571_a202, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a202, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a203 = { + 0xa203, pci_device_1571_a203, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a203, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a204 = { + 0xa204, pci_device_1571_a204, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a204, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a205 = { + 0xa205, pci_device_1571_a205, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a205, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1571_a206 = { + 0xa206, pci_device_1571_a206, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1571_a206, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1578_5615 = { + 0x5615, pci_device_1578_5615, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1578_5615, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_157c_8001 = { + 0x8001, pci_device_157c_8001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_157c_8001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1592_0781 = { + 0x0781, pci_device_1592_0781, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1592_0781, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1592_0782 = { + 0x0782, pci_device_1592_0782, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1592_0782, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1592_0783 = { + 0x0783, pci_device_1592_0783, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1592_0783, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1592_0785 = { + 0x0785, pci_device_1592_0785, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1592_0785, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1592_0786 = { + 0x0786, pci_device_1592_0786, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1592_0786, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1592_0787 = { + 0x0787, pci_device_1592_0787, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1592_0787, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1592_0788 = { + 0x0788, pci_device_1592_0788, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1592_0788, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1592_078a = { + 0x078a, pci_device_1592_078a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1592_078a, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_15a2_0001 = { + 0x0001, pci_device_15a2_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15a2_0001, +#else + NULL, +#endif + 0 +}; +#endif +static const pciDeviceInfo pci_dev_info_15ad_0405 = { + 0x0405, pci_device_15ad_0405, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15ad_0405, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15ad_0710 = { + 0x0710, pci_device_15ad_0710, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15ad_0710, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15ad_0720 = { + 0x0720, pci_device_15ad_0720, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15ad_0720, +#else + NULL, +#endif + 0 +}; +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_15b3_5274 = { + 0x5274, pci_device_15b3_5274, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_5274, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_5a44 = { + 0x5a44, pci_device_15b3_5a44, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_5a44, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_5a45 = { + 0x5a45, pci_device_15b3_5a45, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_5a45, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_5a46 = { + 0x5a46, pci_device_15b3_5a46, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_5a46, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_5e8d = { + 0x5e8d, pci_device_15b3_5e8d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_5e8d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_6274 = { + 0x6274, pci_device_15b3_6274, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_6274, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_6278 = { + 0x6278, pci_device_15b3_6278, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_6278, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_6279 = { + 0x6279, pci_device_15b3_6279, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_6279, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15b3_6282 = { + 0x6282, pci_device_15b3_6282, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15b3_6282, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_15bc_1100 = { + 0x1100, pci_device_15bc_1100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15bc_1100, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15bc_2922 = { + 0x2922, pci_device_15bc_2922, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15bc_2922, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15bc_2928 = { + 0x2928, pci_device_15bc_2928, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15bc_2928, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15bc_2929 = { + 0x2929, pci_device_15bc_2929, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15bc_2929, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_15c5_8010 = { + 0x8010, pci_device_15c5_8010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15c5_8010, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_15c7_0349 = { + 0x0349, pci_device_15c7_0349, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15c7_0349, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_15dc_0001 = { + 0x0001, pci_device_15dc_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15dc_0001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_15e8_0130 = { + 0x0130, pci_device_15e8_0130, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15e8_0130, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_15e9_1841 = { + 0x1841, pci_device_15e9_1841, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15e9_1841, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_15ec_3101 = { + 0x3101, pci_device_15ec_3101, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15ec_3101, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_15ec_5102 = { + 0x5102, pci_device_15ec_5102, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_15ec_5102, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1619_0400 = { + 0x0400, pci_device_1619_0400, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1619_0400, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1619_0440 = { + 0x0440, pci_device_1619_0440, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1619_0440, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1619_0610 = { + 0x0610, pci_device_1619_0610, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1619_0610, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1619_0620 = { + 0x0620, pci_device_1619_0620, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1619_0620, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1619_0640 = { + 0x0640, pci_device_1619_0640, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1619_0640, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1619_1610 = { + 0x1610, pci_device_1619_1610, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1619_1610, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1619_2610 = { + 0x2610, pci_device_1619_2610, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1619_2610, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1626_8410 = { + 0x8410, pci_device_1626_8410, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1626_8410, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1629_1003 = { + 0x1003, pci_device_1629_1003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1629_1003, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1629_2002 = { + 0x2002, pci_device_1629_2002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1629_2002, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1637_3874 = { + 0x3874, pci_device_1637_3874, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1637_3874, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1638_1100 = { + 0x1100, pci_device_1638_1100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1638_1100, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_163c_3052 = { + 0x3052, pci_device_163c_3052, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_163c_3052, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_163c_5449 = { + 0x5449, pci_device_163c_5449, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_163c_5449, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_165a_c100 = { + 0xc100, pci_device_165a_c100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_165a_c100, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_165a_d200 = { + 0xd200, pci_device_165a_d200, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_165a_d200, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_165a_d300 = { + 0xd300, pci_device_165a_d300, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_165a_d300, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_165f_1020 = { + 0x1020, pci_device_165f_1020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_165f_1020, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1668_0100 = { + 0x0100, pci_device_1668_0100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1668_0100, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_166d_0001 = { + 0x0001, pci_device_166d_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_166d_0001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_166d_0002 = { + 0x0002, pci_device_166d_0002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_166d_0002, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1677_104e = { + 0x104e, pci_device_1677_104e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1677_104e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1677_12d7 = { + 0x12d7, pci_device_1677_12d7, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1677_12d7, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_167b_2102 = { + 0x2102, pci_device_167b_2102, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_167b_2102, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1681_0010 = { + 0x0010, pci_device_1681_0010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1681_0010, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1688_1170 = { + 0x1170, pci_device_1688_1170, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1688_1170, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_168c_0007 = { + 0x0007, pci_device_168c_0007, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_168c_0007, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_168c_0011 = { + 0x0011, pci_device_168c_0011, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_168c_0011, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_168c_0012 = { + 0x0012, pci_device_168c_0012, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_168c_0012, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_168c_0013 = { + 0x0013, pci_device_168c_0013, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_168c_0013, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_168c_001a = { + 0x001a, pci_device_168c_001a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_168c_001a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_168c_001b = { + 0x001b, pci_device_168c_001b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_168c_001b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_168c_0020 = { + 0x0020, pci_device_168c_0020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_168c_0020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_168c_1014 = { + 0x1014, pci_device_168c_1014, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_168c_1014, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_169c_0044 = { + 0x0044, pci_device_169c_0044, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_169c_0044, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_16ab_1100 = { + 0x1100, pci_device_16ab_1100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ab_1100, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16ab_1101 = { + 0x1101, pci_device_16ab_1101, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ab_1101, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16ab_1102 = { + 0x1102, pci_device_16ab_1102, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ab_1102, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16ab_8501 = { + 0x8501, pci_device_16ab_8501, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ab_8501, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_16ae_1141 = { + 0x1141, pci_device_16ae_1141, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ae_1141, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_16ca_0001 = { + 0x0001, pci_device_16ca_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ca_0001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_16e3_1e0f = { + 0x1e0f, pci_device_16e3_1e0f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16e3_1e0f, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_16ec_00ff = { + 0x00ff, pci_device_16ec_00ff, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ec_00ff, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16ec_0116 = { + 0x0116, pci_device_16ec_0116, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ec_0116, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_16ec_3685 = { + 0x3685, pci_device_16ec_3685, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ec_3685, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_16ed_1001 = { + 0x1001, pci_device_16ed_1001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16ed_1001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_16f4_8000 = { + 0x8000, pci_device_16f4_8000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_16f4_8000, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_170b_0100 = { + 0x0100, pci_device_170b_0100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_170b_0100, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1725_7174 = { + 0x7174, pci_device_1725_7174, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1725_7174, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_172a_13c8 = { + 0x13c8, pci_device_172a_13c8, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_172a_13c8, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1737_0013 = { + 0x0013, pci_device_1737_0013, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1737_0013, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1737_0015 = { + 0x0015, pci_device_1737_0015, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1737_0015, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1737_1032 = { + 0x1032, pci_device_1737_1032, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1737_1032, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1737_1064 = { + 0x1064, pci_device_1737_1064, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1737_1064, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1737_ab08 = { + 0xab08, pci_device_1737_ab08, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1737_ab08, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1737_ab09 = { + 0xab09, pci_device_1737_ab09, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1737_ab09, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_173b_03e8 = { + 0x03e8, pci_device_173b_03e8, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_173b_03e8, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_173b_03e9 = { + 0x03e9, pci_device_173b_03e9, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_173b_03e9, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_173b_03ea = { + 0x03ea, pci_device_173b_03ea, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_173b_03ea, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_173b_03eb = { + 0x03eb, pci_device_173b_03eb, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_173b_03eb, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1743_8139 = { + 0x8139, pci_device_1743_8139, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1743_8139, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1796_0001 = { + 0x0001, pci_device_1796_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1796_0001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1796_0002 = { + 0x0002, pci_device_1796_0002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1796_0002, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1796_0003 = { + 0x0003, pci_device_1796_0003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1796_0003, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1796_0004 = { + 0x0004, pci_device_1796_0004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1796_0004, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1796_0005 = { + 0x0005, pci_device_1796_0005, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1796_0005, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1796_0006 = { + 0x0006, pci_device_1796_0006, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1796_0006, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1799_6001 = { + 0x6001, pci_device_1799_6001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1799_6001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1799_6020 = { + 0x6020, pci_device_1799_6020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1799_6020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1799_6060 = { + 0x6060, pci_device_1799_6060, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1799_6060, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1799_7000 = { + 0x7000, pci_device_1799_7000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1799_7000, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1799_7010 = { + 0x7010, pci_device_1799_7010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1799_7010, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_179c_0557 = { + 0x0557, pci_device_179c_0557, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_179c_0557, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_179c_0566 = { + 0x0566, pci_device_179c_0566, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_179c_0566, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_179c_5031 = { + 0x5031, pci_device_179c_5031, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_179c_5031, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_179c_5121 = { + 0x5121, pci_device_179c_5121, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_179c_5121, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_179c_5211 = { + 0x5211, pci_device_179c_5211, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_179c_5211, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_179c_5679 = { + 0x5679, pci_device_179c_5679, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_179c_5679, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_17a0_8033 = { + 0x8033, pci_device_17a0_8033, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17a0_8033, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_17a0_8034 = { + 0x8034, pci_device_17a0_8034, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17a0_8034, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_17b3_ab08 = { + 0xab08, pci_device_17b3_ab08, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17b3_ab08, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_17b4_0011 = { + 0x0011, pci_device_17b4_0011, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17b4_0011, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_17cc_2280 = { + 0x2280, pci_device_17cc_2280, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17cc_2280, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_17d3_1110 = { + 0x1110, pci_device_17d3_1110, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17d3_1110, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_17d3_1120 = { + 0x1120, pci_device_17d3_1120, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17d3_1120, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_17d3_1130 = { + 0x1130, pci_device_17d3_1130, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17d3_1130, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_17d3_1160 = { + 0x1160, pci_device_17d3_1160, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17d3_1160, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_17d3_1210 = { + 0x1210, pci_device_17d3_1210, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17d3_1210, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_17d3_1220 = { + 0x1220, pci_device_17d3_1220, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17d3_1220, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_17d3_1230 = { + 0x1230, pci_device_17d3_1230, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17d3_1230, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_17d3_1260 = { + 0x1260, pci_device_17d3_1260, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17d3_1260, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_17d5_5831 = { + 0x5831, pci_device_17d5_5831, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17d5_5831, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_17d5_5832 = { + 0x5832, pci_device_17d5_5832, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17d5_5832, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_17fe_2120 = { + 0x2120, pci_device_17fe_2120, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17fe_2120, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_17fe_2220 = { + 0x2220, pci_device_17fe_2220, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_17fe_2220, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1813_4000 = { + 0x4000, pci_device_1813_4000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1813_4000, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1813_4100 = { + 0x4100, pci_device_1813_4100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1813_4100, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1814_0101 = { + 0x0101, pci_device_1814_0101, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1814_0101, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1814_0200 = { + 0x0200, pci_device_1814_0200, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1814_0200, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1814_0201 = { + 0x0201, pci_device_1814_0201, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1814_0201, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1814_0301 = { + 0x0301, pci_device_1814_0301, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1814_0301, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1814_0401 = { + 0x0401, pci_device_1814_0401, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1814_0401, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1822_4e35 = { + 0x4e35, pci_device_1822_4e35, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1822_4e35, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_182d_3069 = { + 0x3069, pci_device_182d_3069, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_182d_3069, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_182d_9790 = { + 0x9790, pci_device_182d_9790, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_182d_9790, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_183b_08a7 = { + 0x08a7, pci_device_183b_08a7, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_183b_08a7, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_183b_08a8 = { + 0x08a8, pci_device_183b_08a8, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_183b_08a8, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_183b_08a9 = { + 0x08a9, pci_device_183b_08a9, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_183b_08a9, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1864_2110 = { + 0x2110, pci_device_1864_2110, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1864_2110, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1867_5a44 = { + 0x5a44, pci_device_1867_5a44, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1867_5a44, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1867_5a45 = { + 0x5a45, pci_device_1867_5a45, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1867_5a45, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1867_5a46 = { + 0x5a46, pci_device_1867_5a46, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1867_5a46, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1867_6278 = { + 0x6278, pci_device_1867_6278, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1867_6278, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1867_6282 = { + 0x6282, pci_device_1867_6282, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1867_6282, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1888_0301 = { + 0x0301, pci_device_1888_0301, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1888_0301, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1888_0601 = { + 0x0601, pci_device_1888_0601, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1888_0601, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1888_0710 = { + 0x0710, pci_device_1888_0710, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1888_0710, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1888_0720 = { + 0x0720, pci_device_1888_0720, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1888_0720, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_18ac_d500 = { + 0xd500, pci_device_18ac_d500, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18ac_d500, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18ac_d810 = { + 0xd810, pci_device_18ac_d810, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18ac_d810, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18ac_d820 = { + 0xd820, pci_device_18ac_d820, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18ac_d820, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_18b8_b001 = { + 0xb001, pci_device_18b8_b001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18b8_b001, +#else + NULL, +#endif + 0 +}; +#endif +static const pciDeviceInfo pci_dev_info_18ca_0020 = { + 0x0020, pci_device_18ca_0020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18ca_0020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18ca_0040 = { + 0x0040, pci_device_18ca_0040, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18ca_0040, +#else + NULL, +#endif + 0 +}; +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_18d2_3069 = { + 0x3069, pci_device_18d2_3069, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18d2_3069, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_18dd_4c6f = { + 0x4c6f, pci_device_18dd_4c6f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18dd_4c6f, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_18e6_0001 = { + 0x0001, pci_device_18e6_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18e6_0001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_18ec_c006 = { + 0xc006, pci_device_18ec_c006, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18ec_c006, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18ec_c045 = { + 0xc045, pci_device_18ec_c045, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18ec_c045, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18ec_c050 = { + 0xc050, pci_device_18ec_c050, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18ec_c050, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18ec_c058 = { + 0xc058, pci_device_18ec_c058, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18ec_c058, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_18f7_0001 = { + 0x0001, pci_device_18f7_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18f7_0001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18f7_0002 = { + 0x0002, pci_device_18f7_0002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18f7_0002, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18f7_0004 = { + 0x0004, pci_device_18f7_0004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18f7_0004, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18f7_0005 = { + 0x0005, pci_device_18f7_0005, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18f7_0005, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_18f7_000a = { + 0x000a, pci_device_18f7_000a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_18f7_000a, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1923_0100 = { + 0x0100, pci_device_1923_0100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1923_0100, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1942_e511 = { + 0xe511, pci_device_1942_e511, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1942_e511, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1957_0080 = { + 0x0080, pci_device_1957_0080, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0080, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0081 = { + 0x0081, pci_device_1957_0081, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0081, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0082 = { + 0x0082, pci_device_1957_0082, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0082, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0083 = { + 0x0083, pci_device_1957_0083, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0083, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0084 = { + 0x0084, pci_device_1957_0084, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0084, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0085 = { + 0x0085, pci_device_1957_0085, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0085, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0086 = { + 0x0086, pci_device_1957_0086, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0086, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1957_0087 = { + 0x0087, pci_device_1957_0087, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1957_0087, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1966_1975 = { + 0x1975, pci_device_1966_1975, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1966_1975, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_196a_0101 = { + 0x0101, pci_device_196a_0101, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_196a_0101, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_196a_0102 = { + 0x0102, pci_device_196a_0102, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_196a_0102, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_197b_2360 = { + 0x2360, pci_device_197b_2360, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_197b_2360, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_197b_2363 = { + 0x2363, pci_device_197b_2363, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_197b_2363, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1989_0001 = { + 0x0001, pci_device_1989_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1989_0001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1989_8001 = { + 0x8001, pci_device_1989_8001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1989_8001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_19ae_0520 = { + 0x0520, pci_device_19ae_0520, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_19ae_0520, +#else + NULL, +#endif + 0 +}; +#endif +static const pciDeviceInfo pci_dev_info_1a03_2000 = { + 0x2000, pci_device_1a03_2000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1a03_2000, +#else + NULL, +#endif + 0 +}; +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1a08_0000 = { + 0x0000, pci_device_1a08_0000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1a08_0000, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1c1c_0001 = { + 0x0001, pci_device_1c1c_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1c1c_0001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1d44_a400 = { + 0xa400, pci_device_1d44_a400, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1d44_a400, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1de1_0391 = { + 0x0391, pci_device_1de1_0391, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1de1_0391, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1de1_2020 = { + 0x2020, pci_device_1de1_2020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1de1_2020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1de1_690c = { + 0x690c, pci_device_1de1_690c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1de1_690c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_1de1_dc29 = { + 0xdc29, pci_device_1de1_dc29, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1de1_dc29, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1fc0_0300 = { + 0x0300, pci_device_1fc0_0300, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1fc0_0300, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1fc1_000d = { + 0x000d, pci_device_1fc1_000d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1fc1_000d, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_1fce_0001 = { + 0x0001, pci_device_1fce_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_1fce_0001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_2348_2010 = { + 0x2010, pci_device_2348_2010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_2348_2010, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_3388_0013 = { + 0x0013, pci_device_3388_0013, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3388_0013, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3388_0014 = { + 0x0014, pci_device_3388_0014, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3388_0014, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3388_0020 = { + 0x0020, pci_device_3388_0020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3388_0020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3388_0021 = { + 0x0021, pci_device_3388_0021, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3388_0021, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3388_0022 = { + 0x0022, pci_device_3388_0022, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3388_0022, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3388_0026 = { + 0x0026, pci_device_3388_0026, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3388_0026, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3388_101a = { + 0x101a, pci_device_3388_101a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3388_101a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3388_101b = { + 0x101b, pci_device_3388_101b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3388_101b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3388_8011 = { + 0x8011, pci_device_3388_8011, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3388_8011, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3388_8012 = { + 0x8012, pci_device_3388_8012, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3388_8012, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3388_8013 = { + 0x8013, pci_device_3388_8013, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3388_8013, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_3842_c370 = { + 0xc370, pci_device_3842_c370, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3842_c370, +#else + NULL, +#endif + 0 +}; +#endif +static const pciDeviceInfo pci_dev_info_3d3d_0001 = { + 0x0001, pci_device_3d3d_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0001, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0002 = { + 0x0002, pci_device_3d3d_0002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0002, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0003 = { + 0x0003, pci_device_3d3d_0003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0003, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0004 = { + 0x0004, pci_device_3d3d_0004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0004, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0005 = { + 0x0005, pci_device_3d3d_0005, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0005, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0006 = { + 0x0006, pci_device_3d3d_0006, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0006, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0007 = { + 0x0007, pci_device_3d3d_0007, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0007, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0008 = { + 0x0008, pci_device_3d3d_0008, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0008, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0009 = { + 0x0009, pci_device_3d3d_0009, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0009, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_000a = { + 0x000a, pci_device_3d3d_000a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_000a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_000c = { + 0x000c, pci_device_3d3d_000c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_000c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_000d = { + 0x000d, pci_device_3d3d_000d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_000d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0011 = { + 0x0011, pci_device_3d3d_0011, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0011, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0012 = { + 0x0012, pci_device_3d3d_0012, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0012, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0013 = { + 0x0013, pci_device_3d3d_0013, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0013, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0020 = { + 0x0020, pci_device_3d3d_0020, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0020, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0022 = { + 0x0022, pci_device_3d3d_0022, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0022, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0024 = { + 0x0024, pci_device_3d3d_0024, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0024, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_0100 = { + 0x0100, pci_device_3d3d_0100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_0100, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_07a1 = { + 0x07a1, pci_device_3d3d_07a1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_07a1, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_07a2 = { + 0x07a2, pci_device_3d3d_07a2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_07a2, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_07a3 = { + 0x07a3, pci_device_3d3d_07a3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_07a3, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_1004 = { + 0x1004, pci_device_3d3d_1004, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_1004, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_3d04 = { + 0x3d04, pci_device_3d3d_3d04, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_3d04, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_3d3d_ffff = { + 0xffff, pci_device_3d3d_ffff, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_3d3d_ffff, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_0300 = { + 0x0300, pci_device_4005_0300, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_0300, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_0308 = { + 0x0308, pci_device_4005_0308, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_0308, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_0309 = { + 0x0309, pci_device_4005_0309, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_0309, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_1064 = { + 0x1064, pci_device_4005_1064, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_1064, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_2064 = { + 0x2064, pci_device_4005_2064, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_2064, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_2128 = { + 0x2128, pci_device_4005_2128, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_2128, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_2301 = { + 0x2301, pci_device_4005_2301, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_2301, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_2302 = { + 0x2302, pci_device_4005_2302, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_2302, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_2303 = { + 0x2303, pci_device_4005_2303, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_2303, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_2364 = { + 0x2364, pci_device_4005_2364, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_2364, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_2464 = { + 0x2464, pci_device_4005_2464, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_2464, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_2501 = { + 0x2501, pci_device_4005_2501, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_2501, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_4000 = { + 0x4000, pci_device_4005_4000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_4000, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4005_4710 = { + 0x4710, pci_device_4005_4710, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4005_4710, +#else + NULL, +#endif + 0 +}; +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_4033_1360 = { + 0x1360, pci_device_4033_1360, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4033_1360, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_4144_0044 = { + 0x0044, pci_device_4144_0044, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4144_0044, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_416c_0100 = { + 0x0100, pci_device_416c_0100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_416c_0100, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_416c_0200 = { + 0x0200, pci_device_416c_0200, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_416c_0200, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_4444_0016 = { + 0x0016, pci_device_4444_0016, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4444_0016, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4444_0803 = { + 0x0803, pci_device_4444_0803, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4444_0803, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_4916_1960 = { + 0x1960, pci_device_4916_1960, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4916_1960, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_494f_10e8 = { + 0x10e8, pci_device_494f_10e8, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_494f_10e8, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_4a14_5000 = { + 0x5000, pci_device_4a14_5000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4a14_5000, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_4c53_0000 = { + 0x0000, pci_device_4c53_0000, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4c53_0000, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4c53_0001 = { + 0x0001, pci_device_4c53_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4c53_0001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_4d51_0200 = { + 0x0200, pci_device_4d51_0200, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4d51_0200, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_4ddc_0100 = { + 0x0100, pci_device_4ddc_0100, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0100, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0801 = { + 0x0801, pci_device_4ddc_0801, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0801, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0802 = { + 0x0802, pci_device_4ddc_0802, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0802, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0811 = { + 0x0811, pci_device_4ddc_0811, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0811, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0812 = { + 0x0812, pci_device_4ddc_0812, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0812, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0881 = { + 0x0881, pci_device_4ddc_0881, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0881, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0882 = { + 0x0882, pci_device_4ddc_0882, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0882, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0891 = { + 0x0891, pci_device_4ddc_0891, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0891, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0892 = { + 0x0892, pci_device_4ddc_0892, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0892, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0901 = { + 0x0901, pci_device_4ddc_0901, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0901, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0902 = { + 0x0902, pci_device_4ddc_0902, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0902, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0903 = { + 0x0903, pci_device_4ddc_0903, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0903, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0904 = { + 0x0904, pci_device_4ddc_0904, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0904, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0b01 = { + 0x0b01, pci_device_4ddc_0b01, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0b01, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0b02 = { + 0x0b02, pci_device_4ddc_0b02, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0b02, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0b03 = { + 0x0b03, pci_device_4ddc_0b03, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0b03, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_4ddc_0b04 = { + 0x0b04, pci_device_4ddc_0b04, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_4ddc_0b04, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_5046_1001 = { + 0x1001, pci_device_5046_1001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5046_1001, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_5053_2010 = { + 0x2010, pci_device_5053_2010, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5053_2010, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_5145_3031 = { + 0x3031, pci_device_5145_3031, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5145_3031, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_5168_0301 = { + 0x0301, pci_device_5168_0301, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5168_0301, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_5301_0001 = { + 0x0001, pci_device_5301_0001, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5301_0001, +#else + NULL, +#endif + 0 +}; +#endif +static const pciDeviceInfo pci_dev_info_5333_0551 = { + 0x0551, pci_device_5333_0551, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_0551, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_5631 = { + 0x5631, pci_device_5333_5631, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_5631, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8800 = { + 0x8800, pci_device_5333_8800, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8800, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8801 = { + 0x8801, pci_device_5333_8801, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8801, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8810 = { + 0x8810, pci_device_5333_8810, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8810, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8811 = { + 0x8811, pci_device_5333_8811, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8811, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8812 = { + 0x8812, pci_device_5333_8812, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8812, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8813 = { + 0x8813, pci_device_5333_8813, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8813, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8814 = { + 0x8814, pci_device_5333_8814, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8814, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8815 = { + 0x8815, pci_device_5333_8815, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8815, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_883d = { + 0x883d, pci_device_5333_883d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_883d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8870 = { + 0x8870, pci_device_5333_8870, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8870, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8880 = { + 0x8880, pci_device_5333_8880, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8880, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8881 = { + 0x8881, pci_device_5333_8881, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8881, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8882 = { + 0x8882, pci_device_5333_8882, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8882, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8883 = { + 0x8883, pci_device_5333_8883, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8883, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88b0 = { + 0x88b0, pci_device_5333_88b0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88b0, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88b1 = { + 0x88b1, pci_device_5333_88b1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88b1, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88b2 = { + 0x88b2, pci_device_5333_88b2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88b2, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88b3 = { + 0x88b3, pci_device_5333_88b3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88b3, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88c0 = { + 0x88c0, pci_device_5333_88c0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88c0, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88c1 = { + 0x88c1, pci_device_5333_88c1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88c1, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88c2 = { + 0x88c2, pci_device_5333_88c2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88c2, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88c3 = { + 0x88c3, pci_device_5333_88c3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88c3, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88d0 = { + 0x88d0, pci_device_5333_88d0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88d0, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88d1 = { + 0x88d1, pci_device_5333_88d1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88d1, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88d2 = { + 0x88d2, pci_device_5333_88d2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88d2, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88d3 = { + 0x88d3, pci_device_5333_88d3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88d3, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88f0 = { + 0x88f0, pci_device_5333_88f0, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88f0, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88f1 = { + 0x88f1, pci_device_5333_88f1, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88f1, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88f2 = { + 0x88f2, pci_device_5333_88f2, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88f2, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_88f3 = { + 0x88f3, pci_device_5333_88f3, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_88f3, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8900 = { + 0x8900, pci_device_5333_8900, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8900, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8901 = { + 0x8901, pci_device_5333_8901, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8901, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8902 = { + 0x8902, pci_device_5333_8902, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8902, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8903 = { + 0x8903, pci_device_5333_8903, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8903, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8904 = { + 0x8904, pci_device_5333_8904, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8904, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8905 = { + 0x8905, pci_device_5333_8905, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8905, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8906 = { + 0x8906, pci_device_5333_8906, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8906, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8907 = { + 0x8907, pci_device_5333_8907, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8907, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8908 = { + 0x8908, pci_device_5333_8908, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8908, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8909 = { + 0x8909, pci_device_5333_8909, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8909, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_890a = { + 0x890a, pci_device_5333_890a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_890a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_890b = { + 0x890b, pci_device_5333_890b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_890b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_890c = { + 0x890c, pci_device_5333_890c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_890c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_890d = { + 0x890d, pci_device_5333_890d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_890d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_890e = { + 0x890e, pci_device_5333_890e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_890e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_890f = { + 0x890f, pci_device_5333_890f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_890f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8a01 = { + 0x8a01, pci_device_5333_8a01, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8a01, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8a10 = { + 0x8a10, pci_device_5333_8a10, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8a10, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8a13 = { + 0x8a13, pci_device_5333_8a13, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8a13, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8a20 = { + 0x8a20, pci_device_5333_8a20, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8a20, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8a21 = { + 0x8a21, pci_device_5333_8a21, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8a21, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8a22 = { + 0x8a22, pci_device_5333_8a22, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8a22, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8a23 = { + 0x8a23, pci_device_5333_8a23, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8a23, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8a25 = { + 0x8a25, pci_device_5333_8a25, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8a25, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8a26 = { + 0x8a26, pci_device_5333_8a26, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8a26, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c00 = { + 0x8c00, pci_device_5333_8c00, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c00, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c01 = { + 0x8c01, pci_device_5333_8c01, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c01, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c02 = { + 0x8c02, pci_device_5333_8c02, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c02, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c03 = { + 0x8c03, pci_device_5333_8c03, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c03, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c10 = { + 0x8c10, pci_device_5333_8c10, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c10, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c11 = { + 0x8c11, pci_device_5333_8c11, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c11, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c12 = { + 0x8c12, pci_device_5333_8c12, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c12, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c13 = { + 0x8c13, pci_device_5333_8c13, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c13, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c22 = { + 0x8c22, pci_device_5333_8c22, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c22, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c24 = { + 0x8c24, pci_device_5333_8c24, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c24, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c26 = { + 0x8c26, pci_device_5333_8c26, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c26, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c2a = { + 0x8c2a, pci_device_5333_8c2a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c2a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c2b = { + 0x8c2b, pci_device_5333_8c2b, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c2b, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c2c = { + 0x8c2c, pci_device_5333_8c2c, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c2c, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c2d = { + 0x8c2d, pci_device_5333_8c2d, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c2d, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c2e = { + 0x8c2e, pci_device_5333_8c2e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c2e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8c2f = { + 0x8c2f, pci_device_5333_8c2f, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8c2f, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8d01 = { + 0x8d01, pci_device_5333_8d01, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8d01, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8d02 = { + 0x8d02, pci_device_5333_8d02, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8d02, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8d03 = { + 0x8d03, pci_device_5333_8d03, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8d03, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_8d04 = { + 0x8d04, pci_device_5333_8d04, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_8d04, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_9102 = { + 0x9102, pci_device_5333_9102, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_9102, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_5333_ca00 = { + 0xca00, pci_device_5333_ca00, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_5333_ca00, #else NULL, #endif 0 }; -#endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_17cc_2280 = { - 0x2280, pci_device_17cc_2280, +static const pciDeviceInfo pci_dev_info_544c_0350 = { + 0x0350, pci_device_544c_0350, #ifdef INIT_SUBSYS_INFO - pci_ss_list_17cc_2280, + pci_ss_list_544c_0350, #else NULL, #endif @@ -81589,10 +101084,10 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_17fe_2220 = { - 0x2220, pci_device_17fe_2220, +static const pciDeviceInfo pci_dev_info_5455_4458 = { + 0x4458, pci_device_5455_4458, #ifdef INIT_SUBSYS_INFO - pci_ss_list_17fe_2220, + pci_ss_list_5455_4458, #else NULL, #endif @@ -81600,19 +101095,21 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1813_4000 = { - 0x4000, pci_device_1813_4000, +static const pciDeviceInfo pci_dev_info_5544_0001 = { + 0x0001, pci_device_5544_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1813_4000, + pci_ss_list_5544_0001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1813_4100 = { - 0x4100, pci_device_1813_4100, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_5555_0003 = { + 0x0003, pci_device_5555_0003, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1813_4100, + pci_ss_list_5555_0003, #else NULL, #endif @@ -81620,19 +101117,21 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1814_0101 = { - 0x0101, pci_device_1814_0101, +static const pciDeviceInfo pci_dev_info_5654_3132 = { + 0x3132, pci_device_5654_3132, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1814_0101, + pci_ss_list_5654_3132, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1814_0201 = { - 0x0201, pci_device_1814_0201, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_6374_6773 = { + 0x6773, pci_device_6374_6773, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1814_0201, + pci_ss_list_6374_6773, #else NULL, #endif @@ -81640,39 +101139,37 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_182d_3069 = { - 0x3069, pci_device_182d_3069, +static const pciDeviceInfo pci_dev_info_6666_0001 = { + 0x0001, pci_device_6666_0001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_182d_3069, + pci_ss_list_6666_0001, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_183b_08a7 = { - 0x08a7, pci_device_183b_08a7, +static const pciDeviceInfo pci_dev_info_6666_0002 = { + 0x0002, pci_device_6666_0002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_183b_08a7, + pci_ss_list_6666_0002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_183b_08a8 = { - 0x08a8, pci_device_183b_08a8, +static const pciDeviceInfo pci_dev_info_6666_0004 = { + 0x0004, pci_device_6666_0004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_183b_08a8, + pci_ss_list_6666_0004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_183b_08a9 = { - 0x08a9, pci_device_183b_08a9, +static const pciDeviceInfo pci_dev_info_6666_0101 = { + 0x0101, pci_device_6666_0101, #ifdef INIT_SUBSYS_INFO - pci_ss_list_183b_08a9, + pci_ss_list_6666_0101, #else NULL, #endif @@ -81680,4973 +101177,4900 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1867_5a44 = { - 0x5a44, pci_device_1867_5a44, +static const pciDeviceInfo pci_dev_info_7063_2000 = { + 0x2000, pci_device_7063_2000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1867_5a44, + pci_ss_list_7063_2000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1867_5a45 = { - 0x5a45, pci_device_1867_5a45, +static const pciDeviceInfo pci_dev_info_7063_3000 = { + 0x3000, pci_device_7063_3000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1867_5a45, + pci_ss_list_7063_3000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1867_5a46 = { - 0x5a46, pci_device_1867_5a46, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_1867_5a46, -#else - NULL, #endif - 0 -}; -static const pciDeviceInfo pci_dev_info_1867_6278 = { - 0x6278, pci_device_1867_6278, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_8008_0010 = { + 0x0010, pci_device_8008_0010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1867_6278, + pci_ss_list_8008_0010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1867_6282 = { - 0x6282, pci_device_1867_6282, +static const pciDeviceInfo pci_dev_info_8008_0011 = { + 0x0011, pci_device_8008_0011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1867_6282, + pci_ss_list_8008_0011, #else NULL, #endif 0 }; #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1888_0301 = { - 0x0301, pci_device_1888_0301, +static const pciDeviceInfo pci_dev_info_8086_0007 = { + 0x0007, pci_device_8086_0007, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1888_0301, + pci_ss_list_8086_0007, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1888_0601 = { - 0x0601, pci_device_1888_0601, +static const pciDeviceInfo pci_dev_info_8086_0008 = { + 0x0008, pci_device_8086_0008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1888_0601, + pci_ss_list_8086_0008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1888_0710 = { - 0x0710, pci_device_1888_0710, +static const pciDeviceInfo pci_dev_info_8086_0039 = { + 0x0039, pci_device_8086_0039, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1888_0710, + pci_ss_list_8086_0039, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1888_0720 = { - 0x0720, pci_device_1888_0720, +static const pciDeviceInfo pci_dev_info_8086_0122 = { + 0x0122, pci_device_8086_0122, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1888_0720, + pci_ss_list_8086_0122, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_18ac_d810 = { - 0xd810, pci_device_18ac_d810, +static const pciDeviceInfo pci_dev_info_8086_0309 = { + 0x0309, pci_device_8086_0309, #ifdef INIT_SUBSYS_INFO - pci_ss_list_18ac_d810, + pci_ss_list_8086_0309, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_18ca_0040 = { - 0x0040, pci_device_18ca_0040, +static const pciDeviceInfo pci_dev_info_8086_030d = { + 0x030d, pci_device_8086_030d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_18ca_0040, + pci_ss_list_8086_030d, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_18e6_0001 = { - 0x0001, pci_device_18e6_0001, +static const pciDeviceInfo pci_dev_info_8086_0326 = { + 0x0326, pci_device_8086_0326, #ifdef INIT_SUBSYS_INFO - pci_ss_list_18e6_0001, + pci_ss_list_8086_0326, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_18f7_0001 = { - 0x0001, pci_device_18f7_0001, +static const pciDeviceInfo pci_dev_info_8086_0327 = { + 0x0327, pci_device_8086_0327, #ifdef INIT_SUBSYS_INFO - pci_ss_list_18f7_0001, + pci_ss_list_8086_0327, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_18f7_0002 = { - 0x0002, pci_device_18f7_0002, +static const pciDeviceInfo pci_dev_info_8086_0329 = { + 0x0329, pci_device_8086_0329, #ifdef INIT_SUBSYS_INFO - pci_ss_list_18f7_0002, + pci_ss_list_8086_0329, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_18f7_0004 = { - 0x0004, pci_device_18f7_0004, +static const pciDeviceInfo pci_dev_info_8086_032a = { + 0x032a, pci_device_8086_032a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_18f7_0004, + pci_ss_list_8086_032a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_18f7_0005 = { - 0x0005, pci_device_18f7_0005, +static const pciDeviceInfo pci_dev_info_8086_032c = { + 0x032c, pci_device_8086_032c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_18f7_0005, + pci_ss_list_8086_032c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_18f7_000a = { - 0x000a, pci_device_18f7_000a, +static const pciDeviceInfo pci_dev_info_8086_0330 = { + 0x0330, pci_device_8086_0330, #ifdef INIT_SUBSYS_INFO - pci_ss_list_18f7_000a, + pci_ss_list_8086_0330, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1a08_0000 = { - 0x0000, pci_device_1a08_0000, +static const pciDeviceInfo pci_dev_info_8086_0331 = { + 0x0331, pci_device_8086_0331, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1a08_0000, + pci_ss_list_8086_0331, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1c1c_0001 = { - 0x0001, pci_device_1c1c_0001, +static const pciDeviceInfo pci_dev_info_8086_0332 = { + 0x0332, pci_device_8086_0332, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1c1c_0001, + pci_ss_list_8086_0332, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1d44_a400 = { - 0xa400, pci_device_1d44_a400, +static const pciDeviceInfo pci_dev_info_8086_0333 = { + 0x0333, pci_device_8086_0333, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1d44_a400, + pci_ss_list_8086_0333, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1de1_0391 = { - 0x0391, pci_device_1de1_0391, +static const pciDeviceInfo pci_dev_info_8086_0334 = { + 0x0334, pci_device_8086_0334, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1de1_0391, + pci_ss_list_8086_0334, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1de1_2020 = { - 0x2020, pci_device_1de1_2020, +static const pciDeviceInfo pci_dev_info_8086_0335 = { + 0x0335, pci_device_8086_0335, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1de1_2020, + pci_ss_list_8086_0335, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1de1_690c = { - 0x690c, pci_device_1de1_690c, +static const pciDeviceInfo pci_dev_info_8086_0336 = { + 0x0336, pci_device_8086_0336, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1de1_690c, + pci_ss_list_8086_0336, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_1de1_dc29 = { - 0xdc29, pci_device_1de1_dc29, +static const pciDeviceInfo pci_dev_info_8086_0340 = { + 0x0340, pci_device_8086_0340, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1de1_dc29, + pci_ss_list_8086_0340, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_1fc0_0300 = { - 0x0300, pci_device_1fc0_0300, +static const pciDeviceInfo pci_dev_info_8086_0341 = { + 0x0341, pci_device_8086_0341, #ifdef INIT_SUBSYS_INFO - pci_ss_list_1fc0_0300, + pci_ss_list_8086_0341, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_2348_2010 = { - 0x2010, pci_device_2348_2010, +static const pciDeviceInfo pci_dev_info_8086_0370 = { + 0x0370, pci_device_8086_0370, #ifdef INIT_SUBSYS_INFO - pci_ss_list_2348_2010, + pci_ss_list_8086_0370, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_3388_0013 = { - 0x0013, pci_device_3388_0013, +static const pciDeviceInfo pci_dev_info_8086_0371 = { + 0x0371, pci_device_8086_0371, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3388_0013, + pci_ss_list_8086_0371, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3388_0014 = { - 0x0014, pci_device_3388_0014, +static const pciDeviceInfo pci_dev_info_8086_0372 = { + 0x0372, pci_device_8086_0372, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3388_0014, + pci_ss_list_8086_0372, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3388_0020 = { - 0x0020, pci_device_3388_0020, +static const pciDeviceInfo pci_dev_info_8086_0373 = { + 0x0373, pci_device_8086_0373, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3388_0020, + pci_ss_list_8086_0373, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3388_0021 = { - 0x0021, pci_device_3388_0021, +static const pciDeviceInfo pci_dev_info_8086_0374 = { + 0x0374, pci_device_8086_0374, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3388_0021, + pci_ss_list_8086_0374, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3388_0022 = { - 0x0022, pci_device_3388_0022, +static const pciDeviceInfo pci_dev_info_8086_0482 = { + 0x0482, pci_device_8086_0482, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3388_0022, + pci_ss_list_8086_0482, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3388_0026 = { - 0x0026, pci_device_3388_0026, +static const pciDeviceInfo pci_dev_info_8086_0483 = { + 0x0483, pci_device_8086_0483, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3388_0026, + pci_ss_list_8086_0483, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3388_101a = { - 0x101a, pci_device_3388_101a, +static const pciDeviceInfo pci_dev_info_8086_0484 = { + 0x0484, pci_device_8086_0484, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3388_101a, + pci_ss_list_8086_0484, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3388_101b = { - 0x101b, pci_device_3388_101b, +static const pciDeviceInfo pci_dev_info_8086_0486 = { + 0x0486, pci_device_8086_0486, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3388_101b, + pci_ss_list_8086_0486, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3388_8011 = { - 0x8011, pci_device_3388_8011, +static const pciDeviceInfo pci_dev_info_8086_04a3 = { + 0x04a3, pci_device_8086_04a3, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3388_8011, + pci_ss_list_8086_04a3, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3388_8012 = { - 0x8012, pci_device_3388_8012, +static const pciDeviceInfo pci_dev_info_8086_04d0 = { + 0x04d0, pci_device_8086_04d0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3388_8012, + pci_ss_list_8086_04d0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3388_8013 = { - 0x8013, pci_device_3388_8013, +static const pciDeviceInfo pci_dev_info_8086_0500 = { + 0x0500, pci_device_8086_0500, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3388_8013, + pci_ss_list_8086_0500, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_3d3d_0001 = { - 0x0001, pci_device_3d3d_0001, +static const pciDeviceInfo pci_dev_info_8086_0501 = { + 0x0501, pci_device_8086_0501, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0001, + pci_ss_list_8086_0501, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0002 = { - 0x0002, pci_device_3d3d_0002, +static const pciDeviceInfo pci_dev_info_8086_0502 = { + 0x0502, pci_device_8086_0502, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0002, + pci_ss_list_8086_0502, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0003 = { - 0x0003, pci_device_3d3d_0003, +static const pciDeviceInfo pci_dev_info_8086_0503 = { + 0x0503, pci_device_8086_0503, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0003, + pci_ss_list_8086_0503, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0004 = { - 0x0004, pci_device_3d3d_0004, +static const pciDeviceInfo pci_dev_info_8086_0510 = { + 0x0510, pci_device_8086_0510, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0004, + pci_ss_list_8086_0510, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0005 = { - 0x0005, pci_device_3d3d_0005, +static const pciDeviceInfo pci_dev_info_8086_0511 = { + 0x0511, pci_device_8086_0511, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0005, + pci_ss_list_8086_0511, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0006 = { - 0x0006, pci_device_3d3d_0006, +static const pciDeviceInfo pci_dev_info_8086_0512 = { + 0x0512, pci_device_8086_0512, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0006, + pci_ss_list_8086_0512, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0007 = { - 0x0007, pci_device_3d3d_0007, +static const pciDeviceInfo pci_dev_info_8086_0513 = { + 0x0513, pci_device_8086_0513, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0007, + pci_ss_list_8086_0513, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0008 = { - 0x0008, pci_device_3d3d_0008, +static const pciDeviceInfo pci_dev_info_8086_0514 = { + 0x0514, pci_device_8086_0514, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0008, + pci_ss_list_8086_0514, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0009 = { - 0x0009, pci_device_3d3d_0009, +static const pciDeviceInfo pci_dev_info_8086_0515 = { + 0x0515, pci_device_8086_0515, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0009, + pci_ss_list_8086_0515, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_000a = { - 0x000a, pci_device_3d3d_000a, +static const pciDeviceInfo pci_dev_info_8086_0516 = { + 0x0516, pci_device_8086_0516, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_000a, + pci_ss_list_8086_0516, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_000c = { - 0x000c, pci_device_3d3d_000c, +static const pciDeviceInfo pci_dev_info_8086_0530 = { + 0x0530, pci_device_8086_0530, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_000c, + pci_ss_list_8086_0530, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_000d = { - 0x000d, pci_device_3d3d_000d, +static const pciDeviceInfo pci_dev_info_8086_0531 = { + 0x0531, pci_device_8086_0531, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_000d, + pci_ss_list_8086_0531, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0011 = { - 0x0011, pci_device_3d3d_0011, +static const pciDeviceInfo pci_dev_info_8086_0532 = { + 0x0532, pci_device_8086_0532, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0011, + pci_ss_list_8086_0532, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0012 = { - 0x0012, pci_device_3d3d_0012, +static const pciDeviceInfo pci_dev_info_8086_0533 = { + 0x0533, pci_device_8086_0533, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0012, + pci_ss_list_8086_0533, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0013 = { - 0x0013, pci_device_3d3d_0013, +static const pciDeviceInfo pci_dev_info_8086_0534 = { + 0x0534, pci_device_8086_0534, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0013, + pci_ss_list_8086_0534, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0020 = { - 0x0020, pci_device_3d3d_0020, +static const pciDeviceInfo pci_dev_info_8086_0535 = { + 0x0535, pci_device_8086_0535, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0020, + pci_ss_list_8086_0535, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0022 = { - 0x0022, pci_device_3d3d_0022, +static const pciDeviceInfo pci_dev_info_8086_0536 = { + 0x0536, pci_device_8086_0536, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0022, + pci_ss_list_8086_0536, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0024 = { - 0x0024, pci_device_3d3d_0024, +static const pciDeviceInfo pci_dev_info_8086_0537 = { + 0x0537, pci_device_8086_0537, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0024, + pci_ss_list_8086_0537, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_0100 = { - 0x0100, pci_device_3d3d_0100, +static const pciDeviceInfo pci_dev_info_8086_0600 = { + 0x0600, pci_device_8086_0600, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_0100, + pci_ss_list_8086_0600, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_07a1 = { - 0x07a1, pci_device_3d3d_07a1, +static const pciDeviceInfo pci_dev_info_8086_061f = { + 0x061f, pci_device_8086_061f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_07a1, + pci_ss_list_8086_061f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_07a2 = { - 0x07a2, pci_device_3d3d_07a2, +static const pciDeviceInfo pci_dev_info_8086_0960 = { + 0x0960, pci_device_8086_0960, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_07a2, + pci_ss_list_8086_0960, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_07a3 = { - 0x07a3, pci_device_3d3d_07a3, +static const pciDeviceInfo pci_dev_info_8086_0962 = { + 0x0962, pci_device_8086_0962, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_07a3, + pci_ss_list_8086_0962, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_1004 = { - 0x1004, pci_device_3d3d_1004, +static const pciDeviceInfo pci_dev_info_8086_0964 = { + 0x0964, pci_device_8086_0964, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_1004, + pci_ss_list_8086_0964, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_3d04 = { - 0x3d04, pci_device_3d3d_3d04, +static const pciDeviceInfo pci_dev_info_8086_1000 = { + 0x1000, pci_device_8086_1000, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_3d04, + pci_ss_list_8086_1000, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_3d3d_ffff = { - 0xffff, pci_device_3d3d_ffff, +static const pciDeviceInfo pci_dev_info_8086_1001 = { + 0x1001, pci_device_8086_1001, #ifdef INIT_SUBSYS_INFO - pci_ss_list_3d3d_ffff, + pci_ss_list_8086_1001, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_0300 = { - 0x0300, pci_device_4005_0300, +static const pciDeviceInfo pci_dev_info_8086_1002 = { + 0x1002, pci_device_8086_1002, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_0300, + pci_ss_list_8086_1002, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_0308 = { - 0x0308, pci_device_4005_0308, +static const pciDeviceInfo pci_dev_info_8086_1004 = { + 0x1004, pci_device_8086_1004, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_0308, + pci_ss_list_8086_1004, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_0309 = { - 0x0309, pci_device_4005_0309, +static const pciDeviceInfo pci_dev_info_8086_1008 = { + 0x1008, pci_device_8086_1008, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_0309, + pci_ss_list_8086_1008, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_1064 = { - 0x1064, pci_device_4005_1064, +static const pciDeviceInfo pci_dev_info_8086_1009 = { + 0x1009, pci_device_8086_1009, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_1064, + pci_ss_list_8086_1009, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_2064 = { - 0x2064, pci_device_4005_2064, +static const pciDeviceInfo pci_dev_info_8086_100a = { + 0x100a, pci_device_8086_100a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_2064, + pci_ss_list_8086_100a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_2128 = { - 0x2128, pci_device_4005_2128, +static const pciDeviceInfo pci_dev_info_8086_100c = { + 0x100c, pci_device_8086_100c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_2128, + pci_ss_list_8086_100c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_2301 = { - 0x2301, pci_device_4005_2301, +static const pciDeviceInfo pci_dev_info_8086_100d = { + 0x100d, pci_device_8086_100d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_2301, + pci_ss_list_8086_100d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_2302 = { - 0x2302, pci_device_4005_2302, +static const pciDeviceInfo pci_dev_info_8086_100e = { + 0x100e, pci_device_8086_100e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_2302, + pci_ss_list_8086_100e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_2303 = { - 0x2303, pci_device_4005_2303, +static const pciDeviceInfo pci_dev_info_8086_100f = { + 0x100f, pci_device_8086_100f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_2303, + pci_ss_list_8086_100f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_2364 = { - 0x2364, pci_device_4005_2364, +static const pciDeviceInfo pci_dev_info_8086_1010 = { + 0x1010, pci_device_8086_1010, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_2364, + pci_ss_list_8086_1010, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_2464 = { - 0x2464, pci_device_4005_2464, +static const pciDeviceInfo pci_dev_info_8086_1011 = { + 0x1011, pci_device_8086_1011, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_2464, + pci_ss_list_8086_1011, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_2501 = { - 0x2501, pci_device_4005_2501, +static const pciDeviceInfo pci_dev_info_8086_1012 = { + 0x1012, pci_device_8086_1012, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_2501, + pci_ss_list_8086_1012, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_4000 = { - 0x4000, pci_device_4005_4000, +static const pciDeviceInfo pci_dev_info_8086_1013 = { + 0x1013, pci_device_8086_1013, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_4000, + pci_ss_list_8086_1013, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4005_4710 = { - 0x4710, pci_device_4005_4710, +static const pciDeviceInfo pci_dev_info_8086_1014 = { + 0x1014, pci_device_8086_1014, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4005_4710, + pci_ss_list_8086_1014, #else NULL, #endif 0 }; -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_4033_1360 = { - 0x1360, pci_device_4033_1360, +static const pciDeviceInfo pci_dev_info_8086_1015 = { + 0x1015, pci_device_8086_1015, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4033_1360, + pci_ss_list_8086_1015, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_416c_0100 = { - 0x0100, pci_device_416c_0100, +static const pciDeviceInfo pci_dev_info_8086_1016 = { + 0x1016, pci_device_8086_1016, #ifdef INIT_SUBSYS_INFO - pci_ss_list_416c_0100, + pci_ss_list_8086_1016, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_416c_0200 = { - 0x0200, pci_device_416c_0200, +static const pciDeviceInfo pci_dev_info_8086_1017 = { + 0x1017, pci_device_8086_1017, #ifdef INIT_SUBSYS_INFO - pci_ss_list_416c_0200, + pci_ss_list_8086_1017, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_4444_0016 = { - 0x0016, pci_device_4444_0016, +static const pciDeviceInfo pci_dev_info_8086_1018 = { + 0x1018, pci_device_8086_1018, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4444_0016, + pci_ss_list_8086_1018, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4444_0803 = { - 0x0803, pci_device_4444_0803, +static const pciDeviceInfo pci_dev_info_8086_1019 = { + 0x1019, pci_device_8086_1019, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4444_0803, + pci_ss_list_8086_1019, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_4916_1960 = { - 0x1960, pci_device_4916_1960, +static const pciDeviceInfo pci_dev_info_8086_101a = { + 0x101a, pci_device_8086_101a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4916_1960, + pci_ss_list_8086_101a, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_494f_10e8 = { - 0x10e8, pci_device_494f_10e8, +static const pciDeviceInfo pci_dev_info_8086_101d = { + 0x101d, pci_device_8086_101d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_494f_10e8, + pci_ss_list_8086_101d, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_4a14_5000 = { - 0x5000, pci_device_4a14_5000, +static const pciDeviceInfo pci_dev_info_8086_101e = { + 0x101e, pci_device_8086_101e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4a14_5000, + pci_ss_list_8086_101e, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_4c53_0000 = { - 0x0000, pci_device_4c53_0000, +static const pciDeviceInfo pci_dev_info_8086_1026 = { + 0x1026, pci_device_8086_1026, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4c53_0000, + pci_ss_list_8086_1026, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4c53_0001 = { - 0x0001, pci_device_4c53_0001, +static const pciDeviceInfo pci_dev_info_8086_1027 = { + 0x1027, pci_device_8086_1027, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4c53_0001, + pci_ss_list_8086_1027, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_4d51_0200 = { - 0x0200, pci_device_4d51_0200, +static const pciDeviceInfo pci_dev_info_8086_1028 = { + 0x1028, pci_device_8086_1028, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4d51_0200, + pci_ss_list_8086_1028, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_4ddc_0100 = { - 0x0100, pci_device_4ddc_0100, +static const pciDeviceInfo pci_dev_info_8086_1029 = { + 0x1029, pci_device_8086_1029, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0100, + pci_ss_list_8086_1029, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0801 = { - 0x0801, pci_device_4ddc_0801, +static const pciDeviceInfo pci_dev_info_8086_1030 = { + 0x1030, pci_device_8086_1030, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0801, + pci_ss_list_8086_1030, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0802 = { - 0x0802, pci_device_4ddc_0802, +static const pciDeviceInfo pci_dev_info_8086_1031 = { + 0x1031, pci_device_8086_1031, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0802, + pci_ss_list_8086_1031, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0811 = { - 0x0811, pci_device_4ddc_0811, +static const pciDeviceInfo pci_dev_info_8086_1032 = { + 0x1032, pci_device_8086_1032, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0811, + pci_ss_list_8086_1032, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0812 = { - 0x0812, pci_device_4ddc_0812, +static const pciDeviceInfo pci_dev_info_8086_1033 = { + 0x1033, pci_device_8086_1033, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0812, + pci_ss_list_8086_1033, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0881 = { - 0x0881, pci_device_4ddc_0881, +static const pciDeviceInfo pci_dev_info_8086_1034 = { + 0x1034, pci_device_8086_1034, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0881, + pci_ss_list_8086_1034, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0882 = { - 0x0882, pci_device_4ddc_0882, +static const pciDeviceInfo pci_dev_info_8086_1035 = { + 0x1035, pci_device_8086_1035, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0882, + pci_ss_list_8086_1035, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0891 = { - 0x0891, pci_device_4ddc_0891, +static const pciDeviceInfo pci_dev_info_8086_1036 = { + 0x1036, pci_device_8086_1036, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0891, + pci_ss_list_8086_1036, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0892 = { - 0x0892, pci_device_4ddc_0892, +static const pciDeviceInfo pci_dev_info_8086_1037 = { + 0x1037, pci_device_8086_1037, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0892, + pci_ss_list_8086_1037, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0901 = { - 0x0901, pci_device_4ddc_0901, +static const pciDeviceInfo pci_dev_info_8086_1038 = { + 0x1038, pci_device_8086_1038, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0901, + pci_ss_list_8086_1038, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0902 = { - 0x0902, pci_device_4ddc_0902, +static const pciDeviceInfo pci_dev_info_8086_1039 = { + 0x1039, pci_device_8086_1039, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0902, + pci_ss_list_8086_1039, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0903 = { - 0x0903, pci_device_4ddc_0903, +static const pciDeviceInfo pci_dev_info_8086_103a = { + 0x103a, pci_device_8086_103a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0903, + pci_ss_list_8086_103a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0904 = { - 0x0904, pci_device_4ddc_0904, +static const pciDeviceInfo pci_dev_info_8086_103b = { + 0x103b, pci_device_8086_103b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0904, + pci_ss_list_8086_103b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0b01 = { - 0x0b01, pci_device_4ddc_0b01, +static const pciDeviceInfo pci_dev_info_8086_103c = { + 0x103c, pci_device_8086_103c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0b01, + pci_ss_list_8086_103c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0b02 = { - 0x0b02, pci_device_4ddc_0b02, +static const pciDeviceInfo pci_dev_info_8086_103d = { + 0x103d, pci_device_8086_103d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0b02, + pci_ss_list_8086_103d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0b03 = { - 0x0b03, pci_device_4ddc_0b03, +static const pciDeviceInfo pci_dev_info_8086_103e = { + 0x103e, pci_device_8086_103e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0b03, + pci_ss_list_8086_103e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_4ddc_0b04 = { - 0x0b04, pci_device_4ddc_0b04, +static const pciDeviceInfo pci_dev_info_8086_1040 = { + 0x1040, pci_device_8086_1040, #ifdef INIT_SUBSYS_INFO - pci_ss_list_4ddc_0b04, + pci_ss_list_8086_1040, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_5046_1001 = { - 0x1001, pci_device_5046_1001, +static const pciDeviceInfo pci_dev_info_8086_1043 = { + 0x1043, pci_device_8086_1043, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5046_1001, + pci_ss_list_8086_1043, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_5053_2010 = { - 0x2010, pci_device_5053_2010, +static const pciDeviceInfo pci_dev_info_8086_1048 = { + 0x1048, pci_device_8086_1048, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5053_2010, + pci_ss_list_8086_1048, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_5145_3031 = { - 0x3031, pci_device_5145_3031, +static const pciDeviceInfo pci_dev_info_8086_104b = { + 0x104b, pci_device_8086_104b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5145_3031, + pci_ss_list_8086_104b, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_5301_0001 = { - 0x0001, pci_device_5301_0001, +static const pciDeviceInfo pci_dev_info_8086_1050 = { + 0x1050, pci_device_8086_1050, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5301_0001, + pci_ss_list_8086_1050, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_5333_0551 = { - 0x0551, pci_device_5333_0551, +static const pciDeviceInfo pci_dev_info_8086_1051 = { + 0x1051, pci_device_8086_1051, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_0551, + pci_ss_list_8086_1051, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_5631 = { - 0x5631, pci_device_5333_5631, +static const pciDeviceInfo pci_dev_info_8086_1052 = { + 0x1052, pci_device_8086_1052, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_5631, + pci_ss_list_8086_1052, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8800 = { - 0x8800, pci_device_5333_8800, +static const pciDeviceInfo pci_dev_info_8086_1053 = { + 0x1053, pci_device_8086_1053, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8800, + pci_ss_list_8086_1053, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8801 = { - 0x8801, pci_device_5333_8801, +static const pciDeviceInfo pci_dev_info_8086_1059 = { + 0x1059, pci_device_8086_1059, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8801, + pci_ss_list_8086_1059, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8810 = { - 0x8810, pci_device_5333_8810, +static const pciDeviceInfo pci_dev_info_8086_105e = { + 0x105e, pci_device_8086_105e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8810, + pci_ss_list_8086_105e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8811 = { - 0x8811, pci_device_5333_8811, +static const pciDeviceInfo pci_dev_info_8086_105f = { + 0x105f, pci_device_8086_105f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8811, + pci_ss_list_8086_105f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8812 = { - 0x8812, pci_device_5333_8812, +static const pciDeviceInfo pci_dev_info_8086_1060 = { + 0x1060, pci_device_8086_1060, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8812, + pci_ss_list_8086_1060, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8813 = { - 0x8813, pci_device_5333_8813, +static const pciDeviceInfo pci_dev_info_8086_1064 = { + 0x1064, pci_device_8086_1064, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8813, + pci_ss_list_8086_1064, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8814 = { - 0x8814, pci_device_5333_8814, +static const pciDeviceInfo pci_dev_info_8086_1065 = { + 0x1065, pci_device_8086_1065, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8814, + pci_ss_list_8086_1065, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8815 = { - 0x8815, pci_device_5333_8815, +static const pciDeviceInfo pci_dev_info_8086_1066 = { + 0x1066, pci_device_8086_1066, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8815, + pci_ss_list_8086_1066, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_883d = { - 0x883d, pci_device_5333_883d, +static const pciDeviceInfo pci_dev_info_8086_1067 = { + 0x1067, pci_device_8086_1067, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_883d, + pci_ss_list_8086_1067, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8870 = { - 0x8870, pci_device_5333_8870, +static const pciDeviceInfo pci_dev_info_8086_1068 = { + 0x1068, pci_device_8086_1068, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8870, + pci_ss_list_8086_1068, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8880 = { - 0x8880, pci_device_5333_8880, +static const pciDeviceInfo pci_dev_info_8086_1069 = { + 0x1069, pci_device_8086_1069, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8880, + pci_ss_list_8086_1069, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8881 = { - 0x8881, pci_device_5333_8881, +static const pciDeviceInfo pci_dev_info_8086_106a = { + 0x106a, pci_device_8086_106a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8881, + pci_ss_list_8086_106a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8882 = { - 0x8882, pci_device_5333_8882, +static const pciDeviceInfo pci_dev_info_8086_106b = { + 0x106b, pci_device_8086_106b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8882, + pci_ss_list_8086_106b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8883 = { - 0x8883, pci_device_5333_8883, +static const pciDeviceInfo pci_dev_info_8086_1075 = { + 0x1075, pci_device_8086_1075, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8883, + pci_ss_list_8086_1075, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88b0 = { - 0x88b0, pci_device_5333_88b0, +static const pciDeviceInfo pci_dev_info_8086_1076 = { + 0x1076, pci_device_8086_1076, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88b0, + pci_ss_list_8086_1076, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88b1 = { - 0x88b1, pci_device_5333_88b1, +static const pciDeviceInfo pci_dev_info_8086_1077 = { + 0x1077, pci_device_8086_1077, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88b1, + pci_ss_list_8086_1077, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88b2 = { - 0x88b2, pci_device_5333_88b2, +static const pciDeviceInfo pci_dev_info_8086_1078 = { + 0x1078, pci_device_8086_1078, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88b2, + pci_ss_list_8086_1078, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88b3 = { - 0x88b3, pci_device_5333_88b3, +static const pciDeviceInfo pci_dev_info_8086_1079 = { + 0x1079, pci_device_8086_1079, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88b3, + pci_ss_list_8086_1079, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88c0 = { - 0x88c0, pci_device_5333_88c0, +static const pciDeviceInfo pci_dev_info_8086_107a = { + 0x107a, pci_device_8086_107a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88c0, + pci_ss_list_8086_107a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88c1 = { - 0x88c1, pci_device_5333_88c1, +static const pciDeviceInfo pci_dev_info_8086_107b = { + 0x107b, pci_device_8086_107b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88c1, + pci_ss_list_8086_107b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88c2 = { - 0x88c2, pci_device_5333_88c2, +static const pciDeviceInfo pci_dev_info_8086_107c = { + 0x107c, pci_device_8086_107c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88c2, + pci_ss_list_8086_107c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88c3 = { - 0x88c3, pci_device_5333_88c3, +static const pciDeviceInfo pci_dev_info_8086_107d = { + 0x107d, pci_device_8086_107d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88c3, + pci_ss_list_8086_107d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88d0 = { - 0x88d0, pci_device_5333_88d0, +static const pciDeviceInfo pci_dev_info_8086_107e = { + 0x107e, pci_device_8086_107e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88d0, + pci_ss_list_8086_107e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88d1 = { - 0x88d1, pci_device_5333_88d1, +static const pciDeviceInfo pci_dev_info_8086_107f = { + 0x107f, pci_device_8086_107f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88d1, + pci_ss_list_8086_107f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88d2 = { - 0x88d2, pci_device_5333_88d2, +static const pciDeviceInfo pci_dev_info_8086_1080 = { + 0x1080, pci_device_8086_1080, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88d2, + pci_ss_list_8086_1080, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88d3 = { - 0x88d3, pci_device_5333_88d3, +static const pciDeviceInfo pci_dev_info_8086_1081 = { + 0x1081, pci_device_8086_1081, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88d3, + pci_ss_list_8086_1081, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88f0 = { - 0x88f0, pci_device_5333_88f0, +static const pciDeviceInfo pci_dev_info_8086_1082 = { + 0x1082, pci_device_8086_1082, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88f0, + pci_ss_list_8086_1082, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88f1 = { - 0x88f1, pci_device_5333_88f1, +static const pciDeviceInfo pci_dev_info_8086_1083 = { + 0x1083, pci_device_8086_1083, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88f1, + pci_ss_list_8086_1083, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88f2 = { - 0x88f2, pci_device_5333_88f2, +static const pciDeviceInfo pci_dev_info_8086_1084 = { + 0x1084, pci_device_8086_1084, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88f2, + pci_ss_list_8086_1084, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_88f3 = { - 0x88f3, pci_device_5333_88f3, +static const pciDeviceInfo pci_dev_info_8086_1085 = { + 0x1085, pci_device_8086_1085, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_88f3, + pci_ss_list_8086_1085, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8900 = { - 0x8900, pci_device_5333_8900, +static const pciDeviceInfo pci_dev_info_8086_1086 = { + 0x1086, pci_device_8086_1086, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8900, + pci_ss_list_8086_1086, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8901 = { - 0x8901, pci_device_5333_8901, +static const pciDeviceInfo pci_dev_info_8086_1087 = { + 0x1087, pci_device_8086_1087, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8901, + pci_ss_list_8086_1087, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8902 = { - 0x8902, pci_device_5333_8902, +static const pciDeviceInfo pci_dev_info_8086_1089 = { + 0x1089, pci_device_8086_1089, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8902, + pci_ss_list_8086_1089, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8903 = { - 0x8903, pci_device_5333_8903, +static const pciDeviceInfo pci_dev_info_8086_108a = { + 0x108a, pci_device_8086_108a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8903, + pci_ss_list_8086_108a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8904 = { - 0x8904, pci_device_5333_8904, +static const pciDeviceInfo pci_dev_info_8086_108b = { + 0x108b, pci_device_8086_108b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8904, + pci_ss_list_8086_108b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8905 = { - 0x8905, pci_device_5333_8905, +static const pciDeviceInfo pci_dev_info_8086_108c = { + 0x108c, pci_device_8086_108c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8905, + pci_ss_list_8086_108c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8906 = { - 0x8906, pci_device_5333_8906, +static const pciDeviceInfo pci_dev_info_8086_108e = { + 0x108e, pci_device_8086_108e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8906, + pci_ss_list_8086_108e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8907 = { - 0x8907, pci_device_5333_8907, +static const pciDeviceInfo pci_dev_info_8086_108f = { + 0x108f, pci_device_8086_108f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8907, + pci_ss_list_8086_108f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8908 = { - 0x8908, pci_device_5333_8908, +static const pciDeviceInfo pci_dev_info_8086_1092 = { + 0x1092, pci_device_8086_1092, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8908, + pci_ss_list_8086_1092, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8909 = { - 0x8909, pci_device_5333_8909, +static const pciDeviceInfo pci_dev_info_8086_1096 = { + 0x1096, pci_device_8086_1096, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8909, + pci_ss_list_8086_1096, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_890a = { - 0x890a, pci_device_5333_890a, +static const pciDeviceInfo pci_dev_info_8086_1097 = { + 0x1097, pci_device_8086_1097, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_890a, + pci_ss_list_8086_1097, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_890b = { - 0x890b, pci_device_5333_890b, +static const pciDeviceInfo pci_dev_info_8086_1098 = { + 0x1098, pci_device_8086_1098, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_890b, + pci_ss_list_8086_1098, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_890c = { - 0x890c, pci_device_5333_890c, +static const pciDeviceInfo pci_dev_info_8086_1099 = { + 0x1099, pci_device_8086_1099, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_890c, + pci_ss_list_8086_1099, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_890d = { - 0x890d, pci_device_5333_890d, +static const pciDeviceInfo pci_dev_info_8086_109a = { + 0x109a, pci_device_8086_109a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_890d, + pci_ss_list_8086_109a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_890e = { - 0x890e, pci_device_5333_890e, +static const pciDeviceInfo pci_dev_info_8086_109b = { + 0x109b, pci_device_8086_109b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_890e, + pci_ss_list_8086_109b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_890f = { - 0x890f, pci_device_5333_890f, +static const pciDeviceInfo pci_dev_info_8086_10a0 = { + 0x10a0, pci_device_8086_10a0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_890f, + pci_ss_list_8086_10a0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8a01 = { - 0x8a01, pci_device_5333_8a01, +static const pciDeviceInfo pci_dev_info_8086_10a1 = { + 0x10a1, pci_device_8086_10a1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8a01, + pci_ss_list_8086_10a1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8a10 = { - 0x8a10, pci_device_5333_8a10, +static const pciDeviceInfo pci_dev_info_8086_10b0 = { + 0x10b0, pci_device_8086_10b0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8a10, + pci_ss_list_8086_10b0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8a13 = { - 0x8a13, pci_device_5333_8a13, +static const pciDeviceInfo pci_dev_info_8086_10b2 = { + 0x10b2, pci_device_8086_10b2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8a13, + pci_ss_list_8086_10b2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8a20 = { - 0x8a20, pci_device_5333_8a20, +static const pciDeviceInfo pci_dev_info_8086_10b3 = { + 0x10b3, pci_device_8086_10b3, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8a20, + pci_ss_list_8086_10b3, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8a21 = { - 0x8a21, pci_device_5333_8a21, +static const pciDeviceInfo pci_dev_info_8086_10b4 = { + 0x10b4, pci_device_8086_10b4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8a21, + pci_ss_list_8086_10b4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8a22 = { - 0x8a22, pci_device_5333_8a22, +static const pciDeviceInfo pci_dev_info_8086_10b5 = { + 0x10b5, pci_device_8086_10b5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8a22, + pci_ss_list_8086_10b5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8a23 = { - 0x8a23, pci_device_5333_8a23, +static const pciDeviceInfo pci_dev_info_8086_1107 = { + 0x1107, pci_device_8086_1107, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8a23, + pci_ss_list_8086_1107, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8a25 = { - 0x8a25, pci_device_5333_8a25, +static const pciDeviceInfo pci_dev_info_8086_1130 = { + 0x1130, pci_device_8086_1130, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8a25, + pci_ss_list_8086_1130, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8a26 = { - 0x8a26, pci_device_5333_8a26, +static const pciDeviceInfo pci_dev_info_8086_1131 = { + 0x1131, pci_device_8086_1131, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8a26, + pci_ss_list_8086_1131, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c00 = { - 0x8c00, pci_device_5333_8c00, +static const pciDeviceInfo pci_dev_info_8086_1132 = { + 0x1132, pci_device_8086_1132, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c00, + pci_ss_list_8086_1132, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c01 = { - 0x8c01, pci_device_5333_8c01, +static const pciDeviceInfo pci_dev_info_8086_1161 = { + 0x1161, pci_device_8086_1161, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c01, + pci_ss_list_8086_1161, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c02 = { - 0x8c02, pci_device_5333_8c02, +static const pciDeviceInfo pci_dev_info_8086_1162 = { + 0x1162, pci_device_8086_1162, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c02, + pci_ss_list_8086_1162, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c03 = { - 0x8c03, pci_device_5333_8c03, +static const pciDeviceInfo pci_dev_info_8086_1200 = { + 0x1200, pci_device_8086_1200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c03, + pci_ss_list_8086_1200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c10 = { - 0x8c10, pci_device_5333_8c10, +static const pciDeviceInfo pci_dev_info_8086_1209 = { + 0x1209, pci_device_8086_1209, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c10, + pci_ss_list_8086_1209, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c11 = { - 0x8c11, pci_device_5333_8c11, +static const pciDeviceInfo pci_dev_info_8086_1221 = { + 0x1221, pci_device_8086_1221, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c11, + pci_ss_list_8086_1221, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c12 = { - 0x8c12, pci_device_5333_8c12, +static const pciDeviceInfo pci_dev_info_8086_1222 = { + 0x1222, pci_device_8086_1222, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c12, + pci_ss_list_8086_1222, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c13 = { - 0x8c13, pci_device_5333_8c13, +static const pciDeviceInfo pci_dev_info_8086_1223 = { + 0x1223, pci_device_8086_1223, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c13, + pci_ss_list_8086_1223, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c22 = { - 0x8c22, pci_device_5333_8c22, +static const pciDeviceInfo pci_dev_info_8086_1225 = { + 0x1225, pci_device_8086_1225, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c22, + pci_ss_list_8086_1225, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c24 = { - 0x8c24, pci_device_5333_8c24, +static const pciDeviceInfo pci_dev_info_8086_1226 = { + 0x1226, pci_device_8086_1226, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c24, + pci_ss_list_8086_1226, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c26 = { - 0x8c26, pci_device_5333_8c26, +static const pciDeviceInfo pci_dev_info_8086_1227 = { + 0x1227, pci_device_8086_1227, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c26, + pci_ss_list_8086_1227, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c2a = { - 0x8c2a, pci_device_5333_8c2a, +static const pciDeviceInfo pci_dev_info_8086_1228 = { + 0x1228, pci_device_8086_1228, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c2a, + pci_ss_list_8086_1228, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c2b = { - 0x8c2b, pci_device_5333_8c2b, +static const pciDeviceInfo pci_dev_info_8086_1229 = { + 0x1229, pci_device_8086_1229, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c2b, + pci_ss_list_8086_1229, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c2c = { - 0x8c2c, pci_device_5333_8c2c, +static const pciDeviceInfo pci_dev_info_8086_122d = { + 0x122d, pci_device_8086_122d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c2c, + pci_ss_list_8086_122d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c2d = { - 0x8c2d, pci_device_5333_8c2d, +static const pciDeviceInfo pci_dev_info_8086_122e = { + 0x122e, pci_device_8086_122e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c2d, + pci_ss_list_8086_122e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c2e = { - 0x8c2e, pci_device_5333_8c2e, +static const pciDeviceInfo pci_dev_info_8086_1230 = { + 0x1230, pci_device_8086_1230, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c2e, + pci_ss_list_8086_1230, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8c2f = { - 0x8c2f, pci_device_5333_8c2f, +static const pciDeviceInfo pci_dev_info_8086_1231 = { + 0x1231, pci_device_8086_1231, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8c2f, + pci_ss_list_8086_1231, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8d01 = { - 0x8d01, pci_device_5333_8d01, +static const pciDeviceInfo pci_dev_info_8086_1234 = { + 0x1234, pci_device_8086_1234, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8d01, + pci_ss_list_8086_1234, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8d02 = { - 0x8d02, pci_device_5333_8d02, +static const pciDeviceInfo pci_dev_info_8086_1235 = { + 0x1235, pci_device_8086_1235, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8d02, + pci_ss_list_8086_1235, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8d03 = { - 0x8d03, pci_device_5333_8d03, +static const pciDeviceInfo pci_dev_info_8086_1237 = { + 0x1237, pci_device_8086_1237, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8d03, + pci_ss_list_8086_1237, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_8d04 = { - 0x8d04, pci_device_5333_8d04, +static const pciDeviceInfo pci_dev_info_8086_1239 = { + 0x1239, pci_device_8086_1239, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_8d04, + pci_ss_list_8086_1239, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_9102 = { - 0x9102, pci_device_5333_9102, +static const pciDeviceInfo pci_dev_info_8086_123b = { + 0x123b, pci_device_8086_123b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_9102, + pci_ss_list_8086_123b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_5333_ca00 = { - 0xca00, pci_device_5333_ca00, +static const pciDeviceInfo pci_dev_info_8086_123c = { + 0x123c, pci_device_8086_123c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5333_ca00, + pci_ss_list_8086_123c, #else NULL, #endif 0 }; -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_544c_0350 = { - 0x0350, pci_device_544c_0350, +static const pciDeviceInfo pci_dev_info_8086_123d = { + 0x123d, pci_device_8086_123d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_544c_0350, + pci_ss_list_8086_123d, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_5455_4458 = { - 0x4458, pci_device_5455_4458, +static const pciDeviceInfo pci_dev_info_8086_123e = { + 0x123e, pci_device_8086_123e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5455_4458, + pci_ss_list_8086_123e, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_5544_0001 = { - 0x0001, pci_device_5544_0001, +static const pciDeviceInfo pci_dev_info_8086_123f = { + 0x123f, pci_device_8086_123f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5544_0001, + pci_ss_list_8086_123f, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_5555_0003 = { - 0x0003, pci_device_5555_0003, +static const pciDeviceInfo pci_dev_info_8086_1240 = { + 0x1240, pci_device_8086_1240, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5555_0003, + pci_ss_list_8086_1240, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_5654_3132 = { - 0x3132, pci_device_5654_3132, +static const pciDeviceInfo pci_dev_info_8086_124b = { + 0x124b, pci_device_8086_124b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_5654_3132, + pci_ss_list_8086_124b, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_6374_6773 = { - 0x6773, pci_device_6374_6773, +static const pciDeviceInfo pci_dev_info_8086_1250 = { + 0x1250, pci_device_8086_1250, #ifdef INIT_SUBSYS_INFO - pci_ss_list_6374_6773, + pci_ss_list_8086_1250, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_6666_0001 = { - 0x0001, pci_device_6666_0001, +static const pciDeviceInfo pci_dev_info_8086_1360 = { + 0x1360, pci_device_8086_1360, #ifdef INIT_SUBSYS_INFO - pci_ss_list_6666_0001, + pci_ss_list_8086_1360, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_6666_0002 = { - 0x0002, pci_device_6666_0002, +static const pciDeviceInfo pci_dev_info_8086_1361 = { + 0x1361, pci_device_8086_1361, #ifdef INIT_SUBSYS_INFO - pci_ss_list_6666_0002, + pci_ss_list_8086_1361, #else NULL, #endif 0 }; -#endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_8008_0010 = { - 0x0010, pci_device_8008_0010, +static const pciDeviceInfo pci_dev_info_8086_1460 = { + 0x1460, pci_device_8086_1460, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8008_0010, + pci_ss_list_8086_1460, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8008_0011 = { - 0x0011, pci_device_8008_0011, +static const pciDeviceInfo pci_dev_info_8086_1461 = { + 0x1461, pci_device_8086_1461, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8008_0011, + pci_ss_list_8086_1461, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_8086_0007 = { - 0x0007, pci_device_8086_0007, +static const pciDeviceInfo pci_dev_info_8086_1462 = { + 0x1462, pci_device_8086_1462, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0007, + pci_ss_list_8086_1462, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0008 = { - 0x0008, pci_device_8086_0008, +static const pciDeviceInfo pci_dev_info_8086_1960 = { + 0x1960, pci_device_8086_1960, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0008, + pci_ss_list_8086_1960, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0039 = { - 0x0039, pci_device_8086_0039, +static const pciDeviceInfo pci_dev_info_8086_1962 = { + 0x1962, pci_device_8086_1962, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0039, + pci_ss_list_8086_1962, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0122 = { - 0x0122, pci_device_8086_0122, +static const pciDeviceInfo pci_dev_info_8086_1a21 = { + 0x1a21, pci_device_8086_1a21, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0122, + pci_ss_list_8086_1a21, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0309 = { - 0x0309, pci_device_8086_0309, +static const pciDeviceInfo pci_dev_info_8086_1a23 = { + 0x1a23, pci_device_8086_1a23, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0309, + pci_ss_list_8086_1a23, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_030d = { - 0x030d, pci_device_8086_030d, +static const pciDeviceInfo pci_dev_info_8086_1a24 = { + 0x1a24, pci_device_8086_1a24, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_030d, + pci_ss_list_8086_1a24, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0326 = { - 0x0326, pci_device_8086_0326, +static const pciDeviceInfo pci_dev_info_8086_1a30 = { + 0x1a30, pci_device_8086_1a30, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0326, + pci_ss_list_8086_1a30, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0327 = { - 0x0327, pci_device_8086_0327, +static const pciDeviceInfo pci_dev_info_8086_1a31 = { + 0x1a31, pci_device_8086_1a31, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0327, + pci_ss_list_8086_1a31, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0329 = { - 0x0329, pci_device_8086_0329, +static const pciDeviceInfo pci_dev_info_8086_1a38 = { + 0x1a38, pci_device_8086_1a38, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0329, + pci_ss_list_8086_1a38, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_032a = { - 0x032a, pci_device_8086_032a, +static const pciDeviceInfo pci_dev_info_8086_1a48 = { + 0x1a48, pci_device_8086_1a48, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_032a, + pci_ss_list_8086_1a48, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_032c = { - 0x032c, pci_device_8086_032c, +static const pciDeviceInfo pci_dev_info_8086_2410 = { + 0x2410, pci_device_8086_2410, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_032c, + pci_ss_list_8086_2410, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0330 = { - 0x0330, pci_device_8086_0330, +static const pciDeviceInfo pci_dev_info_8086_2411 = { + 0x2411, pci_device_8086_2411, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0330, + pci_ss_list_8086_2411, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0331 = { - 0x0331, pci_device_8086_0331, +static const pciDeviceInfo pci_dev_info_8086_2412 = { + 0x2412, pci_device_8086_2412, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0331, + pci_ss_list_8086_2412, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0332 = { - 0x0332, pci_device_8086_0332, +static const pciDeviceInfo pci_dev_info_8086_2413 = { + 0x2413, pci_device_8086_2413, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0332, + pci_ss_list_8086_2413, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0333 = { - 0x0333, pci_device_8086_0333, +static const pciDeviceInfo pci_dev_info_8086_2415 = { + 0x2415, pci_device_8086_2415, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0333, + pci_ss_list_8086_2415, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0334 = { - 0x0334, pci_device_8086_0334, +static const pciDeviceInfo pci_dev_info_8086_2416 = { + 0x2416, pci_device_8086_2416, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0334, + pci_ss_list_8086_2416, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0335 = { - 0x0335, pci_device_8086_0335, +static const pciDeviceInfo pci_dev_info_8086_2418 = { + 0x2418, pci_device_8086_2418, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0335, + pci_ss_list_8086_2418, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0336 = { - 0x0336, pci_device_8086_0336, +static const pciDeviceInfo pci_dev_info_8086_2420 = { + 0x2420, pci_device_8086_2420, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0336, + pci_ss_list_8086_2420, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0340 = { - 0x0340, pci_device_8086_0340, +static const pciDeviceInfo pci_dev_info_8086_2421 = { + 0x2421, pci_device_8086_2421, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0340, + pci_ss_list_8086_2421, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0341 = { - 0x0341, pci_device_8086_0341, +static const pciDeviceInfo pci_dev_info_8086_2422 = { + 0x2422, pci_device_8086_2422, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0341, + pci_ss_list_8086_2422, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0482 = { - 0x0482, pci_device_8086_0482, +static const pciDeviceInfo pci_dev_info_8086_2423 = { + 0x2423, pci_device_8086_2423, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0482, + pci_ss_list_8086_2423, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0483 = { - 0x0483, pci_device_8086_0483, +static const pciDeviceInfo pci_dev_info_8086_2425 = { + 0x2425, pci_device_8086_2425, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0483, + pci_ss_list_8086_2425, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0484 = { - 0x0484, pci_device_8086_0484, +static const pciDeviceInfo pci_dev_info_8086_2426 = { + 0x2426, pci_device_8086_2426, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0484, + pci_ss_list_8086_2426, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0486 = { - 0x0486, pci_device_8086_0486, +static const pciDeviceInfo pci_dev_info_8086_2428 = { + 0x2428, pci_device_8086_2428, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0486, + pci_ss_list_8086_2428, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_04a3 = { - 0x04a3, pci_device_8086_04a3, +static const pciDeviceInfo pci_dev_info_8086_2440 = { + 0x2440, pci_device_8086_2440, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_04a3, + pci_ss_list_8086_2440, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_04d0 = { - 0x04d0, pci_device_8086_04d0, +static const pciDeviceInfo pci_dev_info_8086_2442 = { + 0x2442, pci_device_8086_2442, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_04d0, + pci_ss_list_8086_2442, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0500 = { - 0x0500, pci_device_8086_0500, +static const pciDeviceInfo pci_dev_info_8086_2443 = { + 0x2443, pci_device_8086_2443, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0500, + pci_ss_list_8086_2443, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0501 = { - 0x0501, pci_device_8086_0501, +static const pciDeviceInfo pci_dev_info_8086_2444 = { + 0x2444, pci_device_8086_2444, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0501, + pci_ss_list_8086_2444, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0502 = { - 0x0502, pci_device_8086_0502, +static const pciDeviceInfo pci_dev_info_8086_2445 = { + 0x2445, pci_device_8086_2445, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0502, + pci_ss_list_8086_2445, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0503 = { - 0x0503, pci_device_8086_0503, +static const pciDeviceInfo pci_dev_info_8086_2446 = { + 0x2446, pci_device_8086_2446, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0503, + pci_ss_list_8086_2446, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0510 = { - 0x0510, pci_device_8086_0510, +static const pciDeviceInfo pci_dev_info_8086_2448 = { + 0x2448, pci_device_8086_2448, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0510, + pci_ss_list_8086_2448, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0511 = { - 0x0511, pci_device_8086_0511, +static const pciDeviceInfo pci_dev_info_8086_2449 = { + 0x2449, pci_device_8086_2449, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0511, + pci_ss_list_8086_2449, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0512 = { - 0x0512, pci_device_8086_0512, +static const pciDeviceInfo pci_dev_info_8086_244a = { + 0x244a, pci_device_8086_244a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0512, + pci_ss_list_8086_244a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0513 = { - 0x0513, pci_device_8086_0513, +static const pciDeviceInfo pci_dev_info_8086_244b = { + 0x244b, pci_device_8086_244b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0513, + pci_ss_list_8086_244b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0514 = { - 0x0514, pci_device_8086_0514, +static const pciDeviceInfo pci_dev_info_8086_244c = { + 0x244c, pci_device_8086_244c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0514, + pci_ss_list_8086_244c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0515 = { - 0x0515, pci_device_8086_0515, +static const pciDeviceInfo pci_dev_info_8086_244e = { + 0x244e, pci_device_8086_244e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0515, + pci_ss_list_8086_244e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0516 = { - 0x0516, pci_device_8086_0516, +static const pciDeviceInfo pci_dev_info_8086_2450 = { + 0x2450, pci_device_8086_2450, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0516, + pci_ss_list_8086_2450, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0530 = { - 0x0530, pci_device_8086_0530, +static const pciDeviceInfo pci_dev_info_8086_2452 = { + 0x2452, pci_device_8086_2452, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0530, + pci_ss_list_8086_2452, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0531 = { - 0x0531, pci_device_8086_0531, +static const pciDeviceInfo pci_dev_info_8086_2453 = { + 0x2453, pci_device_8086_2453, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0531, + pci_ss_list_8086_2453, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0532 = { - 0x0532, pci_device_8086_0532, +static const pciDeviceInfo pci_dev_info_8086_2459 = { + 0x2459, pci_device_8086_2459, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0532, + pci_ss_list_8086_2459, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0533 = { - 0x0533, pci_device_8086_0533, +static const pciDeviceInfo pci_dev_info_8086_245b = { + 0x245b, pci_device_8086_245b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0533, + pci_ss_list_8086_245b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0534 = { - 0x0534, pci_device_8086_0534, +static const pciDeviceInfo pci_dev_info_8086_245d = { + 0x245d, pci_device_8086_245d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0534, + pci_ss_list_8086_245d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0535 = { - 0x0535, pci_device_8086_0535, +static const pciDeviceInfo pci_dev_info_8086_245e = { + 0x245e, pci_device_8086_245e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0535, + pci_ss_list_8086_245e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0536 = { - 0x0536, pci_device_8086_0536, +static const pciDeviceInfo pci_dev_info_8086_2480 = { + 0x2480, pci_device_8086_2480, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0536, + pci_ss_list_8086_2480, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0537 = { - 0x0537, pci_device_8086_0537, +static const pciDeviceInfo pci_dev_info_8086_2482 = { + 0x2482, pci_device_8086_2482, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0537, + pci_ss_list_8086_2482, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0600 = { - 0x0600, pci_device_8086_0600, +static const pciDeviceInfo pci_dev_info_8086_2483 = { + 0x2483, pci_device_8086_2483, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0600, + pci_ss_list_8086_2483, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_061f = { - 0x061f, pci_device_8086_061f, +static const pciDeviceInfo pci_dev_info_8086_2484 = { + 0x2484, pci_device_8086_2484, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_061f, + pci_ss_list_8086_2484, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0960 = { - 0x0960, pci_device_8086_0960, +static const pciDeviceInfo pci_dev_info_8086_2485 = { + 0x2485, pci_device_8086_2485, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0960, + pci_ss_list_8086_2485, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0962 = { - 0x0962, pci_device_8086_0962, +static const pciDeviceInfo pci_dev_info_8086_2486 = { + 0x2486, pci_device_8086_2486, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0962, + pci_ss_list_8086_2486, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_0964 = { - 0x0964, pci_device_8086_0964, +static const pciDeviceInfo pci_dev_info_8086_2487 = { + 0x2487, pci_device_8086_2487, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_0964, + pci_ss_list_8086_2487, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1000 = { - 0x1000, pci_device_8086_1000, +static const pciDeviceInfo pci_dev_info_8086_248a = { + 0x248a, pci_device_8086_248a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1000, + pci_ss_list_8086_248a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1001 = { - 0x1001, pci_device_8086_1001, +static const pciDeviceInfo pci_dev_info_8086_248b = { + 0x248b, pci_device_8086_248b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1001, + pci_ss_list_8086_248b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1002 = { - 0x1002, pci_device_8086_1002, +static const pciDeviceInfo pci_dev_info_8086_248c = { + 0x248c, pci_device_8086_248c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1002, + pci_ss_list_8086_248c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1004 = { - 0x1004, pci_device_8086_1004, +static const pciDeviceInfo pci_dev_info_8086_24c0 = { + 0x24c0, pci_device_8086_24c0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1004, + pci_ss_list_8086_24c0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1008 = { - 0x1008, pci_device_8086_1008, +static const pciDeviceInfo pci_dev_info_8086_24c1 = { + 0x24c1, pci_device_8086_24c1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1008, + pci_ss_list_8086_24c1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1009 = { - 0x1009, pci_device_8086_1009, +static const pciDeviceInfo pci_dev_info_8086_24c2 = { + 0x24c2, pci_device_8086_24c2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1009, + pci_ss_list_8086_24c2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_100c = { - 0x100c, pci_device_8086_100c, +static const pciDeviceInfo pci_dev_info_8086_24c3 = { + 0x24c3, pci_device_8086_24c3, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_100c, + pci_ss_list_8086_24c3, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_100d = { - 0x100d, pci_device_8086_100d, +static const pciDeviceInfo pci_dev_info_8086_24c4 = { + 0x24c4, pci_device_8086_24c4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_100d, + pci_ss_list_8086_24c4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_100e = { - 0x100e, pci_device_8086_100e, +static const pciDeviceInfo pci_dev_info_8086_24c5 = { + 0x24c5, pci_device_8086_24c5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_100e, + pci_ss_list_8086_24c5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_100f = { - 0x100f, pci_device_8086_100f, +static const pciDeviceInfo pci_dev_info_8086_24c6 = { + 0x24c6, pci_device_8086_24c6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_100f, + pci_ss_list_8086_24c6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1010 = { - 0x1010, pci_device_8086_1010, +static const pciDeviceInfo pci_dev_info_8086_24c7 = { + 0x24c7, pci_device_8086_24c7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1010, + pci_ss_list_8086_24c7, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1011 = { - 0x1011, pci_device_8086_1011, +static const pciDeviceInfo pci_dev_info_8086_24ca = { + 0x24ca, pci_device_8086_24ca, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1011, + pci_ss_list_8086_24ca, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1012 = { - 0x1012, pci_device_8086_1012, +static const pciDeviceInfo pci_dev_info_8086_24cb = { + 0x24cb, pci_device_8086_24cb, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1012, + pci_ss_list_8086_24cb, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1013 = { - 0x1013, pci_device_8086_1013, +static const pciDeviceInfo pci_dev_info_8086_24cc = { + 0x24cc, pci_device_8086_24cc, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1013, + pci_ss_list_8086_24cc, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1014 = { - 0x1014, pci_device_8086_1014, +static const pciDeviceInfo pci_dev_info_8086_24cd = { + 0x24cd, pci_device_8086_24cd, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1014, + pci_ss_list_8086_24cd, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1015 = { - 0x1015, pci_device_8086_1015, +static const pciDeviceInfo pci_dev_info_8086_24d0 = { + 0x24d0, pci_device_8086_24d0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1015, + pci_ss_list_8086_24d0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1016 = { - 0x1016, pci_device_8086_1016, +static const pciDeviceInfo pci_dev_info_8086_24d1 = { + 0x24d1, pci_device_8086_24d1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1016, + pci_ss_list_8086_24d1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1017 = { - 0x1017, pci_device_8086_1017, +static const pciDeviceInfo pci_dev_info_8086_24d2 = { + 0x24d2, pci_device_8086_24d2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1017, + pci_ss_list_8086_24d2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1018 = { - 0x1018, pci_device_8086_1018, +static const pciDeviceInfo pci_dev_info_8086_24d3 = { + 0x24d3, pci_device_8086_24d3, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1018, + pci_ss_list_8086_24d3, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1019 = { - 0x1019, pci_device_8086_1019, +static const pciDeviceInfo pci_dev_info_8086_24d4 = { + 0x24d4, pci_device_8086_24d4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1019, + pci_ss_list_8086_24d4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_101d = { - 0x101d, pci_device_8086_101d, +static const pciDeviceInfo pci_dev_info_8086_24d5 = { + 0x24d5, pci_device_8086_24d5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_101d, + pci_ss_list_8086_24d5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_101e = { - 0x101e, pci_device_8086_101e, +static const pciDeviceInfo pci_dev_info_8086_24d6 = { + 0x24d6, pci_device_8086_24d6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_101e, + pci_ss_list_8086_24d6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1026 = { - 0x1026, pci_device_8086_1026, +static const pciDeviceInfo pci_dev_info_8086_24d7 = { + 0x24d7, pci_device_8086_24d7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1026, + pci_ss_list_8086_24d7, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1027 = { - 0x1027, pci_device_8086_1027, +static const pciDeviceInfo pci_dev_info_8086_24db = { + 0x24db, pci_device_8086_24db, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1027, + pci_ss_list_8086_24db, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1028 = { - 0x1028, pci_device_8086_1028, +static const pciDeviceInfo pci_dev_info_8086_24dc = { + 0x24dc, pci_device_8086_24dc, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1028, + pci_ss_list_8086_24dc, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1029 = { - 0x1029, pci_device_8086_1029, +static const pciDeviceInfo pci_dev_info_8086_24dd = { + 0x24dd, pci_device_8086_24dd, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1029, + pci_ss_list_8086_24dd, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1030 = { - 0x1030, pci_device_8086_1030, +static const pciDeviceInfo pci_dev_info_8086_24de = { + 0x24de, pci_device_8086_24de, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1030, + pci_ss_list_8086_24de, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1031 = { - 0x1031, pci_device_8086_1031, +static const pciDeviceInfo pci_dev_info_8086_24df = { + 0x24df, pci_device_8086_24df, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1031, + pci_ss_list_8086_24df, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1032 = { - 0x1032, pci_device_8086_1032, +static const pciDeviceInfo pci_dev_info_8086_2500 = { + 0x2500, pci_device_8086_2500, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1032, + pci_ss_list_8086_2500, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1033 = { - 0x1033, pci_device_8086_1033, +static const pciDeviceInfo pci_dev_info_8086_2501 = { + 0x2501, pci_device_8086_2501, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1033, + pci_ss_list_8086_2501, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1034 = { - 0x1034, pci_device_8086_1034, +static const pciDeviceInfo pci_dev_info_8086_250b = { + 0x250b, pci_device_8086_250b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1034, + pci_ss_list_8086_250b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1035 = { - 0x1035, pci_device_8086_1035, +static const pciDeviceInfo pci_dev_info_8086_250f = { + 0x250f, pci_device_8086_250f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1035, + pci_ss_list_8086_250f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1036 = { - 0x1036, pci_device_8086_1036, +static const pciDeviceInfo pci_dev_info_8086_2520 = { + 0x2520, pci_device_8086_2520, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1036, + pci_ss_list_8086_2520, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1037 = { - 0x1037, pci_device_8086_1037, +static const pciDeviceInfo pci_dev_info_8086_2521 = { + 0x2521, pci_device_8086_2521, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1037, + pci_ss_list_8086_2521, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1038 = { - 0x1038, pci_device_8086_1038, +static const pciDeviceInfo pci_dev_info_8086_2530 = { + 0x2530, pci_device_8086_2530, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1038, + pci_ss_list_8086_2530, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1039 = { - 0x1039, pci_device_8086_1039, +static const pciDeviceInfo pci_dev_info_8086_2531 = { + 0x2531, pci_device_8086_2531, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1039, + pci_ss_list_8086_2531, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_103a = { - 0x103a, pci_device_8086_103a, +static const pciDeviceInfo pci_dev_info_8086_2532 = { + 0x2532, pci_device_8086_2532, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_103a, + pci_ss_list_8086_2532, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_103b = { - 0x103b, pci_device_8086_103b, +static const pciDeviceInfo pci_dev_info_8086_2533 = { + 0x2533, pci_device_8086_2533, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_103b, + pci_ss_list_8086_2533, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_103c = { - 0x103c, pci_device_8086_103c, +static const pciDeviceInfo pci_dev_info_8086_2534 = { + 0x2534, pci_device_8086_2534, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_103c, + pci_ss_list_8086_2534, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_103d = { - 0x103d, pci_device_8086_103d, +static const pciDeviceInfo pci_dev_info_8086_2540 = { + 0x2540, pci_device_8086_2540, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_103d, + pci_ss_list_8086_2540, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_103e = { - 0x103e, pci_device_8086_103e, +static const pciDeviceInfo pci_dev_info_8086_2541 = { + 0x2541, pci_device_8086_2541, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_103e, + pci_ss_list_8086_2541, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1040 = { - 0x1040, pci_device_8086_1040, +static const pciDeviceInfo pci_dev_info_8086_2543 = { + 0x2543, pci_device_8086_2543, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1040, + pci_ss_list_8086_2543, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1043 = { - 0x1043, pci_device_8086_1043, +static const pciDeviceInfo pci_dev_info_8086_2544 = { + 0x2544, pci_device_8086_2544, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1043, + pci_ss_list_8086_2544, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1048 = { - 0x1048, pci_device_8086_1048, +static const pciDeviceInfo pci_dev_info_8086_2545 = { + 0x2545, pci_device_8086_2545, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1048, + pci_ss_list_8086_2545, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1050 = { - 0x1050, pci_device_8086_1050, +static const pciDeviceInfo pci_dev_info_8086_2546 = { + 0x2546, pci_device_8086_2546, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1050, + pci_ss_list_8086_2546, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1051 = { - 0x1051, pci_device_8086_1051, +static const pciDeviceInfo pci_dev_info_8086_2547 = { + 0x2547, pci_device_8086_2547, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1051, + pci_ss_list_8086_2547, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1059 = { - 0x1059, pci_device_8086_1059, +static const pciDeviceInfo pci_dev_info_8086_2548 = { + 0x2548, pci_device_8086_2548, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1059, + pci_ss_list_8086_2548, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1064 = { - 0x1064, pci_device_8086_1064, +static const pciDeviceInfo pci_dev_info_8086_254c = { + 0x254c, pci_device_8086_254c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1064, + pci_ss_list_8086_254c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1065 = { - 0x1065, pci_device_8086_1065, +static const pciDeviceInfo pci_dev_info_8086_2550 = { + 0x2550, pci_device_8086_2550, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1065, + pci_ss_list_8086_2550, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1066 = { - 0x1066, pci_device_8086_1066, +static const pciDeviceInfo pci_dev_info_8086_2551 = { + 0x2551, pci_device_8086_2551, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1066, + pci_ss_list_8086_2551, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1067 = { - 0x1067, pci_device_8086_1067, +static const pciDeviceInfo pci_dev_info_8086_2552 = { + 0x2552, pci_device_8086_2552, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1067, + pci_ss_list_8086_2552, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1068 = { - 0x1068, pci_device_8086_1068, +static const pciDeviceInfo pci_dev_info_8086_2553 = { + 0x2553, pci_device_8086_2553, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1068, + pci_ss_list_8086_2553, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1069 = { - 0x1069, pci_device_8086_1069, +static const pciDeviceInfo pci_dev_info_8086_2554 = { + 0x2554, pci_device_8086_2554, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1069, + pci_ss_list_8086_2554, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_106a = { - 0x106a, pci_device_8086_106a, +static const pciDeviceInfo pci_dev_info_8086_255d = { + 0x255d, pci_device_8086_255d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_106a, + pci_ss_list_8086_255d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_106b = { - 0x106b, pci_device_8086_106b, +static const pciDeviceInfo pci_dev_info_8086_2560 = { + 0x2560, pci_device_8086_2560, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_106b, + pci_ss_list_8086_2560, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1075 = { - 0x1075, pci_device_8086_1075, +static const pciDeviceInfo pci_dev_info_8086_2561 = { + 0x2561, pci_device_8086_2561, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1075, + pci_ss_list_8086_2561, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1076 = { - 0x1076, pci_device_8086_1076, +static const pciDeviceInfo pci_dev_info_8086_2562 = { + 0x2562, pci_device_8086_2562, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1076, + pci_ss_list_8086_2562, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1077 = { - 0x1077, pci_device_8086_1077, +static const pciDeviceInfo pci_dev_info_8086_2570 = { + 0x2570, pci_device_8086_2570, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1077, + pci_ss_list_8086_2570, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1078 = { - 0x1078, pci_device_8086_1078, +static const pciDeviceInfo pci_dev_info_8086_2571 = { + 0x2571, pci_device_8086_2571, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1078, + pci_ss_list_8086_2571, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1079 = { - 0x1079, pci_device_8086_1079, +static const pciDeviceInfo pci_dev_info_8086_2572 = { + 0x2572, pci_device_8086_2572, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1079, + pci_ss_list_8086_2572, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_107a = { - 0x107a, pci_device_8086_107a, +static const pciDeviceInfo pci_dev_info_8086_2573 = { + 0x2573, pci_device_8086_2573, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_107a, + pci_ss_list_8086_2573, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_107b = { - 0x107b, pci_device_8086_107b, +static const pciDeviceInfo pci_dev_info_8086_2576 = { + 0x2576, pci_device_8086_2576, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_107b, + pci_ss_list_8086_2576, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1107 = { - 0x1107, pci_device_8086_1107, +static const pciDeviceInfo pci_dev_info_8086_2578 = { + 0x2578, pci_device_8086_2578, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1107, + pci_ss_list_8086_2578, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1130 = { - 0x1130, pci_device_8086_1130, +static const pciDeviceInfo pci_dev_info_8086_2579 = { + 0x2579, pci_device_8086_2579, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1130, + pci_ss_list_8086_2579, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1131 = { - 0x1131, pci_device_8086_1131, +static const pciDeviceInfo pci_dev_info_8086_257b = { + 0x257b, pci_device_8086_257b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1131, + pci_ss_list_8086_257b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1132 = { - 0x1132, pci_device_8086_1132, +static const pciDeviceInfo pci_dev_info_8086_257e = { + 0x257e, pci_device_8086_257e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1132, + pci_ss_list_8086_257e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1161 = { - 0x1161, pci_device_8086_1161, +static const pciDeviceInfo pci_dev_info_8086_2580 = { + 0x2580, pci_device_8086_2580, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1161, + pci_ss_list_8086_2580, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1162 = { - 0x1162, pci_device_8086_1162, +static const pciDeviceInfo pci_dev_info_8086_2581 = { + 0x2581, pci_device_8086_2581, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1162, + pci_ss_list_8086_2581, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1200 = { - 0x1200, pci_device_8086_1200, +static const pciDeviceInfo pci_dev_info_8086_2582 = { + 0x2582, pci_device_8086_2582, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1200, + pci_ss_list_8086_2582, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1209 = { - 0x1209, pci_device_8086_1209, +static const pciDeviceInfo pci_dev_info_8086_2584 = { + 0x2584, pci_device_8086_2584, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1209, + pci_ss_list_8086_2584, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1221 = { - 0x1221, pci_device_8086_1221, +static const pciDeviceInfo pci_dev_info_8086_2585 = { + 0x2585, pci_device_8086_2585, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1221, + pci_ss_list_8086_2585, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1222 = { - 0x1222, pci_device_8086_1222, +static const pciDeviceInfo pci_dev_info_8086_2588 = { + 0x2588, pci_device_8086_2588, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1222, + pci_ss_list_8086_2588, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1223 = { - 0x1223, pci_device_8086_1223, +static const pciDeviceInfo pci_dev_info_8086_2589 = { + 0x2589, pci_device_8086_2589, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1223, + pci_ss_list_8086_2589, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1225 = { - 0x1225, pci_device_8086_1225, +static const pciDeviceInfo pci_dev_info_8086_258a = { + 0x258a, pci_device_8086_258a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1225, + pci_ss_list_8086_258a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1226 = { - 0x1226, pci_device_8086_1226, +static const pciDeviceInfo pci_dev_info_8086_2590 = { + 0x2590, pci_device_8086_2590, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1226, + pci_ss_list_8086_2590, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1227 = { - 0x1227, pci_device_8086_1227, +static const pciDeviceInfo pci_dev_info_8086_2591 = { + 0x2591, pci_device_8086_2591, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1227, + pci_ss_list_8086_2591, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1228 = { - 0x1228, pci_device_8086_1228, +static const pciDeviceInfo pci_dev_info_8086_2592 = { + 0x2592, pci_device_8086_2592, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1228, + pci_ss_list_8086_2592, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1229 = { - 0x1229, pci_device_8086_1229, +static const pciDeviceInfo pci_dev_info_8086_25a1 = { + 0x25a1, pci_device_8086_25a1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1229, + pci_ss_list_8086_25a1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_122d = { - 0x122d, pci_device_8086_122d, +static const pciDeviceInfo pci_dev_info_8086_25a2 = { + 0x25a2, pci_device_8086_25a2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_122d, + pci_ss_list_8086_25a2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_122e = { - 0x122e, pci_device_8086_122e, +static const pciDeviceInfo pci_dev_info_8086_25a3 = { + 0x25a3, pci_device_8086_25a3, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_122e, + pci_ss_list_8086_25a3, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1230 = { - 0x1230, pci_device_8086_1230, +static const pciDeviceInfo pci_dev_info_8086_25a4 = { + 0x25a4, pci_device_8086_25a4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1230, + pci_ss_list_8086_25a4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1231 = { - 0x1231, pci_device_8086_1231, +static const pciDeviceInfo pci_dev_info_8086_25a6 = { + 0x25a6, pci_device_8086_25a6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1231, + pci_ss_list_8086_25a6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1234 = { - 0x1234, pci_device_8086_1234, +static const pciDeviceInfo pci_dev_info_8086_25a7 = { + 0x25a7, pci_device_8086_25a7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1234, + pci_ss_list_8086_25a7, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1235 = { - 0x1235, pci_device_8086_1235, +static const pciDeviceInfo pci_dev_info_8086_25a9 = { + 0x25a9, pci_device_8086_25a9, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1235, + pci_ss_list_8086_25a9, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1237 = { - 0x1237, pci_device_8086_1237, +static const pciDeviceInfo pci_dev_info_8086_25aa = { + 0x25aa, pci_device_8086_25aa, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1237, + pci_ss_list_8086_25aa, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1239 = { - 0x1239, pci_device_8086_1239, +static const pciDeviceInfo pci_dev_info_8086_25ab = { + 0x25ab, pci_device_8086_25ab, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1239, + pci_ss_list_8086_25ab, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_123b = { - 0x123b, pci_device_8086_123b, +static const pciDeviceInfo pci_dev_info_8086_25ac = { + 0x25ac, pci_device_8086_25ac, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_123b, + pci_ss_list_8086_25ac, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_123c = { - 0x123c, pci_device_8086_123c, +static const pciDeviceInfo pci_dev_info_8086_25ad = { + 0x25ad, pci_device_8086_25ad, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_123c, + pci_ss_list_8086_25ad, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_123d = { - 0x123d, pci_device_8086_123d, +static const pciDeviceInfo pci_dev_info_8086_25ae = { + 0x25ae, pci_device_8086_25ae, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_123d, + pci_ss_list_8086_25ae, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_123e = { - 0x123e, pci_device_8086_123e, +static const pciDeviceInfo pci_dev_info_8086_25b0 = { + 0x25b0, pci_device_8086_25b0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_123e, + pci_ss_list_8086_25b0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_123f = { - 0x123f, pci_device_8086_123f, +static const pciDeviceInfo pci_dev_info_8086_25c0 = { + 0x25c0, pci_device_8086_25c0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_123f, + pci_ss_list_8086_25c0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1240 = { - 0x1240, pci_device_8086_1240, +static const pciDeviceInfo pci_dev_info_8086_25d0 = { + 0x25d0, pci_device_8086_25d0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1240, + pci_ss_list_8086_25d0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_124b = { - 0x124b, pci_device_8086_124b, +static const pciDeviceInfo pci_dev_info_8086_25d4 = { + 0x25d4, pci_device_8086_25d4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_124b, + pci_ss_list_8086_25d4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1250 = { - 0x1250, pci_device_8086_1250, +static const pciDeviceInfo pci_dev_info_8086_25d8 = { + 0x25d8, pci_device_8086_25d8, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1250, + pci_ss_list_8086_25d8, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1360 = { - 0x1360, pci_device_8086_1360, +static const pciDeviceInfo pci_dev_info_8086_25e2 = { + 0x25e2, pci_device_8086_25e2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1360, + pci_ss_list_8086_25e2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1361 = { - 0x1361, pci_device_8086_1361, +static const pciDeviceInfo pci_dev_info_8086_25e3 = { + 0x25e3, pci_device_8086_25e3, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1361, + pci_ss_list_8086_25e3, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1460 = { - 0x1460, pci_device_8086_1460, +static const pciDeviceInfo pci_dev_info_8086_25e4 = { + 0x25e4, pci_device_8086_25e4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1460, + pci_ss_list_8086_25e4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1461 = { - 0x1461, pci_device_8086_1461, +static const pciDeviceInfo pci_dev_info_8086_25e5 = { + 0x25e5, pci_device_8086_25e5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1461, + pci_ss_list_8086_25e5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1462 = { - 0x1462, pci_device_8086_1462, +static const pciDeviceInfo pci_dev_info_8086_25e6 = { + 0x25e6, pci_device_8086_25e6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1462, + pci_ss_list_8086_25e6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1960 = { - 0x1960, pci_device_8086_1960, +static const pciDeviceInfo pci_dev_info_8086_25e7 = { + 0x25e7, pci_device_8086_25e7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1960, + pci_ss_list_8086_25e7, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1962 = { - 0x1962, pci_device_8086_1962, +static const pciDeviceInfo pci_dev_info_8086_25e8 = { + 0x25e8, pci_device_8086_25e8, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1962, + pci_ss_list_8086_25e8, #else NULL, #endif 0 -}; -static const pciDeviceInfo pci_dev_info_8086_1a21 = { - 0x1a21, pci_device_8086_1a21, +}; +static const pciDeviceInfo pci_dev_info_8086_25f0 = { + 0x25f0, pci_device_8086_25f0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1a21, + pci_ss_list_8086_25f0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1a23 = { - 0x1a23, pci_device_8086_1a23, +static const pciDeviceInfo pci_dev_info_8086_25f1 = { + 0x25f1, pci_device_8086_25f1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1a23, + pci_ss_list_8086_25f1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1a24 = { - 0x1a24, pci_device_8086_1a24, +static const pciDeviceInfo pci_dev_info_8086_25f3 = { + 0x25f3, pci_device_8086_25f3, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1a24, + pci_ss_list_8086_25f3, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1a30 = { - 0x1a30, pci_device_8086_1a30, +static const pciDeviceInfo pci_dev_info_8086_25f5 = { + 0x25f5, pci_device_8086_25f5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1a30, + pci_ss_list_8086_25f5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_1a31 = { - 0x1a31, pci_device_8086_1a31, +static const pciDeviceInfo pci_dev_info_8086_25f6 = { + 0x25f6, pci_device_8086_25f6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_1a31, + pci_ss_list_8086_25f6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2410 = { - 0x2410, pci_device_8086_2410, +static const pciDeviceInfo pci_dev_info_8086_25f7 = { + 0x25f7, pci_device_8086_25f7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2410, + pci_ss_list_8086_25f7, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2411 = { - 0x2411, pci_device_8086_2411, +static const pciDeviceInfo pci_dev_info_8086_25f8 = { + 0x25f8, pci_device_8086_25f8, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2411, + pci_ss_list_8086_25f8, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2412 = { - 0x2412, pci_device_8086_2412, +static const pciDeviceInfo pci_dev_info_8086_25f9 = { + 0x25f9, pci_device_8086_25f9, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2412, + pci_ss_list_8086_25f9, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2413 = { - 0x2413, pci_device_8086_2413, +static const pciDeviceInfo pci_dev_info_8086_25fa = { + 0x25fa, pci_device_8086_25fa, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2413, + pci_ss_list_8086_25fa, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2415 = { - 0x2415, pci_device_8086_2415, +static const pciDeviceInfo pci_dev_info_8086_2600 = { + 0x2600, pci_device_8086_2600, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2415, + pci_ss_list_8086_2600, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2416 = { - 0x2416, pci_device_8086_2416, +static const pciDeviceInfo pci_dev_info_8086_2601 = { + 0x2601, pci_device_8086_2601, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2416, + pci_ss_list_8086_2601, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2418 = { - 0x2418, pci_device_8086_2418, +static const pciDeviceInfo pci_dev_info_8086_2602 = { + 0x2602, pci_device_8086_2602, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2418, + pci_ss_list_8086_2602, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2420 = { - 0x2420, pci_device_8086_2420, +static const pciDeviceInfo pci_dev_info_8086_2603 = { + 0x2603, pci_device_8086_2603, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2420, + pci_ss_list_8086_2603, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2421 = { - 0x2421, pci_device_8086_2421, +static const pciDeviceInfo pci_dev_info_8086_2604 = { + 0x2604, pci_device_8086_2604, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2421, + pci_ss_list_8086_2604, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2422 = { - 0x2422, pci_device_8086_2422, +static const pciDeviceInfo pci_dev_info_8086_2605 = { + 0x2605, pci_device_8086_2605, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2422, + pci_ss_list_8086_2605, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2423 = { - 0x2423, pci_device_8086_2423, +static const pciDeviceInfo pci_dev_info_8086_2606 = { + 0x2606, pci_device_8086_2606, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2423, + pci_ss_list_8086_2606, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2425 = { - 0x2425, pci_device_8086_2425, +static const pciDeviceInfo pci_dev_info_8086_2607 = { + 0x2607, pci_device_8086_2607, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2425, + pci_ss_list_8086_2607, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2426 = { - 0x2426, pci_device_8086_2426, +static const pciDeviceInfo pci_dev_info_8086_2608 = { + 0x2608, pci_device_8086_2608, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2426, + pci_ss_list_8086_2608, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2428 = { - 0x2428, pci_device_8086_2428, +static const pciDeviceInfo pci_dev_info_8086_2609 = { + 0x2609, pci_device_8086_2609, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2428, + pci_ss_list_8086_2609, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2440 = { - 0x2440, pci_device_8086_2440, +static const pciDeviceInfo pci_dev_info_8086_260a = { + 0x260a, pci_device_8086_260a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2440, + pci_ss_list_8086_260a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2442 = { - 0x2442, pci_device_8086_2442, +static const pciDeviceInfo pci_dev_info_8086_260c = { + 0x260c, pci_device_8086_260c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2442, + pci_ss_list_8086_260c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2443 = { - 0x2443, pci_device_8086_2443, +static const pciDeviceInfo pci_dev_info_8086_2610 = { + 0x2610, pci_device_8086_2610, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2443, + pci_ss_list_8086_2610, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2444 = { - 0x2444, pci_device_8086_2444, +static const pciDeviceInfo pci_dev_info_8086_2611 = { + 0x2611, pci_device_8086_2611, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2444, + pci_ss_list_8086_2611, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2445 = { - 0x2445, pci_device_8086_2445, +static const pciDeviceInfo pci_dev_info_8086_2612 = { + 0x2612, pci_device_8086_2612, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2445, + pci_ss_list_8086_2612, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2446 = { - 0x2446, pci_device_8086_2446, +static const pciDeviceInfo pci_dev_info_8086_2613 = { + 0x2613, pci_device_8086_2613, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2446, + pci_ss_list_8086_2613, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2448 = { - 0x2448, pci_device_8086_2448, +static const pciDeviceInfo pci_dev_info_8086_2614 = { + 0x2614, pci_device_8086_2614, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2448, + pci_ss_list_8086_2614, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2449 = { - 0x2449, pci_device_8086_2449, +static const pciDeviceInfo pci_dev_info_8086_2615 = { + 0x2615, pci_device_8086_2615, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2449, + pci_ss_list_8086_2615, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_244a = { - 0x244a, pci_device_8086_244a, +static const pciDeviceInfo pci_dev_info_8086_2617 = { + 0x2617, pci_device_8086_2617, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_244a, + pci_ss_list_8086_2617, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_244b = { - 0x244b, pci_device_8086_244b, +static const pciDeviceInfo pci_dev_info_8086_2618 = { + 0x2618, pci_device_8086_2618, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_244b, + pci_ss_list_8086_2618, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_244c = { - 0x244c, pci_device_8086_244c, +static const pciDeviceInfo pci_dev_info_8086_2619 = { + 0x2619, pci_device_8086_2619, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_244c, + pci_ss_list_8086_2619, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_244e = { - 0x244e, pci_device_8086_244e, +static const pciDeviceInfo pci_dev_info_8086_261a = { + 0x261a, pci_device_8086_261a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_244e, + pci_ss_list_8086_261a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2450 = { - 0x2450, pci_device_8086_2450, +static const pciDeviceInfo pci_dev_info_8086_261b = { + 0x261b, pci_device_8086_261b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2450, + pci_ss_list_8086_261b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2452 = { - 0x2452, pci_device_8086_2452, +static const pciDeviceInfo pci_dev_info_8086_261c = { + 0x261c, pci_device_8086_261c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2452, + pci_ss_list_8086_261c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2453 = { - 0x2453, pci_device_8086_2453, +static const pciDeviceInfo pci_dev_info_8086_261d = { + 0x261d, pci_device_8086_261d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2453, + pci_ss_list_8086_261d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2459 = { - 0x2459, pci_device_8086_2459, +static const pciDeviceInfo pci_dev_info_8086_261e = { + 0x261e, pci_device_8086_261e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2459, + pci_ss_list_8086_261e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_245b = { - 0x245b, pci_device_8086_245b, +static const pciDeviceInfo pci_dev_info_8086_2620 = { + 0x2620, pci_device_8086_2620, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_245b, + pci_ss_list_8086_2620, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_245d = { - 0x245d, pci_device_8086_245d, +static const pciDeviceInfo pci_dev_info_8086_2621 = { + 0x2621, pci_device_8086_2621, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_245d, + pci_ss_list_8086_2621, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_245e = { - 0x245e, pci_device_8086_245e, +static const pciDeviceInfo pci_dev_info_8086_2622 = { + 0x2622, pci_device_8086_2622, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_245e, + pci_ss_list_8086_2622, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2480 = { - 0x2480, pci_device_8086_2480, +static const pciDeviceInfo pci_dev_info_8086_2623 = { + 0x2623, pci_device_8086_2623, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2480, + pci_ss_list_8086_2623, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2482 = { - 0x2482, pci_device_8086_2482, +static const pciDeviceInfo pci_dev_info_8086_2624 = { + 0x2624, pci_device_8086_2624, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2482, + pci_ss_list_8086_2624, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2483 = { - 0x2483, pci_device_8086_2483, +static const pciDeviceInfo pci_dev_info_8086_2625 = { + 0x2625, pci_device_8086_2625, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2483, + pci_ss_list_8086_2625, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2484 = { - 0x2484, pci_device_8086_2484, +static const pciDeviceInfo pci_dev_info_8086_2626 = { + 0x2626, pci_device_8086_2626, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2484, + pci_ss_list_8086_2626, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2485 = { - 0x2485, pci_device_8086_2485, +static const pciDeviceInfo pci_dev_info_8086_2627 = { + 0x2627, pci_device_8086_2627, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2485, + pci_ss_list_8086_2627, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2486 = { - 0x2486, pci_device_8086_2486, +static const pciDeviceInfo pci_dev_info_8086_2640 = { + 0x2640, pci_device_8086_2640, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2486, + pci_ss_list_8086_2640, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2487 = { - 0x2487, pci_device_8086_2487, +static const pciDeviceInfo pci_dev_info_8086_2641 = { + 0x2641, pci_device_8086_2641, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2487, + pci_ss_list_8086_2641, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_248a = { - 0x248a, pci_device_8086_248a, +static const pciDeviceInfo pci_dev_info_8086_2642 = { + 0x2642, pci_device_8086_2642, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_248a, + pci_ss_list_8086_2642, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_248b = { - 0x248b, pci_device_8086_248b, +static const pciDeviceInfo pci_dev_info_8086_2651 = { + 0x2651, pci_device_8086_2651, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_248b, + pci_ss_list_8086_2651, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_248c = { - 0x248c, pci_device_8086_248c, +static const pciDeviceInfo pci_dev_info_8086_2652 = { + 0x2652, pci_device_8086_2652, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_248c, + pci_ss_list_8086_2652, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24c0 = { - 0x24c0, pci_device_8086_24c0, +static const pciDeviceInfo pci_dev_info_8086_2653 = { + 0x2653, pci_device_8086_2653, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24c0, + pci_ss_list_8086_2653, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24c1 = { - 0x24c1, pci_device_8086_24c1, +static const pciDeviceInfo pci_dev_info_8086_2658 = { + 0x2658, pci_device_8086_2658, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24c1, + pci_ss_list_8086_2658, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24c2 = { - 0x24c2, pci_device_8086_24c2, +static const pciDeviceInfo pci_dev_info_8086_2659 = { + 0x2659, pci_device_8086_2659, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24c2, + pci_ss_list_8086_2659, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24c3 = { - 0x24c3, pci_device_8086_24c3, +static const pciDeviceInfo pci_dev_info_8086_265a = { + 0x265a, pci_device_8086_265a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24c3, + pci_ss_list_8086_265a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24c4 = { - 0x24c4, pci_device_8086_24c4, +static const pciDeviceInfo pci_dev_info_8086_265b = { + 0x265b, pci_device_8086_265b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24c4, + pci_ss_list_8086_265b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24c5 = { - 0x24c5, pci_device_8086_24c5, +static const pciDeviceInfo pci_dev_info_8086_265c = { + 0x265c, pci_device_8086_265c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24c5, + pci_ss_list_8086_265c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24c6 = { - 0x24c6, pci_device_8086_24c6, +static const pciDeviceInfo pci_dev_info_8086_2660 = { + 0x2660, pci_device_8086_2660, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24c6, + pci_ss_list_8086_2660, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24c7 = { - 0x24c7, pci_device_8086_24c7, +static const pciDeviceInfo pci_dev_info_8086_2662 = { + 0x2662, pci_device_8086_2662, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24c7, + pci_ss_list_8086_2662, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24ca = { - 0x24ca, pci_device_8086_24ca, +static const pciDeviceInfo pci_dev_info_8086_2664 = { + 0x2664, pci_device_8086_2664, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24ca, + pci_ss_list_8086_2664, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24cb = { - 0x24cb, pci_device_8086_24cb, +static const pciDeviceInfo pci_dev_info_8086_2666 = { + 0x2666, pci_device_8086_2666, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24cb, + pci_ss_list_8086_2666, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24cc = { - 0x24cc, pci_device_8086_24cc, +static const pciDeviceInfo pci_dev_info_8086_2668 = { + 0x2668, pci_device_8086_2668, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24cc, + pci_ss_list_8086_2668, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24cd = { - 0x24cd, pci_device_8086_24cd, +static const pciDeviceInfo pci_dev_info_8086_266a = { + 0x266a, pci_device_8086_266a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24cd, + pci_ss_list_8086_266a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24d0 = { - 0x24d0, pci_device_8086_24d0, +static const pciDeviceInfo pci_dev_info_8086_266c = { + 0x266c, pci_device_8086_266c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24d0, + pci_ss_list_8086_266c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24d1 = { - 0x24d1, pci_device_8086_24d1, +static const pciDeviceInfo pci_dev_info_8086_266d = { + 0x266d, pci_device_8086_266d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24d1, + pci_ss_list_8086_266d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24d2 = { - 0x24d2, pci_device_8086_24d2, +static const pciDeviceInfo pci_dev_info_8086_266e = { + 0x266e, pci_device_8086_266e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24d2, + pci_ss_list_8086_266e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24d3 = { - 0x24d3, pci_device_8086_24d3, +static const pciDeviceInfo pci_dev_info_8086_266f = { + 0x266f, pci_device_8086_266f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24d3, + pci_ss_list_8086_266f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24d4 = { - 0x24d4, pci_device_8086_24d4, +static const pciDeviceInfo pci_dev_info_8086_2670 = { + 0x2670, pci_device_8086_2670, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24d4, + pci_ss_list_8086_2670, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24d5 = { - 0x24d5, pci_device_8086_24d5, +static const pciDeviceInfo pci_dev_info_8086_2680 = { + 0x2680, pci_device_8086_2680, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24d5, + pci_ss_list_8086_2680, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24d6 = { - 0x24d6, pci_device_8086_24d6, +static const pciDeviceInfo pci_dev_info_8086_2681 = { + 0x2681, pci_device_8086_2681, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24d6, + pci_ss_list_8086_2681, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24d7 = { - 0x24d7, pci_device_8086_24d7, +static const pciDeviceInfo pci_dev_info_8086_2682 = { + 0x2682, pci_device_8086_2682, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24d7, + pci_ss_list_8086_2682, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24db = { - 0x24db, pci_device_8086_24db, +static const pciDeviceInfo pci_dev_info_8086_2683 = { + 0x2683, pci_device_8086_2683, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24db, + pci_ss_list_8086_2683, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24dc = { - 0x24dc, pci_device_8086_24dc, +static const pciDeviceInfo pci_dev_info_8086_2688 = { + 0x2688, pci_device_8086_2688, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24dc, + pci_ss_list_8086_2688, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24dd = { - 0x24dd, pci_device_8086_24dd, +static const pciDeviceInfo pci_dev_info_8086_2689 = { + 0x2689, pci_device_8086_2689, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24dd, + pci_ss_list_8086_2689, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24de = { - 0x24de, pci_device_8086_24de, +static const pciDeviceInfo pci_dev_info_8086_268a = { + 0x268a, pci_device_8086_268a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24de, + pci_ss_list_8086_268a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_24df = { - 0x24df, pci_device_8086_24df, +static const pciDeviceInfo pci_dev_info_8086_268b = { + 0x268b, pci_device_8086_268b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_24df, + pci_ss_list_8086_268b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2500 = { - 0x2500, pci_device_8086_2500, +static const pciDeviceInfo pci_dev_info_8086_268c = { + 0x268c, pci_device_8086_268c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2500, + pci_ss_list_8086_268c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2501 = { - 0x2501, pci_device_8086_2501, +static const pciDeviceInfo pci_dev_info_8086_2690 = { + 0x2690, pci_device_8086_2690, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2501, + pci_ss_list_8086_2690, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_250b = { - 0x250b, pci_device_8086_250b, +static const pciDeviceInfo pci_dev_info_8086_2692 = { + 0x2692, pci_device_8086_2692, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_250b, + pci_ss_list_8086_2692, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_250f = { - 0x250f, pci_device_8086_250f, +static const pciDeviceInfo pci_dev_info_8086_2694 = { + 0x2694, pci_device_8086_2694, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_250f, + pci_ss_list_8086_2694, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2520 = { - 0x2520, pci_device_8086_2520, +static const pciDeviceInfo pci_dev_info_8086_2696 = { + 0x2696, pci_device_8086_2696, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2520, + pci_ss_list_8086_2696, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2521 = { - 0x2521, pci_device_8086_2521, +static const pciDeviceInfo pci_dev_info_8086_2698 = { + 0x2698, pci_device_8086_2698, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2521, + pci_ss_list_8086_2698, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2530 = { - 0x2530, pci_device_8086_2530, +static const pciDeviceInfo pci_dev_info_8086_2699 = { + 0x2699, pci_device_8086_2699, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2530, + pci_ss_list_8086_2699, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2531 = { - 0x2531, pci_device_8086_2531, +static const pciDeviceInfo pci_dev_info_8086_269a = { + 0x269a, pci_device_8086_269a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2531, + pci_ss_list_8086_269a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2532 = { - 0x2532, pci_device_8086_2532, +static const pciDeviceInfo pci_dev_info_8086_269b = { + 0x269b, pci_device_8086_269b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2532, + pci_ss_list_8086_269b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2533 = { - 0x2533, pci_device_8086_2533, +static const pciDeviceInfo pci_dev_info_8086_269e = { + 0x269e, pci_device_8086_269e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2533, + pci_ss_list_8086_269e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2534 = { - 0x2534, pci_device_8086_2534, +static const pciDeviceInfo pci_dev_info_8086_2770 = { + 0x2770, pci_device_8086_2770, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2534, + pci_ss_list_8086_2770, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2540 = { - 0x2540, pci_device_8086_2540, +static const pciDeviceInfo pci_dev_info_8086_2771 = { + 0x2771, pci_device_8086_2771, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2540, + pci_ss_list_8086_2771, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2541 = { - 0x2541, pci_device_8086_2541, +static const pciDeviceInfo pci_dev_info_8086_2772 = { + 0x2772, pci_device_8086_2772, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2541, + pci_ss_list_8086_2772, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2543 = { - 0x2543, pci_device_8086_2543, +static const pciDeviceInfo pci_dev_info_8086_2774 = { + 0x2774, pci_device_8086_2774, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2543, + pci_ss_list_8086_2774, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2544 = { - 0x2544, pci_device_8086_2544, +static const pciDeviceInfo pci_dev_info_8086_2775 = { + 0x2775, pci_device_8086_2775, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2544, + pci_ss_list_8086_2775, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2545 = { - 0x2545, pci_device_8086_2545, +static const pciDeviceInfo pci_dev_info_8086_2776 = { + 0x2776, pci_device_8086_2776, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2545, + pci_ss_list_8086_2776, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2546 = { - 0x2546, pci_device_8086_2546, +static const pciDeviceInfo pci_dev_info_8086_2778 = { + 0x2778, pci_device_8086_2778, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2546, + pci_ss_list_8086_2778, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2547 = { - 0x2547, pci_device_8086_2547, +static const pciDeviceInfo pci_dev_info_8086_2779 = { + 0x2779, pci_device_8086_2779, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2547, + pci_ss_list_8086_2779, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2548 = { - 0x2548, pci_device_8086_2548, +static const pciDeviceInfo pci_dev_info_8086_277a = { + 0x277a, pci_device_8086_277a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2548, + pci_ss_list_8086_277a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_254c = { - 0x254c, pci_device_8086_254c, +static const pciDeviceInfo pci_dev_info_8086_277c = { + 0x277c, pci_device_8086_277c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_254c, + pci_ss_list_8086_277c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2550 = { - 0x2550, pci_device_8086_2550, +static const pciDeviceInfo pci_dev_info_8086_277d = { + 0x277d, pci_device_8086_277d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2550, + pci_ss_list_8086_277d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2551 = { - 0x2551, pci_device_8086_2551, +static const pciDeviceInfo pci_dev_info_8086_2782 = { + 0x2782, pci_device_8086_2782, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2551, + pci_ss_list_8086_2782, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2552 = { - 0x2552, pci_device_8086_2552, +static const pciDeviceInfo pci_dev_info_8086_2792 = { + 0x2792, pci_device_8086_2792, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2552, + pci_ss_list_8086_2792, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2553 = { - 0x2553, pci_device_8086_2553, +static const pciDeviceInfo pci_dev_info_8086_27a0 = { + 0x27a0, pci_device_8086_27a0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2553, + pci_ss_list_8086_27a0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2554 = { - 0x2554, pci_device_8086_2554, +static const pciDeviceInfo pci_dev_info_8086_27a1 = { + 0x27a1, pci_device_8086_27a1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2554, + pci_ss_list_8086_27a1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_255d = { - 0x255d, pci_device_8086_255d, +static const pciDeviceInfo pci_dev_info_8086_27a2 = { + 0x27a2, pci_device_8086_27a2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_255d, + pci_ss_list_8086_27a2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2560 = { - 0x2560, pci_device_8086_2560, +static const pciDeviceInfo pci_dev_info_8086_27a6 = { + 0x27a6, pci_device_8086_27a6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2560, + pci_ss_list_8086_27a6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2561 = { - 0x2561, pci_device_8086_2561, +static const pciDeviceInfo pci_dev_info_8086_27b0 = { + 0x27b0, pci_device_8086_27b0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2561, + pci_ss_list_8086_27b0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2562 = { - 0x2562, pci_device_8086_2562, +static const pciDeviceInfo pci_dev_info_8086_27b8 = { + 0x27b8, pci_device_8086_27b8, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2562, + pci_ss_list_8086_27b8, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2570 = { - 0x2570, pci_device_8086_2570, +static const pciDeviceInfo pci_dev_info_8086_27b9 = { + 0x27b9, pci_device_8086_27b9, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2570, + pci_ss_list_8086_27b9, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2571 = { - 0x2571, pci_device_8086_2571, +static const pciDeviceInfo pci_dev_info_8086_27bd = { + 0x27bd, pci_device_8086_27bd, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2571, + pci_ss_list_8086_27bd, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2572 = { - 0x2572, pci_device_8086_2572, +static const pciDeviceInfo pci_dev_info_8086_27c0 = { + 0x27c0, pci_device_8086_27c0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2572, + pci_ss_list_8086_27c0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2573 = { - 0x2573, pci_device_8086_2573, +static const pciDeviceInfo pci_dev_info_8086_27c1 = { + 0x27c1, pci_device_8086_27c1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2573, + pci_ss_list_8086_27c1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2576 = { - 0x2576, pci_device_8086_2576, +static const pciDeviceInfo pci_dev_info_8086_27c3 = { + 0x27c3, pci_device_8086_27c3, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2576, + pci_ss_list_8086_27c3, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2578 = { - 0x2578, pci_device_8086_2578, +static const pciDeviceInfo pci_dev_info_8086_27c4 = { + 0x27c4, pci_device_8086_27c4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2578, + pci_ss_list_8086_27c4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2579 = { - 0x2579, pci_device_8086_2579, +static const pciDeviceInfo pci_dev_info_8086_27c5 = { + 0x27c5, pci_device_8086_27c5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2579, + pci_ss_list_8086_27c5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_257b = { - 0x257b, pci_device_8086_257b, +static const pciDeviceInfo pci_dev_info_8086_27c6 = { + 0x27c6, pci_device_8086_27c6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_257b, + pci_ss_list_8086_27c6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_257e = { - 0x257e, pci_device_8086_257e, +static const pciDeviceInfo pci_dev_info_8086_27c8 = { + 0x27c8, pci_device_8086_27c8, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_257e, + pci_ss_list_8086_27c8, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2580 = { - 0x2580, pci_device_8086_2580, +static const pciDeviceInfo pci_dev_info_8086_27c9 = { + 0x27c9, pci_device_8086_27c9, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2580, + pci_ss_list_8086_27c9, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2581 = { - 0x2581, pci_device_8086_2581, +static const pciDeviceInfo pci_dev_info_8086_27ca = { + 0x27ca, pci_device_8086_27ca, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2581, + pci_ss_list_8086_27ca, #else NULL, #endif 0 -}; -static const pciDeviceInfo pci_dev_info_8086_2582 = { - 0x2582, pci_device_8086_2582, +}; +static const pciDeviceInfo pci_dev_info_8086_27cb = { + 0x27cb, pci_device_8086_27cb, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2582, + pci_ss_list_8086_27cb, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2584 = { - 0x2584, pci_device_8086_2584, +static const pciDeviceInfo pci_dev_info_8086_27cc = { + 0x27cc, pci_device_8086_27cc, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2584, + pci_ss_list_8086_27cc, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2585 = { - 0x2585, pci_device_8086_2585, +static const pciDeviceInfo pci_dev_info_8086_27d0 = { + 0x27d0, pci_device_8086_27d0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2585, + pci_ss_list_8086_27d0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2588 = { - 0x2588, pci_device_8086_2588, +static const pciDeviceInfo pci_dev_info_8086_27d2 = { + 0x27d2, pci_device_8086_27d2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2588, + pci_ss_list_8086_27d2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2589 = { - 0x2589, pci_device_8086_2589, +static const pciDeviceInfo pci_dev_info_8086_27d4 = { + 0x27d4, pci_device_8086_27d4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2589, + pci_ss_list_8086_27d4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_258a = { - 0x258a, pci_device_8086_258a, +static const pciDeviceInfo pci_dev_info_8086_27d6 = { + 0x27d6, pci_device_8086_27d6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_258a, + pci_ss_list_8086_27d6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2590 = { - 0x2590, pci_device_8086_2590, +static const pciDeviceInfo pci_dev_info_8086_27d8 = { + 0x27d8, pci_device_8086_27d8, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2590, + pci_ss_list_8086_27d8, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2591 = { - 0x2591, pci_device_8086_2591, +static const pciDeviceInfo pci_dev_info_8086_27da = { + 0x27da, pci_device_8086_27da, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2591, + pci_ss_list_8086_27da, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2592 = { - 0x2592, pci_device_8086_2592, +static const pciDeviceInfo pci_dev_info_8086_27dc = { + 0x27dc, pci_device_8086_27dc, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2592, + pci_ss_list_8086_27dc, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25a1 = { - 0x25a1, pci_device_8086_25a1, +static const pciDeviceInfo pci_dev_info_8086_27dd = { + 0x27dd, pci_device_8086_27dd, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25a1, + pci_ss_list_8086_27dd, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25a2 = { - 0x25a2, pci_device_8086_25a2, +static const pciDeviceInfo pci_dev_info_8086_27de = { + 0x27de, pci_device_8086_27de, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25a2, + pci_ss_list_8086_27de, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25a3 = { - 0x25a3, pci_device_8086_25a3, +static const pciDeviceInfo pci_dev_info_8086_27df = { + 0x27df, pci_device_8086_27df, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25a3, + pci_ss_list_8086_27df, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25a4 = { - 0x25a4, pci_device_8086_25a4, +static const pciDeviceInfo pci_dev_info_8086_27e0 = { + 0x27e0, pci_device_8086_27e0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25a4, + pci_ss_list_8086_27e0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25a6 = { - 0x25a6, pci_device_8086_25a6, +static const pciDeviceInfo pci_dev_info_8086_27e2 = { + 0x27e2, pci_device_8086_27e2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25a6, + pci_ss_list_8086_27e2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25a7 = { - 0x25a7, pci_device_8086_25a7, +static const pciDeviceInfo pci_dev_info_8086_2810 = { + 0x2810, pci_device_8086_2810, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25a7, + pci_ss_list_8086_2810, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25a9 = { - 0x25a9, pci_device_8086_25a9, +static const pciDeviceInfo pci_dev_info_8086_2811 = { + 0x2811, pci_device_8086_2811, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25a9, + pci_ss_list_8086_2811, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25aa = { - 0x25aa, pci_device_8086_25aa, +static const pciDeviceInfo pci_dev_info_8086_2812 = { + 0x2812, pci_device_8086_2812, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25aa, + pci_ss_list_8086_2812, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25ab = { - 0x25ab, pci_device_8086_25ab, +static const pciDeviceInfo pci_dev_info_8086_2814 = { + 0x2814, pci_device_8086_2814, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25ab, + pci_ss_list_8086_2814, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25ac = { - 0x25ac, pci_device_8086_25ac, +static const pciDeviceInfo pci_dev_info_8086_2815 = { + 0x2815, pci_device_8086_2815, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25ac, + pci_ss_list_8086_2815, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25ad = { - 0x25ad, pci_device_8086_25ad, +static const pciDeviceInfo pci_dev_info_8086_2820 = { + 0x2820, pci_device_8086_2820, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25ad, + pci_ss_list_8086_2820, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25ae = { - 0x25ae, pci_device_8086_25ae, +static const pciDeviceInfo pci_dev_info_8086_2821 = { + 0x2821, pci_device_8086_2821, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25ae, + pci_ss_list_8086_2821, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_25b0 = { - 0x25b0, pci_device_8086_25b0, +static const pciDeviceInfo pci_dev_info_8086_2822 = { + 0x2822, pci_device_8086_2822, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_25b0, + pci_ss_list_8086_2822, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2600 = { - 0x2600, pci_device_8086_2600, +static const pciDeviceInfo pci_dev_info_8086_2824 = { + 0x2824, pci_device_8086_2824, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2600, + pci_ss_list_8086_2824, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2601 = { - 0x2601, pci_device_8086_2601, +static const pciDeviceInfo pci_dev_info_8086_2825 = { + 0x2825, pci_device_8086_2825, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2601, + pci_ss_list_8086_2825, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2602 = { - 0x2602, pci_device_8086_2602, +static const pciDeviceInfo pci_dev_info_8086_2828 = { + 0x2828, pci_device_8086_2828, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2602, + pci_ss_list_8086_2828, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2603 = { - 0x2603, pci_device_8086_2603, +static const pciDeviceInfo pci_dev_info_8086_2829 = { + 0x2829, pci_device_8086_2829, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2603, + pci_ss_list_8086_2829, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2604 = { - 0x2604, pci_device_8086_2604, +static const pciDeviceInfo pci_dev_info_8086_282a = { + 0x282a, pci_device_8086_282a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2604, + pci_ss_list_8086_282a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2605 = { - 0x2605, pci_device_8086_2605, +static const pciDeviceInfo pci_dev_info_8086_2830 = { + 0x2830, pci_device_8086_2830, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2605, + pci_ss_list_8086_2830, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2606 = { - 0x2606, pci_device_8086_2606, +static const pciDeviceInfo pci_dev_info_8086_2831 = { + 0x2831, pci_device_8086_2831, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2606, + pci_ss_list_8086_2831, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2607 = { - 0x2607, pci_device_8086_2607, +static const pciDeviceInfo pci_dev_info_8086_2832 = { + 0x2832, pci_device_8086_2832, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2607, + pci_ss_list_8086_2832, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2608 = { - 0x2608, pci_device_8086_2608, +static const pciDeviceInfo pci_dev_info_8086_2834 = { + 0x2834, pci_device_8086_2834, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2608, + pci_ss_list_8086_2834, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2609 = { - 0x2609, pci_device_8086_2609, +static const pciDeviceInfo pci_dev_info_8086_2835 = { + 0x2835, pci_device_8086_2835, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2609, + pci_ss_list_8086_2835, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_260a = { - 0x260a, pci_device_8086_260a, +static const pciDeviceInfo pci_dev_info_8086_2836 = { + 0x2836, pci_device_8086_2836, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_260a, + pci_ss_list_8086_2836, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_260c = { - 0x260c, pci_device_8086_260c, +static const pciDeviceInfo pci_dev_info_8086_283a = { + 0x283a, pci_device_8086_283a, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_260c, + pci_ss_list_8086_283a, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2610 = { - 0x2610, pci_device_8086_2610, +static const pciDeviceInfo pci_dev_info_8086_283e = { + 0x283e, pci_device_8086_283e, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2610, + pci_ss_list_8086_283e, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2611 = { - 0x2611, pci_device_8086_2611, +static const pciDeviceInfo pci_dev_info_8086_283f = { + 0x283f, pci_device_8086_283f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2611, + pci_ss_list_8086_283f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2612 = { - 0x2612, pci_device_8086_2612, +static const pciDeviceInfo pci_dev_info_8086_2841 = { + 0x2841, pci_device_8086_2841, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2612, + pci_ss_list_8086_2841, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2613 = { - 0x2613, pci_device_8086_2613, +static const pciDeviceInfo pci_dev_info_8086_2843 = { + 0x2843, pci_device_8086_2843, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2613, + pci_ss_list_8086_2843, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2614 = { - 0x2614, pci_device_8086_2614, +static const pciDeviceInfo pci_dev_info_8086_2845 = { + 0x2845, pci_device_8086_2845, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2614, + pci_ss_list_8086_2845, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2615 = { - 0x2615, pci_device_8086_2615, +static const pciDeviceInfo pci_dev_info_8086_2847 = { + 0x2847, pci_device_8086_2847, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2615, + pci_ss_list_8086_2847, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2617 = { - 0x2617, pci_device_8086_2617, +static const pciDeviceInfo pci_dev_info_8086_2849 = { + 0x2849, pci_device_8086_2849, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2617, + pci_ss_list_8086_2849, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2618 = { - 0x2618, pci_device_8086_2618, +static const pciDeviceInfo pci_dev_info_8086_284b = { + 0x284b, pci_device_8086_284b, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2618, + pci_ss_list_8086_284b, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2619 = { - 0x2619, pci_device_8086_2619, +static const pciDeviceInfo pci_dev_info_8086_284f = { + 0x284f, pci_device_8086_284f, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2619, + pci_ss_list_8086_284f, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_261a = { - 0x261a, pci_device_8086_261a, +static const pciDeviceInfo pci_dev_info_8086_2850 = { + 0x2850, pci_device_8086_2850, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_261a, + pci_ss_list_8086_2850, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_261b = { - 0x261b, pci_device_8086_261b, +static const pciDeviceInfo pci_dev_info_8086_2970 = { + 0x2970, pci_device_8086_2970, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_261b, + pci_ss_list_8086_2970, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_261c = { - 0x261c, pci_device_8086_261c, +static const pciDeviceInfo pci_dev_info_8086_2971 = { + 0x2971, pci_device_8086_2971, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_261c, + pci_ss_list_8086_2971, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_261d = { - 0x261d, pci_device_8086_261d, +static const pciDeviceInfo pci_dev_info_8086_2972 = { + 0x2972, pci_device_8086_2972, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_261d, + pci_ss_list_8086_2972, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_261e = { - 0x261e, pci_device_8086_261e, +static const pciDeviceInfo pci_dev_info_8086_2973 = { + 0x2973, pci_device_8086_2973, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_261e, + pci_ss_list_8086_2973, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2620 = { - 0x2620, pci_device_8086_2620, +static const pciDeviceInfo pci_dev_info_8086_2974 = { + 0x2974, pci_device_8086_2974, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2620, + pci_ss_list_8086_2974, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2621 = { - 0x2621, pci_device_8086_2621, +static const pciDeviceInfo pci_dev_info_8086_2976 = { + 0x2976, pci_device_8086_2976, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2621, + pci_ss_list_8086_2976, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2622 = { - 0x2622, pci_device_8086_2622, +static const pciDeviceInfo pci_dev_info_8086_2977 = { + 0x2977, pci_device_8086_2977, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2622, + pci_ss_list_8086_2977, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2623 = { - 0x2623, pci_device_8086_2623, +static const pciDeviceInfo pci_dev_info_8086_2990 = { + 0x2990, pci_device_8086_2990, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2623, + pci_ss_list_8086_2990, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2624 = { - 0x2624, pci_device_8086_2624, +static const pciDeviceInfo pci_dev_info_8086_2991 = { + 0x2991, pci_device_8086_2991, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2624, + pci_ss_list_8086_2991, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2625 = { - 0x2625, pci_device_8086_2625, +static const pciDeviceInfo pci_dev_info_8086_2992 = { + 0x2992, pci_device_8086_2992, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2625, + pci_ss_list_8086_2992, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2626 = { - 0x2626, pci_device_8086_2626, +static const pciDeviceInfo pci_dev_info_8086_2993 = { + 0x2993, pci_device_8086_2993, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2626, + pci_ss_list_8086_2993, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2627 = { - 0x2627, pci_device_8086_2627, +static const pciDeviceInfo pci_dev_info_8086_2994 = { + 0x2994, pci_device_8086_2994, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2627, + pci_ss_list_8086_2994, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2640 = { - 0x2640, pci_device_8086_2640, +static const pciDeviceInfo pci_dev_info_8086_2995 = { + 0x2995, pci_device_8086_2995, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2640, + pci_ss_list_8086_2995, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2641 = { - 0x2641, pci_device_8086_2641, +static const pciDeviceInfo pci_dev_info_8086_2996 = { + 0x2996, pci_device_8086_2996, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2641, + pci_ss_list_8086_2996, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2642 = { - 0x2642, pci_device_8086_2642, +static const pciDeviceInfo pci_dev_info_8086_2997 = { + 0x2997, pci_device_8086_2997, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2642, + pci_ss_list_8086_2997, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2651 = { - 0x2651, pci_device_8086_2651, +static const pciDeviceInfo pci_dev_info_8086_29a0 = { + 0x29a0, pci_device_8086_29a0, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2651, + pci_ss_list_8086_29a0, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2652 = { - 0x2652, pci_device_8086_2652, +static const pciDeviceInfo pci_dev_info_8086_29a1 = { + 0x29a1, pci_device_8086_29a1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2652, + pci_ss_list_8086_29a1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2653 = { - 0x2653, pci_device_8086_2653, +static const pciDeviceInfo pci_dev_info_8086_29a2 = { + 0x29a2, pci_device_8086_29a2, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2653, + pci_ss_list_8086_29a2, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2658 = { - 0x2658, pci_device_8086_2658, +static const pciDeviceInfo pci_dev_info_8086_29a3 = { + 0x29a3, pci_device_8086_29a3, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2658, + pci_ss_list_8086_29a3, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2659 = { - 0x2659, pci_device_8086_2659, +static const pciDeviceInfo pci_dev_info_8086_29a4 = { + 0x29a4, pci_device_8086_29a4, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2659, + pci_ss_list_8086_29a4, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_265a = { - 0x265a, pci_device_8086_265a, +static const pciDeviceInfo pci_dev_info_8086_29a5 = { + 0x29a5, pci_device_8086_29a5, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_265a, + pci_ss_list_8086_29a5, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_265b = { - 0x265b, pci_device_8086_265b, +static const pciDeviceInfo pci_dev_info_8086_29a6 = { + 0x29a6, pci_device_8086_29a6, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_265b, + pci_ss_list_8086_29a6, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_265c = { - 0x265c, pci_device_8086_265c, +static const pciDeviceInfo pci_dev_info_8086_29a7 = { + 0x29a7, pci_device_8086_29a7, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_265c, + pci_ss_list_8086_29a7, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2660 = { - 0x2660, pci_device_8086_2660, +static const pciDeviceInfo pci_dev_info_8086_3092 = { + 0x3092, pci_device_8086_3092, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2660, + pci_ss_list_8086_3092, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2662 = { - 0x2662, pci_device_8086_2662, +static const pciDeviceInfo pci_dev_info_8086_3200 = { + 0x3200, pci_device_8086_3200, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2662, + pci_ss_list_8086_3200, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2664 = { - 0x2664, pci_device_8086_2664, +static const pciDeviceInfo pci_dev_info_8086_3340 = { + 0x3340, pci_device_8086_3340, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2664, + pci_ss_list_8086_3340, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2666 = { - 0x2666, pci_device_8086_2666, +static const pciDeviceInfo pci_dev_info_8086_3341 = { + 0x3341, pci_device_8086_3341, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2666, + pci_ss_list_8086_3341, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2668 = { - 0x2668, pci_device_8086_2668, +static const pciDeviceInfo pci_dev_info_8086_3500 = { + 0x3500, pci_device_8086_3500, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2668, + pci_ss_list_8086_3500, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_266a = { - 0x266a, pci_device_8086_266a, +static const pciDeviceInfo pci_dev_info_8086_3501 = { + 0x3501, pci_device_8086_3501, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_266a, + pci_ss_list_8086_3501, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_266c = { - 0x266c, pci_device_8086_266c, +static const pciDeviceInfo pci_dev_info_8086_3504 = { + 0x3504, pci_device_8086_3504, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_266c, + pci_ss_list_8086_3504, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_266d = { - 0x266d, pci_device_8086_266d, +static const pciDeviceInfo pci_dev_info_8086_3505 = { + 0x3505, pci_device_8086_3505, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_266d, + pci_ss_list_8086_3505, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_266e = { - 0x266e, pci_device_8086_266e, +static const pciDeviceInfo pci_dev_info_8086_350c = { + 0x350c, pci_device_8086_350c, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_266e, + pci_ss_list_8086_350c, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_266f = { - 0x266f, pci_device_8086_266f, +static const pciDeviceInfo pci_dev_info_8086_350d = { + 0x350d, pci_device_8086_350d, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_266f, + pci_ss_list_8086_350d, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2782 = { - 0x2782, pci_device_8086_2782, +static const pciDeviceInfo pci_dev_info_8086_3510 = { + 0x3510, pci_device_8086_3510, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2782, + pci_ss_list_8086_3510, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_2792 = { - 0x2792, pci_device_8086_2792, +static const pciDeviceInfo pci_dev_info_8086_3511 = { + 0x3511, pci_device_8086_3511, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_2792, + pci_ss_list_8086_3511, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_3092 = { - 0x3092, pci_device_8086_3092, +static const pciDeviceInfo pci_dev_info_8086_3514 = { + 0x3514, pci_device_8086_3514, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_3092, + pci_ss_list_8086_3514, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_3200 = { - 0x3200, pci_device_8086_3200, +static const pciDeviceInfo pci_dev_info_8086_3515 = { + 0x3515, pci_device_8086_3515, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_3200, + pci_ss_list_8086_3515, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_3340 = { - 0x3340, pci_device_8086_3340, +static const pciDeviceInfo pci_dev_info_8086_3518 = { + 0x3518, pci_device_8086_3518, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_3340, + pci_ss_list_8086_3518, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_3341 = { - 0x3341, pci_device_8086_3341, +static const pciDeviceInfo pci_dev_info_8086_3519 = { + 0x3519, pci_device_8086_3519, #ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_3341, + pci_ss_list_8086_3519, #else NULL, #endif @@ -86859,6 +106283,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_4222 = { + 0x4222, pci_device_8086_4222, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_4222, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_4223 = { 0x4223, pci_device_8086_4223, #ifdef INIT_SUBSYS_INFO @@ -86868,6 +106301,24 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_4224 = { + 0x4224, pci_device_8086_4224, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_4224, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_8086_4227 = { + 0x4227, pci_device_8086_4227, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_4227, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_5200 = { 0x5200, pci_device_8086_5200, #ifdef INIT_SUBSYS_INFO @@ -86940,6 +106391,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_7051 = { + 0x7051, pci_device_8086_7051, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_7051, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_7100 = { 0x7100, pci_device_8086_7100, #ifdef INIT_SUBSYS_INFO @@ -87372,6 +106832,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_8086_9002 = { + 0x9002, pci_device_8086_9002, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_8086_9002, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_8086_9004 = { 0x9004, pci_device_8086_9004, #ifdef INIT_SUBSYS_INFO @@ -87417,24 +106886,6 @@ #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_a01f = { - 0xa01f, pci_device_8086_a01f, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_a01f, -#else - NULL, -#endif - 0 -}; -static const pciDeviceInfo pci_dev_info_8086_a11f = { - 0xa11f, pci_device_8086_a11f, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_a11f, -#else - NULL, -#endif - 0 -}; static const pciDeviceInfo pci_dev_info_8086_b152 = { 0xb152, pci_device_8086_b152, #ifdef INIT_SUBSYS_INFO @@ -87462,15 +106913,6 @@ #endif 0 }; -static const pciDeviceInfo pci_dev_info_8086_ffff = { - 0xffff, pci_device_8086_ffff, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_8086_ffff, -#else - NULL, -#endif - 0 -}; #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_8800_2008 = { 0x2008, pci_device_8800_2008, @@ -88389,6 +107831,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_9005_0241 = { + 0x0241, pci_device_9005_0241, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_9005_0241, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_9005_0250 = { 0x0250, pci_device_9005_0250, #ifdef INIT_SUBSYS_INFO @@ -88443,6 +107894,42 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_9005_0500 = { + 0x0500, pci_device_9005_0500, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_9005_0500, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_9005_0503 = { + 0x0503, pci_device_9005_0503, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_9005_0503, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_9005_0910 = { + 0x0910, pci_device_9005_0910, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_9005_0910, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_9005_091e = { + 0x091e, pci_device_9005_091e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_9005_091e, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_9005_8000 = { 0x8000, pci_device_9005_8000, #ifdef INIT_SUBSYS_INFO @@ -88739,6 +108226,15 @@ #endif 0 }; +static const pciDeviceInfo pci_dev_info_9710_9805 = { + 0x9805, pci_device_9710_9805, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_9710_9805, +#else + NULL, +#endif + 0 +}; static const pciDeviceInfo pci_dev_info_9710_9815 = { 0x9815, pci_device_9710_9815, #ifdef INIT_SUBSYS_INFO @@ -88817,6 +108313,39 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_aecb_6250 = { + 0x6250, pci_device_aecb_6250, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_aecb_6250, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_affe_dead = { + 0xdead, pci_device_affe_dead, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_affe_dead, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_cafe_0003 = { + 0x0003, pci_device_cafe_0003, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_cafe_0003, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_cddd_0101 = { 0x0101, pci_device_cddd_0101, #ifdef INIT_SUBSYS_INFO @@ -88837,6 +108366,53 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_d161_0205 = { + 0x0205, pci_device_d161_0205, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_d161_0205, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_d161_0210 = { + 0x0210, pci_device_d161_0210, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_d161_0210, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_d161_0405 = { + 0x0405, pci_device_d161_0405, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_d161_0405, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_d161_0410 = { + 0x0410, pci_device_d161_0410, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_d161_0410, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_d161_2400 = { + 0x2400, pci_device_d161_2400, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_d161_2400, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_d4d4_0601 = { 0x0601, pci_device_d4d4_0601, #ifdef INIT_SUBSYS_INFO @@ -88848,6 +108424,35 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_deaf_9050 = { + 0x9050, pci_device_deaf_9050, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_deaf_9050, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_deaf_9051 = { + 0x9051, pci_device_deaf_9051, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_deaf_9051, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_deaf_9052 = { + 0x9052, pci_device_deaf_9052, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_deaf_9052, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_e000_e000 = { 0xe000, pci_device_e000_e000, #ifdef INIT_SUBSYS_INFO @@ -88879,6 +108484,80 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_ea01_000a = { + 0x000a, pci_device_ea01_000a, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_ea01_000a, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_ea01_0032 = { + 0x0032, pci_device_ea01_0032, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_ea01_0032, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_ea01_003e = { + 0x003e, pci_device_ea01_003e, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_ea01_003e, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_ea01_0041 = { + 0x0041, pci_device_ea01_0041, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_ea01_0041, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_ea01_0043 = { + 0x0043, pci_device_ea01_0043, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_ea01_0043, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_ea01_0046 = { + 0x0046, pci_device_ea01_0046, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_ea01_0046, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_ea01_0052 = { + 0x0052, pci_device_ea01_0052, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_ea01_0052, +#else + NULL, +#endif + 0 +}; +static const pciDeviceInfo pci_dev_info_ea01_0800 = { + 0x0800, pci_device_ea01_0800, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_ea01_0800, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_ea60_9896 = { 0x9896, pci_device_ea60_9896, #ifdef INIT_SUBSYS_INFO @@ -89019,112 +108698,92 @@ 0 }; #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_ecc0_0050 = { - 0x0050, pci_device_ecc0_0050, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_ecc0_0050, -#else - NULL, -#endif - 0 -}; -static const pciDeviceInfo pci_dev_info_ecc0_0051 = { - 0x0051, pci_device_ecc0_0051, -#ifdef INIT_SUBSYS_INFO - pci_ss_list_ecc0_0051, -#else - NULL, -#endif - 0 -}; -static const pciDeviceInfo pci_dev_info_ecc0_0060 = { - 0x0060, pci_device_ecc0_0060, +static const pciDeviceInfo pci_dev_info_edd8_a091 = { + 0xa091, pci_device_edd8_a091, #ifdef INIT_SUBSYS_INFO - pci_ss_list_ecc0_0060, + pci_ss_list_edd8_a091, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_ecc0_0070 = { - 0x0070, pci_device_ecc0_0070, +static const pciDeviceInfo pci_dev_info_edd8_a099 = { + 0xa099, pci_device_edd8_a099, #ifdef INIT_SUBSYS_INFO - pci_ss_list_ecc0_0070, + pci_ss_list_edd8_a099, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_ecc0_0071 = { - 0x0071, pci_device_ecc0_0071, +static const pciDeviceInfo pci_dev_info_edd8_a0a1 = { + 0xa0a1, pci_device_edd8_a0a1, #ifdef INIT_SUBSYS_INFO - pci_ss_list_ecc0_0071, + pci_ss_list_edd8_a0a1, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_ecc0_0072 = { - 0x0072, pci_device_ecc0_0072, +static const pciDeviceInfo pci_dev_info_edd8_a0a9 = { + 0xa0a9, pci_device_edd8_a0a9, #ifdef INIT_SUBSYS_INFO - pci_ss_list_ecc0_0072, + pci_ss_list_edd8_a0a9, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_ecc0_0080 = { - 0x0080, pci_device_ecc0_0080, +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_f1d0_c0fe = { + 0xc0fe, pci_device_f1d0_c0fe, #ifdef INIT_SUBSYS_INFO - pci_ss_list_ecc0_0080, + pci_ss_list_f1d0_c0fe, #else NULL, #endif 0 }; -#endif -static const pciDeviceInfo pci_dev_info_edd8_a091 = { - 0xa091, pci_device_edd8_a091, +static const pciDeviceInfo pci_dev_info_f1d0_c0ff = { + 0xc0ff, pci_device_f1d0_c0ff, #ifdef INIT_SUBSYS_INFO - pci_ss_list_edd8_a091, + pci_ss_list_f1d0_c0ff, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_edd8_a099 = { - 0xa099, pci_device_edd8_a099, +static const pciDeviceInfo pci_dev_info_f1d0_cafe = { + 0xcafe, pci_device_f1d0_cafe, #ifdef INIT_SUBSYS_INFO - pci_ss_list_edd8_a099, + pci_ss_list_f1d0_cafe, #else NULL, #endif 0 }; -static const pciDeviceInfo pci_dev_info_edd8_a0a1 = { - 0xa0a1, pci_device_edd8_a0a1, +static const pciDeviceInfo pci_dev_info_f1d0_cfee = { + 0xcfee, pci_device_f1d0_cfee, #ifdef INIT_SUBSYS_INFO - pci_ss_list_edd8_a0a1, + pci_ss_list_f1d0_cfee, #else NULL, #endif 0 -}; -static const pciDeviceInfo pci_dev_info_edd8_a0a9 = { - 0xa0a9, pci_device_edd8_a0a9, +}; +static const pciDeviceInfo pci_dev_info_f1d0_dcaf = { + 0xdcaf, pci_device_f1d0_dcaf, #ifdef INIT_SUBSYS_INFO - pci_ss_list_edd8_a0a9, + pci_ss_list_f1d0_dcaf, #else NULL, #endif 0 }; -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo pci_dev_info_f1d0_cafe = { - 0xcafe, pci_device_f1d0_cafe, +static const pciDeviceInfo pci_dev_info_f1d0_dfee = { + 0xdfee, pci_device_f1d0_dfee, #ifdef INIT_SUBSYS_INFO - pci_ss_list_f1d0_cafe, + pci_ss_list_f1d0_dfee, #else NULL, #endif @@ -89192,6 +108851,17 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo pci_dev_info_fffd_0101 = { + 0x0101, pci_device_fffd_0101, +#ifdef INIT_SUBSYS_INFO + pci_ss_list_fffd_0101, +#else + NULL, +#endif + 0 +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo pci_dev_info_fffe_0405 = { 0x0405, pci_device_fffe_0405, #ifdef INIT_SUBSYS_INFO @@ -89216,15 +108886,7 @@ #define pci_dev_list_0033 NULL #define pci_dev_list_003d NULL #define pci_dev_list_0059 NULL -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo *pci_dev_list_0070[] = { - &pci_dev_info_0070_4000, - &pci_dev_info_0070_4001, - &pci_dev_info_0070_4009, - &pci_dev_info_0070_4801, - NULL -}; -#endif +#define pci_dev_list_0070 NULL #define pci_dev_list_0071 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_0095[] = { @@ -89232,6 +108894,7 @@ NULL }; #endif +#define pci_dev_list_00a7 NULL #define pci_dev_list_0100 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_018a[] = { @@ -89245,6 +108908,7 @@ NULL }; #endif +#define pci_dev_list_0270 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_0291[] = { &pci_dev_info_0291_8212, @@ -89264,18 +108928,54 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_0432[] = { + &pci_dev_info_0432_0001, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_045e[] = { + &pci_dev_info_045e_006e, + &pci_dev_info_045e_00c2, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_04cf[] = { + &pci_dev_info_04cf_8818, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_050d[] = { + &pci_dev_info_050d_7050, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_05e3[] = { &pci_dev_info_05e3_0701, NULL }; #endif +#define pci_dev_list_066f NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_0675[] = { &pci_dev_info_0675_1700, &pci_dev_info_0675_1702, + &pci_dev_info_0675_1703, + &pci_dev_info_0675_1704, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_067b[] = { + &pci_dev_info_067b_3507, NULL }; #endif +#define pci_dev_list_0721 NULL +#define pci_dev_list_07e2 NULL #define pci_dev_list_0925 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_09c1[] = { @@ -89296,9 +108996,11 @@ &pci_dev_info_0e11_0046, &pci_dev_info_0e11_0049, &pci_dev_info_0e11_004a, + &pci_dev_info_0e11_005a, &pci_dev_info_0e11_007c, &pci_dev_info_0e11_007d, &pci_dev_info_0e11_0085, + &pci_dev_info_0e11_00b1, &pci_dev_info_0e11_00bb, &pci_dev_info_0e11_00ca, &pci_dev_info_0e11_00cb, @@ -89410,6 +109112,15 @@ &pci_dev_info_1000_0033, &pci_dev_info_1000_0040, &pci_dev_info_1000_0041, + &pci_dev_info_1000_0050, + &pci_dev_info_1000_0054, + &pci_dev_info_1000_0056, + &pci_dev_info_1000_0058, + &pci_dev_info_1000_005a, + &pci_dev_info_1000_005c, + &pci_dev_info_1000_005e, + &pci_dev_info_1000_0060, + &pci_dev_info_1000_0062, &pci_dev_info_1000_008f, &pci_dev_info_1000_0407, &pci_dev_info_1000_0408, @@ -89423,6 +109134,9 @@ &pci_dev_info_1000_0627, &pci_dev_info_1000_0628, &pci_dev_info_1000_0629, + &pci_dev_info_1000_0640, + &pci_dev_info_1000_0642, + &pci_dev_info_1000_0646, &pci_dev_info_1000_0701, &pci_dev_info_1000_0702, &pci_dev_info_1000_0804, @@ -89451,6 +109165,7 @@ #endif static const pciDeviceInfo *pci_dev_list_1002[] = { &pci_dev_info_1002_3150, + &pci_dev_info_1002_3152, &pci_dev_info_1002_3154, &pci_dev_info_1002_3e50, &pci_dev_info_1002_3e54, @@ -89491,10 +109206,24 @@ &pci_dev_info_1002_4345, &pci_dev_info_1002_4347, &pci_dev_info_1002_4348, + &pci_dev_info_1002_4349, &pci_dev_info_1002_434d, &pci_dev_info_1002_4353, &pci_dev_info_1002_4354, &pci_dev_info_1002_4358, + &pci_dev_info_1002_4363, + &pci_dev_info_1002_436e, + &pci_dev_info_1002_4370, + &pci_dev_info_1002_4371, + &pci_dev_info_1002_4372, + &pci_dev_info_1002_4373, + &pci_dev_info_1002_4374, + &pci_dev_info_1002_4375, + &pci_dev_info_1002_4376, + &pci_dev_info_1002_4377, + &pci_dev_info_1002_4378, + &pci_dev_info_1002_4379, + &pci_dev_info_1002_437a, &pci_dev_info_1002_4437, &pci_dev_info_1002_4554, &pci_dev_info_1002_4654, @@ -89531,6 +109260,12 @@ &pci_dev_info_1002_4a4e, &pci_dev_info_1002_4a50, &pci_dev_info_1002_4a70, + &pci_dev_info_1002_4b49, + &pci_dev_info_1002_4b4b, + &pci_dev_info_1002_4b4c, + &pci_dev_info_1002_4b69, + &pci_dev_info_1002_4b6b, + &pci_dev_info_1002_4b6c, &pci_dev_info_1002_4c42, &pci_dev_info_1002_4c44, &pci_dev_info_1002_4c45, @@ -89576,6 +109311,7 @@ &pci_dev_info_1002_4e68, &pci_dev_info_1002_4e69, &pci_dev_info_1002_4e6a, + &pci_dev_info_1002_4e71, &pci_dev_info_1002_5041, &pci_dev_info_1002_5042, &pci_dev_info_1002_5043, @@ -89618,6 +109354,7 @@ &pci_dev_info_1002_5158, &pci_dev_info_1002_5159, &pci_dev_info_1002_515a, + &pci_dev_info_1002_515e, &pci_dev_info_1002_5168, &pci_dev_info_1002_5169, &pci_dev_info_1002_516a, @@ -89644,15 +109381,25 @@ &pci_dev_info_1002_5454, &pci_dev_info_1002_5455, &pci_dev_info_1002_5460, + &pci_dev_info_1002_5462, &pci_dev_info_1002_5464, &pci_dev_info_1002_5548, &pci_dev_info_1002_5549, &pci_dev_info_1002_554a, &pci_dev_info_1002_554b, + &pci_dev_info_1002_554d, + &pci_dev_info_1002_554f, + &pci_dev_info_1002_5550, &pci_dev_info_1002_5551, &pci_dev_info_1002_5552, &pci_dev_info_1002_5554, &pci_dev_info_1002_556b, + &pci_dev_info_1002_556d, + &pci_dev_info_1002_556f, + &pci_dev_info_1002_564a, + &pci_dev_info_1002_564b, + &pci_dev_info_1002_5652, + &pci_dev_info_1002_5653, &pci_dev_info_1002_5654, &pci_dev_info_1002_5655, &pci_dev_info_1002_5656, @@ -89663,27 +109410,82 @@ &pci_dev_info_1002_5834, &pci_dev_info_1002_5835, &pci_dev_info_1002_5838, + &pci_dev_info_1002_5940, &pci_dev_info_1002_5941, &pci_dev_info_1002_5944, + &pci_dev_info_1002_5950, + &pci_dev_info_1002_5951, + &pci_dev_info_1002_5954, + &pci_dev_info_1002_5955, &pci_dev_info_1002_5960, &pci_dev_info_1002_5961, &pci_dev_info_1002_5962, &pci_dev_info_1002_5964, + &pci_dev_info_1002_5969, + &pci_dev_info_1002_5974, + &pci_dev_info_1002_5975, + &pci_dev_info_1002_5a34, + &pci_dev_info_1002_5a38, + &pci_dev_info_1002_5a3f, + &pci_dev_info_1002_5a41, + &pci_dev_info_1002_5a42, + &pci_dev_info_1002_5a61, + &pci_dev_info_1002_5a62, &pci_dev_info_1002_5b60, &pci_dev_info_1002_5b62, + &pci_dev_info_1002_5b63, &pci_dev_info_1002_5b64, &pci_dev_info_1002_5b65, + &pci_dev_info_1002_5b70, + &pci_dev_info_1002_5b72, + &pci_dev_info_1002_5b73, + &pci_dev_info_1002_5b74, &pci_dev_info_1002_5c61, &pci_dev_info_1002_5c63, &pci_dev_info_1002_5d44, + &pci_dev_info_1002_5d48, + &pci_dev_info_1002_5d49, + &pci_dev_info_1002_5d4a, + &pci_dev_info_1002_5d4d, + &pci_dev_info_1002_5d4f, + &pci_dev_info_1002_5d52, &pci_dev_info_1002_5d57, + &pci_dev_info_1002_5d6d, + &pci_dev_info_1002_5d6f, + &pci_dev_info_1002_5d72, + &pci_dev_info_1002_5d77, + &pci_dev_info_1002_5e48, + &pci_dev_info_1002_5e49, + &pci_dev_info_1002_5e4a, + &pci_dev_info_1002_5e4b, + &pci_dev_info_1002_5e4c, + &pci_dev_info_1002_5e4d, + &pci_dev_info_1002_5e4f, + &pci_dev_info_1002_5e6b, + &pci_dev_info_1002_5e6d, &pci_dev_info_1002_700f, &pci_dev_info_1002_7010, + &pci_dev_info_1002_7100, + &pci_dev_info_1002_7105, + &pci_dev_info_1002_7109, + &pci_dev_info_1002_7120, + &pci_dev_info_1002_7129, + &pci_dev_info_1002_7142, + &pci_dev_info_1002_7146, + &pci_dev_info_1002_7162, + &pci_dev_info_1002_7166, + &pci_dev_info_1002_71c0, + &pci_dev_info_1002_71c2, + &pci_dev_info_1002_71e0, + &pci_dev_info_1002_71e2, + &pci_dev_info_1002_7833, &pci_dev_info_1002_7834, &pci_dev_info_1002_7835, + &pci_dev_info_1002_7838, &pci_dev_info_1002_7c37, &pci_dev_info_1002_cab0, &pci_dev_info_1002_cab2, + &pci_dev_info_1002_cab3, &pci_dev_info_1002_cbb2, NULL }; @@ -89741,8 +109543,10 @@ &pci_dev_info_100b_0011, &pci_dev_info_100b_0012, &pci_dev_info_100b_0020, + &pci_dev_info_100b_0021, &pci_dev_info_100b_0022, &pci_dev_info_100b_0028, + &pci_dev_info_100b_002a, &pci_dev_info_100b_002b, &pci_dev_info_100b_002d, &pci_dev_info_100b_002e, @@ -89832,6 +109636,7 @@ &pci_dev_info_1013_1200, &pci_dev_info_1013_1202, &pci_dev_info_1013_1204, + &pci_dev_info_1013_4000, &pci_dev_info_1013_4400, &pci_dev_info_1013_6001, &pci_dev_info_1013_6003, @@ -89914,8 +109719,13 @@ &pci_dev_info_1014_0266, &pci_dev_info_1014_0268, &pci_dev_info_1014_0269, + &pci_dev_info_1014_028c, + &pci_dev_info_1014_02a1, + &pci_dev_info_1014_02bd, &pci_dev_info_1014_0302, &pci_dev_info_1014_0314, + &pci_dev_info_1014_3022, + &pci_dev_info_1014_4022, &pci_dev_info_1014_ffff, NULL }; @@ -89955,6 +109765,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_101e[] = { + &pci_dev_info_101e_0009, &pci_dev_info_101e_1960, &pci_dev_info_101e_9010, &pci_dev_info_101e_9030, @@ -89980,6 +109791,17 @@ &pci_dev_info_1022_2003, &pci_dev_info_1022_2020, &pci_dev_info_1022_2040, + &pci_dev_info_1022_2081, + &pci_dev_info_1022_2082, + &pci_dev_info_1022_208f, + &pci_dev_info_1022_2090, + &pci_dev_info_1022_2091, + &pci_dev_info_1022_2093, + &pci_dev_info_1022_2094, + &pci_dev_info_1022_2095, + &pci_dev_info_1022_2096, + &pci_dev_info_1022_2097, + &pci_dev_info_1022_209a, &pci_dev_info_1022_3000, &pci_dev_info_1022_7006, &pci_dev_info_1022_7007, @@ -90012,6 +109834,8 @@ &pci_dev_info_1022_7451, &pci_dev_info_1022_7454, &pci_dev_info_1022_7455, + &pci_dev_info_1022_7458, + &pci_dev_info_1022_7459, &pci_dev_info_1022_7460, &pci_dev_info_1022_7461, &pci_dev_info_1022_7462, @@ -90030,6 +109854,7 @@ &pci_dev_info_1023_2000, &pci_dev_info_1023_2001, &pci_dev_info_1023_2100, + &pci_dev_info_1023_2200, &pci_dev_info_1023_8400, &pci_dev_info_1023_8420, &pci_dev_info_1023_8500, @@ -90145,6 +109970,7 @@ &pci_dev_info_1028_0012, &pci_dev_info_1028_0013, &pci_dev_info_1028_0014, + &pci_dev_info_1028_0015, NULL }; #define pci_dev_list_1029 NULL @@ -90171,12 +109997,14 @@ &pci_dev_info_102b_0521, &pci_dev_info_102b_0525, &pci_dev_info_102b_0527, + &pci_dev_info_102b_0528, &pci_dev_info_102b_0d10, &pci_dev_info_102b_1000, &pci_dev_info_102b_1001, &pci_dev_info_102b_2007, &pci_dev_info_102b_2527, &pci_dev_info_102b_2537, + &pci_dev_info_102b_2538, &pci_dev_info_102b_4536, &pci_dev_info_102b_6573, NULL @@ -90254,6 +110082,7 @@ &pci_dev_info_1033_005a, &pci_dev_info_1033_0063, &pci_dev_info_1033_0067, + &pci_dev_info_1033_0072, &pci_dev_info_1033_0074, &pci_dev_info_1033_009b, &pci_dev_info_1033_00a5, @@ -90281,13 +110110,19 @@ static const pciDeviceInfo *pci_dev_list_1039[] = { &pci_dev_info_1039_0001, &pci_dev_info_1039_0002, + &pci_dev_info_1039_0003, + &pci_dev_info_1039_0004, &pci_dev_info_1039_0006, &pci_dev_info_1039_0008, &pci_dev_info_1039_0009, + &pci_dev_info_1039_000a, &pci_dev_info_1039_0016, &pci_dev_info_1039_0018, &pci_dev_info_1039_0180, &pci_dev_info_1039_0181, + &pci_dev_info_1039_0182, + &pci_dev_info_1039_0190, + &pci_dev_info_1039_0191, &pci_dev_info_1039_0200, &pci_dev_info_1039_0204, &pci_dev_info_1039_0205, @@ -90324,6 +110159,7 @@ &pci_dev_info_1039_0746, &pci_dev_info_1039_0755, &pci_dev_info_1039_0760, + &pci_dev_info_1039_0761, &pci_dev_info_1039_0900, &pci_dev_info_1039_0961, &pci_dev_info_1039_0962, @@ -90396,9 +110232,14 @@ &pci_dev_info_103c_122e, &pci_dev_info_103c_127c, &pci_dev_info_103c_1290, + &pci_dev_info_103c_1291, &pci_dev_info_103c_12b4, + &pci_dev_info_103c_12fa, &pci_dev_info_103c_2910, &pci_dev_info_103c_2925, + &pci_dev_info_103c_3080, + &pci_dev_info_103c_3220, + &pci_dev_info_103c_3230, NULL }; #define pci_dev_list_103e NULL @@ -90424,6 +110265,10 @@ &pci_dev_info_1043_8043, &pci_dev_info_1043_807b, &pci_dev_info_1043_80bb, + &pci_dev_info_1043_80c5, + &pci_dev_info_1043_80df, + &pci_dev_info_1043_8187, + &pci_dev_info_1043_8188, NULL }; #endif @@ -90523,11 +110368,21 @@ &pci_dev_info_104c_8026, &pci_dev_info_104c_8027, &pci_dev_info_104c_8029, + &pci_dev_info_104c_802b, &pci_dev_info_104c_802e, + &pci_dev_info_104c_8031, + &pci_dev_info_104c_8032, + &pci_dev_info_104c_8033, + &pci_dev_info_104c_8034, + &pci_dev_info_104c_8035, + &pci_dev_info_104c_8036, + &pci_dev_info_104c_8038, &pci_dev_info_104c_8201, + &pci_dev_info_104c_8204, &pci_dev_info_104c_8400, &pci_dev_info_104c_8401, &pci_dev_info_104c_9000, + &pci_dev_info_104c_9065, &pci_dev_info_104c_9066, &pci_dev_info_104c_a001, &pci_dev_info_104c_a100, @@ -90559,6 +110414,8 @@ &pci_dev_info_104c_ac42, &pci_dev_info_104c_ac44, &pci_dev_info_104c_ac46, + &pci_dev_info_104c_ac47, + &pci_dev_info_104c_ac4a, &pci_dev_info_104c_ac50, &pci_dev_info_104c_ac51, &pci_dev_info_104c_ac52, @@ -90575,6 +110432,7 @@ NULL }; static const pciDeviceInfo *pci_dev_list_104d[] = { + &pci_dev_info_104d_8004, &pci_dev_info_104d_8009, &pci_dev_info_104d_8039, &pci_dev_info_104d_8056, @@ -90633,13 +110491,17 @@ &pci_dev_info_1057_1801, &pci_dev_info_1057_18c0, &pci_dev_info_1057_18c1, + &pci_dev_info_1057_3410, &pci_dev_info_1057_4801, &pci_dev_info_1057_4802, &pci_dev_info_1057_4803, &pci_dev_info_1057_4806, &pci_dev_info_1057_4d68, &pci_dev_info_1057_5600, + &pci_dev_info_1057_5608, &pci_dev_info_1057_5803, + &pci_dev_info_1057_5806, + &pci_dev_info_1057_5808, &pci_dev_info_1057_6400, &pci_dev_info_1057_6405, NULL @@ -90657,8 +110519,16 @@ &pci_dev_info_105a_3373, &pci_dev_info_105a_3375, &pci_dev_info_105a_3376, + &pci_dev_info_105a_3515, + &pci_dev_info_105a_3519, + &pci_dev_info_105a_3570, + &pci_dev_info_105a_3571, &pci_dev_info_105a_3574, + &pci_dev_info_105a_3577, + &pci_dev_info_105a_3d17, &pci_dev_info_105a_3d18, + &pci_dev_info_105a_3d73, + &pci_dev_info_105a_3d75, &pci_dev_info_105a_4d30, &pci_dev_info_105a_4d33, &pci_dev_info_105a_4d38, @@ -90670,9 +110540,11 @@ &pci_dev_info_105a_6269, &pci_dev_info_105a_6621, &pci_dev_info_105a_6622, + &pci_dev_info_105a_6624, &pci_dev_info_105a_6626, &pci_dev_info_105a_6629, &pci_dev_info_105a_7275, + &pci_dev_info_105a_8002, NULL }; #endif @@ -90757,6 +110629,7 @@ &pci_dev_info_1069_b166, &pci_dev_info_1069_ba55, &pci_dev_info_1069_ba56, + &pci_dev_info_1069_ba57, NULL }; #endif @@ -90768,6 +110641,7 @@ &pci_dev_info_106b_0003, &pci_dev_info_106b_0004, &pci_dev_info_106b_0007, + &pci_dev_info_106b_000c, &pci_dev_info_106b_000e, &pci_dev_info_106b_0010, &pci_dev_info_106b_0017, @@ -90816,6 +110690,13 @@ &pci_dev_info_106b_0054, &pci_dev_info_106b_0055, &pci_dev_info_106b_0058, + &pci_dev_info_106b_0059, + &pci_dev_info_106b_0066, + &pci_dev_info_106b_0067, + &pci_dev_info_106b_0068, + &pci_dev_info_106b_0069, + &pci_dev_info_106b_006a, + &pci_dev_info_106b_006b, &pci_dev_info_106b_1645, NULL }; @@ -90882,6 +110763,15 @@ &pci_dev_info_1077_2200, &pci_dev_info_1077_2300, &pci_dev_info_1077_2312, + &pci_dev_info_1077_2322, + &pci_dev_info_1077_2422, + &pci_dev_info_1077_2432, + &pci_dev_info_1077_3010, + &pci_dev_info_1077_3022, + &pci_dev_info_1077_4010, + &pci_dev_info_1077_4022, + &pci_dev_info_1077_6312, + &pci_dev_info_1077_6322, NULL }; #endif @@ -91003,6 +110893,7 @@ &pci_dev_info_108e_1101, &pci_dev_info_108e_1102, &pci_dev_info_108e_1103, + &pci_dev_info_108e_1648, &pci_dev_info_108e_2bad, &pci_dev_info_108e_5000, &pci_dev_info_108e_5043, @@ -91061,6 +110952,7 @@ &pci_dev_info_1093_1170, &pci_dev_info_1093_1180, &pci_dev_info_1093_1190, + &pci_dev_info_1093_1310, &pci_dev_info_1093_1330, &pci_dev_info_1093_1350, &pci_dev_info_1093_14e0, @@ -91076,6 +110968,8 @@ &pci_dev_info_1093_2a80, &pci_dev_info_1093_2c80, &pci_dev_info_1093_2ca0, + &pci_dev_info_1093_70a9, + &pci_dev_info_1093_70b8, &pci_dev_info_1093_b001, &pci_dev_info_1093_b011, &pci_dev_info_1093_b021, @@ -91108,6 +111002,7 @@ &pci_dev_info_1095_3112, &pci_dev_info_1095_3114, &pci_dev_info_1095_3124, + &pci_dev_info_1095_3132, &pci_dev_info_1095_3512, NULL }; @@ -91127,6 +111022,7 @@ #define pci_dev_list_109c NULL #define pci_dev_list_109d NULL static const pciDeviceInfo *pci_dev_list_109e[] = { + &pci_dev_info_109e_032e, &pci_dev_info_109e_0350, &pci_dev_info_109e_0351, &pci_dev_info_109e_0369, @@ -91192,8 +111088,12 @@ &pci_dev_info_10a9_100a, &pci_dev_info_10a9_2001, &pci_dev_info_10a9_2002, + &pci_dev_info_10a9_4001, + &pci_dev_info_10a9_4002, &pci_dev_info_10a9_8001, &pci_dev_info_10a9_8002, + &pci_dev_info_10a9_8010, + &pci_dev_info_10a9_8018, NULL }; #endif @@ -91237,13 +111137,22 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_10b5[] = { &pci_dev_info_10b5_0001, + &pci_dev_info_10b5_1042, &pci_dev_info_10b5_1076, &pci_dev_info_10b5_1077, &pci_dev_info_10b5_1078, &pci_dev_info_10b5_1103, &pci_dev_info_10b5_1146, &pci_dev_info_10b5_1147, + &pci_dev_info_10b5_2540, &pci_dev_info_10b5_2724, + &pci_dev_info_10b5_6540, + &pci_dev_info_10b5_6541, + &pci_dev_info_10b5_6542, + &pci_dev_info_10b5_8111, + &pci_dev_info_10b5_8114, + &pci_dev_info_10b5_8516, + &pci_dev_info_10b5_8532, &pci_dev_info_10b5_9030, &pci_dev_info_10b5_9036, &pci_dev_info_10b5_9050, @@ -91379,6 +111288,7 @@ &pci_dev_info_10b9_1541, &pci_dev_info_10b9_1543, &pci_dev_info_10b9_1563, + &pci_dev_info_10b9_1573, &pci_dev_info_10b9_1621, &pci_dev_info_10b9_1631, &pci_dev_info_10b9_1632, @@ -91392,6 +111302,8 @@ &pci_dev_info_10b9_1681, &pci_dev_info_10b9_1687, &pci_dev_info_10b9_1689, + &pci_dev_info_10b9_1695, + &pci_dev_info_10b9_1697, &pci_dev_info_10b9_3141, &pci_dev_info_10b9_3143, &pci_dev_info_10b9_3145, @@ -91406,6 +111318,7 @@ &pci_dev_info_10b9_5217, &pci_dev_info_10b9_5219, &pci_dev_info_10b9_5225, + &pci_dev_info_10b9_5228, &pci_dev_info_10b9_5229, &pci_dev_info_10b9_5235, &pci_dev_info_10b9_5237, @@ -91414,11 +111327,18 @@ &pci_dev_info_10b9_5246, &pci_dev_info_10b9_5247, &pci_dev_info_10b9_5249, + &pci_dev_info_10b9_524b, + &pci_dev_info_10b9_524c, + &pci_dev_info_10b9_524d, + &pci_dev_info_10b9_524e, &pci_dev_info_10b9_5251, &pci_dev_info_10b9_5253, &pci_dev_info_10b9_5261, &pci_dev_info_10b9_5263, &pci_dev_info_10b9_5281, + &pci_dev_info_10b9_5287, + &pci_dev_info_10b9_5288, + &pci_dev_info_10b9_5289, &pci_dev_info_10b9_5450, &pci_dev_info_10b9_5451, &pci_dev_info_10b9_5453, @@ -91426,6 +111346,7 @@ &pci_dev_info_10b9_5457, &pci_dev_info_10b9_5459, &pci_dev_info_10b9_545a, + &pci_dev_info_10b9_5461, &pci_dev_info_10b9_5471, &pci_dev_info_10b9_5473, &pci_dev_info_10b9_7101, @@ -91516,9 +111437,11 @@ #define pci_dev_list_10d8 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_10d9[] = { + &pci_dev_info_10d9_0431, &pci_dev_info_10d9_0512, &pci_dev_info_10d9_0531, &pci_dev_info_10d9_8625, + &pci_dev_info_10d9_8626, &pci_dev_info_10d9_8888, NULL }; @@ -91541,7 +111464,12 @@ NULL }; #endif -#define pci_dev_list_10dd NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_10dd[] = { + &pci_dev_info_10dd_0100, + NULL +}; +#endif static const pciDeviceInfo *pci_dev_list_10de[] = { &pci_dev_info_10de_0008, &pci_dev_info_10de_0009, @@ -91570,20 +111498,25 @@ &pci_dev_info_10de_0042, &pci_dev_info_10de_0043, &pci_dev_info_10de_0045, + &pci_dev_info_10de_0047, &pci_dev_info_10de_0049, &pci_dev_info_10de_004e, + &pci_dev_info_10de_0050, + &pci_dev_info_10de_0051, &pci_dev_info_10de_0052, &pci_dev_info_10de_0053, &pci_dev_info_10de_0054, &pci_dev_info_10de_0055, &pci_dev_info_10de_0056, &pci_dev_info_10de_0057, + &pci_dev_info_10de_0058, &pci_dev_info_10de_0059, &pci_dev_info_10de_005a, &pci_dev_info_10de_005b, &pci_dev_info_10de_005c, &pci_dev_info_10de_005d, &pci_dev_info_10de_005e, + &pci_dev_info_10de_005f, &pci_dev_info_10de_0060, &pci_dev_info_10de_0064, &pci_dev_info_10de_0065, @@ -91595,6 +111528,7 @@ &pci_dev_info_10de_006c, &pci_dev_info_10de_006d, &pci_dev_info_10de_006e, + &pci_dev_info_10de_0080, &pci_dev_info_10de_0084, &pci_dev_info_10de_0085, &pci_dev_info_10de_0086, @@ -91604,11 +111538,17 @@ &pci_dev_info_10de_008b, &pci_dev_info_10de_008c, &pci_dev_info_10de_008e, + &pci_dev_info_10de_0091, + &pci_dev_info_10de_0092, + &pci_dev_info_10de_0099, &pci_dev_info_10de_00a0, &pci_dev_info_10de_00c0, &pci_dev_info_10de_00c1, &pci_dev_info_10de_00c2, &pci_dev_info_10de_00c8, + &pci_dev_info_10de_00c9, + &pci_dev_info_10de_00cc, + &pci_dev_info_10de_00cd, &pci_dev_info_10de_00ce, &pci_dev_info_10de_00d0, &pci_dev_info_10de_00d1, @@ -91619,9 +111559,11 @@ &pci_dev_info_10de_00d6, &pci_dev_info_10de_00d7, &pci_dev_info_10de_00d8, + &pci_dev_info_10de_00d9, &pci_dev_info_10de_00da, &pci_dev_info_10de_00dd, &pci_dev_info_10de_00df, + &pci_dev_info_10de_00e0, &pci_dev_info_10de_00e1, &pci_dev_info_10de_00e2, &pci_dev_info_10de_00e3, @@ -91636,6 +111578,7 @@ &pci_dev_info_10de_00f0, &pci_dev_info_10de_00f1, &pci_dev_info_10de_00f2, + &pci_dev_info_10de_00f3, &pci_dev_info_10de_00f8, &pci_dev_info_10de_00f9, &pci_dev_info_10de_00fa, @@ -91651,10 +111594,23 @@ &pci_dev_info_10de_0111, &pci_dev_info_10de_0112, &pci_dev_info_10de_0113, + &pci_dev_info_10de_0140, + &pci_dev_info_10de_0141, + &pci_dev_info_10de_0142, + &pci_dev_info_10de_0144, + &pci_dev_info_10de_0145, + &pci_dev_info_10de_0146, + &pci_dev_info_10de_0148, + &pci_dev_info_10de_014e, + &pci_dev_info_10de_014f, &pci_dev_info_10de_0150, &pci_dev_info_10de_0151, &pci_dev_info_10de_0152, &pci_dev_info_10de_0153, + &pci_dev_info_10de_0161, + &pci_dev_info_10de_0164, + &pci_dev_info_10de_0165, + &pci_dev_info_10de_0167, &pci_dev_info_10de_0170, &pci_dev_info_10de_0171, &pci_dev_info_10de_0172, @@ -91707,6 +111663,23 @@ &pci_dev_info_10de_0201, &pci_dev_info_10de_0202, &pci_dev_info_10de_0203, + &pci_dev_info_10de_0221, + &pci_dev_info_10de_0240, + &pci_dev_info_10de_0241, + &pci_dev_info_10de_0242, + &pci_dev_info_10de_0243, + &pci_dev_info_10de_0244, + &pci_dev_info_10de_0245, + &pci_dev_info_10de_0246, + &pci_dev_info_10de_0247, + &pci_dev_info_10de_0248, + &pci_dev_info_10de_0249, + &pci_dev_info_10de_024a, + &pci_dev_info_10de_024b, + &pci_dev_info_10de_024c, + &pci_dev_info_10de_024d, + &pci_dev_info_10de_024e, + &pci_dev_info_10de_024f, &pci_dev_info_10de_0250, &pci_dev_info_10de_0251, &pci_dev_info_10de_0252, @@ -91714,6 +111687,27 @@ &pci_dev_info_10de_0258, &pci_dev_info_10de_0259, &pci_dev_info_10de_025b, + &pci_dev_info_10de_0260, + &pci_dev_info_10de_0261, + &pci_dev_info_10de_0262, + &pci_dev_info_10de_0263, + &pci_dev_info_10de_0264, + &pci_dev_info_10de_0265, + &pci_dev_info_10de_0266, + &pci_dev_info_10de_0267, + &pci_dev_info_10de_0268, + &pci_dev_info_10de_0269, + &pci_dev_info_10de_026a, + &pci_dev_info_10de_026b, + &pci_dev_info_10de_026c, + &pci_dev_info_10de_026d, + &pci_dev_info_10de_026e, + &pci_dev_info_10de_026f, + &pci_dev_info_10de_0270, + &pci_dev_info_10de_0271, + &pci_dev_info_10de_0272, + &pci_dev_info_10de_027e, + &pci_dev_info_10de_027f, &pci_dev_info_10de_0280, &pci_dev_info_10de_0281, &pci_dev_info_10de_0282, @@ -91721,6 +111715,23 @@ &pci_dev_info_10de_0288, &pci_dev_info_10de_0289, &pci_dev_info_10de_028c, + &pci_dev_info_10de_02a0, + &pci_dev_info_10de_02f0, + &pci_dev_info_10de_02f1, + &pci_dev_info_10de_02f2, + &pci_dev_info_10de_02f3, + &pci_dev_info_10de_02f4, + &pci_dev_info_10de_02f5, + &pci_dev_info_10de_02f6, + &pci_dev_info_10de_02f7, + &pci_dev_info_10de_02f8, + &pci_dev_info_10de_02f9, + &pci_dev_info_10de_02fa, + &pci_dev_info_10de_02fb, + &pci_dev_info_10de_02fc, + &pci_dev_info_10de_02fd, + &pci_dev_info_10de_02fe, + &pci_dev_info_10de_02ff, &pci_dev_info_10de_0300, &pci_dev_info_10de_0301, &pci_dev_info_10de_0302, @@ -91772,21 +111783,42 @@ &pci_dev_info_10de_034c, &pci_dev_info_10de_034e, &pci_dev_info_10de_034f, + &pci_dev_info_10de_0360, + &pci_dev_info_10de_0361, + &pci_dev_info_10de_0362, + &pci_dev_info_10de_0363, + &pci_dev_info_10de_0364, + &pci_dev_info_10de_0365, + &pci_dev_info_10de_0366, + &pci_dev_info_10de_0367, + &pci_dev_info_10de_0368, + &pci_dev_info_10de_0369, + &pci_dev_info_10de_036a, + &pci_dev_info_10de_036c, + &pci_dev_info_10de_036d, + &pci_dev_info_10de_036e, + &pci_dev_info_10de_0371, + &pci_dev_info_10de_0372, + &pci_dev_info_10de_0373, + &pci_dev_info_10de_037a, + &pci_dev_info_10de_037e, + &pci_dev_info_10de_037f, NULL }; #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_10df[] = { &pci_dev_info_10df_1ae5, - &pci_dev_info_10df_1ae6, - &pci_dev_info_10df_1ae7, - &pci_dev_info_10df_f015, &pci_dev_info_10df_f085, &pci_dev_info_10df_f095, &pci_dev_info_10df_f098, &pci_dev_info_10df_f0a1, &pci_dev_info_10df_f0a5, + &pci_dev_info_10df_f0b5, + &pci_dev_info_10df_f0d1, &pci_dev_info_10df_f0d5, - &pci_dev_info_10df_f100, + &pci_dev_info_10df_f0e1, + &pci_dev_info_10df_f0e5, + &pci_dev_info_10df_f0f5, &pci_dev_info_10df_f700, &pci_dev_info_10df_f701, &pci_dev_info_10df_f800, @@ -91797,9 +111829,13 @@ &pci_dev_info_10df_f981, &pci_dev_info_10df_f982, &pci_dev_info_10df_fa00, - &pci_dev_info_10df_fa01, &pci_dev_info_10df_fb00, + &pci_dev_info_10df_fc00, + &pci_dev_info_10df_fc10, + &pci_dev_info_10df_fc20, &pci_dev_info_10df_fd00, + &pci_dev_info_10df_fe00, + &pci_dev_info_10df_ff00, NULL }; #endif @@ -91824,6 +111860,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_10e3[] = { &pci_dev_info_10e3_0000, + &pci_dev_info_10e3_0148, &pci_dev_info_10e3_0860, &pci_dev_info_10e3_0862, &pci_dev_info_10e3_8260, @@ -91831,7 +111868,12 @@ NULL }; #endif -#define pci_dev_list_10e4 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_10e4[] = { + &pci_dev_info_10e4_8029, + NULL +}; +#endif #define pci_dev_list_10e5 NULL #define pci_dev_list_10e6 NULL #define pci_dev_list_10e7 NULL @@ -91888,6 +111930,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_10ec[] = { + &pci_dev_info_10ec_0139, &pci_dev_info_10ec_8029, &pci_dev_info_10ec_8129, &pci_dev_info_10ec_8138, @@ -91906,6 +111949,11 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_10ee[] = { + &pci_dev_info_10ee_0205, + &pci_dev_info_10ee_0210, + &pci_dev_info_10ee_0314, + &pci_dev_info_10ee_0405, + &pci_dev_info_10ee_0410, &pci_dev_info_10ee_3fc0, &pci_dev_info_10ee_3fc1, &pci_dev_info_10ee_3fc2, @@ -92019,7 +112067,17 @@ static const pciDeviceInfo *pci_dev_list_1106[] = { &pci_dev_info_1106_0102, &pci_dev_info_1106_0130, + &pci_dev_info_1106_0204, + &pci_dev_info_1106_0238, + &pci_dev_info_1106_0258, + &pci_dev_info_1106_0259, + &pci_dev_info_1106_0269, + &pci_dev_info_1106_0282, + &pci_dev_info_1106_0290, + &pci_dev_info_1106_0296, &pci_dev_info_1106_0305, + &pci_dev_info_1106_0308, + &pci_dev_info_1106_0314, &pci_dev_info_1106_0391, &pci_dev_info_1106_0501, &pci_dev_info_1106_0505, @@ -92028,6 +112086,7 @@ &pci_dev_info_1106_0576, &pci_dev_info_1106_0585, &pci_dev_info_1106_0586, + &pci_dev_info_1106_0591, &pci_dev_info_1106_0595, &pci_dev_info_1106_0596, &pci_dev_info_1106_0597, @@ -92042,8 +112101,35 @@ &pci_dev_info_1106_0926, &pci_dev_info_1106_1000, &pci_dev_info_1106_1106, + &pci_dev_info_1106_1204, + &pci_dev_info_1106_1208, + &pci_dev_info_1106_1238, + &pci_dev_info_1106_1258, + &pci_dev_info_1106_1259, + &pci_dev_info_1106_1269, + &pci_dev_info_1106_1282, + &pci_dev_info_1106_1290, + &pci_dev_info_1106_1296, + &pci_dev_info_1106_1308, + &pci_dev_info_1106_1314, &pci_dev_info_1106_1571, &pci_dev_info_1106_1595, + &pci_dev_info_1106_2204, + &pci_dev_info_1106_2208, + &pci_dev_info_1106_2238, + &pci_dev_info_1106_2258, + &pci_dev_info_1106_2259, + &pci_dev_info_1106_2269, + &pci_dev_info_1106_2282, + &pci_dev_info_1106_2290, + &pci_dev_info_1106_2296, + &pci_dev_info_1106_2308, + &pci_dev_info_1106_2314, + &pci_dev_info_1106_287a, + &pci_dev_info_1106_287b, + &pci_dev_info_1106_287c, + &pci_dev_info_1106_287d, + &pci_dev_info_1106_287e, &pci_dev_info_1106_3022, &pci_dev_info_1106_3038, &pci_dev_info_1106_3040, @@ -92068,6 +112154,7 @@ &pci_dev_info_1106_3108, &pci_dev_info_1106_3109, &pci_dev_info_1106_3112, + &pci_dev_info_1106_3113, &pci_dev_info_1106_3116, &pci_dev_info_1106_3118, &pci_dev_info_1106_3119, @@ -92082,16 +112169,60 @@ &pci_dev_info_1106_3164, &pci_dev_info_1106_3168, &pci_dev_info_1106_3177, + &pci_dev_info_1106_3178, &pci_dev_info_1106_3188, &pci_dev_info_1106_3189, &pci_dev_info_1106_3204, &pci_dev_info_1106_3205, + &pci_dev_info_1106_3208, + &pci_dev_info_1106_3213, + &pci_dev_info_1106_3218, &pci_dev_info_1106_3227, + &pci_dev_info_1106_3238, + &pci_dev_info_1106_3249, + &pci_dev_info_1106_3258, + &pci_dev_info_1106_3259, + &pci_dev_info_1106_3269, + &pci_dev_info_1106_3282, + &pci_dev_info_1106_3287, + &pci_dev_info_1106_3288, + &pci_dev_info_1106_3290, + &pci_dev_info_1106_3296, + &pci_dev_info_1106_3337, + &pci_dev_info_1106_3344, + &pci_dev_info_1106_3349, + &pci_dev_info_1106_337a, + &pci_dev_info_1106_337b, &pci_dev_info_1106_4149, + &pci_dev_info_1106_4204, + &pci_dev_info_1106_4208, + &pci_dev_info_1106_4238, + &pci_dev_info_1106_4258, + &pci_dev_info_1106_4259, + &pci_dev_info_1106_4269, + &pci_dev_info_1106_4282, + &pci_dev_info_1106_4290, + &pci_dev_info_1106_4296, + &pci_dev_info_1106_4308, + &pci_dev_info_1106_4314, &pci_dev_info_1106_5030, + &pci_dev_info_1106_5208, + &pci_dev_info_1106_5238, + &pci_dev_info_1106_5290, + &pci_dev_info_1106_5308, &pci_dev_info_1106_6100, &pci_dev_info_1106_7204, &pci_dev_info_1106_7205, + &pci_dev_info_1106_7208, + &pci_dev_info_1106_7238, + &pci_dev_info_1106_7258, + &pci_dev_info_1106_7259, + &pci_dev_info_1106_7269, + &pci_dev_info_1106_7282, + &pci_dev_info_1106_7290, + &pci_dev_info_1106_7296, + &pci_dev_info_1106_7308, + &pci_dev_info_1106_7314, &pci_dev_info_1106_8231, &pci_dev_info_1106_8235, &pci_dev_info_1106_8305, @@ -92104,16 +112235,30 @@ &pci_dev_info_1106_8605, &pci_dev_info_1106_8691, &pci_dev_info_1106_8693, + &pci_dev_info_1106_a208, + &pci_dev_info_1106_a238, &pci_dev_info_1106_b091, &pci_dev_info_1106_b099, &pci_dev_info_1106_b101, &pci_dev_info_1106_b102, &pci_dev_info_1106_b103, &pci_dev_info_1106_b112, + &pci_dev_info_1106_b113, + &pci_dev_info_1106_b115, &pci_dev_info_1106_b168, &pci_dev_info_1106_b188, &pci_dev_info_1106_b198, + &pci_dev_info_1106_b213, + &pci_dev_info_1106_c208, + &pci_dev_info_1106_c238, &pci_dev_info_1106_d104, + &pci_dev_info_1106_d208, + &pci_dev_info_1106_d213, + &pci_dev_info_1106_d238, + &pci_dev_info_1106_e208, + &pci_dev_info_1106_e238, + &pci_dev_info_1106_f208, + &pci_dev_info_1106_f238, NULL }; #endif @@ -92152,6 +112297,7 @@ &pci_dev_info_110a_007b, &pci_dev_info_110a_007c, &pci_dev_info_110a_007d, + &pci_dev_info_110a_2101, &pci_dev_info_110a_2102, &pci_dev_info_110a_2104, &pci_dev_info_110a_3142, @@ -92372,6 +112518,7 @@ static const pciDeviceInfo *pci_dev_list_112f[] = { &pci_dev_info_112f_0000, &pci_dev_info_112f_0001, + &pci_dev_info_112f_0008, NULL }; #endif @@ -92383,12 +112530,14 @@ &pci_dev_info_1131_3400, &pci_dev_info_1131_5400, &pci_dev_info_1131_5402, + &pci_dev_info_1131_5405, + &pci_dev_info_1131_5406, &pci_dev_info_1131_7130, &pci_dev_info_1131_7133, &pci_dev_info_1131_7134, - &pci_dev_info_1131_7135, &pci_dev_info_1131_7145, &pci_dev_info_1131_7146, + &pci_dev_info_1131_9730, NULL }; #endif @@ -92437,6 +112586,8 @@ &pci_dev_info_1133_e020, &pci_dev_info_1133_e024, &pci_dev_info_1133_e028, + &pci_dev_info_1133_e02a, + &pci_dev_info_1133_e02c, NULL }; #endif @@ -92519,6 +112670,7 @@ &pci_dev_info_1145_f012, &pci_dev_info_1145_f013, &pci_dev_info_1145_f015, + &pci_dev_info_1145_f020, NULL }; #endif @@ -92532,6 +112684,8 @@ &pci_dev_info_1148_4320, &pci_dev_info_1148_4400, &pci_dev_info_1148_4500, + &pci_dev_info_1148_9000, + &pci_dev_info_1148_9843, &pci_dev_info_1148_9e00, NULL }; @@ -92563,7 +112717,6 @@ &pci_dev_info_114f_000d, &pci_dev_info_114f_0011, &pci_dev_info_114f_0012, - &pci_dev_info_114f_0013, &pci_dev_info_114f_0014, &pci_dev_info_114f_0015, &pci_dev_info_114f_0016, @@ -92673,21 +112826,32 @@ &pci_dev_info_1166_0015, &pci_dev_info_1166_0016, &pci_dev_info_1166_0017, + &pci_dev_info_1166_0036, &pci_dev_info_1166_0101, + &pci_dev_info_1166_0104, &pci_dev_info_1166_0110, + &pci_dev_info_1166_0130, + &pci_dev_info_1166_0132, &pci_dev_info_1166_0200, &pci_dev_info_1166_0201, &pci_dev_info_1166_0203, + &pci_dev_info_1166_0205, &pci_dev_info_1166_0211, &pci_dev_info_1166_0212, &pci_dev_info_1166_0213, + &pci_dev_info_1166_0214, &pci_dev_info_1166_0217, &pci_dev_info_1166_0220, &pci_dev_info_1166_0221, + &pci_dev_info_1166_0223, &pci_dev_info_1166_0225, &pci_dev_info_1166_0227, &pci_dev_info_1166_0230, + &pci_dev_info_1166_0234, &pci_dev_info_1166_0240, + &pci_dev_info_1166_0241, + &pci_dev_info_1166_0242, + &pci_dev_info_1166_024a, NULL }; #endif @@ -92724,6 +112888,7 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1179[] = { + &pci_dev_info_1179_0102, &pci_dev_info_1179_0103, &pci_dev_info_1179_0404, &pci_dev_info_1179_0406, @@ -92743,7 +112908,12 @@ #endif #define pci_dev_list_117a NULL #define pci_dev_list_117b NULL -#define pci_dev_list_117c NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_117c[] = { + &pci_dev_info_117c_0030, + NULL +}; +#endif #define pci_dev_list_117d NULL #define pci_dev_list_117e NULL #define pci_dev_list_117f NULL @@ -92755,9 +112925,18 @@ &pci_dev_info_1180_0476, &pci_dev_info_1180_0477, &pci_dev_info_1180_0478, + &pci_dev_info_1180_0511, &pci_dev_info_1180_0522, &pci_dev_info_1180_0551, &pci_dev_info_1180_0552, + &pci_dev_info_1180_0554, + &pci_dev_info_1180_0575, + &pci_dev_info_1180_0576, + &pci_dev_info_1180_0592, + &pci_dev_info_1180_0811, + &pci_dev_info_1180_0822, + &pci_dev_info_1180_0841, + &pci_dev_info_1180_0852, NULL }; #endif @@ -92790,8 +112969,8 @@ &pci_dev_info_1186_3a13, &pci_dev_info_1186_3a14, &pci_dev_info_1186_3a63, - &pci_dev_info_1186_3b05, &pci_dev_info_1186_4000, + &pci_dev_info_1186_4300, &pci_dev_info_1186_4c00, &pci_dev_info_1186_8400, NULL @@ -92854,6 +113033,10 @@ &pci_dev_info_1191_8030, &pci_dev_info_1191_8040, &pci_dev_info_1191_8050, + &pci_dev_info_1191_8060, + &pci_dev_info_1191_8080, + &pci_dev_info_1191_8081, + &pci_dev_info_1191_808a, NULL }; #endif @@ -92914,15 +113097,28 @@ &pci_dev_info_11ab_0146, &pci_dev_info_11ab_138f, &pci_dev_info_11ab_1fa6, + &pci_dev_info_11ab_1fa7, + &pci_dev_info_11ab_1faa, &pci_dev_info_11ab_4320, + &pci_dev_info_11ab_4340, + &pci_dev_info_11ab_4341, + &pci_dev_info_11ab_4342, + &pci_dev_info_11ab_4343, + &pci_dev_info_11ab_4344, + &pci_dev_info_11ab_4345, + &pci_dev_info_11ab_4346, + &pci_dev_info_11ab_4347, &pci_dev_info_11ab_4350, &pci_dev_info_11ab_4351, + &pci_dev_info_11ab_4352, &pci_dev_info_11ab_4360, &pci_dev_info_11ab_4361, &pci_dev_info_11ab_4362, + &pci_dev_info_11ab_4363, &pci_dev_info_11ab_4611, &pci_dev_info_11ab_4620, &pci_dev_info_11ab_4801, + &pci_dev_info_11ab_5005, &pci_dev_info_11ab_5040, &pci_dev_info_11ab_5041, &pci_dev_info_11ab_5080, @@ -92930,6 +113126,7 @@ &pci_dev_info_11ab_6041, &pci_dev_info_11ab_6081, &pci_dev_info_11ab_6460, + &pci_dev_info_11ab_6480, &pci_dev_info_11ab_f003, NULL }; @@ -92946,6 +113143,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_11af[] = { &pci_dev_info_11af_0001, + &pci_dev_info_11af_ee40, NULL }; #endif @@ -92985,7 +113183,13 @@ NULL }; #endif -#define pci_dev_list_11bd NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_11bd[] = { + &pci_dev_info_11bd_002e, + &pci_dev_info_11bd_bede, + NULL +}; +#endif #define pci_dev_list_11be NULL #define pci_dev_list_11bf NULL #define pci_dev_list_11c0 NULL @@ -93028,11 +113232,13 @@ &pci_dev_info_11c1_5802, &pci_dev_info_11c1_5803, &pci_dev_info_11c1_5811, + &pci_dev_info_11c1_8110, &pci_dev_info_11c1_ab10, &pci_dev_info_11c1_ab11, &pci_dev_info_11c1_ab20, &pci_dev_info_11c1_ab21, &pci_dev_info_11c1_ab30, + &pci_dev_info_11c1_ed00, NULL }; #endif @@ -93084,6 +113290,7 @@ &pci_dev_info_11d4_1535, &pci_dev_info_11d4_1805, &pci_dev_info_11d4_1889, + &pci_dev_info_11d4_5340, NULL }; #endif @@ -93115,6 +113322,7 @@ #define pci_dev_list_11e2 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_11e3[] = { + &pci_dev_info_11e3_0001, &pci_dev_info_11e3_5030, NULL }; @@ -93199,6 +113407,7 @@ &pci_dev_info_11fe_0805, &pci_dev_info_11fe_080c, &pci_dev_info_11fe_080d, + &pci_dev_info_11fe_0812, &pci_dev_info_11fe_0903, &pci_dev_info_11fe_8015, NULL @@ -93280,10 +113489,12 @@ &pci_dev_info_1217_7112, &pci_dev_info_1217_7113, &pci_dev_info_1217_7114, + &pci_dev_info_1217_7134, &pci_dev_info_1217_71e2, &pci_dev_info_1217_7212, &pci_dev_info_1217_7213, &pci_dev_info_1217_7223, + &pci_dev_info_1217_7233, NULL }; #endif @@ -93332,6 +113543,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1227[] = { &pci_dev_info_1227_0006, + &pci_dev_info_1227_0023, NULL }; #endif @@ -93516,6 +113728,7 @@ &pci_dev_info_1260_3890, &pci_dev_info_1260_8130, &pci_dev_info_1260_8131, + &pci_dev_info_1260_ffff, NULL }; #endif @@ -93553,6 +113766,7 @@ #define pci_dev_list_126e NULL static const pciDeviceInfo *pci_dev_list_126f[] = { &pci_dev_info_126f_0501, + &pci_dev_info_126f_0510, &pci_dev_info_126f_0710, &pci_dev_info_126f_0712, &pci_dev_info_126f_0720, @@ -93591,6 +113805,8 @@ #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1279[] = { + &pci_dev_info_1279_0060, + &pci_dev_info_1279_0061, &pci_dev_info_1279_0295, &pci_dev_info_1279_0395, &pci_dev_info_1279_0396, @@ -93647,6 +113863,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1283[] = { &pci_dev_info_1283_673a, + &pci_dev_info_1283_8211, &pci_dev_info_1283_8212, &pci_dev_info_1283_8330, &pci_dev_info_1283_8872, @@ -93787,7 +114004,39 @@ NULL }; #endif -#define pci_dev_list_12c4 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_12c4[] = { + &pci_dev_info_12c4_0001, + &pci_dev_info_12c4_0002, + &pci_dev_info_12c4_0003, + &pci_dev_info_12c4_0004, + &pci_dev_info_12c4_0005, + &pci_dev_info_12c4_0006, + &pci_dev_info_12c4_0007, + &pci_dev_info_12c4_0008, + &pci_dev_info_12c4_0009, + &pci_dev_info_12c4_000a, + &pci_dev_info_12c4_000b, + &pci_dev_info_12c4_000c, + &pci_dev_info_12c4_000d, + &pci_dev_info_12c4_0100, + &pci_dev_info_12c4_0201, + &pci_dev_info_12c4_0202, + &pci_dev_info_12c4_0300, + &pci_dev_info_12c4_0301, + &pci_dev_info_12c4_0302, + &pci_dev_info_12c4_0310, + &pci_dev_info_12c4_0311, + &pci_dev_info_12c4_0312, + &pci_dev_info_12c4_0320, + &pci_dev_info_12c4_0321, + &pci_dev_info_12c4_0322, + &pci_dev_info_12c4_0330, + &pci_dev_info_12c4_0331, + &pci_dev_info_12c4_0332, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_12c5[] = { &pci_dev_info_12c5_007e, @@ -93829,10 +114078,21 @@ NULL }; #endif -#define pci_dev_list_12d5 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_12d5[] = { + &pci_dev_info_12d5_0003, + &pci_dev_info_12d5_1000, + NULL +}; +#endif #define pci_dev_list_12d6 NULL #define pci_dev_list_12d7 NULL -#define pci_dev_list_12d8 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_12d8[] = { + &pci_dev_info_12d8_8150, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_12d9[] = { &pci_dev_info_12d9_0002, @@ -93898,7 +114158,25 @@ }; #endif #define pci_dev_list_12f9 NULL -#define pci_dev_list_12fb NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_12fb[] = { + &pci_dev_info_12fb_0001, + &pci_dev_info_12fb_00f5, + &pci_dev_info_12fb_02ad, + &pci_dev_info_12fb_2adc, + &pci_dev_info_12fb_3100, + &pci_dev_info_12fb_3500, + &pci_dev_info_12fb_4d4f, + &pci_dev_info_12fb_8120, + &pci_dev_info_12fb_da62, + &pci_dev_info_12fb_db62, + &pci_dev_info_12fb_dc62, + &pci_dev_info_12fb_dd62, + &pci_dev_info_12fb_eddc, + &pci_dev_info_12fb_fa01, + NULL +}; +#endif #define pci_dev_list_12fc NULL #define pci_dev_list_12fd NULL #define pci_dev_list_12fe NULL @@ -93948,6 +114226,7 @@ &pci_dev_info_1307_004c, &pci_dev_info_1307_004d, &pci_dev_info_1307_0052, + &pci_dev_info_1307_0054, &pci_dev_info_1307_005e, NULL }; @@ -93976,6 +114255,7 @@ &pci_dev_info_1317_0985, &pci_dev_info_1317_1985, &pci_dev_info_1317_2850, + &pci_dev_info_1317_5120, &pci_dev_info_1317_8201, &pci_dev_info_1317_8211, &pci_dev_info_1317_9511, @@ -94073,6 +114353,7 @@ static const pciDeviceInfo *pci_dev_list_1332[] = { &pci_dev_info_1332_5415, &pci_dev_info_1332_5425, + &pci_dev_info_1332_6140, NULL }; #endif @@ -94179,6 +114460,7 @@ &pci_dev_info_1360_0202, &pci_dev_info_1360_0203, &pci_dev_info_1360_0301, + &pci_dev_info_1360_0302, NULL }; #endif @@ -94209,7 +114491,32 @@ }; #endif #define pci_dev_list_1373 NULL -#define pci_dev_list_1374 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1374[] = { + &pci_dev_info_1374_0024, + &pci_dev_info_1374_0025, + &pci_dev_info_1374_0026, + &pci_dev_info_1374_0027, + &pci_dev_info_1374_0029, + &pci_dev_info_1374_002a, + &pci_dev_info_1374_002b, + &pci_dev_info_1374_002c, + &pci_dev_info_1374_002d, + &pci_dev_info_1374_002e, + &pci_dev_info_1374_002f, + &pci_dev_info_1374_0030, + &pci_dev_info_1374_0031, + &pci_dev_info_1374_0032, + &pci_dev_info_1374_0034, + &pci_dev_info_1374_0035, + &pci_dev_info_1374_0036, + &pci_dev_info_1374_0037, + &pci_dev_info_1374_0038, + &pci_dev_info_1374_0039, + &pci_dev_info_1374_003a, + NULL +}; +#endif #define pci_dev_list_1375 NULL #define pci_dev_list_1376 NULL #define pci_dev_list_1377 NULL @@ -94231,7 +114538,15 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1382[] = { &pci_dev_info_1382_0001, + &pci_dev_info_1382_2008, &pci_dev_info_1382_2088, + &pci_dev_info_1382_20c8, + &pci_dev_info_1382_4008, + &pci_dev_info_1382_4010, + &pci_dev_info_1382_4048, + &pci_dev_info_1382_4088, + &pci_dev_info_1382_4248, + &pci_dev_info_1382_4424, NULL }; #endif @@ -94240,17 +114555,27 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1385[] = { &pci_dev_info_1385_0013, + &pci_dev_info_1385_311a, &pci_dev_info_1385_4100, &pci_dev_info_1385_4105, &pci_dev_info_1385_4400, &pci_dev_info_1385_4600, &pci_dev_info_1385_4601, &pci_dev_info_1385_4610, + &pci_dev_info_1385_4800, + &pci_dev_info_1385_4900, &pci_dev_info_1385_4a00, + &pci_dev_info_1385_4b00, &pci_dev_info_1385_4c00, + &pci_dev_info_1385_4d00, + &pci_dev_info_1385_4e00, + &pci_dev_info_1385_4f00, + &pci_dev_info_1385_5200, &pci_dev_info_1385_620a, &pci_dev_info_1385_622a, &pci_dev_info_1385_630a, + &pci_dev_info_1385_6b00, + &pci_dev_info_1385_6d00, &pci_dev_info_1385_f004, NULL }; @@ -94294,6 +114619,8 @@ #define pci_dev_list_1396 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1397[] = { + &pci_dev_info_1397_08b4, + &pci_dev_info_1397_16b8, &pci_dev_info_1397_2bd0, NULL }; @@ -94326,6 +114653,9 @@ &pci_dev_info_13a3_0016, &pci_dev_info_13a3_0017, &pci_dev_info_13a3_0018, + &pci_dev_info_13a3_001d, + &pci_dev_info_13a3_0020, + &pci_dev_info_13a3_0026, NULL }; #endif @@ -94335,6 +114665,7 @@ #define pci_dev_list_13a7 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_13a8[] = { + &pci_dev_info_13a8_0152, &pci_dev_info_13a8_0154, &pci_dev_info_13a8_0158, NULL @@ -94377,6 +114708,7 @@ &pci_dev_info_13c1_1000, &pci_dev_info_13c1_1001, &pci_dev_info_13c1_1002, + &pci_dev_info_13c1_1003, NULL }; #endif @@ -94454,7 +114786,9 @@ #define pci_dev_list_13ef NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_13f0[] = { + &pci_dev_info_13f0_0200, &pci_dev_info_13f0_0201, + &pci_dev_info_13f0_1023, NULL }; #endif @@ -94489,6 +114823,7 @@ static const pciDeviceInfo *pci_dev_list_13fe[] = { &pci_dev_info_13fe_1240, &pci_dev_info_13fe_1600, + &pci_dev_info_13fe_1733, &pci_dev_info_13fe_1752, &pci_dev_info_13fe_1754, &pci_dev_info_13fe_1756, @@ -94513,6 +114848,8 @@ &pci_dev_info_1407_0100, &pci_dev_info_1407_0101, &pci_dev_info_1407_0102, + &pci_dev_info_1407_0110, + &pci_dev_info_1407_0111, &pci_dev_info_1407_0120, &pci_dev_info_1407_0121, &pci_dev_info_1407_0180, @@ -94562,8 +114899,10 @@ &pci_dev_info_1415_9501, &pci_dev_info_1415_950a, &pci_dev_info_1415_950b, + &pci_dev_info_1415_9510, &pci_dev_info_1415_9511, &pci_dev_info_1415_9521, + &pci_dev_info_1415_9523, NULL }; #endif @@ -94587,7 +114926,12 @@ #define pci_dev_list_1422 NULL #define pci_dev_list_1423 NULL #define pci_dev_list_1424 NULL -#define pci_dev_list_1425 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1425[] = { + &pci_dev_info_1425_000b, + NULL +}; +#endif #define pci_dev_list_1426 NULL #define pci_dev_list_1427 NULL #define pci_dev_list_1428 NULL @@ -94599,6 +114943,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_142e[] = { &pci_dev_info_142e_4020, + &pci_dev_info_142e_4337, NULL }; #endif @@ -94661,7 +115006,13 @@ #define pci_dev_list_1455 NULL #define pci_dev_list_1456 NULL #define pci_dev_list_1457 NULL -#define pci_dev_list_1458 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1458[] = { + &pci_dev_info_1458_0c11, + &pci_dev_info_1458_e911, + NULL +}; +#endif #define pci_dev_list_1459 NULL #define pci_dev_list_145a NULL #define pci_dev_list_145b NULL @@ -94675,13 +115026,23 @@ }; #endif #define pci_dev_list_1460 NULL -#define pci_dev_list_1461 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1461[] = { + &pci_dev_info_1461_f436, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1462[] = { + &pci_dev_info_1462_5501, + &pci_dev_info_1462_6819, &pci_dev_info_1462_6825, + &pci_dev_info_1462_6834, &pci_dev_info_1462_8725, &pci_dev_info_1462_9000, + &pci_dev_info_1462_9110, &pci_dev_info_1462_9119, + &pci_dev_info_1462_9591, NULL }; #endif @@ -94747,9 +115108,17 @@ #define pci_dev_list_1494 NULL #define pci_dev_list_1495 NULL #define pci_dev_list_1496 NULL -#define pci_dev_list_1497 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1497[] = { + &pci_dev_info_1497_1497, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1498[] = { + &pci_dev_info_1498_0330, + &pci_dev_info_1498_0385, + &pci_dev_info_1498_21cd, &pci_dev_info_1498_30c8, NULL }; @@ -94898,6 +115267,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_14db[] = { &pci_dev_info_14db_2120, + &pci_dev_info_14db_2182, NULL }; #endif @@ -94934,20 +115304,27 @@ &pci_dev_info_14e4_080f, &pci_dev_info_14e4_0811, &pci_dev_info_14e4_0816, + &pci_dev_info_14e4_1600, + &pci_dev_info_14e4_1601, &pci_dev_info_14e4_1644, &pci_dev_info_14e4_1645, &pci_dev_info_14e4_1646, &pci_dev_info_14e4_1647, &pci_dev_info_14e4_1648, &pci_dev_info_14e4_164a, + &pci_dev_info_14e4_164c, &pci_dev_info_14e4_164d, &pci_dev_info_14e4_1653, &pci_dev_info_14e4_1654, &pci_dev_info_14e4_1659, &pci_dev_info_14e4_165d, &pci_dev_info_14e4_165e, + &pci_dev_info_14e4_1668, + &pci_dev_info_14e4_166a, + &pci_dev_info_14e4_166b, &pci_dev_info_14e4_166e, &pci_dev_info_14e4_1677, + &pci_dev_info_14e4_1678, &pci_dev_info_14e4_167d, &pci_dev_info_14e4_167e, &pci_dev_info_14e4_1696, @@ -94957,6 +115334,7 @@ &pci_dev_info_14e4_16a7, &pci_dev_info_14e4_16a8, &pci_dev_info_14e4_16aa, + &pci_dev_info_14e4_16ac, &pci_dev_info_14e4_16c6, &pci_dev_info_14e4_16c7, &pci_dev_info_14e4_16dd, @@ -94979,6 +115357,8 @@ &pci_dev_info_14e4_4312, &pci_dev_info_14e4_4313, &pci_dev_info_14e4_4315, + &pci_dev_info_14e4_4318, + &pci_dev_info_14e4_4319, &pci_dev_info_14e4_4320, &pci_dev_info_14e4_4321, &pci_dev_info_14e4_4322, @@ -95013,6 +115393,7 @@ &pci_dev_info_14e4_4716, &pci_dev_info_14e4_4717, &pci_dev_info_14e4_4718, + &pci_dev_info_14e4_4719, &pci_dev_info_14e4_4720, &pci_dev_info_14e4_5365, &pci_dev_info_14e4_5600, @@ -95024,6 +115405,7 @@ &pci_dev_info_14e4_5680, &pci_dev_info_14e4_5690, &pci_dev_info_14e4_5691, + &pci_dev_info_14e4_5692, &pci_dev_info_14e4_5820, &pci_dev_info_14e4_5821, &pci_dev_info_14e4_5822, @@ -95044,6 +115426,7 @@ static const pciDeviceInfo *pci_dev_list_14ea[] = { &pci_dev_info_14ea_ab06, &pci_dev_info_14ea_ab07, + &pci_dev_info_14ea_ab08, NULL }; #endif @@ -95081,6 +115464,7 @@ &pci_dev_info_14f1_1064, &pci_dev_info_14f1_1065, &pci_dev_info_14f1_1066, + &pci_dev_info_14f1_1085, &pci_dev_info_14f1_1433, &pci_dev_info_14f1_1434, &pci_dev_info_14f1_1435, @@ -95095,6 +115479,7 @@ &pci_dev_info_14f1_1621, &pci_dev_info_14f1_1622, &pci_dev_info_14f1_1803, + &pci_dev_info_14f1_1811, &pci_dev_info_14f1_1815, &pci_dev_info_14f1_2003, &pci_dev_info_14f1_2004, @@ -95140,8 +115525,13 @@ &pci_dev_info_14f1_2f00, &pci_dev_info_14f1_2f02, &pci_dev_info_14f1_2f11, + &pci_dev_info_14f1_2f20, &pci_dev_info_14f1_8234, &pci_dev_info_14f1_8800, + &pci_dev_info_14f1_8801, + &pci_dev_info_14f1_8802, + &pci_dev_info_14f1_8804, + &pci_dev_info_14f1_8811, NULL }; #endif @@ -95246,7 +115636,13 @@ }; #endif #define pci_dev_list_151b NULL -#define pci_dev_list_151c NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_151c[] = { + &pci_dev_info_151c_0003, + &pci_dev_info_151c_4000, + NULL +}; +#endif #define pci_dev_list_151d NULL #define pci_dev_list_151e NULL #ifdef VENDOR_INCLUDE_NONVIDEO @@ -95267,6 +115663,9 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1524[] = { &pci_dev_info_1524_0510, + &pci_dev_info_1524_0520, + &pci_dev_info_1524_0530, + &pci_dev_info_1524_0550, &pci_dev_info_1524_0610, &pci_dev_info_1524_1211, &pci_dev_info_1524_1225, @@ -95292,7 +115691,12 @@ #define pci_dev_list_152f NULL #define pci_dev_list_1530 NULL #define pci_dev_list_1531 NULL -#define pci_dev_list_1532 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1532[] = { + &pci_dev_info_1532_0020, + NULL +}; +#endif #define pci_dev_list_1533 NULL #define pci_dev_list_1534 NULL #define pci_dev_list_1535 NULL @@ -95316,7 +115720,12 @@ #define pci_dev_list_153c NULL #define pci_dev_list_153d NULL #define pci_dev_list_153e NULL -#define pci_dev_list_153f NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_153f[] = { + &pci_dev_info_153f_0001, + NULL +}; +#endif #define pci_dev_list_1540 NULL #define pci_dev_list_1541 NULL #define pci_dev_list_1542 NULL @@ -95401,7 +115810,12 @@ #define pci_dev_list_1574 NULL #define pci_dev_list_1575 NULL #define pci_dev_list_1576 NULL -#define pci_dev_list_1578 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1578[] = { + &pci_dev_info_1578_5615, + NULL +}; +#endif #define pci_dev_list_1579 NULL #define pci_dev_list_157a NULL #define pci_dev_list_157b NULL @@ -95491,8 +115905,8 @@ &pci_dev_info_15b3_5a44, &pci_dev_info_15b3_5a45, &pci_dev_info_15b3_5a46, - &pci_dev_info_15b3_5e8c, &pci_dev_info_15b3_5e8d, + &pci_dev_info_15b3_6274, &pci_dev_info_15b3_6278, &pci_dev_info_15b3_6279, &pci_dev_info_15b3_6282, @@ -95509,6 +115923,7 @@ #define pci_dev_list_15bb NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_15bc[] = { + &pci_dev_info_15bc_1100, &pci_dev_info_15bc_2922, &pci_dev_info_15bc_2928, &pci_dev_info_15bc_2929, @@ -95627,6 +116042,11 @@ static const pciDeviceInfo *pci_dev_list_1619[] = { &pci_dev_info_1619_0400, &pci_dev_info_1619_0440, + &pci_dev_info_1619_0610, + &pci_dev_info_1619_0620, + &pci_dev_info_1619_0640, + &pci_dev_info_1619_1610, + &pci_dev_info_1619_2610, NULL }; #endif @@ -95673,6 +116093,12 @@ }; #endif #define pci_dev_list_165d NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_165f[] = { + &pci_dev_info_165f_1020, + NULL +}; +#endif #define pci_dev_list_1661 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1668[] = { @@ -95695,11 +116121,18 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_167b[] = { + &pci_dev_info_167b_2102, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1681[] = { &pci_dev_info_1681_0010, NULL }; #endif +#define pci_dev_list_1682 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1688[] = { &pci_dev_info_1688_1170, @@ -95712,16 +116145,27 @@ &pci_dev_info_168c_0011, &pci_dev_info_168c_0012, &pci_dev_info_168c_0013, + &pci_dev_info_168c_001a, + &pci_dev_info_168c_001b, + &pci_dev_info_168c_0020, &pci_dev_info_168c_1014, NULL }; #endif +#define pci_dev_list_1695 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_169c[] = { + &pci_dev_info_169c_0044, + NULL +}; +#endif #define pci_dev_list_16a5 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_16ab[] = { &pci_dev_info_16ab_1100, &pci_dev_info_16ab_1101, &pci_dev_info_16ab_1102, + &pci_dev_info_16ab_8501, NULL }; #endif @@ -95731,8 +116175,12 @@ NULL }; #endif +#define pci_dev_list_16af NULL #define pci_dev_list_16b4 NULL +#define pci_dev_list_16b8 NULL #define pci_dev_list_16be NULL +#define pci_dev_list_16c8 NULL +#define pci_dev_list_16c9 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_16ca[] = { &pci_dev_info_16ca_0001, @@ -95740,6 +116188,7 @@ }; #endif #define pci_dev_list_16cd NULL +#define pci_dev_list_16ce NULL #define pci_dev_list_16df NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_16e3[] = { @@ -95750,6 +116199,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_16ec[] = { &pci_dev_info_16ec_00ff, + &pci_dev_info_16ec_0116, &pci_dev_info_16ec_3685, NULL }; @@ -95783,7 +116233,12 @@ NULL }; #endif -#define pci_dev_list_172a NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_172a[] = { + &pci_dev_info_172a_13c8, + NULL +}; +#endif #define pci_dev_list_1734 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1737[] = { @@ -95816,6 +116271,7 @@ #define pci_dev_list_174d NULL #define pci_dev_list_175c NULL #define pci_dev_list_175e NULL +#define pci_dev_list_1775 NULL #define pci_dev_list_1787 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1796[] = { @@ -95835,6 +116291,18 @@ &pci_dev_info_1799_6020, &pci_dev_info_1799_6060, &pci_dev_info_1799_7000, + &pci_dev_info_1799_7010, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_179c[] = { + &pci_dev_info_179c_0557, + &pci_dev_info_179c_0566, + &pci_dev_info_179c_5031, + &pci_dev_info_179c_5121, + &pci_dev_info_179c_5211, + &pci_dev_info_179c_5679, NULL }; #endif @@ -95845,6 +116313,7 @@ NULL }; #endif +#define pci_dev_list_17aa NULL #define pci_dev_list_17af NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_17b3[] = { @@ -95860,20 +116329,45 @@ #endif #define pci_dev_list_17c0 NULL #define pci_dev_list_17c2 NULL +#define pci_dev_list_17cb NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_17cc[] = { &pci_dev_info_17cc_2280, NULL }; #endif -#define pci_dev_list_17d5 NULL +#define pci_dev_list_17cf NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_17d3[] = { + &pci_dev_info_17d3_1110, + &pci_dev_info_17d3_1120, + &pci_dev_info_17d3_1130, + &pci_dev_info_17d3_1160, + &pci_dev_info_17d3_1210, + &pci_dev_info_17d3_1220, + &pci_dev_info_17d3_1230, + &pci_dev_info_17d3_1260, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_17d5[] = { + &pci_dev_info_17d5_5831, + &pci_dev_info_17d5_5832, + NULL +}; +#endif +#define pci_dev_list_17de NULL #define pci_dev_list_17ee NULL +#define pci_dev_list_17f2 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_17fe[] = { + &pci_dev_info_17fe_2120, &pci_dev_info_17fe_2220, NULL }; #endif +#define pci_dev_list_17ff NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1813[] = { &pci_dev_info_1813_4000, @@ -95884,15 +116378,24 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1814[] = { &pci_dev_info_1814_0101, + &pci_dev_info_1814_0200, &pci_dev_info_1814_0201, + &pci_dev_info_1814_0301, + &pci_dev_info_1814_0401, NULL }; #endif #define pci_dev_list_1820 NULL -#define pci_dev_list_1822 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1822[] = { + &pci_dev_info_1822_4e35, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_182d[] = { &pci_dev_info_182d_3069, + &pci_dev_info_182d_9790, NULL }; #endif @@ -95908,6 +116411,15 @@ #define pci_dev_list_1849 NULL #define pci_dev_list_1851 NULL #define pci_dev_list_1852 NULL +#define pci_dev_list_1854 NULL +#define pci_dev_list_185b NULL +#define pci_dev_list_185f NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1864[] = { + &pci_dev_info_1864_2110, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1867[] = { &pci_dev_info_1867_5a44, @@ -95918,6 +116430,7 @@ NULL }; #endif +#define pci_dev_list_187e NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1888[] = { &pci_dev_info_1888_0301, @@ -95927,23 +116440,43 @@ NULL }; #endif +#define pci_dev_list_1890 NULL #define pci_dev_list_1894 NULL #define pci_dev_list_1896 NULL #define pci_dev_list_18a1 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_18ac[] = { + &pci_dev_info_18ac_d500, &pci_dev_info_18ac_d810, + &pci_dev_info_18ac_d820, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_18b8[] = { + &pci_dev_info_18b8_b001, NULL }; #endif #define pci_dev_list_18bc NULL #define pci_dev_list_18c8 NULL #define pci_dev_list_18c9 NULL -#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_18ca[] = { + &pci_dev_info_18ca_0020, &pci_dev_info_18ca_0040, NULL }; +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_18d2[] = { + &pci_dev_info_18d2_3069, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_18dd[] = { + &pci_dev_info_18dd_4c6f, + NULL +}; #endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_18e6[] = { @@ -95952,6 +116485,15 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_18ec[] = { + &pci_dev_info_18ec_c006, + &pci_dev_info_18ec_c045, + &pci_dev_info_18ec_c050, + &pci_dev_info_18ec_c058, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_18f7[] = { &pci_dev_info_18f7_0001, &pci_dev_info_18f7_0002, @@ -95963,6 +116505,77 @@ #endif #define pci_dev_list_18fb NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1923[] = { + &pci_dev_info_1923_0100, + NULL +}; +#endif +#define pci_dev_list_1924 NULL +#define pci_dev_list_192e NULL +#define pci_dev_list_1931 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1942[] = { + &pci_dev_info_1942_e511, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1957[] = { + &pci_dev_info_1957_0080, + &pci_dev_info_1957_0081, + &pci_dev_info_1957_0082, + &pci_dev_info_1957_0083, + &pci_dev_info_1957_0084, + &pci_dev_info_1957_0085, + &pci_dev_info_1957_0086, + &pci_dev_info_1957_0087, + NULL +}; +#endif +#define pci_dev_list_1958 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1966[] = { + &pci_dev_info_1966_1975, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_196a[] = { + &pci_dev_info_196a_0101, + &pci_dev_info_196a_0102, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_197b[] = { + &pci_dev_info_197b_2360, + &pci_dev_info_197b_2363, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1989[] = { + &pci_dev_info_1989_0001, + &pci_dev_info_1989_8001, + NULL +}; +#endif +#define pci_dev_list_1993 NULL +#define pci_dev_list_19a8 NULL +#define pci_dev_list_19ac NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_19ae[] = { + &pci_dev_info_19ae_0520, + NULL +}; +#endif +#define pci_dev_list_19d4 NULL +#define pci_dev_list_19e2 NULL +static const pciDeviceInfo *pci_dev_list_1a03[] = { + &pci_dev_info_1a03_2000, + NULL +}; +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_1a08[] = { &pci_dev_info_1a08_0000, NULL @@ -95996,6 +116609,18 @@ NULL }; #endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1fc1[] = { + &pci_dev_info_1fc1_000d, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_1fce[] = { + &pci_dev_info_1fce_0001, + NULL +}; +#endif #define pci_dev_list_2000 NULL #define pci_dev_list_2001 NULL #define pci_dev_list_2003 NULL @@ -96032,7 +116657,12 @@ #endif #define pci_dev_list_3411 NULL #define pci_dev_list_3513 NULL -#define pci_dev_list_3842 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_3842[] = { + &pci_dev_info_3842_c370, + NULL +}; +#endif #define pci_dev_list_38ef NULL static const pciDeviceInfo *pci_dev_list_3d3d[] = { &pci_dev_info_3d3d_0001, @@ -96086,7 +116716,12 @@ }; #endif #define pci_dev_list_4143 NULL -#define pci_dev_list_4144 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_4144[] = { + &pci_dev_info_4144_0044, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_416c[] = { &pci_dev_info_416c_0100, @@ -96094,6 +116729,7 @@ NULL }; #endif +#define pci_dev_list_4321 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_4444[] = { &pci_dev_info_4444_0016, @@ -96185,7 +116821,12 @@ NULL }; #endif -#define pci_dev_list_5168 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_5168[] = { + &pci_dev_info_5168_0301, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_5301[] = { &pci_dev_info_5301_0001, @@ -96320,6 +116961,15 @@ static const pciDeviceInfo *pci_dev_list_6666[] = { &pci_dev_info_6666_0001, &pci_dev_info_6666_0002, + &pci_dev_info_6666_0004, + &pci_dev_info_6666_0101, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_7063[] = { + &pci_dev_info_7063_2000, + &pci_dev_info_7063_3000, NULL }; #endif @@ -96355,6 +117005,11 @@ &pci_dev_info_8086_0336, &pci_dev_info_8086_0340, &pci_dev_info_8086_0341, + &pci_dev_info_8086_0370, + &pci_dev_info_8086_0371, + &pci_dev_info_8086_0372, + &pci_dev_info_8086_0373, + &pci_dev_info_8086_0374, &pci_dev_info_8086_0482, &pci_dev_info_8086_0483, &pci_dev_info_8086_0484, @@ -96391,6 +117046,7 @@ &pci_dev_info_8086_1004, &pci_dev_info_8086_1008, &pci_dev_info_8086_1009, + &pci_dev_info_8086_100a, &pci_dev_info_8086_100c, &pci_dev_info_8086_100d, &pci_dev_info_8086_100e, @@ -96405,6 +117061,7 @@ &pci_dev_info_8086_1017, &pci_dev_info_8086_1018, &pci_dev_info_8086_1019, + &pci_dev_info_8086_101a, &pci_dev_info_8086_101d, &pci_dev_info_8086_101e, &pci_dev_info_8086_1026, @@ -96429,9 +117086,15 @@ &pci_dev_info_8086_1040, &pci_dev_info_8086_1043, &pci_dev_info_8086_1048, + &pci_dev_info_8086_104b, &pci_dev_info_8086_1050, &pci_dev_info_8086_1051, + &pci_dev_info_8086_1052, + &pci_dev_info_8086_1053, &pci_dev_info_8086_1059, + &pci_dev_info_8086_105e, + &pci_dev_info_8086_105f, + &pci_dev_info_8086_1060, &pci_dev_info_8086_1064, &pci_dev_info_8086_1065, &pci_dev_info_8086_1066, @@ -96447,6 +117110,38 @@ &pci_dev_info_8086_1079, &pci_dev_info_8086_107a, &pci_dev_info_8086_107b, + &pci_dev_info_8086_107c, + &pci_dev_info_8086_107d, + &pci_dev_info_8086_107e, + &pci_dev_info_8086_107f, + &pci_dev_info_8086_1080, + &pci_dev_info_8086_1081, + &pci_dev_info_8086_1082, + &pci_dev_info_8086_1083, + &pci_dev_info_8086_1084, + &pci_dev_info_8086_1085, + &pci_dev_info_8086_1086, + &pci_dev_info_8086_1087, + &pci_dev_info_8086_1089, + &pci_dev_info_8086_108a, + &pci_dev_info_8086_108b, + &pci_dev_info_8086_108c, + &pci_dev_info_8086_108e, + &pci_dev_info_8086_108f, + &pci_dev_info_8086_1092, + &pci_dev_info_8086_1096, + &pci_dev_info_8086_1097, + &pci_dev_info_8086_1098, + &pci_dev_info_8086_1099, + &pci_dev_info_8086_109a, + &pci_dev_info_8086_109b, + &pci_dev_info_8086_10a0, + &pci_dev_info_8086_10a1, + &pci_dev_info_8086_10b0, + &pci_dev_info_8086_10b2, + &pci_dev_info_8086_10b3, + &pci_dev_info_8086_10b4, + &pci_dev_info_8086_10b5, &pci_dev_info_8086_1107, &pci_dev_info_8086_1130, &pci_dev_info_8086_1131, @@ -96491,6 +117186,8 @@ &pci_dev_info_8086_1a24, &pci_dev_info_8086_1a30, &pci_dev_info_8086_1a31, + &pci_dev_info_8086_1a38, + &pci_dev_info_8086_1a48, &pci_dev_info_8086_2410, &pci_dev_info_8086_2411, &pci_dev_info_8086_2412, @@ -96621,6 +117318,26 @@ &pci_dev_info_8086_25ad, &pci_dev_info_8086_25ae, &pci_dev_info_8086_25b0, + &pci_dev_info_8086_25c0, + &pci_dev_info_8086_25d0, + &pci_dev_info_8086_25d4, + &pci_dev_info_8086_25d8, + &pci_dev_info_8086_25e2, + &pci_dev_info_8086_25e3, + &pci_dev_info_8086_25e4, + &pci_dev_info_8086_25e5, + &pci_dev_info_8086_25e6, + &pci_dev_info_8086_25e7, + &pci_dev_info_8086_25e8, + &pci_dev_info_8086_25f0, + &pci_dev_info_8086_25f1, + &pci_dev_info_8086_25f3, + &pci_dev_info_8086_25f5, + &pci_dev_info_8086_25f6, + &pci_dev_info_8086_25f7, + &pci_dev_info_8086_25f8, + &pci_dev_info_8086_25f9, + &pci_dev_info_8086_25fa, &pci_dev_info_8086_2600, &pci_dev_info_8086_2601, &pci_dev_info_8086_2602, @@ -96676,12 +117393,138 @@ &pci_dev_info_8086_266d, &pci_dev_info_8086_266e, &pci_dev_info_8086_266f, + &pci_dev_info_8086_2670, + &pci_dev_info_8086_2680, + &pci_dev_info_8086_2681, + &pci_dev_info_8086_2682, + &pci_dev_info_8086_2683, + &pci_dev_info_8086_2688, + &pci_dev_info_8086_2689, + &pci_dev_info_8086_268a, + &pci_dev_info_8086_268b, + &pci_dev_info_8086_268c, + &pci_dev_info_8086_2690, + &pci_dev_info_8086_2692, + &pci_dev_info_8086_2694, + &pci_dev_info_8086_2696, + &pci_dev_info_8086_2698, + &pci_dev_info_8086_2699, + &pci_dev_info_8086_269a, + &pci_dev_info_8086_269b, + &pci_dev_info_8086_269e, + &pci_dev_info_8086_2770, + &pci_dev_info_8086_2771, + &pci_dev_info_8086_2772, + &pci_dev_info_8086_2774, + &pci_dev_info_8086_2775, + &pci_dev_info_8086_2776, + &pci_dev_info_8086_2778, + &pci_dev_info_8086_2779, + &pci_dev_info_8086_277a, + &pci_dev_info_8086_277c, + &pci_dev_info_8086_277d, &pci_dev_info_8086_2782, &pci_dev_info_8086_2792, + &pci_dev_info_8086_27a0, + &pci_dev_info_8086_27a1, + &pci_dev_info_8086_27a2, + &pci_dev_info_8086_27a6, + &pci_dev_info_8086_27b0, + &pci_dev_info_8086_27b8, + &pci_dev_info_8086_27b9, + &pci_dev_info_8086_27bd, + &pci_dev_info_8086_27c0, + &pci_dev_info_8086_27c1, + &pci_dev_info_8086_27c3, + &pci_dev_info_8086_27c4, + &pci_dev_info_8086_27c5, + &pci_dev_info_8086_27c6, + &pci_dev_info_8086_27c8, + &pci_dev_info_8086_27c9, + &pci_dev_info_8086_27ca, + &pci_dev_info_8086_27cb, + &pci_dev_info_8086_27cc, + &pci_dev_info_8086_27d0, + &pci_dev_info_8086_27d2, + &pci_dev_info_8086_27d4, + &pci_dev_info_8086_27d6, + &pci_dev_info_8086_27d8, + &pci_dev_info_8086_27da, + &pci_dev_info_8086_27dc, + &pci_dev_info_8086_27dd, + &pci_dev_info_8086_27de, + &pci_dev_info_8086_27df, + &pci_dev_info_8086_27e0, + &pci_dev_info_8086_27e2, + &pci_dev_info_8086_2810, + &pci_dev_info_8086_2811, + &pci_dev_info_8086_2812, + &pci_dev_info_8086_2814, + &pci_dev_info_8086_2815, + &pci_dev_info_8086_2820, + &pci_dev_info_8086_2821, + &pci_dev_info_8086_2822, + &pci_dev_info_8086_2824, + &pci_dev_info_8086_2825, + &pci_dev_info_8086_2828, + &pci_dev_info_8086_2829, + &pci_dev_info_8086_282a, + &pci_dev_info_8086_2830, + &pci_dev_info_8086_2831, + &pci_dev_info_8086_2832, + &pci_dev_info_8086_2834, + &pci_dev_info_8086_2835, + &pci_dev_info_8086_2836, + &pci_dev_info_8086_283a, + &pci_dev_info_8086_283e, + &pci_dev_info_8086_283f, + &pci_dev_info_8086_2841, + &pci_dev_info_8086_2843, + &pci_dev_info_8086_2845, + &pci_dev_info_8086_2847, + &pci_dev_info_8086_2849, + &pci_dev_info_8086_284b, + &pci_dev_info_8086_284f, + &pci_dev_info_8086_2850, + &pci_dev_info_8086_2970, + &pci_dev_info_8086_2971, + &pci_dev_info_8086_2972, + &pci_dev_info_8086_2973, + &pci_dev_info_8086_2974, + &pci_dev_info_8086_2976, + &pci_dev_info_8086_2977, + &pci_dev_info_8086_2990, + &pci_dev_info_8086_2991, + &pci_dev_info_8086_2992, + &pci_dev_info_8086_2993, + &pci_dev_info_8086_2994, + &pci_dev_info_8086_2995, + &pci_dev_info_8086_2996, + &pci_dev_info_8086_2997, + &pci_dev_info_8086_29a0, + &pci_dev_info_8086_29a1, + &pci_dev_info_8086_29a2, + &pci_dev_info_8086_29a3, + &pci_dev_info_8086_29a4, + &pci_dev_info_8086_29a5, + &pci_dev_info_8086_29a6, + &pci_dev_info_8086_29a7, &pci_dev_info_8086_3092, &pci_dev_info_8086_3200, &pci_dev_info_8086_3340, &pci_dev_info_8086_3341, + &pci_dev_info_8086_3500, + &pci_dev_info_8086_3501, + &pci_dev_info_8086_3504, + &pci_dev_info_8086_3505, + &pci_dev_info_8086_350c, + &pci_dev_info_8086_350d, + &pci_dev_info_8086_3510, + &pci_dev_info_8086_3511, + &pci_dev_info_8086_3514, + &pci_dev_info_8086_3515, + &pci_dev_info_8086_3518, + &pci_dev_info_8086_3519, &pci_dev_info_8086_3575, &pci_dev_info_8086_3576, &pci_dev_info_8086_3577, @@ -96705,7 +117548,10 @@ &pci_dev_info_8086_359b, &pci_dev_info_8086_359e, &pci_dev_info_8086_4220, + &pci_dev_info_8086_4222, &pci_dev_info_8086_4223, + &pci_dev_info_8086_4224, + &pci_dev_info_8086_4227, &pci_dev_info_8086_5200, &pci_dev_info_8086_5201, &pci_dev_info_8086_530d, @@ -96714,6 +117560,7 @@ &pci_dev_info_8086_7020, &pci_dev_info_8086_7030, &pci_dev_info_8086_7050, + &pci_dev_info_8086_7051, &pci_dev_info_8086_7100, &pci_dev_info_8086_7110, &pci_dev_info_8086_7111, @@ -96762,17 +117609,15 @@ &pci_dev_info_8086_8500, &pci_dev_info_8086_9000, &pci_dev_info_8086_9001, + &pci_dev_info_8086_9002, &pci_dev_info_8086_9004, &pci_dev_info_8086_9621, &pci_dev_info_8086_9622, &pci_dev_info_8086_9641, &pci_dev_info_8086_96a1, - &pci_dev_info_8086_a01f, - &pci_dev_info_8086_a11f, &pci_dev_info_8086_b152, &pci_dev_info_8086_b154, &pci_dev_info_8086_b555, - &pci_dev_info_8086_ffff, NULL }; #define pci_dev_list_8401 NULL @@ -96784,6 +117629,7 @@ #endif #define pci_dev_list_8866 NULL #define pci_dev_list_8888 NULL +#define pci_dev_list_8912 NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_8c4a[] = { &pci_dev_info_8c4a_1980, @@ -96902,12 +117748,17 @@ &pci_dev_info_9005_00c3, &pci_dev_info_9005_00c5, &pci_dev_info_9005_00cf, + &pci_dev_info_9005_0241, &pci_dev_info_9005_0250, &pci_dev_info_9005_0279, &pci_dev_info_9005_0283, &pci_dev_info_9005_0284, &pci_dev_info_9005_0285, &pci_dev_info_9005_0286, + &pci_dev_info_9005_0500, + &pci_dev_info_9005_0503, + &pci_dev_info_9005_0910, + &pci_dev_info_9005_091e, &pci_dev_info_9005_8000, &pci_dev_info_9005_800f, &pci_dev_info_9005_8010, @@ -96961,6 +117812,7 @@ #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_9710[] = { &pci_dev_info_9710_7780, + &pci_dev_info_9710_9805, &pci_dev_info_9710_9815, &pci_dev_info_9710_9835, &pci_dev_info_9710_9845, @@ -96991,7 +117843,18 @@ #define pci_dev_list_aa42 NULL #define pci_dev_list_ac1e NULL #define pci_dev_list_ac3d NULL -#define pci_dev_list_aecb NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_aecb[] = { + &pci_dev_info_aecb_6250, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_affe[] = { + &pci_dev_info_affe_dead, + NULL +}; +#endif #define pci_dev_list_b1b3 NULL #define pci_dev_list_bd11 NULL #define pci_dev_list_c001 NULL @@ -96999,7 +117862,12 @@ #define pci_dev_list_c0de NULL #define pci_dev_list_c0fe NULL #define pci_dev_list_ca50 NULL -#define pci_dev_list_cafe NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_cafe[] = { + &pci_dev_info_cafe_0003, + NULL +}; +#endif #define pci_dev_list_cccc NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_cddd[] = { @@ -97009,6 +117877,16 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_d161[] = { + &pci_dev_info_d161_0205, + &pci_dev_info_d161_0210, + &pci_dev_info_d161_0405, + &pci_dev_info_d161_0410, + &pci_dev_info_d161_2400, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_d4d4[] = { &pci_dev_info_d4d4_0601, NULL @@ -97018,6 +117896,14 @@ #define pci_dev_list_d84d NULL #define pci_dev_list_dead NULL #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_deaf[] = { + &pci_dev_info_deaf_9050, + &pci_dev_info_deaf_9051, + &pci_dev_info_deaf_9052, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_e000[] = { &pci_dev_info_e000_e000, NULL @@ -97032,7 +117918,19 @@ #endif #define pci_dev_list_e4bf NULL #define pci_dev_list_e55e NULL -#define pci_dev_list_ea01 NULL +#ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_ea01[] = { + &pci_dev_info_ea01_000a, + &pci_dev_info_ea01_0032, + &pci_dev_info_ea01_003e, + &pci_dev_info_ea01_0041, + &pci_dev_info_ea01_0043, + &pci_dev_info_ea01_0046, + &pci_dev_info_ea01_0052, + &pci_dev_info_ea01_0800, + NULL +}; +#endif #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_ea60[] = { &pci_dev_info_ea60_9896, @@ -97064,18 +117962,7 @@ NULL }; #endif -#ifdef VENDOR_INCLUDE_NONVIDEO -static const pciDeviceInfo *pci_dev_list_ecc0[] = { - &pci_dev_info_ecc0_0050, - &pci_dev_info_ecc0_0051, - &pci_dev_info_ecc0_0060, - &pci_dev_info_ecc0_0070, - &pci_dev_info_ecc0_0071, - &pci_dev_info_ecc0_0072, - &pci_dev_info_ecc0_0080, - NULL -}; -#endif +#define pci_dev_list_ecc0 NULL static const pciDeviceInfo *pci_dev_list_edd8[] = { &pci_dev_info_edd8_a091, &pci_dev_info_edd8_a099, @@ -97085,7 +117972,12 @@ }; #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_f1d0[] = { + &pci_dev_info_f1d0_c0fe, + &pci_dev_info_f1d0_c0ff, &pci_dev_info_f1d0_cafe, + &pci_dev_info_f1d0_cfee, + &pci_dev_info_f1d0_dcaf, + &pci_dev_info_f1d0_dfee, &pci_dev_info_f1d0_efac, &pci_dev_info_f1d0_facd, NULL @@ -97097,6 +117989,7 @@ NULL }; #endif +#define pci_dev_list_fab7 NULL #define pci_dev_list_febd NULL #ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_feda[] = { @@ -97112,6 +118005,12 @@ }; #endif #ifdef VENDOR_INCLUDE_NONVIDEO +static const pciDeviceInfo *pci_dev_list_fffd[] = { + &pci_dev_info_fffd_0101, + NULL +}; +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO static const pciDeviceInfo *pci_dev_list_fffe[] = { &pci_dev_info_fffe_0405, &pci_dev_info_fffe_0710, @@ -97144,6 +118043,9 @@ {0x0095, pci_vendor_0095, pci_dev_list_0095}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x00a7, pci_vendor_00a7, pci_dev_list_00a7}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x0100, pci_vendor_0100, pci_dev_list_0100}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -97153,6 +118055,9 @@ {0x021b, pci_vendor_021b, pci_dev_list_021b}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x0270, pci_vendor_0270, pci_dev_list_0270}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x0291, pci_vendor_0291, pci_dev_list_0291}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -97162,12 +118067,36 @@ {0x0357, pci_vendor_0357, pci_dev_list_0357}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x0432, pci_vendor_0432, pci_dev_list_0432}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x045e, pci_vendor_045e, pci_dev_list_045e}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x04cf, pci_vendor_04cf, pci_dev_list_04cf}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x050d, pci_vendor_050d, pci_dev_list_050d}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x05e3, pci_vendor_05e3, pci_dev_list_05e3}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x066f, pci_vendor_066f, pci_dev_list_066f}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x0675, pci_vendor_0675, pci_dev_list_0675}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x067b, pci_vendor_067b, pci_dev_list_067b}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x0721, pci_vendor_0721, pci_dev_list_0721}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x07e2, pci_vendor_07e2, pci_dev_list_07e2}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x0925, pci_vendor_0925, pci_dev_list_0925}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -101656,6 +122585,9 @@ {0x165d, pci_vendor_165d, pci_dev_list_165d}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x165f, pci_vendor_165f, pci_dev_list_165f}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1661, pci_vendor_1661, pci_dev_list_1661}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -101668,15 +122600,27 @@ {0x1677, pci_vendor_1677, pci_dev_list_1677}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x167b, pci_vendor_167b, pci_dev_list_167b}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1681, pci_vendor_1681, pci_dev_list_1681}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1682, pci_vendor_1682, pci_dev_list_1682}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1688, pci_vendor_1688, pci_dev_list_1688}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO {0x168c, pci_vendor_168c, pci_dev_list_168c}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1695, pci_vendor_1695, pci_dev_list_1695}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x169c, pci_vendor_169c, pci_dev_list_169c}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x16a5, pci_vendor_16a5, pci_dev_list_16a5}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -101686,18 +122630,33 @@ {0x16ae, pci_vendor_16ae, pci_dev_list_16ae}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x16af, pci_vendor_16af, pci_dev_list_16af}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x16b4, pci_vendor_16b4, pci_dev_list_16b4}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x16b8, pci_vendor_16b8, pci_dev_list_16b8}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x16be, pci_vendor_16be, pci_dev_list_16be}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x16c8, pci_vendor_16c8, pci_dev_list_16c8}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x16c9, pci_vendor_16c9, pci_dev_list_16c9}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x16ca, pci_vendor_16ca, pci_dev_list_16ca}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO {0x16cd, pci_vendor_16cd, pci_dev_list_16cd}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x16ce, pci_vendor_16ce, pci_dev_list_16ce}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x16df, pci_vendor_16df, pci_dev_list_16df}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -101764,6 +122723,9 @@ {0x175e, pci_vendor_175e, pci_dev_list_175e}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1775, pci_vendor_1775, pci_dev_list_1775}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1787, pci_vendor_1787, pci_dev_list_1787}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -101776,9 +122738,15 @@ {0x1799, pci_vendor_1799, pci_dev_list_1799}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x179c, pci_vendor_179c, pci_dev_list_179c}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17a0, pci_vendor_17a0, pci_dev_list_17a0}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17aa, pci_vendor_17aa, pci_dev_list_17aa}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17af, pci_vendor_17af, pci_dev_list_17af}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -101794,18 +122762,36 @@ {0x17c2, pci_vendor_17c2, pci_dev_list_17c2}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17cb, pci_vendor_17cb, pci_dev_list_17cb}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17cc, pci_vendor_17cc, pci_dev_list_17cc}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17cf, pci_vendor_17cf, pci_dev_list_17cf}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x17d3, pci_vendor_17d3, pci_dev_list_17d3}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17d5, pci_vendor_17d5, pci_dev_list_17d5}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17de, pci_vendor_17de, pci_dev_list_17de}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17ee, pci_vendor_17ee, pci_dev_list_17ee}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17f2, pci_vendor_17f2, pci_dev_list_17f2}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17fe, pci_vendor_17fe, pci_dev_list_17fe}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17ff, pci_vendor_17ff, pci_dev_list_17ff}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1813, pci_vendor_1813, pci_dev_list_1813}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -101836,12 +122822,30 @@ {0x1852, pci_vendor_1852, pci_dev_list_1852}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1854, pci_vendor_1854, pci_dev_list_1854}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x185b, pci_vendor_185b, pci_dev_list_185b}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x185f, pci_vendor_185f, pci_dev_list_185f}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1864, pci_vendor_1864, pci_dev_list_1864}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1867, pci_vendor_1867, pci_dev_list_1867}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x187e, pci_vendor_187e, pci_dev_list_187e}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1888, pci_vendor_1888, pci_dev_list_1888}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1890, pci_vendor_1890, pci_dev_list_1890}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1894, pci_vendor_1894, pci_dev_list_1894}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -101854,6 +122858,9 @@ {0x18ac, pci_vendor_18ac, pci_dev_list_18ac}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x18b8, pci_vendor_18b8, pci_dev_list_18b8}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x18bc, pci_vendor_18bc, pci_dev_list_18bc}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -101862,19 +122869,78 @@ #ifdef VENDOR_INCLUDE_NONVIDEO {0x18c9, pci_vendor_18c9, pci_dev_list_18c9}, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO {0x18ca, pci_vendor_18ca, pci_dev_list_18ca}, +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x18d2, pci_vendor_18d2, pci_dev_list_18d2}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x18dd, pci_vendor_18dd, pci_dev_list_18dd}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO {0x18e6, pci_vendor_18e6, pci_dev_list_18e6}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x18ec, pci_vendor_18ec, pci_dev_list_18ec}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x18f7, pci_vendor_18f7, pci_dev_list_18f7}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO {0x18fb, pci_vendor_18fb, pci_dev_list_18fb}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1923, pci_vendor_1923, pci_dev_list_1923}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1924, pci_vendor_1924, pci_dev_list_1924}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x192e, pci_vendor_192e, pci_dev_list_192e}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1931, pci_vendor_1931, pci_dev_list_1931}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1942, pci_vendor_1942, pci_dev_list_1942}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1957, pci_vendor_1957, pci_dev_list_1957}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1958, pci_vendor_1958, pci_dev_list_1958}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1966, pci_vendor_1966, pci_dev_list_1966}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x196a, pci_vendor_196a, pci_dev_list_196a}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x197b, pci_vendor_197b, pci_dev_list_197b}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1989, pci_vendor_1989, pci_dev_list_1989}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1993, pci_vendor_1993, pci_dev_list_1993}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x19a8, pci_vendor_19a8, pci_dev_list_19a8}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x19ac, pci_vendor_19ac, pci_dev_list_19ac}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x19ae, pci_vendor_19ae, pci_dev_list_19ae}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x19d4, pci_vendor_19d4, pci_dev_list_19d4}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x19e2, pci_vendor_19e2, pci_dev_list_19e2}, +#endif + {0x1a03, pci_vendor_1a03, pci_dev_list_1a03}, +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1a08, pci_vendor_1a08, pci_dev_list_1a08}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -101893,6 +122959,12 @@ {0x1fc0, pci_vendor_1fc0, pci_dev_list_1fc0}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1fc1, pci_vendor_1fc1, pci_dev_list_1fc1}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1fce, pci_vendor_1fce, pci_dev_list_1fce}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x2000, pci_vendor_2000, pci_dev_list_2000}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -101961,6 +123033,9 @@ {0x416c, pci_vendor_416c, pci_dev_list_416c}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x4321, pci_vendor_4321, pci_dev_list_4321}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x4444, pci_vendor_4444, pci_dev_list_4444}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -102071,6 +123146,9 @@ {0x6666, pci_vendor_6666, pci_dev_list_6666}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x7063, pci_vendor_7063, pci_dev_list_7063}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x7604, pci_vendor_7604, pci_dev_list_7604}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -102099,6 +123177,9 @@ {0x8888, pci_vendor_8888, pci_dev_list_8888}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x8912, pci_vendor_8912, pci_dev_list_8912}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x8c4a, pci_vendor_8c4a, pci_dev_list_8c4a}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -102165,6 +123246,9 @@ {0xaecb, pci_vendor_aecb, pci_dev_list_aecb}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0xaffe, pci_vendor_affe, pci_dev_list_affe}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0xb1b3, pci_vendor_b1b3, pci_dev_list_b1b3}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -102195,6 +123279,9 @@ {0xcddd, pci_vendor_cddd, pci_dev_list_cddd}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0xd161, pci_vendor_d161, pci_dev_list_d161}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0xd4d4, pci_vendor_d4d4, pci_dev_list_d4d4}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -102207,6 +123294,9 @@ {0xdead, pci_vendor_dead, pci_dev_list_dead}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0xdeaf, pci_vendor_deaf, pci_dev_list_deaf}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0xe000, pci_vendor_e000, pci_dev_list_e000}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -102244,6 +123334,9 @@ {0xfa57, pci_vendor_fa57, pci_dev_list_fa57}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0xfab7, pci_vendor_fab7, pci_dev_list_fab7}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0xfebd, pci_vendor_febd, pci_dev_list_febd}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -102253,6 +123346,9 @@ {0xfede, pci_vendor_fede, pci_dev_list_fede}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0xfffd, pci_vendor_fffd, pci_dev_list_fffd}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0xfffe, pci_vendor_fffe, pci_dev_list_fffe}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -102286,6 +123382,9 @@ {0x0095, pci_vendor_0095, pci_ss_list_0095}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x00a7, pci_vendor_00a7, pci_ss_list_00a7}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x0100, pci_vendor_0100, pci_ss_list_0100}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -102295,6 +123394,9 @@ {0x021b, pci_vendor_021b, pci_ss_list_021b}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x0270, pci_vendor_0270, pci_ss_list_0270}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x0291, pci_vendor_0291, pci_ss_list_0291}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -102304,12 +123406,36 @@ {0x0357, pci_vendor_0357, pci_ss_list_0357}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x0432, pci_vendor_0432, pci_ss_list_0432}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x045e, pci_vendor_045e, pci_ss_list_045e}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x04cf, pci_vendor_04cf, pci_ss_list_04cf}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x050d, pci_vendor_050d, pci_ss_list_050d}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x05e3, pci_vendor_05e3, pci_ss_list_05e3}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x066f, pci_vendor_066f, pci_ss_list_066f}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x0675, pci_vendor_0675, pci_ss_list_0675}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x067b, pci_vendor_067b, pci_ss_list_067b}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x0721, pci_vendor_0721, pci_ss_list_0721}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x07e2, pci_vendor_07e2, pci_ss_list_07e2}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x0925, pci_vendor_0925, pci_ss_list_0925}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -106798,6 +127924,9 @@ {0x165d, pci_vendor_165d, pci_ss_list_165d}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x165f, pci_vendor_165f, pci_ss_list_165f}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1661, pci_vendor_1661, pci_ss_list_1661}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -106810,15 +127939,27 @@ {0x1677, pci_vendor_1677, pci_ss_list_1677}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x167b, pci_vendor_167b, pci_ss_list_167b}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1681, pci_vendor_1681, pci_ss_list_1681}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1682, pci_vendor_1682, pci_ss_list_1682}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1688, pci_vendor_1688, pci_ss_list_1688}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO {0x168c, pci_vendor_168c, pci_ss_list_168c}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1695, pci_vendor_1695, pci_ss_list_1695}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x169c, pci_vendor_169c, pci_ss_list_169c}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x16a5, pci_vendor_16a5, pci_ss_list_16a5}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -106828,18 +127969,33 @@ {0x16ae, pci_vendor_16ae, pci_ss_list_16ae}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x16af, pci_vendor_16af, pci_ss_list_16af}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x16b4, pci_vendor_16b4, pci_ss_list_16b4}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x16b8, pci_vendor_16b8, pci_ss_list_16b8}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x16be, pci_vendor_16be, pci_ss_list_16be}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x16c8, pci_vendor_16c8, pci_ss_list_16c8}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x16c9, pci_vendor_16c9, pci_ss_list_16c9}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x16ca, pci_vendor_16ca, pci_ss_list_16ca}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO {0x16cd, pci_vendor_16cd, pci_ss_list_16cd}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x16ce, pci_vendor_16ce, pci_ss_list_16ce}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x16df, pci_vendor_16df, pci_ss_list_16df}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -106906,6 +128062,9 @@ {0x175e, pci_vendor_175e, pci_ss_list_175e}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1775, pci_vendor_1775, pci_ss_list_1775}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1787, pci_vendor_1787, pci_ss_list_1787}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -106918,9 +128077,15 @@ {0x1799, pci_vendor_1799, pci_ss_list_1799}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x179c, pci_vendor_179c, pci_ss_list_179c}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17a0, pci_vendor_17a0, pci_ss_list_17a0}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17aa, pci_vendor_17aa, pci_ss_list_17aa}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17af, pci_vendor_17af, pci_ss_list_17af}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -106936,18 +128101,36 @@ {0x17c2, pci_vendor_17c2, pci_ss_list_17c2}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17cb, pci_vendor_17cb, pci_ss_list_17cb}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17cc, pci_vendor_17cc, pci_ss_list_17cc}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17cf, pci_vendor_17cf, pci_ss_list_17cf}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x17d3, pci_vendor_17d3, pci_ss_list_17d3}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17d5, pci_vendor_17d5, pci_ss_list_17d5}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17de, pci_vendor_17de, pci_ss_list_17de}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17ee, pci_vendor_17ee, pci_ss_list_17ee}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17f2, pci_vendor_17f2, pci_ss_list_17f2}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x17fe, pci_vendor_17fe, pci_ss_list_17fe}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x17ff, pci_vendor_17ff, pci_ss_list_17ff}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1813, pci_vendor_1813, pci_ss_list_1813}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -106978,12 +128161,30 @@ {0x1852, pci_vendor_1852, pci_ss_list_1852}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1854, pci_vendor_1854, pci_ss_list_1854}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x185b, pci_vendor_185b, pci_ss_list_185b}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x185f, pci_vendor_185f, pci_ss_list_185f}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1864, pci_vendor_1864, pci_ss_list_1864}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1867, pci_vendor_1867, pci_ss_list_1867}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x187e, pci_vendor_187e, pci_ss_list_187e}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1888, pci_vendor_1888, pci_ss_list_1888}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1890, pci_vendor_1890, pci_ss_list_1890}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1894, pci_vendor_1894, pci_ss_list_1894}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -106996,6 +128197,9 @@ {0x18ac, pci_vendor_18ac, pci_ss_list_18ac}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x18b8, pci_vendor_18b8, pci_ss_list_18b8}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x18bc, pci_vendor_18bc, pci_ss_list_18bc}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -107004,19 +128208,78 @@ #ifdef VENDOR_INCLUDE_NONVIDEO {0x18c9, pci_vendor_18c9, pci_ss_list_18c9}, #endif -#ifdef VENDOR_INCLUDE_NONVIDEO {0x18ca, pci_vendor_18ca, pci_ss_list_18ca}, +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x18d2, pci_vendor_18d2, pci_ss_list_18d2}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x18dd, pci_vendor_18dd, pci_ss_list_18dd}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO {0x18e6, pci_vendor_18e6, pci_ss_list_18e6}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x18ec, pci_vendor_18ec, pci_ss_list_18ec}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x18f7, pci_vendor_18f7, pci_ss_list_18f7}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO {0x18fb, pci_vendor_18fb, pci_ss_list_18fb}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1923, pci_vendor_1923, pci_ss_list_1923}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1924, pci_vendor_1924, pci_ss_list_1924}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x192e, pci_vendor_192e, pci_ss_list_192e}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1931, pci_vendor_1931, pci_ss_list_1931}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1942, pci_vendor_1942, pci_ss_list_1942}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1957, pci_vendor_1957, pci_ss_list_1957}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1958, pci_vendor_1958, pci_ss_list_1958}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1966, pci_vendor_1966, pci_ss_list_1966}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x196a, pci_vendor_196a, pci_ss_list_196a}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x197b, pci_vendor_197b, pci_ss_list_197b}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1989, pci_vendor_1989, pci_ss_list_1989}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1993, pci_vendor_1993, pci_ss_list_1993}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x19a8, pci_vendor_19a8, pci_ss_list_19a8}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x19ac, pci_vendor_19ac, pci_ss_list_19ac}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x19ae, pci_vendor_19ae, pci_ss_list_19ae}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x19d4, pci_vendor_19d4, pci_ss_list_19d4}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x19e2, pci_vendor_19e2, pci_ss_list_19e2}, +#endif + {0x1a03, pci_vendor_1a03, pci_ss_list_1a03}, +#ifdef VENDOR_INCLUDE_NONVIDEO {0x1a08, pci_vendor_1a08, pci_ss_list_1a08}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -107035,6 +128298,12 @@ {0x1fc0, pci_vendor_1fc0, pci_ss_list_1fc0}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x1fc1, pci_vendor_1fc1, pci_ss_list_1fc1}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO + {0x1fce, pci_vendor_1fce, pci_ss_list_1fce}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x2000, pci_vendor_2000, pci_ss_list_2000}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -107103,6 +128372,9 @@ {0x416c, pci_vendor_416c, pci_ss_list_416c}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x4321, pci_vendor_4321, pci_ss_list_4321}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x4444, pci_vendor_4444, pci_ss_list_4444}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -107213,6 +128485,9 @@ {0x6666, pci_vendor_6666, pci_ss_list_6666}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x7063, pci_vendor_7063, pci_ss_list_7063}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x7604, pci_vendor_7604, pci_ss_list_7604}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -107241,6 +128516,9 @@ {0x8888, pci_vendor_8888, pci_ss_list_8888}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0x8912, pci_vendor_8912, pci_ss_list_8912}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0x8c4a, pci_vendor_8c4a, pci_ss_list_8c4a}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -107307,6 +128585,9 @@ {0xaecb, pci_vendor_aecb, pci_ss_list_aecb}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0xaffe, pci_vendor_affe, pci_ss_list_affe}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0xb1b3, pci_vendor_b1b3, pci_ss_list_b1b3}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -107337,6 +128618,9 @@ {0xcddd, pci_vendor_cddd, pci_ss_list_cddd}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0xd161, pci_vendor_d161, pci_ss_list_d161}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0xd4d4, pci_vendor_d4d4, pci_ss_list_d4d4}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -107349,6 +128633,9 @@ {0xdead, pci_vendor_dead, pci_ss_list_dead}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0xdeaf, pci_vendor_deaf, pci_ss_list_deaf}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0xe000, pci_vendor_e000, pci_ss_list_e000}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -107386,6 +128673,9 @@ {0xfa57, pci_vendor_fa57, pci_ss_list_fa57}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0xfab7, pci_vendor_fab7, pci_ss_list_fab7}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0xfebd, pci_vendor_febd, pci_ss_list_febd}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO @@ -107395,6 +128685,9 @@ {0xfede, pci_vendor_fede, pci_ss_list_fede}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO + {0xfffd, pci_vendor_fffd, pci_ss_list_fffd}, +#endif +#ifdef VENDOR_INCLUDE_NONVIDEO {0xfffe, pci_vendor_fffe, pci_ss_list_fffe}, #endif #ifdef VENDOR_INCLUDE_NONVIDEO