This patch should be applied to an un-modified XFree86 version 4.6.0
source tree.  It is patch 3 of 4 patches that will will convert the
source tree to XFree86 version 4.7.0.

To apply this patch, run the following from the directory containing your
'xc' directory:


	patch -p0 -E < XFree86-4.6.0-4.7.0.diff1
	patch -p0 -E < XFree86-4.6.0-4.7.0.diff2
	patch -p0 -E < XFree86-4.6.0-4.7.0.diff3
	patch -p0 -E < XFree86-4.6.0-4.7.0.diff4

	sh XFree86-4.6.0-4.7.0-cleanup.sh

	gzip -d < XFree86-4.6.0-4.7.0-diff0.tgz | tar vxf -

-------------------------------------------------------------------------------

Index: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_accel.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_accel.c:1.33 xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_accel.c:1.34
--- xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_accel.c:1.33	Fri Oct 14 11:16:39 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_accel.c	Sun Dec 10 10:58:28 2006
@@ -30,7 +30,7 @@
  * 
  * Permedia 2 accelerated options.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_accel.c,v 1.33 2005/10/14 15:16:39 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_accel.c,v 1.34 2006/12/10 15:58:28 tsi Exp $ */
 
 #include <X11/Xarch.h>
 #include "xf86.h"
@@ -49,7 +49,9 @@
 
 #include "xaalocal.h"		/* For replacements */
 
+#ifndef DEBUG
 #define DEBUG 0
+#endif
 
 #if DEBUG
 # define TRACE_ENTER(str)       ErrorF("pm2_accel: " str " %d\n",pScrn->scrnIndex)
Index: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_dac.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_dac.c:1.28 xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_dac.c:1.29
--- xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_dac.c:1.28	Fri Oct 14 11:16:39 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_dac.c	Mon Apr  9 11:37:15 2007
@@ -28,7 +28,7 @@
  * this work is sponsored by S.u.S.E. GmbH, Fuerth, Elsa GmbH, Aachen and
  * Siemens Nixdorf Informationssysteme
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_dac.c,v 1.28 2005/10/14 15:16:39 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_dac.c,v 1.29 2007/04/09 15:37:15 tsi Exp $ */
 
 #include <X11/Xarch.h>
 #include "xf86.h"
@@ -152,7 +152,7 @@
   
     {
 	/* Get the programmable clock values */
-    	unsigned char m,n,p;
+    	unsigned char m = 0, n = 0, p = 0;
 	
 	(void) PM2DAC_CalculateMNPCForClock(mode->Clock,pGlint->RefClock,
 								&m,&n,&p);
Index: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c:1.28 xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c:1.29
--- xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c:1.28	Fri Oct 14 11:16:40 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c	Sun Dec 10 10:58:28 2006
@@ -21,7 +21,7 @@
  *  OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  */
  
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c,v 1.28 2005/10/14 15:16:40 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2_video.c,v 1.29 2006/12/10 15:58:28 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -184,7 +184,12 @@
 #define PORTNUM(p) ((int)((p) - &pAPriv->Port[0]))
 #define BPPSHIFT(g) (2 - (g)->BppShift)	/* Bytes per pixel = 1 << BPPSHIFT(pGlint) */
 
+#ifdef DEBUG
+#undef DEBUG
+#define DEBUG(x) x
+#else
 #define DEBUG(x)
+#endif
 
 static const Bool ColorBars = FALSE;
 
Index: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2v_dac.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/glint/pm2v_dac.c:1.30 xc/programs/Xserver/hw/xfree86/drivers/glint/pm2v_dac.c:1.31
--- xc/programs/Xserver/hw/xfree86/drivers/glint/pm2v_dac.c:1.30	Mon Nov  3 00:11:13 2003
+++ xc/programs/Xserver/hw/xfree86/drivers/glint/pm2v_dac.c	Mon Apr  9 11:37:15 2007
@@ -27,7 +27,7 @@
  * this work is sponsored by S.u.S.E. GmbH, Fuerth, Elsa GmbH, Aachen and
  * Siemens Nixdorf Informationssysteme
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2v_dac.c,v 1.30 2003/11/03 05:11:13 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm2v_dac.c,v 1.31 2007/04/09 15:37:15 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -217,7 +217,7 @@
   
     {
 	/* Get the programmable clock values */
-    	unsigned char m,n,p;
+    	unsigned char m = 0, n = 0, p = 0;
 	
 	(void) PM2VDAC_CalculateClock(mode->Clock/2,pGlint->RefClock,
 								&m,&n,&p);
Index: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c:1.33 xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c:1.34
--- xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c:1.33	Fri Oct 14 11:16:40 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c	Sun Dec 10 10:58:29 2006
@@ -26,7 +26,7 @@
  * 
  * Permedia 3 accelerated options.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c,v 1.33 2005/10/14 15:16:40 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_accel.c,v 1.34 2006/12/10 15:58:29 tsi Exp $ */
 
 #include <X11/Xarch.h>
 #include "xf86.h"
@@ -44,7 +44,9 @@
 #include "pm3_regs.h"
 #include "glint.h"
 
+#ifndef DEBUG
 #define DEBUG 0
+#endif
 
 #if DEBUG
 # define TRACE_ENTER(str)       ErrorF("pm3_accel: " str " %d\n",pScrn->scrnIndex)
Index: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_dac.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_dac.c:1.35 xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_dac.c:1.36
--- xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_dac.c:1.35	Thu Mar 16 11:50:06 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_dac.c	Sun Dec 10 10:58:29 2006
@@ -26,7 +26,7 @@
  * this work is sponsored by Appian Graphics.
  * 
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_dac.c,v 1.35 2006/03/16 16:50:06 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/glint/pm3_dac.c,v 1.36 2006/12/10 15:58:29 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -40,7 +40,9 @@
 #include "pm3_regs.h"
 #include "glint.h"
 
+#ifndef DEBUG
 #define DEBUG 0
+#endif
 
 #if DEBUG
 # define TRACE_ENTER(str)       ErrorF("glint: " str " %d\n",pScrn->scrnIndex)
Index: xc/programs/Xserver/hw/xfree86/drivers/i128/i128IBMDAC.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/i128/i128IBMDAC.c:1.4 xc/programs/Xserver/hw/xfree86/drivers/i128/i128IBMDAC.c:1.7
--- xc/programs/Xserver/hw/xfree86/drivers/i128/i128IBMDAC.c:1.4	Thu Nov  6 13:38:02 2003
+++ xc/programs/Xserver/hw/xfree86/drivers/i128/i128IBMDAC.c	Mon Apr  9 11:37:15 2007
@@ -21,7 +21,7 @@
  *
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i128/i128IBMDAC.c,v 1.4 2003/11/06 18:38:02 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i128/i128IBMDAC.c,v 1.7 2007/04/09 15:37:15 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_ansic.h"
@@ -314,7 +314,182 @@
 
 
 Bool I128TIHWCursorInit(ScrnInfoPtr pScrn) { return FALSE; }
-Bool I128ProgramTi3025(ScrnInfoPtr pScrn, DisplayModePtr mode) { return FALSE; }
+
+Bool
+I128ProgramTi3025(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+   I128Ptr pI128 = I128PTR(pScrn);
+   unsigned char misc_ctrl, aux_ctrl, oclk, col_key, mux1_ctrl, mux2_ctrl;
+   unsigned char n, m, p;
+   double ffreq, diff, mindiff;
+   int ni, mi, pi;
+   int best_n=32, best_m=32;
+   int   freq = mode->SynthClock;
+
+   oclk = 0;
+   aux_ctrl = 0;
+   misc_ctrl = 0;
+   col_key = 0;
+   mux1_ctrl = 0;
+   mux2_ctrl = 0;
+
+   if (freq < 20000) {
+      xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+	 "Specified dot clock (%.3f) too low for TI 3025",
+	 (double)freq / 1000.0);
+       return(FALSE);
+   }
+
+   
+#define FREQ_MIN   12000
+#define FREQ_MAX  220000
+
+   if (freq < FREQ_MIN)
+      ffreq = FREQ_MIN / 1000.0;
+   else if (freq > FREQ_MAX)
+      ffreq = FREQ_MAX / 1000.0;
+   else
+      ffreq = freq / 1000.0;
+   
+   for(pi=0; (pi<4) && (ffreq<110.0); pi++)
+      ffreq *= 2;
+
+   if (pi==4) {
+      ffreq /= 2;
+      pi--;
+   }
+   
+   /* now 110.0 <= ffreq <= 220.0 */   
+   
+   ffreq /= TI_REF_FREQ;
+   
+   /* now 7.6825 <= ffreq <= 15.3650 */
+   /* the remaining formula is  ffreq = (m+2)*8 / (n+2) */
+   
+   mindiff = ffreq;
+   
+   for (ni = 1; ni <= (int)(TI_REF_FREQ/0.5 - 2); ni++) {
+      mi = (int)(ffreq * (ni+2) / 8.0 + 0.5) - 2;
+      if (mi < 1)
+	 mi = 1;
+      else if (mi > 127) 
+	 mi = 127;
+      
+      diff = ((mi+2) * 8) / (ni+2.0) - ffreq;
+      if (diff<0)
+	 diff = -diff;
+      
+      if (diff < mindiff) {
+	 mindiff = diff;
+	 best_n = ni;
+	 best_m = mi;
+      }
+   }
+
+   n = (unsigned char )best_n;
+   m = (unsigned char )best_m;
+   p = (unsigned char )pi;
+
+   /*
+    * Reset the clock data index
+    */
+   pI128->mem.rbase_g[INDEX_TI] = TI_PLL_CONTROL;			MB;
+   pI128->mem.rbase_g[DATA_TI] = 0x00;					MB;
+
+   /*
+    * Now output the clock frequency
+    */
+   pI128->mem.rbase_g[INDEX_TI] = TI_PIXEL_CLOCK_PLL_DATA;		MB;
+   pI128->mem.rbase_g[DATA_TI] = n;					MB;
+   pI128->mem.rbase_g[DATA_TI] = m;					MB;
+   pI128->mem.rbase_g[DATA_TI] = p | TI_PLL_ENABLE;			MB;
+
+#ifdef NOTYET
+   /*
+    * Program the MCLK to 57MHz
+    */
+   pI128->mem.rbase_g[INDEX_TI] = TI_MCLK_PLL_DATA;
+   pI128->mem.rbase_g[DATA_TI] = 0x05;
+   pI128->mem.rbase_g[DATA_TI] = 0x05;
+   pI128->mem.rbase_g[DATA_TI] = 0x05;
+#endif
+
+   switch (pI128->bitsPerPixel) {
+	case 8:
+		misc_ctrl = /* (i128DAC8Bit ? TI_MC_8_BPP : 0) | */
+			    TI_MC_INT_6_8_CONTROL;
+		aux_ctrl  = TI_AUX_SELF_CLOCK | TI_AUX_W_CMPL;
+   		oclk      = TI_OCLK_S | TI_OCLK_V4 | TI_OCLK_R8;
+		col_key   = TI_COLOR_KEY_CMPL;
+		break;
+	case 16:
+		misc_ctrl = 0x00;
+		aux_ctrl  = 0x00;
+   		oclk      = TI_OCLK_S | TI_OCLK_V4 | TI_OCLK_R4;
+		col_key   = 0x00;
+		break;
+	case 32:
+		misc_ctrl = 0x00;
+		aux_ctrl  = 0x00;
+   		oclk      = TI_OCLK_S | TI_OCLK_V4 | TI_OCLK_R2;
+		col_key   = 0x00;
+		break;
+   }
+   switch (pI128->depth) {
+	case 8:
+		mux1_ctrl = TI_MUX1_PSEUDO_COLOR;
+		mux2_ctrl = TI_MUX2_BUS_PC_D8P64;
+		break;
+	case 15:
+		mux1_ctrl = TI_MUX1_3025D_555;
+		mux2_ctrl = TI_MUX2_BUS_DC_D15P64;
+		break;
+	case 16:
+		mux1_ctrl = TI_MUX1_3025D_565;
+		mux2_ctrl = TI_MUX2_BUS_DC_D16P64;
+		break;
+	case 24:
+		mux1_ctrl = TI_MUX1_3025D_888;
+		mux2_ctrl = TI_MUX2_BUS_DC_D24P64;
+		break;
+   }
+
+   pI128->mem.rbase_g[INDEX_TI] = TI_CURS_CONTROL;			MB;
+   pI128->mem.rbase_g[DATA_TI] = TI_CURS_SPRITE_ENABLE | TI_CURS_X_WINDOW_MODE;MB;
+
+   pI128->mem.rbase_g[INDEX_TI] = TI_TRUE_COLOR_CONTROL;		MB;
+   pI128->mem.rbase_g[DATA_TI] = 0x00;  /* 3025 mode, vga, 8/4bit */	MB;
+
+   pI128->mem.rbase_g[INDEX_TI] = TI_VGA_SWITCH_CONTROL;		MB;
+   pI128->mem.rbase_g[DATA_TI] = 0x00;					MB;
+
+   pI128->mem.rbase_g[INDEX_TI] = TI_GENERAL_CONTROL;			MB;
+   pI128->mem.rbase_g[DATA_TI] = 0x00;					MB;
+
+   pI128->mem.rbase_g[INDEX_TI] = TI_MISC_CONTROL;			MB;
+   pI128->mem.rbase_g[DATA_TI] = misc_ctrl;				MB;
+
+   pI128->mem.rbase_g[INDEX_TI] = TI_AUXILIARY_CONTROL;			MB;
+   pI128->mem.rbase_g[DATA_TI] = aux_ctrl;				MB;
+
+   pI128->mem.rbase_g[INDEX_TI] = TI_COLOR_KEY_CONTROL;			MB;
+   pI128->mem.rbase_g[DATA_TI] = col_key;				MB;
+
+   pI128->mem.rbase_g[INDEX_TI] = TI_MUX_CONTROL_1;			MB;
+   pI128->mem.rbase_g[DATA_TI] = mux1_ctrl;				MB;
+
+   pI128->mem.rbase_g[INDEX_TI] = TI_MUX_CONTROL_2;			MB;
+   pI128->mem.rbase_g[DATA_TI] = mux2_ctrl;				MB;
+
+   pI128->mem.rbase_g[INDEX_TI] = TI_INPUT_CLOCK_SELECT;		MB;
+   pI128->mem.rbase_g[DATA_TI] = TI_ICLK_PLL;				MB;
+
+   pI128->mem.rbase_g[INDEX_TI] = TI_OUTPUT_CLOCK_SELECT;		MB;
+   pI128->mem.rbase_g[DATA_TI] = oclk;					MB;
+
+   usleep(150000);
+   return(TRUE);
+}
 
 Bool
 I128ProgramIBMRGB(ScrnInfoPtr pScrn, DisplayModePtr mode)
Index: xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c:1.38 xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c:1.41
--- xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c:1.38	Thu Mar 16 11:50:06 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c	Fri Mar 23 22:58:18 2007
@@ -22,7 +22,7 @@
  *
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c,v 1.38 2006/03/16 16:50:06 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i128/i128_driver.c,v 1.41 2007/03/24 02:58:18 tsi Exp $ */
 
 
 /* All drivers should typically include these */
@@ -75,8 +75,8 @@
 static void	I128Identify(int flags);
 static Bool	I128Probe(DriverPtr drv, int flags);
 static Bool	I128PreInit(ScrnInfoPtr pScrn, int flags);
-static Bool	I128ScreenInit(int Index, ScreenPtr pScreen, int argc,
-			      char **argv);
+static Bool	I128ScreenInit(int Index, ScreenPtr pScreen,
+			       const int argc, const char **argv);
 static Bool	I128EnterVT(int scrnIndex, int flags);
 static void	I128LeaveVT(int scrnIndex, int flags);
 static Bool	I128CloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -947,6 +947,7 @@
 			mclk / 1000.0);
 	  pI128->minClock = 20000;
 	  pI128->ProgramDAC = I128ProgramTi3025;
+	  pI128->HWCursor = FALSE;
 	  break;
 
        case IBM524_DAC:
@@ -1450,7 +1451,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-I128ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+I128ScreenInit(int scrnIndex, ScreenPtr pScreen,
+	       const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     I128Ptr pI128;
Index: xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c:1.60 xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c:1.62
--- xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c:1.60	Thu Mar 16 11:50:07 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c	Tue Jan 23 13:03:03 2007
@@ -25,7 +25,7 @@
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c,v 1.60 2006/03/16 16:50:07 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i740/i740_driver.c,v 1.62 2007/01/23 18:03:03 tsi Exp $ */
 
 /*
  * Authors:
@@ -100,7 +100,8 @@
 static Bool I740PreInit(ScrnInfoPtr pScrn, int flags);
 
 /* Initialize a screen */
-static Bool I740ScreenInit(int Index, ScreenPtr pScreen, int argc, char **argv);
+static Bool I740ScreenInit(int Index, ScreenPtr pScreen,
+			   const int argc, const char **argv);
 
 /* Enter from a virtual terminal */
 static Bool I740EnterVT(int scrnIndex, int flags);
@@ -1513,7 +1514,8 @@
 }
 
 static Bool
-I740ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) {
+I740ScreenInit(int scrnIndex, ScreenPtr pScreen,
+	       const int argc, const char **argv) {
   ScrnInfoPtr pScrn;
   vgaHWPtr hwp;
   I740Ptr pI740;
Index: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c:1.125 xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c:1.127
--- xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c:1.125	Thu Mar 16 11:50:08 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c	Tue Jan 23 13:03:03 2007
@@ -72,7 +72,7 @@
  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c,v 1.125 2006/03/16 16:50:08 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c,v 1.127 2007/01/23 18:03:03 tsi Exp $ */
 
 /*
  * Reformatted with GNU indent (2.2.8), using the following options:
@@ -137,8 +137,8 @@
 static Bool I810Probe(DriverPtr drv, int flags);
 #ifndef I830_ONLY
 static Bool I810PreInit(ScrnInfoPtr pScrn, int flags);
-static Bool I810ScreenInit(int Index, ScreenPtr pScreen, int argc,
-			   char **argv);
+static Bool I810ScreenInit(int Index, ScreenPtr pScreen,
+			   const int argc, const char **argv);
 static Bool I810EnterVT(int scrnIndex, int flags);
 static void I810LeaveVT(int scrnIndex, int flags);
 static Bool I810CloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -2129,7 +2129,8 @@
 }
 
 static Bool
-I810ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+I810ScreenInit(int scrnIndex, ScreenPtr pScreen,
+	       const int argc, const char **argv)
 {
    ScrnInfoPtr pScrn;
    vgaHWPtr hwp;
Index: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c:1.94 xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c:1.99
--- xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c:1.94	Thu Mar 30 17:35:42 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c	Mon Apr  9 11:37:15 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c,v 1.94 2006/03/30 22:35:42 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_driver.c,v 1.99 2007/04/09 15:37:15 tsi Exp $ */
 /**************************************************************************
 
 Copyright 2001 VA Linux Systems Inc., Fremont, California.
@@ -2418,10 +2418,15 @@
 #endif
 
    pI830->LinearAlloc = 0;
-   if (xf86GetOptValInteger(pI830->Options, OPTION_LINEARALLOC,
-			    &(pI830->LinearAlloc))) {
-      xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Allocating %dKbytes of memory\n",
-		 pI830->LinearAlloc);
+   if (xf86GetOptValInteger(pI830->Options, OPTION_LINEARALLOC, &memsize)) {
+      if (memsize > 0) {
+	 pI830->LinearAlloc = memsize;
+	 xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+		    "Allocating %dKbytes of memory\n", pI830->LinearAlloc);
+      } else {
+	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		    "Ignoring non-positive LinearAlloc specification\n");
+      }
    }
 
    pI830->fixedPipe = -1;
@@ -2841,7 +2846,7 @@
     * or, at least it's meant to..... alas it doesn't seem to always work.
     */
    if (pI830->devicePresence) {
-      int req, att, enc;
+      int req = 0, att = 0, enc = 0;
       GetDevicePresence(pScrn, &req, &att, &enc);
       for (i = 0; i < NumDisplayTypes; i++) {
          xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -3853,7 +3858,7 @@
          clock = VBEGetPixelClock(pI830->pVbe, mode, block->PixelClock);
 #ifdef DEBUG
          ErrorF("Setting clock %.2fMHz, closest is %.2fMHz\n",
-                    (double)data->block->PixelClock / 1000000.0, 
+                    (double)block->PixelClock / 1000000.0, 
                     (double)clock / 1000000.0);
 #endif
          if (clock)
@@ -4592,7 +4597,8 @@
 #endif
 
 static Bool
-I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen,
+		   const int argc, const char **argv)
 {
    ScrnInfoPtr pScrn;
    vgaHWPtr hwp;
Index: xc/programs/Xserver/hw/xfree86/drivers/imstt/imstt_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/imstt/imstt_driver.c:1.22 xc/programs/Xserver/hw/xfree86/drivers/imstt/imstt_driver.c:1.24
--- xc/programs/Xserver/hw/xfree86/drivers/imstt/imstt_driver.c:1.22	Thu Mar 16 11:50:09 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/imstt/imstt_driver.c	Tue Jan 23 13:03:04 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/imstt/imstt_driver.c,v 1.22 2006/03/16 16:50:09 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/imstt/imstt_driver.c,v 1.24 2007/01/23 18:03:04 tsi Exp $ */
 
 /*
  *	Copyright 2000	Ani Joshi <ajoshi@unixbox.com>
@@ -72,8 +72,8 @@
 static void IMSTTLeaveVT(int scrnIndex, int flags);
 static void IMSTTSave(ScrnInfoPtr pScrn);
 #endif
-static Bool IMSTTScreenInit(int scrnIndex, ScreenPtr pScreen, int argc,
-			    char **argv);
+static Bool IMSTTScreenInit(int scrnIndex, ScreenPtr pScreen,
+			    const int argc, const char **argv);
 #if 0
 static int IMSTTInternalScreenInit(int scrnIndex, ScreenPtr pScreen);
 static ModeStatus IMSTTValidMode(int index, DisplayModePtr mode,
@@ -659,7 +659,7 @@
 
 
 static Bool IMSTTScreenInit(int scrnIndex, ScreenPtr pScreen,
-			    int argc, char **argv)
+			    const int argc, const char **argv)
 {
 	ScrnInfoPtr pScrn;
 	IMSTTPtr iptr;
Index: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h
diff -u xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h:1.89 xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h:1.90
--- xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h:1.89	Fri Sep 10 21:33:06 2004
+++ xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h	Wed Feb 21 10:50:59 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h,v 1.89 2004/09/11 01:33:06 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga.h,v 1.90 2007/02/21 15:50:59 tsi Exp $ */
 /*
  * MGA Millennium (MGA2064W) functions
  *
@@ -118,6 +118,14 @@
 #define OUTREG(addr,val) MGAdbg_outreg32(pScrn, addr, val, __FUNCTION__)
 #endif /* EXTRADEBUG */
 
+#ifndef PCI_CHIP_MGAG200_SE_A_PCI
+#define PCI_CHIP_MGAG200_SE_A_PCI 0x0522
+#endif
+
+#ifndef PCI_CHIP_MGAG200_SE_B_PCI
+#define PCI_CHIP_MGAG200_SE_B_PCI 0x0524
+#endif
+
 /*
  * Read/write to the DAC via MMIO 
  */
@@ -600,6 +608,8 @@
 #endif
 long MGAG450SavePLLFreq(ScrnInfoPtr pScrn);
 void MGAprintDac(ScrnInfoPtr pScrn);
+void MGAG200SESaveFonts(ScrnInfoPtr, vgaRegPtr);
+void MGAG200SERestoreFonts(ScrnInfoPtr, vgaRegPtr);
 
 #ifdef USEMGAHAL
 /************ ESC Call Definition ***************/
Index: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c:1.61 xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c:1.62
--- xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c:1.61	Fri Nov 26 06:48:47 2004
+++ xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c	Sun Dec 10 10:58:29 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c,v 1.61 2004/11/26 11:48:47 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dac3026.c,v 1.62 2006/12/10 15:58:29 tsi Exp $ */
 /*
  * Copyright 1994 by Robin Cutshaw <robin@XFree86.org>
  *
@@ -715,8 +715,10 @@
 	MGA_NOT_HAL(MGATi3026SetMCLK(pScrn, MGAdac->MemoryClock));
 
 #ifdef DEBUG		
-	ErrorF("%6ld: %02X %02X %02X	%02X %02X %02X	%08lX\n", mode->Clock,
-		pReg->DacClk[0], pReg->DacClk[1], pReg->DacClk[2], pReg->DacClk[3], pReg->DacClk[4], pReg->DacClk[5], pReg->Option);
+	ErrorF("%6d: %02X %02X %02X	%02X %02X %02X	%08lX\n", mode->Clock,
+		pReg->DacClk[0], pReg->DacClk[1], pReg->DacClk[2],
+		pReg->DacClk[3], pReg->DacClk[4], pReg->DacClk[5],
+		(unsigned long)pReg->Option);
 	for (i=0; i<sizeof(MGADACregs); i++) ErrorF("%02X ", pReg->DacRegs[i]);
 	for (i=0; i<6; i++) ErrorF(" %02X", pReg->ExtVga[i]);
 	ErrorF("\n");
@@ -871,7 +873,9 @@
 	
 #ifdef DEBUG		
 	ErrorF("read: %02X %02X %02X	%02X %02X %02X	%08lX\n",
-		mgaReg->DacClk[0], mgaReg->DacClk[1], mgaReg->DacClk[2], mgaReg->DacClk[3], mgaReg->DacClk[4], mgaReg->DacClk[5], mgaReg->Option);
+		mgaReg->DacClk[0], mgaReg->DacClk[1], mgaReg->DacClk[2],
+		mgaReg->DacClk[3], mgaReg->DacClk[4], mgaReg->DacClk[5],
+		(unsigned long)mgaReg->Option);
 	for (i=0; i<sizeof(MGADACregs); i++) ErrorF("%02X ", mgaReg->DacRegs[i]);
 	for (i=0; i<6; i++) ErrorF(" %02X", mgaReg->ExtVga[i]);
 	ErrorF("\n");
Index: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c:1.58 xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c:1.61
--- xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c:1.58	Tue Apr 12 18:41:28 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c	Mon Apr  9 11:37:15 2007
@@ -2,7 +2,7 @@
  * MGA-1064, MGA-G100, MGA-G200, MGA-G400, MGA-G550 RAMDAC driver
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c,v 1.58 2005/04/12 22:41:28 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dacG.c,v 1.61 2007/04/09 15:37:15 tsi Exp $ */
 
 /*
  * This is a first cut at a non-accelerated version to work with the
@@ -57,6 +57,266 @@
 static void MGAGLoadPalette(ScrnInfoPtr, int, int*, LOCO*, VisualPtr);
 static Bool MGAG_i2cInit(ScrnInfoPtr pScrn);
 
+static void
+MGAG200SEComputePLLParam(ScrnInfoPtr pScrn, long lFo, int *M, int *N, int *P)
+{
+    unsigned int ulComputedFo;
+    unsigned int ulFDelta;
+    unsigned int ulFTmpDelta;
+    unsigned int ulVCOMax, ulVCOMin;
+    unsigned int ulTestP;
+    unsigned int ulTestM;
+    unsigned int ulTestN;
+    unsigned int ulPLLFreqRef;
+
+    ulVCOMax        = 320000;
+    ulVCOMin        = 160000;
+    ulPLLFreqRef    = 25000;
+
+    ulFDelta = 0xFFFFFFFF;
+
+    /* Then we need to minimize the M while staying within 0.5% */
+    for (ulTestP = 8; ulTestP > 0; ulTestP >>= 1) {
+        if ((lFo * ulTestP) > ulVCOMax) continue;
+        if ((lFo * ulTestP) < ulVCOMin) continue;
+
+        for (ulTestN = 17; ulTestN <= 256; ulTestN++) {
+            for (ulTestM = 1; ulTestM <= 32; ulTestM++) {
+                ulComputedFo = (ulPLLFreqRef * ulTestN) / (ulTestM * ulTestP);
+                if (ulComputedFo > lFo)
+                    ulFTmpDelta = ulComputedFo - lFo;
+                else
+                    ulFTmpDelta = lFo - ulComputedFo;
+
+                if (ulFTmpDelta < ulFDelta) {
+                    ulFDelta = ulFTmpDelta;
+                    *M = ulTestM - 1;
+                    *N = ulTestN - 1;
+                    *P = ulTestP - 1;
+                }
+            }
+        }
+    }
+}
+
+#include "misc.h"
+#include "vgaHW.h"
+#include "compiler.h"
+#include "xf86cmap.h"
+
+#define TEXT_AMOUNT 16384
+#define FONT_AMOUNT (8*8192)
+
+void
+MGAG200SERestoreFonts(ScrnInfoPtr scrninfp, vgaRegPtr restore)
+{
+    vgaHWPtr hwp = VGAHWPTR(scrninfp);
+    int savedIOBase;
+    unsigned char miscOut, attr10, gr1, gr3, gr4, gr5, gr6, gr8, seq2, seq4;
+    Bool doMap = FALSE;
+
+    /* If nothing to do, return now */
+    if (!hwp->FontInfo1 && !hwp->FontInfo2 && !hwp->TextInfo)
+	return;
+
+    if (hwp->Base == NULL) {
+	doMap = TRUE;
+	if (!vgaHWMapMem(scrninfp)) {
+	    xf86DrvMsg(scrninfp->scrnIndex, X_ERROR,
+		    "vgaHWRestoreFonts: vgaHWMapMem() failed\n");
+	    return;
+	}
+    }
+
+    /* save the registers that are needed here */
+    miscOut = hwp->readMiscOut(hwp);
+    attr10 = hwp->readAttr(hwp, 0x10);
+    gr1 = hwp->readGr(hwp, 0x01);
+    gr3 = hwp->readGr(hwp, 0x03);
+    gr4 = hwp->readGr(hwp, 0x04);
+    gr5 = hwp->readGr(hwp, 0x05);
+    gr6 = hwp->readGr(hwp, 0x06);
+    gr8 = hwp->readGr(hwp, 0x08);
+    seq2 = hwp->readSeq(hwp, 0x02);
+    seq4 = hwp->readSeq(hwp, 0x04);
+
+    /* save hwp->IOBase and temporarily set it for colour mode */
+    savedIOBase = hwp->IOBase;
+    hwp->IOBase = VGA_IOBASE_COLOR;
+
+    /* Force into colour mode */
+    hwp->writeMiscOut(hwp, miscOut | 0x01);
+
+    vgaHWBlankScreen(scrninfp, FALSE);
+
+    /*
+     * here we temporarily switch to 16 colour planar mode, to simply
+     * copy the font-info and saved text.
+     *
+     * BUG ALERT: The (S)VGA's segment-select register MUST be set correctly!
+     */
+#if 0
+    hwp->writeAttr(hwp, 0x10, 0x01);   /* graphics mode */
+#endif
+    if (scrninfp->depth == 4) {
+	/* GJA */
+	hwp->writeGr(hwp, 0x03, 0x00);  /* don't rotate, write unmodified */
+	hwp->writeGr(hwp, 0x08, 0xFF);  /* write all bits in a byte */
+	hwp->writeGr(hwp, 0x01, 0x00);  /* all planes come from CPU */
+    }
+
+    if (hwp->FontInfo1) {
+	hwp->writeSeq(hwp, 0x02, 0x04); /* write to plane 2 */
+	hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */
+	hwp->writeGr(hwp, 0x04, 0x02);  /* read plane 2 */
+	hwp->writeGr(hwp, 0x05, 0x00);  /* write mode 0, read mode 0 */
+	hwp->writeGr(hwp, 0x06, 0x05);  /* set graphics */
+	slowbcopy_tobus(hwp->FontInfo1, hwp->Base, FONT_AMOUNT);
+    }
+
+    if (hwp->FontInfo2) {
+	hwp->writeSeq(hwp, 0x02, 0x08); /* write to plane 3 */
+	hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */
+	hwp->writeGr(hwp, 0x04, 0x03);  /* read plane 3 */
+	hwp->writeGr(hwp, 0x05, 0x00);  /* write mode 0, read mode 0 */
+	hwp->writeGr(hwp, 0x06, 0x05);  /* set graphics */
+	slowbcopy_tobus(hwp->FontInfo2, hwp->Base, FONT_AMOUNT);
+    }
+
+    if (hwp->TextInfo) {
+	hwp->writeSeq(hwp, 0x02, 0x01); /* write to plane 0 */
+	hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */
+	hwp->writeGr(hwp, 0x04, 0x00);  /* read plane 0 */
+	hwp->writeGr(hwp, 0x05, 0x00);  /* write mode 0, read mode 0 */
+	hwp->writeGr(hwp, 0x06, 0x05);  /* set graphics */
+	slowbcopy_tobus(hwp->TextInfo, hwp->Base, TEXT_AMOUNT);
+	hwp->writeSeq(hwp, 0x02, 0x02); /* write to plane 1 */
+	hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */
+	hwp->writeGr(hwp, 0x04, 0x01);  /* read plane 1 */
+	hwp->writeGr(hwp, 0x05, 0x00);  /* write mode 0, read mode 0 */
+	hwp->writeGr(hwp, 0x06, 0x05);  /* set graphics */
+	slowbcopy_tobus((unsigned char *)hwp->TextInfo + TEXT_AMOUNT,
+		hwp->Base, TEXT_AMOUNT);
+    }
+
+    /* restore the registers that were changed */
+    hwp->writeMiscOut(hwp, miscOut);
+    hwp->writeAttr(hwp, 0x10, attr10);
+    hwp->writeGr(hwp, 0x01, gr1);
+    hwp->writeGr(hwp, 0x03, gr3);
+    hwp->writeGr(hwp, 0x04, gr4);
+    hwp->writeGr(hwp, 0x05, gr5);
+    hwp->writeGr(hwp, 0x06, gr6);
+    hwp->writeGr(hwp, 0x08, gr8);
+    hwp->writeSeq(hwp, 0x02, seq2);
+    hwp->writeSeq(hwp, 0x04, seq4);
+    hwp->IOBase = savedIOBase;
+
+    vgaHWBlankScreen(scrninfp, TRUE);
+
+    if (doMap)
+	vgaHWUnmapMem(scrninfp);
+}
+
+void
+MGAG200SESaveFonts(ScrnInfoPtr scrninfp, vgaRegPtr save)
+{
+    vgaHWPtr hwp = VGAHWPTR(scrninfp);
+    int savedIOBase;
+    unsigned char miscOut, attr10, gr4, gr5, gr6, seq2, seq4;
+    Bool doMap = FALSE;
+
+    if (hwp->Base == NULL) {
+	doMap = TRUE;
+	if (!vgaHWMapMem(scrninfp)) {
+	    xf86DrvMsg(scrninfp->scrnIndex, X_ERROR,
+		    "vgaHWSaveFonts: vgaHWMapMem() failed\n");
+	    return;
+	}
+    }
+
+    /* If in graphics mode, don't save anything */
+    attr10 = hwp->readAttr(hwp, 0x10);
+    if (attr10 & 0x01)
+	return;
+
+    /* save the registers that are needed here */
+    miscOut = hwp->readMiscOut(hwp);
+    gr4 = hwp->readGr(hwp, 0x04);
+    gr5 = hwp->readGr(hwp, 0x05);
+    gr6 = hwp->readGr(hwp, 0x06);
+    seq2 = hwp->readSeq(hwp, 0x02);
+    seq4 = hwp->readSeq(hwp, 0x04);
+
+    /* save hwp->IOBase and temporarily set it for colour mode */
+    savedIOBase = hwp->IOBase;
+    hwp->IOBase = VGA_IOBASE_COLOR;
+
+    /* Force into colour mode */
+    hwp->writeMiscOut(hwp, miscOut | 0x01);
+
+    vgaHWBlankScreen(scrninfp, FALSE);
+
+    /*
+     * get the character sets, and text screen if required
+     */
+    /*
+     * Here we temporarily switch to 16 colour planar mode, to simply
+     * copy the font-info
+     *
+     * BUG ALERT: The (S)VGA's segment-select register MUST be set correctly!
+     */
+#if 0
+    hwp->writeAttr(hwp, 0x10, 0x01);   /* graphics mode */
+#endif
+    if (hwp->FontInfo1 || (hwp->FontInfo1 = xalloc(FONT_AMOUNT))) {
+	hwp->writeSeq(hwp, 0x02, 0x04); /* write to plane 2 */
+	hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */
+	hwp->writeGr(hwp, 0x04, 0x02);  /* read plane 2 */
+	hwp->writeGr(hwp, 0x05, 0x00);  /* write mode 0, read mode 0 */
+	hwp->writeGr(hwp, 0x06, 0x05);  /* set graphics */
+	slowbcopy_frombus(hwp->Base, hwp->FontInfo1, FONT_AMOUNT);
+    }
+    if (hwp->FontInfo2 || (hwp->FontInfo2 = xalloc(FONT_AMOUNT))) {
+	hwp->writeSeq(hwp, 0x02, 0x08); /* write to plane 3 */
+	hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */
+	hwp->writeGr(hwp, 0x04, 0x03);  /* read plane 3 */
+	hwp->writeGr(hwp, 0x05, 0x00);  /* write mode 0, read mode 0 */
+	hwp->writeGr(hwp, 0x06, 0x05);  /* set graphics */
+	slowbcopy_frombus(hwp->Base, hwp->FontInfo2, FONT_AMOUNT);
+    }
+    if (hwp->TextInfo || (hwp->TextInfo = xalloc(2 * TEXT_AMOUNT))) {
+	hwp->writeSeq(hwp, 0x02, 0x01); /* write to plane 0 */
+	hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */
+	hwp->writeGr(hwp, 0x04, 0x00);  /* read plane 0 */
+	hwp->writeGr(hwp, 0x05, 0x00);  /* write mode 0, read mode 0 */
+	hwp->writeGr(hwp, 0x06, 0x05);  /* set graphics */
+	slowbcopy_frombus(hwp->Base, hwp->TextInfo, TEXT_AMOUNT);
+	hwp->writeSeq(hwp, 0x02, 0x02); /* write to plane 1 */
+	hwp->writeSeq(hwp, 0x04, 0x06); /* enable plane graphics */
+	hwp->writeGr(hwp, 0x04, 0x01);  /* read plane 1 */
+	hwp->writeGr(hwp, 0x05, 0x00);  /* write mode 0, read mode 0 */
+	hwp->writeGr(hwp, 0x06, 0x05);  /* set graphics */
+	slowbcopy_frombus(hwp->Base,
+		(unsigned char *)hwp->TextInfo + TEXT_AMOUNT, TEXT_AMOUNT);
+    }
+
+    /* Restore clobbered registers */
+    hwp->writeAttr(hwp, 0x10, attr10);
+    hwp->writeGr(hwp, 0x04, gr4);
+    hwp->writeGr(hwp, 0x05, gr5);
+    hwp->writeGr(hwp, 0x06, gr6);
+    hwp->writeSeq(hwp, 0x02, seq2);
+    hwp->writeSeq(hwp, 0x04, seq4);
+    hwp->writeMiscOut(hwp, miscOut);
+    hwp->IOBase = savedIOBase;
+
+    vgaHWBlankScreen(scrninfp, TRUE);
+
+    if (doMap)
+	vgaHWUnmapMem(scrninfp);
+}
+
 /*
  * MGAGCalcClock - Calculate the PLL settings (m, n, p, s).
  *
@@ -119,6 +379,9 @@
 		in_div_max   = 31;
 		post_div_max = 7;
 		break;
+
+        case PCI_CHIP_MGAG200_SE_A_PCI:
+        case PCI_CHIP_MGAG200_SE_B_PCI:
 	case PCI_CHIP_MGAG100:
 	case PCI_CHIP_MGAG100_PCI:
 	case PCI_CHIP_MGAG200:
@@ -207,7 +470,7 @@
 	MGARegPtr pReg = &pMga->ModeReg;
 
 	/* Pixel clock values */
-	int m, n, p, s;
+	int m = 0, n = 0, p = 0, s = 0;
 
 	if(MGAISGx50(pMga)) {
 	    pReg->Clock = f_out;
@@ -215,12 +478,29 @@
 	}
 
 	/* Do the calculations for m, n, p and s */
-	(void) MGAGCalcClock( pScrn, f_out, &m, &n, &p, &s );
-
+/*	(void) MGAGCalcClock( pScrn, f_out, &m, &n, &p, &s );
+*/
 	/* Values for the pixel clock PLL registers */
-	pReg->DacRegs[ MGA1064_PIX_PLLC_M ] = m & 0x1F;
+/*	pReg->DacRegs[ MGA1064_PIX_PLLC_M ] = m & 0x1F;
 	pReg->DacRegs[ MGA1064_PIX_PLLC_N ] = n & 0x7F;
-	pReg->DacRegs[ MGA1064_PIX_PLLC_P ] = (p & 0x07) | ((s & 0x03) << 3);
+	pReg->DacRegs[ MGA1064_PIX_PLLC_P ] = (p & 0x07) | ((s & 0x03) << 3); */
+        if ((pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) ||
+            (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI)) {
+            MGAG200SEComputePLLParam(pScrn, f_out, &m, &n, &p);
+
+            pReg->DacRegs[ MGA1064_PIX_PLLC_M ] = m;
+            pReg->DacRegs[ MGA1064_PIX_PLLC_N ] = n;
+            pReg->DacRegs[ MGA1064_PIX_PLLC_P ] = p;
+        } else {
+            /* Do the calculations for m, n, p and s */
+            MGAGCalcClock( pScrn, f_out, &m, &n, &p, &s );
+
+            /* Values for the pixel clock PLL registers */
+            pReg->DacRegs[ MGA1064_PIX_PLLC_M ] = m & 0x1F;
+            pReg->DacRegs[ MGA1064_PIX_PLLC_N ] = n & 0x7F;
+            pReg->DacRegs[ MGA1064_PIX_PLLC_P ] = (p & 0x07) |
+                                                  ((s & 0x03) << 3);
+        }
 }
 
 /*
@@ -378,6 +658,26 @@
 		   pReg->Option &= ~(1 << 14);
 		pReg->Option2 = 0x01003000;
 		break;
+        case PCI_CHIP_MGAG200_SE_A_PCI:
+        case PCI_CHIP_MGAG200_SE_B_PCI:
+#ifdef USEMGAHAL
+                MGA_HAL(break;);
+#endif
+        pReg->DacRegs[ MGA1064_VREF_CTL ] = 0x03;
+                pReg->DacRegs[MGA1064_PIX_CLK_CTL] =
+                    MGA1064_PIX_CLK_CTL_SEL_PLL;
+
+                pReg->DacRegs[MGA1064_MISC_CTL] =
+                    MGA1064_MISC_CTL_DAC_EN |
+                    MGA1064_MISC_CTL_VGA8 |
+                    MGA1064_MISC_CTL_DAC_RAM_CS;
+
+                if(pMga->HasSDRAM)
+                    pReg->Option = 0x40499121;
+                else
+                    pReg->Option = 0x4049cd21;
+        pReg->Option2 = 0x00008000;
+                break;
 	case PCI_CHIP_MGAG200:
 	case PCI_CHIP_MGAG200_PCI:
 	default:
@@ -719,6 +1019,10 @@
 		   ((i == 0x2c) || (i == 0x2d) || (i == 0x2e) ||
 		    (i == 0x4c) || (i == 0x4d) || (i == 0x4e))))
 		 continue; 
+              if (((pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) ||
+                  (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI))
+                  && ((i == 0x2C) || (i == 0x2D) || (i == 0x2E)))
+                 continue;
 	      outMGAdac(i, mgaReg->DacRegs[i]);
 	   }
 	   
@@ -756,8 +1060,17 @@
 	   /*
 	    * This function handles restoring the generic VGA registers.
 	    */
-	   vgaHWRestore(pScrn, vgaReg,
-			VGA_SR_MODE | (restoreFonts ? VGA_SR_FONTS : 0));
+/*	   vgaHWRestore(pScrn, vgaReg,
+			VGA_SR_MODE | (restoreFonts ? VGA_SR_FONTS : 0)); */
+           if ((pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) ||
+               (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI)) {
+              vgaHWRestore(pScrn, vgaReg, VGA_SR_MODE);
+              if (restoreFonts)
+                 MGAG200SERestoreFonts(pScrn, vgaReg);
+           } else {
+              vgaHWRestore(pScrn, vgaReg,
+                        VGA_SR_MODE | (restoreFonts ? VGA_SR_FONTS : 0));
+           }
   	   MGAGRestorePalette(pScrn, vgaReg->DAC); 
 	   
 	   /*
@@ -797,8 +1110,8 @@
 		ErrorF("0x%02X, ", mgaReg->DacRegs[i]);
 #endif
 	}
-	ErrorF("\nOPTION  = %08lX\n", mgaReg->Option);
-	ErrorF("OPTION2 = %08lX\n", mgaReg->Option2);
+	ErrorF("\nOPTION  = %08lX\n", (unsigned long)mgaReg->Option);
+	ErrorF("OPTION2 = %08lX\n", (unsigned long)mgaReg->Option2);
 	ErrorF("CRTCEXT:");
 	for (i=0; i<6; i++) ErrorF(" %02X", mgaReg->ExtVga[i]);
 	ErrorF("\n");
@@ -850,7 +1163,17 @@
 	 * This function will handle creating the data structure and filling
 	 * in the generic VGA portion.
 	 */
-	vgaHWSave(pScrn, vgaReg, VGA_SR_MODE | (saveFonts ? VGA_SR_FONTS : 0));
+/*	vgaHWSave(pScrn, vgaReg, VGA_SR_MODE | (saveFonts ? VGA_SR_FONTS : 0)); */
+        if ((pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) ||
+            (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI)) {
+            vgaHWSave(pScrn, vgaReg, VGA_SR_MODE);
+            if (saveFonts)
+                MGAG200SESaveFonts(pScrn, vgaReg);
+        } else {
+            vgaHWSave(pScrn, vgaReg, VGA_SR_MODE |
+                                     (saveFonts ? VGA_SR_FONTS : 0));
+        }
+
 	MGAGSavePalette(pScrn, vgaReg->DAC);
 	/* 
 	 * Work around another bug in HALlib: it doesn't restore the
@@ -907,8 +1230,8 @@
 		ErrorF("0x%02X, ", mgaReg->DacRegs[i]);
 #endif
 	}
-	ErrorF("\nOPTION  = %08lX\n:", mgaReg->Option);
-	ErrorF("OPTION2 = %08lX\nCRTCEXT:", mgaReg->Option2);
+	ErrorF("\nOPTION  = %08lX\n:", (unsigned long)mgaReg->Option);
+	ErrorF("OPTION2 = %08lX\nCRTCEXT:", (unsigned long)mgaReg->Option2);
 	for (i=0; i<6; i++) ErrorF(" %02X", mgaReg->ExtVga[i]);
 	ErrorF("\n");
 #endif
@@ -1055,8 +1378,13 @@
   outMGAdacmsk(MGA1064_GEN_IO_CTL, ~(DDC_P1_SCL_MASK | DDC_P1_SDA_MASK), 0);
 
   /* wait for Vsync */
-  while( INREG( MGAREG_Status ) & 0x08 );
-  while( ! (INREG( MGAREG_Status ) & 0x08) );
+  if ((pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) ||
+      (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI)) {
+    usleep(4);
+  } else {
+    while( INREG( MGAREG_Status ) & 0x08 );
+    while( ! (INREG( MGAREG_Status ) & 0x08) );
+  }
 
   /* Get the result */
   val = (inMGAdac(MGA1064_GEN_IO_DATA) & DDC_P1_SDA_MASK);
Index: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c:1.255 xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c:1.261
--- xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c:1.255	Thu Mar 16 11:50:09 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c	Mon Apr  9 15:05:34 2007
@@ -44,7 +44,7 @@
  *		Added digital screen option for first head
  */
  
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c,v 1.255 2006/03/16 16:50:09 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c,v 1.261 2007/04/09 19:05:34 tsi Exp $ */
 
 /*
  * This is a first cut at a non-accelerated version to work with the
@@ -107,8 +107,8 @@
 static void	MGAIdentify(int flags);
 static Bool	MGAProbe(DriverPtr drv, int flags);
 static Bool	MGAPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool	MGAScreenInit(int Index, ScreenPtr pScreen, int argc,
-			      char **argv);
+static Bool	MGAScreenInit(int Index, ScreenPtr pScreen,
+			      const int argc, const char **argv);
 static Bool	MGAEnterVT(int scrnIndex, int flags);
 static Bool	MGAEnterVTFBDev(int scrnIndex, int flags);
 static void	MGALeaveVT(int scrnIndex, int flags);
@@ -169,6 +169,8 @@
     { PCI_CHIP_MGAG100_PCI,	"mgag100 PCI" },
     { PCI_CHIP_MGAG200,		"mgag200" },
     { PCI_CHIP_MGAG200_PCI,	"mgag200 PCI" },
+    { PCI_CHIP_MGAG200_SE_A_PCI,        "mgag200 SE A PCI" },
+    { PCI_CHIP_MGAG200_SE_B_PCI,        "mgag200 SE B PCI" },
     { PCI_CHIP_MGAG400,		"mgag400" },
     { PCI_CHIP_MGAG550,		"mgag550" },
     {-1,			NULL }
@@ -183,6 +185,8 @@
     { PCI_CHIP_MGAG100_PCI, PCI_CHIP_MGAG100_PCI, RES_SHARED_VGA },
     { PCI_CHIP_MGAG200,	    PCI_CHIP_MGAG200,	  RES_SHARED_VGA },
     { PCI_CHIP_MGAG200_PCI, PCI_CHIP_MGAG200_PCI, RES_SHARED_VGA },
+    { PCI_CHIP_MGAG200_SE_B_PCI, PCI_CHIP_MGAG200_SE_B_PCI, RES_SHARED_VGA },
+    { PCI_CHIP_MGAG200_SE_A_PCI, PCI_CHIP_MGAG200_SE_A_PCI, RES_SHARED_VGA },
     { PCI_CHIP_MGAG400,	    PCI_CHIP_MGAG400,	  RES_SHARED_VGA },
     { PCI_CHIP_MGAG550,	    PCI_CHIP_MGAG550,	  RES_SHARED_VGA },
     { -1,		    -1,			  RES_UNDEFINED }
@@ -274,6 +278,7 @@
     "XAAFallbackOps",
     "XAAInit",
     "XAAMoveDWORDS",
+    "XAAScreenIndex",
     "XAA_888_plus_PICT_a8_to_8888",
     NULL
 };
@@ -710,10 +715,6 @@
 	pBios = &pMga->Bios;
 	pBios2 = &pMga->Bios2;
         
-	/* Get the output mode set by the BIOS */
-	xf86ReadDomainMemory(pMga->PciTag, pMga->BiosAddress + 0x7ff1u,
-			     sizeof(CARD8), &pMga->BiosOutputMode); 
-
 	/*
 	 * If the BIOS address was probed, it was found from the PCI config
 	 * space.  If it was given in the config file, try to guess when it
@@ -736,8 +737,11 @@
 			   "Could not retrieve video BIOS!\n");
 		return;
 	}
-        
-        /* Get the video BIOS info block */
+
+	/* Get the output mode set by the BIOS */
+	pMga->BiosOutputMode = BIOS[0x7ff1u];
+
+	/* Get the video BIOS info block */
 	if (strncmp((char *)(&BIOS[45]), "MATROX", 6)) {
 		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
 			       "Video BIOS info block not detected!\n");
@@ -915,6 +919,10 @@
 	}
 	ProbeSize = 32768;
 	break;
+    case PCI_CHIP_MGAG200_SE_A_PCI:
+    case PCI_CHIP_MGAG200_SE_B_PCI:
+        ProbeSize = 4096;
+        break;
     case PCI_CHIP_MGAG200:
     case PCI_CHIP_MGAG200_PCI:
 	if(biosInfo) {
@@ -953,19 +961,72 @@
 	tmp = INREG8(MGAREG_CRTCEXT_DATA);
 	OUTREG8(MGAREG_CRTCEXT_DATA, tmp | 0x80);
 
-	/* write, read and compare method
-	   split into two loops to make it more reliable on RS/6k -ReneR */
-	for(i = ProbeSize; i > 2048; i -= 2048) {
-	    base[(i * 1024) - 1] = 0xAA;
-	}
-	OUTREG8(MGAREG_CRTC_INDEX, 0);  /* flush the cache */
-	usleep(4);  /* twart write combination */
-	for(i = ProbeSize; i > 2048; i -= 2048) {
-	    if(base[(i * 1024) - 1] == 0xAA) {
-		SizeFound = i;
-		break;
+        /* apparently the G200SE doesn't have a BIOS to read */
+        if ((pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) ||
+            (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI)) {
+            CARD32 MemoryAt0, MemoryAt1, Offset;
+            CARD32 FirstMemoryVal1, FirstMemoryVal2;
+            CARD32 SecondMemoryVal1, SecondMemoryVal2;
+            CARD32 TestMemoryLocA, TestMemoryLocB;
+            CARD32 TestMemoryLoc0, TestMemoryLoc1;
+            CARD32 TestA, TestB;
+
+            MemoryAt0 = base[0];
+            MemoryAt1 = base[1];
+            base[0] = 0;
+            base[1] = 0;
+
+            for (Offset = 0x100000; Offset < (ProbeSize * 1024);
+                 Offset += 0x1000) {
+                FirstMemoryVal1 = base[Offset];
+                FirstMemoryVal2 = base[Offset+1];
+                SecondMemoryVal1 = base[Offset+0x100];
+                SecondMemoryVal2 = base[Offset+0x101];
+
+                base[Offset] = 0x55;
+                base[Offset+1] = 0xaa;
+                base[Offset+0x100] = 0x55;
+                base[Offset+0x101] = 0xaa;
+
+                OUTREG(MGAREG_CRTC_INDEX, 0);
+                usleep(8);
+
+                TestMemoryLocA = base[Offset];
+                TestMemoryLocB = base[Offset+1];
+                TestMemoryLoc0 = base[0];
+                TestMemoryLoc1 = base[1];
+
+                base[Offset] = FirstMemoryVal1;
+                base[Offset+1] = FirstMemoryVal2;
+                base[Offset+0x100] = SecondMemoryVal1;
+                base[Offset+0x101] = SecondMemoryVal2;
+
+                TestA = ((TestMemoryLocB << 8) + TestMemoryLocA);
+                TestB = ((TestMemoryLoc1 << 8) + TestMemoryLoc0);
+                if ((TestA != 0xAA55) || (TestB)) {
+                    break;
+                }
+            }
+
+            base[0] = MemoryAt0;
+            base[1] = MemoryAt1;
+
+            SizeFound = (Offset / 1024) - 64;
+        } else {
+	    /* write, read and compare method
+	       split into two loops to make it more reliable on RS/6k -ReneR */
+	    for(i = ProbeSize; i > 2048; i -= 2048) {
+	        base[(i * 1024) - 1] = 0xAA;
 	    }
-	}
+	    OUTREG8(MGAREG_CRTC_INDEX, 0);  /* flush the cache */
+	    usleep(4);  /* twart write combination */
+	    for(i = ProbeSize; i > 2048; i -= 2048) {
+	        if(base[(i * 1024) - 1] == 0xAA) {
+		    SizeFound = i;
+		    break;
+	        }
+	    }
+        }
 
 	/* restore CRTCEXT3 state */
 	OUTREG8(MGAREG_CRTCEXT_INDEX, 3);
@@ -1749,6 +1810,8 @@
     case PCI_CHIP_MGAG100_PCI:
     case PCI_CHIP_MGAG200:
     case PCI_CHIP_MGAG200_PCI:
+    case PCI_CHIP_MGAG200_SE_A_PCI:
+    case PCI_CHIP_MGAG200_SE_B_PCI:
     case PCI_CHIP_MGAG400:
     case PCI_CHIP_MGAG550:
 	MGAGSetupFuncs(pScrn);
@@ -1979,6 +2042,8 @@
 	  case PCI_CHIP_MGAG400:
 	  case PCI_CHIP_MGAG200:
 	  case PCI_CHIP_MGAG200_PCI:
+          case PCI_CHIP_MGAG200_SE_A_PCI:
+          case PCI_CHIP_MGAG200_SE_B_PCI:
 	    pMga->SrcOrg = 0;
 	    pMga->DstOrg = 0;
 	    break;
@@ -2139,6 +2204,8 @@
 	   break;
 	case PCI_CHIP_MGAG200:
 	case PCI_CHIP_MGAG200_PCI:
+        case PCI_CHIP_MGAG200_SE_A_PCI:
+        case PCI_CHIP_MGAG200_SE_B_PCI:
 	case PCI_CHIP_MGAG400:
 	case PCI_CHIP_MGAG550:
 	   maxPitch = 4096;
@@ -2890,6 +2957,8 @@
 	    case PCI_CHIP_MGAG100_PCI:
 	    case PCI_CHIP_MGAG200:
 	    case PCI_CHIP_MGAG200_PCI:
+            case PCI_CHIP_MGAG200_SE_A_PCI:
+            case PCI_CHIP_MGAG200_SE_B_PCI:
 	    case PCI_CHIP_MGAG400:	      
 	    case PCI_CHIP_MGAG550:
 		if(pMga->SecondCrtc == FALSE && pMga->HWCursor == TRUE) {
@@ -3066,7 +3135,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-MGAScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+MGAScreenInit(int scrnIndex, ScreenPtr pScreen,
+	      const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     vgaHWPtr hwp;
@@ -3078,6 +3148,7 @@
     int width, height, displayWidth;
     MGAEntPtr pMgaEnt = NULL;
     int f;
+    CARD32 VRTemp = 0, FBTemp = 0;
 #ifdef XF86DRI
     MessageType driFrom = X_DEFAULT;
 #endif
@@ -3091,6 +3162,13 @@
     pMga = MGAPTR(pScrn);
     MGAdac = &pMga->Dac;
 
+    if ((pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) ||
+        (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI)) {
+        VRTemp = pScrn->videoRam;
+        FBTemp = pMga->FbMapSize;
+        pScrn->videoRam = 4096;
+        pMga->FbMapSize = pScrn->videoRam * 1024;
+    }
     
     /* Map the MGA memory and MMIO areas */
     if (pMga->FBDev) {
@@ -3169,6 +3247,14 @@
 	  );	/* MGA_HAL */
 #endif
     }
+    if ((pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) ||
+        (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI)) {
+	/* Need to remap */
+        MGAUnmapMem(pScrn);
+        pScrn->videoRam = VRTemp;
+        pMga->FbMapSize = FBTemp;
+        MGAMapMem(pScrn);
+    }
 #ifdef USEMGAHAL
     MGA_HAL(
 	/* There is a problem in the HALlib: set soft reset bit */
@@ -3206,6 +3292,8 @@
 	    case PCI_CHIP_MGAG100_PCI:
 	    case PCI_CHIP_MGAG200:
 	    case PCI_CHIP_MGAG200_PCI:
+            case PCI_CHIP_MGAG200_SE_A_PCI:
+            case PCI_CHIP_MGAG200_SE_B_PCI:
 	    case PCI_CHIP_MGAG400:
 	    case PCI_CHIP_MGAG550:
 		outMGAdac(MGA1064_CURSOR_BASE_ADR_LOW, pMga->FbCursorOffset >> 10);
@@ -3322,7 +3410,14 @@
       * InitGLXVisuals call back.
       * The DRI does not work when textured video is enabled at this time.
       */
-    if (!xf86ReturnOptValBool(pMga->Options, OPTION_DRI, TRUE)) {
+    if ((pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) ||
+        (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI)) {
+        xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+                   "Not supported by hardware, not initializing the DRI\n");
+        pMga->directRenderingEnabled = FALSE;
+        driFrom = X_PROBED;
+/*    if (!xf86ReturnOptValBool(pMga->Options, OPTION_DRI, TRUE)) { */
+    } else if (!xf86ReturnOptValBool(pMga->Options, OPTION_DRI, TRUE)) {
 	driFrom = X_CONFIG;
     } else if ( pMga->NoAccel ) {
        xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
@@ -3747,6 +3842,9 @@
     }
 #endif
 
+    /* Resave text mode */
+    MGASave(pScrn);
+
     if (!MGAModeInit(pScrn, pScrn->currentMode))
 	return FALSE;
     pScrn->AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0);
Index: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_g450pll.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/mga/mga_g450pll.c:1.9 xc/programs/Xserver/hw/xfree86/drivers/mga/mga_g450pll.c:1.10
--- xc/programs/Xserver/hw/xfree86/drivers/mga/mga_g450pll.c:1.9	Mon Nov  3 00:11:18 2003
+++ xc/programs/Xserver/hw/xfree86/drivers/mga/mga_g450pll.c	Sun Dec 10 10:58:30 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_g450pll.c,v 1.9 2003/11/03 05:11:18 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_g450pll.c,v 1.10 2006/12/10 15:58:30 tsi Exp $ */
 
 /* All drivers should typically include these */
 #include "xf86.h"
@@ -137,7 +137,8 @@
       *pulPLLMNP |= (CARD32)ucP;
       
 #ifdef DEBUG
-      ErrorF("FINS_S: VCO = %d, S = %02X, *pulPLLMNP = %08X\n", ulVCO, (ULONG)ucS, *pulPLLMNP);
+      ErrorF("FINS_S: VCO = %ld, S = %02X, *pulPLLMNP = %08lX\n",
+	(unsigned long)ulVCO, ucS, (unsigned long)*pulPLLMNP);
 #endif
   }
 
@@ -319,7 +320,7 @@
    MGAPtr pMga = MGAPTR(pScrn);
 
 #ifdef DEBUG
-   xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Restoring PLLClk = %d\n",f_out);
+   xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Restoring PLLClk = %ld\n",f_out);
 #endif
    G450FindFirstPLLParam(pScrn, f_out, &ulMNP);
    ulMNPTable[0] = ulMNP;
Index: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_halmod.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/mga/mga_halmod.c:1.1 xc/programs/Xserver/hw/xfree86/drivers/mga/mga_halmod.c:1.2
--- xc/programs/Xserver/hw/xfree86/drivers/mga/mga_halmod.c:1.1	Wed Dec  6 10:35:21 2000
+++ xc/programs/Xserver/hw/xfree86/drivers/mga/mga_halmod.c	Mon Jun 26 21:00:49 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_halmod.c,v 1.1 2000/12/06 15:35:21 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_halmod.c,v 1.2 2006/06/27 01:00:49 dawes Exp $ */
 #include "xf86Module.h"
 
 #ifdef XFree86LOADER
@@ -30,7 +30,7 @@
 XF86ModuleData mga_halModuleData = { &halVersRec, halSetup, NULL };
 
 static pointer
-halSetup(pointer module, pointer opts, int *errmaj, int *errmin)
+halSetup(ModuleDescPtr module, pointer opts, int *errmaj, int *errmin)
 {
 	return (pointer)1;
 }
Index: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h
diff -u xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h:1.22 xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h:1.23
--- xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h:1.22	Wed Feb 20 12:17:50 2002
+++ xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h	Wed Feb 21 10:50:59 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h,v 1.22 2002/02/20 17:17:50 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_macros.h,v 1.23 2007/02/21 15:50:59 tsi Exp $ */
 
 #ifndef _MGA_MACROS_H_
 #define _MGA_MACROS_H_
@@ -94,6 +94,8 @@
 #ifdef USEMGAHAL
 #define HAL_CHIPSETS ((pMga->Chipset == PCI_CHIP_MGAG200_PCI) || \
 		  (pMga->Chipset == PCI_CHIP_MGAG200) || \
+                  (pMga->Chipset == PCI_CHIP_MGAG200_SE_A_PCI) || \
+                  (pMga->Chipset == PCI_CHIP_MGAG200_SE_B_PCI) || \
 		  (pMga->Chipset == PCI_CHIP_MGAG400) || \
 		  (pMga->Chipset == PCI_CHIP_MGAG550))
     
Index: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_merge.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/mga/mga_merge.c:1.5 xc/programs/Xserver/hw/xfree86/drivers/mga/mga_merge.c:1.6
--- xc/programs/Xserver/hw/xfree86/drivers/mga/mga_merge.c:1.5	Sat Nov  1 23:24:36 2003
+++ xc/programs/Xserver/hw/xfree86/drivers/mga/mga_merge.c	Wed Feb 21 10:50:59 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_merge.c,v 1.5 2003/11/02 04:24:36 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_merge.c,v 1.6 2007/02/21 15:50:59 tsi Exp $ */
 
 /* All drivers should typically include these */
 #include "xf86.h"
@@ -356,6 +356,8 @@
     case PCI_CHIP_MGAG100_PCI:
     case PCI_CHIP_MGAG200:
     case PCI_CHIP_MGAG200_PCI:
+    case PCI_CHIP_MGAG200_SE_A_PCI:
+    case PCI_CHIP_MGAG200_SE_B_PCI:
     case PCI_CHIP_MGAG400:
     case PCI_CHIP_MGAG550:
 	MGAGSetupFuncs(pScrn);
@@ -505,6 +507,8 @@
 	   break;
 	case PCI_CHIP_MGAG200:
 	case PCI_CHIP_MGAG200_PCI:
+        case PCI_CHIP_MGAG200_SE_A_PCI:
+        case PCI_CHIP_MGAG200_SE_B_PCI:
 	case PCI_CHIP_MGAG400:
 	case PCI_CHIP_MGAG550:
 	   maxPitch = 4096;
Index: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h
diff -u xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h:1.19 xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h:1.20
--- xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h:1.19	Mon Jan  9 09:59:54 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h	Wed Feb 21 10:50:59 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h,v 1.19 2006/01/09 14:59:54 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_reg.h,v 1.20 2007/02/21 15:50:59 tsi Exp $ */
 
 /*
  * MGA Millennium (MGA2064W) functions
@@ -351,6 +351,7 @@
 #define MGA1064_GEN_CTL		0x1d
 #define MGA1064_MISC_CTL	0x1e
 #define MGA1064_MISC_CTL_DAC_POW_DN   		( 0x01 << 0 )
+#define MGA1064_MISC_CTL_DAC_EN                ( 0x01 << 0 )
 #define MGA1064_MISC_CTL_VGA   		( 0x01 << 1 )
 #define MGA1064_MISC_CTL_DIS_CON   		( 0x03 << 1 )
 #define MGA1064_MISC_CTL_MAFC   		( 0x02 << 1 )
Index: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c:1.105 xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c:1.106
--- xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c:1.105	Sun Aug 28 13:48:00 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c	Wed Feb 21 10:50:59 2007
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c,v 1.105 2005/08/28 17:48:00 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/mga/mga_storm.c,v 1.106 2007/02/21 15:50:59 tsi Exp $ */
 /*
- * Copyright (c) 1994-2004 by The XFree86 Project, Inc.
+ * Copyright (c) 1994-2007 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -653,6 +653,8 @@
 	}
         pMga->MaxBlitDWORDS = 0x400000 >> 5;
 	/* fallthrough */
+    case PCI_CHIP_MGAG200_SE_A_PCI:
+    case PCI_CHIP_MGAG200_SE_B_PCI:
     case PCI_CHIP_MGAG200:
     case PCI_CHIP_MGAG200_PCI:
 	doRender = FALSE;
@@ -847,8 +849,17 @@
 	pMga->MaxFastBlitY = maxFastBlitMem / (pScrn->displayWidth * PSZ / 8);
     }
 
-    maxlines = (min(pMga->FbUsableSize, 16*1024*1024)) /
-	               (pScrn->displayWidth * PSZ / 8);
+    switch (pMga->Chipset) {
+    case PCI_CHIP_MGAG200_SE_A_PCI:
+    case PCI_CHIP_MGAG200_SE_B_PCI:
+        maxlines = (min(pMga->FbUsableSize, 1*1024*1024)) /
+                   (pScrn->displayWidth * PSZ / 8);
+        break;
+    default:
+        maxlines = (min(pMga->FbUsableSize, 16*1024*1024)) /
+                   (pScrn->displayWidth * PSZ / 8);
+        break;
+    }
 
 #ifdef XF86DRI
     if ( pMga->directRenderingEnabled ) {
@@ -1238,6 +1249,8 @@
     case PCI_CHIP_MGAG400:
     case PCI_CHIP_MGAG200:
     case PCI_CHIP_MGAG200_PCI:
+    case PCI_CHIP_MGAG200_SE_A_PCI:
+    case PCI_CHIP_MGAG200_SE_B_PCI:
 	pMga->SrcOrg = 0;
 	OUTREG(MGAREG_SRCORG, pMga->realSrcOrg);
 	OUTREG(MGAREG_DSTORG, pMga->DstOrg);
Index: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c:1.82 xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c:1.84
--- xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c:1.82	Thu Mar 16 11:50:10 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c	Tue Jan 23 13:03:04 2007
@@ -30,7 +30,7 @@
  * Copyright 2002 Shigehiro Nomura
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c,v 1.82 2006/03/16 16:50:10 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_driver.c,v 1.84 2007/01/23 18:03:04 tsi Exp $ */
 
 /*
  * The original Precision Insight driver for
@@ -117,8 +117,8 @@
 static void     NEOIdentify(int flags);
 static Bool     NEOProbe(DriverPtr drv, int flags);
 static Bool     NEOPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool     NEOScreenInit(int Index, ScreenPtr pScreen, int argc,
-                                  char **argv);
+static Bool     NEOScreenInit(int Index, ScreenPtr pScreen,
+                              const int argc, const char **argv);
 static Bool     NEOEnterVT(int scrnIndex, int flags);
 static void     NEOLeaveVT(int scrnIndex, int flags);
 static Bool     NEOCloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -1487,7 +1487,8 @@
 
 /* Mandatory */
 static Bool
-NEOScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+NEOScreenInit(int scrnIndex, ScreenPtr pScreen,
+              const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     vgaHWPtr hwp;
Index: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c:1.8 xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c:1.9
--- xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c:1.8	Mon Mar 29 11:25:17 2004
+++ xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c	Sun Dec 10 10:58:30 2006
@@ -26,7 +26,7 @@
 /*
  * Copyright 2002 SuSE Linux AG, Author: Egbert Eich
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c,v 1.8 2004/03/29 16:25:17 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/neomagic/neo_video.c,v 1.9 2006/12/10 15:58:30 tsi Exp $ */
 
 #include "neo.h"
 #include "neo_video.h"
@@ -938,7 +938,8 @@
     size = (size + bytespp - 1) / bytespp;
 #ifdef DEBUG
     xf86DrvMsg(pScrn->scrnIndex,X_INFO,
-	       "NEOAllocateMemory: linear=%x, size=%d\n", linear, size);
+	       "NEOAllocateMemory: linear=%lx, size=%d\n",
+	       (unsigned long)linear, size);
 #endif
     if (linear){
 #ifdef DEBUG
Index: xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c:1.29 xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c:1.32
--- xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c:1.29	Thu Mar 16 11:50:11 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c	Fri Apr 13 13:16:51 2007
@@ -28,7 +28,7 @@
  * Project.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c,v 1.29 2006/03/16 16:50:11 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/newport/newport_driver.c,v 1.32 2007/04/13 17:16:51 tsi Exp $ */
 
 /* function prototypes, common data structures & generic includes */
 #include "newport.h"
@@ -50,6 +50,10 @@
 #include "xf86xv.h"
 #include <X11/extensions/Xv.h>
 
+/* DPMS */
+#define DPMS_SERVER
+#include <X11/extensions/dpms.h>
+
 #define VERSION			4000
 #define NEWPORT_NAME		"NEWPORT"
 #define NEWPORT_DRIVER_NAME	"newport"
@@ -63,7 +67,7 @@
 static const OptionInfoRec * NewportAvailableOptions(int chipid, int busid);
 static Bool NewportProbe(DriverPtr drv, int flags);
 static Bool NewportPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool NewportScreenInit(int Index, ScreenPtr pScreen, int argc, char **argv);
+static Bool NewportScreenInit(int Index, ScreenPtr pScreen, const int argc, const char **argv);
 static Bool NewportEnterVT(int scrnIndex, int flags);
 static void NewportLeaveVT(int scrnIndex, int flags);
 static Bool NewportCloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -76,6 +80,7 @@
 static Bool NewportMapRegs(ScrnInfoPtr pScrn);
 static void NewportUnmapRegs(ScrnInfoPtr pScrn);
 static Bool NewportProbeCardInfo(ScrnInfoPtr pScrn);
+static void NewportDisplayPowerManagementSet(ScrnInfoPtr, int, int);
 /* ------------------------------------------------------------------ */
 
 DriverRec NEWPORT = {
@@ -472,7 +477,7 @@
 }
 
 static Bool 
-NewportScreenInit(int index, ScreenPtr pScreen, int argc, char **argv)
+NewportScreenInit(int index, ScreenPtr pScreen, const int argc, const char **argv)
 {
 	ScrnInfoPtr pScrn;
 	NewportPtr pNewport;
@@ -585,6 +590,10 @@
 	pNewport->CloseScreen = pScreen->CloseScreen;
 	pScreen->CloseScreen = NewportCloseScreen;
 
+	if(xf86DPMSInit(pScreen, NewportDisplayPowerManagementSet, 0) == FALSE)
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "DPMS initialization failed!\n");
+
+
 	if (serverGeneration == 1) {
 		xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
 	}
@@ -656,6 +665,39 @@
 	return TRUE;
 }
 
+static void
+NewportDisplayPowerManagementSet(ScrnInfoPtr pScrn, int Mode, int flags)
+{
+	NewportPtr pNewport;
+	NewportRegsPtr pNewportRegs;
+	char modestr[][40] = { "On","Standby","Suspend","Off" };
+
+	pNewport = NEWPORTPTR(pScrn);
+	pNewportRegs = NEWPORTPTR(pScrn)->pNewportRegs;
+
+	switch (Mode) {
+		case DPMSModeOn:
+			/* Screen: On; HSync: On, VSync: On */
+			pNewport->vc2ctrl |= VC2_CTRL_EDISP;            
+			NewportVc2Set(  pNewportRegs, VC2_IREG_CONTROL,
+					pNewport->vc2ctrl);
+			break;
+		case DPMSModeStandby:
+		case DPMSModeSuspend:
+		case DPMSModeOff:
+			pNewport->vc2ctrl &= ~VC2_CTRL_EDISP;           
+			NewportVc2Set(  pNewportRegs, VC2_IREG_CONTROL,
+					pNewport->vc2ctrl);
+			break;
+		default:
+			xf86ErrorFVerb(1, "Invalid PowerManagementMode %d passed to NewportDisplay PowerManagementSet\n", Mode);
+			break;
+	}
+
+	xf86ErrorFVerb(1, "Power Manag: set:%s\n", modestr[Mode]);
+
+}
+
 
 static const OptionInfoRec *
 NewportAvailableOptions(int chipid, int busid)
@@ -739,7 +781,7 @@
 					NPORT_DMODE1_RGBMD;
 	pNewportRegs->set.colorvram = 0;
 	pNewportRegs->set.xystarti = 0;
-	pNewportRegs->go.xyendi = ( (1279+64) << 16) | 1023;
+	pNewportRegs->go.xyendi = ( ( (width-1)+64) << 16) | (height-1);
 
 	/* default drawmode */
 	NewportWait(pNewportRegs);
Index: xc/programs/Xserver/hw/xfree86/drivers/nsc/Imakefile
diff -u xc/programs/Xserver/hw/xfree86/drivers/nsc/Imakefile:1.12 xc/programs/Xserver/hw/xfree86/drivers/nsc/Imakefile:1.13
--- xc/programs/Xserver/hw/xfree86/drivers/nsc/Imakefile:1.12	Fri Oct 14 11:16:42 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/nsc/Imakefile	Wed Jan  3 20:59:07 2007
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/Imakefile,v 1.12 2005/10/14 15:16:42 tsi Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/Imakefile,v 1.13 2007/01/04 01:59:07 tsi Exp $
 XCOMM Imakefile for the National Semiconductor display driver
 XCOMM that is based on the durango code.
 XCOMM
@@ -63,7 +63,7 @@
 DEFINES = -DOPT_ACCEL
 DURANGOSRCS = durango.c panel.c
 DURANGOOBJS = durango.o panel.o
-EXTINCLUDES = -I./gfx -I./panel
+EXTINCLUDES = -Igfx -Ipanel
 #else
 DEFINES = -DSTB_X
 STBSRCS = nsc_galstub.c
Index: xc/programs/Xserver/hw/xfree86/drivers/nsc/durango.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/nsc/durango.c:1.6 xc/programs/Xserver/hw/xfree86/drivers/nsc/durango.c:1.7
--- xc/programs/Xserver/hw/xfree86/drivers/nsc/durango.c:1.6	Mon Jan  9 09:59:55 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/nsc/durango.c	Mon Apr  9 11:37:15 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/durango.c,v 1.6 2006/01/09 14:59:55 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/durango.c,v 1.7 2007/04/09 15:37:15 tsi Exp $ */
 /*
  * This is the main file used to add Durango graphics support to a software 
  * project.  The main reason to have a single file include the other files
@@ -588,6 +588,8 @@
    nsc_asm_msr_vsa_rd(addr, &val2, &val1);
    *ptrHigh = val2;
    *ptrLow = val1;
+#else
+   *ptrHigh = *ptrLow = (unsigned long)(-1L);
 #endif
 }
 
Index: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_driver.c:1.11 xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_driver.c:1.12
--- xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_driver.c:1.11	Thu Mar 16 11:50:11 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_driver.c	Sun Dec 10 10:58:30 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_driver.c,v 1.11 2006/03/16 16:50:11 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_driver.c,v 1.12 2006/12/10 15:58:30 tsi Exp $ */
 /*
  * File Contents: This is the main module configures the interfacing 
  *                with the X server. The individual modules will be 
@@ -139,7 +139,6 @@
  *
  * END_NSC_LIC_GPL */
 
-#define DEBUG(x)
 #define NSC_TRACE 0
 #define HWVGA 1
 
Index: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_driver.c:1.17 xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_driver.c:1.20
--- xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_driver.c:1.17	Thu Mar 16 11:50:11 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_driver.c	Tue Jan 23 13:03:05 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_driver.c,v 1.17 2006/03/16 16:50:11 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx1_driver.c,v 1.20 2007/01/23 18:03:05 tsi Exp $ */
 /*
  * File Contents: This is the main module configures the interfacing 
  *                with the X server. The individual modules will be 
@@ -144,7 +144,6 @@
  * Alan Hourihane <alanh@fairlite.demon.co.uk>
  */
 
-#define DEBUG(x)
 #define GEODE_TRACE 0
 #define HWVGA 0
 
@@ -243,7 +242,7 @@
 static int MemIndex = 0;
 
 static Bool GX1PreInit(ScrnInfoPtr, int);
-static Bool GX1ScreenInit(int, ScreenPtr, int, char **);
+static Bool GX1ScreenInit(int, ScreenPtr, const int, const char **);
 static Bool GX1EnterVT(int, int);
 static void GX1LeaveVT(int, int);
 static void GX1FreeScreen(int, int);
@@ -1757,7 +1756,8 @@
 *----------------------------------------------------------------------------
 */
 static Bool
-GX1ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+GX1ScreenInit(int scrnIndex, ScreenPtr pScreen,
+	      const int argc, const char **argv)
 {
    ScrnInfoPtr pScreenInfo = xf86Screens[pScreen->myNum];
    GeodePtr pGeode;
Index: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_driver.c:1.16 xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_driver.c:1.19
--- xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_driver.c:1.16	Thu Mar 16 11:50:11 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_driver.c	Tue Jan 23 13:03:05 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_driver.c,v 1.16 2006/03/16 16:50:11 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/nsc_gx2_driver.c,v 1.19 2007/01/23 18:03:05 tsi Exp $ */
 /*
  * File Contents: This is the main module configures the interfacing 
  *                with the X server. The individual modules will be 
@@ -139,7 +139,6 @@
  *
  * END_NSC_LIC_GPL */
 
-#define DEBUG(x)
 #define GEODE_TRACE 0
 
 /* Includes that are used by all drivers */
@@ -204,7 +203,7 @@
 
 /* Forward definitions */
 static Bool GX2PreInit(ScrnInfoPtr, int);
-static Bool GX2ScreenInit(int, ScreenPtr, int, char **);
+static Bool GX2ScreenInit(int, ScreenPtr, const int, const char **);
 static Bool GX2EnterVT(int, int);
 static void GX2LeaveVT(int, int);
 static void GX2FreeScreen(int, int);
@@ -1696,7 +1695,8 @@
 *----------------------------------------------------------------------------
 */
 static Bool
-GX2ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+GX2ScreenInit(int scrnIndex, ScreenPtr pScreen,
+	      const int argc, const char **argv)
 {
    ScrnInfoPtr pScreenInfo = xf86Screens[pScreen->myNum];
    GeodePtr pGeode;
Index: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_msr.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_msr.c:1.1 xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_msr.c:1.2
--- xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_msr.c:1.1	Tue Dec 10 10:12:25 2002
+++ xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_msr.c	Mon Apr  9 11:37:15 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_msr.c,v 1.1 2002/12/10 15:12:25 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nsc/gfx/gfx_msr.c,v 1.2 2007/04/09 15:37:15 tsi Exp $ */
 /*
  * $Workfile: gfx_msr.c $
  *
@@ -229,6 +229,7 @@
       ret_value = redcloud_msr_read(device, msrRegister, msrValue);
 #	endif
 
+   msrValue->high = msrValue->low = 0;
    return ret_value;
 }
 
Index: xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man
diff -u xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man:1.29 xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man:1.30
--- xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man:1.29	Fri Jan 20 20:17:59 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man	Thu Jun 15 20:19:32 2006
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man,v 1.29 2006/01/21 01:17:59 mvojkovi Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv.man,v 1.30 2006/06/16 00:19:32 mvojkovi Exp $ 
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
 .TH NV __drivermansuffix__ __vendorversion__
@@ -24,7 +24,7 @@
 .SH SUPPORTED HARDWARE
 The
 .B nv
-driver supports PCI and AGP video cards based on the following NVIDIA chips:
+driver supports PCI, PCI-Express and AGP video cards based on the following NVIDIA chips:
 .TP 22
 .B RIVA 128
 NV3
@@ -78,13 +78,12 @@
 Disable or enable acceleration.  Default: acceleration is enabled.
 .TP
 .BI "Option \*qUseFBDev\*q \*q" boolean \*q
-Enable or disable use of on OS-specific fb interface (and is not supported
+Enable or disable use of an OS-specific fb interface (and is not supported
 on all OSs).  See fbdevhw(__drivermansuffix__) for further information.
 Default: off.
 .TP
 .BI "Option \*qCrtcNumber\*q \*q" integer \*q
-GeForce2 MX, nForce2, Quadro4, GeForce4, Quadro FX and GeForce FX 
-may have two video outputs.  
+Many graphics cards with NVIDIA chips have two video outputs.  
 The driver attempts to autodetect
 which one the monitor is connected to.  In the case that autodetection picks
 the wrong one, this option may be used to force usage of a particular output. 
@@ -95,22 +94,21 @@
 The driver usually can autodetect the presence of a digital flat panel.  In
 the case that this fails, this option can be used to force the driver to 
 treat the attached device as a digital flat panel.  With this 
-driver, a digital flat panel will only work if it was POSTed by the BIOS, 
-that is, the
-machine must have booted to the panel.  If you have a dual head card
+driver, a digital flat panel will work only if it was POSTed by the BIOS, 
+that is, the computer
+must have booted to the panel.  If you have a dual head card
 you may also need to set the option CrtcNumber described above.
-Default: off.
+Default: autodetected.
 .TP
 .BI "Option \*qFPDither\*q \*q" boolean \*q
 Many digital flat panels (particularly ones on laptops) have only 6 bits 
 per component color resolution.
 This option tells the driver to dither from 8 bits per component to 6 before
-the flat panel truncates it. This is only supported in depth 24 on GeForce2 MX, 
-nForce2, GeForce4, Quadro4, Geforce FX and Quadro FX.
+the flat panel truncates it. 
 Default: off.
 .TP
 .BI "Option \*qFPScale\*q \*q" boolean \*q 
-Supported only on GeForce4, Quadro4, Geforce FX and Quadro FX.  This option 
+Supported only on GeForce4 and newer chips, this option
 tells to the driver to scale lower resolutions up to the flat panel's native
 resolution.  Default: on.
 .TP 
Index: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c:1.143 xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c:1.146
--- xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c:1.143	Thu Mar 16 11:50:11 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c	Tue Jan 23 13:03:05 2007
@@ -23,7 +23,7 @@
 /* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
    <jpaana@s2.org> */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.143 2006/03/16 16:50:11 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_driver.c,v 1.146 2007/01/23 18:03:05 tsi Exp $ */
 
 #include "nv_include.h"
 
@@ -40,8 +40,8 @@
 static void    NVIdentify(int flags);
 static Bool    NVProbe(DriverPtr drv, int flags);
 static Bool    NVPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool    NVScreenInit(int Index, ScreenPtr pScreen, int argc,
-                            char **argv);
+static Bool    NVScreenInit(int Index, ScreenPtr pScreen,
+                            const int argc, const char **argv);
 static Bool    NVEnterVT(int scrnIndex, int flags);
 static Bool    NVEnterVTFBDev(int scrnIndex, int flags);
 static void    NVLeaveVT(int scrnIndex, int flags);
@@ -218,6 +218,7 @@
   { 0x10DE0041, "GeForce 6800" },
   { 0x10DE0042, "GeForce 6800 LE" },
   { 0x10DE0043, "GeForce 6800 XE" },
+  { 0x10DE0044, "GeForce 6800 XT" },
   { 0x10DE0045, "GeForce 6800 GT" },
   { 0x10DE0046, "GeForce 6800 GT" },
   { 0x10DE0047, "GeForce 6800 GS" },
@@ -244,6 +245,8 @@
   { 0x10DE0147, "GeForce 6700 XL" },
   { 0x10DE0148, "GeForce Go 6600" },
   { 0x10DE0149, "GeForce Go 6600 GT" },
+  { 0x10DE014C, "Quadro FX 550" },
+  { 0x10DE014D, "Quadro FX 550" },
   { 0x10DE014E, "Quadro FX 540" },
   { 0x10DE014F, "GeForce 6200" },
 
@@ -264,6 +267,7 @@
   { 0x10DE0218, "GeForce 6800 XT" },
 
   { 0x10DE0221, "GeForce 6200" },
+  { 0x10DE0222, "GeForce 6200 A-LE" },
 
   { 0x10DE0090, "GeForce 7800 GTX" },
   { 0x10DE0091, "GeForce 7800 GTX" },
@@ -275,24 +279,42 @@
   { 0x10DE009D, "Quadro FX 4500" },
 
   { 0x10DE01D1, "GeForce 7300 LE" },
+  { 0x10DE01D3, "GeForce 7300 SE" },
   { 0x10DE01D6, "GeForce Go 7200" },
   { 0x10DE01D7, "GeForce Go 7300" },
   { 0x10DE01D8, "GeForce Go 7400" },
+  { 0x10DE01D9, "GeForce Go 7400 GS" },
   { 0x10DE01DA, "Quadro NVS 110M" },
   { 0x10DE01DB, "Quadro NVS 120M" },
   { 0x10DE01DC, "Quadro FX 350M" },
+  { 0x10DE01DD, "GeForce 7500 LE" },
   { 0x10DE01DE, "Quadro FX 350" },
   { 0x10DE01DF, "GeForce 7300 GS" },
 
+  { 0x10DE0391, "GeForce 7600 GT" },
+  { 0x10DE0392, "GeForce 7600 GS" },
+  { 0x10DE0393, "GeForce 7300 GT" },
+  { 0x10DE0394, "GeForce 7600 LE" },
+  { 0x10DE0395, "GeForce 7300 GT" },
+  { 0x10DE0397, "GeForce Go 7700" },
   { 0x10DE0398, "GeForce Go 7600" },
   { 0x10DE0399, "GeForce Go 7600 GT"},
   { 0x10DE039A, "Quadro NVS 300M" },
+  { 0x10DE039B, "GeForce Go 7900 SE" },
   { 0x10DE039C, "Quadro FX 550M" },
+  { 0x10DE039E, "Quadro FX 560" },
 
+  { 0x10DE0290, "GeForce 7900 GTX" },
+  { 0x10DE0291, "GeForce 7900 GT" },
+  { 0x10DE0292, "GeForce 7900 GS" },
   { 0x10DE0298, "GeForce Go 7900 GS" },
   { 0x10DE0299, "GeForce Go 7900 GTX" },
   { 0x10DE029A, "Quadro FX 2500M" },
   { 0x10DE029B, "Quadro FX 1500M" },
+  { 0x10DE029C, "Quadro FX 5500" },
+  { 0x10DE029D, "Quadro FX 3500" },
+  { 0x10DE029E, "Quadro FX 1500" },
+  { 0x10DE029F, "Quadro FX 4500 X2" },
   
   { 0x10DE0240, "GeForce 6150" },
   { 0x10DE0241, "GeForce 6150 LE" },
@@ -656,8 +678,11 @@
             int pciid = ((*ppPci)->vendor << 16) | (*ppPci)->chipType;
             int token = pciid;
 
-            if((token & 0xfff0) == 0x00F0) 
+            if(((token & 0xfff0) == 0x00F0) ||
+               ((token & 0xfff0) == 0x02E0))
+            {
                 token = NVGetPCIXpressChip(*ppPci);
+            }
 
             while(nvchips->name) {
                if(token == nvchips->token)
@@ -697,6 +722,7 @@
                case 0x0240:
                case 0x0290:
                case 0x0390:
+               case 0x03D0:
                    NVChipsets[numUsed].token = pciid;
                    NVChipsets[numUsed].name = "Unknown NVIDIA chip";
                    NVPciChipsets[numUsed].numChipset = pciid;
@@ -1050,8 +1076,11 @@
 	from = X_PROBED;
 	pNv->Chipset = (pNv->PciInfo->vendor << 16) | pNv->PciInfo->chipType;
 
-        if((pNv->Chipset & 0xfff0) == 0x00F0)
+        if(((pNv->Chipset & 0xfff0) == 0x00F0) ||
+           ((pNv->Chipset & 0xfff0) == 0x02E0))
+        {
             pNv->Chipset = NVGetPCIXpressChip(pNv->PciInfo);
+        }
 
 	pScrn->chipset = (char *)xf86TokenToString(NVKnownChipsets, 
                                                    pNv->Chipset);
@@ -1393,6 +1422,7 @@
     case 0x0290:   /* GeForce 7900 */
     case 0x0390:   /* GeForce 7600 */
     case 0x0240:   /* GeForce 6100 */
+    case 0x03D0:
          pNv->Architecture =  NV_ARCH_40;
          break;
     default:
@@ -1825,7 +1855,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-NVScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+NVScreenInit(int scrnIndex, ScreenPtr pScreen,
+             const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     vgaHWPtr hwp;
Index: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c:1.20 xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c:1.22
--- xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c:1.20	Fri Jan 20 20:17:59 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c	Mon Apr  9 11:37:16 2007
@@ -36,7 +36,7 @@
 |*     those rights set forth herein.                                        *|
 |*                                                                           *|
  \***************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c,v 1.20 2006/01/21 01:17:59 mvojkovi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/nv_hw.c,v 1.22 2007/04/09 15:37:16 tsi Exp $ */
 
 #include "nv_local.h"
 #include "compiler.h"
@@ -840,7 +840,7 @@
     int		   flags 
 )
 {
-    int pixelDepth, VClk;
+    int pixelDepth, VClk = 0;
     /*
      * Save mode parameters.
      */
@@ -878,8 +878,10 @@
         case NV_ARCH_20:
         case NV_ARCH_30:
         default:
-            if((pNv->Chipset & 0xfff0) == 0x0240) {
-                state->arbitration0 = 256; 
+            if(((pNv->Chipset & 0xfff0) == 0x0240) ||
+               ((pNv->Chipset & 0xfff0) == 0x03D0))
+            {
+                state->arbitration0 = 128; 
                 state->arbitration1 = 0x0480; 
             } else
             if(((pNv->Chipset & 0xffff) == 0x01A0) ||
@@ -954,7 +956,8 @@
         if(((pNv->Chipset & 0xfff0) == 0x0090) ||
            ((pNv->Chipset & 0xfff0) == 0x01D0) ||
            ((pNv->Chipset & 0xfff0) == 0x0290) ||
-           ((pNv->Chipset & 0xfff0) == 0x0390))
+           ((pNv->Chipset & 0xfff0) == 0x0390) ||
+           ((pNv->Chipset & 0xfff0) == 0x03D0))
         {
            regions = 15;
         }
@@ -1208,6 +1211,7 @@
               case 0x0160:
               case 0x01D0:
               case 0x0240:
+              case 0x03D0:
                  pNv->PMC[0x1700/4] = pNv->PFB[0x020C/4];
                  pNv->PMC[0x1704/4] = 0;
                  pNv->PMC[0x1708/4] = 0;
@@ -1286,7 +1290,8 @@
               if(((pNv->Chipset & 0xfff0) == 0x0090) ||
                  ((pNv->Chipset & 0xfff0) == 0x01D0) ||
                  ((pNv->Chipset & 0xfff0) == 0x0290) ||
-                 ((pNv->Chipset & 0xfff0) == 0x0390))
+                 ((pNv->Chipset & 0xfff0) == 0x0390) ||
+                 ((pNv->Chipset & 0xfff0) == 0x03D0))
               {
                  for(i = 0; i < 60; i++) {
                    pNv->PGRAPH[(0x0D00/4) + i] = pNv->PFB[(0x0600/4) + i];
Index: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/nv/riva_driver.c:1.9 xc/programs/Xserver/hw/xfree86/drivers/nv/riva_driver.c:1.11
--- xc/programs/Xserver/hw/xfree86/drivers/nv/riva_driver.c:1.9	Thu Mar 16 11:50:12 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/nv/riva_driver.c	Tue Jan 23 13:03:05 2007
@@ -23,7 +23,7 @@
 /* Hacked together from mga driver and 3.3.4 NVIDIA driver by Jarno Paananen
    <jpaana@s2.org> */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_driver.c,v 1.9 2006/03/16 16:50:12 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_driver.c,v 1.11 2007/01/23 18:03:05 tsi Exp $ */
 
 #include "riva_include.h"
 
@@ -34,8 +34,8 @@
  */
 /* Mandatory functions */
 static Bool    RivaPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool    RivaScreenInit(int Index, ScreenPtr pScreen, int argc,
-                            char **argv);
+static Bool    RivaScreenInit(int Index, ScreenPtr pScreen,
+                              const int argc, const char **argv);
 static Bool    RivaEnterVT(int scrnIndex, int flags);
 static Bool    RivaEnterVTFBDev(int scrnIndex, int flags);
 static void    RivaLeaveVT(int scrnIndex, int flags);
@@ -1113,7 +1113,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-RivaScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+RivaScreenInit(int scrnIndex, ScreenPtr pScreen,
+               const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     vgaHWPtr hwp;
Index: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c:1.52 xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c:1.53
--- xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c:1.52	Mon Nov  3 00:11:26 2003
+++ xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c	Mon Apr  9 11:37:16 2007
@@ -36,7 +36,7 @@
 |*     those rights set forth herein.                                        *|
 |*                                                                           *|
  \***************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c,v 1.52 2003/11/03 05:11:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/nv/riva_hw.c,v 1.53 2007/04/09 15:37:16 tsi Exp $ */
 
 #include "riva_local.h"
 #include "compiler.h"
@@ -655,7 +655,7 @@
     int		   flags 
 )
 {
-    int pixelDepth, VClk, m, n, p;
+    int pixelDepth, VClk = 0, m = 0, n = 0, p = 0;
     /*
      * Save mode parameters.
      */
Index: xc/programs/Xserver/hw/xfree86/drivers/pnozz/Imakefile
diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/pnozz/Imakefile:1.1
--- /dev/null	Sun Aug 12 22:02:22 2007
+++ xc/programs/Xserver/hw/xfree86/drivers/pnozz/Imakefile	Wed Mar 14 22:11:36 2007
@@ -0,0 +1,37 @@
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/drivers/pnozz/Imakefile,v 1.1 2007/03/15 02:11:36 tsi Exp $
+XCOMM
+XCOMM This is an Imakefile for the pnozz driver.
+XCOMM
+XCOMM $NetBSD: Imakefile,v 1.1 2005/07/04 21:24:58 macallan Exp $
+
+#define IHaveModules
+#include <Server.tmpl>
+
+SRCS = pnozz_driver.c pnozz_cursor.c pnozz_accel.c
+OBJS = pnozz_driver.o pnozz_cursor.o pnozz_accel.o
+
+#if defined(XF86DriverSDK)
+INCLUDES = -I../../include
+#else
+INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) \
+           -I$(SERVERSRC)/fb -I$(SERVERSRC)/mi \
+           -I$(SERVERSRC)/Xext -I$(SERVERSRC)/render \
+	   -I$(XF86SRC)/ramdac -I$(XF86SRC)/xaa \
+           -I$(SERVERSRC)/include
+#endif
+
+#if MakeHasPosixVariableSubstitutions
+SubdirLibraryRule($(OBJS))
+#endif
+
+ModuleObjectRule()
+
+ObjectModuleTarget(pnozz,$(OBJS),drivers)
+
+InstallObjectModule(pnozz,$(MODULEDIR),drivers)
+
+#if !defined(XF86DriverSDK)
+InstallModuleManPage(pnozz)
+#endif
+
+DependTarget()
Index: xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz.h
diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz.h:1.1
--- /dev/null	Sun Aug 12 22:02:22 2007
+++ xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz.h	Wed Mar 14 22:11:36 2007
@@ -0,0 +1,90 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz.h,v 1.1 2007/03/15 02:11:36 tsi Exp $ */
+/*
+ * SBus Weitek P9100 driver - defines
+ *
+ * Copyright (C) 2005 Michael Lorenz
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * MICHAEL LORENZ BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+/* $NetBSD: pnozz.h,v 1.4 2006/02/27 18:19:53 macallan Exp $ */
+
+#ifndef PNOZZ_H
+#define PNOZZ_H
+
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86_ansic.h"
+#include "xf86RamDac.h"
+#include <X11/Xmd.h>
+#include "gcstruct.h"
+#include "pnozz_regs.h"
+#include "xf86sbusBus.h"
+#include "xaa.h"
+
+typedef struct {
+	unsigned char	*fb;	/* 2MB framebuffer */
+	unsigned char	*fbc;	/* registers, so we can just add a byte offset */
+	int		vclipmax;
+	int		width;
+	int		height, scanlinesize, maxheight;
+	int		depthshift;
+
+	sbusDevicePtr	psdp;
+	Bool		HWCursor;
+	Bool		NoAccel;
+	CloseScreenProcPtr CloseScreen;
+
+	xf86CursorInfoPtr CursorInfoRec;
+	int		fg, bg, enabled, x, y;
+
+	OptionInfoPtr	Options;
+
+	volatile CARD32	Scratch;
+	XAAInfoRecPtr	pXAA;
+	CARD32		MaxClip;
+	unsigned char	*buffers[2];
+	/*
+	 * XXX this is enough for everything a SPARCbook could do on it's
+	 * internal display but not necessarily for an external one
+	 */
+	CARD32		Buffer[6400];
+	int		words, last_word;
+	int		offset_mask;
+
+	int		DidSave;
+	unsigned int	SvSysConf;	/* System Configuration Register */
+	unsigned int	CRTC[4];	/* CRTC values for horizontal timing */
+	unsigned int	SvMemCtl;	/* memory control register */
+	unsigned char	SvDAC_MCCR;	/* DAC Misc Clock Ctrl (0x02) */
+	unsigned char	SvDAC_PF;	/* DAC Pixel Format (0x0a) */
+	unsigned char	SvDAC_MC3;	/* DAC Misc Control 3 */
+	unsigned char	SvVCO;		/* DAC System PLL VCO divider */
+	unsigned char	SvPLL;		/* clock multiplier / divider */
+
+} PnozzRec, *PnozzPtr;
+
+#define GET_PNOZZ_FROM_SCRN(p)    ((p->driverPrivate))
+
+void pnozz_write_4(PnozzPtr, int, unsigned int);
+unsigned int pnozz_read_4(PnozzPtr, int);
+
+int PnozzAccelInit(ScrnInfoPtr);
+void PnozzHideCursor(ScrnInfoPtr);
+extern Bool PnozzHWCursorInit(ScreenPtr pScreen);
+
+#endif /* CG6_H */
Index: xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz.man
diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz.man:1.1
--- /dev/null	Sun Aug 12 22:02:22 2007
+++ xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz.man	Wed Mar 14 22:11:36 2007
@@ -0,0 +1,31 @@
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz.man,v 1.1 2007/03/15 02:11:36 tsi Exp $
+.\" $NetBSD: pnozz.man,v 1.1 2005/07/04 21:24:58 macallan Exp $ 
+.\" shorthand for double quote that works everywhere.
+.ds q \N'34'
+.TH PNOZZ __drivermansuffix__ __vendorversion__
+.SH NAME
+pnozz \- Weitek P9100 SBus driver
+.SH SYNOPSIS
+.nf
+.B "Section \*qDevice\*q"
+.BI "  Identifier \*q"  devname \*q
+.B  "  Driver \*qpnozz\*q"
+\ \ ...
+.B EndSection
+.fi
+.SH DESCRIPTION
+.B pnozz
+is an XFree86 driver for Weitek POWER 9100 graphics controllers found in SPARCbook 3GX and other models.
+THIS MAN PAGE NEEDS TO BE FILLED IN.
+.SH SUPPORTED HARDWARE
+The
+.B pnozz
+driver supports...
+.SH CONFIGURATION DETAILS
+Please refer to XF86Config(__filemansuffix__) for general configuration
+details.  This section only covers configuration details specific to this
+driver.
+.SH "SEE ALSO"
+XFree86(1), XF86Config(__filemansuffix__), xf86config(1), Xserver(1), X(__miscmansuffix__)
+.SH AUTHORS
+Authors include: Michael Lorenz <macallan@netbsd.org>
Index: xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_accel.c
diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_accel.c:1.1
--- /dev/null	Sun Aug 12 22:02:22 2007
+++ xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_accel.c	Wed Mar 14 22:11:36 2007
@@ -0,0 +1,492 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_accel.c,v 1.1 2007/03/15 02:11:36 tsi Exp $ */
+/*
+ * SBus Weitek P9100 hardware cursor support
+ *
+ * Copyright (C) 2005 Michael Lorenz
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * MICHAEL LORENZ BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+/* $NetBSD: pnozz_accel.c,v 1.7 2006/02/28 00:32:53 macallan Exp $ */
+
+#include "pnozz.h"
+
+static CARD32 PnozzCopyROP[] = {
+	/*GXclear*/		0,
+	/*GXand*/		ROP_SRC & ROP_DST,
+	/*GXandReverse*/	ROP_SRC & (~ROP_DST),
+	/*GXcopy*/		ROP_SRC,
+	/*GXandInverted*/	(~ROP_SRC) & ROP_DST,
+	/*GXnoop*/		ROP_DST,
+	/*GXxor*/		ROP_SRC ^ ROP_DST,
+	/*GXor*/		ROP_SRC | ROP_DST,
+	/*GXnor*/		(~ROP_SRC) & (~ROP_DST),
+	/*GXequiv*/		(~ROP_SRC) ^ ROP_DST,
+	/*GXinvert*/		(~ROP_DST),
+	/*GXorReverse*/		ROP_SRC | (~ROP_DST),
+	/*GXcopyInverted*/	(~ROP_SRC),
+	/*GXorInverted*/	(~ROP_SRC) | ROP_DST,
+	/*GXnand*/		(~ROP_SRC) | (~ROP_DST),
+	/*GXset*/		ROP_SET
+};
+
+static CARD32 PnozzDrawROP[] = {
+	/*GXclear*/		0,
+	/*GXand*/		ROP_PAT & ROP_DST,
+	/*GXandReverse*/	ROP_PAT & (~ROP_DST),
+	/*GXcopy*/		ROP_PAT,
+	/*GXandInverted*/	(~ROP_PAT) & ROP_DST,
+	/*GXnoop*/		ROP_DST,
+	/*GXxor*/		ROP_PAT ^ ROP_DST,
+	/*GXor*/		ROP_PAT | ROP_DST,
+	/*GXnor*/		(~ROP_PAT) & (~ROP_DST),
+	/*GXequiv*/		(~ROP_PAT) ^ ROP_DST,
+	/*GXinvert*/		(~ROP_DST),
+	/*GXorReverse*/		ROP_PAT | (~ROP_DST),
+	/*GXcopyInverted*/	(~ROP_PAT),
+	/*GXorInverted*/	(~ROP_PAT) | ROP_DST,
+	/*GXnand*/		(~ROP_PAT) | (~ROP_DST),
+	/*GXset*/		ROP_PAT
+};
+
+static void
+PnozzSync(ScrnInfoPtr pScrn)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+    while((pnozz_read_4(pPnozz, ENGINE_STATUS) &
+	(ENGINE_BUSY | BLITTER_BUSY)) !=0 );
+}
+
+/*
+ * Both the framebuffer and the colour registers are apparently little endian.
+ * For framebuffer accesses we can just turn on byte swapping, for the colour
+ * registers we need to juggle bytes ourselves.
+ */
+
+static void
+pnozz_write_colour(PnozzPtr pPnozz, int reg, CARD32 colour)
+{
+    CARD32 c2;
+
+    switch(pPnozz->depthshift)
+    {
+	case 0:
+	    c2 = (colour << 8 | colour);
+	    pnozz_write_4(pPnozz, reg, c2 << 16 | c2);
+	    break;
+	case 1:
+	    c2 = ((colour & 0xff) << 8) | ((colour & 0xff00) >> 8);
+	    c2 |= c2 << 16;
+	    pnozz_write_4(pPnozz, reg, c2);
+	    break;
+	case 2:
+	    c2 = ((colour & 0x00ff00ff) << 8) | ((colour & 0xff00ff00) >> 8);
+	    c2 = (( c2 & 0xffff0000) >> 16) | ((c2 & 0x0000ffff) << 16);
+	    pnozz_write_4(pPnozz, reg, c2);
+	    break;
+    }
+}
+
+static void unClip(PnozzPtr pPnozz)
+{
+    pnozz_write_4(pPnozz, WINDOW_OFFSET, 0);
+    pnozz_write_4(pPnozz, WINDOW_MIN, 0);
+    pnozz_write_4(pPnozz, WINDOW_MAX, pPnozz->MaxClip);
+    pnozz_write_4(pPnozz, BYTE_CLIP_MIN, 0);
+    pnozz_write_4(pPnozz, BYTE_CLIP_MAX, pPnozz->MaxClip);
+}
+
+static void
+PnozzInitEngine(PnozzPtr pPnozz)
+{
+    unClip(pPnozz);
+    pnozz_write_4(pPnozz, DRAW_MODE, 0);
+    pnozz_write_4(pPnozz, PLANE_MASK, 0xffffffff);
+    pnozz_write_4(pPnozz, PATTERN0, 0xffffffff);
+    pnozz_write_4(pPnozz, PATTERN1, 0xffffffff);
+    pnozz_write_4(pPnozz, PATTERN2, 0xffffffff);
+    pnozz_write_4(pPnozz, PATTERN3, 0xffffffff);
+}
+
+static void
+PnozzSetupForScreenToScreenCopy(
+    ScrnInfoPtr  pScrn,
+    int          xdir,
+    int          ydir,
+    int          rop,
+    unsigned int planemask,
+    int          TransparencyColour
+)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+    PnozzSync(pScrn);
+
+    pnozz_write_4(pPnozz, RASTER_OP, (PnozzCopyROP[rop] & 0xff));
+    pnozz_write_4(pPnozz, PLANE_MASK, planemask);
+}
+
+/*
+ * the drawing engine is weird. Even though BLIT and QUAD commands use the
+ * same registers to program coordinates there's an important difference -
+ * horizontal coordinates for QUAD commands are in pixels, for BLIT commands
+ * and the clipping registers they're IN BYTES.
+ */
+static void
+PnozzSubsequentScreenToScreenCopy
+(
+    ScrnInfoPtr pScrn,
+    int         xSrc,
+    int         ySrc,
+    int         xDst,
+    int         yDst,
+    int         w,
+    int         h
+)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+    CARD32 src, dst, srcw, dstw;
+
+    src = (((xSrc << pPnozz->depthshift) & 0x1fff) << 16) | (ySrc & 0x1fff);
+    dst = (((xDst << pPnozz->depthshift) & 0x1fff) << 16) | (yDst & 0x1fff);
+    srcw = ((((xSrc + w) << pPnozz->depthshift) - 1) << 16) |
+	((ySrc + h - 1) & 0x1fff);
+    dstw = ((((xDst + w) << pPnozz->depthshift) - 1) << 16) |
+	((yDst + h - 1) & 0x1fff);
+
+    PnozzSync(pScrn);
+
+    pnozz_write_4(pPnozz, ABS_XY0, src);
+    pnozz_write_4(pPnozz, ABS_XY1, srcw);
+    pnozz_write_4(pPnozz, ABS_XY2, dst);
+    pnozz_write_4(pPnozz, ABS_XY3, dstw);
+    pPnozz->Scratch = pnozz_read_4(pPnozz, COMMAND_BLIT);
+}
+
+static void
+PnozzSetupForSolidFill
+(
+    ScrnInfoPtr  pScrn,
+    int          colour,
+    int          rop,
+    unsigned int planemask
+)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    PnozzSync(pScrn);
+
+    pnozz_write_colour(pPnozz, FOREGROUND_COLOR, colour);
+    pnozz_write_4(pPnozz, RASTER_OP, PnozzDrawROP[rop] & 0xff);
+    pnozz_write_4(pPnozz, PLANE_MASK, planemask);
+    pnozz_write_4(pPnozz, COORD_INDEX, 0);
+}
+
+static void
+PnozzSubsequentSolidFillRect
+(
+    ScrnInfoPtr pScrn,
+    int         x,
+    int         y,
+    int         w,
+    int         h
+)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    PnozzSync(pScrn);
+    pnozz_write_4(pPnozz, RECT_RTW_XY, ((x & 0x1fff) << 16) |
+	(y & 0x1fff));
+    pnozz_write_4(pPnozz, RECT_RTP_XY, (((w & 0x1fff) << 16) |
+	(h & 0x1fff)));
+    pPnozz->Scratch = pnozz_read_4(pPnozz, COMMAND_QUAD);
+}
+
+static void
+PnozzSetupForCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
+			int fg, int bg,
+			int rop,
+			unsigned int planemask)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    PnozzSync(pScrn);
+
+    if (bg == -1) {
+	/* transparent */
+	pnozz_write_colour(pPnozz, FOREGROUND_COLOR, fg);
+	pnozz_write_4(pPnozz, RASTER_OP, PnozzDrawROP[rop] | ROP_PIX1_TRANS);
+    } else {
+	/*
+	 * this doesn't make any sense to me either, but for some reason the
+	 * chip applies the foreground colour to 0 pixels and background to 1
+	 * when set to this sort of ROP. The old XF 3.3 driver source claimed
+	 * that the chip doesn't support opaque colour expansion at all.
+	 */
+	pnozz_write_colour(pPnozz, FOREGROUND_COLOR, bg);
+	pnozz_write_colour(pPnozz, BACKGROUND_COLOR, fg);
+
+	pnozz_write_4(pPnozz, RASTER_OP, PnozzCopyROP[rop] & 0xff);
+    }
+
+    pnozz_write_4(pPnozz, PLANE_MASK, planemask);
+    pnozz_write_4(pPnozz, COORD_INDEX, 0);
+}
+
+static void
+PnozzSubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn,
+			int x, int y, int w, int h,
+			int skipleft )
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+    CARD32 rest = w & 0x1f;
+
+    pnozz_write_4(pPnozz, ABS_X0, x);
+    pnozz_write_4(pPnozz, ABS_XY1, (x << 16) | (y & 0xFFFFL));
+    pnozz_write_4(pPnozz, ABS_X2, (x + w));
+    pnozz_write_4(pPnozz, ABS_Y3, 1);
+
+    pPnozz->words = (w >> 5);	/* whole words to write */
+
+    if (rest > 0) {
+	pPnozz->last_word = (rest - 1) << 2;
+    } else
+	pPnozz->last_word = -1;
+}
+
+static void
+PnozzSubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+#define PIXEL_1_FULL (PIXEL_1 + (31 << 2))
+    CARD32 *buf;
+    volatile CARD32 *pix = ((volatile CARD32 *)(pPnozz->fbc + PIXEL_1_FULL));
+    int i = 0;
+
+    PnozzSync(pScrn);
+    buf = (CARD32 *)pPnozz->buffers[bufno];
+    pPnozz->Scratch = *(volatile CARD32 *)(pPnozz->fb + PIXEL_1_FULL);
+    for (i = 0; i < pPnozz->words; i++)
+	*pix = buf[i];
+    if (pPnozz->last_word >= 0)
+	*(volatile CARD32 *)(pPnozz->fbc + PIXEL_1 + pPnozz->last_word) =
+	    buf[i];
+}
+
+static void
+PnozzSetupForSolidLine(ScrnInfoPtr pScrn, int color, int rop,
+    unsigned int planemask)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    PnozzSync(pScrn);
+
+    pnozz_write_colour(pPnozz, FOREGROUND_COLOR, color);
+    pnozz_write_4(pPnozz, RASTER_OP, (PnozzDrawROP[rop] & 0xff) | ROP_OVERSIZE);
+
+    pnozz_write_4(pPnozz, PLANE_MASK, planemask);
+    pnozz_write_4(pPnozz, COORD_INDEX, 0);
+
+}
+
+static void
+PnozzSubsequentSolidTwoPointLine(ScrnInfoPtr pScrn, int x1, int y1, int x2,
+    int y2, int flags)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    PnozzSync(pScrn);
+
+    /*
+     * XXX we're blatantly ignoring the flags parameter which could tell us not
+     * to draw the last point. Xsun simply reads it from the framebuffer and
+     * puts it back after drawing the line but that would mean we have to wait
+     * until the line is actually drawn. On the other hand - line drawing is
+     * pretty fast so we won't lose too much speed
+     */
+    pnozz_write_4(pPnozz, LINE_RTW_XY, (x1 << 16) | y1);
+    pnozz_write_4(pPnozz, LINE_RTW_XY, (x2 << 16) | y2);
+    pPnozz->Scratch = pnozz_read_4(pPnozz, COMMAND_QUAD);
+}
+
+static void
+PnozzSetupForMono8x8PatternFill(ScrnInfoPtr pScrn, int pat0, int pat1,
+	int fg, int bg, int rop, unsigned int planemask)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+    CARD32 pat;
+
+    PnozzSync(pScrn);
+
+    if (bg == -1) {
+	pnozz_write_4(pPnozz, RASTER_OP,
+	    (PnozzDrawROP[rop] & 0xff) | ROP_NO_SOLID | ROP_TRANS);
+    } else {
+	pnozz_write_colour(pPnozz, COLOR_0, bg);
+	pnozz_write_4(pPnozz, RASTER_OP,
+	    (PnozzDrawROP[rop] & 0xff) | ROP_NO_SOLID);
+    }
+    pnozz_write_colour(pPnozz, COLOR_1, fg);
+    pnozz_write_4(pPnozz, PLANE_MASK, planemask);
+    pat = (pat0 & 0xff000000) | ((pat0 >> 8) & 0x00ffff00) |
+	((pat0 >> 16) & 0x000000ff);
+    pnozz_write_4(pPnozz, PATTERN0, pat);
+    pat = ((pat0 << 8) & 0x00ffff00) | ((pat0 << 16) & 0xff000000) |
+	(pat0 & 0x000000ff);
+    pnozz_write_4(pPnozz, PATTERN1, pat);
+    pat = (pat1 & 0xff000000) | ((pat1 >> 8) & 0x00ffff00) |
+	((pat1 >> 16) & 0x000000ff);
+    pnozz_write_4(pPnozz, PATTERN2, pat);
+    pat = ((pat1 << 8) & 0x00ffff00) | ((pat1 << 16) & 0xff000000) |
+	(pat1 & 0x000000ff);
+    pnozz_write_4(pPnozz, PATTERN3, pat);
+    pnozz_write_4(pPnozz, COORD_INDEX, 0);
+}
+
+static void
+PnozzSubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn,
+		int patx, int paty, int x, int y, int w, int h)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    PnozzSync(pScrn);
+    pnozz_write_4(pPnozz, PATTERN_ORIGIN_X, patx);
+    pnozz_write_4(pPnozz, PATTERN_ORIGIN_Y, paty);
+    pnozz_write_4(pPnozz, RECT_RTW_XY, ((x & 0x1fff) << 16) |
+	(y & 0x1fff));
+    pnozz_write_4(pPnozz, RECT_RTP_XY, (((w & 0x1fff) << 16) |
+	(h & 0x1fff)));
+    pPnozz->Scratch = pnozz_read_4(pPnozz, COMMAND_QUAD);
+
+}
+
+static void
+PnozzSetClippingRectangle(ScrnInfoPtr pScrn, int left, int top, int right,
+			 int bottom)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+    CARD32 cmin, cmax;
+
+    cmin = ((left << pPnozz->depthshift) << 16) | top;
+    cmax = ((right << pPnozz->depthshift) << 16) | bottom;
+
+/*    pnozz_write_4(pPnozz, WINDOW_MIN, 0);
+    pnozz_write_4(pPnozz, WINDOW_MAX, pPnozz->MaxClip);*/
+    pnozz_write_4(pPnozz, BYTE_CLIP_MIN, cmin);
+    pnozz_write_4(pPnozz, BYTE_CLIP_MAX, cmax);
+}
+
+static void
+PnozzDisableClipping(ScrnInfoPtr pScrn)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    pnozz_write_4(pPnozz, WINDOW_MIN, 0);
+    pnozz_write_4(pPnozz, WINDOW_MAX, pPnozz->MaxClip);
+    pnozz_write_4(pPnozz, BYTE_CLIP_MIN, 0);
+    pnozz_write_4(pPnozz, BYTE_CLIP_MAX, pPnozz->MaxClip);
+}
+
+/*
+ * TODO:
+ * - CPU to VRAM colour blits
+ * - DGA support
+ */
+
+int
+PnozzAccelInit(ScrnInfoPtr pScrn)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+    XAAInfoRecPtr pXAAInfo = pPnozz->pXAA;
+
+    pXAAInfo->Flags = LINEAR_FRAMEBUFFER | PIXMAP_CACHE | OFFSCREEN_PIXMAPS;
+    pXAAInfo->maxOffPixWidth = pPnozz->width;
+    pXAAInfo->maxOffPixHeight = pPnozz->maxheight;
+    pPnozz->MaxClip =
+	((pPnozz->scanlinesize & 0xffff) << 16) | (pPnozz->maxheight);
+
+    PnozzInitEngine(pPnozz);
+
+#if 1
+    {
+	CARD32 src, srcw;
+	src = 0;
+	srcw = pPnozz->width << 16 | pPnozz->height;
+
+	/* Blit the screen black. For aesthetic reasons. */
+
+	PnozzSync(pScrn);
+	pnozz_write_4(pPnozz, FOREGROUND_COLOR, 0x00000000);
+	pnozz_write_4(pPnozz, BACKGROUND_COLOR, 0xffffffff);
+	pnozz_write_4(pPnozz, RASTER_OP, ROP_PAT);
+	pnozz_write_4(pPnozz, COORD_INDEX, 0);
+	pnozz_write_4(pPnozz, RECT_RTW_XY, src);
+	pnozz_write_4(pPnozz, RECT_RTW_XY, srcw);
+	pPnozz->Scratch = pnozz_read_4(pPnozz, COMMAND_QUAD);
+	PnozzSync(pScrn);
+    }
+#endif
+
+    /* Sync */
+    pXAAInfo->Sync = PnozzSync;
+
+    /* Screen-to-screen copy */
+    pXAAInfo->ScreenToScreenCopyFlags = NO_TRANSPARENCY;
+    pXAAInfo->SetupForScreenToScreenCopy = PnozzSetupForScreenToScreenCopy;
+    pXAAInfo->SubsequentScreenToScreenCopy =
+	PnozzSubsequentScreenToScreenCopy;
+
+    /* Solid fills */
+    pXAAInfo->SetupForSolidFill = PnozzSetupForSolidFill;
+    pXAAInfo->SubsequentSolidFillRect = PnozzSubsequentSolidFillRect;
+
+    /* colour expansion */
+    pXAAInfo->ScanlineCPUToScreenColorExpandFillFlags =
+	/* LEFT_EDGE_CLIPPING | */
+	SCANLINE_PAD_DWORD;
+    pXAAInfo->NumScanlineColorExpandBuffers = 2;
+    pPnozz->buffers[0] = (unsigned char *)pPnozz->Buffer;
+    pPnozz->buffers[1] = (unsigned char *)&pPnozz->Buffer[pPnozz->scanlinesize];
+    pXAAInfo->ScanlineColorExpandBuffers = pPnozz->buffers;
+    pXAAInfo->SetupForScanlineCPUToScreenColorExpandFill =
+	PnozzSetupForCPUToScreenColorExpandFill;
+    pXAAInfo->SubsequentScanlineCPUToScreenColorExpandFill =
+	PnozzSubsequentScanlineCPUToScreenColorExpandFill;
+    pXAAInfo->SubsequentColorExpandScanline =
+	PnozzSubsequentColorExpandScanline;
+
+    /* line drawing */
+    pXAAInfo->SetupForSolidLine = PnozzSetupForSolidLine;
+    pXAAInfo->SubsequentSolidTwoPointLine = PnozzSubsequentSolidTwoPointLine;
+    pXAAInfo->SolidLineFlags = BIT_ORDER_IN_BYTE_MSBFIRST;
+
+    /* clipping */
+    pXAAInfo->SetClippingRectangle = PnozzSetClippingRectangle;
+    pXAAInfo->DisableClipping = PnozzDisableClipping;
+    pXAAInfo->ClippingFlags = HARDWARE_CLIP_SCREEN_TO_SCREEN_COPY |
+	HARDWARE_CLIP_SOLID_FILL |
+	HARDWARE_CLIP_MONO_8x8_FILL |
+	/*HARDWARE_CLIP_COLOR_8x8_FILL |*/
+	HARDWARE_CLIP_SOLID_LINE;
+
+    /* 8x8 mono pattern fills */
+    pXAAInfo->Mono8x8PatternFillFlags = HARDWARE_PATTERN_PROGRAMMED_BITS |
+	HARDWARE_PATTERN_SCREEN_ORIGIN | HARDWARE_PATTERN_PROGRAMMED_ORIGIN;
+    pXAAInfo->SetupForMono8x8PatternFill = PnozzSetupForMono8x8PatternFill;
+    pXAAInfo->SubsequentMono8x8PatternFillRect =
+	PnozzSubsequentMono8x8PatternFillRect;
+    return 0;
+}
Index: xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_cursor.c
diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_cursor.c:1.1
--- /dev/null	Sun Aug 12 22:02:22 2007
+++ xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_cursor.c	Wed Mar 14 22:11:36 2007
@@ -0,0 +1,126 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_cursor.c,v 1.1 2007/03/15 02:11:36 tsi Exp $ */
+/*
+ * SBus Weitek P9100 hardware cursor support
+ *
+ * Copyright (C) 2005 Michael Lorenz
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * MICHAEL LORENZ BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+/* $NetBSD: pnozz_cursor.c,v 1.3 2005/11/12 23:32:12 macallan Exp $ */
+
+#include "pnozz.h"
+
+/*
+ * All of this should probably be moved down to the common layer, or some
+ * generic SBUS module.
+ */
+
+static void PnozzLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src);
+static void PnozzSetCursorPosition(ScrnInfoPtr pScrn, int x, int y);
+static void PnozzSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg);
+
+static void
+PnozzLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    xf86SbusSetOsHwCursorImage(pPnozz->psdp, src, src + 0x200);
+}
+
+static void
+PnozzShowCursor(ScrnInfoPtr pScrn)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    if (pPnozz->enabled == 0) {
+	pPnozz->enabled = 1;
+	xf86SbusSetOsHwCursor(pPnozz->psdp, TRUE);
+    }
+}
+
+void
+PnozzHideCursor(ScrnInfoPtr pScrn)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    if (pPnozz->enabled == 1) {
+	pPnozz->enabled = 0;
+	xf86SbusSetOsHwCursor(pPnozz->psdp, FALSE);
+    }
+}
+
+static void
+PnozzSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    x += 63;
+    y += 63;
+
+    if ((x != pPnozz->x) || (y != pPnozz->y)) {
+	pPnozz->x = x;
+	pPnozz->y = y;
+	xf86SbusSetOsHwCursorPosition(pPnozz->psdp, x, y);
+    }
+}
+
+static void
+PnozzSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
+{
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    if ((bg != pPnozz->bg) || (fg != pPnozz->bg)) {
+	pPnozz->bg = bg;
+	pPnozz->fg = fg;
+	xf86SbusSetOsHwCursorCmap(pPnozz->psdp, bg, fg);
+    }
+}
+
+Bool
+PnozzHWCursorInit(ScreenPtr pScreen)
+{
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    PnozzPtr pPnozz;
+    xf86CursorInfoPtr infoPtr;
+
+    pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    infoPtr = xf86CreateCursorInfoRec();
+    if(!infoPtr) return FALSE;
+
+    pPnozz->CursorInfoRec = infoPtr;
+
+    infoPtr->MaxWidth = 64;
+    infoPtr->MaxHeight = 64;
+
+    xf86SbusSetOsHwCursorHotSpot(pPnozz->psdp, 63, 63);
+
+    infoPtr->Flags = HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
+	HARDWARE_CURSOR_TRUECOLOR_AT_8BPP /* |
+	HARDWARE_CURSOR_BIT_ORDER_MSBFIRST |
+	HARDWARE_CURSOR_NIBBLE_SWAPPED */ ;
+
+    infoPtr->SetCursorColors = PnozzSetCursorColors;
+    infoPtr->SetCursorPosition = PnozzSetCursorPosition;
+    infoPtr->LoadCursorImage = PnozzLoadCursorImage;
+    infoPtr->HideCursor = PnozzHideCursor;
+    infoPtr->ShowCursor = PnozzShowCursor;
+    infoPtr->UseHWCursor = NULL;
+
+    return xf86InitCursor(pScreen, infoPtr);
+}
Index: xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_driver.c
diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_driver.c:1.1
--- /dev/null	Sun Aug 12 22:02:22 2007
+++ xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_driver.c	Wed Mar 14 22:11:36 2007
@@ -0,0 +1,1136 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_driver.c,v 1.1 2007/03/15 02:11:36 tsi Exp $ */
+/*
+ * SBus Weitek P9100 driver
+ *
+ * Copyright (C) 2005, 2006 Michael Lorenz
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * MICHAEL LORENZ BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+/* $NetBSD: pnozz_driver.c,v 1.5 2006/02/27 18:19:53 macallan Exp $ */
+
+/*
+ * this driver has been tested on SPARCbook 3GX and 3TX, it supports full
+ * acceleration in 8, 16 and 24 bit colour
+ */
+
+#include "xf86.h"
+#include "xf86_OSproc.h"
+#include "xf86_ansic.h"
+
+#include "xf86Version.h"
+#include "xf86Resources.h"
+#include "xf86sbusBus.h"
+
+#include "mipointer.h"
+#include "mibstore.h"
+#include "micmap.h"
+
+#define DEBUG 0
+
+#include "fb.h"
+#include "xf86cmap.h"
+#include "pnozz.h"
+
+static const OptionInfoRec * PnozzAvailableOptions(int chipid, int busid);
+static void	PnozzIdentify(int flags);
+static Bool	PnozzProbe(DriverPtr drv, int flags);
+static Bool	PnozzPreInit(ScrnInfoPtr pScrn, int flags);
+static Bool	PnozzScreenInit(int Index, ScreenPtr pScreen, int argc,
+				const char **argv);
+static Bool	PnozzEnterVT(int scrnIndex, int flags);
+static void	PnozzLeaveVT(int scrnIndex, int flags);
+static Bool	PnozzCloseScreen(int scrnIndex, ScreenPtr pScreen);
+static Bool	PnozzSaveScreen(ScreenPtr pScreen, int mode);
+
+/* Required if the driver supports mode switching */
+static Bool	PnozzSwitchMode(int scrnIndex, DisplayModePtr mode, int flags);
+/* Required if the driver supports moving the viewport */
+static void	PnozzAdjustFrame(int scrnIndex, int x, int y, int flags);
+
+/* Optional functions */
+static void	PnozzFreeScreen(int scrnIndex, int flags);
+static ModeStatus PnozzValidMode(int scrnIndex, DisplayModePtr mode,
+			       Bool verbose, int flags);
+
+static void PnozzSave(PnozzPtr);
+static void PnozzRestore(PnozzPtr);
+static int PnozzSetDepth(PnozzPtr, int);	/* return true or false */
+
+#define VERSION 4000
+#define PNOZZ_NAME "p9100"
+#define PNOZZ_DRIVER_NAME "pnozz"
+#define PNOZZ_MAJOR_VERSION 1
+#define PNOZZ_MINOR_VERSION 0
+#define PNOZZ_PATCHLEVEL 0
+
+/*
+ * This contains the functions needed by the server after loading the driver
+ * module.  It must be supplied, and gets passed back by the SetupProc
+ * function in the dynamic case.  In the static case, a reference to this
+ * is compiled in, and this requires that the name of this DriverRec be
+ * an upper-case version of the driver name.
+ */
+
+DriverRec PNOZZ = {
+    VERSION,
+    PNOZZ_DRIVER_NAME,
+    PnozzIdentify,
+    PnozzProbe,
+    PnozzAvailableOptions,
+    NULL,
+    0
+};
+
+typedef enum {
+    OPTION_SW_CURSOR,
+    OPTION_HW_CURSOR,
+    OPTION_NOACCEL
+} PnozzOpts;
+
+static const OptionInfoRec PnozzOptions[] = {
+    { OPTION_SW_CURSOR,		"SWcursor",	OPTV_BOOLEAN,	{0}, FALSE },
+    { OPTION_HW_CURSOR,		"HWcursor",	OPTV_BOOLEAN,	{0}, FALSE },
+    { OPTION_NOACCEL,		"NoAccel",	OPTV_BOOLEAN,	{0}, FALSE },
+    { -1,			NULL,		OPTV_NONE,	{0}, FALSE }
+};
+
+static const char *ramdacSymbols[] = {
+    "xf86CreateCursorInfoRec",
+    "xf86DestroyCursorInfoRec",
+    "xf86InitCursor",
+    NULL
+};
+
+static const char *fbSymbols[] = {
+    "fbScreenInit",
+    "fbPictureInit",
+    NULL
+};
+
+static const char *xaaSymbols[] =
+{
+    "XAACreateInfoRec",
+    "XAADestroyInfoRec",
+    "XAAInit",
+    NULL
+};
+
+#ifdef XFree86LOADER
+
+static MODULESETUPPROTO(PnozzSetup);
+
+static XF86ModuleVersionInfo PnozzVersRec =
+{
+	"pnozz",
+	MODULEVENDORSTRING,
+	MODINFOSTRING1,
+	MODINFOSTRING2,
+	XF86_VERSION_CURRENT,
+	PNOZZ_MAJOR_VERSION, PNOZZ_MINOR_VERSION, PNOZZ_PATCHLEVEL,
+	ABI_CLASS_VIDEODRV,
+	ABI_VIDEODRV_VERSION,
+	MOD_CLASS_VIDEODRV,
+	{0, 0, 0, 0}
+};
+
+XF86ModuleData pnozzModuleData = { &PnozzVersRec, PnozzSetup, NULL };
+
+static pointer
+PnozzSetup(ModuleDescPtr module, pointer opts, int *errmaj, int *errmin)
+{
+    static Bool setupDone = FALSE;
+
+    if (!setupDone) {
+	setupDone = TRUE;
+	xf86AddDriver(&PNOZZ, module, 0);
+
+	LoaderModRefSymLists(module,
+			     xaaSymbols,
+			     ramdacSymbols,
+			     fbSymbols,
+			     NULL);
+	/*
+	 * Modules that this driver always requires can be loaded here
+	 * by calling LoadSubModule().
+	 */
+
+	/*
+	 * The return value must be non-NULL on success even though there
+	 * is no TearDownProc.
+	 */
+	return (pointer)TRUE;
+    } else {
+	if (errmaj) *errmaj = LDR_ONCEONLY;
+	return NULL;
+    }
+}
+
+#endif /* XFree86LOADER */
+
+void
+pnozz_write_4(PnozzPtr p, int offset, unsigned int value)
+{
+	if ((offset & 0xffffff80) != p->offset_mask) {
+		p->offset_mask = offset & 0xffffff80;
+		p->Scratch = *(volatile unsigned int *)(p->fb + offset);
+	}
+	*((volatile unsigned int *)(p->fbc + offset)) = value;
+}
+
+unsigned int
+pnozz_read_4(PnozzPtr p, int offset)
+{
+	if ((offset & 0xffffff80) != p->offset_mask) {
+		p->offset_mask = offset & 0xffffff80;
+		p->Scratch = *(volatile unsigned int *)(p->fb + offset);
+	}
+	return *(volatile unsigned int *)(p->fbc + offset);
+}
+
+static void
+pnozz_write_dac(PnozzPtr p, int offset, unsigned char value)
+{
+	CARD32 val = ((CARD32)value) << 16;
+
+	p->Scratch = pnozz_read_4(p, PWRUP_CNFG);
+	if ((offset != DAC_INDX_DATA) && (offset != DAC_CMAP_DATA)) {
+		do {
+			pnozz_write_4(p, offset, val);
+		} while (pnozz_read_4(p, offset) != val);
+	} else {
+		pnozz_write_4(p, offset, val);
+	}
+}
+
+static unsigned char
+pnozz_read_dac(PnozzPtr p, int offset)
+{
+	p->Scratch = pnozz_read_4(p, PWRUP_CNFG);
+	return ((pnozz_read_4(p, offset) >> 16) & 0xff);
+}
+
+static void
+pnozz_write_dac_ctl_reg(PnozzPtr p, int offset, unsigned char val)
+{
+
+	pnozz_write_dac(p, DAC_INDX_HI, (offset & 0xff00) >> 8);
+	pnozz_write_dac(p, DAC_INDX_LO, (offset & 0xff));
+	pnozz_write_dac(p, DAC_INDX_DATA, val);
+}
+
+static unsigned char
+pnozz_read_dac_ctl_reg(PnozzPtr p, int offset)
+{
+	pnozz_write_dac(p, DAC_INDX_HI, (offset & 0xff00) >> 8);
+	pnozz_write_dac(p, DAC_INDX_LO, (offset & 0xff));
+	return pnozz_read_dac(p, DAC_INDX_DATA);
+}
+
+static Bool
+PnozzGetRec(ScrnInfoPtr pScrn)
+{
+    /*
+     * Allocate an PnozzRec, and hook it into pScrn->driverPrivate.
+     * pScrn->driverPrivate is initialised to NULL, so we can check if
+     * the allocation has already been done.
+     */
+    if (pScrn->driverPrivate != NULL)
+	return TRUE;
+
+    pScrn->driverPrivate = xnfcalloc(sizeof(PnozzRec), 1);
+    return TRUE;
+}
+
+static void
+PnozzFreeRec(ScrnInfoPtr pScrn)
+{
+    PnozzPtr pPnozz;
+
+    if (pScrn->driverPrivate == NULL)
+	return;
+
+    pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    xfree(pScrn->driverPrivate);
+    pScrn->driverPrivate = NULL;
+
+    return;
+}
+
+static const OptionInfoRec *
+PnozzAvailableOptions(int chipid, int busid)
+{
+    return PnozzOptions;
+}
+
+/* Mandatory */
+static void
+PnozzIdentify(int flags)
+{
+    xf86Msg(X_INFO, "%s: driver for Weitek P9100 found in Tadpole SPARCbook 3GX and others\n", PNOZZ_NAME);
+}
+
+
+/* Mandatory */
+static Bool
+PnozzProbe(DriverPtr drv, int flags)
+{
+    int i;
+    GDevPtr *devSections;
+    int *usedChips;
+    int numDevSections;
+    int numUsed;
+    Bool foundScreen = FALSE;
+    EntityInfoPtr pEnt;
+
+    /*
+     * The aim here is to find all cards that this driver can handle,
+     * and for the ones not already claimed by another driver, claim the
+     * slot, and allocate a ScrnInfoRec.
+     *
+     * This should be a minimal probe, and it should under no circumstances
+     * change the state of the hardware.  Because a device is found, don't
+     * assume that it will be used.  Don't do any initialisations other than
+     * the required ScrnInfoRec initialisations.  Don't allocate any new
+     * data structures.
+     */
+
+    /*
+     * Next we check, if there has been a chipset override in the config file.
+     * For this we must find out if there is an active device section which
+     * is relevant, i.e., which has no driver specified or has THIS driver
+     * specified.
+     */
+
+    if ((numDevSections = xf86MatchDevice(PNOZZ_DRIVER_NAME,
+					  &devSections)) <= 0) {
+	/*
+	 * There's no matching device section in the config file, so quit
+	 * now.
+	 */
+	return FALSE;
+    }
+
+    /*
+     * We need to probe the hardware first.  We then need to see how this
+     * fits in with what is given in the config file, and allow the config
+     * file info to override any contradictions.
+     */
+
+    numUsed = xf86MatchSbusInstances(PNOZZ_NAME, SBUS_DEVICE_P9100,
+		   devSections, numDevSections,
+		   drv, &usedChips);
+
+    xfree(devSections);
+    if (numUsed <= 0)
+	return FALSE;
+
+    if (flags & PROBE_DETECT)
+	foundScreen = TRUE;
+    else
+	for (i = 0; i < numUsed; i++) {
+	    pEnt = xf86GetEntityInfo(usedChips[i]);
+
+	    /*
+	     * Check that nothing else has claimed the slots.
+	     */
+	    if(pEnt->active) {
+		ScrnInfoPtr pScrn;
+
+		/* Allocate a ScrnInfoRec and claim the slot */
+		pScrn = xf86AllocateScreen(drv, 0);
+
+		/* Fill in what we can of the ScrnInfoRec */
+		pScrn->driverVersion = VERSION;
+		pScrn->driverName	 = PNOZZ_DRIVER_NAME;
+		pScrn->name		 = PNOZZ_NAME;
+		pScrn->Probe		 = PnozzProbe;
+		pScrn->PreInit		 = PnozzPreInit;
+		pScrn->ScreenInit	 = PnozzScreenInit;
+		pScrn->SwitchMode	 = PnozzSwitchMode;
+		pScrn->AdjustFrame	 = PnozzAdjustFrame;
+		pScrn->EnterVT		 = PnozzEnterVT;
+		pScrn->LeaveVT		 = PnozzLeaveVT;
+		pScrn->FreeScreen	 = PnozzFreeScreen;
+		pScrn->ValidMode	 = PnozzValidMode;
+		xf86AddEntityToScreen(pScrn, pEnt->index);
+		foundScreen = TRUE;
+	    }
+	    xfree(pEnt);
+	}
+    xfree(usedChips);
+    return foundScreen;
+}
+
+/* Mandatory */
+static Bool
+PnozzPreInit(ScrnInfoPtr pScrn, int flags)
+{
+    PnozzPtr pPnozz;
+    sbusDevicePtr psdp;
+    ModuleDescPtr pMod;
+    MessageType from;
+    rgb defaultWeight = {0, 0, 0};
+    int i;
+
+    if (flags & PROBE_DETECT) return FALSE;
+
+    /*
+     * Note: This function is only called once at server startup, and
+     * not at the start of each server generation.  This means that
+     * only things that are persistent across server generations can
+     * be initialised here.  xf86Screens[] is (pScrn is a pointer to one
+     * of these).  Privates allocated using xf86AllocateScrnInfoPrivateIndex()
+     * are too, and should be used for data that must persist across
+     * server generations.
+     *
+     * Per-generation data should be allocated with
+     * AllocateScreenPrivateIndex() from the ScreenInit() function.
+     */
+
+    /* Allocate the PnozzRec driverPrivate */
+    if (!PnozzGetRec(pScrn)) {
+	return FALSE;
+    }
+    pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    /* always mismatch on first access */
+    pPnozz->offset_mask = 0xffffffff;
+
+    /* Set pScrn->monitor */
+    pScrn->monitor = pScrn->confScreen->monitor;
+
+    /* This driver doesn't expect more than one entity per screen */
+    if (pScrn->numEntities > 1)
+	return FALSE;
+    /* This is the general case */
+    for (i = 0; i < pScrn->numEntities; i++) {
+	EntityInfoPtr pEnt = xf86GetEntityInfo(pScrn->entityList[i]);
+
+	/* PNOZZ is purely SBUS */
+	if (pEnt->location.type == BUS_SBUS) {
+	    psdp = xf86GetSbusInfoForEntity(pEnt->index);
+	    pPnozz->psdp = psdp;
+	} else
+	    return FALSE;
+    }
+
+    /*********************
+    deal with depth
+    *********************/
+    if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) {
+	return FALSE;
+    } else {
+	/* Check that the returned depth is one we support */
+#ifdef DEBUG
+	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+	    "Depth requested: %d\n", pScrn->depth);
+#endif
+	switch (pScrn->depth) {
+	case 8:
+	case 16:
+	case 24:
+	    /* OK */
+	    break;
+	default:
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		       "Given depth (%d) is not supported by this driver\n",
+		       pScrn->depth);
+	    return FALSE;
+	}
+    }
+    xf86PrintDepthBpp(pScrn);
+
+    /* We use a programmable clock */
+    pScrn->progClock = TRUE;
+
+    /* Set the bits per RGB for 8bpp mode */
+    if (pScrn->depth == 8)
+	pScrn->rgbBits = 8;
+
+    if (pScrn->depth > 8) {
+      if (!xf86SetWeight(pScrn, defaultWeight, defaultWeight))
+	return FALSE;
+    }
+
+    if (!xf86SetDefaultVisual(pScrn, -1)) {
+      return FALSE;
+    } else {
+      /* We don't currently support DirectColor at > 8bpp */
+      if (pScrn->depth > 8 && pScrn->defaultVisual != TrueColor) {
+	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual"
+		 " (%s) is not supported at depth %d\n",
+		 xf86GetVisualName(pScrn->defaultVisual), pScrn->depth);
+	return FALSE;
+      }
+    }
+
+    /* Collect all of the relevant option flags (fill in pScrn->options) */
+    xf86CollectOptions(pScrn, NULL);
+
+    /* Process the options */
+    if (!(pPnozz->Options = xalloc(sizeof(PnozzOptions))))
+	return FALSE;
+
+    memcpy(pPnozz->Options, PnozzOptions, sizeof(PnozzOptions));
+    xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pPnozz->Options);
+
+    /*
+     * The new cmap code requires this to be initialised.
+     */
+
+    {
+	Gamma zeros = {0.0, 0.0, 0.0};
+
+	if (!xf86SetGamma(pScrn, zeros)) {
+	    return FALSE;
+	}
+    }
+
+    /* Set the bits per RGB for 8bpp mode */
+    from = X_DEFAULT;
+
+    /* determine whether we use hardware or software cursor */
+    pPnozz->HWCursor = TRUE;
+    if (xf86GetOptValBool(pPnozz->Options, OPTION_HW_CURSOR, &pPnozz->HWCursor))
+	from = X_CONFIG;
+    if (xf86ReturnOptValBool(pPnozz->Options, OPTION_SW_CURSOR, FALSE)) {
+	from = X_CONFIG;
+	pPnozz->HWCursor = FALSE;
+    }
+
+    xf86DrvMsg(pScrn->scrnIndex, from, "Using %s cursor\n",
+		pPnozz->HWCursor ? "HW" : "SW");
+
+    if (xf86ReturnOptValBool(pPnozz->Options, OPTION_NOACCEL, FALSE)) {
+	pPnozz->NoAccel = TRUE;
+	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Acceleration disabled\n");
+    }
+
+    if ((pMod = xf86LoadSubModule(pScrn, "fb")) == NULL) {
+	PnozzFreeRec(pScrn);
+	return FALSE;
+    }
+    xf86LoaderModReqSymLists(pMod, fbSymbols, NULL);
+
+    if ((pMod = xf86LoadSubModule(pScrn, "ramdac")) == NULL) {
+	PnozzFreeRec(pScrn);
+	return FALSE;
+    }
+    xf86LoaderModReqSymLists(pMod, ramdacSymbols, NULL);
+
+    if ((pMod = xf86LoadSubModule(pScrn, "xaa")) == NULL) {
+	PnozzFreeRec(pScrn);
+	return FALSE;
+    }
+    xf86LoaderModReqSymLists(pMod, xaaSymbols, NULL);
+
+    /*********************
+    set up clock and mode stuff
+    *********************/
+
+    pScrn->progClock = TRUE;
+
+    if(pScrn->display->virtualX || pScrn->display->virtualY) {
+	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		   "Pnozz does not support a virtual desktop\n");
+	pScrn->display->virtualX = 0;
+	pScrn->display->virtualY = 0;
+    }
+
+    xf86SbusUseBuiltinMode(pScrn, pPnozz->psdp);
+    pScrn->currentMode = pScrn->modes;
+    pScrn->displayWidth = pScrn->virtualX;
+
+    /* Set display resolution */
+    xf86SetDpi(pScrn, 0, 0);
+
+    return TRUE;
+}
+
+/* Mandatory */
+
+/* This gets called at the start of each server generation */
+
+static Bool
+PnozzScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, const char **argv)
+{
+    ScrnInfoPtr pScrn;
+    PnozzPtr pPnozz;
+    VisualPtr visual;
+    int ret;
+
+    /*
+     * First get the ScrnInfoRec
+     */
+    pScrn = xf86Screens[pScreen->myNum];
+
+    pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    /*
+     * XXX
+     * figure out how much video RAM we really have - 2MB is just by far the
+     * most common size
+     */
+    pPnozz->fb =
+	xf86MapSbusMem(pPnozz->psdp, 0, 0x200000);	/* map 2MB */
+
+    pPnozz->fbc =
+	xf86MapSbusMem(pPnozz->psdp, 0x200000, 0x8000);	/* map registers */
+
+    if (! pPnozz->fbc)
+	return FALSE;
+
+    /*
+     * The next step is to setup the screen's visuals, and initialise the
+     * framebuffer code.  In cases where the framebuffer's default
+     * choices for things like visual layouts and bits per RGB are OK,
+     * this may be as simple as calling the framebuffer's ScreenInit()
+     * function.  If not, the visuals will need to be setup before calling
+     * a fb ScreenInit() function and fixed up after.
+     */
+
+    /*
+     * Reset visual list.
+     */
+    miClearVisualTypes();
+
+#ifdef DEBUG
+    xf86Msg(X_ERROR, "depth: %d, bpp: %d\n", pScrn->depth, pScrn->bitsPerPixel);
+#endif
+    switch (pScrn->bitsPerPixel) {
+	case 8:
+	    pPnozz->depthshift = 0;
+	    break;
+	case 16:
+	    pPnozz->depthshift = 1;
+	    break;
+	case 32:
+	    pPnozz->depthshift = 2;
+	    break;
+	default:
+	    return FALSE;
+    }
+    pPnozz->width = pScrn->virtualX;
+    pPnozz->height = pScrn->virtualY;
+    pPnozz->scanlinesize = pScrn->virtualX << pPnozz->depthshift;
+
+    PnozzSave(pPnozz);
+
+    /*
+     * ok, let's switch to whatever depth That Guy Out There wants.
+     * We won't switch video mode, only colour depth -
+     */
+    if(!PnozzSetDepth(pPnozz, pScrn->bitsPerPixel))
+	return FALSE;
+
+    /* Setup the visuals we support. */
+
+    if (!miSetVisualTypes(pScrn->depth, miGetDefaultVisualMask(pScrn->depth),
+			  pScrn->rgbBits, pScrn->defaultVisual))
+	return FALSE;
+
+    miSetPixmapDepths();
+
+    /*
+     * Call the framebuffer layer's ScreenInit function, and fill in other
+     * pScreen fields.
+     */
+#if DEBUG
+    xf86Msg(X_ERROR, "sls: %d\n", pPnozz->scanlinesize);
+#endif
+    ret = fbScreenInit(pScreen, pPnozz->fb, pScrn->virtualX,
+		       pScrn->virtualY, pScrn->xDpi, pScrn->yDpi,
+		       pScrn->displayWidth, pScrn->bitsPerPixel);
+
+    /* should be set by PnozzSetDepth() */
+    pPnozz->maxheight = (0x200000 / pPnozz->scanlinesize) & 0xffff;
+#if DEBUG
+    xf86Msg(X_ERROR, "max scanlines: %d\n", pPnozz->maxheight);
+#endif
+    if (!ret)
+	return FALSE;
+
+    if (pScrn->bitsPerPixel > 8) {
+      visual = pScreen->visuals + pScreen->numVisuals;
+      while (--visual >= pScreen->visuals) {
+	if ((visual->class | DynamicClass) == DirectColor) {
+	  visual->offsetRed = pScrn->offset.red;
+	  visual->offsetGreen = pScrn->offset.green;
+	  visual->offsetBlue = pScrn->offset.blue;
+	  visual->redMask = pScrn->mask.red;
+	  visual->greenMask = pScrn->mask.green;
+	  visual->blueMask = pScrn->mask.blue;
+	}
+      }
+    }
+
+    fbPictureInit(pScreen, 0, 0);
+
+    miInitializeBackingStore(pScreen);
+    xf86SetBackingStore(pScreen);
+    xf86SetSilkenMouse(pScreen);
+    xf86SetBlackWhitePixels(pScreen);
+
+    if (!pPnozz->NoAccel) {
+	BoxRec bx;
+	pPnozz->pXAA = XAACreateInfoRec();
+	PnozzAccelInit(pScrn);
+	bx.x1 = bx.y1 = 0;
+	bx.x2 = pPnozz->width;
+	bx.y2 = pPnozz->maxheight;
+	xf86InitFBManager(pScreen, &bx);
+	if(!XAAInit(pScreen, pPnozz->pXAA))
+	    return FALSE;
+	xf86Msg(X_INFO, "%s: Using acceleration\n", pPnozz->psdp->device);
+    }
+
+    /* Initialise cursor functions */
+    miDCInitialize (pScreen, xf86GetPointerScreenFuncs());
+
+    /*
+     * Initialize HW cursor layer.
+     * Must follow software cursor initialization
+     */
+    xf86SbusHideOsHwCursor(pPnozz->psdp);
+    if (pPnozz->HWCursor) {
+	if(!PnozzHWCursorInit(pScreen)) {
+	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+		       "Hardware cursor initialization failed\n");
+	    return(FALSE);
+	}
+    }
+
+    /* Initialise default colourmap */
+    if (!miCreateDefColormap(pScreen))
+	return FALSE;
+    if(!xf86SbusHandleColormaps(pScreen, pPnozz->psdp))
+	return FALSE;
+    pPnozz->CloseScreen = pScreen->CloseScreen;
+    pScreen->CloseScreen = PnozzCloseScreen;
+    pScreen->SaveScreen = PnozzSaveScreen;
+
+    /* Report any unused options (only for the first generation) */
+    if (serverGeneration == 1) {
+	xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
+    }
+
+    /* unblank the screen */
+    PnozzSaveScreen(pScreen, SCREEN_SAVER_OFF);
+
+    /* Done */
+    return TRUE;
+}
+
+
+/* Usually mandatory */
+static Bool
+PnozzSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
+{
+    xf86Msg(X_ERROR, "SwitchMode: %d %d %d %d\n", mode->CrtcHTotal,
+	mode->CrtcHSyncStart, mode->CrtcHSyncEnd, mode->CrtcHDisplay);
+    return TRUE;
+}
+
+
+/*
+ * This function is used to initialize the Start Address - the first
+ * displayed location in the video memory.
+ */
+/* Usually mandatory */
+static void
+PnozzAdjustFrame(int scrnIndex, int x, int y, int flags)
+{
+    /* we don't support virtual desktops for now */
+    return;
+}
+
+/*
+ * This is called when VT switching back to the X server.  Its job is
+ * to reinitialise the video mode.
+ */
+
+/* Mandatory */
+static Bool
+PnozzEnterVT(int scrnIndex, int flags)
+{
+    ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    xf86SbusHideOsHwCursor (pPnozz->psdp);
+    return TRUE;
+}
+
+
+/*
+ * This is called when VT switching away from the X server.
+ */
+
+/* Mandatory */
+static void
+PnozzLeaveVT(int scrnIndex, int flags)
+{
+    return;
+}
+
+
+/*
+ * This is called at the end of each server generation.  It restores the
+ * original (text) mode.  It should really also unmap the video memory too.
+ */
+
+/* Mandatory */
+static Bool
+PnozzCloseScreen(int scrnIndex, ScreenPtr pScreen)
+{
+    ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    pScrn->vtSema = FALSE;
+
+    if (pPnozz->HWCursor)
+	PnozzHideCursor(pScrn);
+
+    PnozzRestore(pPnozz);	/* restore colour depth */
+
+    xf86UnmapSbusMem(pPnozz->psdp, pPnozz->fb, 0x200000);
+    xf86UnmapSbusMem(pPnozz->psdp, pPnozz->fbc, 0x8000);
+
+    /* make sure video is turned on */
+    xf86SbusSaveScreen(pPnozz->psdp, SCREEN_SAVER_OFF);
+
+    pScreen->CloseScreen = pPnozz->CloseScreen;
+    return (*pScreen->CloseScreen)(scrnIndex, pScreen);
+    return FALSE;
+}
+
+
+/* Free up any per-generation data structures */
+
+/* Optional */
+static void
+PnozzFreeScreen(int scrnIndex, int flags)
+{
+    PnozzFreeRec(xf86Screens[scrnIndex]);
+}
+
+
+/* Checks if a mode is suitable for the selected chipset. */
+
+/* Optional */
+static ModeStatus
+PnozzValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
+{
+    if (mode->Flags & V_INTERLACE)
+	return(MODE_BAD);
+
+    return(MODE_OK);
+}
+
+/* Do screen blanking */
+
+/* Mandatory */
+static Bool
+PnozzSaveScreen(ScreenPtr pScreen, int mode)
+{
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    PnozzPtr pPnozz = GET_PNOZZ_FROM_SCRN(pScrn);
+
+    xf86SbusSaveScreen(pPnozz->psdp, mode);
+    return TRUE;
+}
+
+#if DEBUG
+static int
+shift_1(int b)
+{
+    if (b > 0)
+	return (16 << b);
+    return 0;
+}
+
+static int
+shift_2(int b)
+{
+    if (b > 0)
+	return (512 << b);
+    return 0;
+}
+
+static void
+DumpSCR(unsigned int scr)
+{
+	int s0, s1, s2, s3, ps;
+	int width;
+	ps = (scr >> PIXEL_SHIFT) & 7;
+	s0 = (scr >> SHIFT_0) & 7;
+	s1 = (scr >> SHIFT_1) & 7;
+	s2 = (scr >> SHIFT_2) & 7;
+	s3 = (scr >> SHIFT_3) & 3;
+	width = shift_1(s0) + shift_1(s1) + shift_1(s2) + shift_2(s3);
+	xf86Msg(X_ERROR, "ps: %d wi: %d\n", ps, width);
+}
+
+static void
+DumpDAC(PnozzPtr pPnozz)
+{
+    int addr, i, val;
+    char line[256], buffer[16];
+    pnozz_write_dac(pPnozz, DAC_INDX_LO, 0);
+    pnozz_write_dac(pPnozz, DAC_INDX_HI, 0);
+    for (addr = 0; addr < 0x100; addr += 16) {
+	snprintf(line, 16, "%02x:", addr);
+	for (i=0;i<16;i++) {
+	    val = pnozz_read_dac(pPnozz, DAC_INDX_DATA);
+	    snprintf(buffer, 16, " %02x", val);
+	    strcat(line, buffer);
+	}
+	xf86Msg(X_ERROR, "%s\n", line);
+    }
+}
+
+static void
+DumpCRTC(PnozzPtr pPnozz)
+{
+    int i;
+    unsigned int reg;
+    for (i = 0x108; i<0x140; i += 4) {
+	reg = pnozz_read_4(pPnozz, i);
+	xf86Msg(X_ERROR, "%x / %d ", reg, reg);
+    }
+    reg = pnozz_read_4(pPnozz, VID_MEM_CONFIG);
+    xf86Msg(X_ERROR, "memcfg: %08x\n", reg);
+    xf86Msg(X_ERROR, "shiftclk:  %x\n", (reg >> 10) & 7);
+    xf86Msg(X_ERROR, "shiftmode: %x\n", (reg >> 22) & 3);
+    xf86Msg(X_ERROR, "crtc_clk:  %x\n", (reg >> 13) & 7);
+}
+#endif
+
+static void
+PnozzSave(PnozzPtr pPnozz)
+{
+	int i;
+	pPnozz->SvSysConf = pnozz_read_4(pPnozz, SYS_CONF);
+	pPnozz->SvDAC_MC3 = pnozz_read_dac_ctl_reg(pPnozz, DAC_MISC_3);
+	pPnozz->SvDAC_MCCR = pnozz_read_dac_ctl_reg(pPnozz, DAC_MISC_CLK);
+	pPnozz->SvDAC_PF = pnozz_read_dac_ctl_reg(pPnozz, DAC_PIXEL_FMT);
+	pPnozz->SvPLL = pnozz_read_dac_ctl_reg(pPnozz, DAC_PLL0);
+	pPnozz->SvVCO = pnozz_read_dac_ctl_reg(pPnozz, DAC_VCO_DIV);
+	pPnozz->SvMemCtl = pnozz_read_4(pPnozz, VID_MEM_CONFIG);
+	for (i = 0; i < 4; i++)
+		pPnozz->CRTC[i] = pnozz_read_4(pPnozz, VID_HTOTAL + (i << 2));
+	pPnozz->DidSave = 1;
+#if DEBUG
+	xf86Msg(X_ERROR, "Saved: %x %x %x %x\n", pPnozz->SvSysConf,
+	    pPnozz->SvDAC_MCCR, pPnozz->SvDAC_PF, pPnozz->SvDAC_MC3);
+	DumpSCR(pPnozz->SvSysConf);
+#endif
+}
+
+static void
+PnozzRestore(PnozzPtr pPnozz)
+{
+    int i;
+    if(pPnozz->DidSave == 1) {
+	pnozz_write_4(pPnozz, SYS_CONF, pPnozz->SvSysConf);
+	pnozz_write_4(pPnozz, VID_MEM_CONFIG, pPnozz->SvMemCtl);
+	for (i = 0; i < 4; i++)
+	    pnozz_write_4(pPnozz, VID_HTOTAL + (i << 2), pPnozz->CRTC[i]);
+
+	pnozz_write_dac_ctl_reg(pPnozz, DAC_PLL0, pPnozz->SvPLL);
+	pnozz_write_dac_ctl_reg(pPnozz, DAC_MISC_3, pPnozz->SvDAC_MC3);
+	pnozz_write_dac_ctl_reg(pPnozz, DAC_MISC_CLK, pPnozz->SvDAC_MCCR);
+	pnozz_write_dac_ctl_reg(pPnozz, DAC_PIXEL_FMT, pPnozz->SvDAC_PF);
+	pnozz_write_dac_ctl_reg(pPnozz, DAC_VCO_DIV, pPnozz->SvVCO);
+    }
+}
+
+static unsigned int
+upper_bit(unsigned int b)
+{
+	unsigned int mask=0x80000000;
+	int cnt = 31;
+	if (b == 0)
+		return -1;
+	while ((mask != 0) && ((b & mask) == 0)) {
+		mask = mask >> 1;
+		cnt--;
+	}
+	return cnt;
+}
+
+/*
+ * To switch colour depth we need to:
+ * - double or quadruple both crtc and shift clock ( for 16 or 32 bit )
+ * - double or quadruple scanline length
+ * - switch the DAC to the appropriate pixel format
+ * - tell the drawing engine about new line length / pixel size
+ */
+
+static int
+PnozzSetDepth(PnozzPtr pPnozz, int depth)
+{
+    int new_sls;
+    unsigned int bits, scr, memctl, mem;
+    int s0, s1, s2, s3, ps, crtcline;
+    unsigned char pf, mc3, es;
+
+#if DEBUG
+    DumpDAC(pPnozz);
+    DumpCRTC(pPnozz);
+#endif
+
+    switch (depth) {
+	case 8:
+	    pPnozz->depthshift = 0;
+	    ps = 2;
+	    pf = 3;
+	    mc3 = 0;
+	    es = 0;	/* no swapping */
+	    memctl = 3;
+	    break;
+	case 16:
+	    pPnozz->depthshift = 1;
+	    ps = 3;
+	    pf = 4;
+	    mc3 = 0;
+	    es = 2;	/* swap bytes in 16bit words */
+	    memctl = 2;
+	    break;
+	default:
+	case 24:
+	    xf86Msg(X_ERROR, "Unsupported colour depth\n");
+	    return 0;
+	case 32:
+	    pPnozz->depthshift = 2;
+	    ps = 5;
+	    pf = 6;
+	    mc3 = 0;
+	    es = 6;	/* swap both half-words and bytes */
+	    memctl = 1;	/* 0 */
+	    break;
+    }
+    /*
+     * this could be done a lot shorter and faster but then nobody would
+     * understand what the hell we're doing here without getting a major
+     * headache. Scanline size is encoded as 4 shift values, 3 of them 3 bits
+     * wide, 16 << n for n>0, one 2 bits, 512 << n for n>0. n==0 means 0
+     */
+    new_sls = pPnozz->width << pPnozz->depthshift;
+    pPnozz->scanlinesize = new_sls;
+    bits = new_sls;
+    s3 = upper_bit(bits);
+    if (s3 > 9) {
+	bits &= ~(1 << s3);
+	s3 -= 9;
+    } else s3 = 0;
+    s2 = upper_bit(bits);
+    if (s2 > 0) {
+	bits &= ~(1 << s2);
+	s2 -= 4;
+    } else s2 = 0;
+    s1 = upper_bit(bits);
+    if (s1 > 0) {
+	bits &= ~(1 << s1);
+	s1 -= 4;
+    } else s1 = 0;
+    s0 = upper_bit(bits);
+    if (s0 > 0) {
+	bits &= ~(1 << s0);
+	s0 -= 4;
+    } else s0 = 0;
+
+#if DEBUG
+    xf86Msg(X_ERROR, "sls: %x sh: %d %d %d %d leftover: %x\n", new_sls, s0, s1,
+	s2, s3, bits);
+#endif
+
+    /*
+     * now let's put these values into the System Config Register. No need to
+     * read it here since we (hopefully) just saved the content
+     */
+    scr = pnozz_read_4(pPnozz, SYS_CONF);
+    scr = (s0 << SHIFT_0) | (s1 << SHIFT_1) | (s2 << SHIFT_2) |
+	(s3 << SHIFT_3) | (ps << PIXEL_SHIFT) | (es << SWAP_SHIFT);
+#if DEBUG
+    xf86Msg(X_ERROR, "new scr: %x DAC %x %x\n", scr, pf, mc3);
+    DumpSCR(scr);
+#endif
+
+    mem = pnozz_read_4(pPnozz, VID_MEM_CONFIG);
+#if DEBUG
+    xf86Msg(X_ERROR, "old memctl: %08x\n", mem);
+#endif
+    /* set shift and crtc clock */
+    mem &= ~(0x0000fc00);
+    mem |= (memctl << 10) | (memctl << 13);
+    pnozz_write_4(pPnozz, VID_MEM_CONFIG, mem);
+#if DEBUG
+    xf86Msg(X_ERROR, "new memctl: %08x\n", mem);
+#endif
+    /* whack the engine... */
+    pnozz_write_4(pPnozz, SYS_CONF, scr);
+
+    /* ok, whack the DAC */
+    pnozz_write_dac_ctl_reg(pPnozz, DAC_MISC_1, 0x11);
+    pnozz_write_dac_ctl_reg(pPnozz, DAC_MISC_2, 0x45);
+    pnozz_write_dac_ctl_reg(pPnozz, DAC_MISC_3, mc3);
+    /*
+     * despite the 3GX manual saying otherwise we don't need to mess with any
+     * clock dividers here
+     */
+    pnozz_write_dac_ctl_reg(pPnozz, DAC_MISC_CLK, 1);
+    pnozz_write_dac_ctl_reg(pPnozz, 3, 0);
+    pnozz_write_dac_ctl_reg(pPnozz, 4, 0);
+
+    pnozz_write_dac_ctl_reg(pPnozz, DAC_POWER_MGT, 0);
+    pnozz_write_dac_ctl_reg(pPnozz, DAC_OPERATION, 0);
+    pnozz_write_dac_ctl_reg(pPnozz, DAC_PALETTE_CTRL, 0);
+
+    pnozz_write_dac_ctl_reg(pPnozz, DAC_PIXEL_FMT, pf);
+
+    /* TODO: distinguish between 15 and 16 bit */
+    pnozz_write_dac_ctl_reg(pPnozz, DAC_8BIT_CTRL, 0);
+    /* direct colour, linear, 565 */
+    pnozz_write_dac_ctl_reg(pPnozz, DAC_16BIT_CTRL, 0xc6);
+    /* direct colour */
+    pnozz_write_dac_ctl_reg(pPnozz, DAC_32BIT_CTRL, 3);
+
+    pnozz_write_dac_ctl_reg(pPnozz, 0x10, 2);
+    pnozz_write_dac_ctl_reg(pPnozz, 0x11, 0);
+    pnozz_write_dac_ctl_reg(pPnozz, 0x14, 5);
+    pnozz_write_dac_ctl_reg(pPnozz, 0x08, 1);
+    pnozz_write_dac_ctl_reg(pPnozz, 0x15, 5);
+    pnozz_write_dac_ctl_reg(pPnozz, 0x16, 0x63);
+
+    /* whack the CRTC */
+    /* we always transfer 64bit in one go */
+    crtcline = pPnozz->scanlinesize >> 3;
+#if DEBUG
+    xf86Msg(X_ERROR, "crtcline: %d\n", crtcline);
+#endif
+    pnozz_write_4(pPnozz, VID_HTOTAL, (24 << pPnozz->depthshift) + crtcline);
+    pnozz_write_4(pPnozz, VID_HSRE, 8 << pPnozz->depthshift);
+    pnozz_write_4(pPnozz, VID_HBRE, 18 << pPnozz->depthshift);
+    pnozz_write_4(pPnozz, VID_HBFE, (18 << pPnozz->depthshift) + crtcline);
+
+#if DEBUG
+    xf86Msg(X_ERROR, "scr: %x\n", pnozz_read_4(pPnozz, SYS_CONF));
+#endif
+    return TRUE;
+}
Index: xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_regs.h
diff -u /dev/null xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_regs.h:1.1
--- /dev/null	Sun Aug 12 22:02:22 2007
+++ xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_regs.h	Wed Mar 14 22:11:36 2007
@@ -0,0 +1,249 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/pnozz/pnozz_regs.h,v 1.1 2007/03/15 02:11:36 tsi Exp $ */
+/*
+ * SBus Weitek P9100 framebuffer - hardware registers.
+ *
+ * Copyright (C) 2005 Michael Lorenz
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * MICHAEL LORENZ BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ */
+/* $NetBSD: pnozz_regs.h,v 1.4 2006/02/28 00:32:53 macallan Exp $ */
+
+#ifndef PNOZZ_REGS_H
+#define PNOZZ_REGS_H
+
+/* The Tadpole 3GX Technical Reference Manual lies.  The ramdac registers
+ * are map in 4 byte increments, not 8.
+ */
+#define SCRN_RPNT_CTL_1	0x0138	/* Screen Repaint Timing Control 1 */
+#define VIDEO_ENABLED	0x00000020
+#define PWRUP_CNFG	0x0194	/* Power Up Configuration */
+#define DAC_CMAP_WRIDX	0x0200	/* IBM RGB528 Palette Address (Write) */
+#define DAC_CMAP_DATA	0x0204	/* IBM RGB528 Palette Data */
+#define DAC_PXL_MASK	0x0208	/* IBM RGB528 Pixel Mask */
+#define DAC_CMAP_RDIDX	0x020c	/* IBM RGB528 Palette Address (Read) */
+#define DAC_INDX_LO	0x0210	/* IBM RGB528 Index Low */
+#define DAC_INDX_HI	0x0214	/* IBM RGB528 Index High */
+#define DAC_INDX_DATA	0x0218	/* IBM RGB528 Index Data (Indexed Registers) */
+#define DAC_INDX_CTL	0x021c	/* IBM RGB528 Index Control */
+#	define DAC_INDX_AUTOINCR	0x01
+
+/* RAMDAC control registers, accessed through DAC_INDX_* */
+#define DAC_MISC_CLK	0x02
+#define DAC_POWER_MGT	0x05
+#define DAC_OPERATION	0x06
+#	define DAC_SYNC_ON_GREEN	0x08
+#define DAC_PALETTE_CTRL 0x07
+#define DAC_PIXEL_FMT	0x0a
+#define DAC_8BIT_CTRL	0x0b
+#	define DAC8_DIRECT_COLOR	0x01
+#define DAC_16BIT_CTRL	0x0c
+#	define DAC16_INDIRECT_COLOR	0x00
+#	define DAC16_DYNAMIC_COLOR	0x40
+#	define DAC16_DIRECT_COLOR	0xc0
+#	define DAC16_BYPASS_POLARITY	0x20
+#	define DAC16_BIT_FILL_LINEAR	0x04
+#	define DAC16_555		0x00
+#	define DAC16_565		0x02
+#	define DAC16_CONTIGUOUS	0x01
+#define DAC_24BIT_CTRL	0x0d
+#	define DAC24_DIRECT_COLOR	0x01
+#define DAC_32BIT_CTRL	0x0e
+#	define DAC32_BYPASS_POLARITY	0x04
+#	define DAC32_INDIRECT_COLOR	0x00
+#	define DAC32_DYNAMIC_COLOR	0x01
+#	define DAC32_DIRECT_COLOR	0x03
+#define DAC_VCO_DIV	0x16
+#define DAC_PLL0	0x20
+#define DAC_MISC_1	0x70
+#define DAC_MISC_2	0x71
+#define DAC_MISC_3	0x72
+
+#define DAC_CURSOR_CTL	0x30
+#	define DAC_CURSOR_OFF		0x00
+#	define DAC_CURSOR_WIN		0x02
+#	define DAC_CURSOR_X11		0x03
+#	define DAC_CURSOR_64		0x04	/* clear for 32x32 cursor */
+#define DAC_CURSOR_X	0x31	/* 32-low, 32-high */
+#define DAC_CURSOR_Y	0x33	/* 32-low, 32-high */
+#define DAC_CURSOR_HOT_X	0x35	/* hotspot */
+#define DAC_CURSOR_HOT_Y	0x36
+#define DAC_CURSOR_COL_1	0x40	/* red. green and blue in subseq. registers */
+#define DAC_CURSOR_COL_2	0x43	/* red. green and blue in subseq. registers */
+#define DAC_CURSOR_COL_3	0x46	/* red. green and blue in subseq. registers */
+#define DAC_PIX_PLL		0x8e
+#define DAC_CURSOR_DATA		0x100
+
+/* main registers */
+#define SYS_CONF	0x0004	/* System Configuration Register */
+#	define BUFFER_WRITE_1		0x0200	/* writes got o buffer 1 */
+#	define BUFFER_WRITE_0		0x0000	/* writes go to buffer 0 */
+#	define BUFFER_READ_1		0x0400	/* read from buffer 1 */
+#	define BUFFER_READ_0		0x0000
+#	define MEM_SWAP_BITS		0x0800	/* swap bits when accessing VRAM */
+#	define MEM_SWAP_BYTES		0x1000	/* swap bytes when accessing VRAM */
+#	define MEM_SWAP_HWORDS		0x2000	/* swap halfwords when accessing VRAM */
+#	define SHIFT_0			14
+#	define SHIFT_1			17
+#	define SHIFT_2			20
+#	define SHIFT_3			29
+#	define PIXEL_SHIFT		26
+#	define SWAP_SHIFT		11
+	/* this is what the 3GX manual says */
+#	define SC_8BIT			2
+#	define SC_16BIT			3
+#	define SC_24BIT			7
+#	define SC_32BIT			5
+
+/* video controller registers */
+#define VID_HCOUNTER	0x104
+#define VID_HTOTAL	0x108
+#define VID_HSRE	0x10c	/* hsync raising edge */
+#define VID_HBRE	0x110	/* hblank raising edge */
+#define VID_HBFE	0x114	/* hblank falling edge */
+#define VID_HCNTPRLD	0x118	/* hcounter preload */
+#define VID_VCOUNTER	0x11c	/* vcounter */
+#define VID_VLENGTH	0x120	/* lines, including blanks */
+#define VID_VSRE	0x124	/* vsync raising edge */
+#define VID_VBRE	0x128	/* vblank raising edge */
+#define VID_VBFE	0x12c	/* vblank falling edge */
+#define VID_VCNTPRLD	0x130	/* vcounter preload */
+#define VID_SRADDR	0x134	/* screen repaint address */
+#define VID_SRTC	0x138	/* screen repaint timing control */
+#define VID_QSFCNTR	0x13c	/* QSF counter */
+
+#define VID_MEM_CONFIG	0x184	/* memory config */
+#define VID_RFPERIOD	0x188	/* refresh period */
+#define VID_RFCOUNT	0x18c	/* refresh counter */
+#define VID_RLMAX	0x190	/* RAS low max */
+#define VID_RLCUR	0x194	/* RAS low current */
+#define VID_DACSYNC	0x198	/* read after last DAC access */
+
+#define ENGINE_STATUS	0x2000	/* drawing engine status register */
+#	define BLITTER_BUSY		0x80000000
+#	define ENGINE_BUSY		0x40000000
+#define COMMAND_BLIT	0x2004
+#define COMMAND_QUAD	0x2008
+#define PIXEL_8		0x200c
+#define PIXEL_1		0x2080	/* pixel data for monochrome colour expansion */
+/* apparently bits 2-6 control how many pixels we write - n+1 */
+
+/* drawing engine registers */
+#define COORD_INDEX			0x218c
+#define WINDOW_OFFSET		0x2190
+
+#define FOREGROUND_COLOR	0x2200
+#define BACKGROUND_COLOR	0x2204
+#define COLOR_0			0x2200
+#define COLOR_1			0x2204
+#define PLANE_MASK		0x2208
+#define DRAW_MODE		0x220c
+#define PATTERN_ORIGIN_X	0x2210
+#define PATTERN_ORIGIN_Y	0x2214
+#define RASTER_OP			0x2218
+#	define ROP_NO_SOLID		0x02000	/* if set use pattern instead of color for quad operations */
+#	define ROP_2BIT_PATTERN		0x04000 /* 4-colour pattern instead of mono */
+#	define ROP_PIX1_TRANS		0x08000	/* transparent background in mono */
+#	define ROP_OVERSIZE		0x10000
+#	define ROP_PATTERN		0x20000		/* the manual says pattern enable */
+#	define ROP_TRANS		0x20000		/* but XFree86 says trans */
+#	define ROP_SRC			0xCC
+#	define ROP_PAT			0xF0
+#	define ROP_DST			0xAA
+#	define ROP_SET			0xff
+
+#define PIXEL_8_REG		0x221c	/* PIXEL_8 overflow data */
+#define WINDOW_MIN		0x2220
+#define WINDOW_MAX		0x2224
+
+#define PATTERN0		0x2280
+#define PATTERN1		0x2284
+#define PATTERN2		0x2288
+#define PATTERN3		0x228c
+#define USER0			0x2290
+#define USER1			0x2294
+#define USER2			0x2298
+#define USER3			0x229c
+#define BYTE_CLIP_MIN		0x22a0
+#define BYTE_CLIP_MAX		0x22a4
+
+/* coordinate registers */
+#define ABS_X0		0x3008
+#define ABS_Y0		0x3010
+#define ABS_XY0		0x3018
+#define REL_X0		0x3028
+#define REL_Y0		0x3030
+#define REL_XY0		0x3038
+
+#define ABS_X1		0x3048
+#define ABS_Y1		0x3050
+#define ABS_XY1		0x3058
+#define REL_X1		0x3068
+#define REL_Y1		0x3070
+#define REL_XY1		0x3078
+
+#define ABS_X2		0x3088
+#define ABS_Y2		0x3090
+#define ABS_XY2		0x3098
+#define REL_X2		0x30a8
+#define REL_Y2		0x30b0
+#define REL_XY2		0x30b8
+
+#define ABS_X3		0x30c8
+#define ABS_Y3		0x30d0
+#define ABS_XY3		0x30d8
+#define REL_X3		0x30e8
+#define REL_Y3		0x30f0
+#define REL_XY3		0x30f8
+
+/* meta-coordinates */
+#define POINT_RTW_X	0x3208
+#define POINT_RTW_Y	0x3210
+#define POINT_RTW_XY	0x3218
+#define POINT_RTP_X	0x3228
+#define POINT_RTP_Y	0x3220
+#define POINT_RTP_XY	0x3238
+
+#define LINE_RTW_X	0x3248
+#define LINE_RTW_Y	0x3250
+#define LINE_RTW_XY	0x3258
+#define LINE_RTP_X	0x3268
+#define LINE_RTP_Y	0x3260
+#define LINE_RTP_XY	0x3278
+
+#define TRIANGLE_RTW_X	0x3288
+#define TRIANGLE_RTW_Y	0x3290
+#define TRIANGLE_RTW_XY	0x3298
+#define TRIANGLE_RTP_X	0x32a8
+#define TRIANGLE_RTP_Y	0x32a0
+#define TRIANGLE_RTP_XY	0x32b8
+
+#define QUAD_RTW_X	0x32c8
+#define QUAD_RTW_Y	0x32d0
+#define QUAD_RTW_XY	0x32d8
+#define QUAD_RTP_X	0x32e8
+#define QUAD_RTP_Y	0x32e0
+#define QUAD_RTP_XY	0x32f8
+
+#define RECT_RTW_X	0x3308
+#define RECT_RTW_Y	0x3310
+#define RECT_RTW_XY	0x3318
+#define RECT_RTP_X	0x3328
+#define RECT_RTP_Y	0x3320
+#define RECT_RTP_XY	0x3338
+
+#endif /* PNOZZ_REGS_H */
Index: xc/programs/Xserver/hw/xfree86/drivers/rendition/rendition.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/rendition/rendition.c:1.63 xc/programs/Xserver/hw/xfree86/drivers/rendition/rendition.c:1.65
--- xc/programs/Xserver/hw/xfree86/drivers/rendition/rendition.c:1.63	Thu Mar 16 11:50:12 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/rendition/rendition.c	Tue Jan 23 13:03:05 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/rendition.c,v 1.63 2006/03/16 16:50:12 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/rendition.c,v 1.65 2007/01/23 18:03:05 tsi Exp $ */
 /*
  * Copyright (C) 1998 The XFree86 Project, Inc.  All Rights Reserved.
  *
@@ -99,7 +99,7 @@
 static void       renditionIdentify(int);
 static Bool       renditionProbe(DriverPtr, int);
 static Bool       renditionPreInit(ScrnInfoPtr, int);
-static Bool       renditionScreenInit(int, ScreenPtr, int, char **);
+static Bool       renditionScreenInit(int, ScreenPtr, const int, const char **);
 static Bool       renditionSwitchMode(int, DisplayModePtr, int);
 static void       renditionAdjustFrame(int, int, int, int);
 static Bool       renditionEnterVT(int, int);
@@ -1105,7 +1105,7 @@
 }
 
 static Bool
-renditionScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+renditionScreenInit(int scrnIndex, ScreenPtr pScreen, const int argc, const char **argv)
 {
     ScrnInfoPtr pScreenInfo = xf86Screens[scrnIndex];
     renditionPtr pRendition = RENDITIONPTR(pScreenInfo);
Index: xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c:1.20 xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c:1.21
--- xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c:1.20	Sat Apr  3 17:26:24 2004
+++ xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c	Sun Dec 10 10:58:30 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c,v 1.20 2004/04/03 22:26:24 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/vboard.c,v 1.21 2006/12/10 15:58:30 tsi Exp $ */
 /*
  * includes
  */
@@ -157,7 +157,7 @@
     verite_write_memory32(pRendition->board.vmem_base, 0, START);
     for (offset=ONEMEG; offset<16*ONEMEG; offset+=ONEMEG) {
 #ifdef DEBUG
-        ErrorF( "Testing %d MB: ", offset/ONEMEG);
+        ErrorF( "Testing %ld MB: ", (unsigned long)(offset/ONEMEG));
 #endif
         pattern=verite_read_memory32(pRendition->board.vmem_base, offset);
         if (START == pattern) {
@@ -215,8 +215,8 @@
   verite_out8(iob+MEMENDIAN, MEMENDIAN_NO);
 
 #ifdef DEBUG
-  ErrorF("Checking presence of csucode @ 0x%x + 0x800\n",
-	 pRendition->board.vmem_base);
+  ErrorF("Checking presence of csucode @ 0x%lx + 0x800\n",
+	 (unsigned long)pRendition->board.vmem_base);
 
   if (0x800 != pRendition->board.csucode_base)
     ErrorF("pRendition->board.csucode_base == 0x%x\n",
@@ -235,9 +235,9 @@
       mismatches++;
     }
 #ifdef DEBUG
-  ErrorF("Encountered %d out of %d possible mismatches\n",
+  ErrorF("Encountered %d out of %ld possible mismatches\n",
 	 mismatches,
-	 sizeof(csrisc)/sizeof(vu32));
+	 (unsigned long)(sizeof(csrisc)/sizeof(vu32)));
 #endif
 
   verite_out8(iob+MEMENDIAN, memend);
Index: xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c:1.14 xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c:1.15
--- xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c:1.14	Mon Feb 23 20:13:10 2004
+++ xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c	Mon Apr  9 11:37:16 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c,v 1.14 2004/02/24 01:13:10 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/rendition/vmodes.c,v 1.15 2007/04/09 15:37:16 tsi Exp $ */
 /*
  * file vmodes.c
  *
@@ -215,7 +215,7 @@
 
     int tmp;
     int doubleclock=0;
-    int M, N, P;
+    int M = 0, N = 0, P = 0;
     int iob=pRendition->board.io_base;
 
 #ifdef DEBUG
Index: xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c:1.30 xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c:1.32
--- xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c:1.30	Thu Mar 16 11:50:12 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c	Tue Jan 23 13:03:05 2007
@@ -34,7 +34,7 @@
  *
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c,v 1.30 2006/03/16 16:50:12 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3/s3_driver.c,v 1.32 2007/01/23 18:03:05 tsi Exp $ */
 
 
 #include "xf86.h"
@@ -95,8 +95,8 @@
 static Bool S3EnterVT(int scrnIndex, int flags);
 static void S3LeaveVT(int scrnIndex, int flags);
 static void S3Save(ScrnInfoPtr pScrn);
-static Bool S3ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc,
-			 char **argv);
+static Bool S3ScreenInit(int scrnIndex, ScreenPtr pScreen,
+			 const int argc, const char **argv);
 static Bool S3MapMem(ScrnInfoPtr pScrn);
 static void S3UnmapMem(ScrnInfoPtr pScrn);
 static Bool S3ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
@@ -726,8 +726,8 @@
 }
 
 
-static Bool S3ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc,
-			 char **argv)
+static Bool S3ScreenInit(int scrnIndex, ScreenPtr pScreen,
+			 const int argc, const char **argv)
 {
 	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
 	S3Ptr pS3 = S3PTR(pScrn);
Index: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c:1.100 xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c:1.102
--- xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c:1.100	Thu Mar 16 11:50:13 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c	Tue Jan 23 13:03:06 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c,v 1.100 2006/03/16 16:50:13 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/s3virge/s3v_driver.c,v 1.102 2007/01/23 18:03:06 tsi Exp $ */
 
 /*
  * Copyright (C) 1994-1999 The XFree86 Project, Inc.
@@ -107,7 +107,7 @@
 static void S3VSaveSTREAMS(ScrnInfoPtr pScrn, unsigned int *streams);
 static void S3VRestoreSTREAMS(ScrnInfoPtr pScrn, unsigned int *streams);
 static void S3VDisableSTREAMS(ScrnInfoPtr pScrn);
-static Bool S3VScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv);
+static Bool S3VScreenInit(int scrnIndex, ScreenPtr pScreen, const int argc, const char **argv);
 static int S3VInternalScreenInit( int scrnIndex, ScreenPtr pScreen);
 static void S3VPrintRegs(ScrnInfoPtr);
 static ModeStatus S3VValidMode(int index, DisplayModePtr mode, Bool verbose, int flags);
@@ -2465,7 +2465,7 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-S3VScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+S3VScreenInit(int scrnIndex, ScreenPtr pScreen, const int argc, const char **argv)
 {
   ScrnInfoPtr pScrn;
   S3VPtr ps3v;
Index: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c:1.57 xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c:1.59
--- xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c:1.57	Thu Mar 16 11:50:13 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c	Tue Jan 23 13:03:06 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c,v 1.57 2006/03/16 16:50:13 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c,v 1.59 2007/01/23 18:03:06 tsi Exp $ */
 /*
  * vim: sw=4 ts=8 ai ic:
  *
@@ -41,8 +41,8 @@
 static void SavageSave(ScrnInfoPtr pScrn);
 static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr, SavageRegPtr, Bool);
 
-static Bool SavageScreenInit(int scrnIndex, ScreenPtr pScreen, int argc,
-			     char **argv);
+static Bool SavageScreenInit(int scrnIndex, ScreenPtr pScreen,
+			     const int argc, const char **argv);
 static int SavageInternalScreenInit(int scrnIndex, ScreenPtr pScreen);
 static ModeStatus SavageValidMode(int index, DisplayModePtr mode,
 				  Bool verbose, int flags);
@@ -2244,7 +2244,7 @@
 
 
 static Bool SavageScreenInit(int scrnIndex, ScreenPtr pScreen,
-			     int argc, char **argv)
+			     const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     SavagePtr psav;
Index: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h
diff -u xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h:1.18 xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h:1.19
--- xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h:1.18	Thu Mar  9 12:37:08 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h	Sun Dec 10 10:58:30 2006
@@ -24,7 +24,7 @@
 sale, use or other dealings in this Software without prior written
 authorization from the XFree86 Project and Silicon Motion.
 */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h,v 1.18 2006/03/09 17:37:08 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi.h,v 1.19 2006/12/10 15:58:30 tsi Exp $ */
 
 #ifndef _SMI_H
 #define _SMI_H
@@ -252,7 +252,7 @@
 /*			M A C R O S					      */
 /******************************************************************************/
 
-#if SMI_DEBUG
+#if SMI_DEBUG || defined(DEBUG)
 # define VERBLEV 1
 # define ENTER_PROC(PROCNAME)						\
 	 xf86ErrorFVerb(VERBLEV, "ENTER\t" PROCNAME "(%d)\n", __LINE__);\
@@ -263,6 +263,7 @@
 # define LEAVE_PROC(PROCNAME)						\
 	 xf86ErrorFVerb(VERBLEV, "LEAVE\t" PROCNAME "(%d)\n", __LINE__);\
 	 xf86Break1()
+# undef  DEBUG
 # define DEBUG(arg)	xf86ErrorFVerb arg
 #else
 # define VERBLEV 4
Index: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_501.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_501.c:1.1 xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_501.c:1.2
--- xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_501.c:1.1	Thu Mar  9 12:37:08 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_501.c	Mon Apr  9 11:37:16 2007
@@ -1,5 +1,5 @@
 /*
-Copyright (C) 1994-1999 The XFree86 Project, Inc.  All Rights Reserved.
+Copyright (C) 1994-2007 The XFree86 Project, Inc.  All Rights Reserved.
 Copyright (C) 2000 Silicon Motion, Inc.  All Rights Reserved.
 
 Permission is hereby granted, free of charge, to any person obtaining a copy of
@@ -24,7 +24,7 @@
 sale, use or other dealings in this Software without prior written
 authorization from The XFree86 Project or Silicon Motion.
 */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_501.c,v 1.1 2006/03/09 17:37:08 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_501.c,v 1.2 2007/04/09 15:37:16 tsi Exp $ */
 
 #include "xf86Resources.h"
 #include "xf86RAC.h"
@@ -186,6 +186,8 @@
     LONG blank_width, sync_start, sync_width;
     clock_select_t clock;
 
+    memset(&clock, 0, sizeof(clock));
+
     /* Calculate the VESA line and screen frequencies. */
     vesaMode->horizontal_frequency = roundDiv(vesaMode->pixel_clock,
                                            vesaMode->horizontal_total);
Index: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c:1.44 xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c:1.47
--- xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c:1.44	Thu Mar 16 11:50:13 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c	Tue Jan 23 13:03:06 2007
@@ -24,7 +24,7 @@
 sale, use or other dealings in this Software without prior written
 authorization from The XFree86 Project or Silicon Motion.
 */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c,v 1.44 2006/03/16 16:50:13 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_driver.c,v 1.47 2007/01/23 18:03:06 tsi Exp $ */
 
 #include "xf86Resources.h"
 #include "xf86RAC.h"
@@ -58,8 +58,8 @@
 static void SMI_LeaveVT(int scrnIndex, int flags);
 static void SMI_Save (ScrnInfoPtr pScrn);
 static void SMI_WriteMode (ScrnInfoPtr pScrn, vgaRegPtr, SMIRegPtr);
-static Bool SMI_ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc,
-                           char **argv);
+static Bool SMI_ScreenInit(int scrnIndex, ScreenPtr pScreen,
+                           const int argc, const char **argv);
 static int SMI_InternalScreenInit(int scrnIndex, ScreenPtr pScreen);
 static void SMI_PrintRegs(ScrnInfoPtr);
 static ModeStatus SMI_ValidMode(int scrnIndex, DisplayModePtr mode,
@@ -2136,7 +2136,7 @@
 /* This gets called at the start of each server generation. */
 
 static Bool
-SMI_ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+SMI_ScreenInit(int scrnIndex, ScreenPtr pScreen, const int argc, const char **argv)
 {
 	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
 	SMIPtr pSmi = SMIPTR(pScrn);
@@ -2443,8 +2443,8 @@
 	 * pScreen fields.
 	 */
 
-	DEBUG((VERBLEV, "\tInitializing FB @ 0x%08X for %dx%d (%d)\n",
-			pSmi->FBBase, width, height, displayWidth));
+	DEBUG((VERBLEV, "\tInitializing FB @ 0x%08lX for %dx%d (%d)\n",
+	      (unsigned long)pSmi->FBBase, width, height, displayWidth));
 	switch (pScrn->bitsPerPixel)
 	{
 	case 8:
Index: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_i2c.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_i2c.c:1.3 xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_i2c.c:1.4
--- xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_i2c.c:1.3	Mon Jan  9 09:59:58 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_i2c.c	Sun Dec 10 10:58:30 2006
@@ -24,7 +24,7 @@
 sale, use or other dealings in this Software without prior written
 authorization from the XFree86 Project and Silicon Motion.
 */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_i2c.c,v 1.3 2006/01/09 14:59:58 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/siliconmotion/smi_i2c.c,v 1.4 2006/12/10 15:58:30 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -40,12 +40,10 @@
 #undef ENTER_PROC
 #undef DEBUG_PROC
 #undef LEAVE_PROC
-#undef DEBUG
 #define VERBLEV 2
 #define ENTER_PROC(PROCNAME)
 #define DEBUG_PROC(PROCNAME)
 #define LEAVE_PROC(PROCNAME)
-#define DEBUG(arg)
 
 static void
 SMI_I2CPutBits(I2CBusPtr b, int clock,  int data)
Index: xc/programs/Xserver/hw/xfree86/drivers/sis/init301.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/sis/init301.c:1.81 xc/programs/Xserver/hw/xfree86/drivers/sis/init301.c:1.82
--- xc/programs/Xserver/hw/xfree86/drivers/sis/init301.c:1.81	Mon Jan  9 09:59:59 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/sis/init301.c	Mon Apr  9 11:37:16 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/init301.c,v 1.81 2006/01/09 14:59:59 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/init301.c,v 1.82 2007/04/09 15:37:16 tsi Exp $ */
 /*
  * Mode initializing code (CRT2 section)
  * for SiS 300/305/540/630/730 and
@@ -6737,7 +6737,7 @@
   const       UCHAR *PhasePoint;
   const       UCHAR *TimingPoint;
 #ifdef SIS315H
-  USHORT      resindex, CRT2Index;
+  USHORT      resindex = 0, CRT2Index = 0;
   const       SiS_Part2PortTblStruct *CRT2Part2Ptr = NULL;
 
   if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) return;
@@ -7793,7 +7793,7 @@
                 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo)
 {
   USHORT tempah,i,modeflag,j;
-  USHORT ResIndex,DisplayType;
+  USHORT ResIndex = 0, DisplayType = 0;
   const SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr=NULL;
 
   if(ModeNo <= 0x13) modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
Index: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c:1.65 xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c:1.66
--- xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c:1.65	Mon Jan  9 10:00:03 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c	Sun Dec 10 10:58:30 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c,v 1.65 2006/01/09 15:00:03 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_dac.c,v 1.66 2006/12/10 15:58:30 tsi Exp $ */
 /*
  * DAC helper functions (Save/Restore, MemClk, etc)
  *
@@ -220,7 +220,7 @@
     double Fvco, Fout;
     double error, aerror;
 #ifdef DEBUG
-    double bestFout;
+    double bestFout=0;
 #endif
 
     /*
Index: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c:1.204 xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c:1.207
--- xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c:1.204	Thu Mar 16 11:50:14 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c	Tue Jan 23 13:03:07 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c,v 1.204 2006/03/16 16:50:14 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.c,v 1.207 2007/01/23 18:03:07 tsi Exp $ */
 /*
  * SiS driver main code
  *
@@ -7170,7 +7170,7 @@
  * depth, bitsPerPixel)
  */
 static Bool
-SISScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+SISScreenInit(int scrnIndex, ScreenPtr pScreen, const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     vgaHWPtr hwp;
@@ -9045,7 +9045,7 @@
 #endif
 
 #ifdef DEBUG
-static void
+void
 SiSDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode)
 {
     xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Clock : %x\n", mode->Clock);
Index: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.h
diff -u xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.h:1.42 xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.h:1.45
--- xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.h:1.42	Mon Jan  9 10:00:06 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.h	Tue Jan 23 13:03:07 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.h,v 1.42 2006/01/09 15:00:06 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sis/sis_driver.h,v 1.45 2007/01/23 18:03:07 tsi Exp $ */
 /*
  * Global data and definitions
  *
@@ -1266,7 +1266,7 @@
 static void SISIdentify(int flags);
 static Bool SISProbe(DriverPtr drv, int flags);
 static Bool SISPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool SISScreenInit(int Index, ScreenPtr pScreen, int argc, char **argv);
+static Bool SISScreenInit(int Index, ScreenPtr pScreen, const int argc, const char **argv);
 static Bool SISEnterVT(int scrnIndex, int flags);
 static void SISLeaveVT(int scrnIndex, int flags);
 static Bool SISCloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -1319,7 +1319,7 @@
 USHORT	       SiS_GetModeNumber(ScrnInfoPtr pScrn, DisplayModePtr mode, unsigned long VBFlags);
 unsigned char  SiS_GetSetBIOSScratch(ScrnInfoPtr pScrn, USHORT offset, unsigned char value);
 #ifdef DEBUG
-static void    SiSDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode);
+void           SiSDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode);
 #endif
 void           SISDetermineLCDACap(ScrnInfoPtr pScrn);
 void           SISSaveDetectedDevices(ScrnInfoPtr pScrn);
Index: xc/programs/Xserver/hw/xfree86/drivers/sunbw2/bw2_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/sunbw2/bw2_driver.c:1.8 xc/programs/Xserver/hw/xfree86/drivers/sunbw2/bw2_driver.c:1.11
--- xc/programs/Xserver/hw/xfree86/drivers/sunbw2/bw2_driver.c:1.8	Thu Mar 16 11:50:15 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/sunbw2/bw2_driver.c	Wed Mar 14 22:11:36 2007
@@ -20,7 +20,7 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunbw2/bw2_driver.c,v 1.8 2006/03/16 16:50:15 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunbw2/bw2_driver.c,v 1.11 2007/03/15 02:11:36 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -38,8 +38,8 @@
 static void	BW2Identify(int flags);
 static Bool	BW2Probe(DriverPtr drv, int flags);
 static Bool	BW2PreInit(ScrnInfoPtr pScrn, int flags);
-static Bool	BW2ScreenInit(int Index, ScreenPtr pScreen, int argc,
-			      char **argv);
+static Bool	BW2ScreenInit(int Index, ScreenPtr pScreen,
+			      const int argc, const char **argv);
 static Bool	BW2EnterVT(int scrnIndex, int flags);
 static void	BW2LeaveVT(int scrnIndex, int flags);
 static Bool	BW2CloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -386,7 +386,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-BW2ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+BW2ScreenInit(int scrnIndex, ScreenPtr pScreen,
+	      const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     Bw2Ptr pBw2;
@@ -567,9 +568,9 @@
 /* Mandatory */
 static Bool
 BW2SaveScreen(ScreenPtr pScreen, int mode)
-    /* this function should blank the screen when unblank is FALSE and
-       unblank it when unblank is TRUE -- it doesn't actually seem to be
-       used for much though */
 {
-    return TRUE;
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    Bw2Ptr pBw2 = GET_BW2_FROM_SCRN(pScrn);
+
+    return xf86SbusSaveScreen(pBw2->psdp, mode);
 }
Index: xc/programs/Xserver/hw/xfree86/drivers/suncg14/cg14_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/suncg14/cg14_driver.c:1.13 xc/programs/Xserver/hw/xfree86/drivers/suncg14/cg14_driver.c:1.16
--- xc/programs/Xserver/hw/xfree86/drivers/suncg14/cg14_driver.c:1.13	Thu Mar 16 11:50:15 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/suncg14/cg14_driver.c	Wed Mar 14 22:11:36 2007
@@ -20,7 +20,7 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/suncg14/cg14_driver.c,v 1.13 2006/03/16 16:50:15 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/suncg14/cg14_driver.c,v 1.16 2007/03/15 02:11:36 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -38,8 +38,8 @@
 static void	CG14Identify(int flags);
 static Bool	CG14Probe(DriverPtr drv, int flags);
 static Bool	CG14PreInit(ScrnInfoPtr pScrn, int flags);
-static Bool	CG14ScreenInit(int Index, ScreenPtr pScreen, int argc,
-			      char **argv);
+static Bool	CG14ScreenInit(int Index, ScreenPtr pScreen,
+			       const int argc, const char **argv);
 static Bool	CG14EnterVT(int scrnIndex, int flags);
 static void	CG14LeaveVT(int scrnIndex, int flags);
 static Bool	CG14CloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -415,7 +415,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-CG14ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+CG14ScreenInit(int scrnIndex, ScreenPtr pScreen,
+	       const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     Cg14Ptr pCg14;
@@ -634,11 +635,11 @@
 /* Mandatory */
 static Bool
 CG14SaveScreen(ScreenPtr pScreen, int mode)
-    /* this function should blank the screen when unblank is FALSE and
-       unblank it when unblank is TRUE -- it doesn't actually seem to be
-       used for much though */
 {
-    return TRUE;
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    Cg14Ptr pCg14 = GET_CG14_FROM_SCRN(pScrn);
+
+    return xf86SbusSaveScreen(pCg14->psdp, mode);
 }
 
 /*
Index: xc/programs/Xserver/hw/xfree86/drivers/suncg3/cg3_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/suncg3/cg3_driver.c:1.10 xc/programs/Xserver/hw/xfree86/drivers/suncg3/cg3_driver.c:1.13
--- xc/programs/Xserver/hw/xfree86/drivers/suncg3/cg3_driver.c:1.10	Thu Mar 16 11:50:16 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/suncg3/cg3_driver.c	Wed Mar 14 22:11:37 2007
@@ -20,7 +20,7 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/suncg3/cg3_driver.c,v 1.10 2006/03/16 16:50:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/suncg3/cg3_driver.c,v 1.13 2007/03/15 02:11:37 tsi Exp $ */
 
 #define PSZ 8
 #include "xf86.h"
@@ -39,8 +39,8 @@
 static void	CG3Identify(int flags);
 static Bool	CG3Probe(DriverPtr drv, int flags);
 static Bool	CG3PreInit(ScrnInfoPtr pScrn, int flags);
-static Bool	CG3ScreenInit(int Index, ScreenPtr pScreen, int argc,
-			      char **argv);
+static Bool	CG3ScreenInit(int Index, ScreenPtr pScreen,
+			      const int argc, const char **argv);
 static Bool	CG3EnterVT(int scrnIndex, int flags);
 static void	CG3LeaveVT(int scrnIndex, int flags);
 static Bool	CG3CloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -387,7 +387,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-CG3ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+CG3ScreenInit(int scrnIndex, ScreenPtr pScreen,
+	      const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     Cg3Ptr pCg3;
@@ -575,9 +576,9 @@
 /* Mandatory */
 static Bool
 CG3SaveScreen(ScreenPtr pScreen, int mode)
-    /* this function should blank the screen when unblank is FALSE and
-       unblank it when unblank is TRUE -- it doesn't actually seem to be
-       used for much though */
 {
-    return TRUE;
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    Cg3Ptr pCg3 = GET_CG3_FROM_SCRN(pScrn);
+
+    return xf86SbusSaveScreen(pCg3->psdp, mode);
 }
Index: xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c:1.15 xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c:1.17
--- xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c:1.15	Thu Mar 16 11:50:16 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c	Tue Jan 23 13:03:08 2007
@@ -20,7 +20,7 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c,v 1.15 2006/03/16 16:50:16 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/suncg6/cg6_driver.c,v 1.17 2007/01/23 18:03:08 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -38,8 +38,8 @@
 static void	CG6Identify(int flags);
 static Bool	CG6Probe(DriverPtr drv, int flags);
 static Bool	CG6PreInit(ScrnInfoPtr pScrn, int flags);
-static Bool	CG6ScreenInit(int Index, ScreenPtr pScreen, int argc,
-			      char **argv);
+static Bool	CG6ScreenInit(int Index, ScreenPtr pScreen,
+			      const int argc, const char **argv);
 static Bool	CG6EnterVT(int scrnIndex, int flags);
 static void	CG6LeaveVT(int scrnIndex, int flags);
 static Bool	CG6CloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -463,7 +463,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-CG6ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+CG6ScreenInit(int scrnIndex, ScreenPtr pScreen,
+	      const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     Cg6Ptr pCg6;
Index: xc/programs/Xserver/hw/xfree86/drivers/sunffb/VISmoveImage.s
diff -u xc/programs/Xserver/hw/xfree86/drivers/sunffb/VISmoveImage.s:1.3 xc/programs/Xserver/hw/xfree86/drivers/sunffb/VISmoveImage.s:1.4
--- xc/programs/Xserver/hw/xfree86/drivers/sunffb/VISmoveImage.s:1.3	Fri Sep 23 01:07:50 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/sunffb/VISmoveImage.s	Mon Jun 19 10:44:14 2006
@@ -21,7 +21,7 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/VISmoveImage.s,v 1.3 2005/09/23 05:07:50 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/VISmoveImage.s,v 1.4 2006/06/19 14:44:14 tsi Exp $ */
 
 
 /* NOTE NOTE NOTE: All loads in these routines _MUST_ be 64-byte block
@@ -783,7 +783,7 @@
 	 sub			%tmp3, %rightw, %curw
 
 return: return			%i7+8
-#ifdef __NetBSD__
+#if defined(__NetBSD__) || defined(__OpenBSD__)
 	 wr			%g0, 4, %fprs
 #else
 	 wr			%g0, 0, %fprs
@@ -2182,7 +2182,7 @@
 	 sub			%curw, %rightw, %curw
 
 rreturn:return			%i7+8
-#ifdef __NetBSD__
+#if defined(__NetBSD__) || defined(__OpenBSD__)
 	 wr			%g0, 4, %fprs
 #else
 	 wr			%g0, 0, %fprs
Index: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h
diff -u xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h:1.14 xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h:1.15
--- xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h:1.14	Fri Oct 14 11:16:46 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h	Sat Jul 22 11:34:08 2006
@@ -24,7 +24,7 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h,v 1.14 2005/10/14 15:16:46 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb.h,v 1.15 2006/07/22 15:34:08 tsi Exp $ */
 
 #ifndef FFB_H
 #define FFB_H
@@ -63,8 +63,8 @@
 #define		FFB_DFB8X_VOFF		0x04c04000
 #define		FFB_DFB24_VOFF		0x05004000
 #ifdef sun
-# define	FFB_DAC_VOFF		0x07018000
-# define	FFB_EXP_VOFF		0x07006000
+# define	FFB_DAC_VOFF		0x07006000
+# define	FFB_EXP_VOFF		0x07018000
 #else
 # define	FFB_DAC_VOFF		0x0bc06000
 # define	FFB_EXP_VOFF		0x0bc18000
Index: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c:1.17 xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c:1.19
--- xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c:1.17	Thu Mar 16 11:50:17 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c	Tue Jan 23 13:03:08 2007
@@ -20,7 +20,7 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c,v 1.17 2006/03/16 16:50:17 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunffb/ffb_driver.c,v 1.19 2007/01/23 18:03:08 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -44,8 +44,8 @@
 static void	FFBIdentify(int flags);
 static Bool	FFBProbe(DriverPtr drv, int flags);
 static Bool	FFBPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool	FFBScreenInit(int Index, ScreenPtr pScreen, int argc,
-			      char **argv);
+static Bool	FFBScreenInit(int Index, ScreenPtr pScreen,
+			      const int argc, const char **argv);
 static Bool	FFBEnterVT(int scrnIndex, int flags);
 static void	FFBLeaveVT(int scrnIndex, int flags);
 static Bool	FFBCloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -664,7 +664,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-FFBScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+FFBScreenInit(int scrnIndex, ScreenPtr pScreen,
+	      const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     FFBPtr pFfb;
Index: xc/programs/Xserver/hw/xfree86/drivers/sunleo/leo_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/sunleo/leo_driver.c:1.13 xc/programs/Xserver/hw/xfree86/drivers/sunleo/leo_driver.c:1.16
--- xc/programs/Xserver/hw/xfree86/drivers/sunleo/leo_driver.c:1.13	Thu Mar 16 11:50:17 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/sunleo/leo_driver.c	Wed Mar 14 22:11:37 2007
@@ -20,7 +20,7 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunleo/leo_driver.c,v 1.13 2006/03/16 16:50:17 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/sunleo/leo_driver.c,v 1.16 2007/03/15 02:11:37 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -40,8 +40,8 @@
 static void	LeoIdentify(int flags);
 static Bool	LeoProbe(DriverPtr drv, int flags);
 static Bool	LeoPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool	LeoScreenInit(int Index, ScreenPtr pScreen, int argc,
-			      char **argv);
+static Bool	LeoScreenInit(int Index, ScreenPtr pScreen,
+			      const int argc, const char **argv);
 static Bool	LeoEnterVT(int scrnIndex, int flags);
 static void	LeoLeaveVT(int scrnIndex, int flags);
 static Bool	LeoCloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -449,7 +449,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-LeoScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+LeoScreenInit(int scrnIndex, ScreenPtr pScreen,
+	      const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     LeoPtr pLeo;
@@ -698,9 +699,9 @@
 /* Mandatory */
 static Bool
 LeoSaveScreen(ScreenPtr pScreen, int mode)
-    /* this function should blank the screen when unblank is FALSE and
-       unblank it when unblank is TRUE -- it doesn't actually seem to be
-       used for much though */
 {
-    return TRUE;
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    LeoPtr pLeo = GET_LEO_FROM_SCRN(pScrn);
+
+    return xf86SbusSaveScreen(pLeo->psdp, mode);
 }
Index: xc/programs/Xserver/hw/xfree86/drivers/suntcx/tcx_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/suntcx/tcx_driver.c:1.12 xc/programs/Xserver/hw/xfree86/drivers/suntcx/tcx_driver.c:1.15
--- xc/programs/Xserver/hw/xfree86/drivers/suntcx/tcx_driver.c:1.12	Thu Mar 16 11:50:17 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/suntcx/tcx_driver.c	Wed Mar 14 22:11:37 2007
@@ -20,7 +20,7 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/suntcx/tcx_driver.c,v 1.12 2006/03/16 16:50:17 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/suntcx/tcx_driver.c,v 1.15 2007/03/15 02:11:37 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -38,8 +38,8 @@
 static void	TCXIdentify(int flags);
 static Bool	TCXProbe(DriverPtr drv, int flags);
 static Bool	TCXPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool	TCXScreenInit(int Index, ScreenPtr pScreen, int argc,
-			      char **argv);
+static Bool	TCXScreenInit(int Index, ScreenPtr pScreen,
+			      const int argc, const char **argv);
 static Bool	TCXEnterVT(int scrnIndex, int flags);
 static void	TCXLeaveVT(int scrnIndex, int flags);
 static Bool	TCXCloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -466,7 +466,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-TCXScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+TCXScreenInit(int scrnIndex, ScreenPtr pScreen,
+	      const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     TcxPtr pTcx;
@@ -741,11 +742,11 @@
 /* Mandatory */
 static Bool
 TCXSaveScreen(ScreenPtr pScreen, int mode)
-    /* this function should blank the screen when unblank is FALSE and
-       unblank it when unblank is TRUE -- it doesn't actually seem to be
-       used for much though */
 {
-    return TRUE;
+    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+    TcxPtr pTcx = GET_TCX_FROM_SCRN(pScrn);
+
+    return xf86SbusSaveScreen(pTcx->psdp, mode);
 }
 
 /*
Index: xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c:1.114 xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c:1.116
--- xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c:1.114	Thu Mar 16 11:50:17 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c	Tue Jan 23 13:03:09 2007
@@ -27,7 +27,7 @@
 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c,v 1.114 2006/03/16 16:50:17 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c,v 1.116 2007/01/23 18:03:09 tsi Exp $ */
 
 /*
  * Authors:
@@ -111,7 +111,7 @@
 static Bool TDFXPreInit(ScrnInfoPtr pScrn, int flags);
 
 /* Initialize a screen */
-static Bool TDFXScreenInit(int Index, ScreenPtr pScreen, int argc, char **argv);
+static Bool TDFXScreenInit(int Index, ScreenPtr pScreen, const int argc, const char **argv);
 
 /* Enter from a virtual terminal */
 static Bool TDFXEnterVT(int scrnIndex, int flags);
@@ -2050,7 +2050,7 @@
 }
 
 static Bool
-TDFXScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) {
+TDFXScreenInit(int scrnIndex, ScreenPtr pScreen, const int argc, const char **argv) {
   ScrnInfoPtr pScrn;
   vgaHWPtr hwp;
   TDFXPtr pTDFX;
Index: xc/programs/Xserver/hw/xfree86/drivers/tga/ICS1562.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/tga/ICS1562.c:1.3 xc/programs/Xserver/hw/xfree86/drivers/tga/ICS1562.c:1.4
--- xc/programs/Xserver/hw/xfree86/drivers/tga/ICS1562.c:1.3	Sat Apr 17 03:06:56 1999
+++ xc/programs/Xserver/hw/xfree86/drivers/tga/ICS1562.c	Sun Dec 10 10:58:31 2006
@@ -1,4 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tga/ICS1562.c,v 1.3 1999/04/17 07:06:56 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tga/ICS1562.c,v 1.4 2006/12/10 15:58:31 tsi Exp $ */
+
+#include "os.h"
 
 #define BASE_FREQ 14.31818
 #define MAX_FREQ 230000
Index: xc/programs/Xserver/hw/xfree86/drivers/tga/tga_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/tga/tga_driver.c:1.65 xc/programs/Xserver/hw/xfree86/drivers/tga/tga_driver.c:1.67
--- xc/programs/Xserver/hw/xfree86/drivers/tga/tga_driver.c:1.65	Thu Mar 16 11:50:18 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/tga/tga_driver.c	Tue Jan 23 13:03:09 2007
@@ -22,7 +22,7 @@
  * Authors:  Alan Hourihane, <alanh@fairlite.demon.co.uk>
  *           Matthew Grossman, <mattg@oz.net> - acceleration and misc fixes
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tga/tga_driver.c,v 1.65 2006/03/16 16:50:18 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tga/tga_driver.c,v 1.67 2007/01/23 18:03:09 tsi Exp $ */
 
 /* everybody includes these */
 #include "xf86.h"
@@ -74,8 +74,8 @@
 static void	TGAIdentify(int flags);
 static Bool	TGAProbe(DriverPtr drv, int flags);
 static Bool	TGAPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool	TGAScreenInit(int Index, ScreenPtr pScreen, int argc,
-			      char **argv);
+static Bool	TGAScreenInit(int Index, ScreenPtr pScreen,
+			      const int argc, const char **argv);
 static Bool	TGAEnterVT(int scrnIndex, int flags);
 static void	TGALeaveVT(int scrnIndex, int flags);
 static Bool	TGACloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -1222,7 +1222,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-TGAScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+TGAScreenInit(int scrnIndex, ScreenPtr pScreen,
+	      const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     TGAPtr pTga;
Index: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c:1.199 xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c:1.202
--- xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c:1.199	Thu Mar 16 11:50:18 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c	Sat Apr 14 19:01:53 2007
@@ -28,7 +28,7 @@
  *	    Massimiliano Ghilardi, max@Linuz.sns.it, some fixes to the
  *				   clockchip programming code.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c,v 1.199 2006/03/16 16:50:18 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/trident/trident_driver.c,v 1.202 2007/04/14 23:01:53 tsi Exp $ */
 
 #include "xf1bpp.h"
 #include "xf4bpp.h"
@@ -70,8 +70,8 @@
 static void	TRIDENTIdentify(int flags);
 static Bool	TRIDENTProbe(DriverPtr drv, int flags);
 static Bool	TRIDENTPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool	TRIDENTScreenInit(int Index, ScreenPtr pScreen, int argc,
-			      char **argv);
+static Bool	TRIDENTScreenInit(int Index, ScreenPtr pScreen,
+				  const int argc, const char **argv);
 static Bool	TRIDENTEnterVT(int scrnIndex, int flags);
 static void	TRIDENTLeaveVT(int scrnIndex, int flags);
 static Bool	TRIDENTCloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -2779,7 +2779,8 @@
 /* This gets called at the start of each server generation */
 
 static Bool
-TRIDENTScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+TRIDENTScreenInit(int scrnIndex, ScreenPtr pScreen,
+		  const int argc, const char **argv)
 {
     /* The vgaHW references will disappear one day */
     ScrnInfoPtr pScrn;
@@ -3185,10 +3186,14 @@
 {
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
     TRIDENTPtr pTrident = TRIDENTPTR(pScrn);
+    vgaHWPtr hwp = VGAHWPTR(pScrn);
 
     if (IsPciCard && UseMMIO) TRIDENTEnableMMIO(pScrn);
 
     /* Should we re-save the text mode on each VT enter? */
+    vgaHWUnlock(hwp);
+    TRIDENTSave(pScrn);
+
     if (!TRIDENTModeInit(pScrn, pScrn->currentMode))
 	return FALSE;
 
Index: xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_acl.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_acl.c:1.25 xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_acl.c:1.26
--- xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_acl.c:1.25	Thu Dec 14 11:33:10 2000
+++ xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_acl.c	Sun Dec 10 10:58:31 2006
@@ -1,5 +1,5 @@
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_acl.c,v 1.25 2000/12/14 16:33:10 eich Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_acl.c,v 1.26 2006/12/10 15:58:31 tsi Exp $ */
 
 
 
@@ -149,7 +149,8 @@
 	/*      MMIO_IN32(pTseng->MMioBase, 0x08<<0) = 200000; *//* TEST */
     }
 #ifdef DEBUG    
-    ErrorF("MMioBase = 0x%x, scratchMemBase = 0x%x\n", pTseng->MMioBase, pTseng->scratchMemBase);
+    ErrorF("MMioBase = 0x%lx, scratchMemBase = 0x%lx\n",
+	   (unsigned long)pTseng->MMioBase, (unsigned long)pTseng->scratchMemBase);
 #endif
 
     /*
Index: xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_driver.c:1.102 xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_driver.c:1.104
--- xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_driver.c:1.102	Thu Mar 16 11:50:19 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_driver.c	Tue Jan 23 13:03:10 2007
@@ -1,5 +1,5 @@
 /*
- * $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_driver.c,v 1.102 2006/03/16 16:50:19 dawes Exp $ 
+ * $XFree86: xc/programs/Xserver/hw/xfree86/drivers/tseng/tseng_driver.c,v 1.104 2007/01/23 18:03:10 tsi Exp $ 
  *
  * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
  *
@@ -60,8 +60,8 @@
 static void TsengIdentify(int flags);
 static Bool TsengProbe(DriverPtr drv, int flags);
 static Bool TsengPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool TsengScreenInit(int Index, ScreenPtr pScreen, int argc,
-    char **argv);
+static Bool TsengScreenInit(int Index, ScreenPtr pScreen, const int argc,
+    const char **argv);
 static Bool TsengEnterVT(int scrnIndex, int flags);
 static void TsengLeaveVT(int scrnIndex, int flags);
 static Bool TsengCloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -2019,7 +2019,8 @@
 }
 
 static Bool
-TsengScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+TsengScreenInit(int scrnIndex, ScreenPtr pScreen,
+    const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     TsengPtr pTseng;
Index: xc/programs/Xserver/hw/xfree86/drivers/v4l/v4l.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/v4l/v4l.c:1.36 xc/programs/Xserver/hw/xfree86/drivers/v4l/v4l.c:1.37
--- xc/programs/Xserver/hw/xfree86/drivers/v4l/v4l.c:1.36	Thu Mar 16 11:50:20 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/v4l/v4l.c	Sun Dec 10 10:58:31 2006
@@ -2,7 +2,7 @@
  *  video4linux Xv Driver 
  *  based on Michael Schimek's permedia 2 driver.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/v4l/v4l.c,v 1.36 2006/03/16 16:50:20 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/v4l/v4l.c,v 1.37 2006/12/10 15:58:31 tsi Exp $ */
 
 #include "videodev.h"
 #include "xf86.h"
@@ -19,7 +19,8 @@
 
 #include <asm/ioctl.h>		/* _IORW(xxx) #defines are here */
 
-#if 0
+#ifdef DEBUG
+# undef DEBUG
 # define DEBUG(x) (x)
 #else
 # define DEBUG(x)
Index: xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c:1.55 xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c:1.57
--- xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c:1.55	Thu Mar 16 11:50:20 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c	Tue Jan 23 13:03:10 2007
@@ -28,7 +28,7 @@
  * Authors: Paulo César Pereira de Andrade <pcpa@conectiva.com.br>
  *          David Dawes <dawes@xfree86.org>
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c,v 1.55 2006/03/16 16:50:20 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vesa/vesa.c,v 1.57 2007/01/23 18:03:10 tsi Exp $
  */
 /*
  * Copyright (c) 2000-2005 by The XFree86 Project, Inc.
@@ -98,8 +98,8 @@
 static void VESAIdentify(int flags);
 static Bool VESAProbe(DriverPtr drv, int flags);
 static Bool VESAPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool VESAScreenInit(int Index, ScreenPtr pScreen, int argc,
-			   char **argv);
+static Bool VESAScreenInit(int Index, ScreenPtr pScreen,
+			   const int argc, const char **argv);
 static Bool VESAEnterVT(int scrnIndex, int flags);
 static void VESALeaveVT(int scrnIndex, int flags);
 static Bool VESACloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -854,7 +854,8 @@
 }
 
 static Bool
-VESAScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+VESAScreenInit(int scrnIndex, ScreenPtr pScreen,
+	       const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
     VESAPtr pVesa = VESAGetRec(pScrn);
Index: xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c:1.69 xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c:1.71
--- xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c:1.69	Thu Mar 16 11:50:21 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c	Tue Jan 23 13:03:10 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c,v 1.69 2006/03/16 16:50:21 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vga/generic.c,v 1.71 2007/01/23 18:03:10 tsi Exp $ */
 /*
  * Copyright (C) 1998 The XFree86 Project, Inc.  All Rights Reserved.
  *
@@ -76,7 +76,8 @@
 static void                 GenericIdentify(int);
 static Bool                 GenericProbe(DriverPtr, int);
 static Bool                 GenericPreInit(ScrnInfoPtr, int);
-static Bool                 GenericScreenInit(int, ScreenPtr, int, char **);
+static Bool                 GenericScreenInit(int, ScreenPtr,
+                                              const int, const char **);
 static Bool                 GenericSwitchMode(int, DisplayModePtr, int);
 static void                 GenericAdjustFrame(int, int, int, int);
 static Bool                 GenericEnterVT(int, int);
@@ -1365,7 +1366,8 @@
 #endif /* SPECIAL_FB_BYTE_ACCESS */
 
 static Bool
-GenericScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+GenericScreenInit(int scrnIndex, ScreenPtr pScreen,
+		  const int argc, const char **argv)
 {
     ScrnInfoPtr pScreenInfo = xf86Screens[scrnIndex];
 
Index: xc/programs/Xserver/hw/xfree86/drivers/via/via_bios.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/via/via_bios.c:1.13 xc/programs/Xserver/hw/xfree86/drivers/via/via_bios.c:1.14
--- xc/programs/Xserver/hw/xfree86/drivers/via/via_bios.c:1.13	Fri Jul 29 11:42:40 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/via/via_bios.c	Sun Dec 10 10:58:31 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_bios.c,v 1.13 2005/07/29 15:42:40 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_bios.c,v 1.14 2006/12/10 15:58:31 tsi Exp $ */
 /*
  * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
  * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
@@ -7202,7 +7202,7 @@
 
     /* Get the start of biosver structure */
     pRom = pTable + VIA_BIOS_BIOSVER_POS;
-    DEBUG(xf86DrvMsg(pBIOSInfo->scrnIndex, X_INFO, "bcpPost: %X\n", i, *((CARD16 *)pRom)));
+    DEBUG(xf86DrvMsg(pBIOSInfo->scrnIndex, X_INFO, "bcpPost: %X\n", *((CARD16 *)pRom)));
     pRom = pBIOS + *((CARD16 *)pRom);
 
     /* The offset should be 44, but the actual image is less three char. */
Index: xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.c:1.45 xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.c:1.47
--- xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.c:1.45	Thu Mar 16 11:50:22 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.c	Tue Jan 23 13:03:11 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.c,v 1.45 2006/03/16 16:50:22 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.c,v 1.47 2007/01/23 18:03:11 tsi Exp $ */
 /*
  * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
  * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
@@ -66,8 +66,8 @@
 static Bool VIASaveScreen(ScreenPtr pScreen, int mode);
 static void VIALoadPalette(ScrnInfoPtr pScrn, int numColors, int *indicies,
 			   LOCO *colors, VisualPtr pVisual);
-static Bool VIAScreenInit(int scrnIndex, ScreenPtr pScreen, int argc,
-			  char **argv);
+static Bool VIAScreenInit(int scrnIndex, ScreenPtr pScreen,
+			  const int argc, const char **argv);
 static int VIAInternalScreenInit(int scrnIndex, ScreenPtr pScreen);
 static void VIAFreeScreen(int scrnIndex, int flags);
 static ModeStatus VIAValidMode(int index, DisplayModePtr mode,
@@ -2268,7 +2268,7 @@
 
 
 static Bool VIAScreenInit(int scrnIndex, ScreenPtr pScreen,
-			  int argc, char **argv)
+			  const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
     vgaHWPtr hwp = VGAHWPTR(pScrn);
Index: xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.h
diff -u xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.h:1.19 xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.h:1.20
--- xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.h:1.19	Sun Aug 28 13:48:03 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.h	Sun Dec 10 10:58:32 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.h,v 1.19 2005/08/28 17:48:03 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/via/via_driver.h,v 1.20 2006/12/10 15:58:32 tsi Exp $ */
 /*
  * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
  * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
@@ -27,7 +27,8 @@
 #define _VIA_DRIVER_H_ 1
 
 /* #define DEBUG_PRINT */
-#ifdef DEBUG_PRINT
+#if defined(DEBUG_PRINT) || defined(DEBUG)
+#undef DEBUG
 #define DEBUG(x) x
 #else
 #define DEBUG(x)
Index: xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c:1.26 xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c:1.29
--- xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c:1.26	Thu Mar 16 11:50:22 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c	Tue Jan 23 13:03:11 2007
@@ -2,7 +2,7 @@
  * Copyright (C) 1998-2001 VMware, Inc.
  * All Rights Reserved
  * **********************************************************/
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c,v 1.26 2006/03/16 16:50:22 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/vmware/vmware.c,v 1.29 2007/01/23 18:03:11 tsi Exp $ */
 
 /*
  * TODO: support the vmware linux kernel fb driver (Option "UseFBDev").
@@ -367,6 +367,10 @@
 static void
 VMWAREIdentify(int flags)
 {
+    char buildString[sizeof(VMWAREBuildStr)];
+
+    RewriteTagString(VMWAREBuildStr, buildString, sizeof(VMWAREBuildStr));
+    xf86MsgVerb(X_PROBED, 4, "%s", buildString);
     xf86PrintChipsets(VMWARE_NAME, "driver for VMware SVGA", VMWAREChipsets);
 }
 
@@ -1125,7 +1129,8 @@
 }
 
 static Bool
-VMWAREScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+VMWAREScreenInit(int scrnIndex, ScreenPtr pScreen,
+                 const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     vgaHWPtr hwp;
@@ -1361,10 +1366,6 @@
     int *usedChips;
     int i;
     Bool foundScreen = FALSE;
-    char buildString[sizeof(VMWAREBuildStr)];
-
-    RewriteTagString(VMWAREBuildStr, buildString, sizeof(VMWAREBuildStr));
-    xf86MsgVerb(X_PROBED, 4, "%s", buildString);
 
     numDevSections = xf86MatchDevice(VMWARE_DRIVER_NAME, &devSections);
     if (numDevSections <= 0) {
Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/init.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/xgi/init.c:1.3 xc/programs/Xserver/hw/xfree86/drivers/xgi/init.c:1.4
--- xc/programs/Xserver/hw/xfree86/drivers/xgi/init.c:1.3	Tue Jun 28 21:14:11 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/xgi/init.c	Sun Dec 10 10:58:32 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/init.c,v 1.3 2005/06/29 01:14:11 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/init.c,v 1.4 2006/12/10 15:58:32 tsi Exp $ */
 /*
  * Mode initializing code (CRT1 section) 
  * (Universal module for Linux kernel framebuffer and XFree86 4.x)
@@ -1652,7 +1652,7 @@
 
    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x\n", ModeNo);
 
-   PDEBUG(ErrorF("C code setmode: ModeNo: 0x%08lX \n",ModeNo));
+   PDEBUG(ErrorF("C code setmode: ModeNo: 0x%04X \n",ModeNo));
 
 /* PDEBUG(XGIDumpRegs(pScrn)) ; */
 /*
Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_setmode.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_setmode.c:1.2 xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_setmode.c:1.3
--- xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_setmode.c:1.2	Mon Jun  6 21:33:39 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_setmode.c	Mon Apr  9 11:37:17 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_setmode.c,v 1.2 2005/06/07 01:33:39 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/vb_setmode.c,v 1.3 2007/04/09 15:37:17 tsi Exp $ */
 
 #include "osdef.h"
 
@@ -4546,6 +4546,10 @@
             *di_0 = ( UCHAR )XGI_VBVCLKData[ tempal ].SR2B ;
             *di_1 = XGI_VBVCLKData[ tempal ].SR2C ;
         }
+        else
+        {
+            *di_0 = *di_1 = 0;
+        }
     }
     else
     {
Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.c:1.1 xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.c:1.2
--- xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.c:1.1	Mon May  2 09:28:02 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.c	Sun Dec 10 10:58:32 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.c,v 1.1 2005/05/02 13:28:02 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_accel.c,v 1.2 2006/12/10 15:58:32 tsi Exp $ */
 /*
 
  *
@@ -116,10 +116,10 @@
  /*   unsigned long ulFlag = 0 ; */
 
     PDEBUG(ErrorF("Volari_InitCmdQueue()\n"));
-    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85c0, XGIMMIOLONG(0x85c0))) ;
-    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85c4, XGIMMIOLONG(0x85c4))) ;
-    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85c8, XGIMMIOLONG(0x85c8))) ;
-    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85cc, XGIMMIOLONG(0x85cc))) ;
+    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n", (unsigned long)pXGI->IOBase, 0x85c0, (unsigned long)XGIMMIOLONG(0x85c0))) ;
+    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n", (unsigned long)pXGI->IOBase, 0x85c4, (unsigned long)XGIMMIOLONG(0x85c4))) ;
+    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n", (unsigned long)pXGI->IOBase, 0x85c8, (unsigned long)XGIMMIOLONG(0x85c8))) ;
+    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n", (unsigned long)pXGI->IOBase, 0x85cc, (unsigned long)XGIMMIOLONG(0x85cc))) ;
 
     inXGIIDXREG(XGICR, 0x55, ulCR55) ;
     andXGIIDXREG(XGICR, 0x55, 0x33) ;
@@ -223,18 +223,18 @@
     temp += pXGI->cmdQueueOffset ;
     pXGI->cmdQueueBase = (unsigned char *)temp ;
 
-    PDEBUG(ErrorF( "pXGI->FbBase = 0x%lX\n", pXGI->FbBase )) ;
-    PDEBUG(ErrorF( "pXGI->cmdQueueOffset = 0x%lX\n", pXGI->cmdQueueOffset )) ;
-    PDEBUG(ErrorF( "pXGI->cmdQueueBase = 0x%lX\n", pXGI->cmdQueueBase )) ;
+    PDEBUG(ErrorF( "pXGI->FbBase = 0x%lX\n", (unsigned long)pXGI->FbBase )) ;
+    PDEBUG(ErrorF( "pXGI->cmdQueueOffset = 0x%lX\n", (unsigned long)pXGI->cmdQueueOffset )) ;
+    PDEBUG(ErrorF( "pXGI->cmdQueueBase = 0x%lX\n", (unsigned long)pXGI->cmdQueueBase )) ;
 
     outXGIIDXREG(XGISR, 0x26, ulSR26) ;
 
     ulXGITempRP=Volari_GetHwRP() ;
 
-    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85c0, XGIMMIOLONG(0x85c0))) ;
-    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85c4, XGIMMIOLONG(0x85c4))) ;
-    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85c8, XGIMMIOLONG(0x85c8))) ;
-    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n",(unsigned long)(pXGI->IOBase),0x85cc, XGIMMIOLONG(0x85cc))) ;
+    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n", (unsigned long)pXGI->IOBase, 0x85c0, (unsigned long)XGIMMIOLONG(0x85c0))) ;
+    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n", (unsigned long)pXGI->IOBase, 0x85c4, (unsigned long)XGIMMIOLONG(0x85c4))) ;
+    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n", (unsigned long)pXGI->IOBase, 0x85c8, (unsigned long)XGIMMIOLONG(0x85c8))) ;
+    PDEBUG(ErrorF( "pXGI->IOBase = 0x%08lX, [%04X] = 0x%08lX\n", (unsigned long)pXGI->IOBase, 0x85cc, (unsigned long)XGIMMIOLONG(0x85cc))) ;
 
     /* XGI315 */
     pXGI->cmdQueue_shareWP_only2D = ulXGITempRP;
Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.c:1.2 xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.c:1.3
--- xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.c:1.2	Mon Jun  6 21:33:39 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.c	Sun Dec 10 10:58:32 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.c,v 1.2 2005/06/07 01:33:39 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_dac.c,v 1.3 2006/12/10 15:58:32 tsi Exp $ */
 /*
  * DAC helper functions (Save/Restore, MemClk, etc)
  *
@@ -177,7 +177,7 @@
     double Fvco, Fout;
     double error, aerror;
 #ifdef DEBUG
-    double bestFout;
+    double bestFout = 0;
 #endif
 
     /*
@@ -345,7 +345,7 @@
     PDEBUG(ErrorF("--- MMIO Info. \n")) ;
 	for( i = 0x85c0 ;i <= 0x85CC ; i+=4 )
 	{
-		ErrorF("MMIO[0x%04lX] = 0x%08X\n", i, MMIO_IN32(pXGI->IOBase,i)) ;
+		ErrorF("MMIO[0x%04X] = 0x%08X\n", i, MMIO_IN32(pXGI->IOBase,i)) ;
 	}
 #endif
 #else
Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.c:1.9 xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.c:1.12
--- xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.c:1.9	Thu Mar 16 11:50:23 2006
+++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.c	Tue Jan 23 13:03:11 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.c,v 1.9 2006/03/16 16:50:23 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.c,v 1.12 2007/01/23 18:03:11 tsi Exp $ */
 /*
  * XGI driver main code
  *
@@ -3961,7 +3961,7 @@
  * depth, bitsPerPixel)
  */
 static Bool
-XGIScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
+XGIScreenInit(int scrnIndex, ScreenPtr pScreen, const int argc, const char **argv)
 {
     ScrnInfoPtr pScrn;
     vgaHWPtr hwp;
@@ -5127,7 +5127,7 @@
 #endif
 
 #ifdef DEBUG
-static void
+void
 XGIDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode)
 {
     xf86DrvMsg(pScrn->scrnIndex,X_INFO, "Clock : %x\n", mode->Clock);
@@ -6119,7 +6119,7 @@
     ErrorF("----------------------------------------------------------------------\n") ;
     for( i = 0 ; i < 0x40 ; i++ ){
         inXGIIDXREG(XGISR, i, temp ) ;
-        ErrorF("SR%02X = 0x%02X   ", i, temp ) ;
+        ErrorF("SR%02X = 0x%02lX   ", i, temp ) ;
         if( ((i+1) % 4) == 0 )
         {
             ErrorF("\n") ;
@@ -6135,7 +6135,7 @@
     ErrorF("----------------------------------------------------------------------\n") ;
     for( i = 0 ; i < 0x80 ; i++ ){
         inXGIIDXREG(XGICR, i, temp ) ;
-        ErrorF("CR%02X = 0x%02X   ", i, temp ) ;
+        ErrorF("CR%02X = 0x%02lX   ", i, temp ) ;
         if( ((i+1) % 4) == 0 )
         {
             ErrorF("\n") ;
@@ -6151,7 +6151,7 @@
     ErrorF("----------------------------------------------------------------------\n") ;
     for( i = 0 ; i < 0x9 ; i++ ){
         inXGIIDXREG(XGIGR, i, temp ) ;
-        ErrorF("GR%02X = 0x%02X   ", i, temp ) ;
+        ErrorF("GR%02X = 0x%02lX   ", i, temp ) ;
         if( ((i+1) % 4) == 0 )
         {
             ErrorF("\n") ;
@@ -6168,7 +6168,7 @@
     ErrorF("----------------------------------------------------------------------\n") ;
     for( i = 0 ; i < 0x100 ; i++ ){
         inXGIIDXREG(XGIPART1, i, temp ) ;
-        ErrorF("PART1_%02X = 0x%02X   ", i, temp ) ;
+        ErrorF("PART1_%02X = 0x%02lX   ", i, temp ) ;
         if( ((i+1) % 4) == 0 )
         {
             ErrorF("\n") ;
@@ -6185,7 +6185,7 @@
     ErrorF("----------------------------------------------------------------------\n") ;
     for( i = 0 ; i < 0x100 ; i++ ){
         inXGIIDXREG(XGIPART2, i, temp ) ;
-        ErrorF("PART2_%02X = 0x%02X   ", i, temp ) ;
+        ErrorF("PART2_%02X = 0x%02lX   ", i, temp ) ;
         if( ((i+1) % 4) == 0 )
         {
             ErrorF("\n") ;
@@ -6202,7 +6202,7 @@
     ErrorF("----------------------------------------------------------------------\n") ;
     for( i = 0 ; i < 0x100 ; i++ ){
         inXGIIDXREG(XGIPART3, i, temp ) ;
-        ErrorF("PART3_%02X = 0x%02X   ", i, temp ) ;
+        ErrorF("PART3_%02X = 0x%02lX   ", i, temp ) ;
         if( ((i+1) % 4) == 0 )
         {
             ErrorF("\n") ;
@@ -6219,7 +6219,7 @@
     ErrorF("----------------------------------------------------------------------\n") ;
     for( i = 0 ; i < 0x100 ; i++ ){
         inXGIIDXREG(XGIPART4, i, temp ) ;
-        ErrorF("PART4_%02X = 0x%02X   ", i, temp ) ;
+        ErrorF("PART4_%02X = 0x%02lX   ", i, temp ) ;
         if( ((i+1) % 4) == 0 )
         {
             ErrorF("\n") ;
Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.h
diff -u xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.h:1.2 xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.h:1.5
--- xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.h:1.2	Mon Jun  6 21:33:39 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.h	Tue Jan 23 13:03:11 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.h,v 1.2 2005/06/07 01:33:39 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_driver.h,v 1.5 2007/01/23 18:03:11 tsi Exp $ */
 /*
  * Global data and definitions
  *
@@ -893,7 +893,7 @@
 static void XGIIdentify(int flags);
 static Bool XGIProbe(DriverPtr drv, int flags);
 static Bool XGIPreInit(ScrnInfoPtr pScrn, int flags);
-static Bool XGIScreenInit(int Index, ScreenPtr pScreen, int argc, char **argv);
+static Bool XGIScreenInit(int Index, ScreenPtr pScreen, const int argc, const char **argv);
 static Bool XGIEnterVT(int scrnIndex, int flags);
 static void XGILeaveVT(int scrnIndex, int flags);
 static Bool XGICloseScreen(int scrnIndex, ScreenPtr pScreen);
@@ -940,7 +940,7 @@
 				 unsigned long VBFlags, BOOLEAN hcm);
 unsigned char  XGI_GetSetBIOSScratch(ScrnInfoPtr pScrn, USHORT offset, unsigned char value);
 #ifdef DEBUG
-static void    XGIDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode);
+void           XGIDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode);
 #endif
 
 extern USHORT   XGI_GetModeID(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_setup.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_setup.c:1.4 xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_setup.c:1.5
--- xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_setup.c:1.4	Fri Oct 14 11:16:49 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_setup.c	Sun Dec 10 10:58:32 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_setup.c,v 1.4 2005/10/14 15:16:49 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_setup.c,v 1.5 2006/12/10 15:58:32 tsi Exp $ */
 /*
  * Basic hardware and memory detection
  *
@@ -138,7 +138,7 @@
     inXGIIDXREG(XGISR, 0x3A, ulDramType) ;
 
     PDEBUG(ErrorF("xg40_Setup(): ulMemConfig = %02X\n",ulMemConfig)) ;
-    PDEBUG(ErrorF("xg40_Setup(): ulDramType = %02X\n",ulDramType)) ;
+    PDEBUG(ErrorF("xg40_Setup(): ulDramType = %02lX\n",ulDramType)) ;
     (void)ulDramType;
 
     pXGI->BusWidth = (ulMemConfig & (1<<1) )?64:32 ;
@@ -393,7 +393,8 @@
         pHwDevInfo -> szVBIOSVer[i] = '\0' ;
     }
 
-    PDEBUG(ErrorF("pHwDevInfo->jChipType = %08lX done\n",pHwDevInfo->jChipType)) ;
+    PDEBUG(ErrorF("pHwDevInfo->jChipType = %08lX done\n",
+		  (unsigned long)pHwDevInfo->jChipType)) ;
     XGINew_InitVBIOSData(pHwDevInfo,pXGI->pVBInfo) ;
     PDEBUG(ErrorF("XGINew_InitVBIOSData(pHwDevInfo) done\n")) ;
     return TRUE ;
Index: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vga.c
diff -u xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vga.c:1.2 xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vga.c:1.3
--- xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vga.c:1.2	Mon Jun  6 21:33:39 2005
+++ xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vga.c	Sun Dec 10 10:58:32 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vga.c,v 1.2 2005/06/07 01:33:39 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/xgi/xgi_vga.c,v 1.3 2006/12/10 15:58:32 tsi Exp $ */
 /*
  * Mode setup and basic video bridge detection
  *
@@ -111,9 +111,9 @@
     pXGI->scrnOffset >>= 4 ;
     pXGI->scrnOffset <<= 4 ;
 
-    PDEBUG(ErrorF("XG40Init: pScrn->displayWidth = %ld\n",pScrn->displayWidth )) ;
-    PDEBUG(ErrorF("XG40Init: pScrn->bitsPerPixel = %ld\n",pScrn->bitsPerPixel )) ;
-    PDEBUG(ErrorF("XG40Init: pXGI->scrnOffset = %ld\n",pXGI->scrnOffset )) ;
+    PDEBUG(ErrorF("XG40Init: pScrn->displayWidth = %d\n",pScrn->displayWidth )) ;
+    PDEBUG(ErrorF("XG40Init: pScrn->bitsPerPixel = %d\n",pScrn->bitsPerPixel )) ;
+    PDEBUG(ErrorF("XG40Init: pXGI->scrnOffset = %ld\n", (unsigned long)pXGI->scrnOffset )) ;
 
     pReg->xgiRegs3D4[0x19] = 0;
     pReg->xgiRegs3D4[0x1A] &= 0xFC;
Index: xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c
diff -u xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c:1.2 xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c:1.3
--- xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c:1.2	Fri Oct 14 11:16:50 2005
+++ xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c	Sat Feb 24 10:51:26 2007
@@ -1,19 +1,52 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c,v 1.2 2005/10/14 15:16:50 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/dummylib/xf86getpagesize.c,v 1.3 2007/02/24 15:51:26 tsi Exp $ */
 
-#include <X11/X.h>
-#include "os.h"
-#include "xf86.h"
-#include "xf86Priv.h"
+#define DONT_DEFINE_WRAPPERS
+#include "xf86_ansic.h"
+
+#if defined(linux)
+#define HAS_SC_PAGESIZE
+#define HAS_GETPAGESIZE
+#elif defined(CSRG_BASED)
+#define HAS_GETPAGESIZE
+#elif defined(DGUX)
+#define HAS_GETPAGESIZE
+#elif defined(sun) && !defined(SVR4)
+#define HAS_GETPAGESIZE
+#endif
+#ifdef XNO_SYSCONF
+#undef _SC_PAGESIZE
+#endif
 
 /*
- * Utility functions required by libxf86_os. 
+ * Utility functions required by libxf86_os.
  */
 
-int xf86getpagesize(void);
-
 int
 xf86getpagesize(void)
 {
-    return 4096;	/* not used */
+    static int pagesize = -1;
+
+    if (pagesize != -1)
+        return pagesize;
+
+#if defined(_SC_PAGESIZE) || defined(HAS_SC_PAGESIZE)
+    pagesize = sysconf(_SC_PAGESIZE);
+#endif
+#ifdef _SC_PAGE_SIZE
+    if (pagesize == -1)
+        pagesize = sysconf(_SC_PAGE_SIZE);
+#endif
+#ifdef HAS_GETPAGESIZE
+    if (pagesize == -1)
+        pagesize = getpagesize();
+#endif
+#ifdef PAGE_SIZE
+    if (pagesize == -1)
+        pagesize = PAGE_SIZE;
+#endif
+    if (pagesize == -1)
+        pagesize = 4096;
+
+    return pagesize;
 }
 
Index: xc/programs/Xserver/hw/xfree86/etc/Imakefile
diff -u xc/programs/Xserver/hw/xfree86/etc/Imakefile:3.55 xc/programs/Xserver/hw/xfree86/etc/Imakefile:3.56
--- xc/programs/Xserver/hw/xfree86/etc/Imakefile:3.55	Mon Jan  9 10:00:15 2006
+++ xc/programs/Xserver/hw/xfree86/etc/Imakefile	Tue May 16 10:01:23 2006
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/etc/Imakefile,v 3.55 2006/01/09 15:00:15 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/etc/Imakefile,v 3.56 2006/05/16 14:01:23 tsi Exp $
 
 #include <Server.tmpl>
 
@@ -59,7 +59,9 @@
 
 all:: $(FILES)
 
-#if defined(FreeBSDArchitecture) || defined(NetBSDArchitecture) || defined(OpenBSDArchitecture)
+#if defined(FreeBSDArchitecture) || \
+    defined(NetBSDArchitecture) || \
+    defined(OpenBSDArchitecture)
        SRCS1 = kbd_mode.c
      DEFINES = XFree86ConsoleDefines
 
@@ -71,7 +73,6 @@
 InstallManPage(kbd_mode,$(MANDIR))
 #endif
 
-#if BuildScanpci
        SRCS2 = scanpci.c
 
 #if defined(i386Architecture) && \
@@ -87,7 +88,6 @@
 NormalProgramTarget(scanpci,scanpci.o,$(XF86OSSRC)/libxf86_os.a ../scanpci/libscanpci.a ../dummylib/libdummy.a,-L../os-support -lxf86_os -L../scanpci -lscanpci -L../dummylib -ldummy $(SERVEREXTRASYSLIBS),NullParameter)
 InstallProgram(scanpci,$(BINDIR))
 InstallManPage(scanpci,$(MANDIR))
-#endif
 
 #if JoystickSupport
        SRCS3 = joycal.c
Index: xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh
diff -u xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh:1.96 xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh:1.97
--- xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh:1.96	Tue May  9 20:25:38 2006
+++ xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh	Sun Aug 12 20:57:48 2007
@@ -1,7 +1,7 @@
 #!/bin/sh
 
 #
-# $XFree86: xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh,v 1.96 2006/05/10 00:25:38 dawes Exp $
+# $XFree86: xc/programs/Xserver/hw/xfree86/etc/Xinstall.sh,v 1.97 2007/08/13 00:57:48 dawes Exp $
 #
 # Copyright © 2000 by Precision Insight, Inc.
 # Copyright © 2000, 2001 by VA Linux Systems, Inc.
@@ -31,7 +31,7 @@
 #
 
 #
-# Copyright © 1996-2006 by The XFree86 Project, Inc.
+# Copyright © 1996-2007 by The XFree86 Project, Inc.
 # All rights reserved.
 #
 # Permission is hereby granted, free of charge, to any person obtaining
@@ -78,7 +78,7 @@
 #
 
 #
-# This script should be used to install XFree86 4.5.99.903
+# This script should be used to install XFree86 4.7.0
 #
 # Parts of this script are based on the old preinst.sh and postinst.sh
 # scripts.
@@ -118,7 +118,7 @@
 	PATCHLEVEL=0
 	FULLVERSION=$VERSION
 else
-	FULLPREFIX=4.6
+	FULLPREFIX=4.7
 	PATCHLEVEL=0
 	VERSION=$FULLPREFIX.$PATCHLEVEL
 	FULLVERSION=$FULLPREFIX.0
Index: xc/programs/Xserver/hw/xfree86/etc/apSolaris.shar
diff -u xc/programs/Xserver/hw/xfree86/etc/apSolaris.shar:1.3 xc/programs/Xserver/hw/xfree86/etc/apSolaris.shar:1.4
--- xc/programs/Xserver/hw/xfree86/etc/apSolaris.shar:1.3	Fri Oct  4 15:45:33 2002
+++ xc/programs/Xserver/hw/xfree86/etc/apSolaris.shar	Mon Jul 10 18:19:11 2006
@@ -1,40 +1,26 @@
-#!/bin/sh
-# $XFree86: xc/programs/Xserver/hw/xfree86/etc/apSolaris.shar,v 1.3 2002/10/04 19:45:33 tsi Exp $
-# This is a shell archive (produced by GNU sharutils 4.2c).
-# To extract the files from this archive, save it to some FILE, remove
-# everything before the `!/bin/sh' line above, then type `sh FILE'.
+#! /bin/sh
+# $XFree86: xc/programs/Xserver/hw/xfree86/etc/apSolaris.shar,v 1.4 2006/07/10 22:19:11 tsi Exp $
+
+# This is a shell archive.  Save it in a file, remove anything before
+# this line, and then unpack it by entering "sh file".  Note, it may
+# create directories; files and directories will be owned by you and
+# have default permissions.
 #
-# Made on 2002-10-04 13:41 MDT by <root@abcyxhiz>.
-# Source directory was `/archives'.
+# This archive contains:
 #
-# Existing files will *not* be overwritten unless `-c' is specified.
-# This format requires very little intelligence at unshar time.
-# "if test", "echo", "mkdir", and "sed" may be needed.
+#	aperture
+#	aperture/Makefile
+#	aperture/Makefile.amd64
+#	aperture/Makefile.sparcv9
+#	aperture/README
+#	aperture/aperture.c
+#	aperture/aperture.conf
+#	aperture/devlink.tab
 #
-# This shar contains:
-# length mode       name
-# ------ ---------- ------------------------------------------
-#   1521 -rw-r--r-- aperture/Makefile
-#   1659 -rw-r--r-- aperture/README
-#   7557 -rw-r--r-- aperture/aperture.c
-#    450 -rw-r--r-- aperture/aperture.conf
-#     87 -rw-r--r-- aperture/devlink.tab
-#   1062 -rw-r--r-- aperture/Makefile.sun4u
-#
-echo=echo
-shar_tty= shar_n= shar_c='
-'
-mkdir _sh09806 || ( echo 'failed to create locking directory' '_sh09806'; exit 1 )
-# ============= aperture/Makefile ==============
-if test ! -d 'aperture'; then
-  $echo $echo_n 'x -' 'aperture: '$echo_c
-  if mkdir 'aperture'; then $echo 'created'; else $echo 'failed to create'; fi
-fi
-if test -f 'aperture/Makefile' && test "$first_param" != -c; then
-  $echo 'x -' SKIPPING 'aperture/Makefile' '(file already exists)'
-else
-  $echo 'x -' extracting 'aperture/Makefile' '(text)'
-  sed 's/^X//' << 'SHAR_EOF' > 'aperture/Makefile' &&
+echo c - aperture
+mkdir -p aperture > /dev/null 2>&1
+echo x - aperture/Makefile
+sed 's/^X//' >aperture/Makefile << 'END-of-aperture/Makefile'
 X#
 X#   File: makefile for aperture Framebuffer Driver
 X# Author: Doug Anson (danson@lgc.com)
@@ -46,14 +32,22 @@
 X#   Date: 2001.06.08
 X#   - SPARC support, cleanup and turf aptest.
 X#
-X# >>NOTE<< Have a look at Makefile.sun4u for sun4u specifics.
+X# >>NOTE<< Have a look at Makefile.sparcv9 for sparcv9 specifics.
+X#
+X# Modified: Martin Bochnig (martin@martux.org)
+X#   Date: 2006.06.24
+X#   - Slightly modified to also build on Solaris 10 and 11.
+X#   - amd64 64 bit kernel support
+X#   - cosmetic changes to also support sun4v, not only sun4u
+X#
+X# >>NOTE<< Have a look at Makefile.amd64 for amd64 specifics.
 X#
 X# GNU gcc compiler
 XCC=gcc
 XCFLGS=-fno-builtin -Wall -O3
 X
 X#
-X# Proworks compiler
+X# SUNWspro compiler
 X#CC=/opt/SUNWspro/bin/cc
 X#CFLGS=-Xa -xnolib -xO3
 X
@@ -75,26 +69,26 @@
 Xall: $(DRIVER)
 X
 X$(DRIVER): $(OBJS)
-X	@if [ -f "Makefile.`uname -m`" ]; then \
-X		make -f Makefile.`uname -m` $(DRIVER); \
+X	@if [ -f "Makefile.`isainfo -k`" ]; then \
+X		make -f Makefile.`isainfo -k` $(DRIVER); \
 X	else \
 X		rm -f $(DRIVER); \
 X		ld -r -o $(DRIVER) $(OBJS); \
 X	fi
 X
 Xinstall: $(DRIVER)
-X	@if [ -f "Makefile.`uname -m`" ]; then \
-X		make -f Makefile.`uname -m` install; \
+X	@if [ -f "Makefile.`isainfo -k`" ]; then \
+X		make -f Makefile.`isainfo -k` install; \
 X	else \
 X		cp aperture.conf /kernel/drv; \
 X		cp $(DRIVER) /kernel/drv; \
 X	fi
 X
 Xadd_drv:
-X	@if [ -f "Makefile.`uname -m`" ]; then \
-X		make -f Makefile.`uname -m` add_drv; \
+X	@if [ -f "Makefile.`isainfo -k`" ]; then \
+X		make -f Makefile.`isainfo -k` add_drv; \
 X	else \
-X		add_drv /kernel/drv/aperture; \
+X		add_drv aperture; \
 X	fi
 X
 Xclean:
@@ -106,39 +100,164 @@
 X	$(CC) -E $(CFLAGS) $*.c > $@
 X
 X.c.o:
-X	@if [ -f "Makefile.`uname -m`" ]; then \
-X		make -f Makefile.`uname -m` $@; \
+X	@if [ -f "Makefile.`isainfo -k`" ]; then \
+X		make -f Makefile.`isainfo -k` $@; \
 X	else \
 X		rm -f $@; \
 X		$(CC) -c $(CFLAGS) $*.c -o $@; \
 X	fi
-SHAR_EOF
-  : || $echo 'restore of' 'aperture/Makefile' 'failed'
-fi
-# ============= aperture/README ==============
-if test -f 'aperture/README' && test "$first_param" != -c; then
-  $echo 'x -' SKIPPING 'aperture/README' '(file already exists)'
-else
-  $echo 'x -' extracting 'aperture/README' '(text)'
-  sed 's/^X//' << 'SHAR_EOF' > 'aperture/README' &&
-XFramebuffer apperture driver.
+END-of-aperture/Makefile
+echo x - aperture/Makefile.amd64
+sed 's/^X//' >aperture/Makefile.amd64 << 'END-of-aperture/Makefile.amd64'
+X#
+X#   File: Makefile for aperture Framebuffer Driver
+X# Author: Doug Anson (danson@lgc.com)
+X#   Date: 2/15/94
+X# Modified: David Holland (davidh@use.com)
+X#   Date: 2/23/94
+X#   - Changed name, and debugging structure
+X# Modified: Marc Aurele La France (tsi@xfree86.org)
+X#   Date: 2001.06.08
+X#   - SPARC support, cleanup and turf aptest.
+X# Modified: Martin Bochnig (martin@martux.org)
+X#   - amd64 64 bit kernel support, cosmetics and also
+X#     supporting sun4v (and arbitrary sparcv9) platforms
+X#     as well as SunOS 5.10 or higher now
+X#   - Changed name
+X#
+X
+X#
+X# GNU gcc compiler, version 3.2 or later
+X#
+XCC=gcc
+XCFLGS=-fno-builtin -Wall -O3 -m64 -mcmodel=kernel
+X
+X#
+X# SUNWspro compiler (untested, might not properly work for amd64 here)
+X#CC=/opt/SUNWspro/bin/cc
+X#CFLGS=-Xa -xarch=v9 -xnolib -xO3
+X
+X#
+X# Debug error reporting
+X#DEBUG_FLG=
+X#DEBUG_FLG=-DAPERTURE_DEBUG
+X
+X#
+X# Files and object declarations
+XKERNEL_FLGS=-D_KERNEL -DSUNDDI
+XCFLAGS= $(CFLGS) $(KERNEL_FLGS) $(DEBUG_FLG)
+XCFILES= aperture.c
+XOBJS= aperture.o
+XDRIVER= aperture
+X
+X#
+X# Make rules
+Xall: $(DRIVER)
+X
+X$(DRIVER): $(OBJS)
+X	rm -f $(DRIVER)
+X	ld -r -o $(DRIVER) $(OBJS)
+X
+Xinstall: $(DRIVER)
+X	cp aperture.conf /kernel/drv
+X	cp $(DRIVER) /kernel/drv/amd64
+X
+Xadd_drv:
+X	add_drv aperture
+X
+Xclean:
+X	rm -f *% *.BAK $(OBJS) $(DRIVER) core
+X
+X.SUFFIXES: .i
+X
+X.c.i:
+X	$(CC) -E $(CFLAGS) $*.c > $@
+END-of-aperture/Makefile.amd64
+echo x - aperture/Makefile.sparcv9
+sed 's/^X//' >aperture/Makefile.sparcv9 << 'END-of-aperture/Makefile.sparcv9'
+X#
+X#   File: Makefile for aperture Framebuffer Driver
+X# Author: Doug Anson (danson@lgc.com)
+X#   Date: 2/15/94
+X# Modified: David Holland (davidh@use.com)
+X#   Date: 2/23/94
+X#   - Changed name, and debugging structure
+X# Modified: Marc Aurele La France (tsi@xfree86.org)
+X#   Date: 2001.06.08
+X#   - SPARC support, cleanup and turf aptest.
+X# Modified: Martin Bochnig (martin@martux.org)
+X#   Date: 2006.06.24
+X#   - Changed name for generic sparcv9 support
+X#   - updated to better work with Solaris 10 and 11
+X#
+X
+X#
+X# GNU gcc compiler, version 3.2 or later
+X#
+XCC=gcc
+XCFLGS=-fno-builtin -Wall -O3 -m64
+X
+X#
+X# SUNWspro compiler
+X#CC=/opt/SUNWspro/bin/cc
+X#CFLGS=-Xa -xarch=v9 -xnolib -xO3
+X
+X#
+X# Debug error reporting
+X#DEBUG_FLG=
+X#DEBUG_FLG=-DAPERTURE_DEBUG
+X
+X#
+X# Files and object declarations
+XKERNEL_FLGS=-D_KERNEL -DSUNDDI
+XCFLAGS= $(CFLGS) $(KERNEL_FLGS) $(DEBUG_FLG)
+XCFILES= aperture.c
+XOBJS= aperture.o
+XDRIVER= aperture
+X
+X#
+X# Make rules
+Xall: $(DRIVER)
+X
+X$(DRIVER): $(OBJS)
+X	rm -f $(DRIVER)
+X	ld -r -o $(DRIVER) $(OBJS)
+X
+Xinstall: $(DRIVER)
+X	cp aperture.conf /kernel/drv
+X	cp $(DRIVER) /kernel/drv/sparcv9
+X
+Xadd_drv:
+X	add_drv aperture
+X
+Xclean:
+X	rm -f *% *.BAK $(OBJS) $(DRIVER) core
+X
+X.SUFFIXES: .i
+X
+X.c.i:
+X	$(CC) -E $(CFLAGS) $*.c > $@
+END-of-aperture/Makefile.sparcv9
+echo x - aperture/README
+sed 's/^X//' >aperture/README << 'END-of-aperture/README'
+XFramebuffer aperture driver.
 X
 XThis driver was written to provide a device that, unlike /dev/mem, allows
 Xmmap()'ing of ranges beyond installed memory.
 X
-XThe original x86-based version of this driver was the corroborative work of
+XThe original x86-based version of this driver was the collaborative work of
 XDoug Anson (danson@lgc.com), and David Holland (davidh@use.com).  It has since
-Xbeen rewritten to also work on sun4u machines.
+Xbeen rewritten to also work on SPARC and amd64 machines.
 X
 X
 XInstallation instructions:
 X
 X1) Check the Makefile, for appropriate CC, and CFLAGS definitions.  Compiling
-X   with APERTURE_DEBUG defined means the driver will generate reams of
+X   with APERTURE_DEBUG defined means the driver will generate streams of
 X   debugging output.  You'll probably want to leave this off...
 X
-X2) type 'make'.  The driver and test program should compile with out any
-X   problems.  There also should not be any warning messages.
+X2) type 'make' (or 'gmake').  The driver should compile without any problems.
+X   No warning messages should be generated.
 X
 X3) Become 'root'.
 X
@@ -148,10 +267,11 @@
 X	# make install
 X	cp aperture aperture.conf /kernel/drv
 X	# make add_drv
-X	add_drv /kernel/drv/aperture
+X	add_drv aperture
 X
-X   On a sun4u machine this will mention the /kernel/drv/sparcv9 directory
-X   instead of /kernel/drv.
+X   On a sparcv9 machine this will mention the /kernel/drv/sparcv9 directory
+X   instead of /kernel/drv.  Similarly, /kernel/drv/amd64 should be used for
+X   amd64 machines.
 X
 X   This installs the driver in the system.
 X
@@ -163,7 +283,7 @@
 X   Add that line exactly as shown. You may also simply add the
 X   contents of the devlink.tab file supplied to /etc/devlink.tab.
 X   It contains the lines as well.  (Yes, that is a tab between
-X   aperture, and fbs, not spaces - very important)
+X   aperture and fbs, not spaces - very important)
 X
 X6) Perform a reconfiguration boot of the system.
 X
@@ -171,15 +291,9 @@
 X	# init 6
 X
 XBug reports, questions, suggestions, etc can be sent to xfree86@xfree86.org.
-SHAR_EOF
-  : || $echo 'restore of' 'aperture/README' 'failed'
-fi
-# ============= aperture/aperture.c ==============
-if test -f 'aperture/aperture.c' && test "$first_param" != -c; then
-  $echo 'x -' SKIPPING 'aperture/aperture.c' '(file already exists)'
-else
-  $echo 'x -' extracting 'aperture/aperture.c' '(text)'
-  sed 's/^X//' << 'SHAR_EOF' > 'aperture/aperture.c' &&
+END-of-aperture/README
+echo x - aperture/aperture.c
+sed 's/^X//' >aperture/aperture.c << 'END-of-aperture/aperture.c'
 X/*
 X * Copyright (C) 2001 The XFree86 Project, Inc.  All Rights Reserved.
 X *
@@ -228,6 +342,17 @@
 X#define NULL ((void *)0)
 X#endif
 X
+X/* Tolerate Solaris 10 & above */
+X#ifndef DDI_NOT_IDENTIFIED
+X#define DDI_NOT_IDENTIFIED 1
+X#endif
+X#ifndef DDI_IDENTIFIED
+X#define DDI_IDENTIFIED 2
+X#endif
+X#ifndef NODESPECIFIC_DEV
+X#define NODESPECIFIC_DEV 0
+X#endif
+X
 X/*
 X * open(9E)
 X */
@@ -653,15 +778,9 @@
 X
 X	return error;
 X}
-SHAR_EOF
-  : || $echo 'restore of' 'aperture/aperture.c' 'failed'
-fi
-# ============= aperture/aperture.conf ==============
-if test -f 'aperture/aperture.conf' && test "$first_param" != -c; then
-  $echo 'x -' SKIPPING 'aperture/aperture.conf' '(file already exists)'
-else
-  $echo 'x -' extracting 'aperture/aperture.conf' '(text)'
-  sed 's/^X//' << 'SHAR_EOF' > 'aperture/aperture.conf' &&
+END-of-aperture/aperture.c
+echo x - aperture/aperture.conf
+sed 's/^X//' >aperture/aperture.conf << 'END-of-aperture/aperture.conf'
 X#
 X# Copyright 1994 Doug Anson, danson@lgc.com & David Holland, davidh@use.com
 X#
@@ -678,91 +797,11 @@
 X# Purpose:  This conf file is used by the aperture driver.
 X#
 Xname="aperture" parent="pseudo";
-SHAR_EOF
-  : || $echo 'restore of' 'aperture/aperture.conf' 'failed'
-fi
-# ============= aperture/devlink.tab ==============
-if test -f 'aperture/devlink.tab' && test "$first_param" != -c; then
-  $echo 'x -' SKIPPING 'aperture/devlink.tab' '(file already exists)'
-else
-  $echo 'x -' extracting 'aperture/devlink.tab' '(text)'
-  sed 's/^X//' << 'SHAR_EOF' > 'aperture/devlink.tab' &&
+END-of-aperture/aperture.conf
+echo x - aperture/devlink.tab
+sed 's/^X//' >aperture/devlink.tab << 'END-of-aperture/devlink.tab'
 X# The following entry is for the aperture driver
 Xtype=ddi_pseudo;name=aperture	fbs/\M0
-SHAR_EOF
-  : || $echo 'restore of' 'aperture/devlink.tab' 'failed'
-fi
-# ============= aperture/Makefile.sun4u ==============
-if test -f 'aperture/Makefile.sun4u' && test "$first_param" != -c; then
-  $echo 'x -' SKIPPING 'aperture/Makefile.sun4u' '(file already exists)'
-else
-  $echo 'x -' extracting 'aperture/Makefile.sun4u' '(text)'
-  sed 's/^X//' << 'SHAR_EOF' > 'aperture/Makefile.sun4u' &&
-X#
-X#   File: makefile for aperture Framebuffer Driver
-X# Author: Doug Anson (danson@lgc.com)
-X#   Date: 2/15/94
-X# Modified: David Holland (davidh@use.com)
-X#   Date: 2/23/94
-X#   - Changed name, and debugging structure
-X# Modified: Marc Aurele La France (tsi@xfree86.org)
-X#   Date: 2001.06.08
-X#   - SPARC support, cleanup and turf aptest.
-X#
-X
-X#
-X# GNU gcc compiler, version 3.2 or later
-X#
-XCC=gcc
-XCFLGS=-fno-builtin -Wall -O3 -m64
-X
-X#
-X# Proworks compiler
-X#CC=/opt/SUNWspro/bin/cc
-X#CFLGS=-Xa -xarch=v9 -xnolib -xO3
-X
-X#
-X# Debug error reporting
-X#DEBUG_FLG=
-X#DEBUG_FLG=-DAPERTURE_DEBUG
-X
-X#
-X# Files and object declarations
-XKERNEL_FLGS=-D_KERNEL -DSUNDDI
-XCFLAGS= $(CFLGS) $(KERNEL_FLGS) $(DEBUG_FLG)
-XCFILES= aperture.c
-XOBJS= aperture.o
-XDRIVER= aperture
-X
-X#
-X# Make rules
-Xall: $(DRIVER)
-X
-X$(DRIVER): $(OBJS)
-X	rm -f $(DRIVER)
-X	ld -r -o $(DRIVER) $(OBJS)
-X
-Xinstall: $(DRIVER)
-X	cp aperture.conf /kernel/drv
-X	cp $(DRIVER) /kernel/drv/sparcv9
-X
-Xadd_drv:
-X	add_drv /kernel/drv/sparcv9/aperture
-X
-Xclean:
-X	rm -f *% *.BAK $(OBJS) $(DRIVER) core
-X
-X.SUFFIXES: .i
-X
-X.c.i:
-X	$(CC) -E $(CFLAGS) $*.c > $@
-SHAR_EOF
-  : || $echo 'restore of' 'aperture/Makefile.sun4u' 'failed'
-fi
-$echo $shar_n 'x -' 'lock directory' "\`_sh09806': " $shar_c
-if rm -fr _sh09806; then
-  $echo 'removed'
-else
-  $echo 'failed to remove'
-fi
-exit 0
+END-of-aperture/devlink.tab
+exit
+
Index: xc/programs/Xserver/hw/xfree86/etc/extrapci.ids
diff -u xc/programs/Xserver/hw/xfree86/etc/extrapci.ids:1.16 xc/programs/Xserver/hw/xfree86/etc/extrapci.ids:1.17
--- xc/programs/Xserver/hw/xfree86/etc/extrapci.ids:1.16	Tue Apr 11 21:07:29 2006
+++ xc/programs/Xserver/hw/xfree86/etc/extrapci.ids	Thu Mar  1 11:01:39 2007
@@ -14,7 +14,7 @@
 #	changes/additions that aren't XFree86-specific to the pciids
 #	project (http://pciids.sf.net/).
 #
-# $XFree86: xc/programs/Xserver/hw/xfree86/etc/extrapci.ids,v 1.16 2006/04/12 01:07:29 dawes Exp $
+# $XFree86: xc/programs/Xserver/hw/xfree86/etc/extrapci.ids,v 1.17 2007/03/01 16:01:39 tsi Exp $
 #
 
 # Vendors, devices and subsystems. Please keep sorted.
@@ -41,7 +41,3 @@
 1274	"
 	5880	"
 		C  0401
-
-1a03	Aspeed Technology Co., Ltd
-	2000	AST2000
-
Index: xc/programs/Xserver/hw/xfree86/etc/ioport.c
diff -u xc/programs/Xserver/hw/xfree86/etc/ioport.c:1.7 xc/programs/Xserver/hw/xfree86/etc/ioport.c:1.9
--- xc/programs/Xserver/hw/xfree86/etc/ioport.c:1.7	Thu Jan  5 13:55:33 2006
+++ xc/programs/Xserver/hw/xfree86/etc/ioport.c	Thu Jun 28 09:22:26 2007
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/ioport.c,v 1.7 2006/01/05 18:55:33 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/ioport.c,v 1.9 2007/06/28 13:22:26 tsi Exp $ */
 /*
- * Copyright 2002 through 2006 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2002 through 2007 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -250,7 +250,7 @@
 
 	if (Index >= 0)
 	{
-		if (Port == 0x03C0U)
+		if ((Port & 0x03FFU) == 0x03C0U)
 		{	/* Attribute Controller is different */
 			unsigned short gens1;
 
@@ -345,7 +345,7 @@
 
 	if (Index >= 0)
 	{
-		if (Port == 0x03C0U)
+		if ((Port & 0x03FFU) == 0x03C0U)
 		{	/* Attribute controller is different */
 			unsigned short gens1;
 
Index: xc/programs/Xserver/hw/xfree86/etc/mmapr.c
diff -u xc/programs/Xserver/hw/xfree86/etc/mmapr.c:1.15 xc/programs/Xserver/hw/xfree86/etc/mmapr.c:1.18
--- xc/programs/Xserver/hw/xfree86/etc/mmapr.c:1.15	Tue Apr 18 11:52:57 2006
+++ xc/programs/Xserver/hw/xfree86/etc/mmapr.c	Mon Jan  1 11:08:21 2007
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapr.c,v 1.15 2006/04/18 15:52:57 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapr.c,v 1.18 2007/01/01 16:08:21 tsi Exp $ */
 /*
- * Copyright 2002 through 2006 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2002 through 2007 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -28,8 +28,8 @@
 #define _LARGEFILE_SOURCE 1
 #define _FILE_OFFSET_BITS 64
 
-#include <errno.h>
 #include <ctype.h>
+#include <errno.h>
 #include <fcntl.h>
 #include <signal.h>
 #include <stdio.h>
@@ -46,6 +46,8 @@
 # define MAP_FAILED ((ptr)(-1))
 #endif
 
+#undef OPEN_ACCESS
+
 #if defined(_SCO_DS) && !defined(_SCO_DS_LL)
 # define strtoull (unsigned long long)strtoul
 #endif
@@ -75,6 +77,17 @@
 # endif
 #endif
 
+#ifdef WSCONS_SUPPORT
+# include <sys/ioctl.h>
+# include <dev/wscons/wsconsio.h>
+
+# define OPEN_ACCESS O_RDWR
+#endif
+
+#ifndef OPEN_ACCESS
+# define OPEN_ACCESS O_RDONLY
+#endif
+
 static unsigned char datab;
 static unsigned short dataw;
 static unsigned int datal;
@@ -92,8 +105,15 @@
 	" -i   select /proc/bus/pci/<bus>/<dfn> I/O space\n"
 	" -m   select /proc/bus/pci/<bus>/<dfn> memory space\n\n"
 #else
+#ifdef WSCONS_SUPPORT
+	"mmapr [-p] [-{emd}] [-{bwlqL}] [-{au}] <file> <offset> <length>\n\n"
+	" -e   select wsdisplay emulation mapping\n"
+	" -m   select wsdisplay graphics mapping\n"
+	" -d   select wsdisplay framebuffer mapping\n\n"
+#else
 	"mmapr [-p] [-{bwlqL}] [-{au}] <file> <offset> <length>\n\n"
 #endif
+#endif
 	" -p   pretty-print output\n\n"
 	" access size flags:\n\n"
 	" -b   output one byte at a time\n"
@@ -151,10 +171,13 @@
     size_t Length = 0, length, size;
     char *BadString, *data;
     void *buffer;
-    int fd, pagesize, prettyprint = 0, aligned = 1;
+    int fd, pagesize, prettyprint = 0, aligned = 1, error;
 #ifdef linux
     int mmap_ioctl = 0;
 #endif
+#ifdef WSCONS_SUPPORT
+    int wsdisplay_mode = -1, old_mode;
+#endif
     char Address[20], Hex[36], Glyph[17];
     char Size = sizeof(datal), Format = 0;
 
@@ -204,6 +227,19 @@
 		    mmap_ioctl = PCIIOC_MMAP_IS_MEM;
 		    break;
 #endif
+#ifdef WSCONS_SUPPORT
+		case 'e':
+		    wsdisplay_mode = WSDISPLAYIO_MODE_EMUL;
+		    break;
+
+		case 'm':
+		    wsdisplay_mode = WSDISPLAYIO_MODE_MAPPED;
+		    break;
+
+		case 'd':
+		    wsdisplay_mode = WSDISPLAYIO_MODE_DUMBFB;
+		    break;
+#endif
 		default:
 		    usage();
 	    }
@@ -229,9 +265,9 @@
     if (Length <= 0)
 	return 0;
 
-    if ((fd = open(argv[1], O_RDONLY)) < 0)
+    if ((fd = open(argv[1], OPEN_ACCESS)) < 0)
     {
-	fprintf(stderr, "mmapr:  Unable to open \"%s\":  %s.\n",
+	fprintf(stderr, "mmapr:  Unable to open \"%s\":  \"%s\".\n",
 	    argv[1], strerror(errno));
 	exit(1);
     }
@@ -242,169 +278,196 @@
 	    strerror(errno));
 #endif
 
+#ifdef WSCONS_SUPPORT
+    if ((wsdisplay_mode >= 0) &&
+	((ioctl(fd, WSDISPLAYIO_GMODE, &old_mode) < 0) ||
+	 (ioctl(fd, WSDISPLAYIO_SMODE, &wsdisplay_mode) < 0)))
+	fprintf(stderr, "mmapr:  ioctl error:  \"%s\";  Ignored.\n",
+	    strerror(errno));
+#endif
+
     pagesize = getpagesize();
     offset = Offset & (off_t)(-pagesize);
     length = ((Offset + Length + pagesize - 1) & (off_t)(-pagesize)) - offset;
     buffer = mmap((caddr_t)0, length, PROT_READ, MAP_SHARED, fd, offset);
-    close(fd);
+
     if (buffer == MAP_FAILED)
     {
-	fprintf(stderr, "mmapr:  Unable to mmap \"%s\":  %s.\n",
+	fprintf(stderr, "mmapr:  Unable to mmap \"%s\":  \"%s\".\n",
 	    argv[1], strerror(errno));
-	exit(1);
+	error = 1;
     }
-
-    if (prettyprint)
+    else
     {
-	End = Offset + Length - 1;
-
-	if ((sizeof(Offset) > sizeof(dataL)) &&
-	    ((unsigned long long)End != (unsigned long)End))
-	{
-	    sprintf(Address, "0x%015llX0", (unsigned long long)Offset >> 4);
-	    Format = 3;
-	}
-	else
-	if ((sizeof(Offset) > sizeof(dataw)) &&
-	    ((unsigned long long)End != (unsigned short)End))
-	{
-	    sprintf(Address, "0x%07lX0", (unsigned long)Offset >> 4);
-	    Format = 2;
-	}
-	else
-	if ((sizeof(Offset) > sizeof(datab)) &&
-	    ((unsigned long long)End != (unsigned char)End))
-	{
-	    sprintf(Address, "0x%03X0", (unsigned short)Offset >> 4);
-	    Format = 1;
-	}
-	else
+	if (prettyprint)
 	{
-	    sprintf(Address, "0x%01X0", (unsigned char)Offset >> 4);
-	 /* Format = 0; */
-	}
+	    End = Offset + Length - 1;
 
-	memset(Hex, ' ', 35);
-	Hex[35] = 0;
-	memset(Glyph, ' ', 16);
-	Glyph[16] = 0;
-    }
+	    if ((sizeof(Offset) > sizeof(dataL)) &&
+		((unsigned long long)End != (unsigned long)End))
+	    {
+		sprintf(Address, "0x%015llX0",
+		    (unsigned long long)Offset >> 4);
+		Format = 3;
+	    }
+	    else
+	    if ((sizeof(Offset) > sizeof(dataw)) &&
+		((unsigned long long)End != (unsigned short)End))
+	    {
+		sprintf(Address, "0x%07lX0", (unsigned long)Offset >> 4);
+		Format = 2;
+	    }
+	    else
+	    if ((sizeof(Offset) > sizeof(datab)) &&
+		((unsigned long long)End != (unsigned char)End))
+	    {
+		sprintf(Address, "0x%03X0", (unsigned short)Offset >> 4);
+		Format = 1;
+	    }
+	    else
+	    {
+		sprintf(Address, "0x%01X0", (unsigned char)Offset >> 4);
+		/* Format = 0; */
+	    }
+
+	    memset(Hex, ' ', 35);
+	    Hex[35] = 0;
+	    memset(Glyph, ' ', 16);
+	    Glyph[16] = 0;
+	}
 
 #ifdef SIGBUS
-    if (!aligned)
-	signal(SIGBUS, sigbus);
+	if (!aligned)
+	    signal(SIGBUS, sigbus);
 #endif
 
-    Offset -= offset;
-    while (Length > 0)
-    {
-	if ((Length < sizeof(dataw)) ||
-	    (Size < sizeof(dataw)) ||
-	    (aligned && (Offset & sizeof(datab))))
-	{
-	    datab = *(volatile unsigned char *)(ptr)((char *)buffer + Offset);
-	    data = (ptr)&datab;
-	    size = sizeof(datab);
-	}
-	else
-	if ((Length < sizeof(datal)) ||
-	    (Size < sizeof(datal)) ||
-	    (aligned && (Offset & sizeof(dataw))))
-	{
-	    dataw = *(volatile unsigned short *)(ptr)((char *)buffer + Offset);
-	    data = (ptr)&dataw;
-	    size = sizeof(dataw);
-	}
-	else
-	if ((Length < sizeof(dataL)) ||
-	    (Size < sizeof(dataL)) ||
-	    (aligned && (Offset & sizeof(datal))))
-	{
-	    datal = *(volatile unsigned int *)(ptr)((char *)buffer + Offset);
-	    data = (ptr)&datal;
-	    size = sizeof(datal);
-	}
-	else
-	if ((Length < sizeof(dataq)) ||
-	    (Size < sizeof(dataq)) ||
-	    (aligned && (Offset & sizeof(dataL))))
-	{
-	    dataL = *(volatile unsigned long *)(ptr)((char *)buffer + Offset);
-	    data = (ptr)&dataL;
-	    size = sizeof(dataL);
-	}
-	else
+	Offset -= offset;
+	while (Length > 0)
 	{
-	    dataq =
-		*(volatile unsigned long long *)(ptr)((char *)buffer + Offset);
-	    data = (ptr)&dataq;
-	    size = sizeof(dataq);
-	}
-
-	if (prettyprint)
-	{
-	    unsigned int i = (offset + Offset) & 15;
-
-	    Offset += size;
-	    Length -= size;
-
-	    for (;  size > 0;  --size, ++i, ++data)
+	    if ((Length < sizeof(dataw)) ||
+		(Size < sizeof(dataw)) ||
+		(aligned && (Offset & sizeof(datab))))
 	    {
-		Hex[((i >> 2) * 9) + ((i & 3) << 1)] =
-		    hextab[(unsigned char)*data >> 4];
-		Hex[((i >> 2) * 9) + ((i & 3) << 1) + 1] =
-		    hextab[(unsigned char)*data & 15];
-
-		if ((*data >= 0x20) && (*data < 0x7F))
-		    Glyph[i] = *data;
-		else
-		    Glyph[i] = '.';
+		datab =
+		    *(volatile unsigned char *)(ptr)((char *)buffer + Offset);
+		data = (ptr)&datab;
+		size = sizeof(datab);
+	    }
+	    else
+	    if ((Length < sizeof(datal)) ||
+		(Size < sizeof(datal)) ||
+		(aligned && (Offset & sizeof(dataw))))
+	    {
+		dataw =
+		    *(volatile unsigned short *)(ptr)((char *)buffer + Offset);
+		data = (ptr)&dataw;
+		size = sizeof(dataw);
+	    }
+	    else
+	    if ((Length < sizeof(dataL)) ||
+		(Size < sizeof(dataL)) ||
+		(aligned && (Offset & sizeof(datal))))
+	    {
+		datal =
+		    *(volatile unsigned int *)(ptr)((char *)buffer + Offset);
+		data = (ptr)&datal;
+		size = sizeof(datal);
+	    }
+	    else
+	    if ((Length < sizeof(dataq)) ||
+		(Size < sizeof(dataq)) ||
+		(aligned && (Offset & sizeof(dataL))))
+	    {
+		dataL =
+		    *(volatile unsigned long *)(ptr)((char *)buffer + Offset);
+		data = (ptr)&dataL;
+		size = sizeof(dataL);
+	    }
+	    else
+	    {
+		dataq = *(volatile unsigned long long *)(ptr)
+		    ((char *)buffer + Offset);
+		data = (ptr)&dataq;
+		size = sizeof(dataq);
 	    }
 
-	    if (!Length || !(Offset & 15))
+	    if (prettyprint)
 	    {
-		printf("%s:  %s  |%s|\n", Address, Hex, Glyph);
+		unsigned int i = (offset + Offset) & 15;
 
-		if (!Length)
-		    break;
+		Offset += size;
+		Length -= size;
 
-		switch(Format)
+		for (;  size > 0;  --size, ++i, ++data)
 		{
-		    case 0:
-			sprintf(Address, "0x%02X",
-				(unsigned char)(Offset + offset));
+		    Hex[((i >> 2) * 9) + ((i & 3) << 1)] =
+			hextab[(unsigned char)*data >> 4];
+		    Hex[((i >> 2) * 9) + ((i & 3) << 1) + 1] =
+			hextab[(unsigned char)*data & 15];
+
+		    if ((*data >= 0x20) && (*data < 0x7F))
+			Glyph[i] = *data;
+		    else
+			Glyph[i] = '.';
+		}
+
+		if (!Length || !(Offset & 15))
+		{
+		    printf("%s:  %s  |%s|\n", Address, Hex, Glyph);
+
+		    if (!Length)
 			break;
 
-		    case 1:
-			sprintf(Address, "0x%04X",
+		    switch(Format)
+		    {
+			case 0:
+			    sprintf(Address, "0x%02X",
+				(unsigned char)(Offset + offset));
+			    break;
+
+			case 1:
+			    sprintf(Address, "0x%04X",
 				(unsigned short)(Offset + offset));
-			break;
+			    break;
 
-		    case 2:
-			sprintf(Address, "0x%08lX",
+			case 2:
+			    sprintf(Address, "0x%08lX",
 				(unsigned long)(Offset + offset));
-			break;
+			    break;
 
-		    case 3:  default:
-			sprintf(Address, "0x%016llX",
+			case 3:  default:
+			    sprintf(Address, "0x%016llX",
 				(unsigned long long)(Offset + offset));
-			break;
+			    break;
+		    }
+
+		    memset(Hex, ' ', 35);
+		    memset(Glyph, ' ', 16);
 		}
+	    }
+	    else
+	    {
+		Offset += size;
+		Length -= size;
 
-		memset(Hex, ' ', 35);
-		memset(Glyph, ' ', 16);
+		fwrite(data, size, 1, stdout);
 	    }
 	}
-	else
-	{
-	    Offset += size;
-	    Length -= size;
 
-	    fwrite(data, size, 1, stdout);
-	}
+	error = 0;
     }
 
     munmap(buffer, length);
 
-    return 0;
+#ifdef WSCONS_SUPPORT
+    /* Sigh...  This must be done _after_ the data has been accessed */
+    if ((wsdisplay_mode >= 0) &&
+	(ioctl(fd, WSDISPLAYIO_SMODE, &old_mode) < 0))
+	fprintf(stderr, "mmapr:  ioctl error:  \"%s\";  Ignored.\n",
+	    strerror(errno));
+#endif
+
+    close(fd);
+
+    return error;
 }
Index: xc/programs/Xserver/hw/xfree86/etc/mmapw.c
diff -u xc/programs/Xserver/hw/xfree86/etc/mmapw.c:1.13 xc/programs/Xserver/hw/xfree86/etc/mmapw.c:1.16
--- xc/programs/Xserver/hw/xfree86/etc/mmapw.c:1.13	Thu Jan  5 13:55:33 2006
+++ xc/programs/Xserver/hw/xfree86/etc/mmapw.c	Mon Jan  1 11:08:21 2007
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapw.c,v 1.13 2006/01/05 18:55:33 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/mmapw.c,v 1.16 2007/01/01 16:08:21 tsi Exp $ */
 /*
- * Copyright 2002 through 2006 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
+ * Copyright 2002 through 2007 by Marc Aurele La France (TSI @ UQV), tsi@xfree86.org
  *
  * Permission to use, copy, modify, distribute, and sell this software and its
  * documentation for any purpose is hereby granted without fee, provided that
@@ -74,6 +74,11 @@
 # endif
 #endif
 
+#ifdef WSCONS_SUPPORT
+# include <sys/ioctl.h>
+# include <dev/wscons/wsconsio.h>
+#endif
+
 #define datab unsigned char
 #define dataw unsigned short
 #define datal unsigned int
@@ -89,8 +94,15 @@
 	" -i   select /proc/bus/pci/<bus>/<dfn> I/O space\n"
 	" -m   select /proc/bus/pci/<bus>/<dfn> memory space\n\n"
 #else
+#ifdef WSCONS_SUPPORT
+	"mmapw [-{emd}] [-{bwlqL}] [-{au}] <file> <offset> <value>\n\n"
+	" -e   select wsdisplay emulation mapping\n"
+	" -m   select wsdisplay graphics mapping\n"
+	" -d   select wsdisplay framebuffer mapping\n\n"
+#else
 	"mmapw [-{bwlqL}] [-{au}] <file> <offset> <value>\n\n"
 #endif
+#endif
 	"access size flags:\n\n"
 	" -b   write one byte\n"
 	" -w   write two aligned bytes\n"
@@ -148,10 +160,13 @@
     size_t length;
     char *BadString;
     void *buffer;
-    int fd, pagesize, aligned = 1;
+    int fd, pagesize, aligned = 1, error;
 #ifdef linux
     int mmap_ioctl = 0;
 #endif
+#ifdef WSCONS_SUPPORT
+    int wsdisplay_mode = -1, old_mode;
+#endif
     char size = sizeof(datal);
 
     while (argv[1] && (argv[1][0] == '-') && argv[1][1])
@@ -196,6 +211,19 @@
 		    mmap_ioctl = PCIIOC_MMAP_IS_MEM;
 		    break;
 #endif
+#ifdef WSCONS_SUPPORT
+		case 'e':
+		    wsdisplay_mode = WSDISPLAYIO_MODE_EMUL;
+		    break;
+
+		case 'm':
+		    wsdisplay_mode = WSDISPLAYIO_MODE_MAPPED;
+		    break;
+
+		case 'd':
+		    wsdisplay_mode = WSDISPLAYIO_MODE_DUMBFB;
+		    break;
+#endif
 		default:
 		    usage();
 	    }
@@ -226,7 +254,7 @@
 
     if ((fd = open(argv[1], O_RDWR)) < 0)
     {
-	fprintf(stderr, "mmapw:  Unable to open \"%s\":  %s.\n",
+	fprintf(stderr, "mmapw:  Unable to open \"%s\":  \"%s\".\n",
 	    argv[1], strerror(errno));
 	exit(1);
     }
@@ -237,78 +265,101 @@
 	    strerror(errno));
 #endif
 
+#ifdef WSCONS_SUPPORT
+    if ((wsdisplay_mode >= 0) &&
+	((ioctl(fd, WSDISPLAYIO_GMODE, &old_mode) < 0) ||
+	 (ioctl(fd, WSDISPLAYIO_SMODE, &wsdisplay_mode) < 0)))
+	fprintf(stderr, "mmapw:  ioctl error:  \"%s\";  Ignored.\n",
+	    strerror(errno));
+#endif
+
     pagesize = getpagesize();
     offset = Offset & (off_t)(-pagesize);
     length = ((Offset + size + pagesize - 1) & (off_t)(-pagesize)) - offset;
-    buffer = mmap((caddr_t)0, length, PROT_WRITE, MAP_SHARED, fd, offset);
-    close(fd);
+    buffer = mmap((caddr_t)0, length, PROT_READ | PROT_WRITE, MAP_SHARED, fd,
+	offset);
+
     if (buffer == MAP_FAILED)
     {
-	fprintf(stderr, "mmapw:  Unable to mmap \"%s\":  %s.\n",
+	fprintf(stderr, "mmapw:  Unable to mmap \"%s\":  \"%s\".\n",
 	    argv[1], strerror(errno));
-	exit(1);
+	error = 1;
     }
-
+    else
+    {
 #ifdef SIGBUS
-    if (!aligned)
-	signal(SIGBUS, sigbus);
+	if (!aligned)
+	    signal(SIGBUS, sigbus);
 #endif
 
-    Offset -= offset;
-    if ((size == sizeof(datab)) || (aligned && (Offset & sizeof(datab))))
-    {
-	do
+	Offset -= offset;
+	if ((size == sizeof(datab)) || (aligned && (Offset & sizeof(datab))))
 	{
-	    *(volatile unsigned char *)(ptr)((char *)buffer + Offset) =
-		(unsigned char)data;
-	    data >>= 8 * (sizeof(datab) & (sizeof(data) - 1));
-	    Offset += sizeof(datab);
-	    size -= sizeof(datab);
-	} while (size);
-    }
-    else
-    if ((size == sizeof(dataw)) || (aligned && (Offset & sizeof(dataw))))
-    {
-	do
+	    do
+	    {
+		*(volatile unsigned char *)(ptr)((char *)buffer + Offset) =
+		    (unsigned char)data;
+		data >>= 8 * (sizeof(datab) & (sizeof(data) - 1));
+		Offset += sizeof(datab);
+		size -= sizeof(datab);
+	    } while (size);
+	}
+	else
+	if ((size == sizeof(dataw)) || (aligned && (Offset & sizeof(dataw))))
 	{
-	    *(volatile unsigned short *)(ptr)((char *)buffer + Offset) =
-		(unsigned short)data;
-	    data >>= 8 * (sizeof(dataw) & (sizeof(data) - 1));
-	    Offset += sizeof(dataw);
-	    size -= sizeof(dataw);
-	} while (size);
-    }
-    else
-    if ((size == sizeof(datal)) || (aligned && (Offset & sizeof(datal))))
-    {
-	do
+	    do
+	    {
+		*(volatile unsigned short *)(ptr)((char *)buffer + Offset) =
+		    (unsigned short)data;
+		data >>= 8 * (sizeof(dataw) & (sizeof(data) - 1));
+		Offset += sizeof(dataw);
+		size -= sizeof(dataw);
+	    } while (size);
+	}
+	else
+	if ((size == sizeof(datal)) || (aligned && (Offset & sizeof(datal))))
 	{
-	    *(volatile unsigned int *)(ptr)((char *)buffer + Offset) =
-		(unsigned int)data;
-	    data >>= 8 * (sizeof(datal) & (sizeof(data) - 1));
-	    Offset += sizeof(datal);
-	    size -= sizeof(datal);
-	} while (size);
-    }
-    else
-    if ((size == sizeof(dataL)) || (aligned && (Offset & sizeof(dataL))))
-    {
-	do
+	    do
+	    {
+		*(volatile unsigned int *)(ptr)((char *)buffer + Offset) =
+		    (unsigned int)data;
+		data >>= 8 * (sizeof(datal) & (sizeof(data) - 1));
+		Offset += sizeof(datal);
+		size -= sizeof(datal);
+	    } while (size);
+	}
+	else
+	if ((size == sizeof(dataL)) || (aligned && (Offset & sizeof(dataL))))
 	{
-	    *(volatile unsigned long *)(ptr)((char *)buffer + Offset) =
-		(unsigned long)data;
-	    data >>= 8 * (sizeof(dataL) & (sizeof(data) - 1));
-	    Offset += sizeof(dataL);
-	    size -= sizeof(dataL);
-	} while (size);
-    }
-    else
-    {
-	*(volatile unsigned long long *)(ptr)((char *)buffer + Offset) =
-	    (unsigned long long)data;
+	    do
+	    {
+		*(volatile unsigned long *)(ptr)((char *)buffer + Offset) =
+		    (unsigned long)data;
+		data >>= 8 * (sizeof(dataL) & (sizeof(data) - 1));
+		Offset += sizeof(dataL);
+		size -= sizeof(dataL);
+	    } while (size);
+	}
+	else
+	{
+	    *(volatile unsigned long long *)(ptr)((char *)buffer + Offset) =
+		(unsigned long long)data;
+	}
+
+	error = 0;
     }
 
     munmap(buffer, length);
 
-    return 0;
+#ifdef WSCONS_SUPPORT
+    /* Sigh...  This must be done _after_ the data has been accessed */
+    if ((wsdisplay_mode >= 0) &&
+	(ioctl(fd, WSDISPLAYIO_SMODE, &old_mode) < 0))
+	fprintf(stderr, "mmapw:  ioctl error:  \"%s\";  Ignored.\n",
+	    strerror(errno));
+#endif
+
+    close(fd);
+
+    return error;
 }
Index: xc/programs/Xserver/hw/xfree86/etc/pci.ids
diff -u xc/programs/Xserver/hw/xfree86/etc/pci.ids:1.12 xc/programs/Xserver/hw/xfree86/etc/pci.ids:1.13
--- xc/programs/Xserver/hw/xfree86/etc/pci.ids:1.12	Tue Apr 11 21:07:29 2006
+++ xc/programs/Xserver/hw/xfree86/etc/pci.ids	Thu Mar  1 11:01:39 2007
@@ -11,7 +11,7 @@
 #	This file can be distributed under either the GNU General Public License
 #	(version 2 or higher) or the 3-clause BSD License.
 #
-#	Daily snapshot on Tue 2006-04-11 01:05:02
+#	Daily snapshot on Mon 2007-02-12 02:05:02
 #
 
 # Vendors, devices and subsystems. Please keep sorted.
@@ -23,17 +23,36 @@
 
 0000  Gammagraphx, Inc.
 001a  Ascend Communications, Inc.
+001c  PEAK-System Technik GmbH
+	0001  PCAN-PCI CAN-Bus controller
 0033  Paradyne corp.
 003d  Lockheed Martin-Marietta Corp
 # Real TJN ID is e159, but they got it wrong several times --mj
 0059  Tiger Jet Network Inc. (Wrong ID)
 0070  Hauppauge computer works Inc.
+	0003  WinTV PVR-250
+	0009  WinTV PVR-150
+	0801  WinTV PVR-150
+	0807  WinTV PVR-150
+	4000  WinTV PVR-350
+	4001  WinTV PVR-250 (v1)
+	4009  WinTV PVR-250
+	4800  WinTV PVR-350
+	4801  WinTV PVR-250 MCE
+	4803  WinTV PVR-250
+	8003  WinTV PVR-150
+	8801  WinTV PVR-150
+	c801  WinTV PVR-150
+	e807  WinTV PVR-500 MCE (1st tuner)
+	e817  WinTV PVR-500 MCE (2nd tuner)
 0071  Nebula Electronics Ltd.
 0095  Silicon Image, Inc. (Wrong ID)
 	0680  Ultra ATA/133 IDE RAID CONTROLLER CARD
 # Wrong ID used in subsystem ID of the TELES.S0/PCI 2.x ISDN adapter
 00a7  Teles AG (Wrong ID)
+00f5  BFG Technologies, Inc.
 0100  Ncipher Corp Ltd
+0123  General Dynamics
 # 018a is not LevelOne but there is a board misprogrammed
 018a  LevelOne
 	0106  FPC-0106TX misprogrammed [RTL81xx]
@@ -46,37 +65,78 @@
 # SpeedStream is Efficient Networks, Inc, a Siemens Company
 02ac  SpeedStream
 	1012  1012 PCMCIA 10/100 Ethernet Card [RTL81xx]
+0315  SK-Electronics Co., Ltd.
 0357  TTTech AG
 	000a  TTP-Monitoring Card V2.0
+0403  Future Technology Devices International Ltd
 0432  SCM Microsystems, Inc.
 	0001  Pluto2 DVB-T Receiver for PCMCIA [EasyWatch MobilSet]
 045e  Microsoft
 	006e  MN-510 802.11b wireless USB paddle
 	00c2  MN-710 wireless USB paddle
+0482  Kyocera
 04cf  Myson Century, Inc
 	8818  CS8818 USB2.0-to-ATAPI Bridge Controller with Embedded PHY
 050d  Belkin
+	001a  FSD7000 802.11g PCI Wireless card
+	0109  F5U409-CU USB/Serial Portable Adapter
 	7050  F5D7050 802.11g Wireless USB Adapter
+	705c  F5D7050 v4
+05a9  OmniVision
+	8519  OV519 series
 05e3  CyberDoor
 	0701  CBD516
 066f  Sigmatel Inc.
+	3410  SMTP3410
+	3500  SMTP3500
 0675  Dynalink
 	1700  IS64PH ISDN Adapter
 	1702  IS64PH ISDN Adapter
 	1703  ISDN Adapter (PCI Bus, DV, W)
 	1704  ISDN Adapter (PCI Bus, D, C)
 067b  Prolific Technology, Inc.
+	2303  PL-2303 USB-to-Serial Converter
 	3507  PL-3507 Hi-Speed USB & IEEE 1394 Combo to IDE Bridge Controller
-# Found on Sapphire Radeon X700 (www.saphiretech.com)
+069d  Hughes Network Systems (HNS)
 0721  Sapphire, Inc.
+07ca  AVerMedia Technologies Inc.
+	b808  AVerTV DVB-T Volar (USB 2.0)
 07e2  ELMEG Communication Systems GmbH
+0842  NPG, Personal Grand Technology
+08ff  AuthenTec
+	afe4  [Anchor] AF-S2 FingerLoc Sensor Module
 # Wrong ID used in subsystem ID of VIA USB controllers.
 0925  VIA Technologies, Inc. (Wrong ID)
+093a  PixArt Imaging Inc.
+	010e  Innovage Mini Digital Camera
+	010f  SDC-300 Webcam
+	2468  CIF Single Chip
+	2603  Philips Webcam SPC500NC
+	2608  Maxell MaxCam RotaWeb
 09c1  Arris
 	0704  CM 200E Cable Modem
 0a89  BREA Technologies Inc
+0ace  ZyDAS
+	1211  ZD1211 IEEE 802.11b+g USB Adapter
+0b0b  Rhino Equiment Corp.
+	0105  Rhino R1T1
+	0205  Rhino R4FXO
+	0206  RCB4FXO 4-channel FXO analog telphony card
+	0305  Rhino R4T1
+	0405  Rhino R8FXX
+	0406  RCB8FXX 8-channel modular analog telphony card
+	0505  Rhino R24FXX
+	0506  RCB24FXS 24-Channel FXS analog telphony card
+	0605  Rhino R2T1
+	0705  Rhino R24FXS
+	0706  RCB24FXO 24-Channel FXO analog telphony card
+	0905  R1T3 Single T3 Digital Telephony Card
+	0906  RCB24FXX 24-channel modular analog telphony card
+	0a06  RCB672FXX 672-channel modular analog telphony card
 0b49  ASCII Corporation
 	064f  Trance Vibrator
+0ccd  TerraTec Electronic GmbH
+	0038  Cinergy T^2 DVB-T Receiver
 0e11  Compaq Computer Corporation
 	0001  PCI to EISA Bridge
 	0002  PCI to ISA Bridge
@@ -180,13 +240,14 @@
 		0e11 4082  Smart Array 532
 		0e11 4083  Smart Array 5312
 	b1a4  NC7131 Gigabit Server Adapter
-# HP Memory Hot-Plug Controller
 	b200  Memory Hot-Plug Controller
 	b203  Integrated Lights Out Controller
 	b204  Integrated Lights Out  Processor
 	f130  NetFlex-3/P ThunderLAN 1.0
 	f150  NetFlex-3/P ThunderLAN 2.3
+0e21  Cowon Systems, Inc.
 0e55  HaSoTec GmbH
+0eac  SHF Communication Technologies AG
 # Formerly NCR
 1000  LSI Logic / Symbios Logic
 	0001  53c810
@@ -199,14 +260,14 @@
 	0006  53c860
 		1000 1000  LSI53C860E PCI to Ultra SCSI I/O Processor
 	000a  53c1510
+		0e11 b143  Integrated Dual Channel Wide Ultra2 SCSI Controller
 		1000 1000  LSI53C1510 PCI to Dual Channel Wide Ultra2 SCSI Controller (Nonintelligent mode)
 	000b  53C896/897
 		0e11 6004  EOB003 Series SCSI host adapter
 		1000 1000  LSI53C896/7 PCI to Dual Channel Ultra2 SCSI Multifunction Controller
 		1000 1010  LSI22910 PCI to Dual Channel Ultra2 SCSI host adapter
 		1000 1020  LSI21002 PCI to Dual Channel Ultra2 SCSI host adapter
-# multifunction PCI card: Dual U2W SCSI, dual 10/100TX, graphics
-		13e9 1000  6221L-4U
+		13e9 1000  6221L-4U (Dual U2W SCSI, dual 10/100TX, graphics)
 	000c  53c895
 		1000 1010  LSI8951U PCI to Ultra2 SCSI host adapter
 		1000 1020  LSI8952U PCI to Ultra2 SCSI host adapter
@@ -219,6 +280,8 @@
 		1000 1010  LSI22801 PCI to Dual Channel Ultra SCSI host adapter
 		1000 1020  LSI22802 PCI to Dual Channel Ultra SCSI host adapter
 		1092 8760  FirePort 40 Dual SCSI Controller
+		1775 10d0  V5D Single Board Computer Wide Ultra SCSI
+		1775 10d1  V5D Single Board Computer Ultra SCSI
 		1de1 3904  DC390F/U Ultra Wide SCSI Adapter
 		4c53 1000  CC7/CR7/CP7/VC7/VP7/VR7 mainboard
 		4c53 1050  CT7 mainboard
@@ -232,10 +295,13 @@
 		1000 1000  LSI53C875A PCI to Ultra SCSI Controller
 	0020  53c1010 Ultra3 SCSI Adapter
 		1000 1000  LSI53C1010-33 PCI to Dual Channel Ultra160 SCSI Controller
+		107b 1040  Server Onboard 53C1010-33
 		1de1 1020  DC-390U3W
 	0021  53c1010 66MHz  Ultra3 SCSI Adapter
 		1000 1000  LSI53C1000/1000R/1010R/1010-66 PCI to Ultra160 SCSI Controller
 		1000 1010  Asus TR-DLS onboard 53C1010-66
+		103c 1330  Ultra160 SCSI [A7059A]
+		103c 1340  Ultra160 SCSI [A7060A]
 		124b 1070  PMC-USCSI3
 		4c53 1080  CT8 mainboard
 		4c53 1300  P017 mezzanine (32-bit PMC)
@@ -247,6 +313,7 @@
 		1028 016c  PowerEdge 1850 MPT Fusion SCSI/RAID (Perc 4)
 		1028 0183  PowerEdge 1800
 		1028 1010  LSI U320 SCSI Controller
+		103c 12c5  Ultra320 SCSI [A7173A]
 		124b 1170  PMC-USCSI320
 		1734 1052  Primergy RX300 S2
 	0031  53c1030ZC PCI-X Fusion-MPT Dual Ultra320 SCSI
@@ -259,12 +326,33 @@
 	0041  53C1035ZC PCI-X Fusion-MPT Dual Ultra320 SCSI
 	0050  SAS1064 PCI-X Fusion-MPT SAS
 	0054  SAS1068 PCI-X Fusion-MPT SAS
+	0055  SAS1068 PCI-X Fusion-MPT SAS
+		1033 8336  SAS1068
 	0056  SAS1064E PCI-Express Fusion-MPT SAS
 	0058  SAS1068E PCI-Express Fusion-MPT SAS
 	005a  SAS1066E PCI-Express Fusion-MPT SAS
 	005c  SAS1064A PCI-X Fusion-MPT SAS
 	005e  SAS1066 PCI-X Fusion-MPT SAS
-	0060  SAS1078 PCI-X Fusion-MPT SAS
+	0060  MegaRAID SAS 1078
+		1000 1006  MegaRAID SAS 8888ELP
+		1000 100a  MegaRAID SAS 8708ELP
+		1000 100e  MegaRAID SAS 8884E
+		1000 100f  MegaRAID SAS 8708E
+		1000 1010  MegaRAID SATA 350-8ELP
+		1000 1011  MegaRAID SATA 350-4ELP
+		1000 1012  MegaRAID SAS 8704ELP
+		1014 0363  MegaRAID SAS PCI Express ROMB
+		1014 0364  SystemX MegaRAID SAS 8808E
+		1014 0365  SystemX MegaRAID SAS 8884E
+		1028 1f0a  PERC 6/E Adapter RAID Controller
+		1028 1f0b  PERC 6/i Adapter RAID Controller
+		1028 1f0c  PERC 6/i Integrated RAID Controller
+		1028 1f0d  CERC 6/i Adapter RAID Controller
+		1028 1f11  CERC 6/i Adapter RAID Controller
+		1043 824d  MegaRAID SAS PCI Express ROMB
+		1170 002f  MegaRAID SAS PCI Express ROMB
+		8086 34cc  Integrated RAID Controller SROMBSAS28E
+		8086 34cd  Integrated RAID Controller SROMBSAS28E
 	0062  SAS1078 PCI-Express Fusion-MPT SAS
 		1000 0062  SAS1078 PCI-Express Fusion-MPT SAS
 	008f  53c875J
@@ -284,6 +372,9 @@
 		1025 004d  MegaRAID ACER ROMB-2E RAID Controller
 		1028 0001  PowerEdge RAID Controller PERC4e/SC
 		1028 0002  PowerEdge RAID Controller PERC4e/DC
+		1028 0012  PowerEdge RAID Controller RAC4
+		1028 0015  PowerEdge RAID Controller PERC5
+		1028 1f03  PowerEdge RAID Controller PERC5
 		1734 1065  FSC MegaRAID PCI Express ROMB
 		8086 0002  MegaRAID Intel RAID Controller SRCU42E
 	0409  MegaRAID
@@ -292,6 +383,27 @@
 		8086 3008  MegaRAID RAID Controller SRCS28X
 		8086 3431  MegaRAID RAID Controller Alief SROMBU42E
 		8086 3499  MegaRAID RAID Controller Harwich SROMBU42E
+	0411  MegaRAID SAS
+		1000 1001  MegaRAID SAS 8408E
+		1000 1002  MegaRAID SAS 8480E
+		1000 1003  MegaRAID SAS 8344ELP
+		1000 1004  MegaRAID SAS 8308ELP
+		1000 1008  MegaRAID SAS 84016E
+		1000 100c  MegaRAID SATA 300-12E
+		1000 100d  MegaRAID SATA 300-16E
+		1000 2004  MegaRAID SATA 300-8ELP
+		1000 2005  MegaRAID SATA 300-4ELP
+		1033 8287  MegaRAID SAS PCI Express ROMB
+		1054 3016  MegaRAID SAS RoMB Server
+		1734 1081  MegaRAID SAS PCI Express ROMB
+		1734 10a3  MegaRAID SAS PCI Express ROMB
+		8086 1001  RAID Controller SRCSAS18E
+		8086 1003  RAID Controller SRCSAS144E
+		8086 3500  SROMBSAS18E RAID Controller
+		8086 3501  SROMBSAS18E RAID Controller
+		8086 3504  SROMBSAS18E RAID Controller
+	0413  MegaRAID SAS Verde ZCR
+		1000 1005  MegaRAID SAS 8300XLP
 	0621  FC909 Fibre Channel Adapter
 	0622  FC929 Fibre Channel Adapter
 		1000 1020  44929 O Dual Fibre Channel card
@@ -344,7 +456,7 @@
 	3154  M24 1T [FireGL M24 GL]
 	3e50  RV380 0x3e50 [Radeon X600]
 	3e54  RV380 0x3e54 [FireGL V3200]
-	3e70  RV380 [Radeon X600] Secondary
+	3e70  RV380 [Radeon X600] (Secondary)
 	4136  Radeon IGP 320 M
 	4137  Radeon IGP330/340/350
 	4144  R300 AD [Radeon 9500 Pro]
@@ -354,18 +466,18 @@
 	4148  R350 AH [Radeon 9800]
 	4149  R350 AI [Radeon 9800]
 	414a  R350 AJ [Radeon 9800]
-	414b  R350 AK [Fire GL X2]
+	414b  R350 AK [FireGL X2]
 	4150  RV350 AP [Radeon 9600]
 		1002 0002  R9600 Pro primary (Asus OEM for HP)
 		1002 0003  R9600 Pro secondary (Asus OEM for HP)
 		1002 4722  All-in-Wonder 2006 AGP Edition
-		1458 4024  Giga-Byte GV-R96128D Primary
+		1458 4024  Giga-Byte GV-R96128D (Primary)
 		148c 2064  PowerColor R96A-C3N
 		148c 2066  PowerColor R96A-C3N
 		174b 7c19  Sapphire Atlantis Radeon 9600 Pro
-		174b 7c29  GC-R9600PRO Primary [Sapphire]
+		174b 7c29  GC-R9600PRO [Sapphire] (Primary)
 		17ee 2002  Radeon 9600 256Mb Primary
-		18bc 0101  GC-R9600PRO Primary
+		18bc 0101  GC-R9600PRO (Primary)
 	4151  RV350 AQ [Radeon 9600]
 		1043 c004  A9600SE
 	4152  RV350 AR [Radeon 9600]
@@ -376,11 +488,12 @@
 		174b 7c29  Sapphire Radeon 9600XT
 		1787 4002  Radeon 9600 XT
 	4153  RV350 AS [Radeon 9550]
+		1043 010c  A9550GE/TD
 		1462 932c  865PE Neo2-V (MS-6788) mainboard
-	4154  RV350 AT [Fire GL T2]
-	4155  RV350 AU [Fire GL T2]
-	4156  RV350 AV [Fire GL T2]
-	4157  RV350 AW [Fire GL T2]
+	4154  RV350 AT [FireGL T2]
+	4155  RV350 AU [FireGL T2]
+	4156  RV350 AV [FireGL T2]
+	4157  RV350 AW [FireGL T2]
 	4158  68800AX [Mach32]
 	4164  R300 AD [Radeon 9500 Pro] (Secondary)
 	4165  R300 AE [Radeon 9700 Pro] (Secondary)
@@ -389,11 +502,11 @@
 	4170  RV350 AP [Radeon 9600] (Secondary)
 		1002 0003  R9600 Pro secondary (Asus OEM for HP)
 		1002 4723  All-in-Wonder 2006 AGP Edition (Secondary)
-		1458 4025  Giga-Byte GV-R96128D Secondary
+		1458 4025  Giga-Byte GV-R96128D (Secondary)
 		148c 2067  PowerColor R96A-C3N (Secondary)
-		174b 7c28  GC-R9600PRO Secondary [Sapphire]
-		17ee 2003  Radeon 9600 256Mb Secondary
-		18bc 0100  GC-R9600PRO Secondary
+		174b 7c28  GC-R9600PRO [Sapphire] (Secondary)
+		17ee 2003  Radeon 9600 256Mb (Secondary)
+		18bc 0100  GC-R9600PRO (Secondary)
 	4171  RV350 AQ [Radeon 9600] (Secondary)
 		1043 c005  A9600SE (Secondary)
 	4172  RV350 AR [Radeon 9600] (Secondary)
@@ -403,7 +516,8 @@
 		1043 c01b  A9600XT/TD (Secondary)
 		174b 7c28  Sapphire Radeon 9600XT (Secondary)
 		1787 4003  Radeon 9600 XT (Secondary)
-	4173  RV350 ?? [Radeon 9550] (Secondary)
+	4173  RV350 AS [Radeon 9550] (Secondary)
+		1043 010d  A9550GE/TD (Secondary)
 	4237  Radeon 7000 IGP
 	4242  R200 BB [Radeon All in Wonder 8500DV]
 		1002 02aa  Radeon 8500 AIW DV Edition
@@ -419,33 +533,62 @@
 	4345  EHCI USB Controller
 	4347  OHCI USB Controller #1
 	4348  OHCI USB Controller #2
-	4349  ATI Dual Channel Bus Master PCI IDE Controller
+	4349  Dual Channel Bus Master PCI IDE Controller
 	434d  IXP AC'97 Modem
-	4353  ATI SMBus
+	4353  SMBus
 	4354  215CT [Mach64 CT]
 	4358  210888CX [Mach64 CX]
-	4363  ATI SMBus
-	436e  ATI 436E Serial ATA Controller
+	4363  SMBus
+	436e  436E Serial ATA Controller
 	4370  IXP SB400 AC'97 Audio Controller
-		103c 308b  nx6125
+		1025 0079  Aspire 5024WLMMi
+		103c 308b  MX6125
+		105b 0c81  Realtek ALC 653
+		107b 0300  MX6421
 	4371  IXP SB400 PCI-PCI Bridge
-		103c 308b  nx6125
+		103c 308b  MX6125
 	4372  IXP SB400 SMBus Controller
-		103c 308b  nx6125
+		1025 0080  Aspire 5024WLMMi
+		103c 308b  MX6125
 	4373  IXP SB400 USB2 Host Controller
-		103c 308b  nx6125
+		1025 0080  Aspire 5024WLMMi
+		103c 308b  MX6125
 	4374  IXP SB400 USB Host Controller
-		103c 308b  nx6125
+		103c 308b  MX6125
 	4375  IXP SB400 USB Host Controller
-		103c 308b  nx6125
-	4376  Standard Dual Channel PCI IDE Controller ATI
-		103c 308b  nx6125
+		1025 0080  Aspire 5024WLMMi
+		103c 308b  MX6125
+	4376  Standard Dual Channel PCI IDE Controller
+		1025 0080  Aspire 5024WLMMi
+		103c 308b  MX6125
 	4377  IXP SB400 PCI-ISA Bridge
-		103c 308b  nx6125
-	4378  ATI SB400 - AC'97 Modem Controller
-		103c 308b  nx6125
-	4379  ATI 4379 Serial ATA Controller
-	437a  ATI 437A Serial ATA Controller
+		1025 0080  Aspire 5024WLMi
+		103c 308b  MX6125
+	4378  SB400 AC'97 Modem Controller
+		1025 0080  Aspire 5024WLMMi
+		103c 308b  MX6125
+	4379  4379 Serial ATA Controller
+	437a  437A Serial ATA Controller
+		1002 4379  4379 Serial ATA Controller
+		1002 437a  437A Serial ATA Controller
+		14f1 8800  Leadtek WinFast TV2000XP Expert
+	437b  SB450 HDA Audio
+		1734 10b8  Realtek High Definition Audio
+	4380  SB600 Non-Raid-5 SATA
+	4381  SB600 Raid-5 SATA
+	4382  SB600 AC97 Audio
+	4383  SB600 Azalia
+	4384  SB600 PCI to PCI Bridge
+	4385  SB600 SMBus
+	4386  SB600 USB Controller (EHCI)
+	4387  SB600 USB (OHCI0)
+	4388  SB600 USB (OHCI1)
+	4389  SB600 USB (OHCI2)
+	438a  SB600 USB (OHCI3)
+	438b  SB600 USB (OHCI4)
+	438c  SB600 IDE
+	438d  SB600 PCI to LPC Bridge
+	438e  SB600 AC97 Modem
 	4437  Radeon Mobility 7000 IGP
 	4554  210888ET [Mach64 ET]
 	4654  Mach64 VT
@@ -492,16 +635,20 @@
 		1002 4750  Rage Pro Turbo
 	4751  3D Rage Pro 215GQ
 	4752  Rage XL
+		0e11 001e  Proliant Rage XL
 		1002 0008  Rage XL
-		1002 4752  Rage XL
+		1002 4752  Proliant Rage XL
 		1002 8008  Rage XL
 		1028 00ce  PowerEdge 1400
 		1028 00d1  PowerEdge 2550
 		1028 00d9  PowerEdge 2500
-		1028 0134  Poweredge SC600
+		1028 0134  PowerEdge 600SC
+		103c 10e1  NetServer Rage XL
+		107b 6400  6400 Server
 		1734 007a  Primergy RX300
 		8086 3411  SDS2 Mainboard
 		8086 3427  S875WP1-E mainboard
+		8086 5744  S845WD1-E mainboard
 	4753  Rage XC
 		1002 4753  Rage XC
 	4754  3D Rage I/II 215GT [Mach64 GT]
@@ -511,6 +658,7 @@
 	4757  3D Rage IIC AGP
 		1002 4757  Rage IIC AGP
 		1028 0089  Rage 3D IIC
+		1028 008e  PowerEdge 1300 onboard video
 		1028 4082  Rage 3D IIC
 		1028 8082  Rage 3D IIC
 		1028 c082  Rage 3D IIC
@@ -526,7 +674,6 @@
 		10f1 0002  RV250 If [Tachyon G9000 PRO]
 		148c 2039  RV250 If [Radeon 9000 Pro "Evil Commando"]
 		1509 9a00  RV250 If [Radeon 9000 "AT009"]
-# New subdevice - 3D Prophet 9000 PCI by Hercules. AGP version probably would have same ID, so not specified.
 		1681 0040  RV250 If [3D prophet 9000]
 		174b 7176  RV250 If [Sapphire Radeon 9000 Pro]
 		174b 7192  RV250 If [Radeon 9000 "Atlantis"]
@@ -542,13 +689,18 @@
 	4a4d  R420 JM [FireGL X3]
 	4a4e  M18 JN [Radeon Mobility 9800]
 	4a50  R420 JP [Radeon X800XT]
+	4a54  R420 [Radeon X800 VE]
+	4a69  R420 [Radeon X800 PRO/GTO] (Secondary)
+	4a6a  R420 [Radeon X800] (Secondary)
+	4a6b  R420 [Radeon X800] (Secondary)
 	4a70  R420 [X800XT-PE] (Secondary)
+	4a74  R420 [Radeon X800 VE] (Secondary)
 	4b49  R480 [Radeon X850XT]
 	4b4b  R480 [Radeon X850Pro]
 	4b4c  R481 [Radeon X850XT-PE]
-	4b69  R480 [Radeon X850XT secondary]
+	4b69  R480 [Radeon X850XT] (Secondary)
 	4b6b  R480 [Radeon X850Pro] (Secondary)
-	4b6c  R481 [Radeon X850XT-PE] Secondary
+	4b6c  R481 [Radeon X850XT-PE] (Secondary)
 	4c42  3D Rage LT Pro AGP-133
 		0e11 b0e7  Rage LT Pro (Compaq Presario 5240)
 		0e11 b0e8  Rage 3D LT Pro
@@ -597,14 +749,16 @@
 		1014 0235  ThinkPad A30/A30p (2652/2653)
 		1014 0239  ThinkPad X22/X23/X24
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
+		104d 8140  PCG-Z1SP laptop
 		1509 1930  Medion MD9703
 	4c5a  Radeon Mobility M6 LZ
 	4c64  Radeon R250 Ld [Radeon Mobility 9000 M9]
 	4c65  Radeon R250 Le [Radeon Mobility 9000 M9]
-	4c66  Radeon R250 Lf [FireGL 9000]
+	4c66  Radeon R250 [Mobility FireGL 9000]
+		1014 054d  Thinkpad T41
 	4c67  Radeon R250 Lg [Radeon Mobility 9000 M9]
 # Secondary chip to the Lf
-	4c6e  Radeon R250 Ln [Radeon Mobility 9000 M9] [Secondary]
+	4c6e  Radeon R250 Ln [Radeon Mobility 9000 M9] (Secondary)
 	4d46  Rage Mobility M4 AGP
 	4d4c  Rage Mobility M4 AGP
 	4e44  Radeon R300 ND [Radeon 9700 Pro]
@@ -618,14 +772,17 @@
 	4e48  Radeon R350 [Radeon 9800 Pro]
 	4e49  Radeon R350 [Radeon 9800]
 	4e4a  RV350 NJ [Radeon 9800 XT]
-	4e4b  R350 NK [Fire GL X2]
+	4e4b  R350 NK [FireGL X2]
 	4e50  RV350 [Mobility Radeon 9600 M10]
 		1025 005a  TravelMate 290
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		144d c00c  P35 notebook
+		1462 0311  MSI M510A
 		1734 1055  Amilo M1420W
 	4e51  M10 NQ [Radeon Mobility 9600]
 	4e52  RV350 [Mobility Radeon 9600 M10]
+		144d c00c  P35 notebook
 	4e53  M10 NS [Radeon Mobility 9600]
 	4e54  M10 NT [FireGL Mobility T2]
 	4e56  M11 NV [FireGL Mobility T2e]
@@ -638,8 +795,10 @@
 	4e68  Radeon R350 [Radeon 9800 Pro] (Secondary)
 	4e69  Radeon R350 [Radeon 9800] (Secondary)
 	4e6a  RV350 NJ [Radeon 9800 XT] (Secondary)
-		1002 4e71  ATI Technologies Inc M10 NQ [Radeon Mobility 9600]
-	4e71  M10 NQ [Radeon Mobility 9600] (secondary)
+		1002 4e71  M10 NQ [Radeon Mobility 9600]
+	4e71  M10 NQ [Radeon Mobility 9600] (Secondary)
+	4f72  RV250 [Radeon 9000 Series]
+	4f73  Radeon RV250 [Radeon 9000 Series] (Secondary)
 	5041  Rage 128 PA/PRO
 	5042  Rage 128 PB/PRO AGP 2x
 	5043  Rage 128 PC/PRO AGP 4x
@@ -731,18 +890,22 @@
 		1002 003a  Radeon 7000/Radeon VE
 		1002 00ba  Radeon 7000/Radeon VE
 		1002 013a  Radeon 7000/Radeon VE
+		1002 0908  XVR-100 (supplied by Sun)
 # The IBM card doubles as an ATI PCI video adapter
 		1014 029a  Remote Supervisor Adapter II (RSA2)
 		1014 02c8  IBM eServer xSeries server mainboard
 		1028 019a  PowerEdge SC1425
+		103c 1292  Radeon 7000
 		1458 4002  RV100 QY [RADEON 7000 PRO MAYA AV Series]
 		148c 2003  RV100 QY [Radeon 7000 Multi-Display Edition]
 		148c 2023  RV100 QY [Radeon 7000 Evil Master Multi-Display]
 		174b 7112  RV100 QY [Sapphire Radeon VE 7000]
 		174b 7c28  Sapphire Radeon VE 7000 DDR
 		1787 0202  RV100 QY [Excalibur Radeon 7000]
+		17ee 1001  Radeon 7000 64MB DDR + DVI
 	515a  Radeon RV100 QZ [Radeon 7000/VE]
 	515e  ES1000
+	515f  ES1000
 	5168  Radeon R200 Qh
 	5169  Radeon R200 Qi
 	516a  Radeon R200 Qj
@@ -804,17 +967,21 @@
 	554b  R423 UK [Radeon X800SE (PCIE)]
 	554d  R430 [Radeon X800 XL] (PCIe)
 	554f  R430 [Radeon X800 (PCIE)]
-	5550  R423 [Fire GL V7100]
-	5551  R423 UQ [FireGL V7200 (PCIE)]
+	5550  R423 [FireGL V7100]
+	5551  R423 [FireGL V5100 (PCIE)]
 	5552  R423 UR [FireGL V5100 (PCIE)]
 	5554  R423 UT [FireGL V7100 (PCIE)]
+	5569  R423 UI [Radeon X800PRO (PCIE)] (Secondary)
 	556b  Radeon R423 UK (PCIE) [X800 SE] (Secondary)
-	556d  R430 [Radeon X800 XL] (PCIe) Secondary
-	556f  R430 [Radeon X800 (PCIE) Secondary]
+	556d  R430 [Radeon X800 XL] (PCIe) (Secondary)
+	556f  R430 [Radeon X800] (PCIE) (Secondary)
+	5571  R423GL-SE [FireGL V5100 (PCIE)] (Secondary)
 	564a  M26 [Mobility FireGL V5000]
 	564b  M26 [Mobility FireGL V5000]
+	564f  M26 [Radeon Mobility X700 XL (PCIE)]
 	5652  M26 [Radeon Mobility X700]
 	5653  Radeon Mobility X700 (PCIE)
+		1025 0080  Aspire 5024WLMi
 	5654  264VT [Mach64 VT]
 		1002 5654  Mach64VT Reference
 	5655  264VT3 [Mach64 VT3]
@@ -834,13 +1001,15 @@
 		18bc 0050  GeXcube GC-R9200-C3 (Secondary)
 	5944  RV280 [Radeon 9200 SE (PCI)]
 	5950  RS480 Host Bridge
-		103c 308b  nx6125
-	5951  ATI Radeon Xpress 200 (RS480/RS482/RX480/RX482) Chipset - Host bridge
+		1025 0080  Aspire 5024WLMMi
+		103c 308b  MX6125
+	5951  Radeon Xpress 200 (RS480/RS482/RX480/RX482) Chipset - Host bridge
+	5952  RD580 [CrossFire Xpress 3200] Chipset Host Bridge
 	5954  RS480 [Radeon Xpress 200G Series]
 		1002 5954  RV370 [Radeon Xpress 200G Series]
-	5955  ATI Radeon XPRESS 200M 5955 (PCIE)
-		1002 5955  RS480 0x5955 [ATI Radeon XPRESS 200M 5955 (PCIE)]
-		103c 308b  nx6125
+	5955  Radeon XPRESS 200M 5955 (PCIE)
+		1002 5955  RS480 0x5955 [Radeon XPRESS 200M 5955 (PCIE)]
+		103c 308b  MX6125
 	5960  RV280 [Radeon 9200 PRO]
 	5961  RV280 [Radeon 9200]
 		1002 2f72  All-in-Wonder 9200 Series
@@ -854,8 +1023,10 @@
 		18bc 0053  Radeon 9200 Game Buster VIVO
 	5962  RV280 [Radeon 9200]
 	5964  RV280 [Radeon 9200 SE]
+		1002 5964  Radeon 9200 SE, 64-bit 128MB DDR, 200/166MHz
 		1043 c006  ASUS Radeon 9200 SE / TD / 128M
 		1458 4018  Radeon 9200 SE
+		1458 4032  Radeon 9200 SE 128MB
 		147b 6191  R9200SE-DT
 		148c 2073  CN-AG92E
 		174b 7c13  Sapphire Radeon 9200 SE
@@ -865,9 +1036,15 @@
 		18bc 0173  GC-R9200L(SE)-C3H [Radeon 9200 Game Buster]
 	5969  ES1000
 	5974  RS482 [Radeon Xpress 200]
-	5975  RS482 [Radeon Xpress 200M]
+	5975  RS485 [Radeon Xpress 1100 IGP]
+	5a33  Radeon Xpress 200 Host Bridge
 	5a34  RS480 PCI-X Root Port
+# Comes in pair with 5a3f
+	5a36  RS480 PCI Bridge
+	5a37  RS480 PCI Bridge
 	5a38  RS480 PCI Bridge
+# Comes in pair with 5a38
+	5a39  RS480 PCI Bridge
 	5a3f  RS480 PCI Bridge
 	5a41  RS400 [Radeon Xpress 200]
 	5a42  RS400 [Radeon Xpress 200M]
@@ -876,21 +1053,26 @@
 	5b60  RV370 5B60 [Radeon X300 (PCIE)]
 		1043 002a  Extreme AX300SE-X
 		1043 032e  Extreme AX300/TD
+		1462 0400  RX300SE-TD128E (MS-8940 REV:200)
 		1462 0402  RX300SE-TD128E (MS-8940)
-	5b62  RV370 5B62 [Radeon X600 (PCIE)]
-	5b63  RV370 [ATI Sapphire X550 Silent]
+		196d 1086  X300SE HM
+	5b62  RV380 [Radeon X600 (PCIE)]
+	5b63  RV370 [Sapphire X550 Silent]
 	5b64  RV370 5B64 [FireGL V3100 (PCIE)]
 	5b65  RV370 5B65 [FireGL D1100 (PCIE)]
 	5b70  RV370 [Radeon X300SE]
 		1462 0403  RX300SE-TD128E (MS-8940) (secondary display)
-	5b72  Radeon X600(RV380)
-	5b73  RV370 secondary [ATI Sapphire X550 Silent]
+		196d 1087  X300SE HM
+	5b72  RV380 [Radeon X600]
+	5b73  RV370 secondary [Sapphire X550 Silent]
 	5b74  RV370 5B64 [FireGL V3100 (PCIE)] (Secondary)
 	5c61  M9+ 5C61 [Radeon Mobility 9200 (AGP)]
 	5c63  M9+ 5C63 [Radeon Mobility 9200 (AGP)]
 		1002 5c63  Apple iBook G4 2004
+		144d c00c  P30 notebook
 	5d44  RV280 [Radeon 9200 SE] (Secondary)
 		1458 4019  Radeon 9200 SE (Secondary)
+		1458 4032  Radeon 9200 SE 128MB
 		174b 7c12  Sapphire Radeon 9200 SE (Secondary)
 		1787 5965  Excalibur 9200SE VIVO 128M (Secondary)
 		17af 2013  Radeon 9200 SE Excalibur (Secondary)
@@ -902,8 +1084,8 @@
 	5d4d  R480 [Radeon X850XT Platinum (PCIE)]
 	5d4f  R480 [Radeon X800 GTO (PCIE)]
 	5d52  R480 [Radeon X850XT (PCIE)] (Primary)
-		1002 0b12  PowerColor X850XT PCIe Primary
-		1002 0b13  PowerColor X850XT PCIe Secondary
+		1002 0b12  PowerColor X850XT PCIe (Primary)
+		1002 0b13  PowerColor X850XT PCIe (Secondary)
 	5d57  R423 5F57 [Radeon X800XT (PCIE)]
 	5d6d  R480 [Radeon X850XT Platinum (PCIE)] (Secondary)
 	5d6f  R480 [Radeon X800 GTO (PCIE)] (Secondary)
@@ -917,36 +1099,124 @@
 	5e4d  RV410 [Radeon X700 (PCIE)]
 		148c 2116  PowerColor Bravo X700
 	5e4f  RV410 [Radeon X700]
-	5e6b  RV410 [Radeon X700 Pro (PCIE)] Secondary
+	5e6b  RV410 [Radeon X700 Pro (PCIE)] (Secondary)
 	5e6d  RV410 [Radeon X700 (PCIE)] (Secondary)
 		148c 2117  PowerColor Bravo X700
+	5f57  R423 [Radeon X800XT (PCIE)]
 	700f  PCI Bridge [IGP 320M]
 	7010  PCI Bridge [IGP 340M]
 	7100  R520 [Radeon X1800]
+	7102  M58 [Radeon Mobility X1800]
+	7103  M58 [Mobility FireGL V7200]
+	7104  R520GL [FireGL V7200] (Primary)
 	7105  R520 [FireGL]
+	7106  M58 [Mobility FireGL V7100]
+	7108  M58 [Radeon Mobility X1800]
 	7109  R520 [Radeon X1800]
 		1002 0322  All-in-Wonder X1800XL
 		1002 0d02  Radeon X1800 CrossFire Edition
+	710a  R520 [Radeon X1800]
+	710b  R520 [Radeon X1800]
+	710c  R520 [Radeon X1800]
 	7120  R520 [Radeon X1800] (Secondary)
+	7124  R520GL [FireGL V7200] (Secondary)
 	7129  R520 [Radeon X1800] (Secondary)
 		1002 0323  All-in-Wonder X1800XL (Secondary)
 		1002 0d03  Radeon X1800 CrossFire Edition (Secondary)
-	7142  RV515 [Radeon X1300]
+	7140  RV515 [Radeon X1600]
+	7142  RV515 PRO [Radeon X1300/X1550 Series]
 		1002 0322  All-in-Wonder 2006 PCI-E Edition
+	7143  RV505 [Radeon X1550 Series]
+	7145  Radeon Mobility X1400
 	7146  RV515 [Radeon X1300]
 		1002 0322  All-in-Wonder 2006 PCI-E Edition
-	7162  RV515 [Radeon X1300] (Secondary)
+	7147  RV505 [Radeon X1550 64-bit]
+	7149  M52 [Mobility Radeon X1300]
+	714a  M52 [Mobility Radeon X1300]
+	714b  M52 [Mobility Radeon X1300]
+	714c  M52 [Mobility Radeon X1300]
+	714d  RV515 [Radeon X1300]
+	714e  RV515 [Radeon X1300]
+	7152  RV515GL [FireGL V3300] (Primary)
+	7153  RV515GL [FireGL V3350]
+	715e  RV515 [Radeon X1300]
+	715f  RV505 CE [Radeon X1550 64-bit]
+	7162  RV515 PRO [Radeon X1300/X1550 Series] (Secondary)
 		1002 0323  All-in-Wonder 2006 PCI-E Edition (Secondary)
 	7166  RV515 [Radeon X1300] (Secondary)
 		1002 0323  All-in-Wonder 2006 PCI-E Edition (Secondary)
+	7172  RV515GL [FireGL V3300] (Secondary)
+	7173  RV515GL [FireGL V3350] (Secondary)
+	7180  RV516 [Radeon X1300/X1550 Series]
+	7181  RV516 XT Radeon X1600 Series (Primary)
+	7183  RV516 [Radeon X1300/X1550 Series]
+	7187  RV516 [Radeon X1300/X1550 Series]
+	7188  M64-S [Mobility Radeon X2300]
+	718a  Mobility Radeon X2300
+	718c  M62CSP64 [Mobility Radeon X1350]
+	718d  M64CSP128 [Mobility Radeon X1450]
+	7193  RV516 [Radeon X1550 Series]
+	719b  FireMV 2250
+	719f  RV516LE [Radeon X1550 64-bit]
+	71a0  RV516 [Radeon X1300/X1550 Series] (Secondary)
+	71a1  RV516 XT Radeon X1600 Series (Secondary)
+	71a3  RV516 [Radeon X1300 Pro] (Secondary)
+	71a7  RV516 [Radeon X1300/X1550 Series] (Secondary)
+	71bb  FireMV 2250 (Secondary)
 	71c0  RV530 [Radeon X1600]
 	71c2  RV530 [Radeon X1600]
+	71c4  M56GL [Mobility FireGL V5200]
+		17aa 2007  ThinkPad T60p
+	71c5  M56P [Radeon Mobility X1600]
+	71c6  RV530LE [Radeon X1600/X1650 PRO]
+	71c7  RV535 [Radeon X1650 Series]
+	71ce  RV530LE [Radeon X1600]
+	71d4  M56GL [Mobility FireGL V5250]
+	71d5  M66-P [Mobility Radeon X1700]
+	71d6  M66-XT [Mobility Radeon X1700]
+	71de  RV530LE [Radeon X1600]
 	71e0  RV530 [Radeon X1600] (Secondary)
 	71e2  RV530 [Radeon X1600] (Secondary)
+	71e6  RV530LE [Radeon X1650 PRO] (Secondary)
+	71e7  RV535 [Radeon X1650 Series]
+	7210  M71 [Mobility Radeon X2100]
+	7211  M71 [Mobility Radeon X2100] (Secondary)
+	7240  R580 [Radeon X1900]
+	7241  R580 [Radeon X1900]
+	7242  R580 [Radeon X1900]
+	7243  R580 [Radeon X1900]
+	7244  R580 [Radeon X1900]
+	7245  R580 [Radeon X1900]
+	7246  R580 [Radeon X1900]
+	7247  R580 [Radeon X1900]
+	7248  R580 [Radeon X1900]
+	7249  R580 [Radeon X1900 XT] (Primary)
+	724a  R580 [Radeon X1900]
+	724b  R580 [Radeon X1900]
+		1002 0b12  Radeon X1900 (Primary)
+		1002 0b13  Radeon X1900 (Secondary)
+	724c  R580 [Radeon X1900]
+	724d  R580 [Radeon X1900]
+	724e  R580 [AMD Stream Processor]
+	7269  R580 [Radeon X1900 XT] (Secondary)
+	726b  R580 [Radeon X1900]
+	726e  R580 [AMD Stream Processor] (Secondary)
+	7280  Radeon X1950 Pro (Primary) (PCIE)
+	7288  Radeon X1950 GT
+	7291  Radeon X1650 XT (Primary) (PCIE)
+	7293  Radeon X1650 Series
+	72a0  Radeon X1950 Pro (Secondary) (PCIE)
+	72a8  Radeon X1950 GT (Secondary)
+	72b1  Radeon X1650 XT (Secondary) (PCIE)
+	72b3  Radeon X1650 Series (Secondary)
 	7833  Radeon 9100 IGP Host Bridge
 	7834  Radeon 9100 PRO IGP
 	7835  Radeon Mobility 9200 IGP
 	7838  Radeon 9100 IGP PCI/AGP Bridge
+	7919  Radeon X1200 Series Audio Controller
+	791e  Radeon X1200 Series
+	791f  Radeon X1200 Series
+	793f  Radeon X1200 Series (Secondary)
 	7c37  RV350 AQ [Radeon 9600 SE]
 	cab0  AGP Bridge [IGP 320M]
 	cab2  RS200/RS200M AGP Bridge [IGP 340M]
@@ -1068,7 +1338,9 @@
 		2646 0001  KNE100TX Fast Ethernet
 	000a  21230 Video Codec
 	000d  PBXGB [TGA2]
-	000f  DEFPA
+	000f  PCI-to-PDQ Interface Chip [PFI]
+		1011 def1  FDDI controller (DEFPA)
+		103c def1  FDDI controller (3X-DEFPA)
 	0014  DECchip 21041 [Tulip Pass 3]
 		1186 0100  DE-530+
 	0016  DGLPB [OPPO]
@@ -1080,6 +1352,7 @@
 		1025 0315  ALN315 Fast Ethernet
 		1033 800c  PC-9821-CS01 100BASE-TX Interface Card
 		1033 800d  PC-9821NR-B06 100BASE-TX Interface Card
+		103c 125a  10/100Base-TX (PCI) [A5506B]
 		108d 0016  Rapidfire 2327 10/100 Ethernet
 		108d 0017  GoCard 2250 Ethernet 10/100 Cardbus
 		10b8 2005  SMC8032DT Extreme Ethernet 10/100
@@ -1107,6 +1380,9 @@
 		1385 2100  FA510
 		1395 0001  10/100 Ethernet CardBus PC Card
 		13d1 ab01  EtherFast 10/100 Cardbus (PCMPC200)
+		1498 000a  TPMC880-10 10/100Base-T and 10Base2 PMC Ethernet Adapter
+		1498 000b  TPMC880-11 Single 10/100Base-T PMC Ethernet Adapter
+		1498 000c  TPMC880-12 Single 10Base2 PMC Ethernet Adapter
 		14cb 0100  LNDL-100N 100Base-TX Ethernet PC Card
 		8086 0001  EtherExpress PRO/100 Mobile CardBus 32
 	001a  Farallon PN9000SX Gigabit Ethernet
@@ -1123,7 +1399,7 @@
 		0e11 4050  Integrated Smart Array
 		0e11 4051  Integrated Smart Array
 		0e11 4058  Integrated Smart Array
-		103c 10c2  Hewlett-Packard NetRAID-4M
+		103c 10c2  NetRAID-4M
 		12d9 000a  IP Telephony card
 		4c53 1050  CT7 mainboard
 		4c53 1051  CE7 mainboard
@@ -1167,11 +1443,14 @@
 	4400  CD 4400
 	6001  CS 4610/11 [CrystalClear SoundFusion Audio Accelerator]
 		1014 1010  CS4610 SoundFusion Audio Accelerator
-	6003  CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator]
+	6003  CS 4614/22/24/30 [CrystalClear SoundFusion Audio Accelerator]
 		1013 4280  Crystal SoundFusion PCI Audio Accelerator
+		1014 0153  ThinkPad A20m
+		153b 112e  DMX XFire 1024
 		153b 1136  SiXPack 5.1+
 		1681 0050  Game Theater XP
 		1681 a011  Fortissimo III 7.1
+		5053 3357  Santa Cruz
 	6004  CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator]
 	6005  Crystal CS4281 PCI Audio
 		1013 4281  Crystal CS4281 PCI Audio
@@ -1197,7 +1476,6 @@
 	0020  GXT1000 Graphics Adapter
 	0022  IBM27-82351
 	002d  Python
-# [official name in AIX 5]
 	002e  SCSI RAID Adapter [ServeRAID]
 		1014 002e  ServeRAID-3x
 		1014 022e  ServeRAID-4H
@@ -1227,6 +1505,7 @@
 	0053  25 MBit ATM Controller
 	0054  GXT500P/GXT550P Graphics Adapter
 	0057  MPEG PCI Bridge
+	0058  SSA Adapter [Advanced SerialRAID/X]
 	005c  i82557B 10/100
 	005e  GXT800P Graphics Adapter
 	007c  ATM Controller (14107c00)
@@ -1244,7 +1523,7 @@
 	009f  PCI 4758 Cryptographic Accelerator
 	00a5  ATM Controller (1410a500)
 	00a6  ATM 155MBPS MM Controller (1410a600)
-	00b7  256-bit Graphics Rasterizer [Fire GL1]
+	00b7  256-bit Graphics Rasterizer [FireGL1]
 		1092 00b8  FireGL1 AGP 32Mb
 	00b8  GXT2000P Graphics Adapter
 	00be  ATM 622MBPS Controller (1410be00)
@@ -1299,6 +1578,7 @@
 		1014 02c1  PCI-X DDR 3Gb SAS Adapter (572A/572C)
 		1014 02c2  PCI-X DDR 3Gb SAS RAID Adapter (572B/571D)
 	0302  Winnipeg PCI-X Host Bridge
+	0308  CalIOC2 PCI-E Root Port
 	0314  ZISC 036 Neural accelerator card
 	3022  QLA3022 Network Adapter
 	4022  QLA3022 Network Adapter
@@ -1311,6 +1591,10 @@
 1019  Elitegroup Computer Systems
 101a  AT&T GIS (NCR)
 	0005  100VG ethernet
+	1dc1  Bynet
+		101a 0019  BIC2M
+		101a 001f  BIC4M
+		101a 0ece  BYA4M
 101b  Vitesse Semiconductor
 101c  Western Digital
 	0193  33C193A
@@ -1373,6 +1657,7 @@
 		1259 2701  AT-2700FX 100Mb Ethernet
 		1259 2702  AT-2700FTX 10/100 Mb Fiber/Copper Fast Ethernet
 		1259 2703  AT-2701FX
+		1259 2704  AT-2701FTX 10/100 Mb Fiber/Copper Fast Ethernet
 		4c53 1000  CC7/CR7/CP7/VC7/VP7/VR7 mainboard
 		4c53 1010  CP5/CR6 mainboard
 		4c53 1020  VR6 mainboard
@@ -1385,6 +1670,8 @@
 	2003  Am 1771 MBW [Alchemy]
 	2020  53c974 [PCscsi]
 	2040  79c974
+# CS5536 [Geode companion] Host Bridge
+	2080  Conrad Kostecki
 	2081  Geode LX Video
 	2082  Geode LX AES Security Block
 	208f  CS5536 GeodeLink PCI South Bridge
@@ -1508,6 +1795,7 @@
 	9930  CyberBlade/XPm
 1024  Zenith Data Systems
 1025  Acer Incorporated [ALI]
+	0090  BCM440x 100Base-TX Fast Ethernet
 	1435  M1435
 	1445  M1445
 	1449  M1449
@@ -1570,13 +1858,21 @@
 		1028 0001  PowerEdge 2400
 	0002  PowerEdge Expandable RAID Controller 3/Di
 		1028 0002  PowerEdge 4400
+		1028 00d1  PERC 3/DiV [Viper]
+		1028 00d9  PERC 3/DiL [Lexus]
 	0003  PowerEdge Expandable RAID Controller 3/Si
 		1028 0003  PowerEdge 2450
+# PowerEdge Codename Iguana
+	0004  PowerEdge Expandable RAID Controller 3/Di [Iguana]
+		1028 0004  PERC 3/DiF [Iguana]
 	0006  PowerEdge Expandable RAID Controller 3/Di
 	0007  Remote Access Card III
 	0008  Remote Access Card III
 	0009  Remote Access Card III: BMC/SMIC device not present
 	000a  PowerEdge Expandable RAID Controller 3/Di
+		1028 0106  PERC 3/DiJ [Jaguar]
+		1028 011b  PERC 3/DiD [Dagger]
+		1028 0121  PERC 3/DiB [Boxster]
 	000c  Embedded Remote Access or ERA/O
 	000d  Embedded Remote Access: BMC/SMIC device
 	000e  PowerEdge Expandable RAID controller 4/Di
@@ -1591,7 +1887,10 @@
 		1028 016f  PowerEdge Expandable RAID Controller 4e/Di
 		1028 0170  PowerEdge Expandable RAID Controller 4e/Di
 	0014  Remote Access Card 4 Daughter Card SMIC interface
-	0015  PowerEdge Expandable RAID controller 5
+	0015  PowerEdge Expandable RAID controller 5i
+		1028 1f01  PERC 5/E Adapter RAID Controller
+		1028 1f02  PERC 5/i Adapter RAID Controller
+	1f03  PERC 5/i
 1029  Siemens Nixdorf IS
 102a  LSI Logic
 	0000  HYDRA
@@ -1666,7 +1965,8 @@
 		102b ff03  Millennium G200 AGP
 		102b ff04  Marvel G200 AGP
 		110a 0032  MGA-G200 AGP
-	0525  G400/G450
+	0522  MGA G200e [Pilot] ServerEngines (SEP1)
+	0525  MGA G400/G450
 		0e11 b16f  MGA-G400 AGP
 		102b 0328  Millennium G400 16Mb SDRAM
 		102b 0338  Millennium G400 16Mb SDRAM
@@ -1751,6 +2051,9 @@
 		102b 2538  Parhelia APVe
 		102b 3007  QID Low-profile PCIe
 	4536  VIA Framegrabber
+	4cdc  Morphis Vision System Jpeg2000
+	4fc5  Morphis Vision System
+	5e10  Morphis Vision System Aux/IO
 	6573  Shark 10/100 Multiport SwitchNIC
 102c  Chips and Technologies
 	00b8  F64310
@@ -1788,6 +2091,7 @@
 		102f 00f8  ATM Meteor 155
 	0030  TC35815CF PCI 10/100 Mbit Ethernet Controller
 	0031  TC35815CF PCI 10/100 Mbit Ethernet Controller with WOL
+	0032  TC35815CF PCI 10/100 Mbit Ethernet Controller on TX4939
 	0105  TC86C001 [goku-s] IDE
 	0106  TC86C001 [goku-s] USB 1.1 Host
 	0107  TC86C001 [goku-s] USB Device Controller
@@ -1862,6 +2166,8 @@
 	00f2  uPD72874 IEEE1394 OHCI 1.1 3-port PHY-Link Ctrlr
 	00f3  uPD6113x Multimedia Decoder/Processor [EMMA2]
 	010c  VR7701
+	0125  uPD720400 PCI Express - PCI/PCI-X Bridge
+	013a  Dual Tuner/MPEG Encoder
 1034  Framatome Connectors USA Inc.
 1035  Comp. & Comm. Research Lab
 1036  Future Domain Corp.
@@ -1882,6 +2188,7 @@
 	0180  RAID bus controller 180 SATA/PATA  [SiS]
 	0181  SATA
 	0182  182 SATA/RAID Controller
+	0186  AHCI Controller (0106)
 	0190  190 Gigabit Ethernet Adapter
 	0191  191 Gigabit Ethernet Adapter
 	0200  5597/5598/6326 VGA
@@ -1913,6 +2220,7 @@
 	0655  655 Host
 	0660  660 Host
 	0661  661FX/M661FX/M661MX Host
+	0662  662 Host
 	0730  730 Host
 	0733  733 Host
 	0735  735 Host
@@ -1927,11 +2235,19 @@
 		1019 0a14  K7S5A motherboard
 		1039 0900  SiS900 10/100 Ethernet Adapter
 		1043 8035  CUSI-FX motherboard
+		1462 0900  MS-6701 motherboard
 	0961  SiS961 [MuTIOL Media IO]
 	0962  SiS962 [MuTIOL Media IO]
 	0963  SiS963 [MuTIOL Media IO]
 	0964  SiS964 [MuTIOL Media IO]
 	0965  SiS965 [MuTIOL Media IO]
+	0966  SiS966 [MuTIOL Media IO]
+	0968  SiS968 [MuTIOL Media IO]
+	1180  SATA Controller / IDE mode
+	1182  SATA Controller / RAID mode
+	1183  SATA Controller / IDE mode
+	1184  AHCI Controller / RAID mode
+	1185  AHCI IDE Controller (0106)
 	3602  83C602
 	5107  5107
 	5300  SiS540 PCI Display Adapter
@@ -1942,6 +2258,7 @@
 		1019 0970  P6STP-FL motherboard
 		1039 5513  SiS5513 EIDE Controller (A,B step)
 		1043 8035  CUSI-FX motherboard
+		1462 7010  MS-6701 motherboard
 	5517  5517
 	5571  5571
 	5581  5581 Pentium Chipset
@@ -1966,16 +2283,23 @@
 		1092 4910  SpeedStar A70
 		1092 4920  SpeedStar A70
 		1569 6326  SiS6326 GUI Accelerator
-	6330  661/741/760/761 PCI/AGP VGA Display Adapter
+	6330  661/741/760 PCI/AGP or 662/761Gx PCIE VGA Display Adapter
 		1039 6330  [M]661xX/[M]741[GX]/[M]760 PCI/AGP VGA Adapter
+		1043 8113  SiS Real 256E (ASUS P5S800-VM motherboard)
+	6350  770/670 PCIE VGA Display Adapter
+	6351  771/671 PCIE VGA Display Adapter
 	7001  USB 1.0 Controller
 		1019 0a14  K7S5A motherboard
 		1039 7000  Onboard USB Controller
 		1462 5470  K7SOM+ 5.2C Motherboard
+		1462 7010  MS-6701 motherboard
 	7002  USB 2.0 Controller
+		1462 7010  MS-6701 motherboard
 		1509 7002  Onboard USB Controller
 	7007  FireWire Controller
+		1462 701d  MS-6701
 	7012  AC'97 Sound Controller
+		1462 7010  MS-6701 motherboard
 		15bd 1001  DFI 661FX motherboard
 # There are may be different modem codecs here (Intel537 compatible and incompatible)
 	7013  AC'97 Modem Controller
@@ -2005,13 +2329,13 @@
 		270f a171  SiS PCI Audio Accelerator
 		a0a0 0022  SiS PCI Audio Accelerator
 	7019  SiS7019 Audio Accelerator
+	7502  Azalia Audio Controller
 103a  Seiko Epson Corporation
 103b  Tatung Co. of America
 103c  Hewlett-Packard Company
+	002a  NX9000 Notebook
 	1005  A4977A Visualize EG
-	1006  Visualize FX6
-	1008  Visualize FX4
-	100a  Visualize FX2
+	1008  Visualize FX
 	1028  Tach TL Fibre Channel Host Adapter
 	1029  Tach XL2 Fibre Channel Host Adapter
 		107e 000f  Interphase 5560 Fibre Channel Adapter
@@ -2052,17 +2376,33 @@
 	121c  NetServer PCI COM Port Decoder
 	1229  zx1 System Bus Adapter
 	122a  zx1 I/O Controller
-	122e  zx1 Local Bus Adapter
+	122e  PCI-X Local Bus Adapter
+	127b  sx1000 System Bus Adapter
 	127c  sx1000 I/O Controller
 	1290  Auxiliary Diva Serial Port
 	1291  Auxiliary Diva Serial Port
 	12b4  zx1 QuickSilver AGP8x Local Bus Adapter
+	12eb  sx2000 System Bus Adapter
+	12ec  sx2000 I/O Controller
+	12ee  PCI-X 2.0 Local Bus Adapter
+	12f8  Broadcom BCM4306 802.11b/g Wireless LAN
 	12fa  BCM4306 802.11b/g Wireless LAN Controller
+	1302  RMP-3 Shared Memory Driver
+	1303  RMP-3 (Remote Management Processor)
 	2910  E2910A PCIBus Exerciser
 	2925  E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer
 	3080  Pavilion ze2028ea
-	3220  Hewlett-Packard Smart Array P600
-	3230  Hewlett-Packard Smart Array Controller
+	3085  Realtek RTL8139/8139C/8139C+
+	30b5  Compaq Presario V3000Z
+	3220  Smart Array P600
+		103c 3225  3 Gb/s SAS RAID
+	3230  Smart Array Controller
+	3238  Smart Array E200i (SAS Controller)
+	4030  zx2 System Bus Adapter
+	4031  zx2 I/O Controller
+	4037  PCIe Local Bus Adapter
+	403b  PCIe Root Port
+	60e8  NetRAID-2M : ZX1/M (OEM AMI MegaRAID 493)
 103e  Solliday Engineering
 103f  Synopsys/Logic Modeling Group
 1040  Accelgraphics Inc.
@@ -2078,16 +2418,23 @@
 		0675 1704  ISDN Adapter (PCI Bus, D, C)
 		0675 1707  ISDN Adapter (PCI Bus, DV, W)
 		10cf 105e  ISDN Adapter (PCI Bus, DV, W)
+	0c11  A7N8X Motherboard nForce2 IDE/USB/SMBus
 	4015  v7100 SDRAM [GeForce2 MX]
 	4021  v7100 Combo Deluxe [GeForce2 MX + TV tuner]
 	4057  v8200 GeForce 3
 	8043  v8240 PAL 128M [P4T] Motherboard
+	8047  v8420 Deluxe [GeForce4 Ti4200]
 	807b  v9280/TD [Geforce4 TI4200 8X With TV-Out and DVI]
+	8095  A7N8X Motherboard nForce2 AC97 Audio
+	80ac  A7N8X Motherboard nForce2 AGP/Memory
 	80bb  v9180 Magic/T [GeForce4 MX440 AGP 8x 64MB TV-out]
 	80c5  nForce3 chipset motherboard [SK8N]
 	80df  v9520 Magic/T
+	815a  A8N-SLI Motherboard nForce4 SATA
+	8168  Realtek PCI-E Gigabit Ethernet Controller (RTL8111B)
 	8187  802.11a/b/g Wireless LAN Card
 	8188  Tiger Hybrid TV Capture Device
+	81f4  EN7300TC512/TD/128M/A(C262G) [Graphics Card EN7300TC512]
 1044  Adaptec (formerly DPT)
 	1012  Domino RAID Engine
 	a400  SmartCache/Raid I-IV Controller
@@ -2164,7 +2511,7 @@
 	8901  Gloria XL
 		1048 0935  GLoria XL (Virge)
 1049  Fountain Technologies, Inc.
-# # nee SGS Thomson Microelectronics
+# nee SGS Thomson Microelectronics
 104a  STMicroelectronics
 	0008  STG 2000X
 	0009  STG 1764X
@@ -2175,6 +2522,7 @@
 	021a  STPC Consumer S Southbridge
 	021b  STPC Consumer IIA Southbridge
 	0500  ST70137 [Unicorn] ADSL DMT Transceiver
+		104a 0500  BeWAN ADSL PCI st
 	0564  STPC Client Northbridge
 	0981  21x4x DEC-Tulip compatible 10/100 Ethernet
 	1746  STG 1764X
@@ -2229,18 +2577,21 @@
 		e4bf 1010  CF2-1-CYMBAL
 	8020  TSB12LV26 IEEE-1394 Controller (Link)
 		11bd 000f  Studio DV500-1394
+		11bd 001c  Excalibur 4.1
 	8021  TSB43AA22 IEEE-1394 Controller (PHY/Link Integrated)
 		104d 80df  Vaio PCG-FX403
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
 	8022  TSB43AB22 IEEE-1394a-2000 Controller (PHY/Link)
 	8023  TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link)
-		103c 088c  nc8000 laptop
+		103c 088c  NC8000 laptop
 		1043 808b  K8N4-E Mainboard
+		1043 815b  P5W DH Deluxe Motherboard
 	8024  TSB43AB23 IEEE-1394a-2000 Controller (PHY/Link)
 	8025  TSB82AA2 IEEE-1394b Link Layer Controller
 		1458 1000  GA-K8N Ultra-9 Mainboard
 	8026  TSB43AB21 IEEE-1394a-2000 Controller (PHY/Link)
-		103c 006a  nx9500
+		1025 003c  Aspire 2001WLCi (Compaq CL50 motherboard)
+		103c 006a  NX9500
 		1043 808d  A7V333 mainboard.
 	8027  PCI4451 IEEE-1394 Controller
 		1028 00e6  PCI4451 IEEE-1394 Controller (Dell Inspiron 8100)
@@ -2250,42 +2601,60 @@
 		1071 8160  MIM2900
 	802b  PCI7410,7510,7610 OHCI-Lynx Controller
 		1028 0139  Latitude D400
-		1028 014e  PCI7410,7510,7610 OHCI-Lynx Controller (Dell Latitude D800)
+		1028 014e  PCI7410,7510,7610 OHCI-Lynx Controller (Latitude D800)
 	802e  PCI7x20 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller
 	8031  PCIxx21/x515 Cardbus Controller
-		103c 099c  nx6110/nc6120
-		103c 308b  nx6125
+		1025 0080  Aspire 5024WLMi
+		103c 099c  NX6110/NC6120
+		103c 308b  MX6125
 	8032  OHCI Compliant IEEE 1394 Host Controller
-		103c 099c  nx6110/nc6120
-		103c 308b  nx6125
+		1025 0080  Aspire 5024WLMi
+		103c 099c  NX6110/NC6120
+		103c 308b  MX6125
 	8033  PCIxx21 Integrated FlashMedia Controller
-		103c 099c  nx6110/nc6120
-# Turion Notebook nx6125
-		103c 308b  nx6125
-	8034  PCI6411, PCI6421, PCI6611, PCI6621, PCI7411, PCI7421, PCI7611, PCI7621 Secure Digital (SD) Controller
-		103c 099c  nx6110/nc6120
-		103c 308b  nx6125
-	8035  PCI6411, PCI6421, PCI6611, PCI6621, PCI7411, PCI7421, PCI7611, PCI7621 Smart Card Controller (SMC)
-		103c 099c  nx6110/nc6120
+		1025 0080  Aspire 5024WLMi
+		103c 099c  NX6110/NC6120
+		103c 308b  MX6125
+	8034  PCI6411/6421/6611/6621/7411/7421/7611/7621 Secure Digital Controller
+		1025 0080  Aspire 5024WLMi
+		103c 099c  NX6110/NC6120
+		103c 308b  MX6125
+	8035  PCI6411/6421/6611/6621/7411/7421/7611/7621 Smart Card Controller
+		103c 099c  NX6110/NC6120
 	8036  PCI6515 Cardbus Controller
 	8038  PCI6515 SmartCard Controller
+	8039  PCIxx12 Cardbus Controller
+		103c 309f  nx9420
+		103c 30a1  NC2400
+	803a  PCIxx12 OHCI Compliant IEEE 1394 Host Controller
+		103c 309f  nx9420
+		103c 30a1  NC2400
+	803b  5-in-1 Multimedia Card Reader (SD/MMC/MS/MS PRO/xD)
+		103c 309f  nx9420
+	803c  PCIxx12 SDA Standard Compliant SD Host Controller
+		103c 309f  nx9420
+	803d  PCIxx12 GemCore based SmartCard controller
+		103c 309f  nx9420
+		103c 30a1  NC2400
 	8201  PCI1620 Firmware Loading Function
 	8204  PCI7410,7510,7610 PCI Firmware Loading Function
 		1028 0139  Latitude D400
 		1028 014e  Latitude D800
+	8231  XIO2000(A)/XIO2200(A) PCI Express-to-PCI Bridge
+	8235  XIO2200(A) IEEE-1394a-2000 Controller (PHY/Link)
 	8400  ACX 100 22Mbps Wireless Interface
 		1186 3b00  DWL-650+ PC Card cardbus 22Mbs Wireless Adapter [AirPlus]
 		1186 3b01  DWL-520+ 22Mbps PCI Wireless Adapter
 		16ab 8501  WL-8305 IEEE802.11b+ Wireless LAN PCI Adapter
 	8401  ACX 100 22Mbps Wireless Interface
-# OK, this info is almost useless as is, but at least it's known that it's a wireless card. More info requested from reporter.
 	9000  Wireless Interface (of unknown type)
 	9065  TMS320DM642
 	9066  ACX 111 54Mbps Wireless Interface
-		104c 9066  DWL-G520+ Wireless PCI Adapter
+		104c 9066  Trendnet TEW-421PC Wireless PCI Adapter
 		1186 3b04  DWL-G520+ Wireless PCI Adapter
 		1186 3b05  DWL-G650+ AirPlusG+ CardBus Wireless LAN
 		13d1 aba0  SWLMP-54108 108Mbps Wireless mini PCI card 802.11g+
+		1737 0033  WPC54G Ver.2 802.11G PC Card
 	a001  TDC1570
 	a100  TDC1561
 	a102  TNETA1575 HyperSAR Plus w/PCI Host i/f & UTOPIA i/f
@@ -2322,21 +2691,24 @@
 	ac40  PCI4450 PC card Cardbus Controller
 	ac41  PCI4410 PC card Cardbus Controller
 	ac42  PCI4451 PC card Cardbus Controller
-		1028 00e6  PCI4451 PC card CardBus Controller (Dell Inspiron 8100)
+		1028 00e6  PCI4451 PC card CardBus Controller (Inspiron 8100)
 	ac44  PCI4510 PC card Cardbus Controller
+		1028 0149  Inspiron 5100
 		1028 0163  Latitude D505
 		1028 0196  Inspiron 5160
 		1071 8160  MIM2000
 	ac46  PCI4520 PC card Cardbus Controller
 	ac47  PCI7510 PC card Cardbus Controller
 		1028 0139  Latitude D400
+		1028 013f  Precision M60
 		1028 014e  Latitude D800
 	ac4a  PCI7510,7610 PC card Cardbus Controller
 		1028 0139  Latitude D400
 		1028 014e  Latitude D800
 	ac50  PCI1410 PC card Cardbus Controller
-	ac51  PCI1420
+	ac51  PCI1420 PC card Cardbus Controller
 		0e11 004e  Evo N600c
+		1014 0148  ThinkPad A20m
 		1014 023b  ThinkPad T23 (2647-4MG)
 		1028 00b1  Latitude C600
 		1028 012a  Latitude C640
@@ -2347,10 +2719,13 @@
 	ac52  PCI1451 PC card Cardbus Controller
 	ac53  PCI1421 PC card Cardbus Controller
 	ac54  PCI1620 PC Card Controller
+		103c 08b0  tc1100 tablet
 	ac55  PCI1520 PC card Cardbus Controller
 		1014 0512  ThinkPad T30/T40
 	ac56  PCI1510 PC card Cardbus Controller
+		1014 0512  Thinkpad R50e model 1634
 		1014 0528  ThinkPad R40e (2684-HVG) Cardbus Controller
+		17aa 2012  ThinkPad T60/R60 series
 	ac60  PCI2040 PCI to DSP Bridge Controller
 		175c 5100  ASI51xx Audio Adapter
 		175c 6100  ASI61xx Audio Adapter
@@ -2358,7 +2733,8 @@
 		175c 8800  ASI88xx Audio Adapter
 	ac8d  PCI 7620
 	ac8e  PCI7420 CardBus Controller
-	ac8f  PCI7420/PCI7620 Dual Socket CardBus and Smart Card Cont. w/ 1394a-2000 OHCI Two-Port  PHY/Link-Layer Cont. and SD/MS-Pro Sockets
+	ac8f  PCI7420/7620 Combo CardBus, 1394a-2000 OHCI and SD/MS-Pro Controller
+		1028 018d  Inspiron 700m
 	fe00  FireWire Host Controller
 	fe03  12C01A FireWire Host Controller
 104d  Sony Corporation
@@ -2378,6 +2754,7 @@
 1050  Winbond Electronics Corp
 	0000  NE2000
 	0001  W83769F
+	0033  W89C33D 802.11 a/b/g BB/MAC
 	0105  W82C105
 	0840  W89C840
 		1050 0001  W89C840 Ethernet Adapter
@@ -2413,6 +2790,7 @@
 	0006  MPC8245 [Unity]
 	0008  MPC8540
 	0009  MPC8560
+	0012  MPC8548 [PowerQUICC III]
 	0100  MC145575 [HFC-PCI]
 	0431  KTI829c 100VG
 	1801  DSP56301 Digital Signal Processor
@@ -2442,6 +2820,8 @@
 		ecc0 0072  Mona rev.2
 	18c0  MPC8265A/8266/8272
 	18c1  MPC8271/MPC8272
+	3052  SM56 Data Fax Modem
+	3055  SM56 Data Fax Modem
 	3410  DSP56361 Digital Signal Processor
 		ecc0 0050  Gina24 rev.0
 		ecc0 0051  Gina24 rev.1
@@ -2482,12 +2862,14 @@
 	5803  MPC5200
 	5806  MCF54 Coldfire
 	5808  MPC8220
+	5809  MPC5200B
 	6400  MPC190 Security Processor (S1 family, encryption)
 	6405  MPC184 Security Processor (S1 family)
 1058  Electronics & Telecommunications RSH
 1059  Teknor Industrial Computers Inc
 105a  Promise Technology, Inc.
 	0d30  PDC20265 (FastTrak100 Lite/Ultra100)
+		1043 8042  AV7266-E South Bridge Promise RAID
 		105a 4d33  Ultra100
 	0d38  20263
 		105a 4d39  Fasttrak66
@@ -2502,19 +2884,21 @@
 	3375  PDC20375 (SATA150 TX2plus)
 	3376  PDC20376 (FastTrak 376)
 		1043 809e  A7V8X motherboard
-	3515  PDC40719
+	3515  PDC40719 [FastTrak TX4300/TX4310]
 	3519  PDC40519 (FastTrak TX4200)
 	3570  20771 (FastTrak TX2300)
 	3571  PDC20571 (FastTrak TX2200)
 	3574  PDC20579 SATAII 150 IDE Controller
 	3577  PDC40779 (SATA 300 779)
-	3d17  PDC20718 (SATA 300 TX4)
+	3d17  PDC40718 (SATA 300 TX4)
 	3d18  PDC20518/PDC40518 (SATAII 150 TX4)
 	3d73  PDC40775 (SATA 300 TX2plus)
 	3d75  PDC20575 (SATAII150 TX2plus)
+	4302  80333 [SuperTrak EX4350]
 	4d30  PDC20267 (FastTrak100/Ultra100)
 		105a 4d33  Ultra100
 		105a 4d39  FastTrak100
+		8086 5744  S845WD1-E mainboard
 	4d33  20246
 		105a 4d33  20246 IDE Controller
 	4d38  PDC20262 (FastTrak66/Ultra66)
@@ -2542,7 +2926,16 @@
 	6629  PDC20619 (FastTrak TX4000)
 	7275  PDC20277 (SBFastTrak133 Lite)
 	8002  SATAII150 SX8
+	8350  80333 [SuperTrak EX8350/EX16350], 80331 [SuperTrak EX8300/EX16300]
+	8650  81348 [SuperTrak EX4650/EX8650/EX8654/EX4650EL]
+		105a 4600  SuperTrak EX4650
+		105a 4610  SuperTrak EX4650EL
+		105a 8601  SuperTrak EX8650
+		105a 8602  SuperTrak EX8654
+	c350  80333 [SuperTrak EX12350]
+	e350  80333 [SuperTrak EX24350]
 105b  Foxconn International, Inc.
+	0c4d  SiS AC'97 Sound Controller
 105c  Wipro Infotech Limited
 105d  Number 9 Computer Company
 	2309  Imagine 128
@@ -2579,6 +2972,8 @@
 		13cc 000a  Barco Metheus 5 Megapixel, Dual Head
 	5348  Revolution 4
 		105d 0037  Revolution IV-FP AGP (For SGI 1600SW)
+		11a4 0028  PVS5600M
+		11a4 0038  PVS5600D
 105e  Vtech Computers Ltd
 105f  Infotronic America Inc
 1060  United Microelectronics [UMC]
@@ -2752,6 +3147,7 @@
 	0012  YMF-754 [DS-1E Audio Controller]
 		1073 0012  DS-XG PCI Audio Codec
 	0020  DS-1 Audio
+	1000  SW1000XG [XG Factory]
 	2000  DS2416 Digital Mixing Card
 		1073 2000  DS2416 Digital Mixing Card
 1074  NexGen Microsystems
@@ -2774,16 +3170,22 @@
 	2200  QLA2200 64-bit Fibre Channel Adapter
 		1077 0002  QLA2200
 	2300  QLA2300 64-bit Fibre Channel Adapter
-	2312  QLA2312 Fibre Channel Adapter
-	2322  QLA2322 Fibre Channel Adapter
-	2422  QLA2422 Fibre Channel Adapter
-	2432  QLA2432 Fibre Channel Adapter
-	3010  QLA3010 Network Adapter
-	3022  QLA3022 Network Adapter
-	4010  QLA4010 iSCSI TOE Adapter
-	4022  QLA4022 iSCSI TOE Adapter
-	6312  QLA6312 Fibre Channel Adapter
-	6322  QLA6322 Fibre Channel Adapter
+	2312  ISP2312-based 2Gb Fibre Channel to PCI-X HBA
+		103c 0131  2Gb Fibre Channel - Single port [A7538A]
+		103c 12ba  2Gb Fibre Channel - Dual port [A6826A]
+	2322  ISP2322-based 2Gb Fibre Channel to PCI-X HBA
+	2422  ISP2422-based 4Gb Fibre Channel to PCI-X HBA
+		103c 12d7  4Gb Fibre Channel [AB379A]
+		103c 12dd  4Gb Fibre Channel [AB429A]
+	2432  ISP2432-based 4Gb Fibre Channel to PCI Express HBA
+	3022  ISP4022-based Ethernet NIC
+	3032  ISP4032-based Ethernet IPv6 NIC
+	4010  ISP4010-based iSCSI TOE HBA
+	4022  ISP4022-based iSCSI TOE HBA
+	4032  ISP4032-based iSCSI TOE IPv6 HBA
+	5432  SP232-based 4Gb Fibre Channel to PCI Express HBA
+	6312  SP202-based 2Gb Fibre Channel to PCI-X HBA
+	6322  SP212-based 2Gb Fibre Channel to PCI-X HBA
 1078  Cyrix Corporation
 	0000  5510 [Grappa]
 	0001  PCI Master
@@ -2803,6 +3205,7 @@
 107c  LG Electronics [Lucky Goldstar Co. Ltd]
 107d  LeadTek Research Inc.
 	0000  P86C850
+	204d  [GeForce 7800 GTX] Winfast PX7800 GTX TDH
 	2134  WinFast 3D S320 II
 	2971  [GeForce FX 5900] WinFast A350 TDH MyViVo
 107e  Interphase Corporation
@@ -2921,6 +3324,7 @@
 1093  National Instruments
 	0160  PCI-DIO-96
 	0162  PCI-MIO-16XE-50
+	1150  PCI-DIO-32HS High Speed Digital I/O Board
 	1170  PCI-MIO-16XE-10
 	1180  PCI-MIO-16E-1
 	1190  PCI-MIO-16E-4
@@ -2940,8 +3344,7 @@
 	2a80  PCI-6025E
 	2c80  PCI-6035E
 	2ca0  PCI-6034E
-# Low-Cost Industrial Digital I/O at 60 V, Channel-to-Channel Isolated
-	70a9  PCI-6528
+	70a9  PCI-6528 (Digital I/O at 60V)
 	70b8  PCI-6251 [M Series - High Speed Multifunction DAQ]
 	b001  IMAQ-PCI-1408
 	b011  IMAQ-PXI-1408
@@ -3023,6 +3426,7 @@
 		1461 0003  AverMedia UltraTV PCI 350
 		1461 0004  AVerTV WDM Video Capture
 		1461 0761  AverTV DVB-T
+		1461 0771  AverMedia AVerTV DVB-T 771
 		14f1 0001  Bt878 Mediastream Controller NTSC
 		14f1 0002  Bt878 Mediastream Controller PAL BG
 		14f1 0003  Bt878a Mediastream Controller PAL BG
@@ -3083,8 +3487,10 @@
 		13e9 0070  Win/TV (Audio Section)
 		144f 3000  MagicTView CPH060 - Audio
 		1461 0002  Avermedia PCTV98 Audio Capture
+		1461 0003  UltraTV PCI 350
 		1461 0004  AVerTV WDM Audio Capture
 		1461 0761  AVerTV DVB-T
+		1461 0771  AverMedia AVerTV DVB-T 771
 		14f1 0001  Bt878 Video Capture (Audio Section)
 		14f1 0002  Bt878 Video Capture (Audio Section)
 		14f1 0003  Bt878 Video Capture (Audio Section)
@@ -3223,6 +3629,7 @@
 		10b5 2978  SH ARC-PCIu SOHARD ARCNET card
 		10b5 3025  Alpermann+Velte PCL PCI L (3V/5V): Timecode Reader Board
 		10b5 3068  Alpermann+Velte PCL PCI HD (3V/5V): Timecode Reader Board
+		12fe 0111  CPCI-ASIO4 (ESD 4-port Serial Interface Board)
 		1397 3136  4xS0-ISDN PCI Adapter
 		1397 3137  S2M-E1-ISDN PCI Adapter
 		1518 0200  Kontron ThinkIO-C
@@ -3237,7 +3644,7 @@
 		10b5 2273  SH ARC-PCI SOHARD ARCNET card
 		10b5 2431  Alpermann+Velte PCL PCI D: Timecode Reader Board
 		10b5 2905  Alpermann+Velte PCI TS: Time Synchronisation Board
-		10b5 9050  MP9050
+		10b5 9050  PCI-I04 PCI Passive PC/CAN Interface
 		1498 0362  TPMC866 8 Channel Serial Card
 		1522 0001  RockForce 4 Port V.90 Data/Fax/Voice Modem
 		1522 0002  RockForce 2 Port V.90 Data/Fax/Voice Modem
@@ -3277,14 +3684,17 @@
 		10b5 2844  Innes Corp TVS Encoder card
 		12c7 4001  Intel Dialogic DM/V960-4T1 PCI
 		12d9 0002  PCI Prosody Card rev 1.5
+		14b4 d100  Dektec DTA-100
+		14b4 d114  Dektec DTA-120
 		16df 0011  PIKA PrimeNet MM PCI
 		16df 0012  PIKA PrimeNet MM cPCI 8
 		16df 0013  PIKA PrimeNet MM cPCI 8 (without CAS Signaling)
 		16df 0014  PIKA PrimeNet MM cPCI 4
 		16df 0015  PIKA Daytona MM
 		16df 0016  PIKA InLine MM
-	9056  Francois
+	9056  9056 PCI I/O Accelerator
 		10b5 2979  CellinkBlade 11 - CPCI board VoATM AAL1
+		14b4 d140  Dektec DTA-140
 	9060  9060
 	906d  9060SD
 		125c 0640  Aries 16000P
@@ -3292,11 +3702,18 @@
 	9080  9080
 		103c 10eb  (Agilent) E2777B 83K Series Optical Communication Interface
 		103c 10ec  (Agilent) E6978-66442 PCI CIC
+		10b5 1123  Sectra KK631 encryption board
 		10b5 9080  9080 [real subsystem ID not set]
 		129d 0002  Aculab PCI Prosidy card
 		12d9 0002  PCI Prosody Card
 		12df 4422  4422PCI ["Do-All" Telemetry Data Aquisition System]
+		1517 000b  ECSG-1R3ADC-PMC Clock synthesizer
+	9656  PCI <-> IOBus Bridge
+		1517 000f  ECDR-GC314-PMC Receiver
+		1885 0700  Tsunami FPGA PMC with Altera Stratix S40
+		1885 0701  Tsunami FPGA PMC with Altera Stratix S30
 	bb04  B&B 3PCIOSD1A Isolated PCI Serial
+	c001  CronyxOmega-PCI (8-port RS232)
 10b6  Madge Networks
 	0001  Smart 16/4 PCI Ringnode
 	0002  Smart 16/4 PCI Ringnode Mk2
@@ -3329,6 +3746,7 @@
 	0910  3C910-A01
 	1006  MINI PCI type 3B Data Fax Modem
 	1007  Mini PCI 56k Winmodem
+		10b7 615b  Mini PCI 56K Modem
 		10b7 615c  Mini PCI 56K Modem
 	1201  3c982-TXM 10/100baseTX Dual Port A [Hydra]
 	1202  3c982-TXM 10/100baseTX Dual Port B [Hydra]
@@ -3387,6 +3805,8 @@
 	900a  3c900B-FL 10base-FL [Cyclone]
 	9050  3c905 100BaseTX [Boomerang]
 	9051  3c905 100BaseT4 [Boomerang]
+	9054  3C905B-TX Fast Etherlink XL PCI
+		10b7 9054  3C905B-TX Fast Etherlink XL PCI
 	9055  3c905B 100BaseTX [Cyclone]
 		1028 0080  3C905B Fast Etherlink XL 10/100
 		1028 0081  3C905B Fast Etherlink XL 10/100
@@ -3417,7 +3837,7 @@
 		1028 0097  3C920 Integrated Fast Ethernet Controller
 		1028 00fe  Optiplex GX240
 		1028 012a  3C920 Integrated Fast Ethernet Controller [Latitude C640]
-		10b7 1000  3C905C-TX Fast Etherlink for PC Management NIC
+		10b7 1000  3C905CX-TX/TX-M Fast Etherlink for PC Management NIC
 		10b7 7000  10/100 Mini PCI Ethernet Adapter
 		10f1 2466  Tiger MPX S2466 (3C920 Integrated Fast Ethernet Controller)
 	9201  3C920B-EMB Integrated Fast Ethernet Controller [Tornado]
@@ -3532,6 +3952,7 @@
 		1014 053d  ThinkPad R40e (2684-HVG) builtin IDE
 		103c 0024  Pavilion ze4400 builtin IDE
 		1043 8053  A7A266 Motherboard IDE
+		1849 5229  ASRock 939Dual-SATA2 Motherboard IDE (PATA)
 	5235  M5225
 	5237  USB 1.1 Controller
 		1014 0540  ThinkPad R40e (2684-HVG) builtin USB
@@ -3549,7 +3970,7 @@
 	5251  M5251 P1394 OHCI 1.0 Controller
 	5253  M5253 P1394 OHCI 1.1 Controller
 	5261  M5261 Ethernet Controller
-	5263  M5263 Ethernet Controller
+	5263  ULi 1689,1573 integrated ethernet.
 	5281  ALi M5281 Serial ATA / RAID Host Controller
 	5287  ULi 5287 SATA
 	5288  ULi M5288 SATA
@@ -3652,6 +4073,7 @@
 	1200  ASC1200 [(abp940) Fast SCSI-II]
 	1300  ABP940-U / ABP960-U
 		10cd 1310  ASC1300 SCSI Adapter
+		1195 1320  Ultra-SCSI CardBus PC Card REX CB31
 	2300  ABP940-UW
 	2500  ABP940-U2W
 10ce  Radius
@@ -3790,69 +4212,93 @@
 	0041  NV40 [GeForce 6800]
 		1043 817b  V9999 Gamer Edition
 	0042  NV40.2 [GeForce 6800 LE]
-	0043  NV40.3
+	0043  NV40.3 [GeForce 6800 XE]
+	0044  NV40 [GeForce 6800 XT]
 	0045  NV40 [GeForce 6800 GT]
+	0046  NV40 [GeForce 6800 GT]
 	0047  NV40 [GeForce 6800 GS]
 		1682 2109  GeForce 6800 GS
+	0048  NV40 [GeForce 6800 XT]
 	0049  NV40GL
+	004d  NV40GL [Quadro FX 4000]
 	004e  NV40GL [Quadro FX 4000]
 	0050  CK804 ISA Bridge
-		1043 815a  K8N4-E Mainboard
+		1043 815a  K8N4-E or A8N-E Mainboard
 		1458 0c11  GA-K8N Ultra-9 Mainboard
 		1462 7100  MSI K8N Diamond
+		147b 1c1a  KN8-Ultra Mainboard
 	0051  CK804 ISA Bridge
 	0052  CK804 SMBus
-		1043 815a  K8N4-E Mainboard
+		1043 815a  K8N4-E or A8N-E Mainboard
 		1458 0c11  GA-K8N Ultra-9 Mainboard
 		1462 7100  MSI K8N Diamond
+		147b 1c1a  KN8-Ultra Mainboard
 	0053  CK804 IDE
-		1043 815a  K8N4-E Mainboard
+		1043 815a  K8N4-E or A8N-E Mainboard
 		1458 5002  GA-K8N Ultra-9 Mainboard
 		1462 7100  MSI K8N Diamond
+		147b 1c1a  KN8-Ultra Mainboard
 	0054  CK804 Serial ATA Controller
+		1043 815a  A8N-E Mainboard
 		1458 b003  GA-K8N Ultra-9 Mainboard
 		1462 7100  MSI K8N Diamond
+		147b 1c1a  KN8-Ultra Mainboard
 	0055  CK804 Serial ATA Controller
-		1043 815a  K8N4-E Mainboard
+		1043 815a  K8N4-E or A8N-E Mainboard
 		1458 b003  GA-K8N Ultra-9 Mainboard
+		147b 1c1a  KN8-Ultra Mainboard
 	0056  CK804 Ethernet Controller
 	0057  CK804 Ethernet Controller
-		1043 8141  K8N4-E Mainboard
+		1043 8141  K8N4-E or A8N-E Mainboard
 		1458 e000  GA-K8N Ultra-9 Mainboard
 		1462 7100  MSI K8N Diamond
+		147b 1c1a  KN8-Ultra Mainboard
 	0058  CK804 AC'97 Modem
 	0059  CK804 AC'97 Audio Controller
-		1043 812a  K8N4-E Mainboard
+		1043 812a  K8N4-E or A8N-E Mainboard
+		147b 1c1a  KN8-Ultra Mainboard
 	005a  CK804 USB Controller
-		1043 815a  K8N4-E Mainboard
+		1043 815a  K8N4-E or A8N-E Mainboard
 		1458 5004  GA-K8N Ultra-9 Mainboard
 		1462 7100  MSI K8N Diamond
+		147b 1c1a  KN8-Ultra Mainboard
 	005b  CK804 USB Controller
-		1043 815a  K8N4-E Mainboard
+		1043 815a  K8N4-E or A8N-E Mainboard
 		1458 5004  GA-K8N Ultra-9 Mainboard
 		1462 7100  MSI K8N Diamond
+		147b 1c1a  KN8-Ultra Mainboard
 	005c  CK804 PCI Bridge
 	005d  CK804 PCIE Bridge
 	005e  CK804 Memory Controller
+		1043 815a  A8N-E Mainboard
+		10f1 2891  Thunder K8SRE Mainboard
 		1458 5000  GA-K8N Ultra-9 Mainboard
 		1462 7100  MSI K8N Diamond
+		147b 1c1a  KN8-Ultra Mainboard
 	005f  CK804 Memory Controller
 	0060  nForce2 ISA Bridge
 		1043 80ad  A7N8X Mainboard
+		a0a0 03ba  UK79G-1394 motherboard
 	0064  nForce2 SMBus (MCP)
+		a0a0 03bb  UK79G-1394 motherboard
 	0065  nForce2 IDE
+		a0a0 03b2  UK79G-1394 motherboard
 	0066  nForce2 Ethernet Controller
 		1043 80a7  A7N8X Mainboard onboard nForce2 Ethernet
 	0067  nForce2 USB Controller
 		1043 0c11  A7N8X Mainboard
 	0068  nForce2 USB Controller
 		1043 0c11  A7N8X Mainboard
+		a0a0 03b4  UK79G-1394 motherboard
 	006a  nForce2 AC97 Audio Controler (MCP)
+		1043 8095  nForce2 AC97 Audio Controler (MCP)
+		a0a0 0304  UK79G-1394 motherboard
 	006b  nForce Audio Processing Unit
 		10de 006b  nForce2 MCP Audio Processing Unit
 	006c  nForce2 External PCI Bridge
 	006d  nForce2 PCI Bridge
 	006e  nForce2 FireWire (IEEE 1394) Controller
+		a0a0 0306  UK79G-1394 motherboard
 	0080  MCP2A ISA bridge
 		147b 1c09  NV7 Motherboard
 	0084  MCP2A SMBus
@@ -3869,18 +4315,24 @@
 	008b  MCP2A PCI Bridge
 	008c  MCP2A Ethernet Controller
 	008e  nForce2 Serial ATA Controller
-	0091  GeForce 7800 GTX
-	0092  GeForce 7800 GT
+	0090  G70 [GeForce 7800 GTX]
+	0091  G70 [GeForce 7800 GTX]
+	0092  G70 [GeForce 7800 GT]
+	0093  G70 [GeForce 7800 GS]
+	0098  GeForce Go 7800
 	0099  GE Force Go 7800 GTX
+	009d  G70GL [Quadro FX 4500]
 	00a0  NV5 [Aladdin TNT2]
 		14af 5810  Maxi Gamer Xentor
-	00c0  NV41.0
+	00c0  NV41 [GeForce 6800 GS]
 	00c1  NV41.1 [GeForce 6800]
 	00c2  NV41.2 [GeForce 6800 LE]
+	00c3  NV42 [Geforce 6800 XT]
 	00c8  NV41.8 [GeForce Go 6800]
 	00c9  NV41.9 [GeForce Go 6800 Ultra]
 	00cc  NV41 [Quadro FX Go1400]
 	00cd  NV41 [Quadro FX 3450/4000 SDI]
+		10de 029b  wx4300 Workstation
 	00ce  NV41GL [Quadro FX 1400]
 	00d0  nForce3 LPC Bridge
 	00d1  nForce3 Host Bridge
@@ -3895,40 +4347,61 @@
 	00da  nForce3 Audio
 	00dd  nForce3 PCI Bridge
 	00df  CK8S Ethernet Controller
+		105b 0c43  Winfast NF3250K8AA
 		147b 1c0b  NF8 Mainboard
 	00e0  nForce3 250Gb LPC Bridge
+		10de 0c11  Winfast NF3250K8AA
+		1462 7030  K8N Neo-FSR v2.0
 		147b 1c0b  NF8 Mainboard
 	00e1  nForce3 250Gb Host Bridge
+		1462 7030  K8N Neo-FSR v2.0
 		147b 1c0b  NF8 Mainboard
 	00e2  nForce3 250Gb AGP Host to PCI Bridge
 	00e3  CK8S Serial ATA Controller (v2.5)
+		105b 0c43  Winfast NF3250K8AA
 		147b 1c0b  NF8 Mainboard
 	00e4  nForce 250Gb PCI System Management
+		105b 0c43  Winfast NF3250K8AA
+		1462 7030  K8N Neo-FSR v2.0
 		147b 1c0b  NF8 Mainboard
 	00e5  CK8S Parallel ATA Controller (v2.5)
+		105b 0c43  Winfast NF3250K8AA
+		1462 7030  K8N Neo-FSR v2.0
 		147b 1c0b  NF8 Mainboard
 	00e6  CK8S Ethernet Controller
 	00e7  CK8S USB Controller
+		105b 0c43  Winfast NF3250K8AA
+		1462 7030  K8N Neo-FSR v2.0
 		147b 1c0b  NF8 Mainboard
 	00e8  nForce3 EHCI USB 2.0 Controller
+		105b 0c43  Winfast NF3250K8AA
+		1462 7030  K8N Neo-FSR v2.0
 		147b 1c0b  NF8 Mainboard
 	00ea  nForce3 250Gb AC'97 Audio Controller
+		105b 0c43  Winfast NF3250K8AA
+		1462 b010  K8N Neo-FSR v2.0
 		147b 1c0b  NF8 Mainboard
 	00ed  nForce3 250Gb PCI-to-PCI Bridge
 	00ee  CK8S Serial ATA Controller (v2.5)
-	00f0  NV40 [GeForce 6800/GeForce 6800 Ultra]
-	00f1  NV43 [GeForce 6600/GeForce 6600 GT]
+	00f0  NV40 [GeForce 6800 Ultra]
+	00f1  NV43 [GeForce 6600 GT]
 		1043 81a6  N6600GT TD 128M AGP
-	00f2  NV43 [GeForce 6600/GeForce 6600 GT]
+		1458 3150  GV-N66T128VP
+		1682 2119  GeForce 6600 GT AGP 128MB DDR3 DUAL DVI TV
+	00f2  NV43 [GeForce 6600]
 		1682 211c  GeForce 6600 256MB DDR DUAL DVI TV
 	00f3  NV43 [GeForce 6200]
+	00f4  NV43 [GeForce 6600 LE]
+	00f5  G70 [GeForce 7800 GS]
+	00f6  NV43 [GeForce 6800 GS]
+		1682 217e  XFX GeForce 6800 XTreme 256MB DDR3 AGP
 	00f8  NV45GL [Quadro FX 3400/4400]
-	00f9  NV40 [GeForce 6800 Ultra/GeForce 6800 GT]
+	00f9  NV40 [GeForce 6800 Series GPU]
 		1682 2120  GEFORCE 6800 GT PCI-E
 	00fa  NV36 [GeForce PCX 5750]
 	00fb  NV35 [GeForce PCX 5900]
 	00fc  NV37GL [Quadro FX 330/GeForce PCX 5300]
-	00fd  NV37GL [Quadro FX 330/Quadro NVS280]
+	00fd  NV37GL [Quadro PCI-E Series]
 	00fe  NV38GL [Quadro FX 1300]
 	00ff  NV18 [GeForce PCX 4300]
 	0100  NV10 [GeForce 256 SDR]
@@ -3957,6 +4430,7 @@
 		1048 0c4b  GLoria II-64 Pro DVII
 	0110  NV11 [GeForce2 MX/MX 400]
 		1043 4015  AGP-V7100 Pro
+		1043 4021  V7100 Deluxe Combo
 		1043 4031  V7100 Pro with TV output
 		1048 0c60  Gladiac MX
 		1048 0c61  Gladiac 511PCI
@@ -3969,17 +4443,24 @@
 		1462 8817  MSI GeForce2 MX400 Pro32S [MS-8817]
 		14af 7102  3D Prophet II MX
 		14af 7103  3D Prophet II MX Dual-Display
-	0111  NV11DDR [GeForce2 MX 100 DDR/200 DDR]
+	0111  NV11DDR [GeForce2 MX200]
 	0112  NV11 [GeForce2 Go]
 	0113  NV11GL [Quadro2 MXR/EX/Go]
 	0140  NV43 [GeForce 6600 GT]
 	0141  NV43 [GeForce 6600]
+		1043 81b0  EN6600 Silencer
 		1458 3124  GV-NX66128DP Turbo Force Edition
-	0142  NV43 [GeForce 6600 PCIe]
+	0142  NV43 [GeForce 6600 LE]
+	0143  NV43 [GeForce 6600 VE]
 	0144  NV43 [GeForce Go 6600]
 	0145  NV43 [GeForce 6610 XL]
 	0146  NV43 [Geforce Go 6600TE/6200TE]
+	0147  GeForce 6700 XL
 	0148  NV43 [GeForce Go 6600]
+	0149  NV43 [GeForce Go 6600 GT]
+	014a  Quadro NVS 440
+	014c  Quadro FX 540 MXM
+	014d  NV18GL [Quadro FX 550]
 	014e  NV43GL [Quadro FX 540]
 	014f  NV43 [GeForce 6200]
 	0150  NV15 [GeForce2 GTS/Pro]
@@ -3988,6 +4469,7 @@
 		1048 0c52  Gladiac-64
 		107d 2840  WinFast GeForce2 GTS with TV output
 		107d 2842  WinFast GeForce 2 Pro
+		10de 002e  GeForce2 GTS
 		1462 8831  Creative GeForce2 Pro
 	0151  NV15DDR [GeForce2 Ti]
 		1043 405f  V7700Ti
@@ -3995,10 +4477,17 @@
 	0152  NV15BR [GeForce2 Ultra, Bladerunner]
 		1048 0c56  GLADIAC Ultra
 	0153  NV15GL [Quadro2 Pro]
-	0161  GeForce 6200 TurboCache(TM)
+	0160  GeForce 6500
+	0161  NV44 [GeForce 6200 TurboCache(TM)]
+	0162  NV44 [GeForce 6200SE TurboCache (TM)]
+	0163  NV44 [GeForce 6200 LE]
 	0164  NV44 [GeForce Go 6200]
 	0165  NV44 [Quadro NVS 285]
-	0167  GeForce Go 6200 TurboCache
+	0166  NV43 [GeForce Go 6400]
+	0167  NV43 [GeForce Go 6200/6400]
+	0168  NV43 [GeForce Go 6200/6400]
+	0169  GeForce 6250
+	016a  GeForce 7100 GS
 	0170  NV17 [GeForce4 MX 460]
 	0171  NV17 [GeForce4 MX 440]
 		10b0 0002  Gainward Pro/600 TV
@@ -4012,16 +4501,18 @@
 	0174  NV17 [GeForce4 440 Go]
 	0175  NV17 [GeForce4 420 Go]
 	0176  NV17 [GeForce4 420 Go 32M]
+		103c 08b0  tc1100 tablet
 		4c53 1090  Cx9 / Vx9 mainboard
 	0177  NV17 [GeForce4 460 Go]
 	0178  NV17GL [Quadro4 550 XGL]
 	0179  NV17 [GeForce4 420 Go 32M]
 		10de 0179  GeForce4 MX (Mac)
-	017a  NV17GL [Quadro4 200/400 NVS]
+	017a  NV17GL [Quadro NVS]
 	017b  NV17GL [Quadro4 550 XGL]
 	017c  NV17GL [Quadro4 500 GoGL]
 	017d  NV17 [GeForce4 410 Go 16M]
 	0181  NV18 [GeForce4 MX 440 AGP 8x]
+		1043 8063  GeForce4 MX 440 AGP 8X
 		1043 806f  V9180 Magic
 		1462 8880  MS-StarForce GeForce4 MX 440 with AGP8X
 		1462 8900  MS-8890 GeForce 4 MX440 AGP8X
@@ -4029,13 +4520,17 @@
 		147b 8f0d  Siluro GF4 MX-8X
 	0182  NV18 [GeForce4 MX 440SE AGP 8x]
 	0183  NV18 [GeForce4 MX 420 AGP 8x]
-	0185  NV18 [GeForce4 MX 4000 AGP 8x]
+	0184  NV18 [GeForce4 MX]
+	0185  NV18 [GeForce4 MX 4000]
 	0186  NV18M [GeForce4 448 Go]
 	0187  NV18M [GeForce4 488 Go]
 	0188  NV18GL [Quadro4 580 XGL]
-	018a  NV18GL [Quadro4 NVS AGP 8x]
+	018a  NV18GL [Quadro NVS with AGP8X]
 	018b  NV18GL [Quadro4 380 XGL]
+	018c  Quadro NVS 50 PCI
 	018d  NV18M [GeForce4 448 Go]
+	0191  GeForce 8800 GTX (G80)
+	0193  G80 [GeForce 8800 GTS]
 	01a0  NVCrush11 [GeForce2 MX Integrated Graphics]
 	01a4  nForce CPU bridge
 	01ab  nForce 420 Memory Controller (DDR)
@@ -4051,16 +4546,35 @@
 	01c1  nForce AC'97 Modem Controller
 	01c2  nForce USB Controller
 	01c3  nForce Ethernet Controller
+	01d1  GeForce 7300 LE
+		1462 0345  7300LE PCI Express Graphics Adapter
+	01d3  GeForce 7300 SE
+	01d6  GeForce Go 7200
+	01d7  G72M [Quadro NVS 110M/GeForce Go 7300]
+	01d8  G72M [GeForce Go 7400]
+	01da  Quadro NVS 110M
+	01dc  Quadro FX 350M
+	01dd  G72 [Geforce 7500 LE]
+	01de  Quadro FX 350
+		10de 01dc  Quadro  FX Go350M
+	01df  G71 [GeForce 7300 GS]
 	01e0  nForce2 AGP (different version?)
 		147b 1c09  NV7 Motherboard
 	01e8  nForce2 AGP
 	01ea  nForce2 Memory Controller 0
+		a0a0 03b9  UK79G-1394 motherboard
 	01eb  nForce2 Memory Controller 1
+		a0a0 03b9  UK79G-1394 motherboard
 	01ec  nForce2 Memory Controller 2
+		a0a0 03b9  UK79G-1394 motherboard
 	01ed  nForce2 Memory Controller 3
+		a0a0 03b9  UK79G-1394 motherboard
 	01ee  nForce2 Memory Controller 4
+		a0a0 03b9  UK79G-1394 motherboard
 	01ef  nForce2 Memory Controller 5
+		a0a0 03b9  UK79G-1394 motherboard
 	01f0  NV18 [GeForce4 MX - nForce GPU]
+		a0a0 03b5  UK79G-1394 motherboard
 	0200  NV20 [GeForce3]
 		1043 402f  AGP-V8200 DDR
 		1048 0c70  GLADIAC 920
@@ -4069,15 +4583,24 @@
 		1043 405b  V8200 T5
 		1545 002f  Xtasy 6964
 	0203  NV20DCC [Quadro DCC]
-	0221  GeForce 6200
+	0211  NV40 [GeForce 6800]
+	0212  NV40 [GeForce 6800 LE]
+	0215  NV40 [GeForce 6800 GT]
+	0218  NV40 [GeForce 6800 XT]
+	0221  NV44A [GeForce 6200]
+	0222  GeForce 6200 A-LE
 	0240  C51PV [GeForce 6150]
-	0241  C51 PCI Express Bridge
+		1043 81cd  A8N-VM CSM
+		1462 7207  K8NGM2 series
+	0241  C51 [GeForce 6150 LE]
 	0242  C51G [GeForce 6100]
 	0243  C51 PCI Express Bridge
-	0244  C51 PCI Express Bridge
-	0245  C51 PCI Express Bridge
+	0244  C51 [Geforce 6150 Go]
+		10de 0244  C51 [Geforce 6150 Go]
+	0245  C51 [Quadro NVS 210S/GeForce 6150LE]
 	0246  C51 PCI Express Bridge
-	0247  C51 PCI Express Bridge
+	0247  MCP51 PCI-X GeForce Go 6100
+		1043 1382  MCP51 PCI-X GeForce Go 6100
 	0248  C51 PCI Express Bridge
 	0249  C51 PCI Express Bridge
 	024a  C51 PCI Express Bridge
@@ -4097,36 +4620,82 @@
 	0259  NV25GL [Quadro4 750 XGL]
 	025b  NV25GL [Quadro4 700 XGL]
 	0260  MCP51 LPC Bridge
+		1043 81bc  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	0261  MCP51 LPC Bridge
 	0262  MCP51 LPC Bridge
 	0263  MCP51 LPC Bridge
 	0264  MCP51 SMBus
+		1043 81bc  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	0265  MCP51 IDE
+		1043 81bc  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	0266  MCP51 Serial ATA Controller
+		1043 81bc  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	0267  MCP51 Serial ATA Controller
+		1043 81bc  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	0268  MCP51 Ethernet Controller
 	0269  MCP51 Ethernet Controller
+		1043 8141  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	026a  MCP51 MCI
 	026b  MCP51 AC97 Audio Controller
 	026c  MCP51 High Definition Audio
+		10de cb84  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	026d  MCP51 USB Controller
+		1043 81bc  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	026e  MCP51 USB Controller
+		1043 81bc  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	026f  MCP51 PCI Bridge
 	0270  MCP51 Host Bridge
+		1043 81bc  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	0271  MCP51 PMU
 	0272  MCP51 Memory Controller 0
 	027e  C51 Memory Controller 2
+		1043 81cd  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	027f  C51 Memory Controller 3
+		1043 81cd  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	0280  NV28 [GeForce4 Ti 4800]
 	0281  NV28 [GeForce4 Ti 4200 AGP 8x]
 	0282  NV28 [GeForce4 Ti 4800 SE]
 	0286  NV28 [GeForce4 Ti 4200 Go AGP 8x]
 	0288  NV28GL [Quadro4 980 XGL]
 	0289  NV28GL [Quadro4 780 XGL]
-	028c  NV28GLM [Quadro4 700 GoGL]
-# NV2A Xbox Graphics Processing Unit (Intergrated). GeForce3 derivative (NV20 < NV2A < NV25)
+	028c  NV28GLM [Quadro4 Go700]
+	0290  G71 [GeForce 7900 GTX]
+	0291  G71 [GeForce 7900 GT/GTO]
+		10de 042b  NX7900GTO-T2D512E [7900 GTO]
+	0292  G71 [GeForce 7900 GS]
+	0293  G71 [GeForce 7900 GX2]
+	0294  G71 [GeForce 7950 GX2]
+	0295  G71 [GeForce 7950 GT]
+		107d 2a68  WinFast PX7950GT TDH
+	0297  GeForce Go 7950 GTX
+	0298  GeForce Go 7900 GS
+	0299  GeForce Go 7900 GTX
+	029a  G71 [Quadro FX 2500M]
+	029b  G71 [Quadro FX 1500M]
+	029c  Quadro FX 5500
+	029d  Quadro FX 3500
+	029e  Quadro FX 1500
+	029f  Quadro FX 4500 X2
+# Xbox Graphics Processing Unit (Integrated). GeForce3 derivative (NV20 < NV2A < NV25).
 	02a0  NV2A [XGPU]
+	02e0  GeForce 7600 GT
+	02e1  G73 [GeForce 7600 GS]
+	02e2  GeForce 7300 GT
 	02f0  C51 Host Bridge
+		1043 81cd  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	02f1  C51 Host Bridge
 	02f2  C51 Host Bridge
 	02f3  C51 Host Bridge
@@ -4135,13 +4704,23 @@
 	02f6  C51 Host Bridge
 	02f7  C51 Host Bridge
 	02f8  C51 Memory Controller 5
+		1043 81cd  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	02f9  C51 Memory Controller 4
+		1043 81cd  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	02fa  C51 Memory Controller 0
+		1043 81cd  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	02fb  C51 PCI Express Bridge
 	02fc  C51 PCI Express Bridge
 	02fd  C51 PCI Express Bridge
 	02fe  C51 Memory Controller 1
+		1043 81cd  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	02ff  C51 Host Bridge
+		1043 81cd  A8N-VM CSM Mainboard
+		1462 7207  K8NGM2 series
 	0300  NV30 [GeForce FX]
 	0301  NV30 [GeForce FX 5800 Ultra]
 	0302  NV30 [GeForce FX 5800]
@@ -4163,10 +4742,11 @@
 	0320  NV34 [GeForce FX 5200]
 	0321  NV34 [GeForce FX 5200 Ultra]
 	0322  NV34 [GeForce FX 5200]
+		1043 02fb  V9250 Magic
 		1462 9171  MS-8917 (FX5200-T128)
 		1462 9360  MS-8936 (FX5200-T128)
 	0323  NV34 [GeForce FX 5200LE]
-	0324  NV34M [GeForce FX Go5200]
+	0324  NV34M [GeForce FX Go5200 64M]
 		1028 0196  Inspiron 5160
 		1071 8160  MIM2000
 	0325  NV34M [GeForce FX Go5250]
@@ -4193,7 +4773,7 @@
 	0344  NV36.4 [GeForce FX 5700VE]
 	0345  NV36.5
 	0347  NV36 [GeForce FX Go5700]
-		103c 006a  nx9500
+		103c 006a  NX9500
 	0348  NV36 [GeForce FX Go5700]
 	0349  NV36M Pro
 	034b  NV36MAP
@@ -4211,15 +4791,121 @@
 	0368  MCP55 SMBus
 	0369  MCP55 Memory Controller
 	036a  MCP55 Memory Controller
+	036b  MCP55 SMU
 	036c  MCP55 USB Controller
 	036d  MCP55 USB Controller
 	036e  MCP55 IDE
+	0370  MCP55 PCI bridge
 	0371  MCP55 High Definition Audio
 	0372  MCP55 Ethernet
 	0373  MCP55 Ethernet
+	0374  MCP55 PCI Express bridge
+	0375  MCP55 PCI Express bridge
+	0376  MCP55 PCI Express bridge
+	0377  MCP55 PCI Express bridge
+	0378  MCP55 PCI Express bridge
 	037a  MCP55 Memory Controller
 	037e  MCP55 SATA Controller
 	037f  MCP55 SATA Controller
+	0390  GeForce 7650 GS
+	0391  G70 [GeForce 7600 GT]
+		1458 3427  GV-NX76T128D-RH
+	0392  G70 [GeForce 7600 GS]
+		1462 0622  NX7600GS-T2D256EH
+	0393  G70 [GeForce 7300 GT]
+	0394  G70 [GeForce 7600 LE]
+	0395  G70 [GeForce 7300 GT]
+	0397  GeForce Go 7700
+	0398  G70 [GeForce Go 7600]
+	039b  GeForce Go 7900 SE
+	039c  Quadro FX 550M
+	039e  Quadro FX 560
+	03a0  C55 Host Bridge
+	03a1  C55 Host Bridge
+	03a2  C55 Host Bridge
+	03a3  C55 Host Bridge
+	03a4  C55 Host Bridge
+	03a5  C55 Host Bridge
+	03a6  C55 Host Bridge
+	03a7  C55 Host Bridge
+	03a8  C55 Memory Controller
+	03a9  C55 Memory Controller
+	03aa  C55 Memory Controller
+	03ab  C55 Memory Controller
+	03ac  C55 Memory Controller
+	03ad  C55 Memory Controller
+	03ae  C55 Memory Controller
+	03af  C55 Memory Controller
+	03b0  C55 Memory Controller
+	03b1  C55 Memory Controller
+	03b2  C55 Memory Controller
+	03b3  C55 Memory Controller
+	03b4  C55 Memory Controller
+	03b5  C55 Memory Controller
+	03b6  C55 Memory Controller
+	03b7  C55 PCI Express bridge
+	03b8  C55 PCI Express bridge
+	03b9  C55 PCI Express bridge
+	03ba  C55 Memory Controller
+	03bb  C55 PCI Express bridge
+	03d0  GeForce 6100 nForce 430
+	03d1  GeForce 6100 nForce 405
+	03d2  GeForce 6100 nForce 400
+	03d5  GeForce 6100 nForce 420
+	03e0  MCP61 LPC Bridge
+	03e1  MCP61 LPC Bridge
+	03e2  MCP61 LPC Bridge
+	03e3  MCP61 LPC Bridge
+	03e4  MCP61 High Definition Audio
+	03e5  MCP61 Ethernet
+	03e6  MCP61 Ethernet
+	03e7  MCP61 SATA Controller
+	03e8  MCP61 PCI Express bridge
+	03e9  MCP61 PCI Express bridge
+	03ea  MCP61 Memory Controller
+	03eb  MCP61 SMBus
+	03ec  MCP61 IDE
+	03ee  MCP61 Ethernet
+	03ef  MCP61 Ethernet
+	03f0  MCP61 High Definition Audio
+	03f1  MCP61 USB Controller
+	03f2  MCP61 USB Controller
+	03f3  MCP61 PCI bridge
+	03f4  MCP61 SMU
+	03f5  MCP61 Memory Controller
+	03f6  MCP61 SATA Controller
+	03f7  MCP61 SATA Controller
+	0440  MCP65 LPC Bridge
+	0441  MCP65 LPC Bridge
+	0442  MCP65 LPC Bridge
+	0443  MCP65 LPC Bridge
+	0444  MCP65 Memory Controller
+	0445  MCP65 Memory Controller
+	0446  MCP65 SMBus
+	0447  MCP65 SMU
+	0448  MCP65 IDE
+	0449  MCP65 PCI bridge
+	044a  MCP65 High Definition Audio
+	044b  MCP65 High Definition Audio
+	044c  MCP65 AHCI Controller
+	044d  MCP65 AHCI Controller
+	044e  MCP65 AHCI Controller
+	044f  MCP65 AHCI Controller
+	0450  MCP65 Ethernet
+	0451  MCP65 Ethernet
+	0452  MCP65 Ethernet
+	0453  MCP65 Ethernet
+	0454  MCP65 USB Controller
+	0455  MCP65 USB Controller
+	0456  MCP65 USB Controller
+	0457  MCP65 USB Controller
+	0458  MCP65 PCI Express bridge
+	0459  MCP65 PCI Express bridge
+	045a  MCP65 PCI Express bridge
+	045c  MCP65 SATA Controller
+	045d  MCP65 SATA Controller
+	045e  MCP65 SATA Controller
+	045f  MCP65 SATA Controller
 10df  Emulex Corporation
 	1ae5  LP6000 Fibre Channel Host Adapter
 	f085  LP850 Fibre Channel Host Adapter
@@ -4265,11 +4951,13 @@
 10e2  Aptix Corporation
 10e3  Tundra Semiconductor Corp.
 	0000  CA91C042 [Universe]
+	0108  Tsi108 Host Bridge for Single PowerPC
 	0148  Tsi148 [Tempe]
 	0860  CA91C860 [QSpan]
 	0862  CA91C862A [QSpan-II]
 	8260  CA91L8200B [Dual PCI PowerSpan II]
 	8261  CA91L8260B [Single PCI PowerSpan II]
+	a108  Tsi109 Host Bridge for Dual PowerPC
 10e4  Tandem Computers
 	8029  Realtek 8029 Network Card
 10e5  Micro Industries Corporation
@@ -4289,11 +4977,12 @@
 	80d7  PCI-9112
 	80d9  PCI-9118
 	80da  PCI-9812
+	80fc  APCI1500 Signal processing controller (16 dig. inputs + 16 dig. outputs)
 	811a  PCI-IEEE1355-DS-DE Interface
 	814c  Fastcom ESCC-PCI (Commtech, Inc.)
 	8170  S5933 [Matchmaker] (Chipset Development Tool)
-# sold with Roper Scientifc(Photometrics) CoolSnap HQ camera
 	81e6  Multimedia video controller
+	828d  APCI3001 Signal processing controller (up to 16 analog inputs)
 	8291  Fastcom 232/8-PCI (Commtech, Inc.)
 	82c4  Fastcom 422/4-PCI (Commtech, Inc.)
 	82c5  Fastcom 422/2-PCI (Commtech, Inc.)
@@ -4302,6 +4991,8 @@
 	82ca  Fastcom 232/4-PCI (Commtech, Inc.)
 	82db  AJA HDNTV HD SDI Framestore
 	82e2  Fastcom DIO24H-PCI (Commtech, Inc.)
+	8406  PCIcanx/PCIcan CAN interface [Kvaser AB]
+	8407  PCIcan II CAN interface (A1021, PCB-07, PCB-08) [Kvaser AB]
 	8851  S5933 on Innes Corp FM Radio Capture card
 10e9  Alps Electric Co., Ltd.
 10ea  Intergraphics Systems
@@ -4320,6 +5011,15 @@
 	8111  Twist3 Frame Grabber
 10ec  Realtek Semiconductor Co., Ltd.
 	0139  Zonet Zen3200
+	0260  Realtek 260 High Definition Audio
+	0261  Realtek 261 High Definition Audio
+	0280  Realtek 280 High Definition Audio
+	0861  Realtek 861 High Definition Audio
+	0862  Realtek 862 High Definition Audio
+	0880  Realtek 880 High Definition Audio
+	0883  Realtek 883 High Definition Audio
+		1025 1605  TravelMate 5600 series
+	0888  Realtek 888 High Definition Audio
 	8029  RTL-8029(AS)
 		10b8 2011  EZ-Card (SMC1208)
 		10ec 8029  RTL-8029(AS)
@@ -4328,6 +5028,7 @@
 		1259 2400  AT-2400
 	8129  RTL-8129
 		10ec 8129  RT8129 Fast Ethernet Adapter
+	8136  RTL8101E PCI Express Fast Ethernet controller
 	8138  RT8139 (B/C) Cardbus Fast Ethernet Adapter
 		10ec 8138  RT8139 (B/C) Fast Ethernet Adapter
 	8139  RTL-8139/8139C/8139C+
@@ -4335,11 +5036,13 @@
 		1025 005a  TravelMate 290
 		1025 8920  ALN-325
 		1025 8921  ALN-325
-		103c 006a  nx9500
+		103c 006a  NX9500
+		1043 1045  L8400B or L3C/S notebook
 		1043 8109  P5P800-MX Mainboard
 		1071 8160  MIM2000
 		10bd 0320  EP-320X-R
 		10ec 8139  RT8139
+		10f7 8338  Panasonic CF-Y5 laptop
 		1113 ec01  FNC-0107TX
 		1186 1300  DFE-538TX
 		1186 1320  SN5200
@@ -4350,6 +5053,7 @@
 		1429 d010  ND010
 		1432 9130  EN-9130TX
 		1436 8139  RT8139
+		144d c00c  P30/P35 notebook
 		1458 e000  GA-7VM400M/7VT600 Motherboard
 		1462 788c  865PE Neo2-V Mainboard
 		146c 1439  FE-1439TX
@@ -4358,19 +5062,25 @@
 		149c 139a  LFE-8139ATX
 		149c 8139  LFE-8139TX
 		14cb 0200  LNR-100 Family 10/100 Base-TX Ethernet
+		1695 9001  Onboard RTL8101L 10/100 MBit
 		1799 5000  F5D5000 PCI Card/Desktop Network PCI Card
 		1904 8139  RTL8139D Fast Ethernet Adapter
 		2646 0001  EtheRx
 		8e2e 7000  KF-230TX
 		8e2e 7100  KF-230TX/2
-		9001 1695  Onboard RTL8101L 10/100 MBit
 		a0a0 0007  ALN-325C
+	8167  RTL-8110SC/8169SC Gigabit Ethernet
+		1462 235c  P965 Neo MS-7235 mainboard
+	8168  RTL8111/8168B PCI Express Gigabit Ethernet controller
 	8169  RTL-8169 Gigabit Ethernet
+		1025 0079  Aspire 5024WLMi
 		1259 c107  CG-LAPCIGT
 		1371 434e  ProG-2000L
 		1458 e000  GA-8I915ME-G Mainboard
+		1462 030c  K8N Neo-FSR v2.0 mainboard
 		1462 702c  K8T NEO 2 motherboard
 	8180  RTL8180L 802.11b MAC
+	8185  RTL-8185 IEEE 802.11a/b/g Wireless LAN Controller
 	8197  SmartLAN56 56K Modem
 10ed  Ascii Corporation
 	7310  V7310
@@ -4388,10 +5098,12 @@
 	3fc5  RME Hammerfall DSP
 	3fc6  RME Hammerfall DSP MADI
 	8381  Ellips Santos Frame Grabber
+	d154  Copley Controls CAN card (PCI-CAN-02)
 10ef  Racore Computer Products, Inc.
 	8154  M815x Token Ring Adapter
 10f0  Peritek Corporation
 10f1  Tyan Computer
+	2865  Tyan Thunder K8E S2865
 10f2  Achme Computer, Inc.
 10f3  Alaris, Inc.
 10f4  S-MOS Systems, Inc.
@@ -4415,6 +5127,7 @@
 1100  Jazz Multimedia
 1101  Initio Corporation
 	1060  INI-A100U2W
+	1622  INI-1623 PCI SATA-II Controller
 	9100  INI-9100/9100W
 	9400  INI-940
 	9401  INI-950
@@ -4445,8 +5158,13 @@
 		1102 0051  SB0090 Audigy Player
 		1102 0053  SB0090 Audigy Player/OEM
 		1102 0058  SB0090 Audigy Player/OEM
+		1102 1002  SB Audigy2 ZS
 		1102 1007  SB0240 Audigy 2 Platinum 6.1
 		1102 2002  SB Audigy 2 ZS (SB0350)
+		1102 4001  E-MU 1010
+	0005  SB X-Fi
+		1102 0021  X-Fi Platinum
+		1102 1003  X-Fi XtremeMusic
 	0006  [SB Live! Value] EMU10k1X
 	0007  SB Audigy LS
 		1102 0007  SBLive! 24bit
@@ -4458,12 +5176,12 @@
 		1102 0008  EMU0404 Digital Audio System
 	4001  SB Audigy FireWire Port
 		1102 0010  SB Audigy FireWire Port
-	7002  SB Live! MIDI/Game Port
+	7002  SB Live! Game Port
 		1102 0020  Gameport Joystick
-	7003  SB Audigy MIDI/Game port
+	7003  SB Audigy Game Port
 		1102 0040  SB Audigy MIDI/Game Port
 	7004  [SB Live! Value] Input device controller
-	7005  SB Audigy LS MIDI/Game port
+	7005  SB Audigy LS Game Port
 		1102 1001  SB0310 Audigy LS MIDI/Game port
 		1102 1002  SB0312 Audigy LS MIDI/Game port
 	8064  SB0100 [SBLive! 5.1 OEM]
@@ -4484,17 +5202,15 @@
 		156d b795  G795  (AlphaTop (Taiwan))
 		156d b797  G797  (AlphaTop (Taiwan))
 1103  Triones Technologies, Inc.
-	0003  HPT343
+	0003  HPT343/345/346/363
 	0004  HPT366/368/370/370A/372/372N
 		1103 0001  HPT370A
 		1103 0003  HPT343 / HPT345 / HPT363 UDMA33
 		1103 0004  HPT366 UDMA66 (r1) / HPT368 UDMA66 (r2) / HPT370 UDMA100 (r3) / HPT370 UDMA100 RAID (r4)
 		1103 0005  HPT370 UDMA100
-		1103 0006  HPT302
-		1103 0007  HPT371 UDMA133
-		1103 0008  HPT374 UDMA/ATA133 RAID Controller
+		1103 0006  HPT302/302N
 	0005  HPT372A/372N
-	0006  HPT302
+	0006  HPT302/302N
 	0007  HPT371/371N
 	0008  HPT374
 	0009  HPT372N
@@ -4515,8 +5231,9 @@
 1106  VIA Technologies, Inc.
 	0102  Embedded VIA Ethernet Controller
 	0130  VT6305 1394.A Controller
-# Wrong ID found on Jetway K8M8MS
+	0198  P4X600 Host Bridge
 	0204  K8M800 Host Bridge
+	0208  PT890 Host Bridge
 	0238  K8T890 Host Bridge
 	0258  PT880 Host Bridge
 	0259  CN400/PM880 Host Bridge
@@ -4524,15 +5241,23 @@
 	0282  K8T800Pro Host Bridge
 		1043 80a3  A8V Deluxe
 	0290  K8M890 Host Bridge
+	0293  PM896 Host Bridge
 	0296  P4M800 Host Bridge
 	0305  VT8363/8365 [KT133/KM133]
-		1019 0987  K7VZA (Rev. 1.0)  Mainboard
+		1019 0987  K7VZA Mainboard
 		1043 8033  A7V Mainboard
 		1043 803e  A7V-E Mainboard
 		1043 8042  A7V133/A7V133-C Mainboard
 		147b a401  KT7/KT7-RAID/KT7A/KT7A-RAID Mainboard
 	0308  PT894 Host Bridge
-	0314  P4M800CE Host Bridge
+	0314  CN700/VN800/P4M800CE/Pro Host Bridge
+	0324  CX700 Host Bridge
+	0327  P4M890 Host Bridge
+	0336  K8M890CE Host Bridge
+	0340  PT900 Host Bridge
+	0351  VT3351 Host Bridge
+	0364  P4M900 Host Bridge
+		1043 81ce  P5VD2-VM mothervoard
 	0391  VT8371 [KX133]
 	0501  VT8501 [Apollo MVP4]
 	0505  VT82C505
@@ -4551,7 +5276,7 @@
 		1458 5002  GA-7VAX Mainboard
 		1462 7020  K8T NEO 2 motherboard
 		147b 1407  KV8-MAX3 motherboard
-		1849 0571  K7VT2 / K7VT6 motherboard
+		1849 0571  K7VT2/K7VT6 motherboard
 	0576  VT82C576 3V [Apollo Master]
 	0585  VT82C585VP [Apollo VP1/VPX]
 	0586  VT82C586/A/B PCI-to-ISA [Apollo VP]
@@ -4595,9 +5320,16 @@
 	1269  KT880 Host Bridge
 	1282  K8T800Pro Host Bridge
 	1290  K8M890 Host Bridge
+	1293  PM896 Host Bridge
 	1296  P4M800 Host Bridge
 	1308  PT894 Host Bridge
-	1314  P4M800CE Host Bridge
+	1314  CN700/VN800/P4M800CE/Pro Host Bridge
+	1324  CX700 Host Bridge
+	1327  P4M890 Host Bridge
+	1336  K8M890CE Host Bridge
+	1340  PT900 Host Bridge
+	1351  VT3351 Host Bridge
+	1364  P4M900 Host Bridge
 	1571  VT82C576M/VT82C586
 	1595  VT82C595/97 [Apollo VP2/97]
 	2204  K8M800 Host Bridge
@@ -4608,11 +5340,18 @@
 	2269  KT880 Host Bridge
 	2282  K8T800Pro Host Bridge
 	2290  K8M890 Host Bridge
+	2293  PM896 Host Bridge
 	2296  P4M800 Host Bridge
 	2308  PT894 Host Bridge
-	2314  P4M800CE Host Bridge
+	2314  CN700/VN800/P4M800CE/Pro Host Bridge
+	2324  CX700 Host Bridge
+	2327  P4M890 Host Bridge
+	2336  K8M890CE Host Bridge
+	2340  PT900 Host Bridge
+	2351  VT3351 Host Bridge
+	2364  P4M900 Host Bridge
 	287a  VT8251 PCI to PCI Bridge
-	287b  VT8251 PCI to PCIE Bridge
+	287b  VT8251 Host Bridge
 	287c  VT8251 PCIE Root Port
 	287d  VT8251 PCIE Root Port
 	287e  VT8251 Ultra VLINK Controller
@@ -4637,10 +5376,11 @@
 		1106 0100  VT86C100A Fast Ethernet Adapter
 		1186 1400  DFE-530TX rev A
 	3044  IEEE 1394 Host Controller
-		0574 086c  K8N Diamond
+		0010 0001  IEEE 1394 4port DCST 1394-3+1B
 		1025 005a  TravelMate 290
-		1043 808a  A8V Deluxe
+		1043 808a  A8V Deluxe or A8N-VM CSM Mainboard
 		1458 1000  GA-7VT600-1394 Motherboard
+		1462 207d  K8NGM2 series motherboard
 		1462 702d  K8T NEO 2 motherboard
 		1462 971d  MS-6917
 	3050  VT82C596 Power Management
@@ -4648,7 +5388,7 @@
 	3053  VT6105M [Rhine-III]
 	3057  VT82C686 [Apollo Super ACPI]
 		1019 0985  P6VXA Motherboard
-		1019 0987  K7VZA (Rev. 1.0)  Motherboard
+		1019 0987  K7VZA Motherboard
 		1043 8033  A7V Mainboard
 		1043 803e  A7V-E Mainboard
 		1043 8040  A7M266 Mainboard
@@ -4658,7 +5398,7 @@
 		0e11 0097  SoundMax Digital Integrated Audio
 		0e11 b194  Soundmax integrated digital audio
 		1019 0985  P6VXA Motherboard
-		1019 0987  K7VZA (Rev. 1.0)  Motherboard
+		1019 0987  K7VZA Motherboard
 		1043 1106  A7V133/A7V133-C Mainboard
 		1106 4511  Onboard Audio on EP7KXA
 		1458 7600  Onboard Audio
@@ -4669,19 +5409,22 @@
 		1019 0a81  L7VTA v1.0 Motherboard (KT400-8235)
 		1043 8095  A7V8X Motherboard (Realtek ALC650 codec)
 		1043 80a1  A7V8X-X Motherboard
-		1043 80b0  A7V600/K8V Deluxe motherboard (ADI AD1980 codec [SoundMAX])
+		1043 80b0  A7V600/K8V-X/K8V Deluxe motherboard (ADI AD1980 codec [SoundMAX])
 		1043 812a  A8V Deluxe motherboard (Realtek ALC850 codec)
 		1106 3059  L7VMM2 Motherboard
 		1106 4161  K7VT2 motherboard
+		1106 4170  PCPartner P4M800-8237R Motherboard
+		1106 4552  Soyo KT-600 Dragon Plus (Realtek ALC 650)
 		1297 c160  FX41 motherboard (Realtek ALC650 codec)
+		1413 147b  KV8 Pro motherboard onboard audio
 		1458 a002  GA-7VAX Onboard Audio (Realtek ALC650)
 		1462 0080  K8T NEO 2 motherboard
 		1462 3800  KT266 onboard audio
 		147b 1407  KV8-MAX3 motherboard
+		1849 0850  ASRock 775Dual-880 Pro onboard audio (Realtek ALC850)
 		1849 9761  K7VT6 motherboard
+		3005 1695  EP-8KMM3I motherboard onboard audio (Realtek ALC655)
 		4005 4710  MSI K7T266 Pro2-RU (MSI-6380 v2) onboard audio (Realtek/ALC 200/200P)
-		4170 1106  PCPartner P4M800-8237R Motherboard
-		4552 1106  Soyo KT-600 Dragon Plus (Realtek ALC 650)
 		a0a0 01b6  AK77-8XN onboard audio
 	3065  VT6102 [Rhine-II]
 		1043 80a1  A7V8X-X Motherboard
@@ -4742,6 +5485,7 @@
 		147b 1408  KV7
 		1849 3149  K7VT6 motherboard
 	3156  P/KN266 Host Bridge
+	3157  CX700M2 UniChrome PRO II Graphics
 	3164  VT6410 ATA133 RAID controller
 		1043 80f4  P4P800 Mainboard Deluxe ATX
 		1462 7028  915P/G Neo2
@@ -4769,12 +5513,16 @@
 	3218  K8T800M Host Bridge
 	3227  VT8237 ISA bridge [KT600/K8T800/K8T890 South]
 		1043 80ed  A7V600/K8V-X/A8V Deluxe motherboard
-		1106 3227  DFI KT600-AL Motherboard
+		1106 3227  DFI KT600-AL / Soltek SL-B9D-FGR Motherboard
 		1458 5001  GA-7VT600 Motherboard
 		147b 1407  KV8-MAX3 motherboard
 		1849 3227  K7VT4 motherboard
+	3230  K8M890 [Chrome9] Integrated Video
 	3238  K8T890 Host Bridge
 	3249  VT6421 IDE RAID Controller
+	324a  CX700 PCI to PCI Bridge
+	324b  CX700 Host Bridge
+	324e  CX700 Internal Module Bus
 	3258  PT880 Host Bridge
 	3259  CN400/PM880 Host Bridge
 	3269  KT880 Host Bridge
@@ -4783,11 +5531,19 @@
 	3288  VIA High Definition Audio Controller
 	3290  K8M890 Host Bridge
 	3296  P4M800 Host Bridge
+	3324  CX700 Host Bridge
+	3327  P4M890 Host Bridge
+	3336  K8M890CE Host Bridge
 	3337  VT8237A PCI to ISA Bridge
+	3340  PT900 Host Bridge
 	3344  UniChrome Pro IGP
 	3349  VT8251 AHCI/SATA 4-Port Controller
+	3351  VT3351 Host Bridge
+	3364  P4M900 Host Bridge
+	3371  Chrome9 HC IGP
+	3372  VT8237S PCI to ISA Bridge
 	337a  VT8237A PCI to PCI Bridge
-	337b  VT8237A PCI to PCIE Bridge
+	337b  VT8237A Host Bridge
 	4149  VIA VT6420 (ATA133) Controller
 	4204  K8M800 Host Bridge
 	4208  PT890 Host Bridge
@@ -4797,15 +5553,30 @@
 	4269  KT880 Host Bridge
 	4282  K8T800Pro Host Bridge
 	4290  K8M890 Host Bridge
+	4293  PM896 Host Bridge
 	4296  P4M800 Host Bridge
 	4308  PT894 Host Bridge
-	4314  P4M800CE Host Bridge
+	4314  CN700/VN800/P4M800CE/Pro Host Bridge
+	4324  CX700 Host Bridge
+	4327  P4M890 Host Bridge
+	4336  K8M890CE Host Bridge
+	4340  PT900 Host Bridge
+	4351  VT3351 Host Bridge
+	4364  P4M900 Host Bridge
 	5030  VT82C596 ACPI [Apollo PRO]
 	5208  PT890 I/O APIC Interrupt Controller
 	5238  K8T890 I/O APIC Interrupt Controller
 	5290  K8M890 I/O APIC Interrupt Controller
 	5308  PT894 I/O APIC Interrupt Controller
+	5324  CX700M2 IDE
+	5327  P4M890 I/O APIC Interrupt Controller
+	5336  K8M890CE I/O APIC Interrupt Controller
+	5340  PT900 I/O APIC Interrupt Controller
+	5351  VT3351 I/O APIC Interrupt Controller
+	5364  P4M900 I/O APIC Interrupt Controller
 	6100  VT85C100A [Rhine II]
+	6327  P4M890 Security Device
+	6364  P4M900 Security Device
 	7204  K8M800 Host Bridge
 	7205  VT8378 [S3 UniChrome] Integrated Video
 		1458 d000  Gigabyte GA-7VM400(A)M(F) Motherboard
@@ -4816,12 +5587,20 @@
 	7269  KT880 Host Bridge
 	7282  K8T800Pro Host Bridge
 	7290  K8M890 Host Bridge
+	7293  PM896 Host Bridge
 	7296  P4M800 Host Bridge
 	7308  PT894 Host Bridge
-	7314  P4M800CE Host Bridge
+	7314  CN700/VN800/P4M800CE/Pro Host Bridge
+	7324  CX700 Host Bridge
+	7327  P4M890 Host Bridge
+	7336  K8M890CE Host Bridge
+	7340  PT900 Host Bridge
+	7351  VT3351 Host Bridge
+	7364  P4M900 Host Bridge
 	8231  VT8231 [PCI-to-ISA Bridge]
 	8235  VT8235 ACPI
 	8305  VT8363/8365 [KT133/KM133 AGP]
+	8324  CX700 PCI to ISA Bridge
 	8391  VT8371 [KX133 AGP]
 	8501  VT8501 [Apollo MVP4 AGP]
 	8596  VT82C596 [Apollo PRO AGP]
@@ -4834,6 +5613,8 @@
 	8693  VT82C693 [Apollo Pro Plus] PCI Bridge
 	a208  PT890 PCI to PCI Bridge Controller
 	a238  K8T890 PCI to PCI Bridge Controller
+	a327  P4M890 PCI to PCI Bridge Controller
+	a364  P4M900 PCI to PCI Bridge Controller
 	b091  VT8633 [Apollo Pro266 AGP]
 	b099  VT8366/A/7 [Apollo KT266/A/333 AGP]
 	b101  VT8653 AGP Bridge
@@ -4847,16 +5628,23 @@
 		147b 1407  KV8-MAX3 motherboard
 	b198  VT8237 PCI Bridge
 	b213  VPX/VPX2 I/O APIC Interrupt Controller
+	b999  [K8T890 North / VT8237 South] PCI Bridge
 	c208  PT890 PCI to PCI Bridge Controller
 	c238  K8T890 PCI to PCI Bridge Controller
+	c327  P4M890 PCI to PCI Bridge Controller
+	c340  PT900 PCI to PCI Bridge Controller
+	c364  P4M900 PCI to PCI Bridge Controller
 	d104  VT8237 Integrated Fast Ethernet Controller
 	d208  PT890 PCI to PCI Bridge Controller
 	d213  VPX/VPX2 PCI to PCI Bridge Controller
 	d238  K8T890 PCI to PCI Bridge Controller
+	d340  PT900 PCI to PCI Bridge Controller
 	e208  PT890 PCI to PCI Bridge Controller
 	e238  K8T890 PCI to PCI Bridge Controller
+	e340  PT900 PCI to PCI Bridge Controller
 	f208  PT890 PCI to PCI Bridge Controller
 	f238  K8T890 PCI to PCI Bridge Controller
+	f340  PT900 PCI to PCI Bridge Controller
 1107  Stratus Computers
 	0576  VIA VT82C570MV [Apollo] (Wrong vendor ID!)
 1108  Proteon, Inc.
@@ -5042,6 +5830,7 @@
 1122  Multi-tech Systems, Inc.
 1123  Excellent Design, Inc.
 1124  Leutron Vision AG
+	2581  Picport Monochrome
 1125  Eurocore
 1126  Vigra
 1127  FORE Systems Inc
@@ -5065,7 +5854,9 @@
 1130  Computervision
 1131  Philips Semiconductors
 	1561  USB 1.1 Host Controller
+		1775 c200  C2K onboard USB 1.1 host controller
 	1562  USB 2.0 Host Controller
+		1775 c200  C2K onboard USB 2.0 host controller
 	3400  SmartPCI56(UCB1500) 56K Modem
 	5400  TriMedia TM1000/1100
 	5402  TriMedia TM-1300
@@ -5087,17 +5878,19 @@
 		5168 0138  LifeView FlyVIDEO2000
 	7133  SAA7133/SAA7135 Video Broadcast Decoder
 		0000 4091  Beholder BeholdTV 409 FM
-		002b 11bd  Pinnacle PCTV Stereo
 		1019 4cb5  Elitegroup ECS TVP3XP FM1236 Tuner Card (NTSC,FM)
 		1043 0210  FlyTV mini Asus Digimatrix
 		1043 4843  ASUS TV-FM 7133
 		1043 4845  TV-FM 7135
 		1043 4862  P7131 Dual
+		1131 0000  KWorld V-Stream Studio TV Terminator
 		1131 2001  Proteus Pro [philips reference design]
 		1131 2018  Tiger reference design
 		1131 4ee9  MonsterTV Mobile
+		11bd 002b  PCTV Stereo
 		11bd 002e  PCTV 110i (saa7133)
 		12ab 0800  PURPLE TV
+		1421 0335  Instant TV DVB-T Cardbus
 		1421 1370  Instant TV (saa7135)
 		1435 7330  VFG7330
 		1435 7350  VFG7350
@@ -5108,21 +5901,28 @@
 		14c0 1212  LifeView FlyTV Platinum Mini2
 		153b 1160  Cinergy 250 PCI TV
 		153b 1162  Terratec Cinergy 400 mobile
+		17de 7350  ATSC 110 Digital / Analog HDTV Tuner
 		185b c100  VideoMate TV
-		4e42 0212  LifeView FlyTV Platinum Mini
-		4e42 0502  Typhoon DVB-T Duo Digital/Analog Cardbus
 		5168 0306  LifeView FlyDVB-T DUO
 		5168 0319  LifeView FlyDVB Trio
-		5456 7135  GoTView 7135 PCI
-	7134  SAA7134 Video Broadcast Decoder
+		5168 0502  LifeView FlyDVB-T Duo CardBus
+		5168 0520  LifeView FlyDVB Trio CardBus
+		5168 1502  LifeView FlyTV CardBus
+		5168 2502  LifeView FlyDVB-T CardBus
+		5168 2520  LifeView FlyDVB-S Duo CardBus
+		5168 3502  LifeView FlyDVB-T Hybrid CardBus
+		5168 3520  LifeView FlyDVB Trio N CardBus
+	7134  SAA7134/SAA7135HL Video Broadcast Decoder
 		1019 4cb4  Elitegroup ECS TVP3XP FM1216 Tuner Card(PAL-BG,FM)
 		1043 0210  Digimatrix TV
 		1043 4840  ASUS TV-FM 7134
+		1043 4842  TV-FM 7134
 		1131 2004  EUROPA V3 reference design
 		1131 4e85  SKNet Monster TV
 		1131 6752  EMPRESS
-		11bd 002b  Pinnacle PCTV Stereo (saa7134)
-		11bd 002d  Pinnacle PCTV 300i DVB-T + PAL
+		11bd 002b  PCTV Stereo
+		11bd 002d  PCTV 300i DVB-T + PAL
+		1461 2c00  AverTV Hybrid+FM PCI
 		1461 9715  AVerTV Studio 307
 		1461 a70a  Avermedia AVerTV 307
 		1461 a70b  AverMedia M156 / Medion 2819
@@ -5137,7 +5937,6 @@
 		185b c900  Videomate DVB-T300
 		1894 a006  KNC One TV-Station DVR
 		1894 fe01  KNC One TV-Station RDS / Typhoon TV Tuner RDS
-		4e42 0138  LifeView FlyVIDEO3000
 	7145  SAA7145
 	7146  SAA7146
 		110a 0000  Fujitsu/Siemens DVB-C card rev1.5
@@ -5145,7 +5944,6 @@
 		1131 4f56  KNC1 DVB-S Budget
 		1131 4f60  Fujitsu-Siemens Activy DVB-S Budget Rev AL
 		1131 4f61  Activy DVB-S Budget Rev GR
-# It has an LSI companion chip.
 		1131 5f61  Activy DVB-T Budget
 		114b 2003  DVRaptor Video Edit/Capture Card
 		11bd 0006  DV500 Overlay
@@ -5159,16 +5957,21 @@
 		13c2 0006  Technotrend/Hauppauge DVB card rev1.3 or rev1.6
 		13c2 0008  Technotrend/Hauppauge DVB-T
 		13c2 000a  Octal/Technotrend DVB-C for iTV
-		13c2 1003  Technotrend-Budget / Hauppauge WinTV-NOVA-S DVB card
-		13c2 1004  Technotrend-Budget / Hauppauge WinTV-NOVA-C DVB card
-		13c2 1005  Technotrend-Budget / Hauppauge WinTV-NOVA-T DVB card
-		13c2 100c  Technotrend-Budget / Hauppauge WinTV-NOVA-CI DVB card
-		13c2 100f  Technotrend-Budget / Hauppauge WinTV-NOVA-CI DVB card
-		13c2 1011  Technotrend-Budget / Hauppauge WinTV-NOVA-T DVB card
+		13c2 1003  Technotrend-Budget/Hauppauge WinTV-NOVA-S DVB card
+		13c2 1004  Technotrend-Budget/Hauppauge WinTV-NOVA-C DVB card
+		13c2 1005  Technotrend-Budget/Hauppauge WinTV-NOVA-T DVB card
+		13c2 100c  Technotrend-Budget/Hauppauge WinTV-NOVA-CI DVB card
+		13c2 100f  Technotrend-Budget/Hauppauge WinTV-NOVA-CI DVB card
+		13c2 1011  Technotrend-Budget/Hauppauge WinTV-NOVA-T DVB card
+		13c2 1012  DVB T-1500
 		13c2 1013  SATELCO Multimedia DVB
 		13c2 1016  WinTV-NOVA-SE DVB card
+		13c2 1018  DVB S-1401
+		13c2 1019  S2-3200
 		13c2 1102  Technotrend/Hauppauge DVB card rev2.1
+		153b 1156  Terratec Cynergy 1200C
 	9730  SAA9730 Integrated Multimedia and Peripheral Controller
+		1131 0000  Integrated Multimedia and Peripheral Controller
 1132  Mitel Corp.
 1133  Eicon Networks Corporation
 	7901  EiconCard S90
@@ -5232,6 +6035,7 @@
 		1133 1c0c  Diva Server V-PRI/E1-30 Cornet NQ
 	e01e  Diva Server 2PRI
 	e020  Diva Server 4PRI
+	e022  Diva Server Analog-2P
 	e024  Diva Server Analog-4P
 		1133 2400  Diva Server V-Analog-4P
 		1133 e024  Diva Server Analog-4P
@@ -5329,7 +6133,7 @@
 		1259 2975  AT-2970SX/2SC Gigabit Ethernet Adapter
 		1259 2976  AT-2970LX/2SC Gigabit Ethernet Adapter
 		1259 2977  AT-2970TX/2TX Gigabit Ethernet Adapter
-	4320  SysKonnect SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter, PCI64, Fiber ZX/SC
+	4320  SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter, PCI64, Fiber ZX/SC
 		1148 0121  Marvell RDK-8001 Adapter
 		1148 0221  Marvell RDK-8002 Adapter
 		1148 0321  Marvell RDK-8003 Adapter
@@ -5382,6 +6186,7 @@
 	000d  SyncPort 2-Port (x.25/FR)
 	0011  AccelePort 8r EIA-232 (IBM)
 	0012  AccelePort 8r EIA-422
+	0013  AccelePort Xr
 	0014  AccelePort 8r EIA-422
 	0015  AccelePort Xem
 	0016  AccelePort EPC/X
@@ -5506,10 +6311,16 @@
 	0017  GCNB-LE Host Bridge
 	0036  HT1000 PCI/PCI-X bridge
 	0101  CIOB-X2 PCI-X I/O Bridge
+	0103  EPB PCI-Express to PCI-X Bridge
 	0104  HT1000 PCI/PCI-X bridge
 	0110  CIOB-E I/O Bridge with Gigabit Ethernet
-	0130  HT1000 PCI-X bridge
-	0132  HT1000 PCI-Express bridge
+	0130  HT2000 PCI-X bridge
+	0132  HT2000 PCI-Express bridge
+		1166 0132  HT2000 PCI-Express bridge
+	0140  HT2100 PCI-Express Bridge
+	0141  HT2100 PCI-Express Bridge
+	0142  HT2100 PCI-Express Bridge
+	0144  HT2100 PCI-Express Bridge
 	0200  OSB4 South Bridge
 	0201  CSB5 South Bridge
 		4c53 1080  CT8 mainboard
@@ -5520,6 +6331,7 @@
 	0212  CSB5 IDE Controller
 		4c53 1080  CT8 mainboard
 	0213  CSB6 RAID/IDE Controller
+		1028 4134  PowerEdge 600SC
 		1028 c134  Poweredge SC600
 		1734 1012  Primergy RX300
 	0214  HT1000 Legacy IDE controller
@@ -5540,6 +6352,8 @@
 	0241  RAIDCore RC4000
 	0242  RAIDCore BC4000
 	024a  BCM5785 (HT1000) SATA Native SATA Mode
+# The device starts as 024a, and changes to 024b if set to PATA mode in BIOS
+	024b  BCM5785 (HT1000) PATA/IDE Mode
 1167  Mutoh Industries Inc
 1168  Thine Electronics Inc
 1169  Centre for Development of Advanced Computing
@@ -5604,7 +6418,11 @@
 		1043 1987  Asus A4K and Z81K notebooks, possibly others ( mid-2005 machines )
 		104d 80df  Vaio PCG-FX403
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
+		104d 814e  VAIO GRZ390Z
+		10f7 8338  Panasonic CF-Y5 laptop
+		144d c00c  P30/P35 notebook
 		14ef 0220  PCD-RP-220S
+		17aa 201c  Thinkpad X60s
 	0477  RL5c477
 	0478  RL5c478
 		1014 0184  ThinkPad A30p (2653-64G)
@@ -5617,17 +6435,25 @@
 	0552  R5C552 IEEE 1394 Controller
 		1014 0511  ThinkPad A/T/X Series
 		1028 0188  Inspiron 6000 laptop
+		144d c00c  P30/P35 notebook
+		17aa 201e  Thinkpad X60s
 	0554  R5C554
 	0575  R5C575 SD Bus Host Adapter
 	0576  R5C576 SD Bus Host Adapter
 	0592  R5C592 Memory Stick Bus Host Adapter
 		1043 1967  V6800V
+		144d c018  X20 IV
 	0811  R5C811
 	0822  R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter
 		1014 0556  Thinkpad X40
+		1014 0598  Thinkpad Z60m
 		1028 0188  Inspiron 6000 laptop
 		1028 01a2  Inspiron 9200
 		1043 1967  ASUS V6800V
+		10f7 8338  Panasonic CF-Y5 laptop
+		144d c018  X20 IV
+		17aa 201d  Thinkpad X60s
+	0832  R5C832 IEEE 1394 Controller
 	0841  R5C841 CardBus/SD/SDIO/MMC/MS/MSPro/xD/IEEE1394
 	0852  xD-Picture Card Controller
 		1043 1967  V6800V
@@ -5638,7 +6464,7 @@
 1186  D-Link System Inc
 	0100  DC21041
 	1002  DL10050 Sundance Ethernet
-		1186 1002  DFE-550TX
+		1186 1002  DFE-550TX/FX
 		1186 1012  DFE-580TX
 	1025  AirPlus Xtreme G DWL-G650 Adapter
 	1026  AirXpert DWL-AG650 Wireless Cardbus Adapter
@@ -5648,6 +6474,7 @@
 		1186 1301  DFE-530TX+ 10/100 Ethernet Adapter
 		1186 1303  DFE-528TX 10/100 Fast Ethernet PCI Adapter
 	1340  DFE-690TXD CardBus PC Card
+	1405  DFE-520TX Fast Ethernet PCI Adapter
 	1541  DFE-680TXD CardBus PC Card
 	1561  DRP-32TXD Cardbus PC Card
 	2027  AirPlus Xtreme G DWL-G520 Adapter
@@ -5666,6 +6493,9 @@
 	3a63  AirXpert DWL-AG660 Wireless Cardbus Adapter
 	4000  DL2000-based Gigabit Ethernet
 	4300  DGE-528T Gigabit Ethernet Adapter
+# There are at least 3 revisions of this adapter; 4800 is board revision A1 as far as I can tell, revision B1 is 4c00.
+	4800  DGE-530T Gigabit Ethernet Adapter (rev 11)
+	4b01  DGE-530T Gigabit Ethernet Adapter (rev 11)
 	4c00  Gigabit Ethernet Adapter
 		1186 4c00  DGE-530T Gigabit Ethernet Adapter
 	8400  D-Link DWL-650+ CardBus PC Card
@@ -5752,11 +6582,13 @@
 # Nee Galileo Technology, Inc.
 11ab  Marvell Technology Group Ltd.
 	0146  GT-64010/64010A System Controller
+	11ab  MV88SE614x SATA II PCI-E controller
 	138f  W8300 802.11 Adapter (rev 07)
 	1fa6  Marvell W8300 802.11 Adapter
 	1fa7  88W8310 and 88W8000G [Libertas] 802.11g client chipset
 	1faa  88w8335 [Libertas] 802.11b/g Wireless
 		1385 4e00  WG511 v2 54MBit/ Wireless PC-Card
+	2a01  88W8335 [Libertas] 802.11b/g Wireless
 	4320  88E8001 Gigabit Ethernet Controller
 		1019 0f38  Marvell 88E8001 Gigabit Ethernet Controller (ECS)
 		1019 8001  Marvell 88E8001 Gigabit Ethernet Controller (ECS)
@@ -5767,6 +6599,7 @@
 		11ab 0121  Marvell RDK-8001
 		11ab 0321  Marvell RDK-8003
 		11ab 1021  Marvell RDK-8010
+		11ab 4320  Marvell Yukon Gigabit Ethernet 10/100/1000Baset-T Constroller (Asus)
 		11ab 5021  Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Controller (64 bit)
 		11ab 9521  Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Controller (32 bit)
 		1458 e000  Marvell 88E8001 Gigabit Ethernet Controller (Gigabyte)
@@ -5783,6 +6616,7 @@
 	4345  88E8022 PCI-X IPMI Gigabit Ethernet Controller
 	4346  88E8061 PCI-E IPMI Gigabit Ethernet Controller
 	4347  88E8062 PCI-E IPMI Gigabit Ethernet Controller
+		4c53 10d0  Telum ASLP10 PrAMC Gigabit Ethernet
 	4350  88E8035 PCI-E Fast Ethernet Controller
 		1179 0001  Marvell 88E8035 Fast Ethernet Controller (Toshiba)
 		11ab 3521  Marvell RDK-8035
@@ -5875,6 +6709,7 @@
 		270f 2801  Marvell 88E8053 Gigabit Ethernet Controller (Chaintech)
 		a0a0 0506  Marvell 88E8053 Gigabit Ethernet Controller (Aopen)
 	4363  88E8055 PCI-E Gigabit Ethernet Controller
+	4364  88E8056 PCI-E Gigabit Ethernet Controller
 	4611  GT-64115 System Controller
 	4620  GT-64120/64120A/64121A System Controller
 	4801  GT-48001
@@ -5885,8 +6720,13 @@
 	5081  MV88SX5081 8-port SATA I PCI-X Controller
 	6041  MV88SX6041 4-port SATA II PCI-X Controller
 	6081  MV88SX6081 8-port SATA II PCI-X Controller
+	6101  88SE6101 single-port PATA133 interface
+	6141  88SE614x SATA II PCI-E controller
+	6450  64560 System Controller
 	6460  MV64360/64361/64362 System Controller
 	6480  MV64460/64461/64462 System Controller
+		1775 c200  C2K CompactPCI single board computer
+	6485  MV64460/64461/64462 System Controller, Revision B
 	f003  GT-64010 Primary Image Piranha Image Generator
 11ac  Canon Information Systems Research Aust.
 11ad  Lite-On Communications Inc
@@ -5924,7 +6764,13 @@
 	0001  NP-PCI
 11bd  Pinnacle Systems Inc.
 	002e  PCTV 40i
-	bede  Pinnacle AV/DV Studio Capture Card
+	0040  Royal TS Function 1
+		11bd 0044  PCTV 2000i Dual DVB-T Pro PCI Tuner 1
+	0041  RoyalTS Function 2
+		11bd 0044  PCTV 2000i Dual DVB-T Pro PCI Tuner 2
+	0042  Royal TS Function 3
+		11bd 0044  PCTV 2000i Dual DVB-T Pro PCI Common
+	bede  AV/DV Studio Capture Card
 11be  International Microcircuits Inc
 11bf  Astrodesign, Inc.
 11c0  Hewlett Packard
@@ -6036,6 +6882,8 @@
 	048c  V.92 56K WinModem
 # InPorte Home Internal 56k Modem/fax/answering machine/SMS Features
 	048f  V.92 56k WinModem
+	1040  HDA softmodem
+	2600  StarPro26XX family (SP2601, SP2603, SP2612) DSP
 	5801  USB
 	5802  USS-312 USB Controller
 	5803  USS-344S USB Controller
@@ -6055,6 +6903,7 @@
 	ab30  Hermes2 Mini-PCI WaveLAN a/b/g
 		14cd 2012  Hermes2 Mini-PCI WaveLAN a/b/g
 	ed00  ET-131x PCI-E Ethernet Controller
+	ed01  ET-131x PCI-E Ethernet Controller
 11c2  Sand Microelectronics
 11c3  NEC Corporation
 11c4  Document Technologies, Inc
@@ -6085,9 +6934,13 @@
 11d2  Intercom Inc.
 11d3  Trancell Systems Inc
 11d4  Analog Devices
+	0078  AD1986HD sound chip
 	1535  Blackfin BF535 processor
 	1805  SM56 PCI modem
 	1889  AD1889 sound chip
+	1981  AD1981HD sound chip
+	1983  AD1983HD sound chip
+	1986  AD1986A sound chip
 	5340  AD1881 sound chip
 11d5  Ikon Corporation
 	0115  10115
@@ -6232,6 +7085,7 @@
 1215  Interware Co., Ltd
 1216  Purup Prepress A/S
 1217  O2 Micro, Inc.
+	00f7  Firewire (IEEE 1394)
 	6729  OZ6729
 	673a  OZ6730
 	6832  OZ6832/6833 CardBus Controller
@@ -6244,18 +7098,23 @@
 		1014 020c  ThinkPad R30
 		1179 0001  Magnia Z310
 	7110  OZ711Mx 4-in-1 MemoryCardBus Accelerator
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		1734 106c  Amilo A1645
 	7112  OZ711EC1/M1 SmartCardBus/MemoryCardBus Controller
 	7113  OZ711EC1 SmartCardBus Controller
 	7114  OZ711M1/MC1 4-in-1 MemoryCardBus Controller
+	7120  Integrated MMC/SD Controller
+	7130  Integrated MS/xD Controller
 	7134  OZ711MP1/MS1 MemoryCardBus Controller
+	7135  Cardbus bridge
 	71e2  OZ711E2 SmartCardBus Controller
 	7212  OZ711M2 4-in-1 MemoryCardBus Controller
 	7213  OZ6933E CardBus Controller
 	7223  OZ711M3/MC3 4-in-1 MemoryCardBus Controller
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		10cf 11c4  Lifebook P5020D Laptop
 	7233  OZ711MP3/MS3 4-in-1 MemoryCardBus Controller
 1218  Hybricon Corp.
 1219  First Virtual Corporation
@@ -6307,6 +7166,7 @@
 121c  Nippon Texaco., Ltd
 121d  Lippert Automationstechnik GmbH
 121e  CSPI
+	0201  Myrinet 2000 Scalable Cluster Interconnect
 121f  Arcus Technology, Inc.
 1220  Ariel Corporation
 	1220  AMCC 5933 TMS320C80 DSP/Imaging board
@@ -6432,6 +7292,7 @@
 1259  Allied Telesyn International
 	2560  AT-2560 Fast Ethernet Adapter (i82557B)
 	a117  RTL81xx Fast Ethernet
+	a11e  RTL81xx Fast Ethernet
 	a120  21x4x DEC-Tulip compatible 10/100 Ethernet
 125a  ABB Power Systems
 125b  Asix Electronics Corporation
@@ -6478,6 +7339,7 @@
 		125d 0428  ES56ST-PI Data Fax Modem
 		125d 0429  ES56SV-PI Data Fax Modem
 		147a c001  ES56-PI Data Fax Modem
+		148d 1030  HCF WV-PI56 [ESS ES56-PI Data Fax Modem]
 		14fe 0428  ES56-PI Data Fax Modem
 		14fe 0429  ES56-PI Data Fax Modem
 125e  Specialvideo Engineering SRL
@@ -6500,10 +7362,12 @@
 		10b8 2835  SMC2835W Wireless Cardbus Adapter
 		10b8 a835  SMC2835W V2 Wireless Cardbus Adapter
 		1113 4203  WN4201B
+		1113 8201  T-Com T-Sinus 154pcicard Wireless PCI Adapter
 		1113 ee03  SMC2802W V2 Wireless PCI Adapter [ISL3886]
 		1113 ee08  SMC2835W V3 EU Wireless Cardbus Adapter
 		1186 3202  DWL-G650 A1 Wireless Adapter
 		1259 c104  CG-WLCB54GT Wireless Adapter
+		1260 0000  WG511 Wireless Adapter
 		1385 4800  WG511 Wireless Adapter
 		16a5 1605  ALLNET ALL0271 Wireless PCI Adapter
 		17cf 0014  XG-600 and clones Wireless Adapter
@@ -6794,6 +7658,7 @@
 1290  Sord Computer Corporation
 1291  NCS Computer Italia
 1292  Tritech Microelectronics Inc
+	fc02  Pyramid3D TR25202
 1293  Media Reality Technology
 1294  Rhetorex, Inc.
 1295  Imagenation Corporation
@@ -6821,8 +7686,12 @@
 12a9  Xiotech Corporation
 12aa  SDL Communications, Inc.
 12ab  Yuan Yuan Enterprise Co., Ltd.
+	0000  MPG160/Kuroutoshikou ITVC15-STVLP
 	0002  AU8830 [Vortex2] Based Sound Card With A3D Support
+	2300  Club-3D Zap TV2100
 	3000  MPG-200C PCI DVD Decoder Card
+	fff3  MPG600/Kuroutoshikou ITVC16-STVLP
+	ffff  MPG600/Kuroutoshikou ITVC16-STVLP
 12ac  Measurex Corporation
 12ad  Multidata GmbH
 12ae  Alteon Networks Inc.
@@ -6858,6 +7727,7 @@
 		12b9 0091  USR 56k Internal Voice WinModem (Model 2978)
 	1007  USR 56k Internal WinModem
 		12b9 00a3  USR 56k Internal WinModem (Model 3595)
+		12b9 00c4  U.S. Robotics 56K Voice Win Int (2884a)
 	1008  56K FaxModem Model 5610
 		12b9 00a2  USR 56k Internal FAX Modem (Model 2977)
 		12b9 00aa  USR 56k Internal Voice Modem (Model 2976)
@@ -6963,11 +7833,14 @@
 12d6  Analogic Corp
 12d7  Biotronic SRL
 12d8  Pericom Semiconductor
+	01a7  PCI to PCI bridge
 	8150  PCI to PCI Bridge
 12d9  Aculab PLC
 	0002  PCI Prosody
 	0004  cPCI Prosody
 	0005  Aculab E1/T1 PCI card
+	1078  Prosody X class e1000 device
+		12d9 000d  Prosody X PCI
 12da  True Time Inc.
 12db  Annapolis Micro Systems, Inc
 12dc  Symicron Computer Communication Ltd.
@@ -7119,16 +7992,17 @@
 1312  Acuity Imaging, Inc
 1313  Yaskawa Electric Co.
 1316  Teradyne Inc
-1317  Linksys
+1317  ADMtek
 	0981  21x4x DEC-Tulip compatible 10/100 Ethernet
 	0985  NC100 Network Everywhere Fast Ethernet 10/100
+		1734 100c  Scenic N300 ADMtek AN983 10/100 Mbps PCI Adapter
 	1985  21x4x DEC-Tulip compatible 10/100 Ethernet
 	2850  HSP MicroModem 56
-	5120  ADMtek ADM5120 OpenGate System-on-Chip
-	8201  ADMtek ADM8211 802.11b Wireless Interface
+	5120  ADM5120 OpenGate System-on-Chip
+	8201  ADM8211 802.11b Wireless Interface
 		10b8 2635  SMC2635W 802.11b (11Mbps) wireless lan pcmcia (cardbus) card
 		1317 8201  SMC2635W 802.11b (11mbps) wireless lan pcmcia (cardbus) card
-	8211  ADMtek ADM8211 802.11b Wireless Interface
+	8211  ADM8211 802.11b Wireless Interface
 	9511  21x4x DEC-Tulip compatible 10/100 Ethernet
 1318  Packet Engines Inc.
 	0911  GNIC-II PCI Gigabit Ethernet [Hamachi]
@@ -7282,17 +8156,21 @@
 	7401  Four Port RS-232 Interface
 	7402  Four Port RS-422/485 Interface
 	7801  Eight Port RS-232 Interface
+	7804  Eight Port RS-232/422/485 Interface
 	8001  8001 Digital I/O Adapter
 135f  I-Data International A-S
 1360  Meinberg Funkuhren
 	0101  PCI32 DCF77 Radio Clock
 	0102  PCI509 DCF77 Radio Clock
 	0103  PCI510 DCF77 Radio Clock
+	0104  PCI511 DCF77 Radio Clock
 	0201  GPS167PCI GPS Receiver
 	0202  GPS168PCI GPS Receiver
 	0203  GPS169PCI GPS Receiver
+	0204  GPS170PCI GPS Receiver
 	0301  TCR510PCI IRIG Timecode Reader
 	0302  TCR167PCI IRIG Timecode Reader
+	0303  TCR511PCI IRIG Timecode Reader
 1361  Soliton Systems K.K.
 1362  Fujifacom Corporation
 1363  Phoenix Technology Ltd
@@ -7303,6 +8181,10 @@
 1368  Skyware Corporation
 1369  Digigram
 136a  High Soft Tech
+	0004  HST Saphir VII mini PCI
+	0007  HST Saphir III E MultiLink 4
+	0008  HST Saphir III E MultiLink 8
+	000a  HST Saphir III E MultiLink 2
 136b  Kawasaki Steel Corporation
 	ff01  KL5A72002 Motion JPEG
 136c  Adtek System Science Co Ltd
@@ -7320,16 +8202,11 @@
 	0027  Silicom Dual port Fiber LX Giga Ethernet 546 Bypass Server Adapter
 	0029  Silicom Dual port Copper Giga Ethernet 546GB Bypass Server Adapter
 	002a  Silicom Dual port Fiber Giga Ethernet 546 TAP/Bypass Server Adapter
-# PXE2TBI
-	002b  Silicom Dual port Copper Fast Ethernet 546 TAP/Bypass Server Adapter
-# PXG4BPI
-	002c  Silicom Quad port Copper Giga Ethernet 546GB Bypass Server Adapter
-# PXG4BPFI
-	002d  Silicom Quad port Fiber-SX Giga Ethernet 546GB Bypass Server Adapter
-# PXG4BPFI-LX
-	002e  Silicom Quad port Fiber-LX Giga Ethernet 546GB Bypass Server Adapter
-# PXG2BPFIL
-	002f  Silicom Dual port Fiber-SX Giga Ethernet 546GB Low profile Bypass Server Adapter
+	002b  Silicom Dual port Copper Fast Ethernet 546 TAP/Bypass Server Adapter (PXE2TBI)
+	002c  Silicom Quad port Copper Giga Ethernet 546GB Bypass Server Adapter (PXG4BPI)
+	002d  Silicom Quad port Fiber-SX Giga Ethernet 546GB Bypass Server Adapter (PXG4BPFI)
+	002e  Silicom Quad port Fiber-LX Giga Ethernet 546GB Bypass Server Adapter (PXG4BPFI-LX)
+	002f  Silicom Dual port Fiber-SX Giga Ethernet 546GB Low profile Bypass Server Adapter (PXG2BPFIL)
 	0030  Silicom Dual port Fiber-LX Giga Ethernet 546GB Low profile Bypass Server Adapter
 	0031  Silicom Quad port Copper Giga Ethernet PCI-E Bypass Server Adapter
 	0032  Silicom Dual port Copper Fast Ethernet 546 TAP/Bypass Server Adapter
@@ -7340,6 +8217,8 @@
 	0038  Silicom Quad port Copper Ethernet PCI-E Intel based Bypass Server Adapter
 	0039  Silicom Dual port Fiber-SX Ethernet PCI-E Intel based Bypass Server Adapter
 	003a  Silicom Dual port Fiber-LX Ethernet PCI-E Intel based Bypass Server Adapter
+	003b  Silicom Dual port Fiber Ethernet PMC Intel based Bypass Server Adapter (PMCX2BPFI)
+	003c  Silicom Dual port Copper Ethernet PCI-X BGE based Bypass Server Adapter (PXG2BPRB)
 1375  Argosystems Inc
 1376  LMC
 1377  Electronic Equipment Production & Distribution GmbH
@@ -7357,6 +8236,7 @@
 1382  Marian - Electronic & Software
 	0001  ARC88 audio recording card
 	2008  Prodif 96 Pro sound system
+	2048  Prodif Plus sound system
 	2088  Marc 8 Midi sound system
 	20c8  Marc A sound system
 	4008  Marc 2 sound system
@@ -7369,9 +8249,11 @@
 1384  Reality Simulation Systems Inc
 1385  Netgear
 	0013  WG311T 108 Mbps Wireless PCI Adapter
-	311a  GA511 Gigabit Ethernet
-	4100  802.11b Wireless Adapter (MA301)
-	4105  MA311 802.11b wireless adapter
+	006b  WA301 802.11b Wireless PCI Adapter
+	311a  GA311 Gigabit Ethernet PCI Adapter
+	4100  MA301 802.11b Wireless PCI Adapter
+	4105  MA311 802.11b Wireless PCI Adapter
+	4251  WG111T 108 Mbps Wireless USB 2.0 Adapter
 	4400  WAG511 802.11a/b/g Dual Band Wireless PC Card
 	4600  WAG511 802.11a/b/g Dual Band Wireless PC Card
 	4601  WAG511 802.11a/b/g Dual Band Wireless PC Card
@@ -7389,7 +8271,11 @@
 	622a  GA622
 	630a  GA630 Gigabit Ethernet
 	6b00  WG311v3 54 Mbps Wireless PCI Adapter
-	6d00  WPNT511  RangeMax™ 240 Mbps Wireless PC Card
+	6d00  WPNT511 RangeMax 240 Mbps Wireless PC Card
+	7b00  WN511B RangeMax Next 270 Mbps Wireless PC Card
+	7c00  WN511T RangeMax Next 300 Mbps Wireless PC Card
+	7d00  WN311B RangeMax Next 270 Mbps Wireless PCI Adapter
+	7e00  WN311T RangeMax Next 300 Mbps Wireless PCI Adapter
 	f004  FA310TX
 1386  Video Domain Technologies
 1387  Systran Corp
@@ -7409,6 +8295,7 @@
 	1040  Smartio C104H/PCI
 	1141  Industrio CP-114
 	1680  Smartio C168H/PCI
+	1681  CP-168U V2 Smart Serial Board (8-port RS-232)
 	2040  Intellio CP-204J
 	2180  Intellio C218 Turbo PCI
 	3200  Intellio C320 Turbo PCI
@@ -7419,12 +8306,16 @@
 1396  Cipher Systems Inc
 1397  Cologne Chip Designs GmbH
 	08b4  ISDN network Controller [HFC-4S]
+		1397 b520  HFC-4S [IOB4ST]
+		1397 b540  HFC-4S [Swyx 4xS0 SX2 QuadBri]
 	16b8  ISDN network Controller [HFC-8S]
 	2bd0  ISDN network controller [HFC-PCI]
 		0675 1704  ISDN Adapter (PCI Bus, D, C)
 		0675 1708  ISDN Adapter (PCI Bus, D, C, ACPI)
 		1397 2bd0  ISDN Board
 		e4bf 1000  CI1-1-Harp
+	30b1  ISDN network Controller [HFC-E1]
+	f001  GSM Network Controller [HFC-4GSM]
 1398  Clarion co. Ltd
 1399  Rios systems Co Ltd
 139a  Alacritech Inc
@@ -7493,7 +8384,9 @@
 		13c1 1001  7xxx/8xxx-series PATA/SATA-RAID
 	1002  9xxx-series SATA-RAID
 	1003  9550SX SATA-RAID
+	1004  9650SE SATA-II RAID
 13c2  Technotrend Systemtechnik GmbH
+	000e  Technotrend/Hauppauge DVB card rev2.3
 13c3  Janz Computer AG
 13c4  Phase Metrics
 13c5  Alphi Technology Corp
@@ -7547,13 +8440,14 @@
 13ea  Dallas Semiconductor
 13eb  Hauppauge Computer Works Inc
 13ec  Zydacron Inc
+	000a  NPC-RC01 Remote control receiver
 13ed  Raytheion E-Systems
 13ee  Hayes Microcomputer Products Inc
 13ef  Coppercom Inc
 13f0  Sundance Technology Inc / IC Plus Corp
 	0200  IC Plus IP100A Integrated 10/100 Ethernet MAC + PHY
 	0201  ST201 Sundance Ethernet
-	1023  IC Plus IP1000 Family Gigabit Ethernet
+	1023  IP1000 Family Gigabit Ethernet
 13f1  Oce' - Technologies B.V.
 13f2  Ford Microelectronics Inc
 13f3  Mcdata Corporation
@@ -7574,6 +8468,7 @@
 		13f6 0111  CMI8738/C3DX PCI Audio Device
 		1681 a000  Gamesurround MUSE XL
 	0211  CM8738
+	9880  CM9880
 13f7  Wildfire Communications
 13f8  Ad Lib Multimedia Inc
 13f9  NTT Advanced Technology Corp.
@@ -7583,7 +8478,16 @@
 13fd  Micro Science Inc
 13fe  Advantech Co. Ltd
 	1240  PCI-1240 4-channel stepper motor controller card
-	1600  PCI-1612 4-port RS-232/422/485 PCI communication card
+	1600  PCI-16xx series PCI multiport serial board (function 0)
+# This board has two PCI functions, appears as two PCI devices
+		1601 0002  PCI-1601 2-port unisolated RS-422/485
+# This board has two PCI functions, appears as two PCI devices
+		1602 0002  PCI-1602 2-port isolated RS-422/485
+		1612 0004  PCI-1612 4-port RS-232/422/485
+	16ff  PCI-16xx series PCI multiport serial board (function 1: RX/TX steering CPLD)
+		1601 0000  PCI-1601 2-port unisolated RS-422/485 PCI communications card
+		1602 0000  PCI-1602 2-port isolated RS-422/485
+		1612 0000  PCI-1612 4-port RS-232/422/485
 	1733  PCI-1733 32-channel isolated digital input card
 	1752  PCI-1752
 	1754  PCI-1754
@@ -7662,11 +8566,17 @@
 		153b 1153  Aureon 7.1 Universe
 		270f f641  ZNF3-150
 		270f f645  ZNF3-250
+		3136 4154  Prodigy 7.1 XT
 1413  Addonics
 1414  Microsoft Corporation
 1415  Oxford Semiconductor Ltd
 	8403  VScom 011H-EP1 1 port parallel adaptor
-	9501  OX16PCI954 (Quad 16950 UART) function 0
+	9500  OX16PCI954 (Quad 16950 UART) function 0 (Disabled)
+	9501  OX16PCI954 (Quad 16950 UART) function 0 (Uart)
+		12c4 0201  Titan/cPCI (2 port)
+		12c4 0202  Titan/cPCI (4 port)
+		12c4 0203  Titan/cPCI (8 port)
+		12c4 0210  Titan/104-Plus (8 port, p1-4)
 		131f 2050  CyberPro (4-port)
 # Model IO1085, Part No: JJ-P46012
 		131f 2051  CyberSerial 4S Plus
@@ -7675,9 +8585,13 @@
 	950a  EXSYS EX-41092 Dual 16950 Serial adapter
 	950b  OXCB950 Cardbus 16950 UART
 	9510  OX16PCI954 (Quad 16950 UART) function 1 (Disabled)
-	9511  OX16PCI954 (Quad 16950 UART) function 1
+		12c4 0200  Titan/cPCI (Unused)
+	9511  OX16PCI954 (Quad 16950 UART) function 1 (8bit bus)
+		12c4 0211  Titan/104-Plus (8 port, p5-8)
 		15ed 2000  MCCR Serial p4-7 of 8
 		15ed 2001  MCCR Serial p4-15 of 16
+	9512  OX16PCI954 (Quad 16950 UART) function 1 (32bit bus)
+	9513  OX16PCI954 (Quad 16950 UART) function 1 (parallel port)
 	9521  OX16PCI952 (Dual 16950 UART)
 	9523  OX16PCI952 Integrated Parallel Port
 1416  Multiwave Innovation pte Ltd
@@ -7698,6 +8612,7 @@
 1424  Videoserver Connections
 1425  Chelsio Communications Inc
 	000b  T210 Protocol Engine
+	000c  T204 Protocol Engine
 1426  Storage Technology Corp.
 1427  Better On-Line Solutions
 1428  Edec Co Ltd
@@ -7717,6 +8632,13 @@
 1433  Eltec Elektronik GmbH
 # Nee Real Time Devices US Inc.
 1435  RTD Embedded Technologies, Inc.
+	4520  PCI4520
+	6020  SPM6020
+	6030  SPM6030
+	6420  SPM186420
+	6430  SPM176430
+	7520  DM7520
+	7820  DM7820
 1436  CIS Technology Inc
 1437  Nissin Inc Co
 1438  Atmel-dream
@@ -7752,6 +8674,7 @@
 144b  Loronix Information Systems Inc
 144c  Catalina Research Inc
 144d  Samsung Electronics Co Ltd
+	c00c  P35 laptop
 144e  OLITEC
 144f  Askey Computer Corp.
 1450  Octave Communications Ind.
@@ -7763,6 +8686,7 @@
 1457  Nuera Communications Inc
 1458  Giga-byte Technology
 	0c11  K8NS Pro Mainboard
+	9001  GC-PTV-TAF Hybrid TV card
 	e911  GN-WIAG02
 1459  DOOIN Electronics
 145a  Escalate Networks Inc
@@ -7774,17 +8698,24 @@
 	0001  NextMove PCI
 1460  DYNARC INC
 1461  Avermedia Technologies Inc
+	a3ce  M179
+	a3cf  M179
+	a836  M115 DVB-T, PAL/SECAM/NTSC Tuner
 	f436  AVerTV Hybrid+FM
 1462  Micro-Star International Co., Ltd.
 	5501  nVidia NV15DDR [GeForce2 Ti]
-# MSI CB54G Wireless PC Card that seems to use the Broadcom 4306 Chipset
 	6819  Broadcom Corporation BCM4306 802.11b/g Wireless LAN Controller [MSI CB54G]
 	6825  PCI Card wireless 11g [PC54G]
 	6834  RaLink RT2500 802.11g [PC54G2]
+	7125  K8N motherboard
+	7235  P965 Neo MS-7235 mainboard
 	8725  NVIDIA NV25 [GeForce4 Ti 4600] VGA Adapter
 	9000  NVIDIA NV28 [GeForce4 Ti 4800] VGA Adapter
 	9110  GeFORCE FX5200
 	9119  NVIDIA NV31 [GeForce FX 5600XT] VGA Adapter
+	9123  NVIDIA NV31 [GeForce FX 5600] FX5600-VTDR128 [MS-8912]
+	9510  Radeon 9600XT
+	9511  Radeon 9600XT
 	9591  nVidia Corporation NV36 [GeForce FX 5700LE]
 1463  Fast Corporation
 1464  Interactive Circuits & Systems Ltd
@@ -7845,6 +8776,7 @@
 1498  TEWS Datentechnik GmBH
 	0330  TPMC816 2 Channel CAN bus controller.
 	0385  TPMC901 Extended CAN bus with 2/4/6 CAN controller
+	21cc  TCP460 CompactPCI 16 Channel Serial Interface RS232/RS422
 	21cd  TCP461 CompactPCI 8 Channel Serial Interface RS232/RS422
 	30c8  TPCI200
 1499  EMTEC CO., Ltd
@@ -7903,12 +8835,16 @@
 14ba  INTERNIX Inc.
 14bb  SEMTECH Corporation
 14bc  Globespan Semiconductor Inc.
+	d002  Pulsar [PCI ADSL Card]
+	d00f  Pulsar [PCI ADSL Card]
 14bd  CARDIO Control N.V.
 14be  L3 Communications
 14bf  SPIDER Communications Inc.
 14c0  COMPAL Electronics Inc
 14c1  MYRICOM Inc.
+	0008  Myri-10G Dual-Protocol NIC (10G-PCIE-8A)
 	8043  Myrinet 2000 Scalable Cluster Interconnect
+		103c 1240  Myrinet M2L-PCI64/2-3.0 LANai 7.4 (HP OEM)
 14c2  DTK Computer
 14c3  MEDIATEK Corp.
 14c4  IWASAKI Information Systems Co Ltd
@@ -7985,7 +8921,10 @@
 	0811  Sentry5 External Interface Core
 	0816  BCM3302 Sentry5 MIPS32 CPU
 	1600  NetXtreme BCM5752 Gigabit Ethernet PCI Express
+		103c 3015  PCIe LAN on Motherboard
+		107b 5048  E4500 Onboard
 	1601  NetXtreme BCM5752M Gigabit Ethernet PCI Express
+	1639  NetXtreme II BCM5709 Gigabit Ethernet
 	1644  NetXtreme BCM5700 Gigabit Ethernet
 		1014 0277  Broadcom Vigil B5700 1000Base-T
 		1028 00d1  Broadcom BCM5700
@@ -8047,50 +8986,78 @@
 		0e11 00cf  NC7772 Gigabit Server Adapter (PCI-X, 10,100,1000-T)
 		0e11 00d0  NC7782 Gigabit Server Adapter (PCI-X, 10,100,1000-T)
 		0e11 00d1  NC7783 Gigabit Server Adapter (PCI-X, 10,100,1000-T)
+		10a9 8013  Dual Port Gigabit Ethernet (PCI-X,Copper)
+		10a9 8018  Dual Port Gigabit Ethernet (A330)
+		10a9 801a  Dual Port Gigabit Ethernet (IA-blade)
+		10a9 801b  Quad Port Gigabit Ethernet (PCI-E,Copper)
 		10b7 2000  3C998-T Dual Port 10/100/1000 PCI-X
 		10b7 3000  3C999-T Quad Port 10/100/1000 PCI-X
 		1166 1648  NetXtreme CIOB-E 1000Base-T
 		1734 100b  Primergy RX300
 	164a  NetXtreme II BCM5706 Gigabit Ethernet
-		103c 3101  NC370T Multifunction Gigabit Server Adapter
+		103c 3070  NC380T PCI Express Dual Port Multifunction Gigabit Server Adapter
+		103c 3101  NC370T MultifuNCtion Gigabit Server Adapter
 	164c  NetXtreme II BCM5708 Gigabit Ethernet
+		103c 7037  NC373T PCI Express Multifunction Gigabit Server Adapter
+		103c 7038  NC373i Integrated Multifunction Gigabit Server Adapter
 	164d  NetXtreme BCM5702FE Gigabit Ethernet
 	1653  NetXtreme BCM5705 Gigabit Ethernet
 		0e11 00e3  NC7761 Gigabit Server Adapter
 	1654  NetXtreme BCM5705_2 Gigabit Ethernet
 		0e11 00e3  NC7761 Gigabit Server Adapter
-		103c 3100  NC1020 HP ProLiant Gigabit Server Adapter 32 PCI
+		103c 3100  NC1020 ProLiant Gigabit Server Adapter 32 PCI
 		103c 3226  NC150T 4-port Gigabit Combo Switch & Adapter
 	1659  NetXtreme BCM5721 Gigabit Ethernet PCI Express
 		1014 02c6  eServer xSeries server mainboard
 		103c 7031  NC320T PCIe Gigabit Server Adapter
 		103c 7032  NC320i PCIe Gigabit Server Adapter
 		1734 1061  Primergy RX300 S2
+	165a  NetXtreme BCM5722 Gigabit Ethernet PCI Express
+		103c 7051  NC105i PCIe Gigabit Server Adapter
+		103c 7052  NC105T PCIe Gigabit Server Adapter
 	165d  NetXtreme BCM5705M Gigabit Ethernet
 		1028 865d  Latitude D400
 	165e  NetXtreme BCM5705M_2 Gigabit Ethernet
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
-		103c 099c  nx6110/nc6120
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		103c 099c  NX6110/NC6120
+		10cf 1279  LifeBook E8010D
 	1668  NetXtreme BCM5714 Gigabit Ethernet
 		103c 7039  NC324i PCIe Dual Port Gigabit Server Adapter
+	1669  NetXtreme 5714S Gigabit Ethernet
 	166a  NetXtreme BCM5780 Gigabit Ethernet
 	166b  NetXtreme BCM5780S Gigabit Ethernet
 	166e  570x 10/100 Integrated Controller
+	1672  NetXtreme BCM5754M Gigabit Ethernet PCI Express
+	1673  NetXtreme BCM5755M Gigabit Ethernet PCI Express
+	1674  NetXtreme BCM5756ME Gigabit Ethernet PCI Express
 	1677  NetXtreme BCM5751 Gigabit Ethernet PCI Express
 		1028 0179  Optiplex GX280
 		1028 0182  Latitude D610
+		1028 0187  Precision M70
 		1028 01ad  Optiplex GX620
+		103c 3006  DC7100 SFF(DX878AV)
 		1734 105d  Scenic W620
 	1678  NetXtreme BCM5715 Gigabit Ethernet
+	1679  NetXtreme BCM5715S Gigabit Ethernet
+		103c 1707  NC326m PCIe Dual Port Adapter
+		103c 170c  NC325m PCIe Quad Port Adapter
+		103c 703c  NC326i PCIe Dual Port Gigabit Server Adapter
+	167a  NetXtreme BCM5754 Gigabit Ethernet PCI Express
+	167b  NetXtreme BCM5755 Gigabit Ethernet PCI Express
 	167d  NetXtreme BCM5751M Gigabit Ethernet PCI Express
+		17aa 2081  Thinkpad R60e model 0657
 	167e  NetXtreme BCM5751F Fast Ethernet PCI Express
+	167f  NetLink BCM5787F Fast Ethernet PCI Express
+	1693  NetLink BCM5787M Gigabit Ethernet PCI Express
 	1696  NetXtreme BCM5782 Gigabit Ethernet
-		103c 12bc  HP d530 CMT (DG746A)
+		103c 12bc  d530 CMT (DG746A)
 		14e4 000d  NetXtreme BCM5782 1000Base-T
+	169a  NetLink BCM5786 Gigabit Ethernet PCI Express
+	169b  NetLink BCM5787 Gigabit Ethernet PCI Express
 	169c  NetXtreme BCM5788 Gigabit Ethernet
-# Turion Notebook nx6125
-		103c 308b  nx6125
+		103c 308b  MX6125
+		103c 30a1  NC2400
 	169d  NetLink BCM5789 Gigabit Ethernet PCI Express
 	16a6  NetXtreme BCM5702X Gigabit Ethernet
 		0e11 00bb  NC7760 Gigabit Server Adapter (PCI-X, 10/100/1000-T)
@@ -8105,10 +9072,16 @@
 		14e4 000b  NetXtreme BCM5703 1000Base-T
 		14e4 800a  NetXtreme BCM5703 1000Base-T
 	16a8  NetXtreme BCM5704S Gigabit Ethernet
+		10a9 8014  Dual Port Gigabit Ethernet (PCI-X,Fiber)
+		10a9 801c  Quad Port Gigabit Ethernet (PCI-E,Fiber)
 		10b7 2001  3C998-SX Dual Port 1000-SX PCI-X
 	16aa  NetXtreme II BCM5706S Gigabit Ethernet
-		103c 3102  NC370F Multifunction Gigabit Server Adapter
+		103c 3102  NC370F MultifuNCtion Gigabit Server Adapter
 	16ac  NetXtreme II BCM5708S Gigabit Ethernet
+		103c 1706  NC373m Multifunction Gigabit Server Adapter
+		103c 7038  NC373i PCI Express Multifunction Gigabit Server Adapter
+		103c 703b  NC373i Integrated Multifunction Gigabit Server Adapter
+		103c 703d  NC373F PCI Express Multifunction Gigabit Server Adapter
 	16c6  NetXtreme BCM5702A3 Gigabit Ethernet
 		10b7 1100  3C1000B-T 10/100/1000 PCI
 		14e4 000c  BCM5702 1000Base-T
@@ -8127,10 +9100,13 @@
 	170c  BCM4401-B0 100Base-TX
 		1028 0188  Inspiron 6000 laptop
 		1028 0196  Inspiron 5160
-		103c 099c  nx6110/nc6120
+		1028 01af  Inspiron 6400
+		103c 099c  NX6110/NC6120
 	170d  NetXtreme BCM5901 100Base-TX
 		1014 0545  ThinkPad R40e (2684-HVG) builtin ethernet controller
 	170e  NetXtreme BCM5901 100Base-TX
+	1712  NetLink BCM5906 Fast Ethernet PCI Express
+	1713  NetLink BCM5906M Fast Ethernet PCI Express
 	3352  BCM3352
 	3360  BCM3360
 	4210  BCM4210 iLine10 HomePNA 2.0
@@ -8143,31 +9119,37 @@
 	4306  BCM4307 Ethernet Controller
 	4307  BCM4307 802.11b Wireless LAN Controller
 	4310  BCM4310 Chipcommon I/OController
+	4311  Dell Wireless 1390 WLAN Mini-PCI Card
 	4312  BCM4310 UART
 	4313  BCM4310 Ethernet Controller
 	4315  BCM4310 USB Controller
 	4318  BCM4318 [AirForce One 54g] 802.11g Wireless LAN Controller
-		103c 1356  nx6125
-		1468 0311  Aspire 3022WLMi
+		103c 1356  MX6125
+		1043 120f  A6U notebook embedded card
+		1468 0311  Aspire 3022WLMi, 5024WLMi, 5020
 		1468 0312  TravelMate 2410
 		14e4 0449  Gateway 7510GX
 		14e4 4318  WPC54G version 3 [Wireless-G Notebook Adapter] 802.11g Wireless Lan Controller
 		16ec 0119  U.S.Robotics Wireless MAXg PC Card
-	4319  Dell Wireless 1470 DualBand WLAN
+		1737 0048  WPC54G-EU version 3 [Wireless-G Notebook Adapter]
+	4319  BCM4311 [AirForce 54g] 802.11a/b/g PCI Express Transceiver
 	4320  BCM4306 802.11b/g Wireless LAN Controller
 		1028 0001  TrueMobile 1300 WLAN Mini-PCI Card
 		1028 0003  Wireless 1350 WLAN Mini-PCI Card
-		103c 12f4  nx9500 Built-in Wireless
+		103c 12f4  NX9500 Built-in Wireless
 		103c 12fa  Presario R3000 802.11b/g
 		1043 100f  WL-100G
 		1057 7025  WN825G
 		106b 004e  AirPort Extreme
+		1154 0330  Buffalo WLI2-PCI-G54S High Speed Mode Wireless Desktop Adapter
 		144f 7050  eMachines M6805 802.11g Built-in Wireless
+		144f 7051  Sonnet Aria Extreme PCI
 		14e4 4320  Linksys WMP54G PCI
 		1737 4320  WPC54G
 		1799 7001  Belkin F5D7001 High-Speed Mode Wireless G Network Card
 		1799 7010  Belkin F5D7010 54g Wireless Network card
-		185f 1220  Acer TravelMate 290E WLAN Mini-PCI Card
+		1799 7011  F5D7011 54g+ Wireless Network card
+		185f 1220  TravelMate 290E WLAN Mini-PCI Card
 	4321  BCM4306 802.11a Wireless LAN Controller
 	4322  BCM4306 UART
 	4324  BCM4309 802.11a/b/g
@@ -8176,9 +9158,11 @@
 	4325  BCM43xG 802.11b/g
 		1414 0003  Wireless Notebook Adapter MN-720
 		1414 0004  Wireless PCI Adapter MN-730
-# probably this is a correct ID...
 	4326  BCM4307 Chipcommon I/O Controller?
+	4329  BCM43XG
+	4344  EDGE/GPRS data and 802.11b/g combo cardbus [GC89]
 	4401  BCM4401 100Base-T
+		103c 08b0  tc1100 tablet
 		1043 80a8  A7V8X motherboard
 	4402  BCM4402 Integrated 10/100BaseT
 	4403  BCM4402 V.90 56k Modem
@@ -8220,6 +9204,8 @@
 	5690  BCM5690 12-port Multi-Layer Gigabit Ethernet Switch
 	5691  BCM5691 GE/10GE 8+2 Gigabit Ethernet Switch Controller
 	5692  BCM5692 12-port Multi-Layer Gigabit Ethernet Switch
+	5695  BCM5695 12-port + HiGig Multi-Layer Gigabit Ethernet Switch
+	5698  BCM5698 12-port Multi-Layer Gigabit Ethernet Switch
 	5820  BCM5820 Crypto Accelerator
 	5821  BCM5821 Crypto Accelerator
 	5822  BCM5822 Crypto Accelerator
@@ -8297,6 +9283,7 @@
 	1066  HCF 56k Data/Fax/Voice/Spkp Modem
 		122d 4033  Dell Athena - MDP3900V-U
 	1085  HCF V90 56k Data/Fax/Voice/Spkp PCI Modem
+	10b6  CX06834-11 HCF V.92 56k Data/Fax/Voice/Spkp Modem
 	1433  HCF 56k Data/Fax Modem
 	1434  HCF 56k Data/Fax/Voice Modem
 	1435  HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem
@@ -8377,6 +9364,8 @@
 	2464  HSF 56k Data/Fax/Voice Modem (Mob SmartDAA)
 	2465  HSF 56k Data/Fax/Voice/Spkp (w/HS) Modem (Mob SmartDAA)
 	2466  HSF 56k Data/Fax/Voice/Spkp Modem (Mob SmartDAA)
+	2bfa  HDAudio Soft Data Fax Modem with SmartCP
+		1025 0009  Aspire 5622WLMi
 	2f00  HSF 56k HSFi Modem
 		13e0 8d84  IBM HSFi V.90
 		13e0 8d85  Compaq Stinger
@@ -8384,6 +9373,9 @@
 	2f02  HSF 56k HSFi Data/Fax
 	2f11  HSF 56k HSFi Modem
 	2f20  HSF 56k Data/Fax Modem
+	2f30  HSF 56k Data/Fax Modem
+	5045  HDAUDIO with SmartCP
+	5047  High Definition Audio [Waikiki]
 	8234  RS8234 ATM SAR Controller [ServiceSAR Plus]
 	8800  CX23880/1/2/3 PCI Video and Audio Decoder
 		0070 2801  Hauppauge WinTV 28xxx (Roslyn) models
@@ -8473,6 +9465,7 @@
 14fc  Quadrics Ltd
 	0000  QsNet Elan3 Network Adapter
 	0001  QsNetII Elan4 Network Adapter
+	0002  QsNetIII Elan5 Network Adapter
 14fd  JAPAN Computer Industry Inc
 14fe  ARCHTEK TELECOM Corp
 14ff  TWINHEAD INTERNATIONAL Corp
@@ -8554,17 +9547,19 @@
 1523  MUSIC Semiconductors
 1524  ENE Technology Inc
 	0510  CB710 Memory Card Reader Controller
-		103c 006a  nx9500
+		103c 006a  NX9500
 	0520  FLASH memory: ENE Technology Inc:
 	0530  ENE PCI Memory Stick Card Reader Controller
 	0550  ENE PCI Secure Digital Card Reader Controller
+	0551  SD/MMC Card Reader Controller
 	0610  PCI Smart Card Reader Controller
 	1211  CB1211 Cardbus Controller
 	1225  CB1225 Cardbus Controller
 	1410  CB1410 Cardbus Controller
+		1025 003c  CL50 motherboard
 		1025 005a  TravelMate 290
 	1411  CB-710/2/4 Cardbus Controller
-		103c 006a  nx9500
+		103c 006a  NX9500
 	1412  CB-712/4 Cardbus Controller
 	1420  CB1420 Cardbus Controller
 	1421  CB-720/2/4 Cardbus Controller
@@ -8605,6 +9600,7 @@
 1540  PROVIDEO MULTIMEDIA Co Ltd
 1541  MACHONE Communications
 1542  Concurrent Computer Corporation
+	9260  RCIM-II Real-Time Clock & Interrupt Module
 1543  SILICON Laboratories
 	3052  Intel 537 [Winmodem]
 	4c22  Si3036 MC'97 DAA
@@ -8764,6 +9760,10 @@
 15b6  Texas Memory Systems Inc
 15b7  Sandisk Corp
 15b8  ADDI-DATA GmbH
+	1003  APCI1032 SP controller (32 digi inputs w/ opto coupler)
+	1005  APCI2200 SP controller (8/16 digi outputs (relay))
+	100a  APCI1696 SP controller (96 TTL I/Os)
+	3001  APCI3501 SP controller (analog output board)
 15b9  Maestro Digital Communications
 15ba  Impacct Technology Corp
 15bb  Portwell Inc
@@ -8812,6 +9812,7 @@
 15e0  Cacheflow Inc
 15e1  Voice Technologies Group Inc
 15e2  Quicknet Technologies Inc
+	0500  PhoneJack-PCI
 15e3  Networth Technologies Inc
 15e4  VSN Systemen BV
 15e5  Valley technologies Inc
@@ -8860,7 +9861,7 @@
 	0400  FarSync T2P (2 port X.21/V.35/V.24)
 	0440  FarSync T4P (4 port X.21/V.35/V.24)
 	0610  FarSync T1U (1 port X.21/V.35/V.24)
-	0620  FarSync T2U (1 port X.21/V.35/V.24)
+	0620  FarSync T2U (2 port X.21/V.35/V.24)
 	0640  FarSync T4U (4 port X.21/V.35/V.24)
 	1610  FarSync TE1 (T1,E1)
 	2610  FarSync DSL-S1 (SHDSL)
@@ -8869,6 +9870,8 @@
 	8410  RTL81xx Fast Ethernet
 1629  Kongsberg Spacetec AS
 	1003  Format synchronizer v3.0
+	1006  Format synchronizer, model 10500
+	1007  Format synchronizer, model 21000
 	2002  Fast Universal Data Output
 # This seems to occur on their 802.11b Wireless card WMP-11
 1637  Linksys
@@ -8896,9 +9899,12 @@
 1677  Bernecker + Rainer
 	104e  5LS172.6 B&R Dual CAN Interface Card
 	12d7  5LS172.61 B&R Dual CAN Interface Card
+	20ad  5ACPCI.MFIO-K01 Profibus DP / K-Feldbus / COM
 167b  ZyDAS Technology Corp.
 	2102  ZyDAS ZD1202
 		187e 3406  ZyAIR B-122 CardBus 11Mbs Wireless LAN Card
+167d  Samsung Electro-Mechanics Co., Ltd.
+	a000  IPW2200 miniPCI Wireless
 1681  Hercules
 	0010  Hercules 3d Prophet II Ultra 64MB (350 MHz NV15BR core)
 1682  XFX Pine Group Inc.
@@ -8918,31 +9924,58 @@
 		1186 3a17  D-Link AirPremier DWL-G680 Wireless Cardbus Adapter
 		1186 3a18  D-Link AirPremier DWL-G550 Wireless PCI Adapter
 		1186 3a63  D-Link AirPremier DWL-AG660 Wireless Cardbus Adapter
+		1186 3a93  Conceptronic C54I Wireless 801.11g PCI card
 		1186 3a94  C54C Wireless 801.11g cardbus
+		1186 3ab0  Allnet ALL0281 Wireless PCI Card
 		1385 4d00  Netgear WG311T Wireless PCI Adapter
 		1458 e911  Gigabyte GN-WIAG02
 		14b7 0a60  8482-WD ORiNOCO 11a/b/g Wireless PCI Adapter
+		1668 1026  IBM HighRate 11 a/b/g Wireless CardBus Adapter
 		168c 0013  AirPlus XtremeG DWL-G650 Wireless PCMCIA Adapter
 		168c 1025  DWL-G650B2 Wireless CardBus Adapter
-		168c 1027  Netgate NL-3054CB ARIES b/g CardBus Adapter
+		168c 1027  Engenius NL-3054CB ARIES b/g CardBus Adapter
+		168c 1042  Ubiquiti Networks SuperRange a/b/g Cardbus Adapter
 		168c 2026  Netgate 5354MP ARIES a(108Mb turbo)/b/g MiniPCI Adapter
-		168c 2041  Netgate 5354MP Plus ARIES2 b/g MiniPCI Adapter
-		168c 2042  Netgate 5354MP Plus ARIES2 a/b/g MiniPCI Adapter
+		168c 2041  Engenius 5354MP Plus ARIES2 b/g MiniPCI Adapter
+		168c 2042  Engenius 5354MP Plus ARIES2 a/b/g MiniPCI Adapter
+		168c 2051  TRENDnet TEW-443PI Wireless PCI Adapter
 		16ab 7302  Trust Speedshare Turbo Pro Wireless PCI Adapter
+		17cf 0042  Z-COMAX Highpower XG-622H (400mw) 802.11b/g mini-PCI Adapter
+		185f 1012  CM9 Wireless a/b/g MiniPCI Adapter
+		185f 2012  Wistron NeWeb WLAN a+b+g model CB9
 	001a  AR5005G 802.11abg NIC
+		1052 168c  Sweex Wireless Lan PC Card 54Mbps
+		1113 ee20  SMC Wireless CardBus Adapter 802.11g (SMCWCB-G EU)
+		1113 ee24  SMC Wireless PCI Card WPCI-G
 		1186 3a15  D-Link AirPlus G DWL-G630 Wireless Cardbus Adapter(rev.D)
 		1186 3a16  D-Link AirPlus G DWL-G510 Wireless PCI Adapter(rev.B)
 		1186 3a23  D-Link AirPlus G DWL-G520+A Wireless PCI Adapter
 		1186 3a24  D-Link AirPlus G DWL-G650+A Wireless Cardbus Adapter
+		1186 3b08  AirPlus G DWL-G630
+		168c 001a  Belkin FD7000
 		168c 1052  TP-Link TL-WN510G Wireless CardBus Adapter
+		168c 2052  Compex Wireless 802.11 b/g  MiniPCI Adapter, Rev A1 [WLM54G]
 	001b  AR5006X 802.11abg NIC
 		1186 3a19  D-Link AirPremier AG DWL-AG660 Wireless Cardbus Adapter
 		1186 3a22  D-Link AirPremier AG DWL-AG530 Wireless PCI Adapter
+		1458 e901  GN-WI01HT Wireless a/b/g MiniPCI Adapter
+		168c 001b  Wireless LAN PCI LiteOn
+		168c 2062  EnGenius EMP-8602 (400mw) or Compex WLM54AG (SuperAG)
+		168c 2063  EnGenius EMP-8602 (400mw) or Compex WLM54AG
+		a727 6804  Wireless 11a/b/g PC Card with XJACK(r) Antenna
+	001c  AR5006EG 802.11 b/g Wireless PCI Express Adapter
 	0020  AR5005VL 802.11bg Wireless NIC
+	0023  AR5416 802.11a/b/g/n Wireless PCI Adapter
+	0024  AR5418 802.11a/b/g/n Wireless PCI Express Adapter
 	1014  AR5212 802.11abg NIC
+		1014 058a  ThinkPad 11a/b/g Wireless LAN Mini Express Adapter (AR5BXB6)
+	3b08  D-Link AirPlus G DWL-G630
 1695  EPoX Computer Co., Ltd.
 169c  Netcell Corporation
 	0044  Revolution Storage Processing Card
+# The right ID is 196d, but they got it nibble-swapped in 2202.
+169d  Club-3D VB (Wrong ID)
+	3306  ZAP TV 2202
 16a5  Tekram Technology Co.,Ltd.
 16ab  Global Sun Technology Inc
 	1100  GL24110P
@@ -8955,18 +9988,25 @@
 16b4  Aspex Semiconductor Ltd
 16b8  Sonnet Technologies, Inc.
 16be  Creatix Polymedia GmbH
+16c6  Micrel-Kendin
+	8695  Centaur KS8695 ARM processor
 16c8  Octasic Inc.
 16c9  EONIC B.V. The Netherlands
 16ca  CENATEK Inc
 	0001  Rocket Drive DL
 16cd  Densitron Technologies
 16ce  Roland Corp.
+16d5  Acromag, Inc.
+	4d4e  PMC482, APC482, AcPC482 Counter Timer Board
 16df  PIKA Technologies Inc.
 16e3  European Space Agency
 	1e0f  LEON2FT Processor
+16e5  Intellon Corp.
+	6000  INT6000 Ethernet-to-Powerline Bridge [HomePlug AV]
 16ec  U.S. Robotics
 	00ff  USR997900 10/100 Mbps PCI Network Card
 	0116  USR997902 10/100/1000 Mbps PCI Network Card
+	2f00  USR5660A (USR265660A, USR5660A-BP) 56K PCI Faxmodem
 	3685  Wireless Access PCI Adapter Model 022415
 16ed  Sycron N. V.
 	1001  UMIO communication card
@@ -8985,9 +10025,12 @@
 172a  Accelerated Encryption
 	13c8  AEP SureWare Runner 1000V3
 1734  Fujitsu Siemens Computer GmbH
+	1078  Amilo Pro v2010
+	1085  Celsius M450
 1737  Linksys
 	0013  WMP54G Wireless Pci Card
 	0015  WMP54GS Wireless Pci Card
+	0029  WPG54G ver. 4 PCI Card
 	1032  Gigabit Network Adapter
 		1737 0015  EG1032 v2 Instant Gigabit Network Adapter
 		1737 0024  EG1032 v3 Instant Gigabit Network Adapter
@@ -9024,6 +10067,7 @@
 	6020  Wireless PCMCIA Card - F5D6020
 	6060  Wireless PDA Card - F5D6060
 	7000  Wireless PCI Card - F5D7000
+	700a  Wireless PCI Card - F5D7000UK
 	7010  BCM4306 802.11b/g Wireless Lan Controller F5D7010
 179c  Data Patterns
 	0557  DP-PCI-557 [PCI 1553B]
@@ -9044,6 +10088,8 @@
 17c0  Wistron Corp.
 17c2  Newisys, Inc.
 17cb  Airgo Networks Inc
+	0001  AGN100 802.11 a/b/g True MIMO Wireless Card
+	0002  AGN300 802.11 a/b/g True MIMO Wireless Card
 17cc  NetChip Technology, Inc
 	2280  USB 2.0
 17cf  Z-Com, Inc.
@@ -9058,16 +10104,37 @@
 	1260  ARC-1260 16-Port PCI-Express to SATA RAID Controller
 17d5  S2io Inc.
 	5831  Xframe 10 Gigabit Ethernet PCI-X
-		103c 12d5  HP PCI-X 133MHz 10GbE SR Fiber
-	5832  Xframe II 10 Gigabit Ethernet PCI-X
+		103c 12d5  PCI-X 133MHz 10GbE SR Fiber
+		10a9 8020  Single Port 10 Gigabit Ethernet (PCI-X, Fiber)
+		10a9 8024  Single Port 10 Gigabit Ethernet (PCI-X, Fiber)
+	5832  Xframe II 10Gbps Ethernet
+		10a9 8021  Single Port 10 Gigabit Ethernet II (PCI-X, Fiber)
+17db  Cray Inc
+	0101  XT Series [Seastar] 3D Toroidal Router
+	0201  XT Series [Seastar] 3D Toroidal Router with RMA
+	0202  XT Series [Seastar] 3D Toroidal Router with RMA
 17de  KWorld Computer Co. Ltd.
+17e4  Sectra AB
+	0001  KK671 Cardbus encryption board
+	0002  KK672 Cardbus encryption board
+17e6  Entropic Communications Inc.
+	0010  EN2010 [c.Link] MoCA Network Controller (Coax, PCI interface)
+	0011  EN2010 [c.Link] MoCA Network Controller (Coax, MPEG interface)
+	0021  EN2210 [c.Link] MoCA Network Controller (Coax)
 17ee  Connect Components Ltd
 17f2  Albatron Corp.
+17f3  RDC Semiconductor, Inc.
+	6020  R6020 North Bridge
+	6030  R6030 ISA Bridge
+	6040  R6040 MAC Controller
+	6060  R6060 USB 1.1 Controller
+	6061  R6061 USB 2.0 Controller
 17fe  Linksys, A Division of Cisco Systems
 	2120  WMP11v4 802.11b PCI card
 	2220  [AirConn] INPROCOMM IPN 2220 Wireless LAN Adapter (rev 01)
 		17fe 2220  WPC54G ver. 4
 17ff  Benq Corporation
+1809  Lumanate, Inc.
 1813  Ambient Technologies Inc
 	4000  HaM controllerless modem
 		16be 0001  V9x HAM Data Fax Modem
@@ -9091,7 +10158,14 @@
 		1799 701a  F5D7010 Wireless G Notebook Network Card
 		185f 22a0  CN-WF513 Wireless Cardbus Adapter
 	0301  RT2561/RT61 802.11g PCI
-		2561 1814  Intellinet Wireless G PCI Adapter
+		1186 3c08  DWL-G630 Rev E
+		1186 3c09  DWL-G510 Rev C
+		1458 e934  GN-WP01GS
+		1737 0055  WMP54G ver 4.1
+	0302  RT2561/RT61 rev B 802.11g
+		1186 3c08  DWL-G630 Rev E
+		1186 3c09  DWL-G510 Rev C
+		1462 b834  PC54G3 Wireless 11g PCI Card
 	0401  Ralink RT2600 802.11 MIMO
 1820  InfiniCon Systems Inc.
 1822  Twinhan Technology Co. Ltd
@@ -9100,14 +10174,19 @@
 # HFC-based ISDN card
 	3069  ISDN PCI DC-105V2
 	9790  WL-121 Wireless Network Adapter 100g+ [Ver.3]
+182e  Raza Microelectronics, Inc.
+	0008  XLR516 Processor
 1830  Credence Systems Corporation
 183b  MikroM GmbH
 	08a7  MVC100 DVI
 	08a8  MVC101 SDI
 	08a9  MVC102 DVI+Audio
+	08b0  MVC200-DC
 1849  ASRock Incorporation
+184a  Thales Computers
 1851  Microtune, Inc.
 1852  Anritsu Corp.
+1853  SMSC Automotive Infotainment System Group
 1854  LG Electronics, Inc.
 185b  Compro Technology, Inc.
 185f  Wistron NeWeb Corp.
@@ -9120,28 +10199,35 @@
 	6278  MT25208 InfiniHost III Ex (Tavor compatibility mode)
 	6282  MT25208 InfiniHost III Ex
 187e  ZyXEL Communication Corporation
+	3403  ZyAir G-110 802.11g
+	340e  M-302 802.11g XtremeMIMO
+1885  Avvida Systems Inc.
 1888  Varisys Ltd
 	0301  VMFX1 FPGA PMC module
 	0601  VSM2 dual PMC carrier
 	0710  VS14x series PowerPC PCI board
 	0720  VS24x series PowerPC PCI board
+188a  Ample Communications, Inc
 1890  Egenera, Inc.
 1894  KNC One
 1896  B&B Electronics Manufacturing Company, Inc.
 18a1  Astute Networks Inc.
 18ac  DViCO Corporation
 	d500  FusionHDTV 5
-	d810  FusionHDTV 3 Gold
+	d800  FusionHDTV 3 Gold
+	d810  FusionHDTV 3 Gold-Q
 	d820  FusionHDTV 3 Gold-T
 18b8  Ammasso
 	b001  AMSO 1100 iWARP/RDMA Gigabit Ethernet Coprocessor
 18bc  Info-Tek Corp.
+18c3  Micronas Semiconductor Holding AG
 # Nee Octigabay System
 18c8  Cray Inc
 18c9  ARVOO Engineering BV
-18ca  XGI - Xabre Graphics Inc
+18ca  XGI Technology Inc. (eXtreme Graphics Innovation)
 	0020  Volari Z7
 	0040  Volari V3XT/V5/V8
+	0047  Volari 8300 (chip: XP10, codename: XG47)
 18d2  Sitecom
 # Sitecom HFC-S based ISDN controller card DC-105v2
 	3069  DC-105v2 ISDN controller
@@ -9162,6 +10248,10 @@
 		18ec d002  COMBO-4SFP
 		18ec d003  COMBO-4SFPRO
 		18ec d004  COMBO-2XFP
+18f6  NextIO
+	1000  [Nexsis] Switch Virtual P2P PCIe Bridge
+	1050  [Nexsis] Switch Virtual P2P PCI Bridge
+	2000  [Nexsis] Switch Integrated Mgmt. Endpoint
 18f7  Commtech, Inc.
 	0001  Fastcom ESCC-PCI-335
 	0002  Fastcom 422/4-PCI-335
@@ -9169,14 +10259,27 @@
 	0005  Fastcom IGESCC-PCI-ISO/1
 	000a  Fastcom 232/4-PCI-335
 18fb  Resilience Corporation
+1904  Hangzhou Silan Microelectronics Co., Ltd.
+	8139  RTL8139D [Realtek] PCI 10/100BaseTX ethernet adaptor
 1923  Sangoma Technologies Corp.
+	0040  A200/Remora FXO/FXS Analog AFT card
 	0100  A104d QUAD T1/E1 AFT card
-1924  Level 5 Networks Inc.
+	0300  A101 single-port T1/E1
+	0400  A104u Quad T1/E1 AFT
+1924  Solarflare Communications (nee Level 5 Networks)
 192e  TransDimension
 1931  Option N.V.
+	000c  Qualcomm MSM6275 UMTS chip
 1942  ClearSpeed Technology plc
 	e511  CSX600 Advance Accelerator Board
+194a  DapTechnology B.V.
+	1111  FireSpy3850
+	1112  FireSpy450b
+	1113  FireSpy450bT
+	1114  FireSpy850
+	1115  FireSpy850bT
 1957  Freescale Semiconductor Inc
+	0012  MPC8548 [PowerQUICC III]
 	0080  MPC8349E
 	0081  MPC8349
 	0082  MPC8347E TBGA
@@ -9186,26 +10289,68 @@
 	0086  MPC8343E
 	0087  MPC8343
 1958  Faster Technology, LLC.
+1959  PA Semi, Inc
 1966  Orad Hi-Tec Systems
 	1975  DVG64 family
+1969  Attansic Technology Corp.
+	1048  L1 Gigabit Ethernet Adapter
 196a  Sensory Networks Inc.
 	0101  NodalCore C-1000 Content Classification Accelerator
 	0102  NodalCore C-2000 Content Classification Accelerator
+	0105  NodalCore C-3000 Content Classification Accelerator
+196d  Club-3D BV
+1971  AGEIA Technologies, Inc.
+	1011  Physics Processing Unit [PhysX]
+		1043 0001  PhysX P1
 197b  JMicron Technologies, Inc.
 	2360  JMicron 20360/20363 AHCI Controller
+	2361  JMB361 AHCI/IDE
+		1462 7235  P965 Neo MS-7235 mainboard
 	2363  JMicron 20360/20363 AHCI Controller
+	2365  JMB365 AHCI/IDE
+	2366  JMB366 AHCI/IDE
+	2368  JMB368 IDE controller
+1982  Distant Early Warning Communications Inc
+	1600  OX16C954 HOST-A
+	16ff  OX16C954 HOST-B
 1989  Montilio Inc.
 	0001  RapidFile Bridge
 	8001  RapidFile
 1993  Innominate Security Technologies AG
+199a  Pulse-LINK, Inc.
+19a2  ServerEngines LLC
+	0200  BladeEngine 10Gb PCI-E iSCSI adapter
+	0201  BladeEngine 10Gb PCI-E Network Adpater
 19a8  DAQDATA GmbH
 19ac  Kasten Chase Applied Research
+	0001  ACA2400 Crypto Accelerator
 19ae  Progeny Systems Corporation
 	0520  4135 HFT Interface Controller
 19d4  Quixant Limited
 19e2  Vector Informatik GmbH
+19e7  NET (Network Equipment Technologies)
+	1001  STIX DSP Card
+	1002  STIX - 1 Port T1/E1 Card
+	1003  STIX - 2 Port T1/E1 Card
+	1004  STIX - 4 Port T1/E1 Card
+	1005  STIX - 4 Port FXS Card
+1a03  ASPEED Technology, Inc.
+	2000  AST2000
+1a07  Kvaser AB
+	0006  CAN interface PC104+ HS/HS
+	0007  CAN interface PCIcanx II HS or HS/HS
 1a08  Sierra semiconductor
 	0000  SC15064
+1a1d  GFaI e.V.
+	1a17  Meta Networks MTP-1G IDPS NIC
+1a29  Fortinet, Inc.
+1a51  Hectronic AB
+1a5d  Celoxica
+1a71  XenSource, Inc.
+1a73  Violin Technologies, Inc
+1a77  Lightfleet Corporation
+1a78  Virident Systems Inc.
+1a8c  Verigy Pte. Ltd.
 1b13  Jaton Corp
 1c1c  Symphony
 	0001  82C101
@@ -9220,6 +10365,7 @@
 	0300  E2200 Dual E1/Rawpipe Card
 1fc1  PathScale, Inc
 	000d  InfiniPath HT-400
+	0010  InfiniPath PE-800
 1fce  Cognio Inc.
 	0001  Spectrum Analyzer PC Card (SAgE)
 2000  Smart Link Ltd.
@@ -9227,6 +10373,8 @@
 2003  Smart Link Ltd.
 2004  Smart Link Ltd.
 21c3  21st Century Computer Corp.
+# (Probably only the Mobile Phone Division)
+22b8  Motorola, Inc.
 2348  Racore
 	2010  8142 100VG/AnyLAN
 2646  Kingston Technologies
@@ -9241,6 +10389,8 @@
 	0014  HiNT HC4 PCI to ISDN bridge, Network controller
 	0020  HB6 Universal PCI-PCI bridge (transparent mode)
 	0021  HB6 Universal PCI-PCI bridge (non-transparent mode)
+		1775 c200  C2K CompactPCI interface bridge
+		1775 ce90  CE9
 		4c53 1050  CT7 mainboard
 		4c53 1080  CT8 mainboard
 		4c53 1090  Cx9 mainboard
@@ -9332,6 +10482,7 @@
 	0100  AladdinCARD
 	0200  CPC
 4321  Tata Power Strategic Electronics Division
+434e  CAST Navigation LLC
 4444  Internext Compression Inc
 	0016  iTVC16 (CX23416) MPEG-2 Encoder
 		0070 0003  WinTV PVR 250
@@ -9347,20 +10498,21 @@
 		0070 c801  WinTV PVR 150
 		0070 e807  WinTV PVR 500 (1st unit)
 		0070 e817  WinTV PVR 500 (2nd unit)
+		0070 ff92  WiNTV PVR-550
 		0270 0801  WinTV PVR 150
+		10fc d038  GV-MVP/RX2W (1st unit)
+		10fc d039  GV-MVP/RX2W (2nd unit)
 		12ab fff3  MPG600
 		12ab ffff  MPG600
-		4070 8801  WinTV PVR 150
+		1461 c019  UltraTV 1500 MCE
 		9005 0092  VideOh! AVC-2010
 		9005 0093  VideOh! AVC-2410
-		ff92 0070  PVR-550
 	0803  iTVC15 MPEG-2 Encoder
 		0070 4000  WinTV PVR-350
 		0070 4001  WinTV PVR-250
 		0070 4800  WinTV PVR-350 (V1)
 		12ab 0000  MPG160
 		1461 a3ce  M179
-# video capture card
 		1461 a3cf  M179
 4468  Bridgeport machines
 4594  Cogetec Informatique Inc
@@ -9388,6 +10540,8 @@
 4d51  MediaQ Inc.
 	0200  MQ-200
 4d54  Microtechnica Co Ltd
+4d56  MATRIX VISION GmbH
+	0000  Altera Cyclone II CameraLink Frame Grabber [mvHYPERION-CLe]
 4ddc  ILC Data Device Corp
 	0100  DD-42924I5-300 (ARINC 429 Data Bus)
 	0801  BU-65570I1 MIL-STD-1553 Test and Simulation
@@ -9415,6 +10569,7 @@
 5145  Ensoniq (Old)
 	3031  Concert AudioPCI
 5168  Animation Technologies Inc.
+	0300  FlyDVB-S
 	0301  FlyDVB-T
 5301  Alliance Semiconductor Corp.
 	0001  ProMotion aT3D
@@ -9459,6 +10614,7 @@
 	8903  Trio 3D business multimedia
 	8904  Trio 64 3D
 		1014 00db  Integrated Trio3D
+		4843 314a  Terminator 128/3D GLH
 		5333 8904  86C365 Trio3D AGP
 	8905  Trio 64V+ family
 	8906  Trio 64V+ family
@@ -9543,6 +10699,7 @@
 	8d02  VT8636A [ProSavage KN133] AGP4X VGA Controller (TwisterK)
 	8d03  VT8751 [ProSavageDDR P4M266]
 	8d04  VT8375 [ProSavage8 KM266/KL266]
+	8e48  Chrome S27 PCIE
 	9102  86C410 Savage 2000
 		1092 5932  Viper II Z200
 		1092 5934  Viper II Z200
@@ -9557,6 +10714,7 @@
 	0350  TL880-based HDTV/ATSC tuner
 5455  Technische University Berlin
 	4458  S5933
+5456  GoTView
 5519  Cnet Technologies, Inc.
 5544  Dunord Technologies
 	0001  I-30xx Scanner Interface
@@ -9566,6 +10724,8 @@
 	3132  OpenSwitch12
 5700  Netpower
 5851  Exacq Technologies
+5853  XenSource, Inc.
+	0001  Xen Platform Device
 6356  UltraStor
 6374  c't Magazin fuer Computertechnik
 	6773  GPPCI
@@ -9578,6 +10738,7 @@
 7063  pcHDTV
 	2000  HD-2000
 	3000  HD-3000
+	5500  HD5500 HDTV
 7604  O.N. Electronic Co Ltd.
 7bde  MIDAC Corporation
 7fed  PowerTV
@@ -9651,9 +10812,9 @@
 	0962  80960RM [i960RM Bridge]
 	0964  80960RP [i960 RP Microprocessor/Bridge]
 	1000  82542 Gigabit Ethernet Controller
-		0e11 b0df  NC1632 Gigabit Ethernet Adapter (1000-SX)
-		0e11 b0e0  NC1633 Gigabit Ethernet Adapter (1000-LX)
-		0e11 b123  NC1634 Gigabit Ethernet Adapter (1000-SX)
+		0e11 b0df  NC6132 Gigabit Ethernet Adapter (1000-SX)
+		0e11 b0e0  NC6133 Gigabit Ethernet Adapter (1000-LX)
+		0e11 b123  NC6134 Gigabit Ethernet Adapter (1000-LX)
 		1014 0119  Netfinity Gigabit Ethernet SX Adapter
 		8086 1000  PRO/1000 Gigabit Server Adapter
 	1001  82543GC Gigabit Ethernet Controller (Fiber)
@@ -9676,7 +10837,7 @@
 		1028 011c  PRO/1000 XT Network Connection
 		8086 1107  PRO/1000 XT Server Adapter
 		8086 2107  PRO/1000 XT Server Adapter
-		8086 2110  PRO/1000 XT Server Adapter
+		8086 2110  PRO/1000 XT Desktop Adapter
 		8086 3108  PRO/1000 XT Network Connection
 	1009  82544EI Gigabit Ethernet Controller (Fiber)
 		1014 0268  iSeries Gigabit Ethernet Adapter
@@ -9695,8 +10856,8 @@
 		1014 0265  PRO/1000 MT Network Connection
 		1014 0267  PRO/1000 MT Network Connection
 		1014 026a  PRO/1000 MT Network Connection
-		1024 0134  Poweredge SC600
 		1028 002e  Optiplex GX260
+		1028 0134  PowerEdge 600SC
 		1028 0151  PRO/1000 MT Network Connection
 		107b 8920  PRO/1000 MT Desktop Adapter
 		8086 001e  PRO/1000 MT Desktop Adapter
@@ -9716,8 +10877,8 @@
 		4c53 1080  CT8 mainboard
 		4c53 10a0  CA3/CR3 mainboard
 		8086 1011  PRO/1000 MT Dual Port Server Adapter
-		8086 1012  Primergy RX300
-		8086 101a  PRO/1000 MT Dual Port Network Adapter
+		8086 1012  PRO/1000 MT Dual Port Server Adapter
+		8086 101a  PRO/1000 MT Dual Port Network Connection
 		8086 3424  SE7501HG2 Mainboard
 	1011  82545EM Gigabit Ethernet Controller (Fiber)
 		1014 0268  iSeries Gigabit Ethernet Adapter
@@ -9726,27 +10887,32 @@
 	1012  82546EB Gigabit Ethernet Controller (Fiber)
 		0e11 00dc  NC6170 Gigabit Server Adapter
 		8086 1012  PRO/1000 MF Dual Port Server Adapter
-	1013  82541EI Gigabit Ethernet Controller (Copper)
+	1013  82541EI Gigabit Ethernet Controller
 		8086 0013  PRO/1000 MT Network Connection
-		8086 1013  IBM ThinkCentre Network Card
+		8086 1013  PRO/1000 MT Network Connection
 		8086 1113  PRO/1000 MT Desktop Adapter
 	1014  82541ER Gigabit Ethernet Controller
+		8086 0014  PRO/1000 MT Desktop Connection
+		8086 1014  PRO/1000 MT Network Connection
 	1015  82540EM Gigabit Ethernet Controller (LOM)
-	1016  82540EP Gigabit Ethernet Controller (LOM)
+		8086 1015  PRO/1000 MT Mobile Connection
+	1016  82540EP Gigabit Ethernet Controller (Mobile)
 		1014 052c  PRO/1000 MT Mobile Connection
 		1179 0001  PRO/1000 MT Mobile Connection
 		8086 1016  PRO/1000 MT Mobile Connection
-	1017  82540EP Gigabit Ethernet Controller (LOM)
+	1017  82540EP Gigabit Ethernet Controller
 		8086 1017  PR0/1000 MT Desktop Connection
 	1018  82541EI Gigabit Ethernet Controller
-		8086 1018  PRO/1000 MT Desktop Adapter
-	1019  82547EI Gigabit Ethernet Controller (LOM)
+		8086 1018  PRO/1000 MT Mobile Connection
+	1019  82547EI Gigabit Ethernet Controller
 		1458 1019  GA-8IPE1000 Pro2 motherboard (865PE)
 		1458 e000  Intel Gigabit Ethernet (Kenai II)
 		8086 1019  PRO/1000 CT Desktop Connection
 		8086 301f  D865PERL mainboard
+		8086 302c  Intel 82865G Mainboard (D865GBF)
 		8086 3427  S875WP1-E mainboard
 	101a  82547EI Gigabit Ethernet Controller (Mobile)
+		8086 101a  PRO/1000 CT Mobile Connection
 	101d  82546EB Gigabit Ethernet Controller
 		8086 1000  PRO/1000 MT Quad Port Server Adapter
 	101e  82540EP Gigabit Ethernet Controller (Mobile)
@@ -9758,6 +10924,7 @@
 		8086 1000  PRO/1000 MT Server Connection
 		8086 1001  PRO/1000 MT Server Adapter
 		8086 1002  PRO/1000 MT Server Adapter
+		8086 1003  PRO/1000 GT Server Adapter
 		8086 1026  PRO/1000 MT Server Connection
 	1027  82545GM Gigabit Ethernet Controller
 		103c 3103  NC310F PCI-X Gigabit Server Adapter
@@ -9766,23 +10933,23 @@
 		8086 1003  PRO/1000 MF Server Adapter(LX)
 		8086 1027  PRO/1000 MF Server Adapter
 	1028  82545GM Gigabit Ethernet Controller
-		8086 1028  PRO/1000 MB Server Adapter
+		8086 1028  PRO/1000 MB Server Connection
 	1029  82559 Ethernet Controller
 	1030  82559 InBusiness 10/100
 	1031  82801CAM (ICH3) PRO/100 VE (LOM) Ethernet Controller
 		1014 0209  ThinkPad A/T/X Series
 		104d 80e7  Vaio PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
+		104d 813c  Vaio PCG-GRV616G
 		107b 5350  EtherExpress PRO/100 VE
 		1179 0001  EtherExpress PRO/100 VE
 		144d c000  EtherExpress PRO/100 VE
 		144d c001  EtherExpress PRO/100 VE
 		144d c003  EtherExpress PRO/100 VE
 		144d c006  vpr Matrix 170B4
-		813c 104d  Vaio PCG-GRV616G
 	1032  82801CAM (ICH3) PRO/100 VE Ethernet Controller
 	1033  82801CAM (ICH3) PRO/100 VM (LOM) Ethernet Controller
 	1034  82801CAM (ICH3) PRO/100 VM Ethernet Controller
-	1035  82801CAM (ICH3)/82562EH (LOM)  Ethernet Controller
+	1035  82801CAM (ICH3)/82562EH (LOM) Ethernet Controller
 	1036  82801CAM (ICH3) 82562EH Ethernet Controller
 	1037  82801CAM (ICH3) Chipset Ethernet Controller
 	1038  82801CAM (ICH3) PRO/100 VM (KM) Ethernet Controller
@@ -9793,15 +10960,23 @@
 	103b  82801DB PRO/100 VM (LOM) Ethernet Controller
 	103c  82801DB PRO/100 VM (CNR) Ethernet Controller
 	103d  82801DB PRO/100 VE (MOB) Ethernet Controller
+		1014 0522  Thinkpad R50e model 1634
 	103e  82801DB PRO/100 VM (MOB) Ethernet Controller
 	1040  536EP Data Fax Modem
 		16be 1040  V.9X DSP Data Fax Modem
 	1043  PRO/Wireless LAN 2100 3B Mini PCI Adapter
+		103c 08b0  tc1100 tablet
+		8086 2522  Samsung P30 integrated WLAN
 		8086 2527  MIM2000/Centrino
+		8086 2581  Toshiba Satellite M10
 	1048  PRO/10GbE LR Server Adapter
 		8086 a01f  PRO/10GbE LR Server Adapter
 		8086 a11f  PRO/10GbE LR Server Adapter
-	104b  Ethernet Controller
+	1049  82566MM Gigabit Network Connection
+	104a  82566DM Gigabit Network Connection
+	104b  82566DC Gigabit Network Connection
+	104c  82562V 10/100 Network Connection
+	104d  82566MC Gigabit Network Connection
 	1050  82562EZ 10/100 Ethernet Controller
 		1462 728c  865PE Neo2 (MS-6728)
 		1462 758c  MS-6758 (875P Neo)
@@ -9811,11 +10986,29 @@
 	1051  82801EB/ER (ICH5/ICH5R) integrated LAN Controller
 	1052  PRO/100 VM Network Connection
 	1053  PRO/100 VM Network Connection
+	1054  PRO/100 VE Network Connection
+	1055  PRO/100 VM Network Connection
+	1056  PRO/100 VE Network Connection
+	1057  PRO/100 VE Network Connection
 	1059  82551QM Ethernet Controller
+	105b  82546GB Gigabit Ethernet Controller (Copper)
 	105e  82571EB Gigabit Ethernet Controller
+		103c 7044  NC360T PCI Express Dual Port Gigabit Server Adapter
 		1775 6003  Telum GE-QT
+		8086 005e  PRO/1000 PT Dual Port Server Connection
+		8086 105e  PRO/1000 PT Dual Port Network Connection
+		8086 115e  PRO/1000 PT Dual Port Server Adapter
+		8086 116e  PRO/1000 PT Dual Port Server Adapter
+		8086 125e  PRO/1000 PT Dual Port Server Adapter
+		8086 135e  PRO/1000 PT Dual Port Server Adapter
 	105f  82571EB Gigabit Ethernet Controller
+		8086 115f  PRO/1000 PF Dual Port Server Adapter
+		8086 116f  PRO/1000 PF Dual Port Server Adapter
+		8086 125f  PRO/1000 PF Dual Port Server Adapter
+		8086 135f  PRO/1000 PF Dual Port Server Adapter
 	1060  82571EB Gigabit Ethernet Controller
+		8086 0060  PRO/1000 PB Dual Port Server Connection
+		8086 1060  PRO/1000 PB Dual Port Server Connection
 	1064  82562ET/EZ/GT/GZ - PRO/100 VE (LOM) Ethernet Controller
 		1043 80f8  P5GD1-VW Mainboard
 	1065  82562ET/EZ/GT/GZ - PRO/100 VE Ethernet Controller
@@ -9829,69 +11022,106 @@
 		1028 0165  PowerEdge 750
 		8086 0075  PRO/1000 CT Network Connection
 		8086 1075  PRO/1000 CT Network Connection
-	1076  82541GI/PI Gigabit Ethernet Controller
+	1076  82541GI Gigabit Ethernet Controller
 		1028 0165  PowerEdge 750
 		1028 019a  PowerEdge SC1425
 		8086 0076  PRO/1000 MT Network Connection
 		8086 1076  PRO/1000 MT Network Connection
 		8086 1176  PRO/1000 MT Desktop Adapter
-		8086 1276  PRO/1000 MT Desktop Adapter
+		8086 1276  PRO/1000 MT Network Adapter
 	1077  82541GI Gigabit Ethernet Controller
 		1179 0001  PRO/1000 MT Mobile Connection
 		8086 0077  PRO/1000 MT Mobile Connection
 		8086 1077  PRO/1000 MT Mobile Connection
-	1078  82541EI Gigabit Ethernet Controller
-		8086 1078  PRO/1000 MT Network Connection
+	1078  82541ER Gigabit Ethernet Controller
+		8086 1078  82541ER-based Network Connection
 	1079  82546GB Gigabit Ethernet Controller
-		103c 12a6  HP Dual Port 1000Base-T [A9900A]
-		103c 12cf  HP Core Dual Port 1000Base-T [AB352A]
+		103c 12a6  Dual Port 1000Base-T [A9900A]
+		103c 12cf  Core Dual Port 1000Base-T [AB352A]
+		1775 10d0  V5D Single Board Computer Gigabit Ethernet
+		1775 ce90  CE9
 		1fc1 0027  Niagara 2261 Failover NIC
 		4c53 1090  Cx9 / Vx9 mainboard
 		4c53 10b0  CL9 mainboard
 		8086 0079  PRO/1000 MT Dual Port Network Connection
 		8086 1079  PRO/1000 MT Dual Port Network Connection
-		8086 1179  PRO/1000 MT Dual Port Network Connection
+		8086 1179  PRO/1000 MT Dual Port Server Adapter
 		8086 117a  PRO/1000 MT Dual Port Server Adapter
 	107a  82546GB Gigabit Ethernet Controller
-		103c 12a8  HP Dual Port 1000base-SX [A9899A]
+		103c 12a8  Dual Port 1000base-SX [A9899A]
 		8086 107a  PRO/1000 MF Dual Port Server Adapter
 		8086 127a  PRO/1000 MF Dual Port Server Adapter
 	107b  82546GB Gigabit Ethernet Controller
 		8086 007b  PRO/1000 MB Dual Port Server Connection
 		8086 107b  PRO/1000 MB Dual Port Server Connection
 	107c  82541PI Gigabit Ethernet Controller
-	107d  82572EI Gigabit Ethernet Controller
-	107e  82572EI Gigabit Ethernet Controller
+		8086 1376  PRO/1000 GT Desktop Adapter
+		8086 1476  PRO/1000 GT Desktop Adapter
+	107d  82572EI Gigabit Ethernet Controller (Copper)
+		8086 1082  PRO/1000 PT Server Adapter
+		8086 1092  PRO/1000 PT Server Adapter
+	107e  82572EI Gigabit Ethernet Controller (Fiber)
+		8086 1084  PRO/1000 PF Server Adapter
+		8086 1094  PRO/1000 PF Server Adapter
 	107f  82572EI Gigabit Ethernet Controller
 	1080  FA82537EP 56K V.92 Data/Fax Modem PCI
-	1081  Enterprise Southbridge LAN Copper
-	1082  Enterprise Southbridge LAN fiber
-	1083  Enterprise Southbridge LAN SERDES
-	1084  Enterprise Southbridge IDE Redirection
-	1085  Enterprise Southbridge Serial Port Redirection
-	1086  Enterprise Southbridge IPMI/KCS0
-	1087  Enterprise Southbridge UHCI Redirection
-	1089  Enterprise Southbridge BT
-	108a  82546EB Gigabit Ethernet Controller
+	1081  631xESB/632xESB LAN Controller Copper
+	1082  631xESB/632xESB LAN Controller fiber
+	1083  631xESB/632xESB LAN Controller SERDES
+	1084  631xESB/632xESB IDE Redirection
+	1085  631xESB/632xESB Serial Port Redirection
+	1086  631xESB/632xESB IPMI/KCS0
+	1087  631xESB/632xESB UHCI Redirection
+	1089  631xESB/632xESB BT
+	108a  82546GB Gigabit Ethernet Controller
+		8086 108a  PRO/1000 P Dual Port Server Adapter
+		8086 118a  PRO/1000 P Dual Port Server Adapter
 	108b  82573V Gigabit Ethernet Controller (Copper)
 	108c  82573E Gigabit Ethernet Controller (Copper)
-# Intel(R) Active Management Technology - KCS
-	108e  82573E KCS
-	108f  Intel(R) Active Management Technology - SOL
-	1092  Intel(R) PRO/100 VE Network Connection
-	1096  PRO/1000 EB Network Connection with I/O Acceleration
-	1097  Enterprise Southbridge DPT LAN fiber
-	1098  PRO/1000 EB Backplane Connection with I/O Acceleration
-	1099  82546GB Quad Port Server Adapter
+	108e  82573E KCS (Active Management)
+	108f  Active Management Technology - SOL
+	1091  PRO/100 VM Network Connection
+	1092  PRO/100 VE Network Connection
+	1093  PRO/100 VM Network Connection
+	1094  PRO/100 VE Network Connection
+	1095  PRO/100 VE Network Connection
+	1096  80003ES2LAN Gigabit Ethernet Controller (Copper)
+	1097  631xESB/632xESB DPT LAN Controller (Fiber)
+	1098  80003ES2LAN Gigabit Ethernet Controller (Serdes)
+	1099  82546GB Gigabit Ethernet Controller (Copper)
+		8086 1099  PRO/1000 GT Quad Port Server Adapter
 	109a  82573L Gigabit Ethernet Controller
+		1179 ff10  PRO/1000 PL
+		17aa 2001  ThinkPad T60
+		17aa 207e  Thinkpad X60s
+		8086 109a  PRO/1000 PL Network Connection
 	109b  82546GB PRO/1000 GF Quad Port Server Adapter
+	109e  82597EX 10GbE Ethernet Controller
+		8086 a01f  PRO/10GbE CX4 Server Adapter
+		8086 a11f  PRO/10GbE CX4 Server Adapter
 	10a0  82571EB PRO/1000 AT Quad Port Bypass Adapter
 	10a1  82571EB PRO/1000 AF Quad Port Bypass Adapter
+	10a4  82571EB Gigabit Ethernet Controller
+		8086 10a4  PRO/1000 PT Quad Port Server Adapter
+		8086 11a4  PRO/1000 PT Quad Port Server Adapter
 	10b0  82573L PRO/1000 PL Network Connection
 	10b2  82573V PRO/1000 PM Network Connection
 	10b3  82573E PRO/1000 PM Network Connection
 	10b4  82573L PRO/1000 PL Network Connection
-	10b5  82546GB PRO/1000 GT Quad Port Server Adapter
+	10b5  82546GB Gigabit Ethernet Controller (Copper)
+		103c 3109  NC340T PCI-X Quad-port Gigabit Server Adapter
+		8086 1099  PRO/1000 GT Quad Port Server Adapter
+		8086 1199  PRO/1000 GT Quad Port Server Adapter
+	10b9  82572EI Gigabit Ethernet Controller (Copper)
+		8086 1083  PRO/1000 PT Desktop Adapter
+		8086 1093  PRO/1000 PT Desktop Adapter
+	10ba  80003ES2LAN Gigabit Ethernet Controller (Copper)
+	10bb  80003ES2LAN Gigabit Ethernet Controller (Serdes)
+	10bc  82571EB Gigabit Ethernet Controller (Copper)
+		8086 10bc  PRO/1000 PT Quad Port LP Server Adapter
+		8086 11bc  PRO/1000 PT Quad Port LP Server Adapter
+	10c4  82562GT 10/100 Network Connection
+	10c5  82562G 10/100 Network Connection
 	1107  PRO/1000 MF Server Adapter (LX)
 	1130  82815 815 Chipset Host Bridge and Memory Controller Hub
 		1025 1016  Travelmate 612 TX
@@ -9909,7 +11139,7 @@
 	1161  82806AA PCI64 Hub Advanced Programmable Interrupt Controller
 		8086 1161  82806AA PCI64 Hub APIC
 	1162  Xscale 80200 Big Endian Companion Chip
-	1200  Intel IXP1200 Network Processor
+	1200  IXP1200 Network Processor
 		172a 0000  AEP SSL Accelerator
 	1209  8255xER/82551IT Fast Ethernet Controller
 		4c53 1050  CT7 mainboard
@@ -9992,6 +11222,7 @@
 		144d 2501  SEM-2000 MiniPCI LAN Adapter
 		144d 2502  SEM-2100IL MiniPCI LAN Adapter
 		1668 1100  EtherExpress PRO/100B (TX) (MiniPCI Ethernet+Modem)
+		1775 ce90  CE9
 		4c53 1080  CT8 mainboard
 		4c53 10e0  PSL09 PrPMC
 		8086 0001  EtherExpress PRO/100B (TX)
@@ -10002,6 +11233,7 @@
 		8086 0006  82557 10/100 with Wake on LAN
 		8086 0007  82558 10/100 Adapter
 		8086 0008  82558 10/100 with Wake on LAN
+		8086 0009  82558B PRO/100+ PCI (TP)
 		8086 000a  EtherExpress PRO/100+ Management Adapter
 		8086 000b  EtherExpress PRO/100+
 		8086 000c  EtherExpress PRO/100+ Management Adapter
@@ -10077,6 +11309,7 @@
 		8086 3010  EtherExpress PRO/100 S Network Connection
 		8086 3011  EtherExpress PRO/100 S Network Connection
 		8086 3012  EtherExpress PRO/100 Network Connection
+		8086 301a  S845WD1-E mainboard
 		8086 3411  SDS2 Mainboard
 	122d  430FX - 82437FX TSC [Triton I]
 	122e  82371FB PIIX ISA [Triton I]
@@ -10089,8 +11322,7 @@
 	123b  82380PB PCI to PCI Docking Bridge
 	123c  82380AB (MISA) Mobile PCI-to-ISA Bridge
 	123d  683053 Programmable Interrupt Device
-# in" hidden" mode
-	123e  82466GX (IHPC) Integrated Hot-Plug Controller
+	123e  82466GX (IHPC) Integrated Hot-Plug Controller (hidden mode)
 	123f  82466GX Integrated Hot-Plug Controller (IHPC)
 	1240  82752 (752) AGP Graphics Accelerator
 	124b  82380FB (MPCI2) Mobile Docking Controller
@@ -10115,10 +11347,10 @@
 		1028 0467  PowerEdge Expandable RAID Controller 2/DC
 		1028 1111  PowerEdge Expandable RAID Controller 2/SC
 		103c 03a2  MegaRAID
-		103c 10c6  MegaRAID 438, HP NetRAID-3Si
-		103c 10c7  MegaRAID T5, Integrated HP NetRAID
-		103c 10cc  MegaRAID, Integrated HP NetRAID
-		103c 10cd  HP NetRAID-1Si
+		103c 10c6  MegaRAID 438, NetRAID-3Si
+		103c 10c7  MegaRAID T5, Integrated NetRAID
+		103c 10cc  MegaRAID, Integrated NetRAID
+		103c 10cd  NetRAID-1Si
 		105a 0000  SuperTrak
 		105a 2168  SuperTrak Pro
 		105a 5168  SuperTrak66/100
@@ -10137,8 +11369,11 @@
 	1a30  82845 845 (Brookdale) Chipset Host Bridge
 		1028 010e  Optiplex GX240
 	1a31  82845 845 (Brookdale) Chipset AGP Bridge
-	1a38  Server DMA Controller
+	1a38  5000 Series Chipset DMA Engine
 	1a48  PRO/10GbE SR Server Adapter
+	1b48  82597EX 10GbE Ethernet Controller
+		8086 a01f  PRO/10GbE LR Server Adapter
+		8086 a11f  PRO/10GbE LR Server Adapter
 	2410  82801AA ISA Bridge (LPC)
 	2411  82801AA IDE
 	2412  82801AA USB
@@ -10162,32 +11397,41 @@
 	2426  82801AB AC'97 Modem
 	2428  82801AB PCI Bridge
 	2440  82801BA ISA Bridge (LPC)
+		8086 5744  S845WD1-E
 	2442  82801BA/BAM USB (Hub #1)
 		1014 01c6  Netvista A40/A40p
 		1025 1016  Travelmate 612 TX
+		1028 00c7  Dimension 8100
 		1028 010e  Optiplex GX240
 		1043 8027  TUSL2-C Mainboard
 		104d 80df  Vaio PCG-FX403
 		147b 0507  TH7II-RAID
 		8086 4532  D815EEA2 mainboard
 		8086 4557  D815EGEW Mainboard
+		8086 5744  S845WD1-E mainboard
 	2443  82801BA/BAM SMBus
 		1014 01c6  Netvista A40/A40p
 		1025 1016  Travelmate 612 TX
+		1028 00c7  Dimension 8100
 		1028 010e  Optiplex GX240
 		1043 8027  TUSL2-C Mainboard
 		104d 80df  Vaio PCG-FX403
 		147b 0507  TH7II-RAID
 		8086 4532  D815EEA2 mainboard
 		8086 4557  D815EGEW Mainboard
+		8086 5744  S845WD1-E mainboard
 	2444  82801BA/BAM USB (Hub #2)
 		1025 1016  Travelmate 612 TX
+		1028 00c7  Dimension 8100
 		1028 010e  Optiplex GX240
 		1043 8027  TUSL2-C Mainboard
 		104d 80df  Vaio PCG-FX403
 		147b 0507  TH7II-RAID
 		8086 4532  D815EEA2 mainboard
+		8086 5744  S845WD1-E mainboard
 	2445  82801BA/BAM AC'97 Audio
+		0e11 000b  Compaq Deskpro EN Audio
+		0e11 0088  Evo D500
 		1014 01c6  Netvista A40/A40p
 		1025 1016  Travelmate 612 TX
 		104d 80df  Vaio PCG-FX403
@@ -10198,7 +11442,8 @@
 		1025 1016  Travelmate 612 TX
 		104d 80df  Vaio PCG-FX403
 	2448  82801 Mobile PCI Bridge
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
+		144d c00c  P30 notebook
 		1734 1055  Amilo M1420
 	2449  82801BA/BAM/CA/CAM Ethernet Controller
 		0e11 0012  EtherExpress PRO/100 VM
@@ -10236,11 +11481,13 @@
 		104d 80df  Vaio PCG-FX403
 	244b  82801BA IDE U100
 		1014 01c6  Netvista A40/A40p
+		1028 00c7  Dimension 8100
 		1028 010e  Optiplex GX240
 		1043 8027  TUSL2-C Mainboard
 		147b 0507  TH7II-RAID
 		8086 4532  D815EEA2 mainboard
 		8086 4557  D815EGEW Mainboard
+		8086 5744  S845WD1-E mainboard
 	244c  82801BAM ISA Bridge (LPC)
 	244e  82801 PCI Bridge
 		1014 0267  NetVista A30p
@@ -10282,7 +11529,7 @@
 		1014 0223  ThinkPad A/T/X Series
 		1014 0503  ThinkPad R31 2656BBG
 		1014 051a  ThinkPad A/T/X Series
-		101f 1025  Acer 620 Series
+		101f 1025  620 Series
 		104d 80e7  VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP
 		134d 4c21  Dell Inspiron 2100 internal modem
 		144d 2115  vpr Matrix 170B4 internal modem
@@ -10308,82 +11555,118 @@
 	24c1  82801DBL (ICH4-L) IDE Controller
 	24c2  82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) USB UHCI Controller #1
 		1014 0267  NetVista A30p
+		1014 052d  Thinkpad R50e model 1634
 		1025 005a  TravelMate 290
 		1028 0126  Optiplex GX260
 		1028 0163  Latitude D505
 		1028 0196  Inspiron 5160
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		103c 08b0  tc1100 tablet
 		1071 8160  MIM2000
+		144d c00c  P30/P35 notebook
 		1462 5800  845PE Max (MS-6580)
 		1509 2990  Averatec 5110H laptop
+		1734 1004  D1451 Mainboard (SCENIC N300, i845GV)
 		1734 1055  Amilo M1420
 		4c53 1090  Cx9 / Vx9 mainboard
 		8086 4541  Latitude D400
+		e4bf 0cc9  CC9-SAMBA
+		e4bf 0cd2  CD2-BEBOP
 	24c3  82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) SMBus Controller
 		1014 0267  NetVista A30p
+		1014 052d  Thinkpad R50e model 1634
 		1025 005a  TravelMate 290
 		1028 0126  Optiplex GX260
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		103c 08b0  tc1100 tablet
 		1071 8160  MIM2000
+		144d c00c  P30/P35 notebook
 		1458 24c2  GA-8PE667 Ultra
 		1462 5800  845PE Max (MS-6580)
+		1734 1004  D1451 Mainboard (SCENIC N300, i845GV)
 		1734 1055  Amilo M1420
 		4c53 1090  Cx9 / Vx9 mainboard
+		e4bf 0cc9  CC9-SAMBA
+		e4bf 0cd2  CD2-BEBOP
 	24c4  82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) USB UHCI Controller #2
 		1014 0267  NetVista A30p
+		1014 052d  Thinkpad R50e model 1634
 		1025 005a  TravelMate 290
 		1028 0126  Optiplex GX260
 		1028 0163  Latitude D505
 		1028 0196  Inspiron 5160
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		103c 08b0  tc1100 tablet
 		1071 8160  MIM2000
+		144d c00c  P30/P35 notebook
 		1462 5800  845PE Max (MS-6580)
 		1509 2990  Averatec 5110H
+		1734 1004  D1451 Mainboard (SCENIC N300, i845GV)
 		4c53 1090  Cx9 / Vx9 mainboard
 		8086 4541  Latitude D400
+		e4bf 0cc9  CC9-SAMBA
+		e4bf 0cd2  CD2-BEBOP
 	24c5  82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) AC'97 Audio Controller
 		0e11 00b8  Analog Devices Inc. codec [SoundMAX]
 		1014 0267  NetVista A30p
+		1014 0537  Thinkpad T41
+		1014 055f  Thinkpad R50e model 1634
 		1025 005a  TravelMate 290
 		1028 0139  Latitude D400
 		1028 0163  Latitude D505
 		1028 0196  Inspiron 5160
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		103c 08b0  tc1100 tablet
 		1071 8160  MIM2000
+		144d c00c  P30/P35 notebook
 		1458 a002  GA-8PE667 Ultra
 		1462 5800  845PE Max (MS-6580)
+		1734 1005  D1451 (SCENIC N300, i845GV) Sigmatel STAC9750T
 		1734 1055  Amilo M1420
 	24c6  82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) AC'97 Modem Controller
-		003c 1025  Acer Aspire 2001WLCi (Compal CL50 motherboard) implementation
+		1014 0524  Thinkpad T41
+		1014 0559  Thinkpad R50e model 1634
+		1025 003c  Aspire 2001WLCi (Compal CL50 motherboard) implementation
 		1025 005a  TravelMate 290
 		1028 0196  Inspiron 5160
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		103c 08b0  tc1100 tablet
 		1071 8160  MIM2000
+		144d c00c  P30/P35 notebook
 	24c7  82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) USB UHCI Controller #3
 		1014 0267  NetVista A30p
+		1014 052d  Thinkpad R50e model 1634
 		1025 005a  TravelMate 290
 		1028 0126  Optiplex GX260
 		1028 0163  Latitude D505
 		1028 0196  Inspiron 5160
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		103c 08b0  tc1100 tablet
 		1071 8160  MIM2000
+		144d c00c  P30/P35 notebook
 		1462 5800  845PE Max (MS-6580)
 		1509 2990  Averatec 5110H
+		1734 1004  D1451 Mainboard (SCENIC N300, i845GV)
 		4c53 1090  Cx9 / Vx9 mainboard
 		8086 4541  Latitude D400
+		e4bf 0cc9  CC9-SAMBA
+		e4bf 0cd2  CD2-BEBOP
 	24ca  82801DBM (ICH4-M) IDE Controller
+		1014 052d  Thinkpad R50e model 1634
 		1025 005a  TravelMate 290
 		1028 0163  Latitude D505
 		1028 0196  Inspiron 5160
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		103c 08b0  tc1100 tablet
 		1071 8160  MIM2000
+		144d c00c  P30/P35 notebook
 		1734 1055  Amilo M1420
 		8086 4541  Latitude D400
 	24cb  82801DB (ICH4) IDE Controller
@@ -10391,24 +11674,35 @@
 		1028 0126  Optiplex GX260
 		1458 24c2  GA-8PE667 Ultra
 		1462 5800  845PE Max (MS-6580)
+		1734 1004  D1451 Mainboard (SCENIC N300, i845GV)
 		4c53 1090  Cx9 / Vx9 mainboard
+		e4bf 0cc9  CC9-SAMBA
+		e4bf 0cd2  CD2-BEBOP
 	24cc  82801DBM (ICH4-M) LPC Interface Bridge
+		144d c00c  P30 notebook
 		1734 1055  Amilo M1420
 	24cd  82801DB/DBM (ICH4/ICH4-M) USB2 EHCI Controller
 		1014 0267  NetVista A30p
+		1014 052e  Thinkpad R50e model 1634
 		1025 005a  TravelMate 290
 		1028 011d  Latitude D600
 		1028 0126  Optiplex GX260
 		1028 0139  Latitude D400
 		1028 0163  Latitude D505
 		1028 0196  Inspiron 5160
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		103c 08b0  tc1100 tablet
 		1071 8160  MIM2000
+		1179 ff00  Satellite 2430
+		144d c00c  P30/P35 notebook
 		1462 3981  845PE Max (MS-6580)
 		1509 1968  Averatec 5110H
+		1734 1004  D1451 Mainboard (SCENIC N300, i845GV)
 		1734 1055  Amilo M1420
 		4c53 1090  Cx9 / Vx9 mainboard
+		e4bf 0cc9  CC9-SAMBA
+		e4bf 0cd2  CD2-BEBOP
 	24d0  82801EB/ER (ICH5/ICH5R) LPC Interface Bridge
 	24d1  82801EB (ICH5) SATA Controller
 		1028 0169  Precision 470
@@ -10420,13 +11714,14 @@
 		15d9 4580  P4SCE Mainboard
 		8086 3427  S875WP1-E mainboard
 		8086 4246  Desktop Board D865GBF
+		8086 4c43  Desktop Board D865GLC
 		8086 524c  D865PERL mainboard
 	24d2  82801EB/ER (ICH5/ICH5R) USB UHCI Controller #1
 		1014 02ed  xSeries server mainboard
 		1028 0169  Precision 470
 		1028 0183  PowerEdge 1800
 		1028 019a  PowerEdge SC1425
-		103c 006a  nx9500
+		103c 006a  NX9500
 		103c 12bc  d530 CMT (DG746A)
 		1043 80a6  P5P800-MX Mainboard
 		1458 24d2  GA-8IPE1000/8KNXP motherboard
@@ -10435,11 +11730,13 @@
 		1734 101c  Primergy RX300 S2
 		8086 3427  S875WP1-E mainboard
 		8086 4246  Desktop Board D865GBF
+		8086 4c43  Desktop Board D865GLC
 		8086 524c  D865PERL mainboard
 	24d3  82801EB/ER (ICH5/ICH5R) SMBus Controller
 		1014 02ed  xSeries server mainboard
 		1028 0156  Precision 360
 		1028 0169  Precision 470
+		103c 12bc  d330 uT
 		1043 80a6  P4P800 Mainboard
 		1458 24d2  GA-8IPE1000 Pro2 motherboard (865PE)
 		1462 7280  865PE Neo2 (MS-6728)
@@ -10447,13 +11744,14 @@
 		1734 101c  Primergy RX300 S2
 		8086 3427  S875WP1-E mainboard
 		8086 4246  Desktop Board D865GBF
+		8086 4c43  Desktop Board D865GLC
 		8086 524c  D865PERL mainboard
 	24d4  82801EB/ER (ICH5/ICH5R) USB UHCI Controller #2
 		1014 02ed  xSeries server mainboard
 		1028 0169  Precision 470
 		1028 0183  PowerEdge 1800
 		1028 019a  PowerEdge SC1425
-		103c 006a  nx9500
+		103c 006a  NX9500
 		103c 12bc  d530 CMT (DG746A)
 		1043 80a6  P5P800-MX Mainboard
 		1458 24d2  GA-8IPE1000 Pro2 motherboard (865PE)
@@ -10462,10 +11760,13 @@
 		1734 101c  Primergy RX300 S2
 		8086 3427  S875WP1-E mainboard
 		8086 4246  Desktop Board D865GBF
+		8086 4c43  Desktop Board D865GLC
 		8086 524c  D865PERL mainboard
 	24d5  82801EB/ER (ICH5/ICH5R) AC'97 Audio Controller
+		100a 147b  Abit IS7-E motherboard
 		1028 0169  Precision 470
-		103c 006a  nx9500
+		103c 006a  NX9500
+		103c 12bc  d330 uT
 		1043 80f3  P4P800 Mainboard
 		1043 810f  P5P800-MX Mainboard
 		1458 a002  GA-8IPE1000/8KNXP motherboard
@@ -10474,13 +11775,14 @@
 		8086 a000  D865PERL mainboard
 		8086 e000  D865PERL mainboard
 		8086 e001  Desktop Board D865GBF
+		8086 e002  SoundMax Intergrated Digital Audio
 	24d6  82801EB/ER (ICH5/ICH5R) AC'97 Modem Controller
-		103c 006a  nx9500
+		103c 006a  NX9500
 	24d7  82801EB/ER (ICH5/ICH5R) USB UHCI Controller #3
 		1014 02ed  xSeries server mainboard
 		1028 0169  Precision 470
 		1028 0183  PowerEdge 1800
-		103c 006a  nx9500
+		103c 006a  NX9500
 		103c 12bc  d530 CMT (DG746A)
 		1043 80a6  P5P800-MX Mainboard
 		1458 24d2  GA-8IPE1000 Pro2 motherboard (865PE)
@@ -10489,12 +11791,13 @@
 		1734 101c  Primergy RX300 S2
 		8086 3427  S875WP1-E mainboard
 		8086 4246  Desktop Board D865GBF
+		8086 4c43  Desktop Board D865GLC
 		8086 524c  D865PERL mainboard
 	24db  82801EB/ER (ICH5/ICH5R) IDE Controller
 		1014 02ed  xSeries server mainboard
 		1028 0169  Precision 470
 		1028 019a  PowerEdge SC1425
-		103c 006a  nx9500
+		103c 006a  NX9500
 		103c 12bc  d530 CMT (DG746A)
 		1043 80a6  P5P800-MX Mainboard
 		1458 24d2  GA-8IPE1000 Pro2 motherboard (865PE)
@@ -10505,6 +11808,7 @@
 		8086 24db  P4C800 Mainboard
 		8086 3427  S875WP1-E mainboard
 		8086 4246  Desktop Board D865GBF
+		8086 4c43  Desktop Board D865GLC
 		8086 524c  D865PERL mainboard
 	24dc  82801EB (ICH5) LPC Interface Bridge
 	24dd  82801EB/ER (ICH5/ICH5R) USB2 EHCI Controller
@@ -10512,13 +11816,14 @@
 		1028 0169  Precision 470
 		1028 0183  PowerEdge 1800
 		1028 019a  PowerEdge SC1425
-		103c 006a  nx9500
+		103c 006a  NX9500
 		103c 12bc  d530 CMT (DG746A)
 		1043 80a6  P5P800-MX Mainboard
 		1458 5006  GA-8IPE1000 Pro2 motherboard (865PE)
 		1462 7280  865PE Neo2 (MS-6728)
 		8086 3427  S875WP1-E mainboard
 		8086 4246  Desktop Board D865GBF
+		8086 4c43  Desktop Board D865GLC
 		8086 524c  D865PERL mainboard
 	24de  82801EB/ER (ICH5/ICH5R) USB UHCI Controller #4
 		1014 02ed  xSeries server mainboard
@@ -10530,6 +11835,7 @@
 		1734 101c  Primergy RX300 S2
 		8086 3427  S875WP1-E mainboard
 		8086 4246  Desktop Board D865GBF
+		8086 4c43  Desktop Board D865GLC
 		8086 524c  D865PERL mainboard
 	24df  82801ER (ICH5R) SATA Controller
 	2500  82820 820 (Camino) Chipset Host Bridge (MCH)
@@ -10542,6 +11848,7 @@
 	2520  82805AA MTH Memory Translator Hub
 	2521  82804AA MRH-S Memory Repeater Hub for SDRAM
 	2530  82850 850 (Tehama) Chipset Host Bridge (MCH)
+		1028 00c7  Dimension 8100
 		147b 0507  TH7II-RAID
 	2531  82860 860 (Wombat) Chipset Host Bridge (MCH)
 	2532  82850 850 (Tehama) Chipset AGP Bridge
@@ -10575,16 +11882,21 @@
 		1462 5800  845PE Max (MS-6580)
 	2561  82845G/GL[Brookdale-G]/GE/PE Host-to-AGP Bridge
 	2562  82845G/GL[Brookdale-G]/GE Chipset Integrated Graphics Device
+		0e11 00b9  Evo D510 SFF
 		1014 0267  NetVista A30p
+		1734 1004  D1451 Mainboard (SCENIC N300, i845GV)
 	2570  82865G/PE/P DRAM Controller/Host-Hub Interface
-		103c 006a  nx9500
+		103c 006a  NX9500
+		103c 12bc  d330 uT
 		1043 80f2  P5P800-MX Mainboard
 		1458 2570  GA-8IPE1000 Pro2 motherboard (865PE)
 	2571  82865G/PE/P PCI to AGP Controller
 	2572  82865G Integrated Graphics Controller
 		1028 019d  Dimension 3000
+		103c 12bc  D530 sff(dc578av)
 		1043 80a5  P5P800-MX Mainboard
 		8086 4246  Desktop Board D865GBF
+		8086 4c43  Desktop Board D865GLC
 	2573  82865G/PE/P PCI to CSA Bridge
 	2576  82865G/PE/P Processor to I/O Memory Interface
 	2578  82875P/E7210 Memory Controller Hub
@@ -10594,60 +11906,79 @@
 	2579  82875P Processor to AGP Controller
 	257b  82875P/E7210 Processor to PCI to CSA Bridge
 	257e  82875P/E7210 Processor to I/O Memory Interface
-	2580  915G/P/GV/GL/PL/910GL Express Memory Controller Hub
+	2580  82915G/P/GV/GL/PL/910GL Memory Controller Hub
 		1458 2580  GA-8I915ME-G Mainboard
 		1462 7028  915P/G Neo2
 		1734 105b  Scenic W620
-	2581  915G/P/GV/GL/PL/910GL Express PCI Express Root Port
-	2582  82915G/GV/910GL Express Chipset Family Graphics Controller
+	2581  82915G/P/GV/GL/PL/910GL PCI Express Root Port
+	2582  82915G/GV/910GL Integrated Graphics Controller
 		1028 1079  Optiplex GX280
+		103c 3006  DC7100 SFF(DX878AV)
 		1043 2582  P5GD1-VW Mainboard
 		1458 2582  GA-8I915ME-G Mainboard
 		1734 105b  Scenic W620
-	2584  925X/XE Express Memory Controller Hub
-	2585  925X/XE Express PCI Express Root Port
+	2584  82925X/XE Memory Controller Hub
+	2585  82925X/XE PCI Express Root Port
 	2588  E7220/E7221 Memory Controller Hub
 	2589  E7220/E7221 PCI Express Root Port
 	258a  E7221 Integrated Graphics Controller
 	2590  Mobile 915GM/PM/GMS/910GML Express Processor to DRAM Controller
 		1028 0182  Dell Latidude C610
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
 		a304 81b7  Vaio VGN-S3XP
+		e4bf 0ccd  CCD-CALYPSO
 	2591  Mobile 915GM/PM Express PCI Express Root Port
 	2592  Mobile 915GM/GMS/910GML Express Graphics Controller
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
+		103c 308a  NC6220
 		1043 1881  GMA 900 915GM Integrated Graphics
+		e4bf 0ccd  CCD-CALYPSO
 	25a1  6300ESB LPC Interface Controller
 	25a2  6300ESB PATA Storage Controller
+		1775 10d0  V5D Single Board Computer IDE
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 		4c53 10e0  PSL09 PrPMC
 	25a3  6300ESB SATA Storage Controller
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 		4c53 10d0  Telum ASLP10 Processor AMC
 		4c53 10e0  PSL09 PrPMC
 	25a4  6300ESB SMBus Controller
+		1775 10d0  V5D Single Board Computer
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 		4c53 10d0  Telum ASLP10 Processor AMC
 		4c53 10e0  PSL09 PrPMC
 	25a6  6300ESB AC'97 Audio Controller
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 	25a7  6300ESB AC'97 Modem Controller
 	25a9  6300ESB USB Universal Host Controller
+		1775 10d0  V5D Single Board Computer USB
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 		4c53 10d0  Telum ASLP10 Processor AMC
 		4c53 10e0  PSL09 PrPMC
 	25aa  6300ESB USB Universal Host Controller
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 		4c53 10e0  PSL09 PrPMC
 	25ab  6300ESB Watchdog Timer
+		1775 10d0  V5D Single Board Computer
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 		4c53 10d0  Telum ASLP10 Processor AMC
 		4c53 10e0  PSL09 PrPMC
 	25ac  6300ESB I/O Advanced Programmable Interrupt Controller
+		1775 10d0  V5D Single Board Computer
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 		4c53 10d0  Telum ASLP10 Processor AMC
 		4c53 10e0  PSL09 PrPMC
 	25ad  6300ESB USB2 Enhanced Host Controller
+		1775 10d0  V5D Single Board Computer USB 2.0
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 		4c53 10d0  Telum ASLP10 Processor AMC
 		4c53 10e0  PSL09 PrPMC
@@ -10655,26 +11986,25 @@
 	25b0  6300ESB SATA RAID Controller
 		4c53 10d0  Telum ASLP10 Processor AMC
 		4c53 10e0  PSL09 PrPMC
-	25c0  Workstation Memory Controller Hub
-	25d0  Server Memory Controller Hub
-	25d4  Server Memory Contoller Hub
-	25d8  Server Memory Controller Hub
-	25e2  Server PCI Express x4 Port 2
-	25e3  Server PCI Express x4 Port 3
-	25e4  Server PCI Express x4 Port 4
-	25e5  Server PCI Express x4 Port 5
-	25e6  Server PCI Express x4 Port 6
-	25e7  Server PCI Express x4 Port 7
-	25e8  Server AMB Memory Mapped Registers
-	25f0  Server Error Reporting Registers
-	25f1  Reserved Registers
-	25f3  Reserved Registers
-	25f5  Server FBD Registers
-	25f6  Server FBD Registers
-	25f7  Server PCI Express x8 Port 2-3
-	25f8  Server PCI Express x8 Port 4-5
-	25f9  Server PCI Express x8 Port 6-7
-	25fa  Server PCI Express x16 Port 4-7
+	25c0  5000X Chipset Memory Controller Hub
+	25d0  5000Z Chipset Memory Controller Hub
+	25d4  5000V Chipset Memory Controller Hub
+	25d8  5000P Chipset Memory Controller Hub
+	25e2  5000 Series Chipset PCI Express x4 Port 2
+	25e3  5000 Series Chipset PCI Express x4 Port 3
+	25e4  5000 Series Chipset PCI Express x4 Port 4
+	25e5  5000 Series Chipset PCI Express x4 Port 5
+	25e6  5000 Series Chipset PCI Express x4 Port 6
+	25e7  5000 Series Chipset PCI Express x4 Port 7
+	25f0  5000 Series Chipset FSB Registers
+	25f1  5000 Series Chipset Reserved Registers
+	25f3  5000 Series Chipset Reserved Registers
+	25f5  5000 Series Chipset FBD Registers
+	25f6  5000 Series Chipset FBD Registers
+	25f7  5000 Series Chipset PCI Express x8 Port 2-3
+	25f8  5000 Series Chipset PCI Express x8 Port 4-5
+	25f9  5000 Series Chipset PCI Express x8 Port 6-7
+	25fa  5000X Chipset PCI Express x16 Port 4-7
 	2600  E8500/E8501 Hub Interface 1.5
 	2601  E8500/E8501 PCI Express x4 Port D
 	2602  E8500/E8501 PCI Express x4 Port C0
@@ -10687,7 +12017,7 @@
 	2609  E8500/E8501 PCI Express x8 Port B
 	260a  E8500/E8501 PCI Express x8 Port A
 	260c  E8500/E8501 IMI Registers
-	2610  E8500/E8501 Front Side Bus, Boot, and Interrupt Registers
+	2610  E8500/E8501 FSB Registers
 	2611  E8500/E8501 Address Mapping Registers
 	2612  E8500/E8501 RAS Registers
 	2613  E8500/E8501 Reserved Registers
@@ -10712,58 +12042,68 @@
 	2640  82801FB/FR (ICH6/ICH6R) LPC Interface Bridge
 		1462 7028  915P/G Neo2
 		1734 105c  Scenic W620
+		e4bf 0ccd  CCD-CALYPSO
 	2641  82801FBM (ICH6M) LPC Interface Bridge
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
 	2642  82801FW/FRW (ICH6W/ICH6RW) LPC Interface Bridge
 	2651  82801FB/FW (ICH6/ICH6W) SATA Controller
 		1028 0179  Optiplex GX280
 		1043 2601  P5GD1-VW Mainboard
 		1734 105c  Scenic W620
 		8086 4147  D915GAG Motherboard
+		e4bf 0ccd  CCD-CALYPSO
 	2652  82801FR/FRW (ICH6R/ICH6RW) SATA Controller
 		1462 7028  915P/G Neo2
 	2653  82801FBM (ICH6M) SATA Controller
 	2658  82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #1
 		1028 0179  Optiplex GX280
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
 		1043 80a6  P5GD1-VW Mainboard
 		1458 2558  GA-8I915ME-G Mainboard
 		1462 7028  915P/G Neo2
 		1734 105c  Scenic W620
+		e4bf 0ccd  CCD-CALYPSO
 	2659  82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #2
 		1028 0179  Optiplex GX280
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
 		1043 80a6  P5GD1-VW Mainboard
 		1458 2659  GA-8I915ME-G Mainboard
 		1462 7028  915P/G Neo2
 		1734 105c  Scenic W620
+		e4bf 0ccd  CCD-CALYPSO
 	265a  82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #3
 		1028 0179  Optiplex GX280
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
 		1043 80a6  P5GD1-VW Mainboard
 		1458 265a  GA-8I915ME-G Mainboard
 		1462 7028  915P/G Neo2
 		1734 105c  Scenic W620
+		e4bf 0ccd  CCD-CALYPSO
 	265b  82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #4
 		1028 0179  Optiplex GX280
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
 		1043 80a6  P5GD1-VW Mainboard
 		1458 265a  GA-8I915ME-G Mainboard
 		1462 7028  915P/G Neo2
 		1734 105c  Scenic W620
+		e4bf 0ccd  CCD-CALYPSO
 	265c  82801FB/FBM/FR/FW/FRW (ICH6 Family) USB2 EHCI Controller
 		1028 0179  Optiplex GX280
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
 		1043 80a6  P5GD1-VW Mainboard
 		1458 5006  GA-8I915ME-G Mainboard
 		1462 7028  915P/G Neo2
 		1734 105c  Scenic W620
+		8086 265c  Dimension 3100
+		e4bf 0ccd  CCD-CALYPSO
 	2660  82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 1
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
 	2662  82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 2
 	2664  82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 3
 	2666  82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 4
 	2668  82801FB/FBM/FR/FW/FRW (ICH6 Family) High Definition Audio Controller
+# based on the PTGD1-LA motherboard
+		103c 2a09  PufferM-UL8E
 		1043 814e  P5GD1-VW Mainboard
 	266a  82801FB/FBM/FR/FW/FRW (ICH6 Family) SMBus Controller
 		1028 0179  Optiplex GX280
@@ -10771,175 +12111,315 @@
 		1458 266a  GA-8I915ME-G Mainboard
 		1462 7028  915P/G Neo2
 		1734 105c  Scenic W620
+		e4bf 0ccd  CCD-CALYPSO
 	266c  82801FB/FBM/FR/FW/FRW (ICH6 Family) LAN Controller
 	266d  82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Modem Controller
 		1025 006a  Conexant AC'97 CoDec (in Acer TravelMate 2410 serie laptop)
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
 	266e  82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Audio Controller
 		1025 006a  Realtek ALC 655 codec (in Acer TravelMate 2410 serie laptop)
 		1028 0179  Optiplex GX280
 		1028 0182  Latitude D610 Laptop
 		1028 0188  Inspiron 6000 laptop
-		103c 099c  nx6110/nc6120
+		103c 0944  Compaq NC6220
+		103c 099c  NX6110/NC6120
+		103c 3006  DC7100 SFF(DX878AV)
 		1458 a002  GA-8I915ME-G Mainboard
+		152d 0745  Packard Bell A8550 Laptop
 		1734 105a  Scenic W620
 	266f  82801FB/FBM/FR/FW/FRW (ICH6 Family) IDE Controller
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
 		1043 80a6  P5GD1-VW Mainboard
 		1458 266f  GA-8I915ME-G Mainboard
 		1462 7028  915P/G Neo2
 		1734 105c  Scenic W620
-	2670  Enterprise Southbridge LPC
-	2680  Enterprise Southbridge SATA IDE
-	2681  Enterprise Southbridge SATA AHCI
-	2682  Enterprise Southbridge SATA RAID
-	2683  Enterprise Southbridge SATA RAID
-	2688  Enterprise Southbridge UHCI USB #1
-	2689  Enterprise Southbridge UHCI USB #2
-	268a  Enterprise Southbridge UHCI USB #3
-	268b  Enterprise Southbridge UHCI USB #4
-	268c  Enterprise Southbridge EHCI USB
-	2690  Enterprise Southbridge PCI Express Root Port 1
-	2692  Enterprise Southbridge PCI Express Root Port 2
-	2694  Enterprise Southbridge PCI Express Root Port 3
-	2696  Enterprise Southbridge PCI Express Root Port 4
-	2698  Enterprise Southbridge AC '97 Audio
-	2699  Enterprise Southbridge AC '97 Modem
-	269a  Enterprise Southbridge High Definition Audio
-	269b  Enterprise Southbridge SMBus
-	269e  Enterprise Southbridge PATA
-	2770  945G/GZ/P/PL Express Memory Controller Hub
+	2670  631xESB/632xESB/3100 Chipset LPC Interface Controller
+	2680  631xESB/632xESB/3100 Chipset SATA Storage Controller IDE
+	2681  631xESB/632xESB SATA Storage Controller AHCI
+	2682  631xESB/632xESB SATA Storage Controller RAID
+	2683  631xESB/632xESB SATA Storage Controller RAID
+	2688  631xESB/632xESB/3100 Chipset UHCI USB Controller #1
+	2689  631xESB/632xESB/3100 Chipset UHCI USB Controller #2
+	268a  631xESB/632xESB/3100 Chipset UHCI USB Controller #3
+	268b  631xESB/632xESB/3100 Chipset UHCI USB Controller #4
+	268c  631xESB/632xESB/3100 Chipset EHCI USB2 Controller
+	2690  631xESB/632xESB/3100 Chipset PCI Express Root Port 1
+	2692  631xESB/632xESB/3100 Chipset PCI Express Root Port 2
+	2694  631xESB/632xESB/3100 Chipset PCI Express Root Port 3
+	2696  631xESB/632xESB/3100 Chipset PCI Express Root Port 4
+	2698  631xESB/632xESB AC '97 Audio Controller
+	2699  631xESB/632xESB AC '97 Modem Controller
+	269a  631xESB/632xESB High Definition Audio Controller
+	269b  631xESB/632xESB/3100 Chipset SMBus Controller
+	269e  631xESB/632xESB IDE Controller
+	2770  82945G/GZ/P/PL Memory Controller Hub
+		107b 5048  E4500
 		8086 544e  DeskTop Board D945GTP
-	2771  945G/GZ/P/PL Express PCI Express Root Port
-	2772  945G/GZ Express Integrated Graphics Controller
+	2771  82945G/GZ/P/PL PCI Express Root Port
+	2772  82945G/GZ Integrated Graphics Controller
 		8086 544e  DeskTop Board D945GTP
-	2774  955X Express Memory Controller Hub
-	2775  955X Express PCI Express Root Port
-	2776  945G/GZ Express Integrated Graphics Controller
-	2778  E7230 Memory Controller Hub
-	2779  E7230 PCI Express Root Port
-	277a  975X Express PCI Express Root Port
-	277c  975X Express Memory Controller Hub
-	277d  975X Express PCI Express Root Port
-	2782  82915G Express Chipset Family Graphics Controller
+	2774  82955X Memory Controller Hub
+	2775  82955X PCI Express Root Port
+	2776  82945G/GZ Integrated Graphics Controller
+	2778  E7230/3000/3010 Memory Controller Hub
+	2779  E7230/3000/3010 PCI Express Root Port
+	277a  82975X/3010 PCI Express Root Port
+	277c  82975X Memory Controller Hub
+	277d  82975X PCI Express Root Port
+	2782  82915G Integrated Graphics Controller
 		1043 2582  P5GD1-VW Mainboard
 		1734 105b  Scenic W620
 	2792  Mobile 915GM/GMS/910GML Express Graphics Controller
-		103c 099c  nx6110/nc6120
+		103c 099c  NX6110/NC6120
 		1043 1881  GMA 900 915GM Integrated Graphics
-	27a0  Mobile 945GM/PM/GMS/940GML and 945GT Express Memory Controller Hub
-	27a1  Mobile 945GM/PM/GMS/940GML and 945GT Express PCI Express Root Port
-	27a2  Mobile 945GM/GMS/940GML Express Integrated Graphics Controller
-	27a6  Mobile 945GM/GMS/940GML Express Integrated Graphics Controller
+	27a0  Mobile 945GM/PM/GMS, 943/940GML and 945GT Express Memory Controller Hub
+		103c 30a1  NC2400
+		17aa 2017  Thinkpad R60e model 0657
+	27a1  Mobile 945GM/PM/GMS, 943/940GML and 945GT Express PCI Express Root Port
+	27a2  Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller
+		103c 30a1  NC2400
+		17aa 201a  Thinkpad R60e model 0657
+	27a6  Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller
+		103c 30a1  NC2400
+		17aa 201a  Thinkpad R60e model 0657
 	27b0  82801GH (ICH7DH) LPC Interface Bridge
 	27b8  82801GB/GR (ICH7 Family) LPC Interface Bridge
+		107b 5048  E4500
 		8086 544e  DeskTop Board D945GTP
 	27b9  82801GBM (ICH7-M) LPC Interface Bridge
+		103c 30a1  NC2400
+		10f7 8338  Panasonic CF-Y5 laptop
+		17aa 2009  ThinkPad T60/R60 series
 	27bd  82801GHM (ICH7-M DH) LPC Interface Bridge
 	27c0  82801GB/GR/GH (ICH7 Family) Serial ATA Storage Controller IDE
+		107b 5048  E4500
 		8086 544e  DeskTop Board D945GTP
 	27c1  82801GR/GH (ICH7 Family) Serial ATA Storage Controller AHCI
 	27c3  82801GR/GH (ICH7 Family) Serial ATA Storage Controller RAID
 	27c4  82801GBM/GHM (ICH7 Family) Serial ATA Storage Controller IDE
 	27c5  82801GBM/GHM (ICH7 Family) Serial ATA Storage Controller AHCI
+		17aa 200d  Thinkpad R60e model 0657
 	27c6  82801GHM (ICH7-M DH) Serial ATA Storage Controller RAID
 	27c8  82801G (ICH7 Family) USB UHCI #1
+		103c 30a1  NC2400
+		107b 5048  E4500
+		17aa 200a  ThinkPad T60/R60 series
 		8086 544e  DeskTop Board D945GTP
 	27c9  82801G (ICH7 Family) USB UHCI #2
+		103c 30a1  NC2400
+		107b 5048  E4500
+		17aa 200a  ThinkPad T60/R60 series
 		8086 544e  DeskTop Board D945GTP
 	27ca  82801G (ICH7 Family) USB UHCI #3
+		103c 30a1  NC2400
+		107b 5048  E4500
+		17aa 200a  ThinkPad T60/R60 series
 		8086 544e  DeskTop Board D945GTP
 	27cb  82801G (ICH7 Family) USB UHCI #4
+		103c 30a1  NC2400
+		107b 5048  E4500
+		17aa 200a  ThinkPad T60/R60 series
 		8086 544e  DeskTop Board D945GTP
 	27cc  82801G (ICH7 Family) USB2 EHCI Controller
+		103c 30a1  NC2400
+		17aa 200b  ThinkPad T60/R60 series
 		8086 544e  DeskTop Board D945GTP
 	27d0  82801G (ICH7 Family) PCI Express Port 1
 	27d2  82801G (ICH7 Family) PCI Express Port 2
 	27d4  82801G (ICH7 Family) PCI Express Port 3
 	27d6  82801G (ICH7 Family) PCI Express Port 4
 	27d8  82801G (ICH7 Family) High Definition Audio Controller
+		103c 30a1  NC2400
+		107b 5048  E4500
+		10f7 8338  Panasonic CF-Y5 laptop
+		1179 ff31  AC97 Data Fax SoftModem with SmartCP
+		152d 0753  Softmodem
+		1734 10ad  Conexant softmodem SmartCP
+		17aa 2010  ThinkPad T60/R60 series
 	27da  82801G (ICH7 Family) SMBus Controller
+		10f7 8338  Panasonic CF-Y5 laptop
+		17aa 200f  ThinkPad T60/R60 series
 		8086 544e  DeskTop Board D945GTP
 	27dc  82801G (ICH7 Family) LAN Controller
 		8086 308d  DeskTop Board D945GTP
 	27dd  82801G (ICH7 Family) AC'97 Modem Controller
 	27de  82801G (ICH7 Family) AC'97 Audio Controller
 	27df  82801G (ICH7 Family) IDE Controller
+		103c 30a1  NC2400
+		107b 5048  E4500
+		10f7 8338  Panasonic CF-Y5 laptop
+		17aa 200c  Thinkpad R60e model 0657
 		8086 544e  DeskTop Board D945GTP
 	27e0  82801GR/GH/GHM (ICH7 Family) PCI Express Port 5
 	27e2  82801GR/GH/GHM (ICH7 Family) PCI Express Port 6
-	2810  LPC Interface Controller
+	2810  82801HB/HR (ICH8/R) LPC Interface Controller
 	2811  Mobile LPC Interface Controller
-	2812  LPC Interface Controller
-	2814  LPC Interface Controller
+	2812  82801HH (ICH8DH) LPC Interface Controller
+	2814  82801HO (ICH8DO) LPC Interface Controller
 	2815  Mobile LPC Interface Controller
-	2820  SATA Controller 1 IDE
-	2821  SATA Controller AHCI
-	2822  SATA Controller RAID
-	2824  SATA Controller AHCI
-	2825  SATA Controller 2 IDE
-	2828  Mobile SATA Controller IDE
-	2829  Mobile SATA Controller AHCI
-	282a  Mobile SATA Controller RAID
-	2830  USB UHCI Controller #1
-	2831  USB UHCI Controller #2
-	2832  USB UHCI Controller #3
-	2834  USB UHCI Controller #4
-	2835  USB UHCI Controller #5
-	2836  USB2 EHCI Controller #1
-	283a  USB2 EHCI Controller #2
-	283e  SMBus Controller
-	283f  PCI Express Port 1
-	2841  PCI Express Port 2
-	2843  PCI Express Port 3
-	2845  PCI Express Port 4
-	2847  PCI Express Port 5
-	2849  PCI Express Port 6
-	284b  HD Audio Controller
-	284f  Thermal Subsystem
+	2820  82801H (ICH8 Family) 4 port SATA IDE Controller
+		1462 7235  P965 Neo MS-7235 mainboard
+	2821  82801HR/HO/HH (ICH8R/DO/DH) 6 port SATA AHCI Controller
+	2822  82801 SATA RAID Controller
+	2824  82801HB (ICH8) 4 port SATA AHCI Controller
+	2825  82801H (ICH8 Family) 2 port SATA IDE Controller
+		1462 7235  P965 Neo MS-7235 mainboard
+	2828  Mobile SATA IDE Controller
+	2829  Mobile SATA AHCI Controller
+	282a  Mobile SATA RAID Controller
+	2830  82801H (ICH8 Family) USB UHCI #1
+		1462 7235  P965 Neo MS-7235 mainboard
+	2831  82801H (ICH8 Family) USB UHCI #2
+		1462 7235  P965 Neo MS-7235 mainboard
+	2832  82801H (ICH8 Family) USB UHCI #3
+	2834  82801H (ICH8 Family) USB UHCI #4
+		1462 7235  P965 Neo MS-7235 mainboard
+	2835  82801H (ICH8 Family) USB UHCI #5
+	2836  82801H (ICH8 Family) USB2 EHCI #1
+		1462 7235  P965 Neo MS-7235 mainboard
+	283a  82801H (ICH8 Family) USB2 EHCI #2
+	283e  82801H (ICH8 Family) SMBus Controller
+		1462 7235  P965 Neo MS-7235 mainboard
+	283f  82801H (ICH8 Family) PCI Express Port 1
+	2841  82801H (ICH8 Family) PCI Express Port 2
+	2843  82801H (ICH8 Family) PCI Express Port 3
+	2845  82801H (ICH8 Family) PCI Express Port 4
+	2847  82801H (ICH8 Family) PCI Express Port 5
+	2849  82801H (ICH8 Family) PCI Express Port 6
+	284b  82801H (ICH8 Family) HD Audio Controller
+	284f  82801H (ICH8 Family) Thermal Reporting Device
 	2850  Mobile IDE Controller
-	2970  Memory Controller Hub
-	2971  PCI Express Root Port
-	2972  Integrated Graphics Controller
-	2973  Integrated Graphics Controller
-	2974  HECI Controller
-	2976  PT IDER Controller
-	2977  KT Controller
-	2990  Memory Controller Hub
-	2991  PCI Express Root Port
-	2992  Integrated Graphics Controller
-	2993  Integrated Graphics Controller
-	2994  HECI Controller
-	2995  HECI Controller
-	2996  PT IDER Controller
-	2997  KT Controller
-	29a0  Memory Controller Hub
-	29a1  PCI Express Root Port
-	29a2  Integrated Graphics Controller
-	29a3  Integrated Graphics Controller
-	29a4  HECI Controller
-	29a5  HECI Controller
-	29a6  PT IDER Controller
-	29a7  KT Controller
+	2910  LPC Interface Controller
+	2911  LPC Interface Controller
+	2912  LPC Interface Controller
+	2914  LPC Interface Controller
+	2916  LPC Interface Controller
+	2918  LPC Interface Controller
+	2920  4 port SATA IDE Controller
+	2921  2 port SATA IDE Controller
+	2922  6 port SATA AHCI Controller
+	2923  4 port SATA AHCI Controller
+	2925  SATA RAID Controller
+	2926  2 port SATA IDE Controller
+	2928  Mobile 2 port SATA IDE Controller
+	292d  Mobile 2 port SATA IDE Controller
+	292e  Mobile 1 port SATA IDE Controller
+	2930  SMBus Controller
+	2932  Thermal Subsystem
+	2934  USB UHCI Controller #1
+	2935  USB UHCI Controller #2
+	2936  USB UHCI Controller #3
+	2937  USB UHCI Controller #4
+	2938  USB UHCI Controller #5
+	2939  USB UHCI Controller #6
+	293a  USB2 EHCI Controller #1
+	293c  USB2 EHCI Controller #2
+	293e  HD Audio Controller
+	2940  PCI Express Port 1
+	2942  PCI Express Port 2
+	2944  PCI Express Port 3
+	2946  PCI Express Port 4
+	2948  PCI Express Port 5
+	294a  PCI Express Port 6
+	294c  Gigabit Ethernet Controller
+	2970  82946GZ/PL/GL Memory Controller Hub
+	2971  82946GZ/PL/GL PCI Express Root Port
+	2972  82946GZ/GL Integrated Graphics Controller
+	2973  82946GZ/GL Integrated Graphics Controller
+	2974  82946GZ/GL HECI Controller
+	2975  82946GZ/GL HECI Controller
+	2976  82946GZ/GL PT IDER Controller
+	2977  82946GZ/GL KT Controller
+	2980  965 G1 Memory Controller Hub
+	2981  965 G1 PCI Express Root Port
+	2982  965 G1 Integrated Graphics Controller
+	2990  82Q963/Q965 Memory Controller Hub
+	2991  82Q963/Q965 PCI Express Root Port
+	2992  82Q963/Q965 Integrated Graphics Controller
+	2993  82Q963/Q965 Integrated Graphics Controller
+	2994  82Q963/Q965 HECI Controller
+	2995  82Q963/Q965 HECI Controller
+	2996  82Q963/Q965 PT IDER Controller
+	2997  82Q963/Q965 KT Controller
+	29a0  82P965/G965 Memory Controller Hub
+	29a1  82P965/G965 PCI Express Root Port
+	29a2  82G965 Integrated Graphics Controller
+	29a3  82G965 Integrated Graphics Controller
+	29a4  82P965/G965 HECI Controller
+	29a5  82P965/G965 HECI Controller
+	29a6  82P965/G965 PT IDER Controller
+	29a7  82P965/G965 KT Controller
+	29b0  DRAM Controller
+	29b1  PCI Express Root Port
+	29b2  Integrated Graphics Controller
+	29b3  Integrated Graphics Controller
+	29b4  HECI Controller
+	29b5  HECI Controller
+	29b6  PT IDER Controller
+	29b7  Serial KT Controller
+	29c0  DRAM Controller
+	29c1  PCI Express Root Port
+	29c2  Integrated Graphics Controller
+	29c3  Integrated Graphics Controller
+	29c4  HECI Controller
+	29c5  HECI Controller
+	29c6  PT IDER Controller
+	29c7  Serial KT Controller
+	29cf  Virtual HECI Controller
+	29d0  DRAM Controller
+	29d1  PCI Express Root Port
+	29d2  Integrated Graphics Controller
+	29d3  Integrated Graphics Controller
+	29d4  HECI Controller
+	29d5  HECI Controller
+	29d6  PT IDER Controller
+	29d7  Serial KT Controller
+	29e0  DRAM Controller
+	29e1  Host-Primary PCI Express Bridge
+	29e4  HECI Controller
+	29e5  HECI Controller
+	29e6  PT IDER Controller
+	29e7  Serial KT Controller
+	29e9  Host-Secondary PCI Express Bridge
+	29f0  Server DRAM Controller
+	29f1  Server Host-Primary PCI Express Bridge
+	29f4  Server HECI Controller
+	29f5  Server HECI Controller
+	29f6  Server PT IDER Controller
+	29f7  Server Serial KT Controller
+	29f9  Server Host-Secondary PCI Express Bridge
+	2a00  Mobile Memory Controller Hub
+	2a01  Mobile PCI Express Root Port
+	2a02  Mobile Integrated Graphics Controller
+	2a03  Mobile Integrated Graphics Controller
+	2a04  Mobile HECI Controller
+	2a05  Mobile HECI Controller
+	2a06  Mobile PT IDER Controller
+	2a07  Mobile KT Controller
 	3092  Integrated RAID
 	3200  GD31244 PCI-X SATA HBA
+		1775 c200  C2K onboard SATA host bus adapter
 	3340  82855PM Processor to I/O Controller
+		1014 0529  Thinkpad T41
 		1025 005a  TravelMate 290
-		103c 088c  nc8000 laptop
-		103c 0890  nc6000 laptop
+		103c 088c  NC8000 laptop
+		103c 0890  NC6000 laptop
+		103c 08b0  tc1100 tablet
+		144d c00c  P30/P35 notebook
 	3341  82855PM Processor to AGP Controller
-	3500  Enterprise Southbridge PCI Express Upstream Port
-	3501  Enterprise Southbridge PCI Express Upstream Port
-	3504  Enterprise Southbridge IOxAPIC
-	3505  Enterprise Southbridge IOxAPIC
-	350c  Enterprise Southbridge PCI Express to PCI-X Bridge
-	350d  Enterprise Southbridge PCI Express to PCI-X Bridge
-	3510  Enterprise Southbridge PCI Express Downstream Port E1
-	3511  Enterprise Southbridge PCI Express Downstream Port E1
-	3514  Enterprise Southbridge PCI Express Downstream Port E2
-	3515  Enterprise Southbridge PCI Express Downstream Port E2
-	3518  Enterprise Southbridge PCI Express Downstream Port E3
-	3519  Enterprise Southbridge PCI Express Downstream Port E3
+		144d c00c  P30 notebook
+	3500  6311ESB/6321ESB PCI Express Upstream Port
+	3501  6310ESB PCI Express Upstream Port
+	3504  6311ESB/6321ESB I/OxAPIC Interrupt Controller
+	3505  6310ESB I/OxAPIC Interrupt Controller
+	350c  6311ESB/6321ESB PCI Express to PCI-X Bridge
+	350d  6310ESB PCI Express to PCI-X Bridge
+	3510  6311ESB/6321ESB PCI Express Downstream Port E1
+	3511  6310ESB PCI Express Downstream Port E1
+	3514  6311ESB/6321ESB PCI Express Downstream Port E2
+	3515  6310ESB PCI Express Downstream Port E2
+	3518  6311ESB/6321ESB PCI Express Downstream Port E3
+	3519  6310ESB PCI Express Downstream Port E3
 	3575  82830 830 Chipset Host Bridge
 		0e11 0030  Evo N600c
 		1014 021d  ThinkPad A/T/X Series
@@ -10949,31 +12429,47 @@
 		1014 0513  ThinkPad A/T/X Series
 	3578  82830 830 Chipset Host Bridge
 	3580  82852/82855 GM/GME/PM/GMV Processor to I/O Controller
+		1014 055c  Thinkpad R50e model 1634
 		1028 0139  Latitude D400
 		1028 0163  Latitude D505
 		1028 0196  Inspiron 5160
 		1734 1055  Amilo M1420
+		1775 10d0  V5D Single Board Computer
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 		4c53 10e0  PSL09 PrPMC
+		e4bf 0cc9  CC9-SAMBA
+		e4bf 0cd2  CD2-BEBOP
 	3581  82852/82855 GM/GME/PM/GMV Processor to AGP Controller
 		1734 1055  Amilo M1420
 	3582  82852/855GM Integrated Graphics Device
+		1014 0562  Thinkpad R50e model 1634
 		1028 0139  Latitude D400
 		1028 0163  Latitude D505
+		1775 10d0  V5D Single Board Computer VGA
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 		4c53 10e0  PSL09 PrPMC
+		e4bf 0cc9  CC9-SAMBA
+		e4bf 0cd2  CD2-BEBOP
 	3584  82852/82855 GM/GME/PM/GMV Processor to I/O Controller
+		1014 055d  Thinkpad R50e model 1634
 		1028 0139  Latitude D400
 		1028 0163  Latitude D505
 		1028 0196  Inspiron 5160
 		1734 1055  Amilo M1420
+		1775 10d0  V5D Single Board Computer
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 		4c53 10e0  PSL09 PrPMC
 	3585  82852/82855 GM/GME/PM/GMV Processor to I/O Controller
+		1014 055e  Thinkpad R50e model 1634
 		1028 0139  Latitude D400
 		1028 0163  Latitude D505
 		1028 0196  Inspiron 5160
 		1734 1055  Amilo M1420
+		1775 10d0  V5D Single Board Computer
+		1775 ce90  CE9
 		4c53 10b0  CL9 mainboard
 		4c53 10e0  PSL09 PrPMC
 	3590  E7520 Memory Controller Hub
@@ -10996,19 +12492,80 @@
 	359b  E7525/E7520/E7320 Extended Configuration Registers
 	359e  E7525 Memory Controller Hub
 		1028 0169  Precision 470
+	35b0  3100 Chipset Memory I/O Controller Hub
+	35b1  3100 DRAM Controller Error Reporting Registers
+	35b5  3100 Chipset Enhanced DMA Controller
+	35b6  3100 Chipset PCI Express Port A
+	35b7  3100 Chipset PCI Express Port A1
+	35c8  3100 Extended Configuration Test Overflow Registers
+	3600  Server Memory Controller Hub
+	3604  Server PCI Express Port 1
+	3605  Server PCI Express Port 2
+	3606  Server PCI Express Port 3
+	3607  Server PCI Express Port 4
+	3608  Server PCI Express Port 5
+	3609  Server PCI Express Port 6
+	360a  Server PCI Express Port 7
+	360b  Server IOAT DMA Controller
+	360c  Server FSB Registers
+	360d  Server Snoop Filter Registers
+	360e  Server Reserved Registers
+	360f  Server FBD Branch 0 Registers
+	3610  Server FBD Branch 1 Registers
+	4000  Memory Controller Hub
+	4008  Memory Controller Hub
+	4010  Memory Controller Hub
+	4021  PCI Express Port 1
+	4022  PCI Express Port 2
+	4023  PCI Express Port 3
+	4024  PCI Express Port 4
+	4025  PCI Express Port 5
+	4026  PCI Express Port 6
+	4027  PCI Express Port 7
+	4028  PCI Express Port 8
+	4029  PCI Express Port 9
+	402d  IBIST Registers
+	402e  IBIST Registers
+	402f  DMA/DCA Engine
+	4030  FSB Registers
+	4032  I/OxAPIC
+	4035  FBD Registers
+	4036  FBD Registers
 	4220  PRO/Wireless 2200BG Network Connection
+		2731 8086  WLAN-Adapter
+		8086 2731  Samsung P35 integrated WLAN
 	4222  PRO/Wireless 3945ABG Network Connection
 		8086 1005  PRO/Wireless 3945BG Network Connection
 		8086 1034  PRO/Wireless 3945BG Network Connection
 		8086 1044  PRO/Wireless 3945BG Network Connection
 	4223  PRO/Wireless 2915ABG Network Connection
+		1351 103c  Compaq NC6220
 	4224  PRO/Wireless 2915ABG Network Connection
 	4227  PRO/Wireless 3945ABG Network Connection
+		8086 1011  Thinkpad  X60s, R60e model 0657
 		8086 1014  PRO/Wireless 3945BG Network Connection
+	5001  Pro/DSL 2100 Modem
 	5200  EtherExpress PRO/100 Intelligent Server
 	5201  EtherExpress PRO/100 Intelligent Server
 		8086 0001  EtherExpress PRO/100 Server Ethernet Adapter
 	530d  80310 IOP [IO Processor]
+	65c0  Memory Controller Hub
+	65e2  PCI Express x4 Port 2
+	65e3  PCI Express x4 Port 3
+	65e4  PCI Express x4 Port 4
+	65e5  PCI Express x4 Port 5
+	65e6  PCI Express x4 Port 6
+	65e7  PCI Express x4 Port 7
+	65f0  FSB Registers
+	65f1  Reserved Registers
+	65f3  Reserved Registers
+	65f5  DDR Channel 0 Registers
+	65f6  DDR Channel 1 Registers
+	65f7  PCI Express x8 Port 2-3
+	65f8  PCI Express x8 Port 4-5
+	65f9  PCI Express x8 Port 6-7
+	65fa  PCI Express x16 Port 4-7
+	65ff  DMA Engine
 	7000  82371SB PIIX3 ISA [Natoma/Triton II]
 	7010  82371SB PIIX3 IDE [Natoma/Triton II]
 	7020  82371SB PIIX3 USB [Natoma/Triton II]
@@ -11043,11 +12600,13 @@
 	7190  440BX/ZX/DX - 82443BX/ZX/DX Host bridge
 		0e11 0500  Armada 1750 Laptop System Chipset
 		0e11 b110  Armada M700/E500
+		1028 008e  PowerEdge 1300 mainboard
 		1179 0001  Toshiba Tecra 8100 Laptop System Chipset
 		15ad 1976  virtualHW v3
 		4c53 1050  CT7 mainboard
 		4c53 1051  CE7 mainboard
 	7191  440BX/ZX/DX - 82443BX/ZX/DX AGP bridge
+		1028 008e  PowerEdge 1300 mainboard
 	7192  440BX/ZX/DX - 82443BX/ZX/DX Host bridge (AGP disabled)
 		0e11 0460  Armada 1700 Laptop System Chipset
 		4c53 1000  CC7/CR7/CP7/VC7/VP7/VR7 mainboard
@@ -11082,6 +12641,7 @@
 		10b4 202f  Lightspeed 740
 		8086 0000  Terminator 2x/i
 		8086 0100  Intel740 Graphics Accelerator
+	8002  Trusted Execution Technology Registers
 	84c4  450KX/GX [Orion] - 82454KX/GX PCI bridge
 	84c5  450KX/GX [Orion] - 82453KX/GX Memory controller
 	84ca  450NX - 82451NX Memory & I/O Controller
@@ -11093,7 +12653,7 @@
 	84e4  460GX - 84460GX Memory Data Controller (MDC)
 	84e6  460GX - 82466GX Wide and fast PCI eXpander Bridge (WXB)
 	84ea  460GX - 84460GX AGP Bridge (GXB function 1)
-	8500  IXP4XX Intel Network Processor (IXP420/421/422/425/IXC1100)
+	8500  IXP4XX Network Processor (IXP420/421/422/425/IXC1100)
 		1993 0ded  mGuard-PCI AV#2
 		1993 0dee  mGuard-PCI AV#1
 		1993 0def  mGuard-PCI AV#0
@@ -11105,15 +12665,27 @@
 	9622  Integrated RAID
 	9641  Integrated RAID
 	96a1  Integrated RAID
+	a620  6400/6402 Advanced Memory Buffer (AMB)
 	b152  21152 PCI-to-PCI Bridge
 # observed, and documented in Intel revision note; new mask of 1011:0026
 	b154  21154 PCI-to-PCI Bridge
 	b555  21555 Non transparent PCI-to-PCI Bridge
+		12c7 5005  SS7HD PCI Adaptor Card
+		12c7 5006  SS7HDC cPCI Adaptor Card
 		12d9 000a  PCI VoIP Gateway
 		4c53 1050  CT7 mainboard
 		4c53 1051  CE7 mainboard
 		e4bf 1000  CC8-1-BLUES
+80ee  InnoTek Systemberatung GmbH
+	beef  VirtualBox Graphics Adapter
+	cafe  VirtualBox Guest Service
+8384  Sigmatel
+	7618  High Definition Audio Codec
+	7670  9770 High Definition Audio
+	7672  9772 High Definition Audio
 8401  TRENDware International Inc.
+8686  ScaleMP
+	1010  vSMPowered system controller [vSMP CTL]
 8800  Trigem Computer Inc.
 	2008  Video assistent component
 8866  T-Square Design Inc.
@@ -11273,6 +12845,8 @@
 	008f  AIC-7892P U160/m
 		1179 0001  Magnia Z310
 		15d9 9005  Onboard SCSI Host Adapter
+	0092  AVC-2010 [VideoH!]
+	0093  AVC-2410 [VideoH!]
 	00c0  AHA-3960D / AIC-7899A U160/m
 		0e11 f620  Compaq 64-Bit/66MHz Dual Channel Wide Ultra3 SCSI Adapter
 		9005 f620  AHA-3960D U160/m
@@ -11309,8 +12883,10 @@
 		9005 0287  2200S (Vulcan-2m)
 		9005 0288  3230S (Harrier)
 		9005 0289  3240S (Tornado)
-		9005 028a  ASR-2020S PCI-X ZCR (Skyhawk)
-		9005 028b  ASR-2025S (Terminator)
+# Some early versions reported 2020S
+		9005 028a  ASR-2020ZCR
+# Some early versions reported 2025S
+		9005 028b  ASR-2025ZCR (Terminator)
 		9005 028e  ASR-2020SA (Skyhawk)
 		9005 028f  ASR-2025SA
 		9005 0290  AAR-2410SA PCI SATA 4ch (Jaguar II)
@@ -11319,10 +12895,33 @@
 		9005 0294  ESD SO-DIMM PCI-X SATA ZCR (Prowler)
 		9005 0296  ASR-2240S
 		9005 0297  ASR-4005SAS
-		9005 0298  ASR-4000SAS
+		9005 0298  ASR-4000
 		9005 0299  ASR-4800SAS
-		9005 029a  ASR-4805SAS
+		9005 029a  4805SAS
+		9005 02a4  ICP ICP9085LI
+		9005 02a5  ICP ICP5085BR
+		9005 02b5  ASR5800
+		9005 02b6  ASR5805
+		9005 02b7  ASR5808
+		9005 02b8  ICP5445SL
+		9005 02b9  ICP5085SL
+		9005 02ba  ICP5805SL
+		9005 02bb  3405
+		9005 02bc  3805
+		9005 02bd  31205
+		9005 02be  31605
+		9005 02bf  ICP ICP5045BL
+		9005 02c0  ICP ICP5085BL
+		9005 02c1  ICP ICP5125BR
+		9005 02c2  ICP ICP5165BR
+		9005 02c3  51205
+		9005 02c4  51605
+		9005 02c5  ICP ICP5125SL
+		9005 02c6  ICP ICP5165SL
+		9005 02c7  3085
+		9005 02c8  ICP5805BL
 	0286  AAC-RAID (Rocket)
+		1014 034d  8s
 		1014 9540  ServeRAID 8k/8k-l4
 		1014 9580  ServeRAID 8k/8k-l8
 		9005 028c  ASR-2230S + ASR-2230SLP PCI-X (Lancer)
@@ -11334,16 +12933,34 @@
 		9005 029f  ICP ICP9014R0
 		9005 02a0  ICP ICP9047MA
 		9005 02a1  ICP ICP9087MA
-		9005 02a2  ASR-4810SAS
-		9005 02a3  ICP ICP5085AU
-		9005 02a4  ICP ICP5085LI
+		9005 02a2  3800
+		9005 02a3  ICP ICP5445AU
+		9005 02a4  ICP ICP9085LI
 		9005 02a5  ICP ICP5085BR
 		9005 02a6  ICP9067MA
-		9005 02a7  AAR-2830SA
-		9005 02a8  AAR-2430SA
-		9005 02a9  ICP5087AU
-		9005 02aa  ICP5047AU
+		9005 02a7  3805
+		9005 02a8  3400
+		9005 02a9  ICP ICP5085AU
+		9005 02aa  ICP ICP5045AU
+		9005 02ac  1800
+		9005 02b3  2400
+		9005 02b4  ICP ICP5045AL
 		9005 0800  Callisto
+	0410  AIC-9410W SAS (Razor HBA RAID)
+		9005 0410  ASC-48300(Spirit RAID)
+		9005 0411  ASC-58300 (Oakmont RAID)
+	0412  AIC-9410W SAS (Razor HBA non-RAID)
+		9005 0412  ASC-48300 (Spirit non-RAID)
+		9005 0413  ASC-58300 (Oakmont non-RAID)
+	041e  AIC-9410W SAS (Razor ASIC non-RAID)
+	041f  AIC-9410W SAS (Razor ASIC RAID)
+		9005 041f  AIC-9410W SAS (Razor ASIC RAID)
+	0430  AIC-9405W SAS (Razor-Lite HBA RAID)
+		9005 0430  ASC-44300 (Spirit-Lite RAID)
+	0432  AIC-9405W SAS (Razor-Lite HBA non-RAID)
+		9005 0432  ASC-44300 (Spirit-Lite non-RAID)
+	043e  AIC-9405W SAS (Razor-Lite ASIC non-RAID)
+	043f  AIC-9405W SAS (Razor-Lite ASIC RAID)
 	0500  Obsidian chipset SCSI controller
 		1014 02c1  PCI-X DDR 3Gb SAS Adapter (572A/572C)
 		1014 02c2  PCI-X DDR 3Gb SAS RAID Adapter (572B/572D)
@@ -11364,6 +12981,8 @@
 	8015  ASC-39320B U320
 	8016  ASC-39320A U320
 	8017  ASC-29320ALP U320
+		9005 0044  ASC-29320ALP PCIx U320
+		9005 0045  ASC-29320LPE PCIe U320
 	801c  ASC-39320D U320
 	801d  AIC-7902B U320
 	801e  AIC-7901A U320
@@ -11421,7 +13040,10 @@
 aecb  Adrienne Electronics Corporation
 	6250  VITC/LTC Timecode Reader card [PCI-VLTC/RDR]
 affe  Sirrix AG security technologies
+	02e1  PCI2E1 2-port ISDN E1 interface
 	dead  Sirrix.PCI4S0 4-port ISDN S0 interface
+# Not registered officially
+b10b  Uakron PCI Project
 b1b3  Shiva Europe Limited
 # Pinnacle should be 11bd, but they got it wrong several times --mj
 bd11  Pinnacle Systems, Inc. (Wrong ID)
@@ -11433,14 +13055,17 @@
 cafe  Chrysalis-ITS
 	0003  Luna K3 Hardware Security Module
 cccc  Catapult Communications
+ccec  Curtiss-Wright Controls Embedded Computing
 cddd  Tyzx, Inc.
 	0101  DeepSea 1 High Speed Stereo Vision Frame Grabber
 	0200  DeepSea 2 High Speed Stereo Vision Frame Grabber
 d161  Digium, Inc.
 	0205  Wildcard TE205P
 	0210  Wildcard TE210P
-	0405  Wildcard TE405P (2nd Gen)
-	0410  Wildcard TE410P (2nd Gen)
+	0405  Wildcard TE405P Quad-Span togglable E1/T1/J1 card 5.0v
+	0406  Wildcard TE406P Quad-Span togglable E1/T1/J1 echo cancellation card 5.0v
+	0410  Wildcard TE410P Quad-Span togglable E1/T1/J1 card 3.3v
+	0411  Wildcard TE411P Quad-Span togglable E1/T1/J1 echo cancellation card 3.3v
 	2400  Wildcard TDM2400P
 d4d4  Dy4 Systems Inc
 	0601  PCI Mezzanine Card
@@ -11458,14 +13083,9 @@
 		0059 0001  128k ISDN-S/T Adapter
 		0059 0003  128k ISDN-U Adapter
 		00a7 0001  TELES.S0/PCI 2.x ISDN Adapter
-		6159 0001  Digium Wildcard T100P T1/PRI
-		79fe 0001  Digium Wildcard TE110P T1/E1 Interface
 		8086 0003  Digium X100P/X101P analogue PSTN FXO interface
-		b1b9 0001  Digium Wildcard TDM400P REV I 4-port POTS interface
-		b1b9 0003  Digium Wildcard TDM400P REV I 4-port POTS interface
 	0002  Tiger100APC ISDN chipset
 e4bf  EKF Elektronik GmbH
-# Innovative and scalable network IC vendor
 e55e  Essence Technology, Inc.
 ea01  Eagle Technology
 	000a  PCI-773 Temperature Card
Index: xc/programs/Xserver/hw/xfree86/etc/scanpci.c
diff -u xc/programs/Xserver/hw/xfree86/etc/scanpci.c:3.94 xc/programs/Xserver/hw/xfree86/etc/scanpci.c:3.99
--- xc/programs/Xserver/hw/xfree86/etc/scanpci.c:3.94	Fri Oct 14 11:16:51 2005
+++ xc/programs/Xserver/hw/xfree86/etc/scanpci.c	Wed May 30 11:50:40 2007
@@ -23,7 +23,7 @@
  * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/scanpci.c,v 3.94 2005/10/14 15:16:51 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/etc/scanpci.c,v 3.99 2007/05/30 15:50:40 tsi Exp $ */
 
 #include <X11/X.h>
 #include "os.h"
@@ -54,17 +54,16 @@
 
 static void usage(void);
 static void identify_card(pciConfigPtr pcr, int verbose);
-static void print_default_class(pciConfigPtr pcr);
-static void print_bridge_pci_class(pciConfigPtr pcr);
-static void print_mach64(pciConfigPtr pcr);
-static void print_i128(pciConfigPtr pcr);
-static void print_dc21050(pciConfigPtr pcr);
+static void dump_config(pciConfigPtr pcr, int verbose);
+static void print_header_type_0(pciConfigPtr pcr);
+static void print_header_type_1(pciConfigPtr pcr);
+static void print_header_type_2(pciConfigPtr pcr);
 static void print_simba(pciConfigPtr pcr);
 static void print_460gx_sac(pciConfigPtr pcr);
 static void print_460gx_pxb(pciConfigPtr pcr);
 static void print_460gx_gxb(pciConfigPtr pcr);
 
-#define MAX_DEV_PER_VENDOR 40
+#define MAX_DEV_PER_VENDOR 8
 
 typedef struct {
     unsigned int Vendor;
@@ -75,51 +74,6 @@
 } pciVendorDevFuncInfo;
 
 static pciVendorDevFuncInfo vendorDeviceFuncInfo[] = {
-    { PCI_VENDOR_ATI, {
-	{ PCI_CHIP_MACH64CT, print_mach64 },
-	{ PCI_CHIP_MACH64CX, print_mach64 },
-	{ PCI_CHIP_MACH64ET, print_mach64 },
-	{ PCI_CHIP_MACH64GB, print_mach64 },
-	{ PCI_CHIP_MACH64GD, print_mach64 },
-	{ PCI_CHIP_MACH64GI, print_mach64 },
-	{ PCI_CHIP_MACH64GL, print_mach64 },
-	{ PCI_CHIP_MACH64GM, print_mach64 },
-	{ PCI_CHIP_MACH64GN, print_mach64 },
-	{ PCI_CHIP_MACH64GO, print_mach64 },
-	{ PCI_CHIP_MACH64GP, print_mach64 },
-	{ PCI_CHIP_MACH64GQ, print_mach64 },
-	{ PCI_CHIP_MACH64GR, print_mach64 },
-	{ PCI_CHIP_MACH64GS, print_mach64 },
-	{ PCI_CHIP_MACH64GT, print_mach64 },
-	{ PCI_CHIP_MACH64GU, print_mach64 },
-	{ PCI_CHIP_MACH64GV, print_mach64 },
-	{ PCI_CHIP_MACH64GW, print_mach64 },
-	{ PCI_CHIP_MACH64GX, print_mach64 },
-	{ PCI_CHIP_MACH64GY, print_mach64 },
-	{ PCI_CHIP_MACH64GZ, print_mach64 },
-	{ PCI_CHIP_MACH64LB, print_mach64 },
-	{ PCI_CHIP_MACH64LD, print_mach64 },
-	{ PCI_CHIP_MACH64LG, print_mach64 },
-	{ PCI_CHIP_MACH64LI, print_mach64 },
-	{ PCI_CHIP_MACH64LM, print_mach64 },
-	{ PCI_CHIP_MACH64LN, print_mach64 },
-	{ PCI_CHIP_MACH64LP, print_mach64 },
-	{ PCI_CHIP_MACH64LQ, print_mach64 },
-	{ PCI_CHIP_MACH64LR, print_mach64 },
-	{ PCI_CHIP_MACH64LS, print_mach64 },
-	{ PCI_CHIP_MACH64VT, print_mach64 },
-	{ PCI_CHIP_MACH64VU, print_mach64 },
-	{ PCI_CHIP_MACH64VV, print_mach64 },
-	{ 0x0000,  NULL } } },
-    { PCI_VENDOR_DIGITAL, {
-	{ PCI_CHIP_DC21050, print_dc21050},
-	{ 0x0000, NULL } } },
-    { PCI_VENDOR_NUMNINE, {
-	{ PCI_CHIP_I128, print_i128 },
-	{ PCI_CHIP_I128_2, print_i128 },
-	{ PCI_CHIP_I128_T2R, print_i128 },
-	{ PCI_CHIP_I128_T2R4, print_i128 },
-	{ 0x0000, NULL } } },
     { PCI_VENDOR_SUN, {
 	{ PCI_CHIP_SIMBA, print_simba },
 	{ 0x0000, NULL } } },
@@ -137,7 +91,8 @@
 usage(void)
 {
     printf("Usage: scanpci [-v12OfV]\n");
-    printf("           -v print config space\n");
+    printf("           -v print config space verbosely\n");
+    printf("           -x print config space in hexadecimal\n");
     printf("           -1 config type 1\n");
     printf("           -2 config type 2\n");
     printf("           -O use OS config support\n");
@@ -149,14 +104,11 @@
 main(int argc, char *argv[])
 {
     pciConfigPtr pPCI, *pcrpp = NULL;
-    int Verbose = 0;
-    int i = 0;
-    int force = 0;
-    int c;
+    int Verbose = 0, force = 0, dump = 0, i = 0, c;
 
     xf86Info.pciFlags = PCIProbe1;
 
-    while ((c = getopt(argc, argv, "?v12OfV:")) != -1)
+    while ((c = getopt(argc, argv, "?v12OfdxaV:")) != -1)
 	switch(c) {
 	case 'v':
 	    Verbose++;
@@ -176,6 +128,13 @@
 	case 'V':
 	    xf86Verbose = atoi(optarg);
 	    break;
+	case 'd':
+	case 'x':
+	    dump++;
+	    break;
+	case 'a':	/* Not documented */
+	    xf86Info.estimateSizesAggressively++;
+	    break;
 	case '?':
 	default:
 	    usage();
@@ -204,8 +163,11 @@
 	exit (1);
     }
 
-    while ((pPCI = pcrpp[i++]))
+    while ((pPCI = pcrpp[i++])) {
 	identify_card(pPCI, Verbose);
+	if (dump)
+	    dump_config(pPCI, dump);
+    }
 
     if (Verbose > 1) {
 	printf("\nPCI bus linkages:\n\n");
@@ -262,27 +224,19 @@
 
     if (!foundit)
 	printf(" Device unknown\n");
-    else {
+    else
 	printf("\n");
-	if (verbose) {
-	    for (i = 0;  vdf[i].Vendor;  i++) {
-		if (vdf[i].Vendor == pcr->pci_vendor) {
-		    for (j = 0;  vdf[i].Device[j].DeviceID;  j++) {
-			if (vdf[i].Device[j].DeviceID == pcr->pci_device) {
-			    (*vdf[i].Device[j].func)(pcr);
-			    return;
-			}
-		    }
-		    break;
-		}
-	    }
-	}
-    }
 
-    if (verbose && !(pcr->pci_header_type & 0x7f) &&
-	(pcr->pci_subsys_vendor != 0 || pcr->pci_subsys_card != 0) &&
-	(pcr->pci_vendor != pcr->pci_subsys_vendor ||
-	 pcr->pci_device != pcr->pci_subsys_card)) {
+    if (verbose <= 0)
+	return;
+
+    if (!(pcr->pci_header_type & 0x7f) &&
+	(((pcr->pci_subsys_vendor != 0) &&
+	  (pcr->pci_subsys_vendor != 0xffffu)) ||
+         ((pcr->pci_subsys_card != 0) &&
+	  (pcr->pci_subsys_card != 0xffffu))) &&
+	((pcr->pci_vendor != pcr->pci_subsys_vendor) ||
+	 (pcr->pci_device != pcr->pci_subsys_card))) {
 	foundit = 0;
 	foundvendor = 0;
 	printf(" CardVendor 0x%04x card 0x%04x",
@@ -306,149 +260,290 @@
 	printf("\n");
     }
 
-    if (verbose) {
-	printf("  STATUS    0x%04x  COMMAND 0x%04x\n",
-	       pcr->pci_status, pcr->pci_command);
-	printf("  CLASS     0x%02x 0x%02x 0x%02x  REVISION 0x%02x\n",
-	       pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
-	       pcr->pci_rev_id);
-	if ((pcr->pci_base_class == PCI_CLASS_BRIDGE) &&
-	    (pcr->pci_sub_class == PCI_SUBCLASS_BRIDGE_PCI))
-	    print_bridge_pci_class(pcr);
-	else
-	    print_default_class(pcr);
+    printf("  STATUS    0x%04x  COMMAND 0x%04x\n",
+	   pcr->pci_status, pcr->pci_command);
+    printf("  CLASS     0x%02x 0x%02x 0x%02x  REVISION 0x%02x\n",
+	   pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
+	   pcr->pci_rev_id);
+    printf("  BIST      0x%02x  HEADER 0x%02x  LATENCY 0x%02x  CACHE 0x%02x\n",
+	   pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer,
+	   pcr->pci_cache_line_size);
+
+    for (i = 0;  vdf[i].Vendor;  i++) {
+	if (vdf[i].Vendor != pcr->pci_vendor)
+	    continue;
+
+	for (j = 0;  vdf[i].Device[j].DeviceID;  j++) {
+	    if (vdf[i].Device[j].DeviceID != pcr->pci_device)
+		continue;
+
+	    (*vdf[i].Device[j].func)(pcr);
+	    return;
+	}
+
+	break;
+    }
+
+    switch (pcr->pci_header_type & 0x7f) {
+    case 0:
+	print_header_type_0(pcr);
+	break;
+
+    case 1:
+	print_header_type_1(pcr);
+	break;
+
+    case 2:
+	print_header_type_2(pcr);
+	break;
+
+    default:
+	printf("  Unknown header type 0x%02x\n", pcr->pci_header_type);
+	break;
     }
 }
 
 static void
-print_default_class(pciConfigPtr pcr)
+dump_config(pciConfigPtr pcr, int verbose)
 {
-    printf("  BIST      0x%02x  HEADER 0x%02x  LATENCY 0x%02x  CACHE 0x%02x\n",
-	   pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer,
-	   pcr->pci_cache_line_size);
-    if (pcr->pci_base0) {
+    int i, limit;
+
+    if ((pcr->pci_header_type & 0x7f) == 2)
+	limit = 32;
+    else
+	limit = 16;
+
+    for (i = 0;  i < limit;  i++) {
+	if (!(i & 3))
+	    printf("    0x%03x: ", i * 4);
+	if (!(i & 1))
+	    printf(" ");
+	/* Always display little-endian */
+	printf(" %02x%02x%02x%02x",
+	       (CARD8)(pcr->cfgspc.dwords[i]),
+	       (CARD8)(pcr->cfgspc.dwords[i] >> 8),
+	       (CARD8)(pcr->cfgspc.dwords[i] >> 16),
+	       (CARD8)(pcr->cfgspc.dwords[i] >> 24));
+	if ((i & 3) == 3)
+	    printf("\n");
+    }
+
+    if (verbose <= 1)
+	return;
+
+    i = limit * 4;
+    if (verbose > 2)
+	limit = 4096;
+    else
+	limit = 256;
+
+    /* Print the rest */
+    for (;  i < limit;  i += 4) {
+	CARD32 pcireg = pciReadLong(pcr->tag, i);
+	if (!(i & 15))
+	    printf("    0x%03x: ", i);
+	if (!(i & 7))
+	    printf(" ");
+	/* Always display little-endian */
+	printf(" %02x%02x%02x%02x",
+	       (CARD8)(pcireg), (CARD8)(pcireg >> 8),
+	       (CARD8)(pcireg >> 16), (CARD8)(pcireg >> 24));
+	if ((i & 15) == 12)
+	    printf("\n");
+    }
+}
+
+static void
+print_header_type_0(pciConfigPtr pcr)
+{
+    if (pcr->basesize[0]) {
 	if ((pcr->pci_base0 & 0x7) == 0x4) {
-	    printf("  BASE0     0x%08x%08x  addr 0x%08x%08x  MEM%s 64BIT\n",
+	    printf("  BASE0     0x%08x%08x  addr 0x%08x%08x",
 		   (int)pcr->pci_base1, (int)pcr->pci_base0,
 		   (int)pcr->pci_base1,
 		   (int)(pcr->pci_base0 &
-			 (pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
-		   (pcr->pci_base0 & 0x8) ? " PREFETCHABLE" :"");
+			 (pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize ",
+		   (pcr->minBasesize & (2 << 0)) ? "" : "estimated ");
+	    if (pcr->basesize[0] < 32)
+		printf("0x%08x", 1 << pcr->basesize[0]);
+	    else
+		printf("0x%08x00000000", 1 << (pcr->basesize[0] - 32));
+	    printf("  MEM%s 64BIT\n",
+		   (pcr->pci_base0 & 0x8) ? " PREFETCHABLE" : "");
 	} else {
-	    printf("  BASE0     0x%08x  addr 0x%08x  %s%s\n",
+	    printf("  BASE0     0x%08x  addr 0x%08x",
 		   (int)pcr->pci_base0,
 		   (int)(pcr->pci_base0 &
-			 (pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
+			 (pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize 0x%08x",
+		   (pcr->minBasesize & (2 << 0)) ? "" : "estimated ",
+		   1 << pcr->basesize[0]);
+	    printf("  %s%s\n",
 		   (pcr->pci_base0 & 0x1) ? "I/O" : "MEM",
-		   ((pcr->pci_base0 & 0x9) == 0x8) ? " PREFETCHABLE" :"");
+		   ((pcr->pci_base0 & 0x9) == 0x8) ? " PREFETCHABLE" : "");
 	}
     }
-    if ((pcr->pci_base1) && ((pcr->pci_base0 & 0x7) != 0x4)) {
+
+    if (pcr->basesize[1]) {
 	if ((pcr->pci_base1 & 0x7) == 0x4) {
-	    printf("  BASE1     0x%08x%08x  addr 0x%08x%08x  MEM%s 64BIT\n",
+	    printf("  BASE1     0x%08x%08x  addr 0x%08x%08x",
 		   (int)pcr->pci_base2, (int)pcr->pci_base1,
 		   (int)pcr->pci_base2,
 		   (int)(pcr->pci_base1 &
-			 (pcr->pci_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
-		   (pcr->pci_base1 & 0x8) ? " PREFETCHABLE" :"");
+			 (pcr->pci_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize ",
+		   (pcr->minBasesize & (2 << 1)) ? "" : "estimated ");
+	    if (pcr->basesize[1] < 32)
+		printf("0x%08x", 1 << pcr->basesize[1]);
+	    else
+		printf("0x%08x00000000", 1 << (pcr->basesize[1] - 32));
+	    printf("  MEM%s 64BIT\n",
+		   (pcr->pci_base1 & 0x8) ? " PREFETCHABLE" : "");
 	} else {
-	    printf("  BASE1     0x%08x  addr 0x%08x  %s%s\n",
+	    printf("  BASE1     0x%08x  addr 0x%08x",
 		   (int)pcr->pci_base1,
 		   (int)(pcr->pci_base1 &
-			 (pcr->pci_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
+			 (pcr->pci_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize 0x%08x",
+		   (pcr->minBasesize & (2 << 1)) ? "" : "estimated ",
+		   1 << pcr->basesize[1]);
+	    printf("  %s%s\n",
 		   (pcr->pci_base1 & 0x1) ? "I/O" : "MEM",
-		   ((pcr->pci_base1 & 0x9) == 0x8) ? " PREFETCHABLE" :"");
+		   ((pcr->pci_base1 & 0x9) == 0x8) ? " PREFETCHABLE" : "");
 	}
     }
-    if ((pcr->pci_base2) && ((pcr->pci_base1 & 0x7) != 0x4)) {
+
+    if (pcr->basesize[2]) {
 	if ((pcr->pci_base2 & 0x7) == 0x4) {
-	    printf("  BASE2     0x%08x%08x  addr 0x%08x%08x  MEM%s 64BIT\n",
+	    printf("  BASE2     0x%08x%08x  addr 0x%08x%08x",
 		   (int)pcr->pci_base3, (int)pcr->pci_base2,
 		   (int)pcr->pci_base3,
 		   (int)(pcr->pci_base2 &
-			 (pcr->pci_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
-		   (pcr->pci_base2 & 0x8) ? " PREFETCHABLE" :"");
+			 (pcr->pci_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize ",
+		   (pcr->minBasesize & (2 << 2)) ? "" : "estimated ");
+	    if (pcr->basesize[2] < 32)
+		printf("0x%08x", 1 << pcr->basesize[2]);
+	    else
+		printf("0x%08x00000000", 1 << (pcr->basesize[2] - 32));
+	    printf("  MEM%s 64BIT\n",
+		   (pcr->pci_base2 & 0x8) ? " PREFETCHABLE" : "");
 	} else {
-	    printf("  BASE2     0x%08x  addr 0x%08x  %s%s\n",
+	    printf("  BASE2     0x%08x  addr 0x%08x",
 		   (int)pcr->pci_base2,
 		   (int)(pcr->pci_base2 &
-			 (pcr->pci_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
+			 (pcr->pci_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize 0x%08x",
+		   (pcr->minBasesize & (2 << 2)) ? "" : "estimated ",
+		   1 << pcr->basesize[2]);
+	    printf("  %s%s\n",
 		   (pcr->pci_base2 & 0x1) ? "I/O" : "MEM",
-		   ((pcr->pci_base2 & 0x9) == 0x8) ? " PREFETCHABLE" :"");
+		   ((pcr->pci_base2 & 0x9) == 0x8) ? " PREFETCHABLE" : "");
 	}
     }
-    if ((pcr->pci_base3) && ((pcr->pci_base2 & 0x7) != 0x4)) {
+
+    if (pcr->basesize[3]) {
 	if ((pcr->pci_base3 & 0x7) == 0x4) {
-	    printf("  BASE3     0x%08x%08x  addr 0x%08x%08x  MEM%s 64BIT\n",
+	    printf("  BASE3     0x%08x%08x  addr 0x%08x%08x",
 		   (int)pcr->pci_base4, (int)pcr->pci_base3,
 		   (int)pcr->pci_base4,
 		   (int)(pcr->pci_base3 &
-			 (pcr->pci_base3 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
-		   (pcr->pci_base3 & 0x8) ? " PREFETCHABLE" :"");
+			 (pcr->pci_base3 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize ",
+		   (pcr->minBasesize & (2 << 3)) ? "" : "estimated ");
+	    if (pcr->basesize[3] < 32)
+		printf("0x%08x", 1 << pcr->basesize[3]);
+	    else
+		printf("0x%08x00000000", 1 << (pcr->basesize[3] - 32));
+	    printf("  MEM%s 64BIT\n",
+		   (pcr->pci_base3 & 0x8) ? " PREFETCHABLE" : "");
 	} else {
-	    printf("  BASE3     0x%08x  addr 0x%08x  %s%s\n",
+	    printf("  BASE3     0x%08x  addr 0x%08x",
 		   (int)pcr->pci_base3,
 		   (int)(pcr->pci_base3 &
-			 (pcr->pci_base3 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
+			 (pcr->pci_base3 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize 0x%08x",
+		   (pcr->minBasesize & (2 << 3)) ? "" : "estimated ",
+		   1 << pcr->basesize[3]);
+	    printf("  %s%s\n",
 		   (pcr->pci_base3 & 0x1) ? "I/O" : "MEM",
-		   ((pcr->pci_base3 & 0x9) == 0x8) ? " PREFETCHABLE" :"");
+		   ((pcr->pci_base3 & 0x9) == 0x8) ? " PREFETCHABLE" : "");
 	}
     }
-    if ((pcr->pci_base4) && ((pcr->pci_base3 & 0x7) != 0x4)) {
+
+    if (pcr->basesize[4]) {
 	if ((pcr->pci_base4 & 0x7) == 0x4) {
-	    printf("  BASE4     0x%08x%08x  addr 0x%08x%08x  MEM%s 64BIT\n",
+	    printf("  BASE4     0x%08x%08x  addr 0x%08x%08x",
 		   (int)pcr->pci_base5, (int)pcr->pci_base4,
 		   (int)pcr->pci_base5,
 		   (int)(pcr->pci_base4 &
-			 (pcr->pci_base4 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
-		   (pcr->pci_base4 & 0x8) ? " PREFETCHABLE" :"");
+			 (pcr->pci_base4 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize ",
+		   (pcr->minBasesize & (2 << 4)) ? "" : "estimated ");
+	    if (pcr->basesize[4] < 32)
+		printf("0x%08x", 1 << pcr->basesize[4]);
+	    else
+		printf("0x%08x00000000", 1 << (pcr->basesize[4] - 32));
+	    printf("  MEM%s 64BIT\n",
+		   (pcr->pci_base4 & 0x8) ? " PREFETCHABLE" : "");
 	} else {
-	    printf("  BASE4     0x%08x  addr 0x%08x  %s%s\n",
+	    printf("  BASE4     0x%08x  addr 0x%08x",
 		   (int)pcr->pci_base4,
 		   (int)(pcr->pci_base4 &
-			 (pcr->pci_base4 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)),
+			 (pcr->pci_base4 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize 0x%08x",
+		   (pcr->minBasesize & (2 << 4)) ? "" : "estimated ",
+		   1 << pcr->basesize[4]);
+	    printf("  %s%s\n",
 		   (pcr->pci_base4 & 0x1) ? "I/O" : "MEM",
-		   ((pcr->pci_base4 & 0x9) == 0x8) ? " PREFETCHABLE" :"");
+		   ((pcr->pci_base4 & 0x9) == 0x8) ? " PREFETCHABLE" : "");
 	}
     }
-    if ((pcr->pci_base5) && ((pcr->pci_base4 & 0x7) != 0x4)) {
-	printf("  BASE5     0x%08x  addr 0x%08x  %s%s%s\n",
-	       (int)pcr->pci_base5,
-	       (int)(pcr->pci_base5 &
-		     (pcr->pci_base5 & 0x1 ?  0xFFFFFFFC : 0xFFFFFFF0)),
-	       (pcr->pci_base5 & 0x1) ? "I/O" : "MEM",
-	       ((pcr->pci_base5 & 0x9) == 0x8) ? " PREFETCHABLE" :"",
-	       ((pcr->pci_base5 & 0x7) == 0x4) ? " 64BIT" : "");
-    }
-    if (pcr->pci_baserom)
-	printf("  BASEROM   0x%08x  addr 0x%08x  %sdecode-enabled\n",
-	       (int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFF8000),
-	       pcr->pci_baserom & 0x1 ? "" : "not-");
+
+    if (pcr->basesize[5]) {
+	if ((pcr->pci_base5 & 0x7) == 0x4) {
+	    printf("  BASE5     0x%08x  (invalid)\n", (int)pcr->pci_base5);
+	} else {
+	    printf("  BASE5     0x%08x  addr 0x%08x",
+		   (int)pcr->pci_base5,
+		   (int)(pcr->pci_base5 &
+			(pcr->pci_base5 & 0x1 ?  0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize 0x%08x",
+		   (pcr->minBasesize & (2 << 5)) ? "" : "estimated ",
+		   1 << pcr->basesize[5]);
+	    printf("  %s%s\n",
+		   (pcr->pci_base5 & 0x1) ? "I/O" : "MEM",
+		   ((pcr->pci_base5 & 0x9) == 0x8) ? " PREFETCHABLE" : "");
+	}
+    }
+
+    if (pcr->basesize[6]) {
+	printf("  BASEROM   0x%08x  addr 0x%08x",
+	       (int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFFF800));
+	printf("  %ssize 0x%08x",
+	       (pcr->minBasesize & (2 << 6)) ? "" : "estimated ",
+	       1 << pcr->basesize[6]);
+	printf("  %senabled\n",
+	       pcr->pci_baserom & 0x1 ? "" : "not ");
+    }
+
     if (pcr->pci_max_min_ipin_iline)
 	printf("  MAX_LAT   0x%02x  MIN_GNT 0x%02x"
 	       "  INT_PIN 0x%02x  INT_LINE 0x%02x\n",
 	       pcr->pci_max_lat, pcr->pci_min_gnt,
 	       pcr->pci_int_pin, pcr->pci_int_line);
+
     if (pcr->pci_user_config)
 	printf("  BYTE_0    0x%02x  BYTE_1  0x%02x"
-	       "  BYTE_2  0x%02x  BYTE_3  0x%02x\n",
+	       "  BYTE_2  0x%02x  BYTE_3   0x%02x\n",
 	       (int)pcr->pci_user_config_0, (int)pcr->pci_user_config_1,
 	       (int)pcr->pci_user_config_2, (int)pcr->pci_user_config_3);
 }
 
-#define PCI_B_FAST_B_B 0x80
-#define PCI_B_SB_RESET 0x40
-#define PCI_B_M_ABORT  0x20
-#define PCI_B_VGA_EN   0x08
-#define PCI_B_ISA_EN   0x04
-#define PCI_B_SERR_EN  0x02
-#define PCI_B_P_ERR    0x01
-
 static void
-print_bridge_pci_class(pciConfigPtr pcr)
+print_header_type_1(pciConfigPtr pcr)
 {
-    printf("  HEADER    0x%02x  LATENCY 0x%02x\n",
-	   pcr->pci_header_type, pcr->pci_latency_timer);
     printf("  PRIBUS    0x%02x  SECBUS 0x%02x  SUBBUS 0x%02x\n",
 	   pcr->pci_primary_bus_number, pcr->pci_secondary_bus_number,
 	   pcr->pci_subordinate_bus_number);
@@ -459,17 +554,24 @@
 	pcr->pci_upper_io_base || pcr->pci_upper_io_limit) {
 	if (((pcr->pci_io_base & 0x0f) == 0x01) ||
 	    ((pcr->pci_io_limit & 0x0f) == 0x01)) {
-	    printf("  IOBASE    0x%04x%04x  IOLIM 0x%04x%04x\n",
-		   pcr->pci_upper_io_base, (pcr->pci_io_base & 0x00f0) << 8,
-		   pcr->pci_upper_io_limit, (pcr->pci_io_limit << 8) | 0x0fff);
-	} else {
+	    if ((pcr->pci_upper_io_base < pcr->pci_upper_io_limit) ||
+		((pcr->pci_upper_io_base == pcr->pci_upper_io_limit) &&
+		 ((pcr->pci_io_base & 0x00f0) <=
+		  (pcr->pci_io_limit & 0x00f0))))
+		printf("  IOBASE    0x%04x%04x  IOLIM 0x%04x%04x\n",
+		       pcr->pci_upper_io_base, (pcr->pci_io_base & 0x00f0) << 8,
+		       pcr->pci_upper_io_limit,
+		       (pcr->pci_io_limit << 8) | 0x0fff);
+	} else if ((pcr->pci_io_base & 0x00f0) <=
+		   (pcr->pci_io_limit & 0x00f0)) {
 	    printf("  IOBASE    0x%04x  IOLIM 0x%04x\n",
 		   (pcr->pci_io_base & 0x00f0) << 8,
 		   (pcr->pci_io_limit << 8) | 0x0fff);
 	}
     }
 
-    if (pcr->pci_mem_base || pcr->pci_mem_limit)
+    if ((pcr->pci_mem_base || pcr->pci_mem_limit) &&
+	((pcr->pci_mem_base & 0x00fff0) <= (pcr->pci_mem_limit & 0x00fff0)))
 	printf("  NOPREFETCH_MEMBASE 0x%08x  MEMLIM 0x%08x\n",
 	       (pcr->pci_mem_base & 0x00fff0) << 16,
 	       (pcr->pci_mem_limit << 16) | 0x0fffff);
@@ -479,147 +581,183 @@
 	pcr->pci_prefetch_upper_mem_limit) {
 	if (((pcr->pci_prefetch_mem_base & 0x0f) == 0x01) ||
 	    ((pcr->pci_prefetch_mem_limit & 0x0f) == 0x01)) {
-	    printf("  PREFETCH_MEMBASE   0x%08x%08x  MEMLIM 0x%08x%08x\n",
-		   (int)pcr->pci_prefetch_upper_mem_base,
-		   (pcr->pci_prefetch_mem_base & 0x00fff0) << 16,
-		   (int)pcr->pci_prefetch_upper_mem_limit,
-		   (pcr->pci_prefetch_mem_limit << 16) | 0x0fffff);
-	} else {
+	    if ((pcr->pci_prefetch_upper_mem_base <
+		 pcr->pci_prefetch_upper_mem_limit) ||
+		((pcr->pci_prefetch_upper_mem_base ==
+		  pcr->pci_prefetch_upper_mem_limit) &&
+		 ((pcr->pci_prefetch_mem_base & 0x00fff0) <=
+		  (pcr->pci_prefetch_mem_limit & 0x00fff0)))) {
+		printf("  PREFETCH_MEMBASE   0x%08x%08x  MEMLIM 0x%08x%08x\n",
+		       (int)pcr->pci_prefetch_upper_mem_base,
+		       (pcr->pci_prefetch_mem_base & 0x00fff0) << 16,
+		       (int)pcr->pci_prefetch_upper_mem_limit,
+		       (pcr->pci_prefetch_mem_limit << 16) | 0x0fffff);
+	    }
+	} else if ((pcr->pci_prefetch_mem_base & 0x00fff0) <=
+		   (pcr->pci_prefetch_mem_limit & 0x00fff0)) {
 	    printf("  PREFETCH_MEMBASE   0x%08x  MEMLIM 0x%08x\n",
 		   (pcr->pci_prefetch_mem_base & 0x00fff0) << 16,
 		   (pcr->pci_prefetch_mem_limit << 16) | 0x0fffff);
 	}
     }
 
+    if (pcr->basesize[0]) {
+	if ((pcr->pci_base0 & 0x7) == 0x4) {
+	    printf("  BASE0     0x%08x%08x  addr 0x%08x%08x",
+		   (int)pcr->pci_base1, (int)pcr->pci_base0,
+		   (int)pcr->pci_base1,
+		   (int)(pcr->pci_base0 &
+			 (pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize ",
+		   (pcr->minBasesize & (2 << 0)) ? "" : "estimated ");
+	    if (pcr->basesize[0] < 32)
+		printf("0x%08x", 1 << pcr->basesize[0]);
+	    else
+		printf("0x%08x00000000", 1 << (pcr->basesize[0] - 32));
+	    printf("  MEM%s 64BIT\n",
+		   (pcr->pci_base0 & 0x8) ? " PREFETCHABLE" : "");
+	} else {
+	    printf("  BASE0     0x%08x  addr 0x%08x",
+		   (int)pcr->pci_base0,
+		   (int)(pcr->pci_base0 &
+			 (pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize 0x%08x",
+		   (pcr->minBasesize & (2 << 0)) ? "" : "estimated ",
+		   1 << pcr->basesize[0]);
+	    printf("  %s%s\n",
+		   (pcr->pci_base0 & 0x1) ? "I/O" : "MEM",
+		   ((pcr->pci_base0 & 0x9) == 0x8) ? " PREFETCHABLE" : "");
+	}
+    }
+
+    if (pcr->basesize[1]) {
+	if ((pcr->pci_base1 & 0x7) == 0x4) {
+	    printf("  BASE1     0x%08x (invalid)\n", (int)pcr->pci_base0);
+	} else {
+	    printf("  BASE1     0x%08x  addr 0x%08x",
+		   (int)pcr->pci_base1,
+		   (int)(pcr->pci_base1 &
+			 (pcr->pci_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize 0x%08x",
+		   (pcr->minBasesize & (2 << 1)) ? "" : "estimated ",
+		   1 << pcr->basesize[1]);
+	    printf("  %s%s\n",
+		   (pcr->pci_base1 & 0x1) ? "I/O" : "MEM",
+		   ((pcr->pci_base1 & 0x9) == 0x8) ? " PREFETCHABLE" : "");
+	}
+    }
+
+    if (pcr->basesize[6]) {
+	printf("  BASEROM   0x%08x  addr 0x%08x",
+	       (int)pcr->pci_br_rom, (int)(pcr->pci_br_rom & 0xFFFFF800));
+	printf("  %ssize 0x%08x",
+	       (pcr->minBasesize & (2 << 7)) ? "" : "estimated ",
+	       1 << pcr->basesize[6]);
+	printf("  %senabled\n",
+	       pcr->pci_br_rom & 0x1 ? "" : "not ");
+    }
+
     printf("  %sFAST_B2B %sSEC_BUS_RST %sM_ABRT %sVGA_EN %sISA_EN"
 	   " %sSERR_EN %sPERR_EN\n",
-	   (pcr->pci_bridge_control & PCI_B_FAST_B_B) ? "" : "NO_",
-	   (pcr->pci_bridge_control & PCI_B_SB_RESET) ? "" : "NO_",
-	   (pcr->pci_bridge_control & PCI_B_M_ABORT) ? "" : "NO_",
-	   (pcr->pci_bridge_control & PCI_B_VGA_EN) ? "" : "NO_",
-	   (pcr->pci_bridge_control & PCI_B_ISA_EN) ? "" : "NO_",
-	   (pcr->pci_bridge_control & PCI_B_SERR_EN) ? "" : "NO_",
-	   (pcr->pci_bridge_control & PCI_B_P_ERR) ? "" : "NO_");
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_FAST_B2B_EN) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_SECONDARY_RESET) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_MASTER_ABORT_EN) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_VGA_EN) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_ISA_EN) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_SERR_EN) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_PARITY_EN) ?
+		"" : "NO_");
+
+    if (pcr->pci_int_pin || pcr->pci_int_line)
+	printf("  INT_PIN 0x%02x  INT_LINE 0x%02x\n",
+	       pcr->pci_int_pin, pcr->pci_int_line);
 }
 
 static void
-print_mach64(pciConfigPtr pcr)
+print_header_type_2(pciConfigPtr pcr)
 {
-    CARD32 sparse_io = 0;
+    printf("  PRIBUS    0x%02x  SECBUS 0x%02x  SUBBUS 0x%02x\n",
+	   pcr->pci_cb_primary_bus_number, pcr->pci_cb_cardbus_bus_number,
+	   pcr->pci_cb_subordinate_bus_number);
+    printf("  SECLT     0x%02x  SECSTATUS 0x%04x\n",
+	   pcr->pci_cb_latency_timer, pcr->pci_cb_secondary_status);
 
-    printf(" CardVendor 0x%04x card 0x%04x\n",
-	   pcr->pci_subsys_vendor, pcr->pci_subsys_card);
-    printf("  STATUS    0x%04x  COMMAND 0x%04x\n",
-	   pcr->pci_status, pcr->pci_command);
-    printf("  CLASS     0x%02x 0x%02x 0x%02x  REVISION 0x%02x\n",
-	   pcr->pci_base_class, pcr->pci_sub_class,
-	   pcr->pci_prog_if, pcr->pci_rev_id);
-    printf("  BIST      0x%02x  HEADER 0x%02x  LATENCY 0x%02x  CACHE 0x%02x\n",
-	   pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer,
-	   pcr->pci_cache_line_size);
-    if (pcr->pci_base0)
-	printf("  APBASE    0x%08x  addr 0x%08x\n",
-	       (int)pcr->pci_base0, (int)(pcr->pci_base0 &
-		(pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
-    if (pcr->pci_base1)
-	printf("  BLOCKIO   0x%08x  addr 0x%08x\n",
-	       (int)pcr->pci_base1, (int)(pcr->pci_base1 &
-		(pcr->pci_base1 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
-    if (pcr->pci_base2)
-	printf("  REGBASE   0x%08x  addr 0x%08x\n",
-	       (int)pcr->pci_base2, (int)(pcr->pci_base2 &
-		(pcr->pci_base2 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
-    if (pcr->pci_baserom)
-	printf("  BASEROM   0x%08x  addr 0x%08x  %sdecode-enabled\n",
-	       (int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFF8000),
-	       pcr->pci_baserom & 0x1 ? "" : "not-");
-    if (pcr->pci_max_min_ipin_iline)
-	printf("  MAX_LAT   0x%02x  MIN_GNT 0x%02x"
-	       "  INT_PIN 0x%02x  INT_LINE 0x%02x\n",
-	       pcr->pci_max_lat, pcr->pci_min_gnt,
-	       pcr->pci_int_pin, pcr->pci_int_line);
-    switch (pcr->pci_user_config_0 & 0x03) {
-    case 0:
-	sparse_io = 0x2ec;
-	break;
-    case 1:
-	sparse_io = 0x1cc;
-	break;
-    case 2:
-	sparse_io = 0x1c8;
-	break;
+    if ((pcr->pci_cb_membase0 || pcr->pci_cb_memlimit0) &&
+	((pcr->pci_cb_membase0 & 0xFFFFF000) <=
+	 (pcr->pci_cb_memlimit0 & 0xFFFFF000)))
+	printf("  MEMBASE0 0x%08x  MEMLIM0 0x%08x%s\n",
+	       (int)pcr->pci_cb_membase0 & 0xFFFFF000,
+	       (int)pcr->pci_cb_memlimit0 | 0x00000FFF,
+	       (pcr->pci_bridge_control & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) ?
+		" PREFETCHABLE" : "");
+
+    if ((pcr->pci_cb_membase1 || pcr->pci_cb_memlimit1) &&
+	((pcr->pci_cb_membase1 & 0xFFFFF000) <=
+	 (pcr->pci_cb_memlimit1 & 0xFFFFF000)))
+	printf("  MEMBASE1 0x%08x  MEMLIM1 0x%08x%s\n",
+	       (int)pcr->pci_cb_membase1 & 0xFFFFF000,
+	       (int)pcr->pci_cb_memlimit1 | 0x00000FFF,
+	       (pcr->pci_bridge_control & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) ?
+		" PREFETCHABLE" : "");
+
+    if ((pcr->pci_cb_iobase0 || pcr->pci_cb_iolimit0) &&
+	((pcr->pci_cb_iobase0 & 0xFFFFFFFC) <=
+	 (pcr->pci_cb_iolimit0 & 0xFFFFFFFC)))
+	printf("  IOBASE0  0x%08x      IOLIM0  0x%08x\n",
+	       (int)pcr->pci_cb_iobase0 & 0xFFFFFFFC,
+	       (int)pcr->pci_cb_iolimit0 | 0x00000003);
+
+    if ((pcr->pci_cb_iobase1 || pcr->pci_cb_iolimit1) &&
+	((pcr->pci_cb_iobase1 & 0xFFFFFFFC) <=
+	 (pcr->pci_cb_iolimit1 & 0xFFFFFFFC)))
+	printf("  IOBASE1  0x%08x      IOLIM1  0x%08x\n",
+	       (int)pcr->pci_cb_iobase1 & 0xFFFFFFFC,
+	       (int)pcr->pci_cb_iolimit1 | 0x00000003);
+
+    if (pcr->basesize[0]) {
+	if ((pcr->pci_base0 & 0x7) == 0x4) {
+	    printf("  BASE0     0x%08x (invalid)\n", (int)pcr->pci_base0);
+	} else {
+	    printf("  BASE0     0x%08x  addr 0x%08x",
+		   (int)pcr->pci_base0,
+		   (int)(pcr->pci_base0 &
+			 (pcr->pci_base0 & 0x1 ? 0xFFFFFFFC : 0xFFFFFFF0)));
+	    printf("  %ssize 0x%08x",
+		   (pcr->minBasesize & (2 << 0)) ? "" : "estimated ",
+		   1 << pcr->basesize[0]);
+	    printf("  %s%s\n",
+		   (pcr->pci_base0 & 0x1) ? "I/O" : "MEM",
+		   ((pcr->pci_base0 & 0x9) == 0x8) ? " PREFETCHABLE" : "");
+	}
     }
-    printf("  SPARSEIO  0x%03x    %s IO enabled    %sable 0x46E8\n",
-	   (int)sparse_io, pcr->pci_user_config_0 & 0x04 ? "Block" : "Sparse",
-	   pcr->pci_user_config_0 & 0x08 ? "Dis" : "En");
-}
 
-static void
-print_i128(pciConfigPtr pcr)
-{
-    printf(" CardVendor 0x%04x card 0x%04x\n",
-	   pcr->pci_subsys_vendor, pcr->pci_subsys_card);
-    printf("  STATUS    0x%04x  COMMAND 0x%04x\n",
-	   pcr->pci_status, pcr->pci_command);
-    printf("  CLASS     0x%02x 0x%02x 0x%02x  REVISION 0x%02x\n",
-	   pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
-	   pcr->pci_rev_id);
-    printf("  BIST      0x%02x  HEADER 0x%02x  LATENCY 0x%02x  CACHE 0x%02x\n",
-	   pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer,
-	   pcr->pci_cache_line_size);
-    printf("  MW0_AD    0x%08x  addr 0x%08x  %spre-fetchable\n",
-	   (int)pcr->pci_base0, (int)(pcr->pci_base0 & 0xFFC00000),
-	   pcr->pci_base0 & 0x8 ? "" : "not-");
-    printf("  MW1_AD    0x%08x  addr 0x%08x  %spre-fetchable\n",
-	   (int)pcr->pci_base1, (int)(pcr->pci_base1 & 0xFFC00000),
-	   pcr->pci_base1 & 0x8 ? "" : "not-");
-    printf("  XYW_AD(A) 0x%08x  addr 0x%08x\n",
-	   (int)pcr->pci_base2, (int)(pcr->pci_base2 & 0xFFC00000));
-    printf("  XYW_AD(B) 0x%08x  addr 0x%08x\n",
-	   (int)pcr->pci_base3, (int)(pcr->pci_base3 & 0xFFC00000));
-    printf("  RBASE_G   0x%08x  addr 0x%08x\n",
-	   (int)pcr->pci_base4, (int)(pcr->pci_base4 & 0xFFFF0000));
-    printf("  IO        0x%08x  addr 0x%08x\n",
-	   (int)pcr->pci_base5, (int)(pcr->pci_base5 & 0xFFFFFF00));
-    printf("  RBASE_E   0x%08x  addr 0x%08x  %sdecode-enabled\n",
-	   (int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFF8000),
-	   pcr->pci_baserom & 0x1 ? "" : "not-");
-    if (pcr->pci_max_min_ipin_iline)
-	printf("  MAX_LAT   0x%02x  MIN_GNT 0x%02x"
-	       "  INT_PIN 0x%02x  INT_LINE 0x%02x\n",
-	       pcr->pci_max_lat, pcr->pci_min_gnt,
-	       pcr->pci_int_pin, pcr->pci_int_line);
-}
+    printf("  %s16BIT_INT %sSEC_BUS_RST %sM_ABRT %sVGA_EN %sISA_EN"
+	   " %sSERR_EN %sPERR_EN %sPOST_WRITES\n",
+	   (pcr->pci_bridge_control & PCI_CB_BRIDGE_CTL_16BIT_INT) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_SECONDARY_RESET) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_MASTER_ABORT_EN) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_VGA_EN) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_ISA_EN) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_SERR_EN) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_PCI_BRIDGE_PARITY_EN) ?
+		"" : "NO_",
+	   (pcr->pci_bridge_control & PCI_CB_BRIDGE_CTL_POST_WRITES) ?
+		"" : "NO_");
 
-static void
-print_dc21050(pciConfigPtr pcr)
-{
-    printf("  STATUS    0x%04x  COMMAND 0x%04x\n",
-	   pcr->pci_status, pcr->pci_command);
-    printf("  CLASS     0x%02x 0x%02x 0x%02x  REVISION 0x%02x\n",
-	   pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
-	   pcr->pci_rev_id);
-    printf("  BIST      0x%02x  HEADER 0x%02x  LATENCY 0x%02x  CACHE 0x%02x\n",
-	   pcr->pci_bist, pcr->pci_header_type, pcr->pci_latency_timer,
-	   pcr->pci_cache_line_size);
-    printf("  PRIBUS    0x%02x  SECBUS 0x%02x  SUBBUS 0x%02x  SECLT 0x%02x\n",
-	   pcr->pci_primary_bus_number, pcr->pci_secondary_bus_number,
-	   pcr->pci_subordinate_bus_number, pcr->pci_secondary_latency_timer);
-    printf("  IOBASE    0x%02x  IOLIM 0x%02x  SECSTATUS 0x%04x\n",
-	   pcr->pci_io_base << 8, (pcr->pci_io_limit << 8) | 0xfff,
-	   pcr->pci_secondary_status);
-    printf("  NOPREFETCH_MEMBASE 0x%08x  MEMLIM 0x%08x\n",
-	   pcr->pci_mem_base << 16, (pcr->pci_mem_limit << 16) | 0xfffff);
-    printf("  PREFETCH_MEMBASE   0x%08x  MEMLIM 0x%08x\n",
-	   pcr->pci_prefetch_mem_base << 16,
-	   (pcr->pci_prefetch_mem_limit << 16) | 0xfffff);
-    printf("  RBASE_E   0x%08x  addr 0x%08x  %sdecode-enabled\n",
-	   (int)pcr->pci_baserom, (int)(pcr->pci_baserom & 0xFFFF8000),
-	   pcr->pci_baserom & 0x1 ? "" : "not-");
-    if (pcr->pci_max_min_ipin_iline)
-	printf("  MAX_LAT   0x%02x  MIN_GNT 0x%02x"
-	       "  INT_PIN 0x%02x  INT_LINE 0x%02x\n",
-	       pcr->pci_max_lat, pcr->pci_min_gnt,
+    if (pcr->pci_int_pin || pcr->pci_int_line)
+	printf("  INT_PIN 0x%02x  INT_LINE 0x%02x\n",
 	       pcr->pci_int_pin, pcr->pci_int_line);
 }
 
@@ -629,28 +767,8 @@
     int   i;
     CARD8 io, mem;
 
-    printf("  STATUS    0x%04x  COMMAND 0x%04x\n",
-	   pcr->pci_status, pcr->pci_command);
-    printf("  CLASS     0x%02x 0x%02x 0x%02x  REVISION 0x%02x\n",
-	   pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
-	   pcr->pci_rev_id);
-    printf("  HEADER    0x%02x  LATENCY 0x%02x  CACHE 0x%02x\n",
-	   pcr->pci_header_type, pcr->pci_latency_timer,
-	   pcr->pci_cache_line_size);
-    printf("  PRIBUS    0x%02x  SECBUS 0x%02x  SUBBUS 0x%02x  SECLT 0x%02x\n",
-	   pcr->pci_primary_bus_number, pcr->pci_secondary_bus_number,
-	   pcr->pci_subordinate_bus_number, pcr->pci_secondary_latency_timer);
-    printf("  SECSTATUS 0x%04x\n",
-	   pcr->pci_secondary_status);
-    printf("  %sFAST_B2B %sSEC_BUS_RST %sM_ABRT %sVGA_EN %sISA_EN"
-	   " %sSERR_EN %sPERR_EN\n",
-	   (pcr->pci_bridge_control & PCI_B_FAST_B_B) ? "" : "NO_",
-	   (pcr->pci_bridge_control & PCI_B_SB_RESET) ? "" : "NO_",
-	   (pcr->pci_bridge_control & PCI_B_M_ABORT) ? "" : "NO_",
-	   (pcr->pci_bridge_control & PCI_B_VGA_EN) ? "" : "NO_",
-	   (pcr->pci_bridge_control & PCI_B_ISA_EN) ? "" : "NO_",
-	   (pcr->pci_bridge_control & PCI_B_SERR_EN) ? "" : "NO_",
-	   (pcr->pci_bridge_control & PCI_B_P_ERR) ? "" : "NO_");
+    print_header_type_1(pcr);
+
     printf("  TICK      0x%08lx         SECCNTL 0x%02x\n", (long)
 	   pciReadLong(pcr->tag, 0x00b0), pciReadByte(pcr->tag, 0x00dd));
     printf("  MASTER RETRIES:  PRIMARY 0x%02x,  SECONDARY 0x%02x\n",
@@ -679,10 +797,10 @@
 	   (mem = pciReadByte(pcr->tag, 0x00df)));
     for (i = 0;  i < 8;  i++)
 	if (io & (1 << i))
-	    printf("  BUS I/O  0x%06x-0x%06x\n", i << 21, ((i + 1) << 21) - 1);
+	    printf("  BUS I/O   0x%06x-0x%06x\n", i << 21, ((i + 1) << 21) - 1);
     for (i = 0;  i < 8;  i++)
 	if (mem & (1 << i))
-	    printf("  BUS MEM  0x%08x-0x%08x\n", i << 29, ((i + 1) << 29) - 1);
+	    printf("  BUS MEM   0x%08x-0x%08x\n", i << 29, ((i + 1) << 29) - 1);
 }
 
 static int cbn_460gx = -1;
@@ -692,16 +810,9 @@
 {
     CARD32 tmp;
 
-    /* Print generalities */
-    printf("  STATUS    0x%04x  COMMAND 0x%04x\n",
-	   pcr->pci_status, pcr->pci_command);
-    printf("  CLASS     0x%02x 0x%02x 0x%02x  REVISION 0x%02x\n",
-	   pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
-	   pcr->pci_rev_id);
-
     tmp = pcr->pci_user_config;
     pcr->pci_user_config = 0;
-    print_default_class(pcr);
+    print_header_type_0(pcr);
     pcr->pci_user_config = tmp;
 
     /* Only print what XFree86 might be interested in */
@@ -752,16 +863,9 @@
 {
     CARD32 tmp;
 
-    /* Print generalities */
-    printf("  STATUS    0x%04x  COMMAND 0x%04x\n",
-	   pcr->pci_status, pcr->pci_command);
-    printf("  CLASS     0x%02x 0x%02x 0x%02x  REVISION 0x%02x\n",
-	   pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
-	   pcr->pci_rev_id);
-
     tmp = pcr->pci_user_config;
     pcr->pci_user_config = 0;
-    print_default_class(pcr);
+    print_header_type_0(pcr);
     pcr->pci_user_config = tmp;
 
     /* Only print what XFree86 might be interested in */
@@ -774,16 +878,9 @@
 {
     CARD32 tmp;
 
-    /* Print generalities */
-    printf("  STATUS    0x%04x  COMMAND 0x%04x\n",
-	   pcr->pci_status, pcr->pci_command);
-    printf("  CLASS     0x%02x 0x%02x 0x%02x  REVISION 0x%02x\n",
-	   pcr->pci_base_class, pcr->pci_sub_class, pcr->pci_prog_if,
-	   pcr->pci_rev_id);
-
     tmp = pcr->pci_user_config;
     pcr->pci_user_config = 0;
-    print_default_class(pcr);
+    print_header_type_0(pcr);
     pcr->pci_user_config = tmp;
 
     /* Only print what XFree86 might be interested in */
Index: xc/programs/Xserver/hw/xfree86/etc/scanpci.man
diff -u xc/programs/Xserver/hw/xfree86/etc/scanpci.man:3.3 xc/programs/Xserver/hw/xfree86/etc/scanpci.man:3.5
--- xc/programs/Xserver/hw/xfree86/etc/scanpci.man:3.3	Sat Jan 27 13:20:56 2001
+++ xc/programs/Xserver/hw/xfree86/etc/scanpci.man	Wed May 30 11:50:40 2007
@@ -1,4 +1,4 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/etc/scanpci.man,v 3.3 2001/01/27 18:20:56 dawes Exp $ 
+.\" $XFree86: xc/programs/Xserver/hw/xfree86/etc/scanpci.man,v 3.5 2007/05/30 15:50:40 tsi Exp $ 
 .TH SCANPCI 1 __vendorversion__
 .SH NAME
 scanpci - scan/probe PCI buses
@@ -19,6 +19,15 @@
 format.  Without this option, only a brief description is printed for
 each device.
 .TP 8
+.B \-x
+Show hexadecimal dump of the first 64 bytes of each PCI device's
+configuration space.  For CardBus bridges, the first 128 bytes are
+dumped instead.  This option can be repeated to dump all 256 or 4096 bytes,
+but doing so might cause
+.B scanpci
+(or the system) to crash because some devices cannot tolerate reads of
+undefined portions of their configuration space.
+.TP 8
 .B \-1
 Use PCI config type 1.
 .TP 8
Index: xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c
diff -u xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c:1.22 xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c:1.23
--- xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c:1.22	Thu Mar 16 11:50:28 2006
+++ xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c	Mon Apr  9 11:37:17 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c,v 1.22 2006/03/16 16:50:28 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/elographics/xf86Elo.c,v 1.23 2007/04/09 15:37:17 tsi Exp $ */
 
 /*
  * Copyright 1995, 1999 by Patrick Lecoanet, France. <lecoanet@cena.dgac.fr>
@@ -399,12 +399,12 @@
 static void
 xf86EloReadInput(LocalDevicePtr	local)
 {
-  EloPrivatePtr     priv = (EloPrivatePtr)(local->private);
-  int				cur_x = 0, cur_y = 0;
-  int				state = 0;
-  int               post_needed = 0;
-  int x; /* output */
-  int y; /* output */
+  EloPrivatePtr	priv = (EloPrivatePtr)(local->private);
+  int		cur_x = 0, cur_y = 0;
+  int		state = 0;
+  int		post_needed = 0;
+  int		x = 0; /* output */
+  int		y = 0; /* output */
 
   DBG(4, ErrorF("Entering ReadInput\n"));
 
@@ -439,7 +439,7 @@
      * calib and before posting the event.
      */
 
-     DBG(3, ErrorF("EloConvert Before Fix: Screen(%d) - x(%d), y(%d)\n", priv->screen_no, x, y));
+     DBG(3, ErrorF("EloConvert Before Fix: Screen(%d) - x(%d), y(%d)\n", priv->screen_no, cur_x, cur_y));
      /* 
       * Use the conversion method to send correct coordinates
       * since it contains all necessary logic
Index: xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c
diff -u xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c:1.86 xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c:1.87
--- xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c:1.86	Thu Mar 16 11:50:31 2006
+++ xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c	Sat Apr 14 19:38:01 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c,v 1.86 2006/03/16 16:50:31 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/input/mouse/mouse.c,v 1.87 2007/04/14 23:38:01 tsi Exp $ */
 /*
  *
  * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany.
@@ -1991,13 +1991,9 @@
     if (!pMse->emulate3ButtonsSoft)
 	return TRUE;
 
-    pMse->emulate3Buttons = FALSE;
-    
     if (pMse->emulate3Pending)
 	buttonTimer(pInfo);
 
-    xf86Msg(X_INFO,"3rd Button detected: disabling emulate3Button\n");
-    
     return FALSE;
 }
 
Index: xc/programs/Xserver/hw/xfree86/loader/Imakefile
diff -u xc/programs/Xserver/hw/xfree86/loader/Imakefile:1.47 xc/programs/Xserver/hw/xfree86/loader/Imakefile:1.48
--- xc/programs/Xserver/hw/xfree86/loader/Imakefile:1.47	Sat Apr  8 14:30:26 2006
+++ xc/programs/Xserver/hw/xfree86/loader/Imakefile	Wed Jul  5 18:46:02 2006
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/loader/Imakefile,v 1.47 2006/04/08 18:30:26 dawes Exp $ */
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/loader/Imakefile,v 1.48 2006/07/05 22:46:02 tsi Exp $ */
 
 #include <Server.tmpl>
 #ifdef LoaderTest
@@ -41,11 +41,9 @@
 
 #if defined(LinuxArchitecture)
 ARCHDEFINES = -DDoMMAPedMerge -DMmapPageAlign
-#else
-#ifndef OS2Architecture
+#elif !defined(OS2Architecture) && !defined(SparcArchitecture)
 ARCHDEFINES = -DUseMMAP -DMmapPageAlign
 #endif
-#endif
 
 #if UseStackTrace
 STRACEDEFS = -DSTACKTRACE
Index: xc/programs/Xserver/hw/xfree86/loader/ar.h
diff -u xc/programs/Xserver/hw/xfree86/loader/ar.h:1.4 xc/programs/Xserver/hw/xfree86/loader/ar.h:1.5
--- xc/programs/Xserver/hw/xfree86/loader/ar.h:1.4	Wed Oct 15 12:29:02 2003
+++ xc/programs/Xserver/hw/xfree86/loader/ar.h	Tue Jul 11 20:52:15 2006
@@ -1,11 +1,11 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/ar.h,v 1.4 2003/10/15 16:29:02 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/ar.h,v 1.5 2006/07/12 00:52:15 tsi Exp $ */
 
 #ifndef _AR_H
 #define _AR_H
 
-#define ARMAG "!<arch>\n"
+#define ARMAG "!<arch>\012"
 #define SARMAG 8
-#define ARFMAG "`\n"
+#define ARFMAG "`\012"
 
 #if !(defined(__powerpc__) && defined(Lynx))
 struct ar_hdr {
Index: xc/programs/Xserver/hw/xfree86/loader/elf.h
diff -u xc/programs/Xserver/hw/xfree86/loader/elf.h:1.17 xc/programs/Xserver/hw/xfree86/loader/elf.h:1.19
--- xc/programs/Xserver/hw/xfree86/loader/elf.h:1.17	Wed Oct 15 12:29:02 2003
+++ xc/programs/Xserver/hw/xfree86/loader/elf.h	Tue Jul 11 20:52:15 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/elf.h,v 1.17 2003/10/15 16:29:02 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/elf.h,v 1.19 2006/07/12 00:52:15 tsi Exp $ */
 
 typedef unsigned int Elf32_Addr;
 typedef unsigned short Elf32_Half;
@@ -44,6 +44,7 @@
 #define EM_486   	6	/* Perhaps disused */
 #define EM_860   	7
 #define EM_MIPS		8
+#define EM_S370		9
 #define EM_MIPS_RS4_BE 10
 #define EM_PARISC      15
 #define EM_SPARC32PLUS 18
@@ -84,6 +85,8 @@
 #define STB_LOCAL  0
 #define STB_GLOBAL 1
 #define STB_WEAK   2
+#define STB_LOPROC 13
+#define STB_HIPROC 15
 
 #define STT_NOTYPE  0
 #define STT_OBJECT  1
@@ -160,7 +163,7 @@
 #define R_X86_64_GNU_VTINHERIT         250
 #define R_X86_64_GNU_VTENTRY           251
 
-/* sparc Relocation Types */
+/* SPARC Relocation Types */
 #define	R_SPARC_NONE		0
 #define	R_SPARC_8		1
 #define	R_SPARC_16		2
@@ -273,8 +276,9 @@
 #define R_ALPHA_GLOB_DAT	25	/* Create GOT entry */
 #define R_ALPHA_JMP_SLOT	26	/* Create PLT entry */
 #define R_ALPHA_RELATIVE	27	/* Adjust by program base */
+#define R_ALPHA_BRSGP		28	/* Calc displacement for BRS */
 
-/* IA-64 relocations.  */
+/* IA-64 Relocation Types */
 #define R_IA64_NONE		0x00	/* none */
 #define R_IA64_IMM14		0x21	/* symbol + addend, add imm14 */
 #define R_IA64_IMM22		0x22	/* symbol + addend, add imm22 */
@@ -455,7 +459,7 @@
 #define R_PPC_SECTOFF_HA	36
 #endif
 
-/* ARM relocs.  */
+/* ARM Relocation Types */
 #define R_ARM_NONE		0	/* No reloc */
 #define R_ARM_PC24		1	/* PC relative 26 bit branch */
 #define R_ARM_ABS32		2	/* Direct 32 bit  */
@@ -493,6 +497,52 @@
 #define R_ARM_RPC24		254
 #define R_ARM_RBASE		255
 
+/* MIPS Relocation Types */
+#define R_MIPS_NONE		0
+#define R_MIPS_16		1
+#define R_MIPS_32		2
+#define R_MIPS_ADD		R_MIPS_32
+#define R_MIPS_REL		3
+#define R_MIPS_REL32		R_MIPS_REL
+#define R_MIPS_26		4
+#define R_MIPS_HI16		5
+#define R_MIPS_LO16		6
+#define R_MIPS_GPREL		7
+#define R_MIPS_GPREL16		R_MIPS_GPREL
+#define R_MIPS_LITERAL		8
+#define R_MIPS_GOT		9
+#define R_MIPS_GOT16		R_MIPS_GOT
+#define R_MIPS_PC16		10
+#define R_MIPS_CALL		11
+#define R_MIPS_CALL16		R_MIPS_CALL
+#define R_MIPS_GPREL32		12
+
+#define R_MIPS_SHIFT5		16
+#define R_MIPS_SHIFT6		17
+#define R_MIPS_64		18
+#define R_MIPS_GOT_DISP		19
+#define R_MIPS_GOT_PAGE		20
+#define R_MIPS_GOT_OFST		21
+#define R_MIPS_GOT_HI16		22
+#define R_MIPS_GOT_LO16		23
+#define R_MIPS_SUB		24
+#define R_MIPS_INSERT_A		25
+#define R_MIPS_INSERT_B		26
+#define R_MIPS_DELETE		27
+#define R_MIPS_HIGHER		28
+#define R_MIPS_HIGHEST		29
+#define R_MIPS_CALL_HI16	30
+#define R_MIPS_CALL_LO16	31
+#define R_MIPS_SCN_DISP		32
+#define R_MIPS_REL16		33
+#define R_MIPS_ADD_IMMEDIATE	34
+#define R_MIPS_PJUMP		35
+#define R_MIPS_RELGOT		36
+#define R_MIPS_JALR		37
+
+#define R_MIPS_LOVENDOR		100
+#define R_MIPS_HIVENDOR		127
+
 typedef struct elf32_rel {
     Elf32_Addr r_offset;
     Elf32_Word r_info;
Index: xc/programs/Xserver/hw/xfree86/loader/elfloader.c
diff -u xc/programs/Xserver/hw/xfree86/loader/elfloader.c:1.71 xc/programs/Xserver/hw/xfree86/loader/elfloader.c:1.77
--- xc/programs/Xserver/hw/xfree86/loader/elfloader.c:1.71	Sat Apr  8 13:53:39 2006
+++ xc/programs/Xserver/hw/xfree86/loader/elfloader.c	Mon Apr  9 11:37:17 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/elfloader.c,v 1.71 2006/04/08 17:53:39 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/elfloader.c,v 1.77 2007/04/09 15:37:17 tsi Exp $ */
 
 /*
  *
@@ -23,7 +23,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2007 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -80,7 +80,7 @@
  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  * and/or sell copies of the Software, and to permit persons to whom the
  * Software is furnished to do so, subject to the following conditions:
- * 
+ *
  *  1. Redistributions of source code must retain the above copyright
  *     notice, this list of conditions, and the following disclaimer.
  *
@@ -88,7 +88,7 @@
  *     copyright notice, this list of conditions and the following
  *     disclaimer in the documentation and/or other materials provided
  *     with the distribution.
- * 
+ *
  *  3. The end-user documentation included with the redistribution,
  *     if any, must include the following acknowledgment: "This product
  *     includes software developed by X-Oz Technologies
@@ -112,7 +112,7 @@
  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
  * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * 
+ *
  */
 
 #include <sys/types.h>
@@ -127,7 +127,7 @@
 # include <sys/fcntl.h>
 #endif
 #include <sys/stat.h>
-#if defined(linux) && defined (__ia64__)
+#if defined(linux) && defined(__ia64__)
 #include <sys/mman.h>
 #endif
 #include <errno.h>
@@ -170,13 +170,13 @@
  * To implement the optimization we want to change is the sequence on
  * the left to that on the right, without regard to any intervening
  * instructions:
- * 
+ *
  * 1)  addl    t1=@ltoff(var),gp    ==>    addl    t1=@gprel(var),gp
  * 2)  ld8     t2=[t1]              ==>    mov     t2=t1
  * 3)  ld8     loc0=[t2]            ==>    ld8     loc0=[t2]
- * 
+ *
  * The relocations that match the above instructions are:
- * 
+ *
  * 1)  R_IA64_LTOFF22               ==>    R_IA64_LTOFF22X
  * 2)  --                           ==>    R_IA64_LDXMOV
  * 3)  --                           ==>    --
@@ -189,7 +189,7 @@
  * virtual address of the symbol into t2 by dereferencing t1. Finally
  * the symbol is loaded in instruction 3 by dereferencing its virtual
  * address in t2.
- * 
+ *
  * The optimization that LTOFF22X/LDXMOV introduces is based on the
  * observation we are doing an extra load (instruction 2) if we can
  * generate the virtual address for the symbol without doing a lookup in
@@ -199,14 +199,14 @@
  * must be within the limits of the signed 22 bit immediate offset in the
  * ld8 instruction, otherwise the original indirect GOT lookup must be
  * performed (LTOFF22).
- * 
+ *
  * If we can use GP relative addressing for the symbol then the
  * instruction that loaded the virtual address of the symbol into t2 must
  * also be patched, hence the introduction of the LDXMOV relocation. The
  * LDXMOV essentially turns the GOT lookup into a no-op by changing the
  * ld8 into a register move that preserves the register location of the
  * symbol's virtual address (e.g. t2).
- * 
+ *
  * The important point to recognize when implementing the LTOFF22X/LDXMOV
  * optimization is that relocations are interdependent, the LDXMOV is
  * only applied if the LTOFF22X is applied. It is also worth noting that
@@ -219,24 +219,24 @@
 #endif
 
 #ifndef UseMMAP
-# if defined (__ia64__) || defined (__sparc__)
+# if defined(__ia64__) || defined(__sparc__)
 #  define MergeSectionAlloc
 # endif
 #endif
 
-#if defined (DoMMAPedMerge)
+#if defined(DoMMAPedMerge)
 # include <sys/mman.h>
 # define MergeSectionAlloc
 # define MMAP_PROT	(PROT_READ | PROT_WRITE | PROT_EXEC)
 # if !defined(linux)
 #  error    No MAP_ANON?
 # endif
-# if !(defined (__amd64__) || defined(__x86_64__)) || !defined(__linux__)
+# if !(defined(__amd64__) || defined(__x86_64__)) || !defined(__linux__)
 # define MMAP_FLAGS     (MAP_PRIVATE | MAP_ANON)
 # else
 # define MMAP_FLAGS     (MAP_PRIVATE | MAP_ANON | MAP_32BIT)
 # endif
-# if defined (MmapPageAlign)
+# if defined(MmapPageAlign)
 #  define MMAP_ALIGN(size)    do { \
      int pagesize = getpagesize(); \
      size = ( size + pagesize - 1) / pagesize; \
@@ -247,13 +247,12 @@
 # endif
 #endif
 
-#if defined (__alpha__) || \
-    defined (__ia64__) || \
-    defined (__amd64__) || \
-    defined (__x86_64__) || \
-    (defined (__sparc__) && \
-     (defined (__arch64__) || \
-      defined (__sparcv9)))
+#if defined(__alpha__) || \
+    defined(__ia64__) || \
+    defined(__amd64__) || \
+    defined(__x86_64__) || \
+    (defined(__sparc__) && \
+     (defined(__arch64__) || defined(__sparcv9) || defined(__sparcv9__)))
 typedef Elf64_Ehdr Elf_Ehdr;
 typedef Elf64_Shdr Elf_Shdr;
 typedef Elf64_Sym Elf_Sym;
@@ -269,7 +268,8 @@
 #define ELF_ST_TYPE ELF64_ST_TYPE
 #define ELF_R_SYM ELF64_R_SYM
 
-#if !defined(__sparcv9)
+#if !defined(__sparc__) || \
+    (!defined(__sparcv9) && !defined(__sparcv9__) && !defined(__arch64__))
 #define ELF_R_TYPE ELF64_R_TYPE
 #else
 /*
@@ -280,10 +280,10 @@
 #define ELF_R_TYPE(info)	((info) & 0xff)
 #endif
 
-# if defined (__alpha__) || defined (__ia64__)
+# if defined(__alpha__) || defined(__ia64__)
 /*
  * The GOT is allocated dynamically. We need to keep a list of entries that
- * have already been added to the GOT. 
+ * have already been added to the GOT.
  *
  */
 typedef struct _elf_GOT_Entry {
@@ -305,10 +305,10 @@
 #  endif
 # endif
 
-# if defined (__ia64__)
+# if defined(__ia64__)
 /*
  * The PLT is allocated dynamically. We need to keep a list of entries that
- * have already been added to the PLT. 
+ * have already been added to the PLT.
  */
 typedef struct _elf_PLT_Entry {
     Elf_Rela *rel;
@@ -596,7 +596,7 @@
     reloc->assigned = 0;
     memset(&reloc->olddata, 0, sizeof(reloc->olddata));
     reloc->next = NULL;
-    
+
 #if LOADERDEBUG
     LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
 	     "ElfDelayRelocation %p: file %p, sec %d,"
@@ -647,8 +647,7 @@
     defined(__amd64__) || \
     defined(__x86_64__) || \
     (defined(__sparc__) && \
-     (defined(__arch64__) || \
-      defined(__sparcv9)))
+     (defined(__arch64__) || defined(__sparcv9) || defined(__sparcv9__)))
 	size = (size + 7) & ~0x7;
 #endif
     }
@@ -672,8 +671,7 @@
     defined(__amd64__) || \
     defined(__x86_64__) || \
     (defined(__sparc__) && \
-     (defined(__arch64__) || \
-      defined(__sparcv9)))
+     (defined(__arch64__) || defined(__sparcv9) || defined(__sparcv9__)))
 	size = (size + 7) & ~0x7;
 #endif
 	numsyms++;
@@ -730,8 +728,7 @@
     defined(__amd64__) || \
     defined(__x86_64__) || \
     (defined(__sparc__) && \
-     (defined(__arch64__) || \
-      defined(__sparcv9)))
+     (defined(__arch64__) || defined(__sparcv9) || defined(__sparcv9__)))
 	offset = (offset + 7) & ~0x7;
 #endif
 	xf86loaderfree(common);
@@ -933,7 +930,7 @@
 		if (plt->address && plt->relinfo == index) {
 #if LOADERDEBUG
 		    LoaderDebugMsg(LOADER_DEBUG_PLT,
-			           "already created entry for index %d (%d)\n",
+				   "already created entry for index %d (%d)\n",
 				   index, i);
 #endif
 		    /* PLT entry created. */
@@ -983,7 +980,7 @@
 		plt->code[1] =
 			(((Elf_Addr) symbol->address) & 0xffff0000) >> 16;
 		plt->code[2] = 0x618c;	/* ori     r12,r12 */
-		plt->code[3] = (((Elf_Addr) symbol->address) & 0xffff);
+		plt->code[3] = (Elf_Addr) symbol->address & 0xffff;
 		plt->code[4] = 0x7d89;	/* mtcr    r12 */
 		plt->code[5] = 0x03a6;
 		plt->code[6] = 0x4e80;	/* bctr */
@@ -1139,7 +1136,7 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
 		 "ELFCreateGOT: GOT address %p in shared GOT, nuses %d\n",
 		 elffile->got, gots->nuses);
-#  endif
+#endif
 	return TRUE;
     }
 
@@ -1168,7 +1165,8 @@
 	    ErrorF("ELFCreateGOT() Unable to reallocate memory!!!!\n");
 	    return FALSE;
 	}
-#   if defined(linux) && defined(__ia64__) || defined(__OpenBSD__) || defined(__NetBSD__)
+#   if (defined(linux) && defined(__ia64__)) || \
+       defined(__OpenBSD__) || defined(__NetBSD__)
 	{
 	    unsigned long page_size = getpagesize();
 	    unsigned long round;
@@ -1198,9 +1196,8 @@
 	elffile->baseptr =
 		((long)elffile->base + (maxalign - 1)) & ~(maxalign - 1);
 	elffile->got =
-		(unsigned char
-		 *)((long)(elffile->base + elffile->basesize -
-			   elffile->gotsize) & ~7);
+		(unsigned char *)((long)(elffile->base + elffile->basesize -
+					 elffile->gotsize) & ~7);
     } else {
 	gots = (ELFGotPtr) elffile->got;
 	elffile->got = gots->section;
@@ -1406,9 +1403,9 @@
     case IA64_OPND_LDXMOV:
 	/*
 	 * Convert "ld8 t2=[t1]" to "mov t2=t1" which is really "add t2=0,t1"
-	 * Mask all but the r3,r1,qp fields, 
+	 * Mask all but the r3,r1,qp fields,
 	 * then OR in the ALU opcode = 8 into the opcode field [40:37]
-	 * 
+	 *
 	 * Mask for the r3,r1,qp bit fields [26:20][12:6][5:0] = 0x7f01fff,
 	 * This mask negated only within the 41 bit wide instruction and
 	 * shifted left by 5 for the bundle template is 0x3FFF01FC0000
@@ -1457,7 +1454,7 @@
     /*
      * Make an (over) estimate of how many PLT entries will be needed.
      * Return the minimum of the total number of relocations and the
-     * number of relocations spanning the min,max reloc indices. 
+     * number of relocations spanning the min,max reloc indices.
      * The over-estimate typically requires less than one page of storage,
      * so calculating a precise count of the unique PLT entries needed isn't
      * of any significant benefit.
@@ -1520,13 +1517,13 @@
 }
 #endif /* __powerpc__ */
 
-#if !defined(__ia64__)
+#if defined(i386) || defined(__x86_64__) || defined(__amd64__) || \
+    defined(__alpha__) || defined(__powerpc__) || defined(__arm__)
 static void
 resetDest32(ELFRelocPtr p, unsigned int *dest32)
 {
 #if LOADERDEBUG
-    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-		   "*dest32=%8.8x\n", *dest32);
+    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", *dest32);
 #endif
     if (p->assigned) {
 #if LOADERDEBUG
@@ -1534,8 +1531,7 @@
 #endif
 	*dest32 = p->olddata.d32;
 #if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-		       "*dest32=%8.8x\t", *dest32);
+	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", *dest32);
 #endif
     } else {
 	p->olddata.d32 = *dest32;
@@ -1544,62 +1540,13 @@
 }
 #endif
 
-#if defined(__powerpc__) || defined(__sparc__)
-static void
-resetDest16(ELFRelocPtr p, unsigned short *dest16)
-{
-#if LOADERDEBUG
-    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-		   "*dest16=%4.4x\n", *dest16);
-#endif
-    if (p->assigned) {
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "was assigned\t");
-#endif
-	*dest16 = p->olddata.d16;
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-		       "*dest16=%8.8x\t", *dest16);
-#endif
-    } else {
-	p->olddata.d16 = *dest16;
-	p->assigned = 1;
-    }
-}
-#endif
-
-#if defined(__sparc__)
-static void
-resetDest8(ELFRelocPtr p, unsigned char *dest8)
-{
-#if LOADERDEBUG
-    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-		   "*dest8=%2.2x\n", *dest8);
-#endif
-    if (p->assigned) {
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "was assigned\t");
-#endif
-	*dest8 = p->olddata.d8;
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-		       "*dest8=%2.2x\t", *dest8);
-#endif
-    } else {
-	p->olddata.d8 = *dest8;
-	p->assigned = 1;
-    }
-}
-#endif
-
-#if defined(__alpha__) || defined(__amd64__) || \
-    defined(__x86_64__) || defined(__ia64__)
+#if defined(__alpha__) || defined(__amd64__) || defined(__x86_64__) || \
+    defined(__sparc__)
 static void
 resetDest64(ELFRelocPtr p, unsigned long *dest64)
 {
 #if LOADERDEBUG
-    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-		   "*dest64=%16.16lx\n", *dest64);
+    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest64=%16.16lx\t", *dest64);
 #endif
     if (p->assigned) {
 #if LOADERDEBUG
@@ -1607,8 +1554,7 @@
 #endif
 	*dest64 = p->olddata.d64;
 #if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-		       "*dest64=%16.16lx\t", *dest64);
+	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest64=%16.16lx\t", *dest64);
 #endif
     } else {
 	p->olddata.d64 = *dest64;
@@ -1623,7 +1569,7 @@
 {
 #if LOADERDEBUG
     LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-		   "*dest128=[%016lx%016lx]\n", dest128[1], dest128[0]);
+		   "*dest128=[%016lx%016lx]\t", dest128[1], dest128[0]);
 #endif
     if (p->assigned) {
 #if LOADERDEBUG
@@ -1633,7 +1579,7 @@
 	dest128[1] = p->olddata.d128[1];
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-			"*dest128=[%016lx%016lx]\n", dest128[1], dest128[0]);
+			"*dest128=[%016lx%016lx]\t", dest128[1], dest128[0]);
 #endif
     } else {
 	p->olddata.d128[0] = dest128[0];
@@ -1648,8 +1594,7 @@
 resetDest32s(ELFRelocPtr p, int *dest32s)
 {
 #if LOADERDEBUG
-    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-		   "*dest32s=%8.8x\n", *dest32s);
+    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32s=%8.8x\t", *dest32s);
 #endif
     if (p->assigned) {
 #if LOADERDEBUG
@@ -1657,8 +1602,7 @@
 #endif
 	*dest32s = p->olddata.d32s;
 #if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-		       "*dest32s=%8.8x\t", *dest32s);
+	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32s=%8.8x\t", *dest32s);
 #endif
     } else {
 	p->olddata.d32s = *dest32s;
@@ -1795,12 +1739,13 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", (void *)dest32);
 #endif
 	resetDest32(p, dest32);
-	*dest32 = symval + (*dest32);	/* S + A */
+	*dest32 = symval + *dest32;
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
 		 "*dest32=%8.8x\n", (unsigned int)*dest32);
 #endif
 	break;
+
     case R_386_PC32:
 	dest32 = (unsigned int *)(secp + rel->r_offset);
 #if LOADERDEBUG
@@ -1814,7 +1759,7 @@
 #endif
 
 	resetDest32(p, dest32);
-	*dest32 = symval + (*dest32) - (Elf_Addr) dest32;	/* S + A - P */
+	*dest32 = symval + *dest32 - (Elf_Addr) dest32;
 
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
@@ -1823,6 +1768,7 @@
 
 	break;
 #endif /* i386 */
+
 #if defined(__amd64__) || defined(__x86_64__)
     case R_X86_64_32:
 	dest32 = (unsigned int *)(secp + rel->r_offset);
@@ -1832,11 +1778,12 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%lx\t", rel->r_addend);
 #endif
 	resetDest32(p, dest32);
-	*dest32 = symval + rel->r_addend + (*dest32);	/* S + A */
+	*dest32 = symval + rel->r_addend + *dest32;
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
 #endif
 	break;
+
     case R_X86_64_32S:
 	dest32s = (int *)(secp + rel->r_offset);
 #if LOADERDEBUG
@@ -1845,11 +1792,12 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%lx\t", rel->r_addend);
 #endif
 	resetDest32s(p, dest32s);
-	*dest32s = symval + rel->r_addend + (*dest32s);	/* S + A */
+	*dest32s = symval + rel->r_addend + (*dest32s);
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32s=%8.8x\n", *dest32s);
 #endif
 	break;
+
     case R_X86_64_PC32:
 	dest32 = (unsigned int *)(secp + rel->r_offset);
 #if LOADERDEBUG
@@ -1861,12 +1809,13 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%lx\t", rel->r_addend);
 #endif
 	resetDest32(p, dest32);
-	*dest32 = symval + rel->r_addend + (*dest32) - (Elf_Addr) dest32;	/* S + A - P */
+	*dest32 = symval + rel->r_addend + *dest32 - (Elf_Addr) dest32;
 
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
 #endif
 	break;
+
     case R_X86_64_64:
 	dest64 = (unsigned long *)(secp + rel->r_offset);
 #if LOADERDEBUG
@@ -1875,12 +1824,13 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%lx\t", rel->r_addend);
 #endif
 	resetDest64(p, dest64);
-	*dest64 = symval + rel->r_addend + (*dest64);	/* S + A */
+	*dest64 = symval + rel->r_addend + *dest64;
 #if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest64=%8.8lx\n", *dest64);
+	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest64=%16.16lx\n", *dest64);
 #endif
 	break;
 #endif /* __amd64__ || __x86_64__ */
+
 #if defined(__alpha__)
     case R_ALPHA_NONE:
     case R_ALPHA_LITUSE:
@@ -1894,16 +1844,15 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest64=%p\t", dest64);
 #endif
 	resetDest64(p, dest64);
-	*dest64 = symval + rel->r_addend + (*dest64);	/* S + A + P */
+	*dest64 = symval + rel->r_addend + *dest64;
 #if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest64=%8.8lx\n", *dest64);
+	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest64=%16.16lx\n", *dest64);
 #endif
 	break;
 
     case R_ALPHA_GPREL32:
 	{
-	    dest64 = (unsigned long *)(secp + rel->r_offset);
-	    dest32 = (unsigned int *)dest64;
+	    dest32 = (unsigned int *)(secp + rel->r_offset);
 
 #if LOADERDEBUG
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ALPHA_GPREL32 %s\t",
@@ -1914,13 +1863,12 @@
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", *dest32);
 #endif
 	    symval += rel->r_addend;
-	    symval = ((unsigned char *)symval) -
-		    ((unsigned char *)elffile->got);
+	    symval = (unsigned char *)symval - (unsigned char *)elffile->got;
 #if LOADERDEBUG
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
 #endif
-	    if ((symval & 0xffffffff00000000) != 0x0000000000000000 &&
-		(symval & 0xffffffff00000000) != 0xffffffff00000000) {
+	    if (((symval & 0xffffffff00000000) != 0x0000000000000000) &&
+		((symval & 0xffffffff00000000) != 0xffffffff00000000)) {
 		FatalError("R_ALPHA_GPREL32 symval-got is too large for %s\n",
 			   ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)));
 	    }
@@ -1934,33 +1882,76 @@
 
     case R_ALPHA_GPRELLOW:
 	{
-	    dest64 = (unsigned long *)(secp + rel->r_offset);
-	    dest16 = (unsigned short *)dest64;
+	    dest16 = (unsigned short *)(secp + rel->r_offset);
 
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ALPHA_GPRELLOW %s\t",
+		     ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)));
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%p\t", secp);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%p\t", dest16);
+#endif
 	    symval += rel->r_addend;
-	    symval = ((unsigned char *)symval) -
-		    ((unsigned char *)elffile->got);
+	    symval = (unsigned char *)symval - (unsigned char *)elffile->got;
 
 	    *dest16 = symval;
+
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\n", *dest16);
+#endif
 	    break;
 	}
 
     case R_ALPHA_GPRELHIGH:
 	{
-	    dest64 = (unsigned long *)(secp + rel->r_offset);
-	    dest16 = (unsigned short *)dest64;
+	    int nonfatal = 0;
+	    dest16 = (unsigned short *)(secp + rel->r_offset);
+
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ALPHA_GPRELHIGH %s\t",
+		     ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)));
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%p\t", secp);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%p\t", dest16);
+#endif
 
 	    symval += rel->r_addend;
-	    symval = ((unsigned char *)symval) -
-		    ((unsigned char *)elffile->got);
+
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
+#endif
+	    /*
+	     * R_ALPHA_GPRELHIGH relocations to LoaderDefaultFunc should be
+	     * temporary, so ignore out of range problems with them.
+	     */
+	    nonfatal = (symval == (Elf_Addr) &LoaderDefaultFunc);
+	    symval = (unsigned char *)symval - (unsigned char *)elffile->got;
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval-got=%lx\t", symval);
+#endif
 	    symval = ((long)symval >> 16) + ((symval >> 15) & 1);
-	    if ((long)symval > 0x7fff || (long)symval < -(long)0x8000) {
-		FatalError
-			("R_ALPHA_GPRELHIGH symval-got is too large for %s:%lx\n",
-			 ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)),
-			 symval);
+	    if (((long)symval > 0x7fff) || ((long)symval < -(long)0x8000)) {
+		if (nonfatal) {
+#if LOADERDEBUG
+		    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
+				   "R_ALPHA_GPRELHIGH symval-got is too large "
+				   "for %s:%lx (%ld)\n",
+				   ElfGetSymbolName(elffile,
+						    ELF_R_SYM(rel->r_info)),
+				   symval, symval);
+#endif
+		} else {
+		    FatalError("R_ALPHA_GPRELHIGH symval-got is too large "
+			       "for %s:%lx (%ld)\n",
+			       ElfGetSymbolName(elffile,
+						ELF_R_SYM(rel->r_info)),
+			       symval, symval);
+		}
 	    }
 
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\n", *dest16);
+#endif
 	    *dest16 = symval;
 	    break;
 	}
@@ -1996,22 +1987,21 @@
 		if ((gotent->offset & 0xffff0000) != 0)
 		    FatalError("\nR_ALPHA_LITERAL offset %x too large\n",
 			       gotent->offset);
-		(*dest32) |= (gotent->offset);	/* The address part is always 0 */
+		*dest32 |= gotent->offset;
 	    } else {
 		unsigned long val;
 
-		/* S + A - P >> 2 */
-		val = ((symval + (rel->r_addend) - (Elf_Addr) dest32));
+		val = symval + rel->r_addend - (Elf_Addr) dest32;
 #if LOADERDEBUG
 		LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A-P=%lx\t", val);
 #endif
-		if ((val & 0xffff0000) != 0xffff0000 &&
-		    (val & 0xffff0000) != 0x00000000) {
+		if (((val & 0xffff0000) != 0xffff0000) &&
+		    ((val & 0xffff0000) != 0x00000000)) {
 		    ErrorF("\nR_ALPHA_LITERAL offset %lx too large\n", val);
 		    break;
 		}
 		val &= 0x0000ffff;
-		(*dest32) |= (val);	/* The address part is always 0 */
+		*dest32 |= val;
 	    }
 #if LOADERDEBUG
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
@@ -2041,23 +2031,22 @@
 	    *dest32 = (val64 & 0xffffffff);
 	    *dest32h = (val64 >> 32);
 
-	    if ((*dest32h >> 26) != 9 || (*dest32 >> 26) != 8) {
-		ErrorF("***Bad instructions in relocating %s\n",
+	    if (((*dest32h >> 26) != 9) || ((*dest32 >> 26) != 8)) {
+		ErrorF("\n***Bad instructions in relocating %s\n",
 		       ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)));
 	    }
 
 	    symval = (*dest32h & 0xffff) << 16 | (*dest32 & 0xffff);
 	    symval = (symval ^ 0x80008000) - 0x80008000;
 
-	    offset = ((unsigned char *)elffile->got -
-		      (unsigned char *)dest32h);
+	    offset = (unsigned char *)elffile->got - (unsigned char *)dest32h;
 #if LOADERDEBUG
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "got-dest32=%lx\t", offset);
 #endif
 
 	    if ((offset >= 0x7fff8000L) || (offset < -0x80000000L)) {
-		FatalError("Offset overflow for R_ALPHA_GPDISP\n");
+		FatalError("\nOffset overflow for R_ALPHA_GPDISP\n");
 	    }
 
 	    symval += (unsigned long)offset;
@@ -2077,7 +2066,7 @@
 	}
 
     case R_ALPHA_HINT:
-	dest32 = (unsigned int *)((secp + rel->r_offset) + rel->r_addend);
+	dest32 = (unsigned int *)(secp + rel->r_offset + rel->r_addend);
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ALPHA_HINT %s\t",
 		 ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)));
@@ -2085,13 +2074,13 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", dest32);
 #endif
-	resetDest32(p, dest32);
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
 #endif
-	symval -= (Elf_Addr) (((unsigned char *)dest32) + 4);
+	symval -= (Elf_Addr) ((unsigned char *)dest32 + 4);
 	if (symval % 4) {
-	    ErrorF("R_ALPHA_HINT bad alignment of offset\n");
+	    ErrorF("\n%s: R_ALPHA_HINT bad alignment of offset %lx.\n",
+		   ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)), symval);
 	}
 	symval = symval >> 2;
 
@@ -2113,39 +2102,113 @@
 
     case R_ALPHA_GPREL16:
 	{
-	    dest64 = (unsigned long *)(secp + rel->r_offset);
-	    dest16 = (unsigned short *)dest64;
+	    dest16 = (unsigned short *)(secp + rel->r_offset);
 
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ALPHA_GPREL16 %s\t",
+		     ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)));
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%p\t", secp);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%p\t", dest16);
+#endif
 	    symval += rel->r_addend;
-	    symval = ((unsigned char *)symval) -
-		    ((unsigned char *)elffile->got);
-	    if ((long)symval > 0x7fff || (long)symval < -(long)0x8000) {
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
+#endif
+	    symval = (unsigned char *)symval - (unsigned char *)elffile->got;
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval-got=%lx\t", symval);
+#endif
+	    if (((long)symval > 0x7fff) || ((long)symval < -(long)0x8000)) {
 		FatalError
-			("R_ALPHA_GPREL16 symval-got is too large for %s:%lx\n",
+			("\nR_ALPHA_GPREL16 symval-got is too large for %s:%lx\n",
 			 ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)),
 			 symval);
 	    }
 
 	    *dest16 = symval;
+
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\n", *dest16);
+#endif
+	    break;
+	}
+
+    case R_ALPHA_SREL32:
+	{
+	    dest32 = (unsigned int *)(secp + rel->r_offset);
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ALPHA_SREL32 %s\t",
+		     ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)));
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%p\t", secp);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", dest32);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
+#endif
+	    symval += rel->r_addend;
+	    symval -= (unsigned long) dest32;
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
+#endif
+	    if (((long)symval >= 0x80000000) ||
+		((long)symval < -(long)0x80000000))
+		FatalError("\nR_ALPHA_SREL32 overflow for %s: %lx\n",
+			   ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)),
+			   symval);
+	    *dest32 = symval;
+
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
+#endif
 	    break;
 	}
 
- 	case R_ALPHA_SREL32:
- 	    {
- 		dest32 = (unsigned int *)(secp + rel->r_offset);
-		resetDest32(p, dest32);
- 		symval += rel->r_addend;
- 		symval -= (unsigned long) dest32;
- 		if ((long)symval >= 0x80000000
- 		    || (long)symval < -(long)0x80000000)
- 		    FatalError("R_ALPHA_SREL32 overflow for %s: %lx\n",
- 			       ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)),
- 			       symval);
- 		*dest32 = symval;
- 		break;
- 	    }
- 
+    case R_ALPHA_BRSGP:
+	{
+	    Elf_Sym *syms;
+	    int      Delta;
+	    dest32 = (unsigned int *)(secp + rel->r_offset + rel->r_addend);
+
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ALPHA_BRSGP %s\t",
+			   ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)));
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%p\t", secp);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%p\t", dest32);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\t", *dest32);
+#endif
+
+	    syms = (Elf_Sym *) elffile->saddr[elffile->symndx];
+
+	    if (syms[ELF_R_SYM(rel->r_info)].st_other & 0x8)
+		Delta = -4;
+	    else
+		Delta = 4;
+	    symval -= (Elf_Addr) ((unsigned char *)dest32 + Delta);
+	    if (symval % 4) {
+		ErrorF("\n%s: R_ALPHA_BRSGP bad aligment of offset %lx.\n",
+		       ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)),
+		       symval);
+	    }
+	    symval = symval >> 2;
+
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
+#endif
+
+#if LOADERDEBUG
+	    if (symval & 0xffe00000) {
+		LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
+			       "R_ALPHA_BRSGP symval too large\n");
+	    }
+#endif
+	    *dest32 = (*dest32 & ~0x1fffff) | (symval & 0x1fffff);
+
+#if LOADERDEBUG
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
+#endif
+	    break;
+	}
 #endif /* alpha */
+
 #if defined(__mc68000__)
     case R_68K_32:
 	dest32 = (unsigned int *)(secp + rel->r_offset);
@@ -2159,17 +2222,14 @@
 	{
 	    unsigned long val;
 
-	    /* S + A */
-	    val = symval + (rel->r_addend);
+	    val = symval + rel->r_addend;
 #if LOADERDEBUG
-	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\n", val);
 #endif
-	    *dest32 = val;	/* S + A */
+	    *dest32 = val;
 	}
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#endif
 	break;
+
     case R_68K_PC32:
 	dest32 = (unsigned int *)(secp + rel->r_offset);
 #if LOADERDEBUG
@@ -2179,25 +2239,19 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32);
 #endif
-	resetDest32(p, dest32);
 	{
 	    unsigned long val;
 
-	    /* S + A - P */
-	    val = symval + (rel->r_addend);
-	    val -= *dest32;
+	    val = symval + rel->r_addend;
+	    *dest32 = val - (Elf_Addr) dest32;
 #if LOADERDEBUG
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val);
-	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-			"S+A-P=%x\t", val + (*dest32) - (Elf_Addr) dest32);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A-P=%x\n", *dest32);
 #endif
-	    *dest32 = val + (*dest32) - (Elf_Addr) dest32;	/* S + A - P */
 	}
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#endif
 	break;
 #endif /* __mc68000__ */
+
 #if defined(__powerpc__)
 # if defined(PowerMAX_OS)
     case R_PPC_DISP24:		/* 11 */
@@ -2208,71 +2262,64 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%x\t", dest32);
-#  endif
+#endif
 	resetDest32(p, dest32);
 	{
 	    unsigned long val;
 
-	    /* S + A - P >> 2 */
-	    val = ((symval + (rel->r_addend) - (Elf_Addr) dest32));
+	    val = symval + rel->r_addend - (Elf_Addr) dest32;
 #if LOADERDEBUG
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A-P=%x\t", val);
-#  endif
+#endif
 	    val = val >> 2;
-	    if ((val & 0x3f000000) != 0x3f000000 &&
-		(val & 0x3f000000) != 0x00000000) {
+	    if (((val & 0x3f000000) != 0x3f000000) &&
+		((val & 0x3f000000) != 0x00000000)) {
 #if LOADERDEBUG
 		LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
 			"R_PPC_DISP24 offset %x too large\n", val << 2);
-#  endif
+#endif
 		symval = ElfGetPLTAddr(elffile, ELF_R_SYM(rel->r_info));
-		val = ((symval + (rel->r_addend) - (Elf_Addr) dest32));
+		val = symval + rel->r_addend - (Elf_Addr) dest32;
 #if LOADERDEBUG
 		LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "PLT offset is %x\n", val);
-#  endif
+#endif
 		val = val >> 2;
-		if ((val & 0x3f000000) != 0x3f000000 &&
-		    (val & 0x3f000000) != 0x00000000)
+		if (((val & 0x3f000000) != 0x3f000000) &&
+		    ((val & 0x3f000000) != 0x00000000))
 		    FatalError("R_PPC_DISP24 PLT offset %x too large\n",
 			       val << 2);
 	    }
 	    val &= 0x00ffffff;
-	    (*dest32) |= (val << 2);	/* The address part is always 0 */
+	    *dest32 |= val << 2;
 	    ppc_flush_icache(dest32);
 	}
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
+#endif
 	break;
+
     case R_PPC_16HU:		/* 31 */
 	dest16 = (unsigned short *)(secp + rel->r_offset);
 #if LOADERDEBUG
-	dest32 = (unsigned long *)(dest16 - 1);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_16HU\t");
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%x\t", dest16);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16);
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32);
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
+#endif
 	{
 	    unsigned short val;
 
-	    /* S + A */
-	    val = ((symval + (rel->r_addend)) & 0xffff0000) >> 16;
+	    val = ((symval + rel->r_addend) & 0xffff0000) >> 16;
 #if LOADERDEBUG
-	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "uhi16(S+A)=%x\t", val);
-#  endif
-	    *dest16 = val;	/* S + A */
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "uhi16(S+A)=%x\n", val);
+#endif
+	    *dest16 = val;
 	    ppc_flush_icache(dest16);
 	}
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16);
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
 	break;
+
     case R_PPC_32:		/* 32 */
 	dest32 = (unsigned long *)(secp + rel->r_offset);
 #if LOADERDEBUG
@@ -2282,22 +2329,19 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
+#endif
 	{
 	    unsigned long val;
 
-	    /* S + A */
-	    val = symval + (rel->r_addend);
+	    val = symval + rel->r_addend;
 #if LOADERDEBUG
-	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val);
-#  endif
-	    *dest32 = val;	/* S + A */
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\n", val);
+#endif
+	    *dest32 = val;
 	    ppc_flush_icache(dest32);
 	}
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
 	break;
+
     case R_PPC_32UA:		/* 33 */
 	dest32 = (unsigned long *)(secp + rel->r_offset);
 #if LOADERDEBUG
@@ -2307,16 +2351,15 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
+#endif
 	{
 	    unsigned long val;
 	    unsigned char *dest8 = (unsigned char *)dest32;
 
-	    /* S + A */
-	    val = symval + (rel->r_addend);
+	    val = symval + rel->r_addend;
 #if LOADERDEBUG
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val);
-#  endif
+#endif
 	    *dest8++ = (val & 0xff000000) >> 24;
 	    *dest8++ = (val & 0x00ff0000) >> 16;
 	    *dest8++ = (val & 0x0000ff00) >> 8;
@@ -2325,12 +2368,12 @@
 	}
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
+#endif
 	break;
+
     case R_PPC_16H:		/* 34 */
 	dest16 = (unsigned short *)(secp + rel->r_offset);
 #if LOADERDEBUG
-	dest32 = (unsigned long *)(dest16 - 1);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_16H\t");
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symbol=%s\t",
@@ -2339,16 +2382,13 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%x\t", dest16);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16);
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32);
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
+#endif
 	{
 	    unsigned short val;
 	    unsigned short loval;
 
-	    /* S + A */
-	    val = ((symval + (rel->r_addend)) & 0xffff0000) >> 16;
-	    loval = (symval + (rel->r_addend)) & 0xffff;
+	    val = ((symval + rel->r_addend) & 0xffff0000) >> 16;
+	    loval = (symval + rel->r_addend) & 0xffff;
 	    if (loval & 0x8000) {
 		/*
 		 * This is hi16(), instead of uhi16(). Because of this,
@@ -2359,44 +2399,33 @@
 		val++;
 	    }
 #if LOADERDEBUG
-	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "hi16(S+A)=%x\t", val);
-#  endif
-	    *dest16 = val;	/* S + A */
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "hi16(S+A)=%x\n", val);
+#endif
+	    *dest16 = val;
 	    ppc_flush_icache(dest16);
 	}
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16);
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
 	break;
+
     case R_PPC_16L:		/* 35 */
 	dest16 = (unsigned short *)(secp + rel->r_offset);
 #if LOADERDEBUG
-	dest32 = (unsigned long *)(dest16 - 1);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_16L\t");
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%x\t", dest16);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16);
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32);
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
+#endif
 	{
 	    unsigned short val;
 
-	    /* S + A */
-	    val = (symval + (rel->r_addend)) & 0xffff;
+	    val = (symval + rel->r_addend) & 0xffff;
 #if LOADERDEBUG
-	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "lo16(S+A)=%x\t", val);
-#  endif
-	    *dest16 = val;	/* S + A */
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "lo16(S+A)=%x\n", val);
+#endif
+	    *dest16 = val;
 	    ppc_flush_icache(dest16);
 	}
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16);
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
 	break;
 # else /* PowerMAX_OS */
 	/* Linux PPC */
@@ -2410,69 +2439,57 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
+#endif
 	{
 	    unsigned long val;
 
-	    /* S + A */
-	    val = symval + (rel->r_addend);
+	    val = symval + rel->r_addend;
 #if LOADERDEBUG
-	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val);
-#  endif
-	    *dest32 = val;	/* S + A */
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\n", val);
+#endif
+	    *dest32 = val;
 	    ppc_flush_icache(dest32);
 	}
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
 	break;
+
     case R_PPC_ADDR16_LO:	/* 4 */
 	dest16 = (unsigned short *)(secp + rel->r_offset);
 #if LOADERDEBUG
-	dest32 = (unsigned int *)(dest16 - 1);
-#  endif
-#if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_ADDR16_LO\t");
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%x\t", dest16);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16);
-#  endif
+#endif
 	{
 	    unsigned short val;
 
-	    /* S + A */
-	    val = (symval + (rel->r_addend)) & 0xffff;
+	    val = (symval + rel->r_addend) & 0xffff;
 #if LOADERDEBUG
-	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "lo16(S+A)=%x\t", val);
-#  endif
-	    *dest16 = val;	/* S + A */
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "lo16(S+A)=%x\n", val);
+#endif
+	    *dest16 = val;
 	    ppc_flush_icache(dest16);
 	}
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16);
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
 	break;
+
     case R_PPC_ADDR16_HA:	/* 6 */
 	dest16 = (unsigned short *)(secp + rel->r_offset);
 #if LOADERDEBUG
-	dest32 = (unsigned int *)(dest16 - 1);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_PPC_ADDR16_HA\t");
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest16=%x\t", dest16);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16);
-#  endif
+#endif
 	{
 	    unsigned short val;
 	    unsigned short loval;
 
-	    /* S + A */
-	    val = ((symval + (rel->r_addend)) & 0xffff0000) >> 16;
-	    loval = (symval + (rel->r_addend)) & 0xffff;
+	    val = ((symval + rel->r_addend) & 0xffff0000) >> 16;
+	    loval = (symval + rel->r_addend) & 0xffff;
 	    if (loval & 0x8000) {
 		/*
 		 * This is hi16(), instead of uhi16(). Because of this,
@@ -2483,16 +2500,13 @@
 		val++;
 	    }
 #if LOADERDEBUG
-	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "hi16(S+A)=%x\t", val);
-#  endif
-	    *dest16 = val;	/* S + A */
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "hi16(S+A)=%x\n", val);
+#endif
+	    *dest16 = val;
 	    ppc_flush_icache(dest16);
 	}
-#if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest16=%8.8x\t", *dest16);
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
 	break;
+
     case R_PPC_REL24:		/* 10 */
 	dest32 = (unsigned int *)(secp + rel->r_offset);
 #if LOADERDEBUG
@@ -2502,42 +2516,42 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%x\t", dest32);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "rel->r_addend=%x\t", rel->r_addend);
-#  endif
+#endif
 	resetDest32(p, dest32);
 	{
 	    unsigned long val;
 
-	    /* S + A - P >> 2 */
-	    val = ((symval + (rel->r_addend) - (Elf_Addr) dest32));
+	    val = symval + rel->r_addend - (Elf_Addr) dest32;
 #if LOADERDEBUG
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A-P=%x\t", val);
-#  endif
+#endif
 	    val = val >> 2;
-	    if ((val & 0x3f000000) != 0x3f000000 &&
-		(val & 0x3f000000) != 0x00000000) {
+	    if (((val & 0x3f000000) != 0x3f000000) &&
+		((val & 0x3f000000) != 0x00000000)) {
 #if LOADERDEBUG
 		LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
 			"R_PPC_REL24 offset %x too large\n", val << 2);
-#  endif
+#endif
 		symval = ElfGetPLTAddr(elffile, ELF_R_SYM(rel->r_info));
-		val = ((symval + (rel->r_addend) - (Elf_Addr) dest32));
+		val = symval + rel->r_addend - (Elf_Addr) dest32;
 #if LOADERDEBUG
 		LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "PLT offset is %x\n", val);
-#  endif
+#endif
 		val = val >> 2;
-		if ((val & 0x3f000000) != 0x3f000000 &&
-		    (val & 0x3f000000) != 0x00000000)
+		if (((val & 0x3f000000) != 0x3f000000) &&
+		    ((val & 0x3f000000) != 0x00000000))
 		    FatalError("R_PPC_REL24 PLT offset %x too large\n",
 			       val << 2);
 	    }
 	    val &= 0x00ffffff;
-	    (*dest32) |= (val << 2);	/* The address part is always 0 */
+	    *dest32 |= val << 2;
 	    ppc_flush_icache(dest32);
 	}
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
-#  endif
+#endif
 	break;
+
     case R_PPC_REL32:		/* 26 */
 	dest32 = (unsigned int *)(secp + rel->r_offset);
 #if LOADERDEBUG
@@ -2546,28 +2560,22 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%x\t", symval);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "r_addend=%x\t", rel->r_addend);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%8.8x\t", dest32);
-#  endif
-	resetDest32(p, dest32);
+#endif
 	{
 	    unsigned long val;
 
-	    /* S + A - P */
-	    val = symval + (rel->r_addend);
-	    val -= *dest32;
-#if LOADERDEBUG
-	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val);
-	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-			"S+A-P=%x\t", val + (*dest32) - (Elf_Addr) dest32);
-#  endif
-	    *dest32 = val + (*dest32) - (Elf_Addr) dest32;	/* S + A - P */
+	    val = symval + rel->r_addend;
+	    *dest32 = val - (Elf_Addr) dest32;
 	    ppc_flush_icache(dest32);
-	}
 #if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8x\n", *dest32);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A=%x\t", val);
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "S+A-P=%x\n", *dest32);
 #endif
+	}
 	break;
 # endif	/* PowerMAX_OS */
 #endif /* __powerpc__ */
+
 #ifdef __sparc__
     case R_SPARC_NONE:		/*  0 */
 	break;
@@ -2601,47 +2609,74 @@
 	*dest64 = symval;
 	break;
 
-    case R_SPARC_DISP8:	/*  4 */
+    case R_SPARC_DISP8:		/*  4 */
 	dest8 = (unsigned char *)(secp + rel->r_offset);
-	resetDest8(p, dest8);
 	symval += rel->r_addend;
-	*dest8 = (symval - (Elf_Addr) dest8);
+	*dest8 = symval - (Elf_Addr) dest8;
 	break;
 
     case R_SPARC_DISP16:	/*  5 */
 	dest16 = (unsigned short *)(secp + rel->r_offset);
-	resetDest16(p, dest16);
 	symval += rel->r_addend;
-	*dest16 = (symval - (Elf_Addr) dest16);
+	*dest16 = symval - (Elf_Addr) dest16;
 	break;
 
     case R_SPARC_DISP32:	/*  6 */
 	dest32 = (unsigned int *)(secp + rel->r_offset);
-	resetDest32(p, dest32);
 	symval += rel->r_addend;
-	*dest32 = (symval - (Elf_Addr) dest32);
+	*dest32 = symval - (Elf_Addr) dest32;
 	break;
 
     case R_SPARC_WDISP30:	/*  7 */
 	dest32 = (unsigned int *)(secp + rel->r_offset);
-	resetDest32(p, dest32);
 	symval += rel->r_addend;
-	*dest32 = ((*dest32 & 0xc0000000) |
-		   (((symval - (Elf_Addr) dest32) >> 2) & 0x3fffffff));
+	*dest32 = (*dest32 & ~0x3fffffff) |
+		  (((symval - (Elf_Addr) dest32) >> 2) & 0x3fffffff);
+	break;
+
+    case R_SPARC_WDISP22:	/*  8 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x003fffff) |
+		   (((symval - (Elf_Addr) dest32) >> 2) & 0x003fffff);
 	break;
 
     case R_SPARC_HI22:		/*  9 */
 	dest32 = (unsigned int *)(secp + rel->r_offset);
-	resetDest32(p, dest32);
 	symval += rel->r_addend;
-	*dest32 = (*dest32 & 0xffc00000) | (symval >> 10);
+	*dest32 = (*dest32 & ~0x003fffff) | ((symval >> 10) & 0x003fffff);
+	break;
+
+    case R_SPARC_22:		/* 10 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x003fffff) | (symval & 0x003fffff);
+	break;
+
+    case R_SPARC_13:		/* 11 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x001fff) | (symval & 0x001fff);
 	break;
 
     case R_SPARC_LO10:		/* 12 */
 	dest32 = (unsigned int *)(secp + rel->r_offset);
-	resetDest32(p, dest32);
 	symval += rel->r_addend;
-	*dest32 = (*dest32 & ~0x3ff) | (symval & 0x3ff);
+	*dest32 = (*dest32 & ~0x001fff) | (symval & 0x03ff);
+	break;
+
+    case R_SPARC_PC10:		/* 16 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x001fff) |
+		   ((symval - (Elf_Addr) dest32) & 0x03ff);
+	break;
+
+    case R_SPARC_PC22:		/* 17 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x03fffff) |
+		   (((symval - (Elf_Addr) dest32) >> 10) & 0x03fffff);
 	break;
 
     case R_SPARC_COPY:		/* 19 */
@@ -2650,7 +2685,7 @@
 	 * code into a final driver object file.
 	 */
 	ErrorF("Elf_RelocateEntry():"
-	       "  Copy relocs not supported on Sparc.\n");
+	       "  Copy relocs not supported on SPARC.\n");
 	break;
 
     case R_SPARC_JMP_SLOT:	/* 21 */
@@ -2678,19 +2713,122 @@
 
     case R_SPARC_RELATIVE:	/* 22 */
 	dest64 = (unsigned long *)(secp + rel->r_offset);
-	*dest64 = (unsigned long)secp + rel->r_addend;
+	resetDest64(p, dest64);
+	*dest64 += (unsigned long)secp + rel->r_addend;
+	break;
+
+    case R_SPARC_10:		/* 30 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x03ff) | (symval & 0x03ff);
+	break;
+
+    case R_SPARC_11:		/* 31 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x07ff) | (symval & 0x07ff);
 	break;
 
-#ifdef __sparcv9
     case R_SPARC_OLO10:		/* 33 */
 	dest32 = (unsigned int *)(secp + rel->r_offset);
-	resetDest32(p, dest32); /* Not really needed. */
-	symval += rel->r_addend
-	    + (((ELF64_R_TYPE(rel->r_info) >> 8) ^ 0x800000) - 0x800000);
-	*dest32 = (*dest32 & ~0x3ff) | (symval & 0x3ff);
+	symval = ((symval + rel->r_addend) & 0x03ff) +
+		  (ELF64_R_TYPE(rel->r_info) >> 8);
+	*dest32 = (*dest32 & ~0x1fff) | (symval & 0x1fff);
+	break;
+
+    case R_SPARC_HH22:		/* 34 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x003fffff) |
+		  /* Avoid warnings on SPARC32 */
+		  (((symval >> 21) >> 21) & 0x003fffff);
+	break;
+
+    case R_SPARC_HM10:		/* 35 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x001fff) |
+		  /* Avoid warnings on SPARC32 */
+		  (((symval >> 16) >> 16) & 0x03ff);
+	break;
+
+    case R_SPARC_LM22:		/* 36 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x003fffff) | ((symval >> 10) & 0x003fffff);
+	break;
+
+    case R_SPARC_7:		/* 43 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x007f) | (symval & 0x007f);
+	break;
+
+    case R_SPARC_5:		/* 44 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x001f) | (symval & 0x001f);
+	break;
+
+    case R_SPARC_6:		/* 45 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x003f) | (symval & 0x003f);
+	break;
+
+    case R_SPARC_HIX22:		/* 48 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x003fffff) |
+		  (((symval ^ ~0L) >> 10) & 0x003fffff);
+	break;
+
+    case R_SPARC_LOX10:		/* 49 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x03ff) | 0x001c00 | (symval & 0x03ff);
+	break;
+
+    case R_SPARC_H44:		/* 50 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x003fffff) | ((symval >> 22) & 0x003fffff);
+	break;
+
+    case R_SPARC_M44:		/* 51 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x03ff) | ((symval >> 12) & 0x03ff);
+	break;
+
+    case R_SPARC_L44:		/* 52 */
+	dest32 = (unsigned int *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	*dest32 = (*dest32 & ~0x1fff) | (symval & 0x0fff);
+	break;
+
+    case R_SPARC_UA64:		/* 54 */
+	dest64 = (unsigned long *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	/* Avoid warnings on SPARC32 */
+	((unsigned char *)dest64)[0] = (unsigned char)((symval >> 28) >> 28);
+	((unsigned char *)dest64)[1] = (unsigned char)((symval >> 24) >> 24);
+	((unsigned char *)dest64)[2] = (unsigned char)((symval >> 20) >> 20);
+	((unsigned char *)dest64)[3] = (unsigned char)((symval >> 16) >> 16);
+	((unsigned char *)dest64)[4] = (unsigned char)(symval >> 24);
+	((unsigned char *)dest64)[5] = (unsigned char)(symval >> 16);
+	((unsigned char *)dest64)[6] = (unsigned char)(symval >> 8);
+	((unsigned char *)dest64)[7] = (unsigned char)(symval);
+	break;
+
+    case R_SPARC_UA16:		/* 55 */
+	dest16 = (unsigned short *)(secp + rel->r_offset);
+	symval += rel->r_addend;
+	((unsigned char *)dest16)[0] = (unsigned char)(symval >> 8);
+	((unsigned char *)dest16)[1] = (unsigned char)(symval);
 	break;
-#endif
 #endif /*__sparc__*/
+
 #ifdef __ia64__
     case R_IA64_NONE:
 	break;
@@ -2713,8 +2851,8 @@
 	    dest128 = (unsigned long *)(secp + (rel->r_offset & ~3));
 #if LOADERDEBUG
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-		     "%s %s\t", ELF_R_TYPE(rel->r_info) == R_IA64_LTOFF22 ?
-		     "R_IA64_LTOFF22" : "R_IA64_LTOFF_FPTR22",
+		     "%s %s\t", ELF_R_TYPE(rel->r_info) == R_IA64_LTOFF_FPTR22 ?
+		     "R_IA64_LTOFF_FPTR22" : "R_IA64_LTOFF22[X]",
 		     ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)));
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%lx\t", secp);
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
@@ -2765,9 +2903,9 @@
 	    resetDest128(p, dest128);
 	    if (rel->r_addend)
 		FatalError("\nAddend for PCREL21B not supported\n");
-	    if (((long *)symval)[1] == (long)elffile->got
-		&& (((unsigned long)dest128 - ((unsigned long *)symval)[0]) +
-		    0x2000000 < 0x4000000)) {
+	    if ((((long *)symval)[1] == (long)elffile->got) &&
+		(((unsigned long)dest128 - ((unsigned long *)symval)[0] +
+		    0x2000000) < 0x4000000)) {
 		/* We can save the travel through PLT */
 		IA64InstallReloc(dest128, rel->r_offset & 3, IA64_OPND_TGT25C,
 				 ((unsigned long *)symval)[0] -
@@ -2850,7 +2988,6 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest64=%lx\n", dest64);
 #endif
-	resetDest64(p, dest64);
 	*dest64 = symval + rel->r_addend - (unsigned long)dest64;
 	break;
 
@@ -2888,8 +3025,8 @@
 #endif
 
 	    if (gp_offset << 42 >> 42 != gp_offset) {
-		/* Offset is too large for LTOFF22X, 
-		 * fallback to using GOT lookup, e.g. LTOFF22. 
+		/* Offset is too large for LTOFF22X,
+		 * fallback to using GOT lookup, e.g. LTOFF22.
 		 * Note: LDXMOV will fail the same test and will be ignored. */
 
 #if LOADERDEBUG
@@ -2959,9 +3096,9 @@
 		LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
 		LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest128=%lx\t", dest128);
 		LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-			"slot=%d\n", rel->r_offset & 3);
+			"slot=%d\t", rel->r_offset & 3);
 		LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
-			"offset=%ld\n", gp_offset);
+			"offset=%ld\t", gp_offset);
 		LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL,
 			"*dest128=[%016lx%016lx]\n", dest128[1], dest128[0]);
 #endif
@@ -2983,25 +3120,22 @@
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "dest32=%x\t", dest32);
 #endif
 	resetDest32(p, dest32);
-	*dest32 = symval + (*dest32);	/* S + A */
+	*dest32 = symval + *dest32;
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8lx\n", *dest32);
 #endif
 #if defined(__NetBSD__)
-            arm_sync_icache(dest32, 4);
+	arm_sync_icache(dest32, 4);
 #endif
-
 	break;
 
     case R_ARM_REL32:
 	dest32 = (unsigned int *)(secp + rel->r_offset);
 #if LOADERDEBUG
 	{
-	    char *namestr;
+	    char *namestr = ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info));
 
-	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ARM_REL32 %s\t",
-		     namestr =
-		     ElfGetSymbolName(elffile, ELF_R_SYM(rel->r_info)));
+	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "R_ARM_REL32 %s\t", namestr);
 	    xf86loaderfree(namestr);
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "secp=%x\t", secp);
 	    LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "symval=%lx\t", symval);
@@ -3009,16 +3143,14 @@
 	}
 #endif
 	resetDest32(p, dest32);
-	*dest32 = symval + (*dest32) - (Elf_Addr) dest32;	/* S + A - P */
+	*dest32 = symval + *dest32 - (Elf_Addr) dest32;
 
 #if LOADERDEBUG
 	LoaderDebugMsg(LOADER_DEBUG_LOWLEVEL, "*dest32=%8.8lx\n", *dest32);
 #endif
 #if defined(__NetBSD__)
-            arm_sync_icache(dest32, 4);
+	arm_sync_icache(dest32, 4);
 #endif
-
-
 	break;
 
     case R_ARM_PC24:
@@ -3035,7 +3167,7 @@
 	    arm_flush_cache(dest32);
 #else
 #if defined(__NetBSD__)
-            arm_sync_icache(dest32, 4);
+	    arm_sync_icache(dest32, 4);
 #endif
 #endif
 	}
@@ -3384,7 +3516,7 @@
     ELFRelocPtr elf_reloc, tail;
     LDRModulePtr elfmod;
     int totalsize, maxalign, i;
-    unsigned short *secttable;
+    unsigned short *secttable = NULL;
     LOOKUP *pLookup;
 
     ldrCommons = 0;
@@ -3556,7 +3688,8 @@
 	ErrorF("Unable to allocate ELF sections\n");
 	return NULL;
     }
-#  if defined(linux) && defined(__ia64__) || defined(__OpenBSD__) || defined(__NetBSD__)
+#  if (defined(linux) && defined(__ia64__)) || \
+      defined(__OpenBSD__) || defined(__NetBSD__)
     {
 	unsigned long page_size = getpagesize();
 	unsigned long round;
@@ -3655,12 +3788,12 @@
 	    p = p->next;
 	    continue;
 	}
-	    
+
 #if LOADERDEBUG
 	{
 	    char *modname = _LoaderHandleToCanonicalName(p->file->handle);
 	    if (modname) {
-	        LoaderDebugMsg(LOADER_DEBUG_REPORT_RELOC,
+		LoaderDebugMsg(LOADER_DEBUG_REPORT_RELOC,
 			       "ResolvedSymbols: module %s, file %p sec %d, "
 			       "r_offset 0x%x, r_info %p (%s)\n",
 			       modname, (void *)p->file, p->secn,
@@ -3806,7 +3939,7 @@
     /*
      * Free the sections that were allocated.
      */
-#if !defined (DoMMAPedMerge)
+#if !defined(DoMMAPedMerge)
 # define CheckandFree(ptr,size)  if(ptr) xf86loaderfree(ptr)
 #else
 # define CheckandFree(ptr,size) if (ptr) munmap(ptr,size)
@@ -3922,7 +4055,7 @@
 	return NULL;
     else
 	elffile = (ELFModulePtr)modptr;
-	
+
     for (i = 1; i < elffile->numsh; i++) {
 	if (address >= (unsigned long)elffile->saddr[i] &&
 	    address <= (unsigned long)elffile->saddr[i] + SecSize(i)) {
@@ -3976,6 +4109,9 @@
 	if (syms[i].st_shndx != sectnum && !exe)
 	    continue;
 
+	if (syms[i].st_name == 0)
+	    continue;
+
 	switch (ELF_ST_TYPE(syms[i].st_info)) {
 	case STT_OBJECT:
 	case STT_FUNC:
@@ -3983,7 +4119,7 @@
 	    saddr = syms[i].st_value + (unsigned long)elffile->saddr[sectnum];
 	    diff = address - saddr;
 	    if (diff >= 0) {
-		if ((best && diff < bestDiff && syms[i].st_name > 0) || !best) {
+		if ((best && diff < bestDiff) || !best) {
 		    best = ElfGetString(elffile, syms[i].st_name);
 		    bestDiff = diff;
 		    bestAddr = saddr;
Index: xc/programs/Xserver/hw/xfree86/loader/hash.c
diff -u xc/programs/Xserver/hw/xfree86/loader/hash.c:1.29 xc/programs/Xserver/hw/xfree86/loader/hash.c:1.30
--- xc/programs/Xserver/hw/xfree86/loader/hash.c:1.29	Sat Apr  8 13:53:40 2006
+++ xc/programs/Xserver/hw/xfree86/loader/hash.c	Wed Jul  5 16:08:31 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/hash.c,v 1.29 2006/04/08 17:53:40 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/hash.c,v 1.30 2006/07/05 20:08:31 tsi Exp $ */
 
 /*
  *
@@ -369,11 +369,13 @@
 	scope = LOOKUP_SCOPE_GLOBAL;
 
     for (l = list; l->symName; l++) {
-	if ((exports && l == exports) || (moddata && l == moddata))
+	if (l == exports)
 	    continue;
 
 	i = xf86loadercalloc(1, sizeof(itemRec));
+	i->scope = scope;
 	if (exports && scope == LOOKUP_SCOPE_AUTO) {
+	    i->scope = LOOKUP_SCOPE_SELF;
 	    /* Check if the symbols is in the exports list. */
 	    for (s = exportedSymbols; *s; s++) {
 		if (strcmp(*s, l->symName) == 0) {
@@ -381,10 +383,6 @@
 		    break;
 		}
 	    }
-	    if (!*s)
-		i->scope = LOOKUP_SCOPE_SELF;
-	} else {
-	    i->scope = scope;
 	}
 	i->name = l->symName;
 	i->address = (char *)l->offset;
Index: xc/programs/Xserver/hw/xfree86/loader/loader.c
diff -u xc/programs/Xserver/hw/xfree86/loader/loader.c:1.80 xc/programs/Xserver/hw/xfree86/loader/loader.c:1.83
--- xc/programs/Xserver/hw/xfree86/loader/loader.c:1.80	Sat Apr  8 13:53:40 2006
+++ xc/programs/Xserver/hw/xfree86/loader/loader.c	Fri Aug 18 10:36:05 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.c,v 1.80 2006/04/08 17:53:40 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.c,v 1.83 2006/08/18 14:36:05 tsi Exp $ */
 
 /*
  * Copyright 1995-1998 by Metro Link, Inc.
@@ -722,6 +722,11 @@
 	new_size += pagesize;
     ret = (unsigned long)mmap(0, new_size, MMAP_PROT, MMAP_FLAGS, fd,
 			      new_off);
+#  if LOADERDEBUG
+    LoaderDebugMsg(LOADER_DEBUG_MEM,
+		   "mmap: new_off %lx, new_off_bias %lx, new_size %lu, ret %lx\n",
+		   new_off, new_off_bias, new_size, ret);
+#  endif
     if (ret == -1)
 	FatalError("mmap() failed: %s\n", strerror(errno));
     return (void *)(ret + new_off_bias);
@@ -1840,13 +1845,14 @@
 	    *errmaj = LDR_UNKTYPE;
 	if (errmin)
 	    *errmin = LDR_UNKTYPE;
+	close(fd);
 	return -1;
-    } else {
+    }
+
 #if LOADERDEBUG
-	LoaderDebugMsg(LOADER_DEBUG_FILES, "Module %s is type %d (%s)\n",
-		       module, modtype, loaderNames[modtype]);
+    LoaderDebugMsg(LOADER_DEBUG_FILES, "Module %s is type %d (%s)\n",
+		   module, modtype, loaderNames[modtype]);
 #endif
-    }
 
     tmp = _LoaderListPush();
     tmp->name = xf86loadermalloc(strlen(module) + 1);
@@ -1865,6 +1871,7 @@
 	    *errmaj = LDR_NOLOAD;
 	if (errmin)
 	    *errmin = LDR_NOLOAD;
+	close(fd);
 	return -1;
     }
 
@@ -2100,11 +2107,14 @@
 }
 
 unsigned long LoaderDebugLevel = 0;
+static unsigned long LoaderSaveDebugLevel = 0;
+static const char **LoaderDebugList = NULL;
+static int numLoaderDebugList = 0;
 
 void
 LoaderSetDebug(unsigned long level)
 {
-    LoaderDebugLevel = level;
+    LoaderSaveDebugLevel = LoaderDebugLevel = level;
 }
 
 void
@@ -2118,6 +2128,47 @@
     va_end(args);
 }
 
+static int
+LoaderDebugModuleInList(const char *module)
+{
+    int i;
+
+    /* If no list, debugging applies to all modules. */
+    if (!LoaderDebugList || !numLoaderDebugList)
+	return 1;
+
+    for (i = 0; i < numLoaderDebugList; i++)
+	if (LoaderDebugList[i] && strcmp(module, LoaderDebugList[i]) == 0)
+	    return 1;
+    return 0;
+}
+
+void
+LoaderDebugAddModule(const char *module)
+{
+    const char **l;
+
+    if (LoaderDebugList && LoaderDebugModuleInList(module))
+	return;
+
+    numLoaderDebugList++;
+    l = xrealloc(LoaderDebugList,
+		 numLoaderDebugList * sizeof(*LoaderDebugList));
+    if (l) {
+	l[numLoaderDebugList - 1] = module;
+	LoaderDebugList = l;
+    }
+}
+
+void
+LoaderDebugForModule(const char *module)
+{
+    if (LoaderDebugModuleInList(module))
+	LoaderDebugLevel = LoaderSaveDebugLevel;
+    else
+	LoaderDebugLevel = 0;
+}
+
 /*
  * The return value is the user-recognisable file name, and *path is set
  * to the name of a full path that can be used to open the executable file
Index: xc/programs/Xserver/hw/xfree86/loader/loader.h
diff -u xc/programs/Xserver/hw/xfree86/loader/loader.h:1.33 xc/programs/Xserver/hw/xfree86/loader/loader.h:1.34
--- xc/programs/Xserver/hw/xfree86/loader/loader.h:1.33	Thu Mar 16 11:50:34 2006
+++ xc/programs/Xserver/hw/xfree86/loader/loader.h	Tue Jun 27 14:43:59 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.h,v 1.33 2006/03/16 16:50:34 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loader.h,v 1.34 2006/06/27 18:43:59 dawes Exp $ */
 
 /*
  *
@@ -345,6 +345,7 @@
 
 extern unsigned long LoaderOptions;
 extern unsigned long LoaderDebugLevel;
+extern void LoaderDebugForModule(const char *module);
 
 /* Internal Functions */
 
Index: xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h
diff -u xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h:1.26 xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h:1.27
--- xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h:1.26	Sat Apr  8 13:53:40 2006
+++ xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h	Tue Jun 27 14:43:59 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h,v 1.26 2006/04/08 17:53:40 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loaderProcs.h,v 1.27 2006/06/27 18:43:59 dawes Exp $ */
 
 /*
  *
@@ -175,6 +175,7 @@
 void LoaderSetOptions(unsigned long);
 void LoaderClearOptions(unsigned long);
 void LoaderSetDebug(unsigned long);
+void LoaderDebugAddModule(const char *module);
 
 int LoaderPrintSymbol(unsigned long);
 
Index: xc/programs/Xserver/hw/xfree86/loader/loadmod.c
diff -u xc/programs/Xserver/hw/xfree86/loader/loadmod.c:1.79 xc/programs/Xserver/hw/xfree86/loader/loadmod.c:1.82
--- xc/programs/Xserver/hw/xfree86/loader/loadmod.c:1.79	Sat Mar 25 21:25:08 2006
+++ xc/programs/Xserver/hw/xfree86/loader/loadmod.c	Tue Jan 23 13:03:11 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loadmod.c,v 1.79 2006/03/26 02:25:08 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/loadmod.c,v 1.82 2007/01/23 18:03:11 tsi Exp $ */
 
 /*
  *
@@ -162,7 +162,7 @@
 PrintDiagnostics(const char *module, const char *what)
 {
 #ifdef linux
-    char procdev[] = "/proc/XXXXX/maps";
+    char *procdev = NULL;
     FILE *f = NULL;
     char buf[1024];
 #endif
@@ -173,7 +173,9 @@
     LoaderDebugMsg(LOADER_DEBUG_DIAGNOSTICS,
 		   "LoaderDiagnostics for %s of module %s\n", what, module);
 #ifdef linux
-    sprintf(procdev, "/proc/%d/maps", getpid());
+    xasprintf(procdev, "/proc/%d/maps", getpid());
+    if (!procdev)
+	return;
     f = fopen(procdev, "r");
     if (f) {
 	while (fgets(buf, sizeof(buf), f))
@@ -183,6 +185,7 @@
 	LoaderDebugMsg(LOADER_DEBUG_DIAGNOSTICS,
 		       "Cannot open %s: %s\n", procdev, strerror(errno));
     }
+    xfree(procdev);
 #endif
 }
 #endif
@@ -378,7 +381,7 @@
     const char **s, **stmp = NULL;
     const char *osname;
     const char *slash;
-    int oslen = 0, len;
+    int len;
     Bool indefault;
 
     if (subdirlist == NULL) {
@@ -390,7 +393,6 @@
     }
 
     LoaderGetOS(&osname, NULL, NULL, NULL);
-    oslen = strlen(osname);
 
     {
 	/* Count number of entries and check for invalid paths */
@@ -435,8 +437,9 @@
 		len++;
 	    } else
 		slash = "";
-	    len += oslen + 2;
-	    if (!(subdirs[i] = xalloc(len))) {
+	    /* Tack on the OS name. */
+	    xasprintf(&subdirs[i], "%s%s%s/", *s, slash, osname);
+	    if (!subdirs[i]) {
 		while (--i >= 0)
 		    xfree(subdirs[i]);
 		xfree(subdirs);
@@ -444,11 +447,17 @@
 		    xfree(tmp_subdirlist);
 		return NULL;
 	    }
-	    /* tack on the OS name */
-	    sprintf(subdirs[i], "%s%s%s/", *s, slash, osname);
 	    i++;
-	    /* path as given */
+	    /* The path as given. */
 	    subdirs[i] = xstrdup(*s);
+	    if (!subdirs[i]) {
+		while (--i >= 0)
+		    xfree(subdirs[i]);
+		xfree(subdirs);
+		if (tmp_subdirlist)
+		    xfree(tmp_subdirlist);
+		return NULL;
+	    }
 	    i++;
 	    s++;
 	    if (indefault && !s) {
@@ -1003,6 +1012,7 @@
 
     patterns = InitPatterns(patternlist);
     name = LoaderGetCanonicalName(module, patterns);
+    LoaderDebugForModule(name);
     noncanonical = (name && strcmp(module, name) != 0);
     if (noncanonical) {
 	xf86ErrorFVerb(3, " (%s)\n", name);
Index: xc/programs/Xserver/hw/xfree86/loader/os.c
diff -u xc/programs/Xserver/hw/xfree86/loader/os.c:1.7 xc/programs/Xserver/hw/xfree86/loader/os.c:1.8
--- xc/programs/Xserver/hw/xfree86/loader/os.c:1.7	Tue Jul 19 10:42:26 2005
+++ xc/programs/Xserver/hw/xfree86/loader/os.c	Mon Jun 26 20:52:49 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/os.c,v 1.7 2005/07/19 14:42:26 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/os.c,v 1.8 2006/06/27 00:52:49 dawes Exp $ */
 
 /*
  * Copyright (c) 1999-2002 by The XFree86 Project, Inc.
@@ -56,6 +56,8 @@
 
 #if defined(__linux__)
 #define OSNAME "linux"
+#elif defined(__DragonFly__)
+#define OSNAME "dragonfly"
 #elif defined(__FreeBSD__)
 #define OSNAME "freebsd"
 #elif defined(__NetBSD__)
Index: xc/programs/Xserver/hw/xfree86/loader/xf86sym.c
diff -u xc/programs/Xserver/hw/xfree86/loader/xf86sym.c:1.260 xc/programs/Xserver/hw/xfree86/loader/xf86sym.c:1.267
--- xc/programs/Xserver/hw/xfree86/loader/xf86sym.c:1.260	Mon Mar 20 22:56:26 2006
+++ xc/programs/Xserver/hw/xfree86/loader/xf86sym.c	Tue May 22 12:49:47 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/xf86sym.c,v 1.260 2006/03/21 03:56:26 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/loader/xf86sym.c,v 1.267 2007/05/22 16:49:47 tsi Exp $ */
 
 /*
  *
@@ -23,7 +23,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -105,7 +105,7 @@
 #include "xf86_ansic.h"
 #include "xisb.h"
 #include "vbe.h"
-#ifndef __OpenBSD__
+#if defined(__sparc__)
 #include "xf86sbusBus.h"
 #endif
 #include "compiler.h"
@@ -149,7 +149,11 @@
 extern void *__remqu(long, long);
 #endif
 
-#if defined(__sparc__) && defined(__FreeBSD__)
+#undef NO_HARD_QUAD
+#if defined(CSRG_BASED) && defined(__sparc__) && defined(__GNUC__) && \
+    ((__GNUC__ > 3) || ((__GNUC__ == 3) && (__GNUC_MINOR__ >= 2)) && \
+    (defined(__arch64__) || defined(__sparcv9) || defined(__sparcv9__)))
+#define NO_HARD_QUAD
 extern float _Qp_qtos(unsigned int *);
 extern double _Qp_qtod(unsigned int *);
 extern unsigned long long _Qp_qtoux(unsigned int *);
@@ -231,10 +235,6 @@
 #pragma weak __xtoull
 #endif
 
-#if defined(__arm__) && defined(__linux__)
-#include <sys/io.h>
-#endif
-
 #if defined(__powerpc__) && (defined(Lynx) || defined(linux))
 void _restf14();
 void _restf17();
@@ -263,8 +263,9 @@
 void _savef28();
 void _savef29();
 
-/* even if we compile without -DNO_INLINE we still provide
- * the usual port i/o functions for module use
+/*
+ * Even if we compile without -DNO_INLINE we still provide
+ * the usual port i/o functions for module use.
  */
 
 extern volatile unsigned char *ioBase;
@@ -284,6 +285,14 @@
 extern unsigned short ldw_brx(volatile unsigned char *, int);
 #endif
 
+/*
+ * For propolice/gcc stack protector.
+ */
+extern long __guard[8];
+extern void __stack_smash_handler(char func[], int damaged);
+#pragma weak __guard
+#pragma weak __stack_smash_handler
+
 /* XFree86 things */
 
 LOOKUP xfree86LookupTab[] = {
@@ -663,7 +672,7 @@
     SYMFUNC(xf86AddModuleInfo)
     SYMFUNC(xf86DeleteModuleInfo)
 
-#if defined(__sparc__) && !defined(__OpenBSD__)
+#if defined(__sparc__)
     /* xf86sbusBus.c */
     SYMFUNC(xf86ParseSbusBusString)
     SYMFUNC(xf86CompareSbusBusString)
@@ -677,7 +686,12 @@
     SYMFUNC(xf86UnmapSbusMem)
     SYMFUNC(xf86SbusHideOsHwCursor)
     SYMFUNC(xf86SbusSetOsHwCursorCmap)
+    SYMFUNC(xf86SbusSetOsHwCursorImage)
+    SYMFUNC(xf86SbusSetOsHwCursor)
+    SYMFUNC(xf86SbusSetOsHwCursorPosition)
+    SYMFUNC(xf86SbusSetOsHwCursorHotSpot)
     SYMFUNC(xf86SbusHandleColormaps)
+    SYMFUNC(xf86SbusSaveScreen)
     SYMFUNC(sparcPromInit)
     SYMFUNC(sparcPromClose)
     SYMFUNC(sparcPromGetProperty)
@@ -1015,6 +1029,7 @@
     SYMFUNC(xf86pow)
     SYMFUNC(xf86printf)
     SYMFUNC(xf86qsort)
+    SYMFUNC(xf86rand)
     SYMFUNC(xf86read)
     SYMFUNC(xf86realloc)
     SYMFUNC(xf86remove)
@@ -1283,15 +1298,19 @@
     SYMFUNC(inl)
 #endif
 
-#ifdef __FreeBSD__
-#if defined(__sparc__)
+#if defined(NO_HARD_QUAD)
     SYMFUNC(_Qp_qtos)
     SYMFUNC(_Qp_qtod)
     SYMFUNC(_Qp_qtoux)
     SYMFUNC(_Qp_uitoq)
     SYMFUNC(_Qp_dtoq)
 #endif
-#endif
+
+    /*
+     * For propolice/gcc stack protector.
+     */
+    SYMFUNC(__stack_smash_handler)
+    SYMVAR(__guard)
 
     /* Some variables. */
 
Index: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h:3.58 xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h:3.59
--- xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h:3.58	Thu Sep 22 08:32:32 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h	Sat Sep  2 12:44:21 2006
@@ -64,7 +64,7 @@
  *
  */
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h,v 3.58 2005/09/22 12:32:32 alanh Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_OSproc.h,v 3.59 2006/09/02 16:44:21 dawes Exp $ */
 
 #ifndef _XF86_OSPROC_H
 #define _XF86_OSPROC_H
@@ -221,7 +221,7 @@
 extern Bool xf86VTSwitchAway(void);
 extern Bool xf86VTSwitchTo(void);
 extern void xf86VTRequest(int sig);
-extern int xf86ProcessArgument(int, char **, int);
+extern int xf86ProcessArgument(int, const char **, int);
 extern void xf86UseMsg(void);
 extern void xf86SetKbdLeds(int);
 extern int xf86GetKbdLeds(void);
Index: xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h:3.63 xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h:3.64
--- xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h:3.63	Sat Apr  8 14:30:26 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h	Sun Dec 10 10:47:46 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h,v 3.63 2006/04/08 18:30:26 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_ansic.h,v 3.64 2006/12/10 15:47:46 tsi Exp $ */
 /*
  * Copyright 1997-2004 by The XFree86 Project, Inc
  * All rights reserved.
@@ -49,6 +49,9 @@
 #ifndef _XF86_ANSIC_H
 #define _XF86_ANSIC_H
 
+#include <X11/Xmd.h>
+#include <X11/Xdefs.h>
+
 /* Handle <stdarg.h> */
 
 #ifndef IN_MODULE
@@ -173,6 +176,9 @@
 #ifndef MAXLONG
 #define MAXLONG LONG_MAX
 #endif
+#ifndef RAND_MAX
+#define RAND_MAX INT_MAX
+#endif
 
 #endif /* (XFree86LOADER && IN_MODULE) || NEED_XF86_TYPES */
 
@@ -269,6 +275,7 @@
 extern double xf86pow(double,double);
 extern void xf86qsort(void*, xf86size_t, xf86size_t, 
                       int(*)(const void*, const void*));
+extern int xf86rand(void);
 extern void* xf86realloc(void*,xf86size_t);
 extern int xf86remove(const char*);
 extern int xf86rename(const char*,const char*);
@@ -380,6 +387,7 @@
 #else /* (XFree86LOADER && IN_MODULE) || NEED_XF86_PROTOTYPES */
 #include <unistd.h>
 #include <stdio.h>
+#include <stdlib.h>
 #include <sys/ioctl.h>
 #include <errno.h>
 #include <fcntl.h>
Index: xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h:3.68 xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h:3.69
--- xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h:3.68	Sat Jan 28 21:19:53 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h	Sun Dec 10 10:47:46 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h,v 3.68 2006/01/29 02:19:53 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86_libc.h,v 3.69 2006/12/10 15:47:46 tsi Exp $ */
 /*
  * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
@@ -193,30 +193,30 @@
  * They start at 1000 just so they don't match real errnos at all
  */
 #define xf86_UNKNOWN		1000
-#define xf86_EACCES		1001
-#define xf86_EAGAIN		1002
-#define xf86_EBADF		1003
-#define xf86_EEXIST		1004
-#define xf86_EFAULT		1005
-#define xf86_EINTR		1006
-#define xf86_EINVAL		1007
-#define xf86_EISDIR		1008
-#define xf86_ELOOP		1009
-#define xf86_EMFILE		1010
-#define xf86_ENAMETOOLONG	1011
-#define xf86_ENFILE		1012
-#define xf86_ENOENT		1013
-#define xf86_ENOMEM		1014
-#define xf86_ENOSPC		1015
-#define xf86_ENOTDIR		1016
-#define xf86_EPIPE		1017
-#define xf86_EROFS		1018
-#define xf86_ETXTBSY		1019
-#define xf86_ENOTTY		1020
-#define xf86_ENOSYS		1021
-#define xf86_EBUSY		1022
-#define xf86_ENODEV		1023
-#define xf86_EIO		1024
+#define XF86_EACCES		1001
+#define XF86_EAGAIN		1002
+#define XF86_EBADF		1003
+#define XF86_EEXIST		1004
+#define XF86_EFAULT		1005
+#define XF86_EINTR		1006
+#define XF86_EINVAL		1007
+#define XF86_EISDIR		1008
+#define XF86_ELOOP		1009
+#define XF86_EMFILE		1010
+#define XF86_ENAMETOOLONG	1011
+#define XF86_ENFILE		1012
+#define XF86_ENOENT		1013
+#define XF86_ENOMEM		1014
+#define XF86_ENOSPC		1015
+#define XF86_ENOTDIR		1016
+#define XF86_EPIPE		1017
+#define XF86_EROFS		1018
+#define XF86_ETXTBSY		1019
+#define XF86_ENOTTY		1020
+#define XF86_ENOSYS		1021
+#define XF86_EBUSY		1022
+#define XF86_ENODEV		1023
+#define XF86_EIO		1024
 
 /* sysv IPV */
 /* xf86shmget() */
@@ -379,6 +379,8 @@
 #define perror(ccp)		xf86perror(ccp)
 #undef pow
 #define pow(d1,d2)		xf86pow(d1,d2)
+#undef rand
+#define rand			xf86rand
 #undef realloc
 #define realloc(vp,I)		xf86realloc(vp,I)
 #undef remove
@@ -658,53 +660,53 @@
 #define puts(s)			xf86fputs(s, xf86stdout)
 
 #undef EACCES
-#define EACCES		xf86_EACCES
+#define EACCES		XF86_EACCES
 #undef EAGAIN
-#define EAGAIN		xf86_EAGAIN
+#define EAGAIN		XF86_EAGAIN
 #undef EBADF
-#define EBADF		xf86_EBADF
+#define EBADF		XF86_EBADF
 #undef EEXIST
-#define EEXIST		xf86_EEXIST
+#define EEXIST		XF86_EEXIST
 #undef EFAULT
-#define EFAULT		xf86_EFAULT
+#define EFAULT		XF86_EFAULT
 #undef EINTR
-#define EINTR		xf86_EINTR
+#define EINTR		XF86_EINTR
 #undef EINVAL
-#define EINVAL		xf86_EINVAL
+#define EINVAL		XF86_EINVAL
 #undef EISDIR
-#define EISDIR		xf86_EISDIR
+#define EISDIR		XF86_EISDIR
 #undef ELOOP
-#define ELOOP		xf86_ELOOP
+#define ELOOP		XF86_ELOOP
 #undef EMFILE
-#define EMFILE		xf86_EMFILE
+#define EMFILE		XF86_EMFILE
 #undef ENAMETOOLONG
-#define ENAMETOOLONG	xf86_ENAMETOOLONG
+#define ENAMETOOLONG	XF86_ENAMETOOLONG
 #undef ENFILE
-#define ENFILE		xf86_ENFILE
+#define ENFILE		XF86_ENFILE
 #undef ENOENT
-#define ENOENT		xf86_ENOENT
+#define ENOENT		XF86_ENOENT
 #undef ENOMEM
-#define ENOMEM		xf86_ENOMEM
+#define ENOMEM		XF86_ENOMEM
 #undef ENOSPC
-#define ENOSPC		xf86_ENOSPC
+#define ENOSPC		XF86_ENOSPC
 #undef ENOTDIR
-#define ENOTDIR		xf86_ENOTDIR
+#define ENOTDIR		XF86_ENOTDIR
 #undef EPIPE
-#define EPIPE		xf86_EPIPE
+#define EPIPE		XF86_EPIPE
 #undef EROFS
-#define EROFS		xf86_EROFS
+#define EROFS		XF86_EROFS
 #undef ETXTBSY
-#define ETXTBSY		xf86_ETXTBSY
+#define ETXTBSY		XF86_ETXTBSY
 #undef ENOTTY
-#define ENOTTY		xf86_ENOTTY
+#define ENOTTY		XF86_ENOTTY
 #undef ENOSYS
-#define ENOSYS		xf86_ENOSYS
+#define ENOSYS		XF86_ENOSYS
 #undef EBUSY
-#define EBUSY		xf86_EBUSY
+#define EBUSY		XF86_EBUSY
 #undef ENODEV
-#define ENODEV		xf86_ENODEV
+#define ENODEV		XF86_ENODEV
 #undef EIO
-#define EIO		xf86_EIO
+#define EIO		XF86_EIO
 
 /* IPC stuff */
 #undef SHM_RDONLY
Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile:3.70 xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile:3.72
--- xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile:3.70	Fri Oct 14 11:17:00 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile	Sun Mar 11 13:38:02 2007
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile,v 3.70 2005/10/14 15:17:00 tsi Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/Imakefile,v 3.72 2007/03/11 17:38:02 tsi Exp $
 /*
  * Copyright (c) 1994-2004 by The XFree86 Project, Inc.
  * All rights reserved.
@@ -147,7 +147,9 @@
 KMODOBJ = kmod_noop.o
 #endif
 
-#if defined(i386Architecture) || defined(ia64Architecture)
+#if defined(i386Architecture) || \
+    defined(ia64Architecture) || \
+    defined(AMD64Architecture)
 RES_SRC=stdResource.c
 RES_OBJ=stdResource.o
 #else
@@ -188,14 +190,23 @@
 #error Unknown architecture !
 #endif
 
+/*
+ * This is actually predicated on ARCH_PCI_INIT not being #define'd to
+ * sparcPciInit in bus/Pci.h
+ */
+#if !defined(OpenBSDArchitecture) || !defined(SparcArchitecture)
+PCI_SRC = stdPci.c
+PCI_OBJ = stdPci.o
+#endif
+
 SRCS = bsd_init.c $(VIDEO_SRC) bsd_io.c bsd_VTsw.c \
        libc_wrapper.c $(IOPERM_SRC) std_kbdEv.c posix_tty.c $(MOUSESRC) \
-       $(RES_SRC) stdPci.c vidmem.c $(JOYSTICK_SRC) sigio.c $(APMSRC) \
+       $(RES_SRC) $(PCI_SRC) vidmem.c $(JOYSTICK_SRC) sigio.c $(APMSRC) \
        $(AXP_SRC) $(KMODSRC) $(AGP_SRC) $(KBDSRC)
 
 OBJS = bsd_init.o $(VIDEO_OBJ) bsd_io.o bsd_VTsw.o \
        libc_wrapper.o $(IOPERM_OBJ) std_kbdEv.o posix_tty.o $(MOUSEOBJ) \
-       $(RES_OBJ) stdPci.o vidmem.o $(JOYSTICK_OBJ) sigio.o $(APMOBJ) \
+       $(RES_OBJ) $(PCI_OBJ) vidmem.o $(JOYSTICK_OBJ) sigio.o $(APMOBJ) \
        $(AXP_OBJ) $(KMODOBJ) $(AGP_OBJ) $(KBDOBJ)
 
 INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I$(SERVERSRC)/include \
@@ -248,7 +259,9 @@
 LinkSourceFile(posix_tty.c,../shared)
 LinkSourceFile(libc_wrapper.c,../shared)
 LinkSourceFile(stdResource.c,../shared)
+#if !defined(OpenBSDArchitecture) || !defined(SparcArchitecture)
 LinkSourceFile(stdPci.c,../shared)
+#endif
 LinkSourceFile(vidmem.c,../shared)
 LinkSourceFile(sigio.c,../shared)
 LinkSourceFile(kmod_noop.c,../shared)
Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c:3.25 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c:3.28
--- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c:3.25	Mon Jan  9 10:00:19 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c	Sat Sep  2 12:44:21 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c,v 3.25 2006/01/09 15:00:19 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_init.c,v 3.28 2006/09/02 16:44:21 dawes Exp $ */
 /*
  * Copyright 1992 by Rich Murphey <Rich@Rice.edu>
  * Copyright 1993 by David Wexelblat <dwex@goblin.org>
@@ -242,8 +242,8 @@
 	     * switching hack.
 	     */
 	    if (xf86Info.consType == SYSCONS) {
-		uname(&uts);
-		if (strcmp(uts.sysname, "FreeBSD") == 0) {
+		if ((uname(&uts) >= 0) && 
+		    (strcmp(uts.sysname, "FreeBSD") == 0)) {
 		    i = atof(uts.release) * 100;
 		    if (i < 310)
 			needSwitchToVT1 = TRUE;
@@ -300,7 +300,6 @@
 #endif /* SYSCONS_SUPPORT || PCVT_SUPPORT */
 #ifdef WSCONS_SUPPORT
 	case WSCONS:
-	    fprintf(stderr, "xf86OpenConsole\n");
 	    /* xf86Info.consoleFd = open("/dev/wskbd0", 0); */
    	    break; 
 #endif
@@ -598,27 +597,35 @@
 {
     int fd = -1;
     int mode = WSDISPLAYIO_MODE_MAPPED;
-    int i;
     char ttyname[16];
 
+#if defined(__NetBSD__)
+    int i;
+
     /* XXX Is this ok? */
     for (i = 0; i < 8; i++) {
-#if defined(__NetBSD__)
 	sprintf(ttyname, "/dev/ttyE%d", i);
-#elif defined(__OpenBSD__)
-	sprintf(ttyname, "/dev/ttyC%d", i);
-#endif
 	if ((fd = open(ttyname, 2)) != -1)
 	    break;
     }
-    if (fd != -1) {
+#elif defined(__OpenBSD__)
+    const char *c1, *c2;
+
+    for (c1 = "CDEFGHIJ"; *c1 && (fd < 0); c1++) {
+	for (c2 = "0123456789ab"; *c2 && (fd < 0); c2++) {
+	    sprintf(ttyname, "/dev/tty%c%c", *c1, *c2);
+	    fd = open(ttyname, O_RDWR);
+	}
+    }
+#endif
+    if (fd > -1) {
 	if (ioctl(fd, WSDISPLAYIO_SMODE, &mode) < 0) {
 	    FatalError("%s: WSDISPLAYIO_MODE_MAPPED failed (%s)\n%s",
 		       "xf86OpenConsole", strerror(errno),
 		       CHECK_DRIVER_MSG);
 	}
 	xf86Info.consType = WSCONS;
-	xf86Msg(X_PROBED, "Using wscons driver\n");
+	xf86Msg(X_PROBED, "Using wscons driver with %s\n", ttyname);
     }
     return fd;
 }
@@ -629,7 +636,7 @@
 xf86CloseConsole()
 {
 #if defined(SYSCONS_SUPPORT) || defined(PCVT_SUPPORT)
-    struct vt_mode   VT;
+    struct vt_mode VT;
 #endif
 
     switch (xf86Info.consType)
@@ -686,7 +693,7 @@
 }
 
 int
-xf86ProcessArgument(int argc, char *argv[], int i)
+xf86ProcessArgument(int argc, const char *argv[], int i)
 {
 	/*
 	 * Keep server from detaching from controlling tty.  This is useful 
Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c:1.10 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c:1.11
--- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c:1.10	Fri Oct 14 11:17:00 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c	Sun Mar 11 13:38:02 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c,v 1.10 2005/10/14 15:17:00 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_kbd.c,v 1.11 2007/03/11 17:38:02 tsi Exp $ */
 
 /*
  * Copyright (c) 2002 by The XFree86 Project, Inc.
@@ -496,10 +496,8 @@
                break;
 #endif
            default:
-               xf86Msg(X_ERROR, "%s: Unsupported wskbd type \"%d\"",
-                                pInfo->name, pKbd->wsKbdType);
-               close(pInfo->fd);
-               return FALSE;
+               printWsType("Unknown", pInfo->name);
+               break;
        }
     }
 #endif
Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c:1.38 xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c:1.39
--- xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c:1.38	Fri Oct 14 11:17:00 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c	Sun Mar 11 13:38:02 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c,v 1.38 2005/10/14 15:17:00 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/bsd_mouse.c,v 1.39 2007/03/11 17:38:02 tsi Exp $ */
 
 /*
  * Copyright (c) 1999-2005 by The XFree86 Project, Inc.
@@ -73,12 +73,15 @@
 
 #define HUP_GENERIC_DESKTOP     0x0001
 #define HUP_BUTTON              0x0009
+#define HUP_CONSUMER            0x000c
 
 #define HUG_X                   0x0030
 #define HUG_Y                   0x0031
 #define HUG_Z                   0x0032
 #define HUG_WHEEL               0x0038
 
+#define HUC_AC_PAN              0x0238
+
 #define HID_USAGE2(p,u) (((p) << 16) | u)
 
 /* The UMS mices have middle button as number 3 */
@@ -89,6 +92,8 @@
 static void usbSigioReadInput (int fd, void *closure);
 #endif
 
+#define TSTOMILLI(ts) (((ts).tv_nsec/1000000)+((ts).tv_sec*1000))
+
 #define DEFAULT_MOUSE_DEV		"/dev/mouse"
 #if defined(__NetBSD__)
 #define DEFAULT_PS2_DEV			"/dev/pms0"
@@ -530,7 +535,7 @@
 {
     MouseDevPtr pMse;
     static struct wscons_event eventList[NUMEVENTS];
-    int n, c; 
+    int n, c, x, y; 
     struct wscons_event *event = eventList;
     unsigned char *pBuf;
 
@@ -569,6 +574,33 @@
 	    dz = event->value;
 	    break;
 #endif
+#ifdef WSCONS_EVENT_MOUSE_DELTA_W
+	case WSCONS_EVENT_MOUSE_DELTA_W:
+	    dw = event->value;
+	    break;
+#endif
+	case WSCONS_EVENT_MOUSE_ABSOLUTE_X:
+	    miPointerPosition(&x, &y);
+	    miPointerAbsoluteCursor(event->value, y, TSTOMILLI(event->time));
+	    ++event;
+	    continue;
+	                    
+	case WSCONS_EVENT_MOUSE_ABSOLUTE_Y:
+	    miPointerPosition(&x, &y);
+	    miPointerAbsoluteCursor(x, event->value, TSTOMILLI(event->time));
+	    ++event;
+	    continue;
+	                    
+	case WSCONS_EVENT_MOUSE_ABSOLUTE_Z:
+	    ++event;
+	    continue;
+
+#ifdef WSCONS_EVENT_MOUSE_ABSOLUTE_W
+	case WSCONS_EVENT_MOUSE_ABSOLUTE_W:
+	    ++event;
+	    continue;
+#endif
+            
 	default:
 	    xf86Msg(X_WARNING, "%s: bad wsmouse event type=%d\n", pInfo->name,
 		    event->type);
@@ -631,6 +663,7 @@
     hid_item_t loc_x;		/* x locator item */
     hid_item_t loc_y;		/* y locator item */
     hid_item_t loc_z;		/* z (wheel) locator item */
+    hid_item_t loc_w;		/* w (pan) locator item */
     hid_item_t loc_btn[MSE_MAXBUTTONS]; /* buttons locator items */
    unsigned char *buffer;
 } UsbMseRec, *UsbMsePtr;
@@ -750,6 +783,7 @@
     dx = hid_get_data(pBuf, &pUsbMse->loc_x);
     dy = hid_get_data(pBuf, &pUsbMse->loc_y);
     dz = hid_get_data(pBuf, &pUsbMse->loc_z);
+    dw = hid_get_data(pBuf, &pUsbMse->loc_w);
 
     buttons = 0;
     for (n = 0; n < pMse->buttons; n++) {
@@ -844,6 +878,9 @@
     if (hid_locate(reportDesc, HID_USAGE2(HUP_GENERIC_DESKTOP, HUG_WHEEL),
 		   hid_input, &pUsbMse->loc_z, pUsbMse->iid) < 0) {
     }
+    if (hid_locate(reportDesc, HID_USAGE2(HUP_CONSUMER, HUC_AC_PAN),
+		   hid_input, &pUsbMse->loc_w, pUsbMse->iid) < 0) {
+    }
 #else
     if (hid_locate(reportDesc, HID_USAGE2(HUP_GENERIC_DESKTOP, HUG_X),
 		   hid_input, &pUsbMse->loc_x) < 0) {
@@ -856,6 +893,9 @@
     if (hid_locate(reportDesc, HID_USAGE2(HUP_GENERIC_DESKTOP, HUG_WHEEL),
 		   hid_input, &pUsbMse->loc_z) < 0) {
     }
+    if (hid_locate(reportDesc, HID_USAGE2(HUP_CONSUMER, HUC_AC_PAN),
+		   hid_input, &pUsbMse->loc_w) < 0) {
+    }
 #endif
     /* Probe for number of buttons */
     for (i = 1; i <= MSE_MAXBUTTONS; i++) {
Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c:1.8 xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c:1.9
--- xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c:1.8	Mon Jan  9 10:00:19 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c	Sun Mar 11 13:38:02 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c,v 1.8 2006/01/09 15:00:19 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/i386_video.c,v 1.9 2007/03/11 17:38:02 tsi Exp $ */
 /*
  * Copyright 1992 by Rich Murphey <Rich@Rice.edu>
  * Copyright 1993 by David Wexelblat <dwex@goblin.org>
@@ -42,6 +42,11 @@
 #include <machine/mtrr.h>
 #include <machine/sysarch.h>
 #include <sys/queue.h>
+#ifdef __x86_64__
+#define i386_set_mtrr x86_64_set_mtrr
+#define i386_get_mtrr x86_64_get_mtrr
+#define i386_iopl x86_64_iopl
+#endif
 #endif
 
 #include "xf86_OSlib.h"
Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h:1.19 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h:1.20
--- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h:1.19	Wed Mar  2 22:35:40 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h	Fri Feb 16 10:57:27 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h,v 1.19 2005/03/03 03:35:40 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drmP.h,v 1.20 2007/02/16 15:57:27 tsi Exp $ */
 
 /* drmP.h -- Private header for Direct Rendering Manager -*- linux-c -*-
  * Created: Mon Jan  4 10:05:05 1999 by faith@precisioninsight.com
@@ -307,6 +307,9 @@
 struct drm_device {
 #ifdef __NetBSD__
 	struct device	  device;	/* NetBSD's softc is an extension of struct device */
+
+	DRM_SPINTYPE	dev_lock;
+	DRM_SPINTYPE	dma_lock;
 #endif
 	const char	  *name;	/* Simple driver name		   */
 	char		  *unique;	/* Unique identifier: e.g., busid  */
Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_bufs.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_bufs.h:1.13 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_bufs.h:1.14
--- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_bufs.h:1.13	Wed Mar  2 22:35:40 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_bufs.h	Fri Feb 16 10:57:27 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_bufs.h,v 1.13 2005/03/03 03:35:40 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_bufs.h,v 1.14 2007/02/16 15:57:27 tsi Exp $ */
 
 /* drm_bufs.h -- Generic buffer template -*- linux-c -*-
  * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com
@@ -884,8 +884,9 @@
 	vm_offset_t vaddr;
 #endif /* __FreeBSD__ */
 #ifdef __NetBSD__
+	voff_t foff;
 	struct vnode *vn;
-	vm_size_t size;
+	vsize_t size;
 	vaddr_t vaddr;
 #endif /* __NetBSD__ */
 
Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_dma.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_dma.h:1.17 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_dma.h:1.18
--- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_dma.h:1.17	Wed Mar  2 22:35:41 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_dma.h	Fri Feb 16 10:57:27 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_dma.h,v 1.17 2005/03/03 03:35:41 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_dma.h,v 1.18 2007/02/16 15:57:27 tsi Exp $ */
 
 /* drm_dma.c -- DMA IOCTL and function support -*- linux-c -*-
  * Created: Fri Mar 19 14:30:16 1999 by faith@valinux.com
@@ -105,10 +105,14 @@
 		}
 	}
 
-	DRM(free)(dma->buflist, dma->buf_count * sizeof(*dma->buflist),
-	    DRM_MEM_BUFS);
-	DRM(free)(dma->pagelist, dma->page_count * sizeof(*dma->pagelist),
-	    DRM_MEM_PAGES);
+	if (dma->buflist != NULL)
+		DRM(free)(dma->buflist,
+		    dma->buf_count * sizeof(*dma->buflist), DRM_MEM_BUFS);
+
+	if (dma->pagelist != NULL)
+		DRM(free)(dma->pagelist,
+		    dma->page_count * sizeof(*dma->pagelist), DRM_MEM_PAGES);
+
 	DRM(free)(dev->dma, sizeof(*dev->dma), DRM_MEM_DRIVER);
 	dev->dma = NULL;
 	DRM_SPINUNINIT(dev->dma_lock);
Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drv.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drv.h:1.14 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drv.h:1.15
--- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drv.h:1.14	Wed Mar  2 22:35:41 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drv.h	Fri Feb 16 10:57:27 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drv.h,v 1.14 2005/03/03 03:35:41 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_drv.h,v 1.15 2007/02/16 15:57:27 tsi Exp $ */
 
 /* drm_drv.h -- Generic driver template -*- linux-c -*-
  * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com
@@ -211,6 +211,10 @@
 
 const char *DRM(find_description)(int vendor, int device);
 
+static drm_pci_id_list_t DRM(pciidlist)[] = {
+	DRIVER_PCI_IDS
+};
+
 #ifdef __FreeBSD__
 static struct cdevsw DRM(cdevsw) = {
 #if __FreeBSD_version >= 502103
@@ -234,10 +238,6 @@
 #endif
 };
 
-static drm_pci_id_list_t DRM(pciidlist)[] = {
-	DRIVER_PCI_IDS
-};
-
 static int DRM(probe)(device_t dev)
 {
 	const char *s = NULL;
@@ -658,12 +658,19 @@
 	unit = minor(dev->device.dv_unit);
 #endif
 
+#ifdef __NetBSD__
+	dev->irq = 1;
+	dev->pci_bus = dev->pa.pa_bus;
+	dev->pci_slot = dev->pa.pa_device;
+	dev->pci_func = dev->pa.pa_function;
+#else
 	dev->irq = pci_get_irq(dev->device);
 	/* XXX Fix domain number (alpha hoses) */
-	dev->pci_domain = 0;
 	dev->pci_bus = pci_get_bus(dev->device);
 	dev->pci_slot = pci_get_slot(dev->device);
 	dev->pci_func = pci_get_function(dev->device);
+#endif
+	dev->pci_domain = 0;
 
 	dev->maplist = DRM(calloc)(1, sizeof(*dev->maplist), DRM_MEM_MAPS);
 	if (dev->maplist == NULL) {
@@ -816,6 +823,9 @@
 
 	dev = DRIVER_SOFTC(minor(kdev));
 
+	if (dev == NULL)
+		return ENXIO;
+
 	DRM_DEBUG( "open_count = %d\n", dev->open_count );
 
 	retcode = DRM(open_helper)(kdev, flags, fmt, p, dev);
@@ -993,6 +1003,13 @@
 		return 0;
 #endif /* __FreeBSD__ */
 #ifdef __NetBSD__
+	case FIOSETOWN:
+		return fsetown(DRM_CURRENTPID, &dev->buf_pgid, cmd, data);
+
+	case FIOGETOWN:
+		fgetown(DRM_CURRENTPID, &dev->buf_pgid, cmd, data);
+		return 0;
+
 	case TIOCSPGRP:
 		dev->buf_pgid = *(int *)data;
 		return 0;
Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_irq.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_irq.h:1.5 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_irq.h:1.6
--- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_irq.h:1.5	Wed Mar  2 22:35:41 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_irq.h	Fri Feb 16 10:57:27 2007
@@ -155,8 +155,10 @@
 		return DRM_ERR(EINVAL);
 
 	dev->irq_enabled = 0;
+#ifdef __FreeBSD__
 	irqrid = dev->irqrid;
 	dev->irqrid = 0;
+#endif /* __FreeBSD__ */
 
 	DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, dev->irq );
 
Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_memory.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_memory.h:1.10 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_memory.h:1.11
--- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_memory.h:1.10	Mon Feb 28 22:48:53 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_memory.h	Fri Feb 16 10:57:27 2007
@@ -164,7 +164,7 @@
 	mtrrmap.base = offset;
 	mtrrmap.len = size;
 	mtrrmap.type = flags;
-	mtrrmap.flags = MTRR_VALID;
+	mtrrmap.flags = MTRR_VALID | MTRR_PRIVATE;
 	return mtrr_set(&mtrrmap, &one, NULL, MTRR_GETSET_KERNEL);
 }
 
Index: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_netbsd.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_netbsd.h:1.12 xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_netbsd.h:1.13
--- xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_netbsd.h:1.12	Wed Mar  2 22:35:41 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_netbsd.h	Fri Feb 16 10:57:27 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_netbsd.h,v 1.12 2005/03/03 03:35:41 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm_os_netbsd.h,v 1.13 2007/02/16 15:57:27 tsi Exp $ */
 
 /**
  * \file drm_os_netbsd.h
@@ -103,10 +103,10 @@
 #define DRM_CURPROC		curproc
 #define DRM_STRUCTPROC		struct proc
 #define DRM_SPINTYPE		struct simplelock
-#define DRM_SPININIT(l,name)
+#define DRM_SPININIT(l,name)	simple_lock_init(l)
 #define DRM_SPINUNINIT(l)
-#define DRM_SPINLOCK(l)	
-#define DRM_SPINUNLOCK(u)
+#define DRM_SPINLOCK(l)		simple_lock(l)
+#define DRM_SPINUNLOCK(u)	simple_unlock(u)
 #define DRM_CURRENTPID		curproc->p_pid
 
 /* Currently our DRMFILE (filp) is a void * which is actually the pid
Index: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c:3.8 xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c:3.9
--- xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c:3.8	Mon Jan  9 10:00:21 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c	Sat Sep  2 12:44:21 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c,v 3.8 2006/01/09 15:00:21 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsdi/bsdi_init.c,v 3.9 2006/09/02 16:44:21 dawes Exp $ */
 /*
  * Copyright 1992 by Rich Murphey <Rich@Rice.edu>
  * Copyright 1993 by David Wexelblat <dwex@goblin.org>
@@ -128,7 +128,7 @@
 }
 
 int
-xf86ProcessArgument (int argc, char *argv[], int i)
+xf86ProcessArgument (int argc, const char *argv[], int i)
 {
 	/*
 	 * Keep server from detaching from controlling tty.  This is useful 
Index: xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile
diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile:1.35 xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile:1.38
--- xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile:1.35	Mon Jan  9 10:00:21 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile	Sun Apr  1 11:55:49 2007
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile,v 1.35 2006/01/09 15:00:21 dawes Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Imakefile,v 1.38 2007/04/01 15:55:49 tsi Exp $
 
 #include <Server.tmpl>
 
@@ -45,14 +45,19 @@
 
 #elif defined(OpenBSDArchitecture) && \
 	(defined(PpcArchitecture) || \
-	defined(AlphaArchitecture) || \
-	defined(Sparc64Architecture))
+	 defined(AlphaArchitecture) || \
+	 defined(SparcArchitecture))
 
 XCOMM OpenBSD/alpha, OpenBSD/powerpc and OpenBSD/sparc64
 
 PCIDRVRSRC = freebsdPci.c
 PCIDRVROBJ = freebsdPci.o
 
+#if defined(SparcArchitecture)
+SBUSDRVSRC = Sbus.c
+SBUSDRVOBJ = Sbus.o
+#endif
+
 #elif defined(NetBSDArchitecture) && defined(PpcArchitecture)
 
 XCOMM NetBSD/powerpc
@@ -78,7 +83,6 @@
 #elif defined(FreeBSDArchitecture) && \
      (defined(AlphaArchitecture) || defined(AMD64Architecture))
 
-
 XCOMM generic FreeBSD PCI driver (using /dev/pci)
 
 PCIDRVRSRC = freebsdPci.c
@@ -93,6 +97,15 @@
 SBUSDRVSRC = Sbus.c
 SBUSDRVOBJ = Sbus.o
 
+#elif defined(NetBSDArchitecture) && defined(SparcArchitecture)
+
+XCOMM Sparc SBUS & PCI drivers
+
+PCIDRVRSRC = netbsdPci.c
+PCIDRVROBJ = netbsdPci.o
+SBUSDRVSRC = Sbus.c
+SBUSDRVOBJ = Sbus.o
+
 #elif defined(NetBSDArchitecture) && defined(AlphaArchitecture)
 
 XCOMM Alpha (NetBSD) PCI driver
@@ -141,7 +154,9 @@
 SpecialCObjectRule(Pci,NullParameter,-O0)
 #endif
 
-#if defined(SunArchitecture) && defined(SparcArchitecture)
+#if defined(SunArchitecture) && \
+    defined(SparcArchitecture) && \
+   !defined(Sparc64Architecture)
 
 LFS_DEFINES = `getconf LFS_CFLAGS`
 
Index: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c:1.94 xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c:1.99
--- xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c:1.94	Fri Oct 14 11:17:01 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c	Tue Jul  3 11:23:08 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c,v 1.94 2005/10/14 15:17:01 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.c,v 1.99 2007/07/03 15:23:08 tsi Exp $ */
 /*
  * Pci.c - New server PCI access functions
  *
@@ -65,7 +65,7 @@
  *      3) Overide default settings for global PCI access functions if
  *	   required. These include pciFindFirstFP, pciFindNextFP,
  *	   Of course, if you choose not to use one of the generic
- *	   functions, you will need to provide a platform specifc replacement.
+ *	   functions, you will need to provide a platform specific replacement.
  *
  * Gary Barton
  * Concurrent Computer Corporation
@@ -169,7 +169,7 @@
  *
  */
 /*
- * Copyright (c) 1999-2003 by The XFree86 Project, Inc.
+ * Copyright (c) 1999-2007 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -469,24 +469,44 @@
 /*
  * pciGetBaseSize() returns the size of a PCI base address mapping in bits.
  * The index identifies the base register: 0-5 are the six standard registers,
- * and 6 is the ROM base register.  If destructive is TRUE, it will write
- * to the base address register to get an accurate result.  Otherwise it
- * makes a conservative guess based on the alignment of the already allocated
- * address.  If the result is accurate (ie, not an over-estimate), this is
- * indicated by setting *min to TRUE (when min is non-NULL).  This happens
- * when either the destructive flag is set, the information is supplied by
- * the OS if the OS supports this.
+ * 6 is the type 0 ROM base register, and 7 is is the type 1 ROM base pointer.
+ * If destructive is TRUE, it will write to the base address register to get an
+ * accurate result.  Otherwise it makes a conservative guess based on the
+ * alignment of the already allocated address.  If the result is accurate (ie,
+ * not an over-estimate), this is indicated by setting the appropriate bit in
+ * *min to one (when min is non-NULL).  This happens when either the
+ * destructive flag is set, the appropriate decode enable is off, or the
+ * information is supplied by the OS.
+ *
+ * By default, destructive probes are now also done for unassigned bases, all
+ * of whose modifiable bits are zero.  This allows us to differentiate between
+ * unassigned and non-existent bases, and to correctly size them.
+ *
+ * Note that, contrary to the PCI specs, we do not first disable decoding
+ * before destructively sizing (non-ROM) BARs.  This could be changed, but the
+ * risk of causing a crash would be higher.
  */
 
+/*
+ * Minimum value of estimateSizesAggressively at which destructive sizing of
+ * unassigned bases starts to occur.  Higher values than this minimum (by more
+ * than one) also cause all-ones bases to be destructively sized (dangerous).
+ * Lower values than this minimum disable this behaviour altogether.  This
+ * minimum should be non-negative.
+ */
+#ifndef AggressivePCISizing	/* Upper case is too loud ;-) */
+#define AggressivePCISizing 0
+#endif
+#if     AggressivePCISizing < 0
+#undef  AggressivePCISizing
+#define AggressivePCISizing 0
+#endif
+
 int
-pciGetBaseSize(PCITAG tag, int index, Bool destructive, Bool *min)
+pciGetBaseSize(pciConfigPtr device, int index, Bool destructive, int *min)
 {
-  int offset;
-  CARD32 addr1;
-  CARD32 addr2;
-  CARD32 mask1;
-  CARD32 mask2;
-  int bits = 0;
+  CARD32 addr1, addr2, mask1 = 0, mask2 = 0, csr;
+  int offset, bits, lastBAR, minsize;
 
   /*
    * Eventually a function for this should be added to pciBusFuncs_t, but for
@@ -495,91 +515,235 @@
    */
 
   /*
-   * silently ignore bogus index values.  Valid values are 0-6.  0-5 are
-   * the 6 base address registers, and 6 is the ROM base address register.
+   * Silently ignore bogus index values.  Valid values are 0-7.  0-5 are
+   * the 6 base address registers, and 6 or 7 is the ROM base address register.
    */
-  if (index < 0 || index > 6)
+  if (index < 0 || index > 7)
     return 0;
 
-  pciInit();
+  switch (index) {
+  case 6:
+    if (min && (*min & (2 << 6)))
+      return device->basesize[6];
 
-  if (xf86GetPciSizeFromOS(tag, index, &bits)) {
-      if (min)
-	  *min = TRUE;
-      return bits;
-  }
+    offset = PCI_MAP_ROM_REG;
+    goto do_rom;
 
-  if (min)
-    *min = destructive;
+  case 7:
+    if (min && (*min & (2 << 7)))
+      return device->basesize[6];	/* Yup, 6, not 7 */
+
+    offset = PCI_PCI_BRIDGE_ROM_REG;
+
+do_rom:
+    bits = 0;
+    csr = pciReadLong(device->tag, PCI_CMD_STAT_REG);
+
+    addr1 = pciReadLong(device->tag, offset);
+    if (!(addr1 & PCI_MAP_ROM_DECODE_ENABLE) || !(csr & PCI_CMD_MEM_ENABLE)) {
+      destructive = TRUE;
+    } else {
+      mask1 = PCIGETROM(addr1);
+      if (xf86Info.estimateSizesAggressively >= AggressivePCISizing) {
+	if (mask1 == 0) {
+	  destructive = TRUE;
+	} else
+	if (xf86Info.estimateSizesAggressively > (AggressivePCISizing + 1)) {
+	  if (mask1 & (1 << 24)) {	/* 16M maximum */
+	    if ((mask1 | (mask1 - 1)) == (CARD32)(-1))
+	      destructive = TRUE;
+	  }
+	}
+      }
+    }
+
+    if (destructive) {
+      pciWriteLong(device->tag, offset,
+	0xffffffff & ~PCI_MAP_ROM_DECODE_ENABLE);
+      mask1 = pciReadLong(device->tag, offset);
+      pciWriteLong(device->tag, offset, addr1);
+      if ((mask1 = PCIGETROM(mask1)) == 0)
+	goto return_bits;		/* Does not exist */
+    }
+
+    mask1 |= (1 << 24);			/* 16M maximum */
+    minsize = 11;			/* 2K minimum */
+    break;
+
+  default:
+    if (min && (*min & (2 << index)))
+      return device->basesize[index];
+
+    bits = 0;
+
+    switch (device->pci_header_type & 0x7f) {
+    case 0:
+	lastBAR = 5;
+	break;
+
+    case 1:
+	lastBAR = 1;
+	break;
+
+    case 2:
+	lastBAR = 0;
+	break;
+
+    default:
+	goto return_bits;
+    }
+
+    if (index > lastBAR) {
+	destructive = TRUE;
+	goto return_bits;
+    }
 
-  /* Get the PCI offset */
-  if (index == 6)
-    offset = PCI_MAP_ROM_REG;
-  else
     offset = PCI_MAP_REG_START + (index << 2);
 
-  addr1 = pciReadLong(tag, offset);
-  /*
-   * Check if this is the second part of a 64 bit address.
-   * XXX need to check how endianness affects 64 bit addresses.
-   */
-  if (index > 0 && index < 6) {
-    addr2 = pciReadLong(tag, offset - 4);
-    if (PCI_MAP_IS_MEM(addr2) && PCI_MAP_IS64BITMEM(addr2))
-      return 0;
-  }
+    /* Check if this is the second part of a 64 bit address */
+    if (index > 0) {
+      addr1 = pciReadLong(device->tag, offset - 4);
+      if (PCI_MAP_IS_MEM(addr1) && PCI_MAP_IS64BITMEM(addr1)) {
+	destructive = TRUE;
+	goto return_bits;
+      }
+    }
 
-  if (destructive) {
-    pciWriteLong(tag, offset, 0xffffffff);
-    mask1 = pciReadLong(tag, offset);
-    pciWriteLong(tag, offset, addr1);
-  } else {
-    mask1 = addr1;
-  }
+    csr = pciReadLong(device->tag, PCI_CMD_STAT_REG);
+
+    addr1 = pciReadLong(device->tag, offset);
+    if (PCI_MAP_IS_IO(addr1)) {
+      if (!(csr & PCI_CMD_IO_ENABLE)) {
+	destructive = TRUE;
+      } else {
+	mask1 = PCIGETIO(addr1);
+	if (xf86Info.estimateSizesAggressively >= AggressivePCISizing) {
+	  if (mask1 == 0) {
+	    destructive = TRUE;
+	  } else
+	  if (xf86Info.estimateSizesAggressively > (AggressivePCISizing + 1)) {
+	    if (mask1 & (1 << 8)) {	/* 256 bytes maximum */
+	      mask2 = mask1 | (mask1 - 1);
+	      /* Allow for both 16-bit and 32-bit bases */
+	      if ((mask2 == (CARD16)(-1)) || (mask2 == (CARD32)(-1)))
+	        destructive = TRUE;
+	    }
+	  }
+	}
+      }
 
-  /* Check if this is the first part of a 64 bit address. */
-  if (index < 5 && PCI_MAP_IS_MEM(mask1) && PCI_MAP_IS64BITMEM(mask1)) {
-    if (PCIGETMEMORY(mask1) == 0) {
-      addr2 = pciReadLong(tag, offset + 4);
       if (destructive) {
-	pciWriteLong(tag, offset + 4, 0xffffffff);
-	mask2 = pciReadLong(tag, offset + 4);
-	pciWriteLong(tag, offset + 4, addr2);
+	pciWriteLong(device->tag, offset, 0xffffffff);
+	mask1 = pciReadLong(device->tag, offset);
+	pciWriteLong(device->tag, offset, addr1);
+	if ((mask1 = PCIGETIO(mask1)) == 0)
+	  goto return_bits;		/* Does not exist */
+      }
+
+      mask1 |= (1 << 8);		/* 256 bytes maximum */
+      minsize = 2;			/* 4 bytes minimum */
+      break;
+    }
+
+    minsize = 4;			/* Memory BARs are 16 bytes minimum */
+
+    if ((index < lastBAR) && PCI_MAP_IS64BITMEM(addr1)) {
+      addr2 = pciReadLong(device->tag, offset + 4);
+      if (!(csr & PCI_CMD_MEM_ENABLE)) {
+	destructive = TRUE;
       } else {
+	mask1 = PCIGETMEMORY(addr1);
 	mask2 = addr2;
+	if (xf86Info.estimateSizesAggressively >= AggressivePCISizing) {
+	  if ((mask1 == 0) && (mask2 == 0)) {
+	    destructive = TRUE;
+	  } else
+	  if (xf86Info.estimateSizesAggressively > (AggressivePCISizing + 1)) {
+	    unsigned long long mask64;
+
+	    mask64 = ((unsigned long long)mask2 << 32) | mask1;
+	    mask64 |= mask64 - 1;
+	    /* Allow for both 32-bit and 64-bit bases */
+	    if ((mask64 == (CARD32)(-1)) ||
+	        (mask64 == (unsigned long long)(-1LL)))
+	      destructive = TRUE;
+	  }
+	}
+      }
+
+      if (destructive) {
+	pciWriteLong(device->tag, offset, 0xffffffff);
+	pciWriteLong(device->tag, offset + 4, 0xffffffff);
+	mask1 = pciReadLong(device->tag, offset);
+	mask2 = pciReadLong(device->tag, offset + 4);
+	pciWriteLong(device->tag, offset, addr1);
+	pciWriteLong(device->tag, offset + 4, addr2);
+	mask1 = PCIGETMEMORY(mask1);
       }
-      if (mask2 == 0)
-	return 0;
-      bits = 32;
-      while ((mask2 & 1) == 0) {
-	bits++;
-	mask2 >>= 1;
+
+      if (mask1 == 0) {
+	if (mask2 == 0)
+	  goto return_bits;
+
+	bits = 32;
+	mask1 = mask2;
       }
-      if (bits > 32)
-	  return bits;
+      break;
     }
-  }
-  if (index < 6)
-    if (PCI_MAP_IS_MEM(mask1))
+
+    if (!(csr & PCI_CMD_MEM_ENABLE)) {
+      destructive = TRUE;
+    } else {
+      mask1 = PCIGETMEMORY(addr1);
+      if (xf86Info.estimateSizesAggressively >= AggressivePCISizing) {
+	if (mask1 == 0) {
+	  destructive = TRUE;
+	} else
+	if (xf86Info.estimateSizesAggressively > (AggressivePCISizing + 1)) {
+	  if ((mask1 | (mask1 - 1)) == (CARD32)(-1))
+	    destructive = TRUE;
+	}
+      }
+    }
+
+    if (destructive) {
+      pciWriteLong(device->tag, offset, 0xffffffff);
+      mask1 = pciReadLong(device->tag, offset);
+      pciWriteLong(device->tag, offset, addr1);
       mask1 = PCIGETMEMORY(mask1);
-    else
-      mask1 = PCIGETIO(mask1);
-  else
-    mask1 = PCIGETROM(mask1);
-  if (mask1 == 0)
-    return 0;
-  bits = 0;
-  while ((mask1 & 1) == 0) {
-    bits++;
+    }
+
+    if (mask1 == 0)
+      goto return_bits;
+
+    break;
+  }
+
+  while (!(mask1 & 1)) {
     mask1 >>= 1;
+    bits++;
+  }
+
+  if (bits <= minsize)
+    destructive = TRUE;
+  else if (!destructive) {
+    int osbits = 0;
+
+    if (xf86GetPciSizeFromOS(device->tag, index, &osbits) &&
+	(osbits >= minsize) && (osbits <= bits)) {
+      bits = osbits;
+      destructive = TRUE;	/* ? */
+    }
+  }
+
+return_bits:
+  if (min) {
+    if (destructive)
+      *min |= (2 << index);
+    else
+      *min &= ~(2 << index);
   }
-  /* I/O maps can be no larger than 8 bits */
 
-  if ((index < 6) && PCI_MAP_IS_IO(addr1) && bits > 8)
-    bits = 8;
-  /* ROM maps can be no larger than 24 bits */
-  if (index == 6 && bits > 24)
-    bits = 24;
   return bits;
 }
 
@@ -763,7 +927,7 @@
 	if (speculativeProbe && (pciDevNum == 0) && (pciFuncNum == 0) &&
 	    (PCI_BUS_NO_DOMAIN(pciBusNum) > 0)) {
 	    for (;;) {
-	        if (++pciDevNum >= pciBusInfo[pciBusNum]->numDevices)
+		if (++pciDevNum >= pciBusInfo[pciBusNum]->numDevices)
 		    goto NextSpeculativeBus;
 		inProbe = TRUE;
 		tmp = pciReadLong(PCI_MAKE_TAG(pciBusNum, pciDevNum, 0),
@@ -834,7 +998,12 @@
 		 */
 		if (pciReadLong(pciDeviceTag, PCI_CMD_STAT_REG) &
 		    PCI_STAT_CAPABILITY) {
-		    CARD8 capptr = pciReadByte(pciDeviceTag, PCI_CAP_PTR);
+		    CARD8 capptr;
+
+		    if (sub_class == PCI_SUBCLASS_BRIDGE_PCI)
+			capptr = pciReadByte(pciDeviceTag, PCI_CAP_PTR);
+		    else
+			capptr = pciReadByte(pciDeviceTag, PCI_CB_CAP_PTR);
 
 		    while (capptr &= ~0x03) {
 			if (pciReadByte(pciDeviceTag, capptr + PCI_CAP_ID) !=
@@ -990,11 +1159,37 @@
 	    /* Get base address sizes for type 0 headers */
 	    for (i = 0; i < 7; i++)
 		devp->basesize[i] =
-		    pciGetBaseSize(tag, i, FALSE, &devp->minBasesize);
+		    pciGetBaseSize(devp, i, FALSE, &devp->minBasesize);
 	    break;
 
 	case 1:
+	    /* Get base address sizes for type 1 headers */
+	    for (i = 0; i < 2; i++)
+		devp->basesize[i] =
+		    pciGetBaseSize(devp, i, FALSE, &devp->minBasesize);
+
+	    /* Get bridge ROM size */
+	    devp->basesize[6] =  /* Yep, the 6 & 7 are correct */
+		pciGetBaseSize(devp, 7, FALSE, &devp->minBasesize);
+
+	    /* Allow master aborts to complete normally on secondary buses */
+	    if (!(devp->pci_bridge_control & PCI_PCI_BRIDGE_MASTER_ABORT_EN))
+		break;
+	    pciWriteWord(tag, PCI_PCI_BRIDGE_CONTROL_REG,
+		devp->pci_bridge_control &
+		     ~(PCI_PCI_BRIDGE_MASTER_ABORT_EN |
+		       PCI_PCI_BRIDGE_SECONDARY_RESET));
+	    break;
+
 	case 2:
+	    /* Read more config space for this device */
+	    for (i = 17; i < 32; i++)
+		devp->cfgspc.dwords[i] = pciReadLong(tag, i * sizeof(CARD32));
+
+	    /* Get base address size for type 2 headers */
+	    devp->basesize[0] =
+		pciGetBaseSize(devp, 0, FALSE, &devp->minBasesize);
+
 	    /* Allow master aborts to complete normally on secondary buses */
 	    if (!(devp->pci_bridge_control & PCI_PCI_BRIDGE_MASTER_ABORT_EN))
 		break;
@@ -1052,7 +1247,7 @@
 		if (pciBusInfo[i]) {
 		    pciBusInfo[i]->bridge = devp;
 		    /*
-                     * The back link needs to be set here, and is unlikely to
+		     * The back link needs to be set here, and is unlikely to
 		     * change.
 		     */
 		    devp->businfo = pciBusInfo[i];
Index: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h:1.53 xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h:1.56
--- xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h:1.53	Tue Apr 18 11:57:25 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h	Sun Apr  1 11:55:49 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h,v 1.53 2006/04/18 15:57:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Pci.h,v 1.56 2007/04/01 15:55:49 tsi Exp $ */
 /*
  * Copyright 1998 by Concurrent Computer Corporation
  *
@@ -134,7 +134,8 @@
  */
 #define MAX_PCI_DEVICES 128	/* Max number of devices accomodated */
 				/* by xf86scanpci		     */
-#if defined(sun) && defined(SVR4) && defined(sparc)
+#if (defined(sparc) || defined(__sparc__)) && \
+    ((defined(sun) && defined(SVR4)) || defined(__OpenBSD__))
 # define MAX_PCI_BUSES   4096	/* Max number of PCI buses           */
 #elif defined(__alpha__) && defined (linux)
 # define MAX_PCI_DOMAINS	512
@@ -339,14 +340,20 @@
 # elif defined(sun)
 #  define ARCH_PCI_INIT sparcPciInit
 #  define INCLUDE_XF86_MAP_PCI_MEM
-# elif (defined(__OpenBSD__) || defined(__FreeBSD__)) && defined(__sparc64__)
-#  define  ARCH_PCI_INIT freebsdPciInit
+# elif defined(__FreeBSD__)
+#  define ARCH_PCI_INIT freebsdPciInit
 #  define INCLUDE_XF86_MAP_PCI_MEM
 #  define INCLUDE_XF86_NO_DOMAIN
+# elif defined(__NetBSD__)
+#  define ARCH_PCI_INIT netbsdPciInit
+#  define INCLUDE_XF86_MAP_PCI_MEM
+#  define INCLUDE_XF86_NO_DOMAIN
+# elif defined(__OpenBSD__)
+#  define ARCH_PCI_INIT sparcPciInit
+#  define INCLUDE_XF86_MAP_PCI_MEM
+#  define ARCH_PCI_OS_INIT freebsdPciInit
 # endif
-# if !defined(__FreeBSD__) && !defined(__OpenBSD__)
-#  define ARCH_PCI_PCI_BRIDGE sparcPciPciBridge
-# endif
+# define ARCH_PCI_PCI_BRIDGE sparcPciPciBridge
 #elif defined(__amd64__) || defined(__x86_64__)
 # if defined(__FreeBSD__)
 #  define ARCH_PCI_INIT freebsdPciInit
Index: xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c:1.7 xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c:1.15
--- xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c:1.7	Tue Jul 19 11:02:52 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c	Mon Apr  9 11:37:18 2007
@@ -20,7 +20,7 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c,v 1.7 2005/07/19 15:02:52 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/Sbus.c,v 1.15 2007/04/09 15:37:18 tsi Exp $ */
 
 #include <fcntl.h>
 #include <stdio.h>
@@ -41,12 +41,19 @@
 int promRootNode;
 
 static int promFd = -1;
-static int promCurrentNode;
 static int promOpenCount = 0;
 static int promP1275 = -1;
+
 #define MAX_PROP	128
 #define MAX_VAL		(4096-128-4)
+
+#if defined(__OpenBSD__) || defined(__NetBSD__)
+/* These two use their own OBP access scheme */
+static struct opiocdesc promOpio;
+static char promval[MAX_VAL + 1];
+#else
 static struct openpromio *promOpio;
+#endif
 
 sbusDevicePtr *xf86SbusInfo = NULL;
 
@@ -66,9 +73,65 @@
     { SBUS_DEVICE_TCX, FBTYPE_TCXCOLOR, "tcx", "Sun TCX" },
     { SBUS_DEVICE_FFB, FBTYPE_CREATOR, "ffb", "Sun FFB" },
     { SBUS_DEVICE_FFB, FBTYPE_CREATOR, "afb", "Sun Elite3D" },
+    { SBUS_DEVICE_P9100, FBTYPE_P9100, "pnozz", "Weitek P9100" },
     { 0, 0, NULL, NULL }
 };
 
+#if defined(__OpenBSD__) || defined(__NetBSD__)
+int
+promGetSibling(int node)
+{
+    if (node == -1)
+	return 0;
+
+    promOpio.op_nodeid = node;
+    if (ioctl(promFd, OPIOCGETNEXT, &promOpio.op_nodeid) < 0)
+	return 0;
+
+    return promOpio.op_nodeid;
+}
+
+int
+promGetChild(int node)
+{
+    if (!node || (node == -1))
+	return 0;
+
+    promOpio.op_nodeid = node;
+    if (ioctl(promFd, OPIOCGETCHILD, &promOpio.op_nodeid) < 0)
+	return 0;
+
+    return promOpio.op_nodeid;
+}
+
+char *
+promGetProperty(const char *prop, int *lenp)
+{
+    /* op_nodeid has already been set */
+    promOpio.op_namelen = strlen(prop);
+    promOpio.op_name = (char *)prop;
+    promOpio.op_buflen = MAX_VAL;
+    promOpio.op_buf = promval;
+
+    if (ioctl(promFd, OPIOCGET, &promOpio) < 0)
+	return NULL;
+
+    if (lenp)
+	*lenp = promOpio.op_buflen;
+    return promOpio.op_buf;
+}
+
+int
+promGetBool(const char *prop)
+{
+    int length;
+
+    if (!promGetProperty(prop, &length) || (length < 0))
+	return 0;
+
+    return 1;
+}
+#else
 int
 promGetSibling(int node)
 {
@@ -80,8 +143,7 @@
     if (ioctl(promFd, OPROMNEXT, promOpio) < 0)
 	return 0;
 
-    promCurrentNode = *(int *)promOpio->oprom_array;
-    return promCurrentNode;
+    return *(int *)promOpio->oprom_array;
 }
 
 int
@@ -95,8 +157,7 @@
     if (ioctl(promFd, OPROMCHILD, promOpio) < 0)
 	return 0;
 
-    promCurrentNode = *(int *)promOpio->oprom_array;
-    return promCurrentNode;
+    return *(int *)promOpio->oprom_array;
 }
 
 char *
@@ -105,7 +166,7 @@
     promOpio->oprom_size = MAX_VAL;
     strcpy(promOpio->oprom_array, prop);
     if (ioctl(promFd, OPROMGETPROP, promOpio) < 0)
-	return 0;
+	return NULL;
 
     if (lenp)
 	*lenp = promOpio->oprom_size;
@@ -128,6 +189,7 @@
 	    return 1;
     }
 }
+#endif
 
 #define PROM_NODE_SIBLING 0x01
 #define PROM_NODE_PREF    0x02
@@ -164,11 +226,12 @@
 
     if (promP1275 != -1)
 	return;
-    promP1275 = 0;
+    promP1275 = FALSE;
     f = fopen("/proc/cpuinfo", "r");
     if (!f) return;
     while (fgets(buffer, 1024, f) != NULL)
-	if (!strncmp(buffer, "type", 4) && strstr(buffer, "sun4u")) {
+	if (!strncmp(buffer, "type", 4) &&
+	    (strstr(buffer, "sun4u") || strstr(buffer, "sun4v"))) {
 	    promP1275 = 1;
 	    break;
 	}
@@ -179,14 +242,20 @@
     if (promP1275 != -1)
 	return;
 
-    if ((uname(&buffer) == 0) && !strcmp(buffer.machine, "sun4u"))
+    if ((uname(&buffer) >= 0) &&
+        (!strcmp(buffer.machine, "sun4u") || !strcmp(buffer.machine, "sun4v")))
 	promP1275 = TRUE;
     else
 	promP1275 = FALSE;
-#elif defined(__FreeBSD__)
+#elif defined(__FreeBSD__) || defined(__OpenBSD__) || defined(__NetBSD__)
+# if defined(__arch64__) || defined(__sparc_v9__) || defined(__sparc64__)
     promP1275 = TRUE;
+# else
+    /* Might need to check for a 32-bit userland running on a sun4u or sun4v */
+    promP1275 = FALSE;
+# endif
 #else
-#error Missing promIsP1275() function for this OS
+# error Missing promIsP1275() function for this OS
 #endif
 }
 
@@ -203,10 +272,12 @@
 	promFd = -1;
     }
 
+#if !defined(__OpenBSD__) && !defined(__NetBSD__)
     if (promOpio) {
 	xfree(promOpio);
 	promOpio = NULL;
     }
+#endif
 
     promOpenCount = 0;
 }
@@ -219,15 +290,21 @@
 	return 0;
     }
 
-    promFd = open("/dev/openprom", O_RDONLY, 0);
-    if (promFd == -1)
-	return -1;
+    if (promFd < 0) {
+	promFd = open("/dev/openprom", O_RDONLY, 0);
+	if (promFd == -1)
+	    return -1;
+    }
 
-    promOpio = (struct openpromio *)xalloc(4096);
+#if !defined(__OpenBSD__) && !defined(__NetBSD__)
     if (!promOpio) {
-	sparcPromClose();
-	return -1;
+	promOpio = (struct openpromio *)xalloc(4096);
+	if (!promOpio) {
+	    sparcPromClose();
+	    return -1;
+	}
     }
+#endif
 
     promRootNode = promGetSibling(0);
     if (!promRootNode) {
@@ -520,7 +597,7 @@
 promWalkNode2Pathname(char *path, int parent, int node, int searchNode, int type)
 {
     int nextnode;
-    int len, ntype = type;
+    int len = 0, ntype = type;
     char *prop, *p;
 
     prop = promGetProperty("name", &len);
@@ -731,6 +808,9 @@
     pointer ret;
     unsigned long pagemask, off, len;
     unsigned int devOffset[2], fbSize;
+#ifdef __OpenBSD__
+    static const unsigned int fbmode = WSDISPLAYIO_MODE_MAPPED;
+#endif
 
     if (!psdp || !size)
 	return NULL;
@@ -739,6 +819,11 @@
 	psdp->fd = open(psdp->device, O_RDWR);
 	if (psdp->fd == -1)
 	    return NULL;
+	psdp->mmapCount = 0;
+#ifdef __OpenBSD__
+	if (ioctl(psdp->fd, WSDISPLAYIO_SMODE, &fbmode) < 0)
+	    return NULL;
+#endif
     } else if (psdp->fd < 0) {
 	return NULL;
     }
@@ -764,6 +849,7 @@
 	    return NULL;
     }
 
+    psdp->mmapCount++;
     return (char *)ret + (offset - off);
 }
 
@@ -775,47 +861,15 @@
     unsigned long len = (((unsigned long)addr + size + mask) & ~mask) - base;
 
     munmap((pointer)base, len);
-}
-
-/* Tell OS that we are driving the HW cursor ourselves. */
-void
-xf86SbusHideOsHwCursor(sbusDevicePtr psdp)
-{
-    struct fbcursor fbcursor;
-    unsigned char zeros[8];
-
-    memset(&fbcursor, 0, sizeof(fbcursor));
-    memset(&zeros, 0, sizeof(zeros));
-    fbcursor.cmap.count = 2;
-    fbcursor.cmap.red = zeros;
-    fbcursor.cmap.green = zeros;
-    fbcursor.cmap.blue = zeros;
-    fbcursor.image = (char *)zeros;
-    fbcursor.mask = (char *)zeros;
-    fbcursor.size.x = 32;
-    fbcursor.size.y = 1;
-    fbcursor.set = FB_CUR_SETALL;
-    ioctl(psdp->fd, FBIOSCURSOR, &fbcursor);
-}
 
-/* Set HW cursor colormap. */
-void
-xf86SbusSetOsHwCursorCmap(sbusDevicePtr psdp, int bg, int fg)
-{
-    struct fbcursor fbcursor;
-    unsigned char red[2], green[2], blue[2];
+    if (!--psdp->mmapCount) {
+#ifdef __OpenBSD__
+	static const unsigned int fbmode = WSDISPLAYIO_MODE_EMUL;
 
-    memset(&fbcursor, 0, sizeof(fbcursor));
-    red[0] = bg >> 16;
-    green[0] = bg >> 8;
-    blue[0] = bg;
-    red[1] = fg >> 16;
-    green[1] = fg >> 8;
-    blue[1] = fg;
-    fbcursor.cmap.count = 2;
-    fbcursor.cmap.red = red;
-    fbcursor.cmap.green = green;
-    fbcursor.cmap.blue = blue;
-    fbcursor.set = FB_CUR_SETCMAP;
-    ioctl(psdp->fd, FBIOSCURSOR, &fbcursor);
+	/* Ignore errors */
+	ioctl(psdp->fd, WSDISPLAYIO_SMODE, &fbmode);
+#endif
+	close(psdp->fd);
+	psdp->fd = -1;
+    }
 }
Index: xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c:1.7 xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c:1.11
--- xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c:1.7	Tue Apr 18 11:57:25 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c	Tue Jul 10 13:15:54 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c,v 1.7 2006/04/18 15:57:25 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/freebsdPci.c,v 1.11 2007/07/10 17:15:54 tsi Exp $ */
 /*
  * Copyright 1998 by Concurrent Computer Corporation
  *
@@ -120,10 +120,25 @@
 void
 freebsdPciInit()
 {
-	pciFd = open("/dev/pci", O_RDWR);
-	if (pciFd < 0)
+	/* Always prefer a hardware-derived mechanism over an OS-provided one */
+	if (pciNumBuses)
 		return;
 
+	pciFd = open("/dev/pci", O_RDWR);
+	if (pciFd < 0) {
+		if (errno != EPERM)
+			return;
+
+		/* Try again without write access */
+		pciFd = open("/dev/pci", O_RDONLY);
+		if (pciFd < 0)
+			return;
+
+		xf86MsgVerb(X_WARNING, 3,
+			"OS limits PCI configuration space access to"
+			" read-only\n");
+	}
+
 	pciNumBuses    = 1;
 	pciBusInfo[0]  = &freebsdPci0;
 	pciFindFirstFP = pciGenFindFirst;
@@ -135,14 +150,20 @@
 {
 	struct pci_io io;
 	int error;
+
 	io.pi_sel.pc_bus = BUS(tag);
 	io.pi_sel.pc_dev = DFN(tag) >> 3;
 	io.pi_sel.pc_func = DFN(tag) & 7;
 	io.pi_reg = off;
 	io.pi_width = 4;
 	error = ioctl(pciFd, PCIOCREAD, &io);
-	if (error)
+	if (error) {
+		xf86MsgVerb(X_WARNING, 4,
+			"PciCfgRead(%d:%d:%d, %02x) failed (%s)\n",
+			io.pi_sel.pc_bus, io.pi_sel.pc_dev, io.pi_sel.pc_func,
+			off, strerror(errno));
 		return ~0;
+	}
 	return PCI_CPU(io.pi_data);
 }
 
@@ -150,13 +171,20 @@
 freebsdPciCfgWrite(PCITAG tag, int off, CARD32 val)
 {
 	struct pci_io io;
+	int error;
+
 	io.pi_sel.pc_bus = BUS(tag);
 	io.pi_sel.pc_dev = DFN(tag) >> 3;
 	io.pi_sel.pc_func = DFN(tag) & 7;
 	io.pi_reg = off;
 	io.pi_width = 4;
 	io.pi_data = PCI_CPU(val);
-	ioctl(pciFd, PCIOCWRITE, &io);
+	error = ioctl(pciFd, PCIOCWRITE, &io);
+	if (error)
+		xf86MsgVerb(X_WARNING, 4,
+			"PciCfgWrite(%d:%d:%d, %02x, %08lx) failed (%s)\n",
+			io.pi_sel.pc_bus, io.pi_sel.pc_dev, io.pi_sel.pc_func,
+			off, (unsigned long)val, strerror(errno));
 }
 
 static void
Index: xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c:1.13 xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c:1.15
--- xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c:1.13	Thu Apr  7 10:13:52 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c	Tue Jul  3 11:23:08 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c,v 1.13 2005/04/07 14:13:52 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c,v 1.15 2007/07/03 15:23:08 tsi Exp $ */
 /*
  * Copyright 1998 by Concurrent Computer Corporation
  *
@@ -42,7 +42,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  */
 /*
- * Copyright 2004 The XFree86 Project, Inc.
+ * Copyright 2004-2007 by The XFree86 Project, Inc.
  *
  * All rights reserved.
  *
@@ -322,7 +322,7 @@
 	long int iDevice = 0, maxdevice = MAX_PCI_DEVICES;
 	char buffer[512];
 
-	while (fgets(buffer, sizeof(buffer), fp)) {
+	while (fgets(buffer, sizeof(buffer) - 1, fp)) {
 	    static const char format[] =
 		/* An optional domain, then bus+dev, vendorid, deviceid, irq */
 		"%04lx:%02lx%02x\t%*04x%*04x\t%*x"
@@ -376,9 +376,15 @@
 	    } else {
 		linuxSize[iDevice].tag =
 		    PCI_MAKE_TAG(pcibus, devfn >> 3, devfn & 7);
-		for (Index = 0;  Index < 7;  Index++)
-		    for (;  size[Index];  size[Index] >>= 1)
-			linuxSize[iDevice].size[Index]++;
+		for (Index = 0;  Index < 7;  Index++) {
+		    if ((size[Index] & (size[Index] - 1)) == 0) {
+			for (;  size[Index];  size[Index] >>= 1)
+			    linuxSize[iDevice].size[Index]++;
+		    } else {
+			linuxSize[iDevice].size[Index] = 1;
+		    }
+		}
+
 		linuxSize[iDevice].empty = FALSE;
 	    }
 
@@ -419,7 +425,7 @@
 {
     unsigned int pcibus, device;
 
-    if ((Index < 0) || (Index >= 7))
+    if ((Index < 0) || (Index > 7))
 	return FALSE;
 
     pcibus = PCI_BUS_FROM_TAG(tag);
@@ -430,6 +436,9 @@
 	if (linuxSize[device].empty || (linuxSize[device].tag != tag))
 	    continue;
 
+	if (Index == 7)	/* P2P bridge ROM pointer */
+	    Index = 6;
+
 	if (linuxSize[device].size[Index] < 2)
 	    return FALSE;
 
Index: xc/programs/Xserver/hw/xfree86/os-support/bus/netbsdPci.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/netbsdPci.c:1.5 xc/programs/Xserver/hw/xfree86/os-support/bus/netbsdPci.c:1.9
--- xc/programs/Xserver/hw/xfree86/os-support/bus/netbsdPci.c:1.5	Fri Feb 13 18:58:47 2004
+++ xc/programs/Xserver/hw/xfree86/os-support/bus/netbsdPci.c	Tue Jul 10 13:15:54 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/netbsdPci.c,v 1.5 2004/02/13 23:58:47 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/netbsdPci.c,v 1.9 2007/07/10 17:15:54 tsi Exp $ */
 /*
  * Copyright (C) 1994-2003 The XFree86 Project, Inc.
  * All rights reserved.
@@ -89,17 +89,38 @@
 {
 	struct pciio_businfo pci_businfo;
 
+	/* Always prefer a hardware-derived mechanism over an OS-provided one */
+	if (pciNumBuses)
+		return;
+
 	devpci = open("/dev/pci0", O_RDWR);
-	if (devpci == -1)
-		FatalError("netbsdPciInit: can't open /dev/pci0\n");
+	if (devpci < 0) {
+		if (errno != EPERM)
+			return;
+
+		/* Try again without write access */
+		devpci = open("/dev/pci0", O_RDONLY);
+		if (devpci < 0)
+			return;
+
+		xf86MsgVerb(X_WARNING, 3,
+			"OS limits PCI configuration space access to"
+			" read-only\n");
+	}
+
+	/* Use businfo to get the number of devs */
+	if (ioctl(devpci, PCI_IOC_BUSINFO, &pci_businfo) != 0) {
+	    ErrorF("netbsdPciInit: /dev/pci0 not a PCI bus device (%s)",
+		strerror(errno));
+	    close(devpci);
+	    devpci = -1;
+	    return;
+	}
 
 	pciNumBuses    = 1;
 	pciBusInfo[0]  = &netbsdPci0;
 	pciFindFirstFP = pciGenFindFirst;
 	pciFindNextFP  = pciGenFindNext;
-	/* use businfo to get the number of devs */
-	if (ioctl(devpci, PCI_IOC_BUSINFO, &pci_businfo) != 0)
-	    FatalError("netbsdPciInit: not a PCI bus device");
 	netbsdPci0.numDevices = pci_businfo.maxdevs;
 }
 
@@ -113,9 +134,13 @@
 	bdfr.function = PCI_FUNC_FROM_TAG(tag);
 	bdfr.cfgreg.reg = reg;
 
-	if (ioctl(devpci, PCI_IOC_BDF_CFGREAD, &bdfr) == -1)
-		FatalError("netbsdPciConfRead: failed on %d/%d/%d\n",
-		    bdfr.bus, bdfr.device, bdfr.function);
+	if (ioctl(devpci, PCI_IOC_BDF_CFGREAD, &bdfr) == -1) {
+		xf86MsgVerb(X_WARNING, 4,
+		    "netbsdPciConfRead: failed on %d:%d:%d %02x (%s)\n",
+		    bdfr.bus, bdfr.device, bdfr.function, reg,
+		    strerror(errno));
+		return ~0;
+	}
 
 	return (bdfr.cfgreg.val);
 }
@@ -132,8 +157,10 @@
 	bdfr.cfgreg.val = val;
 
 	if (ioctl(devpci, PCI_IOC_BDF_CFGWRITE, &bdfr) == -1)
-		FatalError("netbsdPciConfWrite: failed on %d/%d/%d\n",
-		    bdfr.bus, bdfr.device, bdfr.function);
+		xf86MsgVerb(X_WARNING, 4,
+		    "netbsdPciConfWrite: failed on %d:%d:%d %02x %08lx (%s)\n",
+		    bdfr.bus, bdfr.device, bdfr.function, reg,
+		    (unsigned long)val, strerror(errno));
 }
 
 static void
Index: xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c:1.22 xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c:1.31
--- xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c:1.22	Fri Feb 17 22:31:38 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c	Tue Jul 10 15:08:42 2007
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c,v 1.22 2006/02/18 03:31:38 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/sparcPci.c,v 1.31 2007/07/10 19:08:42 tsi Exp $ */
 /*
- * Copyright (C) 2001-2005 The XFree86 Project, Inc.
+ * Copyright (C) 2001-2007 The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -53,10 +53,16 @@
 #include "Pci.h"
 #include "xf86sbusBus.h"
 
-#if defined(sun)
+#if defined(sun) || defined(__OpenBSD__)
 
+#if defined(__OpenBSD__)
+#define apertureDevName "/dev/mem"
+#else
 extern char *apertureDevName;
-static int  apertureFd = -1;
+#endif
+
+static unsigned long long pagemask;
+static int apertureFd = -1;
 
 /*
  * A version of xf86MapVidMem() that allows for 64-bit displacements (but not
@@ -77,9 +83,10 @@
 	lastFlags = Flags;
 	apertureFd = open(apertureDevName,
 	    (Flags & VIDMEM_READONLY) ? O_RDONLY : O_RDWR);
-	if (apertureFd < 0)
-	    FatalError("sparcMapAperture:  open failure:  %s\n",
-		       strerror(errno));
+	if (apertureFd < 0) {
+	    ErrorF("sparcMapAperture:  open failure:  %s\n", strerror(errno));
+	    return MAP_FAILED;
+	}
     }
 
     result = mmap(NULL, Size,
@@ -87,8 +94,16 @@
 		      PROT_READ : (PROT_READ | PROT_WRITE),
 		  MAP_SHARED, apertureFd, (off_t)Base);
 
-    if (result == MAP_FAILED)
-	FatalError("sparcMapAperture:  mmap failure:  %s\n", strerror(errno));
+    if (result == MAP_FAILED) {
+	ErrorF("sparcMapAperture:  mmap failure:  %s\n", strerror(errno));
+	return MAP_FAILED;
+    }
+
+#if !defined(sun) && !defined(__bsdi__) && \
+    !(defined(MACH) && defined(__GNU__))
+    /* Register this mapping */
+    xf86MakeNewMapping(iScreen, Flags, Base, Size, result);
+#endif
 
     return result;
 }
@@ -101,6 +116,7 @@
     unsigned long long mem_addr, mem_size;
     pointer pci, io;
     int bus_min, bus_max;
+    int tagMultiplier, maxOffset;
     unsigned char dfn_mask[256 / 8];
 } sparcDomainRec, *sparcDomainPtr;
 
@@ -122,9 +138,9 @@
 static int            pciNumDomains = 1;
 
 /* Variables to which this is assigned must be declared volatile */
-#define PciReg(base, tag, off, type) \
-    *(volatile type *)(pointer)((char *)(base) + \
-	(PCI_TAG_NO_DOMAIN(tag) | (off)))
+#define PciReg(domain, tag, off, type) \
+    *(volatile type *)(pointer)((char *)((domain)->pci) + \
+	((PCI_TAG_NO_DOMAIN(tag) * (domain)->tagMultiplier) | (off)))
 
 /* Generic SPARC PCI access functions */
 static CARD32
@@ -135,13 +151,14 @@
     volatile CARD32 result = (CARD32)(-1);	/* Must be volatile */
     int             bus;
 
-    if ((off >= 0) && (off <= 252) && !(off & 3) &&
+    if ((off >= 0) && !(off & 3) &&
 	((bus = PCI_BUS_FROM_TAG(tag)) < pciNumBuses) &&
 	(pBusInfo = pciBusInfo[bus]) && (pDomain = pBusInfo->pciBusPriv) &&
+	(off < pDomain->maxOffset) &&
 	(bus >= pDomain->bus_min) && (bus < pDomain->bus_max) &&
 	((bus > pDomain->bus_min) ||
 	 IsBitSetInMap(PCI_DFN_FROM_TAG(tag), pDomain->dfn_mask))) {
-	result = PciReg(pDomain->pci, tag, off, CARD32);
+	result = PciReg(pDomain, tag, off, CARD32);
 
 	result = PCI_CPU(result);
     }
@@ -156,16 +173,17 @@
     sparcDomainPtr pDomain;
     int            bus;
 
-    if ((off < 0) || (off > 252) || (off & 3) ||
+    if ((off < 0) || (off & 3) ||
 	((bus = PCI_BUS_FROM_TAG(tag)) >= pciNumBuses) ||
 	!(pBusInfo = pciBusInfo[bus]) || !(pDomain = pBusInfo->pciBusPriv) ||
+	(off >= pDomain->maxOffset) ||
 	(bus < pDomain->bus_min) || (bus >= pDomain->bus_max) ||
 	((bus == pDomain->bus_min) &&
 	 !IsBitSetInMap(PCI_DFN_FROM_TAG(tag), pDomain->dfn_mask)))
 	return;
 
     val = PCI_CPU(val);
-    PciReg(pDomain->pci, tag, off, CARD32) = val;
+    PciReg(pDomain, tag, off, CARD32) = val;
 }
 
 static void
@@ -210,15 +228,15 @@
 	return (CARD32)(-1);
 
     if (off < 8) {
-	result = (PciReg(pDomain->pci, tag, off, CARD16) << 16) |
-		  PciReg(pDomain->pci, tag, off + 2, CARD16);
+	result = (PciReg(pDomain, tag, off, CARD16) << 16) |
+		  PciReg(pDomain, tag, off + 2, CARD16);
 	return PCI_CPU(result);
     }
 
-    result = (PciReg(pDomain->pci, tag, off + 3, CARD8) << 24) |
-	     (PciReg(pDomain->pci, tag, off + 2, CARD8) << 16) |
-	     (PciReg(pDomain->pci, tag, off + 1, CARD8) <<  8) |
-	     (PciReg(pDomain->pci, tag, off    , CARD8)      );
+    result = (PciReg(pDomain, tag, off + 3, CARD8) << 24) |
+	     (PciReg(pDomain, tag, off + 2, CARD8) << 16) |
+	     (PciReg(pDomain, tag, off + 1, CARD8) <<  8) |
+	     (PciReg(pDomain, tag, off    , CARD8)      );
     return result;
 }
 
@@ -239,13 +257,13 @@
 	     (bus == pDomain->bus_min)) {
 	if (off < 8) {
 	    val = PCI_CPU(val);
-	    PciReg(pDomain->pci, tag, off    , CARD16) = val >> 16;
-	    PciReg(pDomain->pci, tag, off + 2, CARD16) = val;
+	    PciReg(pDomain, tag, off    , CARD16) = val >> 16;
+	    PciReg(pDomain, tag, off + 2, CARD16) = val;
 	} else {
-	    PciReg(pDomain->pci, tag, off    , CARD8) = val;
-	    PciReg(pDomain->pci, tag, off + 1, CARD8) = val >> 8;
-	    PciReg(pDomain->pci, tag, off + 2, CARD8) = val >> 16;
-	    PciReg(pDomain->pci, tag, off + 3, CARD8) = val >> 24;
+	    PciReg(pDomain, tag, off    , CARD8) = val;
+	    PciReg(pDomain, tag, off + 1, CARD8) = val >> 8;
+	    PciReg(pDomain, tag, off + 2, CARD8) = val >> 16;
+	    PciReg(pDomain, tag, off + 3, CARD8) = val >> 24;
 	}
     }
 }
@@ -270,7 +288,94 @@
     pciAddrNOOP
 };
 
-static long pagemask;
+
+static struct {
+    CARD32 tag;
+    int size;
+} *pAddressSizes = NULL;
+static int nAddressSizes = 0;
+
+/*
+ * Extract base size information from "assigned-addresses" properties.
+ */
+
+static void
+sparcAssignedAddresses(sparcDomainPtr pDomain, int node)
+{
+    char *prop_val;
+    int prop_len;
+
+    /* Retrieve and validate "assigned-addresses" property */
+    prop_val = promGetProperty("assigned-addresses", &prop_len);
+    if (prop_val && !(prop_len % 20)) {
+	prop_len /= 20;
+	for (;  prop_len--;  prop_val += 20) {
+	    if (((unsigned char)prop_val[1] < pDomain->bus_min) ||
+		((unsigned char)prop_val[1] > pDomain->bus_max) ||
+		(prop_val[3] & 0x3) || (prop_val[3] < PCI_MAP_REG_START) ||
+		((CARD32 *)prop_val)[1] || ((CARD32 *)prop_val)[3] ||
+		(((CARD32 *)prop_val)[4] < 4) ||
+		(((CARD32 *)prop_val)[4] & (((CARD32 *)prop_val)[4] - 1)) ||
+		(((CARD32 *)prop_val)[2] & (((CARD32 *)prop_val)[4] - 1)))
+		continue;
+
+	    if ((prop_val[3] >= PCI_MAP_REG_END) &&
+		(prop_val[3] != PCI_MAP_ROM_REG) &&
+		(prop_val[3] != PCI_PCI_BRIDGE_ROM_REG))
+		continue;
+
+	    prop_val[0] = pciNumDomains;
+	    pAddressSizes = xnfrealloc(pAddressSizes,
+		sizeof(*pAddressSizes) * (nAddressSizes + 1));
+	    pAddressSizes[nAddressSizes].tag = ((CARD32 *)prop_val)[0];
+	    for (pAddressSizes[nAddressSizes].size = -1;
+		 ((CARD32 *)prop_val)[4];
+		 ((CARD32 *)prop_val)[4] >>= 1)
+		pAddressSizes[nAddressSizes].size++;
+	    nAddressSizes++;
+	}
+    }
+
+    /* Retrieve and validate "class-code" property */
+    prop_val = promGetProperty("class-code", &prop_len);
+    if (prop_val && (prop_len == 4) &&
+	(prop_val[0] == 0) && (prop_val[1] == PCI_CLASS_BRIDGE) &&
+	((prop_val[2] == PCI_SUBCLASS_BRIDGE_PCI) ||
+	 (prop_val[2] == PCI_SUBCLASS_BRIDGE_CARDBUS)))
+	for (node = promGetChild(node);  node;  node = promGetSibling(node))
+	    sparcAssignedAddresses(pDomain, node);
+}
+
+/* Return the PCI allocation sizes derived above */
+Bool
+xf86GetPciSizeFromOS(PCITAG tag, int Index, int *bits)
+{
+    int i;
+
+    if ((Index < 0) || (Index > 7) || !pAddressSizes || (tag != (CARD32)tag))
+	return FALSE;
+
+    switch (Index) {
+    case 6:
+	tag |= PCI_MAP_ROM_REG;
+	break;
+    case 7:
+	tag |= PCI_PCI_BRIDGE_ROM_REG;
+	break;
+    default:
+	tag |= PCI_MAP_REG_START + (Index * 4);
+	break;
+    }
+
+    for (i = 0;  i < nAddressSizes;  i++) {
+	if (tag == pAddressSizes[i].tag) {
+	    *bits = pAddressSizes[i].size;
+	    return TRUE;
+	}
+    }
+
+    return FALSE;
+}
 
 /* Scan PROM for all PCI host bridges in the system */
 void
@@ -294,17 +399,20 @@
     for (node = promGetChild(promRootNode);
 	 node;
 	 node = promGetSibling(node)) {
-	unsigned long long pci_addr;
+	unsigned long long pci_addr, pci_size, phys_addr, phys_size;
 	sparcDomainRec     domain;
 	sparcDomainPtr     pDomain;
 	pciBusFuncs_p      pFunctions;
-	char               *prop_val, *bridge_name;
+	char               *prop_val;
 	int                prop_len, bus;
+	char               shared_pci;
 
 	prop_val = promGetProperty("name", &prop_len);
-	/* Some PROMs include the trailing null;  some don't */
-	if (!prop_val || (prop_len < 3) || (prop_len > 4) ||
-	    strcmp(prop_val, "pci"))
+	if (!prop_val || (prop_len < 3))
+	    continue;
+
+	prop_val[prop_len] = '\0';
+	if (strcmp(prop_val, "pci") && strcmp(prop_val, "pciex"))
 	    continue;
 
 	prop_val = promGetProperty("model", &prop_len);
@@ -319,218 +427,141 @@
 	if (!strlen(prop_val))
 	    continue;
 
-	pFunctions = &sparcPCIFunctions;
-	(void)memset(&domain, 0, sizeof(domain));
-
-	do {
-	    static Bool sabre_seen = FALSE;
-
-	    if (!strcmp("SUNW,sabre",   prop_val) ||
-		!strcmp("pci108e,a000", prop_val))
-		bridge_name = "Sabre";
-	    else
-	    if (!strcmp("pci108e,a001", prop_val))
-		bridge_name = "Hummingbird";
-	    else
-		break;
-
-	    /*
-	     * There can only be one "Sabre" bridge in a system.  It provides
-	     * PCI configuration space, a 24-bit I/O space and a 32-bit memory
-	     * space, all three of which are at fixed physical CPU addresses.
-	     */
-	    xf86Msg(X_INFO, "%s PCI host bridge found (\"%s\")\n",
-		bridge_name, prop_val);
-
-	    /* There can only be one Sabre */
-	    if (sabre_seen)
-		goto nextNode;
-	    sabre_seen = TRUE;
-
-	    /* Get "bus-range" property */
-	    prop_val = promGetProperty("bus-range", &prop_len);
-	    if (!prop_val || (prop_len != 8) ||
-		(((unsigned int *)prop_val)[0]) ||
-		(((unsigned int *)prop_val)[1] >= 256))
-		goto nextNode;
-
-	    pci_addr         = 0x01fe01000000ull;
-	    domain.io_addr   = 0x01fe02000000ull;
-	    domain.io_size   = 0x000001000000ull;
-	    domain.mem_addr  = 0x01ff00000000ull;
-	    domain.mem_size  = 0x000100000000ull;
-	    domain.bus_min   = 0;			/* Always */
-	    domain.bus_max   = ((int *)prop_val)[1];
-
+	if (strcmp("SUNW,sabre",   prop_val) &&
+	    strcmp("pci108e,a000", prop_val) &&
+	    strcmp("pci108e,a001", prop_val))
+	    pFunctions = &sparcPCIFunctions;
+	else
 	    pFunctions = &sabrePCIFunctions;
 
-	    goto newDomain;
-	} while (0);
-
-	if (!strcmp("SUNW,psycho",  prop_val) ||
-	    !strcmp("pci108e,8000", prop_val)) {
-	    bridge_name = "Psycho";
-
-	    /*
-	     * A "Psycho" host bridge provides two PCI interfaces, each with
-	     * its own 16-bit I/O and 31-bit memory spaces.  Both share the
-	     * same PCI configuration space.  Here, they are assigned separate
-	     * domain numbers to prevent unintentional I/O and/or memory
-	     * resource conflicts.
-	     */
-	    xf86Msg(X_INFO,
-		"Psycho PCI host bridge found (\"%s\")\n", prop_val);
-
-	    /* Get "bus-range" property */
-	    prop_val = promGetProperty("bus-range", &prop_len);
-	    if (!prop_val || (prop_len != 8) ||
-		(((unsigned int *)prop_val)[1] >= 256) ||
-		(((unsigned int *)prop_val)[0] > ((unsigned int *)prop_val)[1]))
-		goto nextNode;
-
-	    domain.bus_min = ((int *)prop_val)[0];
-	    domain.bus_max = ((int *)prop_val)[1];
-
-	    /* Get "ranges" property */
-	    prop_val = promGetProperty("ranges", &prop_len);
-	    if (!prop_val || (prop_len != 112) ||
-		prop_val[0] || (prop_val[28] != 0x01u) ||
-		(prop_val[56] != 0x02u) || (prop_val[84] != 0x03u) ||
-		(((unsigned int *)prop_val)[4] != 0x01000000u) ||
-		((unsigned int *)prop_val)[5] ||
-		((unsigned int *)prop_val)[12] ||
-		(((unsigned int *)prop_val)[13] != 0x00010000u) ||
-		((unsigned int *)prop_val)[19] ||
-		(((unsigned int *)prop_val)[20] != 0x80000000u) ||
-		((((unsigned int *)prop_val)[11] & ~0x00010000u) !=
-		 0x02000000u) ||
-		(((unsigned int *)prop_val)[18] & ~0x80000000u) ||
-		(((unsigned int *)prop_val)[3] !=
-		 ((unsigned int *)prop_val)[10]) ||
-		(((unsigned int *)prop_val)[17] !=
-		 ((unsigned int *)prop_val)[24]) ||
-		(((unsigned int *)prop_val)[18] !=
-		 ((unsigned int *)prop_val)[25]) ||
-		(((unsigned int *)prop_val)[19] !=
-		 ((unsigned int *)prop_val)[26]) ||
-		(((unsigned int *)prop_val)[20] !=
-		 ((unsigned int *)prop_val)[27]))
-		goto nextNode;
-
-	    /* Use memcpy() to avoid alignment issues */
-	    (void)memcpy(&pci_addr, prop_val + 12,
-			 sizeof(pci_addr));
-	    (void)memcpy(&domain.io_addr, prop_val + 40,
-			 sizeof(domain.io_addr));
-	    (void)memcpy(&domain.mem_addr, prop_val + 68,
-			 sizeof(domain.mem_addr));
+	if (strcmp("SUNW,psycho", prop_val) &&
+	    strcmp("pci108e,8000", prop_val))
+	    shared_pci = 0;
+	else
+	    shared_pci = 1;
+
+	xf86Msg(X_INFO, "PCI host bridge found (\"%s\")\n", prop_val);
+
+	/* Get "bus-range" property */
+	prop_val = promGetProperty("bus-range", &prop_len);
+	if (!prop_val || (prop_len != 8) ||
+	    (((unsigned int *)prop_val)[1] >= 256) ||
+	    (((unsigned int *)prop_val)[0] > ((unsigned int *)prop_val)[1]))
+	    continue;
 
-	    domain.io_size  = 0x000000010000ull;
-	    domain.mem_size = 0x000080000000ull;
+	(void)memset(&domain, 0, sizeof(domain));
 
-	    goto newDomain;
-	}
+	domain.bus_min = ((int *)prop_val)[0];
+	domain.bus_max = ((int *)prop_val)[1];
 
-	do {
-	    volatile unsigned long long mem_match, mem_mask, io_match, io_mask;
-	    unsigned long Offset;
-	    pointer pSchizo;
-
-	    if (!strcmp("SUNW,schizo",    prop_val) ||
-		!strcmp("pci108e,8001",   prop_val))
-		bridge_name = "Schizo";
-	    else
-	    if (!strcmp("SUNW,schizo+",   prop_val) ||
-		!strcmp("pci108e,8002",   prop_val))
-		bridge_name = "Schizo+";
-	    else
-	    if (!strcmp("SUNW,tomatillo", prop_val) ||
-		!strcmp("pci108e,a801",   prop_val))
-		bridge_name = "Tomatillo";
-	    else
-		break;
+	/* Retrieve and validate "ranges" property */
+	prop_val = promGetProperty("ranges", &prop_len);
+	if (!prop_val || (prop_len <= 0) || (prop_len % 28))
+	    continue;
 
-	    /*
-	     * I have no docs on the "Schizo", nor on any of its revisions, but
-	     * judging from the Linux kernel, it also provides two PCI domains.
-	     * Each PCI configuration space is the usual 16M in size, followed
-	     * by a variable-length I/O space.  Each domain also provides a
-	     * variable-length memory space.  The kernel seems to think the I/O
-	     * spaces are 16M long, and the memory spaces, 2G, but these
-	     * assumptions are actually only present in source code comments.
-	     * Sun has, however, confirmed to me the validity of these
-	     * assumptions.
-	     */
-	    xf86Msg(X_INFO, "%s PCI host bridge found (\"%s\")\n",
-		bridge_name, prop_val);
-
-	    /* Get "bus-range" property */
-	    prop_val = promGetProperty("bus-range", &prop_len);
-	    if (!prop_val || (prop_len != 8) ||
-		(((unsigned int *)prop_val)[1] >= 256) ||
-		(((unsigned int *)prop_val)[0] > ((unsigned int *)prop_val)[1]))
+	/* Extract address space location and size from "ranges" property */
+	pci_addr = pci_size = 0;
+	for (prop_len /= 28;  prop_len--;  prop_val += 28) {
+	   /* Address space size must be a power of two */
+	   phys_size =
+		((unsigned long long)((unsigned int *)prop_val)[5] << 32) |
+		(unsigned long long)((unsigned int *)prop_val)[6];
+	   if (!phys_size || (phys_size & (phys_size - 1)))
 		goto nextNode;
 
-	    domain.bus_min = ((int *)prop_val)[0];
-	    domain.bus_max = ((int *)prop_val)[1];
-
-	    /* Get "reg" property */
-	    prop_val = promGetProperty("reg", &prop_len);
-	    if (!prop_val || ((prop_len != 48) && (prop_len != 64)))
+	   /* Address space must be size-aligned */
+	   phys_addr =
+		((unsigned long long)((unsigned int *)prop_val)[3] << 32) |
+		(unsigned long long)((unsigned int *)prop_val)[4];
+	   if (phys_addr % phys_size)
 		goto nextNode;
 
-	    /* Temporarily map some of Schizo's registers */
-	    pSchizo = sparcMapAperture(-1, VIDMEM_MMIO,
-		((unsigned long long *)prop_val)[2] - 0x000000010000ull,
-		0x00010000ul);
-
-	    /* Determine where PCI config, I/O and memory spaces reside */
-	    if ((((unsigned long long *)prop_val)[0] & 0x000000700000ull) ==
-		0x000000600000ull)
-		Offset = 0x0040;
-	    else
-		Offset = 0x0060;
-
-	    mem_match = PciReg(pSchizo, 0, Offset, unsigned long long);
-	    mem_mask  = PciReg(pSchizo, 0, Offset + 8, unsigned long long);
-	    io_match  = PciReg(pSchizo, 0, Offset + 16, unsigned long long);
-	    io_mask   = PciReg(pSchizo, 0, Offset + 24, unsigned long long);
-
-	    /* Unmap Schizo registers */
-	    xf86UnMapVidMem(-1, pSchizo, 0x00010000ul);
-
-	    /* Calculate sizes */
-	    mem_mask = (((mem_mask - 1) ^ mem_mask) >> 1) + 1;
-	    io_mask  = (((io_mask  - 1) ^ io_mask ) >> 1) + 1;
-
-	    if (io_mask <= 0x000001000000ull)	/* Nothing left for I/O */
-		goto nextNode;
+	   switch (prop_val[0] & 0x03) {
+	   case 0:	/* PCI configuration space */
+		if ((pci_addr == phys_addr) && (pci_size == phys_size))
+		    break;
+
+		if (pci_size)
+		    goto nextNode;
+		if (shared_pci) {
+		    phys_size <<= 1;
+		    if (!phys_size)
+			goto nextNode;
+		}
+		pci_addr = phys_addr;
+		pci_size = phys_size;
+		break;
 
-	    domain.mem_addr = mem_match & ~0x8000000000000000ull;
-	    domain.mem_size = mem_mask;
-	    pci_addr        = io_match  & ~0x8000000000000000ull;
-	    domain.io_addr  = pci_addr  +  0x0000000001000000ull;
-	    domain.io_size  = io_mask   -  0x0000000001000000ull;
+	   case 1:	/* I/O space */
+		if ((domain.io_addr == phys_addr) &&
+		    (domain.io_size == phys_size))
+		    break;
+
+		if (domain.io_size)
+		    goto nextNode;
+		domain.io_addr = phys_addr;
+		domain.io_size = phys_size;
+		break;
 
-	    goto newDomain;
-	} while (0);
+	   case 2:	/* 32-bit memory space */
+	   case 3:	/* 64-bit memory space */
+	   default:	/* Muffle compiler */
+		if ((domain.mem_addr == phys_addr) &&
+		    (domain.mem_size == phys_size))
+		    break;
+
+		if (domain.mem_size)
+		    goto nextNode;
+		domain.mem_addr = phys_addr;
+		domain.mem_size = phys_size;
+		break;
+	   }
+	}
 
-	xf86Msg(X_WARNING, "Unknown PCI host bridge: \"%s\"\n", prop_val);
-	continue;
+	/* Enforce minimum address space sizes */
+	if (!domain.mem_size ||
+	    (domain.io_size < 0x00010000ull) ||
+	    (pci_size < 0x01000000ull))
+	    continue;
 
-newDomain:
 	if (pciNumDomains >= MAX_DOMAINS) {
 	    xf86Msg(X_ERROR, "MAX_PCI_BUSES needs to be increased to"
-		    " accomodate this %s host bridge\n", bridge_name);
+		    " accomodate this host bridge\n");
 	    pciNumDomains++;
 	    continue;
 	}
 
-	/* Only map as much PCI configuration as we need */
-	domain.pci = (char *)sparcMapAperture(-1, VIDMEM_MMIO,
-	    pci_addr + PCI_MAKE_TAG(domain.bus_min, 0, 0),
-	    PCI_MAKE_TAG(domain.bus_max - domain.bus_min + 1, 0, 0)) -
-	    PCI_MAKE_TAG(domain.bus_min, 0, 0);
+	domain.tagMultiplier = pci_size >> 24;
+	domain.maxOffset = domain.tagMultiplier << 8;
+
+	/* Only mmap as much PCI configuration as we need */
+	phys_addr = pci_addr +
+	    (PCI_MAKE_TAG(domain.bus_min, 0, 0) * domain.tagMultiplier);
+	phys_addr &= ~pagemask;
+	phys_size = pci_addr +
+	    (PCI_MAKE_TAG(domain.bus_max + 1, 0, 0) * domain.tagMultiplier);
+	phys_size += pagemask;
+	phys_size &= ~pagemask;
+	phys_size -= phys_addr;
+
+	domain.pci = sparcMapAperture(-1, VIDMEM_MMIO, phys_addr, phys_size);
+	if (domain.pci == MAP_FAILED)
+	    continue;
+
+	domain.pci = (char *)domain.pci - (phys_addr - pci_addr);
+
+	xf86MsgVerb(X_INFO, 4, "Adding PCI domain %d:\n", pciNumDomains);
+	xf86MsgVerb(X_INFO, 4,
+	    "PCI Configuration space: 0x%016llx, size: 0x%09llx\n",
+	    pci_addr, pci_size);
+	xf86MsgVerb(X_INFO, 4,
+	    "PCI Input/Output space:  0x%016llx, size: 0x%09llx\n",
+	    domain.io_addr, domain.io_size);
+	xf86MsgVerb(X_INFO, 4,
+	    "PCI Memory space:        0x%016llx, size: 0x%09llx\n",
+	    domain.mem_addr, domain.mem_size);
+	xf86MsgVerb(X_INFO, 4, "PCI Bus range:           %d-%d\n",
+	    domain.bus_min, domain.bus_max);
 
 	/* Allocate a domain record */
 	pDomain = xnfalloc(sizeof(sparcDomainRec));
@@ -557,7 +588,7 @@
 	}
 
 	/* Next domain, please... */
-	xf86DomainInfo[pciNumDomains++] = pDomain;
+	xf86DomainInfo[pciNumDomains] = pDomain;
 
 	/*
 	 * OK, enough of the straight-forward stuff.  Time to deal with some
@@ -583,9 +614,9 @@
 	 * detect when master aborts occur.  Obviously, PCI discovery is much
 	 * simpler when master aborts are allowed to complete normally.
 	 *
-	 * Unfortunately, a number of non-Intel PCI implementations have chosen
-	 * to treat master aborts as severe errors.  The net effect is to
-	 * cripple PCI discovery algorithms in userland.
+	 * Unfortunately, a number of PCI implementations have chosen to treat
+	 * master aborts as severe errors.  The net effect is to cripple PCI
+	 * discovery algorithms in userland.
 	 *
 	 * On SPARCs, master aborts cause a number of different behaviours,
 	 * including delivering a signal to the userland application, rebooting
@@ -627,22 +658,27 @@
 	     node2 = promGetSibling(node2)) {
 	    /* Get "reg" property */
 	    prop_val = promGetProperty("reg", &prop_len);
-	    if (!prop_val || (prop_len % 20))
-		continue;
+	    if (prop_val && !(prop_len % 20)) {
+
+		/*
+		 * It's unnecessary to scan the entire "reg" property, but I'll
+		 * do so anyway.
+		 */
+		prop_len /= 20;
+		for (;  prop_len--;  prop_val += 20)
+		    SetBitInMap(PCI_DFN_FROM_TAG(*(CARD32 *)prop_val),
+			pDomain->dfn_mask);
+	    }
 
-	    /*
-	     * It's unnecessary to scan the entire "reg" property, but I'll do
-	     * so anyway.
-	     */
-	    prop_len /= 20;
-	    for (;  prop_len--;  prop_val += 20)
-		SetBitInMap(PCI_DFN_FROM_TAG(*(PCITAG *)prop_val),
-		    pDomain->dfn_mask);
+	    /* Scan "assigned-addresses" properties for resource sizes */
+	    sparcAssignedAddresses(&domain, node2);
 	}
 
 	/* Assume the host bridge is device 0, function 0 on its bus */
 	SetBitInMap(0, pDomain->dfn_mask);
 
+	pciNumDomains++;
+
 nextNode:;
     }
 
@@ -680,6 +716,9 @@
 
     result = sparcMapAperture(ScreenNum, Flags, pDomain->mem_addr + Base, Size);
 
+    if (result == MAP_FAILED)
+	FatalError("xf86MapDomainMemory():  sparcMapAperture() failure.\n");
+
     if (apertureFd >= 0) {
 	close(apertureFd);
 	apertureFd = -1;
@@ -705,6 +744,9 @@
 	pDomain->io = sparcMapAperture(ScreenNum, Flags,
 	    pDomain->io_addr, pDomain->io_size);
 
+	if (pDomain->io == MAP_FAILED)
+	    FatalError("xf86MapDomainIO():  sparcMapAperture() failure.\n");
+
 	if (apertureFd >= 0) {
 	    close(apertureFd);
 	    apertureFd = -1;
@@ -868,9 +910,9 @@
     return TRUE;
 }
 
-#endif /* !INCLUDE_XF86_NO_DOMAIN */
+#endif /* !defined(INCLUDE_XF86_NO_DOMAIN) */
 
-#endif /* defined(sun) */
+#endif /* defined(sun) || defined(__OpenBSD__) */
 
 #if defined(ARCH_PCI_PCI_BRIDGE)
 
@@ -929,7 +971,7 @@
 		(pPCI->pci_vendor == PCI_VENDOR_CREATIVE) ||
 		(pPCI->pci_vendor == PCI_VENDOR_ENSONIQ))
 		break;
-            /* Fall through */
+	    /* Fall through */
 
 	case PCI_CLASS_DISPLAY:
 	    continue;
Index: xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h:1.46 xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h:1.48
--- xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h:1.46	Fri Oct 14 11:17:02 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h	Tue Feb 13 13:30:10 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h,v 1.46 2005/10/14 15:17:02 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Pci.h,v 1.48 2007/02/13 18:30:10 tsi Exp $ */
 /*
  * Copyright 1998 by Concurrent Computer Corporation
  *
@@ -70,7 +70,7 @@
  *
  */
 /*
- * Copyright (c) 1999-2003 by The XFree86 Project, Inc.
+ * Copyright (c) 1999-2007 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -150,7 +150,9 @@
 #define PCI_CMD_STEPPING_ENABLE		0x0080
 #define PCI_CMD_SERR_ENABLE		0x0100
 #define PCI_CMD_BACKTOBACK_ENABLE	0x0200
+#define PCI_CMD_INTERRUPT_DISABLE	0x0400
 #define PCI_STAT_MASK			0xffff0000
+#define PCI_STAT_INTERRUPT_PENDING	0x00080000
 #define PCI_STAT_CAPABILITY		0x00100000
 #define PCI_STAT_66MHZ			0x00200000
 #define PCI_STAT_UDF			0x00400000
@@ -199,62 +201,117 @@
 
 /* Sub class values */
 /* 0x00 prehistoric subclasses */
-#define PCI_SUBCLASS_PREHISTORIC_MISC	0x00
-#define PCI_SUBCLASS_PREHISTORIC_VGA	0x01
+#define PCI_SUBCLASS_PREHISTORIC_MISC		0x00
+#define PCI_SUBCLASS_PREHISTORIC_VGA		0x01
 
 /* 0x01 mass storage subclasses */
 #define PCI_SUBCLASS_MASS_STORAGE_SCSI		0x00
 #define PCI_SUBCLASS_MASS_STORAGE_IDE		0x01
+#define PCI_IF_MASS_STORAGE_IDE_PRIMARY_MODE		0x01
+#define PCI_IF_MASS_STORAGE_IDE_PRIMARY_INDICATOR	0x02
+#define PCI_IF_MASS_STORAGE_IDE_SECONDARY_MODE		0x04
+#define PCI_IF_MASS_STORAGE_IDE_SECONDARY_INDICATOR	0x08
+#define PCI_IF_MASS_STORAGE_IDE_MASTER			0x80
 #define PCI_SUBCLASS_MASS_STORAGE_FLOPPY	0x02
 #define PCI_SUBCLASS_MASS_STORAGE_IPI		0x03
+#define PCI_SUBCLASS_MASS_STORAGE_RAID		0x04
+#define PCI_SUBCLASS_MASS_STORAGE_ATA		0x05
+#define PCI_IF_MASS_STORAGE_ATA_SINGLE_DMA		0x20
+#define PCI_IF_MASS_STORAGE_ATA_CHAINED_DMA		0x30
 #define PCI_SUBCLASS_MASS_STORAGE_MISC		0x80
 
 /* 0x02 network subclasses */
-#define PCI_SUBCLASS_NETWORK_ETHERNET	0x00
-#define PCI_SUBCLASS_NETWORK_TOKENRING	0x01
-#define PCI_SUBCLASS_NETWORK_FDDI	0x02
-#define PCI_SUBCLASS_NETWORK_MISC	0x80
+#define PCI_SUBCLASS_NETWORK_ETHERNET		0x00
+#define PCI_SUBCLASS_NETWORK_TOKENRING		0x01
+#define PCI_SUBCLASS_NETWORK_FDDI		0x02
+#define PCI_SUBCLASS_NETWORK_ATM		0x03
+#define PCI_SUBCLASS_NETWORK_ISDN		0x04
+#define PCI_SUBCLASS_NETWORK_WORLDFIP		0x05
+#define PCI_SUBCLASS_NETWORK_PICMIG		0x06
+#define PCI_SUBCLASS_NETWORK_MISC		0x80
 
 /* 0x03 display subclasses */
-#define PCI_SUBCLASS_DISPLAY_VGA	0x00
-#define PCI_SUBCLASS_DISPLAY_XGA	0x01
-#define PCI_SUBCLASS_DISPLAY_MISC	0x80
+#define PCI_SUBCLASS_DISPLAY_VGA		0x00
+#define PCI_IF_DISPLAY_VGA				0x00
+#define PCI_IF_DISPLAY_8514				0x01
+#define PCI_SUBCLASS_DISPLAY_XGA		0x01
+#define PCI_SUBCLASS_DISPLAY_3D			0x02
+#define PCI_SUBCLASS_DISPLAY_MISC		0x80
 
 /* 0x04 multimedia subclasses */
-#define PCI_SUBCLASS_MULTIMEDIA_VIDEO	0x00
-#define PCI_SUBCLASS_MULTIMEDIA_AUDIO	0x01
-#define PCI_SUBCLASS_MULTIMEDIA_MISC	0x80
+#define PCI_SUBCLASS_MULTIMEDIA_VIDEO		0x00
+#define PCI_SUBCLASS_MULTIMEDIA_AUDIO		0x01
+#define PCI_SUBCLASS_MULTIMEDIA_TELEPHONY	0x02
+#define PCI_SUBCLASS_MULTIMEDIA_MISC		0x80
 
 /* 0x05 memory subclasses */
-#define PCI_SUBCLASS_MEMORY_RAM		0x00
-#define PCI_SUBCLASS_MEMORY_FLASH	0x01
-#define PCI_SUBCLASS_MEMORY_MISC	0x80
+#define PCI_SUBCLASS_MEMORY_RAM			0x00
+#define PCI_SUBCLASS_MEMORY_FLASH		0x01
+#define PCI_SUBCLASS_MEMORY_MISC		0x80
 
 /* 0x06 bridge subclasses */
-#define PCI_SUBCLASS_BRIDGE_HOST	0x00
-#define PCI_SUBCLASS_BRIDGE_ISA		0x01
-#define PCI_SUBCLASS_BRIDGE_EISA	0x02
-#define PCI_SUBCLASS_BRIDGE_MC		0x03
-#define PCI_SUBCLASS_BRIDGE_PCI		0x04
-#define PCI_SUBCLASS_BRIDGE_PCMCIA	0x05
-#define PCI_SUBCLASS_BRIDGE_NUBUS	0x06
-#define PCI_SUBCLASS_BRIDGE_CARDBUS	0x07
-#define PCI_SUBCLASS_BRIDGE_RACEWAY	0x08
-#define PCI_SUBCLASS_BRIDGE_MISC	0x80
-#define PCI_IF_BRIDGE_PCI_SUBTRACTIVE	0x01
+#define PCI_SUBCLASS_BRIDGE_HOST		0x00
+#define PCI_SUBCLASS_BRIDGE_ISA			0x01
+#define PCI_SUBCLASS_BRIDGE_EISA		0x02
+#define PCI_SUBCLASS_BRIDGE_MC			0x03
+#define PCI_SUBCLASS_BRIDGE_PCI			0x04
+#define PCI_IF_BRIDGE_PCI_SUBTRACTIVE			0x01
+#define PCI_SUBCLASS_BRIDGE_PCMCIA		0x05
+#define PCI_SUBCLASS_BRIDGE_NUBUS		0x06
+#define PCI_SUBCLASS_BRIDGE_CARDBUS		0x07
+#define PCI_SUBCLASS_BRIDGE_RACEWAY		0x08
+#define PCI_IF_BRIDGE_RACEWAY_TRANSPARENT		0x00
+#define PCI_IF_BRIDGE_RACEWAY_ENDPOINT			0x01
+#define PCI_SUBCLASS_BRIDGE_PCI_SEMITRANSPARENT	0x09
+#define PCI_IF_BRIDGE_PCI_SEMITRANSPARENT_PRIMARY	0x40
+#define PCI_IF_BRIDGE_PCI_SEMITRANSPARENT_SECONDARY	0x80
+#define PCI_SUBCLASS_BRIDGE_INFINIBAND		0x0a
+#define PCI_SUBCLASS_BRIDGE_MISC		0x80
 
 /* 0x07 communications controller subclasses */
 #define PCI_SUBCLASS_COMMUNICATIONS_SERIAL	0x00
+#define PCI_IF_COMMUNICATIONS_SERIAL_XT			0x00
+#define PCI_IF_COMMUNICATIONS_SERIAL_16450		0x01
+#define PCI_IF_COMMUNICATIONS_SERIAL_16550		0x02
+#define PCI_IF_COMMUNICATIONS_SERIAL_16650		0x03
+#define PCI_IF_COMMUNICATIONS_SERIAL_16750		0x04
+#define PCI_IF_COMMUNICATIONS_SERIAL_16850		0x05
+#define PCI_IF_COMMUNICATIONS_SERIAL_16950		0x06
 #define PCI_SUBCLASS_COMMUNICATIONS_PARALLEL	0x01
+#define PCI_IF_COMMUNICATIONS_PARALLEL_GENERIC		0x00
+#define PCI_IF_COMMUNICATIONS_PARALLEL_BIDIRECTIONAL	0x01
+#define PCI_IF_COMMUNICATIONS_PARALLEL_ECP		0x02
+#define PCI_IF_COMMUNICATIONS_PARALLEL_IEEE1284		0x03
+#define PCI_IF_COMMUNICATIONS_PARALLEL_IEEE1284_TARGET	0xfe
 #define PCI_SUBCLASS_COMMUNICATIONS_MULTISERIAL	0x02
 #define PCI_SUBCLASS_COMMUNICATIONS_MODEM	0x03
+#define PCI_IF_COMMUNICATIONS_MODEM_GENERIC		0x00
+#define PCI_IF_COMMUNICATIONS_MODEM_16450		0x01
+#define PCI_IF_COMMUNICATIONS_MODEM_16550		0x02
+#define PCI_IF_COMMUNICATIONS_MODEM_16650		0x03
+#define PCI_IF_COMMUNICATIONS_MODEM_16750		0x04
+#define PCI_SUBCLASS_COMMUNICATIONS_GPIB	0x04
+#define PCI_SUBCLASS_COMMUNICATIONS_SMARTCARD	0x05
 #define PCI_SUBCLASS_COMMUNICATIONS_MISC	0x80
 
 /* 0x08 generic system peripherals subclasses */
 #define PCI_SUBCLASS_SYSPERIPH_PIC	0x00
+#define PCI_IF_SYSPERIPH_PIC_8259		0x00
+#define PCI_IF_SYSPERIPH_PIC_ISA		0x01
+#define PCI_IF_SYSPERIPH_PIC_EISA		0x02
+#define PCI_IF_SYSPERIPH_PIC_IO_APIC		0x10
+#define PCI_IF_SYSPERIPH_PIC_IOx_APIC		0x20
 #define PCI_SUBCLASS_SYSPERIPH_DMA	0x01
+#define PCI_IF_SYSPERIPH_DMA_8237		0x00
+#define PCI_IF_SYSPERIPH_DMA_ISA		0x01
+#define PCI_IF_SYSPERIPH_DMA_EISA		0x02
 #define PCI_SUBCLASS_SYSPERIPH_TIMER	0x02
+#define PCI_IF_SYSPERIPH_TIMER_8254		0x00
+#define PCI_IF_SYSPERIPH_TIMER_ISA		0x01
+#define PCI_IF_SYSPERIPH_TIMER_EISA		0x02
 #define PCI_SUBCLASS_SYSPERIPH_RTC	0x03
+#define PCI_IF_SYSPERIPH_RTC_GENERIC		0x00
+#define PCI_IF_SYSPERIPH_RTC_ISA		0x01
 #define PCI_SUBCLASS_SYSPERIPH_HOTPCI	0x04
 #define PCI_SUBCLASS_SYSPERIPH_MISC	0x80
 
@@ -264,6 +321,8 @@
 #define PCI_SUBCLASS_INPUT_MOUSE	0x02
 #define PCI_SUBCLASS_INPUT_SCANNER	0x03
 #define PCI_SUBCLASS_INPUT_GAMEPORT	0x04
+#define PCI_IF_INPUT_GAMEPORT_GENERIC		0x00
+#define PCI_IF_INPUT_GAMEPORT_EXTENDED		0x10
 #define PCI_SUBCLASS_INPUT_MISC		0x80
 
 /* 0x0a docking station subclasses */
@@ -281,16 +340,24 @@
 
 /* 0x0c serial bus controller subclasses */
 #define PCI_SUBCLASS_SERIAL_FIREWIRE		0x00
+#define PCI_IF_SERIAL_FIREWIRE_IEEE1394			0x00
+#define PCI_IF_SERIAL_FIREWIRE_IEEE1394_OPENHCI		0x10
 #define PCI_SUBCLASS_SERIAL_ACCESS		0x01
 #define PCI_SUBCLASS_SERIAL_SSA			0x02
 #define PCI_SUBCLASS_SERIAL_USB			0x03
+#define PCI_IF_SERIAL_USB_UHCS				0x00
+#define PCI_IF_SERIAL_USB_OHCS				0x10
+#define PCI_IF_SERIAL_USB_OTHER				0x80
+#define PCI_IF_SERIAL_USB_DEVICE			0xfe
 #define PCI_SUBCLASS_SERIAL_FIBRECHANNEL	0x04
 #define PCI_SUBCLASS_SERIAL_SMBUS		0x05
 
 /* 0x0d wireless controller subclasses */
 #define PCI_SUBCLASS_WIRELESS_IRDA		0x00
 #define PCI_SUBCLASS_WIRELESS_CONSUMER_IR	0x01
-#define PCI_SUBCLASS_WIRELESS_RF		0x02
+#define PCI_SUBCLASS_WIRELESS_RF		0x10
+#define PCI_SUBCLASS_WIRELESS_BLUETOOTH		0x11
+#define PCI_SUBCLASS_WIRELESS_BROADBAND		0x12
 #define PCI_SUBCLASS_WIRELESS_MISC		0x80
 
 /* 0x0e intelligent I/O controller subclasses */
@@ -309,6 +376,9 @@
 
 /* 0x11 data acquisition and signal processing controller subclasses */
 #define PCI_SUBCLASS_DATAACQ_DPIO	0x00
+#define PCI_SUBCLASS_DATAACQ_COUNTER	0x01
+#define PCI_SUBCLASS_DATAACQ_SYNCHRO	0x10
+#define PCI_SUBCLASS_DATAACQ_MANAGEMENT	0x20
 #define PCI_SUBCLASS_DATAACQ_MISC	0x80
 
 
@@ -386,6 +456,7 @@
 #define PCI_PCI_BRIDGE_IO_REG		0x1c
 #define PCI_PCI_BRIDGE_MEM_REG		0x20
 #define PCI_PCI_BRIDGE_PMEM_REG		0x24
+#define PCI_PCI_BRIDGE_ROM_REG		0x38
 
 #define PCI_PPB_IOBASE_EXTRACT(x)	(((x) << 8) & 0xFF00)
 #define PCI_PPB_IOLIMIT_EXTRACT(x)	(((x) << 0) & 0xFF00)
@@ -408,6 +479,7 @@
 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1	0x200
 #define PCI_CB_BRIDGE_CTL_POST_WRITES	0x400
 
+#define PCI_CB_CAP_PTR			0x14
 #define PCI_CB_SEC_STATUS_REG		0x16	/* Secondary status */
 #define PCI_CB_PRIMARY_BUS_REG		0x18	/* PCI bus number */
 #define PCI_CB_CARD_BUS_REG		0x19	/* CardBus bus number */
@@ -653,10 +725,17 @@
 #endif
 		} b_u_io;
 	    } uio_rom;
-	    struct {
-		CARD32 rsvd3;		/* Offset 0x34 - 0x37 */
+#if X_BYTE_ORDER == X_BIG_ENDIAN
+	    CARD8 capptr;		/* Offset 0x34 */
+	    CARD8 rsvd3[3];		/* Offset 0x35 - 0x37 */
+#else
+	    CARD8 rsvd3[3];		/* Offset 0x35 - 0x37 */
+	    CARD8 capptr;		/* Offset 0x34 */
+#endif
+	    union {
 		CARD32 rsvd4;		/* Offset 0x38 - 0x3b */
-	    } rsvd;
+		CARD32 br_rom;
+	    } ubr_rom;
 	} cd;
     } cx;
     union {				/* Offset 0x3c - 0x3f */
@@ -676,15 +755,15 @@
 #endif
 	    } mmii;
 	} mmii;
-	struct {				/* header type 1 */
+	struct {				/* header type 1 & 2 */
 #if X_BYTE_ORDER == X_BIG_ENDIAN
-	    CARD16 bridge_control;	/* upper 8 bits reserved */
-	    CARD8  rsvd2;
-	    CARD8  rsvd1;
-#else
-	    CARD8  rsvd1;
-	    CARD8  rsvd2;
-	    CARD16 bridge_control;	/* upper 8 bits reserved */
+	    CARD16 bridge_control;
+	    CARD8  int_pin;
+	    CARD8  int_line;
+#else
+	    CARD8  int_line;
+	    CARD8  int_pin;
+	    CARD16 bridge_control;
 #endif
 	} bctrl;
     } bm;
@@ -711,7 +790,7 @@
     int	      funcnum;
     pciCfgSpc cfgspc;
     int	      basesize[7];	/* number of bits in base addr allocations */
-    Bool      minBasesize;
+    int       minBasesize;	/* was a Bool, now a bit mask */
     CARD32    listed_class;
     pointer   businfo;		/* pointer to secondary's bus info structure */
     Bool      fakeDevice;	/* Device added by system chipset support */
@@ -787,6 +866,8 @@
 #define pci_prefetch_upper_mem_limit  cfgspc.regs.cx.cd.um_ssys_id.pftch_umem_limit
 #define pci_upper_io_base	      cfgspc.regs.cx.cd.uio_rom.b_u_io.io_ubase
 #define pci_upper_io_limit	      cfgspc.regs.cx.cd.uio_rom.b_u_io.io_ulimit
+#define pci_capptr		      cfgspc.regs.cx.cd.capptr
+#define pci_br_rom		      cfgspc.regs.cx.cd.ubr_rom.br_rom
 #define pci_int_line		      cfgspc.regs.bm.mmii.mmii.int_line
 #define pci_int_pin		      cfgspc.regs.bm.mmii.mmii.int_pin
 #define pci_min_gnt		      cfgspc.regs.bm.mmii.mmii.min_gnt
@@ -822,7 +903,8 @@
 ADDRESS	      pciBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr);
 ADDRESS	      pciHostAddrToBusAddr(PCITAG tag, PciAddrType type, ADDRESS addr);
 PCITAG	      pciTag(int busnum, int devnum, int funcnum);
-int	      pciGetBaseSize(PCITAG tag, int indx, Bool destructive, Bool *min);
+int	      pciGetBaseSize(pciConfigPtr device, int indx,
+			     Bool destructive, int *min);
 CARD32	      pciCheckForBrokenBase(PCITAG tag,int basereg);
 Bool          xf86LocatePciMemoryArea(PCITAG tag,
 				      char **devName, unsigned int *devOffset,
Index: xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Sbus.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Sbus.h:1.10 xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Sbus.h:1.13
--- xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Sbus.h:1.10	Tue Dec  7 17:19:50 2004
+++ xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Sbus.h	Thu Mar 15 10:38:36 2007
@@ -1,3 +1,4 @@
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Sbus.h,v 1.13 2007/03/15 14:38:36 tsi Exp $ */
 /*
  * Platform specific SBUS and OpenPROM access declarations.
  *
@@ -20,7 +21,6 @@
  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/xf86Sbus.h,v 1.10 2004/12/07 22:19:50 tsi Exp $ */
 
 #ifndef _XF86_SBUS_H
 #define _XF86_SBUS_H
@@ -36,13 +36,68 @@
 #elif defined(SVR4)
 # include <sys/fbio.h>
 # include <sys/openpromio.h>
-#elif defined(__OpenBSD__) && defined(__sparc64__)
-/* XXX */
+#elif defined(__OpenBSD__)
+# include <machine/openpromio.h>
+# include <dev/wscons/wsconsio.h>
+  /* Compatibility #defines */
+# define FBTYPE_SUN2BW		WSDISPLAY_TYPE_SUNBW
+# define FBTYPE_SUN2COLOR	WSDISPLAY_TYPE_SUNCG2
+# define FBTYPE_SUN3COLOR	WSDISPLAY_TYPE_SUNCG3
+# define FBTYPE_SUN4COLOR	WSDISPLAY_TYPE_SUNCG4
+# define FBTYPE_SUNFAST_COLOR	WSDISPLAY_TYPE_SUNCG6
+# define FBTYPE_MEMCOLOR	WSDISPLAY_TYPE_SUNCG8
+# define FBTYPE_SUNGP3		WSDISPLAY_TYPE_SUNCG12
+# define FBTYPE_SUNGT		(-1)	/* Doesn't seem to exist */
+# define FBTYPE_SUNLEO		WSDISPLAY_TYPE_SUNLEO
+# define FBTYPE_MDICOLOR	WSDISPLAY_TYPE_SUNCG14
+# define FBTYPE_TCXCOLOR	WSDISPLAY_TYPE_SUNTCX
+# define FBTYPE_CREATOR		WSDISPLAY_TYPE_SUNFFB
+
+# define fbcmap			wsdisplay_cmap
+
+# define FBIOGETCMAP		WSDISPLAYIO_GETCMAP
+# define FBIOPUTCMAP		WSDISPLAYIO_PUTCMAP
+
+# define fbcursor		wsdisplay_cursor
+# define set			which
+
+# define FBIOSCURSOR		WSDISPLAYIO_SCURSOR
+# define FBIOGCURSOR		WSDISPLAYIO_GCURSOR
+
+# define FB_CUR_SETCUR		WSDISPLAY_CURSOR_DOCUR
+# define FB_CUR_SETPOS		WSDISPLAY_CURSOR_DOPOS
+# define FB_CUR_SETHOT		WSDISPLAY_CURSOR_DOHOT
+# define FB_CUR_SETCMAP		WSDISPLAY_CURSOR_DOCMAP
+# define FB_CUR_SETSHAPE	WSDISPLAY_CURSOR_DOSHAPE
+# define FB_CUR_SETALL		WSDISPLAY_CURSOR_DOALL
+
+# define FBIOSVIDEO		WSDISPLAYIO_SVIDEO
 #elif defined(CSRG_BASED)
 # if defined(__FreeBSD__)
 #  include <sys/types.h>
 #  include <sys/fbio.h>
 #  include <dev/ofw/openpromio.h>
+# elif defined(__NetBSD__)
+#  include <dev/sun/fbio.h>
+#  include <dev/ofw/openfirmio.h>
+   /*
+    * Translate from openpromio to openfirmio.  This could likely be avoided by
+    * #include'ing <machine/openpromio.h> or <sparc/openpromio.h> instead.
+    */
+#  define opiocdesc		ofiocdesc
+#  define op_nodeid		of_nodeid
+#  define op_namelen		of_namelen
+#  define op_name		of_name
+#  define op_buflen		of_buflen
+#  define op_buf		of_buf
+
+#  define OPIOCGET		OFIOCGET
+#  define OPIOCSET		OFIOCSET
+#  define OPIOCNEXTPROP		OFIOCNEXTPROP
+#  define OPIOCGETOPTNODE	OFIOCGETOPTNODE
+#  define OPIOCGETNEXT		OFIOCGETNEXT
+#  define OPIOCGETCHILD		OFIOCGETCHILD
+#  define OPIOCFINDDEVICE	OFIOCFINDDEVICE
 # else
 #  include <machine/fbio.h>
 # endif
@@ -85,7 +140,7 @@
 #endif
 
 #ifndef   FBTYPE_MDICOLOR
-# ifdef CSRG_BASED
+# if defined(CSRG_BASED) && !defined(__NetBSD__)
 #  define FBTYPE_MDICOLOR 28
 # else
 #  define FBTYPE_MDICOLOR 20
@@ -101,7 +156,7 @@
 #endif
 
 #ifndef   FBTYPE_CREATOR
-# if defined(linux)
+# if defined(linux) || defined(__NetBSD__)
 #  define FBTYPE_CREATOR 22
 # elif defined(CSRG_BASED)
 #  define FBTYPE_CREATOR 30
@@ -110,6 +165,14 @@
 # endif
 #endif
 
+#ifndef   FBTYPE_P9100
+# ifdef __NetBSD__
+#  define  FBTYPE_P9100 21
+# else
+#  define  FBTYPE_P9100 -1	/* Not supported */
+# endif
+#endif
+
 #endif /* XFree86Module */
 
 #endif /* _XF86_SBUS_H */
Index: xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c:1.11 xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c:1.12
--- xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c:1.11	Sat Jan  8 16:57:56 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c	Fri Jan  5 09:52:09 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c,v 1.11 2005/01/08 21:57:56 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c,v 1.12 2007/01/05 14:52:09 tsi Exp $ */
 /*
  * Copyright (C) 2002-2003 The XFree86 Project, Inc.
  * All rights reserved.
@@ -1012,7 +1012,8 @@
 		continue;
 
 	    case PCI_CLASS_DISPLAY:
-		if (pPCI->pci_sub_class == PCI_SUBCLASS_DISPLAY_VGA)
+		if ((pPCI->pci_sub_class == PCI_SUBCLASS_DISPLAY_VGA) &&
+		    (pPCI->pci_prog_if == PCI_IF_DISPLAY_VGA))
 		    break;
 		continue;
 
Index: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c:1.3 xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c:1.4
--- xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c:1.3	Fri Oct 14 11:17:02 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c	Sat Sep  2 12:44:21 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c,v 1.3 2005/10/14 15:17:02 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/dgux/dgux_init.c,v 1.4 2006/09/02 16:44:21 dawes Exp $ */
 /*
  * INTEL DG/UX RELEASE 4.20 MU03
  * Copyright 1997 Takis Psarogiannakopoulos Cambridge,UK
@@ -144,7 +144,7 @@
 
 int xf86ProcessArgument(argc, argv, i)
 int argc;
-char *argv[];
+const char *argv[];
 int i;
 {
 	if (!strcmp(argv[i], "-keeptty"))
Index: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c:1.3 xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c:1.4
--- xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c:1.3	Fri Oct 14 11:17:03 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c	Sat Sep  2 12:44:21 2006
@@ -20,7 +20,7 @@
  * PERFORMANCE OF THIS SOFTWARE.
  *
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c,v 1.3 2005/10/14 15:17:03 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/hurd/hurd_init.c,v 1.4 2006/09/02 16:44:21 dawes Exp $ */
 
 #include <X11/X.h>
 
@@ -41,7 +41,7 @@
 #include <mach.h>
 
 int 
-xf86ProcessArgument( int argc,char **argv, int i )
+xf86ProcessArgument( int argc, const char **argv, int i )
 {
     return 0;
 }
Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c:3.20 xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c:3.21
--- xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c:3.20	Fri Oct 14 11:17:03 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c	Mon Jun 19 11:14:57 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c,v 3.20 2005/10/14 15:17:03 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnxResource.c,v 3.21 2006/06/19 15:14:57 tsi Exp $ */
 
 /* Resource information code */
 
@@ -206,6 +206,8 @@
 
 #if defined(__sparc__) || defined(__powerpc__)
     RANGE(range, 0x00000000, 0x00ffffff, ResExcIoBlock);
+#elif defined(__mips__)
+    RANGE(range, 0x00000000, 0xffffffff, ResExcIoBlock);
 #else
     RANGE(range, 0x00000000, 0x0000ffff, ResExcIoBlock);
 #endif
@@ -224,6 +226,8 @@
 
 #if defined(__sparc__) || defined(__powerpc__)
     RANGE(range, 0x00000000, 0x00ffffff, ResExcIoBlock);
+#elif defined(__mips__)
+    RANGE(range, 0x00000000, 0xffffffff, ResExcIoBlock);
 #else
     RANGE(range, 0x00000000, 0x0000ffff, ResExcIoBlock);
 #endif
@@ -244,6 +248,8 @@
 
 #if defined(__sparc__) || defined(__powerpc__)
     RANGE(range, 0x00000000, 0x00ffffff, ResExcIoBlock);
+#elif defined(__mips__)
+    RANGE(range, 0x00000000, 0xffffffff, ResExcIoBlock);
 #else
     RANGE(range, 0x00000000, 0x0000ffff, ResExcIoBlock);
 #endif
@@ -270,6 +276,8 @@
     ret = xf86AddResToList(ret, &range, -1);
 #if defined(__sparc__) || defined(__powerpc__)
     RANGE(range, 0x00ffffff, 0x00ffffff, ResExcIoBlock);
+#elif defined(__mips__)
+    RANGE(range, 0xffffffff, 0xffffffff, ResExcIoBlock);
 #else
     RANGE(range, 0x0000ffff, 0x0000ffff, ResExcIoBlock);
 #endif
Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c:3.17 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c:3.18
--- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c:3.17	Mon Jan  9 10:00:22 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c	Sat Sep  2 12:44:21 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c,v 3.17 2006/01/09 15:00:22 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_init.c,v 3.18 2006/09/02 16:44:21 dawes Exp $ */
 /*
  * Copyright 1992 by Orest Zborowski <obz@Kodak.com>
  * Copyright 1993 by David Wexelblat <dwex@goblin.org>
@@ -295,7 +295,7 @@
 }
 
 int
-xf86ProcessArgument(int argc, char *argv[], int i)
+xf86ProcessArgument(int argc, const char *argv[], int i)
 {
 	/*
 	 * Keep server from detaching from controlling tty.  This is useful
Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c:3.11 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c:3.12
--- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c:3.11	Fri Oct 14 11:17:03 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c	Tue Feb 13 13:30:10 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c,v 3.11 2005/10/14 15:17:03 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_pci.c,v 3.12 2007/02/13 18:30:10 tsi Exp $ */
 
 #include <stdio.h>
 #include <X11/X.h>
@@ -28,49 +28,55 @@
     unsigned int num;
     signed PCIADDR_TYPE Size;
 
-    if (index >= 7)
+    if ((index < 0) || (index > 7))
 	return FALSE;
-    
-    if (!(file = fopen("/proc/bus/pci/devices","r")))
+
+    if (!(file = fopen("/proc/bus/pci/devices", "r")))
 	return FALSE;
-    do {
-	res = fgets(c,0x1ff,file);
-	if (res) {
-	    num = sscanf(res,
-			 /*bus+dev vendorid deviceid irq */
-			 "%02x%02x\t%*04x%*04x\t%*x"
-			 /* 7 PCI resource base addresses */
-			 "\t%*x\t%*x\t%*x\t%*x\t%*x\t%*x\t%*x"
-			 /* 7 PCI resource sizes, and then optionally a driver name */
-			 "\t" PCIADDR_FMT
-			 "\t" PCIADDR_FMT
-			 "\t" PCIADDR_FMT
-			 "\t" PCIADDR_FMT
-			 "\t" PCIADDR_FMT
-			 "\t" PCIADDR_FMT
-			 "\t" PCIADDR_FMT,
-			 &bus,&devfn,&size[0],&size[1],&size[2],&size[3],
-			 &size[4],&size[5],&size[6]);
-	    if (num != 9) {  /* apparantly not 2.3 style */ 
-		fclose(file);
-		return FALSE;
-	    }
-	    dev = devfn >> 3;
-	    fn = devfn & 0x7;
-	    if (tag == pciTag(bus,dev,fn)) {
-		*bits = 0;
-		if (size[index] != 0) {
-		    Size = size[index] - ((PCIADDR_TYPE) 1);
-		    while (Size & ((PCIADDR_TYPE) 0x01)) {
-			Size = Size >> ((PCIADDR_TYPE) 1);
-			(*bits)++;
-		    }
-		}
-		fclose(file);
+
+    while ((res = fgets(c, sizeof(c) - 1, file))) {
+	num = sscanf(res,
+		     /*bus+dev vendorid deviceid irq */
+		     "%02x%02x\t%*04x%*04x\t%*x"
+		     /* 7 resource base addresses */
+		     "\t%*x\t%*x\t%*x\t%*x\t%*x\t%*x\t%*x"
+		     /* 7 resource sizes, and then an optional driver name */
+		     "\t" PCIADDR_FMT
+		     "\t" PCIADDR_FMT
+		     "\t" PCIADDR_FMT
+		     "\t" PCIADDR_FMT
+		     "\t" PCIADDR_FMT
+		     "\t" PCIADDR_FMT
+		     "\t" PCIADDR_FMT,
+		     &bus, &devfn, &size[0], &size[1], &size[2], &size[3],
+		     &size[4], &size[5], &size[6]);
+
+	if (num != 9)	/* apparently not 2.3 style */
+	    break;
+
+	dev = devfn >> 3;
+	fn = devfn & 0x7;
+	if (tag == pciTag(bus, dev, fn)) {
+	    fclose(file);
+	    *bits = 0;
+
+	    if (index == 7)	/* P2P bridge ROM pointer */
+		index = 6;
+
+	    if (size[index] == 0)
 		return TRUE;
-	    }
+
+	    Size = size[index] - ((PCIADDR_TYPE) 1);
+	    if (Size & size[index])
+		return FALSE;
+
+	    while (Size & ((PCIADDR_TYPE) 0x01)) {
+		Size >>= 1;
+		(*bits)++;
+
+	    return TRUE;
 	}
-    } while (res);
+    }
 
     fclose(file);
     return FALSE;
Index: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c:3.73 xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c:3.74
--- xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c:3.73	Sun Feb 19 19:14:37 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c	Tue Oct 31 10:45:35 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c,v 3.73 2006/02/20 00:14:37 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/lnx_video.c,v 3.74 2006/10/31 15:45:35 tsi Exp $ */
 /*
  * Copyright 1992 by Orest Zborowski <obz@Kodak.com>
  * Copyright 1993 by David Wexelblat <dwex@goblin.org>
@@ -501,8 +501,9 @@
 #endif
 	}
 	close(fd);
-#elif !defined(__mc68000__) && !defined(__sparc__) && !defined(__mips__) && !defined(__sh__) && !defined(__hppa__)
-	if (ioperm(0, 1024, 1) || iopl(3))
+#elif !defined(__mc68000__) && !defined(__sparc__) && !defined(__mips__) && \
+      !defined(__sh__) && !defined(__hppa__)
+	if ((ioperm(0, 1024, 1) || iopl(3)) && (errno != ENOSYS))
 		FatalError("xf86EnableIOPorts: Failed to set IOPL for I/O\n");
 # if !defined(__alpha__)
 	ioperm(0x40,4,0); /* trap access to the timer chip */
@@ -522,7 +523,8 @@
 #if defined(__powerpc__)
 	munmap((void *)ioBase, 0x20000);
 	ioBase = NULL;
-#elif !defined(__mc68000__) && !defined(__sparc__) && !defined(__mips__) && !defined(__sh__) && !defined(__hppa__)
+#elif !defined(__mc68000__) && !defined(__sparc__) && !defined(__mips__) && \
+      !defined(__sh__) && !defined(__hppa__)
 	iopl(0);
 	ioperm(0, 1024, 0);
 #endif
@@ -541,12 +543,17 @@
 Bool
 xf86DisableInterrupts()
 {
-#if !defined(__mc68000__) && !defined(__powerpc__) && !defined(__sparc__) && !defined(__mips__) && !defined(__ia64__) && !defined(__sh__) && !defined(__hppa__)
+#if !defined(__mc68000__) && !defined(__powerpc__) && !defined(__sparc__) && \
+    !defined(__mips__) && !defined(__ia64__) && !defined(__sh__) && \
+    !defined(__hppa__)
 	if (!ExtendedEnabled)
 	    if (iopl(3) || ioperm(0, 1024, 1))
+		if (errno != ENOSYS)
 			return (FALSE);
 #endif
-#if defined(__alpha__) || defined(__mc68000__) || defined(__powerpc__) || defined(__sparc__) || defined(__mips__) || defined(__arm__) || defined(__sh__) || defined(__ia64__) || defined(__hppa__)
+#if defined(__alpha__) || defined(__mc68000__) || defined(__powerpc__) || \
+    defined(__sparc__) || defined(__mips__) || defined(__arm__) || \
+    defined(__sh__) || defined(__ia64__) || defined(__hppa__)
 #else
 # ifdef __GNUC__
 #  if defined(__ia64__)
@@ -560,7 +567,9 @@
 	asm("cli");
 # endif
 #endif
-#if !defined(__mc68000__) && !defined(__powerpc__) && !defined(__sparc__) && !defined(__mips__) && !defined(__sh__) && !defined(__ia64__) && !defined(__hppa__)
+#if !defined(__mc68000__) && !defined(__powerpc__) && !defined(__sparc__) && \
+    !defined(__mips__) && !defined(__sh__) && !defined(__ia64__) && \
+    !defined(__hppa__)
 	if (!ExtendedEnabled) {
 	    iopl(0);
 	    ioperm(0, 1024, 0);
@@ -573,12 +582,17 @@
 void
 xf86EnableInterrupts()
 {
-#if !defined(__mc68000__) && !defined(__powerpc__) && !defined(__sparc__) && !defined(__mips__) && !defined(__ia64__) && !defined(__sh__) && !defined(__hppa__)
+#if !defined(__mc68000__) && !defined(__powerpc__) && !defined(__sparc__) && \
+    !defined(__mips__) && !defined(__ia64__) && !defined(__sh__) && \
+    !defined(__hppa__)
 	if (!ExtendedEnabled)
 	    if (iopl(3) || ioperm(0, 1024, 1))
+		if (errno != ENOSYS)
 			return;
 #endif
-#if defined(__alpha__) || defined(__mc68000__) || defined(__powerpc__) || defined(__sparc__) || defined(__mips__) || defined(__arm__) || defined(__sh__) || defined(__ia64__) || defined(__hppa__)
+#if defined(__alpha__) || defined(__mc68000__) || defined(__powerpc__) || \
+    defined(__sparc__) || defined(__mips__) || defined(__arm__) || \
+    defined(__sh__) || defined(__ia64__) || defined(__hppa__)
 #else
 # ifdef __GNUC__
 #  if defined(__ia64__)
@@ -592,7 +606,9 @@
 	asm("sti");
 # endif
 #endif
-#if !defined(__mc68000__) && !defined(__powerpc__) && !defined(__sparc__) && !defined(__mips__) && !defined(__sh__) && !defined(__ia64__) && !defined(__hppa__)
+#if !defined(__mc68000__) && !defined(__powerpc__) && !defined(__sparc__) && \
+    !defined(__mips__) && !defined(__sh__) && !defined(__ia64__) && \
+    !defined(__hppa__)
 	if (!ExtendedEnabled) {
 	    iopl(0);
 	    ioperm(0, 1024, 0);
Index: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c:3.4 xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c:3.5
--- xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c:3.4	Fri Oct 14 11:17:04 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c	Sat Sep  2 12:44:22 2006
@@ -22,7 +22,7 @@
  */
 
 
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c,v 3.4 2005/10/14 15:17:04 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/lynxos/lynx_init.c,v 3.5 2006/09/02 16:44:22 dawes Exp $ */
 
 #include <X11/X.h>
 #include <X11/Xmd.h>
@@ -165,7 +165,7 @@
 }
 
 int
-xf86ProcessArgument(int argc, char *argv[], int i)
+xf86ProcessArgument(int argc, const char *argv[], int i)
 {
 	if ((argv[i][0] == 'v') && (argv[i][1] == 't'))
 	{
Index: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c:1.5
--- xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c:1.4	Fri Oct 14 11:17:05 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c	Sat Sep  2 12:44:22 2006
@@ -24,7 +24,7 @@
  * used in advertising or otherwise to promote the sale, use or other dealings
  * in this Software without prior written authorization from Sebastien Marineau.
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c,v 1.4 2005/10/14 15:17:05 tsi Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/nto/nto_init.c,v 1.5 2006/09/02 16:44:22 dawes Exp $
  */
 
 /* This module contains the NTO-specific functions used at server init.
@@ -53,7 +53,7 @@
 int
 xf86ProcessArgument(argc, argv, i)
 int argc;
-char **argv;
+const char **argv;
 int i;
 {
 
Index: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c:3.22 xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c:3.23
--- xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c:3.22	Sat Apr  8 14:30:26 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c	Sat Sep  2 12:44:22 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c,v 3.22 2006/04/08 18:30:26 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/os2/os2_init.c,v 3.23 2006/09/02 16:44:22 dawes Exp $ */
 /*
  * (c) Copyright 1994 by Holger Veit
  *			<Holger.Veit@gmd.de>
@@ -233,7 +233,7 @@
 
 int xf86ProcessArgument (argc, argv, i)
 int argc;
-char *argv[];
+const char *argv[];
 int i;
 {
 	return 0;
Index: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c:1.4 xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c:1.5
--- xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c:1.4	Fri Oct 14 11:17:06 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c	Sat Sep  2 12:44:22 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c,v 1.4 2005/10/14 15:17:06 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/pmax/pmax_init.c,v 1.5 2006/09/02 16:44:22 dawes Exp $ */
 /*
  * Copyright 1998 by Concurrent Computer Corporation
  *
@@ -379,7 +379,7 @@
 
 int xf86ProcessArgument(argc, argv, i)
 int argc;
-char *argv[];
+const char *argv[];
 int i;
 {
 	/*
Index: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c:1.2 xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c:1.3
--- xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c:1.2	Fri Oct 14 11:17:06 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c	Sat Sep  2 12:44:22 2006
@@ -24,7 +24,7 @@
  * used in advertising or otherwise to promote the sale, use or other dealings
  * in this Software without prior written authorization from Sebastien Marineau.
  *
- * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c,v 1.2 2005/10/14 15:17:06 tsi Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/qnx4/qnx_init.c,v 1.3 2006/09/02 16:44:22 dawes Exp $
  */
 
 /* This module contains the qnx-specific functions used at server init.
@@ -57,7 +57,7 @@
 int
 xf86ProcessArgument(argc, argv, i)
 int argc;
-char **argv;
+const char **argv;
 int i;
 {
 
Index: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c:3.17 xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c:3.18
--- xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c:3.17	Mon Jan  9 10:00:24 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c	Sat Sep  2 12:44:22 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c,v 3.17 2006/01/09 15:00:24 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sco/sco_init.c,v 3.18 2006/09/02 16:44:22 dawes Exp $ */
 /*
  * Copyright 2001 by J. Kean Johnston <jkj@sco.com>
  *
@@ -267,7 +267,7 @@
 }
 
 int
-xf86ProcessArgument(int argc, char *argv[], int i)
+xf86ProcessArgument(int argc, const char *argv[], int i)
 {
   /*
    * Keep server from detaching from controlling tty.  This is useful
Index: xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c:1.111 xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c:1.112
--- xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c:1.111	Sat Jan 28 21:19:54 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c	Sun Dec 10 10:47:46 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c,v 1.111 2006/01/29 02:19:54 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/shared/libc_wrapper.c,v 1.112 2006/12/10 15:47:46 tsi Exp $ */
 /*
  * Copyright 1997-2005 by The XFree86 Project, Inc.
  * All rights reserved.
@@ -540,7 +540,7 @@
     if(mmapFd < 0) {
       if ((mmapFd = open("/dev/mmap", O_RDWR)) == -1) {
           ErrorF("Warning: failed to open /dev/mmap \n");
-          xf86errno = xf86_ENOSYS;
+          xf86errno = XF86_ENOSYS;
           return XF86_MAP_FAILED;
       }
     }
@@ -558,7 +558,7 @@
 	return rc;
 #else
     ErrorF("Warning: mmap() is not supported on this platform\n");
-    xf86errno = xf86_ENOSYS;
+    xf86errno = XF86_ENOSYS;
     return XF86_MAP_FAILED;
 #endif
 #endif
@@ -580,7 +580,7 @@
     return rc;
 #else
     ErrorF("Warning: munmap() is not supported on this platform\n");
-    xf86errno = xf86_ENOSYS;
+    xf86errno = XF86_ENOSYS;
     return -1;
 #endif
 #endif
@@ -907,7 +907,7 @@
 	return ftell(fp->filehnd);
 }
 
-#define mapnum(e) case (xf86_##e): err = e; break
+#define mapnum(e) case (XF86_##e): err = e; break
 
 char*
 xf86strerror(int n)
@@ -1857,7 +1857,7 @@
 }
 
 
-#define mapnum(e) case (e): return (xf86_##e)
+#define mapnum(e) case (e): return (XF86_##e)
 
 int
 xf86GetErrno ()
@@ -2087,3 +2087,8 @@
     return 0;
 }
 
+int
+xf86rand(void)
+{
+    return rand();
+}
Index: xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
diff -u xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h:1.4 xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h:1.5
--- xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h:1.4	Mon Feb 28 22:48:56 2005
+++ xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h	Fri Feb 16 10:57:28 2007
@@ -85,10 +85,13 @@
 #endif
 
 #if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
+#ifdef __NetBSD__
+#define DRM_MAJOR	34
+#endif
 #ifdef __OpenBSD__
 #define DRM_MAJOR       81
 #endif
-#if defined(__linux__) || defined(__NetBSD__)
+#if defined(__linux__)
 #define DRM_MAJOR       226
 #endif
 #define DRM_MAX_MINOR   15
Index: xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile
diff -u xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile:1.11 xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile:1.12
--- xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile:1.11	Sat Jan 28 21:16:20 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile	Tue Feb 13 13:30:10 2007
@@ -1,4 +1,4 @@
-XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile,v 1.11 2006/01/29 02:16:20 tsi Exp $
+XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/Imakefile,v 1.12 2007/02/13 18:30:10 tsi Exp $
 XCOMM
 XCOMM Copyright 2001-2006 The XFree86 Project, Inc.
 XCOMM All rights reserved.
@@ -80,12 +80,17 @@
 SIGIO = sigiostubs
 #endif
 
+#if !defined(SparcArchitecture)
+PCI_SRC = stdPci.c
+PCI_OBJ = stdPci.o
+#endif
+
 SRCS = sun_bios.c sun_init.c $(IO_SRC) $(KBD_SRCS) $(PROWORKS_INOUT_SRC) \
        sun_mouse.c sun_vid.c agp_noop.c libc_wrapper.c kmod_noop.c pm_noop.c \
-       posix_tty.c $(SIGIO).c stdPci.c stdResource.c $(VTSW_SRC)
+       posix_tty.c $(SIGIO).c $(PCI_SRC) stdResource.c $(VTSW_SRC)
 OBJS = sun_bios.o sun_init.o $(IO_OBJ) $(KBD_OBJS) $(PROWORKS_INOUT_OBJ) \
        sun_mouse.o sun_vid.o agp_noop.o libc_wrapper.o kmod_noop.o pm_noop.o \
-       posix_tty.o $(SIGIO).o stdPci.o stdResource.o $(VTSW_OBJ)
+       posix_tty.o $(SIGIO).o $(PCI_OBJ) stdResource.o $(VTSW_OBJ)
 
 INCLUDES = -I$(XF86OSSRC) -I$(XF86COMSRC) \
 	   -I$(SERVERSRC)/mi -I$(SERVERSRC)/include -I$(SERVERSRC)/Xext
@@ -105,10 +110,14 @@
 LinkSourceFile(pm_noop.c,../shared)
 LinkSourceFile(posix_tty.c,../shared)
 LinkSourceFile($(SIGIO).c,../shared)
+#if !defined(SparcArchitecture)
 LinkSourceFile(stdPci.c,../shared)
+#endif
 LinkSourceFile(stdResource.c,../shared)
+#if defined(i386Architecture) && (OSMinorVersion < 8)
 LinkSourceFile(std_kbdEv.c,../shared)
 LinkSourceFile(sysv_io.c,../sysv)
 LinkSourceFile(sysv_kbd.c,../shared)
+#endif
 
 DependTarget()
Index: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c:1.9 xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c:1.10
--- xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c:1.9	Wed Jan 11 21:41:51 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c	Sat Sep  2 12:44:22 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c,v 1.9 2006/01/12 02:41:51 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sunos/sun_init.c,v 1.10 2006/09/02 16:44:22 dawes Exp $ */
 /*
  * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany
  * Copyright 1993 by David Wexelblat <dwex@goblin.org>
@@ -296,7 +296,7 @@
 }
 
 int
-xf86ProcessArgument(int argc, char **argv, int i)
+xf86ProcessArgument(int argc, const char **argv, int i)
 {
     /*
      * Keep server from detaching from controlling tty.  This is useful when
Index: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c
diff -u xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c:3.7 xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c:3.8
--- xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c:3.7	Mon Jan  9 10:00:25 2006
+++ xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c	Sat Sep  2 12:44:22 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c,v 3.7 2006/01/09 15:00:25 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/sysv/sysv_init.c,v 3.8 2006/09/02 16:44:22 dawes Exp $ */
 /*
  * Copyright 1990,91 by Thomas Roell, Dinkelscherben, Germany
  * Copyright 1993 by David Wexelblat <dwex@goblin.org>
@@ -203,7 +203,7 @@
 }
 
 int
-xf86ProcessArgument(int argc, char *argv[], int i)
+xf86ProcessArgument(int argc, const char *argv[], int i)
 {
 	/*
 	 * Keep server from detaching from controlling tty.  This is useful 
Index: xc/programs/Xserver/hw/xfree86/parser/Configint.h
diff -u xc/programs/Xserver/hw/xfree86/parser/Configint.h:1.24 xc/programs/Xserver/hw/xfree86/parser/Configint.h:1.25
--- xc/programs/Xserver/hw/xfree86/parser/Configint.h:1.24	Fri Jan  7 18:03:14 2005
+++ xc/programs/Xserver/hw/xfree86/parser/Configint.h	Wed Aug  9 16:53:15 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Configint.h,v 1.24 2005/01/07 23:03:14 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Configint.h,v 1.25 2006/08/09 20:53:15 dawes Exp $ */
 /*
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -136,7 +136,7 @@
 typedef struct
 {
 	int num;		/* returned number */
-	char *str;		/* private copy of the return-string */
+	const char *str;	/* the return-string (not a private copy!) */
 	double realnum;		/* returned number as a real */
 }
 LexRec, *LexPtr;
Index: xc/programs/Xserver/hw/xfree86/parser/DRI.c
diff -u xc/programs/Xserver/hw/xfree86/parser/DRI.c:1.15 xc/programs/Xserver/hw/xfree86/parser/DRI.c:1.16
--- xc/programs/Xserver/hw/xfree86/parser/DRI.c:1.15	Wed Jan 26 00:31:50 2005
+++ xc/programs/Xserver/hw/xfree86/parser/DRI.c	Wed Aug  9 16:53:15 2006
@@ -24,11 +24,11 @@
  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
  * 
- * $XFree86: xc/programs/Xserver/hw/xfree86/parser/DRI.c,v 1.15 2005/01/26 05:31:50 dawes Exp $
+ * $XFree86: xc/programs/Xserver/hw/xfree86/parser/DRI.c,v 1.16 2006/08/09 20:53:15 dawes Exp $
  * 
  */
 /*
- * Copyright (c) 2003-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 2003-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -151,7 +151,7 @@
     ptr->buf_size = val.num;
 
     if ((token = xf86getSubToken (&(ptr->buf_comment))) == STRING) {
-	ptr->buf_flags = val.str;
+	ptr->buf_flags = xf86configStrdup(val.str);
     } else
 	xf86unGetToken(token);
     if ((token = xf86getToken (NULL)) == COMMENT)
@@ -187,12 +187,12 @@
 		    Error (QUOTE_MSG, "Identifier");
 		if (has_ident == TRUE)
 		    Error (MULTIPLE_MSG, "Identifier");
-		ptr->dri_identifier = val.str;
+		ptr->dri_identifier = xf86configStrdup(val.str);
 		has_ident = TRUE;
 		break;
 	    case GROUP:
 		if ((token = xf86getSubToken (&(ptr->dri_comment))) == STRING)
-		    ptr->dri_group_name = val.str;
+		    ptr->dri_group_name = xf86configStrdup(val.str);
 		else if (token == NUMBER)
 		    ptr->dri_group = val.num;
 		else
Index: xc/programs/Xserver/hw/xfree86/parser/Device.c
diff -u xc/programs/Xserver/hw/xfree86/parser/Device.c:1.28 xc/programs/Xserver/hw/xfree86/parser/Device.c:1.29
--- xc/programs/Xserver/hw/xfree86/parser/Device.c:1.28	Fri Feb 13 18:58:49 2004
+++ xc/programs/Xserver/hw/xfree86/parser/Device.c	Wed Aug  9 16:53:15 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Device.c,v 1.28 2004/02/13 23:58:49 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Device.c,v 1.29 2006/08/09 20:53:15 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2003 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -136,38 +136,38 @@
 				Error (QUOTE_MSG, "Identifier");
 			if (has_ident == TRUE)
 				Error (MULTIPLE_MSG, "Identifier");
-			ptr->dev_identifier = val.str;
+			ptr->dev_identifier = xf86configStrdup(val.str);
 			has_ident = TRUE;
 			break;
 		case VENDOR:
 			if (xf86getSubToken (&(ptr->dev_comment)) != STRING)
 				Error (QUOTE_MSG, "Vendor");
-			ptr->dev_vendor = val.str;
+			ptr->dev_vendor = xf86configStrdup(val.str);
 			break;
 		case BOARD:
 			if (xf86getSubToken (&(ptr->dev_comment)) != STRING)
 				Error (QUOTE_MSG, "Board");
-			ptr->dev_board = val.str;
+			ptr->dev_board = xf86configStrdup(val.str);
 			break;
 		case CHIPSET:
 			if (xf86getSubToken (&(ptr->dev_comment)) != STRING)
 				Error (QUOTE_MSG, "Chipset");
-			ptr->dev_chipset = val.str;
+			ptr->dev_chipset = xf86configStrdup(val.str);
 			break;
 		case CARD:
 			if (xf86getSubToken (&(ptr->dev_comment)) != STRING)
 				Error (QUOTE_MSG, "Card");
-			ptr->dev_card = val.str;
+			ptr->dev_card = xf86configStrdup(val.str);
 			break;
 		case DRIVER:
 			if (xf86getSubToken (&(ptr->dev_comment)) != STRING)
 				Error (QUOTE_MSG, "Driver");
-			ptr->dev_driver = val.str;
+			ptr->dev_driver = xf86configStrdup(val.str);
 			break;
 		case RAMDAC:
 			if (xf86getSubToken (&(ptr->dev_comment)) != STRING)
 				Error (QUOTE_MSG, "Ramdac");
-			ptr->dev_ramdac = val.str;
+			ptr->dev_ramdac = xf86configStrdup(val.str);
 			break;
 		case DACSPEED:
 			for (i = 0; i < CONF_MAXDACSPEEDS; i++)
@@ -215,7 +215,7 @@
 		case CLOCKCHIP:
 			if (xf86getSubToken (&(ptr->dev_comment)) != STRING)
 				Error (QUOTE_MSG, "ClockChip");
-			ptr->dev_clockchip = val.str;
+			ptr->dev_clockchip = xf86configStrdup(val.str);
 			break;
 		case CHIPID:
 			if (xf86getSubToken (&(ptr->dev_comment)) != NUMBER)
@@ -249,7 +249,7 @@
 		case BUSID:
 			if (xf86getSubToken (&(ptr->dev_comment)) != STRING)
 				Error (QUOTE_MSG, "BusID");
-			ptr->dev_busid = val.str;
+			ptr->dev_busid = xf86configStrdup(val.str);
 			break;
 		case IRQ:
 			if (xf86getSubToken (&(ptr->dev_comment)) != NUMBER)
@@ -407,13 +407,3 @@
 	return (NULL);
 }
 
-char *
-xf86configStrdup (const char *s)
-{
-	char *tmp;
-	if (!s) return NULL;
-	tmp = xf86confmalloc (sizeof (char) * (strlen (s) + 1));
-	if (tmp)
-		strcpy (tmp, s);
-	return (tmp);
-}
Index: xc/programs/Xserver/hw/xfree86/parser/Files.c
diff -u xc/programs/Xserver/hw/xfree86/parser/Files.c:1.20 xc/programs/Xserver/hw/xfree86/parser/Files.c:1.21
--- xc/programs/Xserver/hw/xfree86/parser/Files.c:1.20	Sat Apr 30 13:04:00 2005
+++ xc/programs/Xserver/hw/xfree86/parser/Files.c	Wed Aug  9 16:53:15 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Files.c,v 1.20 2005/04/30 17:04:00 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Files.c,v 1.21 2006/08/09 20:53:15 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -141,10 +141,10 @@
 };
 
 static char *
-prependRoot (char *pathname)
+prependRoot (const char *pathname)
 {
 #ifndef __EMX__
-	return pathname;
+	return xf86configStrdup(pathname);
 #else
 	/* XXXX caveat: multiple path components in line */
 	return (char *) __XOS2RedirRoot (pathname);
@@ -175,7 +175,7 @@
 				Error (QUOTE_MSG, "Identifier");
 			if (has_ident)
 				Error (MULTIPLE_MSG, "Identifier");
-			ptr->file_identifier = val.str;
+			ptr->file_identifier = xf86configStrdup(val.str);
 			has_ident = TRUE;
 			break;
 		case FONTPATH:
@@ -204,12 +204,12 @@
 				strcat (ptr->file_fontpath, ",");
 
 			strcat (ptr->file_fontpath, str);
-			xf86conffree (val.str);
+			xf86conffree (str);
 			break;
 		case RGBPATH:
 			if (xf86getSubToken (&(ptr->file_comment)) != STRING)
 				Error (QUOTE_MSG, "RGBPath");
-			ptr->file_rgbpath = val.str;
+			ptr->file_rgbpath = xf86configStrdup(val.str);
 			break;
 		case MODULEPATH:
 			if (xf86getSubToken (&(ptr->file_comment)) != STRING)
@@ -236,7 +236,7 @@
 				strcat (ptr->file_modulepath, ",");
 
 			strcat (ptr->file_modulepath, str);
-			xf86conffree (val.str);
+			xf86conffree (str);
 			break;
 		case INPUTDEVICES:
 			if (xf86getSubToken (&(ptr->file_comment)) != STRING)
@@ -263,12 +263,12 @@
 				strcat (ptr->file_inputdevs, ",");
 
 			strcat (ptr->file_inputdevs, str);
-			xf86conffree (val.str);
+			xf86conffree (str);
 			break;
 		case LOGFILEPATH:
 			if (xf86getSubToken (&(ptr->file_comment)) != STRING)
 				Error (QUOTE_MSG, "LogFile");
-			ptr->file_logfile = val.str;
+			ptr->file_logfile = xf86configStrdup(val.str);
 			break;
 		case OPTION:
 			ptr->file_option_lst = xf86parseOption(ptr->file_option_lst);
Index: xc/programs/Xserver/hw/xfree86/parser/Flags.c
diff -u xc/programs/Xserver/hw/xfree86/parser/Flags.c:1.27 xc/programs/Xserver/hw/xfree86/parser/Flags.c:1.28
--- xc/programs/Xserver/hw/xfree86/parser/Flags.c:1.27	Wed Jan 26 00:31:50 2005
+++ xc/programs/Xserver/hw/xfree86/parser/Flags.c	Wed Aug  9 16:53:15 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Flags.c,v 1.27 2005/01/26 05:31:50 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Flags.c,v 1.28 2006/08/09 20:53:15 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -172,7 +172,7 @@
 				Error (QUOTE_MSG, "Identifier");
 			if (has_ident)
 				Error (MULTIPLE_MSG, "Identifier");
-			ptr->flg_identifier = val.str;
+			ptr->flg_identifier = xf86configStrdup(val.str);
 			has_ident = TRUE;
 			break;
 			/* 
@@ -203,25 +203,23 @@
 					if (ServerFlagsTab[i].token == token)
 					{
 						char *valstr = NULL;
-						/* can't use strdup because it calls malloc */
-						tmp = xf86configStrdup (ServerFlagsTab[i].name);
+						tmp = ServerFlagsTab[i].name;
 						if (hasvalue)
 						{
 							tokentype = xf86getSubToken(&(ptr->flg_comment));
 							if (strvalue) {
 								if (tokentype != STRING)
 									Error (QUOTE_MSG, tmp);
-								valstr = val.str;
+								valstr = xf86configStrdup(val.str);
 							} else {
 								if (tokentype != NUMBER)
 									Error (NUMBER_MSG, tmp);
-								valstr = xf86confmalloc(16);
-								if (valstr)
-									sprintf(valstr, "%d", val.num);
+								xf86configAsprintf(&valstr, "%d", val.num);
 							}
 						}
 						ptr->flg_option_lst = xf86addNewOption
 							(ptr->flg_option_lst, tmp, valstr);
+						xf86conffree(valstr);
 					}
 					i++;
 				}
@@ -267,19 +265,23 @@
 }
 
 static XF86OptionPtr
-addNewOption2 (XF86OptionPtr head, char *name, char *val, int used)
+addNewOption2 (XF86OptionPtr head, const char *name, const char *val, int used)
 {
 	XF86OptionPtr new, old = NULL;
+	
 
 	/* Don't allow duplicates */
- 	if (head != NULL && (old = xf86findOption(head, name)) != NULL)
+ 	if (head != NULL && (old = xf86findOption(head, name)) != NULL) {
  		new = old;
- 	else {
+		xf86conffree(old->opt_name);
+		TestFree(old->opt_val);
+		TestFree(old->opt_comment);
+ 	} else {
 		new = xf86confcalloc (1, sizeof (XF86OptionRec));
  		new->list.next = NULL;
  	}
- 	new->opt_name = name;
- 	new->opt_val = val;
+ 	new->opt_name = xf86configStrdup(name);
+ 	new->opt_val = xf86configStrdup(val);
  	new->opt_used = used;
 	
   	if (old == NULL)
@@ -288,8 +290,12 @@
  		return head;
 }
 
+/*
+ * Duplicate name/value strings with config's alloc.  This is for internal
+ * and public use.
+ */
 XF86OptionPtr
-xf86addNewOption (XF86OptionPtr head, char *name, char *val)
+xf86addNewOption (XF86OptionPtr head, const char *name, const char *val)
 {
 	return addNewOption2(head, name, val, 0);
 }
@@ -359,7 +365,7 @@
 }
 
 XF86OptionPtr
-xf86newOption(char *name, char *value)
+xf86newOption(const char *name, const char *value)
 {
 	XF86OptionPtr opt;
 
@@ -369,8 +375,8 @@
 
 	opt->opt_used = 0;
 	opt->list.next = 0;
-	opt->opt_name = name;
-	opt->opt_val = value;
+	opt->opt_name = xf86configStrdup(name);
+	opt->opt_val = xf86configStrdup(value);
 
 	return opt;
 }
@@ -384,9 +390,9 @@
 }
 
 /*
- * this function searches the given option list for the named option and
- * returns a pointer to the option rec if found. If not found, it returns
- * NULL
+ * This function searches the given option list for the named option and
+ * returns a pointer to the option rec if found.  The last occurrence of the
+ * named option is returned.  If not found, it returns NULL.
  */
 
 XF86OptionPtr
@@ -508,14 +514,9 @@
 char *
 xf86uLongToString(unsigned long i)
 {
-	char *s;
-	int l;
+	char *s = NULL;
 
-	l = (int)(ceil(log10((double)i) + 2.5));
-	s = xf86confmalloc(l);
-	if (!s)
-		return NULL;
-	sprintf(s, "%lu", i);
+	xf86configAsprintf(&s, "%lu", i);
 	return s;
 }
 
@@ -531,8 +532,9 @@
 XF86OptionPtr
 xf86parseOption(XF86OptionPtr head)
 {
-	XF86OptionPtr option, cnew, old;
-	char *name, *comment = NULL;
+	XF86OptionPtr option;
+	char *name, *value = NULL, *comment = NULL;
+	const char *comment2 = NULL;
 	int token;
 
 	if ((token = xf86getSubToken(&comment)) != STRING) {
@@ -542,39 +544,25 @@
 		return (head);
 	}
 
-	name = val.str;
+	name = xf86configStrdup(val.str);
 	if ((token = xf86getSubToken(&comment)) == STRING) {
-		option = xf86newOption(name, val.str);
-		option->opt_comment = comment;
+		value = xf86configStrdup(val.str);
 		if ((token = xf86getToken(NULL)) == COMMENT)
-			option->opt_comment = xf86addComment(option->opt_comment, val.str);
-		else
-			xf86unGetToken(token);
-	}
-	else {
-		option = xf86newOption(name, NULL);
-		option->opt_comment = comment;
-		if (token == COMMENT)
-			option->opt_comment = xf86addComment(option->opt_comment, val.str);
+			comment2 = val.str;
 		else
 			xf86unGetToken(token);
-	}
-
-	old = NULL;
-
-	/* Don't allow duplicates */
-	if (head != NULL && (old = xf86findOption(head, name)) != NULL) {
-		cnew = old;
-		xf86conffree(option->opt_name);
-		TestFree(option->opt_val);
-		TestFree(option->opt_comment);
-		xf86conffree(option);
-	}
+	} else if (token == COMMENT)
+		comment2 = val.str;
 	else
-		cnew = option;
-	
-	if (old == NULL)
-		return ((XF86OptionPtr)xf86addListItem((glp)head, (glp)cnew));
+		xf86unGetToken(token);
+
+	head = xf86addNewOption(head, name, value);
+	option = xf86findOption(head, name);
+	xf86conffree(name);
+	TestFree(value);
+	option->opt_comment = comment;
+	if (comment2)
+		option->opt_comment = xf86addComment(option->opt_comment, comment2);
 
 	return (head);
 }
Index: xc/programs/Xserver/hw/xfree86/parser/Imakefile
diff -u xc/programs/Xserver/hw/xfree86/parser/Imakefile:1.15 xc/programs/Xserver/hw/xfree86/parser/Imakefile:1.16
--- xc/programs/Xserver/hw/xfree86/parser/Imakefile:1.15	Fri Oct 14 11:17:08 2005
+++ xc/programs/Xserver/hw/xfree86/parser/Imakefile	Wed Aug  9 16:53:15 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Imakefile,v 1.15 2005/10/14 15:17:08 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Imakefile,v 1.16 2006/08/09 20:53:15 dawes Exp $ */
 
 
 #include <Server.tmpl>
@@ -16,9 +16,13 @@
 	Video.o Monitor.o Pointer.o Screen.o Vendor.o read.o scan.o write.o \
 	DRI.o
 
+#if HasAsprintf
+ASPRINTF_DEFINES = -DHAS_ASPRINTF
+#endif
+
 CONFIG_DEFINES = -DXCONFIGDIR=\"$(XCONFIGDIR)\" \
 		 -DXCONFIGFILE=\"$(XCONFIGFILE)\" \
-		 -DXVERSION="$(XVERS)"
+		 -DXVERSION="$(XVERS)" $(ASPRINTF_DEFINES)
 
 NormalAsmObjectRule()
 
Index: xc/programs/Xserver/hw/xfree86/parser/Input.c
diff -u xc/programs/Xserver/hw/xfree86/parser/Input.c:1.15 xc/programs/Xserver/hw/xfree86/parser/Input.c:1.16
--- xc/programs/Xserver/hw/xfree86/parser/Input.c:1.15	Fri Feb 13 18:58:49 2004
+++ xc/programs/Xserver/hw/xfree86/parser/Input.c	Wed Aug  9 16:53:15 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Input.c,v 1.15 2004/02/13 23:58:49 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Input.c,v 1.16 2006/08/09 20:53:15 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2003 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -113,13 +113,13 @@
 				Error (QUOTE_MSG, "Identifier");
 			if (has_ident == TRUE)
 				Error (MULTIPLE_MSG, "Identifier");
-			ptr->inp_identifier = val.str;
+			ptr->inp_identifier = xf86configStrdup(val.str);
 			has_ident = TRUE;
 			break;
 		case DRIVER:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "Driver");
-			ptr->inp_driver = val.str;
+			ptr->inp_driver = xf86configStrdup(val.str);
 			break;
 		case OPTION:
 			ptr->inp_option_lst = xf86parseOption(ptr->inp_option_lst);
Index: xc/programs/Xserver/hw/xfree86/parser/Keyboard.c
diff -u xc/programs/Xserver/hw/xfree86/parser/Keyboard.c:1.20 xc/programs/Xserver/hw/xfree86/parser/Keyboard.c:1.21
--- xc/programs/Xserver/hw/xfree86/parser/Keyboard.c:1.20	Tue Oct 26 18:17:38 2004
+++ xc/programs/Xserver/hw/xfree86/parser/Keyboard.c	Wed Aug  9 16:53:16 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Keyboard.c,v 1.20 2004/10/26 22:17:38 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Keyboard.c,v 1.21 2006/08/09 20:53:16 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2003 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -120,8 +120,8 @@
 XF86ConfInputPtr
 xf86parseKeyboardSection (void)
 {
-	char *s, *s1, *s2;
-	int l;
+	char *s = NULL, *s1;
+	int n1, n2, l;
 	int token;
 	parsePrologue (XF86ConfInputPtr, XF86ConfInputRec)
 
@@ -136,23 +136,21 @@
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "Protocol");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-							       xf86configStrdup("Protocol"),
-							       val.str);
+													"Protocol", val.str);
 			break;
 		case AUTOREPEAT:
 			if (xf86getSubToken (&(ptr->inp_comment)) != NUMBER)
 				Error (AUTOREPEAT_MSG, NULL);
-			s1 = xf86uLongToString(val.num);
+			n1 = val.num;
 			if (xf86getSubToken (&(ptr->inp_comment)) != NUMBER)
 				Error (AUTOREPEAT_MSG, NULL);
-			s2 = xf86uLongToString(val.num);
-			l = strlen(s1) + 1 + strlen(s2) + 1;
-			s = xf86confmalloc(l);
-			sprintf(s, "%s %s", s1, s2);
-			xf86conffree(s1);
-			xf86conffree(s2);
-			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-							       xf86configStrdup("AutoRepeat"), s);
+			n2 = val.num;
+			xf86configAsprintf(&s, "%d %d", n1, n2);
+			if (s) {
+				ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
+														"AutoRepeat", s);
+				xf86conffree(s);
+			}
 			break;
 		case XLEDS:
 			if (xf86getSubToken (&(ptr->inp_comment)) != NUMBER)
@@ -169,6 +167,11 @@
 				xf86conffree(s1);
 			}
 			xf86unGetToken (token);
+			if (s) {
+				ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
+														"xleds", s);
+				xf86conffree(s);
+			}
 			break;
 		case SERVERNUM:
 			xf86parseWarning(OBSOLETE_MSG, xf86tokenString());
@@ -189,89 +192,77 @@
 			break;
 		case XKBDISABLE:
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("XkbDisable"),
-												NULL);
+												"XkbDisable", NULL);
 			break;
 		case XKBKEYMAP:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "XKBKeymap");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("XkbKeymap"),
-												val.str);
+												"XkbKeymap", val.str);
 			break;
 		case XKBCOMPAT:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "XKBCompat");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("XkbCompat"),
-												val.str);
+												"XkbCompat", val.str);
 			break;
 		case XKBTYPES:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "XKBTypes");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("XkbTypes"),
-												val.str);
+												"XkbTypes", val.str);
 			break;
 		case XKBKEYCODES:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "XKBKeycodes");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("XkbKeycodes"),
-												val.str);
+												"XkbKeycodes", val.str);
 			break;
 		case XKBGEOMETRY:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "XKBGeometry");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("XkbGeometry"),
-												val.str);
+												"XkbGeometry", val.str);
 			break;
 		case XKBSYMBOLS:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "XKBSymbols");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("XkbSymbols"),
-												val.str);
+												"XkbSymbols", val.str);
 			break;
 		case XKBRULES:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "XKBRules");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("XkbRules"),
-												val.str);
+												"XkbRules", val.str);
 			break;
 		case XKBMODEL:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "XKBModel");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("XkbModel"),
-												val.str);
+												"XkbModel", val.str);
 			break;
 		case XKBLAYOUT:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "XKBLayout");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("XkbLayout"),
-												val.str);
+												"XkbLayout", val.str);
 			break;
 		case XKBVARIANT:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "XKBVariant");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("XkbVariant"),
-												val.str);
+												"XkbVariant", val.str);
 			break;
 		case XKBOPTIONS:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "XKBOptions");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("XkbOptions"),
-												val.str);
+												"XkbOptions", val.str);
 			break;
 		case PANIX106:
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("Panix106"), NULL);
+												"Panix106", NULL);
 			break;
 		case EOF_TOKEN:
 			Error (UNEXPECTED_EOF_MSG, NULL);
@@ -285,7 +276,7 @@
 	ptr->inp_identifier = xf86configStrdup(CONF_IMPLICIT_KEYBOARD);
 	ptr->inp_driver = xf86configStrdup("keyboard");
 	ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-										xf86configStrdup("CoreKeyboard"), NULL);
+										"CoreKeyboard", NULL);
 
 #ifdef DEBUG
 	printf ("Keyboard section parsed\n");
Index: xc/programs/Xserver/hw/xfree86/parser/Layout.c
diff -u xc/programs/Xserver/hw/xfree86/parser/Layout.c:1.25 xc/programs/Xserver/hw/xfree86/parser/Layout.c:1.26
--- xc/programs/Xserver/hw/xfree86/parser/Layout.c:1.25	Fri Feb 13 18:58:50 2004
+++ xc/programs/Xserver/hw/xfree86/parser/Layout.c	Wed Aug  9 16:53:16 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Layout.c,v 1.25 2004/02/13 23:58:50 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Layout.c,v 1.26 2006/08/09 20:53:16 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2003 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -126,7 +126,7 @@
 				Error (QUOTE_MSG, "Identifier");
 			if (has_ident == TRUE)
 				Error (MULTIPLE_MSG, "Identifier");
-			ptr->lay_identifier = val.str;
+			ptr->lay_identifier = xf86configStrdup(val.str);
 			has_ident = TRUE;
 			break;
 		case INACTIVE:
@@ -137,7 +137,7 @@
 				iptr->list.next = NULL;
 				if (xf86getSubToken (&(ptr->lay_comment)) != STRING)
 					Error (INACTIVE_MSG, NULL);
-				iptr->inactive_device_str = val.str;
+				iptr->inactive_device_str = xf86configStrdup(val.str);
 				ptr->lay_inactive_lst = (XF86ConfInactivePtr)
 					xf86addListItem ((glp) ptr->lay_inactive_lst, (glp) iptr);
 			}
@@ -161,7 +161,7 @@
 				token = xf86getSubToken(&(ptr->lay_comment));
 				if (token != STRING)
 					Error (SCREEN_MSG, NULL);
-				aptr->adj_screen_str = val.str;
+				aptr->adj_screen_str = xf86configStrdup(val.str);
 
 				token = xf86getSubTokenWithTab(&(ptr->lay_comment), AdjTab);
 				switch (token)
@@ -223,7 +223,7 @@
 					token = xf86getSubToken(&(ptr->lay_comment));
 					if (token != STRING)
 						Error(INVALID_SCR_MSG, NULL);
-					aptr->adj_refscreen = val.str;
+					aptr->adj_refscreen = xf86configStrdup(val.str);
 					if (aptr->adj_where == CONF_ADJ_RELATIVE)
 					{
 						token = xf86getSubToken(&(ptr->lay_comment));
@@ -238,22 +238,22 @@
 					break;
 				case CONF_ADJ_OBSOLETE:
 					/* top */
-					aptr->adj_top_str = val.str;
+					aptr->adj_top_str = xf86configStrdup(val.str);
 
 					/* bottom */
 					if (xf86getSubToken (&(ptr->lay_comment)) != STRING)
 						Error (SCREEN_MSG, NULL);
-					aptr->adj_bottom_str = val.str;
+					aptr->adj_bottom_str = xf86configStrdup(val.str);
 
 					/* left */
 					if (xf86getSubToken (&(ptr->lay_comment)) != STRING)
 						Error (SCREEN_MSG, NULL);
-					aptr->adj_left_str = val.str;
+					aptr->adj_left_str = xf86configStrdup(val.str);
 
 					/* right */
 					if (xf86getSubToken (&(ptr->lay_comment)) != STRING)
 						Error (SCREEN_MSG, NULL);
-					aptr->adj_right_str = val.str;
+					aptr->adj_right_str = xf86configStrdup(val.str);
 
 				}
 				ptr->lay_adjacency_lst = (XF86ConfAdjacencyPtr)
@@ -269,7 +269,7 @@
 				iptr->iref_option_lst = NULL;
 				if (xf86getSubToken (&(ptr->lay_comment)) != STRING)
 					Error (INPUTDEV_MSG, NULL);
-				iptr->iref_inputdev_str = val.str;
+				iptr->iref_inputdev_str = xf86configStrdup(val.str);
 				while ((token = xf86getSubToken (&(ptr->lay_comment))) == STRING)
 				{
 					iptr->iref_option_lst =
Index: xc/programs/Xserver/hw/xfree86/parser/Module.c
diff -u xc/programs/Xserver/hw/xfree86/parser/Module.c:1.18 xc/programs/Xserver/hw/xfree86/parser/Module.c:1.19
--- xc/programs/Xserver/hw/xfree86/parser/Module.c:1.18	Mon Feb 14 22:06:01 2005
+++ xc/programs/Xserver/hw/xfree86/parser/Module.c	Wed Aug  9 16:53:16 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Module.c,v 1.18 2005/02/15 03:06:01 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Module.c,v 1.19 2006/08/09 20:53:16 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -147,12 +147,12 @@
 #define CLEANUP xf86freeModulesList
 
 XF86LoadPtr
-xf86parseModuleSubSection (XF86LoadPtr head, char *name)
+xf86parseModuleSubSection (XF86LoadPtr head, const char *name)
 {
 	int token;
 	parsePrologue (XF86LoadPtr, XF86LoadRec)
 
-	ptr->load_name = name;
+	ptr->load_name = xf86configStrdup(name);
 	ptr->load_type = XF86_LOAD_MODULE;
 	ptr->load_opt  = NULL;
 	ptr->list.next = NULL;
@@ -201,7 +201,7 @@
 				Error (QUOTE_MSG, "Identifier");
 			if (has_ident)
 				Error (MULTIPLE_MSG, "Identifier");
-			ptr->mod_identifier = val.str;
+			ptr->mod_identifier = xf86configStrdup(val.str);
 			has_ident = TRUE;
 			break;
 		case LOAD:
@@ -300,13 +300,13 @@
 }
 
 XF86LoadPtr
-xf86addNewLoadDirective (XF86LoadPtr head, char *name, int type, XF86OptionPtr opts)
+xf86addNewLoadDirective (XF86LoadPtr head, const char *name, int type, XF86OptionPtr opts)
 {
 	XF86LoadPtr new;
 	int token;
 
 	new = xf86confcalloc (1, sizeof (XF86LoadRec));
-	new->load_name = name;
+	new->load_name = xf86configStrdup(name);
 	new->load_type = type;
 	new->load_opt  = opts;
 	new->list.next = NULL;
Index: xc/programs/Xserver/hw/xfree86/parser/Monitor.c
diff -u xc/programs/Xserver/hw/xfree86/parser/Monitor.c:1.32 xc/programs/Xserver/hw/xfree86/parser/Monitor.c:1.33
--- xc/programs/Xserver/hw/xfree86/parser/Monitor.c:1.32	Wed Jan 26 00:31:50 2005
+++ xc/programs/Xserver/hw/xfree86/parser/Monitor.c	Wed Aug  9 16:53:16 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Monitor.c,v 1.32 2005/01/26 05:31:50 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Monitor.c,v 1.33 2006/08/09 20:53:16 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -195,7 +195,7 @@
 	/* Identifier */
 	if (xf86getSubToken (&(ptr->ml_comment)) != STRING)
 		Error ("ModeLine identifier expected", NULL);
-	ptr->ml_identifier = val.str;
+	ptr->ml_identifier = xf86configStrdup(val.str);
 
 	/* DotClock */
 	if (xf86getSubToken (&(ptr->ml_comment)) != NUMBER)
@@ -324,7 +324,7 @@
 
 		if (xf86getSubToken (&(ptr->ml_comment)) != STRING)
 		Error ("Mode name expected", NULL);
-	ptr->ml_identifier = val.str;
+	ptr->ml_identifier = xf86configStrdup(val.str);
 	while ((token = xf86getToken (ModeTab)) != ENDMODE)
 	{
 		switch (token)
@@ -487,18 +487,18 @@
 				Error (QUOTE_MSG, "Identifier");
 			if (has_ident == TRUE)
 				Error (MULTIPLE_MSG, "Identifier");
-			ptr->mon_identifier = val.str;
+			ptr->mon_identifier = xf86configStrdup(val.str);
 			has_ident = TRUE;
 			break;
 		case VENDOR:
 			if (xf86getSubToken (&(ptr->mon_comment)) != STRING)
 				Error (QUOTE_MSG, "Vendor");
-			ptr->mon_vendor = val.str;
+			ptr->mon_vendor = xf86configStrdup(val.str);
 			break;
 		case MODEL:
 			if (xf86getSubToken (&(ptr->mon_comment)) != STRING)
 				Error (QUOTE_MSG, "ModelName");
-			ptr->mon_modelname = val.str;
+			ptr->mon_modelname = xf86configStrdup(val.str);
 			break;
 		case MODE:
 			HANDLE_LIST (mon_modeline_lst, xf86parseVerboseMode,
@@ -630,7 +630,7 @@
 				   referenced here */
 				mptr = xf86confcalloc (1, sizeof (XF86ConfModesLinkRec));
 				mptr->list.next = NULL;
-				mptr->ml_modes_str = val.str;
+				mptr->ml_modes_str = xf86configStrdup(val.str);
 				mptr->ml_modes = NULL;
 				ptr->mon_modes_sect_lst = (XF86ConfModesLinkPtr)
 					xf86addListItem((GenericListPtr)ptr->mon_modes_sect_lst,
@@ -678,7 +678,7 @@
 				Error (QUOTE_MSG, "Identifier");
 			if (has_ident == TRUE)
 				Error (MULTIPLE_MSG, "Identifier");
-			ptr->modes_identifier = val.str;
+			ptr->modes_identifier = xf86configStrdup(val.str);
 			has_ident = TRUE;
 			break;
 		case MODE:
Index: xc/programs/Xserver/hw/xfree86/parser/Pointer.c
diff -u xc/programs/Xserver/hw/xfree86/parser/Pointer.c:1.14 xc/programs/Xserver/hw/xfree86/parser/Pointer.c:1.15
--- xc/programs/Xserver/hw/xfree86/parser/Pointer.c:1.14	Fri Feb 13 18:58:50 2004
+++ xc/programs/Xserver/hw/xfree86/parser/Pointer.c	Wed Aug  9 16:53:16 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Pointer.c,v 1.14 2004/02/13 23:58:50 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Pointer.c,v 1.15 2006/08/09 20:53:16 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2003 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -116,13 +116,13 @@
 XF86ConfInputPtr
 xf86parsePointerSection (void)
 {
-	char *s, *s1, *s2;
-	int l;
-	int token;
+	char *s;
+	int n1, n2, token;
 	parsePrologue (XF86ConfInputPtr, XF86ConfInputRec)
 
 	while ((token = xf86getToken (PointerTab)) != ENDSECTION)
 	{
+		s = NULL;
 		switch (token)
 		{
 		case COMMENT:
@@ -132,84 +132,75 @@
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "Protocol");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("Protocol"),
-												val.str);
+												"Protocol", val.str);
 			break;
 		case PDEVICE:
 			if (xf86getSubToken (&(ptr->inp_comment)) != STRING)
 				Error (QUOTE_MSG, "Device");
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("Device"),
-												val.str);
+												"Device", val.str);
 			break;
 		case EMULATE3:
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("Emulate3Buttons"),
-												NULL);
+												"Emulate3Buttons", NULL);
 			break;
 		case EM3TIMEOUT:
 			if (xf86getSubToken (&(ptr->inp_comment)) != NUMBER || val.num < 0)
 				Error (POSITIVE_INT_MSG, "Emulate3Timeout");
 			s = xf86uLongToString(val.num);
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("Emulate3Timeout"),
-												s);
+												"Emulate3Timeout", s);
 			break;
 		case CHORDMIDDLE:
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("ChordMiddle"),
-												NULL);
+												"ChordMiddle", NULL);
 			break;
 		case PBUTTONS:
 			if (xf86getSubToken (&(ptr->inp_comment)) != NUMBER || val.num < 0)
 				Error (POSITIVE_INT_MSG, "Buttons");
 			s = xf86uLongToString(val.num);
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("Buttons"), s);
+												"Buttons", s);
 			break;
 		case BAUDRATE:
 			if (xf86getSubToken (&(ptr->inp_comment)) != NUMBER || val.num < 0)
 				Error (POSITIVE_INT_MSG, "BaudRate");
 			s = xf86uLongToString(val.num);
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("BaudRate"), s);
+												"BaudRate", s);
 			break;
 		case SAMPLERATE:
 			if (xf86getSubToken (&(ptr->inp_comment)) != NUMBER || val.num < 0)
 				Error (POSITIVE_INT_MSG, "SampleRate");
 			s = xf86uLongToString(val.num);
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("SampleRate"), s);
+												"SampleRate", s);
 			break;
 		case PRESOLUTION:
 			if (xf86getSubToken (&(ptr->inp_comment)) != NUMBER || val.num < 0)
 				Error (POSITIVE_INT_MSG, "Resolution");
 			s = xf86uLongToString(val.num);
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("Resolution"), s);
+												"Resolution", s);
 			break;
 		case CLEARDTR:
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("ClearDTR"), NULL);
+												"ClearDTR", NULL);
 			break;
 		case CLEARRTS:
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("ClearRTS"), NULL);
+												"ClearRTS", NULL);
 			break;
 		case ZAXISMAPPING:
 			switch (xf86getToken(ZMapTab)) {
 			case NUMBER:
 				if (val.num < 0)
 					Error (ZAXISMAPPING_MSG, NULL);
-				s1 = xf86uLongToString(val.num);
+				n1 = val.num;
 				if (xf86getSubToken (&(ptr->inp_comment)) != NUMBER || val.num < 0)
 					Error (ZAXISMAPPING_MSG, NULL);
-				s2 = xf86uLongToString(val.num);
-				l = strlen(s1) + 1 + strlen(s2) + 1;
-				s = xf86confmalloc(l);
-				sprintf(s, "%s %s", s1, s2);
-				xf86conffree(s1);
-				xf86conffree(s2);
+				n2 = val.num;
+				xf86configAsprintf(&s, "%d %d", n1, n2);
 				break;
 			case XAXIS:
 				s = xf86configStrdup("x");
@@ -222,8 +213,7 @@
 				break;
 			}
 			ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-												xf86configStrdup("ZAxisMapping"),
-												s);
+												"ZAxisMapping", s);
 			break;
 		case ALWAYSCORE:
 			break;
@@ -234,12 +224,13 @@
 			Error (INVALID_KEYWORD_MSG, xf86tokenString ());
 			break;
 		}
+		TestFree(s);
 	}
 
 	ptr->inp_identifier = xf86configStrdup(CONF_IMPLICIT_POINTER);
 	ptr->inp_driver = xf86configStrdup("mouse");
 	ptr->inp_option_lst = xf86addNewOption(ptr->inp_option_lst,
-										xf86configStrdup("CorePointer"), NULL);
+										"CorePointer", NULL);
 
 #ifdef DEBUG
 	printf ("Pointer section parsed\n");
Index: xc/programs/Xserver/hw/xfree86/parser/Screen.c
diff -u xc/programs/Xserver/hw/xfree86/parser/Screen.c:1.30 xc/programs/Xserver/hw/xfree86/parser/Screen.c:1.31
--- xc/programs/Xserver/hw/xfree86/parser/Screen.c:1.30	Fri Jan  7 12:19:32 2005
+++ xc/programs/Xserver/hw/xfree86/parser/Screen.c	Wed Aug  9 16:53:16 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Screen.c,v 1.30 2005/01/07 17:19:32 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Screen.c,v 1.31 2006/08/09 20:53:16 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -147,7 +147,7 @@
 		case VISUAL:
 			if (xf86getSubToken (&(ptr->disp_comment)) != STRING)
 				Error (QUOTE_MSG, "Display");
-			ptr->disp_visual = val.str;
+			ptr->disp_visual = xf86configStrdup(val.str);
 			break;
 		case WEIGHT:
 			if (xf86getSubToken (&(ptr->disp_comment)) != NUMBER)
@@ -189,7 +189,7 @@
 				while ((token = xf86getSubTokenWithTab (&(ptr->disp_comment), DisplayTab)) == STRING)
 				{
 					mptr = xf86confcalloc (1, sizeof (XF86ModeRec));
-					mptr->mode_name = val.str;
+					mptr->mode_name = xf86configStrdup(val.str);
 					mptr->list.next = NULL;
 					ptr->disp_mode_lst = (XF86ModePtr)
 						xf86addListItem ((glp) ptr->disp_mode_lst, (glp) mptr);
@@ -262,7 +262,7 @@
 		case IDENTIFIER:
 			if (xf86getSubToken (&(ptr->scrn_comment)) != STRING)
 				Error (QUOTE_MSG, "Identifier");
-			ptr->scrn_identifier = val.str;
+			ptr->scrn_identifier = xf86configStrdup(val.str);
 			if (has_ident || has_driver)
 				Error (ONLY_ONE_MSG,"Identifier or Driver");
 			has_ident = TRUE;
@@ -270,7 +270,7 @@
 		case OBSDRIVER:
 			if (xf86getSubToken (&(ptr->scrn_comment)) != STRING)
 				Error (QUOTE_MSG, "Driver");
-			ptr->scrn_obso_driver = val.str;
+			ptr->scrn_obso_driver = xf86configStrdup(val.str);
 			if (has_ident || has_driver)
 				Error (ONLY_ONE_MSG,"Identifier or Driver");
 			has_driver = TRUE;
@@ -293,7 +293,7 @@
 		case MDEVICE:
 			if (xf86getSubToken (&(ptr->scrn_comment)) != STRING)
 				Error (QUOTE_MSG, "Device");
-			ptr->scrn_device_str = val.str;
+			ptr->scrn_device_str = xf86configStrdup(val.str);
 			break;
 		case MONITOR:
 			{
@@ -309,7 +309,7 @@
 				token = xf86getSubToken(&(ptr->scrn_comment));
 				if (token != STRING)
 					Error (MONITOR_MSG, NULL);
-				mlptr->monitor_str = val.str;
+				mlptr->monitor_str = xf86configStrdup(val.str);
 
 				/*
 				 * For compatibility, set scrn_monitor_str to the first
@@ -341,7 +341,7 @@
 				{
 					aptr = xf86confcalloc (1, sizeof (XF86ConfAdaptorLinkRec));
 					aptr->list.next = NULL;
-					aptr->al_adaptor_str = val.str;
+					aptr->al_adaptor_str = xf86configStrdup(val.str);
 					ptr->scrn_adaptor_lst = (XF86ConfAdaptorLinkPtr)
 						xf86addListItem ((glp) ptr->scrn_adaptor_lst, (glp) aptr);
 				}
@@ -354,7 +354,6 @@
 			if (xf86getSubToken (&(ptr->scrn_comment)) != STRING)
 				Error (QUOTE_MSG, "SubSection");
 			{
-				xf86conffree(val.str);
 				HANDLE_LIST (scrn_display_lst, xf86parseDisplaySubSection,
 							 XF86ConfDisplayPtr);
 			}
Index: xc/programs/Xserver/hw/xfree86/parser/Vendor.c
diff -u xc/programs/Xserver/hw/xfree86/parser/Vendor.c:1.19 xc/programs/Xserver/hw/xfree86/parser/Vendor.c:1.20
--- xc/programs/Xserver/hw/xfree86/parser/Vendor.c:1.19	Wed Jan 26 00:31:50 2005
+++ xc/programs/Xserver/hw/xfree86/parser/Vendor.c	Wed Aug  9 16:53:16 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Vendor.c,v 1.19 2005/01/26 05:31:50 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Vendor.c,v 1.20 2006/08/09 20:53:16 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -137,13 +137,13 @@
 #define CLEANUP xf86freeVendorSubList
 
 XF86ConfVendSubPtr
-xf86parseVendorSubSection (XF86ConfVendSubPtr head, char *name)
+xf86parseVendorSubSection (XF86ConfVendSubPtr head, const char *name)
 {
 	int has_ident = FALSE;
 	int token;
 	parsePrologue (XF86ConfVendSubPtr, XF86ConfVendSubRec)
 
-	ptr->vs_name = name;
+	ptr->vs_name = xf86configStrdup(name);
 	ptr->vs_option_lst = NULL;
 	ptr->list.next = NULL;
 
@@ -159,7 +159,7 @@
 				Error (QUOTE_MSG, "Identifier");
 			if (has_ident == TRUE)
 				Error (MULTIPLE_MSG, "Identifier");
-			ptr->vs_identifier = val.str;
+			ptr->vs_identifier = xf86configStrdup(val.str);
 			has_ident = TRUE;
 			break;
 		case OPTION:
@@ -215,13 +215,13 @@
 				Error (QUOTE_MSG, "Identifier");
 			if (has_ident == TRUE)
 				Error (MULTIPLE_MSG, "Identifier");
-			ptr->vnd_identifier = val.str;
+			ptr->vnd_identifier = xf86configStrdup(val.str);
 			has_ident = TRUE;
 			break;
 		case VENDORNAME:
 			if (xf86getSubToken (&(ptr->vnd_comment)) != STRING)
 				Error (QUOTE_MSG, "VendorName");
-			ptr->vnd_name = val.str;
+			ptr->vnd_name = xf86configStrdup(val.str);
 			break;
 		case OPTION:
 			ptr->vnd_option_lst = xf86parseOption(ptr->vnd_option_lst);
Index: xc/programs/Xserver/hw/xfree86/parser/Video.c
diff -u xc/programs/Xserver/hw/xfree86/parser/Video.c:1.15 xc/programs/Xserver/hw/xfree86/parser/Video.c:1.16
--- xc/programs/Xserver/hw/xfree86/parser/Video.c:1.15	Wed Jan 26 00:31:50 2005
+++ xc/programs/Xserver/hw/xfree86/parser/Video.c	Wed Aug  9 16:53:16 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Video.c,v 1.15 2005/01/26 05:31:50 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/Video.c,v 1.16 2006/08/09 20:53:16 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -137,13 +137,13 @@
 #define CLEANUP xf86freeVideoPortList
 
 XF86ConfVideoPortPtr
-xf86parseVideoPortSubSection (char *name)
+xf86parseVideoPortSubSection (const char *name)
 {
 	int has_ident = FALSE;
 	int token;
 	parsePrologue (XF86ConfVideoPortPtr, XF86ConfVideoPortRec)
 
-	ptr->vp_identifier = name;
+	ptr->vp_identifier = xf86configStrdup(name);
 
 	while ((token = xf86getToken (VideoPortTab)) != ENDSUBSECTION)
 	{
@@ -158,7 +158,7 @@
 			if (has_ident == TRUE)
 				Error (MULTIPLE_MSG, "Identifier");
 			TestFree(ptr->vp_identifier);
-			ptr->vp_identifier = val.str;
+			ptr->vp_identifier = xf86configStrdup(val.str);
 			has_ident = TRUE;
 			break;
 		case OPTION:
@@ -216,7 +216,7 @@
 		case IDENTIFIER:
 			if (xf86getSubToken (&(ptr->va_comment)) != STRING)
 				Error (QUOTE_MSG, "Identifier");
-			ptr->va_identifier = val.str;
+			ptr->va_identifier = xf86configStrdup(val.str);
 			if (has_ident == TRUE)
 				Error (MULTIPLE_MSG, "Identifier");
 			has_ident = TRUE;
@@ -224,22 +224,22 @@
 		case VENDOR:
 			if (xf86getSubToken (&(ptr->va_comment)) != STRING)
 				Error (QUOTE_MSG, "Vendor");
-			ptr->va_vendor = val.str;
+			ptr->va_vendor = xf86configStrdup(val.str);
 			break;
 		case BOARD:
 			if (xf86getSubToken (&(ptr->va_comment)) != STRING)
 				Error (QUOTE_MSG, "Board");
-			ptr->va_board = val.str;
+			ptr->va_board = xf86configStrdup(val.str);
 			break;
 		case BUSID:
 			if (xf86getSubToken (&(ptr->va_comment)) != STRING)
 				Error (QUOTE_MSG, "BusID");
-			ptr->va_busid = val.str;
+			ptr->va_busid = xf86configStrdup(val.str);
 			break;
 		case DRIVER:
 			if (xf86getSubToken (&(ptr->va_comment)) != STRING)
 				Error (QUOTE_MSG, "Driver");
-			ptr->va_driver = val.str;
+			ptr->va_driver = xf86configStrdup(val.str);
 			break;
 		case OPTION:
 			ptr->va_option_lst = xf86parseOption(ptr->va_option_lst);
Index: xc/programs/Xserver/hw/xfree86/parser/configProcs.h
diff -u xc/programs/Xserver/hw/xfree86/parser/configProcs.h:1.20 xc/programs/Xserver/hw/xfree86/parser/configProcs.h:1.21
--- xc/programs/Xserver/hw/xfree86/parser/configProcs.h:1.20	Wed Jan 26 00:31:50 2005
+++ xc/programs/Xserver/hw/xfree86/parser/configProcs.h	Wed Aug  9 16:53:16 2006
@@ -1,6 +1,6 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/configProcs.h,v 1.20 2005/01/26 05:31:50 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/configProcs.h,v 1.21 2006/08/09 20:53:16 dawes Exp $ */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -102,6 +102,7 @@
 /* Flags.c */
 XF86ConfFlagsPtr xf86parseFlagsSection(void);
 void xf86printServerFlagsSection(FILE *f, XF86ConfFlagsPtr flags);
+char *xf86uLongToString(unsigned long i);
 /* Input.c */
 XF86ConfInputPtr xf86parseInputSection(void);
 void xf86printInputSection(FILE *f, XF86ConfInputPtr ptr);
@@ -113,10 +114,10 @@
 void xf86printLayoutSection(FILE *cf, XF86ConfLayoutPtr ptr);
 int xf86validateLayout(XF86ConfigPtr p);
 /* Module.c */
-XF86LoadPtr xf86parseModuleSubSection(XF86LoadPtr head, char *name);
+XF86LoadPtr xf86parseModuleSubSection(XF86LoadPtr head, const char *name);
 XF86ConfModulePtr xf86parseModuleSection(void);
 void xf86printModuleSection(FILE *cf, XF86ConfModulePtr ptr);
-XF86LoadPtr xf86addNewLoadDirective(XF86LoadPtr head, char *name, int type, XF86OptionPtr opts);
+XF86LoadPtr xf86addNewLoadDirective(XF86LoadPtr head, const char *name, int type, XF86OptionPtr opts);
 /* Monitor.c */
 XF86ConfModeLinePtr xf86parseModeLine(void);
 XF86ConfModeLinePtr xf86parseVerboseMode(void);
@@ -134,10 +135,10 @@
 int xf86validateScreen(XF86ConfigPtr p);
 /* Vendor.c */
 XF86ConfVendorPtr xf86parseVendorSection(void);
-XF86ConfVendSubPtr xf86parseVendorSubSection (XF86ConfVendSubPtr head, char *name);
+XF86ConfVendSubPtr xf86parseVendorSubSection (XF86ConfVendSubPtr head, const char *name);
 void xf86printVendorSection(FILE * cf, XF86ConfVendorPtr ptr);
 /* Video.c */
-XF86ConfVideoPortPtr xf86parseVideoPortSubSection(char *name);
+XF86ConfVideoPortPtr xf86parseVideoPortSubSection(const char *name);
 XF86ConfVideoAdaptorPtr xf86parseVideoAdaptorSection(void);
 void xf86printVideoAdaptorSection(FILE *cf, XF86ConfVideoAdaptorPtr ptr);
 /* scan.c */
@@ -147,11 +148,14 @@
 int xf86getSubTokenWithTab(char **comment, xf86ConfigSymTabRec *tab);
 void xf86unGetToken(int token);
 char *xf86tokenString(void);
-void xf86parseError(char *format, ...);
-void xf86parseWarning(char *format, ...);
-void xf86validationError(char *format, ...);
-void xf86setSection(char *section);
+void xf86parseError(const char *format, ...);
+void xf86parseWarning(const char *format, ...);
+void xf86validationError(const char *format, ...);
+void xf86setSection(const char *section);
 int xf86getStringToken(xf86ConfigSymTabRec *tab);
+char *xf86configStrdup (const char *s);
+int xf86configAsprintf (char **ret, const char *format, ...);
+
 /* write.c */
 /* DRI.c */
 XF86ConfBuffersPtr xf86parseBuffers (void);
Index: xc/programs/Xserver/hw/xfree86/parser/read.c
diff -u xc/programs/Xserver/hw/xfree86/parser/read.c:1.27 xc/programs/Xserver/hw/xfree86/parser/read.c:1.28
--- xc/programs/Xserver/hw/xfree86/parser/read.c:1.27	Wed Jan 26 00:31:50 2005
+++ xc/programs/Xserver/hw/xfree86/parser/read.c	Wed Aug  9 16:53:16 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/read.c,v 1.27 2005/01/26 05:31:50 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/read.c,v 1.28 2006/08/09 20:53:16 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -165,113 +165,81 @@
 			xf86setSection (val.str);
 			if (xf86nameCompare (val.str, "files") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_files_lst, xf86parseFilesSection,
 							   XF86ConfFilesPtr);
 			}
 			else if (xf86nameCompare (val.str, "serverflags") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_flags_lst, xf86parseFlagsSection,
 							 XF86ConfFlagsPtr);
 			}
 			else if (xf86nameCompare (val.str, "keyboard") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_input_lst, xf86parseKeyboardSection,
 							 XF86ConfInputPtr);
 			}
 			else if (xf86nameCompare (val.str, "pointer") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_input_lst, xf86parsePointerSection,
 							 XF86ConfInputPtr);
 			}
 			else if (xf86nameCompare (val.str, "videoadaptor") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_videoadaptor_lst, xf86parseVideoAdaptorSection,
 							 XF86ConfVideoAdaptorPtr);
 			}
 			else if (xf86nameCompare (val.str, "device") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_device_lst, xf86parseDeviceSection,
 							 XF86ConfDevicePtr);
 			}
 			else if (xf86nameCompare (val.str, "monitor") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_monitor_lst, xf86parseMonitorSection,
 							 XF86ConfMonitorPtr);
 			}
 			else if (xf86nameCompare (val.str, "modes") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_modes_lst, xf86parseModesSection,
 							 XF86ConfModesPtr);
 			}
 			else if (xf86nameCompare (val.str, "screen") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_screen_lst, xf86parseScreenSection,
 							 XF86ConfScreenPtr);
 			}
 			else if (xf86nameCompare(val.str, "inputdevice") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_input_lst, xf86parseInputSection,
 							 XF86ConfInputPtr);
 			}
 			else if (xf86nameCompare (val.str, "module") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_modules_lst, xf86parseModuleSection,
 							 XF86ConfModulePtr);
 			}
 			else if (xf86nameCompare (val.str, "serverlayout") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_layout_lst, xf86parseLayoutSection,
 							 XF86ConfLayoutPtr);
 			}
 			else if (xf86nameCompare (val.str, "vendor") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_vendor_lst, xf86parseVendorSection,
 							 XF86ConfVendorPtr);
 			}
 			else if (xf86nameCompare (val.str, "dri") == 0)
 			{
-				xf86conffree(val.str);
-				val.str = NULL;
 				HANDLE_LIST (conf_dri_lst, xf86parseDRISection,
 							   XF86ConfDRIPtr);
 			}
 			else
 			{
 				Error (INVALID_SECTION_MSG, xf86tokenString ());
-				xf86conffree(val.str);
-				val.str = NULL;
 			}
 			break;
 		default:
 			Error (INVALID_KEYWORD_MSG, xf86tokenString ());
-			xf86conffree(val.str);
-			val.str = NULL;
 		}
 	}
 	return ptr;
Index: xc/programs/Xserver/hw/xfree86/parser/scan.c
diff -u xc/programs/Xserver/hw/xfree86/parser/scan.c:1.33 xc/programs/Xserver/hw/xfree86/parser/scan.c:1.34
--- xc/programs/Xserver/hw/xfree86/parser/scan.c:1.33	Sun Oct 17 20:02:32 2004
+++ xc/programs/Xserver/hw/xfree86/parser/scan.c	Wed Aug  9 16:53:16 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/scan.c,v 1.33 2004/10/18 00:02:32 tsi Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/scan.c,v 1.34 2006/08/09 20:53:16 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2004 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -109,7 +109,7 @@
 
 #define CONFIG_BUF_LEN     1024
 
-static int StringToToken (char *, xf86ConfigSymTabRec *);
+static int StringToToken (const char *, xf86ConfigSymTabRec *);
 
 static FILE *configFile = NULL;
 static const char **builtinConfig = NULL;
@@ -314,8 +314,8 @@
 			}
 			while ((c != '\"') && (c != '\n') && (c != '\r') && (c != '\0'));
 			configRBuf[i] = '\0';
-			val.str = xf86confmalloc (strlen (configRBuf) + 1);
-			strcpy (val.str, configRBuf);	/* private copy ! */
+			/* No private copy! */
+			val.str = configRBuf;
 			return (STRING);
 		}
 
@@ -787,7 +787,7 @@
 }
 
 void
-xf86parseError (char *format,...)
+xf86parseError (const char *format,...)
 {
 	va_list ap;
 
@@ -801,7 +801,7 @@
 }
 
 void
-xf86parseWarning (char *format,...)
+xf86parseWarning (const char *format,...)
 {
 	va_list ap;
 
@@ -815,7 +815,7 @@
 }
 
 void
-xf86validationError (char *format,...)
+xf86validationError (const char *format,...)
 {
 	va_list ap;
 
@@ -828,12 +828,11 @@
 }
 
 void
-xf86setSection (char *section)
+xf86setSection (const char *section)
 {
 	if (configSection)
 		xf86conffree(configSection);
-	configSection = xf86confmalloc(strlen (section) + 1);
-	strcpy (configSection, section);
+	configSection = xf86configStrdup(section);
 }
 
 /* 
@@ -847,7 +846,7 @@
 }
 
 static int
-StringToToken (char *str, xf86ConfigSymTabRec * tab)
+StringToToken (const char *str, xf86ConfigSymTabRec * tab)
 {
 	int i;
 
@@ -899,9 +898,10 @@
 }
 
 char *
-xf86addComment(char *cur, char *add)
+xf86addComment(char *cur, const char *add)
 {
 	char *str;
+	const char *s;
 	int len, curlen, iscomment, hasnewline = 0, endnewline;
 
 	if (add == NULL || add[0] == '\0')
@@ -916,14 +916,14 @@
 	else
 		curlen = 0;
 
-	str = add;
+	s = add;
 	iscomment = 0;
-	while (*str) {
-	    if (*str != ' ' && *str != '\t')
+	while (*s) {
+	    if (*s != ' ' && *s != '\t')
 		break;
-	    ++str;
+	    ++s;
 	}
-	iscomment = (*str == '#');
+	iscomment = (*s == '#');
 
 	len = strlen(add);
 	endnewline = add[len - 1] == '\n';
@@ -944,3 +944,61 @@
 
 	return (cur);
 }
+
+char *
+xf86configStrdup (const char *s)
+{
+	char *tmp;
+	if (!s) return NULL;
+	tmp = xf86confmalloc (sizeof (char) * (strlen (s) + 1));
+	if (tmp)
+		strcpy (tmp, s);
+	return (tmp);
+}
+
+int
+xf86configAsprintf (char **ret, const char *format, ...)
+{
+	char *s;
+	va_list args;
+	int status;
+
+	if (!ret || !format)
+		return -1;
+
+#ifdef HAS_ASPRINTF
+	va_start(args, format);
+	status = vasprintf(&s, format, args);
+	va_end(args);
+	if (status != -1 && s) {
+		*ret = xf86configStrdup(s);
+		free(s);
+		if (!*ret)
+			status = -1;
+	} else
+		*ret = NULL;
+	return status;
+#else
+#define TMP_SIZE 4000
+	s = xf86confcalloc(1, TMP_SIZE);
+	if (!s) {
+		*ret = NULL;
+		return -1;
+	}
+	va_start(args, format);
+	status = vsnprintf(s, TMP_SIZE, format, args);
+	va_end(args);
+	if (status > TMP_SIZE - 1)
+		status = TMP_SIZE - 1;
+	if (status < TMP_SIZE - 1) {
+		*ret = xf86confrealloc(s, status + 1);
+		if (!*ret) {
+			xf86conffree(s);
+			status = -1;
+		}
+	} else
+		*ret = s;
+	return status;
+#endif
+}
+
Index: xc/programs/Xserver/hw/xfree86/parser/xf86Optrec.h
diff -u xc/programs/Xserver/hw/xfree86/parser/xf86Optrec.h:1.12 xc/programs/Xserver/hw/xfree86/parser/xf86Optrec.h:1.14
--- xc/programs/Xserver/hw/xfree86/parser/xf86Optrec.h:1.12	Fri Feb 13 18:58:50 2004
+++ xc/programs/Xserver/hw/xfree86/parser/xf86Optrec.h	Thu Aug 24 18:40:40 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/xf86Optrec.h,v 1.12 2004/02/13 23:58:50 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/xf86Optrec.h,v 1.14 2006/08/24 22:40:40 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2001 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -106,21 +106,20 @@
 XF86OptionRec, *XF86OptionPtr;
 
 
-XF86OptionPtr xf86addNewOption(XF86OptionPtr head, char *name, char *val);
+XF86OptionPtr xf86addNewOption(XF86OptionPtr head, const char *name,
+				const char *val);
 XF86OptionPtr xf86optionListDup(XF86OptionPtr opt);
 void xf86optionListFree(XF86OptionPtr opt);
 char *xf86optionName(XF86OptionPtr opt);
 char *xf86optionValue(XF86OptionPtr opt);
-XF86OptionPtr xf86newOption(char *name, char *value);
+XF86OptionPtr xf86newOption(const char *name, const char *value);
 XF86OptionPtr xf86nextOption(XF86OptionPtr list);
 XF86OptionPtr xf86findOption(XF86OptionPtr list, const char *name);
 char *xf86findOptionValue(XF86OptionPtr list, const char *name);
 int xf86findOptionBoolean (XF86OptionPtr, const char *, int);
 XF86OptionPtr xf86optionListCreate(const char **options, int count, int used);
 XF86OptionPtr xf86optionListMerge(XF86OptionPtr head, XF86OptionPtr tail);
-char *xf86configStrdup (const char *s);
 int xf86nameCompare (const char *s1, const char *s2);
-char *xf86uLongToString(unsigned long i);
 void xf86debugListOptions(XF86OptionPtr);
 XF86OptionPtr xf86parseOption(XF86OptionPtr head);
 void xf86printOptionList(FILE *fp, XF86OptionPtr list, int tabs);
Index: xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h
diff -u xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h:1.37 xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h:1.38
--- xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h:1.37	Wed Jan 26 00:31:50 2005
+++ xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h	Wed Aug  9 16:53:16 2006
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h,v 1.37 2005/01/26 05:31:50 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/parser/xf86Parser.h,v 1.38 2006/08/09 20:53:16 dawes Exp $ */
 /* 
  * 
  * Copyright (c) 1997  Metro Link Incorporated
@@ -27,7 +27,7 @@
  * 
  */
 /*
- * Copyright (c) 1997-2005 by The XFree86 Project, Inc.
+ * Copyright (c) 1997-2006 by The XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -590,6 +590,6 @@
 
 int xf86pathIsAbsolute(const char *path);
 int xf86pathIsSafe(const char *path);
-char *xf86addComment(char *cur, char *add);
+char *xf86addComment(char *cur, const char *add);
 
 #endif /* _xf86Parser_h_ */
Index: xc/programs/Xserver/hw/xfree86/ramdac/TI.c
diff -u xc/programs/Xserver/hw/xfree86/ramdac/TI.c:1.8 xc/programs/Xserver/hw/xfree86/ramdac/TI.c:1.9
--- xc/programs/Xserver/hw/xfree86/ramdac/TI.c:1.8	Tue Sep 23 22:43:35 2003
+++ xc/programs/Xserver/hw/xfree86/ramdac/TI.c	Sun Dec 10 10:58:33 2006
@@ -24,7 +24,7 @@
  * Modified from IBM.c to support TI RAMDAC routines 
  *   by Jens Owen, <jens@tungstengraphics.com>.
  */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/TI.c,v 1.8 2003/09/24 02:43:35 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/ramdac/TI.c,v 1.9 2006/12/10 15:58:33 tsi Exp $ */
 
 #include "xf86.h"
 #include "xf86_OSproc.h"
@@ -114,7 +114,7 @@
     ActualClock = VCO / ( 1 << p );
 
 #ifdef DEBUG
-    ErrorF( "f_out=%ld f_vco=%.1f n=%d m=%d p=%d\n",
+    ErrorF( "f_out=%ld f_vco=%.1f n=%ld m=%ld p=%ld\n",
 	    ActualClock, VCO, *rN, *rM, *rP);
 #endif
 
Index: xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl
diff -u xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl:1.5 xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl:1.6
--- xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl:1.5	Fri Feb 13 22:08:16 2004
+++ xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl	Thu Mar  1 11:01:40 2007
@@ -8,7 +8,7 @@
 #   perl pciid2c.pl ../common/xf86PciInfo.h < pci.ids > xf86PciIds.h
 #
 #
-# Copyright © 2002 by The XFree86 Project, Inc.
+# Copyright © 2002-2007 by The XFree86 Project, Inc.
 # All rights reserved.
 #
 # Permission is hereby granted, free of charge, to any person obtaining
@@ -55,7 +55,7 @@
 #
 # Author: David Dawes
 #
-# $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl,v 1.5 2004/02/14 03:08:16 dawes Exp $
+# $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/pciid2c.pl,v 1.6 2007/03/01 16:01:40 tsi Exp $
 #
 
 if (@ARGV[0]) {
@@ -171,7 +171,7 @@
  *
  * This formatting of the data is:
  *
- * Copyright © 2002 by the XFree86 Project, Inc.
+ * Copyright © 2002-2007 by the XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
Index: xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h
diff -u xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h:1.24 xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h:1.25
--- xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h:1.24	Tue Apr 11 21:07:29 2006
+++ xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h	Thu Mar  1 11:01:40 2007
@@ -1,4 +1,4 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h,v 1.24 2006/04/12 01:07:29 dawes Exp $ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/scanpci/xf86PciStdIds.h,v 1.25 2007/03/01 16:01:40 tsi Exp $ */
 
 /*
  * THIS FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
@@ -18,7 +18,7 @@
  *
  * This formatting of the data is:
  *
- * Copyright © 2002 by the XFree86 Project, Inc.
+ * Copyright © 2002-2007 by the XFree86 Project, Inc.
  * All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining
@@ -77,6 +77,10 @@
 static const char pci_vendor_001a[] = "Ascend Communications, Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_001c[] = "PEAK-System Technik GmbH";
+static const char pci_device_001c_0001[] = "PCAN-PCI CAN-Bus controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0033[] = "Paradyne corp.";
 #endif
 static const char pci_vendor_003d[] = "Lockheed Martin-Marietta Corp";
@@ -85,6 +89,21 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0070[] = "Hauppauge computer works Inc.";
+static const char pci_device_0070_0003[] = "WinTV PVR-250";
+static const char pci_device_0070_0009[] = "WinTV PVR-150";
+static const char pci_device_0070_0801[] = "WinTV PVR-150";
+static const char pci_device_0070_0807[] = "WinTV PVR-150";
+static const char pci_device_0070_4000[] = "WinTV PVR-350";
+static const char pci_device_0070_4001[] = "WinTV PVR-250 (v1)";
+static const char pci_device_0070_4009[] = "WinTV PVR-250";
+static const char pci_device_0070_4800[] = "WinTV PVR-350";
+static const char pci_device_0070_4801[] = "WinTV PVR-250 MCE";
+static const char pci_device_0070_4803[] = "WinTV PVR-250";
+static const char pci_device_0070_8003[] = "WinTV PVR-150";
+static const char pci_device_0070_8801[] = "WinTV PVR-150";
+static const char pci_device_0070_c801[] = "WinTV PVR-150";
+static const char pci_device_0070_e807[] = "WinTV PVR-500 MCE (1st tuner)";
+static const char pci_device_0070_e817[] = "WinTV PVR-500 MCE (2nd tuner)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0071[] = "Nebula Electronics Ltd.";
@@ -97,9 +116,15 @@
 static const char pci_vendor_00a7[] = "Teles AG (Wrong ID)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_00f5[] = "BFG Technologies, Inc.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0100[] = "Ncipher Corp Ltd";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0123[] = "General Dynamics";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_018a[] = "LevelOne";
 static const char pci_device_018a_0106[] = "FPC-0106TX misprogrammed [RTL81xx]";
 #endif
@@ -119,10 +144,16 @@
 static const char pci_device_02ac_1012[] = "1012 PCMCIA 10/100 Ethernet Card [RTL81xx]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0315[] = "SK-Electronics Co., Ltd.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0357[] = "TTTech AG";
 static const char pci_device_0357_000a[] = "TTP-Monitoring Card V2.0";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0403[] = "Future Technology Devices International Ltd";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0432[] = "SCM Microsystems, Inc.";
 static const char pci_device_0432_0001[] = "Pluto2 DVB-T Receiver for PCMCIA [EasyWatch MobilSet]";
 #endif
@@ -132,12 +163,22 @@
 static const char pci_device_045e_00c2[] = "MN-710 wireless USB paddle";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0482[] = "Kyocera";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_04cf[] = "Myson Century, Inc";
 static const char pci_device_04cf_8818[] = "CS8818 USB2.0-to-ATAPI Bridge Controller with Embedded PHY";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_050d[] = "Belkin";
+static const char pci_device_050d_001a[] = "FSD7000 802.11g PCI Wireless card";
+static const char pci_device_050d_0109[] = "F5U409-CU USB/Serial Portable Adapter";
 static const char pci_device_050d_7050[] = "F5D7050 802.11g Wireless USB Adapter";
+static const char pci_device_050d_705c[] = "F5D7050 v4";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_05a9[] = "OmniVision";
+static const char pci_device_05a9_8519[] = "OV519 series";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_05e3[] = "CyberDoor";
@@ -145,6 +186,8 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_066f[] = "Sigmatel Inc.";
+static const char pci_device_066f_3410[] = "SMTP3410";
+static const char pci_device_066f_3500[] = "SMTP3500";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0675[] = "Dynalink";
@@ -155,18 +198,41 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_067b[] = "Prolific Technology, Inc.";
+static const char pci_device_067b_2303[] = "PL-2303 USB-to-Serial Converter";
 static const char pci_device_067b_3507[] = "PL-3507 Hi-Speed USB & IEEE 1394 Combo to IDE Bridge Controller";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_069d[] = "Hughes Network Systems (HNS)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0721[] = "Sapphire, Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_07ca[] = "AVerMedia Technologies Inc.";
+static const char pci_device_07ca_b808[] = "AVerTV DVB-T Volar (USB 2.0)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_07e2[] = "ELMEG Communication Systems GmbH";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0842[] = "NPG, Personal Grand Technology";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_08ff[] = "AuthenTec";
+static const char pci_device_08ff_afe4[] = "[Anchor] AF-S2 FingerLoc Sensor Module";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0925[] = "VIA Technologies, Inc. (Wrong ID)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_093a[] = "PixArt Imaging Inc.";
+static const char pci_device_093a_010e[] = "Innovage Mini Digital Camera";
+static const char pci_device_093a_010f[] = "SDC-300 Webcam";
+static const char pci_device_093a_2468[] = "CIF Single Chip";
+static const char pci_device_093a_2603[] = "Philips Webcam SPC500NC";
+static const char pci_device_093a_2608[] = "Maxell MaxCam RotaWeb";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_09c1[] = "Arris";
 static const char pci_device_09c1_0704[] = "CM 200E Cable Modem";
 #endif
@@ -174,9 +240,34 @@
 static const char pci_vendor_0a89[] = "BREA Technologies Inc";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0ace[] = "ZyDAS";
+static const char pci_device_0ace_1211[] = "ZD1211 IEEE 802.11b+g USB Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0b0b[] = "Rhino Equiment Corp.";
+static const char pci_device_0b0b_0105[] = "Rhino R1T1";
+static const char pci_device_0b0b_0205[] = "Rhino R4FXO";
+static const char pci_device_0b0b_0206[] = "RCB4FXO 4-channel FXO analog telphony card";
+static const char pci_device_0b0b_0305[] = "Rhino R4T1";
+static const char pci_device_0b0b_0405[] = "Rhino R8FXX";
+static const char pci_device_0b0b_0406[] = "RCB8FXX 8-channel modular analog telphony card";
+static const char pci_device_0b0b_0505[] = "Rhino R24FXX";
+static const char pci_device_0b0b_0506[] = "RCB24FXS 24-Channel FXS analog telphony card";
+static const char pci_device_0b0b_0605[] = "Rhino R2T1";
+static const char pci_device_0b0b_0705[] = "Rhino R24FXS";
+static const char pci_device_0b0b_0706[] = "RCB24FXO 24-Channel FXO analog telphony card";
+static const char pci_device_0b0b_0905[] = "R1T3 Single T3 Digital Telephony Card";
+static const char pci_device_0b0b_0906[] = "RCB24FXX 24-channel modular analog telphony card";
+static const char pci_device_0b0b_0a06[] = "RCB672FXX 672-channel modular analog telphony card";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0b49[] = "ASCII Corporation";
 static const char pci_device_0b49_064f[] = "Trance Vibrator";
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0ccd[] = "TerraTec Electronic GmbH";
+static const char pci_device_0ccd_0038[] = "Cinergy T^2 DVB-T Receiver";
+#endif
 static const char pci_vendor_0e11[] = "Compaq Computer Corporation";
 static const char pci_device_0e11_0001[] = "PCI to EISA Bridge";
 static const char pci_device_0e11_0002[] = "PCI to ISA Bridge";
@@ -312,9 +403,15 @@
 static const char pci_device_0e11_f130[] = "NetFlex-3/P ThunderLAN 1.0";
 static const char pci_device_0e11_f150[] = "NetFlex-3/P ThunderLAN 2.3";
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0e21[] = "Cowon Systems, Inc.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_0e55[] = "HaSoTec GmbH";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_0eac[] = "SHF Communication Technologies AG";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1000[] = "LSI Logic / Symbios Logic";
 static const char pci_device_1000_0001[] = "53c810";
 #ifdef INIT_SUBSYS_INFO
@@ -332,6 +429,11 @@
 static const char pci_subsys_1000_0006_1000_1000[] = "LSI53C860E PCI to Ultra SCSI I/O Processor";
 #endif
 static const char pci_device_1000_000a[] = "53c1510";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_000a_0e11_b143[] = "Integrated Dual Channel Wide Ultra2 SCSI Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1000_000a_1000_1000[] = "LSI53C1510 PCI to Dual Channel Wide Ultra2 SCSI Controller (Nonintelligent mode)";
 #endif
@@ -351,7 +453,7 @@
 static const char pci_subsys_1000_000b_1000_1020[] = "LSI21002 PCI to Dual Channel Ultra2 SCSI host adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1000_000b_13e9_1000[] = "6221L-4U";
+static const char pci_subsys_1000_000b_13e9_1000[] = "6221L-4U (Dual U2W SCSI, dual 10/100TX, graphics)";
 #endif
 static const char pci_device_1000_000c[] = "53c895";
 #ifdef INIT_SUBSYS_INFO
@@ -388,6 +490,12 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_000f_1775_10d0[] = "V5D Single Board Computer Wide Ultra SCSI";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_000f_1775_10d1[] = "V5D Single Board Computer Ultra SCSI";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1000_000f_1de1_3904[] = "DC390F/U Ultra Wide SCSI Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -423,6 +531,9 @@
 static const char pci_subsys_1000_0020_1000_1000[] = "LSI53C1010-33 PCI to Dual Channel Ultra160 SCSI Controller";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0020_107b_1040[] = "Server Onboard 53C1010-33";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1000_0020_1de1_1020[] = "DC-390U3W";
 #endif
 static const char pci_device_1000_0021[] = "53c1010 66MHz  Ultra3 SCSI Adapter";
@@ -432,6 +543,16 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1000_0021_1000_1010[] = "Asus TR-DLS onboard 53C1010-66";
 #endif
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0021_103c_1330[] = "Ultra160 SCSI [A7059A]";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0021_103c_1340[] = "Ultra160 SCSI [A7060A]";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1000_0021_124b_1070[] = "PMC-USCSI3";
 #endif
@@ -475,6 +596,11 @@
 static const char pci_subsys_1000_0030_1028_1010[] = "LSI U320 SCSI Controller";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0030_103c_12c5[] = "Ultra320 SCSI [A7173A]";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1000_0030_124b_1170[] = "PMC-USCSI320";
 #endif
@@ -497,12 +623,89 @@
 static const char pci_device_1000_0041[] = "53C1035ZC PCI-X Fusion-MPT Dual Ultra320 SCSI";
 static const char pci_device_1000_0050[] = "SAS1064 PCI-X Fusion-MPT SAS";
 static const char pci_device_1000_0054[] = "SAS1068 PCI-X Fusion-MPT SAS";
+static const char pci_device_1000_0055[] = "SAS1068 PCI-X Fusion-MPT SAS";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0055_1033_8336[] = "SAS1068";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_1000_0056[] = "SAS1064E PCI-Express Fusion-MPT SAS";
 static const char pci_device_1000_0058[] = "SAS1068E PCI-Express Fusion-MPT SAS";
 static const char pci_device_1000_005a[] = "SAS1066E PCI-Express Fusion-MPT SAS";
 static const char pci_device_1000_005c[] = "SAS1064A PCI-X Fusion-MPT SAS";
 static const char pci_device_1000_005e[] = "SAS1066 PCI-X Fusion-MPT SAS";
-static const char pci_device_1000_0060[] = "SAS1078 PCI-X Fusion-MPT SAS";
+static const char pci_device_1000_0060[] = "MegaRAID SAS 1078";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_1006[] = "MegaRAID SAS 8888ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_100a[] = "MegaRAID SAS 8708ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_100e[] = "MegaRAID SAS 8884E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_100f[] = "MegaRAID SAS 8708E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_1010[] = "MegaRAID SATA 350-8ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_1011[] = "MegaRAID SATA 350-4ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1000_1012[] = "MegaRAID SAS 8704ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1014_0363[] = "MegaRAID SAS PCI Express ROMB";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1014_0364[] = "SystemX MegaRAID SAS 8808E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1014_0365[] = "SystemX MegaRAID SAS 8884E";
+#endif
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1028_1f0a[] = "PERC 6/E Adapter RAID Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1028_1f0b[] = "PERC 6/i Adapter RAID Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1028_1f0c[] = "PERC 6/i Integrated RAID Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1028_1f0d[] = "CERC 6/i Adapter RAID Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1028_1f11[] = "CERC 6/i Adapter RAID Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1043_824d[] = "MegaRAID SAS PCI Express ROMB";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_1170_002f[] = "MegaRAID SAS PCI Express ROMB";
+#endif
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_8086_34cc[] = "Integrated RAID Controller SROMBSAS28E";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0060_8086_34cd[] = "Integrated RAID Controller SROMBSAS28E";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_1000_0062[] = "SAS1078 PCI-Express Fusion-MPT SAS";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1000_0062_1000_0062[] = "SAS1078 PCI-Express Fusion-MPT SAS";
@@ -570,6 +773,21 @@
 static const char pci_subsys_1000_0408_1028_0002[] = "PowerEdge RAID Controller PERC4e/DC";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0408_1028_0012[] = "PowerEdge RAID Controller RAC4";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0408_1028_0015[] = "PowerEdge RAID Controller PERC5";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0408_1028_1f03[] = "PowerEdge RAID Controller PERC5";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1000_0408_1734_1065[] = "FSC MegaRAID PCI Express ROMB";
 #endif
@@ -600,6 +818,77 @@
 static const char pci_subsys_1000_0409_8086_3499[] = "MegaRAID RAID Controller Harwich SROMBU42E";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_device_1000_0411[] = "MegaRAID SAS";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1000_1001[] = "MegaRAID SAS 8408E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1000_1002[] = "MegaRAID SAS 8480E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1000_1003[] = "MegaRAID SAS 8344ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1000_1004[] = "MegaRAID SAS 8308ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1000_1008[] = "MegaRAID SAS 84016E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1000_100c[] = "MegaRAID SATA 300-12E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1000_100d[] = "MegaRAID SATA 300-16E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1000_2004[] = "MegaRAID SATA 300-8ELP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1000_2005[] = "MegaRAID SATA 300-4ELP";
+#endif
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1033_8287[] = "MegaRAID SAS PCI Express ROMB";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1054_3016[] = "MegaRAID SAS RoMB Server";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1734_1081[] = "MegaRAID SAS PCI Express ROMB";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_1734_10a3[] = "MegaRAID SAS PCI Express ROMB";
+#endif
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_8086_1001[] = "RAID Controller SRCSAS18E";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_8086_1003[] = "RAID Controller SRCSAS144E";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_8086_3500[] = "SROMBSAS18E RAID Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_8086_3501[] = "SROMBSAS18E RAID Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0411_8086_3504[] = "SROMBSAS18E RAID Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_device_1000_0413[] = "MegaRAID SAS Verde ZCR";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1000_0413_1000_1005[] = "MegaRAID SAS 8300XLP";
+#endif
 static const char pci_device_1000_0621[] = "FC909 Fibre Channel Adapter";
 static const char pci_device_1000_0622[] = "FC929 Fibre Channel Adapter";
 #ifdef INIT_SUBSYS_INFO
@@ -697,7 +986,7 @@
 static const char pci_device_1002_3154[] = "M24 1T [FireGL M24 GL]";
 static const char pci_device_1002_3e50[] = "RV380 0x3e50 [Radeon X600]";
 static const char pci_device_1002_3e54[] = "RV380 0x3e54 [FireGL V3200]";
-static const char pci_device_1002_3e70[] = "RV380 [Radeon X600] Secondary";
+static const char pci_device_1002_3e70[] = "RV380 [Radeon X600] (Secondary)";
 static const char pci_device_1002_4136[] = "Radeon IGP 320 M";
 static const char pci_device_1002_4137[] = "Radeon IGP330/340/350";
 static const char pci_device_1002_4144[] = "R300 AD [Radeon 9500 Pro]";
@@ -707,7 +996,7 @@
 static const char pci_device_1002_4148[] = "R350 AH [Radeon 9800]";
 static const char pci_device_1002_4149[] = "R350 AI [Radeon 9800]";
 static const char pci_device_1002_414a[] = "R350 AJ [Radeon 9800]";
-static const char pci_device_1002_414b[] = "R350 AK [Fire GL X2]";
+static const char pci_device_1002_414b[] = "R350 AK [FireGL X2]";
 static const char pci_device_1002_4150[] = "RV350 AP [Radeon 9600]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4150_1002_0002[] = "R9600 Pro primary (Asus OEM for HP)";
@@ -719,7 +1008,7 @@
 static const char pci_subsys_1002_4150_1002_4722[] = "All-in-Wonder 2006 AGP Edition";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4150_1458_4024[] = "Giga-Byte GV-R96128D Primary";
+static const char pci_subsys_1002_4150_1458_4024[] = "Giga-Byte GV-R96128D (Primary)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4150_148c_2064[] = "PowerColor R96A-C3N";
@@ -731,13 +1020,13 @@
 static const char pci_subsys_1002_4150_174b_7c19[] = "Sapphire Atlantis Radeon 9600 Pro";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4150_174b_7c29[] = "GC-R9600PRO Primary [Sapphire]";
+static const char pci_subsys_1002_4150_174b_7c29[] = "GC-R9600PRO [Sapphire] (Primary)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4150_17ee_2002[] = "Radeon 9600 256Mb Primary";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4150_18bc_0101[] = "GC-R9600PRO Primary";
+static const char pci_subsys_1002_4150_18bc_0101[] = "GC-R9600PRO (Primary)";
 #endif
 static const char pci_device_1002_4151[] = "RV350 AQ [Radeon 9600]";
 #ifdef INIT_SUBSYS_INFO
@@ -764,12 +1053,15 @@
 #endif
 static const char pci_device_1002_4153[] = "RV350 AS [Radeon 9550]";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4153_1043_010c[] = "A9550GE/TD";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4153_1462_932c[] = "865PE Neo2-V (MS-6788) mainboard";
 #endif
-static const char pci_device_1002_4154[] = "RV350 AT [Fire GL T2]";
-static const char pci_device_1002_4155[] = "RV350 AU [Fire GL T2]";
-static const char pci_device_1002_4156[] = "RV350 AV [Fire GL T2]";
-static const char pci_device_1002_4157[] = "RV350 AW [Fire GL T2]";
+static const char pci_device_1002_4154[] = "RV350 AT [FireGL T2]";
+static const char pci_device_1002_4155[] = "RV350 AU [FireGL T2]";
+static const char pci_device_1002_4156[] = "RV350 AV [FireGL T2]";
+static const char pci_device_1002_4157[] = "RV350 AW [FireGL T2]";
 static const char pci_device_1002_4158[] = "68800AX [Mach32]";
 static const char pci_device_1002_4164[] = "R300 AD [Radeon 9500 Pro] (Secondary)";
 static const char pci_device_1002_4165[] = "R300 AE [Radeon 9700 Pro] (Secondary)";
@@ -783,19 +1075,19 @@
 static const char pci_subsys_1002_4170_1002_4723[] = "All-in-Wonder 2006 AGP Edition (Secondary)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4170_1458_4025[] = "Giga-Byte GV-R96128D Secondary";
+static const char pci_subsys_1002_4170_1458_4025[] = "Giga-Byte GV-R96128D (Secondary)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4170_148c_2067[] = "PowerColor R96A-C3N (Secondary)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4170_174b_7c28[] = "GC-R9600PRO Secondary [Sapphire]";
+static const char pci_subsys_1002_4170_174b_7c28[] = "GC-R9600PRO [Sapphire] (Secondary)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4170_17ee_2003[] = "Radeon 9600 256Mb Secondary";
+static const char pci_subsys_1002_4170_17ee_2003[] = "Radeon 9600 256Mb (Secondary)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4170_18bc_0100[] = "GC-R9600PRO Secondary";
+static const char pci_subsys_1002_4170_18bc_0100[] = "GC-R9600PRO (Secondary)";
 #endif
 static const char pci_device_1002_4171[] = "RV350 AQ [Radeon 9600] (Secondary)";
 #ifdef INIT_SUBSYS_INFO
@@ -820,7 +1112,10 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4172_1787_4003[] = "Radeon 9600 XT (Secondary)";
 #endif
-static const char pci_device_1002_4173[] = "RV350 ? [Radeon 9550] (Secondary)";
+static const char pci_device_1002_4173[] = "RV350 AS [Radeon 9550] (Secondary)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4173_1043_010d[] = "A9550GE/TD (Secondary)";
+#endif
 static const char pci_device_1002_4237[] = "Radeon 7000 IGP";
 static const char pci_device_1002_4242[] = "R200 BB [Radeon All in Wonder 8500DV]";
 #ifdef INIT_SUBSYS_INFO
@@ -848,51 +1143,106 @@
 static const char pci_device_1002_4345[] = "EHCI USB Controller";
 static const char pci_device_1002_4347[] = "OHCI USB Controller #1";
 static const char pci_device_1002_4348[] = "OHCI USB Controller #2";
-static const char pci_device_1002_4349[] = "ATI Dual Channel Bus Master PCI IDE Controller";
+static const char pci_device_1002_4349[] = "Dual Channel Bus Master PCI IDE Controller";
 static const char pci_device_1002_434d[] = "IXP AC'97 Modem";
-static const char pci_device_1002_4353[] = "ATI SMBus";
+static const char pci_device_1002_4353[] = "SMBus";
 static const char pci_device_1002_4354[] = "215CT [Mach64 CT]";
 static const char pci_device_1002_4358[] = "210888CX [Mach64 CX]";
-static const char pci_device_1002_4363[] = "ATI SMBus";
-static const char pci_device_1002_436e[] = "ATI 436E Serial ATA Controller";
+static const char pci_device_1002_4363[] = "SMBus";
+static const char pci_device_1002_436e[] = "436E Serial ATA Controller";
 static const char pci_device_1002_4370[] = "IXP SB400 AC'97 Audio Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4370_103c_308b[] = "nx6125";
+static const char pci_subsys_1002_4370_1025_0079[] = "Aspire 5024WLMMi";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4370_103c_308b[] = "MX6125";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4370_105b_0c81[] = "Realtek ALC 653";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4370_107b_0300[] = "MX6421";
 #endif
 static const char pci_device_1002_4371[] = "IXP SB400 PCI-PCI Bridge";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4371_103c_308b[] = "nx6125";
+static const char pci_subsys_1002_4371_103c_308b[] = "MX6125";
 #endif
 static const char pci_device_1002_4372[] = "IXP SB400 SMBus Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4372_103c_308b[] = "nx6125";
+static const char pci_subsys_1002_4372_1025_0080[] = "Aspire 5024WLMMi";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4372_103c_308b[] = "MX6125";
 #endif
 static const char pci_device_1002_4373[] = "IXP SB400 USB2 Host Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4373_103c_308b[] = "nx6125";
+static const char pci_subsys_1002_4373_1025_0080[] = "Aspire 5024WLMMi";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4373_103c_308b[] = "MX6125";
 #endif
 static const char pci_device_1002_4374[] = "IXP SB400 USB Host Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4374_103c_308b[] = "nx6125";
+static const char pci_subsys_1002_4374_103c_308b[] = "MX6125";
 #endif
 static const char pci_device_1002_4375[] = "IXP SB400 USB Host Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4375_103c_308b[] = "nx6125";
+static const char pci_subsys_1002_4375_1025_0080[] = "Aspire 5024WLMMi";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4375_103c_308b[] = "MX6125";
+#endif
+static const char pci_device_1002_4376[] = "Standard Dual Channel PCI IDE Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4376_1025_0080[] = "Aspire 5024WLMMi";
 #endif
-static const char pci_device_1002_4376[] = "Standard Dual Channel PCI IDE Controller ATI";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4376_103c_308b[] = "nx6125";
+static const char pci_subsys_1002_4376_103c_308b[] = "MX6125";
 #endif
 static const char pci_device_1002_4377[] = "IXP SB400 PCI-ISA Bridge";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4377_103c_308b[] = "nx6125";
+static const char pci_subsys_1002_4377_1025_0080[] = "Aspire 5024WLMi";
 #endif
-static const char pci_device_1002_4378[] = "ATI SB400 - AC'97 Modem Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4378_103c_308b[] = "nx6125";
+static const char pci_subsys_1002_4377_103c_308b[] = "MX6125";
 #endif
-static const char pci_device_1002_4379[] = "ATI 4379 Serial ATA Controller";
-static const char pci_device_1002_437a[] = "ATI 437A Serial ATA Controller";
+static const char pci_device_1002_4378[] = "SB400 AC'97 Modem Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4378_1025_0080[] = "Aspire 5024WLMMi";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4378_103c_308b[] = "MX6125";
+#endif
+static const char pci_device_1002_4379[] = "4379 Serial ATA Controller";
+static const char pci_device_1002_437a[] = "437A Serial ATA Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_437a_1002_4379[] = "4379 Serial ATA Controller";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_437a_1002_437a[] = "437A Serial ATA Controller";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_437a_14f1_8800[] = "Leadtek WinFast TV2000XP Expert";
+#endif
+static const char pci_device_1002_437b[] = "SB450 HDA Audio";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_437b_1734_10b8[] = "Realtek High Definition Audio";
+#endif
+static const char pci_device_1002_4380[] = "SB600 Non-Raid-5 SATA";
+static const char pci_device_1002_4381[] = "SB600 Raid-5 SATA";
+static const char pci_device_1002_4382[] = "SB600 AC97 Audio";
+static const char pci_device_1002_4383[] = "SB600 Azalia";
+static const char pci_device_1002_4384[] = "SB600 PCI to PCI Bridge";
+static const char pci_device_1002_4385[] = "SB600 SMBus";
+static const char pci_device_1002_4386[] = "SB600 USB Controller (EHCI)";
+static const char pci_device_1002_4387[] = "SB600 USB (OHCI0)";
+static const char pci_device_1002_4388[] = "SB600 USB (OHCI1)";
+static const char pci_device_1002_4389[] = "SB600 USB (OHCI2)";
+static const char pci_device_1002_438a[] = "SB600 USB (OHCI3)";
+static const char pci_device_1002_438b[] = "SB600 USB (OHCI4)";
+static const char pci_device_1002_438c[] = "SB600 IDE";
+static const char pci_device_1002_438d[] = "SB600 PCI to LPC Bridge";
+static const char pci_device_1002_438e[] = "SB600 AC97 Modem";
 static const char pci_device_1002_4437[] = "Radeon Mobility 7000 IGP";
 static const char pci_device_1002_4554[] = "210888ET [Mach64 ET]";
 static const char pci_device_1002_4654[] = "Mach64 VT";
@@ -1004,10 +1354,13 @@
 static const char pci_device_1002_4751[] = "3D Rage Pro 215GQ";
 static const char pci_device_1002_4752[] = "Rage XL";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4752_0e11_001e[] = "Proliant Rage XL";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4752_1002_0008[] = "Rage XL";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4752_1002_4752[] = "Rage XL";
+static const char pci_subsys_1002_4752_1002_4752[] = "Proliant Rage XL";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4752_1002_8008[] = "Rage XL";
@@ -1022,7 +1375,13 @@
 static const char pci_subsys_1002_4752_1028_00d9[] = "PowerEdge 2500";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4752_1028_0134[] = "Poweredge SC600";
+static const char pci_subsys_1002_4752_1028_0134[] = "PowerEdge 600SC";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4752_103c_10e1[] = "NetServer Rage XL";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4752_107b_6400[] = "6400 Server";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4752_1734_007a[] = "Primergy RX300";
@@ -1033,6 +1392,9 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4752_8086_3427[] = "S875WP1-E mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4752_8086_5744[] = "S845WD1-E mainboard";
+#endif
 static const char pci_device_1002_4753[] = "Rage XC";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4753_1002_4753[] = "Rage XC";
@@ -1051,6 +1413,9 @@
 static const char pci_subsys_1002_4757_1028_0089[] = "Rage 3D IIC";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4757_1028_008e[] = "PowerEdge 1300 onboard video";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4757_1028_4082[] = "Rage 3D IIC";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -1108,13 +1473,18 @@
 static const char pci_device_1002_4a4d[] = "R420 JM [FireGL X3]";
 static const char pci_device_1002_4a4e[] = "M18 JN [Radeon Mobility 9800]";
 static const char pci_device_1002_4a50[] = "R420 JP [Radeon X800XT]";
+static const char pci_device_1002_4a54[] = "R420 [Radeon X800 VE]";
+static const char pci_device_1002_4a69[] = "R420 [Radeon X800 PRO/GTO] (Secondary)";
+static const char pci_device_1002_4a6a[] = "R420 [Radeon X800] (Secondary)";
+static const char pci_device_1002_4a6b[] = "R420 [Radeon X800] (Secondary)";
 static const char pci_device_1002_4a70[] = "R420 [X800XT-PE] (Secondary)";
+static const char pci_device_1002_4a74[] = "R420 [Radeon X800 VE] (Secondary)";
 static const char pci_device_1002_4b49[] = "R480 [Radeon X850XT]";
 static const char pci_device_1002_4b4b[] = "R480 [Radeon X850Pro]";
 static const char pci_device_1002_4b4c[] = "R481 [Radeon X850XT-PE]";
-static const char pci_device_1002_4b69[] = "R480 [Radeon X850XT secondary]";
+static const char pci_device_1002_4b69[] = "R480 [Radeon X850XT] (Secondary)";
 static const char pci_device_1002_4b6b[] = "R480 [Radeon X850Pro] (Secondary)";
-static const char pci_device_1002_4b6c[] = "R481 [Radeon X850XT-PE] Secondary";
+static const char pci_device_1002_4b6c[] = "R481 [Radeon X850XT-PE] (Secondary)";
 static const char pci_device_1002_4c42[] = "3D Rage LT Pro AGP-133";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4c42_0e11_b0e7[] = "Rage LT Pro (Compaq Presario 5240)";
@@ -1228,14 +1598,20 @@
 static const char pci_subsys_1002_4c59_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4c59_104d_8140[] = "PCG-Z1SP laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4c59_1509_1930[] = "Medion MD9703";
 #endif
 static const char pci_device_1002_4c5a[] = "Radeon Mobility M6 LZ";
 static const char pci_device_1002_4c64[] = "Radeon R250 Ld [Radeon Mobility 9000 M9]";
 static const char pci_device_1002_4c65[] = "Radeon R250 Le [Radeon Mobility 9000 M9]";
-static const char pci_device_1002_4c66[] = "Radeon R250 Lf [FireGL 9000]";
+static const char pci_device_1002_4c66[] = "Radeon R250 [Mobility FireGL 9000]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4c66_1014_054d[] = "Thinkpad T41";
+#endif
 static const char pci_device_1002_4c67[] = "Radeon R250 Lg [Radeon Mobility 9000 M9]";
-static const char pci_device_1002_4c6e[] = "Radeon R250 Ln [Radeon Mobility 9000 M9] [Secondary]";
+static const char pci_device_1002_4c6e[] = "Radeon R250 Ln [Radeon Mobility 9000 M9] (Secondary)";
 static const char pci_device_1002_4d46[] = "Rage Mobility M4 AGP";
 static const char pci_device_1002_4d4c[] = "Rage Mobility M4 AGP";
 static const char pci_device_1002_4e44[] = "Radeon R300 ND [Radeon 9700 Pro]";
@@ -1257,22 +1633,31 @@
 static const char pci_device_1002_4e48[] = "Radeon R350 [Radeon 9800 Pro]";
 static const char pci_device_1002_4e49[] = "Radeon R350 [Radeon 9800]";
 static const char pci_device_1002_4e4a[] = "RV350 NJ [Radeon 9800 XT]";
-static const char pci_device_1002_4e4b[] = "R350 NK [Fire GL X2]";
+static const char pci_device_1002_4e4b[] = "R350 NK [FireGL X2]";
 static const char pci_device_1002_4e50[] = "RV350 [Mobility Radeon 9600 M10]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4e50_1025_005a[] = "TravelMate 290";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4e50_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_1002_4e50_103c_088c[] = "NC8000 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4e50_103c_0890[] = "NC6000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4e50_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_1002_4e50_144d_c00c[] = "P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4e50_1462_0311[] = "MSI M510A";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_4e50_1734_1055[] = "Amilo M1420W";
 #endif
 static const char pci_device_1002_4e51[] = "M10 NQ [Radeon Mobility 9600]";
 static const char pci_device_1002_4e52[] = "RV350 [Mobility Radeon 9600 M10]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_4e52_144d_c00c[] = "P35 notebook";
+#endif
 static const char pci_device_1002_4e53[] = "M10 NS [Radeon Mobility 9600]";
 static const char pci_device_1002_4e54[] = "M10 NT [FireGL Mobility T2]";
 static const char pci_device_1002_4e56[] = "M11 NV [FireGL Mobility T2e]";
@@ -1290,9 +1675,11 @@
 static const char pci_device_1002_4e69[] = "Radeon R350 [Radeon 9800] (Secondary)";
 static const char pci_device_1002_4e6a[] = "RV350 NJ [Radeon 9800 XT] (Secondary)";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_4e6a_1002_4e71[] = "ATI Technologies Inc M10 NQ [Radeon Mobility 9600]";
+static const char pci_subsys_1002_4e6a_1002_4e71[] = "M10 NQ [Radeon Mobility 9600]";
 #endif
-static const char pci_device_1002_4e71[] = "M10 NQ [Radeon Mobility 9600] (secondary)";
+static const char pci_device_1002_4e71[] = "M10 NQ [Radeon Mobility 9600] (Secondary)";
+static const char pci_device_1002_4f72[] = "RV250 [Radeon 9000 Series]";
+static const char pci_device_1002_4f73[] = "Radeon RV250 [Radeon 9000 Series] (Secondary)";
 static const char pci_device_1002_5041[] = "Rage 128 PA/PRO";
 static const char pci_device_1002_5042[] = "Rage 128 PB/PRO AGP 2x";
 static const char pci_device_1002_5043[] = "Rage 128 PC/PRO AGP 4x";
@@ -1485,6 +1872,9 @@
 static const char pci_subsys_1002_5159_1002_013a[] = "Radeon 7000/Radeon VE";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5159_1002_0908[] = "XVR-100 (supplied by Sun)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5159_1014_029a[] = "Remote Supervisor Adapter II (RSA2)";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -1494,6 +1884,9 @@
 static const char pci_subsys_1002_5159_1028_019a[] = "PowerEdge SC1425";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5159_103c_1292[] = "Radeon 7000";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5159_1458_4002[] = "RV100 QY [RADEON 7000 PRO MAYA AV Series]";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -1511,8 +1904,12 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5159_1787_0202[] = "RV100 QY [Excalibur Radeon 7000]";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5159_17ee_1001[] = "Radeon 7000 64MB DDR + DVI";
+#endif
 static const char pci_device_1002_515a[] = "Radeon RV100 QZ [Radeon 7000/VE]";
 static const char pci_device_1002_515e[] = "ES1000";
+static const char pci_device_1002_515f[] = "ES1000";
 static const char pci_device_1002_5168[] = "Radeon R200 Qh";
 static const char pci_device_1002_5169[] = "Radeon R200 Qi";
 static const char pci_device_1002_516a[] = "Radeon R200 Qj";
@@ -1625,17 +2022,23 @@
 static const char pci_device_1002_554b[] = "R423 UK [Radeon X800SE (PCIE)]";
 static const char pci_device_1002_554d[] = "R430 [Radeon X800 XL] (PCIe)";
 static const char pci_device_1002_554f[] = "R430 [Radeon X800 (PCIE)]";
-static const char pci_device_1002_5550[] = "R423 [Fire GL V7100]";
-static const char pci_device_1002_5551[] = "R423 UQ [FireGL V7200 (PCIE)]";
+static const char pci_device_1002_5550[] = "R423 [FireGL V7100]";
+static const char pci_device_1002_5551[] = "R423 [FireGL V5100 (PCIE)]";
 static const char pci_device_1002_5552[] = "R423 UR [FireGL V5100 (PCIE)]";
 static const char pci_device_1002_5554[] = "R423 UT [FireGL V7100 (PCIE)]";
+static const char pci_device_1002_5569[] = "R423 UI [Radeon X800PRO (PCIE)] (Secondary)";
 static const char pci_device_1002_556b[] = "Radeon R423 UK (PCIE) [X800 SE] (Secondary)";
-static const char pci_device_1002_556d[] = "R430 [Radeon X800 XL] (PCIe) Secondary";
-static const char pci_device_1002_556f[] = "R430 [Radeon X800 (PCIE) Secondary]";
+static const char pci_device_1002_556d[] = "R430 [Radeon X800 XL] (PCIe) (Secondary)";
+static const char pci_device_1002_556f[] = "R430 [Radeon X800] (PCIE) (Secondary)";
+static const char pci_device_1002_5571[] = "R423GL-SE [FireGL V5100 (PCIE)] (Secondary)";
 static const char pci_device_1002_564a[] = "M26 [Mobility FireGL V5000]";
 static const char pci_device_1002_564b[] = "M26 [Mobility FireGL V5000]";
+static const char pci_device_1002_564f[] = "M26 [Radeon Mobility X700 XL (PCIE)]";
 static const char pci_device_1002_5652[] = "M26 [Radeon Mobility X700]";
 static const char pci_device_1002_5653[] = "Radeon Mobility X700 (PCIE)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5653_1025_0080[] = "Aspire 5024WLMi";
+#endif
 static const char pci_device_1002_5654[] = "264VT [Mach64 VT]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5654_1002_5654[] = "Mach64VT Reference";
@@ -1666,19 +2069,23 @@
 static const char pci_device_1002_5944[] = "RV280 [Radeon 9200 SE (PCI)]";
 static const char pci_device_1002_5950[] = "RS480 Host Bridge";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_5950_103c_308b[] = "nx6125";
+static const char pci_subsys_1002_5950_1025_0080[] = "Aspire 5024WLMMi";
 #endif
-static const char pci_device_1002_5951[] = "ATI Radeon Xpress 200 (RS480/RS482/RX480/RX482) Chipset - Host bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5950_103c_308b[] = "MX6125";
+#endif
+static const char pci_device_1002_5951[] = "Radeon Xpress 200 (RS480/RS482/RX480/RX482) Chipset - Host bridge";
+static const char pci_device_1002_5952[] = "RD580 [CrossFire Xpress 3200] Chipset Host Bridge";
 static const char pci_device_1002_5954[] = "RS480 [Radeon Xpress 200G Series]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5954_1002_5954[] = "RV370 [Radeon Xpress 200G Series]";
 #endif
-static const char pci_device_1002_5955[] = "ATI Radeon XPRESS 200M 5955 (PCIE)";
+static const char pci_device_1002_5955[] = "Radeon XPRESS 200M 5955 (PCIE)";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_5955_1002_5955[] = "RS480 0x5955 [ATI Radeon XPRESS 200M 5955 (PCIE)]";
+static const char pci_subsys_1002_5955_1002_5955[] = "RS480 0x5955 [Radeon XPRESS 200M 5955 (PCIE)]";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_5955_103c_308b[] = "nx6125";
+static const char pci_subsys_1002_5955_103c_308b[] = "MX6125";
 #endif
 static const char pci_device_1002_5960[] = "RV280 [Radeon 9200 PRO]";
 static const char pci_device_1002_5961[] = "RV280 [Radeon 9200]";
@@ -1712,12 +2119,18 @@
 static const char pci_device_1002_5962[] = "RV280 [Radeon 9200]";
 static const char pci_device_1002_5964[] = "RV280 [Radeon 9200 SE]";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5964_1002_5964[] = "Radeon 9200 SE, 64-bit 128MB DDR, 200/166MHz";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5964_1043_c006[] = "ASUS Radeon 9200 SE / TD / 128M";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5964_1458_4018[] = "Radeon 9200 SE";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5964_1458_4032[] = "Radeon 9200 SE 128MB";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5964_147b_6191[] = "R9200SE-DT";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -1740,9 +2153,13 @@
 #endif
 static const char pci_device_1002_5969[] = "ES1000";
 static const char pci_device_1002_5974[] = "RS482 [Radeon Xpress 200]";
-static const char pci_device_1002_5975[] = "RS482 [Radeon Xpress 200M]";
+static const char pci_device_1002_5975[] = "RS485 [Radeon Xpress 1100 IGP]";
+static const char pci_device_1002_5a33[] = "Radeon Xpress 200 Host Bridge";
 static const char pci_device_1002_5a34[] = "RS480 PCI-X Root Port";
+static const char pci_device_1002_5a36[] = "RS480 PCI Bridge";
+static const char pci_device_1002_5a37[] = "RS480 PCI Bridge";
 static const char pci_device_1002_5a38[] = "RS480 PCI Bridge";
+static const char pci_device_1002_5a39[] = "RS480 PCI Bridge";
 static const char pci_device_1002_5a3f[] = "RS480 PCI Bridge";
 static const char pci_device_1002_5a41[] = "RS400 [Radeon Xpress 200]";
 static const char pci_device_1002_5a42[] = "RS400 [Radeon Xpress 200M]";
@@ -1756,29 +2173,44 @@
 static const char pci_subsys_1002_5b60_1043_032e[] = "Extreme AX300/TD";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5b60_1462_0400[] = "RX300SE-TD128E (MS-8940 REV:200)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5b60_1462_0402[] = "RX300SE-TD128E (MS-8940)";
 #endif
-static const char pci_device_1002_5b62[] = "RV370 5B62 [Radeon X600 (PCIE)]";
-static const char pci_device_1002_5b63[] = "RV370 [ATI Sapphire X550 Silent]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5b60_196d_1086[] = "X300SE HM";
+#endif
+static const char pci_device_1002_5b62[] = "RV380 [Radeon X600 (PCIE)]";
+static const char pci_device_1002_5b63[] = "RV370 [Sapphire X550 Silent]";
 static const char pci_device_1002_5b64[] = "RV370 5B64 [FireGL V3100 (PCIE)]";
 static const char pci_device_1002_5b65[] = "RV370 5B65 [FireGL D1100 (PCIE)]";
 static const char pci_device_1002_5b70[] = "RV370 [Radeon X300SE]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5b70_1462_0403[] = "RX300SE-TD128E (MS-8940) (secondary display)";
 #endif
-static const char pci_device_1002_5b72[] = "Radeon X600(RV380)";
-static const char pci_device_1002_5b73[] = "RV370 secondary [ATI Sapphire X550 Silent]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5b70_196d_1087[] = "X300SE HM";
+#endif
+static const char pci_device_1002_5b72[] = "RV380 [Radeon X600]";
+static const char pci_device_1002_5b73[] = "RV370 secondary [Sapphire X550 Silent]";
 static const char pci_device_1002_5b74[] = "RV370 5B64 [FireGL V3100 (PCIE)] (Secondary)";
 static const char pci_device_1002_5c61[] = "M9+ 5C61 [Radeon Mobility 9200 (AGP)]";
 static const char pci_device_1002_5c63[] = "M9+ 5C63 [Radeon Mobility 9200 (AGP)]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5c63_1002_5c63[] = "Apple iBook G4 2004";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5c63_144d_c00c[] = "P30 notebook";
+#endif
 static const char pci_device_1002_5d44[] = "RV280 [Radeon 9200 SE] (Secondary)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5d44_1458_4019[] = "Radeon 9200 SE (Secondary)";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_5d44_1458_4032[] = "Radeon 9200 SE 128MB";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5d44_174b_7c12[] = "Sapphire Radeon 9200 SE (Secondary)";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -1800,10 +2232,10 @@
 static const char pci_device_1002_5d4f[] = "R480 [Radeon X800 GTO (PCIE)]";
 static const char pci_device_1002_5d52[] = "R480 [Radeon X850XT (PCIE)] (Primary)";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_5d52_1002_0b12[] = "PowerColor X850XT PCIe Primary";
+static const char pci_subsys_1002_5d52_1002_0b12[] = "PowerColor X850XT PCIe (Primary)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1002_5d52_1002_0b13[] = "PowerColor X850XT PCIe Secondary";
+static const char pci_subsys_1002_5d52_1002_0b13[] = "PowerColor X850XT PCIe (Secondary)";
 #endif
 static const char pci_device_1002_5d57[] = "R423 5F57 [Radeon X800XT (PCIE)]";
 static const char pci_device_1002_5d6d[] = "R480 [Radeon X850XT Platinum (PCIE)] (Secondary)";
@@ -1820,15 +2252,21 @@
 static const char pci_subsys_1002_5e4d_148c_2116[] = "PowerColor Bravo X700";
 #endif
 static const char pci_device_1002_5e4f[] = "RV410 [Radeon X700]";
-static const char pci_device_1002_5e6b[] = "RV410 [Radeon X700 Pro (PCIE)] Secondary";
+static const char pci_device_1002_5e6b[] = "RV410 [Radeon X700 Pro (PCIE)] (Secondary)";
 static const char pci_device_1002_5e6d[] = "RV410 [Radeon X700 (PCIE)] (Secondary)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_5e6d_148c_2117[] = "PowerColor Bravo X700";
 #endif
+static const char pci_device_1002_5f57[] = "R423 [Radeon X800XT (PCIE)]";
 static const char pci_device_1002_700f[] = "PCI Bridge [IGP 320M]";
 static const char pci_device_1002_7010[] = "PCI Bridge [IGP 340M]";
 static const char pci_device_1002_7100[] = "R520 [Radeon X1800]";
+static const char pci_device_1002_7102[] = "M58 [Radeon Mobility X1800]";
+static const char pci_device_1002_7103[] = "M58 [Mobility FireGL V7200]";
+static const char pci_device_1002_7104[] = "R520GL [FireGL V7200] (Primary)";
 static const char pci_device_1002_7105[] = "R520 [FireGL]";
+static const char pci_device_1002_7106[] = "M58 [Mobility FireGL V7100]";
+static const char pci_device_1002_7108[] = "M58 [Radeon Mobility X1800]";
 static const char pci_device_1002_7109[] = "R520 [Radeon X1800]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_7109_1002_0322[] = "All-in-Wonder X1800XL";
@@ -1836,7 +2274,11 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_7109_1002_0d02[] = "Radeon X1800 CrossFire Edition";
 #endif
+static const char pci_device_1002_710a[] = "R520 [Radeon X1800]";
+static const char pci_device_1002_710b[] = "R520 [Radeon X1800]";
+static const char pci_device_1002_710c[] = "R520 [Radeon X1800]";
 static const char pci_device_1002_7120[] = "R520 [Radeon X1800] (Secondary)";
+static const char pci_device_1002_7124[] = "R520GL [FireGL V7200] (Secondary)";
 static const char pci_device_1002_7129[] = "R520 [Radeon X1800] (Secondary)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_7129_1002_0323[] = "All-in-Wonder X1800XL (Secondary)";
@@ -1844,15 +2286,29 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_7129_1002_0d03[] = "Radeon X1800 CrossFire Edition (Secondary)";
 #endif
-static const char pci_device_1002_7142[] = "RV515 [Radeon X1300]";
+static const char pci_device_1002_7140[] = "RV515 [Radeon X1600]";
+static const char pci_device_1002_7142[] = "RV515 PRO [Radeon X1300/X1550 Series]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_7142_1002_0322[] = "All-in-Wonder 2006 PCI-E Edition";
 #endif
+static const char pci_device_1002_7143[] = "RV505 [Radeon X1550 Series]";
+static const char pci_device_1002_7145[] = "Radeon Mobility X1400";
 static const char pci_device_1002_7146[] = "RV515 [Radeon X1300]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_7146_1002_0322[] = "All-in-Wonder 2006 PCI-E Edition";
 #endif
-static const char pci_device_1002_7162[] = "RV515 [Radeon X1300] (Secondary)";
+static const char pci_device_1002_7147[] = "RV505 [Radeon X1550 64-bit]";
+static const char pci_device_1002_7149[] = "M52 [Mobility Radeon X1300]";
+static const char pci_device_1002_714a[] = "M52 [Mobility Radeon X1300]";
+static const char pci_device_1002_714b[] = "M52 [Mobility Radeon X1300]";
+static const char pci_device_1002_714c[] = "M52 [Mobility Radeon X1300]";
+static const char pci_device_1002_714d[] = "RV515 [Radeon X1300]";
+static const char pci_device_1002_714e[] = "RV515 [Radeon X1300]";
+static const char pci_device_1002_7152[] = "RV515GL [FireGL V3300] (Primary)";
+static const char pci_device_1002_7153[] = "RV515GL [FireGL V3350]";
+static const char pci_device_1002_715e[] = "RV515 [Radeon X1300]";
+static const char pci_device_1002_715f[] = "RV505 CE [Radeon X1550 64-bit]";
+static const char pci_device_1002_7162[] = "RV515 PRO [Radeon X1300/X1550 Series] (Secondary)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_7162_1002_0323[] = "All-in-Wonder 2006 PCI-E Edition (Secondary)";
 #endif
@@ -1860,14 +2316,84 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1002_7166_1002_0323[] = "All-in-Wonder 2006 PCI-E Edition (Secondary)";
 #endif
+static const char pci_device_1002_7172[] = "RV515GL [FireGL V3300] (Secondary)";
+static const char pci_device_1002_7173[] = "RV515GL [FireGL V3350] (Secondary)";
+static const char pci_device_1002_7180[] = "RV516 [Radeon X1300/X1550 Series]";
+static const char pci_device_1002_7181[] = "RV516 XT Radeon X1600 Series (Primary)";
+static const char pci_device_1002_7183[] = "RV516 [Radeon X1300/X1550 Series]";
+static const char pci_device_1002_7187[] = "RV516 [Radeon X1300/X1550 Series]";
+static const char pci_device_1002_7188[] = "M64-S [Mobility Radeon X2300]";
+static const char pci_device_1002_718a[] = "Mobility Radeon X2300";
+static const char pci_device_1002_718c[] = "M62CSP64 [Mobility Radeon X1350]";
+static const char pci_device_1002_718d[] = "M64CSP128 [Mobility Radeon X1450]";
+static const char pci_device_1002_7193[] = "RV516 [Radeon X1550 Series]";
+static const char pci_device_1002_719b[] = "FireMV 2250";
+static const char pci_device_1002_719f[] = "RV516LE [Radeon X1550 64-bit]";
+static const char pci_device_1002_71a0[] = "RV516 [Radeon X1300/X1550 Series] (Secondary)";
+static const char pci_device_1002_71a1[] = "RV516 XT Radeon X1600 Series (Secondary)";
+static const char pci_device_1002_71a3[] = "RV516 [Radeon X1300 Pro] (Secondary)";
+static const char pci_device_1002_71a7[] = "RV516 [Radeon X1300/X1550 Series] (Secondary)";
+static const char pci_device_1002_71bb[] = "FireMV 2250 (Secondary)";
 static const char pci_device_1002_71c0[] = "RV530 [Radeon X1600]";
 static const char pci_device_1002_71c2[] = "RV530 [Radeon X1600]";
+static const char pci_device_1002_71c4[] = "M56GL [Mobility FireGL V5200]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_71c4_17aa_2007[] = "ThinkPad T60p";
+#endif
+static const char pci_device_1002_71c5[] = "M56P [Radeon Mobility X1600]";
+static const char pci_device_1002_71c6[] = "RV530LE [Radeon X1600/X1650 PRO]";
+static const char pci_device_1002_71c7[] = "RV535 [Radeon X1650 Series]";
+static const char pci_device_1002_71ce[] = "RV530LE [Radeon X1600]";
+static const char pci_device_1002_71d4[] = "M56GL [Mobility FireGL V5250]";
+static const char pci_device_1002_71d5[] = "M66-P [Mobility Radeon X1700]";
+static const char pci_device_1002_71d6[] = "M66-XT [Mobility Radeon X1700]";
+static const char pci_device_1002_71de[] = "RV530LE [Radeon X1600]";
 static const char pci_device_1002_71e0[] = "RV530 [Radeon X1600] (Secondary)";
 static const char pci_device_1002_71e2[] = "RV530 [Radeon X1600] (Secondary)";
+static const char pci_device_1002_71e6[] = "RV530LE [Radeon X1650 PRO] (Secondary)";
+static const char pci_device_1002_71e7[] = "RV535 [Radeon X1650 Series]";
+static const char pci_device_1002_7210[] = "M71 [Mobility Radeon X2100]";
+static const char pci_device_1002_7211[] = "M71 [Mobility Radeon X2100] (Secondary)";
+static const char pci_device_1002_7240[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_7241[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_7242[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_7243[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_7244[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_7245[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_7246[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_7247[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_7248[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_7249[] = "R580 [Radeon X1900 XT] (Primary)";
+static const char pci_device_1002_724a[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_724b[] = "R580 [Radeon X1900]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_724b_1002_0b12[] = "Radeon X1900 (Primary)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1002_724b_1002_0b13[] = "Radeon X1900 (Secondary)";
+#endif
+static const char pci_device_1002_724c[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_724d[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_724e[] = "R580 [AMD Stream Processor]";
+static const char pci_device_1002_7269[] = "R580 [Radeon X1900 XT] (Secondary)";
+static const char pci_device_1002_726b[] = "R580 [Radeon X1900]";
+static const char pci_device_1002_726e[] = "R580 [AMD Stream Processor] (Secondary)";
+static const char pci_device_1002_7280[] = "Radeon X1950 Pro (Primary) (PCIE)";
+static const char pci_device_1002_7288[] = "Radeon X1950 GT";
+static const char pci_device_1002_7291[] = "Radeon X1650 XT (Primary) (PCIE)";
+static const char pci_device_1002_7293[] = "Radeon X1650 Series";
+static const char pci_device_1002_72a0[] = "Radeon X1950 Pro (Secondary) (PCIE)";
+static const char pci_device_1002_72a8[] = "Radeon X1950 GT (Secondary)";
+static const char pci_device_1002_72b1[] = "Radeon X1650 XT (Secondary) (PCIE)";
+static const char pci_device_1002_72b3[] = "Radeon X1650 Series (Secondary)";
 static const char pci_device_1002_7833[] = "Radeon 9100 IGP Host Bridge";
 static const char pci_device_1002_7834[] = "Radeon 9100 PRO IGP";
 static const char pci_device_1002_7835[] = "Radeon Mobility 9200 IGP";
 static const char pci_device_1002_7838[] = "Radeon 9100 IGP PCI/AGP Bridge";
+static const char pci_device_1002_7919[] = "Radeon X1200 Series Audio Controller";
+static const char pci_device_1002_791e[] = "Radeon X1200 Series";
+static const char pci_device_1002_791f[] = "Radeon X1200 Series";
+static const char pci_device_1002_793f[] = "Radeon X1200 Series (Secondary)";
 static const char pci_device_1002_7c37[] = "RV350 AQ [Radeon 9600 SE]";
 static const char pci_device_1002_cab0[] = "AGP Bridge [IGP 320M]";
 static const char pci_device_1002_cab2[] = "RS200/RS200M AGP Bridge [IGP 340M]";
@@ -2061,7 +2587,13 @@
 #endif
 static const char pci_device_1011_000a[] = "21230 Video Codec";
 static const char pci_device_1011_000d[] = "PBXGB [TGA2]";
-static const char pci_device_1011_000f[] = "DEFPA";
+static const char pci_device_1011_000f[] = "PCI-to-PDQ Interface Chip [PFI]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1011_000f_1011_def1[] = "FDDI controller (DEFPA)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1011_000f_103c_def1[] = "FDDI controller (3X-DEFPA)";
+#endif
 static const char pci_device_1011_0014[] = "DECchip 21041 [Tulip Pass 3]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1011_0014_1186_0100[] = "DE-530+";
@@ -2088,6 +2620,9 @@
 static const char pci_subsys_1011_0019_1033_800d[] = "PC-9821NR-B06 100BASE-TX Interface Card";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1011_0019_103c_125a[] = "10/100Base-TX (PCI) [A5506B]";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1011_0019_108d_0016[] = "Rapidfire 2327 10/100 Ethernet";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -2169,6 +2704,15 @@
 static const char pci_subsys_1011_0019_13d1_ab01[] = "EtherFast 10/100 Cardbus (PCMPC200)";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1011_0019_1498_000a[] = "TPMC880-10 10/100Base-T and 10Base2 PMC Ethernet Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1011_0019_1498_000b[] = "TPMC880-11 Single 10/100Base-T PMC Ethernet Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1011_0019_1498_000c[] = "TPMC880-12 Single 10Base2 PMC Ethernet Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1011_0019_14cb_0100[] = "LNDL-100N 100Base-TX Ethernet PC Card";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -2197,7 +2741,7 @@
 static const char pci_subsys_1011_0046_0e11_4058[] = "Integrated Smart Array";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1011_0046_103c_10c2[] = "Hewlett-Packard NetRAID-4M";
+static const char pci_subsys_1011_0046_103c_10c2[] = "NetRAID-4M";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1011_0046_12d9_000a[] = "IP Telephony card";
@@ -2270,11 +2814,17 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1013_6001_1014_1010[] = "CS4610 SoundFusion Audio Accelerator";
 #endif
-static const char pci_device_1013_6003[] = "CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator]";
+static const char pci_device_1013_6003[] = "CS 4614/22/24/30 [CrystalClear SoundFusion Audio Accelerator]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1013_6003_1013_4280[] = "Crystal SoundFusion PCI Audio Accelerator";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1013_6003_1014_0153[] = "ThinkPad A20m";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1013_6003_153b_112e[] = "DMX XFire 1024";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1013_6003_153b_1136[] = "SiXPack 5.1+";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -2283,6 +2833,9 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1013_6003_1681_a011[] = "Fortissimo III 7.1";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1013_6003_5053_3357[] = "Santa Cruz";
+#endif
 static const char pci_device_1013_6004[] = "CS 4614/22/24 [CrystalClear SoundFusion Audio Accelerator]";
 static const char pci_device_1013_6005[] = "Crystal CS4281 PCI Audio";
 #ifdef INIT_SUBSYS_INFO
@@ -2377,6 +2930,7 @@
 static const char pci_device_1014_0053[] = "25 MBit ATM Controller";
 static const char pci_device_1014_0054[] = "GXT500P/GXT550P Graphics Adapter";
 static const char pci_device_1014_0057[] = "MPEG PCI Bridge";
+static const char pci_device_1014_0058[] = "SSA Adapter [Advanced SerialRAID/X]";
 static const char pci_device_1014_005c[] = "i82557B 10/100";
 static const char pci_device_1014_005e[] = "GXT800P Graphics Adapter";
 static const char pci_device_1014_007c[] = "ATM Controller (14107c00)";
@@ -2402,7 +2956,7 @@
 static const char pci_device_1014_009f[] = "PCI 4758 Cryptographic Accelerator";
 static const char pci_device_1014_00a5[] = "ATM Controller (1410a500)";
 static const char pci_device_1014_00a6[] = "ATM 155MBPS MM Controller (1410a600)";
-static const char pci_device_1014_00b7[] = "256-bit Graphics Rasterizer [Fire GL1]";
+static const char pci_device_1014_00b7[] = "256-bit Graphics Rasterizer [FireGL1]";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1014_00b7_1092_00b8[] = "FireGL1 AGP 32Mb";
@@ -2501,6 +3055,7 @@
 static const char pci_subsys_1014_02bd_1014_02c2[] = "PCI-X DDR 3Gb SAS RAID Adapter (572B/571D)";
 #endif
 static const char pci_device_1014_0302[] = "Winnipeg PCI-X Host Bridge";
+static const char pci_device_1014_0308[] = "CalIOC2 PCI-E Root Port";
 static const char pci_device_1014_0314[] = "ZISC 036 Neural accelerator card";
 static const char pci_device_1014_3022[] = "QLA3022 Network Adapter";
 static const char pci_device_1014_4022[] = "QLA3022 Network Adapter";
@@ -2525,6 +3080,16 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_101a[] = "AT&T GIS (NCR)";
 static const char pci_device_101a_0005[] = "100VG ethernet";
+static const char pci_device_101a_1dc1[] = "Bynet";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_101a_1dc1_101a_0019[] = "BIC2M";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_101a_1dc1_101a_001f[] = "BIC4M";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_101a_1dc1_101a_0ece[] = "BYA4M";
+#endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_101b[] = "Vitesse Semiconductor";
@@ -2669,6 +3234,9 @@
 static const char pci_subsys_1022_2000_1259_2703[] = "AT-2701FX";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1022_2000_1259_2704[] = "AT-2701FTX 10/100 Mb Fiber/Copper Fast Ethernet";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1022_2000_4c53_1000[] = "CC7/CR7/CP7/VC7/VP7/VR7 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -2696,6 +3264,7 @@
 static const char pci_device_1022_2003[] = "Am 1771 MBW [Alchemy]";
 static const char pci_device_1022_2020[] = "53c974 [PCscsi]";
 static const char pci_device_1022_2040[] = "79c974";
+static const char pci_device_1022_2080[] = "Conrad Kostecki";
 static const char pci_device_1022_2081[] = "Geode LX Video";
 static const char pci_device_1022_2082[] = "Geode LX AES Security Block";
 static const char pci_device_1022_208f[] = "CS5536 GeodeLink PCI South Bridge";
@@ -2861,6 +3430,7 @@
 static const char pci_vendor_1024[] = "Zenith Data Systems";
 #endif
 static const char pci_vendor_1025[] = "Acer Incorporated [ALI]";
+static const char pci_device_1025_0090[] = "BCM440x 100Base-TX Fast Ethernet";
 static const char pci_device_1025_1435[] = "M1435";
 static const char pci_device_1025_1445[] = "M1445";
 static const char pci_device_1025_1449[] = "M1449";
@@ -2937,15 +3507,34 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1028_0002_1028_0002[] = "PowerEdge 4400";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0002_1028_00d1[] = "PERC 3/DiV [Viper]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0002_1028_00d9[] = "PERC 3/DiL [Lexus]";
+#endif
 static const char pci_device_1028_0003[] = "PowerEdge Expandable RAID Controller 3/Si";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1028_0003_1028_0003[] = "PowerEdge 2450";
 #endif
+static const char pci_device_1028_0004[] = "PowerEdge Expandable RAID Controller 3/Di [Iguana]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0004_1028_0004[] = "PERC 3/DiF [Iguana]";
+#endif
 static const char pci_device_1028_0006[] = "PowerEdge Expandable RAID Controller 3/Di";
 static const char pci_device_1028_0007[] = "Remote Access Card III";
 static const char pci_device_1028_0008[] = "Remote Access Card III";
 static const char pci_device_1028_0009[] = "Remote Access Card III: BMC/SMIC device not present";
 static const char pci_device_1028_000a[] = "PowerEdge Expandable RAID Controller 3/Di";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_000a_1028_0106[] = "PERC 3/DiJ [Jaguar]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_000a_1028_011b[] = "PERC 3/DiD [Dagger]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_000a_1028_0121[] = "PERC 3/DiB [Boxster]";
+#endif
 static const char pci_device_1028_000c[] = "Embedded Remote Access or ERA/O";
 static const char pci_device_1028_000d[] = "Embedded Remote Access: BMC/SMIC device";
 static const char pci_device_1028_000e[] = "PowerEdge Expandable RAID controller 4/Di";
@@ -2970,7 +3559,14 @@
 static const char pci_subsys_1028_0013_1028_0170[] = "PowerEdge Expandable RAID Controller 4e/Di";
 #endif
 static const char pci_device_1028_0014[] = "Remote Access Card 4 Daughter Card SMIC interface";
-static const char pci_device_1028_0015[] = "PowerEdge Expandable RAID controller 5";
+static const char pci_device_1028_0015[] = "PowerEdge Expandable RAID controller 5i";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0015_1028_1f01[] = "PERC 5/E Adapter RAID Controller";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1028_0015_1028_1f02[] = "PERC 5/i Adapter RAID Controller";
+#endif
+static const char pci_device_1028_1f03[] = "PERC 5/i";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1029[] = "Siemens Nixdorf IS";
 #endif
@@ -3164,7 +3760,8 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_102b_0521_110a_0032[] = "MGA-G200 AGP";
 #endif
-static const char pci_device_102b_0525[] = "G400/G450";
+static const char pci_device_102b_0522[] = "MGA G200e [Pilot] ServerEngines (SEP1)";
+static const char pci_device_102b_0525[] = "MGA G400/G450";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_102b_0525_0e11_b16f[] = "MGA-G400 AGP";
 #endif
@@ -3397,6 +3994,9 @@
 static const char pci_subsys_102b_2538_102b_3007[] = "QID Low-profile PCIe";
 #endif
 static const char pci_device_102b_4536[] = "VIA Framegrabber";
+static const char pci_device_102b_4cdc[] = "Morphis Vision System Jpeg2000";
+static const char pci_device_102b_4fc5[] = "Morphis Vision System";
+static const char pci_device_102b_5e10[] = "Morphis Vision System Aux/IO";
 static const char pci_device_102b_6573[] = "Shark 10/100 Multiport SwitchNIC";
 static const char pci_vendor_102c[] = "Chips and Technologies";
 static const char pci_device_102c_00b8[] = "F64310";
@@ -3467,6 +4067,7 @@
 #endif
 static const char pci_device_102f_0030[] = "TC35815CF PCI 10/100 Mbit Ethernet Controller";
 static const char pci_device_102f_0031[] = "TC35815CF PCI 10/100 Mbit Ethernet Controller with WOL";
+static const char pci_device_102f_0032[] = "TC35815CF PCI 10/100 Mbit Ethernet Controller on TX4939";
 static const char pci_device_102f_0105[] = "TC86C001 [goku-s] IDE";
 static const char pci_device_102f_0106[] = "TC86C001 [goku-s] USB 1.1 Host";
 static const char pci_device_102f_0107[] = "TC86C001 [goku-s] USB Device Controller";
@@ -3590,6 +4191,8 @@
 static const char pci_device_1033_00f2[] = "uPD72874 IEEE1394 OHCI 1.1 3-port PHY-Link Ctrlr";
 static const char pci_device_1033_00f3[] = "uPD6113x Multimedia Decoder/Processor [EMMA2]";
 static const char pci_device_1033_010c[] = "VR7701";
+static const char pci_device_1033_0125[] = "uPD720400 PCI Express - PCI/PCI-X Bridge";
+static const char pci_device_1033_013a[] = "Dual Tuner/MPEG Encoder";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1034[] = "Framatome Connectors USA Inc.";
 #endif
@@ -3620,6 +4223,7 @@
 static const char pci_device_1039_0180[] = "RAID bus controller 180 SATA/PATA  [SiS]";
 static const char pci_device_1039_0181[] = "SATA";
 static const char pci_device_1039_0182[] = "182 SATA/RAID Controller";
+static const char pci_device_1039_0186[] = "AHCI Controller (0106)";
 static const char pci_device_1039_0190[] = "190 Gigabit Ethernet Adapter";
 static const char pci_device_1039_0191[] = "191 Gigabit Ethernet Adapter";
 static const char pci_device_1039_0200[] = "5597/5598/6326 VGA";
@@ -3655,6 +4259,7 @@
 static const char pci_device_1039_0655[] = "655 Host";
 static const char pci_device_1039_0660[] = "660 Host";
 static const char pci_device_1039_0661[] = "661FX/M661FX/M661MX Host";
+static const char pci_device_1039_0662[] = "662 Host";
 static const char pci_device_1039_0730[] = "730 Host";
 static const char pci_device_1039_0733[] = "733 Host";
 static const char pci_device_1039_0735[] = "735 Host";
@@ -3675,11 +4280,21 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_0900_1043_8035[] = "CUSI-FX motherboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_0900_1462_0900[] = "MS-6701 motherboard";
+#endif
 static const char pci_device_1039_0961[] = "SiS961 [MuTIOL Media IO]";
 static const char pci_device_1039_0962[] = "SiS962 [MuTIOL Media IO]";
 static const char pci_device_1039_0963[] = "SiS963 [MuTIOL Media IO]";
 static const char pci_device_1039_0964[] = "SiS964 [MuTIOL Media IO]";
 static const char pci_device_1039_0965[] = "SiS965 [MuTIOL Media IO]";
+static const char pci_device_1039_0966[] = "SiS966 [MuTIOL Media IO]";
+static const char pci_device_1039_0968[] = "SiS968 [MuTIOL Media IO]";
+static const char pci_device_1039_1180[] = "SATA Controller / IDE mode";
+static const char pci_device_1039_1182[] = "SATA Controller / RAID mode";
+static const char pci_device_1039_1183[] = "SATA Controller / IDE mode";
+static const char pci_device_1039_1184[] = "AHCI Controller / RAID mode";
+static const char pci_device_1039_1185[] = "AHCI IDE Controller (0106)";
 static const char pci_device_1039_3602[] = "83C602";
 static const char pci_device_1039_5107[] = "5107";
 static const char pci_device_1039_5300[] = "SiS540 PCI Display Adapter";
@@ -3696,6 +4311,9 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_5513_1043_8035[] = "CUSI-FX motherboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_5513_1462_7010[] = "MS-6701 motherboard";
+#endif
 static const char pci_device_1039_5517[] = "5517";
 static const char pci_device_1039_5571[] = "5571";
 static const char pci_device_1039_5581[] = "5581 Pentium Chipset";
@@ -3738,10 +4356,15 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_6326_1569_6326[] = "SiS6326 GUI Accelerator";
 #endif
-static const char pci_device_1039_6330[] = "661/741/760/761 PCI/AGP VGA Display Adapter";
+static const char pci_device_1039_6330[] = "661/741/760 PCI/AGP or 662/761Gx PCIE VGA Display Adapter";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_6330_1039_6330[] = "[M]661xX/[M]741[GX]/[M]760 PCI/AGP VGA Adapter";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_6330_1043_8113[] = "SiS Real 256E (ASUS P5S800-VM motherboard)";
+#endif
+static const char pci_device_1039_6350[] = "770/670 PCIE VGA Display Adapter";
+static const char pci_device_1039_6351[] = "771/671 PCIE VGA Display Adapter";
 static const char pci_device_1039_7001[] = "USB 1.0 Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_7001_1019_0a14[] = "K7S5A motherboard";
@@ -3752,13 +4375,25 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_7001_1462_5470[] = "K7SOM+ 5.2C Motherboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7001_1462_7010[] = "MS-6701 motherboard";
+#endif
 static const char pci_device_1039_7002[] = "USB 2.0 Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7002_1462_7010[] = "MS-6701 motherboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_7002_1509_7002[] = "Onboard USB Controller";
 #endif
 static const char pci_device_1039_7007[] = "FireWire Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7007_1462_701d[] = "MS-6701";
+#endif
 static const char pci_device_1039_7012[] = "AC'97 Sound Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1039_7012_1462_7010[] = "MS-6701 motherboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1039_7012_15bd_1001[] = "DFI 661FX motherboard";
 #endif
 static const char pci_device_1039_7013[] = "AC'97 Modem Controller";
@@ -3834,6 +4469,7 @@
 static const char pci_subsys_1039_7018_a0a0_0022[] = "SiS PCI Audio Accelerator";
 #endif
 static const char pci_device_1039_7019[] = "SiS7019 Audio Accelerator";
+static const char pci_device_1039_7502[] = "Azalia Audio Controller";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_103a[] = "Seiko Epson Corporation";
 #endif
@@ -3841,10 +4477,9 @@
 static const char pci_vendor_103b[] = "Tatung Co. of America";
 #endif
 static const char pci_vendor_103c[] = "Hewlett-Packard Company";
+static const char pci_device_103c_002a[] = "NX9000 Notebook";
 static const char pci_device_103c_1005[] = "A4977A Visualize EG";
-static const char pci_device_103c_1006[] = "Visualize FX6";
-static const char pci_device_103c_1008[] = "Visualize FX4";
-static const char pci_device_103c_100a[] = "Visualize FX2";
+static const char pci_device_103c_1008[] = "Visualize FX";
 static const char pci_device_103c_1028[] = "Tach TL Fibre Channel Host Adapter";
 static const char pci_device_103c_1029[] = "Tach XL2 Fibre Channel Host Adapter";
 #ifdef INIT_SUBSYS_INFO
@@ -3919,17 +4554,35 @@
 static const char pci_device_103c_121c[] = "NetServer PCI COM Port Decoder";
 static const char pci_device_103c_1229[] = "zx1 System Bus Adapter";
 static const char pci_device_103c_122a[] = "zx1 I/O Controller";
-static const char pci_device_103c_122e[] = "zx1 Local Bus Adapter";
+static const char pci_device_103c_122e[] = "PCI-X Local Bus Adapter";
+static const char pci_device_103c_127b[] = "sx1000 System Bus Adapter";
 static const char pci_device_103c_127c[] = "sx1000 I/O Controller";
 static const char pci_device_103c_1290[] = "Auxiliary Diva Serial Port";
 static const char pci_device_103c_1291[] = "Auxiliary Diva Serial Port";
 static const char pci_device_103c_12b4[] = "zx1 QuickSilver AGP8x Local Bus Adapter";
+static const char pci_device_103c_12eb[] = "sx2000 System Bus Adapter";
+static const char pci_device_103c_12ec[] = "sx2000 I/O Controller";
+static const char pci_device_103c_12ee[] = "PCI-X 2.0 Local Bus Adapter";
+static const char pci_device_103c_12f8[] = "Broadcom BCM4306 802.11b/g Wireless LAN";
 static const char pci_device_103c_12fa[] = "BCM4306 802.11b/g Wireless LAN Controller";
+static const char pci_device_103c_1302[] = "RMP-3 Shared Memory Driver";
+static const char pci_device_103c_1303[] = "RMP-3 (Remote Management Processor)";
 static const char pci_device_103c_2910[] = "E2910A PCIBus Exerciser";
 static const char pci_device_103c_2925[] = "E2925A 32 Bit, 33 MHzPCI Exerciser & Analyzer";
 static const char pci_device_103c_3080[] = "Pavilion ze2028ea";
-static const char pci_device_103c_3220[] = "Hewlett-Packard Smart Array P600";
-static const char pci_device_103c_3230[] = "Hewlett-Packard Smart Array Controller";
+static const char pci_device_103c_3085[] = "Realtek RTL8139/8139C/8139C+";
+static const char pci_device_103c_30b5[] = "Compaq Presario V3000Z";
+static const char pci_device_103c_3220[] = "Smart Array P600";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_103c_3220_103c_3225[] = "3 Gb/s SAS RAID";
+#endif
+static const char pci_device_103c_3230[] = "Smart Array Controller";
+static const char pci_device_103c_3238[] = "Smart Array E200i (SAS Controller)";
+static const char pci_device_103c_4030[] = "zx2 System Bus Adapter";
+static const char pci_device_103c_4031[] = "zx2 I/O Controller";
+static const char pci_device_103c_4037[] = "PCIe Local Bus Adapter";
+static const char pci_device_103c_403b[] = "PCIe Root Port";
+static const char pci_device_103c_60e8[] = "NetRAID-2M : ZX1/M (OEM AMI MegaRAID 493)";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_103e[] = "Solliday Engineering";
 #endif
@@ -3962,16 +4615,23 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1043_0675_10cf_105e[] = "ISDN Adapter (PCI Bus, DV, W)";
 #endif
+static const char pci_device_1043_0c11[] = "A7N8X Motherboard nForce2 IDE/USB/SMBus";
 static const char pci_device_1043_4015[] = "v7100 SDRAM [GeForce2 MX]";
 static const char pci_device_1043_4021[] = "v7100 Combo Deluxe [GeForce2 MX + TV tuner]";
 static const char pci_device_1043_4057[] = "v8200 GeForce 3";
 static const char pci_device_1043_8043[] = "v8240 PAL 128M [P4T] Motherboard";
+static const char pci_device_1043_8047[] = "v8420 Deluxe [GeForce4 Ti4200]";
 static const char pci_device_1043_807b[] = "v9280/TD [Geforce4 TI4200 8X With TV-Out and DVI]";
+static const char pci_device_1043_8095[] = "A7N8X Motherboard nForce2 AC97 Audio";
+static const char pci_device_1043_80ac[] = "A7N8X Motherboard nForce2 AGP/Memory";
 static const char pci_device_1043_80bb[] = "v9180 Magic/T [GeForce4 MX440 AGP 8x 64MB TV-out]";
 static const char pci_device_1043_80c5[] = "nForce3 chipset motherboard [SK8N]";
 static const char pci_device_1043_80df[] = "v9520 Magic/T";
+static const char pci_device_1043_815a[] = "A8N-SLI Motherboard nForce4 SATA";
+static const char pci_device_1043_8168[] = "Realtek PCI-E Gigabit Ethernet Controller (RTL8111B)";
 static const char pci_device_1043_8187[] = "802.11a/b/g Wireless LAN Card";
 static const char pci_device_1043_8188[] = "Tiger Hybrid TV Capture Device";
+static const char pci_device_1043_81f4[] = "EN7300TC512/TD/128M/A(C262G) [Graphics Card EN7300TC512]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1044[] = "Adaptec (formerly DPT)";
@@ -4147,6 +4807,9 @@
 static const char pci_device_104a_021a[] = "STPC Consumer S Southbridge";
 static const char pci_device_104a_021b[] = "STPC Consumer IIA Southbridge";
 static const char pci_device_104a_0500[] = "ST70137 [Unicorn] ADSL DMT Transceiver";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104a_0500_104a_0500[] = "BeWAN ADSL PCI st";
+#endif
 static const char pci_device_104a_0564[] = "STPC Client Northbridge";
 static const char pci_device_104a_0981[] = "21x4x DEC-Tulip compatible 10/100 Ethernet";
 static const char pci_device_104a_1746[] = "STG 1764X";
@@ -4267,6 +4930,9 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_8020_11bd_000f[] = "Studio DV500-1394";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8020_11bd_001c[] = "Excalibur 4.1";
+#endif
 static const char pci_device_104c_8021[] = "TSB43AA22 IEEE-1394 Controller (PHY/Link Integrated)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_8021_104d_80df[] = "Vaio PCG-FX403";
@@ -4277,11 +4943,14 @@
 static const char pci_device_104c_8022[] = "TSB43AB22 IEEE-1394a-2000 Controller (PHY/Link)";
 static const char pci_device_104c_8023[] = "TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link)";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_8023_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_104c_8023_103c_088c[] = "NC8000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_8023_1043_808b[] = "K8N4-E Mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8023_1043_815b[] = "P5W DH Deluxe Motherboard";
+#endif
 static const char pci_device_104c_8024[] = "TSB43AB23 IEEE-1394a-2000 Controller (PHY/Link)";
 static const char pci_device_104c_8025[] = "TSB82AA2 IEEE-1394b Link Layer Controller";
 #ifdef INIT_SUBSYS_INFO
@@ -4289,7 +4958,10 @@
 #endif
 static const char pci_device_104c_8026[] = "TSB43AB21 IEEE-1394a-2000 Controller (PHY/Link)";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_8026_103c_006a[] = "nx9500";
+static const char pci_subsys_104c_8026_1025_003c[] = "Aspire 2001WLCi (Compaq CL50 motherboard)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8026_103c_006a[] = "NX9500";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_8026_1043_808d[] = "A7V333 mainboard.";
@@ -4313,43 +4985,84 @@
 static const char pci_subsys_104c_802b_1028_0139[] = "Latitude D400";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_802b_1028_014e[] = "PCI7410,7510,7610 OHCI-Lynx Controller (Dell Latitude D800)";
+static const char pci_subsys_104c_802b_1028_014e[] = "PCI7410,7510,7610 OHCI-Lynx Controller (Latitude D800)";
 #endif
 static const char pci_device_104c_802e[] = "PCI7x20 1394a-2000 OHCI Two-Port PHY/Link-Layer Controller";
 static const char pci_device_104c_8031[] = "PCIxx21/x515 Cardbus Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_8031_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_104c_8031_1025_0080[] = "Aspire 5024WLMi";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8031_103c_099c[] = "NX6110/NC6120";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_8031_103c_308b[] = "nx6125";
+static const char pci_subsys_104c_8031_103c_308b[] = "MX6125";
 #endif
 static const char pci_device_104c_8032[] = "OHCI Compliant IEEE 1394 Host Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_8032_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_104c_8032_1025_0080[] = "Aspire 5024WLMi";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_8032_103c_308b[] = "nx6125";
+static const char pci_subsys_104c_8032_103c_099c[] = "NX6110/NC6120";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8032_103c_308b[] = "MX6125";
 #endif
 static const char pci_device_104c_8033[] = "PCIxx21 Integrated FlashMedia Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_8033_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_104c_8033_1025_0080[] = "Aspire 5024WLMi";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8033_103c_099c[] = "NX6110/NC6120";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_8033_103c_308b[] = "nx6125";
+static const char pci_subsys_104c_8033_103c_308b[] = "MX6125";
 #endif
-static const char pci_device_104c_8034[] = "PCI6411, PCI6421, PCI6611, PCI6621, PCI7411, PCI7421, PCI7611, PCI7621 Secure Digital (SD) Controller";
+static const char pci_device_104c_8034[] = "PCI6411/6421/6611/6621/7411/7421/7611/7621 Secure Digital Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_8034_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_104c_8034_1025_0080[] = "Aspire 5024WLMi";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_8034_103c_308b[] = "nx6125";
+static const char pci_subsys_104c_8034_103c_099c[] = "NX6110/NC6120";
 #endif
-static const char pci_device_104c_8035[] = "PCI6411, PCI6421, PCI6611, PCI6621, PCI7411, PCI7421, PCI7611, PCI7621 Smart Card Controller (SMC)";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_8035_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_104c_8034_103c_308b[] = "MX6125";
+#endif
+static const char pci_device_104c_8035[] = "PCI6411/6421/6611/6621/7411/7421/7611/7621 Smart Card Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8035_103c_099c[] = "NX6110/NC6120";
 #endif
 static const char pci_device_104c_8036[] = "PCI6515 Cardbus Controller";
 static const char pci_device_104c_8038[] = "PCI6515 SmartCard Controller";
+static const char pci_device_104c_8039[] = "PCIxx12 Cardbus Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8039_103c_309f[] = "nx9420";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_8039_103c_30a1[] = "NC2400";
+#endif
+static const char pci_device_104c_803a[] = "PCIxx12 OHCI Compliant IEEE 1394 Host Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_803a_103c_309f[] = "nx9420";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_803a_103c_30a1[] = "NC2400";
+#endif
+static const char pci_device_104c_803b[] = "5-in-1 Multimedia Card Reader (SD/MMC/MS/MS PRO/xD)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_803b_103c_309f[] = "nx9420";
+#endif
+static const char pci_device_104c_803c[] = "PCIxx12 SDA Standard Compliant SD Host Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_803c_103c_309f[] = "nx9420";
+#endif
+static const char pci_device_104c_803d[] = "PCIxx12 GemCore based SmartCard controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_803d_103c_309f[] = "nx9420";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_803d_103c_30a1[] = "NC2400";
+#endif
 static const char pci_device_104c_8201[] = "PCI1620 Firmware Loading Function";
 static const char pci_device_104c_8204[] = "PCI7410,7510,7610 PCI Firmware Loading Function";
 #ifdef INIT_SUBSYS_INFO
@@ -4358,6 +5071,8 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_8204_1028_014e[] = "Latitude D800";
 #endif
+static const char pci_device_104c_8231[] = "XIO2000(A)/XIO2200(A) PCI Express-to-PCI Bridge";
+static const char pci_device_104c_8235[] = "XIO2200(A) IEEE-1394a-2000 Controller (PHY/Link)";
 static const char pci_device_104c_8400[] = "ACX 100 22Mbps Wireless Interface";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_8400_1186_3b00[] = "DWL-650+ PC Card cardbus 22Mbs Wireless Adapter [AirPlus]";
@@ -4373,7 +5088,7 @@
 static const char pci_device_104c_9065[] = "TMS320DM642";
 static const char pci_device_104c_9066[] = "ACX 111 54Mbps Wireless Interface";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_9066_104c_9066[] = "DWL-G520+ Wireless PCI Adapter";
+static const char pci_subsys_104c_9066_104c_9066[] = "Trendnet TEW-421PC Wireless PCI Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_9066_1186_3b04[] = "DWL-G520+ Wireless PCI Adapter";
@@ -4384,6 +5099,9 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_9066_13d1_aba0[] = "SWLMP-54108 108Mbps Wireless mini PCI card 802.11g+";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_9066_1737_0033[] = "WPC54G Ver.2 802.11G PC Card";
+#endif
 static const char pci_device_104c_a001[] = "TDC1570";
 static const char pci_device_104c_a100[] = "TDC1561";
 static const char pci_device_104c_a102[] = "TNETA1575 HyperSAR Plus w/PCI Host i/f & UTOPIA i/f";
@@ -4437,10 +5155,13 @@
 static const char pci_device_104c_ac41[] = "PCI4410 PC card Cardbus Controller";
 static const char pci_device_104c_ac42[] = "PCI4451 PC card Cardbus Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_104c_ac42_1028_00e6[] = "PCI4451 PC card CardBus Controller (Dell Inspiron 8100)";
+static const char pci_subsys_104c_ac42_1028_00e6[] = "PCI4451 PC card CardBus Controller (Inspiron 8100)";
 #endif
 static const char pci_device_104c_ac44[] = "PCI4510 PC card Cardbus Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac44_1028_0149[] = "Inspiron 5100";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_ac44_1028_0163[] = "Latitude D505";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -4455,6 +5176,9 @@
 static const char pci_subsys_104c_ac47_1028_0139[] = "Latitude D400";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac47_1028_013f[] = "Precision M60";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_ac47_1028_014e[] = "Latitude D800";
 #endif
 static const char pci_device_104c_ac4a[] = "PCI7510,7610 PC card Cardbus Controller";
@@ -4465,11 +5189,14 @@
 static const char pci_subsys_104c_ac4a_1028_014e[] = "Latitude D800";
 #endif
 static const char pci_device_104c_ac50[] = "PCI1410 PC card Cardbus Controller";
-static const char pci_device_104c_ac51[] = "PCI1420";
+static const char pci_device_104c_ac51[] = "PCI1420 PC card Cardbus Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_ac51_0e11_004e[] = "Evo N600c";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac51_1014_0148[] = "ThinkPad A20m";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_ac51_1014_023b[] = "ThinkPad T23 (2647-4MG)";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -4493,14 +5220,23 @@
 static const char pci_device_104c_ac52[] = "PCI1451 PC card Cardbus Controller";
 static const char pci_device_104c_ac53[] = "PCI1421 PC card Cardbus Controller";
 static const char pci_device_104c_ac54[] = "PCI1620 PC Card Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac54_103c_08b0[] = "tc1100 tablet";
+#endif
 static const char pci_device_104c_ac55[] = "PCI1520 PC card Cardbus Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_ac55_1014_0512[] = "ThinkPad T30/T40";
 #endif
 static const char pci_device_104c_ac56[] = "PCI1510 PC card Cardbus Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac56_1014_0512[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_ac56_1014_0528[] = "ThinkPad R40e (2684-HVG) Cardbus Controller";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac56_17aa_2012[] = "ThinkPad T60/R60 series";
+#endif
 static const char pci_device_104c_ac60[] = "PCI2040 PCI to DSP Bridge Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_104c_ac60_175c_5100[] = "ASI51xx Audio Adapter";
@@ -4516,7 +5252,10 @@
 #endif
 static const char pci_device_104c_ac8d[] = "PCI 7620";
 static const char pci_device_104c_ac8e[] = "PCI7420 CardBus Controller";
-static const char pci_device_104c_ac8f[] = "PCI7420/PCI7620 Dual Socket CardBus and Smart Card Cont. w/ 1394a-2000 OHCI Two-Port  PHY/Link-Layer Cont. and SD/MS-Pro Sockets";
+static const char pci_device_104c_ac8f[] = "PCI7420/7620 Combo CardBus, 1394a-2000 OHCI and SD/MS-Pro Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_104c_ac8f_1028_018d[] = "Inspiron 700m";
+#endif
 static const char pci_device_104c_fe00[] = "FireWire Host Controller";
 static const char pci_device_104c_fe03[] = "12C01A FireWire Host Controller";
 static const char pci_vendor_104d[] = "Sony Corporation";
@@ -4539,6 +5278,7 @@
 static const char pci_vendor_1050[] = "Winbond Electronics Corp";
 static const char pci_device_1050_0000[] = "NE2000";
 static const char pci_device_1050_0001[] = "W83769F";
+static const char pci_device_1050_0033[] = "W89C33D 802.11 a/b/g BB/MAC";
 static const char pci_device_1050_0105[] = "W82C105";
 static const char pci_device_1050_0840[] = "W89C840";
 #ifdef INIT_SUBSYS_INFO
@@ -4602,6 +5342,7 @@
 static const char pci_device_1057_0006[] = "MPC8245 [Unity]";
 static const char pci_device_1057_0008[] = "MPC8540";
 static const char pci_device_1057_0009[] = "MPC8560";
+static const char pci_device_1057_0012[] = "MPC8548 [PowerQUICC III]";
 static const char pci_device_1057_0100[] = "MC145575 [HFC-PCI]";
 static const char pci_device_1057_0431[] = "KTI829c 100VG";
 static const char pci_device_1057_1801[] = "DSP56301 Digital Signal Processor";
@@ -4679,6 +5420,8 @@
 #endif
 static const char pci_device_1057_18c0[] = "MPC8265A/8266/8272";
 static const char pci_device_1057_18c1[] = "MPC8271/MPC8272";
+static const char pci_device_1057_3052[] = "SM56 Data Fax Modem";
+static const char pci_device_1057_3055[] = "SM56 Data Fax Modem";
 static const char pci_device_1057_3410[] = "DSP56361 Digital Signal Processor";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1057_3410_ecc0_0050[] = "Gina24 rev.0";
@@ -4777,6 +5520,7 @@
 static const char pci_device_1057_5803[] = "MPC5200";
 static const char pci_device_1057_5806[] = "MCF54 Coldfire";
 static const char pci_device_1057_5808[] = "MPC8220";
+static const char pci_device_1057_5809[] = "MPC5200B";
 static const char pci_device_1057_6400[] = "MPC190 Security Processor (S1 family, encryption)";
 static const char pci_device_1057_6405[] = "MPC184 Security Processor (S1 family)";
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -4789,6 +5533,9 @@
 static const char pci_vendor_105a[] = "Promise Technology, Inc.";
 static const char pci_device_105a_0d30[] = "PDC20265 (FastTrak100 Lite/Ultra100)";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_0d30_1043_8042[] = "AV7266-E South Bridge Promise RAID";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_105a_0d30_105a_4d33[] = "Ultra100";
 #endif
 static const char pci_device_105a_0d38[] = "20263";
@@ -4816,16 +5563,17 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_105a_3376_1043_809e[] = "A7V8X motherboard";
 #endif
-static const char pci_device_105a_3515[] = "PDC40719";
+static const char pci_device_105a_3515[] = "PDC40719 [FastTrak TX4300/TX4310]";
 static const char pci_device_105a_3519[] = "PDC40519 (FastTrak TX4200)";
 static const char pci_device_105a_3570[] = "20771 (FastTrak TX2300)";
 static const char pci_device_105a_3571[] = "PDC20571 (FastTrak TX2200)";
 static const char pci_device_105a_3574[] = "PDC20579 SATAII 150 IDE Controller";
 static const char pci_device_105a_3577[] = "PDC40779 (SATA 300 779)";
-static const char pci_device_105a_3d17[] = "PDC20718 (SATA 300 TX4)";
+static const char pci_device_105a_3d17[] = "PDC40718 (SATA 300 TX4)";
 static const char pci_device_105a_3d18[] = "PDC20518/PDC40518 (SATAII 150 TX4)";
 static const char pci_device_105a_3d73[] = "PDC40775 (SATA 300 TX2plus)";
 static const char pci_device_105a_3d75[] = "PDC20575 (SATAII150 TX2plus)";
+static const char pci_device_105a_4302[] = "80333 [SuperTrak EX4350]";
 static const char pci_device_105a_4d30[] = "PDC20267 (FastTrak100/Ultra100)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_105a_4d30_105a_4d33[] = "Ultra100";
@@ -4833,6 +5581,11 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_105a_4d30_105a_4d39[] = "FastTrak100";
 #endif
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_4d30_8086_5744[] = "S845WD1-E mainboard";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_105a_4d33[] = "20246";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_105a_4d33_105a_4d33[] = "20246 IDE Controller";
@@ -4884,9 +5637,26 @@
 static const char pci_device_105a_6629[] = "PDC20619 (FastTrak TX4000)";
 static const char pci_device_105a_7275[] = "PDC20277 (SBFastTrak133 Lite)";
 static const char pci_device_105a_8002[] = "SATAII150 SX8";
+static const char pci_device_105a_8350[] = "80333 [SuperTrak EX8350/EX16350], 80331 [SuperTrak EX8300/EX16300]";
+static const char pci_device_105a_8650[] = "81348 [SuperTrak EX4650/EX8650/EX8654/EX4650EL]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_8650_105a_4600[] = "SuperTrak EX4650";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_8650_105a_4610[] = "SuperTrak EX4650EL";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_8650_105a_8601[] = "SuperTrak EX8650";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105a_8650_105a_8602[] = "SuperTrak EX8654";
+#endif
+static const char pci_device_105a_c350[] = "80333 [SuperTrak EX12350]";
+static const char pci_device_105a_e350[] = "80333 [SuperTrak EX24350]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_105b[] = "Foxconn International, Inc.";
+static const char pci_device_105b_0c4d[] = "SiS AC'97 Sound Controller";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_105c[] = "Wipro Infotech Limited";
@@ -4986,6 +5756,12 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_105d_5348_105d_0037[] = "Revolution IV-FP AGP (For SGI 1600SW)";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105d_5348_11a4_0028[] = "PVS5600M";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_105d_5348_11a4_0038[] = "PVS5600D";
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_105e[] = "Vtech Computers Ltd";
 #endif
@@ -5254,6 +6030,7 @@
 static const char pci_subsys_1073_0012_1073_0012[] = "DS-XG PCI Audio Codec";
 #endif
 static const char pci_device_1073_0020[] = "DS-1 Audio";
+static const char pci_device_1073_1000[] = "SW1000XG [XG Factory]";
 static const char pci_device_1073_2000[] = "DS2416 Digital Mixing Card";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1073_2000_1073_2000[] = "DS2416 Digital Mixing Card";
@@ -5294,16 +6071,38 @@
 static const char pci_subsys_1077_2200_1077_0002[] = "QLA2200";
 #endif
 static const char pci_device_1077_2300[] = "QLA2300 64-bit Fibre Channel Adapter";
-static const char pci_device_1077_2312[] = "QLA2312 Fibre Channel Adapter";
-static const char pci_device_1077_2322[] = "QLA2322 Fibre Channel Adapter";
-static const char pci_device_1077_2422[] = "QLA2422 Fibre Channel Adapter";
-static const char pci_device_1077_2432[] = "QLA2432 Fibre Channel Adapter";
-static const char pci_device_1077_3010[] = "QLA3010 Network Adapter";
-static const char pci_device_1077_3022[] = "QLA3022 Network Adapter";
-static const char pci_device_1077_4010[] = "QLA4010 iSCSI TOE Adapter";
-static const char pci_device_1077_4022[] = "QLA4022 iSCSI TOE Adapter";
-static const char pci_device_1077_6312[] = "QLA6312 Fibre Channel Adapter";
-static const char pci_device_1077_6322[] = "QLA6322 Fibre Channel Adapter";
+static const char pci_device_1077_2312[] = "ISP2312-based 2Gb Fibre Channel to PCI-X HBA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1077_2312_103c_0131[] = "2Gb Fibre Channel - Single port [A7538A]";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1077_2312_103c_12ba[] = "2Gb Fibre Channel - Dual port [A6826A]";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_device_1077_2322[] = "ISP2322-based 2Gb Fibre Channel to PCI-X HBA";
+static const char pci_device_1077_2422[] = "ISP2422-based 4Gb Fibre Channel to PCI-X HBA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1077_2422_103c_12d7[] = "4Gb Fibre Channel [AB379A]";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1077_2422_103c_12dd[] = "4Gb Fibre Channel [AB429A]";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_device_1077_2432[] = "ISP2432-based 4Gb Fibre Channel to PCI Express HBA";
+static const char pci_device_1077_3022[] = "ISP4022-based Ethernet NIC";
+static const char pci_device_1077_3032[] = "ISP4032-based Ethernet IPv6 NIC";
+static const char pci_device_1077_4010[] = "ISP4010-based iSCSI TOE HBA";
+static const char pci_device_1077_4022[] = "ISP4022-based iSCSI TOE HBA";
+static const char pci_device_1077_4032[] = "ISP4032-based iSCSI TOE IPv6 HBA";
+static const char pci_device_1077_5432[] = "SP232-based 4Gb Fibre Channel to PCI Express HBA";
+static const char pci_device_1077_6312[] = "SP202-based 2Gb Fibre Channel to PCI-X HBA";
+static const char pci_device_1077_6322[] = "SP212-based 2Gb Fibre Channel to PCI-X HBA";
 #endif
 static const char pci_vendor_1078[] = "Cyrix Corporation";
 static const char pci_device_1078_0000[] = "5510 [Grappa]";
@@ -5333,6 +6132,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_107d[] = "LeadTek Research Inc.";
 static const char pci_device_107d_0000[] = "P86C850";
+static const char pci_device_107d_204d[] = "[GeForce 7800 GTX] Winfast PX7800 GTX TDH";
 static const char pci_device_107d_2134[] = "WinFast 3D S320 II";
 static const char pci_device_107d_2971[] = "[GeForce FX 5900] WinFast A350 TDH MyViVo";
 #endif
@@ -5498,6 +6298,7 @@
 static const char pci_vendor_1093[] = "National Instruments";
 static const char pci_device_1093_0160[] = "PCI-DIO-96";
 static const char pci_device_1093_0162[] = "PCI-MIO-16XE-50";
+static const char pci_device_1093_1150[] = "PCI-DIO-32HS High Speed Digital I/O Board";
 static const char pci_device_1093_1170[] = "PCI-MIO-16XE-10";
 static const char pci_device_1093_1180[] = "PCI-MIO-16E-1";
 static const char pci_device_1093_1190[] = "PCI-MIO-16E-4";
@@ -5517,7 +6318,7 @@
 static const char pci_device_1093_2a80[] = "PCI-6025E";
 static const char pci_device_1093_2c80[] = "PCI-6035E";
 static const char pci_device_1093_2ca0[] = "PCI-6034E";
-static const char pci_device_1093_70a9[] = "PCI-6528";
+static const char pci_device_1093_70a9[] = "PCI-6528 (Digital I/O at 60V)";
 static const char pci_device_1093_70b8[] = "PCI-6251 [M Series - High Speed Multifunction DAQ]";
 static const char pci_device_1093_b001[] = "IMAQ-PCI-1408";
 static const char pci_device_1093_b011[] = "IMAQ-PXI-1408";
@@ -5688,6 +6489,9 @@
 static const char pci_subsys_109e_036e_1461_0761[] = "AverTV DVB-T";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_109e_036e_1461_0771[] = "AverMedia AVerTV DVB-T 771";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_036e_14f1_0001[] = "Bt878 Mediastream Controller NTSC";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -5862,12 +6666,18 @@
 static const char pci_subsys_109e_0878_1461_0002[] = "Avermedia PCTV98 Audio Capture";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_109e_0878_1461_0003[] = "UltraTV PCI 350";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_0878_1461_0004[] = "AVerTV WDM Audio Capture";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_0878_1461_0761[] = "AVerTV DVB-T";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_109e_0878_1461_0771[] = "AverMedia AVerTV DVB-T 771";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_109e_0878_14f1_0001[] = "Bt878 Video Capture (Audio Section)";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -6143,6 +6953,9 @@
 static const char pci_subsys_10b5_9030_10b5_3068[] = "Alpermann+Velte PCL PCI HD (3V/5V): Timecode Reader Board";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9030_12fe_0111[] = "CPCI-ASIO4 (ESD 4-port Serial Interface Board)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b5_9030_1397_3136[] = "4xS0-ISDN PCI Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -6181,7 +6994,7 @@
 static const char pci_subsys_10b5_9050_10b5_2905[] = "Alpermann+Velte PCI TS: Time Synchronisation Board";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10b5_9050_10b5_9050[] = "MP9050";
+static const char pci_subsys_10b5_9050_10b5_9050[] = "PCI-I04 PCI Passive PC/CAN Interface";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b5_9050_1498_0362[] = "TPMC866 8 Channel Serial Card";
@@ -6299,6 +7112,12 @@
 static const char pci_subsys_10b5_9054_12d9_0002[] = "PCI Prosody Card rev 1.5";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9054_14b4_d100[] = "Dektec DTA-100";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9054_14b4_d114[] = "Dektec DTA-120";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b5_9054_16df_0011[] = "PIKA PrimeNet MM PCI";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -6316,10 +7135,13 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b5_9054_16df_0016[] = "PIKA InLine MM";
 #endif
-static const char pci_device_10b5_9056[] = "Francois";
+static const char pci_device_10b5_9056[] = "9056 PCI I/O Accelerator";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b5_9056_10b5_2979[] = "CellinkBlade 11 - CPCI board VoATM AAL1";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9056_14b4_d140[] = "Dektec DTA-140";
+#endif
 static const char pci_device_10b5_9060[] = "9060";
 static const char pci_device_10b5_906d[] = "9060SD";
 #ifdef INIT_SUBSYS_INFO
@@ -6338,6 +7160,9 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9080_10b5_1123[] = "Sectra KK631 encryption board";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b5_9080_10b5_9080[] = "9080 [real subsystem ID not set]";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -6349,7 +7174,21 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b5_9080_12df_4422[] = "4422PCI [Do-All Telemetry Data Aquisition System]";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9080_1517_000b[] = "ECSG-1R3ADC-PMC Clock synthesizer";
+#endif
+static const char pci_device_10b5_9656[] = "PCI <-> IOBus Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9656_1517_000f[] = "ECDR-GC314-PMC Receiver";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9656_1885_0700[] = "Tsunami FPGA PMC with Altera Stratix S40";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b5_9656_1885_0701[] = "Tsunami FPGA PMC with Altera Stratix S30";
+#endif
 static const char pci_device_10b5_bb04[] = "B&B 3PCIOSD1A Isolated PCI Serial";
+static const char pci_device_10b5_c001[] = "CronyxOmega-PCI (8-port RS232)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10b6[] = "Madge Networks";
@@ -6415,6 +7254,9 @@
 static const char pci_device_10b7_1006[] = "MINI PCI type 3B Data Fax Modem";
 static const char pci_device_10b7_1007[] = "Mini PCI 56k Winmodem";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b7_1007_10b7_615b[] = "Mini PCI 56K Modem";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b7_1007_10b7_615c[] = "Mini PCI 56K Modem";
 #endif
 static const char pci_device_10b7_1201[] = "3c982-TXM 10/100baseTX Dual Port A [Hydra]";
@@ -6506,6 +7348,10 @@
 static const char pci_device_10b7_900a[] = "3c900B-FL 10base-FL [Cyclone]";
 static const char pci_device_10b7_9050[] = "3c905 100BaseTX [Boomerang]";
 static const char pci_device_10b7_9051[] = "3c905 100BaseT4 [Boomerang]";
+static const char pci_device_10b7_9054[] = "3C905B-TX Fast Etherlink XL PCI";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b7_9054_10b7_9054[] = "3C905B-TX Fast Etherlink XL PCI";
+#endif
 static const char pci_device_10b7_9055[] = "3c905B 100BaseTX [Cyclone]";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -6635,7 +7481,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10b7_9200_10b7_1000[] = "3C905C-TX Fast Etherlink for PC Management NIC";
+static const char pci_subsys_10b7_9200_10b7_1000[] = "3C905CX-TX/TX-M Fast Etherlink for PC Management NIC";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b7_9200_10b7_7000[] = "10/100 Mini PCI Ethernet Adapter";
@@ -6833,6 +7679,9 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10b9_5229_1043_8053[] = "A7A266 Motherboard IDE";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10b9_5229_1849_5229[] = "ASRock 939Dual-SATA2 Motherboard IDE (PATA)";
+#endif
 static const char pci_device_10b9_5235[] = "M5225";
 static const char pci_device_10b9_5237[] = "USB 1.1 Controller";
 #ifdef INIT_SUBSYS_INFO
@@ -6860,7 +7709,7 @@
 static const char pci_device_10b9_5251[] = "M5251 P1394 OHCI 1.0 Controller";
 static const char pci_device_10b9_5253[] = "M5253 P1394 OHCI 1.1 Controller";
 static const char pci_device_10b9_5261[] = "M5261 Ethernet Controller";
-static const char pci_device_10b9_5263[] = "M5263 Ethernet Controller";
+static const char pci_device_10b9_5263[] = "ULi 1689,1573 integrated ethernet.";
 static const char pci_device_10b9_5281[] = "ALi M5281 Serial ATA / RAID Host Controller";
 static const char pci_device_10b9_5287[] = "ULi 5287 SATA";
 static const char pci_device_10b9_5288[] = "ULi M5288 SATA";
@@ -7092,6 +7941,9 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10cd_1300_10cd_1310[] = "ASC1300 SCSI Adapter";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10cd_1300_1195_1320[] = "Ultra-SCSI CardBus PC Card REX CB31";
+#endif
 static const char pci_device_10cd_2300[] = "ABP940-UW";
 static const char pci_device_10cd_2500[] = "ABP940-U2W";
 #endif
@@ -7418,17 +8270,21 @@
 static const char pci_subsys_10de_0041_1043_817b[] = "V9999 Gamer Edition";
 #endif
 static const char pci_device_10de_0042[] = "NV40.2 [GeForce 6800 LE]";
-static const char pci_device_10de_0043[] = "NV40.3";
+static const char pci_device_10de_0043[] = "NV40.3 [GeForce 6800 XE]";
+static const char pci_device_10de_0044[] = "NV40 [GeForce 6800 XT]";
 static const char pci_device_10de_0045[] = "NV40 [GeForce 6800 GT]";
+static const char pci_device_10de_0046[] = "NV40 [GeForce 6800 GT]";
 static const char pci_device_10de_0047[] = "NV40 [GeForce 6800 GS]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0047_1682_2109[] = "GeForce 6800 GS";
 #endif
+static const char pci_device_10de_0048[] = "NV40 [GeForce 6800 XT]";
 static const char pci_device_10de_0049[] = "NV40GL";
+static const char pci_device_10de_004d[] = "NV40GL [Quadro FX 4000]";
 static const char pci_device_10de_004e[] = "NV40GL [Quadro FX 4000]";
 static const char pci_device_10de_0050[] = "CK804 ISA Bridge";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10de_0050_1043_815a[] = "K8N4-E Mainboard";
+static const char pci_subsys_10de_0050_1043_815a[] = "K8N4-E or A8N-E Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0050_1458_0c11[] = "GA-K8N Ultra-9 Mainboard";
@@ -7436,10 +8292,13 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0050_1462_7100[] = "MSI K8N Diamond";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0050_147b_1c1a[] = "KN8-Ultra Mainboard";
+#endif
 static const char pci_device_10de_0051[] = "CK804 ISA Bridge";
 static const char pci_device_10de_0052[] = "CK804 SMBus";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10de_0052_1043_815a[] = "K8N4-E Mainboard";
+static const char pci_subsys_10de_0052_1043_815a[] = "K8N4-E or A8N-E Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0052_1458_0c11[] = "GA-K8N Ultra-9 Mainboard";
@@ -7447,9 +8306,12 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0052_1462_7100[] = "MSI K8N Diamond";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0052_147b_1c1a[] = "KN8-Ultra Mainboard";
+#endif
 static const char pci_device_10de_0053[] = "CK804 IDE";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10de_0053_1043_815a[] = "K8N4-E Mainboard";
+static const char pci_subsys_10de_0053_1043_815a[] = "K8N4-E or A8N-E Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0053_1458_5002[] = "GA-K8N Ultra-9 Mainboard";
@@ -7457,24 +8319,36 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0053_1462_7100[] = "MSI K8N Diamond";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0053_147b_1c1a[] = "KN8-Ultra Mainboard";
+#endif
 static const char pci_device_10de_0054[] = "CK804 Serial ATA Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0054_1043_815a[] = "A8N-E Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0054_1458_b003[] = "GA-K8N Ultra-9 Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0054_1462_7100[] = "MSI K8N Diamond";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0054_147b_1c1a[] = "KN8-Ultra Mainboard";
+#endif
 static const char pci_device_10de_0055[] = "CK804 Serial ATA Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10de_0055_1043_815a[] = "K8N4-E Mainboard";
+static const char pci_subsys_10de_0055_1043_815a[] = "K8N4-E or A8N-E Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0055_1458_b003[] = "GA-K8N Ultra-9 Mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0055_147b_1c1a[] = "KN8-Ultra Mainboard";
+#endif
 static const char pci_device_10de_0056[] = "CK804 Ethernet Controller";
 static const char pci_device_10de_0057[] = "CK804 Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10de_0057_1043_8141[] = "K8N4-E Mainboard";
+static const char pci_subsys_10de_0057_1043_8141[] = "K8N4-E or A8N-E Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0057_1458_e000[] = "GA-K8N Ultra-9 Mainboard";
@@ -7482,14 +8356,20 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0057_1462_7100[] = "MSI K8N Diamond";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0057_147b_1c1a[] = "KN8-Ultra Mainboard";
+#endif
 static const char pci_device_10de_0058[] = "CK804 AC'97 Modem";
 static const char pci_device_10de_0059[] = "CK804 AC'97 Audio Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10de_0059_1043_812a[] = "K8N4-E Mainboard";
+static const char pci_subsys_10de_0059_1043_812a[] = "K8N4-E or A8N-E Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0059_147b_1c1a[] = "KN8-Ultra Mainboard";
 #endif
 static const char pci_device_10de_005a[] = "CK804 USB Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10de_005a_1043_815a[] = "K8N4-E Mainboard";
+static const char pci_subsys_10de_005a_1043_815a[] = "K8N4-E or A8N-E Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_005a_1458_5004[] = "GA-K8N Ultra-9 Mainboard";
@@ -7497,9 +8377,12 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_005a_1462_7100[] = "MSI K8N Diamond";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_005a_147b_1c1a[] = "KN8-Ultra Mainboard";
+#endif
 static const char pci_device_10de_005b[] = "CK804 USB Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10de_005b_1043_815a[] = "K8N4-E Mainboard";
+static const char pci_subsys_10de_005b_1043_815a[] = "K8N4-E or A8N-E Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_005b_1458_5004[] = "GA-K8N Ultra-9 Mainboard";
@@ -7507,22 +8390,43 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_005b_1462_7100[] = "MSI K8N Diamond";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_005b_147b_1c1a[] = "KN8-Ultra Mainboard";
+#endif
 static const char pci_device_10de_005c[] = "CK804 PCI Bridge";
 static const char pci_device_10de_005d[] = "CK804 PCIE Bridge";
 static const char pci_device_10de_005e[] = "CK804 Memory Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_005e_1043_815a[] = "A8N-E Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_005e_10f1_2891[] = "Thunder K8SRE Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_005e_1458_5000[] = "GA-K8N Ultra-9 Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_005e_1462_7100[] = "MSI K8N Diamond";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_005e_147b_1c1a[] = "KN8-Ultra Mainboard";
+#endif
 static const char pci_device_10de_005f[] = "CK804 Memory Controller";
 static const char pci_device_10de_0060[] = "nForce2 ISA Bridge";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0060_1043_80ad[] = "A7N8X Mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0060_a0a0_03ba[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_0064[] = "nForce2 SMBus (MCP)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0064_a0a0_03bb[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_0065[] = "nForce2 IDE";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0065_a0a0_03b2[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_0066[] = "nForce2 Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0066_1043_80a7[] = "A7N8X Mainboard onboard nForce2 Ethernet";
@@ -7535,7 +8439,16 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0068_1043_0c11[] = "A7N8X Mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0068_a0a0_03b4[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_006a[] = "nForce2 AC97 Audio Controler (MCP)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_006a_1043_8095[] = "nForce2 AC97 Audio Controler (MCP)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_006a_a0a0_0304[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_006b[] = "nForce Audio Processing Unit";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_006b_10de_006b[] = "nForce2 MCP Audio Processing Unit";
@@ -7543,6 +8456,9 @@
 static const char pci_device_10de_006c[] = "nForce2 External PCI Bridge";
 static const char pci_device_10de_006d[] = "nForce2 PCI Bridge";
 static const char pci_device_10de_006e[] = "nForce2 FireWire (IEEE 1394) Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_006e_a0a0_0306[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_0080[] = "MCP2A ISA bridge";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0080_147b_1c09[] = "NV7 Motherboard";
@@ -7571,20 +8487,28 @@
 static const char pci_device_10de_008b[] = "MCP2A PCI Bridge";
 static const char pci_device_10de_008c[] = "MCP2A Ethernet Controller";
 static const char pci_device_10de_008e[] = "nForce2 Serial ATA Controller";
-static const char pci_device_10de_0091[] = "GeForce 7800 GTX";
-static const char pci_device_10de_0092[] = "GeForce 7800 GT";
+static const char pci_device_10de_0090[] = "G70 [GeForce 7800 GTX]";
+static const char pci_device_10de_0091[] = "G70 [GeForce 7800 GTX]";
+static const char pci_device_10de_0092[] = "G70 [GeForce 7800 GT]";
+static const char pci_device_10de_0093[] = "G70 [GeForce 7800 GS]";
+static const char pci_device_10de_0098[] = "GeForce Go 7800";
 static const char pci_device_10de_0099[] = "GE Force Go 7800 GTX";
+static const char pci_device_10de_009d[] = "G70GL [Quadro FX 4500]";
 static const char pci_device_10de_00a0[] = "NV5 [Aladdin TNT2]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00a0_14af_5810[] = "Maxi Gamer Xentor";
 #endif
-static const char pci_device_10de_00c0[] = "NV41.0";
+static const char pci_device_10de_00c0[] = "NV41 [GeForce 6800 GS]";
 static const char pci_device_10de_00c1[] = "NV41.1 [GeForce 6800]";
 static const char pci_device_10de_00c2[] = "NV41.2 [GeForce 6800 LE]";
+static const char pci_device_10de_00c3[] = "NV42 [Geforce 6800 XT]";
 static const char pci_device_10de_00c8[] = "NV41.8 [GeForce Go 6800]";
 static const char pci_device_10de_00c9[] = "NV41.9 [GeForce Go 6800 Ultra]";
 static const char pci_device_10de_00cc[] = "NV41 [Quadro FX Go1400]";
 static const char pci_device_10de_00cd[] = "NV41 [Quadro FX 3450/4000 SDI]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00cd_10de_029b[] = "wx4300 Workstation";
+#endif
 static const char pci_device_10de_00ce[] = "NV41GL [Quadro FX 1400]";
 static const char pci_device_10de_00d0[] = "nForce3 LPC Bridge";
 static const char pci_device_10de_00d1[] = "nForce3 Host Bridge";
@@ -7600,63 +8524,120 @@
 static const char pci_device_10de_00dd[] = "nForce3 PCI Bridge";
 static const char pci_device_10de_00df[] = "CK8S Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00df_105b_0c43[] = "Winfast NF3250K8AA";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00df_147b_1c0b[] = "NF8 Mainboard";
 #endif
 static const char pci_device_10de_00e0[] = "nForce3 250Gb LPC Bridge";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00e0_10de_0c11[] = "Winfast NF3250K8AA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00e0_1462_7030[] = "K8N Neo-FSR v2.0";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00e0_147b_1c0b[] = "NF8 Mainboard";
 #endif
 static const char pci_device_10de_00e1[] = "nForce3 250Gb Host Bridge";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00e1_1462_7030[] = "K8N Neo-FSR v2.0";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00e1_147b_1c0b[] = "NF8 Mainboard";
 #endif
 static const char pci_device_10de_00e2[] = "nForce3 250Gb AGP Host to PCI Bridge";
 static const char pci_device_10de_00e3[] = "CK8S Serial ATA Controller (v2.5)";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00e3_105b_0c43[] = "Winfast NF3250K8AA";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00e3_147b_1c0b[] = "NF8 Mainboard";
 #endif
 static const char pci_device_10de_00e4[] = "nForce 250Gb PCI System Management";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00e4_105b_0c43[] = "Winfast NF3250K8AA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00e4_1462_7030[] = "K8N Neo-FSR v2.0";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00e4_147b_1c0b[] = "NF8 Mainboard";
 #endif
 static const char pci_device_10de_00e5[] = "CK8S Parallel ATA Controller (v2.5)";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00e5_105b_0c43[] = "Winfast NF3250K8AA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00e5_1462_7030[] = "K8N Neo-FSR v2.0";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00e5_147b_1c0b[] = "NF8 Mainboard";
 #endif
 static const char pci_device_10de_00e6[] = "CK8S Ethernet Controller";
 static const char pci_device_10de_00e7[] = "CK8S USB Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00e7_105b_0c43[] = "Winfast NF3250K8AA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00e7_1462_7030[] = "K8N Neo-FSR v2.0";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00e7_147b_1c0b[] = "NF8 Mainboard";
 #endif
 static const char pci_device_10de_00e8[] = "nForce3 EHCI USB 2.0 Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00e8_105b_0c43[] = "Winfast NF3250K8AA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00e8_1462_7030[] = "K8N Neo-FSR v2.0";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00e8_147b_1c0b[] = "NF8 Mainboard";
 #endif
 static const char pci_device_10de_00ea[] = "nForce3 250Gb AC'97 Audio Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00ea_105b_0c43[] = "Winfast NF3250K8AA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00ea_1462_b010[] = "K8N Neo-FSR v2.0";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00ea_147b_1c0b[] = "NF8 Mainboard";
 #endif
 static const char pci_device_10de_00ed[] = "nForce3 250Gb PCI-to-PCI Bridge";
 static const char pci_device_10de_00ee[] = "CK8S Serial ATA Controller (v2.5)";
-static const char pci_device_10de_00f0[] = "NV40 [GeForce 6800/GeForce 6800 Ultra]";
-static const char pci_device_10de_00f1[] = "NV43 [GeForce 6600/GeForce 6600 GT]";
+static const char pci_device_10de_00f0[] = "NV40 [GeForce 6800 Ultra]";
+static const char pci_device_10de_00f1[] = "NV43 [GeForce 6600 GT]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00f1_1043_81a6[] = "N6600GT TD 128M AGP";
 #endif
-static const char pci_device_10de_00f2[] = "NV43 [GeForce 6600/GeForce 6600 GT]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00f1_1458_3150[] = "GV-N66T128VP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00f1_1682_2119[] = "GeForce 6600 GT AGP 128MB DDR3 DUAL DVI TV";
+#endif
+static const char pci_device_10de_00f2[] = "NV43 [GeForce 6600]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00f2_1682_211c[] = "GeForce 6600 256MB DDR DUAL DVI TV";
 #endif
 static const char pci_device_10de_00f3[] = "NV43 [GeForce 6200]";
+static const char pci_device_10de_00f4[] = "NV43 [GeForce 6600 LE]";
+static const char pci_device_10de_00f5[] = "G70 [GeForce 7800 GS]";
+static const char pci_device_10de_00f6[] = "NV43 [GeForce 6800 GS]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_00f6_1682_217e[] = "XFX GeForce 6800 XTreme 256MB DDR3 AGP";
+#endif
 static const char pci_device_10de_00f8[] = "NV45GL [Quadro FX 3400/4400]";
-static const char pci_device_10de_00f9[] = "NV40 [GeForce 6800 Ultra/GeForce 6800 GT]";
+static const char pci_device_10de_00f9[] = "NV40 [GeForce 6800 Series GPU]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_00f9_1682_2120[] = "GEFORCE 6800 GT PCI-E";
 #endif
 static const char pci_device_10de_00fa[] = "NV36 [GeForce PCX 5750]";
 static const char pci_device_10de_00fb[] = "NV35 [GeForce PCX 5900]";
 static const char pci_device_10de_00fc[] = "NV37GL [Quadro FX 330/GeForce PCX 5300]";
-static const char pci_device_10de_00fd[] = "NV37GL [Quadro FX 330/Quadro NVS280]";
+static const char pci_device_10de_00fd[] = "NV37GL [Quadro PCI-E Series]";
 static const char pci_device_10de_00fe[] = "NV38GL [Quadro FX 1300]";
 static const char pci_device_10de_00ff[] = "NV18 [GeForce PCX 4300]";
 static const char pci_device_10de_0100[] = "NV10 [GeForce 256 SDR]";
@@ -7730,6 +8711,9 @@
 static const char pci_subsys_10de_0110_1043_4015[] = "AGP-V7100 Pro";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0110_1043_4021[] = "V7100 Deluxe Combo";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0110_1043_4031[] = "V7100 Pro with TV output";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -7765,19 +8749,28 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0110_14af_7103[] = "3D Prophet II MX Dual-Display";
 #endif
-static const char pci_device_10de_0111[] = "NV11DDR [GeForce2 MX 100 DDR/200 DDR]";
+static const char pci_device_10de_0111[] = "NV11DDR [GeForce2 MX200]";
 static const char pci_device_10de_0112[] = "NV11 [GeForce2 Go]";
 static const char pci_device_10de_0113[] = "NV11GL [Quadro2 MXR/EX/Go]";
 static const char pci_device_10de_0140[] = "NV43 [GeForce 6600 GT]";
 static const char pci_device_10de_0141[] = "NV43 [GeForce 6600]";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0141_1043_81b0[] = "EN6600 Silencer";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0141_1458_3124[] = "GV-NX66128DP Turbo Force Edition";
 #endif
-static const char pci_device_10de_0142[] = "NV43 [GeForce 6600 PCIe]";
+static const char pci_device_10de_0142[] = "NV43 [GeForce 6600 LE]";
+static const char pci_device_10de_0143[] = "NV43 [GeForce 6600 VE]";
 static const char pci_device_10de_0144[] = "NV43 [GeForce Go 6600]";
 static const char pci_device_10de_0145[] = "NV43 [GeForce 6610 XL]";
 static const char pci_device_10de_0146[] = "NV43 [Geforce Go 6600TE/6200TE]";
+static const char pci_device_10de_0147[] = "GeForce 6700 XL";
 static const char pci_device_10de_0148[] = "NV43 [GeForce Go 6600]";
+static const char pci_device_10de_0149[] = "NV43 [GeForce Go 6600 GT]";
+static const char pci_device_10de_014a[] = "Quadro NVS 440";
+static const char pci_device_10de_014c[] = "Quadro FX 540 MXM";
+static const char pci_device_10de_014d[] = "NV18GL [Quadro FX 550]";
 static const char pci_device_10de_014e[] = "NV43GL [Quadro FX 540]";
 static const char pci_device_10de_014f[] = "NV43 [GeForce 6200]";
 static const char pci_device_10de_0150[] = "NV15 [GeForce2 GTS/Pro]";
@@ -7797,6 +8790,9 @@
 static const char pci_subsys_10de_0150_107d_2842[] = "WinFast GeForce 2 Pro";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0150_10de_002e[] = "GeForce2 GTS";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0150_1462_8831[] = "Creative GeForce2 Pro";
 #endif
 static const char pci_device_10de_0151[] = "NV15DDR [GeForce2 Ti]";
@@ -7811,10 +8807,17 @@
 static const char pci_subsys_10de_0152_1048_0c56[] = "GLADIAC Ultra";
 #endif
 static const char pci_device_10de_0153[] = "NV15GL [Quadro2 Pro]";
-static const char pci_device_10de_0161[] = "GeForce 6200 TurboCache(TM)";
+static const char pci_device_10de_0160[] = "GeForce 6500";
+static const char pci_device_10de_0161[] = "NV44 [GeForce 6200 TurboCache(TM)]";
+static const char pci_device_10de_0162[] = "NV44 [GeForce 6200SE TurboCache (TM)]";
+static const char pci_device_10de_0163[] = "NV44 [GeForce 6200 LE]";
 static const char pci_device_10de_0164[] = "NV44 [GeForce Go 6200]";
 static const char pci_device_10de_0165[] = "NV44 [Quadro NVS 285]";
-static const char pci_device_10de_0167[] = "GeForce Go 6200 TurboCache";
+static const char pci_device_10de_0166[] = "NV43 [GeForce Go 6400]";
+static const char pci_device_10de_0167[] = "NV43 [GeForce Go 6200/6400]";
+static const char pci_device_10de_0168[] = "NV43 [GeForce Go 6200/6400]";
+static const char pci_device_10de_0169[] = "GeForce 6250";
+static const char pci_device_10de_016a[] = "GeForce 7100 GS";
 static const char pci_device_10de_0170[] = "NV17 [GeForce4 MX 460]";
 static const char pci_device_10de_0171[] = "NV17 [GeForce4 MX 440]";
 #ifdef INIT_SUBSYS_INFO
@@ -7841,6 +8844,9 @@
 static const char pci_device_10de_0175[] = "NV17 [GeForce4 420 Go]";
 static const char pci_device_10de_0176[] = "NV17 [GeForce4 420 Go 32M]";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0176_103c_08b0[] = "tc1100 tablet";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0176_4c53_1090[] = "Cx9 / Vx9 mainboard";
 #endif
 static const char pci_device_10de_0177[] = "NV17 [GeForce4 460 Go]";
@@ -7849,12 +8855,15 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0179_10de_0179[] = "GeForce4 MX (Mac)";
 #endif
-static const char pci_device_10de_017a[] = "NV17GL [Quadro4 200/400 NVS]";
+static const char pci_device_10de_017a[] = "NV17GL [Quadro NVS]";
 static const char pci_device_10de_017b[] = "NV17GL [Quadro4 550 XGL]";
 static const char pci_device_10de_017c[] = "NV17GL [Quadro4 500 GoGL]";
 static const char pci_device_10de_017d[] = "NV17 [GeForce4 410 Go 16M]";
 static const char pci_device_10de_0181[] = "NV18 [GeForce4 MX 440 AGP 8x]";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0181_1043_8063[] = "GeForce4 MX 440 AGP 8X";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0181_1043_806f[] = "V9180 Magic";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -7871,13 +8880,17 @@
 #endif
 static const char pci_device_10de_0182[] = "NV18 [GeForce4 MX 440SE AGP 8x]";
 static const char pci_device_10de_0183[] = "NV18 [GeForce4 MX 420 AGP 8x]";
-static const char pci_device_10de_0185[] = "NV18 [GeForce4 MX 4000 AGP 8x]";
+static const char pci_device_10de_0184[] = "NV18 [GeForce4 MX]";
+static const char pci_device_10de_0185[] = "NV18 [GeForce4 MX 4000]";
 static const char pci_device_10de_0186[] = "NV18M [GeForce4 448 Go]";
 static const char pci_device_10de_0187[] = "NV18M [GeForce4 488 Go]";
 static const char pci_device_10de_0188[] = "NV18GL [Quadro4 580 XGL]";
-static const char pci_device_10de_018a[] = "NV18GL [Quadro4 NVS AGP 8x]";
+static const char pci_device_10de_018a[] = "NV18GL [Quadro NVS with AGP8X]";
 static const char pci_device_10de_018b[] = "NV18GL [Quadro4 380 XGL]";
+static const char pci_device_10de_018c[] = "Quadro NVS 50 PCI";
 static const char pci_device_10de_018d[] = "NV18M [GeForce4 448 Go]";
+static const char pci_device_10de_0191[] = "GeForce 8800 GTX (G80)";
+static const char pci_device_10de_0193[] = "G80 [GeForce 8800 GTS]";
 static const char pci_device_10de_01a0[] = "NVCrush11 [GeForce2 MX Integrated Graphics]";
 static const char pci_device_10de_01a4[] = "nForce CPU bridge";
 static const char pci_device_10de_01ab[] = "nForce 420 Memory Controller (DDR)";
@@ -7893,18 +8906,55 @@
 static const char pci_device_10de_01c1[] = "nForce AC'97 Modem Controller";
 static const char pci_device_10de_01c2[] = "nForce USB Controller";
 static const char pci_device_10de_01c3[] = "nForce Ethernet Controller";
+static const char pci_device_10de_01d1[] = "GeForce 7300 LE";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_01d1_1462_0345[] = "7300LE PCI Express Graphics Adapter";
+#endif
+static const char pci_device_10de_01d3[] = "GeForce 7300 SE";
+static const char pci_device_10de_01d6[] = "GeForce Go 7200";
+static const char pci_device_10de_01d7[] = "G72M [Quadro NVS 110M/GeForce Go 7300]";
+static const char pci_device_10de_01d8[] = "G72M [GeForce Go 7400]";
+static const char pci_device_10de_01da[] = "Quadro NVS 110M";
+static const char pci_device_10de_01dc[] = "Quadro FX 350M";
+static const char pci_device_10de_01dd[] = "G72 [Geforce 7500 LE]";
+static const char pci_device_10de_01de[] = "Quadro FX 350";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_01de_10de_01dc[] = "Quadro  FX Go350M";
+#endif
+static const char pci_device_10de_01df[] = "G71 [GeForce 7300 GS]";
 static const char pci_device_10de_01e0[] = "nForce2 AGP (different version?)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_01e0_147b_1c09[] = "NV7 Motherboard";
 #endif
 static const char pci_device_10de_01e8[] = "nForce2 AGP";
 static const char pci_device_10de_01ea[] = "nForce2 Memory Controller 0";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_01ea_a0a0_03b9[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_01eb[] = "nForce2 Memory Controller 1";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_01eb_a0a0_03b9[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_01ec[] = "nForce2 Memory Controller 2";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_01ec_a0a0_03b9[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_01ed[] = "nForce2 Memory Controller 3";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_01ed_a0a0_03b9[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_01ee[] = "nForce2 Memory Controller 4";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_01ee_a0a0_03b9[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_01ef[] = "nForce2 Memory Controller 5";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_01ef_a0a0_03b9[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_01f0[] = "NV18 [GeForce4 MX - nForce GPU]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_01f0_a0a0_03b5[] = "UK79G-1394 motherboard";
+#endif
 static const char pci_device_10de_0200[] = "NV20 [GeForce3]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0200_1043_402f[] = "AGP-V8200 DDR";
@@ -7921,15 +8971,32 @@
 static const char pci_subsys_10de_0202_1545_002f[] = "Xtasy 6964";
 #endif
 static const char pci_device_10de_0203[] = "NV20DCC [Quadro DCC]";
-static const char pci_device_10de_0221[] = "GeForce 6200";
+static const char pci_device_10de_0211[] = "NV40 [GeForce 6800]";
+static const char pci_device_10de_0212[] = "NV40 [GeForce 6800 LE]";
+static const char pci_device_10de_0215[] = "NV40 [GeForce 6800 GT]";
+static const char pci_device_10de_0218[] = "NV40 [GeForce 6800 XT]";
+static const char pci_device_10de_0221[] = "NV44A [GeForce 6200]";
+static const char pci_device_10de_0222[] = "GeForce 6200 A-LE";
 static const char pci_device_10de_0240[] = "C51PV [GeForce 6150]";
-static const char pci_device_10de_0241[] = "C51 PCI Express Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0240_1043_81cd[] = "A8N-VM CSM";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0240_1462_7207[] = "K8NGM2 series";
+#endif
+static const char pci_device_10de_0241[] = "C51 [GeForce 6150 LE]";
 static const char pci_device_10de_0242[] = "C51G [GeForce 6100]";
 static const char pci_device_10de_0243[] = "C51 PCI Express Bridge";
-static const char pci_device_10de_0244[] = "C51 PCI Express Bridge";
-static const char pci_device_10de_0245[] = "C51 PCI Express Bridge";
+static const char pci_device_10de_0244[] = "C51 [Geforce 6150 Go]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0244_10de_0244[] = "C51 [Geforce 6150 Go]";
+#endif
+static const char pci_device_10de_0245[] = "C51 [Quadro NVS 210S/GeForce 6150LE]";
 static const char pci_device_10de_0246[] = "C51 PCI Express Bridge";
-static const char pci_device_10de_0247[] = "C51 PCI Express Bridge";
+static const char pci_device_10de_0247[] = "MCP51 PCI-X GeForce Go 6100";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0247_1043_1382[] = "MCP51 PCI-X GeForce Go 6100";
+#endif
 static const char pci_device_10de_0248[] = "C51 PCI Express Bridge";
 static const char pci_device_10de_0249[] = "C51 PCI Express Bridge";
 static const char pci_device_10de_024a[] = "C51 PCI Express Bridge";
@@ -7955,35 +9022,137 @@
 static const char pci_device_10de_0259[] = "NV25GL [Quadro4 750 XGL]";
 static const char pci_device_10de_025b[] = "NV25GL [Quadro4 700 XGL]";
 static const char pci_device_10de_0260[] = "MCP51 LPC Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0260_1043_81bc[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0260_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_0261[] = "MCP51 LPC Bridge";
 static const char pci_device_10de_0262[] = "MCP51 LPC Bridge";
 static const char pci_device_10de_0263[] = "MCP51 LPC Bridge";
 static const char pci_device_10de_0264[] = "MCP51 SMBus";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0264_1043_81bc[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0264_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_0265[] = "MCP51 IDE";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0265_1043_81bc[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0265_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_0266[] = "MCP51 Serial ATA Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0266_1043_81bc[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0266_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_0267[] = "MCP51 Serial ATA Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0267_1043_81bc[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0267_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_0268[] = "MCP51 Ethernet Controller";
 static const char pci_device_10de_0269[] = "MCP51 Ethernet Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0269_1043_8141[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0269_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_026a[] = "MCP51 MCI";
 static const char pci_device_10de_026b[] = "MCP51 AC97 Audio Controller";
 static const char pci_device_10de_026c[] = "MCP51 High Definition Audio";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_026c_10de_cb84[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_026c_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_026d[] = "MCP51 USB Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_026d_1043_81bc[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_026d_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_026e[] = "MCP51 USB Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_026e_1043_81bc[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_026e_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_026f[] = "MCP51 PCI Bridge";
 static const char pci_device_10de_0270[] = "MCP51 Host Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0270_1043_81bc[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0270_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_0271[] = "MCP51 PMU";
 static const char pci_device_10de_0272[] = "MCP51 Memory Controller 0";
 static const char pci_device_10de_027e[] = "C51 Memory Controller 2";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_027e_1043_81cd[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_027e_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_027f[] = "C51 Memory Controller 3";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_027f_1043_81cd[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_027f_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_0280[] = "NV28 [GeForce4 Ti 4800]";
 static const char pci_device_10de_0281[] = "NV28 [GeForce4 Ti 4200 AGP 8x]";
 static const char pci_device_10de_0282[] = "NV28 [GeForce4 Ti 4800 SE]";
 static const char pci_device_10de_0286[] = "NV28 [GeForce4 Ti 4200 Go AGP 8x]";
 static const char pci_device_10de_0288[] = "NV28GL [Quadro4 980 XGL]";
 static const char pci_device_10de_0289[] = "NV28GL [Quadro4 780 XGL]";
-static const char pci_device_10de_028c[] = "NV28GLM [Quadro4 700 GoGL]";
+static const char pci_device_10de_028c[] = "NV28GLM [Quadro4 Go700]";
+static const char pci_device_10de_0290[] = "G71 [GeForce 7900 GTX]";
+static const char pci_device_10de_0291[] = "G71 [GeForce 7900 GT/GTO]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0291_10de_042b[] = "NX7900GTO-T2D512E [7900 GTO]";
+#endif
+static const char pci_device_10de_0292[] = "G71 [GeForce 7900 GS]";
+static const char pci_device_10de_0293[] = "G71 [GeForce 7900 GX2]";
+static const char pci_device_10de_0294[] = "G71 [GeForce 7950 GX2]";
+static const char pci_device_10de_0295[] = "G71 [GeForce 7950 GT]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0295_107d_2a68[] = "WinFast PX7950GT TDH";
+#endif
+static const char pci_device_10de_0297[] = "GeForce Go 7950 GTX";
+static const char pci_device_10de_0298[] = "GeForce Go 7900 GS";
+static const char pci_device_10de_0299[] = "GeForce Go 7900 GTX";
+static const char pci_device_10de_029a[] = "G71 [Quadro FX 2500M]";
+static const char pci_device_10de_029b[] = "G71 [Quadro FX 1500M]";
+static const char pci_device_10de_029c[] = "Quadro FX 5500";
+static const char pci_device_10de_029d[] = "Quadro FX 3500";
+static const char pci_device_10de_029e[] = "Quadro FX 1500";
+static const char pci_device_10de_029f[] = "Quadro FX 4500 X2";
 static const char pci_device_10de_02a0[] = "NV2A [XGPU]";
+static const char pci_device_10de_02e0[] = "GeForce 7600 GT";
+static const char pci_device_10de_02e1[] = "G73 [GeForce 7600 GS]";
+static const char pci_device_10de_02e2[] = "GeForce 7300 GT";
 static const char pci_device_10de_02f0[] = "C51 Host Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_02f0_1043_81cd[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_02f0_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_02f1[] = "C51 Host Bridge";
 static const char pci_device_10de_02f2[] = "C51 Host Bridge";
 static const char pci_device_10de_02f3[] = "C51 Host Bridge";
@@ -7992,13 +9161,43 @@
 static const char pci_device_10de_02f6[] = "C51 Host Bridge";
 static const char pci_device_10de_02f7[] = "C51 Host Bridge";
 static const char pci_device_10de_02f8[] = "C51 Memory Controller 5";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_02f8_1043_81cd[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_02f8_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_02f9[] = "C51 Memory Controller 4";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_02f9_1043_81cd[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_02f9_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_02fa[] = "C51 Memory Controller 0";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_02fa_1043_81cd[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_02fa_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_02fb[] = "C51 PCI Express Bridge";
 static const char pci_device_10de_02fc[] = "C51 PCI Express Bridge";
 static const char pci_device_10de_02fd[] = "C51 PCI Express Bridge";
 static const char pci_device_10de_02fe[] = "C51 Memory Controller 1";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_02fe_1043_81cd[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_02fe_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_02ff[] = "C51 Host Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_02ff_1043_81cd[] = "A8N-VM CSM Mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_02ff_1462_7207[] = "K8NGM2 series";
+#endif
 static const char pci_device_10de_0300[] = "NV30 [GeForce FX]";
 static const char pci_device_10de_0301[] = "NV30 [GeForce FX 5800 Ultra]";
 static const char pci_device_10de_0302[] = "NV30 [GeForce FX 5800]";
@@ -8023,13 +9222,16 @@
 static const char pci_device_10de_0321[] = "NV34 [GeForce FX 5200 Ultra]";
 static const char pci_device_10de_0322[] = "NV34 [GeForce FX 5200]";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0322_1043_02fb[] = "V9250 Magic";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0322_1462_9171[] = "MS-8917 (FX5200-T128)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0322_1462_9360[] = "MS-8936 (FX5200-T128)";
 #endif
 static const char pci_device_10de_0323[] = "NV34 [GeForce FX 5200LE]";
-static const char pci_device_10de_0324[] = "NV34M [GeForce FX Go5200]";
+static const char pci_device_10de_0324[] = "NV34M [GeForce FX Go5200 64M]";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10de_0324_1028_0196[] = "Inspiron 5160";
 #endif
@@ -8063,7 +9265,7 @@
 static const char pci_device_10de_0345[] = "NV36.5";
 static const char pci_device_10de_0347[] = "NV36 [GeForce FX Go5700]";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10de_0347_103c_006a[] = "nx9500";
+static const char pci_subsys_10de_0347_103c_006a[] = "NX9500";
 #endif
 static const char pci_device_10de_0348[] = "NV36 [GeForce FX Go5700]";
 static const char pci_device_10de_0349[] = "NV36M Pro";
@@ -8082,15 +9284,125 @@
 static const char pci_device_10de_0368[] = "MCP55 SMBus";
 static const char pci_device_10de_0369[] = "MCP55 Memory Controller";
 static const char pci_device_10de_036a[] = "MCP55 Memory Controller";
+static const char pci_device_10de_036b[] = "MCP55 SMU";
 static const char pci_device_10de_036c[] = "MCP55 USB Controller";
 static const char pci_device_10de_036d[] = "MCP55 USB Controller";
 static const char pci_device_10de_036e[] = "MCP55 IDE";
+static const char pci_device_10de_0370[] = "MCP55 PCI bridge";
 static const char pci_device_10de_0371[] = "MCP55 High Definition Audio";
 static const char pci_device_10de_0372[] = "MCP55 Ethernet";
 static const char pci_device_10de_0373[] = "MCP55 Ethernet";
+static const char pci_device_10de_0374[] = "MCP55 PCI Express bridge";
+static const char pci_device_10de_0375[] = "MCP55 PCI Express bridge";
+static const char pci_device_10de_0376[] = "MCP55 PCI Express bridge";
+static const char pci_device_10de_0377[] = "MCP55 PCI Express bridge";
+static const char pci_device_10de_0378[] = "MCP55 PCI Express bridge";
 static const char pci_device_10de_037a[] = "MCP55 Memory Controller";
 static const char pci_device_10de_037e[] = "MCP55 SATA Controller";
 static const char pci_device_10de_037f[] = "MCP55 SATA Controller";
+static const char pci_device_10de_0390[] = "GeForce 7650 GS";
+static const char pci_device_10de_0391[] = "G70 [GeForce 7600 GT]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0391_1458_3427[] = "GV-NX76T128D-RH";
+#endif
+static const char pci_device_10de_0392[] = "G70 [GeForce 7600 GS]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10de_0392_1462_0622[] = "NX7600GS-T2D256EH";
+#endif
+static const char pci_device_10de_0393[] = "G70 [GeForce 7300 GT]";
+static const char pci_device_10de_0394[] = "G70 [GeForce 7600 LE]";
+static const char pci_device_10de_0395[] = "G70 [GeForce 7300 GT]";
+static const char pci_device_10de_0397[] = "GeForce Go 7700";
+static const char pci_device_10de_0398[] = "G70 [GeForce Go 7600]";
+static const char pci_device_10de_039b[] = "GeForce Go 7900 SE";
+static const char pci_device_10de_039c[] = "Quadro FX 550M";
+static const char pci_device_10de_039e[] = "Quadro FX 560";
+static const char pci_device_10de_03a0[] = "C55 Host Bridge";
+static const char pci_device_10de_03a1[] = "C55 Host Bridge";
+static const char pci_device_10de_03a2[] = "C55 Host Bridge";
+static const char pci_device_10de_03a3[] = "C55 Host Bridge";
+static const char pci_device_10de_03a4[] = "C55 Host Bridge";
+static const char pci_device_10de_03a5[] = "C55 Host Bridge";
+static const char pci_device_10de_03a6[] = "C55 Host Bridge";
+static const char pci_device_10de_03a7[] = "C55 Host Bridge";
+static const char pci_device_10de_03a8[] = "C55 Memory Controller";
+static const char pci_device_10de_03a9[] = "C55 Memory Controller";
+static const char pci_device_10de_03aa[] = "C55 Memory Controller";
+static const char pci_device_10de_03ab[] = "C55 Memory Controller";
+static const char pci_device_10de_03ac[] = "C55 Memory Controller";
+static const char pci_device_10de_03ad[] = "C55 Memory Controller";
+static const char pci_device_10de_03ae[] = "C55 Memory Controller";
+static const char pci_device_10de_03af[] = "C55 Memory Controller";
+static const char pci_device_10de_03b0[] = "C55 Memory Controller";
+static const char pci_device_10de_03b1[] = "C55 Memory Controller";
+static const char pci_device_10de_03b2[] = "C55 Memory Controller";
+static const char pci_device_10de_03b3[] = "C55 Memory Controller";
+static const char pci_device_10de_03b4[] = "C55 Memory Controller";
+static const char pci_device_10de_03b5[] = "C55 Memory Controller";
+static const char pci_device_10de_03b6[] = "C55 Memory Controller";
+static const char pci_device_10de_03b7[] = "C55 PCI Express bridge";
+static const char pci_device_10de_03b8[] = "C55 PCI Express bridge";
+static const char pci_device_10de_03b9[] = "C55 PCI Express bridge";
+static const char pci_device_10de_03ba[] = "C55 Memory Controller";
+static const char pci_device_10de_03bb[] = "C55 PCI Express bridge";
+static const char pci_device_10de_03d0[] = "GeForce 6100 nForce 430";
+static const char pci_device_10de_03d1[] = "GeForce 6100 nForce 405";
+static const char pci_device_10de_03d2[] = "GeForce 6100 nForce 400";
+static const char pci_device_10de_03d5[] = "GeForce 6100 nForce 420";
+static const char pci_device_10de_03e0[] = "MCP61 LPC Bridge";
+static const char pci_device_10de_03e1[] = "MCP61 LPC Bridge";
+static const char pci_device_10de_03e2[] = "MCP61 LPC Bridge";
+static const char pci_device_10de_03e3[] = "MCP61 LPC Bridge";
+static const char pci_device_10de_03e4[] = "MCP61 High Definition Audio";
+static const char pci_device_10de_03e5[] = "MCP61 Ethernet";
+static const char pci_device_10de_03e6[] = "MCP61 Ethernet";
+static const char pci_device_10de_03e7[] = "MCP61 SATA Controller";
+static const char pci_device_10de_03e8[] = "MCP61 PCI Express bridge";
+static const char pci_device_10de_03e9[] = "MCP61 PCI Express bridge";
+static const char pci_device_10de_03ea[] = "MCP61 Memory Controller";
+static const char pci_device_10de_03eb[] = "MCP61 SMBus";
+static const char pci_device_10de_03ec[] = "MCP61 IDE";
+static const char pci_device_10de_03ee[] = "MCP61 Ethernet";
+static const char pci_device_10de_03ef[] = "MCP61 Ethernet";
+static const char pci_device_10de_03f0[] = "MCP61 High Definition Audio";
+static const char pci_device_10de_03f1[] = "MCP61 USB Controller";
+static const char pci_device_10de_03f2[] = "MCP61 USB Controller";
+static const char pci_device_10de_03f3[] = "MCP61 PCI bridge";
+static const char pci_device_10de_03f4[] = "MCP61 SMU";
+static const char pci_device_10de_03f5[] = "MCP61 Memory Controller";
+static const char pci_device_10de_03f6[] = "MCP61 SATA Controller";
+static const char pci_device_10de_03f7[] = "MCP61 SATA Controller";
+static const char pci_device_10de_0440[] = "MCP65 LPC Bridge";
+static const char pci_device_10de_0441[] = "MCP65 LPC Bridge";
+static const char pci_device_10de_0442[] = "MCP65 LPC Bridge";
+static const char pci_device_10de_0443[] = "MCP65 LPC Bridge";
+static const char pci_device_10de_0444[] = "MCP65 Memory Controller";
+static const char pci_device_10de_0445[] = "MCP65 Memory Controller";
+static const char pci_device_10de_0446[] = "MCP65 SMBus";
+static const char pci_device_10de_0447[] = "MCP65 SMU";
+static const char pci_device_10de_0448[] = "MCP65 IDE";
+static const char pci_device_10de_0449[] = "MCP65 PCI bridge";
+static const char pci_device_10de_044a[] = "MCP65 High Definition Audio";
+static const char pci_device_10de_044b[] = "MCP65 High Definition Audio";
+static const char pci_device_10de_044c[] = "MCP65 AHCI Controller";
+static const char pci_device_10de_044d[] = "MCP65 AHCI Controller";
+static const char pci_device_10de_044e[] = "MCP65 AHCI Controller";
+static const char pci_device_10de_044f[] = "MCP65 AHCI Controller";
+static const char pci_device_10de_0450[] = "MCP65 Ethernet";
+static const char pci_device_10de_0451[] = "MCP65 Ethernet";
+static const char pci_device_10de_0452[] = "MCP65 Ethernet";
+static const char pci_device_10de_0453[] = "MCP65 Ethernet";
+static const char pci_device_10de_0454[] = "MCP65 USB Controller";
+static const char pci_device_10de_0455[] = "MCP65 USB Controller";
+static const char pci_device_10de_0456[] = "MCP65 USB Controller";
+static const char pci_device_10de_0457[] = "MCP65 USB Controller";
+static const char pci_device_10de_0458[] = "MCP65 PCI Express bridge";
+static const char pci_device_10de_0459[] = "MCP65 PCI Express bridge";
+static const char pci_device_10de_045a[] = "MCP65 PCI Express bridge";
+static const char pci_device_10de_045c[] = "MCP65 SATA Controller";
+static const char pci_device_10de_045d[] = "MCP65 SATA Controller";
+static const char pci_device_10de_045e[] = "MCP65 SATA Controller";
+static const char pci_device_10de_045f[] = "MCP65 SATA Controller";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10df[] = "Emulex Corporation";
 static const char pci_device_10df_1ae5[] = "LP6000 Fibre Channel Host Adapter";
@@ -8145,11 +9457,13 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10e3[] = "Tundra Semiconductor Corp.";
 static const char pci_device_10e3_0000[] = "CA91C042 [Universe]";
+static const char pci_device_10e3_0108[] = "Tsi108 Host Bridge for Single PowerPC";
 static const char pci_device_10e3_0148[] = "Tsi148 [Tempe]";
 static const char pci_device_10e3_0860[] = "CA91C860 [QSpan]";
 static const char pci_device_10e3_0862[] = "CA91C862A [QSpan-II]";
 static const char pci_device_10e3_8260[] = "CA91L8200B [Dual PCI PowerSpan II]";
 static const char pci_device_10e3_8261[] = "CA91L8260B [Single PCI PowerSpan II]";
+static const char pci_device_10e3_a108[] = "Tsi109 Host Bridge for Dual PowerPC";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10e4[] = "Tandem Computers";
@@ -8179,10 +9493,12 @@
 static const char pci_device_10e8_80d7[] = "PCI-9112";
 static const char pci_device_10e8_80d9[] = "PCI-9118";
 static const char pci_device_10e8_80da[] = "PCI-9812";
+static const char pci_device_10e8_80fc[] = "APCI1500 Signal processing controller (16 dig. inputs + 16 dig. outputs)";
 static const char pci_device_10e8_811a[] = "PCI-IEEE1355-DS-DE Interface";
 static const char pci_device_10e8_814c[] = "Fastcom ESCC-PCI (Commtech, Inc.)";
 static const char pci_device_10e8_8170[] = "S5933 [Matchmaker] (Chipset Development Tool)";
 static const char pci_device_10e8_81e6[] = "Multimedia video controller";
+static const char pci_device_10e8_828d[] = "APCI3001 Signal processing controller (up to 16 analog inputs)";
 static const char pci_device_10e8_8291[] = "Fastcom 232/8-PCI (Commtech, Inc.)";
 static const char pci_device_10e8_82c4[] = "Fastcom 422/4-PCI (Commtech, Inc.)";
 static const char pci_device_10e8_82c5[] = "Fastcom 422/2-PCI (Commtech, Inc.)";
@@ -8191,6 +9507,8 @@
 static const char pci_device_10e8_82ca[] = "Fastcom 232/4-PCI (Commtech, Inc.)";
 static const char pci_device_10e8_82db[] = "AJA HDNTV HD SDI Framestore";
 static const char pci_device_10e8_82e2[] = "Fastcom DIO24H-PCI (Commtech, Inc.)";
+static const char pci_device_10e8_8406[] = "PCIcanx/PCIcan CAN interface [Kvaser AB]";
+static const char pci_device_10e8_8407[] = "PCIcan II CAN interface (A1021, PCB-07, PCB-08) [Kvaser AB]";
 static const char pci_device_10e8_8851[] = "S5933 on Innes Corp FM Radio Capture card";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -8214,6 +9532,19 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10ec[] = "Realtek Semiconductor Co., Ltd.";
 static const char pci_device_10ec_0139[] = "Zonet Zen3200";
+static const char pci_device_10ec_0260[] = "Realtek 260 High Definition Audio";
+static const char pci_device_10ec_0261[] = "Realtek 261 High Definition Audio";
+static const char pci_device_10ec_0280[] = "Realtek 280 High Definition Audio";
+static const char pci_device_10ec_0861[] = "Realtek 861 High Definition Audio";
+static const char pci_device_10ec_0862[] = "Realtek 862 High Definition Audio";
+static const char pci_device_10ec_0880[] = "Realtek 880 High Definition Audio";
+static const char pci_device_10ec_0883[] = "Realtek 883 High Definition Audio";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10ec_0883_1025_1605[] = "TravelMate 5600 series";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_device_10ec_0888[] = "Realtek 888 High Definition Audio";
 static const char pci_device_10ec_8029[] = "RTL-8029(AS)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10ec_8029_10b8_2011[] = "EZ-Card (SMC1208)";
@@ -8234,6 +9565,7 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10ec_8129_10ec_8129[] = "RT8129 Fast Ethernet Adapter";
 #endif
+static const char pci_device_10ec_8136[] = "RTL8101E PCI Express Fast Ethernet controller";
 static const char pci_device_10ec_8138[] = "RT8139 (B/C) Cardbus Fast Ethernet Adapter";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10ec_8138_10ec_8138[] = "RT8139 (B/C) Fast Ethernet Adapter";
@@ -8259,10 +9591,13 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10ec_8139_103c_006a[] = "nx9500";
+static const char pci_subsys_10ec_8139_103c_006a[] = "NX9500";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10ec_8139_1043_1045[] = "L8400B or L3C/S notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10ec_8139_1043_8109[] = "P5P800-MX Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -8275,6 +9610,9 @@
 static const char pci_subsys_10ec_8139_10ec_8139[] = "RT8139";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10ec_8139_10f7_8338[] = "Panasonic CF-Y5 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10ec_8139_1113_ec01[] = "FNC-0107TX";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -8305,6 +9643,9 @@
 static const char pci_subsys_10ec_8139_1436_8139[] = "RT8139";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10ec_8139_144d_c00c[] = "P30/P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10ec_8139_1458_e000[] = "GA-7VM400M/7VT600 Motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -8329,6 +9670,9 @@
 static const char pci_subsys_10ec_8139_14cb_0200[] = "LNR-100 Family 10/100 Base-TX Ethernet";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10ec_8139_1695_9001[] = "Onboard RTL8101L 10/100 MBit";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10ec_8139_1799_5000[] = "F5D5000 PCI Card/Desktop Network PCI Card";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -8344,12 +9688,19 @@
 static const char pci_subsys_10ec_8139_8e2e_7100[] = "KF-230TX/2";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10ec_8139_9001_1695[] = "Onboard RTL8101L 10/100 MBit";
+static const char pci_subsys_10ec_8139_a0a0_0007[] = "ALN-325C";
 #endif
+static const char pci_device_10ec_8167[] = "RTL-8110SC/8169SC Gigabit Ethernet";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_10ec_8139_a0a0_0007[] = "ALN-325C";
+static const char pci_subsys_10ec_8167_1462_235c[] = "P965 Neo MS-7235 mainboard";
 #endif
+static const char pci_device_10ec_8168[] = "RTL8111/8168B PCI Express Gigabit Ethernet controller";
 static const char pci_device_10ec_8169[] = "RTL-8169 Gigabit Ethernet";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10ec_8169_1025_0079[] = "Aspire 5024WLMi";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10ec_8169_1259_c107[] = "CG-LAPCIGT";
 #endif
@@ -8360,9 +9711,13 @@
 static const char pci_subsys_10ec_8169_1458_e000[] = "GA-8I915ME-G Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_10ec_8169_1462_030c[] = "K8N Neo-FSR v2.0 mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_10ec_8169_1462_702c[] = "K8T NEO 2 motherboard";
 #endif
 static const char pci_device_10ec_8180[] = "RTL8180L 802.11b MAC";
+static const char pci_device_10ec_8185[] = "RTL-8185 IEEE 802.11a/b/g Wireless LAN Controller";
 static const char pci_device_10ec_8197[] = "SmartLAN56 56K Modem";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -8384,6 +9739,7 @@
 static const char pci_device_10ee_3fc5[] = "RME Hammerfall DSP";
 static const char pci_device_10ee_3fc6[] = "RME Hammerfall DSP MADI";
 static const char pci_device_10ee_8381[] = "Ellips Santos Frame Grabber";
+static const char pci_device_10ee_d154[] = "Copley Controls CAN card (PCI-CAN-02)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10ef[] = "Racore Computer Products, Inc.";
@@ -8394,6 +9750,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10f1[] = "Tyan Computer";
+static const char pci_device_10f1_2865[] = "Tyan Thunder K8E S2865";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_10f2[] = "Achme Computer, Inc.";
@@ -8448,6 +9805,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1101[] = "Initio Corporation";
 static const char pci_device_1101_1060[] = "INI-A100U2W";
+static const char pci_device_1101_1622[] = "INI-1623 PCI SATA-II Controller";
 static const char pci_device_1101_9100[] = "INI-9100/9100W";
 static const char pci_device_1101_9400[] = "INI-940";
 static const char pci_device_1101_9401[] = "INI-950";
@@ -8524,11 +9882,24 @@
 static const char pci_subsys_1102_0004_1102_0058[] = "SB0090 Audigy Player/OEM";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1102_0004_1102_1002[] = "SB Audigy2 ZS";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1102_0004_1102_1007[] = "SB0240 Audigy 2 Platinum 6.1";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1102_0004_1102_2002[] = "SB Audigy 2 ZS (SB0350)";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1102_0004_1102_4001[] = "E-MU 1010";
+#endif
+static const char pci_device_1102_0005[] = "SB X-Fi";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1102_0005_1102_0021[] = "X-Fi Platinum";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1102_0005_1102_1003[] = "X-Fi XtremeMusic";
+#endif
 static const char pci_device_1102_0006[] = "[SB Live! Value] EMU10k1X";
 static const char pci_device_1102_0007[] = "SB Audigy LS";
 #ifdef INIT_SUBSYS_INFO
@@ -8554,16 +9925,16 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1102_4001_1102_0010[] = "SB Audigy FireWire Port";
 #endif
-static const char pci_device_1102_7002[] = "SB Live! MIDI/Game Port";
+static const char pci_device_1102_7002[] = "SB Live! Game Port";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1102_7002_1102_0020[] = "Gameport Joystick";
 #endif
-static const char pci_device_1102_7003[] = "SB Audigy MIDI/Game port";
+static const char pci_device_1102_7003[] = "SB Audigy Game Port";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1102_7003_1102_0040[] = "SB Audigy MIDI/Game Port";
 #endif
 static const char pci_device_1102_7004[] = "[SB Live! Value] Input device controller";
-static const char pci_device_1102_7005[] = "SB Audigy LS MIDI/Game port";
+static const char pci_device_1102_7005[] = "SB Audigy LS Game Port";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1102_7005_1102_1001[] = "SB0310 Audigy LS MIDI/Game port";
 #endif
@@ -8619,7 +9990,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1103[] = "Triones Technologies, Inc.";
-static const char pci_device_1103_0003[] = "HPT343";
+static const char pci_device_1103_0003[] = "HPT343/345/346/363";
 static const char pci_device_1103_0004[] = "HPT366/368/370/370A/372/372N";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1103_0004_1103_0001[] = "HPT370A";
@@ -8634,16 +10005,10 @@
 static const char pci_subsys_1103_0004_1103_0005[] = "HPT370 UDMA100";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1103_0004_1103_0006[] = "HPT302";
-#endif
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1103_0004_1103_0007[] = "HPT371 UDMA133";
-#endif
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1103_0004_1103_0008[] = "HPT374 UDMA/ATA133 RAID Controller";
+static const char pci_subsys_1103_0004_1103_0006[] = "HPT302/302N";
 #endif
 static const char pci_device_1103_0005[] = "HPT372A/372N";
-static const char pci_device_1103_0006[] = "HPT302";
+static const char pci_device_1103_0006[] = "HPT302/302N";
 static const char pci_device_1103_0007[] = "HPT371/371N";
 static const char pci_device_1103_0008[] = "HPT374";
 static const char pci_device_1103_0009[] = "HPT372N";
@@ -8674,7 +10039,9 @@
 static const char pci_vendor_1106[] = "VIA Technologies, Inc.";
 static const char pci_device_1106_0102[] = "Embedded VIA Ethernet Controller";
 static const char pci_device_1106_0130[] = "VT6305 1394.A Controller";
+static const char pci_device_1106_0198[] = "P4X600 Host Bridge";
 static const char pci_device_1106_0204[] = "K8M800 Host Bridge";
+static const char pci_device_1106_0208[] = "PT890 Host Bridge";
 static const char pci_device_1106_0238[] = "K8T890 Host Bridge";
 static const char pci_device_1106_0258[] = "PT880 Host Bridge";
 static const char pci_device_1106_0259[] = "CN400/PM880 Host Bridge";
@@ -8684,10 +10051,11 @@
 static const char pci_subsys_1106_0282_1043_80a3[] = "A8V Deluxe";
 #endif
 static const char pci_device_1106_0290[] = "K8M890 Host Bridge";
+static const char pci_device_1106_0293[] = "PM896 Host Bridge";
 static const char pci_device_1106_0296[] = "P4M800 Host Bridge";
 static const char pci_device_1106_0305[] = "VT8363/8365 [KT133/KM133]";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_0305_1019_0987[] = "K7VZA (Rev. 1.0)  Mainboard";
+static const char pci_subsys_1106_0305_1019_0987[] = "K7VZA Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_0305_1043_8033[] = "A7V Mainboard";
@@ -8702,7 +10070,16 @@
 static const char pci_subsys_1106_0305_147b_a401[] = "KT7/KT7-RAID/KT7A/KT7A-RAID Mainboard";
 #endif
 static const char pci_device_1106_0308[] = "PT894 Host Bridge";
-static const char pci_device_1106_0314[] = "P4M800CE Host Bridge";
+static const char pci_device_1106_0314[] = "CN700/VN800/P4M800CE/Pro Host Bridge";
+static const char pci_device_1106_0324[] = "CX700 Host Bridge";
+static const char pci_device_1106_0327[] = "P4M890 Host Bridge";
+static const char pci_device_1106_0336[] = "K8M890CE Host Bridge";
+static const char pci_device_1106_0340[] = "PT900 Host Bridge";
+static const char pci_device_1106_0351[] = "VT3351 Host Bridge";
+static const char pci_device_1106_0364[] = "P4M900 Host Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_0364_1043_81ce[] = "P5VD2-VM mothervoard";
+#endif
 static const char pci_device_1106_0391[] = "VT8371 [KX133]";
 static const char pci_device_1106_0501[] = "VT8501 [Apollo MVP4]";
 static const char pci_device_1106_0505[] = "VT82C505";
@@ -8745,7 +10122,7 @@
 static const char pci_subsys_1106_0571_147b_1407[] = "KV8-MAX3 motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_0571_1849_0571[] = "K7VT2 / K7VT6 motherboard";
+static const char pci_subsys_1106_0571_1849_0571[] = "K7VT2/K7VT6 motherboard";
 #endif
 static const char pci_device_1106_0576[] = "VT82C576 3V [Apollo Master]";
 static const char pci_device_1106_0585[] = "VT82C585VP [Apollo VP1/VPX]";
@@ -8824,9 +10201,16 @@
 static const char pci_device_1106_1269[] = "KT880 Host Bridge";
 static const char pci_device_1106_1282[] = "K8T800Pro Host Bridge";
 static const char pci_device_1106_1290[] = "K8M890 Host Bridge";
+static const char pci_device_1106_1293[] = "PM896 Host Bridge";
 static const char pci_device_1106_1296[] = "P4M800 Host Bridge";
 static const char pci_device_1106_1308[] = "PT894 Host Bridge";
-static const char pci_device_1106_1314[] = "P4M800CE Host Bridge";
+static const char pci_device_1106_1314[] = "CN700/VN800/P4M800CE/Pro Host Bridge";
+static const char pci_device_1106_1324[] = "CX700 Host Bridge";
+static const char pci_device_1106_1327[] = "P4M890 Host Bridge";
+static const char pci_device_1106_1336[] = "K8M890CE Host Bridge";
+static const char pci_device_1106_1340[] = "PT900 Host Bridge";
+static const char pci_device_1106_1351[] = "VT3351 Host Bridge";
+static const char pci_device_1106_1364[] = "P4M900 Host Bridge";
 static const char pci_device_1106_1571[] = "VT82C576M/VT82C586";
 static const char pci_device_1106_1595[] = "VT82C595/97 [Apollo VP2/97]";
 static const char pci_device_1106_2204[] = "K8M800 Host Bridge";
@@ -8837,11 +10221,18 @@
 static const char pci_device_1106_2269[] = "KT880 Host Bridge";
 static const char pci_device_1106_2282[] = "K8T800Pro Host Bridge";
 static const char pci_device_1106_2290[] = "K8M890 Host Bridge";
+static const char pci_device_1106_2293[] = "PM896 Host Bridge";
 static const char pci_device_1106_2296[] = "P4M800 Host Bridge";
 static const char pci_device_1106_2308[] = "PT894 Host Bridge";
-static const char pci_device_1106_2314[] = "P4M800CE Host Bridge";
+static const char pci_device_1106_2314[] = "CN700/VN800/P4M800CE/Pro Host Bridge";
+static const char pci_device_1106_2324[] = "CX700 Host Bridge";
+static const char pci_device_1106_2327[] = "P4M890 Host Bridge";
+static const char pci_device_1106_2336[] = "K8M890CE Host Bridge";
+static const char pci_device_1106_2340[] = "PT900 Host Bridge";
+static const char pci_device_1106_2351[] = "VT3351 Host Bridge";
+static const char pci_device_1106_2364[] = "P4M900 Host Bridge";
 static const char pci_device_1106_287a[] = "VT8251 PCI to PCI Bridge";
-static const char pci_device_1106_287b[] = "VT8251 PCI to PCIE Bridge";
+static const char pci_device_1106_287b[] = "VT8251 Host Bridge";
 static const char pci_device_1106_287c[] = "VT8251 PCIE Root Port";
 static const char pci_device_1106_287d[] = "VT8251 PCIE Root Port";
 static const char pci_device_1106_287e[] = "VT8251 Ultra VLINK Controller";
@@ -8899,7 +10290,7 @@
 #endif
 static const char pci_device_1106_3044[] = "IEEE 1394 Host Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3044_0574_086c[] = "K8N Diamond";
+static const char pci_subsys_1106_3044_0010_0001[] = "IEEE 1394 4port DCST 1394-3+1B";
 #endif
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -8907,12 +10298,15 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3044_1043_808a[] = "A8V Deluxe";
+static const char pci_subsys_1106_3044_1043_808a[] = "A8V Deluxe or A8N-VM CSM Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3044_1458_1000[] = "GA-7VT600-1394 Motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_3044_1462_207d[] = "K8NGM2 series motherboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3044_1462_702d[] = "K8T NEO 2 motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -8926,7 +10320,7 @@
 static const char pci_subsys_1106_3057_1019_0985[] = "P6VXA Motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3057_1019_0987[] = "K7VZA (Rev. 1.0)  Motherboard";
+static const char pci_subsys_1106_3057_1019_0987[] = "K7VZA Motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3057_1043_8033[] = "A7V Mainboard";
@@ -8958,7 +10352,7 @@
 static const char pci_subsys_1106_3058_1019_0985[] = "P6VXA Motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3058_1019_0987[] = "K7VZA (Rev. 1.0)  Motherboard";
+static const char pci_subsys_1106_3058_1019_0987[] = "K7VZA Motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3058_1043_1106[] = "A7V133/A7V133-C Mainboard";
@@ -8989,7 +10383,7 @@
 static const char pci_subsys_1106_3059_1043_80a1[] = "A7V8X-X Motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3059_1043_80b0[] = "A7V600/K8V Deluxe motherboard (ADI AD1980 codec [SoundMAX])";
+static const char pci_subsys_1106_3059_1043_80b0[] = "A7V600/K8V-X/K8V Deluxe motherboard (ADI AD1980 codec [SoundMAX])";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3059_1043_812a[] = "A8V Deluxe motherboard (Realtek ALC850 codec)";
@@ -9001,9 +10395,18 @@
 static const char pci_subsys_1106_3059_1106_4161[] = "K7VT2 motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_3059_1106_4170[] = "PCPartner P4M800-8237R Motherboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_3059_1106_4552[] = "Soyo KT-600 Dragon Plus (Realtek ALC 650)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3059_1297_c160[] = "FX41 motherboard (Realtek ALC650 codec)";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1106_3059_1413_147b[] = "KV8 Pro motherboard onboard audio";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3059_1458_a002[] = "GA-7VAX Onboard Audio (Realtek ALC650)";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -9016,19 +10419,19 @@
 static const char pci_subsys_1106_3059_147b_1407[] = "KV8-MAX3 motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3059_1849_9761[] = "K7VT6 motherboard";
-#endif
+static const char pci_subsys_1106_3059_1849_0850[] = "ASRock 775Dual-880 Pro onboard audio (Realtek ALC850)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3059_4005_4710[] = "MSI K7T266 Pro2-RU (MSI-6380 v2) onboard audio (Realtek/ALC 200/200P)";
+static const char pci_subsys_1106_3059_1849_9761[] = "K7VT6 motherboard";
 #endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3059_4170_1106[] = "PCPartner P4M800-8237R Motherboard";
+static const char pci_subsys_1106_3059_3005_1695[] = "EP-8KMM3I motherboard onboard audio (Realtek ALC655)";
+#endif
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3059_4552_1106[] = "Soyo KT-600 Dragon Plus (Realtek ALC 650)";
+static const char pci_subsys_1106_3059_4005_4710[] = "MSI K7T266 Pro2-RU (MSI-6380 v2) onboard audio (Realtek/ALC 200/200P)";
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3059_a0a0_01b6[] = "AK77-8XN onboard audio";
 #endif
@@ -9156,6 +10559,7 @@
 static const char pci_subsys_1106_3149_1849_3149[] = "K7VT6 motherboard";
 #endif
 static const char pci_device_1106_3156[] = "P/KN266 Host Bridge";
+static const char pci_device_1106_3157[] = "CX700M2 UniChrome PRO II Graphics";
 static const char pci_device_1106_3164[] = "VT6410 ATA133 RAID controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3164_1043_80f4[] = "P4P800 Mainboard Deluxe ATX";
@@ -9214,7 +10618,7 @@
 static const char pci_subsys_1106_3227_1043_80ed[] = "A7V600/K8V-X/A8V Deluxe motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1106_3227_1106_3227[] = "DFI KT600-AL Motherboard";
+static const char pci_subsys_1106_3227_1106_3227[] = "DFI KT600-AL / Soltek SL-B9D-FGR Motherboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3227_1458_5001[] = "GA-7VT600 Motherboard";
@@ -9225,8 +10629,12 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1106_3227_1849_3227[] = "K7VT4 motherboard";
 #endif
+static const char pci_device_1106_3230[] = "K8M890 [Chrome9] Integrated Video";
 static const char pci_device_1106_3238[] = "K8T890 Host Bridge";
 static const char pci_device_1106_3249[] = "VT6421 IDE RAID Controller";
+static const char pci_device_1106_324a[] = "CX700 PCI to PCI Bridge";
+static const char pci_device_1106_324b[] = "CX700 Host Bridge";
+static const char pci_device_1106_324e[] = "CX700 Internal Module Bus";
 static const char pci_device_1106_3258[] = "PT880 Host Bridge";
 static const char pci_device_1106_3259[] = "CN400/PM880 Host Bridge";
 static const char pci_device_1106_3269[] = "KT880 Host Bridge";
@@ -9235,11 +10643,19 @@
 static const char pci_device_1106_3288[] = "VIA High Definition Audio Controller";
 static const char pci_device_1106_3290[] = "K8M890 Host Bridge";
 static const char pci_device_1106_3296[] = "P4M800 Host Bridge";
+static const char pci_device_1106_3324[] = "CX700 Host Bridge";
+static const char pci_device_1106_3327[] = "P4M890 Host Bridge";
+static const char pci_device_1106_3336[] = "K8M890CE Host Bridge";
 static const char pci_device_1106_3337[] = "VT8237A PCI to ISA Bridge";
+static const char pci_device_1106_3340[] = "PT900 Host Bridge";
 static const char pci_device_1106_3344[] = "UniChrome Pro IGP";
 static const char pci_device_1106_3349[] = "VT8251 AHCI/SATA 4-Port Controller";
+static const char pci_device_1106_3351[] = "VT3351 Host Bridge";
+static const char pci_device_1106_3364[] = "P4M900 Host Bridge";
+static const char pci_device_1106_3371[] = "Chrome9 HC IGP";
+static const char pci_device_1106_3372[] = "VT8237S PCI to ISA Bridge";
 static const char pci_device_1106_337a[] = "VT8237A PCI to PCI Bridge";
-static const char pci_device_1106_337b[] = "VT8237A PCI to PCIE Bridge";
+static const char pci_device_1106_337b[] = "VT8237A Host Bridge";
 static const char pci_device_1106_4149[] = "VIA VT6420 (ATA133) Controller";
 static const char pci_device_1106_4204[] = "K8M800 Host Bridge";
 static const char pci_device_1106_4208[] = "PT890 Host Bridge";
@@ -9249,15 +10665,30 @@
 static const char pci_device_1106_4269[] = "KT880 Host Bridge";
 static const char pci_device_1106_4282[] = "K8T800Pro Host Bridge";
 static const char pci_device_1106_4290[] = "K8M890 Host Bridge";
+static const char pci_device_1106_4293[] = "PM896 Host Bridge";
 static const char pci_device_1106_4296[] = "P4M800 Host Bridge";
 static const char pci_device_1106_4308[] = "PT894 Host Bridge";
-static const char pci_device_1106_4314[] = "P4M800CE Host Bridge";
+static const char pci_device_1106_4314[] = "CN700/VN800/P4M800CE/Pro Host Bridge";
+static const char pci_device_1106_4324[] = "CX700 Host Bridge";
+static const char pci_device_1106_4327[] = "P4M890 Host Bridge";
+static const char pci_device_1106_4336[] = "K8M890CE Host Bridge";
+static const char pci_device_1106_4340[] = "PT900 Host Bridge";
+static const char pci_device_1106_4351[] = "VT3351 Host Bridge";
+static const char pci_device_1106_4364[] = "P4M900 Host Bridge";
 static const char pci_device_1106_5030[] = "VT82C596 ACPI [Apollo PRO]";
 static const char pci_device_1106_5208[] = "PT890 I/O APIC Interrupt Controller";
 static const char pci_device_1106_5238[] = "K8T890 I/O APIC Interrupt Controller";
 static const char pci_device_1106_5290[] = "K8M890 I/O APIC Interrupt Controller";
 static const char pci_device_1106_5308[] = "PT894 I/O APIC Interrupt Controller";
+static const char pci_device_1106_5324[] = "CX700M2 IDE";
+static const char pci_device_1106_5327[] = "P4M890 I/O APIC Interrupt Controller";
+static const char pci_device_1106_5336[] = "K8M890CE I/O APIC Interrupt Controller";
+static const char pci_device_1106_5340[] = "PT900 I/O APIC Interrupt Controller";
+static const char pci_device_1106_5351[] = "VT3351 I/O APIC Interrupt Controller";
+static const char pci_device_1106_5364[] = "P4M900 I/O APIC Interrupt Controller";
 static const char pci_device_1106_6100[] = "VT85C100A [Rhine II]";
+static const char pci_device_1106_6327[] = "P4M890 Security Device";
+static const char pci_device_1106_6364[] = "P4M900 Security Device";
 static const char pci_device_1106_7204[] = "K8M800 Host Bridge";
 static const char pci_device_1106_7205[] = "VT8378 [S3 UniChrome] Integrated Video";
 #ifdef INIT_SUBSYS_INFO
@@ -9270,12 +10701,20 @@
 static const char pci_device_1106_7269[] = "KT880 Host Bridge";
 static const char pci_device_1106_7282[] = "K8T800Pro Host Bridge";
 static const char pci_device_1106_7290[] = "K8M890 Host Bridge";
+static const char pci_device_1106_7293[] = "PM896 Host Bridge";
 static const char pci_device_1106_7296[] = "P4M800 Host Bridge";
 static const char pci_device_1106_7308[] = "PT894 Host Bridge";
-static const char pci_device_1106_7314[] = "P4M800CE Host Bridge";
+static const char pci_device_1106_7314[] = "CN700/VN800/P4M800CE/Pro Host Bridge";
+static const char pci_device_1106_7324[] = "CX700 Host Bridge";
+static const char pci_device_1106_7327[] = "P4M890 Host Bridge";
+static const char pci_device_1106_7336[] = "K8M890CE Host Bridge";
+static const char pci_device_1106_7340[] = "PT900 Host Bridge";
+static const char pci_device_1106_7351[] = "VT3351 Host Bridge";
+static const char pci_device_1106_7364[] = "P4M900 Host Bridge";
 static const char pci_device_1106_8231[] = "VT8231 [PCI-to-ISA Bridge]";
 static const char pci_device_1106_8235[] = "VT8235 ACPI";
 static const char pci_device_1106_8305[] = "VT8363/8365 [KT133/KM133 AGP]";
+static const char pci_device_1106_8324[] = "CX700 PCI to ISA Bridge";
 static const char pci_device_1106_8391[] = "VT8371 [KX133 AGP]";
 static const char pci_device_1106_8501[] = "VT8501 [Apollo MVP4 AGP]";
 static const char pci_device_1106_8596[] = "VT82C596 [Apollo PRO AGP]";
@@ -9290,6 +10729,8 @@
 static const char pci_device_1106_8693[] = "VT82C693 [Apollo Pro Plus] PCI Bridge";
 static const char pci_device_1106_a208[] = "PT890 PCI to PCI Bridge Controller";
 static const char pci_device_1106_a238[] = "K8T890 PCI to PCI Bridge Controller";
+static const char pci_device_1106_a327[] = "P4M890 PCI to PCI Bridge Controller";
+static const char pci_device_1106_a364[] = "P4M900 PCI to PCI Bridge Controller";
 static const char pci_device_1106_b091[] = "VT8633 [Apollo Pro266 AGP]";
 static const char pci_device_1106_b099[] = "VT8366/A/7 [Apollo KT266/A/333 AGP]";
 static const char pci_device_1106_b101[] = "VT8653 AGP Bridge";
@@ -9305,16 +10746,23 @@
 #endif
 static const char pci_device_1106_b198[] = "VT8237 PCI Bridge";
 static const char pci_device_1106_b213[] = "VPX/VPX2 I/O APIC Interrupt Controller";
+static const char pci_device_1106_b999[] = "[K8T890 North / VT8237 South] PCI Bridge";
 static const char pci_device_1106_c208[] = "PT890 PCI to PCI Bridge Controller";
 static const char pci_device_1106_c238[] = "K8T890 PCI to PCI Bridge Controller";
+static const char pci_device_1106_c327[] = "P4M890 PCI to PCI Bridge Controller";
+static const char pci_device_1106_c340[] = "PT900 PCI to PCI Bridge Controller";
+static const char pci_device_1106_c364[] = "P4M900 PCI to PCI Bridge Controller";
 static const char pci_device_1106_d104[] = "VT8237 Integrated Fast Ethernet Controller";
 static const char pci_device_1106_d208[] = "PT890 PCI to PCI Bridge Controller";
 static const char pci_device_1106_d213[] = "VPX/VPX2 PCI to PCI Bridge Controller";
 static const char pci_device_1106_d238[] = "K8T890 PCI to PCI Bridge Controller";
+static const char pci_device_1106_d340[] = "PT900 PCI to PCI Bridge Controller";
 static const char pci_device_1106_e208[] = "PT890 PCI to PCI Bridge Controller";
 static const char pci_device_1106_e238[] = "K8T890 PCI to PCI Bridge Controller";
+static const char pci_device_1106_e340[] = "PT900 PCI to PCI Bridge Controller";
 static const char pci_device_1106_f208[] = "PT890 PCI to PCI Bridge Controller";
 static const char pci_device_1106_f238[] = "K8T890 PCI to PCI Bridge Controller";
+static const char pci_device_1106_f340[] = "PT900 PCI to PCI Bridge Controller";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1107[] = "Stratus Computers";
@@ -9588,6 +11036,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1124[] = "Leutron Vision AG";
+static const char pci_device_1124_2581[] = "Picport Monochrome";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1125[] = "Eurocore";
@@ -9637,7 +11086,13 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1131[] = "Philips Semiconductors";
 static const char pci_device_1131_1561[] = "USB 1.1 Host Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_1561_1775_c200[] = "C2K onboard USB 1.1 host controller";
+#endif
 static const char pci_device_1131_1562[] = "USB 2.0 Host Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_1562_1775_c200[] = "C2K onboard USB 2.0 host controller";
+#endif
 static const char pci_device_1131_3400[] = "SmartPCI56(UCB1500) 56K Modem";
 static const char pci_device_1131_5400[] = "TriMedia TM1000/1100";
 static const char pci_device_1131_5402[] = "TriMedia TM-1300";
@@ -9690,9 +11145,6 @@
 static const char pci_subsys_1131_7133_0000_4091[] = "Beholder BeholdTV 409 FM";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7133_002b_11bd[] = "Pinnacle PCTV Stereo";
-#endif
-#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1131_7133_1019_4cb5[] = "Elitegroup ECS TVP3XP FM1236 Tuner Card (NTSC,FM)";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -9708,6 +11160,9 @@
 static const char pci_subsys_1131_7133_1043_4862[] = "P7131 Dual";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7133_1131_0000[] = "KWorld V-Stream Studio TV Terminator";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1131_7133_1131_2001[] = "Proteus Pro [philips reference design]";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -9717,12 +11172,18 @@
 static const char pci_subsys_1131_7133_1131_4ee9[] = "MonsterTV Mobile";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7133_11bd_002b[] = "PCTV Stereo";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1131_7133_11bd_002e[] = "PCTV 110i (saa7133)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1131_7133_12ab_0800[] = "PURPLE TV";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7133_1421_0335[] = "Instant TV DVB-T Cardbus";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1131_7133_1421_1370[] = "Instant TV (saa7135)";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -9753,24 +11214,39 @@
 static const char pci_subsys_1131_7133_153b_1162[] = "Terratec Cinergy 400 mobile";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7133_17de_7350[] = "ATSC 110 Digital / Analog HDTV Tuner";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1131_7133_185b_c100[] = "VideoMate TV";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7133_4e42_0212[] = "LifeView FlyTV Platinum Mini";
+static const char pci_subsys_1131_7133_5168_0306[] = "LifeView FlyDVB-T DUO";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7133_4e42_0502[] = "Typhoon DVB-T Duo Digital/Analog Cardbus";
+static const char pci_subsys_1131_7133_5168_0319[] = "LifeView FlyDVB Trio";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7133_5168_0306[] = "LifeView FlyDVB-T DUO";
+static const char pci_subsys_1131_7133_5168_0502[] = "LifeView FlyDVB-T Duo CardBus";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7133_5168_0319[] = "LifeView FlyDVB Trio";
+static const char pci_subsys_1131_7133_5168_0520[] = "LifeView FlyDVB Trio CardBus";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7133_5168_1502[] = "LifeView FlyTV CardBus";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7133_5168_2502[] = "LifeView FlyDVB-T CardBus";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7133_5168_2520[] = "LifeView FlyDVB-S Duo CardBus";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7133_5168_3502[] = "LifeView FlyDVB-T Hybrid CardBus";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7133_5456_7135[] = "GoTView 7135 PCI";
+static const char pci_subsys_1131_7133_5168_3520[] = "LifeView FlyDVB Trio N CardBus";
 #endif
-static const char pci_device_1131_7134[] = "SAA7134 Video Broadcast Decoder";
+static const char pci_device_1131_7134[] = "SAA7134/SAA7135HL Video Broadcast Decoder";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1131_7134_1019_4cb4[] = "Elitegroup ECS TVP3XP FM1216 Tuner Card(PAL-BG,FM)";
 #endif
@@ -9781,6 +11257,9 @@
 static const char pci_subsys_1131_7134_1043_4840[] = "ASUS TV-FM 7134";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7134_1043_4842[] = "TV-FM 7134";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1131_7134_1131_2004[] = "EUROPA V3 reference design";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -9790,10 +11269,13 @@
 static const char pci_subsys_1131_7134_1131_6752[] = "EMPRESS";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7134_11bd_002b[] = "Pinnacle PCTV Stereo (saa7134)";
+static const char pci_subsys_1131_7134_11bd_002b[] = "PCTV Stereo";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7134_11bd_002d[] = "PCTV 300i DVB-T + PAL";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7134_11bd_002d[] = "Pinnacle PCTV 300i DVB-T + PAL";
+static const char pci_subsys_1131_7134_1461_2c00[] = "AverTV Hybrid+FM PCI";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1131_7134_1461_9715[] = "AVerTV Studio 307";
@@ -9837,9 +11319,6 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1131_7134_1894_fe01[] = "KNC One TV-Station RDS / Typhoon TV Tuner RDS";
 #endif
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7134_4e42_0138[] = "LifeView FlyVIDEO3000";
-#endif
 static const char pci_device_1131_7145[] = "SAA7145";
 static const char pci_device_1131_7146[] = "SAA7146";
 #ifdef INIT_SUBSYS_INFO
@@ -9897,22 +11376,25 @@
 static const char pci_subsys_1131_7146_13c2_000a[] = "Octal/Technotrend DVB-C for iTV";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7146_13c2_1003[] = "Technotrend-Budget / Hauppauge WinTV-NOVA-S DVB card";
+static const char pci_subsys_1131_7146_13c2_1003[] = "Technotrend-Budget/Hauppauge WinTV-NOVA-S DVB card";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7146_13c2_1004[] = "Technotrend-Budget/Hauppauge WinTV-NOVA-C DVB card";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7146_13c2_1004[] = "Technotrend-Budget / Hauppauge WinTV-NOVA-C DVB card";
+static const char pci_subsys_1131_7146_13c2_1005[] = "Technotrend-Budget/Hauppauge WinTV-NOVA-T DVB card";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7146_13c2_1005[] = "Technotrend-Budget / Hauppauge WinTV-NOVA-T DVB card";
+static const char pci_subsys_1131_7146_13c2_100c[] = "Technotrend-Budget/Hauppauge WinTV-NOVA-CI DVB card";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7146_13c2_100c[] = "Technotrend-Budget / Hauppauge WinTV-NOVA-CI DVB card";
+static const char pci_subsys_1131_7146_13c2_100f[] = "Technotrend-Budget/Hauppauge WinTV-NOVA-CI DVB card";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7146_13c2_100f[] = "Technotrend-Budget / Hauppauge WinTV-NOVA-CI DVB card";
+static const char pci_subsys_1131_7146_13c2_1011[] = "Technotrend-Budget/Hauppauge WinTV-NOVA-T DVB card";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1131_7146_13c2_1011[] = "Technotrend-Budget / Hauppauge WinTV-NOVA-T DVB card";
+static const char pci_subsys_1131_7146_13c2_1012[] = "DVB T-1500";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1131_7146_13c2_1013[] = "SATELCO Multimedia DVB";
@@ -9921,9 +11403,21 @@
 static const char pci_subsys_1131_7146_13c2_1016[] = "WinTV-NOVA-SE DVB card";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7146_13c2_1018[] = "DVB S-1401";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7146_13c2_1019[] = "S2-3200";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1131_7146_13c2_1102[] = "Technotrend/Hauppauge DVB card rev2.1";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_7146_153b_1156[] = "Terratec Cynergy 1200C";
+#endif
 static const char pci_device_1131_9730[] = "SAA9730 Integrated Multimedia and Peripheral Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1131_9730_1131_0000[] = "Integrated Multimedia and Peripheral Controller";
+#endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1132[] = "Mitel Corp.";
@@ -10033,6 +11527,7 @@
 #endif
 static const char pci_device_1133_e01e[] = "Diva Server 2PRI";
 static const char pci_device_1133_e020[] = "Diva Server 4PRI";
+static const char pci_device_1133_e022[] = "Diva Server Analog-2P";
 static const char pci_device_1133_e024[] = "Diva Server Analog-4P";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1133_e024_1133_2400[] = "Diva Server V-Analog-4P";
@@ -10253,7 +11748,7 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1148_4300_1259_2977[] = "AT-2970TX/2TX Gigabit Ethernet Adapter";
 #endif
-static const char pci_device_1148_4320[] = "SysKonnect SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter, PCI64, Fiber ZX/SC";
+static const char pci_device_1148_4320[] = "SK-9871 V2.0 Gigabit Ethernet 1000Base-ZX Adapter, PCI64, Fiber ZX/SC";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1148_4320_1148_0121[] = "Marvell RDK-8001 Adapter";
 #endif
@@ -10370,6 +11865,7 @@
 static const char pci_device_114f_000d[] = "SyncPort 2-Port (x.25/FR)";
 static const char pci_device_114f_0011[] = "AccelePort 8r EIA-232 (IBM)";
 static const char pci_device_114f_0012[] = "AccelePort 8r EIA-422";
+static const char pci_device_114f_0013[] = "AccelePort Xr";
 static const char pci_device_114f_0014[] = "AccelePort 8r EIA-422";
 static const char pci_device_114f_0015[] = "AccelePort Xem";
 static const char pci_device_114f_0016[] = "AccelePort EPC/X";
@@ -10611,10 +12107,18 @@
 static const char pci_device_1166_0017[] = "GCNB-LE Host Bridge";
 static const char pci_device_1166_0036[] = "HT1000 PCI/PCI-X bridge";
 static const char pci_device_1166_0101[] = "CIOB-X2 PCI-X I/O Bridge";
+static const char pci_device_1166_0103[] = "EPB PCI-Express to PCI-X Bridge";
 static const char pci_device_1166_0104[] = "HT1000 PCI/PCI-X bridge";
 static const char pci_device_1166_0110[] = "CIOB-E I/O Bridge with Gigabit Ethernet";
-static const char pci_device_1166_0130[] = "HT1000 PCI-X bridge";
-static const char pci_device_1166_0132[] = "HT1000 PCI-Express bridge";
+static const char pci_device_1166_0130[] = "HT2000 PCI-X bridge";
+static const char pci_device_1166_0132[] = "HT2000 PCI-Express bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1166_0132_1166_0132[] = "HT2000 PCI-Express bridge";
+#endif
+static const char pci_device_1166_0140[] = "HT2100 PCI-Express Bridge";
+static const char pci_device_1166_0141[] = "HT2100 PCI-Express Bridge";
+static const char pci_device_1166_0142[] = "HT2100 PCI-Express Bridge";
+static const char pci_device_1166_0144[] = "HT2100 PCI-Express Bridge";
 static const char pci_device_1166_0200[] = "OSB4 South Bridge";
 static const char pci_device_1166_0201[] = "CSB5 South Bridge";
 #ifdef INIT_SUBSYS_INFO
@@ -10633,6 +12137,11 @@
 static const char pci_device_1166_0213[] = "CSB6 RAID/IDE Controller";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1166_0213_1028_4134[] = "PowerEdge 600SC";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1166_0213_1028_c134[] = "Poweredge SC600";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -10669,6 +12178,7 @@
 static const char pci_device_1166_0241[] = "RAIDCore RC4000";
 static const char pci_device_1166_0242[] = "RAIDCore BC4000";
 static const char pci_device_1166_024a[] = "BCM5785 (HT1000) SATA Native SATA Mode";
+static const char pci_device_1166_024b[] = "BCM5785 (HT1000) PATA/IDE Mode";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1167[] = "Mutoh Industries Inc";
@@ -10814,9 +12324,23 @@
 static const char pci_subsys_1180_0476_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0476_104d_814e[] = "VAIO GRZ390Z";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0476_10f7_8338[] = "Panasonic CF-Y5 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0476_144d_c00c[] = "P30/P35 notebook";
+#endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1180_0476_14ef_0220[] = "PCD-RP-220S";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0476_17aa_201c[] = "Thinkpad X60s";
+#endif
 static const char pci_device_1180_0477[] = "RL5c477";
 static const char pci_device_1180_0478[] = "RL5c478";
 #ifdef INIT_SUBSYS_INFO
@@ -10843,6 +12367,12 @@
 static const char pci_subsys_1180_0552_1028_0188[] = "Inspiron 6000 laptop";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0552_144d_c00c[] = "P30/P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0552_17aa_201e[] = "Thinkpad X60s";
+#endif
 static const char pci_device_1180_0554[] = "R5C554";
 static const char pci_device_1180_0575[] = "R5C575 SD Bus Host Adapter";
 static const char pci_device_1180_0576[] = "R5C576 SD Bus Host Adapter";
@@ -10850,11 +12380,17 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1180_0592_1043_1967[] = "V6800V";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0592_144d_c018[] = "X20 IV";
+#endif
 static const char pci_device_1180_0811[] = "R5C811";
 static const char pci_device_1180_0822[] = "R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1180_0822_1014_0556[] = "Thinkpad X40";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0822_1014_0598[] = "Thinkpad Z60m";
+#endif
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1180_0822_1028_0188[] = "Inspiron 6000 laptop";
@@ -10868,6 +12404,16 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1180_0822_1043_1967[] = "ASUS V6800V";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0822_10f7_8338[] = "Panasonic CF-Y5 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0822_144d_c018[] = "X20 IV";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1180_0822_17aa_201d[] = "Thinkpad X60s";
+#endif
+static const char pci_device_1180_0832[] = "R5C832 IEEE 1394 Controller";
 static const char pci_device_1180_0841[] = "R5C841 CardBus/SD/SDIO/MMC/MS/MSPro/xD/IEEE1394";
 static const char pci_device_1180_0852[] = "xD-Picture Card Controller";
 #ifdef INIT_SUBSYS_INFO
@@ -10891,7 +12437,7 @@
 static const char pci_device_1186_0100[] = "DC21041";
 static const char pci_device_1186_1002[] = "DL10050 Sundance Ethernet";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1186_1002_1186_1002[] = "DFE-550TX";
+static const char pci_subsys_1186_1002_1186_1002[] = "DFE-550TX/FX";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1186_1002_1186_1012[] = "DFE-580TX";
@@ -10910,6 +12456,7 @@
 static const char pci_subsys_1186_1300_1186_1303[] = "DFE-528TX 10/100 Fast Ethernet PCI Adapter";
 #endif
 static const char pci_device_1186_1340[] = "DFE-690TXD CardBus PC Card";
+static const char pci_device_1186_1405[] = "DFE-520TX Fast Ethernet PCI Adapter";
 static const char pci_device_1186_1541[] = "DFE-680TXD CardBus PC Card";
 static const char pci_device_1186_1561[] = "DRP-32TXD Cardbus PC Card";
 static const char pci_device_1186_2027[] = "AirPlus Xtreme G DWL-G520 Adapter";
@@ -10928,6 +12475,8 @@
 static const char pci_device_1186_3a63[] = "AirXpert DWL-AG660 Wireless Cardbus Adapter";
 static const char pci_device_1186_4000[] = "DL2000-based Gigabit Ethernet";
 static const char pci_device_1186_4300[] = "DGE-528T Gigabit Ethernet Adapter";
+static const char pci_device_1186_4800[] = "DGE-530T Gigabit Ethernet Adapter (rev 11)";
+static const char pci_device_1186_4b01[] = "DGE-530T Gigabit Ethernet Adapter (rev 11)";
 static const char pci_device_1186_4c00[] = "Gigabit Ethernet Adapter";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1186_4c00_1186_4c00[] = "DGE-530T Gigabit Ethernet Adapter";
@@ -11089,6 +12638,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_11ab[] = "Marvell Technology Group Ltd.";
 static const char pci_device_11ab_0146[] = "GT-64010/64010A System Controller";
+static const char pci_device_11ab_11ab[] = "MV88SE614x SATA II PCI-E controller";
 static const char pci_device_11ab_138f[] = "W8300 802.11 Adapter (rev 07)";
 static const char pci_device_11ab_1fa6[] = "Marvell W8300 802.11 Adapter";
 static const char pci_device_11ab_1fa7[] = "88W8310 and 88W8000G [Libertas] 802.11g client chipset";
@@ -11096,6 +12646,7 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_11ab_1faa_1385_4e00[] = "WG511 v2 54MBit/ Wireless PC-Card";
 #endif
+static const char pci_device_11ab_2a01[] = "88W8335 [Libertas] 802.11b/g Wireless";
 static const char pci_device_11ab_4320[] = "88E8001 Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_11ab_4320_1019_0f38[] = "Marvell 88E8001 Gigabit Ethernet Controller (ECS)";
@@ -11125,6 +12676,9 @@
 static const char pci_subsys_11ab_4320_11ab_1021[] = "Marvell RDK-8010";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_11ab_4320_11ab_4320[] = "Marvell Yukon Gigabit Ethernet 10/100/1000Baset-T Constroller (Asus)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_11ab_4320_11ab_5021[] = "Marvell Yukon Gigabit Ethernet 10/100/1000Base-T Controller (64 bit)";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -11156,6 +12710,9 @@
 static const char pci_device_11ab_4345[] = "88E8022 PCI-X IPMI Gigabit Ethernet Controller";
 static const char pci_device_11ab_4346[] = "88E8061 PCI-E IPMI Gigabit Ethernet Controller";
 static const char pci_device_11ab_4347[] = "88E8062 PCI-E IPMI Gigabit Ethernet Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_11ab_4347_4c53_10d0[] = "Telum ASLP10 PrAMC Gigabit Ethernet";
+#endif
 static const char pci_device_11ab_4350[] = "88E8035 PCI-E Fast Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_11ab_4350_1179_0001[] = "Marvell 88E8035 Fast Ethernet Controller (Toshiba)";
@@ -11424,6 +12981,7 @@
 static const char pci_subsys_11ab_4362_a0a0_0506[] = "Marvell 88E8053 Gigabit Ethernet Controller (Aopen)";
 #endif
 static const char pci_device_11ab_4363[] = "88E8055 PCI-E Gigabit Ethernet Controller";
+static const char pci_device_11ab_4364[] = "88E8056 PCI-E Gigabit Ethernet Controller";
 static const char pci_device_11ab_4611[] = "GT-64115 System Controller";
 static const char pci_device_11ab_4620[] = "GT-64120/64120A/64121A System Controller";
 static const char pci_device_11ab_4801[] = "GT-48001";
@@ -11434,8 +12992,15 @@
 static const char pci_device_11ab_5081[] = "MV88SX5081 8-port SATA I PCI-X Controller";
 static const char pci_device_11ab_6041[] = "MV88SX6041 4-port SATA II PCI-X Controller";
 static const char pci_device_11ab_6081[] = "MV88SX6081 8-port SATA II PCI-X Controller";
+static const char pci_device_11ab_6101[] = "88SE6101 single-port PATA133 interface";
+static const char pci_device_11ab_6141[] = "88SE614x SATA II PCI-E controller";
+static const char pci_device_11ab_6450[] = "64560 System Controller";
 static const char pci_device_11ab_6460[] = "MV64360/64361/64362 System Controller";
 static const char pci_device_11ab_6480[] = "MV64460/64461/64462 System Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_11ab_6480_1775_c200[] = "C2K CompactPCI single board computer";
+#endif
+static const char pci_device_11ab_6485[] = "MV64460/64461/64462 System Controller, Revision B";
 static const char pci_device_11ab_f003[] = "GT-64010 Primary Image Piranha Image Generator";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -11521,7 +13086,19 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_11bd[] = "Pinnacle Systems Inc.";
 static const char pci_device_11bd_002e[] = "PCTV 40i";
-static const char pci_device_11bd_bede[] = "Pinnacle AV/DV Studio Capture Card";
+static const char pci_device_11bd_0040[] = "Royal TS Function 1";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_11bd_0040_11bd_0044[] = "PCTV 2000i Dual DVB-T Pro PCI Tuner 1";
+#endif
+static const char pci_device_11bd_0041[] = "RoyalTS Function 2";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_11bd_0041_11bd_0044[] = "PCTV 2000i Dual DVB-T Pro PCI Tuner 2";
+#endif
+static const char pci_device_11bd_0042[] = "Royal TS Function 3";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_11bd_0042_11bd_0044[] = "PCTV 2000i Dual DVB-T Pro PCI Common";
+#endif
+static const char pci_device_11bd_bede[] = "AV/DV Studio Capture Card";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_11be[] = "International Microcircuits Inc";
@@ -11804,6 +13381,8 @@
 static const char pci_device_11c1_0480[] = "Venus Modem (V90, 56KFlex)";
 static const char pci_device_11c1_048c[] = "V.92 56K WinModem";
 static const char pci_device_11c1_048f[] = "V.92 56k WinModem";
+static const char pci_device_11c1_1040[] = "HDA softmodem";
+static const char pci_device_11c1_2600[] = "StarPro26XX family (SP2601, SP2603, SP2612) DSP";
 static const char pci_device_11c1_5801[] = "USB";
 static const char pci_device_11c1_5802[] = "USS-312 USB Controller";
 static const char pci_device_11c1_5803[] = "USS-344S USB Controller";
@@ -11841,6 +13420,7 @@
 static const char pci_subsys_11c1_ab30_14cd_2012[] = "Hermes2 Mini-PCI WaveLAN a/b/g";
 #endif
 static const char pci_device_11c1_ed00[] = "ET-131x PCI-E Ethernet Controller";
+static const char pci_device_11c1_ed01[] = "ET-131x PCI-E Ethernet Controller";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_11c2[] = "Sand Microelectronics";
@@ -11913,9 +13493,13 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_11d4[] = "Analog Devices";
+static const char pci_device_11d4_0078[] = "AD1986HD sound chip";
 static const char pci_device_11d4_1535[] = "Blackfin BF535 processor";
 static const char pci_device_11d4_1805[] = "SM56 PCI modem";
 static const char pci_device_11d4_1889[] = "AD1889 sound chip";
+static const char pci_device_11d4_1981[] = "AD1981HD sound chip";
+static const char pci_device_11d4_1983[] = "AD1983HD sound chip";
+static const char pci_device_11d4_1986[] = "AD1986A sound chip";
 static const char pci_device_11d4_5340[] = "AD1881 sound chip";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -12222,6 +13806,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1217[] = "O2 Micro, Inc.";
+static const char pci_device_1217_00f7[] = "Firewire (IEEE 1394)";
 static const char pci_device_1217_6729[] = "OZ6729";
 static const char pci_device_1217_673a[] = "OZ6730";
 static const char pci_device_1217_6832[] = "OZ6832/6833 CardBus Controller";
@@ -12244,32 +13829,41 @@
 static const char pci_device_1217_7110[] = "OZ711Mx 4-in-1 MemoryCardBus Accelerator";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1217_7110_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_1217_7110_103c_088c[] = "NC8000 laptop";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1217_7110_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_1217_7110_103c_0890[] = "NC6000 laptop";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1217_7110_1734_106c[] = "Amilo A1645";
+#endif
 static const char pci_device_1217_7112[] = "OZ711EC1/M1 SmartCardBus/MemoryCardBus Controller";
 static const char pci_device_1217_7113[] = "OZ711EC1 SmartCardBus Controller";
 static const char pci_device_1217_7114[] = "OZ711M1/MC1 4-in-1 MemoryCardBus Controller";
+static const char pci_device_1217_7120[] = "Integrated MMC/SD Controller";
+static const char pci_device_1217_7130[] = "Integrated MS/xD Controller";
 static const char pci_device_1217_7134[] = "OZ711MP1/MS1 MemoryCardBus Controller";
+static const char pci_device_1217_7135[] = "Cardbus bridge";
 static const char pci_device_1217_71e2[] = "OZ711E2 SmartCardBus Controller";
 static const char pci_device_1217_7212[] = "OZ711M2 4-in-1 MemoryCardBus Controller";
 static const char pci_device_1217_7213[] = "OZ6933E CardBus Controller";
 static const char pci_device_1217_7223[] = "OZ711M3/MC3 4-in-1 MemoryCardBus Controller";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1217_7223_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_1217_7223_103c_088c[] = "NC8000 laptop";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1217_7223_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_1217_7223_103c_0890[] = "NC6000 laptop";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1217_7223_10cf_11c4[] = "Lifebook P5020D Laptop";
+#endif
 static const char pci_device_1217_7233[] = "OZ711MP3/MS3 4-in-1 MemoryCardBus Controller";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -12405,6 +13999,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_121e[] = "CSPI";
+static const char pci_device_121e_0201[] = "Myrinet 2000 Scalable Cluster Interconnect";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_121f[] = "Arcus Technology, Inc.";
@@ -12672,6 +14267,7 @@
 static const char pci_vendor_1259[] = "Allied Telesyn International";
 static const char pci_device_1259_2560[] = "AT-2560 Fast Ethernet Adapter (i82557B)";
 static const char pci_device_1259_a117[] = "RTL81xx Fast Ethernet";
+static const char pci_device_1259_a11e[] = "RTL81xx Fast Ethernet";
 static const char pci_device_1259_a120[] = "21x4x DEC-Tulip compatible 10/100 Ethernet";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -12795,6 +14391,9 @@
 static const char pci_subsys_125d_2898_147a_c001[] = "ES56-PI Data Fax Modem";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_125d_2898_148d_1030[] = "HCF WV-PI56 [ESS ES56-PI Data Fax Modem]";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_125d_2898_14fe_0428[] = "ES56-PI Data Fax Modem";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -12855,6 +14454,9 @@
 static const char pci_subsys_1260_3890_1113_4203[] = "WN4201B";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1260_3890_1113_8201[] = "T-Com T-Sinus 154pcicard Wireless PCI Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1260_3890_1113_ee03[] = "SMC2802W V2 Wireless PCI Adapter [ISL3886]";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -12867,6 +14469,9 @@
 static const char pci_subsys_1260_3890_1259_c104[] = "CG-WLCB54GT Wireless Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1260_3890_1260_0000[] = "WG511 Wireless Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1260_3890_1385_4800[] = "WG511 Wireless Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -13600,6 +15205,7 @@
 static const char pci_vendor_1291[] = "NCS Computer Italia";
 #endif
 static const char pci_vendor_1292[] = "Tritech Microelectronics Inc";
+static const char pci_device_1292_fc02[] = "Pyramid3D TR25202";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1293[] = "Media Reality Technology";
 #endif
@@ -13676,8 +15282,12 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_12ab[] = "Yuan Yuan Enterprise Co., Ltd.";
+static const char pci_device_12ab_0000[] = "MPG160/Kuroutoshikou ITVC15-STVLP";
 static const char pci_device_12ab_0002[] = "AU8830 [Vortex2] Based Sound Card With A3D Support";
+static const char pci_device_12ab_2300[] = "Club-3D Zap TV2100";
 static const char pci_device_12ab_3000[] = "MPG-200C PCI DVD Decoder Card";
+static const char pci_device_12ab_fff3[] = "MPG600/Kuroutoshikou ITVC16-STVLP";
+static const char pci_device_12ab_ffff[] = "MPG600/Kuroutoshikou ITVC16-STVLP";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_12ac[] = "Measurex Corporation";
@@ -13770,6 +15380,9 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_12b9_1007_12b9_00a3[] = "USR 56k Internal WinModem (Model 3595)";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_12b9_1007_12b9_00c4[] = "U.S. Robotics 56K Voice Win Int (2884a)";
+#endif
 static const char pci_device_12b9_1008[] = "56K FaxModem Model 5610";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_12b9_1008_12b9_00a2[] = "USR 56k Internal FAX Modem (Model 2977)";
@@ -13983,6 +15596,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_12d8[] = "Pericom Semiconductor";
+static const char pci_device_12d8_01a7[] = "PCI to PCI bridge";
 static const char pci_device_12d8_8150[] = "PCI to PCI Bridge";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -13990,6 +15604,10 @@
 static const char pci_device_12d9_0002[] = "PCI Prosody";
 static const char pci_device_12d9_0004[] = "cPCI Prosody";
 static const char pci_device_12d9_0005[] = "Aculab E1/T1 PCI card";
+static const char pci_device_12d9_1078[] = "Prosody X class e1000 device";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_12d9_1078_12d9_000d[] = "Prosody X PCI";
+#endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_12da[] = "True Time Inc.";
@@ -14344,20 +15962,23 @@
 static const char pci_vendor_1316[] = "Teradyne Inc";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_vendor_1317[] = "Linksys";
+static const char pci_vendor_1317[] = "ADMtek";
 static const char pci_device_1317_0981[] = "21x4x DEC-Tulip compatible 10/100 Ethernet";
 static const char pci_device_1317_0985[] = "NC100 Network Everywhere Fast Ethernet 10/100";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1317_0985_1734_100c[] = "Scenic N300 ADMtek AN983 10/100 Mbps PCI Adapter";
+#endif
 static const char pci_device_1317_1985[] = "21x4x DEC-Tulip compatible 10/100 Ethernet";
 static const char pci_device_1317_2850[] = "HSP MicroModem 56";
-static const char pci_device_1317_5120[] = "ADMtek ADM5120 OpenGate System-on-Chip";
-static const char pci_device_1317_8201[] = "ADMtek ADM8211 802.11b Wireless Interface";
+static const char pci_device_1317_5120[] = "ADM5120 OpenGate System-on-Chip";
+static const char pci_device_1317_8201[] = "ADM8211 802.11b Wireless Interface";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1317_8201_10b8_2635[] = "SMC2635W 802.11b (11Mbps) wireless lan pcmcia (cardbus) card";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1317_8201_1317_8201[] = "SMC2635W 802.11b (11mbps) wireless lan pcmcia (cardbus) card";
 #endif
-static const char pci_device_1317_8211[] = "ADMtek ADM8211 802.11b Wireless Interface";
+static const char pci_device_1317_8211[] = "ADM8211 802.11b Wireless Interface";
 static const char pci_device_1317_9511[] = "21x4x DEC-Tulip compatible 10/100 Ethernet";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -14641,6 +16262,7 @@
 static const char pci_device_135e_7401[] = "Four Port RS-232 Interface";
 static const char pci_device_135e_7402[] = "Four Port RS-422/485 Interface";
 static const char pci_device_135e_7801[] = "Eight Port RS-232 Interface";
+static const char pci_device_135e_7804[] = "Eight Port RS-232/422/485 Interface";
 static const char pci_device_135e_8001[] = "8001 Digital I/O Adapter";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -14651,11 +16273,14 @@
 static const char pci_device_1360_0101[] = "PCI32 DCF77 Radio Clock";
 static const char pci_device_1360_0102[] = "PCI509 DCF77 Radio Clock";
 static const char pci_device_1360_0103[] = "PCI510 DCF77 Radio Clock";
+static const char pci_device_1360_0104[] = "PCI511 DCF77 Radio Clock";
 static const char pci_device_1360_0201[] = "GPS167PCI GPS Receiver";
 static const char pci_device_1360_0202[] = "GPS168PCI GPS Receiver";
 static const char pci_device_1360_0203[] = "GPS169PCI GPS Receiver";
+static const char pci_device_1360_0204[] = "GPS170PCI GPS Receiver";
 static const char pci_device_1360_0301[] = "TCR510PCI IRIG Timecode Reader";
 static const char pci_device_1360_0302[] = "TCR167PCI IRIG Timecode Reader";
+static const char pci_device_1360_0303[] = "TCR511PCI IRIG Timecode Reader";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1361[] = "Soliton Systems K.K.";
@@ -14686,6 +16311,10 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_136a[] = "High Soft Tech";
+static const char pci_device_136a_0004[] = "HST Saphir VII mini PCI";
+static const char pci_device_136a_0007[] = "HST Saphir III E MultiLink 4";
+static const char pci_device_136a_0008[] = "HST Saphir III E MultiLink 8";
+static const char pci_device_136a_000a[] = "HST Saphir III E MultiLink 2";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_136b[] = "Kawasaki Steel Corporation";
@@ -14721,11 +16350,11 @@
 static const char pci_device_1374_0027[] = "Silicom Dual port Fiber LX Giga Ethernet 546 Bypass Server Adapter";
 static const char pci_device_1374_0029[] = "Silicom Dual port Copper Giga Ethernet 546GB Bypass Server Adapter";
 static const char pci_device_1374_002a[] = "Silicom Dual port Fiber Giga Ethernet 546 TAP/Bypass Server Adapter";
-static const char pci_device_1374_002b[] = "Silicom Dual port Copper Fast Ethernet 546 TAP/Bypass Server Adapter";
-static const char pci_device_1374_002c[] = "Silicom Quad port Copper Giga Ethernet 546GB Bypass Server Adapter";
-static const char pci_device_1374_002d[] = "Silicom Quad port Fiber-SX Giga Ethernet 546GB Bypass Server Adapter";
-static const char pci_device_1374_002e[] = "Silicom Quad port Fiber-LX Giga Ethernet 546GB Bypass Server Adapter";
-static const char pci_device_1374_002f[] = "Silicom Dual port Fiber-SX Giga Ethernet 546GB Low profile Bypass Server Adapter";
+static const char pci_device_1374_002b[] = "Silicom Dual port Copper Fast Ethernet 546 TAP/Bypass Server Adapter (PXE2TBI)";
+static const char pci_device_1374_002c[] = "Silicom Quad port Copper Giga Ethernet 546GB Bypass Server Adapter (PXG4BPI)";
+static const char pci_device_1374_002d[] = "Silicom Quad port Fiber-SX Giga Ethernet 546GB Bypass Server Adapter (PXG4BPFI)";
+static const char pci_device_1374_002e[] = "Silicom Quad port Fiber-LX Giga Ethernet 546GB Bypass Server Adapter (PXG4BPFI-LX)";
+static const char pci_device_1374_002f[] = "Silicom Dual port Fiber-SX Giga Ethernet 546GB Low profile Bypass Server Adapter (PXG2BPFIL)";
 static const char pci_device_1374_0030[] = "Silicom Dual port Fiber-LX Giga Ethernet 546GB Low profile Bypass Server Adapter";
 static const char pci_device_1374_0031[] = "Silicom Quad port Copper Giga Ethernet PCI-E Bypass Server Adapter";
 static const char pci_device_1374_0032[] = "Silicom Dual port Copper Fast Ethernet 546 TAP/Bypass Server Adapter";
@@ -14736,6 +16365,8 @@
 static const char pci_device_1374_0038[] = "Silicom Quad port Copper Ethernet PCI-E Intel based Bypass Server Adapter";
 static const char pci_device_1374_0039[] = "Silicom Dual port Fiber-SX Ethernet PCI-E Intel based Bypass Server Adapter";
 static const char pci_device_1374_003a[] = "Silicom Dual port Fiber-LX Ethernet PCI-E Intel based Bypass Server Adapter";
+static const char pci_device_1374_003b[] = "Silicom Dual port Fiber Ethernet PMC Intel based Bypass Server Adapter (PMCX2BPFI)";
+static const char pci_device_1374_003c[] = "Silicom Dual port Copper Ethernet PCI-X BGE based Bypass Server Adapter (PXG2BPRB)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1375[] = "Argosystems Inc";
@@ -14781,6 +16412,7 @@
 static const char pci_vendor_1382[] = "Marian - Electronic & Software";
 static const char pci_device_1382_0001[] = "ARC88 audio recording card";
 static const char pci_device_1382_2008[] = "Prodif 96 Pro sound system";
+static const char pci_device_1382_2048[] = "Prodif Plus sound system";
 static const char pci_device_1382_2088[] = "Marc 8 Midi sound system";
 static const char pci_device_1382_20c8[] = "Marc A sound system";
 static const char pci_device_1382_4008[] = "Marc 2 sound system";
@@ -14799,9 +16431,11 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1385[] = "Netgear";
 static const char pci_device_1385_0013[] = "WG311T 108 Mbps Wireless PCI Adapter";
-static const char pci_device_1385_311a[] = "GA511 Gigabit Ethernet";
-static const char pci_device_1385_4100[] = "802.11b Wireless Adapter (MA301)";
-static const char pci_device_1385_4105[] = "MA311 802.11b wireless adapter";
+static const char pci_device_1385_006b[] = "WA301 802.11b Wireless PCI Adapter";
+static const char pci_device_1385_311a[] = "GA311 Gigabit Ethernet PCI Adapter";
+static const char pci_device_1385_4100[] = "MA301 802.11b Wireless PCI Adapter";
+static const char pci_device_1385_4105[] = "MA311 802.11b Wireless PCI Adapter";
+static const char pci_device_1385_4251[] = "WG111T 108 Mbps Wireless USB 2.0 Adapter";
 static const char pci_device_1385_4400[] = "WAG511 802.11a/b/g Dual Band Wireless PC Card";
 static const char pci_device_1385_4600[] = "WAG511 802.11a/b/g Dual Band Wireless PC Card";
 static const char pci_device_1385_4601[] = "WAG511 802.11a/b/g Dual Band Wireless PC Card";
@@ -14819,7 +16453,11 @@
 static const char pci_device_1385_622a[] = "GA622";
 static const char pci_device_1385_630a[] = "GA630 Gigabit Ethernet";
 static const char pci_device_1385_6b00[] = "WG311v3 54 Mbps Wireless PCI Adapter";
-static const char pci_device_1385_6d00[] = "WPNT511  RangeMax™ 240 Mbps Wireless PC Card";
+static const char pci_device_1385_6d00[] = "WPNT511 RangeMax 240 Mbps Wireless PC Card";
+static const char pci_device_1385_7b00[] = "WN511B RangeMax Next 270 Mbps Wireless PC Card";
+static const char pci_device_1385_7c00[] = "WN511T RangeMax Next 300 Mbps Wireless PC Card";
+static const char pci_device_1385_7d00[] = "WN311B RangeMax Next 270 Mbps Wireless PCI Adapter";
+static const char pci_device_1385_7e00[] = "WN311T RangeMax Next 300 Mbps Wireless PCI Adapter";
 static const char pci_device_1385_f004[] = "FA310TX";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -14867,6 +16505,7 @@
 static const char pci_device_1393_1040[] = "Smartio C104H/PCI";
 static const char pci_device_1393_1141[] = "Industrio CP-114";
 static const char pci_device_1393_1680[] = "Smartio C168H/PCI";
+static const char pci_device_1393_1681[] = "CP-168U V2 Smart Serial Board (8-port RS-232)";
 static const char pci_device_1393_2040[] = "Intellio CP-204J";
 static const char pci_device_1393_2180[] = "Intellio C218 Turbo PCI";
 static const char pci_device_1393_3200[] = "Intellio C320 Turbo PCI";
@@ -14887,6 +16526,12 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1397[] = "Cologne Chip Designs GmbH";
 static const char pci_device_1397_08b4[] = "ISDN network Controller [HFC-4S]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1397_08b4_1397_b520[] = "HFC-4S [IOB4ST]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1397_08b4_1397_b540[] = "HFC-4S [Swyx 4xS0 SX2 QuadBri]";
+#endif
 static const char pci_device_1397_16b8[] = "ISDN network Controller [HFC-8S]";
 static const char pci_device_1397_2bd0[] = "ISDN network controller [HFC-PCI]";
 #ifdef INIT_SUBSYS_INFO
@@ -14901,6 +16546,8 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1397_2bd0_e4bf_1000[] = "CI1-1-Harp";
 #endif
+static const char pci_device_1397_30b1[] = "ISDN network Controller [HFC-E1]";
+static const char pci_device_1397_f001[] = "GSM Network Controller [HFC-4GSM]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1398[] = "Clarion co. Ltd";
@@ -15055,9 +16702,11 @@
 #endif
 static const char pci_device_13c1_1002[] = "9xxx-series SATA-RAID";
 static const char pci_device_13c1_1003[] = "9550SX SATA-RAID";
+static const char pci_device_13c1_1004[] = "9650SE SATA-II RAID";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_13c2[] = "Technotrend Systemtechnik GmbH";
+static const char pci_device_13c2_000e[] = "Technotrend/Hauppauge DVB card rev2.3";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_13c3[] = "Janz Computer AG";
@@ -15197,6 +16846,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_13ec[] = "Zydacron Inc";
+static const char pci_device_13ec_000a[] = "NPC-RC01 Remote control receiver";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_13ed[] = "Raytheion E-Systems";
@@ -15211,7 +16861,7 @@
 static const char pci_vendor_13f0[] = "Sundance Technology Inc / IC Plus Corp";
 static const char pci_device_13f0_0200[] = "IC Plus IP100A Integrated 10/100 Ethernet MAC + PHY";
 static const char pci_device_13f0_0201[] = "ST201 Sundance Ethernet";
-static const char pci_device_13f0_1023[] = "IC Plus IP1000 Family Gigabit Ethernet";
+static const char pci_device_13f0_1023[] = "IP1000 Family Gigabit Ethernet";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_13f1[] = "Oce' - Technologies B.V.";
@@ -15260,6 +16910,7 @@
 static const char pci_subsys_13f6_0111_1681_a000[] = "Gamesurround MUSE XL";
 #endif
 static const char pci_device_13f6_0211[] = "CM8738";
+static const char pci_device_13f6_9880[] = "CM9880";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_13f7[] = "Wildfire Communications";
@@ -15285,7 +16936,26 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_13fe[] = "Advantech Co. Ltd";
 static const char pci_device_13fe_1240[] = "PCI-1240 4-channel stepper motor controller card";
-static const char pci_device_13fe_1600[] = "PCI-1612 4-port RS-232/422/485 PCI communication card";
+static const char pci_device_13fe_1600[] = "PCI-16xx series PCI multiport serial board (function 0)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_13fe_1600_1601_0002[] = "PCI-1601 2-port unisolated RS-422/485";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_13fe_1600_1602_0002[] = "PCI-1602 2-port isolated RS-422/485";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_13fe_1600_1612_0004[] = "PCI-1612 4-port RS-232/422/485";
+#endif
+static const char pci_device_13fe_16ff[] = "PCI-16xx series PCI multiport serial board (function 1: RX/TX steering CPLD)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_13fe_16ff_1601_0000[] = "PCI-1601 2-port unisolated RS-422/485 PCI communications card";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_13fe_16ff_1602_0000[] = "PCI-1602 2-port isolated RS-422/485";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_13fe_16ff_1612_0000[] = "PCI-1612 4-port RS-232/422/485";
+#endif
 static const char pci_device_13fe_1733[] = "PCI-1733 32-channel isolated digital input card";
 static const char pci_device_13fe_1752[] = "PCI-1752";
 static const char pci_device_13fe_1754[] = "PCI-1754";
@@ -15459,6 +17129,9 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1412_1724_270f_f645[] = "ZNF3-250";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1412_1724_3136_4154[] = "Prodigy 7.1 XT";
+#endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1413[] = "Addonics";
@@ -15469,7 +17142,20 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1415[] = "Oxford Semiconductor Ltd";
 static const char pci_device_1415_8403[] = "VScom 011H-EP1 1 port parallel adaptor";
-static const char pci_device_1415_9501[] = "OX16PCI954 (Quad 16950 UART) function 0";
+static const char pci_device_1415_9500[] = "OX16PCI954 (Quad 16950 UART) function 0 (Disabled)";
+static const char pci_device_1415_9501[] = "OX16PCI954 (Quad 16950 UART) function 0 (Uart)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1415_9501_12c4_0201[] = "Titan/cPCI (2 port)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1415_9501_12c4_0202[] = "Titan/cPCI (4 port)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1415_9501_12c4_0203[] = "Titan/cPCI (8 port)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1415_9501_12c4_0210[] = "Titan/104-Plus (8 port, p1-4)";
+#endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1415_9501_131f_2050[] = "CyberPro (4-port)";
 #endif
@@ -15485,13 +17171,21 @@
 static const char pci_device_1415_950a[] = "EXSYS EX-41092 Dual 16950 Serial adapter";
 static const char pci_device_1415_950b[] = "OXCB950 Cardbus 16950 UART";
 static const char pci_device_1415_9510[] = "OX16PCI954 (Quad 16950 UART) function 1 (Disabled)";
-static const char pci_device_1415_9511[] = "OX16PCI954 (Quad 16950 UART) function 1";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1415_9510_12c4_0200[] = "Titan/cPCI (Unused)";
+#endif
+static const char pci_device_1415_9511[] = "OX16PCI954 (Quad 16950 UART) function 1 (8bit bus)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1415_9511_12c4_0211[] = "Titan/104-Plus (8 port, p5-8)";
+#endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1415_9511_15ed_2000[] = "MCCR Serial p4-7 of 8";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1415_9511_15ed_2001[] = "MCCR Serial p4-15 of 16";
 #endif
+static const char pci_device_1415_9512[] = "OX16PCI954 (Quad 16950 UART) function 1 (32bit bus)";
+static const char pci_device_1415_9513[] = "OX16PCI954 (Quad 16950 UART) function 1 (parallel port)";
 static const char pci_device_1415_9521[] = "OX16PCI952 (Dual 16950 UART)";
 static const char pci_device_1415_9523[] = "OX16PCI952 Integrated Parallel Port";
 #endif
@@ -15542,6 +17236,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1425[] = "Chelsio Communications Inc";
 static const char pci_device_1425_000b[] = "T210 Protocol Engine";
+static const char pci_device_1425_000c[] = "T204 Protocol Engine";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1426[] = "Storage Technology Corp.";
@@ -15590,6 +17285,13 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1435[] = "RTD Embedded Technologies, Inc.";
+static const char pci_device_1435_4520[] = "PCI4520";
+static const char pci_device_1435_6020[] = "SPM6020";
+static const char pci_device_1435_6030[] = "SPM6030";
+static const char pci_device_1435_6420[] = "SPM186420";
+static const char pci_device_1435_6430[] = "SPM176430";
+static const char pci_device_1435_7520[] = "DM7520";
+static const char pci_device_1435_7820[] = "DM7820";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1436[] = "CIS Technology Inc";
@@ -15673,6 +17375,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_144d[] = "Samsung Electronics Co Ltd";
+static const char pci_device_144d_c00c[] = "P35 laptop";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_144e[] = "OLITEC";
@@ -15704,6 +17407,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1458[] = "Giga-byte Technology";
 static const char pci_device_1458_0c11[] = "K8NS Pro Mainboard";
+static const char pci_device_1458_9001[] = "GC-PTV-TAF Hybrid TV card";
 static const char pci_device_1458_e911[] = "GN-WIAG02";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -15733,6 +17437,9 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1461[] = "Avermedia Technologies Inc";
+static const char pci_device_1461_a3ce[] = "M179";
+static const char pci_device_1461_a3cf[] = "M179";
+static const char pci_device_1461_a836[] = "M115 DVB-T, PAL/SECAM/NTSC Tuner";
 static const char pci_device_1461_f436[] = "AVerTV Hybrid+FM";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -15741,10 +17448,15 @@
 static const char pci_device_1462_6819[] = "Broadcom Corporation BCM4306 802.11b/g Wireless LAN Controller [MSI CB54G]";
 static const char pci_device_1462_6825[] = "PCI Card wireless 11g [PC54G]";
 static const char pci_device_1462_6834[] = "RaLink RT2500 802.11g [PC54G2]";
+static const char pci_device_1462_7125[] = "K8N motherboard";
+static const char pci_device_1462_7235[] = "P965 Neo MS-7235 mainboard";
 static const char pci_device_1462_8725[] = "NVIDIA NV25 [GeForce4 Ti 4600] VGA Adapter";
 static const char pci_device_1462_9000[] = "NVIDIA NV28 [GeForce4 Ti 4800] VGA Adapter";
 static const char pci_device_1462_9110[] = "GeFORCE FX5200";
 static const char pci_device_1462_9119[] = "NVIDIA NV31 [GeForce FX 5600XT] VGA Adapter";
+static const char pci_device_1462_9123[] = "NVIDIA NV31 [GeForce FX 5600] FX5600-VTDR128 [MS-8912]";
+static const char pci_device_1462_9510[] = "Radeon 9600XT";
+static const char pci_device_1462_9511[] = "Radeon 9600XT";
 static const char pci_device_1462_9591[] = "nVidia Corporation NV36 [GeForce FX 5700LE]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -15913,6 +17625,7 @@
 static const char pci_vendor_1498[] = "TEWS Datentechnik GmBH";
 static const char pci_device_1498_0330[] = "TPMC816 2 Channel CAN bus controller.";
 static const char pci_device_1498_0385[] = "TPMC901 Extended CAN bus with 2/4/6 CAN controller";
+static const char pci_device_1498_21cc[] = "TCP460 CompactPCI 16 Channel Serial Interface RS232/RS422";
 static const char pci_device_1498_21cd[] = "TCP461 CompactPCI 8 Channel Serial Interface RS232/RS422";
 static const char pci_device_1498_30c8[] = "TPCI200";
 #endif
@@ -16043,6 +17756,8 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_14bc[] = "Globespan Semiconductor Inc.";
+static const char pci_device_14bc_d002[] = "Pulsar [PCI ADSL Card]";
+static const char pci_device_14bc_d00f[] = "Pulsar [PCI ADSL Card]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_14bd[] = "CARDIO Control N.V.";
@@ -16058,8 +17773,14 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_14c1[] = "MYRICOM Inc.";
+static const char pci_device_14c1_0008[] = "Myri-10G Dual-Protocol NIC (10G-PCIE-8A)";
 static const char pci_device_14c1_8043[] = "Myrinet 2000 Scalable Cluster Interconnect";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14c1_8043_103c_1240[] = "Myrinet M2L-PCI64/2-3.0 LANai 7.4 (HP OEM)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_14c2[] = "DTK Computer";
 #endif
@@ -16202,7 +17923,16 @@
 static const char pci_device_14e4_0811[] = "Sentry5 External Interface Core";
 static const char pci_device_14e4_0816[] = "BCM3302 Sentry5 MIPS32 CPU";
 static const char pci_device_14e4_1600[] = "NetXtreme BCM5752 Gigabit Ethernet PCI Express";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1600_103c_3015[] = "PCIe LAN on Motherboard";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1600_107b_5048[] = "E4500 Onboard";
+#endif
 static const char pci_device_14e4_1601[] = "NetXtreme BCM5752M Gigabit Ethernet PCI Express";
+static const char pci_device_14e4_1639[] = "NetXtreme II BCM5709 Gigabit Ethernet";
 static const char pci_device_14e4_1644[] = "NetXtreme BCM5700 Gigabit Ethernet";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_1644_1014_0277[] = "Broadcom Vigil B5700 1000Base-T";
@@ -16423,6 +18153,18 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1648_10a9_8013[] = "Dual Port Gigabit Ethernet (PCI-X,Copper)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1648_10a9_8018[] = "Dual Port Gigabit Ethernet (A330)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1648_10a9_801a[] = "Dual Port Gigabit Ethernet (IA-blade)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1648_10a9_801b[] = "Quad Port Gigabit Ethernet (PCI-E,Copper)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_1648_10b7_2000[] = "3C998-T Dual Port 10/100/1000 PCI-X";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -16437,10 +18179,25 @@
 static const char pci_device_14e4_164a[] = "NetXtreme II BCM5706 Gigabit Ethernet";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_164a_103c_3101[] = "NC370T Multifunction Gigabit Server Adapter";
+static const char pci_subsys_14e4_164a_103c_3070[] = "NC380T PCI Express Dual Port Multifunction Gigabit Server Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_164a_103c_3101[] = "NC370T MultifuNCtion Gigabit Server Adapter";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_14e4_164c[] = "NetXtreme II BCM5708 Gigabit Ethernet";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_164c_103c_7037[] = "NC373T PCI Express Multifunction Gigabit Server Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_164c_103c_7038[] = "NC373i Integrated Multifunction Gigabit Server Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_14e4_164d[] = "NetXtreme BCM5702FE Gigabit Ethernet";
 static const char pci_device_14e4_1653[] = "NetXtreme BCM5705 Gigabit Ethernet";
 #endif
@@ -16456,7 +18213,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1654_103c_3100[] = "NC1020 HP ProLiant Gigabit Server Adapter 32 PCI";
+static const char pci_subsys_14e4_1654_103c_3100[] = "NC1020 ProLiant Gigabit Server Adapter 32 PCI";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
@@ -16481,6 +18238,17 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_1659_1734_1061[] = "Primergy RX300 S2";
 #endif
+static const char pci_device_14e4_165a[] = "NetXtreme BCM5722 Gigabit Ethernet PCI Express";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_165a_103c_7051[] = "NC105i PCIe Gigabit Server Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_165a_103c_7052[] = "NC105T PCIe Gigabit Server Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_14e4_165d[] = "NetXtreme BCM5705M Gigabit Ethernet";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -16490,28 +18258,35 @@
 static const char pci_device_14e4_165e[] = "NetXtreme BCM5705M_2 Gigabit Ethernet";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_165e_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_14e4_165e_103c_088c[] = "NC8000 laptop";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_165e_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_14e4_165e_103c_0890[] = "NC6000 laptop";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_165e_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_14e4_165e_103c_099c[] = "NX6110/NC6120";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_165e_10cf_1279[] = "LifeBook E8010D";
+#endif
 static const char pci_device_14e4_1668[] = "NetXtreme BCM5714 Gigabit Ethernet";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_1668_103c_7039[] = "NC324i PCIe Dual Port Gigabit Server Adapter";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_device_14e4_1669[] = "NetXtreme 5714S Gigabit Ethernet";
 static const char pci_device_14e4_166a[] = "NetXtreme BCM5780 Gigabit Ethernet";
 static const char pci_device_14e4_166b[] = "NetXtreme BCM5780S Gigabit Ethernet";
 static const char pci_device_14e4_166e[] = "570x 10/100 Integrated Controller";
+static const char pci_device_14e4_1672[] = "NetXtreme BCM5754M Gigabit Ethernet PCI Express";
+static const char pci_device_14e4_1673[] = "NetXtreme BCM5755M Gigabit Ethernet PCI Express";
+static const char pci_device_14e4_1674[] = "NetXtreme BCM5756ME Gigabit Ethernet PCI Express";
 static const char pci_device_14e4_1677[] = "NetXtreme BCM5751 Gigabit Ethernet PCI Express";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -16525,28 +18300,68 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1677_1028_0187[] = "Precision M70";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_1677_1028_01ad[] = "Optiplex GX620";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1677_103c_3006[] = "DC7100 SFF(DX878AV)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_1677_1734_105d[] = "Scenic W620";
 #endif
 static const char pci_device_14e4_1678[] = "NetXtreme BCM5715 Gigabit Ethernet";
+static const char pci_device_14e4_1679[] = "NetXtreme BCM5715S Gigabit Ethernet";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1679_103c_1707[] = "NC326m PCIe Dual Port Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1679_103c_170c[] = "NC325m PCIe Quad Port Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_1679_103c_703c[] = "NC326i PCIe Dual Port Gigabit Server Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_device_14e4_167a[] = "NetXtreme BCM5754 Gigabit Ethernet PCI Express";
+static const char pci_device_14e4_167b[] = "NetXtreme BCM5755 Gigabit Ethernet PCI Express";
 static const char pci_device_14e4_167d[] = "NetXtreme BCM5751M Gigabit Ethernet PCI Express";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_167d_17aa_2081[] = "Thinkpad R60e model 0657";
+#endif
 static const char pci_device_14e4_167e[] = "NetXtreme BCM5751F Fast Ethernet PCI Express";
+static const char pci_device_14e4_167f[] = "NetLink BCM5787F Fast Ethernet PCI Express";
+static const char pci_device_14e4_1693[] = "NetLink BCM5787M Gigabit Ethernet PCI Express";
 static const char pci_device_14e4_1696[] = "NetXtreme BCM5782 Gigabit Ethernet";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_1696_103c_12bc[] = "HP d530 CMT (DG746A)";
+static const char pci_subsys_14e4_1696_103c_12bc[] = "d530 CMT (DG746A)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_1696_14e4_000d[] = "NetXtreme BCM5782 1000Base-T";
 #endif
+static const char pci_device_14e4_169a[] = "NetLink BCM5786 Gigabit Ethernet PCI Express";
+static const char pci_device_14e4_169b[] = "NetLink BCM5787 Gigabit Ethernet PCI Express";
 static const char pci_device_14e4_169c[] = "NetXtreme BCM5788 Gigabit Ethernet";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_169c_103c_308b[] = "nx6125";
+static const char pci_subsys_14e4_169c_103c_308b[] = "MX6125";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_169c_103c_30a1[] = "NC2400";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_14e4_169d[] = "NetLink BCM5789 Gigabit Ethernet PCI Express";
@@ -16592,15 +18407,41 @@
 #endif
 static const char pci_device_14e4_16a8[] = "NetXtreme BCM5704S Gigabit Ethernet";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a8_10a9_8014[] = "Dual Port Gigabit Ethernet (PCI-X,Fiber)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16a8_10a9_801c[] = "Quad Port Gigabit Ethernet (PCI-E,Fiber)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_16a8_10b7_2001[] = "3C998-SX Dual Port 1000-SX PCI-X";
 #endif
 static const char pci_device_14e4_16aa[] = "NetXtreme II BCM5706S Gigabit Ethernet";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_16aa_103c_3102[] = "NC370F Multifunction Gigabit Server Adapter";
+static const char pci_subsys_14e4_16aa_103c_3102[] = "NC370F MultifuNCtion Gigabit Server Adapter";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_14e4_16ac[] = "NetXtreme II BCM5708S Gigabit Ethernet";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16ac_103c_1706[] = "NC373m Multifunction Gigabit Server Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16ac_103c_7038[] = "NC373i PCI Express Multifunction Gigabit Server Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16ac_103c_703b[] = "NC373i Integrated Multifunction Gigabit Server Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_16ac_103c_703d[] = "NC373F PCI Express Multifunction Gigabit Server Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_14e4_16c6[] = "NetXtreme BCM5702A3 Gigabit Ethernet";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_16c6_10b7_1100[] = "3C1000B-T 10/100/1000 PCI";
@@ -16655,7 +18496,12 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_170c_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_14e4_170c_1028_01af[] = "Inspiron 6400";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_170c_103c_099c[] = "NX6110/NC6120";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_14e4_170d[] = "NetXtreme BCM5901 100Base-TX";
@@ -16663,6 +18509,8 @@
 static const char pci_subsys_14e4_170d_1014_0545[] = "ThinkPad R40e (2684-HVG) builtin ethernet controller";
 #endif
 static const char pci_device_14e4_170e[] = "NetXtreme BCM5901 100Base-TX";
+static const char pci_device_14e4_1712[] = "NetLink BCM5906 Fast Ethernet PCI Express";
+static const char pci_device_14e4_1713[] = "NetLink BCM5906M Fast Ethernet PCI Express";
 static const char pci_device_14e4_3352[] = "BCM3352";
 static const char pci_device_14e4_3360[] = "BCM3360";
 static const char pci_device_14e4_4210[] = "BCM4210 iLine10 HomePNA 2.0";
@@ -16681,17 +18529,21 @@
 static const char pci_device_14e4_4306[] = "BCM4307 Ethernet Controller";
 static const char pci_device_14e4_4307[] = "BCM4307 802.11b Wireless LAN Controller";
 static const char pci_device_14e4_4310[] = "BCM4310 Chipcommon I/OController";
+static const char pci_device_14e4_4311[] = "Dell Wireless 1390 WLAN Mini-PCI Card";
 static const char pci_device_14e4_4312[] = "BCM4310 UART";
 static const char pci_device_14e4_4313[] = "BCM4310 Ethernet Controller";
 static const char pci_device_14e4_4315[] = "BCM4310 USB Controller";
 static const char pci_device_14e4_4318[] = "BCM4318 [AirForce One 54g] 802.11g Wireless LAN Controller";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_4318_103c_1356[] = "nx6125";
+static const char pci_subsys_14e4_4318_103c_1356[] = "MX6125";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_4318_1468_0311[] = "Aspire 3022WLMi";
+static const char pci_subsys_14e4_4318_1043_120f[] = "A6U notebook embedded card";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_4318_1468_0311[] = "Aspire 3022WLMi, 5024WLMi, 5020";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_4318_1468_0312[] = "TravelMate 2410";
@@ -16705,7 +18557,10 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_4318_16ec_0119[] = "U.S.Robotics Wireless MAXg PC Card";
 #endif
-static const char pci_device_14e4_4319[] = "Dell Wireless 1470 DualBand WLAN";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_4318_1737_0048[] = "WPC54G-EU version 3 [Wireless-G Notebook Adapter]";
+#endif
+static const char pci_device_14e4_4319[] = "BCM4311 [AirForce 54g] 802.11a/b/g PCI Express Transceiver";
 static const char pci_device_14e4_4320[] = "BCM4306 802.11b/g Wireless LAN Controller";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -16719,7 +18574,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_4320_103c_12f4[] = "nx9500 Built-in Wireless";
+static const char pci_subsys_14e4_4320_103c_12f4[] = "NX9500 Built-in Wireless";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
@@ -16739,9 +18594,15 @@
 static const char pci_subsys_14e4_4320_106b_004e[] = "AirPort Extreme";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_4320_1154_0330[] = "Buffalo WLI2-PCI-G54S High Speed Mode Wireless Desktop Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_4320_144f_7050[] = "eMachines M6805 802.11g Built-in Wireless";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_4320_144f_7051[] = "Sonnet Aria Extreme PCI";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_4320_14e4_4320[] = "Linksys WMP54G PCI";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -16754,7 +18615,10 @@
 static const char pci_subsys_14e4_4320_1799_7010[] = "Belkin F5D7010 54g Wireless Network card";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_14e4_4320_185f_1220[] = "Acer TravelMate 290E WLAN Mini-PCI Card";
+static const char pci_subsys_14e4_4320_1799_7011[] = "F5D7011 54g+ Wireless Network card";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_4320_185f_1220[] = "TravelMate 290E WLAN Mini-PCI Card";
 #endif
 static const char pci_device_14e4_4321[] = "BCM4306 802.11a Wireless LAN Controller";
 static const char pci_device_14e4_4322[] = "BCM4306 UART";
@@ -16777,7 +18641,14 @@
 static const char pci_subsys_14e4_4325_1414_0004[] = "Wireless PCI Adapter MN-730";
 #endif
 static const char pci_device_14e4_4326[] = "BCM4307 Chipcommon I/O Controller?";
+static const char pci_device_14e4_4329[] = "BCM43XG";
+static const char pci_device_14e4_4344[] = "EDGE/GPRS data and 802.11b/g combo cardbus [GC89]";
 static const char pci_device_14e4_4401[] = "BCM4401 100Base-T";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14e4_4401_103c_08b0[] = "tc1100 tablet";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14e4_4401_1043_80a8[] = "A7V8X motherboard";
 #endif
@@ -16821,6 +18692,8 @@
 static const char pci_device_14e4_5690[] = "BCM5690 12-port Multi-Layer Gigabit Ethernet Switch";
 static const char pci_device_14e4_5691[] = "BCM5691 GE/10GE 8+2 Gigabit Ethernet Switch Controller";
 static const char pci_device_14e4_5692[] = "BCM5692 12-port Multi-Layer Gigabit Ethernet Switch";
+static const char pci_device_14e4_5695[] = "BCM5695 12-port + HiGig Multi-Layer Gigabit Ethernet Switch";
+static const char pci_device_14e4_5698[] = "BCM5698 12-port Multi-Layer Gigabit Ethernet Switch";
 static const char pci_device_14e4_5820[] = "BCM5820 Crypto Accelerator";
 static const char pci_device_14e4_5821[] = "BCM5821 Crypto Accelerator";
 static const char pci_device_14e4_5822[] = "BCM5822 Crypto Accelerator";
@@ -16980,6 +18853,7 @@
 static const char pci_subsys_14f1_1066_122d_4033[] = "Dell Athena - MDP3900V-U";
 #endif
 static const char pci_device_14f1_1085[] = "HCF V90 56k Data/Fax/Voice/Spkp PCI Modem";
+static const char pci_device_14f1_10b6[] = "CX06834-11 HCF V.92 56k Data/Fax/Voice/Spkp Modem";
 static const char pci_device_14f1_1433[] = "HCF 56k Data/Fax Modem";
 static const char pci_device_14f1_1434[] = "HCF 56k Data/Fax/Voice Modem";
 static const char pci_device_14f1_1435[] = "HCF 56k Data/Fax/Voice/Spkp (w/Handset) Modem";
@@ -17132,6 +19006,12 @@
 static const char pci_device_14f1_2464[] = "HSF 56k Data/Fax/Voice Modem (Mob SmartDAA)";
 static const char pci_device_14f1_2465[] = "HSF 56k Data/Fax/Voice/Spkp (w/HS) Modem (Mob SmartDAA)";
 static const char pci_device_14f1_2466[] = "HSF 56k Data/Fax/Voice/Spkp Modem (Mob SmartDAA)";
+static const char pci_device_14f1_2bfa[] = "HDAudio Soft Data Fax Modem with SmartCP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_14f1_2bfa_1025_0009[] = "Aspire 5622WLMi";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_14f1_2f00[] = "HSF 56k HSFi Modem";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_14f1_2f00_13e0_8d84[] = "IBM HSFi V.90";
@@ -17145,6 +19025,9 @@
 static const char pci_device_14f1_2f02[] = "HSF 56k HSFi Data/Fax";
 static const char pci_device_14f1_2f11[] = "HSF 56k HSFi Modem";
 static const char pci_device_14f1_2f20[] = "HSF 56k Data/Fax Modem";
+static const char pci_device_14f1_2f30[] = "HSF 56k Data/Fax Modem";
+static const char pci_device_14f1_5045[] = "HDAUDIO with SmartCP";
+static const char pci_device_14f1_5047[] = "High Definition Audio [Waikiki]";
 static const char pci_device_14f1_8234[] = "RS8234 ATM SAR Controller [ServiceSAR Plus]";
 static const char pci_device_14f1_8800[] = "CX23880/1/2/3 PCI Video and Audio Decoder";
 #ifdef INIT_SUBSYS_INFO
@@ -17382,6 +19265,7 @@
 static const char pci_vendor_14fc[] = "Quadrics Ltd";
 static const char pci_device_14fc_0000[] = "QsNet Elan3 Network Adapter";
 static const char pci_device_14fc_0001[] = "QsNetII Elan4 Network Adapter";
+static const char pci_device_14fc_0002[] = "QsNetIII Elan5 Network Adapter";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_14fd[] = "JAPAN Computer Industry Inc";
@@ -17582,25 +19466,31 @@
 static const char pci_device_1524_0510[] = "CB710 Memory Card Reader Controller";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1524_0510_103c_006a[] = "nx9500";
+static const char pci_subsys_1524_0510_103c_006a[] = "NX9500";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_1524_0520[] = "FLASH memory: ENE Technology Inc:";
 static const char pci_device_1524_0530[] = "ENE PCI Memory Stick Card Reader Controller";
 static const char pci_device_1524_0550[] = "ENE PCI Secure Digital Card Reader Controller";
+static const char pci_device_1524_0551[] = "SD/MMC Card Reader Controller";
 static const char pci_device_1524_0610[] = "PCI Smart Card Reader Controller";
 static const char pci_device_1524_1211[] = "CB1211 Cardbus Controller";
 static const char pci_device_1524_1225[] = "CB1225 Cardbus Controller";
 static const char pci_device_1524_1410[] = "CB1410 Cardbus Controller";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1524_1410_1025_003c[] = "CL50 motherboard";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1524_1410_1025_005a[] = "TravelMate 290";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_1524_1411[] = "CB-710/2/4 Cardbus Controller";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1524_1411_103c_006a[] = "nx9500";
+static const char pci_subsys_1524_1411_103c_006a[] = "NX9500";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_device_1524_1412[] = "CB-712/4 Cardbus Controller";
@@ -17700,6 +19590,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1542[] = "Concurrent Computer Corporation";
+static const char pci_device_1542_9260[] = "RCIM-II Real-Time Clock & Interrupt Module";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1543[] = "SILICON Laboratories";
@@ -18087,6 +19978,10 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_15b8[] = "ADDI-DATA GmbH";
+static const char pci_device_15b8_1003[] = "APCI1032 SP controller (32 digi inputs w/ opto coupler)";
+static const char pci_device_15b8_1005[] = "APCI2200 SP controller (8/16 digi outputs (relay))";
+static const char pci_device_15b8_100a[] = "APCI1696 SP controller (96 TTL I/Os)";
+static const char pci_device_15b8_3001[] = "APCI3501 SP controller (analog output board)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_15b9[] = "Maestro Digital Communications";
@@ -18217,6 +20112,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_15e2[] = "Quicknet Technologies Inc";
+static const char pci_device_15e2_0500[] = "PhoneJack-PCI";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_15e3[] = "Networth Technologies Inc";
@@ -18347,7 +20243,7 @@
 static const char pci_device_1619_0400[] = "FarSync T2P (2 port X.21/V.35/V.24)";
 static const char pci_device_1619_0440[] = "FarSync T4P (4 port X.21/V.35/V.24)";
 static const char pci_device_1619_0610[] = "FarSync T1U (1 port X.21/V.35/V.24)";
-static const char pci_device_1619_0620[] = "FarSync T2U (1 port X.21/V.35/V.24)";
+static const char pci_device_1619_0620[] = "FarSync T2U (2 port X.21/V.35/V.24)";
 static const char pci_device_1619_0640[] = "FarSync T4U (4 port X.21/V.35/V.24)";
 static const char pci_device_1619_1610[] = "FarSync TE1 (T1,E1)";
 static const char pci_device_1619_2610[] = "FarSync DSL-S1 (SHDSL)";
@@ -18362,6 +20258,8 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1629[] = "Kongsberg Spacetec AS";
 static const char pci_device_1629_1003[] = "Format synchronizer v3.0";
+static const char pci_device_1629_1006[] = "Format synchronizer, model 10500";
+static const char pci_device_1629_1007[] = "Format synchronizer, model 21000";
 static const char pci_device_1629_2002[] = "Fast Universal Data Output";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -18409,6 +20307,7 @@
 static const char pci_vendor_1677[] = "Bernecker + Rainer";
 static const char pci_device_1677_104e[] = "5LS172.6 B&R Dual CAN Interface Card";
 static const char pci_device_1677_12d7[] = "5LS172.61 B&R Dual CAN Interface Card";
+static const char pci_device_1677_20ad[] = "5ACPCI.MFIO-K01 Profibus DP / K-Feldbus / COM";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_167b[] = "ZyDAS Technology Corp.";
@@ -18418,6 +20317,10 @@
 #endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_167d[] = "Samsung Electro-Mechanics Co., Ltd.";
+static const char pci_device_167d_a000[] = "IPW2200 miniPCI Wireless";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1681[] = "Hercules";
 static const char pci_device_1681_0010[] = "Hercules 3d Prophet II Ultra 64MB (350 MHz NV15BR core)";
 #endif
@@ -18462,9 +20365,15 @@
 static const char pci_subsys_168c_0013_1186_3a63[] = "D-Link AirPremier DWL-AG660 Wireless Cardbus Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_0013_1186_3a93[] = "Conceptronic C54I Wireless 801.11g PCI card";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_168c_0013_1186_3a94[] = "C54C Wireless 801.11g cardbus";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_0013_1186_3ab0[] = "Allnet ALL0281 Wireless PCI Card";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_168c_0013_1385_4d00[] = "Netgear WG311T Wireless PCI Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -18474,28 +20383,55 @@
 static const char pci_subsys_168c_0013_14b7_0a60[] = "8482-WD ORiNOCO 11a/b/g Wireless PCI Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_0013_1668_1026[] = "IBM HighRate 11 a/b/g Wireless CardBus Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_168c_0013_168c_0013[] = "AirPlus XtremeG DWL-G650 Wireless PCMCIA Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_168c_0013_168c_1025[] = "DWL-G650B2 Wireless CardBus Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_168c_0013_168c_1027[] = "Netgate NL-3054CB ARIES b/g CardBus Adapter";
+static const char pci_subsys_168c_0013_168c_1027[] = "Engenius NL-3054CB ARIES b/g CardBus Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_0013_168c_1042[] = "Ubiquiti Networks SuperRange a/b/g Cardbus Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_168c_0013_168c_2026[] = "Netgate 5354MP ARIES a(108Mb turbo)/b/g MiniPCI Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_168c_0013_168c_2041[] = "Netgate 5354MP Plus ARIES2 b/g MiniPCI Adapter";
+static const char pci_subsys_168c_0013_168c_2041[] = "Engenius 5354MP Plus ARIES2 b/g MiniPCI Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_0013_168c_2042[] = "Engenius 5354MP Plus ARIES2 a/b/g MiniPCI Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_168c_0013_168c_2042[] = "Netgate 5354MP Plus ARIES2 a/b/g MiniPCI Adapter";
+static const char pci_subsys_168c_0013_168c_2051[] = "TRENDnet TEW-443PI Wireless PCI Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_168c_0013_16ab_7302[] = "Trust Speedshare Turbo Pro Wireless PCI Adapter";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_0013_17cf_0042[] = "Z-COMAX Highpower XG-622H (400mw) 802.11b/g mini-PCI Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_0013_185f_1012[] = "CM9 Wireless a/b/g MiniPCI Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_0013_185f_2012[] = "Wistron NeWeb WLAN a+b+g model CB9";
+#endif
 static const char pci_device_168c_001a[] = "AR5005G 802.11abg NIC";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_001a_1052_168c[] = "Sweex Wireless Lan PC Card 54Mbps";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_001a_1113_ee20[] = "SMC Wireless CardBus Adapter 802.11g (SMCWCB-G EU)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_001a_1113_ee24[] = "SMC Wireless PCI Card WPCI-G";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_168c_001a_1186_3a15[] = "D-Link AirPlus G DWL-G630 Wireless Cardbus Adapter(rev.D)";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -18508,8 +20444,17 @@
 static const char pci_subsys_168c_001a_1186_3a24[] = "D-Link AirPlus G DWL-G650+A Wireless Cardbus Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_001a_1186_3b08[] = "AirPlus G DWL-G630";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_001a_168c_001a[] = "Belkin FD7000";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_168c_001a_168c_1052[] = "TP-Link TL-WN510G Wireless CardBus Adapter";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_001a_168c_2052[] = "Compex Wireless 802.11 b/g  MiniPCI Adapter, Rev A1 [WLM54G]";
+#endif
 static const char pci_device_168c_001b[] = "AR5006X 802.11abg NIC";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_168c_001b_1186_3a19[] = "D-Link AirPremier AG DWL-AG660 Wireless Cardbus Adapter";
@@ -18517,8 +20462,30 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_168c_001b_1186_3a22[] = "D-Link AirPremier AG DWL-AG530 Wireless PCI Adapter";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_001b_1458_e901[] = "GN-WI01HT Wireless a/b/g MiniPCI Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_001b_168c_001b[] = "Wireless LAN PCI LiteOn";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_001b_168c_2062[] = "EnGenius EMP-8602 (400mw) or Compex WLM54AG (SuperAG)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_001b_168c_2063[] = "EnGenius EMP-8602 (400mw) or Compex WLM54AG";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_001b_a727_6804[] = "Wireless 11a/b/g PC Card with XJACK(r) Antenna";
+#endif
+static const char pci_device_168c_001c[] = "AR5006EG 802.11 b/g Wireless PCI Express Adapter";
 static const char pci_device_168c_0020[] = "AR5005VL 802.11bg Wireless NIC";
+static const char pci_device_168c_0023[] = "AR5416 802.11a/b/g/n Wireless PCI Adapter";
+static const char pci_device_168c_0024[] = "AR5418 802.11a/b/g/n Wireless PCI Express Adapter";
 static const char pci_device_168c_1014[] = "AR5212 802.11abg NIC";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_168c_1014_1014_058a[] = "ThinkPad 11a/b/g Wireless LAN Mini Express Adapter (AR5BXB6)";
+#endif
+static const char pci_device_168c_3b08[] = "D-Link AirPlus G DWL-G630";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1695[] = "EPoX Computer Co., Ltd.";
@@ -18528,6 +20495,10 @@
 static const char pci_device_169c_0044[] = "Revolution Storage Processing Card";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_169d[] = "Club-3D VB (Wrong ID)";
+static const char pci_device_169d_3306[] = "ZAP TV 2202";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_16a5[] = "Tekram Technology Co.,Ltd.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -18554,6 +20525,10 @@
 static const char pci_vendor_16be[] = "Creatix Polymedia GmbH";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_16c6[] = "Micrel-Kendin";
+static const char pci_device_16c6_8695[] = "Centaur KS8695 ARM processor";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_16c8[] = "Octasic Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -18570,6 +20545,10 @@
 static const char pci_vendor_16ce[] = "Roland Corp.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_16d5[] = "Acromag, Inc.";
+static const char pci_device_16d5_4d4e[] = "PMC482, APC482, AcPC482 Counter Timer Board";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_16df[] = "PIKA Technologies Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -18577,9 +20556,14 @@
 static const char pci_device_16e3_1e0f[] = "LEON2FT Processor";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_16e5[] = "Intellon Corp.";
+static const char pci_device_16e5_6000[] = "INT6000 Ethernet-to-Powerline Bridge [HomePlug AV]";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_16ec[] = "U.S. Robotics";
 static const char pci_device_16ec_00ff[] = "USR997900 10/100 Mbps PCI Network Card";
 static const char pci_device_16ec_0116[] = "USR997902 10/100/1000 Mbps PCI Network Card";
+static const char pci_device_16ec_2f00[] = "USR5660A (USR265660A, USR5660A-BP) 56K PCI Faxmodem";
 static const char pci_device_16ec_3685[] = "Wireless Access PCI Adapter Model 022415";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -18619,11 +20603,14 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1734[] = "Fujitsu Siemens Computer GmbH";
+static const char pci_device_1734_1078[] = "Amilo Pro v2010";
+static const char pci_device_1734_1085[] = "Celsius M450";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1737[] = "Linksys";
 static const char pci_device_1737_0013[] = "WMP54G Wireless Pci Card";
 static const char pci_device_1737_0015[] = "WMP54GS Wireless Pci Card";
+static const char pci_device_1737_0029[] = "WPG54G ver. 4 PCI Card";
 static const char pci_device_1737_1032[] = "Gigabit Network Adapter";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_1737_1032_1737_0015[] = "EG1032 v2 Instant Gigabit Network Adapter";
@@ -18691,6 +20678,7 @@
 static const char pci_device_1799_6020[] = "Wireless PCMCIA Card - F5D6020";
 static const char pci_device_1799_6060[] = "Wireless PDA Card - F5D6060";
 static const char pci_device_1799_7000[] = "Wireless PCI Card - F5D7000";
+static const char pci_device_1799_700a[] = "Wireless PCI Card - F5D7000UK";
 static const char pci_device_1799_7010[] = "BCM4306 802.11b/g Wireless Lan Controller F5D7010";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -18729,6 +20717,8 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_17cb[] = "Airgo Networks Inc";
+static const char pci_device_17cb_0001[] = "AGN100 802.11 a/b/g True MIMO Wireless Card";
+static const char pci_device_17cb_0002[] = "AGN300 802.11 a/b/g True MIMO Wireless Card";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_17cc[] = "NetChip Technology, Inc";
@@ -18753,21 +20743,55 @@
 static const char pci_device_17d5_5831[] = "Xframe 10 Gigabit Ethernet PCI-X";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_17d5_5831_103c_12d5[] = "HP PCI-X 133MHz 10GbE SR Fiber";
+static const char pci_subsys_17d5_5831_103c_12d5[] = "PCI-X 133MHz 10GbE SR Fiber";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_17d5_5831_10a9_8020[] = "Single Port 10 Gigabit Ethernet (PCI-X, Fiber)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_17d5_5831_10a9_8024[] = "Single Port 10 Gigabit Ethernet (PCI-X, Fiber)";
+#endif
+static const char pci_device_17d5_5832[] = "Xframe II 10Gbps Ethernet";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_17d5_5832_10a9_8021[] = "Single Port 10 Gigabit Ethernet II (PCI-X, Fiber)";
+#endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_device_17d5_5832[] = "Xframe II 10 Gigabit Ethernet PCI-X";
+static const char pci_vendor_17db[] = "Cray Inc";
+static const char pci_device_17db_0101[] = "XT Series [Seastar] 3D Toroidal Router";
+static const char pci_device_17db_0201[] = "XT Series [Seastar] 3D Toroidal Router with RMA";
+static const char pci_device_17db_0202[] = "XT Series [Seastar] 3D Toroidal Router with RMA";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_17de[] = "KWorld Computer Co. Ltd.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_17e4[] = "Sectra AB";
+static const char pci_device_17e4_0001[] = "KK671 Cardbus encryption board";
+static const char pci_device_17e4_0002[] = "KK672 Cardbus encryption board";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_17e6[] = "Entropic Communications Inc.";
+static const char pci_device_17e6_0010[] = "EN2010 [c.Link] MoCA Network Controller (Coax, PCI interface)";
+static const char pci_device_17e6_0011[] = "EN2010 [c.Link] MoCA Network Controller (Coax, MPEG interface)";
+static const char pci_device_17e6_0021[] = "EN2210 [c.Link] MoCA Network Controller (Coax)";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_17ee[] = "Connect Components Ltd";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_17f2[] = "Albatron Corp.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_17f3[] = "RDC Semiconductor, Inc.";
+static const char pci_device_17f3_6020[] = "R6020 North Bridge";
+static const char pci_device_17f3_6030[] = "R6030 ISA Bridge";
+static const char pci_device_17f3_6040[] = "R6040 MAC Controller";
+static const char pci_device_17f3_6060[] = "R6060 USB 1.1 Controller";
+static const char pci_device_17f3_6061[] = "R6061 USB 2.0 Controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_17fe[] = "Linksys, A Division of Cisco Systems";
 static const char pci_device_17fe_2120[] = "WMP11v4 802.11b PCI card";
 static const char pci_device_17fe_2220[] = "[AirConn] INPROCOMM IPN 2220 Wireless LAN Adapter (rev 01)";
@@ -18779,6 +20803,9 @@
 static const char pci_vendor_17ff[] = "Benq Corporation";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1809[] = "Lumanate, Inc.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1813[] = "Ambient Technologies Inc";
 static const char pci_device_1813_4000[] = "HaM controllerless modem";
 #ifdef INIT_SUBSYS_INFO
@@ -18835,7 +20862,26 @@
 #endif
 static const char pci_device_1814_0301[] = "RT2561/RT61 802.11g PCI";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_1814_0301_2561_1814[] = "Intellinet Wireless G PCI Adapter";
+static const char pci_subsys_1814_0301_1186_3c08[] = "DWL-G630 Rev E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1814_0301_1186_3c09[] = "DWL-G510 Rev C";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1814_0301_1458_e934[] = "GN-WP01GS";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1814_0301_1737_0055[] = "WMP54G ver 4.1";
+#endif
+static const char pci_device_1814_0302[] = "RT2561/RT61 rev B 802.11g";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1814_0302_1186_3c08[] = "DWL-G630 Rev E";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1814_0302_1186_3c09[] = "DWL-G510 Rev C";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1814_0302_1462_b834[] = "PC54G3 Wireless 11g PCI Card";
 #endif
 static const char pci_device_1814_0401[] = "Ralink RT2600 802.11 MIMO";
 #endif
@@ -18852,6 +20898,10 @@
 static const char pci_device_182d_9790[] = "WL-121 Wireless Network Adapter 100g+ [Ver.3]";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_182e[] = "Raza Microelectronics, Inc.";
+static const char pci_device_182e_0008[] = "XLR516 Processor";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1830[] = "Credence Systems Corporation";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -18859,17 +20909,24 @@
 static const char pci_device_183b_08a7[] = "MVC100 DVI";
 static const char pci_device_183b_08a8[] = "MVC101 SDI";
 static const char pci_device_183b_08a9[] = "MVC102 DVI+Audio";
+static const char pci_device_183b_08b0[] = "MVC200-DC";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1849[] = "ASRock Incorporation";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_184a[] = "Thales Computers";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1851[] = "Microtune, Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1852[] = "Anritsu Corp.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1853[] = "SMSC Automotive Infotainment System Group";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1854[] = "LG Electronics, Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -18892,6 +20949,11 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_187e[] = "ZyXEL Communication Corporation";
+static const char pci_device_187e_3403[] = "ZyAir G-110 802.11g";
+static const char pci_device_187e_340e[] = "M-302 802.11g XtremeMIMO";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1885[] = "Avvida Systems Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1888[] = "Varisys Ltd";
@@ -18901,6 +20963,9 @@
 static const char pci_device_1888_0720[] = "VS24x series PowerPC PCI board";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_188a[] = "Ample Communications, Inc";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1890[] = "Egenera, Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -18915,7 +20980,8 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_18ac[] = "DViCO Corporation";
 static const char pci_device_18ac_d500[] = "FusionHDTV 5";
-static const char pci_device_18ac_d810[] = "FusionHDTV 3 Gold";
+static const char pci_device_18ac_d800[] = "FusionHDTV 3 Gold";
+static const char pci_device_18ac_d810[] = "FusionHDTV 3 Gold-Q";
 static const char pci_device_18ac_d820[] = "FusionHDTV 3 Gold-T";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -18926,14 +20992,18 @@
 static const char pci_vendor_18bc[] = "Info-Tek Corp.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_18c3[] = "Micronas Semiconductor Holding AG";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_18c8[] = "Cray Inc";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_18c9[] = "ARVOO Engineering BV";
 #endif
-static const char pci_vendor_18ca[] = "XGI - Xabre Graphics Inc";
+static const char pci_vendor_18ca[] = "XGI Technology Inc. (eXtreme Graphics Innovation)";
 static const char pci_device_18ca_0020[] = "Volari Z7";
 static const char pci_device_18ca_0040[] = "Volari V3XT/V5/V8";
+static const char pci_device_18ca_0047[] = "Volari 8300 (chip: XP10, codename: XG47)";
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_18d2[] = "Sitecom";
 static const char pci_device_18d2_3069[] = "DC-105v2 ISDN controller";
@@ -18978,6 +21048,12 @@
 #endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_18f6[] = "NextIO";
+static const char pci_device_18f6_1000[] = "[Nexsis] Switch Virtual P2P PCIe Bridge";
+static const char pci_device_18f6_1050[] = "[Nexsis] Switch Virtual P2P PCI Bridge";
+static const char pci_device_18f6_2000[] = "[Nexsis] Switch Integrated Mgmt. Endpoint";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_18f7[] = "Commtech, Inc.";
 static const char pci_device_18f7_0001[] = "Fastcom ESCC-PCI-335";
 static const char pci_device_18f7_0002[] = "Fastcom 422/4-PCI-335";
@@ -18989,24 +21065,41 @@
 static const char pci_vendor_18fb[] = "Resilience Corporation";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1904[] = "Hangzhou Silan Microelectronics Co., Ltd.";
+static const char pci_device_1904_8139[] = "RTL8139D [Realtek] PCI 10/100BaseTX ethernet adaptor";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1923[] = "Sangoma Technologies Corp.";
+static const char pci_device_1923_0040[] = "A200/Remora FXO/FXS Analog AFT card";
 static const char pci_device_1923_0100[] = "A104d QUAD T1/E1 AFT card";
+static const char pci_device_1923_0300[] = "A101 single-port T1/E1";
+static const char pci_device_1923_0400[] = "A104u Quad T1/E1 AFT";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_vendor_1924[] = "Level 5 Networks Inc.";
+static const char pci_vendor_1924[] = "Solarflare Communications (nee Level 5 Networks)";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_192e[] = "TransDimension";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1931[] = "Option N.V.";
+static const char pci_device_1931_000c[] = "Qualcomm MSM6275 UMTS chip";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1942[] = "ClearSpeed Technology plc";
 static const char pci_device_1942_e511[] = "CSX600 Advance Accelerator Board";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_194a[] = "DapTechnology B.V.";
+static const char pci_device_194a_1111[] = "FireSpy3850";
+static const char pci_device_194a_1112[] = "FireSpy450b";
+static const char pci_device_194a_1113[] = "FireSpy450bT";
+static const char pci_device_194a_1114[] = "FireSpy850";
+static const char pci_device_194a_1115[] = "FireSpy850bT";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1957[] = "Freescale Semiconductor Inc";
+static const char pci_device_1957_0012[] = "MPC8548 [PowerQUICC III]";
 static const char pci_device_1957_0080[] = "MPC8349E";
 static const char pci_device_1957_0081[] = "MPC8349";
 static const char pci_device_1957_0082[] = "MPC8347E TBGA";
@@ -19020,18 +21113,48 @@
 static const char pci_vendor_1958[] = "Faster Technology, LLC.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1959[] = "PA Semi, Inc";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1966[] = "Orad Hi-Tec Systems";
 static const char pci_device_1966_1975[] = "DVG64 family";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1969[] = "Attansic Technology Corp.";
+static const char pci_device_1969_1048[] = "L1 Gigabit Ethernet Adapter";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_196a[] = "Sensory Networks Inc.";
 static const char pci_device_196a_0101[] = "NodalCore C-1000 Content Classification Accelerator";
 static const char pci_device_196a_0102[] = "NodalCore C-2000 Content Classification Accelerator";
+static const char pci_device_196a_0105[] = "NodalCore C-3000 Content Classification Accelerator";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_196d[] = "Club-3D BV";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1971[] = "AGEIA Technologies, Inc.";
+static const char pci_device_1971_1011[] = "Physics Processing Unit [PhysX]";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_1971_1011_1043_0001[] = "PhysX P1";
+#endif
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_197b[] = "JMicron Technologies, Inc.";
 static const char pci_device_197b_2360[] = "JMicron 20360/20363 AHCI Controller";
+static const char pci_device_197b_2361[] = "JMB361 AHCI/IDE";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_197b_2361_1462_7235[] = "P965 Neo MS-7235 mainboard";
+#endif
 static const char pci_device_197b_2363[] = "JMicron 20360/20363 AHCI Controller";
+static const char pci_device_197b_2365[] = "JMB365 AHCI/IDE";
+static const char pci_device_197b_2366[] = "JMB366 AHCI/IDE";
+static const char pci_device_197b_2368[] = "JMB368 IDE controller";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1982[] = "Distant Early Warning Communications Inc";
+static const char pci_device_1982_1600[] = "OX16C954 HOST-A";
+static const char pci_device_1982_16ff[] = "OX16C954 HOST-B";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1989[] = "Montilio Inc.";
@@ -19042,10 +21165,19 @@
 static const char pci_vendor_1993[] = "Innominate Security Technologies AG";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_199a[] = "Pulse-LINK, Inc.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_19a2[] = "ServerEngines LLC";
+static const char pci_device_19a2_0200[] = "BladeEngine 10Gb PCI-E iSCSI adapter";
+static const char pci_device_19a2_0201[] = "BladeEngine 10Gb PCI-E Network Adpater";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_19a8[] = "DAQDATA GmbH";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_19ac[] = "Kasten Chase Applied Research";
+static const char pci_device_19ac_0001[] = "ACA2400 Crypto Accelerator";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_19ae[] = "Progeny Systems Corporation";
@@ -19057,17 +21189,58 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_19e2[] = "Vector Informatik GmbH";
 #endif
-static const char pci_vendor_1a03[] = "Aspeed Technology Co., Ltd";
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_19e7[] = "NET (Network Equipment Technologies)";
+static const char pci_device_19e7_1001[] = "STIX DSP Card";
+static const char pci_device_19e7_1002[] = "STIX - 1 Port T1/E1 Card";
+static const char pci_device_19e7_1003[] = "STIX - 2 Port T1/E1 Card";
+static const char pci_device_19e7_1004[] = "STIX - 4 Port T1/E1 Card";
+static const char pci_device_19e7_1005[] = "STIX - 4 Port FXS Card";
+#endif
+static const char pci_vendor_1a03[] = "ASPEED Technology, Inc.";
 static const char pci_device_1a03_2000[] = "AST2000";
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1a07[] = "Kvaser AB";
+static const char pci_device_1a07_0006[] = "CAN interface PC104+ HS/HS";
+static const char pci_device_1a07_0007[] = "CAN interface PCIcanx II HS or HS/HS";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1a08[] = "Sierra semiconductor";
 static const char pci_device_1a08_0000[] = "SC15064";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_vendor_1b13[] = "Jaton Corp";
+static const char pci_vendor_1a1d[] = "GFaI e.V.";
+static const char pci_device_1a1d_1a17[] = "Meta Networks MTP-1G IDPS NIC";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const char pci_vendor_1c1c[] = "Symphony";
+static const char pci_vendor_1a29[] = "Fortinet, Inc.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1a51[] = "Hectronic AB";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1a5d[] = "Celoxica";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1a71[] = "XenSource, Inc.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1a73[] = "Violin Technologies, Inc";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1a77[] = "Lightfleet Corporation";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1a78[] = "Virident Systems Inc.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1a8c[] = "Verigy Pte. Ltd.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1b13[] = "Jaton Corp";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_1c1c[] = "Symphony";
 static const char pci_device_1c1c_0001[] = "82C101";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -19088,6 +21261,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1fc1[] = "PathScale, Inc";
 static const char pci_device_1fc1_000d[] = "InfiniPath HT-400";
+static const char pci_device_1fc1_0010[] = "InfiniPath PE-800";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_1fce[] = "Cognio Inc.";
@@ -19109,6 +21283,9 @@
 static const char pci_vendor_21c3[] = "21st Century Computer Corp.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_22b8[] = "Motorola, Inc.";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_2348[] = "Racore";
 static const char pci_device_2348_2010[] = "8142 100VG/AnyLAN";
 #endif
@@ -19140,6 +21317,12 @@
 static const char pci_device_3388_0020[] = "HB6 Universal PCI-PCI bridge (transparent mode)";
 static const char pci_device_3388_0021[] = "HB6 Universal PCI-PCI bridge (non-transparent mode)";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_3388_0021_1775_c200[] = "C2K CompactPCI interface bridge";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_3388_0021_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_3388_0021_4c53_1050[] = "CT7 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -19308,6 +21491,9 @@
 static const char pci_vendor_4321[] = "Tata Power Strategic Electronics Division";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_434e[] = "CAST Navigation LLC";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_4444[] = "Internext Compression Inc";
 static const char pci_device_4444_0016[] = "iTVC16 (CX23416) MPEG-2 Encoder";
 #ifdef INIT_SUBSYS_INFO
@@ -19350,16 +21536,25 @@
 static const char pci_subsys_4444_0016_0070_e817[] = "WinTV PVR 500 (2nd unit)";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_4444_0016_0070_ff92[] = "WiNTV PVR-550";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_4444_0016_0270_0801[] = "WinTV PVR 150";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_4444_0016_10fc_d038[] = "GV-MVP/RX2W (1st unit)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_4444_0016_10fc_d039[] = "GV-MVP/RX2W (2nd unit)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_4444_0016_12ab_fff3[] = "MPG600";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_4444_0016_12ab_ffff[] = "MPG600";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_4444_0016_4070_8801[] = "WinTV PVR 150";
+static const char pci_subsys_4444_0016_1461_c019[] = "UltraTV 1500 MCE";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_4444_0016_9005_0092[] = "VideOh! AVC-2010";
@@ -19367,9 +21562,6 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_4444_0016_9005_0093[] = "VideOh! AVC-2410";
 #endif
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_4444_0016_ff92_0070[] = "PVR-550";
-#endif
 static const char pci_device_4444_0803[] = "iTVC15 MPEG-2 Encoder";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_4444_0803_0070_4000[] = "WinTV PVR-350";
@@ -19455,6 +21647,10 @@
 static const char pci_vendor_4d54[] = "Microtechnica Co Ltd";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_4d56[] = "MATRIX VISION GmbH";
+static const char pci_device_4d56_0000[] = "Altera Cyclone II CameraLink Frame Grabber [mvHYPERION-CLe]";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_4ddc[] = "ILC Data Device Corp";
 static const char pci_device_4ddc_0100[] = "DD-42924I5-300 (ARINC 429 Data Bus)";
 static const char pci_device_4ddc_0801[] = "BU-65570I1 MIL-STD-1553 Test and Simulation";
@@ -19494,6 +21690,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_5168[] = "Animation Technologies Inc.";
+static const char pci_device_5168_0300[] = "FlyDVB-S";
 static const char pci_device_5168_0301[] = "FlyDVB-T";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -19548,6 +21745,9 @@
 static const char pci_subsys_5333_8904_1014_00db[] = "Integrated Trio3D";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_5333_8904_4843_314a[] = "Terminator 128/3D GLH";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_5333_8904_5333_8904[] = "86C365 Trio3D AGP";
 #endif
 static const char pci_device_5333_8905[] = "Trio 64V+ family";
@@ -19717,6 +21917,7 @@
 static const char pci_device_5333_8d02[] = "VT8636A [ProSavage KN133] AGP4X VGA Controller (TwisterK)";
 static const char pci_device_5333_8d03[] = "VT8751 [ProSavageDDR P4M266]";
 static const char pci_device_5333_8d04[] = "VT8375 [ProSavage8 KM266/KL266]";
+static const char pci_device_5333_8e48[] = "Chrome S27 PCIE";
 static const char pci_device_5333_9102[] = "86C410 Savage 2000";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_5333_9102_1092_5932[] = "Viper II Z200";
@@ -19752,6 +21953,9 @@
 static const char pci_device_5455_4458[] = "S5933";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_5456[] = "GoTView";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_5519[] = "Cnet Technologies, Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -19773,6 +21977,10 @@
 static const char pci_vendor_5851[] = "Exacq Technologies";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_5853[] = "XenSource, Inc.";
+static const char pci_device_5853_0001[] = "Xen Platform Device";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_6356[] = "UltraStor";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -19793,6 +22001,7 @@
 static const char pci_vendor_7063[] = "pcHDTV";
 static const char pci_device_7063_2000[] = "HD-2000";
 static const char pci_device_7063_3000[] = "HD-3000";
+static const char pci_device_7063_5500[] = "HD5500 HDTV";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_7604[] = "O.N. Electronic Co Ltd.";
@@ -19878,13 +22087,13 @@
 static const char pci_device_8086_0964[] = "80960RP [i960 RP Microprocessor/Bridge]";
 static const char pci_device_8086_1000[] = "82542 Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1000_0e11_b0df[] = "NC1632 Gigabit Ethernet Adapter (1000-SX)";
+static const char pci_subsys_8086_1000_0e11_b0df[] = "NC6132 Gigabit Ethernet Adapter (1000-SX)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1000_0e11_b0e0[] = "NC1633 Gigabit Ethernet Adapter (1000-LX)";
+static const char pci_subsys_8086_1000_0e11_b0e0[] = "NC6133 Gigabit Ethernet Adapter (1000-LX)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1000_0e11_b123[] = "NC1634 Gigabit Ethernet Adapter (1000-SX)";
+static const char pci_subsys_8086_1000_0e11_b123[] = "NC6134 Gigabit Ethernet Adapter (1000-LX)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1000_1014_0119[] = "Netfinity Gigabit Ethernet SX Adapter";
@@ -19945,7 +22154,7 @@
 static const char pci_subsys_8086_1008_8086_2107[] = "PRO/1000 XT Server Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1008_8086_2110[] = "PRO/1000 XT Server Adapter";
+static const char pci_subsys_8086_1008_8086_2110[] = "PRO/1000 XT Desktop Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1008_8086_3108[] = "PRO/1000 XT Network Connection";
@@ -19992,10 +22201,10 @@
 static const char pci_subsys_8086_100e_1014_026a[] = "PRO/1000 MT Network Connection";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_100e_1024_0134[] = "Poweredge SC600";
+static const char pci_subsys_8086_100e_1028_002e[] = "Optiplex GX260";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_100e_1028_002e[] = "Optiplex GX260";
+static const char pci_subsys_8086_100e_1028_0134[] = "PowerEdge 600SC";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_100e_1028_0151[] = "PRO/1000 MT Network Connection";
@@ -20051,10 +22260,10 @@
 static const char pci_subsys_8086_1010_8086_1011[] = "PRO/1000 MT Dual Port Server Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1010_8086_1012[] = "Primergy RX300";
+static const char pci_subsys_8086_1010_8086_1012[] = "PRO/1000 MT Dual Port Server Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1010_8086_101a[] = "PRO/1000 MT Dual Port Network Adapter";
+static const char pci_subsys_8086_1010_8086_101a[] = "PRO/1000 MT Dual Port Network Connection";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1010_8086_3424[] = "SE7501HG2 Mainboard";
@@ -20076,19 +22285,28 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1012_8086_1012[] = "PRO/1000 MF Dual Port Server Adapter";
 #endif
-static const char pci_device_8086_1013[] = "82541EI Gigabit Ethernet Controller (Copper)";
+static const char pci_device_8086_1013[] = "82541EI Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1013_8086_0013[] = "PRO/1000 MT Network Connection";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1013_8086_1013[] = "IBM ThinkCentre Network Card";
+static const char pci_subsys_8086_1013_8086_1013[] = "PRO/1000 MT Network Connection";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1013_8086_1113[] = "PRO/1000 MT Desktop Adapter";
 #endif
 static const char pci_device_8086_1014[] = "82541ER Gigabit Ethernet Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1014_8086_0014[] = "PRO/1000 MT Desktop Connection";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1014_8086_1014[] = "PRO/1000 MT Network Connection";
+#endif
 static const char pci_device_8086_1015[] = "82540EM Gigabit Ethernet Controller (LOM)";
-static const char pci_device_8086_1016[] = "82540EP Gigabit Ethernet Controller (LOM)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1015_8086_1015[] = "PRO/1000 MT Mobile Connection";
+#endif
+static const char pci_device_8086_1016[] = "82540EP Gigabit Ethernet Controller (Mobile)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1016_1014_052c[] = "PRO/1000 MT Mobile Connection";
 #endif
@@ -20098,15 +22316,15 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1016_8086_1016[] = "PRO/1000 MT Mobile Connection";
 #endif
-static const char pci_device_8086_1017[] = "82540EP Gigabit Ethernet Controller (LOM)";
+static const char pci_device_8086_1017[] = "82540EP Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1017_8086_1017[] = "PR0/1000 MT Desktop Connection";
 #endif
 static const char pci_device_8086_1018[] = "82541EI Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1018_8086_1018[] = "PRO/1000 MT Desktop Adapter";
+static const char pci_subsys_8086_1018_8086_1018[] = "PRO/1000 MT Mobile Connection";
 #endif
-static const char pci_device_8086_1019[] = "82547EI Gigabit Ethernet Controller (LOM)";
+static const char pci_device_8086_1019[] = "82547EI Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1019_1458_1019[] = "GA-8IPE1000 Pro2 motherboard (865PE)";
 #endif
@@ -20120,9 +22338,15 @@
 static const char pci_subsys_8086_1019_8086_301f[] = "D865PERL mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1019_8086_302c[] = "Intel 82865G Mainboard (D865GBF)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1019_8086_3427[] = "S875WP1-E mainboard";
 #endif
 static const char pci_device_8086_101a[] = "82547EI Gigabit Ethernet Controller (Mobile)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_101a_8086_101a[] = "PRO/1000 CT Mobile Connection";
+#endif
 static const char pci_device_8086_101d[] = "82546EB Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_101d_8086_1000[] = "PRO/1000 MT Quad Port Server Adapter";
@@ -20151,6 +22375,9 @@
 static const char pci_subsys_8086_1026_8086_1002[] = "PRO/1000 MT Server Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1026_8086_1003[] = "PRO/1000 GT Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1026_8086_1026[] = "PRO/1000 MT Server Connection";
 #endif
 static const char pci_device_8086_1027[] = "82545GM Gigabit Ethernet Controller";
@@ -20171,7 +22398,7 @@
 #endif
 static const char pci_device_8086_1028[] = "82545GM Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1028_8086_1028[] = "PRO/1000 MB Server Adapter";
+static const char pci_subsys_8086_1028_8086_1028[] = "PRO/1000 MB Server Connection";
 #endif
 static const char pci_device_8086_1029[] = "82559 Ethernet Controller";
 static const char pci_device_8086_1030[] = "82559 InBusiness 10/100";
@@ -20183,6 +22410,9 @@
 static const char pci_subsys_8086_1031_104d_80e7[] = "Vaio PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1031_104d_813c[] = "Vaio PCG-GRV616G";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1031_107b_5350[] = "EtherExpress PRO/100 VE";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -20200,13 +22430,10 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1031_144d_c006[] = "vpr Matrix 170B4";
 #endif
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1031_813c_104d[] = "Vaio PCG-GRV616G";
-#endif
 static const char pci_device_8086_1032[] = "82801CAM (ICH3) PRO/100 VE Ethernet Controller";
 static const char pci_device_8086_1033[] = "82801CAM (ICH3) PRO/100 VM (LOM) Ethernet Controller";
 static const char pci_device_8086_1034[] = "82801CAM (ICH3) PRO/100 VM Ethernet Controller";
-static const char pci_device_8086_1035[] = "82801CAM (ICH3)/82562EH (LOM)  Ethernet Controller";
+static const char pci_device_8086_1035[] = "82801CAM (ICH3)/82562EH (LOM) Ethernet Controller";
 static const char pci_device_8086_1036[] = "82801CAM (ICH3) 82562EH Ethernet Controller";
 static const char pci_device_8086_1037[] = "82801CAM (ICH3) Chipset Ethernet Controller";
 static const char pci_device_8086_1038[] = "82801CAM (ICH3) PRO/100 VM (KM) Ethernet Controller";
@@ -20221,6 +22448,9 @@
 static const char pci_device_8086_103b[] = "82801DB PRO/100 VM (LOM) Ethernet Controller";
 static const char pci_device_8086_103c[] = "82801DB PRO/100 VM (CNR) Ethernet Controller";
 static const char pci_device_8086_103d[] = "82801DB PRO/100 VE (MOB) Ethernet Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_103d_1014_0522[] = "Thinkpad R50e model 1634";
+#endif
 static const char pci_device_8086_103e[] = "82801DB PRO/100 VM (MOB) Ethernet Controller";
 static const char pci_device_8086_1040[] = "536EP Data Fax Modem";
 #ifdef INIT_SUBSYS_INFO
@@ -20228,8 +22458,17 @@
 #endif
 static const char pci_device_8086_1043[] = "PRO/Wireless LAN 2100 3B Mini PCI Adapter";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1043_103c_08b0[] = "tc1100 tablet";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1043_8086_2522[] = "Samsung P30 integrated WLAN";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1043_8086_2527[] = "MIM2000/Centrino";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1043_8086_2581[] = "Toshiba Satellite M10";
+#endif
 static const char pci_device_8086_1048[] = "PRO/10GbE LR Server Adapter";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1048_8086_a01f[] = "PRO/10GbE LR Server Adapter";
@@ -20237,7 +22476,11 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1048_8086_a11f[] = "PRO/10GbE LR Server Adapter";
 #endif
-static const char pci_device_8086_104b[] = "Ethernet Controller";
+static const char pci_device_8086_1049[] = "82566MM Gigabit Network Connection";
+static const char pci_device_8086_104a[] = "82566DM Gigabit Network Connection";
+static const char pci_device_8086_104b[] = "82566DC Gigabit Network Connection";
+static const char pci_device_8086_104c[] = "82562V 10/100 Network Connection";
+static const char pci_device_8086_104d[] = "82566MC Gigabit Network Connection";
 static const char pci_device_8086_1050[] = "82562EZ 10/100 Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1050_1462_728c[] = "865PE Neo2 (MS-6728)";
@@ -20257,13 +22500,57 @@
 static const char pci_device_8086_1051[] = "82801EB/ER (ICH5/ICH5R) integrated LAN Controller";
 static const char pci_device_8086_1052[] = "PRO/100 VM Network Connection";
 static const char pci_device_8086_1053[] = "PRO/100 VM Network Connection";
+static const char pci_device_8086_1054[] = "PRO/100 VE Network Connection";
+static const char pci_device_8086_1055[] = "PRO/100 VM Network Connection";
+static const char pci_device_8086_1056[] = "PRO/100 VE Network Connection";
+static const char pci_device_8086_1057[] = "PRO/100 VE Network Connection";
 static const char pci_device_8086_1059[] = "82551QM Ethernet Controller";
+static const char pci_device_8086_105b[] = "82546GB Gigabit Ethernet Controller (Copper)";
 static const char pci_device_8086_105e[] = "82571EB Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_105e_103c_7044[] = "NC360T PCI Express Dual Port Gigabit Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_105e_1775_6003[] = "Telum GE-QT";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_105e_8086_005e[] = "PRO/1000 PT Dual Port Server Connection";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_105e_8086_105e[] = "PRO/1000 PT Dual Port Network Connection";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_105e_8086_115e[] = "PRO/1000 PT Dual Port Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_105e_8086_116e[] = "PRO/1000 PT Dual Port Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_105e_8086_125e[] = "PRO/1000 PT Dual Port Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_105e_8086_135e[] = "PRO/1000 PT Dual Port Server Adapter";
+#endif
 static const char pci_device_8086_105f[] = "82571EB Gigabit Ethernet Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_105f_8086_115f[] = "PRO/1000 PF Dual Port Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_105f_8086_116f[] = "PRO/1000 PF Dual Port Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_105f_8086_125f[] = "PRO/1000 PF Dual Port Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_105f_8086_135f[] = "PRO/1000 PF Dual Port Server Adapter";
+#endif
 static const char pci_device_8086_1060[] = "82571EB Gigabit Ethernet Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1060_8086_0060[] = "PRO/1000 PB Dual Port Server Connection";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1060_8086_1060[] = "PRO/1000 PB Dual Port Server Connection";
+#endif
 static const char pci_device_8086_1064[] = "82562ET/EZ/GT/GZ - PRO/100 VE (LOM) Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1064_1043_80f8[] = "P5GD1-VW Mainboard";
@@ -20285,7 +22572,7 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1075_8086_1075[] = "PRO/1000 CT Network Connection";
 #endif
-static const char pci_device_8086_1076[] = "82541GI/PI Gigabit Ethernet Controller";
+static const char pci_device_8086_1076[] = "82541GI Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1076_1028_0165[] = "PowerEdge 750";
 #endif
@@ -20302,7 +22589,7 @@
 static const char pci_subsys_8086_1076_8086_1176[] = "PRO/1000 MT Desktop Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1076_8086_1276[] = "PRO/1000 MT Desktop Adapter";
+static const char pci_subsys_8086_1076_8086_1276[] = "PRO/1000 MT Network Adapter";
 #endif
 static const char pci_device_8086_1077[] = "82541GI Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
@@ -20314,16 +22601,22 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1077_8086_1077[] = "PRO/1000 MT Mobile Connection";
 #endif
-static const char pci_device_8086_1078[] = "82541EI Gigabit Ethernet Controller";
+static const char pci_device_8086_1078[] = "82541ER Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1078_8086_1078[] = "PRO/1000 MT Network Connection";
+static const char pci_subsys_8086_1078_8086_1078[] = "82541ER-based Network Connection";
 #endif
 static const char pci_device_8086_1079[] = "82546GB Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1079_103c_12a6[] = "HP Dual Port 1000Base-T [A9900A]";
+static const char pci_subsys_8086_1079_103c_12a6[] = "Dual Port 1000Base-T [A9900A]";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1079_103c_12cf[] = "HP Core Dual Port 1000Base-T [AB352A]";
+static const char pci_subsys_8086_1079_103c_12cf[] = "Core Dual Port 1000Base-T [AB352A]";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1079_1775_10d0[] = "V5D Single Board Computer Gigabit Ethernet";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1079_1775_ce90[] = "CE9";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1079_1fc1_0027[] = "Niagara 2261 Failover NIC";
@@ -20341,14 +22634,14 @@
 static const char pci_subsys_8086_1079_8086_1079[] = "PRO/1000 MT Dual Port Network Connection";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1079_8086_1179[] = "PRO/1000 MT Dual Port Network Connection";
+static const char pci_subsys_8086_1079_8086_1179[] = "PRO/1000 MT Dual Port Server Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1079_8086_117a[] = "PRO/1000 MT Dual Port Server Adapter";
 #endif
 static const char pci_device_8086_107a[] = "82546GB Gigabit Ethernet Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_107a_103c_12a8[] = "HP Dual Port 1000base-SX [A9899A]";
+static const char pci_subsys_8086_107a_103c_12a8[] = "Dual Port 1000base-SX [A9899A]";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_107a_8086_107a[] = "PRO/1000 MF Dual Port Server Adapter";
@@ -20364,37 +22657,121 @@
 static const char pci_subsys_8086_107b_8086_107b[] = "PRO/1000 MB Dual Port Server Connection";
 #endif
 static const char pci_device_8086_107c[] = "82541PI Gigabit Ethernet Controller";
-static const char pci_device_8086_107d[] = "82572EI Gigabit Ethernet Controller";
-static const char pci_device_8086_107e[] = "82572EI Gigabit Ethernet Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_107c_8086_1376[] = "PRO/1000 GT Desktop Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_107c_8086_1476[] = "PRO/1000 GT Desktop Adapter";
+#endif
+static const char pci_device_8086_107d[] = "82572EI Gigabit Ethernet Controller (Copper)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_107d_8086_1082[] = "PRO/1000 PT Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_107d_8086_1092[] = "PRO/1000 PT Server Adapter";
+#endif
+static const char pci_device_8086_107e[] = "82572EI Gigabit Ethernet Controller (Fiber)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_107e_8086_1084[] = "PRO/1000 PF Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_107e_8086_1094[] = "PRO/1000 PF Server Adapter";
+#endif
 static const char pci_device_8086_107f[] = "82572EI Gigabit Ethernet Controller";
 static const char pci_device_8086_1080[] = "FA82537EP 56K V.92 Data/Fax Modem PCI";
-static const char pci_device_8086_1081[] = "Enterprise Southbridge LAN Copper";
-static const char pci_device_8086_1082[] = "Enterprise Southbridge LAN fiber";
-static const char pci_device_8086_1083[] = "Enterprise Southbridge LAN SERDES";
-static const char pci_device_8086_1084[] = "Enterprise Southbridge IDE Redirection";
-static const char pci_device_8086_1085[] = "Enterprise Southbridge Serial Port Redirection";
-static const char pci_device_8086_1086[] = "Enterprise Southbridge IPMI/KCS0";
-static const char pci_device_8086_1087[] = "Enterprise Southbridge UHCI Redirection";
-static const char pci_device_8086_1089[] = "Enterprise Southbridge BT";
-static const char pci_device_8086_108a[] = "82546EB Gigabit Ethernet Controller";
+static const char pci_device_8086_1081[] = "631xESB/632xESB LAN Controller Copper";
+static const char pci_device_8086_1082[] = "631xESB/632xESB LAN Controller fiber";
+static const char pci_device_8086_1083[] = "631xESB/632xESB LAN Controller SERDES";
+static const char pci_device_8086_1084[] = "631xESB/632xESB IDE Redirection";
+static const char pci_device_8086_1085[] = "631xESB/632xESB Serial Port Redirection";
+static const char pci_device_8086_1086[] = "631xESB/632xESB IPMI/KCS0";
+static const char pci_device_8086_1087[] = "631xESB/632xESB UHCI Redirection";
+static const char pci_device_8086_1089[] = "631xESB/632xESB BT";
+static const char pci_device_8086_108a[] = "82546GB Gigabit Ethernet Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_108a_8086_108a[] = "PRO/1000 P Dual Port Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_108a_8086_118a[] = "PRO/1000 P Dual Port Server Adapter";
+#endif
 static const char pci_device_8086_108b[] = "82573V Gigabit Ethernet Controller (Copper)";
 static const char pci_device_8086_108c[] = "82573E Gigabit Ethernet Controller (Copper)";
-static const char pci_device_8086_108e[] = "82573E KCS";
-static const char pci_device_8086_108f[] = "Intel(R) Active Management Technology - SOL";
-static const char pci_device_8086_1092[] = "Intel(R) PRO/100 VE Network Connection";
-static const char pci_device_8086_1096[] = "PRO/1000 EB Network Connection with I/O Acceleration";
-static const char pci_device_8086_1097[] = "Enterprise Southbridge DPT LAN fiber";
-static const char pci_device_8086_1098[] = "PRO/1000 EB Backplane Connection with I/O Acceleration";
-static const char pci_device_8086_1099[] = "82546GB Quad Port Server Adapter";
+static const char pci_device_8086_108e[] = "82573E KCS (Active Management)";
+static const char pci_device_8086_108f[] = "Active Management Technology - SOL";
+static const char pci_device_8086_1091[] = "PRO/100 VM Network Connection";
+static const char pci_device_8086_1092[] = "PRO/100 VE Network Connection";
+static const char pci_device_8086_1093[] = "PRO/100 VM Network Connection";
+static const char pci_device_8086_1094[] = "PRO/100 VE Network Connection";
+static const char pci_device_8086_1095[] = "PRO/100 VE Network Connection";
+static const char pci_device_8086_1096[] = "80003ES2LAN Gigabit Ethernet Controller (Copper)";
+static const char pci_device_8086_1097[] = "631xESB/632xESB DPT LAN Controller (Fiber)";
+static const char pci_device_8086_1098[] = "80003ES2LAN Gigabit Ethernet Controller (Serdes)";
+static const char pci_device_8086_1099[] = "82546GB Gigabit Ethernet Controller (Copper)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1099_8086_1099[] = "PRO/1000 GT Quad Port Server Adapter";
+#endif
 static const char pci_device_8086_109a[] = "82573L Gigabit Ethernet Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_109a_1179_ff10[] = "PRO/1000 PL";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_109a_17aa_2001[] = "ThinkPad T60";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_109a_17aa_207e[] = "Thinkpad X60s";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_109a_8086_109a[] = "PRO/1000 PL Network Connection";
+#endif
 static const char pci_device_8086_109b[] = "82546GB PRO/1000 GF Quad Port Server Adapter";
+static const char pci_device_8086_109e[] = "82597EX 10GbE Ethernet Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_109e_8086_a01f[] = "PRO/10GbE CX4 Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_109e_8086_a11f[] = "PRO/10GbE CX4 Server Adapter";
+#endif
 static const char pci_device_8086_10a0[] = "82571EB PRO/1000 AT Quad Port Bypass Adapter";
 static const char pci_device_8086_10a1[] = "82571EB PRO/1000 AF Quad Port Bypass Adapter";
+static const char pci_device_8086_10a4[] = "82571EB Gigabit Ethernet Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_10a4_8086_10a4[] = "PRO/1000 PT Quad Port Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_10a4_8086_11a4[] = "PRO/1000 PT Quad Port Server Adapter";
+#endif
 static const char pci_device_8086_10b0[] = "82573L PRO/1000 PL Network Connection";
 static const char pci_device_8086_10b2[] = "82573V PRO/1000 PM Network Connection";
 static const char pci_device_8086_10b3[] = "82573E PRO/1000 PM Network Connection";
 static const char pci_device_8086_10b4[] = "82573L PRO/1000 PL Network Connection";
-static const char pci_device_8086_10b5[] = "82546GB PRO/1000 GT Quad Port Server Adapter";
+static const char pci_device_8086_10b5[] = "82546GB Gigabit Ethernet Controller (Copper)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_10b5_103c_3109[] = "NC340T PCI-X Quad-port Gigabit Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_10b5_8086_1099[] = "PRO/1000 GT Quad Port Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_10b5_8086_1199[] = "PRO/1000 GT Quad Port Server Adapter";
+#endif
+static const char pci_device_8086_10b9[] = "82572EI Gigabit Ethernet Controller (Copper)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_10b9_8086_1083[] = "PRO/1000 PT Desktop Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_10b9_8086_1093[] = "PRO/1000 PT Desktop Adapter";
+#endif
+static const char pci_device_8086_10ba[] = "80003ES2LAN Gigabit Ethernet Controller (Copper)";
+static const char pci_device_8086_10bb[] = "80003ES2LAN Gigabit Ethernet Controller (Serdes)";
+static const char pci_device_8086_10bc[] = "82571EB Gigabit Ethernet Controller (Copper)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_10bc_8086_10bc[] = "PRO/1000 PT Quad Port LP Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_10bc_8086_11bc[] = "PRO/1000 PT Quad Port LP Server Adapter";
+#endif
+static const char pci_device_8086_10c4[] = "82562GT 10/100 Network Connection";
+static const char pci_device_8086_10c5[] = "82562G 10/100 Network Connection";
 static const char pci_device_8086_1107[] = "PRO/1000 MF Server Adapter (LX)";
 static const char pci_device_8086_1130[] = "82815 815 Chipset Host Bridge and Memory Controller Hub";
 #ifdef INIT_SUBSYS_INFO
@@ -20434,7 +22811,7 @@
 static const char pci_subsys_8086_1161_8086_1161[] = "82806AA PCI64 Hub APIC";
 #endif
 static const char pci_device_8086_1162[] = "Xscale 80200 Big Endian Companion Chip";
-static const char pci_device_8086_1200[] = "Intel IXP1200 Network Processor";
+static const char pci_device_8086_1200[] = "IXP1200 Network Processor";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1200_172a_0000[] = "AEP SSL Accelerator";
 #endif
@@ -20661,6 +23038,9 @@
 static const char pci_subsys_8086_1229_1668_1100[] = "EtherExpress PRO/100B (TX) (MiniPCI Ethernet+Modem)";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1229_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1229_4c53_1080[] = "CT8 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -20691,6 +23071,9 @@
 static const char pci_subsys_8086_1229_8086_0008[] = "82558 10/100 with Wake on LAN";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1229_8086_0009[] = "82558B PRO/100+ PCI (TP)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1229_8086_000a[] = "EtherExpress PRO/100+ Management Adapter";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -20916,6 +23299,9 @@
 static const char pci_subsys_8086_1229_8086_3012[] = "EtherExpress PRO/100 Network Connection";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1229_8086_301a[] = "S845WD1-E mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1229_8086_3411[] = "SDS2 Mainboard";
 #endif
 static const char pci_device_8086_122d[] = "430FX - 82437FX TSC [Triton I]";
@@ -20929,7 +23315,7 @@
 static const char pci_device_8086_123b[] = "82380PB PCI to PCI Docking Bridge";
 static const char pci_device_8086_123c[] = "82380AB (MISA) Mobile PCI-to-ISA Bridge";
 static const char pci_device_8086_123d[] = "683053 Programmable Interrupt Device";
-static const char pci_device_8086_123e[] = "82466GX (IHPC) Integrated Hot-Plug Controller";
+static const char pci_device_8086_123e[] = "82466GX (IHPC) Integrated Hot-Plug Controller (hidden mode)";
 static const char pci_device_8086_123f[] = "82466GX Integrated Hot-Plug Controller (IHPC)";
 static const char pci_device_8086_1240[] = "82752 (752) AGP Graphics Accelerator";
 static const char pci_device_8086_124b[] = "82380FB (MPCI2) Mobile Docking Controller";
@@ -20983,16 +23369,16 @@
 static const char pci_subsys_8086_1960_103c_03a2[] = "MegaRAID";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1960_103c_10c6[] = "MegaRAID 438, HP NetRAID-3Si";
+static const char pci_subsys_8086_1960_103c_10c6[] = "MegaRAID 438, NetRAID-3Si";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1960_103c_10c7[] = "MegaRAID T5, Integrated HP NetRAID";
+static const char pci_subsys_8086_1960_103c_10c7[] = "MegaRAID T5, Integrated NetRAID";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1960_103c_10cc[] = "MegaRAID, Integrated HP NetRAID";
+static const char pci_subsys_8086_1960_103c_10cc[] = "MegaRAID, Integrated NetRAID";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_1960_103c_10cd[] = "HP NetRAID-1Si";
+static const char pci_subsys_8086_1960_103c_10cd[] = "NetRAID-1Si";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_1960_105a_0000[] = "SuperTrak";
@@ -21036,8 +23422,15 @@
 static const char pci_subsys_8086_1a30_1028_010e[] = "Optiplex GX240";
 #endif
 static const char pci_device_8086_1a31[] = "82845 845 (Brookdale) Chipset AGP Bridge";
-static const char pci_device_8086_1a38[] = "Server DMA Controller";
+static const char pci_device_8086_1a38[] = "5000 Series Chipset DMA Engine";
 static const char pci_device_8086_1a48[] = "PRO/10GbE SR Server Adapter";
+static const char pci_device_8086_1b48[] = "82597EX 10GbE Ethernet Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1b48_8086_a01f[] = "PRO/10GbE LR Server Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_1b48_8086_a11f[] = "PRO/10GbE LR Server Adapter";
+#endif
 static const char pci_device_8086_2410[] = "82801AA ISA Bridge (LPC)";
 static const char pci_device_8086_2411[] = "82801AA IDE";
 static const char pci_device_8086_2412[] = "82801AA USB";
@@ -21077,6 +23470,9 @@
 static const char pci_device_8086_2426[] = "82801AB AC'97 Modem";
 static const char pci_device_8086_2428[] = "82801AB PCI Bridge";
 static const char pci_device_8086_2440[] = "82801BA ISA Bridge (LPC)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2440_8086_5744[] = "S845WD1-E";
+#endif
 static const char pci_device_8086_2442[] = "82801BA/BAM USB (Hub #1)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2442_1014_01c6[] = "Netvista A40/A40p";
@@ -21085,6 +23481,9 @@
 static const char pci_subsys_8086_2442_1025_1016[] = "Travelmate 612 TX";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2442_1028_00c7[] = "Dimension 8100";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2442_1028_010e[] = "Optiplex GX240";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21102,6 +23501,9 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2442_8086_4557[] = "D815EGEW Mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2442_8086_5744[] = "S845WD1-E mainboard";
+#endif
 static const char pci_device_8086_2443[] = "82801BA/BAM SMBus";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2443_1014_01c6[] = "Netvista A40/A40p";
@@ -21110,6 +23512,9 @@
 static const char pci_subsys_8086_2443_1025_1016[] = "Travelmate 612 TX";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2443_1028_00c7[] = "Dimension 8100";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2443_1028_010e[] = "Optiplex GX240";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21127,11 +23532,17 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2443_8086_4557[] = "D815EGEW Mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2443_8086_5744[] = "S845WD1-E mainboard";
+#endif
 static const char pci_device_8086_2444[] = "82801BA/BAM USB (Hub #2)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2444_1025_1016[] = "Travelmate 612 TX";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2444_1028_00c7[] = "Dimension 8100";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2444_1028_010e[] = "Optiplex GX240";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21146,8 +23557,17 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2444_8086_4532[] = "D815EEA2 mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2444_8086_5744[] = "S845WD1-E mainboard";
+#endif
 static const char pci_device_8086_2445[] = "82801BA/BAM AC'97 Audio";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2445_0e11_000b[] = "Compaq Deskpro EN Audio";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2445_0e11_0088[] = "Evo D500";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2445_1014_01c6[] = "Netvista A40/A40p";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21174,7 +23594,10 @@
 #endif
 static const char pci_device_8086_2448[] = "82801 Mobile PCI Bridge";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2448_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_2448_103c_099c[] = "NX6110/NC6120";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2448_144d_c00c[] = "P30 notebook";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2448_1734_1055[] = "Amilo M1420";
@@ -21282,6 +23705,9 @@
 static const char pci_subsys_8086_244b_1014_01c6[] = "Netvista A40/A40p";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_244b_1028_00c7[] = "Dimension 8100";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_244b_1028_010e[] = "Optiplex GX240";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21296,6 +23722,9 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_244b_8086_4557[] = "D815EGEW Mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_244b_8086_5744[] = "S845WD1-E mainboard";
+#endif
 static const char pci_device_8086_244c[] = "82801BAM ISA Bridge (LPC)";
 static const char pci_device_8086_244e[] = "82801 PCI Bridge";
 #ifdef INIT_SUBSYS_INFO
@@ -21390,7 +23819,7 @@
 static const char pci_subsys_8086_2486_1014_051a[] = "ThinkPad A/T/X Series";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2486_101f_1025[] = "Acer 620 Series";
+static const char pci_subsys_8086_2486_101f_1025[] = "620 Series";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2486_104d_80e7[] = "VAIO PCG-GR214EP/GR214MP/GR215MP/GR314MP/GR315MP";
@@ -21454,6 +23883,9 @@
 static const char pci_subsys_8086_24c2_1014_0267[] = "NetVista A30p";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c2_1014_052d[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c2_1025_005a[] = "TravelMate 290";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21466,21 +23898,30 @@
 static const char pci_subsys_8086_24c2_1028_0196[] = "Inspiron 5160";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c2_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_8086_24c2_103c_088c[] = "NC8000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c2_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_8086_24c2_103c_0890[] = "NC6000 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c2_103c_08b0[] = "tc1100 tablet";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c2_1071_8160[] = "MIM2000";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c2_144d_c00c[] = "P30/P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c2_1462_5800[] = "845PE Max (MS-6580)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c2_1509_2990[] = "Averatec 5110H laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c2_1734_1004[] = "D1451 Mainboard (SCENIC N300, i845GV)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c2_1734_1055[] = "Amilo M1420";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21489,42 +23930,69 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c2_8086_4541[] = "Latitude D400";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c2_e4bf_0cc9[] = "CC9-SAMBA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c2_e4bf_0cd2[] = "CD2-BEBOP";
+#endif
 static const char pci_device_8086_24c3[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) SMBus Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c3_1014_0267[] = "NetVista A30p";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c3_1014_052d[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c3_1025_005a[] = "TravelMate 290";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c3_1028_0126[] = "Optiplex GX260";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c3_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_8086_24c3_103c_088c[] = "NC8000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c3_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_8086_24c3_103c_0890[] = "NC6000 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c3_103c_08b0[] = "tc1100 tablet";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c3_1071_8160[] = "MIM2000";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c3_144d_c00c[] = "P30/P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c3_1458_24c2[] = "GA-8PE667 Ultra";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c3_1462_5800[] = "845PE Max (MS-6580)";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c3_1734_1004[] = "D1451 Mainboard (SCENIC N300, i845GV)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c3_1734_1055[] = "Amilo M1420";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c3_4c53_1090[] = "Cx9 / Vx9 mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c3_e4bf_0cc9[] = "CC9-SAMBA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c3_e4bf_0cd2[] = "CD2-BEBOP";
+#endif
 static const char pci_device_8086_24c4[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) USB UHCI Controller #2";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c4_1014_0267[] = "NetVista A30p";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c4_1014_052d[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c4_1025_005a[] = "TravelMate 290";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21537,26 +24005,41 @@
 static const char pci_subsys_8086_24c4_1028_0196[] = "Inspiron 5160";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c4_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_8086_24c4_103c_088c[] = "NC8000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c4_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_8086_24c4_103c_0890[] = "NC6000 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c4_103c_08b0[] = "tc1100 tablet";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c4_1071_8160[] = "MIM2000";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c4_144d_c00c[] = "P30/P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c4_1462_5800[] = "845PE Max (MS-6580)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c4_1509_2990[] = "Averatec 5110H";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c4_1734_1004[] = "D1451 Mainboard (SCENIC N300, i845GV)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c4_4c53_1090[] = "Cx9 / Vx9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c4_8086_4541[] = "Latitude D400";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c4_e4bf_0cc9[] = "CC9-SAMBA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c4_e4bf_0cd2[] = "CD2-BEBOP";
+#endif
 static const char pci_device_8086_24c5[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) AC'97 Audio Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c5_0e11_00b8[] = "Analog Devices Inc. codec [SoundMAX]";
@@ -21565,6 +24048,12 @@
 static const char pci_subsys_8086_24c5_1014_0267[] = "NetVista A30p";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c5_1014_0537[] = "Thinkpad T41";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c5_1014_055f[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c5_1025_005a[] = "TravelMate 290";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21577,26 +24066,41 @@
 static const char pci_subsys_8086_24c5_1028_0196[] = "Inspiron 5160";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c5_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_8086_24c5_103c_088c[] = "NC8000 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c5_103c_0890[] = "NC6000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c5_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_8086_24c5_103c_08b0[] = "tc1100 tablet";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c5_1071_8160[] = "MIM2000";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c5_144d_c00c[] = "P30/P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c5_1458_a002[] = "GA-8PE667 Ultra";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c5_1462_5800[] = "845PE Max (MS-6580)";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c5_1734_1005[] = "D1451 (SCENIC N300, i845GV) Sigmatel STAC9750T";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c5_1734_1055[] = "Amilo M1420";
 #endif
 static const char pci_device_8086_24c6[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) AC'97 Modem Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c6_003c_1025[] = "Acer Aspire 2001WLCi (Compal CL50 motherboard) implementation";
+static const char pci_subsys_8086_24c6_1014_0524[] = "Thinkpad T41";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c6_1014_0559[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c6_1025_003c[] = "Aspire 2001WLCi (Compal CL50 motherboard) implementation";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c6_1025_005a[] = "TravelMate 290";
@@ -21605,19 +24109,28 @@
 static const char pci_subsys_8086_24c6_1028_0196[] = "Inspiron 5160";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c6_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_8086_24c6_103c_088c[] = "NC8000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c6_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_8086_24c6_103c_0890[] = "NC6000 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c6_103c_08b0[] = "tc1100 tablet";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c6_1071_8160[] = "MIM2000";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c6_144d_c00c[] = "P30/P35 notebook";
+#endif
 static const char pci_device_8086_24c7[] = "82801DB/DBL/DBM (ICH4/ICH4-L/ICH4-M) USB UHCI Controller #3";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c7_1014_0267[] = "NetVista A30p";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c7_1014_052d[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c7_1025_005a[] = "TravelMate 290";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21630,28 +24143,46 @@
 static const char pci_subsys_8086_24c7_1028_0196[] = "Inspiron 5160";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c7_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_8086_24c7_103c_088c[] = "NC8000 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c7_103c_0890[] = "NC6000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24c7_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_8086_24c7_103c_08b0[] = "tc1100 tablet";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c7_1071_8160[] = "MIM2000";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c7_144d_c00c[] = "P30/P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c7_1462_5800[] = "845PE Max (MS-6580)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c7_1509_2990[] = "Averatec 5110H";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c7_1734_1004[] = "D1451 Mainboard (SCENIC N300, i845GV)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c7_4c53_1090[] = "Cx9 / Vx9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24c7_8086_4541[] = "Latitude D400";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c7_e4bf_0cc9[] = "CC9-SAMBA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24c7_e4bf_0cd2[] = "CD2-BEBOP";
+#endif
 static const char pci_device_8086_24ca[] = "82801DBM (ICH4-M) IDE Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24ca_1014_052d[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24ca_1025_005a[] = "TravelMate 290";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21661,15 +24192,21 @@
 static const char pci_subsys_8086_24ca_1028_0196[] = "Inspiron 5160";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24ca_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_8086_24ca_103c_088c[] = "NC8000 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24ca_103c_0890[] = "NC6000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24ca_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_8086_24ca_103c_08b0[] = "tc1100 tablet";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24ca_1071_8160[] = "MIM2000";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24ca_144d_c00c[] = "P30/P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24ca_1734_1055[] = "Amilo M1420";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21689,10 +24226,22 @@
 static const char pci_subsys_8086_24cb_1462_5800[] = "845PE Max (MS-6580)";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cb_1734_1004[] = "D1451 Mainboard (SCENIC N300, i845GV)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24cb_4c53_1090[] = "Cx9 / Vx9 mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cb_e4bf_0cc9[] = "CC9-SAMBA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cb_e4bf_0cd2[] = "CD2-BEBOP";
+#endif
 static const char pci_device_8086_24cc[] = "82801DBM (ICH4-M) LPC Interface Bridge";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cc_144d_c00c[] = "P30 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24cc_1734_1055[] = "Amilo M1420";
 #endif
 static const char pci_device_8086_24cd[] = "82801DB/DBM (ICH4/ICH4-M) USB2 EHCI Controller";
@@ -21700,6 +24249,9 @@
 static const char pci_subsys_8086_24cd_1014_0267[] = "NetVista A30p";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cd_1014_052e[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24cd_1025_005a[] = "TravelMate 290";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21718,26 +24270,44 @@
 static const char pci_subsys_8086_24cd_1028_0196[] = "Inspiron 5160";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24cd_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_8086_24cd_103c_088c[] = "NC8000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24cd_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_8086_24cd_103c_0890[] = "NC6000 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cd_103c_08b0[] = "tc1100 tablet";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24cd_1071_8160[] = "MIM2000";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cd_1179_ff00[] = "Satellite 2430";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cd_144d_c00c[] = "P30/P35 notebook";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24cd_1462_3981[] = "845PE Max (MS-6580)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24cd_1509_1968[] = "Averatec 5110H";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cd_1734_1004[] = "D1451 Mainboard (SCENIC N300, i845GV)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24cd_1734_1055[] = "Amilo M1420";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24cd_4c53_1090[] = "Cx9 / Vx9 mainboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cd_e4bf_0cc9[] = "CC9-SAMBA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24cd_e4bf_0cd2[] = "CD2-BEBOP";
+#endif
 static const char pci_device_8086_24d0[] = "82801EB/ER (ICH5/ICH5R) LPC Interface Bridge";
 static const char pci_device_8086_24d1[] = "82801EB (ICH5) SATA Controller";
 #ifdef INIT_SUBSYS_INFO
@@ -21768,6 +24338,9 @@
 static const char pci_subsys_8086_24d1_8086_4246[] = "Desktop Board D865GBF";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24d1_8086_4c43[] = "Desktop Board D865GLC";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24d1_8086_524c[] = "D865PERL mainboard";
 #endif
 static const char pci_device_8086_24d2[] = "82801EB/ER (ICH5/ICH5R) USB UHCI Controller #1";
@@ -21784,7 +24357,7 @@
 static const char pci_subsys_8086_24d2_1028_019a[] = "PowerEdge SC1425";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24d2_103c_006a[] = "nx9500";
+static const char pci_subsys_8086_24d2_103c_006a[] = "NX9500";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24d2_103c_12bc[] = "d530 CMT (DG746A)";
@@ -21811,6 +24384,9 @@
 static const char pci_subsys_8086_24d2_8086_4246[] = "Desktop Board D865GBF";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24d2_8086_4c43[] = "Desktop Board D865GLC";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24d2_8086_524c[] = "D865PERL mainboard";
 #endif
 static const char pci_device_8086_24d3[] = "82801EB/ER (ICH5/ICH5R) SMBus Controller";
@@ -21824,6 +24400,9 @@
 static const char pci_subsys_8086_24d3_1028_0169[] = "Precision 470";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24d3_103c_12bc[] = "d330 uT";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24d3_1043_80a6[] = "P4P800 Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -21845,6 +24424,9 @@
 static const char pci_subsys_8086_24d3_8086_4246[] = "Desktop Board D865GBF";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24d3_8086_4c43[] = "Desktop Board D865GLC";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24d3_8086_524c[] = "D865PERL mainboard";
 #endif
 static const char pci_device_8086_24d4[] = "82801EB/ER (ICH5/ICH5R) USB UHCI Controller #2";
@@ -21861,7 +24443,7 @@
 static const char pci_subsys_8086_24d4_1028_019a[] = "PowerEdge SC1425";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24d4_103c_006a[] = "nx9500";
+static const char pci_subsys_8086_24d4_103c_006a[] = "NX9500";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24d4_103c_12bc[] = "d530 CMT (DG746A)";
@@ -21888,14 +24470,23 @@
 static const char pci_subsys_8086_24d4_8086_4246[] = "Desktop Board D865GBF";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24d4_8086_4c43[] = "Desktop Board D865GLC";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24d4_8086_524c[] = "D865PERL mainboard";
 #endif
 static const char pci_device_8086_24d5[] = "82801EB/ER (ICH5/ICH5R) AC'97 Audio Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24d5_100a_147b[] = "Abit IS7-E motherboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24d5_1028_0169[] = "Precision 470";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24d5_103c_006a[] = "nx9500";
+static const char pci_subsys_8086_24d5_103c_006a[] = "NX9500";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24d5_103c_12bc[] = "d330 uT";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24d5_1043_80f3[] = "P4P800 Mainboard";
@@ -21921,9 +24512,12 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24d5_8086_e001[] = "Desktop Board D865GBF";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24d5_8086_e002[] = "SoundMax Intergrated Digital Audio";
+#endif
 static const char pci_device_8086_24d6[] = "82801EB/ER (ICH5/ICH5R) AC'97 Modem Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24d6_103c_006a[] = "nx9500";
+static const char pci_subsys_8086_24d6_103c_006a[] = "NX9500";
 #endif
 static const char pci_device_8086_24d7[] = "82801EB/ER (ICH5/ICH5R) USB UHCI Controller #3";
 #ifdef INIT_SUBSYS_INFO
@@ -21936,7 +24530,7 @@
 static const char pci_subsys_8086_24d7_1028_0183[] = "PowerEdge 1800";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24d7_103c_006a[] = "nx9500";
+static const char pci_subsys_8086_24d7_103c_006a[] = "NX9500";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24d7_103c_12bc[] = "d530 CMT (DG746A)";
@@ -21963,6 +24557,9 @@
 static const char pci_subsys_8086_24d7_8086_4246[] = "Desktop Board D865GBF";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24d7_8086_4c43[] = "Desktop Board D865GLC";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24d7_8086_524c[] = "D865PERL mainboard";
 #endif
 static const char pci_device_8086_24db[] = "82801EB/ER (ICH5/ICH5R) IDE Controller";
@@ -21976,7 +24573,7 @@
 static const char pci_subsys_8086_24db_1028_019a[] = "PowerEdge SC1425";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24db_103c_006a[] = "nx9500";
+static const char pci_subsys_8086_24db_103c_006a[] = "NX9500";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24db_103c_12bc[] = "d530 CMT (DG746A)";
@@ -22009,6 +24606,9 @@
 static const char pci_subsys_8086_24db_8086_4246[] = "Desktop Board D865GBF";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24db_8086_4c43[] = "Desktop Board D865GLC";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24db_8086_524c[] = "D865PERL mainboard";
 #endif
 static const char pci_device_8086_24dc[] = "82801EB (ICH5) LPC Interface Bridge";
@@ -22026,7 +24626,7 @@
 static const char pci_subsys_8086_24dd_1028_019a[] = "PowerEdge SC1425";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_24dd_103c_006a[] = "nx9500";
+static const char pci_subsys_8086_24dd_103c_006a[] = "NX9500";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24dd_103c_12bc[] = "d530 CMT (DG746A)";
@@ -22047,6 +24647,9 @@
 static const char pci_subsys_8086_24dd_8086_4246[] = "Desktop Board D865GBF";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24dd_8086_4c43[] = "Desktop Board D865GLC";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24dd_8086_524c[] = "D865PERL mainboard";
 #endif
 static const char pci_device_8086_24de[] = "82801EB/ER (ICH5/ICH5R) USB UHCI Controller #4";
@@ -22078,6 +24681,9 @@
 static const char pci_subsys_8086_24de_8086_4246[] = "Desktop Board D865GBF";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_24de_8086_4c43[] = "Desktop Board D865GLC";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_24de_8086_524c[] = "D865PERL mainboard";
 #endif
 static const char pci_device_8086_24df[] = "82801ER (ICH5R) SATA Controller";
@@ -22098,6 +24704,9 @@
 static const char pci_device_8086_2521[] = "82804AA MRH-S Memory Repeater Hub for SDRAM";
 static const char pci_device_8086_2530[] = "82850 850 (Tehama) Chipset Host Bridge (MCH)";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2530_1028_00c7[] = "Dimension 8100";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2530_147b_0507[] = "TH7II-RAID";
 #endif
 static const char pci_device_8086_2531[] = "82860 860 (Wombat) Chipset Host Bridge (MCH)";
@@ -22153,11 +24762,20 @@
 static const char pci_device_8086_2561[] = "82845G/GL[Brookdale-G]/GE/PE Host-to-AGP Bridge";
 static const char pci_device_8086_2562[] = "82845G/GL[Brookdale-G]/GE Chipset Integrated Graphics Device";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2562_0e11_00b9[] = "Evo D510 SFF";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2562_1014_0267[] = "NetVista A30p";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2562_1734_1004[] = "D1451 Mainboard (SCENIC N300, i845GV)";
+#endif
 static const char pci_device_8086_2570[] = "82865G/PE/P DRAM Controller/Host-Hub Interface";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2570_103c_006a[] = "nx9500";
+static const char pci_subsys_8086_2570_103c_006a[] = "NX9500";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2570_103c_12bc[] = "d330 uT";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2570_1043_80f2[] = "P5P800-MX Mainboard";
@@ -22171,11 +24789,17 @@
 static const char pci_subsys_8086_2572_1028_019d[] = "Dimension 3000";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2572_103c_12bc[] = "D530 sff(dc578av)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2572_1043_80a5[] = "P5P800-MX Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2572_8086_4246[] = "Desktop Board D865GBF";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2572_8086_4c43[] = "Desktop Board D865GLC";
+#endif
 static const char pci_device_8086_2573[] = "82865G/PE/P PCI to CSA Bridge";
 static const char pci_device_8086_2576[] = "82865G/PE/P Processor to I/O Memory Interface";
 static const char pci_device_8086_2578[] = "82875P/E7210 Memory Controller Hub";
@@ -22191,7 +24815,7 @@
 static const char pci_device_8086_2579[] = "82875P Processor to AGP Controller";
 static const char pci_device_8086_257b[] = "82875P/E7210 Processor to PCI to CSA Bridge";
 static const char pci_device_8086_257e[] = "82875P/E7210 Processor to I/O Memory Interface";
-static const char pci_device_8086_2580[] = "915G/P/GV/GL/PL/910GL Express Memory Controller Hub";
+static const char pci_device_8086_2580[] = "82915G/P/GV/GL/PL/910GL Memory Controller Hub";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2580_1458_2580[] = "GA-8I915ME-G Mainboard";
 #endif
@@ -22201,12 +24825,15 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2580_1734_105b[] = "Scenic W620";
 #endif
-static const char pci_device_8086_2581[] = "915G/P/GV/GL/PL/910GL Express PCI Express Root Port";
-static const char pci_device_8086_2582[] = "82915G/GV/910GL Express Chipset Family Graphics Controller";
+static const char pci_device_8086_2581[] = "82915G/P/GV/GL/PL/910GL PCI Express Root Port";
+static const char pci_device_8086_2582[] = "82915G/GV/910GL Integrated Graphics Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2582_1028_1079[] = "Optiplex GX280";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2582_103c_3006[] = "DC7100 SFF(DX878AV)";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2582_1043_2582[] = "P5GD1-VW Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22215,8 +24842,8 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2582_1734_105b[] = "Scenic W620";
 #endif
-static const char pci_device_8086_2584[] = "925X/XE Express Memory Controller Hub";
-static const char pci_device_8086_2585[] = "925X/XE Express PCI Express Root Port";
+static const char pci_device_8086_2584[] = "82925X/XE Memory Controller Hub";
+static const char pci_device_8086_2585[] = "82925X/XE PCI Express Root Port";
 static const char pci_device_8086_2588[] = "E7220/E7221 Memory Controller Hub";
 static const char pci_device_8086_2589[] = "E7220/E7221 PCI Express Root Port";
 static const char pci_device_8086_258a[] = "E7221 Integrated Graphics Controller";
@@ -22225,22 +24852,37 @@
 static const char pci_subsys_8086_2590_1028_0182[] = "Dell Latidude C610";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2590_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_2590_103c_099c[] = "NX6110/NC6120";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2590_a304_81b7[] = "Vaio VGN-S3XP";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2590_e4bf_0ccd[] = "CCD-CALYPSO";
+#endif
 static const char pci_device_8086_2591[] = "Mobile 915GM/PM Express PCI Express Root Port";
 static const char pci_device_8086_2592[] = "Mobile 915GM/GMS/910GML Express Graphics Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2592_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_2592_103c_099c[] = "NX6110/NC6120";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2592_103c_308a[] = "NC6220";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2592_1043_1881[] = "GMA 900 915GM Integrated Graphics";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2592_e4bf_0ccd[] = "CCD-CALYPSO";
+#endif
 static const char pci_device_8086_25a1[] = "6300ESB LPC Interface Controller";
 static const char pci_device_8086_25a2[] = "6300ESB PATA Storage Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25a2_1775_10d0[] = "V5D Single Board Computer IDE";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25a2_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_25a2_4c53_10b0[] = "CL9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22248,6 +24890,9 @@
 #endif
 static const char pci_device_8086_25a3[] = "6300ESB SATA Storage Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25a3_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_25a3_4c53_10b0[] = "CL9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22258,6 +24903,12 @@
 #endif
 static const char pci_device_8086_25a4[] = "6300ESB SMBus Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25a4_1775_10d0[] = "V5D Single Board Computer";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25a4_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_25a4_4c53_10b0[] = "CL9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22268,11 +24919,20 @@
 #endif
 static const char pci_device_8086_25a6[] = "6300ESB AC'97 Audio Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25a6_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_25a6_4c53_10b0[] = "CL9 mainboard";
 #endif
 static const char pci_device_8086_25a7[] = "6300ESB AC'97 Modem Controller";
 static const char pci_device_8086_25a9[] = "6300ESB USB Universal Host Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25a9_1775_10d0[] = "V5D Single Board Computer USB";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25a9_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_25a9_4c53_10b0[] = "CL9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22283,6 +24943,9 @@
 #endif
 static const char pci_device_8086_25aa[] = "6300ESB USB Universal Host Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25aa_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_25aa_4c53_10b0[] = "CL9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22290,6 +24953,12 @@
 #endif
 static const char pci_device_8086_25ab[] = "6300ESB Watchdog Timer";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25ab_1775_10d0[] = "V5D Single Board Computer";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25ab_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_25ab_4c53_10b0[] = "CL9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22300,6 +24969,12 @@
 #endif
 static const char pci_device_8086_25ac[] = "6300ESB I/O Advanced Programmable Interrupt Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25ac_1775_10d0[] = "V5D Single Board Computer";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25ac_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_25ac_4c53_10b0[] = "CL9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22310,6 +24985,12 @@
 #endif
 static const char pci_device_8086_25ad[] = "6300ESB USB2 Enhanced Host Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25ad_1775_10d0[] = "V5D Single Board Computer USB 2.0";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_25ad_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_25ad_4c53_10b0[] = "CL9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22326,26 +25007,25 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_25b0_4c53_10e0[] = "PSL09 PrPMC";
 #endif
-static const char pci_device_8086_25c0[] = "Workstation Memory Controller Hub";
-static const char pci_device_8086_25d0[] = "Server Memory Controller Hub";
-static const char pci_device_8086_25d4[] = "Server Memory Contoller Hub";
-static const char pci_device_8086_25d8[] = "Server Memory Controller Hub";
-static const char pci_device_8086_25e2[] = "Server PCI Express x4 Port 2";
-static const char pci_device_8086_25e3[] = "Server PCI Express x4 Port 3";
-static const char pci_device_8086_25e4[] = "Server PCI Express x4 Port 4";
-static const char pci_device_8086_25e5[] = "Server PCI Express x4 Port 5";
-static const char pci_device_8086_25e6[] = "Server PCI Express x4 Port 6";
-static const char pci_device_8086_25e7[] = "Server PCI Express x4 Port 7";
-static const char pci_device_8086_25e8[] = "Server AMB Memory Mapped Registers";
-static const char pci_device_8086_25f0[] = "Server Error Reporting Registers";
-static const char pci_device_8086_25f1[] = "Reserved Registers";
-static const char pci_device_8086_25f3[] = "Reserved Registers";
-static const char pci_device_8086_25f5[] = "Server FBD Registers";
-static const char pci_device_8086_25f6[] = "Server FBD Registers";
-static const char pci_device_8086_25f7[] = "Server PCI Express x8 Port 2-3";
-static const char pci_device_8086_25f8[] = "Server PCI Express x8 Port 4-5";
-static const char pci_device_8086_25f9[] = "Server PCI Express x8 Port 6-7";
-static const char pci_device_8086_25fa[] = "Server PCI Express x16 Port 4-7";
+static const char pci_device_8086_25c0[] = "5000X Chipset Memory Controller Hub";
+static const char pci_device_8086_25d0[] = "5000Z Chipset Memory Controller Hub";
+static const char pci_device_8086_25d4[] = "5000V Chipset Memory Controller Hub";
+static const char pci_device_8086_25d8[] = "5000P Chipset Memory Controller Hub";
+static const char pci_device_8086_25e2[] = "5000 Series Chipset PCI Express x4 Port 2";
+static const char pci_device_8086_25e3[] = "5000 Series Chipset PCI Express x4 Port 3";
+static const char pci_device_8086_25e4[] = "5000 Series Chipset PCI Express x4 Port 4";
+static const char pci_device_8086_25e5[] = "5000 Series Chipset PCI Express x4 Port 5";
+static const char pci_device_8086_25e6[] = "5000 Series Chipset PCI Express x4 Port 6";
+static const char pci_device_8086_25e7[] = "5000 Series Chipset PCI Express x4 Port 7";
+static const char pci_device_8086_25f0[] = "5000 Series Chipset FSB Registers";
+static const char pci_device_8086_25f1[] = "5000 Series Chipset Reserved Registers";
+static const char pci_device_8086_25f3[] = "5000 Series Chipset Reserved Registers";
+static const char pci_device_8086_25f5[] = "5000 Series Chipset FBD Registers";
+static const char pci_device_8086_25f6[] = "5000 Series Chipset FBD Registers";
+static const char pci_device_8086_25f7[] = "5000 Series Chipset PCI Express x8 Port 2-3";
+static const char pci_device_8086_25f8[] = "5000 Series Chipset PCI Express x8 Port 4-5";
+static const char pci_device_8086_25f9[] = "5000 Series Chipset PCI Express x8 Port 6-7";
+static const char pci_device_8086_25fa[] = "5000X Chipset PCI Express x16 Port 4-7";
 static const char pci_device_8086_2600[] = "E8500/E8501 Hub Interface 1.5";
 static const char pci_device_8086_2601[] = "E8500/E8501 PCI Express x4 Port D";
 static const char pci_device_8086_2602[] = "E8500/E8501 PCI Express x4 Port C0";
@@ -22358,7 +25038,7 @@
 static const char pci_device_8086_2609[] = "E8500/E8501 PCI Express x8 Port B";
 static const char pci_device_8086_260a[] = "E8500/E8501 PCI Express x8 Port A";
 static const char pci_device_8086_260c[] = "E8500/E8501 IMI Registers";
-static const char pci_device_8086_2610[] = "E8500/E8501 Front Side Bus, Boot, and Interrupt Registers";
+static const char pci_device_8086_2610[] = "E8500/E8501 FSB Registers";
 static const char pci_device_8086_2611[] = "E8500/E8501 Address Mapping Registers";
 static const char pci_device_8086_2612[] = "E8500/E8501 RAS Registers";
 static const char pci_device_8086_2613[] = "E8500/E8501 Reserved Registers";
@@ -22387,9 +25067,12 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2640_1734_105c[] = "Scenic W620";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2640_e4bf_0ccd[] = "CCD-CALYPSO";
+#endif
 static const char pci_device_8086_2641[] = "82801FBM (ICH6M) LPC Interface Bridge";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2641_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_2641_103c_099c[] = "NX6110/NC6120";
 #endif
 static const char pci_device_8086_2642[] = "82801FW/FRW (ICH6W/ICH6RW) LPC Interface Bridge";
 static const char pci_device_8086_2651[] = "82801FB/FW (ICH6/ICH6W) SATA Controller";
@@ -22405,6 +25088,9 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2651_8086_4147[] = "D915GAG Motherboard";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2651_e4bf_0ccd[] = "CCD-CALYPSO";
+#endif
 static const char pci_device_8086_2652[] = "82801FR/FRW (ICH6R/ICH6RW) SATA Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2652_1462_7028[] = "915P/G Neo2";
@@ -22415,7 +25101,7 @@
 static const char pci_subsys_8086_2658_1028_0179[] = "Optiplex GX280";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2658_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_2658_103c_099c[] = "NX6110/NC6120";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2658_1043_80a6[] = "P5GD1-VW Mainboard";
@@ -22429,12 +25115,15 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2658_1734_105c[] = "Scenic W620";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2658_e4bf_0ccd[] = "CCD-CALYPSO";
+#endif
 static const char pci_device_8086_2659[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #2";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2659_1028_0179[] = "Optiplex GX280";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2659_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_2659_103c_099c[] = "NX6110/NC6120";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2659_1043_80a6[] = "P5GD1-VW Mainboard";
@@ -22448,12 +25137,15 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2659_1734_105c[] = "Scenic W620";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2659_e4bf_0ccd[] = "CCD-CALYPSO";
+#endif
 static const char pci_device_8086_265a[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #3";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_265a_1028_0179[] = "Optiplex GX280";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_265a_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_265a_103c_099c[] = "NX6110/NC6120";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_265a_1043_80a6[] = "P5GD1-VW Mainboard";
@@ -22467,12 +25159,15 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_265a_1734_105c[] = "Scenic W620";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_265a_e4bf_0ccd[] = "CCD-CALYPSO";
+#endif
 static const char pci_device_8086_265b[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB UHCI #4";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_265b_1028_0179[] = "Optiplex GX280";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_265b_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_265b_103c_099c[] = "NX6110/NC6120";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_265b_1043_80a6[] = "P5GD1-VW Mainboard";
@@ -22486,12 +25181,15 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_265b_1734_105c[] = "Scenic W620";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_265b_e4bf_0ccd[] = "CCD-CALYPSO";
+#endif
 static const char pci_device_8086_265c[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) USB2 EHCI Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_265c_1028_0179[] = "Optiplex GX280";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_265c_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_265c_103c_099c[] = "NX6110/NC6120";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_265c_1043_80a6[] = "P5GD1-VW Mainboard";
@@ -22505,15 +25203,24 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_265c_1734_105c[] = "Scenic W620";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_265c_8086_265c[] = "Dimension 3100";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_265c_e4bf_0ccd[] = "CCD-CALYPSO";
+#endif
 static const char pci_device_8086_2660[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 1";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2660_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_2660_103c_099c[] = "NX6110/NC6120";
 #endif
 static const char pci_device_8086_2662[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 2";
 static const char pci_device_8086_2664[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 3";
 static const char pci_device_8086_2666[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) PCI Express Port 4";
 static const char pci_device_8086_2668[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) High Definition Audio Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2668_103c_2a09[] = "PufferM-UL8E";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2668_1043_814e[] = "P5GD1-VW Mainboard";
 #endif
 static const char pci_device_8086_266a[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) SMBus Controller";
@@ -22532,13 +25239,16 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_266a_1734_105c[] = "Scenic W620";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_266a_e4bf_0ccd[] = "CCD-CALYPSO";
+#endif
 static const char pci_device_8086_266c[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) LAN Controller";
 static const char pci_device_8086_266d[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Modem Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_266d_1025_006a[] = "Conexant AC'97 CoDec (in Acer TravelMate 2410 serie laptop)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_266d_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_266d_103c_099c[] = "NX6110/NC6120";
 #endif
 static const char pci_device_8086_266e[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) AC'97 Audio Controller";
 #ifdef INIT_SUBSYS_INFO
@@ -22554,17 +25264,26 @@
 static const char pci_subsys_8086_266e_1028_0188[] = "Inspiron 6000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_266e_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_266e_103c_0944[] = "Compaq NC6220";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_266e_103c_099c[] = "NX6110/NC6120";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_266e_103c_3006[] = "DC7100 SFF(DX878AV)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_266e_1458_a002[] = "GA-8I915ME-G Mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_266e_152d_0745[] = "Packard Bell A8550 Laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_266e_1734_105a[] = "Scenic W620";
 #endif
 static const char pci_device_8086_266f[] = "82801FB/FBM/FR/FW/FRW (ICH6 Family) IDE Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_266f_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_266f_103c_099c[] = "NX6110/NC6120";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_266f_1043_80a6[] = "P5GD1-VW Mainboard";
@@ -22578,43 +25297,46 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_266f_1734_105c[] = "Scenic W620";
 #endif
-static const char pci_device_8086_2670[] = "Enterprise Southbridge LPC";
-static const char pci_device_8086_2680[] = "Enterprise Southbridge SATA IDE";
-static const char pci_device_8086_2681[] = "Enterprise Southbridge SATA AHCI";
-static const char pci_device_8086_2682[] = "Enterprise Southbridge SATA RAID";
-static const char pci_device_8086_2683[] = "Enterprise Southbridge SATA RAID";
-static const char pci_device_8086_2688[] = "Enterprise Southbridge UHCI USB #1";
-static const char pci_device_8086_2689[] = "Enterprise Southbridge UHCI USB #2";
-static const char pci_device_8086_268a[] = "Enterprise Southbridge UHCI USB #3";
-static const char pci_device_8086_268b[] = "Enterprise Southbridge UHCI USB #4";
-static const char pci_device_8086_268c[] = "Enterprise Southbridge EHCI USB";
-static const char pci_device_8086_2690[] = "Enterprise Southbridge PCI Express Root Port 1";
-static const char pci_device_8086_2692[] = "Enterprise Southbridge PCI Express Root Port 2";
-static const char pci_device_8086_2694[] = "Enterprise Southbridge PCI Express Root Port 3";
-static const char pci_device_8086_2696[] = "Enterprise Southbridge PCI Express Root Port 4";
-static const char pci_device_8086_2698[] = "Enterprise Southbridge AC '97 Audio";
-static const char pci_device_8086_2699[] = "Enterprise Southbridge AC '97 Modem";
-static const char pci_device_8086_269a[] = "Enterprise Southbridge High Definition Audio";
-static const char pci_device_8086_269b[] = "Enterprise Southbridge SMBus";
-static const char pci_device_8086_269e[] = "Enterprise Southbridge PATA";
-static const char pci_device_8086_2770[] = "945G/GZ/P/PL Express Memory Controller Hub";
+static const char pci_device_8086_2670[] = "631xESB/632xESB/3100 Chipset LPC Interface Controller";
+static const char pci_device_8086_2680[] = "631xESB/632xESB/3100 Chipset SATA Storage Controller IDE";
+static const char pci_device_8086_2681[] = "631xESB/632xESB SATA Storage Controller AHCI";
+static const char pci_device_8086_2682[] = "631xESB/632xESB SATA Storage Controller RAID";
+static const char pci_device_8086_2683[] = "631xESB/632xESB SATA Storage Controller RAID";
+static const char pci_device_8086_2688[] = "631xESB/632xESB/3100 Chipset UHCI USB Controller #1";
+static const char pci_device_8086_2689[] = "631xESB/632xESB/3100 Chipset UHCI USB Controller #2";
+static const char pci_device_8086_268a[] = "631xESB/632xESB/3100 Chipset UHCI USB Controller #3";
+static const char pci_device_8086_268b[] = "631xESB/632xESB/3100 Chipset UHCI USB Controller #4";
+static const char pci_device_8086_268c[] = "631xESB/632xESB/3100 Chipset EHCI USB2 Controller";
+static const char pci_device_8086_2690[] = "631xESB/632xESB/3100 Chipset PCI Express Root Port 1";
+static const char pci_device_8086_2692[] = "631xESB/632xESB/3100 Chipset PCI Express Root Port 2";
+static const char pci_device_8086_2694[] = "631xESB/632xESB/3100 Chipset PCI Express Root Port 3";
+static const char pci_device_8086_2696[] = "631xESB/632xESB/3100 Chipset PCI Express Root Port 4";
+static const char pci_device_8086_2698[] = "631xESB/632xESB AC '97 Audio Controller";
+static const char pci_device_8086_2699[] = "631xESB/632xESB AC '97 Modem Controller";
+static const char pci_device_8086_269a[] = "631xESB/632xESB High Definition Audio Controller";
+static const char pci_device_8086_269b[] = "631xESB/632xESB/3100 Chipset SMBus Controller";
+static const char pci_device_8086_269e[] = "631xESB/632xESB IDE Controller";
+static const char pci_device_8086_2770[] = "82945G/GZ/P/PL Memory Controller Hub";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2770_107b_5048[] = "E4500";
+#endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2770_8086_544e[] = "DeskTop Board D945GTP";
 #endif
-static const char pci_device_8086_2771[] = "945G/GZ/P/PL Express PCI Express Root Port";
-static const char pci_device_8086_2772[] = "945G/GZ Express Integrated Graphics Controller";
+static const char pci_device_8086_2771[] = "82945G/GZ/P/PL PCI Express Root Port";
+static const char pci_device_8086_2772[] = "82945G/GZ Integrated Graphics Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2772_8086_544e[] = "DeskTop Board D945GTP";
 #endif
-static const char pci_device_8086_2774[] = "955X Express Memory Controller Hub";
-static const char pci_device_8086_2775[] = "955X Express PCI Express Root Port";
-static const char pci_device_8086_2776[] = "945G/GZ Express Integrated Graphics Controller";
-static const char pci_device_8086_2778[] = "E7230 Memory Controller Hub";
-static const char pci_device_8086_2779[] = "E7230 PCI Express Root Port";
-static const char pci_device_8086_277a[] = "975X Express PCI Express Root Port";
-static const char pci_device_8086_277c[] = "975X Express Memory Controller Hub";
-static const char pci_device_8086_277d[] = "975X Express PCI Express Root Port";
-static const char pci_device_8086_2782[] = "82915G Express Chipset Family Graphics Controller";
+static const char pci_device_8086_2774[] = "82955X Memory Controller Hub";
+static const char pci_device_8086_2775[] = "82955X PCI Express Root Port";
+static const char pci_device_8086_2776[] = "82945G/GZ Integrated Graphics Controller";
+static const char pci_device_8086_2778[] = "E7230/3000/3010 Memory Controller Hub";
+static const char pci_device_8086_2779[] = "E7230/3000/3010 PCI Express Root Port";
+static const char pci_device_8086_277a[] = "82975X/3010 PCI Express Root Port";
+static const char pci_device_8086_277c[] = "82975X Memory Controller Hub";
+static const char pci_device_8086_277d[] = "82975X PCI Express Root Port";
+static const char pci_device_8086_2782[] = "82915G Integrated Graphics Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2782_1043_2582[] = "P5GD1-VW Mainboard";
 #endif
@@ -22623,49 +25345,127 @@
 #endif
 static const char pci_device_8086_2792[] = "Mobile 915GM/GMS/910GML Express Graphics Controller";
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_2792_103c_099c[] = "nx6110/nc6120";
+static const char pci_subsys_8086_2792_103c_099c[] = "NX6110/NC6120";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_2792_1043_1881[] = "GMA 900 915GM Integrated Graphics";
 #endif
-static const char pci_device_8086_27a0[] = "Mobile 945GM/PM/GMS/940GML and 945GT Express Memory Controller Hub";
-static const char pci_device_8086_27a1[] = "Mobile 945GM/PM/GMS/940GML and 945GT Express PCI Express Root Port";
-static const char pci_device_8086_27a2[] = "Mobile 945GM/GMS/940GML Express Integrated Graphics Controller";
-static const char pci_device_8086_27a6[] = "Mobile 945GM/GMS/940GML Express Integrated Graphics Controller";
+static const char pci_device_8086_27a0[] = "Mobile 945GM/PM/GMS, 943/940GML and 945GT Express Memory Controller Hub";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27a0_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27a0_17aa_2017[] = "Thinkpad R60e model 0657";
+#endif
+static const char pci_device_8086_27a1[] = "Mobile 945GM/PM/GMS, 943/940GML and 945GT Express PCI Express Root Port";
+static const char pci_device_8086_27a2[] = "Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27a2_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27a2_17aa_201a[] = "Thinkpad R60e model 0657";
+#endif
+static const char pci_device_8086_27a6[] = "Mobile 945GM/GMS, 943/940GML Express Integrated Graphics Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27a6_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27a6_17aa_201a[] = "Thinkpad R60e model 0657";
+#endif
 static const char pci_device_8086_27b0[] = "82801GH (ICH7DH) LPC Interface Bridge";
 static const char pci_device_8086_27b8[] = "82801GB/GR (ICH7 Family) LPC Interface Bridge";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27b8_107b_5048[] = "E4500";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27b8_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27b9[] = "82801GBM (ICH7-M) LPC Interface Bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27b9_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27b9_10f7_8338[] = "Panasonic CF-Y5 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27b9_17aa_2009[] = "ThinkPad T60/R60 series";
+#endif
 static const char pci_device_8086_27bd[] = "82801GHM (ICH7-M DH) LPC Interface Bridge";
 static const char pci_device_8086_27c0[] = "82801GB/GR/GH (ICH7 Family) Serial ATA Storage Controller IDE";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27c0_107b_5048[] = "E4500";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27c0_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27c1[] = "82801GR/GH (ICH7 Family) Serial ATA Storage Controller AHCI";
 static const char pci_device_8086_27c3[] = "82801GR/GH (ICH7 Family) Serial ATA Storage Controller RAID";
 static const char pci_device_8086_27c4[] = "82801GBM/GHM (ICH7 Family) Serial ATA Storage Controller IDE";
 static const char pci_device_8086_27c5[] = "82801GBM/GHM (ICH7 Family) Serial ATA Storage Controller AHCI";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27c5_17aa_200d[] = "Thinkpad R60e model 0657";
+#endif
 static const char pci_device_8086_27c6[] = "82801GHM (ICH7-M DH) Serial ATA Storage Controller RAID";
 static const char pci_device_8086_27c8[] = "82801G (ICH7 Family) USB UHCI #1";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27c8_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27c8_107b_5048[] = "E4500";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27c8_17aa_200a[] = "ThinkPad T60/R60 series";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27c8_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27c9[] = "82801G (ICH7 Family) USB UHCI #2";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27c9_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27c9_107b_5048[] = "E4500";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27c9_17aa_200a[] = "ThinkPad T60/R60 series";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27c9_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27ca[] = "82801G (ICH7 Family) USB UHCI #3";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27ca_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27ca_107b_5048[] = "E4500";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27ca_17aa_200a[] = "ThinkPad T60/R60 series";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27ca_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27cb[] = "82801G (ICH7 Family) USB UHCI #4";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27cb_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27cb_107b_5048[] = "E4500";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27cb_17aa_200a[] = "ThinkPad T60/R60 series";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27cb_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27cc[] = "82801G (ICH7 Family) USB2 EHCI Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27cc_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27cc_17aa_200b[] = "ThinkPad T60/R60 series";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27cc_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27d0[] = "82801G (ICH7 Family) PCI Express Port 1";
@@ -22673,8 +25473,35 @@
 static const char pci_device_8086_27d4[] = "82801G (ICH7 Family) PCI Express Port 3";
 static const char pci_device_8086_27d6[] = "82801G (ICH7 Family) PCI Express Port 4";
 static const char pci_device_8086_27d8[] = "82801G (ICH7 Family) High Definition Audio Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27d8_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27d8_107b_5048[] = "E4500";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27d8_10f7_8338[] = "Panasonic CF-Y5 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27d8_1179_ff31[] = "AC97 Data Fax SoftModem with SmartCP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27d8_152d_0753[] = "Softmodem";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27d8_1734_10ad[] = "Conexant softmodem SmartCP";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27d8_17aa_2010[] = "ThinkPad T60/R60 series";
+#endif
 static const char pci_device_8086_27da[] = "82801G (ICH7 Family) SMBus Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27da_10f7_8338[] = "Panasonic CF-Y5 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27da_17aa_200f[] = "ThinkPad T60/R60 series";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27da_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27dc[] = "82801G (ICH7 Family) LAN Controller";
@@ -22685,88 +25512,220 @@
 static const char pci_device_8086_27de[] = "82801G (ICH7 Family) AC'97 Audio Controller";
 static const char pci_device_8086_27df[] = "82801G (ICH7 Family) IDE Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27df_103c_30a1[] = "NC2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27df_107b_5048[] = "E4500";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27df_10f7_8338[] = "Panasonic CF-Y5 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_27df_17aa_200c[] = "Thinkpad R60e model 0657";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_27df_8086_544e[] = "DeskTop Board D945GTP";
 #endif
 static const char pci_device_8086_27e0[] = "82801GR/GH/GHM (ICH7 Family) PCI Express Port 5";
 static const char pci_device_8086_27e2[] = "82801GR/GH/GHM (ICH7 Family) PCI Express Port 6";
-static const char pci_device_8086_2810[] = "LPC Interface Controller";
+static const char pci_device_8086_2810[] = "82801HB/HR (ICH8/R) LPC Interface Controller";
 static const char pci_device_8086_2811[] = "Mobile LPC Interface Controller";
-static const char pci_device_8086_2812[] = "LPC Interface Controller";
-static const char pci_device_8086_2814[] = "LPC Interface Controller";
+static const char pci_device_8086_2812[] = "82801HH (ICH8DH) LPC Interface Controller";
+static const char pci_device_8086_2814[] = "82801HO (ICH8DO) LPC Interface Controller";
 static const char pci_device_8086_2815[] = "Mobile LPC Interface Controller";
-static const char pci_device_8086_2820[] = "SATA Controller 1 IDE";
-static const char pci_device_8086_2821[] = "SATA Controller AHCI";
-static const char pci_device_8086_2822[] = "SATA Controller RAID";
-static const char pci_device_8086_2824[] = "SATA Controller AHCI";
-static const char pci_device_8086_2825[] = "SATA Controller 2 IDE";
-static const char pci_device_8086_2828[] = "Mobile SATA Controller IDE";
-static const char pci_device_8086_2829[] = "Mobile SATA Controller AHCI";
-static const char pci_device_8086_282a[] = "Mobile SATA Controller RAID";
-static const char pci_device_8086_2830[] = "USB UHCI Controller #1";
-static const char pci_device_8086_2831[] = "USB UHCI Controller #2";
-static const char pci_device_8086_2832[] = "USB UHCI Controller #3";
-static const char pci_device_8086_2834[] = "USB UHCI Controller #4";
-static const char pci_device_8086_2835[] = "USB UHCI Controller #5";
-static const char pci_device_8086_2836[] = "USB2 EHCI Controller #1";
-static const char pci_device_8086_283a[] = "USB2 EHCI Controller #2";
-static const char pci_device_8086_283e[] = "SMBus Controller";
-static const char pci_device_8086_283f[] = "PCI Express Port 1";
-static const char pci_device_8086_2841[] = "PCI Express Port 2";
-static const char pci_device_8086_2843[] = "PCI Express Port 3";
-static const char pci_device_8086_2845[] = "PCI Express Port 4";
-static const char pci_device_8086_2847[] = "PCI Express Port 5";
-static const char pci_device_8086_2849[] = "PCI Express Port 6";
-static const char pci_device_8086_284b[] = "HD Audio Controller";
-static const char pci_device_8086_284f[] = "Thermal Subsystem";
+static const char pci_device_8086_2820[] = "82801H (ICH8 Family) 4 port SATA IDE Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2820_1462_7235[] = "P965 Neo MS-7235 mainboard";
+#endif
+static const char pci_device_8086_2821[] = "82801HR/HO/HH (ICH8R/DO/DH) 6 port SATA AHCI Controller";
+static const char pci_device_8086_2822[] = "82801 SATA RAID Controller";
+static const char pci_device_8086_2824[] = "82801HB (ICH8) 4 port SATA AHCI Controller";
+static const char pci_device_8086_2825[] = "82801H (ICH8 Family) 2 port SATA IDE Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2825_1462_7235[] = "P965 Neo MS-7235 mainboard";
+#endif
+static const char pci_device_8086_2828[] = "Mobile SATA IDE Controller";
+static const char pci_device_8086_2829[] = "Mobile SATA AHCI Controller";
+static const char pci_device_8086_282a[] = "Mobile SATA RAID Controller";
+static const char pci_device_8086_2830[] = "82801H (ICH8 Family) USB UHCI #1";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2830_1462_7235[] = "P965 Neo MS-7235 mainboard";
+#endif
+static const char pci_device_8086_2831[] = "82801H (ICH8 Family) USB UHCI #2";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2831_1462_7235[] = "P965 Neo MS-7235 mainboard";
+#endif
+static const char pci_device_8086_2832[] = "82801H (ICH8 Family) USB UHCI #3";
+static const char pci_device_8086_2834[] = "82801H (ICH8 Family) USB UHCI #4";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2834_1462_7235[] = "P965 Neo MS-7235 mainboard";
+#endif
+static const char pci_device_8086_2835[] = "82801H (ICH8 Family) USB UHCI #5";
+static const char pci_device_8086_2836[] = "82801H (ICH8 Family) USB2 EHCI #1";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_2836_1462_7235[] = "P965 Neo MS-7235 mainboard";
+#endif
+static const char pci_device_8086_283a[] = "82801H (ICH8 Family) USB2 EHCI #2";
+static const char pci_device_8086_283e[] = "82801H (ICH8 Family) SMBus Controller";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_283e_1462_7235[] = "P965 Neo MS-7235 mainboard";
+#endif
+static const char pci_device_8086_283f[] = "82801H (ICH8 Family) PCI Express Port 1";
+static const char pci_device_8086_2841[] = "82801H (ICH8 Family) PCI Express Port 2";
+static const char pci_device_8086_2843[] = "82801H (ICH8 Family) PCI Express Port 3";
+static const char pci_device_8086_2845[] = "82801H (ICH8 Family) PCI Express Port 4";
+static const char pci_device_8086_2847[] = "82801H (ICH8 Family) PCI Express Port 5";
+static const char pci_device_8086_2849[] = "82801H (ICH8 Family) PCI Express Port 6";
+static const char pci_device_8086_284b[] = "82801H (ICH8 Family) HD Audio Controller";
+static const char pci_device_8086_284f[] = "82801H (ICH8 Family) Thermal Reporting Device";
 static const char pci_device_8086_2850[] = "Mobile IDE Controller";
-static const char pci_device_8086_2970[] = "Memory Controller Hub";
-static const char pci_device_8086_2971[] = "PCI Express Root Port";
-static const char pci_device_8086_2972[] = "Integrated Graphics Controller";
-static const char pci_device_8086_2973[] = "Integrated Graphics Controller";
-static const char pci_device_8086_2974[] = "HECI Controller";
-static const char pci_device_8086_2976[] = "PT IDER Controller";
-static const char pci_device_8086_2977[] = "KT Controller";
-static const char pci_device_8086_2990[] = "Memory Controller Hub";
-static const char pci_device_8086_2991[] = "PCI Express Root Port";
-static const char pci_device_8086_2992[] = "Integrated Graphics Controller";
-static const char pci_device_8086_2993[] = "Integrated Graphics Controller";
-static const char pci_device_8086_2994[] = "HECI Controller";
-static const char pci_device_8086_2995[] = "HECI Controller";
-static const char pci_device_8086_2996[] = "PT IDER Controller";
-static const char pci_device_8086_2997[] = "KT Controller";
-static const char pci_device_8086_29a0[] = "Memory Controller Hub";
-static const char pci_device_8086_29a1[] = "PCI Express Root Port";
-static const char pci_device_8086_29a2[] = "Integrated Graphics Controller";
-static const char pci_device_8086_29a3[] = "Integrated Graphics Controller";
-static const char pci_device_8086_29a4[] = "HECI Controller";
-static const char pci_device_8086_29a5[] = "HECI Controller";
-static const char pci_device_8086_29a6[] = "PT IDER Controller";
-static const char pci_device_8086_29a7[] = "KT Controller";
+static const char pci_device_8086_2910[] = "LPC Interface Controller";
+static const char pci_device_8086_2911[] = "LPC Interface Controller";
+static const char pci_device_8086_2912[] = "LPC Interface Controller";
+static const char pci_device_8086_2914[] = "LPC Interface Controller";
+static const char pci_device_8086_2916[] = "LPC Interface Controller";
+static const char pci_device_8086_2918[] = "LPC Interface Controller";
+static const char pci_device_8086_2920[] = "4 port SATA IDE Controller";
+static const char pci_device_8086_2921[] = "2 port SATA IDE Controller";
+static const char pci_device_8086_2922[] = "6 port SATA AHCI Controller";
+static const char pci_device_8086_2923[] = "4 port SATA AHCI Controller";
+static const char pci_device_8086_2925[] = "SATA RAID Controller";
+static const char pci_device_8086_2926[] = "2 port SATA IDE Controller";
+static const char pci_device_8086_2928[] = "Mobile 2 port SATA IDE Controller";
+static const char pci_device_8086_292d[] = "Mobile 2 port SATA IDE Controller";
+static const char pci_device_8086_292e[] = "Mobile 1 port SATA IDE Controller";
+static const char pci_device_8086_2930[] = "SMBus Controller";
+static const char pci_device_8086_2932[] = "Thermal Subsystem";
+static const char pci_device_8086_2934[] = "USB UHCI Controller #1";
+static const char pci_device_8086_2935[] = "USB UHCI Controller #2";
+static const char pci_device_8086_2936[] = "USB UHCI Controller #3";
+static const char pci_device_8086_2937[] = "USB UHCI Controller #4";
+static const char pci_device_8086_2938[] = "USB UHCI Controller #5";
+static const char pci_device_8086_2939[] = "USB UHCI Controller #6";
+static const char pci_device_8086_293a[] = "USB2 EHCI Controller #1";
+static const char pci_device_8086_293c[] = "USB2 EHCI Controller #2";
+static const char pci_device_8086_293e[] = "HD Audio Controller";
+static const char pci_device_8086_2940[] = "PCI Express Port 1";
+static const char pci_device_8086_2942[] = "PCI Express Port 2";
+static const char pci_device_8086_2944[] = "PCI Express Port 3";
+static const char pci_device_8086_2946[] = "PCI Express Port 4";
+static const char pci_device_8086_2948[] = "PCI Express Port 5";
+static const char pci_device_8086_294a[] = "PCI Express Port 6";
+static const char pci_device_8086_294c[] = "Gigabit Ethernet Controller";
+static const char pci_device_8086_2970[] = "82946GZ/PL/GL Memory Controller Hub";
+static const char pci_device_8086_2971[] = "82946GZ/PL/GL PCI Express Root Port";
+static const char pci_device_8086_2972[] = "82946GZ/GL Integrated Graphics Controller";
+static const char pci_device_8086_2973[] = "82946GZ/GL Integrated Graphics Controller";
+static const char pci_device_8086_2974[] = "82946GZ/GL HECI Controller";
+static const char pci_device_8086_2975[] = "82946GZ/GL HECI Controller";
+static const char pci_device_8086_2976[] = "82946GZ/GL PT IDER Controller";
+static const char pci_device_8086_2977[] = "82946GZ/GL KT Controller";
+static const char pci_device_8086_2980[] = "965 G1 Memory Controller Hub";
+static const char pci_device_8086_2981[] = "965 G1 PCI Express Root Port";
+static const char pci_device_8086_2982[] = "965 G1 Integrated Graphics Controller";
+static const char pci_device_8086_2990[] = "82Q963/Q965 Memory Controller Hub";
+static const char pci_device_8086_2991[] = "82Q963/Q965 PCI Express Root Port";
+static const char pci_device_8086_2992[] = "82Q963/Q965 Integrated Graphics Controller";
+static const char pci_device_8086_2993[] = "82Q963/Q965 Integrated Graphics Controller";
+static const char pci_device_8086_2994[] = "82Q963/Q965 HECI Controller";
+static const char pci_device_8086_2995[] = "82Q963/Q965 HECI Controller";
+static const char pci_device_8086_2996[] = "82Q963/Q965 PT IDER Controller";
+static const char pci_device_8086_2997[] = "82Q963/Q965 KT Controller";
+static const char pci_device_8086_29a0[] = "82P965/G965 Memory Controller Hub";
+static const char pci_device_8086_29a1[] = "82P965/G965 PCI Express Root Port";
+static const char pci_device_8086_29a2[] = "82G965 Integrated Graphics Controller";
+static const char pci_device_8086_29a3[] = "82G965 Integrated Graphics Controller";
+static const char pci_device_8086_29a4[] = "82P965/G965 HECI Controller";
+static const char pci_device_8086_29a5[] = "82P965/G965 HECI Controller";
+static const char pci_device_8086_29a6[] = "82P965/G965 PT IDER Controller";
+static const char pci_device_8086_29a7[] = "82P965/G965 KT Controller";
+static const char pci_device_8086_29b0[] = "DRAM Controller";
+static const char pci_device_8086_29b1[] = "PCI Express Root Port";
+static const char pci_device_8086_29b2[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29b3[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29b4[] = "HECI Controller";
+static const char pci_device_8086_29b5[] = "HECI Controller";
+static const char pci_device_8086_29b6[] = "PT IDER Controller";
+static const char pci_device_8086_29b7[] = "Serial KT Controller";
+static const char pci_device_8086_29c0[] = "DRAM Controller";
+static const char pci_device_8086_29c1[] = "PCI Express Root Port";
+static const char pci_device_8086_29c2[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29c3[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29c4[] = "HECI Controller";
+static const char pci_device_8086_29c5[] = "HECI Controller";
+static const char pci_device_8086_29c6[] = "PT IDER Controller";
+static const char pci_device_8086_29c7[] = "Serial KT Controller";
+static const char pci_device_8086_29cf[] = "Virtual HECI Controller";
+static const char pci_device_8086_29d0[] = "DRAM Controller";
+static const char pci_device_8086_29d1[] = "PCI Express Root Port";
+static const char pci_device_8086_29d2[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29d3[] = "Integrated Graphics Controller";
+static const char pci_device_8086_29d4[] = "HECI Controller";
+static const char pci_device_8086_29d5[] = "HECI Controller";
+static const char pci_device_8086_29d6[] = "PT IDER Controller";
+static const char pci_device_8086_29d7[] = "Serial KT Controller";
+static const char pci_device_8086_29e0[] = "DRAM Controller";
+static const char pci_device_8086_29e1[] = "Host-Primary PCI Express Bridge";
+static const char pci_device_8086_29e4[] = "HECI Controller";
+static const char pci_device_8086_29e5[] = "HECI Controller";
+static const char pci_device_8086_29e6[] = "PT IDER Controller";
+static const char pci_device_8086_29e7[] = "Serial KT Controller";
+static const char pci_device_8086_29e9[] = "Host-Secondary PCI Express Bridge";
+static const char pci_device_8086_29f0[] = "Server DRAM Controller";
+static const char pci_device_8086_29f1[] = "Server Host-Primary PCI Express Bridge";
+static const char pci_device_8086_29f4[] = "Server HECI Controller";
+static const char pci_device_8086_29f5[] = "Server HECI Controller";
+static const char pci_device_8086_29f6[] = "Server PT IDER Controller";
+static const char pci_device_8086_29f7[] = "Server Serial KT Controller";
+static const char pci_device_8086_29f9[] = "Server Host-Secondary PCI Express Bridge";
+static const char pci_device_8086_2a00[] = "Mobile Memory Controller Hub";
+static const char pci_device_8086_2a01[] = "Mobile PCI Express Root Port";
+static const char pci_device_8086_2a02[] = "Mobile Integrated Graphics Controller";
+static const char pci_device_8086_2a03[] = "Mobile Integrated Graphics Controller";
+static const char pci_device_8086_2a04[] = "Mobile HECI Controller";
+static const char pci_device_8086_2a05[] = "Mobile HECI Controller";
+static const char pci_device_8086_2a06[] = "Mobile PT IDER Controller";
+static const char pci_device_8086_2a07[] = "Mobile KT Controller";
 static const char pci_device_8086_3092[] = "Integrated RAID";
 static const char pci_device_8086_3200[] = "GD31244 PCI-X SATA HBA";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3200_1775_c200[] = "C2K onboard SATA host bus adapter";
+#endif
 static const char pci_device_8086_3340[] = "82855PM Processor to I/O Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3340_1014_0529[] = "Thinkpad T41";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3340_1025_005a[] = "TravelMate 290";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_3340_103c_088c[] = "nc8000 laptop";
+static const char pci_subsys_8086_3340_103c_088c[] = "NC8000 laptop";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3340_103c_0890[] = "NC6000 laptop";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_8086_3340_103c_0890[] = "nc6000 laptop";
+static const char pci_subsys_8086_3340_103c_08b0[] = "tc1100 tablet";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3340_144d_c00c[] = "P30/P35 notebook";
 #endif
 static const char pci_device_8086_3341[] = "82855PM Processor to AGP Controller";
-static const char pci_device_8086_3500[] = "Enterprise Southbridge PCI Express Upstream Port";
-static const char pci_device_8086_3501[] = "Enterprise Southbridge PCI Express Upstream Port";
-static const char pci_device_8086_3504[] = "Enterprise Southbridge IOxAPIC";
-static const char pci_device_8086_3505[] = "Enterprise Southbridge IOxAPIC";
-static const char pci_device_8086_350c[] = "Enterprise Southbridge PCI Express to PCI-X Bridge";
-static const char pci_device_8086_350d[] = "Enterprise Southbridge PCI Express to PCI-X Bridge";
-static const char pci_device_8086_3510[] = "Enterprise Southbridge PCI Express Downstream Port E1";
-static const char pci_device_8086_3511[] = "Enterprise Southbridge PCI Express Downstream Port E1";
-static const char pci_device_8086_3514[] = "Enterprise Southbridge PCI Express Downstream Port E2";
-static const char pci_device_8086_3515[] = "Enterprise Southbridge PCI Express Downstream Port E2";
-static const char pci_device_8086_3518[] = "Enterprise Southbridge PCI Express Downstream Port E3";
-static const char pci_device_8086_3519[] = "Enterprise Southbridge PCI Express Downstream Port E3";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3341_144d_c00c[] = "P30 notebook";
+#endif
+static const char pci_device_8086_3500[] = "6311ESB/6321ESB PCI Express Upstream Port";
+static const char pci_device_8086_3501[] = "6310ESB PCI Express Upstream Port";
+static const char pci_device_8086_3504[] = "6311ESB/6321ESB I/OxAPIC Interrupt Controller";
+static const char pci_device_8086_3505[] = "6310ESB I/OxAPIC Interrupt Controller";
+static const char pci_device_8086_350c[] = "6311ESB/6321ESB PCI Express to PCI-X Bridge";
+static const char pci_device_8086_350d[] = "6310ESB PCI Express to PCI-X Bridge";
+static const char pci_device_8086_3510[] = "6311ESB/6321ESB PCI Express Downstream Port E1";
+static const char pci_device_8086_3511[] = "6310ESB PCI Express Downstream Port E1";
+static const char pci_device_8086_3514[] = "6311ESB/6321ESB PCI Express Downstream Port E2";
+static const char pci_device_8086_3515[] = "6310ESB PCI Express Downstream Port E2";
+static const char pci_device_8086_3518[] = "6311ESB/6321ESB PCI Express Downstream Port E3";
+static const char pci_device_8086_3519[] = "6310ESB PCI Express Downstream Port E3";
 static const char pci_device_8086_3575[] = "82830 830 Chipset Host Bridge";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3575_0e11_0030[] = "Evo N600c";
@@ -22785,6 +25744,9 @@
 static const char pci_device_8086_3578[] = "82830 830 Chipset Host Bridge";
 static const char pci_device_8086_3580[] = "82852/82855 GM/GME/PM/GMV Processor to I/O Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3580_1014_055c[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3580_1028_0139[] = "Latitude D400";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22797,30 +25759,60 @@
 static const char pci_subsys_8086_3580_1734_1055[] = "Amilo M1420";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3580_1775_10d0[] = "V5D Single Board Computer";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3580_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3580_4c53_10b0[] = "CL9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3580_4c53_10e0[] = "PSL09 PrPMC";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3580_e4bf_0cc9[] = "CC9-SAMBA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3580_e4bf_0cd2[] = "CD2-BEBOP";
+#endif
 static const char pci_device_8086_3581[] = "82852/82855 GM/GME/PM/GMV Processor to AGP Controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3581_1734_1055[] = "Amilo M1420";
 #endif
 static const char pci_device_8086_3582[] = "82852/855GM Integrated Graphics Device";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3582_1014_0562[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3582_1028_0139[] = "Latitude D400";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3582_1028_0163[] = "Latitude D505";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3582_1775_10d0[] = "V5D Single Board Computer VGA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3582_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3582_4c53_10b0[] = "CL9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3582_4c53_10e0[] = "PSL09 PrPMC";
 #endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3582_e4bf_0cc9[] = "CC9-SAMBA";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3582_e4bf_0cd2[] = "CD2-BEBOP";
+#endif
 static const char pci_device_8086_3584[] = "82852/82855 GM/GME/PM/GMV Processor to I/O Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3584_1014_055d[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3584_1028_0139[] = "Latitude D400";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22833,6 +25825,12 @@
 static const char pci_subsys_8086_3584_1734_1055[] = "Amilo M1420";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3584_1775_10d0[] = "V5D Single Board Computer";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3584_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3584_4c53_10b0[] = "CL9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22840,6 +25838,9 @@
 #endif
 static const char pci_device_8086_3585[] = "82852/82855 GM/GME/PM/GMV Processor to I/O Controller";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3585_1014_055e[] = "Thinkpad R50e model 1634";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3585_1028_0139[] = "Latitude D400";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22852,6 +25853,12 @@
 static const char pci_subsys_8086_3585_1734_1055[] = "Amilo M1420";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3585_1775_10d0[] = "V5D Single Board Computer";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_3585_1775_ce90[] = "CE9";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_3585_4c53_10b0[] = "CL9 mainboard";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22891,7 +25898,52 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_359e_1028_0169[] = "Precision 470";
 #endif
+static const char pci_device_8086_35b0[] = "3100 Chipset Memory I/O Controller Hub";
+static const char pci_device_8086_35b1[] = "3100 DRAM Controller Error Reporting Registers";
+static const char pci_device_8086_35b5[] = "3100 Chipset Enhanced DMA Controller";
+static const char pci_device_8086_35b6[] = "3100 Chipset PCI Express Port A";
+static const char pci_device_8086_35b7[] = "3100 Chipset PCI Express Port A1";
+static const char pci_device_8086_35c8[] = "3100 Extended Configuration Test Overflow Registers";
+static const char pci_device_8086_3600[] = "Server Memory Controller Hub";
+static const char pci_device_8086_3604[] = "Server PCI Express Port 1";
+static const char pci_device_8086_3605[] = "Server PCI Express Port 2";
+static const char pci_device_8086_3606[] = "Server PCI Express Port 3";
+static const char pci_device_8086_3607[] = "Server PCI Express Port 4";
+static const char pci_device_8086_3608[] = "Server PCI Express Port 5";
+static const char pci_device_8086_3609[] = "Server PCI Express Port 6";
+static const char pci_device_8086_360a[] = "Server PCI Express Port 7";
+static const char pci_device_8086_360b[] = "Server IOAT DMA Controller";
+static const char pci_device_8086_360c[] = "Server FSB Registers";
+static const char pci_device_8086_360d[] = "Server Snoop Filter Registers";
+static const char pci_device_8086_360e[] = "Server Reserved Registers";
+static const char pci_device_8086_360f[] = "Server FBD Branch 0 Registers";
+static const char pci_device_8086_3610[] = "Server FBD Branch 1 Registers";
+static const char pci_device_8086_4000[] = "Memory Controller Hub";
+static const char pci_device_8086_4008[] = "Memory Controller Hub";
+static const char pci_device_8086_4010[] = "Memory Controller Hub";
+static const char pci_device_8086_4021[] = "PCI Express Port 1";
+static const char pci_device_8086_4022[] = "PCI Express Port 2";
+static const char pci_device_8086_4023[] = "PCI Express Port 3";
+static const char pci_device_8086_4024[] = "PCI Express Port 4";
+static const char pci_device_8086_4025[] = "PCI Express Port 5";
+static const char pci_device_8086_4026[] = "PCI Express Port 6";
+static const char pci_device_8086_4027[] = "PCI Express Port 7";
+static const char pci_device_8086_4028[] = "PCI Express Port 8";
+static const char pci_device_8086_4029[] = "PCI Express Port 9";
+static const char pci_device_8086_402d[] = "IBIST Registers";
+static const char pci_device_8086_402e[] = "IBIST Registers";
+static const char pci_device_8086_402f[] = "DMA/DCA Engine";
+static const char pci_device_8086_4030[] = "FSB Registers";
+static const char pci_device_8086_4032[] = "I/OxAPIC";
+static const char pci_device_8086_4035[] = "FBD Registers";
+static const char pci_device_8086_4036[] = "FBD Registers";
 static const char pci_device_8086_4220[] = "PRO/Wireless 2200BG Network Connection";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_4220_2731_8086[] = "WLAN-Adapter";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_4220_8086_2731[] = "Samsung P35 integrated WLAN";
+#endif
 static const char pci_device_8086_4222[] = "PRO/Wireless 3945ABG Network Connection";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_4222_8086_1005[] = "PRO/Wireless 3945BG Network Connection";
@@ -22903,17 +25955,41 @@
 static const char pci_subsys_8086_4222_8086_1044[] = "PRO/Wireless 3945BG Network Connection";
 #endif
 static const char pci_device_8086_4223[] = "PRO/Wireless 2915ABG Network Connection";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_4223_1351_103c[] = "Compaq NC6220";
+#endif
 static const char pci_device_8086_4224[] = "PRO/Wireless 2915ABG Network Connection";
 static const char pci_device_8086_4227[] = "PRO/Wireless 3945ABG Network Connection";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_4227_8086_1011[] = "Thinkpad  X60s, R60e model 0657";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_4227_8086_1014[] = "PRO/Wireless 3945BG Network Connection";
 #endif
+static const char pci_device_8086_5001[] = "Pro/DSL 2100 Modem";
 static const char pci_device_8086_5200[] = "EtherExpress PRO/100 Intelligent Server";
 static const char pci_device_8086_5201[] = "EtherExpress PRO/100 Intelligent Server";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_5201_8086_0001[] = "EtherExpress PRO/100 Server Ethernet Adapter";
 #endif
 static const char pci_device_8086_530d[] = "80310 IOP [IO Processor]";
+static const char pci_device_8086_65c0[] = "Memory Controller Hub";
+static const char pci_device_8086_65e2[] = "PCI Express x4 Port 2";
+static const char pci_device_8086_65e3[] = "PCI Express x4 Port 3";
+static const char pci_device_8086_65e4[] = "PCI Express x4 Port 4";
+static const char pci_device_8086_65e5[] = "PCI Express x4 Port 5";
+static const char pci_device_8086_65e6[] = "PCI Express x4 Port 6";
+static const char pci_device_8086_65e7[] = "PCI Express x4 Port 7";
+static const char pci_device_8086_65f0[] = "FSB Registers";
+static const char pci_device_8086_65f1[] = "Reserved Registers";
+static const char pci_device_8086_65f3[] = "Reserved Registers";
+static const char pci_device_8086_65f5[] = "DDR Channel 0 Registers";
+static const char pci_device_8086_65f6[] = "DDR Channel 1 Registers";
+static const char pci_device_8086_65f7[] = "PCI Express x8 Port 2-3";
+static const char pci_device_8086_65f8[] = "PCI Express x8 Port 4-5";
+static const char pci_device_8086_65f9[] = "PCI Express x8 Port 6-7";
+static const char pci_device_8086_65fa[] = "PCI Express x16 Port 4-7";
+static const char pci_device_8086_65ff[] = "DMA Engine";
 static const char pci_device_8086_7000[] = "82371SB PIIX3 ISA [Natoma/Triton II]";
 static const char pci_device_8086_7010[] = "82371SB PIIX3 IDE [Natoma/Triton II]";
 static const char pci_device_8086_7020[] = "82371SB PIIX3 USB [Natoma/Triton II]";
@@ -22971,6 +26047,9 @@
 static const char pci_subsys_8086_7190_0e11_b110[] = "Armada M700/E500";
 #endif
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_7190_1028_008e[] = "PowerEdge 1300 mainboard";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_7190_1179_0001[] = "Toshiba Tecra 8100 Laptop System Chipset";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -22983,6 +26062,9 @@
 static const char pci_subsys_8086_7190_4c53_1051[] = "CE7 mainboard";
 #endif
 static const char pci_device_8086_7191[] = "440BX/ZX/DX - 82443BX/ZX/DX AGP bridge";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_7191_1028_008e[] = "PowerEdge 1300 mainboard";
+#endif
 static const char pci_device_8086_7192[] = "440BX/ZX/DX - 82443BX/ZX/DX Host bridge (AGP disabled)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_7192_0e11_0460[] = "Armada 1700 Laptop System Chipset";
@@ -23053,6 +26135,7 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_7800_8086_0100[] = "Intel740 Graphics Accelerator";
 #endif
+static const char pci_device_8086_8002[] = "Trusted Execution Technology Registers";
 static const char pci_device_8086_84c4[] = "450KX/GX [Orion] - 82454KX/GX PCI bridge";
 static const char pci_device_8086_84c5[] = "450KX/GX [Orion] - 82453KX/GX Memory controller";
 static const char pci_device_8086_84ca[] = "450NX - 82451NX Memory & I/O Controller";
@@ -23064,7 +26147,7 @@
 static const char pci_device_8086_84e4[] = "460GX - 84460GX Memory Data Controller (MDC)";
 static const char pci_device_8086_84e6[] = "460GX - 82466GX Wide and fast PCI eXpander Bridge (WXB)";
 static const char pci_device_8086_84ea[] = "460GX - 84460GX AGP Bridge (GXB function 1)";
-static const char pci_device_8086_8500[] = "IXP4XX Intel Network Processor (IXP420/421/422/425/IXC1100)";
+static const char pci_device_8086_8500[] = "IXP4XX Network Processor (IXP420/421/422/425/IXC1100)";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_8500_1993_0ded[] = "mGuard-PCI AV#2";
 #endif
@@ -23082,10 +26165,17 @@
 static const char pci_device_8086_9622[] = "Integrated RAID";
 static const char pci_device_8086_9641[] = "Integrated RAID";
 static const char pci_device_8086_96a1[] = "Integrated RAID";
+static const char pci_device_8086_a620[] = "6400/6402 Advanced Memory Buffer (AMB)";
 static const char pci_device_8086_b152[] = "21152 PCI-to-PCI Bridge";
 static const char pci_device_8086_b154[] = "21154 PCI-to-PCI Bridge";
 static const char pci_device_8086_b555[] = "21555 Non transparent PCI-to-PCI Bridge";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_b555_12c7_5005[] = "SS7HD PCI Adaptor Card";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_8086_b555_12c7_5006[] = "SS7HDC cPCI Adaptor Card";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_8086_b555_12d9_000a[] = "PCI VoIP Gateway";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -23098,9 +26188,24 @@
 static const char pci_subsys_8086_b555_e4bf_1000[] = "CC8-1-BLUES";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_80ee[] = "InnoTek Systemberatung GmbH";
+static const char pci_device_80ee_beef[] = "VirtualBox Graphics Adapter";
+static const char pci_device_80ee_cafe[] = "VirtualBox Guest Service";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_8384[] = "Sigmatel";
+static const char pci_device_8384_7618[] = "High Definition Audio Codec";
+static const char pci_device_8384_7670[] = "9770 High Definition Audio";
+static const char pci_device_8384_7672[] = "9772 High Definition Audio";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_8401[] = "TRENDware International Inc.";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_8686[] = "ScaleMP";
+static const char pci_device_8686_1010[] = "vSMPowered system controller [vSMP CTL]";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_8800[] = "Trigem Computer Inc.";
 static const char pci_device_8800_2008[] = "Video assistent component";
 #endif
@@ -23383,6 +26488,8 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_9005_008f_15d9_9005[] = "Onboard SCSI Host Adapter";
 #endif
+static const char pci_device_9005_0092[] = "AVC-2010 [VideoH!]";
+static const char pci_device_9005_0093[] = "AVC-2410 [VideoH!]";
 static const char pci_device_9005_00c0[] = "AHA-3960D / AIC-7899A U160/m";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -23490,10 +26597,10 @@
 static const char pci_subsys_9005_0285_9005_0289[] = "3240S (Tornado)";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_9005_0285_9005_028a[] = "ASR-2020S PCI-X ZCR (Skyhawk)";
+static const char pci_subsys_9005_0285_9005_028a[] = "ASR-2020ZCR";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_9005_0285_9005_028b[] = "ASR-2025S (Terminator)";
+static const char pci_subsys_9005_0285_9005_028b[] = "ASR-2025ZCR (Terminator)";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_9005_0285_9005_028e[] = "ASR-2020SA (Skyhawk)";
@@ -23520,16 +26627,85 @@
 static const char pci_subsys_9005_0285_9005_0297[] = "ASR-4005SAS";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_9005_0285_9005_0298[] = "ASR-4000SAS";
+static const char pci_subsys_9005_0285_9005_0298[] = "ASR-4000";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_9005_0285_9005_0299[] = "ASR-4800SAS";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_9005_0285_9005_029a[] = "ASR-4805SAS";
+static const char pci_subsys_9005_0285_9005_029a[] = "4805SAS";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02a4[] = "ICP ICP9085LI";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02a5[] = "ICP ICP5085BR";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02b5[] = "ASR5800";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02b6[] = "ASR5805";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02b7[] = "ASR5808";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02b8[] = "ICP5445SL";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02b9[] = "ICP5085SL";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02ba[] = "ICP5805SL";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02bb[] = "3405";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02bc[] = "3805";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02bd[] = "31205";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02be[] = "31605";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02bf[] = "ICP ICP5045BL";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02c0[] = "ICP ICP5085BL";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02c1[] = "ICP ICP5125BR";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02c2[] = "ICP ICP5165BR";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02c3[] = "51205";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02c4[] = "51605";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02c5[] = "ICP ICP5125SL";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02c6[] = "ICP ICP5165SL";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02c7[] = "3085";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0285_9005_02c8[] = "ICP5805BL";
 #endif
 static const char pci_device_9005_0286[] = "AAC-RAID (Rocket)";
 #ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0286_1014_034d[] = "8s";
+#endif
+#ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_9005_0286_1014_9540[] = "ServeRAID 8k/8k-l4";
 #endif
 #ifdef INIT_SUBSYS_INFO
@@ -23563,13 +26739,13 @@
 static const char pci_subsys_9005_0286_9005_02a1[] = "ICP ICP9087MA";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_9005_0286_9005_02a2[] = "ASR-4810SAS";
+static const char pci_subsys_9005_0286_9005_02a2[] = "3800";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_9005_0286_9005_02a3[] = "ICP ICP5085AU";
+static const char pci_subsys_9005_0286_9005_02a3[] = "ICP ICP5445AU";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_9005_0286_9005_02a4[] = "ICP ICP5085LI";
+static const char pci_subsys_9005_0286_9005_02a4[] = "ICP ICP9085LI";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_9005_0286_9005_02a5[] = "ICP ICP5085BR";
@@ -23578,20 +26754,58 @@
 static const char pci_subsys_9005_0286_9005_02a6[] = "ICP9067MA";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_9005_0286_9005_02a7[] = "AAR-2830SA";
+static const char pci_subsys_9005_0286_9005_02a7[] = "3805";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0286_9005_02a8[] = "3400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0286_9005_02a9[] = "ICP ICP5085AU";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_9005_0286_9005_02a8[] = "AAR-2430SA";
+static const char pci_subsys_9005_0286_9005_02aa[] = "ICP ICP5045AU";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_9005_0286_9005_02a9[] = "ICP5087AU";
+static const char pci_subsys_9005_0286_9005_02ac[] = "1800";
 #endif
 #ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_9005_0286_9005_02aa[] = "ICP5047AU";
+static const char pci_subsys_9005_0286_9005_02b3[] = "2400";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0286_9005_02b4[] = "ICP ICP5045AL";
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_9005_0286_9005_0800[] = "Callisto";
 #endif
+static const char pci_device_9005_0410[] = "AIC-9410W SAS (Razor HBA RAID)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0410_9005_0410[] = "ASC-48300(Spirit RAID)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0410_9005_0411[] = "ASC-58300 (Oakmont RAID)";
+#endif
+static const char pci_device_9005_0412[] = "AIC-9410W SAS (Razor HBA non-RAID)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0412_9005_0412[] = "ASC-48300 (Spirit non-RAID)";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0412_9005_0413[] = "ASC-58300 (Oakmont non-RAID)";
+#endif
+static const char pci_device_9005_041e[] = "AIC-9410W SAS (Razor ASIC non-RAID)";
+static const char pci_device_9005_041f[] = "AIC-9410W SAS (Razor ASIC RAID)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_041f_9005_041f[] = "AIC-9410W SAS (Razor ASIC RAID)";
+#endif
+static const char pci_device_9005_0430[] = "AIC-9405W SAS (Razor-Lite HBA RAID)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0430_9005_0430[] = "ASC-44300 (Spirit-Lite RAID)";
+#endif
+static const char pci_device_9005_0432[] = "AIC-9405W SAS (Razor-Lite HBA non-RAID)";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_0432_9005_0432[] = "ASC-44300 (Spirit-Lite non-RAID)";
+#endif
+static const char pci_device_9005_043e[] = "AIC-9405W SAS (Razor-Lite ASIC non-RAID)";
+static const char pci_device_9005_043f[] = "AIC-9405W SAS (Razor-Lite ASIC RAID)";
 static const char pci_device_9005_0500[] = "Obsidian chipset SCSI controller";
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_9005_0500_1014_02c1[] = "PCI-X DDR 3Gb SAS Adapter (572A/572C)";
@@ -23626,6 +26840,12 @@
 static const char pci_device_9005_8015[] = "ASC-39320B U320";
 static const char pci_device_9005_8016[] = "ASC-39320A U320";
 static const char pci_device_9005_8017[] = "ASC-29320ALP U320";
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_8017_9005_0044[] = "ASC-29320ALP PCIx U320";
+#endif
+#ifdef INIT_SUBSYS_INFO
+static const char pci_subsys_9005_8017_9005_0045[] = "ASC-29320LPE PCIe U320";
+#endif
 static const char pci_device_9005_801c[] = "ASC-39320D U320";
 static const char pci_device_9005_801d[] = "AIC-7902B U320";
 static const char pci_device_9005_801e[] = "AIC-7901A U320";
@@ -23733,9 +26953,13 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_affe[] = "Sirrix AG security technologies";
+static const char pci_device_affe_02e1[] = "PCI2E1 2-port ISDN E1 interface";
 static const char pci_device_affe_dead[] = "Sirrix.PCI4S0 4-port ISDN S0 interface";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_b10b[] = "Uakron PCI Project";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_b1b3[] = "Shiva Europe Limited";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -23764,6 +26988,9 @@
 static const char pci_vendor_cccc[] = "Catapult Communications";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const char pci_vendor_ccec[] = "Curtiss-Wright Controls Embedded Computing";
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const char pci_vendor_cddd[] = "Tyzx, Inc.";
 static const char pci_device_cddd_0101[] = "DeepSea 1 High Speed Stereo Vision Frame Grabber";
 static const char pci_device_cddd_0200[] = "DeepSea 2 High Speed Stereo Vision Frame Grabber";
@@ -23772,8 +26999,10 @@
 static const char pci_vendor_d161[] = "Digium, Inc.";
 static const char pci_device_d161_0205[] = "Wildcard TE205P";
 static const char pci_device_d161_0210[] = "Wildcard TE210P";
-static const char pci_device_d161_0405[] = "Wildcard TE405P (2nd Gen)";
-static const char pci_device_d161_0410[] = "Wildcard TE410P (2nd Gen)";
+static const char pci_device_d161_0405[] = "Wildcard TE405P Quad-Span togglable E1/T1/J1 card 5.0v";
+static const char pci_device_d161_0406[] = "Wildcard TE406P Quad-Span togglable E1/T1/J1 echo cancellation card 5.0v";
+static const char pci_device_d161_0410[] = "Wildcard TE410P Quad-Span togglable E1/T1/J1 card 3.3v";
+static const char pci_device_d161_0411[] = "Wildcard TE411P Quad-Span togglable E1/T1/J1 echo cancellation card 3.3v";
 static const char pci_device_d161_2400[] = "Wildcard TDM2400P";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -23811,23 +27040,11 @@
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_e159_0001_00a7_0001[] = "TELES.S0/PCI 2.x ISDN Adapter";
 #endif
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_e159_0001_6159_0001[] = "Digium Wildcard T100P T1/PRI";
-#endif
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_e159_0001_79fe_0001[] = "Digium Wildcard TE110P T1/E1 Interface";
-#endif
 #endif
 #ifdef INIT_SUBSYS_INFO
 static const char pci_subsys_e159_0001_8086_0003[] = "Digium X100P/X101P analogue PSTN FXO interface";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_e159_0001_b1b9_0001[] = "Digium Wildcard TDM400P REV I 4-port POTS interface";
-#endif
-#ifdef INIT_SUBSYS_INFO
-static const char pci_subsys_e159_0001_b1b9_0003[] = "Digium Wildcard TDM400P REV I 4-port POTS interface";
-#endif
 static const char pci_device_e159_0002[] = "Tiger100APC ISDN chipset";
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -23990,6 +27207,12 @@
 	{0x1000, 0x1000, pci_subsys_1000_0006_1000_1000, 0};
 #undef pci_ss_info_1000_1000
 #define pci_ss_info_1000_1000 pci_ss_info_1000_0006_1000_1000
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_000a_0e11_b143 =
+	{0x0e11, 0xb143, pci_subsys_1000_000a_0e11_b143, 0};
+#undef pci_ss_info_0e11_b143
+#define pci_ss_info_0e11_b143 pci_ss_info_1000_000a_0e11_b143
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1000_000a_1000_1000 =
 	{0x1000, 0x1000, pci_subsys_1000_000a_1000_1000, 0};
 #undef pci_ss_info_1000_1000
@@ -24056,6 +27279,14 @@
 #undef pci_ss_info_1092_8760
 #define pci_ss_info_1092_8760 pci_ss_info_1000_000f_1092_8760
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1000_000f_1775_10d0 =
+	{0x1775, 0x10d0, pci_subsys_1000_000f_1775_10d0, 0};
+#undef pci_ss_info_1775_10d0
+#define pci_ss_info_1775_10d0 pci_ss_info_1000_000f_1775_10d0
+static const pciSubsystemInfo pci_ss_info_1000_000f_1775_10d1 =
+	{0x1775, 0x10d1, pci_subsys_1000_000f_1775_10d1, 0};
+#undef pci_ss_info_1775_10d1
+#define pci_ss_info_1775_10d1 pci_ss_info_1000_000f_1775_10d1
 static const pciSubsystemInfo pci_ss_info_1000_000f_1de1_3904 =
 	{0x1de1, 0x3904, pci_subsys_1000_000f_1de1_3904, 0};
 #undef pci_ss_info_1de1_3904
@@ -24096,6 +27327,10 @@
 	{0x1000, 0x1000, pci_subsys_1000_0020_1000_1000, 0};
 #undef pci_ss_info_1000_1000
 #define pci_ss_info_1000_1000 pci_ss_info_1000_0020_1000_1000
+static const pciSubsystemInfo pci_ss_info_1000_0020_107b_1040 =
+	{0x107b, 0x1040, pci_subsys_1000_0020_107b_1040, 0};
+#undef pci_ss_info_107b_1040
+#define pci_ss_info_107b_1040 pci_ss_info_1000_0020_107b_1040
 static const pciSubsystemInfo pci_ss_info_1000_0020_1de1_1020 =
 	{0x1de1, 0x1020, pci_subsys_1000_0020_1de1_1020, 0};
 #undef pci_ss_info_1de1_1020
@@ -24108,6 +27343,18 @@
 	{0x1000, 0x1010, pci_subsys_1000_0021_1000_1010, 0};
 #undef pci_ss_info_1000_1010
 #define pci_ss_info_1000_1010 pci_ss_info_1000_0021_1000_1010
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0021_103c_1330 =
+	{0x103c, 0x1330, pci_subsys_1000_0021_103c_1330, 0};
+#undef pci_ss_info_103c_1330
+#define pci_ss_info_103c_1330 pci_ss_info_1000_0021_103c_1330
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0021_103c_1340 =
+	{0x103c, 0x1340, pci_subsys_1000_0021_103c_1340, 0};
+#undef pci_ss_info_103c_1340
+#define pci_ss_info_103c_1340 pci_ss_info_1000_0021_103c_1340
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1000_0021_124b_1070 =
 	{0x124b, 0x1070, pci_subsys_1000_0021_124b_1070, 0};
 #undef pci_ss_info_124b_1070
@@ -24160,6 +27407,12 @@
 #undef pci_ss_info_1028_1010
 #define pci_ss_info_1028_1010 pci_ss_info_1000_0030_1028_1010
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0030_103c_12c5 =
+	{0x103c, 0x12c5, pci_subsys_1000_0030_103c_12c5, 0};
+#undef pci_ss_info_103c_12c5
+#define pci_ss_info_103c_12c5 pci_ss_info_1000_0030_103c_12c5
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1000_0030_124b_1170 =
 	{0x124b, 0x1170, pci_subsys_1000_0030_124b_1170, 0};
 #undef pci_ss_info_124b_1170
@@ -24180,6 +27433,102 @@
 	{0x1000, 0x0066, pci_subsys_1000_0040_1000_0066, 0};
 #undef pci_ss_info_1000_0066
 #define pci_ss_info_1000_0066 pci_ss_info_1000_0040_1000_0066
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0055_1033_8336 =
+	{0x1033, 0x8336, pci_subsys_1000_0055_1033_8336, 0};
+#undef pci_ss_info_1033_8336
+#define pci_ss_info_1033_8336 pci_ss_info_1000_0055_1033_8336
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1006 =
+	{0x1000, 0x1006, pci_subsys_1000_0060_1000_1006, 0};
+#undef pci_ss_info_1000_1006
+#define pci_ss_info_1000_1006 pci_ss_info_1000_0060_1000_1006
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_100a =
+	{0x1000, 0x100a, pci_subsys_1000_0060_1000_100a, 0};
+#undef pci_ss_info_1000_100a
+#define pci_ss_info_1000_100a pci_ss_info_1000_0060_1000_100a
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_100e =
+	{0x1000, 0x100e, pci_subsys_1000_0060_1000_100e, 0};
+#undef pci_ss_info_1000_100e
+#define pci_ss_info_1000_100e pci_ss_info_1000_0060_1000_100e
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_100f =
+	{0x1000, 0x100f, pci_subsys_1000_0060_1000_100f, 0};
+#undef pci_ss_info_1000_100f
+#define pci_ss_info_1000_100f pci_ss_info_1000_0060_1000_100f
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1010 =
+	{0x1000, 0x1010, pci_subsys_1000_0060_1000_1010, 0};
+#undef pci_ss_info_1000_1010
+#define pci_ss_info_1000_1010 pci_ss_info_1000_0060_1000_1010
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1011 =
+	{0x1000, 0x1011, pci_subsys_1000_0060_1000_1011, 0};
+#undef pci_ss_info_1000_1011
+#define pci_ss_info_1000_1011 pci_ss_info_1000_0060_1000_1011
+static const pciSubsystemInfo pci_ss_info_1000_0060_1000_1012 =
+	{0x1000, 0x1012, pci_subsys_1000_0060_1000_1012, 0};
+#undef pci_ss_info_1000_1012
+#define pci_ss_info_1000_1012 pci_ss_info_1000_0060_1000_1012
+static const pciSubsystemInfo pci_ss_info_1000_0060_1014_0363 =
+	{0x1014, 0x0363, pci_subsys_1000_0060_1014_0363, 0};
+#undef pci_ss_info_1014_0363
+#define pci_ss_info_1014_0363 pci_ss_info_1000_0060_1014_0363
+static const pciSubsystemInfo pci_ss_info_1000_0060_1014_0364 =
+	{0x1014, 0x0364, pci_subsys_1000_0060_1014_0364, 0};
+#undef pci_ss_info_1014_0364
+#define pci_ss_info_1014_0364 pci_ss_info_1000_0060_1014_0364
+static const pciSubsystemInfo pci_ss_info_1000_0060_1014_0365 =
+	{0x1014, 0x0365, pci_subsys_1000_0060_1014_0365, 0};
+#undef pci_ss_info_1014_0365
+#define pci_ss_info_1014_0365 pci_ss_info_1000_0060_1014_0365
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_1028_1f0a =
+	{0x1028, 0x1f0a, pci_subsys_1000_0060_1028_1f0a, 0};
+#undef pci_ss_info_1028_1f0a
+#define pci_ss_info_1028_1f0a pci_ss_info_1000_0060_1028_1f0a
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_1028_1f0b =
+	{0x1028, 0x1f0b, pci_subsys_1000_0060_1028_1f0b, 0};
+#undef pci_ss_info_1028_1f0b
+#define pci_ss_info_1028_1f0b pci_ss_info_1000_0060_1028_1f0b
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_1028_1f0c =
+	{0x1028, 0x1f0c, pci_subsys_1000_0060_1028_1f0c, 0};
+#undef pci_ss_info_1028_1f0c
+#define pci_ss_info_1028_1f0c pci_ss_info_1000_0060_1028_1f0c
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_1028_1f0d =
+	{0x1028, 0x1f0d, pci_subsys_1000_0060_1028_1f0d, 0};
+#undef pci_ss_info_1028_1f0d
+#define pci_ss_info_1028_1f0d pci_ss_info_1000_0060_1028_1f0d
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_1028_1f11 =
+	{0x1028, 0x1f11, pci_subsys_1000_0060_1028_1f11, 0};
+#undef pci_ss_info_1028_1f11
+#define pci_ss_info_1028_1f11 pci_ss_info_1000_0060_1028_1f11
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1000_0060_1043_824d =
+	{0x1043, 0x824d, pci_subsys_1000_0060_1043_824d, 0};
+#undef pci_ss_info_1043_824d
+#define pci_ss_info_1043_824d pci_ss_info_1000_0060_1043_824d
+static const pciSubsystemInfo pci_ss_info_1000_0060_1170_002f =
+	{0x1170, 0x002f, pci_subsys_1000_0060_1170_002f, 0};
+#undef pci_ss_info_1170_002f
+#define pci_ss_info_1170_002f pci_ss_info_1000_0060_1170_002f
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_8086_34cc =
+	{0x8086, 0x34cc, pci_subsys_1000_0060_8086_34cc, 0};
+#undef pci_ss_info_8086_34cc
+#define pci_ss_info_8086_34cc pci_ss_info_1000_0060_8086_34cc
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0060_8086_34cd =
+	{0x8086, 0x34cd, pci_subsys_1000_0060_8086_34cd, 0};
+#undef pci_ss_info_8086_34cd
+#define pci_ss_info_8086_34cd pci_ss_info_1000_0060_8086_34cd
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1000_0062_1000_0062 =
 	{0x1000, 0x0062, pci_subsys_1000_0062_1000_0062, 0};
 #undef pci_ss_info_1000_0062
@@ -24258,6 +27607,24 @@
 #undef pci_ss_info_1028_0002
 #define pci_ss_info_1028_0002 pci_ss_info_1000_0408_1028_0002
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0408_1028_0012 =
+	{0x1028, 0x0012, pci_subsys_1000_0408_1028_0012, 0};
+#undef pci_ss_info_1028_0012
+#define pci_ss_info_1028_0012 pci_ss_info_1000_0408_1028_0012
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0408_1028_0015 =
+	{0x1028, 0x0015, pci_subsys_1000_0408_1028_0015, 0};
+#undef pci_ss_info_1028_0015
+#define pci_ss_info_1028_0015 pci_ss_info_1000_0408_1028_0015
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0408_1028_1f03 =
+	{0x1028, 0x1f03, pci_subsys_1000_0408_1028_1f03, 0};
+#undef pci_ss_info_1028_1f03
+#define pci_ss_info_1028_1f03 pci_ss_info_1000_0408_1028_1f03
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1000_0408_1734_1065 =
 	{0x1734, 0x1065, pci_subsys_1000_0408_1734_1065, 0};
 #undef pci_ss_info_1734_1065
@@ -24294,6 +27661,94 @@
 #undef pci_ss_info_8086_3499
 #define pci_ss_info_8086_3499 pci_ss_info_1000_0409_8086_3499
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1000_0411_1000_1001 =
+	{0x1000, 0x1001, pci_subsys_1000_0411_1000_1001, 0};
+#undef pci_ss_info_1000_1001
+#define pci_ss_info_1000_1001 pci_ss_info_1000_0411_1000_1001
+static const pciSubsystemInfo pci_ss_info_1000_0411_1000_1002 =
+	{0x1000, 0x1002, pci_subsys_1000_0411_1000_1002, 0};
+#undef pci_ss_info_1000_1002
+#define pci_ss_info_1000_1002 pci_ss_info_1000_0411_1000_1002
+static const pciSubsystemInfo pci_ss_info_1000_0411_1000_1003 =
+	{0x1000, 0x1003, pci_subsys_1000_0411_1000_1003, 0};
+#undef pci_ss_info_1000_1003
+#define pci_ss_info_1000_1003 pci_ss_info_1000_0411_1000_1003
+static const pciSubsystemInfo pci_ss_info_1000_0411_1000_1004 =
+	{0x1000, 0x1004, pci_subsys_1000_0411_1000_1004, 0};
+#undef pci_ss_info_1000_1004
+#define pci_ss_info_1000_1004 pci_ss_info_1000_0411_1000_1004
+static const pciSubsystemInfo pci_ss_info_1000_0411_1000_1008 =
+	{0x1000, 0x1008, pci_subsys_1000_0411_1000_1008, 0};
+#undef pci_ss_info_1000_1008
+#define pci_ss_info_1000_1008 pci_ss_info_1000_0411_1000_1008
+static const pciSubsystemInfo pci_ss_info_1000_0411_1000_100c =
+	{0x1000, 0x100c, pci_subsys_1000_0411_1000_100c, 0};
+#undef pci_ss_info_1000_100c
+#define pci_ss_info_1000_100c pci_ss_info_1000_0411_1000_100c
+static const pciSubsystemInfo pci_ss_info_1000_0411_1000_100d =
+	{0x1000, 0x100d, pci_subsys_1000_0411_1000_100d, 0};
+#undef pci_ss_info_1000_100d
+#define pci_ss_info_1000_100d pci_ss_info_1000_0411_1000_100d
+static const pciSubsystemInfo pci_ss_info_1000_0411_1000_2004 =
+	{0x1000, 0x2004, pci_subsys_1000_0411_1000_2004, 0};
+#undef pci_ss_info_1000_2004
+#define pci_ss_info_1000_2004 pci_ss_info_1000_0411_1000_2004
+static const pciSubsystemInfo pci_ss_info_1000_0411_1000_2005 =
+	{0x1000, 0x2005, pci_subsys_1000_0411_1000_2005, 0};
+#undef pci_ss_info_1000_2005
+#define pci_ss_info_1000_2005 pci_ss_info_1000_0411_1000_2005
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0411_1033_8287 =
+	{0x1033, 0x8287, pci_subsys_1000_0411_1033_8287, 0};
+#undef pci_ss_info_1033_8287
+#define pci_ss_info_1033_8287 pci_ss_info_1000_0411_1033_8287
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1000_0411_1054_3016 =
+	{0x1054, 0x3016, pci_subsys_1000_0411_1054_3016, 0};
+#undef pci_ss_info_1054_3016
+#define pci_ss_info_1054_3016 pci_ss_info_1000_0411_1054_3016
+static const pciSubsystemInfo pci_ss_info_1000_0411_1734_1081 =
+	{0x1734, 0x1081, pci_subsys_1000_0411_1734_1081, 0};
+#undef pci_ss_info_1734_1081
+#define pci_ss_info_1734_1081 pci_ss_info_1000_0411_1734_1081
+static const pciSubsystemInfo pci_ss_info_1000_0411_1734_10a3 =
+	{0x1734, 0x10a3, pci_subsys_1000_0411_1734_10a3, 0};
+#undef pci_ss_info_1734_10a3
+#define pci_ss_info_1734_10a3 pci_ss_info_1000_0411_1734_10a3
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0411_8086_1001 =
+	{0x8086, 0x1001, pci_subsys_1000_0411_8086_1001, 0};
+#undef pci_ss_info_8086_1001
+#define pci_ss_info_8086_1001 pci_ss_info_1000_0411_8086_1001
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0411_8086_1003 =
+	{0x8086, 0x1003, pci_subsys_1000_0411_8086_1003, 0};
+#undef pci_ss_info_8086_1003
+#define pci_ss_info_8086_1003 pci_ss_info_1000_0411_8086_1003
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0411_8086_3500 =
+	{0x8086, 0x3500, pci_subsys_1000_0411_8086_3500, 0};
+#undef pci_ss_info_8086_3500
+#define pci_ss_info_8086_3500 pci_ss_info_1000_0411_8086_3500
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0411_8086_3501 =
+	{0x8086, 0x3501, pci_subsys_1000_0411_8086_3501, 0};
+#undef pci_ss_info_8086_3501
+#define pci_ss_info_8086_3501 pci_ss_info_1000_0411_8086_3501
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1000_0411_8086_3504 =
+	{0x8086, 0x3504, pci_subsys_1000_0411_8086_3504, 0};
+#undef pci_ss_info_8086_3504
+#define pci_ss_info_8086_3504 pci_ss_info_1000_0411_8086_3504
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1000_0413_1000_1005 =
+	{0x1000, 0x1005, pci_subsys_1000_0413_1000_1005, 0};
+#undef pci_ss_info_1000_1005
+#define pci_ss_info_1000_1005 pci_ss_info_1000_0413_1000_1005
 static const pciSubsystemInfo pci_ss_info_1000_0622_1000_1020 =
 	{0x1000, 0x1020, pci_subsys_1000_0622_1000_1020, 0};
 #undef pci_ss_info_1000_1020
@@ -24435,6 +27890,10 @@
 	{0x1787, 0x4002, pci_subsys_1002_4152_1787_4002, 0};
 #undef pci_ss_info_1787_4002
 #define pci_ss_info_1787_4002 pci_ss_info_1002_4152_1787_4002
+static const pciSubsystemInfo pci_ss_info_1002_4153_1043_010c =
+	{0x1043, 0x010c, pci_subsys_1002_4153_1043_010c, 0};
+#undef pci_ss_info_1043_010c
+#define pci_ss_info_1043_010c pci_ss_info_1002_4153_1043_010c
 static const pciSubsystemInfo pci_ss_info_1002_4153_1462_932c =
 	{0x1462, 0x932c, pci_subsys_1002_4153_1462_932c, 0};
 #undef pci_ss_info_1462_932c
@@ -24495,6 +27954,10 @@
 	{0x1787, 0x4003, pci_subsys_1002_4172_1787_4003, 0};
 #undef pci_ss_info_1787_4003
 #define pci_ss_info_1787_4003 pci_ss_info_1002_4172_1787_4003
+static const pciSubsystemInfo pci_ss_info_1002_4173_1043_010d =
+	{0x1043, 0x010d, pci_subsys_1002_4173_1043_010d, 0};
+#undef pci_ss_info_1043_010d
+#define pci_ss_info_1043_010d pci_ss_info_1002_4173_1043_010d
 static const pciSubsystemInfo pci_ss_info_1002_4242_1002_02aa =
 	{0x1002, 0x02aa, pci_subsys_1002_4242_1002_02aa, 0};
 #undef pci_ss_info_1002_02aa
@@ -24519,18 +27982,38 @@
 	{0x103c, 0x0850, pci_subsys_1002_4337_103c_0850, 0};
 #undef pci_ss_info_103c_0850
 #define pci_ss_info_103c_0850 pci_ss_info_1002_4337_103c_0850
+static const pciSubsystemInfo pci_ss_info_1002_4370_1025_0079 =
+	{0x1025, 0x0079, pci_subsys_1002_4370_1025_0079, 0};
+#undef pci_ss_info_1025_0079
+#define pci_ss_info_1025_0079 pci_ss_info_1002_4370_1025_0079
 static const pciSubsystemInfo pci_ss_info_1002_4370_103c_308b =
 	{0x103c, 0x308b, pci_subsys_1002_4370_103c_308b, 0};
 #undef pci_ss_info_103c_308b
 #define pci_ss_info_103c_308b pci_ss_info_1002_4370_103c_308b
+static const pciSubsystemInfo pci_ss_info_1002_4370_105b_0c81 =
+	{0x105b, 0x0c81, pci_subsys_1002_4370_105b_0c81, 0};
+#undef pci_ss_info_105b_0c81
+#define pci_ss_info_105b_0c81 pci_ss_info_1002_4370_105b_0c81
+static const pciSubsystemInfo pci_ss_info_1002_4370_107b_0300 =
+	{0x107b, 0x0300, pci_subsys_1002_4370_107b_0300, 0};
+#undef pci_ss_info_107b_0300
+#define pci_ss_info_107b_0300 pci_ss_info_1002_4370_107b_0300
 static const pciSubsystemInfo pci_ss_info_1002_4371_103c_308b =
 	{0x103c, 0x308b, pci_subsys_1002_4371_103c_308b, 0};
 #undef pci_ss_info_103c_308b
 #define pci_ss_info_103c_308b pci_ss_info_1002_4371_103c_308b
+static const pciSubsystemInfo pci_ss_info_1002_4372_1025_0080 =
+	{0x1025, 0x0080, pci_subsys_1002_4372_1025_0080, 0};
+#undef pci_ss_info_1025_0080
+#define pci_ss_info_1025_0080 pci_ss_info_1002_4372_1025_0080
 static const pciSubsystemInfo pci_ss_info_1002_4372_103c_308b =
 	{0x103c, 0x308b, pci_subsys_1002_4372_103c_308b, 0};
 #undef pci_ss_info_103c_308b
 #define pci_ss_info_103c_308b pci_ss_info_1002_4372_103c_308b
+static const pciSubsystemInfo pci_ss_info_1002_4373_1025_0080 =
+	{0x1025, 0x0080, pci_subsys_1002_4373_1025_0080, 0};
+#undef pci_ss_info_1025_0080
+#define pci_ss_info_1025_0080 pci_ss_info_1002_4373_1025_0080
 static const pciSubsystemInfo pci_ss_info_1002_4373_103c_308b =
 	{0x103c, 0x308b, pci_subsys_1002_4373_103c_308b, 0};
 #undef pci_ss_info_103c_308b
@@ -24539,22 +28022,54 @@
 	{0x103c, 0x308b, pci_subsys_1002_4374_103c_308b, 0};
 #undef pci_ss_info_103c_308b
 #define pci_ss_info_103c_308b pci_ss_info_1002_4374_103c_308b
+static const pciSubsystemInfo pci_ss_info_1002_4375_1025_0080 =
+	{0x1025, 0x0080, pci_subsys_1002_4375_1025_0080, 0};
+#undef pci_ss_info_1025_0080
+#define pci_ss_info_1025_0080 pci_ss_info_1002_4375_1025_0080
 static const pciSubsystemInfo pci_ss_info_1002_4375_103c_308b =
 	{0x103c, 0x308b, pci_subsys_1002_4375_103c_308b, 0};
 #undef pci_ss_info_103c_308b
 #define pci_ss_info_103c_308b pci_ss_info_1002_4375_103c_308b
+static const pciSubsystemInfo pci_ss_info_1002_4376_1025_0080 =
+	{0x1025, 0x0080, pci_subsys_1002_4376_1025_0080, 0};
+#undef pci_ss_info_1025_0080
+#define pci_ss_info_1025_0080 pci_ss_info_1002_4376_1025_0080
 static const pciSubsystemInfo pci_ss_info_1002_4376_103c_308b =
 	{0x103c, 0x308b, pci_subsys_1002_4376_103c_308b, 0};
 #undef pci_ss_info_103c_308b
 #define pci_ss_info_103c_308b pci_ss_info_1002_4376_103c_308b
+static const pciSubsystemInfo pci_ss_info_1002_4377_1025_0080 =
+	{0x1025, 0x0080, pci_subsys_1002_4377_1025_0080, 0};
+#undef pci_ss_info_1025_0080
+#define pci_ss_info_1025_0080 pci_ss_info_1002_4377_1025_0080
 static const pciSubsystemInfo pci_ss_info_1002_4377_103c_308b =
 	{0x103c, 0x308b, pci_subsys_1002_4377_103c_308b, 0};
 #undef pci_ss_info_103c_308b
 #define pci_ss_info_103c_308b pci_ss_info_1002_4377_103c_308b
+static const pciSubsystemInfo pci_ss_info_1002_4378_1025_0080 =
+	{0x1025, 0x0080, pci_subsys_1002_4378_1025_0080, 0};
+#undef pci_ss_info_1025_0080
+#define pci_ss_info_1025_0080 pci_ss_info_1002_4378_1025_0080
 static const pciSubsystemInfo pci_ss_info_1002_4378_103c_308b =
 	{0x103c, 0x308b, pci_subsys_1002_4378_103c_308b, 0};
 #undef pci_ss_info_103c_308b
 #define pci_ss_info_103c_308b pci_ss_info_1002_4378_103c_308b
+static const pciSubsystemInfo pci_ss_info_1002_437a_1002_4379 =
+	{0x1002, 0x4379, pci_subsys_1002_437a_1002_4379, 0};
+#undef pci_ss_info_1002_4379
+#define pci_ss_info_1002_4379 pci_ss_info_1002_437a_1002_4379
+static const pciSubsystemInfo pci_ss_info_1002_437a_1002_437a =
+	{0x1002, 0x437a, pci_subsys_1002_437a_1002_437a, 0};
+#undef pci_ss_info_1002_437a
+#define pci_ss_info_1002_437a pci_ss_info_1002_437a_1002_437a
+static const pciSubsystemInfo pci_ss_info_1002_437a_14f1_8800 =
+	{0x14f1, 0x8800, pci_subsys_1002_437a_14f1_8800, 0};
+#undef pci_ss_info_14f1_8800
+#define pci_ss_info_14f1_8800 pci_ss_info_1002_437a_14f1_8800
+static const pciSubsystemInfo pci_ss_info_1002_437b_1734_10b8 =
+	{0x1734, 0x10b8, pci_subsys_1002_437b_1734_10b8, 0};
+#undef pci_ss_info_1734_10b8
+#define pci_ss_info_1734_10b8 pci_ss_info_1002_437b_1734_10b8
 static const pciSubsystemInfo pci_ss_info_1002_4742_1002_0040 =
 	{0x1002, 0x0040, pci_subsys_1002_4742_1002_0040, 0};
 #undef pci_ss_info_1002_0040
@@ -24683,6 +28198,10 @@
 	{0x1002, 0x4750, pci_subsys_1002_4750_1002_4750, 0};
 #undef pci_ss_info_1002_4750
 #define pci_ss_info_1002_4750 pci_ss_info_1002_4750_1002_4750
+static const pciSubsystemInfo pci_ss_info_1002_4752_0e11_001e =
+	{0x0e11, 0x001e, pci_subsys_1002_4752_0e11_001e, 0};
+#undef pci_ss_info_0e11_001e
+#define pci_ss_info_0e11_001e pci_ss_info_1002_4752_0e11_001e
 static const pciSubsystemInfo pci_ss_info_1002_4752_1002_0008 =
 	{0x1002, 0x0008, pci_subsys_1002_4752_1002_0008, 0};
 #undef pci_ss_info_1002_0008
@@ -24711,6 +28230,14 @@
 	{0x1028, 0x0134, pci_subsys_1002_4752_1028_0134, 0};
 #undef pci_ss_info_1028_0134
 #define pci_ss_info_1028_0134 pci_ss_info_1002_4752_1028_0134
+static const pciSubsystemInfo pci_ss_info_1002_4752_103c_10e1 =
+	{0x103c, 0x10e1, pci_subsys_1002_4752_103c_10e1, 0};
+#undef pci_ss_info_103c_10e1
+#define pci_ss_info_103c_10e1 pci_ss_info_1002_4752_103c_10e1
+static const pciSubsystemInfo pci_ss_info_1002_4752_107b_6400 =
+	{0x107b, 0x6400, pci_subsys_1002_4752_107b_6400, 0};
+#undef pci_ss_info_107b_6400
+#define pci_ss_info_107b_6400 pci_ss_info_1002_4752_107b_6400
 static const pciSubsystemInfo pci_ss_info_1002_4752_1734_007a =
 	{0x1734, 0x007a, pci_subsys_1002_4752_1734_007a, 0};
 #undef pci_ss_info_1734_007a
@@ -24723,6 +28250,10 @@
 	{0x8086, 0x3427, pci_subsys_1002_4752_8086_3427, 0};
 #undef pci_ss_info_8086_3427
 #define pci_ss_info_8086_3427 pci_ss_info_1002_4752_8086_3427
+static const pciSubsystemInfo pci_ss_info_1002_4752_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_1002_4752_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_1002_4752_8086_5744
 static const pciSubsystemInfo pci_ss_info_1002_4753_1002_4753 =
 	{0x1002, 0x4753, pci_subsys_1002_4753_1002_4753, 0};
 #undef pci_ss_info_1002_4753
@@ -24739,6 +28270,10 @@
 	{0x1028, 0x0089, pci_subsys_1002_4757_1028_0089, 0};
 #undef pci_ss_info_1028_0089
 #define pci_ss_info_1028_0089 pci_ss_info_1002_4757_1028_0089
+static const pciSubsystemInfo pci_ss_info_1002_4757_1028_008e =
+	{0x1028, 0x008e, pci_subsys_1002_4757_1028_008e, 0};
+#undef pci_ss_info_1028_008e
+#define pci_ss_info_1028_008e pci_ss_info_1002_4757_1028_008e
 static const pciSubsystemInfo pci_ss_info_1002_4757_1028_4082 =
 	{0x1028, 0x4082, pci_subsys_1002_4757_1028_4082, 0};
 #undef pci_ss_info_1028_4082
@@ -24923,10 +28458,18 @@
 	{0x104d, 0x80e7, pci_subsys_1002_4c59_104d_80e7, 0};
 #undef pci_ss_info_104d_80e7
 #define pci_ss_info_104d_80e7 pci_ss_info_1002_4c59_104d_80e7
+static const pciSubsystemInfo pci_ss_info_1002_4c59_104d_8140 =
+	{0x104d, 0x8140, pci_subsys_1002_4c59_104d_8140, 0};
+#undef pci_ss_info_104d_8140
+#define pci_ss_info_104d_8140 pci_ss_info_1002_4c59_104d_8140
 static const pciSubsystemInfo pci_ss_info_1002_4c59_1509_1930 =
 	{0x1509, 0x1930, pci_subsys_1002_4c59_1509_1930, 0};
 #undef pci_ss_info_1509_1930
 #define pci_ss_info_1509_1930 pci_ss_info_1002_4c59_1509_1930
+static const pciSubsystemInfo pci_ss_info_1002_4c66_1014_054d =
+	{0x1014, 0x054d, pci_subsys_1002_4c66_1014_054d, 0};
+#undef pci_ss_info_1014_054d
+#define pci_ss_info_1014_054d pci_ss_info_1002_4c66_1014_054d
 static const pciSubsystemInfo pci_ss_info_1002_4e44_1002_515e =
 	{0x1002, 0x515e, pci_subsys_1002_4e44_1002_515e, 0};
 #undef pci_ss_info_1002_515e
@@ -24955,10 +28498,22 @@
 	{0x103c, 0x0890, pci_subsys_1002_4e50_103c_0890, 0};
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_1002_4e50_103c_0890
+static const pciSubsystemInfo pci_ss_info_1002_4e50_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_1002_4e50_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_1002_4e50_144d_c00c
+static const pciSubsystemInfo pci_ss_info_1002_4e50_1462_0311 =
+	{0x1462, 0x0311, pci_subsys_1002_4e50_1462_0311, 0};
+#undef pci_ss_info_1462_0311
+#define pci_ss_info_1462_0311 pci_ss_info_1002_4e50_1462_0311
 static const pciSubsystemInfo pci_ss_info_1002_4e50_1734_1055 =
 	{0x1734, 0x1055, pci_subsys_1002_4e50_1734_1055, 0};
 #undef pci_ss_info_1734_1055
 #define pci_ss_info_1734_1055 pci_ss_info_1002_4e50_1734_1055
+static const pciSubsystemInfo pci_ss_info_1002_4e52_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_1002_4e52_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_1002_4e52_144d_c00c
 static const pciSubsystemInfo pci_ss_info_1002_4e65_1002_0003 =
 	{0x1002, 0x0003, pci_subsys_1002_4e65_1002_0003, 0};
 #undef pci_ss_info_1002_0003
@@ -25171,6 +28726,10 @@
 	{0x1002, 0x013a, pci_subsys_1002_5159_1002_013a, 0};
 #undef pci_ss_info_1002_013a
 #define pci_ss_info_1002_013a pci_ss_info_1002_5159_1002_013a
+static const pciSubsystemInfo pci_ss_info_1002_5159_1002_0908 =
+	{0x1002, 0x0908, pci_subsys_1002_5159_1002_0908, 0};
+#undef pci_ss_info_1002_0908
+#define pci_ss_info_1002_0908 pci_ss_info_1002_5159_1002_0908
 static const pciSubsystemInfo pci_ss_info_1002_5159_1014_029a =
 	{0x1014, 0x029a, pci_subsys_1002_5159_1014_029a, 0};
 #undef pci_ss_info_1014_029a
@@ -25183,6 +28742,10 @@
 	{0x1028, 0x019a, pci_subsys_1002_5159_1028_019a, 0};
 #undef pci_ss_info_1028_019a
 #define pci_ss_info_1028_019a pci_ss_info_1002_5159_1028_019a
+static const pciSubsystemInfo pci_ss_info_1002_5159_103c_1292 =
+	{0x103c, 0x1292, pci_subsys_1002_5159_103c_1292, 0};
+#undef pci_ss_info_103c_1292
+#define pci_ss_info_103c_1292 pci_ss_info_1002_5159_103c_1292
 static const pciSubsystemInfo pci_ss_info_1002_5159_1458_4002 =
 	{0x1458, 0x4002, pci_subsys_1002_5159_1458_4002, 0};
 #undef pci_ss_info_1458_4002
@@ -25207,6 +28770,10 @@
 	{0x1787, 0x0202, pci_subsys_1002_5159_1787_0202, 0};
 #undef pci_ss_info_1787_0202
 #define pci_ss_info_1787_0202 pci_ss_info_1002_5159_1787_0202
+static const pciSubsystemInfo pci_ss_info_1002_5159_17ee_1001 =
+	{0x17ee, 0x1001, pci_subsys_1002_5159_17ee_1001, 0};
+#undef pci_ss_info_17ee_1001
+#define pci_ss_info_17ee_1001 pci_ss_info_1002_5159_17ee_1001
 static const pciSubsystemInfo pci_ss_info_1002_5245_1002_0008 =
 	{0x1002, 0x0008, pci_subsys_1002_5245_1002_0008, 0};
 #undef pci_ss_info_1002_0008
@@ -25311,6 +28878,10 @@
 	{0x103c, 0x1279, pci_subsys_1002_5452_103c_1279, 0};
 #undef pci_ss_info_103c_1279
 #define pci_ss_info_103c_1279 pci_ss_info_1002_5452_103c_1279
+static const pciSubsystemInfo pci_ss_info_1002_5653_1025_0080 =
+	{0x1025, 0x0080, pci_subsys_1002_5653_1025_0080, 0};
+#undef pci_ss_info_1025_0080
+#define pci_ss_info_1025_0080 pci_ss_info_1002_5653_1025_0080
 static const pciSubsystemInfo pci_ss_info_1002_5654_1002_5654 =
 	{0x1002, 0x5654, pci_subsys_1002_5654_1002_5654, 0};
 #undef pci_ss_info_1002_5654
@@ -25331,6 +28902,10 @@
 	{0x18bc, 0x0050, pci_subsys_1002_5941_18bc_0050, 0};
 #undef pci_ss_info_18bc_0050
 #define pci_ss_info_18bc_0050 pci_ss_info_1002_5941_18bc_0050
+static const pciSubsystemInfo pci_ss_info_1002_5950_1025_0080 =
+	{0x1025, 0x0080, pci_subsys_1002_5950_1025_0080, 0};
+#undef pci_ss_info_1025_0080
+#define pci_ss_info_1025_0080 pci_ss_info_1002_5950_1025_0080
 static const pciSubsystemInfo pci_ss_info_1002_5950_103c_308b =
 	{0x103c, 0x308b, pci_subsys_1002_5950_103c_308b, 0};
 #undef pci_ss_info_103c_308b
@@ -25383,6 +28958,10 @@
 	{0x18bc, 0x0053, pci_subsys_1002_5961_18bc_0053, 0};
 #undef pci_ss_info_18bc_0053
 #define pci_ss_info_18bc_0053 pci_ss_info_1002_5961_18bc_0053
+static const pciSubsystemInfo pci_ss_info_1002_5964_1002_5964 =
+	{0x1002, 0x5964, pci_subsys_1002_5964_1002_5964, 0};
+#undef pci_ss_info_1002_5964
+#define pci_ss_info_1002_5964 pci_ss_info_1002_5964_1002_5964
 static const pciSubsystemInfo pci_ss_info_1002_5964_1043_c006 =
 	{0x1043, 0xc006, pci_subsys_1002_5964_1043_c006, 0};
 #undef pci_ss_info_1043_c006
@@ -25391,6 +28970,10 @@
 	{0x1458, 0x4018, pci_subsys_1002_5964_1458_4018, 0};
 #undef pci_ss_info_1458_4018
 #define pci_ss_info_1458_4018 pci_ss_info_1002_5964_1458_4018
+static const pciSubsystemInfo pci_ss_info_1002_5964_1458_4032 =
+	{0x1458, 0x4032, pci_subsys_1002_5964_1458_4032, 0};
+#undef pci_ss_info_1458_4032
+#define pci_ss_info_1458_4032 pci_ss_info_1002_5964_1458_4032
 static const pciSubsystemInfo pci_ss_info_1002_5964_147b_6191 =
 	{0x147b, 0x6191, pci_subsys_1002_5964_147b_6191, 0};
 #undef pci_ss_info_147b_6191
@@ -25427,22 +29010,42 @@
 	{0x1043, 0x032e, pci_subsys_1002_5b60_1043_032e, 0};
 #undef pci_ss_info_1043_032e
 #define pci_ss_info_1043_032e pci_ss_info_1002_5b60_1043_032e
+static const pciSubsystemInfo pci_ss_info_1002_5b60_1462_0400 =
+	{0x1462, 0x0400, pci_subsys_1002_5b60_1462_0400, 0};
+#undef pci_ss_info_1462_0400
+#define pci_ss_info_1462_0400 pci_ss_info_1002_5b60_1462_0400
 static const pciSubsystemInfo pci_ss_info_1002_5b60_1462_0402 =
 	{0x1462, 0x0402, pci_subsys_1002_5b60_1462_0402, 0};
 #undef pci_ss_info_1462_0402
 #define pci_ss_info_1462_0402 pci_ss_info_1002_5b60_1462_0402
+static const pciSubsystemInfo pci_ss_info_1002_5b60_196d_1086 =
+	{0x196d, 0x1086, pci_subsys_1002_5b60_196d_1086, 0};
+#undef pci_ss_info_196d_1086
+#define pci_ss_info_196d_1086 pci_ss_info_1002_5b60_196d_1086
 static const pciSubsystemInfo pci_ss_info_1002_5b70_1462_0403 =
 	{0x1462, 0x0403, pci_subsys_1002_5b70_1462_0403, 0};
 #undef pci_ss_info_1462_0403
 #define pci_ss_info_1462_0403 pci_ss_info_1002_5b70_1462_0403
+static const pciSubsystemInfo pci_ss_info_1002_5b70_196d_1087 =
+	{0x196d, 0x1087, pci_subsys_1002_5b70_196d_1087, 0};
+#undef pci_ss_info_196d_1087
+#define pci_ss_info_196d_1087 pci_ss_info_1002_5b70_196d_1087
 static const pciSubsystemInfo pci_ss_info_1002_5c63_1002_5c63 =
 	{0x1002, 0x5c63, pci_subsys_1002_5c63_1002_5c63, 0};
 #undef pci_ss_info_1002_5c63
 #define pci_ss_info_1002_5c63 pci_ss_info_1002_5c63_1002_5c63
+static const pciSubsystemInfo pci_ss_info_1002_5c63_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_1002_5c63_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_1002_5c63_144d_c00c
 static const pciSubsystemInfo pci_ss_info_1002_5d44_1458_4019 =
 	{0x1458, 0x4019, pci_subsys_1002_5d44_1458_4019, 0};
 #undef pci_ss_info_1458_4019
 #define pci_ss_info_1458_4019 pci_ss_info_1002_5d44_1458_4019
+static const pciSubsystemInfo pci_ss_info_1002_5d44_1458_4032 =
+	{0x1458, 0x4032, pci_subsys_1002_5d44_1458_4032, 0};
+#undef pci_ss_info_1458_4032
+#define pci_ss_info_1458_4032 pci_ss_info_1002_5d44_1458_4032
 static const pciSubsystemInfo pci_ss_info_1002_5d44_174b_7c12 =
 	{0x174b, 0x7c12, pci_subsys_1002_5d44_174b_7c12, 0};
 #undef pci_ss_info_174b_7c12
@@ -25511,6 +29114,18 @@
 	{0x1002, 0x0323, pci_subsys_1002_7166_1002_0323, 0};
 #undef pci_ss_info_1002_0323
 #define pci_ss_info_1002_0323 pci_ss_info_1002_7166_1002_0323
+static const pciSubsystemInfo pci_ss_info_1002_71c4_17aa_2007 =
+	{0x17aa, 0x2007, pci_subsys_1002_71c4_17aa_2007, 0};
+#undef pci_ss_info_17aa_2007
+#define pci_ss_info_17aa_2007 pci_ss_info_1002_71c4_17aa_2007
+static const pciSubsystemInfo pci_ss_info_1002_724b_1002_0b12 =
+	{0x1002, 0x0b12, pci_subsys_1002_724b_1002_0b12, 0};
+#undef pci_ss_info_1002_0b12
+#define pci_ss_info_1002_0b12 pci_ss_info_1002_724b_1002_0b12
+static const pciSubsystemInfo pci_ss_info_1002_724b_1002_0b13 =
+	{0x1002, 0x0b13, pci_subsys_1002_724b_1002_0b13, 0};
+#undef pci_ss_info_1002_0b13
+#define pci_ss_info_1002_0b13 pci_ss_info_1002_724b_1002_0b13
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1004_0304_1004_0304 =
 	{0x1004, 0x0304, pci_subsys_1004_0304_1004_0304, 0};
@@ -25629,6 +29244,14 @@
 	{0x2646, 0x0001, pci_subsys_1011_0009_2646_0001, 0};
 #undef pci_ss_info_2646_0001
 #define pci_ss_info_2646_0001 pci_ss_info_1011_0009_2646_0001
+static const pciSubsystemInfo pci_ss_info_1011_000f_1011_def1 =
+	{0x1011, 0xdef1, pci_subsys_1011_000f_1011_def1, 0};
+#undef pci_ss_info_1011_def1
+#define pci_ss_info_1011_def1 pci_ss_info_1011_000f_1011_def1
+static const pciSubsystemInfo pci_ss_info_1011_000f_103c_def1 =
+	{0x103c, 0xdef1, pci_subsys_1011_000f_103c_def1, 0};
+#undef pci_ss_info_103c_def1
+#define pci_ss_info_103c_def1 pci_ss_info_1011_000f_103c_def1
 static const pciSubsystemInfo pci_ss_info_1011_0014_1186_0100 =
 	{0x1186, 0x0100, pci_subsys_1011_0014_1186_0100, 0};
 #undef pci_ss_info_1186_0100
@@ -25657,6 +29280,10 @@
 	{0x1033, 0x800d, pci_subsys_1011_0019_1033_800d, 0};
 #undef pci_ss_info_1033_800d
 #define pci_ss_info_1033_800d pci_ss_info_1011_0019_1033_800d
+static const pciSubsystemInfo pci_ss_info_1011_0019_103c_125a =
+	{0x103c, 0x125a, pci_subsys_1011_0019_103c_125a, 0};
+#undef pci_ss_info_103c_125a
+#define pci_ss_info_103c_125a pci_ss_info_1011_0019_103c_125a
 static const pciSubsystemInfo pci_ss_info_1011_0019_108d_0016 =
 	{0x108d, 0x0016, pci_subsys_1011_0019_108d_0016, 0};
 #undef pci_ss_info_108d_0016
@@ -25765,6 +29392,18 @@
 	{0x13d1, 0xab01, pci_subsys_1011_0019_13d1_ab01, 0};
 #undef pci_ss_info_13d1_ab01
 #define pci_ss_info_13d1_ab01 pci_ss_info_1011_0019_13d1_ab01
+static const pciSubsystemInfo pci_ss_info_1011_0019_1498_000a =
+	{0x1498, 0x000a, pci_subsys_1011_0019_1498_000a, 0};
+#undef pci_ss_info_1498_000a
+#define pci_ss_info_1498_000a pci_ss_info_1011_0019_1498_000a
+static const pciSubsystemInfo pci_ss_info_1011_0019_1498_000b =
+	{0x1498, 0x000b, pci_subsys_1011_0019_1498_000b, 0};
+#undef pci_ss_info_1498_000b
+#define pci_ss_info_1498_000b pci_ss_info_1011_0019_1498_000b
+static const pciSubsystemInfo pci_ss_info_1011_0019_1498_000c =
+	{0x1498, 0x000c, pci_subsys_1011_0019_1498_000c, 0};
+#undef pci_ss_info_1498_000c
+#define pci_ss_info_1498_000c pci_ss_info_1011_0019_1498_000c
 static const pciSubsystemInfo pci_ss_info_1011_0019_14cb_0100 =
 	{0x14cb, 0x0100, pci_subsys_1011_0019_14cb_0100, 0};
 #undef pci_ss_info_14cb_0100
@@ -25849,6 +29488,14 @@
 	{0x1013, 0x4280, pci_subsys_1013_6003_1013_4280, 0};
 #undef pci_ss_info_1013_4280
 #define pci_ss_info_1013_4280 pci_ss_info_1013_6003_1013_4280
+static const pciSubsystemInfo pci_ss_info_1013_6003_1014_0153 =
+	{0x1014, 0x0153, pci_subsys_1013_6003_1014_0153, 0};
+#undef pci_ss_info_1014_0153
+#define pci_ss_info_1014_0153 pci_ss_info_1013_6003_1014_0153
+static const pciSubsystemInfo pci_ss_info_1013_6003_153b_112e =
+	{0x153b, 0x112e, pci_subsys_1013_6003_153b_112e, 0};
+#undef pci_ss_info_153b_112e
+#define pci_ss_info_153b_112e pci_ss_info_1013_6003_153b_112e
 static const pciSubsystemInfo pci_ss_info_1013_6003_153b_1136 =
 	{0x153b, 0x1136, pci_subsys_1013_6003_153b_1136, 0};
 #undef pci_ss_info_153b_1136
@@ -25861,6 +29508,10 @@
 	{0x1681, 0xa011, pci_subsys_1013_6003_1681_a011, 0};
 #undef pci_ss_info_1681_a011
 #define pci_ss_info_1681_a011 pci_ss_info_1013_6003_1681_a011
+static const pciSubsystemInfo pci_ss_info_1013_6003_5053_3357 =
+	{0x5053, 0x3357, pci_subsys_1013_6003_5053_3357, 0};
+#undef pci_ss_info_5053_3357
+#define pci_ss_info_5053_3357 pci_ss_info_1013_6003_5053_3357
 static const pciSubsystemInfo pci_ss_info_1013_6005_1013_4281 =
 	{0x1013, 0x4281, pci_subsys_1013_6005_1013_4281, 0};
 #undef pci_ss_info_1013_4281
@@ -26046,6 +29697,20 @@
 #define pci_ss_info_1014_02c2 pci_ss_info_1014_02bd_1014_02c2
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_101a_1dc1_101a_0019 =
+	{0x101a, 0x0019, pci_subsys_101a_1dc1_101a_0019, 0};
+#undef pci_ss_info_101a_0019
+#define pci_ss_info_101a_0019 pci_ss_info_101a_1dc1_101a_0019
+static const pciSubsystemInfo pci_ss_info_101a_1dc1_101a_001f =
+	{0x101a, 0x001f, pci_subsys_101a_1dc1_101a_001f, 0};
+#undef pci_ss_info_101a_001f
+#define pci_ss_info_101a_001f pci_ss_info_101a_1dc1_101a_001f
+static const pciSubsystemInfo pci_ss_info_101a_1dc1_101a_0ece =
+	{0x101a, 0x0ece, pci_subsys_101a_1dc1_101a_0ece, 0};
+#undef pci_ss_info_101a_0ece
+#define pci_ss_info_101a_0ece pci_ss_info_101a_1dc1_101a_0ece
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_101e_1960_101e_0471 =
 	{0x101e, 0x0471, pci_subsys_101e_1960_101e_0471, 0};
 #undef pci_ss_info_101e_0471
@@ -26173,6 +29838,10 @@
 	{0x1259, 0x2703, pci_subsys_1022_2000_1259_2703, 0};
 #undef pci_ss_info_1259_2703
 #define pci_ss_info_1259_2703 pci_ss_info_1022_2000_1259_2703
+static const pciSubsystemInfo pci_ss_info_1022_2000_1259_2704 =
+	{0x1259, 0x2704, pci_subsys_1022_2000_1259_2704, 0};
+#undef pci_ss_info_1259_2704
+#define pci_ss_info_1259_2704 pci_ss_info_1022_2000_1259_2704
 static const pciSubsystemInfo pci_ss_info_1022_2000_4c53_1000 =
 	{0x4c53, 0x1000, pci_subsys_1022_2000_4c53_1000, 0};
 #undef pci_ss_info_4c53_1000
@@ -26313,10 +29982,34 @@
 	{0x1028, 0x0002, pci_subsys_1028_0002_1028_0002, 0};
 #undef pci_ss_info_1028_0002
 #define pci_ss_info_1028_0002 pci_ss_info_1028_0002_1028_0002
+static const pciSubsystemInfo pci_ss_info_1028_0002_1028_00d1 =
+	{0x1028, 0x00d1, pci_subsys_1028_0002_1028_00d1, 0};
+#undef pci_ss_info_1028_00d1
+#define pci_ss_info_1028_00d1 pci_ss_info_1028_0002_1028_00d1
+static const pciSubsystemInfo pci_ss_info_1028_0002_1028_00d9 =
+	{0x1028, 0x00d9, pci_subsys_1028_0002_1028_00d9, 0};
+#undef pci_ss_info_1028_00d9
+#define pci_ss_info_1028_00d9 pci_ss_info_1028_0002_1028_00d9
 static const pciSubsystemInfo pci_ss_info_1028_0003_1028_0003 =
 	{0x1028, 0x0003, pci_subsys_1028_0003_1028_0003, 0};
 #undef pci_ss_info_1028_0003
 #define pci_ss_info_1028_0003 pci_ss_info_1028_0003_1028_0003
+static const pciSubsystemInfo pci_ss_info_1028_0004_1028_0004 =
+	{0x1028, 0x0004, pci_subsys_1028_0004_1028_0004, 0};
+#undef pci_ss_info_1028_0004
+#define pci_ss_info_1028_0004 pci_ss_info_1028_0004_1028_0004
+static const pciSubsystemInfo pci_ss_info_1028_000a_1028_0106 =
+	{0x1028, 0x0106, pci_subsys_1028_000a_1028_0106, 0};
+#undef pci_ss_info_1028_0106
+#define pci_ss_info_1028_0106 pci_ss_info_1028_000a_1028_0106
+static const pciSubsystemInfo pci_ss_info_1028_000a_1028_011b =
+	{0x1028, 0x011b, pci_subsys_1028_000a_1028_011b, 0};
+#undef pci_ss_info_1028_011b
+#define pci_ss_info_1028_011b pci_ss_info_1028_000a_1028_011b
+static const pciSubsystemInfo pci_ss_info_1028_000a_1028_0121 =
+	{0x1028, 0x0121, pci_subsys_1028_000a_1028_0121, 0};
+#undef pci_ss_info_1028_0121
+#define pci_ss_info_1028_0121 pci_ss_info_1028_000a_1028_0121
 static const pciSubsystemInfo pci_ss_info_1028_0013_1028_016c =
 	{0x1028, 0x016c, pci_subsys_1028_0013_1028_016c, 0};
 #undef pci_ss_info_1028_016c
@@ -26337,6 +30030,14 @@
 	{0x1028, 0x0170, pci_subsys_1028_0013_1028_0170, 0};
 #undef pci_ss_info_1028_0170
 #define pci_ss_info_1028_0170 pci_ss_info_1028_0013_1028_0170
+static const pciSubsystemInfo pci_ss_info_1028_0015_1028_1f01 =
+	{0x1028, 0x1f01, pci_subsys_1028_0015_1028_1f01, 0};
+#undef pci_ss_info_1028_1f01
+#define pci_ss_info_1028_1f01 pci_ss_info_1028_0015_1028_1f01
+static const pciSubsystemInfo pci_ss_info_1028_0015_1028_1f02 =
+	{0x1028, 0x1f02, pci_subsys_1028_0015_1028_1f02, 0};
+#undef pci_ss_info_1028_1f02
+#define pci_ss_info_1028_1f02 pci_ss_info_1028_0015_1028_1f02
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_102a_001f_9005_000f =
 	{0x9005, 0x000f, pci_subsys_102a_001f_9005_000f, 0};
@@ -27027,6 +30728,10 @@
 	{0x1043, 0x8035, pci_subsys_1039_0900_1043_8035, 0};
 #undef pci_ss_info_1043_8035
 #define pci_ss_info_1043_8035 pci_ss_info_1039_0900_1043_8035
+static const pciSubsystemInfo pci_ss_info_1039_0900_1462_0900 =
+	{0x1462, 0x0900, pci_subsys_1039_0900_1462_0900, 0};
+#undef pci_ss_info_1462_0900
+#define pci_ss_info_1462_0900 pci_ss_info_1039_0900_1462_0900
 static const pciSubsystemInfo pci_ss_info_1039_5513_1019_0970 =
 	{0x1019, 0x0970, pci_subsys_1039_5513_1019_0970, 0};
 #undef pci_ss_info_1019_0970
@@ -27039,6 +30744,10 @@
 	{0x1043, 0x8035, pci_subsys_1039_5513_1043_8035, 0};
 #undef pci_ss_info_1043_8035
 #define pci_ss_info_1043_8035 pci_ss_info_1039_5513_1043_8035
+static const pciSubsystemInfo pci_ss_info_1039_5513_1462_7010 =
+	{0x1462, 0x7010, pci_subsys_1039_5513_1462_7010, 0};
+#undef pci_ss_info_1462_7010
+#define pci_ss_info_1462_7010 pci_ss_info_1039_5513_1462_7010
 static const pciSubsystemInfo pci_ss_info_1039_6300_1019_0970 =
 	{0x1019, 0x0970, pci_subsys_1039_6300_1019_0970, 0};
 #undef pci_ss_info_1019_0970
@@ -27079,6 +30788,10 @@
 	{0x1039, 0x6330, pci_subsys_1039_6330_1039_6330, 0};
 #undef pci_ss_info_1039_6330
 #define pci_ss_info_1039_6330 pci_ss_info_1039_6330_1039_6330
+static const pciSubsystemInfo pci_ss_info_1039_6330_1043_8113 =
+	{0x1043, 0x8113, pci_subsys_1039_6330_1043_8113, 0};
+#undef pci_ss_info_1043_8113
+#define pci_ss_info_1043_8113 pci_ss_info_1039_6330_1043_8113
 static const pciSubsystemInfo pci_ss_info_1039_7001_1019_0a14 =
 	{0x1019, 0x0a14, pci_subsys_1039_7001_1019_0a14, 0};
 #undef pci_ss_info_1019_0a14
@@ -27091,10 +30804,26 @@
 	{0x1462, 0x5470, pci_subsys_1039_7001_1462_5470, 0};
 #undef pci_ss_info_1462_5470
 #define pci_ss_info_1462_5470 pci_ss_info_1039_7001_1462_5470
+static const pciSubsystemInfo pci_ss_info_1039_7001_1462_7010 =
+	{0x1462, 0x7010, pci_subsys_1039_7001_1462_7010, 0};
+#undef pci_ss_info_1462_7010
+#define pci_ss_info_1462_7010 pci_ss_info_1039_7001_1462_7010
+static const pciSubsystemInfo pci_ss_info_1039_7002_1462_7010 =
+	{0x1462, 0x7010, pci_subsys_1039_7002_1462_7010, 0};
+#undef pci_ss_info_1462_7010
+#define pci_ss_info_1462_7010 pci_ss_info_1039_7002_1462_7010
 static const pciSubsystemInfo pci_ss_info_1039_7002_1509_7002 =
 	{0x1509, 0x7002, pci_subsys_1039_7002_1509_7002, 0};
 #undef pci_ss_info_1509_7002
 #define pci_ss_info_1509_7002 pci_ss_info_1039_7002_1509_7002
+static const pciSubsystemInfo pci_ss_info_1039_7007_1462_701d =
+	{0x1462, 0x701d, pci_subsys_1039_7007_1462_701d, 0};
+#undef pci_ss_info_1462_701d
+#define pci_ss_info_1462_701d pci_ss_info_1039_7007_1462_701d
+static const pciSubsystemInfo pci_ss_info_1039_7012_1462_7010 =
+	{0x1462, 0x7010, pci_subsys_1039_7012_1462_7010, 0};
+#undef pci_ss_info_1462_7010
+#define pci_ss_info_1462_7010 pci_ss_info_1039_7012_1462_7010
 static const pciSubsystemInfo pci_ss_info_1039_7012_15bd_1001 =
 	{0x15bd, 0x1001, pci_subsys_1039_7012_15bd_1001, 0};
 #undef pci_ss_info_15bd_1001
@@ -27259,6 +30988,10 @@
 	{0x103c, 0x1301, pci_subsys_103c_1048_103c_1301, 0};
 #undef pci_ss_info_103c_1301
 #define pci_ss_info_103c_1301 pci_ss_info_103c_1048_103c_1301
+static const pciSubsystemInfo pci_ss_info_103c_3220_103c_3225 =
+	{0x103c, 0x3225, pci_subsys_103c_3220_103c_3225, 0};
+#undef pci_ss_info_103c_3225
+#define pci_ss_info_103c_3225 pci_ss_info_103c_3220_103c_3225
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1043_0675_0675_1704 =
 	{0x0675, 0x1704, pci_subsys_1043_0675_0675_1704, 0};
@@ -27429,6 +31162,10 @@
 #undef pci_ss_info_1048_0935
 #define pci_ss_info_1048_0935 pci_ss_info_1048_8901_1048_0935
 #endif
+static const pciSubsystemInfo pci_ss_info_104a_0500_104a_0500 =
+	{0x104a, 0x0500, pci_subsys_104a_0500_104a_0500, 0};
+#undef pci_ss_info_104a_0500
+#define pci_ss_info_104a_0500 pci_ss_info_104a_0500_104a_0500
 static const pciSubsystemInfo pci_ss_info_104c_3d07_1011_4d10 =
 	{0x1011, 0x4d10, pci_subsys_104c_3d07_1011_4d10, 0};
 #undef pci_ss_info_1011_4d10
@@ -27557,6 +31294,10 @@
 	{0x11bd, 0x000f, pci_subsys_104c_8020_11bd_000f, 0};
 #undef pci_ss_info_11bd_000f
 #define pci_ss_info_11bd_000f pci_ss_info_104c_8020_11bd_000f
+static const pciSubsystemInfo pci_ss_info_104c_8020_11bd_001c =
+	{0x11bd, 0x001c, pci_subsys_104c_8020_11bd_001c, 0};
+#undef pci_ss_info_11bd_001c
+#define pci_ss_info_11bd_001c pci_ss_info_104c_8020_11bd_001c
 static const pciSubsystemInfo pci_ss_info_104c_8021_104d_80df =
 	{0x104d, 0x80df, pci_subsys_104c_8021_104d_80df, 0};
 #undef pci_ss_info_104d_80df
@@ -27573,10 +31314,18 @@
 	{0x1043, 0x808b, pci_subsys_104c_8023_1043_808b, 0};
 #undef pci_ss_info_1043_808b
 #define pci_ss_info_1043_808b pci_ss_info_104c_8023_1043_808b
+static const pciSubsystemInfo pci_ss_info_104c_8023_1043_815b =
+	{0x1043, 0x815b, pci_subsys_104c_8023_1043_815b, 0};
+#undef pci_ss_info_1043_815b
+#define pci_ss_info_1043_815b pci_ss_info_104c_8023_1043_815b
 static const pciSubsystemInfo pci_ss_info_104c_8025_1458_1000 =
 	{0x1458, 0x1000, pci_subsys_104c_8025_1458_1000, 0};
 #undef pci_ss_info_1458_1000
 #define pci_ss_info_1458_1000 pci_ss_info_104c_8025_1458_1000
+static const pciSubsystemInfo pci_ss_info_104c_8026_1025_003c =
+	{0x1025, 0x003c, pci_subsys_104c_8026_1025_003c, 0};
+#undef pci_ss_info_1025_003c
+#define pci_ss_info_1025_003c pci_ss_info_104c_8026_1025_003c
 static const pciSubsystemInfo pci_ss_info_104c_8026_103c_006a =
 	{0x103c, 0x006a, pci_subsys_104c_8026_103c_006a, 0};
 #undef pci_ss_info_103c_006a
@@ -27609,6 +31358,10 @@
 	{0x1028, 0x014e, pci_subsys_104c_802b_1028_014e, 0};
 #undef pci_ss_info_1028_014e
 #define pci_ss_info_1028_014e pci_ss_info_104c_802b_1028_014e
+static const pciSubsystemInfo pci_ss_info_104c_8031_1025_0080 =
+	{0x1025, 0x0080, pci_subsys_104c_8031_1025_0080, 0};
+#undef pci_ss_info_1025_0080
+#define pci_ss_info_1025_0080 pci_ss_info_104c_8031_1025_0080
 static const pciSubsystemInfo pci_ss_info_104c_8031_103c_099c =
 	{0x103c, 0x099c, pci_subsys_104c_8031_103c_099c, 0};
 #undef pci_ss_info_103c_099c
@@ -27617,6 +31370,10 @@
 	{0x103c, 0x308b, pci_subsys_104c_8031_103c_308b, 0};
 #undef pci_ss_info_103c_308b
 #define pci_ss_info_103c_308b pci_ss_info_104c_8031_103c_308b
+static const pciSubsystemInfo pci_ss_info_104c_8032_1025_0080 =
+	{0x1025, 0x0080, pci_subsys_104c_8032_1025_0080, 0};
+#undef pci_ss_info_1025_0080
+#define pci_ss_info_1025_0080 pci_ss_info_104c_8032_1025_0080
 static const pciSubsystemInfo pci_ss_info_104c_8032_103c_099c =
 	{0x103c, 0x099c, pci_subsys_104c_8032_103c_099c, 0};
 #undef pci_ss_info_103c_099c
@@ -27625,6 +31382,10 @@
 	{0x103c, 0x308b, pci_subsys_104c_8032_103c_308b, 0};
 #undef pci_ss_info_103c_308b
 #define pci_ss_info_103c_308b pci_ss_info_104c_8032_103c_308b
+static const pciSubsystemInfo pci_ss_info_104c_8033_1025_0080 =
+	{0x1025, 0x0080, pci_subsys_104c_8033_1025_0080, 0};
+#undef pci_ss_info_1025_0080
+#define pci_ss_info_1025_0080 pci_ss_info_104c_8033_1025_0080
 static const pciSubsystemInfo pci_ss_info_104c_8033_103c_099c =
 	{0x103c, 0x099c, pci_subsys_104c_8033_103c_099c, 0};
 #undef pci_ss_info_103c_099c
@@ -27633,6 +31394,10 @@
 	{0x103c, 0x308b, pci_subsys_104c_8033_103c_308b, 0};
 #undef pci_ss_info_103c_308b
 #define pci_ss_info_103c_308b pci_ss_info_104c_8033_103c_308b
+static const pciSubsystemInfo pci_ss_info_104c_8034_1025_0080 =
+	{0x1025, 0x0080, pci_subsys_104c_8034_1025_0080, 0};
+#undef pci_ss_info_1025_0080
+#define pci_ss_info_1025_0080 pci_ss_info_104c_8034_1025_0080
 static const pciSubsystemInfo pci_ss_info_104c_8034_103c_099c =
 	{0x103c, 0x099c, pci_subsys_104c_8034_103c_099c, 0};
 #undef pci_ss_info_103c_099c
@@ -27645,6 +31410,38 @@
 	{0x103c, 0x099c, pci_subsys_104c_8035_103c_099c, 0};
 #undef pci_ss_info_103c_099c
 #define pci_ss_info_103c_099c pci_ss_info_104c_8035_103c_099c
+static const pciSubsystemInfo pci_ss_info_104c_8039_103c_309f =
+	{0x103c, 0x309f, pci_subsys_104c_8039_103c_309f, 0};
+#undef pci_ss_info_103c_309f
+#define pci_ss_info_103c_309f pci_ss_info_104c_8039_103c_309f
+static const pciSubsystemInfo pci_ss_info_104c_8039_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_104c_8039_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_104c_8039_103c_30a1
+static const pciSubsystemInfo pci_ss_info_104c_803a_103c_309f =
+	{0x103c, 0x309f, pci_subsys_104c_803a_103c_309f, 0};
+#undef pci_ss_info_103c_309f
+#define pci_ss_info_103c_309f pci_ss_info_104c_803a_103c_309f
+static const pciSubsystemInfo pci_ss_info_104c_803a_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_104c_803a_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_104c_803a_103c_30a1
+static const pciSubsystemInfo pci_ss_info_104c_803b_103c_309f =
+	{0x103c, 0x309f, pci_subsys_104c_803b_103c_309f, 0};
+#undef pci_ss_info_103c_309f
+#define pci_ss_info_103c_309f pci_ss_info_104c_803b_103c_309f
+static const pciSubsystemInfo pci_ss_info_104c_803c_103c_309f =
+	{0x103c, 0x309f, pci_subsys_104c_803c_103c_309f, 0};
+#undef pci_ss_info_103c_309f
+#define pci_ss_info_103c_309f pci_ss_info_104c_803c_103c_309f
+static const pciSubsystemInfo pci_ss_info_104c_803d_103c_309f =
+	{0x103c, 0x309f, pci_subsys_104c_803d_103c_309f, 0};
+#undef pci_ss_info_103c_309f
+#define pci_ss_info_103c_309f pci_ss_info_104c_803d_103c_309f
+static const pciSubsystemInfo pci_ss_info_104c_803d_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_104c_803d_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_104c_803d_103c_30a1
 static const pciSubsystemInfo pci_ss_info_104c_8204_1028_0139 =
 	{0x1028, 0x0139, pci_subsys_104c_8204_1028_0139, 0};
 #undef pci_ss_info_1028_0139
@@ -27681,6 +31478,10 @@
 	{0x13d1, 0xaba0, pci_subsys_104c_9066_13d1_aba0, 0};
 #undef pci_ss_info_13d1_aba0
 #define pci_ss_info_13d1_aba0 pci_ss_info_104c_9066_13d1_aba0
+static const pciSubsystemInfo pci_ss_info_104c_9066_1737_0033 =
+	{0x1737, 0x0033, pci_subsys_104c_9066_1737_0033, 0};
+#undef pci_ss_info_1737_0033
+#define pci_ss_info_1737_0033 pci_ss_info_104c_9066_1737_0033
 static const pciSubsystemInfo pci_ss_info_104c_a106_175c_5000 =
 	{0x175c, 0x5000, pci_subsys_104c_a106_175c_5000, 0};
 #undef pci_ss_info_175c_5000
@@ -27717,6 +31518,10 @@
 	{0x1028, 0x00e6, pci_subsys_104c_ac42_1028_00e6, 0};
 #undef pci_ss_info_1028_00e6
 #define pci_ss_info_1028_00e6 pci_ss_info_104c_ac42_1028_00e6
+static const pciSubsystemInfo pci_ss_info_104c_ac44_1028_0149 =
+	{0x1028, 0x0149, pci_subsys_104c_ac44_1028_0149, 0};
+#undef pci_ss_info_1028_0149
+#define pci_ss_info_1028_0149 pci_ss_info_104c_ac44_1028_0149
 static const pciSubsystemInfo pci_ss_info_104c_ac44_1028_0163 =
 	{0x1028, 0x0163, pci_subsys_104c_ac44_1028_0163, 0};
 #undef pci_ss_info_1028_0163
@@ -27733,6 +31538,10 @@
 	{0x1028, 0x0139, pci_subsys_104c_ac47_1028_0139, 0};
 #undef pci_ss_info_1028_0139
 #define pci_ss_info_1028_0139 pci_ss_info_104c_ac47_1028_0139
+static const pciSubsystemInfo pci_ss_info_104c_ac47_1028_013f =
+	{0x1028, 0x013f, pci_subsys_104c_ac47_1028_013f, 0};
+#undef pci_ss_info_1028_013f
+#define pci_ss_info_1028_013f pci_ss_info_104c_ac47_1028_013f
 static const pciSubsystemInfo pci_ss_info_104c_ac47_1028_014e =
 	{0x1028, 0x014e, pci_subsys_104c_ac47_1028_014e, 0};
 #undef pci_ss_info_1028_014e
@@ -27749,6 +31558,10 @@
 	{0x0e11, 0x004e, pci_subsys_104c_ac51_0e11_004e, 0};
 #undef pci_ss_info_0e11_004e
 #define pci_ss_info_0e11_004e pci_ss_info_104c_ac51_0e11_004e
+static const pciSubsystemInfo pci_ss_info_104c_ac51_1014_0148 =
+	{0x1014, 0x0148, pci_subsys_104c_ac51_1014_0148, 0};
+#undef pci_ss_info_1014_0148
+#define pci_ss_info_1014_0148 pci_ss_info_104c_ac51_1014_0148
 static const pciSubsystemInfo pci_ss_info_104c_ac51_1014_023b =
 	{0x1014, 0x023b, pci_subsys_104c_ac51_1014_023b, 0};
 #undef pci_ss_info_1014_023b
@@ -27777,14 +31590,26 @@
 	{0xe4bf, 0x1000, pci_subsys_104c_ac51_e4bf_1000, 0};
 #undef pci_ss_info_e4bf_1000
 #define pci_ss_info_e4bf_1000 pci_ss_info_104c_ac51_e4bf_1000
+static const pciSubsystemInfo pci_ss_info_104c_ac54_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_104c_ac54_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_104c_ac54_103c_08b0
 static const pciSubsystemInfo pci_ss_info_104c_ac55_1014_0512 =
 	{0x1014, 0x0512, pci_subsys_104c_ac55_1014_0512, 0};
 #undef pci_ss_info_1014_0512
 #define pci_ss_info_1014_0512 pci_ss_info_104c_ac55_1014_0512
+static const pciSubsystemInfo pci_ss_info_104c_ac56_1014_0512 =
+	{0x1014, 0x0512, pci_subsys_104c_ac56_1014_0512, 0};
+#undef pci_ss_info_1014_0512
+#define pci_ss_info_1014_0512 pci_ss_info_104c_ac56_1014_0512
 static const pciSubsystemInfo pci_ss_info_104c_ac56_1014_0528 =
 	{0x1014, 0x0528, pci_subsys_104c_ac56_1014_0528, 0};
 #undef pci_ss_info_1014_0528
 #define pci_ss_info_1014_0528 pci_ss_info_104c_ac56_1014_0528
+static const pciSubsystemInfo pci_ss_info_104c_ac56_17aa_2012 =
+	{0x17aa, 0x2012, pci_subsys_104c_ac56_17aa_2012, 0};
+#undef pci_ss_info_17aa_2012
+#define pci_ss_info_17aa_2012 pci_ss_info_104c_ac56_17aa_2012
 static const pciSubsystemInfo pci_ss_info_104c_ac60_175c_5100 =
 	{0x175c, 0x5100, pci_subsys_104c_ac60_175c_5100, 0};
 #undef pci_ss_info_175c_5100
@@ -27801,6 +31626,10 @@
 	{0x175c, 0x8800, pci_subsys_104c_ac60_175c_8800, 0};
 #undef pci_ss_info_175c_8800
 #define pci_ss_info_175c_8800 pci_ss_info_104c_ac60_175c_8800
+static const pciSubsystemInfo pci_ss_info_104c_ac8f_1028_018d =
+	{0x1028, 0x018d, pci_subsys_104c_ac8f_1028_018d, 0};
+#undef pci_ss_info_1028_018d
+#define pci_ss_info_1028_018d pci_ss_info_104c_ac8f_1028_018d
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1050_0840_1050_0001 =
 	{0x1050, 0x0001, pci_subsys_1050_0840_1050_0001, 0};
@@ -28048,6 +31877,10 @@
 #undef pci_ss_info_1668_0302
 #define pci_ss_info_1668_0302 pci_ss_info_1057_5600_1668_0302
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_105a_0d30_1043_8042 =
+	{0x1043, 0x8042, pci_subsys_105a_0d30_1043_8042, 0};
+#undef pci_ss_info_1043_8042
+#define pci_ss_info_1043_8042 pci_ss_info_105a_0d30_1043_8042
 static const pciSubsystemInfo pci_ss_info_105a_0d30_105a_4d33 =
 	{0x105a, 0x4d33, pci_subsys_105a_0d30_105a_4d33, 0};
 #undef pci_ss_info_105a_4d33
@@ -28082,6 +31915,12 @@
 	{0x105a, 0x4d39, pci_subsys_105a_4d30_105a_4d39, 0};
 #undef pci_ss_info_105a_4d39
 #define pci_ss_info_105a_4d39 pci_ss_info_105a_4d30_105a_4d39
+#endif
+static const pciSubsystemInfo pci_ss_info_105a_4d30_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_105a_4d30_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_105a_4d30_8086_5744
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_105a_4d33_105a_4d33 =
 	{0x105a, 0x4d33, pci_subsys_105a_4d33_105a_4d33, 0};
 #undef pci_ss_info_105a_4d33
@@ -28130,6 +31969,22 @@
 	{0x105a, 0x6269, pci_subsys_105a_6269_105a_6269, 0};
 #undef pci_ss_info_105a_6269
 #define pci_ss_info_105a_6269 pci_ss_info_105a_6269_105a_6269
+static const pciSubsystemInfo pci_ss_info_105a_8650_105a_4600 =
+	{0x105a, 0x4600, pci_subsys_105a_8650_105a_4600, 0};
+#undef pci_ss_info_105a_4600
+#define pci_ss_info_105a_4600 pci_ss_info_105a_8650_105a_4600
+static const pciSubsystemInfo pci_ss_info_105a_8650_105a_4610 =
+	{0x105a, 0x4610, pci_subsys_105a_8650_105a_4610, 0};
+#undef pci_ss_info_105a_4610
+#define pci_ss_info_105a_4610 pci_ss_info_105a_8650_105a_4610
+static const pciSubsystemInfo pci_ss_info_105a_8650_105a_8601 =
+	{0x105a, 0x8601, pci_subsys_105a_8650_105a_8601, 0};
+#undef pci_ss_info_105a_8601
+#define pci_ss_info_105a_8601 pci_ss_info_105a_8650_105a_8601
+static const pciSubsystemInfo pci_ss_info_105a_8650_105a_8602 =
+	{0x105a, 0x8602, pci_subsys_105a_8650_105a_8602, 0};
+#undef pci_ss_info_105a_8602
+#define pci_ss_info_105a_8602 pci_ss_info_105a_8650_105a_8602
 #endif
 static const pciSubsystemInfo pci_ss_info_105d_2339_105d_0000 =
 	{0x105d, 0x0000, pci_subsys_105d_2339_105d_0000, 0};
@@ -28251,6 +32106,14 @@
 	{0x105d, 0x0037, pci_subsys_105d_5348_105d_0037, 0};
 #undef pci_ss_info_105d_0037
 #define pci_ss_info_105d_0037 pci_ss_info_105d_5348_105d_0037
+static const pciSubsystemInfo pci_ss_info_105d_5348_11a4_0028 =
+	{0x11a4, 0x0028, pci_subsys_105d_5348_11a4_0028, 0};
+#undef pci_ss_info_11a4_0028
+#define pci_ss_info_11a4_0028 pci_ss_info_105d_5348_11a4_0028
+static const pciSubsystemInfo pci_ss_info_105d_5348_11a4_0038 =
+	{0x11a4, 0x0038, pci_subsys_105d_5348_11a4_0038, 0};
+#undef pci_ss_info_11a4_0038
+#define pci_ss_info_11a4_0038 pci_ss_info_105d_5348_11a4_0038
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1069_0050_1069_0050 =
 	{0x1069, 0x0050, pci_subsys_1069_0050_1069_0050, 0};
@@ -28383,6 +32246,30 @@
 #undef pci_ss_info_1077_0002
 #define pci_ss_info_1077_0002 pci_ss_info_1077_2200_1077_0002
 #endif
+static const pciSubsystemInfo pci_ss_info_1077_2312_103c_0131 =
+	{0x103c, 0x0131, pci_subsys_1077_2312_103c_0131, 0};
+#undef pci_ss_info_103c_0131
+#define pci_ss_info_103c_0131 pci_ss_info_1077_2312_103c_0131
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1077_2312_103c_12ba =
+	{0x103c, 0x12ba, pci_subsys_1077_2312_103c_12ba, 0};
+#undef pci_ss_info_103c_12ba
+#define pci_ss_info_103c_12ba pci_ss_info_1077_2312_103c_12ba
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1077_2422_103c_12d7 =
+	{0x103c, 0x12d7, pci_subsys_1077_2422_103c_12d7, 0};
+#undef pci_ss_info_103c_12d7
+#define pci_ss_info_103c_12d7 pci_ss_info_1077_2422_103c_12d7
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1077_2422_103c_12dd =
+	{0x103c, 0x12dd, pci_subsys_1077_2422_103c_12dd, 0};
+#undef pci_ss_info_103c_12dd
+#define pci_ss_info_103c_12dd pci_ss_info_1077_2422_103c_12dd
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_108d_0004_108d_0004 =
 	{0x108d, 0x0004, pci_subsys_108d_0004_108d_0004, 0};
@@ -28539,6 +32426,10 @@
 	{0x1461, 0x0761, pci_subsys_109e_036e_1461_0761, 0};
 #undef pci_ss_info_1461_0761
 #define pci_ss_info_1461_0761 pci_ss_info_109e_036e_1461_0761
+static const pciSubsystemInfo pci_ss_info_109e_036e_1461_0771 =
+	{0x1461, 0x0771, pci_subsys_109e_036e_1461_0771, 0};
+#undef pci_ss_info_1461_0771
+#define pci_ss_info_1461_0771 pci_ss_info_109e_036e_1461_0771
 static const pciSubsystemInfo pci_ss_info_109e_036e_14f1_0001 =
 	{0x14f1, 0x0001, pci_subsys_109e_036e_14f1_0001, 0};
 #undef pci_ss_info_14f1_0001
@@ -28767,6 +32658,10 @@
 	{0x1461, 0x0002, pci_subsys_109e_0878_1461_0002, 0};
 #undef pci_ss_info_1461_0002
 #define pci_ss_info_1461_0002 pci_ss_info_109e_0878_1461_0002
+static const pciSubsystemInfo pci_ss_info_109e_0878_1461_0003 =
+	{0x1461, 0x0003, pci_subsys_109e_0878_1461_0003, 0};
+#undef pci_ss_info_1461_0003
+#define pci_ss_info_1461_0003 pci_ss_info_109e_0878_1461_0003
 static const pciSubsystemInfo pci_ss_info_109e_0878_1461_0004 =
 	{0x1461, 0x0004, pci_subsys_109e_0878_1461_0004, 0};
 #undef pci_ss_info_1461_0004
@@ -28775,6 +32670,10 @@
 	{0x1461, 0x0761, pci_subsys_109e_0878_1461_0761, 0};
 #undef pci_ss_info_1461_0761
 #define pci_ss_info_1461_0761 pci_ss_info_109e_0878_1461_0761
+static const pciSubsystemInfo pci_ss_info_109e_0878_1461_0771 =
+	{0x1461, 0x0771, pci_subsys_109e_0878_1461_0771, 0};
+#undef pci_ss_info_1461_0771
+#define pci_ss_info_1461_0771 pci_ss_info_109e_0878_1461_0771
 static const pciSubsystemInfo pci_ss_info_109e_0878_14f1_0001 =
 	{0x14f1, 0x0001, pci_subsys_109e_0878_14f1_0001, 0};
 #undef pci_ss_info_14f1_0001
@@ -28964,6 +32863,10 @@
 	{0x10b5, 0x3068, pci_subsys_10b5_9030_10b5_3068, 0};
 #undef pci_ss_info_10b5_3068
 #define pci_ss_info_10b5_3068 pci_ss_info_10b5_9030_10b5_3068
+static const pciSubsystemInfo pci_ss_info_10b5_9030_12fe_0111 =
+	{0x12fe, 0x0111, pci_subsys_10b5_9030_12fe_0111, 0};
+#undef pci_ss_info_12fe_0111
+#define pci_ss_info_12fe_0111 pci_ss_info_10b5_9030_12fe_0111
 static const pciSubsystemInfo pci_ss_info_10b5_9030_1397_3136 =
 	{0x1397, 0x3136, pci_subsys_10b5_9030_1397_3136, 0};
 #undef pci_ss_info_1397_3136
@@ -29168,6 +33071,14 @@
 	{0x12d9, 0x0002, pci_subsys_10b5_9054_12d9_0002, 0};
 #undef pci_ss_info_12d9_0002
 #define pci_ss_info_12d9_0002 pci_ss_info_10b5_9054_12d9_0002
+static const pciSubsystemInfo pci_ss_info_10b5_9054_14b4_d100 =
+	{0x14b4, 0xd100, pci_subsys_10b5_9054_14b4_d100, 0};
+#undef pci_ss_info_14b4_d100
+#define pci_ss_info_14b4_d100 pci_ss_info_10b5_9054_14b4_d100
+static const pciSubsystemInfo pci_ss_info_10b5_9054_14b4_d114 =
+	{0x14b4, 0xd114, pci_subsys_10b5_9054_14b4_d114, 0};
+#undef pci_ss_info_14b4_d114
+#define pci_ss_info_14b4_d114 pci_ss_info_10b5_9054_14b4_d114
 static const pciSubsystemInfo pci_ss_info_10b5_9054_16df_0011 =
 	{0x16df, 0x0011, pci_subsys_10b5_9054_16df_0011, 0};
 #undef pci_ss_info_16df_0011
@@ -29196,6 +33107,10 @@
 	{0x10b5, 0x2979, pci_subsys_10b5_9056_10b5_2979, 0};
 #undef pci_ss_info_10b5_2979
 #define pci_ss_info_10b5_2979 pci_ss_info_10b5_9056_10b5_2979
+static const pciSubsystemInfo pci_ss_info_10b5_9056_14b4_d140 =
+	{0x14b4, 0xd140, pci_subsys_10b5_9056_14b4_d140, 0};
+#undef pci_ss_info_14b4_d140
+#define pci_ss_info_14b4_d140 pci_ss_info_10b5_9056_14b4_d140
 static const pciSubsystemInfo pci_ss_info_10b5_906d_125c_0640 =
 	{0x125c, 0x0640, pci_subsys_10b5_906d_125c_0640, 0};
 #undef pci_ss_info_125c_0640
@@ -29212,6 +33127,10 @@
 #undef pci_ss_info_103c_10ec
 #define pci_ss_info_103c_10ec pci_ss_info_10b5_9080_103c_10ec
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_10b5_9080_10b5_1123 =
+	{0x10b5, 0x1123, pci_subsys_10b5_9080_10b5_1123, 0};
+#undef pci_ss_info_10b5_1123
+#define pci_ss_info_10b5_1123 pci_ss_info_10b5_9080_10b5_1123
 static const pciSubsystemInfo pci_ss_info_10b5_9080_10b5_9080 =
 	{0x10b5, 0x9080, pci_subsys_10b5_9080_10b5_9080, 0};
 #undef pci_ss_info_10b5_9080
@@ -29228,6 +33147,22 @@
 	{0x12df, 0x4422, pci_subsys_10b5_9080_12df_4422, 0};
 #undef pci_ss_info_12df_4422
 #define pci_ss_info_12df_4422 pci_ss_info_10b5_9080_12df_4422
+static const pciSubsystemInfo pci_ss_info_10b5_9080_1517_000b =
+	{0x1517, 0x000b, pci_subsys_10b5_9080_1517_000b, 0};
+#undef pci_ss_info_1517_000b
+#define pci_ss_info_1517_000b pci_ss_info_10b5_9080_1517_000b
+static const pciSubsystemInfo pci_ss_info_10b5_9656_1517_000f =
+	{0x1517, 0x000f, pci_subsys_10b5_9656_1517_000f, 0};
+#undef pci_ss_info_1517_000f
+#define pci_ss_info_1517_000f pci_ss_info_10b5_9656_1517_000f
+static const pciSubsystemInfo pci_ss_info_10b5_9656_1885_0700 =
+	{0x1885, 0x0700, pci_subsys_10b5_9656_1885_0700, 0};
+#undef pci_ss_info_1885_0700
+#define pci_ss_info_1885_0700 pci_ss_info_10b5_9656_1885_0700
+static const pciSubsystemInfo pci_ss_info_10b5_9656_1885_0701 =
+	{0x1885, 0x0701, pci_subsys_10b5_9656_1885_0701, 0};
+#undef pci_ss_info_1885_0701
+#define pci_ss_info_1885_0701 pci_ss_info_10b5_9656_1885_0701
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_10b6_0002_10b6_0002 =
@@ -29286,6 +33221,10 @@
 	{0x10b7, 0x2031, pci_subsys_10b7_0013_10b7_2031, 0};
 #undef pci_ss_info_10b7_2031
 #define pci_ss_info_10b7_2031 pci_ss_info_10b7_0013_10b7_2031
+static const pciSubsystemInfo pci_ss_info_10b7_1007_10b7_615b =
+	{0x10b7, 0x615b, pci_subsys_10b7_1007_10b7_615b, 0};
+#undef pci_ss_info_10b7_615b
+#define pci_ss_info_10b7_615b pci_ss_info_10b7_1007_10b7_615b
 static const pciSubsystemInfo pci_ss_info_10b7_1007_10b7_615c =
 	{0x10b7, 0x615c, pci_subsys_10b7_1007_10b7_615c, 0};
 #undef pci_ss_info_10b7_615c
@@ -29354,6 +33293,10 @@
 	{0x10b7, 0x9005, pci_subsys_10b7_9005_10b7_9005, 0};
 #undef pci_ss_info_10b7_9005
 #define pci_ss_info_10b7_9005 pci_ss_info_10b7_9005_10b7_9005
+static const pciSubsystemInfo pci_ss_info_10b7_9054_10b7_9054 =
+	{0x10b7, 0x9054, pci_subsys_10b7_9054_10b7_9054, 0};
+#undef pci_ss_info_10b7_9054
+#define pci_ss_info_10b7_9054 pci_ss_info_10b7_9054_10b7_9054
 #endif
 static const pciSubsystemInfo pci_ss_info_10b7_9055_1028_0080 =
 	{0x1028, 0x0080, pci_subsys_10b7_9055_1028_0080, 0};
@@ -29664,6 +33607,10 @@
 	{0x1043, 0x8053, pci_subsys_10b9_5229_1043_8053, 0};
 #undef pci_ss_info_1043_8053
 #define pci_ss_info_1043_8053 pci_ss_info_10b9_5229_1043_8053
+static const pciSubsystemInfo pci_ss_info_10b9_5229_1849_5229 =
+	{0x1849, 0x5229, pci_subsys_10b9_5229_1849_5229, 0};
+#undef pci_ss_info_1849_5229
+#define pci_ss_info_1849_5229 pci_ss_info_10b9_5229_1849_5229
 static const pciSubsystemInfo pci_ss_info_10b9_5237_1014_0540 =
 	{0x1014, 0x0540, pci_subsys_10b9_5237_1014_0540, 0};
 #undef pci_ss_info_1014_0540
@@ -29860,6 +33807,10 @@
 	{0x10cd, 0x1310, pci_subsys_10cd_1300_10cd_1310, 0};
 #undef pci_ss_info_10cd_1310
 #define pci_ss_info_10cd_1310 pci_ss_info_10cd_1300_10cd_1310
+static const pciSubsystemInfo pci_ss_info_10cd_1300_1195_1320 =
+	{0x1195, 0x1320, pci_subsys_10cd_1300_1195_1320, 0};
+#undef pci_ss_info_1195_1320
+#define pci_ss_info_1195_1320 pci_ss_info_10cd_1300_1195_1320
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_10d9_0531_1186_1200 =
@@ -30195,6 +34146,10 @@
 	{0x1462, 0x7100, pci_subsys_10de_0050_1462_7100, 0};
 #undef pci_ss_info_1462_7100
 #define pci_ss_info_1462_7100 pci_ss_info_10de_0050_1462_7100
+static const pciSubsystemInfo pci_ss_info_10de_0050_147b_1c1a =
+	{0x147b, 0x1c1a, pci_subsys_10de_0050_147b_1c1a, 0};
+#undef pci_ss_info_147b_1c1a
+#define pci_ss_info_147b_1c1a pci_ss_info_10de_0050_147b_1c1a
 static const pciSubsystemInfo pci_ss_info_10de_0052_1043_815a =
 	{0x1043, 0x815a, pci_subsys_10de_0052_1043_815a, 0};
 #undef pci_ss_info_1043_815a
@@ -30207,6 +34162,10 @@
 	{0x1462, 0x7100, pci_subsys_10de_0052_1462_7100, 0};
 #undef pci_ss_info_1462_7100
 #define pci_ss_info_1462_7100 pci_ss_info_10de_0052_1462_7100
+static const pciSubsystemInfo pci_ss_info_10de_0052_147b_1c1a =
+	{0x147b, 0x1c1a, pci_subsys_10de_0052_147b_1c1a, 0};
+#undef pci_ss_info_147b_1c1a
+#define pci_ss_info_147b_1c1a pci_ss_info_10de_0052_147b_1c1a
 static const pciSubsystemInfo pci_ss_info_10de_0053_1043_815a =
 	{0x1043, 0x815a, pci_subsys_10de_0053_1043_815a, 0};
 #undef pci_ss_info_1043_815a
@@ -30219,6 +34178,14 @@
 	{0x1462, 0x7100, pci_subsys_10de_0053_1462_7100, 0};
 #undef pci_ss_info_1462_7100
 #define pci_ss_info_1462_7100 pci_ss_info_10de_0053_1462_7100
+static const pciSubsystemInfo pci_ss_info_10de_0053_147b_1c1a =
+	{0x147b, 0x1c1a, pci_subsys_10de_0053_147b_1c1a, 0};
+#undef pci_ss_info_147b_1c1a
+#define pci_ss_info_147b_1c1a pci_ss_info_10de_0053_147b_1c1a
+static const pciSubsystemInfo pci_ss_info_10de_0054_1043_815a =
+	{0x1043, 0x815a, pci_subsys_10de_0054_1043_815a, 0};
+#undef pci_ss_info_1043_815a
+#define pci_ss_info_1043_815a pci_ss_info_10de_0054_1043_815a
 static const pciSubsystemInfo pci_ss_info_10de_0054_1458_b003 =
 	{0x1458, 0xb003, pci_subsys_10de_0054_1458_b003, 0};
 #undef pci_ss_info_1458_b003
@@ -30227,6 +34194,10 @@
 	{0x1462, 0x7100, pci_subsys_10de_0054_1462_7100, 0};
 #undef pci_ss_info_1462_7100
 #define pci_ss_info_1462_7100 pci_ss_info_10de_0054_1462_7100
+static const pciSubsystemInfo pci_ss_info_10de_0054_147b_1c1a =
+	{0x147b, 0x1c1a, pci_subsys_10de_0054_147b_1c1a, 0};
+#undef pci_ss_info_147b_1c1a
+#define pci_ss_info_147b_1c1a pci_ss_info_10de_0054_147b_1c1a
 static const pciSubsystemInfo pci_ss_info_10de_0055_1043_815a =
 	{0x1043, 0x815a, pci_subsys_10de_0055_1043_815a, 0};
 #undef pci_ss_info_1043_815a
@@ -30235,6 +34206,10 @@
 	{0x1458, 0xb003, pci_subsys_10de_0055_1458_b003, 0};
 #undef pci_ss_info_1458_b003
 #define pci_ss_info_1458_b003 pci_ss_info_10de_0055_1458_b003
+static const pciSubsystemInfo pci_ss_info_10de_0055_147b_1c1a =
+	{0x147b, 0x1c1a, pci_subsys_10de_0055_147b_1c1a, 0};
+#undef pci_ss_info_147b_1c1a
+#define pci_ss_info_147b_1c1a pci_ss_info_10de_0055_147b_1c1a
 static const pciSubsystemInfo pci_ss_info_10de_0057_1043_8141 =
 	{0x1043, 0x8141, pci_subsys_10de_0057_1043_8141, 0};
 #undef pci_ss_info_1043_8141
@@ -30247,10 +34222,18 @@
 	{0x1462, 0x7100, pci_subsys_10de_0057_1462_7100, 0};
 #undef pci_ss_info_1462_7100
 #define pci_ss_info_1462_7100 pci_ss_info_10de_0057_1462_7100
+static const pciSubsystemInfo pci_ss_info_10de_0057_147b_1c1a =
+	{0x147b, 0x1c1a, pci_subsys_10de_0057_147b_1c1a, 0};
+#undef pci_ss_info_147b_1c1a
+#define pci_ss_info_147b_1c1a pci_ss_info_10de_0057_147b_1c1a
 static const pciSubsystemInfo pci_ss_info_10de_0059_1043_812a =
 	{0x1043, 0x812a, pci_subsys_10de_0059_1043_812a, 0};
 #undef pci_ss_info_1043_812a
 #define pci_ss_info_1043_812a pci_ss_info_10de_0059_1043_812a
+static const pciSubsystemInfo pci_ss_info_10de_0059_147b_1c1a =
+	{0x147b, 0x1c1a, pci_subsys_10de_0059_147b_1c1a, 0};
+#undef pci_ss_info_147b_1c1a
+#define pci_ss_info_147b_1c1a pci_ss_info_10de_0059_147b_1c1a
 static const pciSubsystemInfo pci_ss_info_10de_005a_1043_815a =
 	{0x1043, 0x815a, pci_subsys_10de_005a_1043_815a, 0};
 #undef pci_ss_info_1043_815a
@@ -30263,6 +34246,10 @@
 	{0x1462, 0x7100, pci_subsys_10de_005a_1462_7100, 0};
 #undef pci_ss_info_1462_7100
 #define pci_ss_info_1462_7100 pci_ss_info_10de_005a_1462_7100
+static const pciSubsystemInfo pci_ss_info_10de_005a_147b_1c1a =
+	{0x147b, 0x1c1a, pci_subsys_10de_005a_147b_1c1a, 0};
+#undef pci_ss_info_147b_1c1a
+#define pci_ss_info_147b_1c1a pci_ss_info_10de_005a_147b_1c1a
 static const pciSubsystemInfo pci_ss_info_10de_005b_1043_815a =
 	{0x1043, 0x815a, pci_subsys_10de_005b_1043_815a, 0};
 #undef pci_ss_info_1043_815a
@@ -30275,6 +34262,18 @@
 	{0x1462, 0x7100, pci_subsys_10de_005b_1462_7100, 0};
 #undef pci_ss_info_1462_7100
 #define pci_ss_info_1462_7100 pci_ss_info_10de_005b_1462_7100
+static const pciSubsystemInfo pci_ss_info_10de_005b_147b_1c1a =
+	{0x147b, 0x1c1a, pci_subsys_10de_005b_147b_1c1a, 0};
+#undef pci_ss_info_147b_1c1a
+#define pci_ss_info_147b_1c1a pci_ss_info_10de_005b_147b_1c1a
+static const pciSubsystemInfo pci_ss_info_10de_005e_1043_815a =
+	{0x1043, 0x815a, pci_subsys_10de_005e_1043_815a, 0};
+#undef pci_ss_info_1043_815a
+#define pci_ss_info_1043_815a pci_ss_info_10de_005e_1043_815a
+static const pciSubsystemInfo pci_ss_info_10de_005e_10f1_2891 =
+	{0x10f1, 0x2891, pci_subsys_10de_005e_10f1_2891, 0};
+#undef pci_ss_info_10f1_2891
+#define pci_ss_info_10f1_2891 pci_ss_info_10de_005e_10f1_2891
 static const pciSubsystemInfo pci_ss_info_10de_005e_1458_5000 =
 	{0x1458, 0x5000, pci_subsys_10de_005e_1458_5000, 0};
 #undef pci_ss_info_1458_5000
@@ -30283,10 +34282,26 @@
 	{0x1462, 0x7100, pci_subsys_10de_005e_1462_7100, 0};
 #undef pci_ss_info_1462_7100
 #define pci_ss_info_1462_7100 pci_ss_info_10de_005e_1462_7100
+static const pciSubsystemInfo pci_ss_info_10de_005e_147b_1c1a =
+	{0x147b, 0x1c1a, pci_subsys_10de_005e_147b_1c1a, 0};
+#undef pci_ss_info_147b_1c1a
+#define pci_ss_info_147b_1c1a pci_ss_info_10de_005e_147b_1c1a
 static const pciSubsystemInfo pci_ss_info_10de_0060_1043_80ad =
 	{0x1043, 0x80ad, pci_subsys_10de_0060_1043_80ad, 0};
 #undef pci_ss_info_1043_80ad
 #define pci_ss_info_1043_80ad pci_ss_info_10de_0060_1043_80ad
+static const pciSubsystemInfo pci_ss_info_10de_0060_a0a0_03ba =
+	{0xa0a0, 0x03ba, pci_subsys_10de_0060_a0a0_03ba, 0};
+#undef pci_ss_info_a0a0_03ba
+#define pci_ss_info_a0a0_03ba pci_ss_info_10de_0060_a0a0_03ba
+static const pciSubsystemInfo pci_ss_info_10de_0064_a0a0_03bb =
+	{0xa0a0, 0x03bb, pci_subsys_10de_0064_a0a0_03bb, 0};
+#undef pci_ss_info_a0a0_03bb
+#define pci_ss_info_a0a0_03bb pci_ss_info_10de_0064_a0a0_03bb
+static const pciSubsystemInfo pci_ss_info_10de_0065_a0a0_03b2 =
+	{0xa0a0, 0x03b2, pci_subsys_10de_0065_a0a0_03b2, 0};
+#undef pci_ss_info_a0a0_03b2
+#define pci_ss_info_a0a0_03b2 pci_ss_info_10de_0065_a0a0_03b2
 static const pciSubsystemInfo pci_ss_info_10de_0066_1043_80a7 =
 	{0x1043, 0x80a7, pci_subsys_10de_0066_1043_80a7, 0};
 #undef pci_ss_info_1043_80a7
@@ -30299,10 +34314,26 @@
 	{0x1043, 0x0c11, pci_subsys_10de_0068_1043_0c11, 0};
 #undef pci_ss_info_1043_0c11
 #define pci_ss_info_1043_0c11 pci_ss_info_10de_0068_1043_0c11
+static const pciSubsystemInfo pci_ss_info_10de_0068_a0a0_03b4 =
+	{0xa0a0, 0x03b4, pci_subsys_10de_0068_a0a0_03b4, 0};
+#undef pci_ss_info_a0a0_03b4
+#define pci_ss_info_a0a0_03b4 pci_ss_info_10de_0068_a0a0_03b4
+static const pciSubsystemInfo pci_ss_info_10de_006a_1043_8095 =
+	{0x1043, 0x8095, pci_subsys_10de_006a_1043_8095, 0};
+#undef pci_ss_info_1043_8095
+#define pci_ss_info_1043_8095 pci_ss_info_10de_006a_1043_8095
+static const pciSubsystemInfo pci_ss_info_10de_006a_a0a0_0304 =
+	{0xa0a0, 0x0304, pci_subsys_10de_006a_a0a0_0304, 0};
+#undef pci_ss_info_a0a0_0304
+#define pci_ss_info_a0a0_0304 pci_ss_info_10de_006a_a0a0_0304
 static const pciSubsystemInfo pci_ss_info_10de_006b_10de_006b =
 	{0x10de, 0x006b, pci_subsys_10de_006b_10de_006b, 0};
 #undef pci_ss_info_10de_006b
 #define pci_ss_info_10de_006b pci_ss_info_10de_006b_10de_006b
+static const pciSubsystemInfo pci_ss_info_10de_006e_a0a0_0306 =
+	{0xa0a0, 0x0306, pci_subsys_10de_006e_a0a0_0306, 0};
+#undef pci_ss_info_a0a0_0306
+#define pci_ss_info_a0a0_0306 pci_ss_info_10de_006e_a0a0_0306
 static const pciSubsystemInfo pci_ss_info_10de_0080_147b_1c09 =
 	{0x147b, 0x1c09, pci_subsys_10de_0080_147b_1c09, 0};
 #undef pci_ss_info_147b_1c09
@@ -30331,38 +34362,102 @@
 	{0x14af, 0x5810, pci_subsys_10de_00a0_14af_5810, 0};
 #undef pci_ss_info_14af_5810
 #define pci_ss_info_14af_5810 pci_ss_info_10de_00a0_14af_5810
+static const pciSubsystemInfo pci_ss_info_10de_00cd_10de_029b =
+	{0x10de, 0x029b, pci_subsys_10de_00cd_10de_029b, 0};
+#undef pci_ss_info_10de_029b
+#define pci_ss_info_10de_029b pci_ss_info_10de_00cd_10de_029b
+static const pciSubsystemInfo pci_ss_info_10de_00df_105b_0c43 =
+	{0x105b, 0x0c43, pci_subsys_10de_00df_105b_0c43, 0};
+#undef pci_ss_info_105b_0c43
+#define pci_ss_info_105b_0c43 pci_ss_info_10de_00df_105b_0c43
 static const pciSubsystemInfo pci_ss_info_10de_00df_147b_1c0b =
 	{0x147b, 0x1c0b, pci_subsys_10de_00df_147b_1c0b, 0};
 #undef pci_ss_info_147b_1c0b
 #define pci_ss_info_147b_1c0b pci_ss_info_10de_00df_147b_1c0b
+static const pciSubsystemInfo pci_ss_info_10de_00e0_10de_0c11 =
+	{0x10de, 0x0c11, pci_subsys_10de_00e0_10de_0c11, 0};
+#undef pci_ss_info_10de_0c11
+#define pci_ss_info_10de_0c11 pci_ss_info_10de_00e0_10de_0c11
+static const pciSubsystemInfo pci_ss_info_10de_00e0_1462_7030 =
+	{0x1462, 0x7030, pci_subsys_10de_00e0_1462_7030, 0};
+#undef pci_ss_info_1462_7030
+#define pci_ss_info_1462_7030 pci_ss_info_10de_00e0_1462_7030
 static const pciSubsystemInfo pci_ss_info_10de_00e0_147b_1c0b =
 	{0x147b, 0x1c0b, pci_subsys_10de_00e0_147b_1c0b, 0};
 #undef pci_ss_info_147b_1c0b
 #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e0_147b_1c0b
+static const pciSubsystemInfo pci_ss_info_10de_00e1_1462_7030 =
+	{0x1462, 0x7030, pci_subsys_10de_00e1_1462_7030, 0};
+#undef pci_ss_info_1462_7030
+#define pci_ss_info_1462_7030 pci_ss_info_10de_00e1_1462_7030
 static const pciSubsystemInfo pci_ss_info_10de_00e1_147b_1c0b =
 	{0x147b, 0x1c0b, pci_subsys_10de_00e1_147b_1c0b, 0};
 #undef pci_ss_info_147b_1c0b
 #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e1_147b_1c0b
+static const pciSubsystemInfo pci_ss_info_10de_00e3_105b_0c43 =
+	{0x105b, 0x0c43, pci_subsys_10de_00e3_105b_0c43, 0};
+#undef pci_ss_info_105b_0c43
+#define pci_ss_info_105b_0c43 pci_ss_info_10de_00e3_105b_0c43
 static const pciSubsystemInfo pci_ss_info_10de_00e3_147b_1c0b =
 	{0x147b, 0x1c0b, pci_subsys_10de_00e3_147b_1c0b, 0};
 #undef pci_ss_info_147b_1c0b
 #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e3_147b_1c0b
+static const pciSubsystemInfo pci_ss_info_10de_00e4_105b_0c43 =
+	{0x105b, 0x0c43, pci_subsys_10de_00e4_105b_0c43, 0};
+#undef pci_ss_info_105b_0c43
+#define pci_ss_info_105b_0c43 pci_ss_info_10de_00e4_105b_0c43
+static const pciSubsystemInfo pci_ss_info_10de_00e4_1462_7030 =
+	{0x1462, 0x7030, pci_subsys_10de_00e4_1462_7030, 0};
+#undef pci_ss_info_1462_7030
+#define pci_ss_info_1462_7030 pci_ss_info_10de_00e4_1462_7030
 static const pciSubsystemInfo pci_ss_info_10de_00e4_147b_1c0b =
 	{0x147b, 0x1c0b, pci_subsys_10de_00e4_147b_1c0b, 0};
 #undef pci_ss_info_147b_1c0b
 #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e4_147b_1c0b
+static const pciSubsystemInfo pci_ss_info_10de_00e5_105b_0c43 =
+	{0x105b, 0x0c43, pci_subsys_10de_00e5_105b_0c43, 0};
+#undef pci_ss_info_105b_0c43
+#define pci_ss_info_105b_0c43 pci_ss_info_10de_00e5_105b_0c43
+static const pciSubsystemInfo pci_ss_info_10de_00e5_1462_7030 =
+	{0x1462, 0x7030, pci_subsys_10de_00e5_1462_7030, 0};
+#undef pci_ss_info_1462_7030
+#define pci_ss_info_1462_7030 pci_ss_info_10de_00e5_1462_7030
 static const pciSubsystemInfo pci_ss_info_10de_00e5_147b_1c0b =
 	{0x147b, 0x1c0b, pci_subsys_10de_00e5_147b_1c0b, 0};
 #undef pci_ss_info_147b_1c0b
 #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e5_147b_1c0b
+static const pciSubsystemInfo pci_ss_info_10de_00e7_105b_0c43 =
+	{0x105b, 0x0c43, pci_subsys_10de_00e7_105b_0c43, 0};
+#undef pci_ss_info_105b_0c43
+#define pci_ss_info_105b_0c43 pci_ss_info_10de_00e7_105b_0c43
+static const pciSubsystemInfo pci_ss_info_10de_00e7_1462_7030 =
+	{0x1462, 0x7030, pci_subsys_10de_00e7_1462_7030, 0};
+#undef pci_ss_info_1462_7030
+#define pci_ss_info_1462_7030 pci_ss_info_10de_00e7_1462_7030
 static const pciSubsystemInfo pci_ss_info_10de_00e7_147b_1c0b =
 	{0x147b, 0x1c0b, pci_subsys_10de_00e7_147b_1c0b, 0};
 #undef pci_ss_info_147b_1c0b
 #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e7_147b_1c0b
+static const pciSubsystemInfo pci_ss_info_10de_00e8_105b_0c43 =
+	{0x105b, 0x0c43, pci_subsys_10de_00e8_105b_0c43, 0};
+#undef pci_ss_info_105b_0c43
+#define pci_ss_info_105b_0c43 pci_ss_info_10de_00e8_105b_0c43
+static const pciSubsystemInfo pci_ss_info_10de_00e8_1462_7030 =
+	{0x1462, 0x7030, pci_subsys_10de_00e8_1462_7030, 0};
+#undef pci_ss_info_1462_7030
+#define pci_ss_info_1462_7030 pci_ss_info_10de_00e8_1462_7030
 static const pciSubsystemInfo pci_ss_info_10de_00e8_147b_1c0b =
 	{0x147b, 0x1c0b, pci_subsys_10de_00e8_147b_1c0b, 0};
 #undef pci_ss_info_147b_1c0b
 #define pci_ss_info_147b_1c0b pci_ss_info_10de_00e8_147b_1c0b
+static const pciSubsystemInfo pci_ss_info_10de_00ea_105b_0c43 =
+	{0x105b, 0x0c43, pci_subsys_10de_00ea_105b_0c43, 0};
+#undef pci_ss_info_105b_0c43
+#define pci_ss_info_105b_0c43 pci_ss_info_10de_00ea_105b_0c43
+static const pciSubsystemInfo pci_ss_info_10de_00ea_1462_b010 =
+	{0x1462, 0xb010, pci_subsys_10de_00ea_1462_b010, 0};
+#undef pci_ss_info_1462_b010
+#define pci_ss_info_1462_b010 pci_ss_info_10de_00ea_1462_b010
 static const pciSubsystemInfo pci_ss_info_10de_00ea_147b_1c0b =
 	{0x147b, 0x1c0b, pci_subsys_10de_00ea_147b_1c0b, 0};
 #undef pci_ss_info_147b_1c0b
@@ -30371,10 +34466,22 @@
 	{0x1043, 0x81a6, pci_subsys_10de_00f1_1043_81a6, 0};
 #undef pci_ss_info_1043_81a6
 #define pci_ss_info_1043_81a6 pci_ss_info_10de_00f1_1043_81a6
+static const pciSubsystemInfo pci_ss_info_10de_00f1_1458_3150 =
+	{0x1458, 0x3150, pci_subsys_10de_00f1_1458_3150, 0};
+#undef pci_ss_info_1458_3150
+#define pci_ss_info_1458_3150 pci_ss_info_10de_00f1_1458_3150
+static const pciSubsystemInfo pci_ss_info_10de_00f1_1682_2119 =
+	{0x1682, 0x2119, pci_subsys_10de_00f1_1682_2119, 0};
+#undef pci_ss_info_1682_2119
+#define pci_ss_info_1682_2119 pci_ss_info_10de_00f1_1682_2119
 static const pciSubsystemInfo pci_ss_info_10de_00f2_1682_211c =
 	{0x1682, 0x211c, pci_subsys_10de_00f2_1682_211c, 0};
 #undef pci_ss_info_1682_211c
 #define pci_ss_info_1682_211c pci_ss_info_10de_00f2_1682_211c
+static const pciSubsystemInfo pci_ss_info_10de_00f6_1682_217e =
+	{0x1682, 0x217e, pci_subsys_10de_00f6_1682_217e, 0};
+#undef pci_ss_info_1682_217e
+#define pci_ss_info_1682_217e pci_ss_info_10de_00f6_1682_217e
 static const pciSubsystemInfo pci_ss_info_10de_00f9_1682_2120 =
 	{0x1682, 0x2120, pci_subsys_10de_00f9_1682_2120, 0};
 #undef pci_ss_info_1682_2120
@@ -30467,6 +34574,10 @@
 	{0x1043, 0x4015, pci_subsys_10de_0110_1043_4015, 0};
 #undef pci_ss_info_1043_4015
 #define pci_ss_info_1043_4015 pci_ss_info_10de_0110_1043_4015
+static const pciSubsystemInfo pci_ss_info_10de_0110_1043_4021 =
+	{0x1043, 0x4021, pci_subsys_10de_0110_1043_4021, 0};
+#undef pci_ss_info_1043_4021
+#define pci_ss_info_1043_4021 pci_ss_info_10de_0110_1043_4021
 static const pciSubsystemInfo pci_ss_info_10de_0110_1043_4031 =
 	{0x1043, 0x4031, pci_subsys_10de_0110_1043_4031, 0};
 #undef pci_ss_info_1043_4031
@@ -30515,6 +34626,10 @@
 	{0x14af, 0x7103, pci_subsys_10de_0110_14af_7103, 0};
 #undef pci_ss_info_14af_7103
 #define pci_ss_info_14af_7103 pci_ss_info_10de_0110_14af_7103
+static const pciSubsystemInfo pci_ss_info_10de_0141_1043_81b0 =
+	{0x1043, 0x81b0, pci_subsys_10de_0141_1043_81b0, 0};
+#undef pci_ss_info_1043_81b0
+#define pci_ss_info_1043_81b0 pci_ss_info_10de_0141_1043_81b0
 static const pciSubsystemInfo pci_ss_info_10de_0141_1458_3124 =
 	{0x1458, 0x3124, pci_subsys_10de_0141_1458_3124, 0};
 #undef pci_ss_info_1458_3124
@@ -30539,6 +34654,10 @@
 	{0x107d, 0x2842, pci_subsys_10de_0150_107d_2842, 0};
 #undef pci_ss_info_107d_2842
 #define pci_ss_info_107d_2842 pci_ss_info_10de_0150_107d_2842
+static const pciSubsystemInfo pci_ss_info_10de_0150_10de_002e =
+	{0x10de, 0x002e, pci_subsys_10de_0150_10de_002e, 0};
+#undef pci_ss_info_10de_002e
+#define pci_ss_info_10de_002e pci_ss_info_10de_0150_10de_002e
 static const pciSubsystemInfo pci_ss_info_10de_0150_1462_8831 =
 	{0x1462, 0x8831, pci_subsys_10de_0150_1462_8831, 0};
 #undef pci_ss_info_1462_8831
@@ -30579,6 +34698,10 @@
 	{0x147b, 0x8f00, pci_subsys_10de_0171_147b_8f00, 0};
 #undef pci_ss_info_147b_8f00
 #define pci_ss_info_147b_8f00 pci_ss_info_10de_0171_147b_8f00
+static const pciSubsystemInfo pci_ss_info_10de_0176_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_10de_0176_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_10de_0176_103c_08b0
 static const pciSubsystemInfo pci_ss_info_10de_0176_4c53_1090 =
 	{0x4c53, 0x1090, pci_subsys_10de_0176_4c53_1090, 0};
 #undef pci_ss_info_4c53_1090
@@ -30587,6 +34710,10 @@
 	{0x10de, 0x0179, pci_subsys_10de_0179_10de_0179, 0};
 #undef pci_ss_info_10de_0179
 #define pci_ss_info_10de_0179 pci_ss_info_10de_0179_10de_0179
+static const pciSubsystemInfo pci_ss_info_10de_0181_1043_8063 =
+	{0x1043, 0x8063, pci_subsys_10de_0181_1043_8063, 0};
+#undef pci_ss_info_1043_8063
+#define pci_ss_info_1043_8063 pci_ss_info_10de_0181_1043_8063
 static const pciSubsystemInfo pci_ss_info_10de_0181_1043_806f =
 	{0x1043, 0x806f, pci_subsys_10de_0181_1043_806f, 0};
 #undef pci_ss_info_1043_806f
@@ -30607,10 +34734,46 @@
 	{0x147b, 0x8f0d, pci_subsys_10de_0181_147b_8f0d, 0};
 #undef pci_ss_info_147b_8f0d
 #define pci_ss_info_147b_8f0d pci_ss_info_10de_0181_147b_8f0d
+static const pciSubsystemInfo pci_ss_info_10de_01d1_1462_0345 =
+	{0x1462, 0x0345, pci_subsys_10de_01d1_1462_0345, 0};
+#undef pci_ss_info_1462_0345
+#define pci_ss_info_1462_0345 pci_ss_info_10de_01d1_1462_0345
+static const pciSubsystemInfo pci_ss_info_10de_01de_10de_01dc =
+	{0x10de, 0x01dc, pci_subsys_10de_01de_10de_01dc, 0};
+#undef pci_ss_info_10de_01dc
+#define pci_ss_info_10de_01dc pci_ss_info_10de_01de_10de_01dc
 static const pciSubsystemInfo pci_ss_info_10de_01e0_147b_1c09 =
 	{0x147b, 0x1c09, pci_subsys_10de_01e0_147b_1c09, 0};
 #undef pci_ss_info_147b_1c09
 #define pci_ss_info_147b_1c09 pci_ss_info_10de_01e0_147b_1c09
+static const pciSubsystemInfo pci_ss_info_10de_01ea_a0a0_03b9 =
+	{0xa0a0, 0x03b9, pci_subsys_10de_01ea_a0a0_03b9, 0};
+#undef pci_ss_info_a0a0_03b9
+#define pci_ss_info_a0a0_03b9 pci_ss_info_10de_01ea_a0a0_03b9
+static const pciSubsystemInfo pci_ss_info_10de_01eb_a0a0_03b9 =
+	{0xa0a0, 0x03b9, pci_subsys_10de_01eb_a0a0_03b9, 0};
+#undef pci_ss_info_a0a0_03b9
+#define pci_ss_info_a0a0_03b9 pci_ss_info_10de_01eb_a0a0_03b9
+static const pciSubsystemInfo pci_ss_info_10de_01ec_a0a0_03b9 =
+	{0xa0a0, 0x03b9, pci_subsys_10de_01ec_a0a0_03b9, 0};
+#undef pci_ss_info_a0a0_03b9
+#define pci_ss_info_a0a0_03b9 pci_ss_info_10de_01ec_a0a0_03b9
+static const pciSubsystemInfo pci_ss_info_10de_01ed_a0a0_03b9 =
+	{0xa0a0, 0x03b9, pci_subsys_10de_01ed_a0a0_03b9, 0};
+#undef pci_ss_info_a0a0_03b9
+#define pci_ss_info_a0a0_03b9 pci_ss_info_10de_01ed_a0a0_03b9
+static const pciSubsystemInfo pci_ss_info_10de_01ee_a0a0_03b9 =
+	{0xa0a0, 0x03b9, pci_subsys_10de_01ee_a0a0_03b9, 0};
+#undef pci_ss_info_a0a0_03b9
+#define pci_ss_info_a0a0_03b9 pci_ss_info_10de_01ee_a0a0_03b9
+static const pciSubsystemInfo pci_ss_info_10de_01ef_a0a0_03b9 =
+	{0xa0a0, 0x03b9, pci_subsys_10de_01ef_a0a0_03b9, 0};
+#undef pci_ss_info_a0a0_03b9
+#define pci_ss_info_a0a0_03b9 pci_ss_info_10de_01ef_a0a0_03b9
+static const pciSubsystemInfo pci_ss_info_10de_01f0_a0a0_03b5 =
+	{0xa0a0, 0x03b5, pci_subsys_10de_01f0_a0a0_03b5, 0};
+#undef pci_ss_info_a0a0_03b5
+#define pci_ss_info_a0a0_03b5 pci_ss_info_10de_01f0_a0a0_03b5
 static const pciSubsystemInfo pci_ss_info_10de_0200_1043_402f =
 	{0x1043, 0x402f, pci_subsys_10de_0200_1043_402f, 0};
 #undef pci_ss_info_1043_402f
@@ -30627,6 +34790,22 @@
 	{0x1545, 0x002f, pci_subsys_10de_0202_1545_002f, 0};
 #undef pci_ss_info_1545_002f
 #define pci_ss_info_1545_002f pci_ss_info_10de_0202_1545_002f
+static const pciSubsystemInfo pci_ss_info_10de_0240_1043_81cd =
+	{0x1043, 0x81cd, pci_subsys_10de_0240_1043_81cd, 0};
+#undef pci_ss_info_1043_81cd
+#define pci_ss_info_1043_81cd pci_ss_info_10de_0240_1043_81cd
+static const pciSubsystemInfo pci_ss_info_10de_0240_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_0240_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_0240_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_0244_10de_0244 =
+	{0x10de, 0x0244, pci_subsys_10de_0244_10de_0244, 0};
+#undef pci_ss_info_10de_0244
+#define pci_ss_info_10de_0244 pci_ss_info_10de_0244_10de_0244
+static const pciSubsystemInfo pci_ss_info_10de_0247_1043_1382 =
+	{0x1043, 0x1382, pci_subsys_10de_0247_1043_1382, 0};
+#undef pci_ss_info_1043_1382
+#define pci_ss_info_1043_1382 pci_ss_info_10de_0247_1043_1382
 static const pciSubsystemInfo pci_ss_info_10de_0251_1043_8023 =
 	{0x1043, 0x8023, pci_subsys_10de_0251_1043_8023, 0};
 #undef pci_ss_info_1043_8023
@@ -30639,10 +34818,166 @@
 	{0x147b, 0x8f09, pci_subsys_10de_0253_147b_8f09, 0};
 #undef pci_ss_info_147b_8f09
 #define pci_ss_info_147b_8f09 pci_ss_info_10de_0253_147b_8f09
+static const pciSubsystemInfo pci_ss_info_10de_0260_1043_81bc =
+	{0x1043, 0x81bc, pci_subsys_10de_0260_1043_81bc, 0};
+#undef pci_ss_info_1043_81bc
+#define pci_ss_info_1043_81bc pci_ss_info_10de_0260_1043_81bc
+static const pciSubsystemInfo pci_ss_info_10de_0260_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_0260_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_0260_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_0264_1043_81bc =
+	{0x1043, 0x81bc, pci_subsys_10de_0264_1043_81bc, 0};
+#undef pci_ss_info_1043_81bc
+#define pci_ss_info_1043_81bc pci_ss_info_10de_0264_1043_81bc
+static const pciSubsystemInfo pci_ss_info_10de_0264_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_0264_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_0264_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_0265_1043_81bc =
+	{0x1043, 0x81bc, pci_subsys_10de_0265_1043_81bc, 0};
+#undef pci_ss_info_1043_81bc
+#define pci_ss_info_1043_81bc pci_ss_info_10de_0265_1043_81bc
+static const pciSubsystemInfo pci_ss_info_10de_0265_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_0265_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_0265_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_0266_1043_81bc =
+	{0x1043, 0x81bc, pci_subsys_10de_0266_1043_81bc, 0};
+#undef pci_ss_info_1043_81bc
+#define pci_ss_info_1043_81bc pci_ss_info_10de_0266_1043_81bc
+static const pciSubsystemInfo pci_ss_info_10de_0266_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_0266_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_0266_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_0267_1043_81bc =
+	{0x1043, 0x81bc, pci_subsys_10de_0267_1043_81bc, 0};
+#undef pci_ss_info_1043_81bc
+#define pci_ss_info_1043_81bc pci_ss_info_10de_0267_1043_81bc
+static const pciSubsystemInfo pci_ss_info_10de_0267_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_0267_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_0267_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_0269_1043_8141 =
+	{0x1043, 0x8141, pci_subsys_10de_0269_1043_8141, 0};
+#undef pci_ss_info_1043_8141
+#define pci_ss_info_1043_8141 pci_ss_info_10de_0269_1043_8141
+static const pciSubsystemInfo pci_ss_info_10de_0269_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_0269_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_0269_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_026c_10de_cb84 =
+	{0x10de, 0xcb84, pci_subsys_10de_026c_10de_cb84, 0};
+#undef pci_ss_info_10de_cb84
+#define pci_ss_info_10de_cb84 pci_ss_info_10de_026c_10de_cb84
+static const pciSubsystemInfo pci_ss_info_10de_026c_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_026c_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_026c_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_026d_1043_81bc =
+	{0x1043, 0x81bc, pci_subsys_10de_026d_1043_81bc, 0};
+#undef pci_ss_info_1043_81bc
+#define pci_ss_info_1043_81bc pci_ss_info_10de_026d_1043_81bc
+static const pciSubsystemInfo pci_ss_info_10de_026d_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_026d_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_026d_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_026e_1043_81bc =
+	{0x1043, 0x81bc, pci_subsys_10de_026e_1043_81bc, 0};
+#undef pci_ss_info_1043_81bc
+#define pci_ss_info_1043_81bc pci_ss_info_10de_026e_1043_81bc
+static const pciSubsystemInfo pci_ss_info_10de_026e_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_026e_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_026e_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_0270_1043_81bc =
+	{0x1043, 0x81bc, pci_subsys_10de_0270_1043_81bc, 0};
+#undef pci_ss_info_1043_81bc
+#define pci_ss_info_1043_81bc pci_ss_info_10de_0270_1043_81bc
+static const pciSubsystemInfo pci_ss_info_10de_0270_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_0270_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_0270_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_027e_1043_81cd =
+	{0x1043, 0x81cd, pci_subsys_10de_027e_1043_81cd, 0};
+#undef pci_ss_info_1043_81cd
+#define pci_ss_info_1043_81cd pci_ss_info_10de_027e_1043_81cd
+static const pciSubsystemInfo pci_ss_info_10de_027e_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_027e_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_027e_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_027f_1043_81cd =
+	{0x1043, 0x81cd, pci_subsys_10de_027f_1043_81cd, 0};
+#undef pci_ss_info_1043_81cd
+#define pci_ss_info_1043_81cd pci_ss_info_10de_027f_1043_81cd
+static const pciSubsystemInfo pci_ss_info_10de_027f_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_027f_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_027f_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_0291_10de_042b =
+	{0x10de, 0x042b, pci_subsys_10de_0291_10de_042b, 0};
+#undef pci_ss_info_10de_042b
+#define pci_ss_info_10de_042b pci_ss_info_10de_0291_10de_042b
+static const pciSubsystemInfo pci_ss_info_10de_0295_107d_2a68 =
+	{0x107d, 0x2a68, pci_subsys_10de_0295_107d_2a68, 0};
+#undef pci_ss_info_107d_2a68
+#define pci_ss_info_107d_2a68 pci_ss_info_10de_0295_107d_2a68
+static const pciSubsystemInfo pci_ss_info_10de_02f0_1043_81cd =
+	{0x1043, 0x81cd, pci_subsys_10de_02f0_1043_81cd, 0};
+#undef pci_ss_info_1043_81cd
+#define pci_ss_info_1043_81cd pci_ss_info_10de_02f0_1043_81cd
+static const pciSubsystemInfo pci_ss_info_10de_02f0_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_02f0_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_02f0_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_02f8_1043_81cd =
+	{0x1043, 0x81cd, pci_subsys_10de_02f8_1043_81cd, 0};
+#undef pci_ss_info_1043_81cd
+#define pci_ss_info_1043_81cd pci_ss_info_10de_02f8_1043_81cd
+static const pciSubsystemInfo pci_ss_info_10de_02f8_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_02f8_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_02f8_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_02f9_1043_81cd =
+	{0x1043, 0x81cd, pci_subsys_10de_02f9_1043_81cd, 0};
+#undef pci_ss_info_1043_81cd
+#define pci_ss_info_1043_81cd pci_ss_info_10de_02f9_1043_81cd
+static const pciSubsystemInfo pci_ss_info_10de_02f9_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_02f9_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_02f9_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_02fa_1043_81cd =
+	{0x1043, 0x81cd, pci_subsys_10de_02fa_1043_81cd, 0};
+#undef pci_ss_info_1043_81cd
+#define pci_ss_info_1043_81cd pci_ss_info_10de_02fa_1043_81cd
+static const pciSubsystemInfo pci_ss_info_10de_02fa_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_02fa_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_02fa_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_02fe_1043_81cd =
+	{0x1043, 0x81cd, pci_subsys_10de_02fe_1043_81cd, 0};
+#undef pci_ss_info_1043_81cd
+#define pci_ss_info_1043_81cd pci_ss_info_10de_02fe_1043_81cd
+static const pciSubsystemInfo pci_ss_info_10de_02fe_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_02fe_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_02fe_1462_7207
+static const pciSubsystemInfo pci_ss_info_10de_02ff_1043_81cd =
+	{0x1043, 0x81cd, pci_subsys_10de_02ff_1043_81cd, 0};
+#undef pci_ss_info_1043_81cd
+#define pci_ss_info_1043_81cd pci_ss_info_10de_02ff_1043_81cd
+static const pciSubsystemInfo pci_ss_info_10de_02ff_1462_7207 =
+	{0x1462, 0x7207, pci_subsys_10de_02ff_1462_7207, 0};
+#undef pci_ss_info_1462_7207
+#define pci_ss_info_1462_7207 pci_ss_info_10de_02ff_1462_7207
 static const pciSubsystemInfo pci_ss_info_10de_0314_1043_814a =
 	{0x1043, 0x814a, pci_subsys_10de_0314_1043_814a, 0};
 #undef pci_ss_info_1043_814a
 #define pci_ss_info_1043_814a pci_ss_info_10de_0314_1043_814a
+static const pciSubsystemInfo pci_ss_info_10de_0322_1043_02fb =
+	{0x1043, 0x02fb, pci_subsys_10de_0322_1043_02fb, 0};
+#undef pci_ss_info_1043_02fb
+#define pci_ss_info_1043_02fb pci_ss_info_10de_0322_1043_02fb
 static const pciSubsystemInfo pci_ss_info_10de_0322_1462_9171 =
 	{0x1462, 0x9171, pci_subsys_10de_0322_1462_9171, 0};
 #undef pci_ss_info_1462_9171
@@ -30667,6 +35002,14 @@
 	{0x103c, 0x006a, pci_subsys_10de_0347_103c_006a, 0};
 #undef pci_ss_info_103c_006a
 #define pci_ss_info_103c_006a pci_ss_info_10de_0347_103c_006a
+static const pciSubsystemInfo pci_ss_info_10de_0391_1458_3427 =
+	{0x1458, 0x3427, pci_subsys_10de_0391_1458_3427, 0};
+#undef pci_ss_info_1458_3427
+#define pci_ss_info_1458_3427 pci_ss_info_10de_0391_1458_3427
+static const pciSubsystemInfo pci_ss_info_10de_0392_1462_0622 =
+	{0x1462, 0x0622, pci_subsys_10de_0392_1462_0622, 0};
+#undef pci_ss_info_1462_0622
+#define pci_ss_info_1462_0622 pci_ss_info_10de_0392_1462_0622
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_10e1_0391_10e1_0391 =
 	{0x10e1, 0x0391, pci_subsys_10e1_0391_10e1_0391, 0};
@@ -30674,6 +35017,12 @@
 #define pci_ss_info_10e1_0391 pci_ss_info_10e1_0391_10e1_0391
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_10ec_0883_1025_1605 =
+	{0x1025, 0x1605, pci_subsys_10ec_0883_1025_1605, 0};
+#undef pci_ss_info_1025_1605
+#define pci_ss_info_1025_1605 pci_ss_info_10ec_0883_1025_1605
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_10ec_8029_10b8_2011 =
 	{0x10b8, 0x2011, pci_subsys_10ec_8029_10b8_2011, 0};
 #undef pci_ss_info_10b8_2011
@@ -30730,6 +35079,10 @@
 #undef pci_ss_info_103c_006a
 #define pci_ss_info_103c_006a pci_ss_info_10ec_8139_103c_006a
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_10ec_8139_1043_1045 =
+	{0x1043, 0x1045, pci_subsys_10ec_8139_1043_1045, 0};
+#undef pci_ss_info_1043_1045
+#define pci_ss_info_1043_1045 pci_ss_info_10ec_8139_1043_1045
 static const pciSubsystemInfo pci_ss_info_10ec_8139_1043_8109 =
 	{0x1043, 0x8109, pci_subsys_10ec_8139_1043_8109, 0};
 #undef pci_ss_info_1043_8109
@@ -30746,6 +35099,10 @@
 	{0x10ec, 0x8139, pci_subsys_10ec_8139_10ec_8139, 0};
 #undef pci_ss_info_10ec_8139
 #define pci_ss_info_10ec_8139 pci_ss_info_10ec_8139_10ec_8139
+static const pciSubsystemInfo pci_ss_info_10ec_8139_10f7_8338 =
+	{0x10f7, 0x8338, pci_subsys_10ec_8139_10f7_8338, 0};
+#undef pci_ss_info_10f7_8338
+#define pci_ss_info_10f7_8338 pci_ss_info_10ec_8139_10f7_8338
 static const pciSubsystemInfo pci_ss_info_10ec_8139_1113_ec01 =
 	{0x1113, 0xec01, pci_subsys_10ec_8139_1113_ec01, 0};
 #undef pci_ss_info_1113_ec01
@@ -30786,6 +35143,10 @@
 	{0x1436, 0x8139, pci_subsys_10ec_8139_1436_8139, 0};
 #undef pci_ss_info_1436_8139
 #define pci_ss_info_1436_8139 pci_ss_info_10ec_8139_1436_8139
+static const pciSubsystemInfo pci_ss_info_10ec_8139_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_10ec_8139_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_10ec_8139_144d_c00c
 static const pciSubsystemInfo pci_ss_info_10ec_8139_1458_e000 =
 	{0x1458, 0xe000, pci_subsys_10ec_8139_1458_e000, 0};
 #undef pci_ss_info_1458_e000
@@ -30818,6 +35179,10 @@
 	{0x14cb, 0x0200, pci_subsys_10ec_8139_14cb_0200, 0};
 #undef pci_ss_info_14cb_0200
 #define pci_ss_info_14cb_0200 pci_ss_info_10ec_8139_14cb_0200
+static const pciSubsystemInfo pci_ss_info_10ec_8139_1695_9001 =
+	{0x1695, 0x9001, pci_subsys_10ec_8139_1695_9001, 0};
+#undef pci_ss_info_1695_9001
+#define pci_ss_info_1695_9001 pci_ss_info_10ec_8139_1695_9001
 static const pciSubsystemInfo pci_ss_info_10ec_8139_1799_5000 =
 	{0x1799, 0x5000, pci_subsys_10ec_8139_1799_5000, 0};
 #undef pci_ss_info_1799_5000
@@ -30838,14 +35203,20 @@
 	{0x8e2e, 0x7100, pci_subsys_10ec_8139_8e2e_7100, 0};
 #undef pci_ss_info_8e2e_7100
 #define pci_ss_info_8e2e_7100 pci_ss_info_10ec_8139_8e2e_7100
-static const pciSubsystemInfo pci_ss_info_10ec_8139_9001_1695 =
-	{0x9001, 0x1695, pci_subsys_10ec_8139_9001_1695, 0};
-#undef pci_ss_info_9001_1695
-#define pci_ss_info_9001_1695 pci_ss_info_10ec_8139_9001_1695
 static const pciSubsystemInfo pci_ss_info_10ec_8139_a0a0_0007 =
 	{0xa0a0, 0x0007, pci_subsys_10ec_8139_a0a0_0007, 0};
 #undef pci_ss_info_a0a0_0007
 #define pci_ss_info_a0a0_0007 pci_ss_info_10ec_8139_a0a0_0007
+static const pciSubsystemInfo pci_ss_info_10ec_8167_1462_235c =
+	{0x1462, 0x235c, pci_subsys_10ec_8167_1462_235c, 0};
+#undef pci_ss_info_1462_235c
+#define pci_ss_info_1462_235c pci_ss_info_10ec_8167_1462_235c
+#endif
+static const pciSubsystemInfo pci_ss_info_10ec_8169_1025_0079 =
+	{0x1025, 0x0079, pci_subsys_10ec_8169_1025_0079, 0};
+#undef pci_ss_info_1025_0079
+#define pci_ss_info_1025_0079 pci_ss_info_10ec_8169_1025_0079
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_10ec_8169_1259_c107 =
 	{0x1259, 0xc107, pci_subsys_10ec_8169_1259_c107, 0};
 #undef pci_ss_info_1259_c107
@@ -30858,6 +35229,10 @@
 	{0x1458, 0xe000, pci_subsys_10ec_8169_1458_e000, 0};
 #undef pci_ss_info_1458_e000
 #define pci_ss_info_1458_e000 pci_ss_info_10ec_8169_1458_e000
+static const pciSubsystemInfo pci_ss_info_10ec_8169_1462_030c =
+	{0x1462, 0x030c, pci_subsys_10ec_8169_1462_030c, 0};
+#undef pci_ss_info_1462_030c
+#define pci_ss_info_1462_030c pci_ss_info_10ec_8169_1462_030c
 static const pciSubsystemInfo pci_ss_info_10ec_8169_1462_702c =
 	{0x1462, 0x702c, pci_subsys_10ec_8169_1462_702c, 0};
 #undef pci_ss_info_1462_702c
@@ -30951,6 +35326,10 @@
 	{0x1102, 0x0058, pci_subsys_1102_0004_1102_0058, 0};
 #undef pci_ss_info_1102_0058
 #define pci_ss_info_1102_0058 pci_ss_info_1102_0004_1102_0058
+static const pciSubsystemInfo pci_ss_info_1102_0004_1102_1002 =
+	{0x1102, 0x1002, pci_subsys_1102_0004_1102_1002, 0};
+#undef pci_ss_info_1102_1002
+#define pci_ss_info_1102_1002 pci_ss_info_1102_0004_1102_1002
 static const pciSubsystemInfo pci_ss_info_1102_0004_1102_1007 =
 	{0x1102, 0x1007, pci_subsys_1102_0004_1102_1007, 0};
 #undef pci_ss_info_1102_1007
@@ -30959,6 +35338,18 @@
 	{0x1102, 0x2002, pci_subsys_1102_0004_1102_2002, 0};
 #undef pci_ss_info_1102_2002
 #define pci_ss_info_1102_2002 pci_ss_info_1102_0004_1102_2002
+static const pciSubsystemInfo pci_ss_info_1102_0004_1102_4001 =
+	{0x1102, 0x4001, pci_subsys_1102_0004_1102_4001, 0};
+#undef pci_ss_info_1102_4001
+#define pci_ss_info_1102_4001 pci_ss_info_1102_0004_1102_4001
+static const pciSubsystemInfo pci_ss_info_1102_0005_1102_0021 =
+	{0x1102, 0x0021, pci_subsys_1102_0005_1102_0021, 0};
+#undef pci_ss_info_1102_0021
+#define pci_ss_info_1102_0021 pci_ss_info_1102_0005_1102_0021
+static const pciSubsystemInfo pci_ss_info_1102_0005_1102_1003 =
+	{0x1102, 0x1003, pci_subsys_1102_0005_1102_1003, 0};
+#undef pci_ss_info_1102_1003
+#define pci_ss_info_1102_1003 pci_ss_info_1102_0005_1102_1003
 static const pciSubsystemInfo pci_ss_info_1102_0007_1102_0007 =
 	{0x1102, 0x0007, pci_subsys_1102_0007_1102_0007, 0};
 #undef pci_ss_info_1102_0007
@@ -31084,14 +35475,6 @@
 	{0x1103, 0x0006, pci_subsys_1103_0004_1103_0006, 0};
 #undef pci_ss_info_1103_0006
 #define pci_ss_info_1103_0006 pci_ss_info_1103_0004_1103_0006
-static const pciSubsystemInfo pci_ss_info_1103_0004_1103_0007 =
-	{0x1103, 0x0007, pci_subsys_1103_0004_1103_0007, 0};
-#undef pci_ss_info_1103_0007
-#define pci_ss_info_1103_0007 pci_ss_info_1103_0004_1103_0007
-static const pciSubsystemInfo pci_ss_info_1103_0004_1103_0008 =
-	{0x1103, 0x0008, pci_subsys_1103_0004_1103_0008, 0};
-#undef pci_ss_info_1103_0008
-#define pci_ss_info_1103_0008 pci_ss_info_1103_0004_1103_0008
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1105_8475_1105_0001 =
@@ -31128,6 +35511,10 @@
 	{0x147b, 0xa401, pci_subsys_1106_0305_147b_a401, 0};
 #undef pci_ss_info_147b_a401
 #define pci_ss_info_147b_a401 pci_ss_info_1106_0305_147b_a401
+static const pciSubsystemInfo pci_ss_info_1106_0364_1043_81ce =
+	{0x1043, 0x81ce, pci_subsys_1106_0364_1043_81ce, 0};
+#undef pci_ss_info_1043_81ce
+#define pci_ss_info_1043_81ce pci_ss_info_1106_0364_1043_81ce
 static const pciSubsystemInfo pci_ss_info_1106_0571_1019_0985 =
 	{0x1019, 0x0985, pci_subsys_1106_0571_1019_0985, 0};
 #undef pci_ss_info_1019_0985
@@ -31312,10 +35699,10 @@
 	{0x1186, 0x1400, pci_subsys_1106_3043_1186_1400, 0};
 #undef pci_ss_info_1186_1400
 #define pci_ss_info_1186_1400 pci_ss_info_1106_3043_1186_1400
-static const pciSubsystemInfo pci_ss_info_1106_3044_0574_086c =
-	{0x0574, 0x086c, pci_subsys_1106_3044_0574_086c, 0};
-#undef pci_ss_info_0574_086c
-#define pci_ss_info_0574_086c pci_ss_info_1106_3044_0574_086c
+static const pciSubsystemInfo pci_ss_info_1106_3044_0010_0001 =
+	{0x0010, 0x0001, pci_subsys_1106_3044_0010_0001, 0};
+#undef pci_ss_info_0010_0001
+#define pci_ss_info_0010_0001 pci_ss_info_1106_3044_0010_0001
 #endif
 static const pciSubsystemInfo pci_ss_info_1106_3044_1025_005a =
 	{0x1025, 0x005a, pci_subsys_1106_3044_1025_005a, 0};
@@ -31330,6 +35717,10 @@
 	{0x1458, 0x1000, pci_subsys_1106_3044_1458_1000, 0};
 #undef pci_ss_info_1458_1000
 #define pci_ss_info_1458_1000 pci_ss_info_1106_3044_1458_1000
+static const pciSubsystemInfo pci_ss_info_1106_3044_1462_207d =
+	{0x1462, 0x207d, pci_subsys_1106_3044_1462_207d, 0};
+#undef pci_ss_info_1462_207d
+#define pci_ss_info_1462_207d pci_ss_info_1106_3044_1462_207d
 static const pciSubsystemInfo pci_ss_info_1106_3044_1462_702d =
 	{0x1462, 0x702d, pci_subsys_1106_3044_1462_702d, 0};
 #undef pci_ss_info_1462_702d
@@ -31438,10 +35829,22 @@
 	{0x1106, 0x4161, pci_subsys_1106_3059_1106_4161, 0};
 #undef pci_ss_info_1106_4161
 #define pci_ss_info_1106_4161 pci_ss_info_1106_3059_1106_4161
+static const pciSubsystemInfo pci_ss_info_1106_3059_1106_4170 =
+	{0x1106, 0x4170, pci_subsys_1106_3059_1106_4170, 0};
+#undef pci_ss_info_1106_4170
+#define pci_ss_info_1106_4170 pci_ss_info_1106_3059_1106_4170
+static const pciSubsystemInfo pci_ss_info_1106_3059_1106_4552 =
+	{0x1106, 0x4552, pci_subsys_1106_3059_1106_4552, 0};
+#undef pci_ss_info_1106_4552
+#define pci_ss_info_1106_4552 pci_ss_info_1106_3059_1106_4552
 static const pciSubsystemInfo pci_ss_info_1106_3059_1297_c160 =
 	{0x1297, 0xc160, pci_subsys_1106_3059_1297_c160, 0};
 #undef pci_ss_info_1297_c160
 #define pci_ss_info_1297_c160 pci_ss_info_1106_3059_1297_c160
+static const pciSubsystemInfo pci_ss_info_1106_3059_1413_147b =
+	{0x1413, 0x147b, pci_subsys_1106_3059_1413_147b, 0};
+#undef pci_ss_info_1413_147b
+#define pci_ss_info_1413_147b pci_ss_info_1106_3059_1413_147b
 static const pciSubsystemInfo pci_ss_info_1106_3059_1458_a002 =
 	{0x1458, 0xa002, pci_subsys_1106_3059_1458_a002, 0};
 #undef pci_ss_info_1458_a002
@@ -31458,24 +35861,24 @@
 	{0x147b, 0x1407, pci_subsys_1106_3059_147b_1407, 0};
 #undef pci_ss_info_147b_1407
 #define pci_ss_info_147b_1407 pci_ss_info_1106_3059_147b_1407
+static const pciSubsystemInfo pci_ss_info_1106_3059_1849_0850 =
+	{0x1849, 0x0850, pci_subsys_1106_3059_1849_0850, 0};
+#undef pci_ss_info_1849_0850
+#define pci_ss_info_1849_0850 pci_ss_info_1106_3059_1849_0850
 static const pciSubsystemInfo pci_ss_info_1106_3059_1849_9761 =
 	{0x1849, 0x9761, pci_subsys_1106_3059_1849_9761, 0};
 #undef pci_ss_info_1849_9761
 #define pci_ss_info_1849_9761 pci_ss_info_1106_3059_1849_9761
+static const pciSubsystemInfo pci_ss_info_1106_3059_3005_1695 =
+	{0x3005, 0x1695, pci_subsys_1106_3059_3005_1695, 0};
+#undef pci_ss_info_3005_1695
+#define pci_ss_info_3005_1695 pci_ss_info_1106_3059_3005_1695
 #endif
 static const pciSubsystemInfo pci_ss_info_1106_3059_4005_4710 =
 	{0x4005, 0x4710, pci_subsys_1106_3059_4005_4710, 0};
 #undef pci_ss_info_4005_4710
 #define pci_ss_info_4005_4710 pci_ss_info_1106_3059_4005_4710
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciSubsystemInfo pci_ss_info_1106_3059_4170_1106 =
-	{0x4170, 0x1106, pci_subsys_1106_3059_4170_1106, 0};
-#undef pci_ss_info_4170_1106
-#define pci_ss_info_4170_1106 pci_ss_info_1106_3059_4170_1106
-static const pciSubsystemInfo pci_ss_info_1106_3059_4552_1106 =
-	{0x4552, 0x1106, pci_subsys_1106_3059_4552_1106, 0};
-#undef pci_ss_info_4552_1106
-#define pci_ss_info_4552_1106 pci_ss_info_1106_3059_4552_1106
 static const pciSubsystemInfo pci_ss_info_1106_3059_a0a0_01b6 =
 	{0xa0a0, 0x01b6, pci_subsys_1106_3059_a0a0_01b6, 0};
 #undef pci_ss_info_a0a0_01b6
@@ -31770,6 +36173,14 @@
 #define pci_ss_info_1127_0400 pci_ss_info_1127_0400_1127_0400
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1131_1561_1775_c200 =
+	{0x1775, 0xc200, pci_subsys_1131_1561_1775_c200, 0};
+#undef pci_ss_info_1775_c200
+#define pci_ss_info_1775_c200 pci_ss_info_1131_1561_1775_c200
+static const pciSubsystemInfo pci_ss_info_1131_1562_1775_c200 =
+	{0x1775, 0xc200, pci_subsys_1131_1562_1775_c200, 0};
+#undef pci_ss_info_1775_c200
+#define pci_ss_info_1775_c200 pci_ss_info_1131_1562_1775_c200
 static const pciSubsystemInfo pci_ss_info_1131_5402_1244_0f00 =
 	{0x1244, 0x0f00, pci_subsys_1131_5402_1244_0f00, 0};
 #undef pci_ss_info_1244_0f00
@@ -31828,10 +36239,6 @@
 	{0x0000, 0x4091, pci_subsys_1131_7133_0000_4091, 0};
 #undef pci_ss_info_0000_4091
 #define pci_ss_info_0000_4091 pci_ss_info_1131_7133_0000_4091
-static const pciSubsystemInfo pci_ss_info_1131_7133_002b_11bd =
-	{0x002b, 0x11bd, pci_subsys_1131_7133_002b_11bd, 0};
-#undef pci_ss_info_002b_11bd
-#define pci_ss_info_002b_11bd pci_ss_info_1131_7133_002b_11bd
 static const pciSubsystemInfo pci_ss_info_1131_7133_1019_4cb5 =
 	{0x1019, 0x4cb5, pci_subsys_1131_7133_1019_4cb5, 0};
 #undef pci_ss_info_1019_4cb5
@@ -31852,6 +36259,10 @@
 	{0x1043, 0x4862, pci_subsys_1131_7133_1043_4862, 0};
 #undef pci_ss_info_1043_4862
 #define pci_ss_info_1043_4862 pci_ss_info_1131_7133_1043_4862
+static const pciSubsystemInfo pci_ss_info_1131_7133_1131_0000 =
+	{0x1131, 0x0000, pci_subsys_1131_7133_1131_0000, 0};
+#undef pci_ss_info_1131_0000
+#define pci_ss_info_1131_0000 pci_ss_info_1131_7133_1131_0000
 static const pciSubsystemInfo pci_ss_info_1131_7133_1131_2001 =
 	{0x1131, 0x2001, pci_subsys_1131_7133_1131_2001, 0};
 #undef pci_ss_info_1131_2001
@@ -31864,6 +36275,10 @@
 	{0x1131, 0x4ee9, pci_subsys_1131_7133_1131_4ee9, 0};
 #undef pci_ss_info_1131_4ee9
 #define pci_ss_info_1131_4ee9 pci_ss_info_1131_7133_1131_4ee9
+static const pciSubsystemInfo pci_ss_info_1131_7133_11bd_002b =
+	{0x11bd, 0x002b, pci_subsys_1131_7133_11bd_002b, 0};
+#undef pci_ss_info_11bd_002b
+#define pci_ss_info_11bd_002b pci_ss_info_1131_7133_11bd_002b
 static const pciSubsystemInfo pci_ss_info_1131_7133_11bd_002e =
 	{0x11bd, 0x002e, pci_subsys_1131_7133_11bd_002e, 0};
 #undef pci_ss_info_11bd_002e
@@ -31872,6 +36287,10 @@
 	{0x12ab, 0x0800, pci_subsys_1131_7133_12ab_0800, 0};
 #undef pci_ss_info_12ab_0800
 #define pci_ss_info_12ab_0800 pci_ss_info_1131_7133_12ab_0800
+static const pciSubsystemInfo pci_ss_info_1131_7133_1421_0335 =
+	{0x1421, 0x0335, pci_subsys_1131_7133_1421_0335, 0};
+#undef pci_ss_info_1421_0335
+#define pci_ss_info_1421_0335 pci_ss_info_1131_7133_1421_0335
 static const pciSubsystemInfo pci_ss_info_1131_7133_1421_1370 =
 	{0x1421, 0x1370, pci_subsys_1131_7133_1421_1370, 0};
 #undef pci_ss_info_1421_1370
@@ -31912,18 +36331,14 @@
 	{0x153b, 0x1162, pci_subsys_1131_7133_153b_1162, 0};
 #undef pci_ss_info_153b_1162
 #define pci_ss_info_153b_1162 pci_ss_info_1131_7133_153b_1162
+static const pciSubsystemInfo pci_ss_info_1131_7133_17de_7350 =
+	{0x17de, 0x7350, pci_subsys_1131_7133_17de_7350, 0};
+#undef pci_ss_info_17de_7350
+#define pci_ss_info_17de_7350 pci_ss_info_1131_7133_17de_7350
 static const pciSubsystemInfo pci_ss_info_1131_7133_185b_c100 =
 	{0x185b, 0xc100, pci_subsys_1131_7133_185b_c100, 0};
 #undef pci_ss_info_185b_c100
 #define pci_ss_info_185b_c100 pci_ss_info_1131_7133_185b_c100
-static const pciSubsystemInfo pci_ss_info_1131_7133_4e42_0212 =
-	{0x4e42, 0x0212, pci_subsys_1131_7133_4e42_0212, 0};
-#undef pci_ss_info_4e42_0212
-#define pci_ss_info_4e42_0212 pci_ss_info_1131_7133_4e42_0212
-static const pciSubsystemInfo pci_ss_info_1131_7133_4e42_0502 =
-	{0x4e42, 0x0502, pci_subsys_1131_7133_4e42_0502, 0};
-#undef pci_ss_info_4e42_0502
-#define pci_ss_info_4e42_0502 pci_ss_info_1131_7133_4e42_0502
 static const pciSubsystemInfo pci_ss_info_1131_7133_5168_0306 =
 	{0x5168, 0x0306, pci_subsys_1131_7133_5168_0306, 0};
 #undef pci_ss_info_5168_0306
@@ -31932,10 +36347,34 @@
 	{0x5168, 0x0319, pci_subsys_1131_7133_5168_0319, 0};
 #undef pci_ss_info_5168_0319
 #define pci_ss_info_5168_0319 pci_ss_info_1131_7133_5168_0319
-static const pciSubsystemInfo pci_ss_info_1131_7133_5456_7135 =
-	{0x5456, 0x7135, pci_subsys_1131_7133_5456_7135, 0};
-#undef pci_ss_info_5456_7135
-#define pci_ss_info_5456_7135 pci_ss_info_1131_7133_5456_7135
+static const pciSubsystemInfo pci_ss_info_1131_7133_5168_0502 =
+	{0x5168, 0x0502, pci_subsys_1131_7133_5168_0502, 0};
+#undef pci_ss_info_5168_0502
+#define pci_ss_info_5168_0502 pci_ss_info_1131_7133_5168_0502
+static const pciSubsystemInfo pci_ss_info_1131_7133_5168_0520 =
+	{0x5168, 0x0520, pci_subsys_1131_7133_5168_0520, 0};
+#undef pci_ss_info_5168_0520
+#define pci_ss_info_5168_0520 pci_ss_info_1131_7133_5168_0520
+static const pciSubsystemInfo pci_ss_info_1131_7133_5168_1502 =
+	{0x5168, 0x1502, pci_subsys_1131_7133_5168_1502, 0};
+#undef pci_ss_info_5168_1502
+#define pci_ss_info_5168_1502 pci_ss_info_1131_7133_5168_1502
+static const pciSubsystemInfo pci_ss_info_1131_7133_5168_2502 =
+	{0x5168, 0x2502, pci_subsys_1131_7133_5168_2502, 0};
+#undef pci_ss_info_5168_2502
+#define pci_ss_info_5168_2502 pci_ss_info_1131_7133_5168_2502
+static const pciSubsystemInfo pci_ss_info_1131_7133_5168_2520 =
+	{0x5168, 0x2520, pci_subsys_1131_7133_5168_2520, 0};
+#undef pci_ss_info_5168_2520
+#define pci_ss_info_5168_2520 pci_ss_info_1131_7133_5168_2520
+static const pciSubsystemInfo pci_ss_info_1131_7133_5168_3502 =
+	{0x5168, 0x3502, pci_subsys_1131_7133_5168_3502, 0};
+#undef pci_ss_info_5168_3502
+#define pci_ss_info_5168_3502 pci_ss_info_1131_7133_5168_3502
+static const pciSubsystemInfo pci_ss_info_1131_7133_5168_3520 =
+	{0x5168, 0x3520, pci_subsys_1131_7133_5168_3520, 0};
+#undef pci_ss_info_5168_3520
+#define pci_ss_info_5168_3520 pci_ss_info_1131_7133_5168_3520
 static const pciSubsystemInfo pci_ss_info_1131_7134_1019_4cb4 =
 	{0x1019, 0x4cb4, pci_subsys_1131_7134_1019_4cb4, 0};
 #undef pci_ss_info_1019_4cb4
@@ -31948,6 +36387,10 @@
 	{0x1043, 0x4840, pci_subsys_1131_7134_1043_4840, 0};
 #undef pci_ss_info_1043_4840
 #define pci_ss_info_1043_4840 pci_ss_info_1131_7134_1043_4840
+static const pciSubsystemInfo pci_ss_info_1131_7134_1043_4842 =
+	{0x1043, 0x4842, pci_subsys_1131_7134_1043_4842, 0};
+#undef pci_ss_info_1043_4842
+#define pci_ss_info_1043_4842 pci_ss_info_1131_7134_1043_4842
 static const pciSubsystemInfo pci_ss_info_1131_7134_1131_2004 =
 	{0x1131, 0x2004, pci_subsys_1131_7134_1131_2004, 0};
 #undef pci_ss_info_1131_2004
@@ -31968,6 +36411,10 @@
 	{0x11bd, 0x002d, pci_subsys_1131_7134_11bd_002d, 0};
 #undef pci_ss_info_11bd_002d
 #define pci_ss_info_11bd_002d pci_ss_info_1131_7134_11bd_002d
+static const pciSubsystemInfo pci_ss_info_1131_7134_1461_2c00 =
+	{0x1461, 0x2c00, pci_subsys_1131_7134_1461_2c00, 0};
+#undef pci_ss_info_1461_2c00
+#define pci_ss_info_1461_2c00 pci_ss_info_1131_7134_1461_2c00
 static const pciSubsystemInfo pci_ss_info_1131_7134_1461_9715 =
 	{0x1461, 0x9715, pci_subsys_1131_7134_1461_9715, 0};
 #undef pci_ss_info_1461_9715
@@ -32024,10 +36471,6 @@
 	{0x1894, 0xfe01, pci_subsys_1131_7134_1894_fe01, 0};
 #undef pci_ss_info_1894_fe01
 #define pci_ss_info_1894_fe01 pci_ss_info_1131_7134_1894_fe01
-static const pciSubsystemInfo pci_ss_info_1131_7134_4e42_0138 =
-	{0x4e42, 0x0138, pci_subsys_1131_7134_4e42_0138, 0};
-#undef pci_ss_info_4e42_0138
-#define pci_ss_info_4e42_0138 pci_ss_info_1131_7134_4e42_0138
 static const pciSubsystemInfo pci_ss_info_1131_7146_110a_0000 =
 	{0x110a, 0x0000, pci_subsys_1131_7146_110a_0000, 0};
 #undef pci_ss_info_110a_0000
@@ -32124,6 +36567,10 @@
 	{0x13c2, 0x1011, pci_subsys_1131_7146_13c2_1011, 0};
 #undef pci_ss_info_13c2_1011
 #define pci_ss_info_13c2_1011 pci_ss_info_1131_7146_13c2_1011
+static const pciSubsystemInfo pci_ss_info_1131_7146_13c2_1012 =
+	{0x13c2, 0x1012, pci_subsys_1131_7146_13c2_1012, 0};
+#undef pci_ss_info_13c2_1012
+#define pci_ss_info_13c2_1012 pci_ss_info_1131_7146_13c2_1012
 static const pciSubsystemInfo pci_ss_info_1131_7146_13c2_1013 =
 	{0x13c2, 0x1013, pci_subsys_1131_7146_13c2_1013, 0};
 #undef pci_ss_info_13c2_1013
@@ -32132,10 +36579,26 @@
 	{0x13c2, 0x1016, pci_subsys_1131_7146_13c2_1016, 0};
 #undef pci_ss_info_13c2_1016
 #define pci_ss_info_13c2_1016 pci_ss_info_1131_7146_13c2_1016
+static const pciSubsystemInfo pci_ss_info_1131_7146_13c2_1018 =
+	{0x13c2, 0x1018, pci_subsys_1131_7146_13c2_1018, 0};
+#undef pci_ss_info_13c2_1018
+#define pci_ss_info_13c2_1018 pci_ss_info_1131_7146_13c2_1018
+static const pciSubsystemInfo pci_ss_info_1131_7146_13c2_1019 =
+	{0x13c2, 0x1019, pci_subsys_1131_7146_13c2_1019, 0};
+#undef pci_ss_info_13c2_1019
+#define pci_ss_info_13c2_1019 pci_ss_info_1131_7146_13c2_1019
 static const pciSubsystemInfo pci_ss_info_1131_7146_13c2_1102 =
 	{0x13c2, 0x1102, pci_subsys_1131_7146_13c2_1102, 0};
 #undef pci_ss_info_13c2_1102
 #define pci_ss_info_13c2_1102 pci_ss_info_1131_7146_13c2_1102
+static const pciSubsystemInfo pci_ss_info_1131_7146_153b_1156 =
+	{0x153b, 0x1156, pci_subsys_1131_7146_153b_1156, 0};
+#undef pci_ss_info_153b_1156
+#define pci_ss_info_153b_1156 pci_ss_info_1131_7146_153b_1156
+static const pciSubsystemInfo pci_ss_info_1131_9730_1131_0000 =
+	{0x1131, 0x0000, pci_subsys_1131_9730_1131_0000, 0};
+#undef pci_ss_info_1131_0000
+#define pci_ss_info_1131_0000 pci_ss_info_1131_9730_1131_0000
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1133_e010_110a_0021 =
@@ -32630,6 +37093,10 @@
 #undef pci_ss_info_1092_2000
 #define pci_ss_info_1092_2000 pci_ss_info_1163_2000_1092_2000
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1166_0132_1166_0132 =
+	{0x1166, 0x0132, pci_subsys_1166_0132_1166_0132, 0};
+#undef pci_ss_info_1166_0132
+#define pci_ss_info_1166_0132 pci_ss_info_1166_0132_1166_0132
 static const pciSubsystemInfo pci_ss_info_1166_0201_4c53_1080 =
 	{0x4c53, 0x1080, pci_subsys_1166_0201_4c53_1080, 0};
 #undef pci_ss_info_4c53_1080
@@ -32643,6 +37110,12 @@
 #undef pci_ss_info_4c53_1080
 #define pci_ss_info_4c53_1080 pci_ss_info_1166_0212_4c53_1080
 #endif
+static const pciSubsystemInfo pci_ss_info_1166_0213_1028_4134 =
+	{0x1028, 0x4134, pci_subsys_1166_0213_1028_4134, 0};
+#undef pci_ss_info_1028_4134
+#define pci_ss_info_1028_4134 pci_ss_info_1166_0213_1028_4134
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 static const pciSubsystemInfo pci_ss_info_1166_0213_1028_c134 =
 	{0x1028, 0xc134, pci_subsys_1166_0213_1028_c134, 0};
 #undef pci_ss_info_1028_c134
@@ -32734,10 +37207,28 @@
 #undef pci_ss_info_104d_80e7
 #define pci_ss_info_104d_80e7 pci_ss_info_1180_0476_104d_80e7
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_1180_0476_104d_814e =
+	{0x104d, 0x814e, pci_subsys_1180_0476_104d_814e, 0};
+#undef pci_ss_info_104d_814e
+#define pci_ss_info_104d_814e pci_ss_info_1180_0476_104d_814e
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1180_0476_10f7_8338 =
+	{0x10f7, 0x8338, pci_subsys_1180_0476_10f7_8338, 0};
+#undef pci_ss_info_10f7_8338
+#define pci_ss_info_10f7_8338 pci_ss_info_1180_0476_10f7_8338
+static const pciSubsystemInfo pci_ss_info_1180_0476_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_1180_0476_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_1180_0476_144d_c00c
 static const pciSubsystemInfo pci_ss_info_1180_0476_14ef_0220 =
 	{0x14ef, 0x0220, pci_subsys_1180_0476_14ef_0220, 0};
 #undef pci_ss_info_14ef_0220
 #define pci_ss_info_14ef_0220 pci_ss_info_1180_0476_14ef_0220
+static const pciSubsystemInfo pci_ss_info_1180_0476_17aa_201c =
+	{0x17aa, 0x201c, pci_subsys_1180_0476_17aa_201c, 0};
+#undef pci_ss_info_17aa_201c
+#define pci_ss_info_17aa_201c pci_ss_info_1180_0476_17aa_201c
 static const pciSubsystemInfo pci_ss_info_1180_0478_1014_0184 =
 	{0x1014, 0x0184, pci_subsys_1180_0478_1014_0184, 0};
 #undef pci_ss_info_1014_0184
@@ -32764,14 +37255,30 @@
 #undef pci_ss_info_1028_0188
 #define pci_ss_info_1028_0188 pci_ss_info_1180_0552_1028_0188
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1180_0552_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_1180_0552_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_1180_0552_144d_c00c
+static const pciSubsystemInfo pci_ss_info_1180_0552_17aa_201e =
+	{0x17aa, 0x201e, pci_subsys_1180_0552_17aa_201e, 0};
+#undef pci_ss_info_17aa_201e
+#define pci_ss_info_17aa_201e pci_ss_info_1180_0552_17aa_201e
 static const pciSubsystemInfo pci_ss_info_1180_0592_1043_1967 =
 	{0x1043, 0x1967, pci_subsys_1180_0592_1043_1967, 0};
 #undef pci_ss_info_1043_1967
 #define pci_ss_info_1043_1967 pci_ss_info_1180_0592_1043_1967
+static const pciSubsystemInfo pci_ss_info_1180_0592_144d_c018 =
+	{0x144d, 0xc018, pci_subsys_1180_0592_144d_c018, 0};
+#undef pci_ss_info_144d_c018
+#define pci_ss_info_144d_c018 pci_ss_info_1180_0592_144d_c018
 static const pciSubsystemInfo pci_ss_info_1180_0822_1014_0556 =
 	{0x1014, 0x0556, pci_subsys_1180_0822_1014_0556, 0};
 #undef pci_ss_info_1014_0556
 #define pci_ss_info_1014_0556 pci_ss_info_1180_0822_1014_0556
+static const pciSubsystemInfo pci_ss_info_1180_0822_1014_0598 =
+	{0x1014, 0x0598, pci_subsys_1180_0822_1014_0598, 0};
+#undef pci_ss_info_1014_0598
+#define pci_ss_info_1014_0598 pci_ss_info_1180_0822_1014_0598
 #endif
 static const pciSubsystemInfo pci_ss_info_1180_0822_1028_0188 =
 	{0x1028, 0x0188, pci_subsys_1180_0822_1028_0188, 0};
@@ -32788,6 +37295,18 @@
 	{0x1043, 0x1967, pci_subsys_1180_0822_1043_1967, 0};
 #undef pci_ss_info_1043_1967
 #define pci_ss_info_1043_1967 pci_ss_info_1180_0822_1043_1967
+static const pciSubsystemInfo pci_ss_info_1180_0822_10f7_8338 =
+	{0x10f7, 0x8338, pci_subsys_1180_0822_10f7_8338, 0};
+#undef pci_ss_info_10f7_8338
+#define pci_ss_info_10f7_8338 pci_ss_info_1180_0822_10f7_8338
+static const pciSubsystemInfo pci_ss_info_1180_0822_144d_c018 =
+	{0x144d, 0xc018, pci_subsys_1180_0822_144d_c018, 0};
+#undef pci_ss_info_144d_c018
+#define pci_ss_info_144d_c018 pci_ss_info_1180_0822_144d_c018
+static const pciSubsystemInfo pci_ss_info_1180_0822_17aa_201d =
+	{0x17aa, 0x201d, pci_subsys_1180_0822_17aa_201d, 0};
+#undef pci_ss_info_17aa_201d
+#define pci_ss_info_17aa_201d pci_ss_info_1180_0822_17aa_201d
 static const pciSubsystemInfo pci_ss_info_1180_0852_1043_1967 =
 	{0x1043, 0x1967, pci_subsys_1180_0852_1043_1967, 0};
 #undef pci_ss_info_1043_1967
@@ -32860,6 +37379,10 @@
 	{0x11ab, 0x1021, pci_subsys_11ab_4320_11ab_1021, 0};
 #undef pci_ss_info_11ab_1021
 #define pci_ss_info_11ab_1021 pci_ss_info_11ab_4320_11ab_1021
+static const pciSubsystemInfo pci_ss_info_11ab_4320_11ab_4320 =
+	{0x11ab, 0x4320, pci_subsys_11ab_4320_11ab_4320, 0};
+#undef pci_ss_info_11ab_4320
+#define pci_ss_info_11ab_4320 pci_ss_info_11ab_4320_11ab_4320
 static const pciSubsystemInfo pci_ss_info_11ab_4320_11ab_5021 =
 	{0x11ab, 0x5021, pci_subsys_11ab_4320_11ab_5021, 0};
 #undef pci_ss_info_11ab_5021
@@ -32892,6 +37415,10 @@
 	{0x270f, 0x2803, pci_subsys_11ab_4320_270f_2803, 0};
 #undef pci_ss_info_270f_2803
 #define pci_ss_info_270f_2803 pci_ss_info_11ab_4320_270f_2803
+static const pciSubsystemInfo pci_ss_info_11ab_4347_4c53_10d0 =
+	{0x4c53, 0x10d0, pci_subsys_11ab_4347_4c53_10d0, 0};
+#undef pci_ss_info_4c53_10d0
+#define pci_ss_info_4c53_10d0 pci_ss_info_11ab_4347_4c53_10d0
 static const pciSubsystemInfo pci_ss_info_11ab_4350_1179_0001 =
 	{0x1179, 0x0001, pci_subsys_11ab_4350_1179_0001, 0};
 #undef pci_ss_info_1179_0001
@@ -33238,6 +37765,10 @@
 	{0xa0a0, 0x0506, pci_subsys_11ab_4362_a0a0_0506, 0};
 #undef pci_ss_info_a0a0_0506
 #define pci_ss_info_a0a0_0506 pci_ss_info_11ab_4362_a0a0_0506
+static const pciSubsystemInfo pci_ss_info_11ab_6480_1775_c200 =
+	{0x1775, 0xc200, pci_subsys_11ab_6480_1775_c200, 0};
+#undef pci_ss_info_1775_c200
+#define pci_ss_info_1775_c200 pci_ss_info_11ab_6480_1775_c200
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_11ad_0002_11ad_0002 =
@@ -33266,6 +37797,20 @@
 #define pci_ss_info_11ad_c001 pci_ss_info_11ad_c115_11ad_c001
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_11bd_0040_11bd_0044 =
+	{0x11bd, 0x0044, pci_subsys_11bd_0040_11bd_0044, 0};
+#undef pci_ss_info_11bd_0044
+#define pci_ss_info_11bd_0044 pci_ss_info_11bd_0040_11bd_0044
+static const pciSubsystemInfo pci_ss_info_11bd_0041_11bd_0044 =
+	{0x11bd, 0x0044, pci_subsys_11bd_0041_11bd_0044, 0};
+#undef pci_ss_info_11bd_0044
+#define pci_ss_info_11bd_0044 pci_ss_info_11bd_0041_11bd_0044
+static const pciSubsystemInfo pci_ss_info_11bd_0042_11bd_0044 =
+	{0x11bd, 0x0044, pci_subsys_11bd_0042_11bd_0044, 0};
+#undef pci_ss_info_11bd_0044
+#define pci_ss_info_11bd_0044 pci_ss_info_11bd_0042_11bd_0044
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 static const pciSubsystemInfo pci_ss_info_11c1_0440_1033_8015 =
 	{0x1033, 0x8015, pci_subsys_11c1_0440_1033_8015, 0};
@@ -33708,6 +38253,10 @@
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_1217_7110_103c_0890
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1217_7110_1734_106c =
+	{0x1734, 0x106c, pci_subsys_1217_7110_1734_106c, 0};
+#undef pci_ss_info_1734_106c
+#define pci_ss_info_1734_106c pci_ss_info_1217_7110_1734_106c
 #endif
 static const pciSubsystemInfo pci_ss_info_1217_7223_103c_088c =
 	{0x103c, 0x088c, pci_subsys_1217_7223_103c_088c, 0};
@@ -33720,6 +38269,10 @@
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_1217_7223_103c_0890
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1217_7223_10cf_11c4 =
+	{0x10cf, 0x11c4, pci_subsys_1217_7223_10cf_11c4, 0};
+#undef pci_ss_info_10cf_11c4
+#define pci_ss_info_10cf_11c4 pci_ss_info_1217_7223_10cf_11c4
 #endif
 static const pciSubsystemInfo pci_ss_info_121a_0003_1092_0003 =
 	{0x1092, 0x0003, pci_subsys_121a_0003_1092_0003, 0};
@@ -34050,6 +38603,10 @@
 	{0x147a, 0xc001, pci_subsys_125d_2898_147a_c001, 0};
 #undef pci_ss_info_147a_c001
 #define pci_ss_info_147a_c001 pci_ss_info_125d_2898_147a_c001
+static const pciSubsystemInfo pci_ss_info_125d_2898_148d_1030 =
+	{0x148d, 0x1030, pci_subsys_125d_2898_148d_1030, 0};
+#undef pci_ss_info_148d_1030
+#define pci_ss_info_148d_1030 pci_ss_info_125d_2898_148d_1030
 static const pciSubsystemInfo pci_ss_info_125d_2898_14fe_0428 =
 	{0x14fe, 0x0428, pci_subsys_125d_2898_14fe_0428, 0};
 #undef pci_ss_info_14fe_0428
@@ -34114,6 +38671,10 @@
 	{0x1113, 0x4203, pci_subsys_1260_3890_1113_4203, 0};
 #undef pci_ss_info_1113_4203
 #define pci_ss_info_1113_4203 pci_ss_info_1260_3890_1113_4203
+static const pciSubsystemInfo pci_ss_info_1260_3890_1113_8201 =
+	{0x1113, 0x8201, pci_subsys_1260_3890_1113_8201, 0};
+#undef pci_ss_info_1113_8201
+#define pci_ss_info_1113_8201 pci_ss_info_1260_3890_1113_8201
 static const pciSubsystemInfo pci_ss_info_1260_3890_1113_ee03 =
 	{0x1113, 0xee03, pci_subsys_1260_3890_1113_ee03, 0};
 #undef pci_ss_info_1113_ee03
@@ -34130,6 +38691,10 @@
 	{0x1259, 0xc104, pci_subsys_1260_3890_1259_c104, 0};
 #undef pci_ss_info_1259_c104
 #define pci_ss_info_1259_c104 pci_ss_info_1260_3890_1259_c104
+static const pciSubsystemInfo pci_ss_info_1260_3890_1260_0000 =
+	{0x1260, 0x0000, pci_subsys_1260_3890_1260_0000, 0};
+#undef pci_ss_info_1260_0000
+#define pci_ss_info_1260_0000 pci_ss_info_1260_3890_1260_0000
 static const pciSubsystemInfo pci_ss_info_1260_3890_1385_4800 =
 	{0x1385, 0x4800, pci_subsys_1260_3890_1385_4800, 0};
 #undef pci_ss_info_1385_4800
@@ -34872,6 +39437,10 @@
 	{0x12b9, 0x00a3, pci_subsys_12b9_1007_12b9_00a3, 0};
 #undef pci_ss_info_12b9_00a3
 #define pci_ss_info_12b9_00a3 pci_ss_info_12b9_1007_12b9_00a3
+static const pciSubsystemInfo pci_ss_info_12b9_1007_12b9_00c4 =
+	{0x12b9, 0x00c4, pci_subsys_12b9_1007_12b9_00c4, 0};
+#undef pci_ss_info_12b9_00c4
+#define pci_ss_info_12b9_00c4 pci_ss_info_12b9_1007_12b9_00c4
 static const pciSubsystemInfo pci_ss_info_12b9_1008_12b9_00a2 =
 	{0x12b9, 0x00a2, pci_subsys_12b9_1008_12b9_00a2, 0};
 #undef pci_ss_info_12b9_00a2
@@ -34972,6 +39541,12 @@
 #undef pci_ss_info_2a15_54a3
 #define pci_ss_info_2a15_54a3 pci_ss_info_12d2_0018_2a15_54a3
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_12d9_1078_12d9_000d =
+	{0x12d9, 0x000d, pci_subsys_12d9_1078_12d9_000d, 0};
+#undef pci_ss_info_12d9_000d
+#define pci_ss_info_12d9_000d pci_ss_info_12d9_1078_12d9_000d
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
 static const pciSubsystemInfo pci_ss_info_12eb_0001_104d_8036 =
 	{0x104d, 0x8036, pci_subsys_12eb_0001_104d_8036, 0};
@@ -35124,6 +39699,10 @@
 #define pci_ss_info_1308_0001 pci_ss_info_1308_0001_1308_0001
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1317_0985_1734_100c =
+	{0x1734, 0x100c, pci_subsys_1317_0985_1734_100c, 0};
+#undef pci_ss_info_1734_100c
+#define pci_ss_info_1734_100c pci_ss_info_1317_0985_1734_100c
 static const pciSubsystemInfo pci_ss_info_1317_8201_10b8_2635 =
 	{0x10b8, 0x2635, pci_subsys_1317_8201_10b8_2635, 0};
 #undef pci_ss_info_10b8_2635
@@ -35172,6 +39751,14 @@
 #define pci_ss_info_1394_0001 pci_ss_info_1394_0001_1394_0001
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1397_08b4_1397_b520 =
+	{0x1397, 0xb520, pci_subsys_1397_08b4_1397_b520, 0};
+#undef pci_ss_info_1397_b520
+#define pci_ss_info_1397_b520 pci_ss_info_1397_08b4_1397_b520
+static const pciSubsystemInfo pci_ss_info_1397_08b4_1397_b540 =
+	{0x1397, 0xb540, pci_subsys_1397_08b4_1397_b540, 0};
+#undef pci_ss_info_1397_b540
+#define pci_ss_info_1397_b540 pci_ss_info_1397_08b4_1397_b540
 static const pciSubsystemInfo pci_ss_info_1397_2bd0_0675_1704 =
 	{0x0675, 0x1704, pci_subsys_1397_2bd0_0675_1704, 0};
 #undef pci_ss_info_0675_1704
@@ -35236,6 +39823,32 @@
 #define pci_ss_info_1681_a000 pci_ss_info_13f6_0111_1681_a000
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_13fe_1600_1601_0002 =
+	{0x1601, 0x0002, pci_subsys_13fe_1600_1601_0002, 0};
+#undef pci_ss_info_1601_0002
+#define pci_ss_info_1601_0002 pci_ss_info_13fe_1600_1601_0002
+static const pciSubsystemInfo pci_ss_info_13fe_1600_1602_0002 =
+	{0x1602, 0x0002, pci_subsys_13fe_1600_1602_0002, 0};
+#undef pci_ss_info_1602_0002
+#define pci_ss_info_1602_0002 pci_ss_info_13fe_1600_1602_0002
+static const pciSubsystemInfo pci_ss_info_13fe_1600_1612_0004 =
+	{0x1612, 0x0004, pci_subsys_13fe_1600_1612_0004, 0};
+#undef pci_ss_info_1612_0004
+#define pci_ss_info_1612_0004 pci_ss_info_13fe_1600_1612_0004
+static const pciSubsystemInfo pci_ss_info_13fe_16ff_1601_0000 =
+	{0x1601, 0x0000, pci_subsys_13fe_16ff_1601_0000, 0};
+#undef pci_ss_info_1601_0000
+#define pci_ss_info_1601_0000 pci_ss_info_13fe_16ff_1601_0000
+static const pciSubsystemInfo pci_ss_info_13fe_16ff_1602_0000 =
+	{0x1602, 0x0000, pci_subsys_13fe_16ff_1602_0000, 0};
+#undef pci_ss_info_1602_0000
+#define pci_ss_info_1602_0000 pci_ss_info_13fe_16ff_1602_0000
+static const pciSubsystemInfo pci_ss_info_13fe_16ff_1612_0000 =
+	{0x1612, 0x0000, pci_subsys_13fe_16ff_1612_0000, 0};
+#undef pci_ss_info_1612_0000
+#define pci_ss_info_1612_0000 pci_ss_info_13fe_16ff_1612_0000
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1412_1712_1412_1712 =
 	{0x1412, 0x1712, pci_subsys_1412_1712_1412_1712, 0};
 #undef pci_ss_info_1412_1712
@@ -35348,8 +39961,28 @@
 	{0x270f, 0xf645, pci_subsys_1412_1724_270f_f645, 0};
 #undef pci_ss_info_270f_f645
 #define pci_ss_info_270f_f645 pci_ss_info_1412_1724_270f_f645
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1412_1724_3136_4154 =
+	{0x3136, 0x4154, pci_subsys_1412_1724_3136_4154, 0};
+#undef pci_ss_info_3136_4154
+#define pci_ss_info_3136_4154 pci_ss_info_1412_1724_3136_4154
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1415_9501_12c4_0201 =
+	{0x12c4, 0x0201, pci_subsys_1415_9501_12c4_0201, 0};
+#undef pci_ss_info_12c4_0201
+#define pci_ss_info_12c4_0201 pci_ss_info_1415_9501_12c4_0201
+static const pciSubsystemInfo pci_ss_info_1415_9501_12c4_0202 =
+	{0x12c4, 0x0202, pci_subsys_1415_9501_12c4_0202, 0};
+#undef pci_ss_info_12c4_0202
+#define pci_ss_info_12c4_0202 pci_ss_info_1415_9501_12c4_0202
+static const pciSubsystemInfo pci_ss_info_1415_9501_12c4_0203 =
+	{0x12c4, 0x0203, pci_subsys_1415_9501_12c4_0203, 0};
+#undef pci_ss_info_12c4_0203
+#define pci_ss_info_12c4_0203 pci_ss_info_1415_9501_12c4_0203
+static const pciSubsystemInfo pci_ss_info_1415_9501_12c4_0210 =
+	{0x12c4, 0x0210, pci_subsys_1415_9501_12c4_0210, 0};
+#undef pci_ss_info_12c4_0210
+#define pci_ss_info_12c4_0210 pci_ss_info_1415_9501_12c4_0210
 static const pciSubsystemInfo pci_ss_info_1415_9501_131f_2050 =
 	{0x131f, 0x2050, pci_subsys_1415_9501_131f_2050, 0};
 #undef pci_ss_info_131f_2050
@@ -35366,6 +39999,14 @@
 	{0x15ed, 0x2001, pci_subsys_1415_9501_15ed_2001, 0};
 #undef pci_ss_info_15ed_2001
 #define pci_ss_info_15ed_2001 pci_ss_info_1415_9501_15ed_2001
+static const pciSubsystemInfo pci_ss_info_1415_9510_12c4_0200 =
+	{0x12c4, 0x0200, pci_subsys_1415_9510_12c4_0200, 0};
+#undef pci_ss_info_12c4_0200
+#define pci_ss_info_12c4_0200 pci_ss_info_1415_9510_12c4_0200
+static const pciSubsystemInfo pci_ss_info_1415_9511_12c4_0211 =
+	{0x12c4, 0x0211, pci_subsys_1415_9511_12c4_0211, 0};
+#undef pci_ss_info_12c4_0211
+#define pci_ss_info_12c4_0211 pci_ss_info_1415_9511_12c4_0211
 static const pciSubsystemInfo pci_ss_info_1415_9511_15ed_2000 =
 	{0x15ed, 0x2000, pci_subsys_1415_9511_15ed_2000, 0};
 #undef pci_ss_info_15ed_2000
@@ -35376,6 +40017,24 @@
 #define pci_ss_info_15ed_2001 pci_ss_info_1415_9511_15ed_2001
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14c1_8043_103c_1240 =
+	{0x103c, 0x1240, pci_subsys_14c1_8043_103c_1240, 0};
+#undef pci_ss_info_103c_1240
+#define pci_ss_info_103c_1240 pci_ss_info_14c1_8043_103c_1240
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_1600_103c_3015 =
+	{0x103c, 0x3015, pci_subsys_14e4_1600_103c_3015, 0};
+#undef pci_ss_info_103c_3015
+#define pci_ss_info_103c_3015 pci_ss_info_14e4_1600_103c_3015
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_14e4_1600_107b_5048 =
+	{0x107b, 0x5048, pci_subsys_14e4_1600_107b_5048, 0};
+#undef pci_ss_info_107b_5048
+#define pci_ss_info_107b_5048 pci_ss_info_14e4_1600_107b_5048
 static const pciSubsystemInfo pci_ss_info_14e4_1644_1014_0277 =
 	{0x1014, 0x0277, pci_subsys_14e4_1644_1014_0277, 0};
 #undef pci_ss_info_1014_0277
@@ -35646,6 +40305,22 @@
 #undef pci_ss_info_0e11_00d1
 #define pci_ss_info_0e11_00d1 pci_ss_info_14e4_1648_0e11_00d1
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_14e4_1648_10a9_8013 =
+	{0x10a9, 0x8013, pci_subsys_14e4_1648_10a9_8013, 0};
+#undef pci_ss_info_10a9_8013
+#define pci_ss_info_10a9_8013 pci_ss_info_14e4_1648_10a9_8013
+static const pciSubsystemInfo pci_ss_info_14e4_1648_10a9_8018 =
+	{0x10a9, 0x8018, pci_subsys_14e4_1648_10a9_8018, 0};
+#undef pci_ss_info_10a9_8018
+#define pci_ss_info_10a9_8018 pci_ss_info_14e4_1648_10a9_8018
+static const pciSubsystemInfo pci_ss_info_14e4_1648_10a9_801a =
+	{0x10a9, 0x801a, pci_subsys_14e4_1648_10a9_801a, 0};
+#undef pci_ss_info_10a9_801a
+#define pci_ss_info_10a9_801a pci_ss_info_14e4_1648_10a9_801a
+static const pciSubsystemInfo pci_ss_info_14e4_1648_10a9_801b =
+	{0x10a9, 0x801b, pci_subsys_14e4_1648_10a9_801b, 0};
+#undef pci_ss_info_10a9_801b
+#define pci_ss_info_10a9_801b pci_ss_info_14e4_1648_10a9_801b
 static const pciSubsystemInfo pci_ss_info_14e4_1648_10b7_2000 =
 	{0x10b7, 0x2000, pci_subsys_14e4_1648_10b7_2000, 0};
 #undef pci_ss_info_10b7_2000
@@ -35663,12 +40338,30 @@
 #undef pci_ss_info_1734_100b
 #define pci_ss_info_1734_100b pci_ss_info_14e4_1648_1734_100b
 #endif
+static const pciSubsystemInfo pci_ss_info_14e4_164a_103c_3070 =
+	{0x103c, 0x3070, pci_subsys_14e4_164a_103c_3070, 0};
+#undef pci_ss_info_103c_3070
+#define pci_ss_info_103c_3070 pci_ss_info_14e4_164a_103c_3070
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 static const pciSubsystemInfo pci_ss_info_14e4_164a_103c_3101 =
 	{0x103c, 0x3101, pci_subsys_14e4_164a_103c_3101, 0};
 #undef pci_ss_info_103c_3101
 #define pci_ss_info_103c_3101 pci_ss_info_14e4_164a_103c_3101
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
+static const pciSubsystemInfo pci_ss_info_14e4_164c_103c_7037 =
+	{0x103c, 0x7037, pci_subsys_14e4_164c_103c_7037, 0};
+#undef pci_ss_info_103c_7037
+#define pci_ss_info_103c_7037 pci_ss_info_14e4_164c_103c_7037
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_164c_103c_7038 =
+	{0x103c, 0x7038, pci_subsys_14e4_164c_103c_7038, 0};
+#undef pci_ss_info_103c_7038
+#define pci_ss_info_103c_7038 pci_ss_info_14e4_164c_103c_7038
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 static const pciSubsystemInfo pci_ss_info_14e4_1653_0e11_00e3 =
 	{0x0e11, 0x00e3, pci_subsys_14e4_1653_0e11_00e3, 0};
 #undef pci_ss_info_0e11_00e3
@@ -35713,6 +40406,18 @@
 #undef pci_ss_info_1734_1061
 #define pci_ss_info_1734_1061 pci_ss_info_14e4_1659_1734_1061
 #endif
+static const pciSubsystemInfo pci_ss_info_14e4_165a_103c_7051 =
+	{0x103c, 0x7051, pci_subsys_14e4_165a_103c_7051, 0};
+#undef pci_ss_info_103c_7051
+#define pci_ss_info_103c_7051 pci_ss_info_14e4_165a_103c_7051
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_165a_103c_7052 =
+	{0x103c, 0x7052, pci_subsys_14e4_165a_103c_7052, 0};
+#undef pci_ss_info_103c_7052
+#define pci_ss_info_103c_7052 pci_ss_info_14e4_165a_103c_7052
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 static const pciSubsystemInfo pci_ss_info_14e4_165d_1028_865d =
 	{0x1028, 0x865d, pci_subsys_14e4_165d_1028_865d, 0};
 #undef pci_ss_info_1028_865d
@@ -35736,6 +40441,10 @@
 #undef pci_ss_info_103c_099c
 #define pci_ss_info_103c_099c pci_ss_info_14e4_165e_103c_099c
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_14e4_165e_10cf_1279 =
+	{0x10cf, 0x1279, pci_subsys_14e4_165e_10cf_1279, 0};
+#undef pci_ss_info_10cf_1279
+#define pci_ss_info_10cf_1279 pci_ss_info_14e4_165e_10cf_1279
 #endif
 static const pciSubsystemInfo pci_ss_info_14e4_1668_103c_7039 =
 	{0x103c, 0x7039, pci_subsys_14e4_1668_103c_7039, 0};
@@ -35755,16 +40464,50 @@
 #define pci_ss_info_1028_0182 pci_ss_info_14e4_1677_1028_0182
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
+static const pciSubsystemInfo pci_ss_info_14e4_1677_1028_0187 =
+	{0x1028, 0x0187, pci_subsys_14e4_1677_1028_0187, 0};
+#undef pci_ss_info_1028_0187
+#define pci_ss_info_1028_0187 pci_ss_info_14e4_1677_1028_0187
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 static const pciSubsystemInfo pci_ss_info_14e4_1677_1028_01ad =
 	{0x1028, 0x01ad, pci_subsys_14e4_1677_1028_01ad, 0};
 #undef pci_ss_info_1028_01ad
 #define pci_ss_info_1028_01ad pci_ss_info_14e4_1677_1028_01ad
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_1677_103c_3006 =
+	{0x103c, 0x3006, pci_subsys_14e4_1677_103c_3006, 0};
+#undef pci_ss_info_103c_3006
+#define pci_ss_info_103c_3006 pci_ss_info_14e4_1677_103c_3006
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_14e4_1677_1734_105d =
 	{0x1734, 0x105d, pci_subsys_14e4_1677_1734_105d, 0};
 #undef pci_ss_info_1734_105d
 #define pci_ss_info_1734_105d pci_ss_info_14e4_1677_1734_105d
 #endif
+static const pciSubsystemInfo pci_ss_info_14e4_1679_103c_1707 =
+	{0x103c, 0x1707, pci_subsys_14e4_1679_103c_1707, 0};
+#undef pci_ss_info_103c_1707
+#define pci_ss_info_103c_1707 pci_ss_info_14e4_1679_103c_1707
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_1679_103c_170c =
+	{0x103c, 0x170c, pci_subsys_14e4_1679_103c_170c, 0};
+#undef pci_ss_info_103c_170c
+#define pci_ss_info_103c_170c pci_ss_info_14e4_1679_103c_170c
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_1679_103c_703c =
+	{0x103c, 0x703c, pci_subsys_14e4_1679_103c_703c, 0};
+#undef pci_ss_info_103c_703c
+#define pci_ss_info_103c_703c pci_ss_info_14e4_1679_103c_703c
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_14e4_167d_17aa_2081 =
+	{0x17aa, 0x2081, pci_subsys_14e4_167d_17aa_2081, 0};
+#undef pci_ss_info_17aa_2081
+#define pci_ss_info_17aa_2081 pci_ss_info_14e4_167d_17aa_2081
+#endif
 static const pciSubsystemInfo pci_ss_info_14e4_1696_103c_12bc =
 	{0x103c, 0x12bc, pci_subsys_14e4_1696_103c_12bc, 0};
 #undef pci_ss_info_103c_12bc
@@ -35781,6 +40524,12 @@
 #define pci_ss_info_103c_308b pci_ss_info_14e4_169c_103c_308b
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
+static const pciSubsystemInfo pci_ss_info_14e4_169c_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_14e4_169c_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_14e4_169c_103c_30a1
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 static const pciSubsystemInfo pci_ss_info_14e4_16a6_0e11_00bb =
 	{0x0e11, 0x00bb, pci_subsys_14e4_16a6_0e11_00bb, 0};
 #undef pci_ss_info_0e11_00bb
@@ -35828,6 +40577,14 @@
 	{0x14e4, 0x800a, pci_subsys_14e4_16a7_14e4_800a, 0};
 #undef pci_ss_info_14e4_800a
 #define pci_ss_info_14e4_800a pci_ss_info_14e4_16a7_14e4_800a
+static const pciSubsystemInfo pci_ss_info_14e4_16a8_10a9_8014 =
+	{0x10a9, 0x8014, pci_subsys_14e4_16a8_10a9_8014, 0};
+#undef pci_ss_info_10a9_8014
+#define pci_ss_info_10a9_8014 pci_ss_info_14e4_16a8_10a9_8014
+static const pciSubsystemInfo pci_ss_info_14e4_16a8_10a9_801c =
+	{0x10a9, 0x801c, pci_subsys_14e4_16a8_10a9_801c, 0};
+#undef pci_ss_info_10a9_801c
+#define pci_ss_info_10a9_801c pci_ss_info_14e4_16a8_10a9_801c
 static const pciSubsystemInfo pci_ss_info_14e4_16a8_10b7_2001 =
 	{0x10b7, 0x2001, pci_subsys_14e4_16a8_10b7_2001, 0};
 #undef pci_ss_info_10b7_2001
@@ -35838,6 +40595,30 @@
 #undef pci_ss_info_103c_3102
 #define pci_ss_info_103c_3102 pci_ss_info_14e4_16aa_103c_3102
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_16ac_103c_1706 =
+	{0x103c, 0x1706, pci_subsys_14e4_16ac_103c_1706, 0};
+#undef pci_ss_info_103c_1706
+#define pci_ss_info_103c_1706 pci_ss_info_14e4_16ac_103c_1706
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_16ac_103c_7038 =
+	{0x103c, 0x7038, pci_subsys_14e4_16ac_103c_7038, 0};
+#undef pci_ss_info_103c_7038
+#define pci_ss_info_103c_7038 pci_ss_info_14e4_16ac_103c_7038
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_16ac_103c_703b =
+	{0x103c, 0x703b, pci_subsys_14e4_16ac_103c_703b, 0};
+#undef pci_ss_info_103c_703b
+#define pci_ss_info_103c_703b pci_ss_info_14e4_16ac_103c_703b
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_16ac_103c_703d =
+	{0x103c, 0x703d, pci_subsys_14e4_16ac_103c_703d, 0};
+#undef pci_ss_info_103c_703d
+#define pci_ss_info_103c_703d pci_ss_info_14e4_16ac_103c_703d
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_14e4_16c6_10b7_1100 =
 	{0x10b7, 0x1100, pci_subsys_14e4_16c6_10b7_1100, 0};
 #undef pci_ss_info_10b7_1100
@@ -35895,6 +40676,12 @@
 #define pci_ss_info_1028_0196 pci_ss_info_14e4_170c_1028_0196
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
+static const pciSubsystemInfo pci_ss_info_14e4_170c_1028_01af =
+	{0x1028, 0x01af, pci_subsys_14e4_170c_1028_01af, 0};
+#undef pci_ss_info_1028_01af
+#define pci_ss_info_1028_01af pci_ss_info_14e4_170c_1028_01af
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 static const pciSubsystemInfo pci_ss_info_14e4_170c_103c_099c =
 	{0x103c, 0x099c, pci_subsys_14e4_170c_103c_099c, 0};
 #undef pci_ss_info_103c_099c
@@ -35920,6 +40707,10 @@
 #undef pci_ss_info_103c_1356
 #define pci_ss_info_103c_1356 pci_ss_info_14e4_4318_103c_1356
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_14e4_4318_1043_120f =
+	{0x1043, 0x120f, pci_subsys_14e4_4318_1043_120f, 0};
+#undef pci_ss_info_1043_120f
+#define pci_ss_info_1043_120f pci_ss_info_14e4_4318_1043_120f
 static const pciSubsystemInfo pci_ss_info_14e4_4318_1468_0311 =
 	{0x1468, 0x0311, pci_subsys_14e4_4318_1468_0311, 0};
 #undef pci_ss_info_1468_0311
@@ -35940,6 +40731,10 @@
 	{0x16ec, 0x0119, pci_subsys_14e4_4318_16ec_0119, 0};
 #undef pci_ss_info_16ec_0119
 #define pci_ss_info_16ec_0119 pci_ss_info_14e4_4318_16ec_0119
+static const pciSubsystemInfo pci_ss_info_14e4_4318_1737_0048 =
+	{0x1737, 0x0048, pci_subsys_14e4_4318_1737_0048, 0};
+#undef pci_ss_info_1737_0048
+#define pci_ss_info_1737_0048 pci_ss_info_14e4_4318_1737_0048
 #endif
 static const pciSubsystemInfo pci_ss_info_14e4_4320_1028_0001 =
 	{0x1028, 0x0001, pci_subsys_14e4_4320_1028_0001, 0};
@@ -35978,10 +40773,18 @@
 	{0x106b, 0x004e, pci_subsys_14e4_4320_106b_004e, 0};
 #undef pci_ss_info_106b_004e
 #define pci_ss_info_106b_004e pci_ss_info_14e4_4320_106b_004e
+static const pciSubsystemInfo pci_ss_info_14e4_4320_1154_0330 =
+	{0x1154, 0x0330, pci_subsys_14e4_4320_1154_0330, 0};
+#undef pci_ss_info_1154_0330
+#define pci_ss_info_1154_0330 pci_ss_info_14e4_4320_1154_0330
 static const pciSubsystemInfo pci_ss_info_14e4_4320_144f_7050 =
 	{0x144f, 0x7050, pci_subsys_14e4_4320_144f_7050, 0};
 #undef pci_ss_info_144f_7050
 #define pci_ss_info_144f_7050 pci_ss_info_14e4_4320_144f_7050
+static const pciSubsystemInfo pci_ss_info_14e4_4320_144f_7051 =
+	{0x144f, 0x7051, pci_subsys_14e4_4320_144f_7051, 0};
+#undef pci_ss_info_144f_7051
+#define pci_ss_info_144f_7051 pci_ss_info_14e4_4320_144f_7051
 static const pciSubsystemInfo pci_ss_info_14e4_4320_14e4_4320 =
 	{0x14e4, 0x4320, pci_subsys_14e4_4320_14e4_4320, 0};
 #undef pci_ss_info_14e4_4320
@@ -35998,6 +40801,10 @@
 	{0x1799, 0x7010, pci_subsys_14e4_4320_1799_7010, 0};
 #undef pci_ss_info_1799_7010
 #define pci_ss_info_1799_7010 pci_ss_info_14e4_4320_1799_7010
+static const pciSubsystemInfo pci_ss_info_14e4_4320_1799_7011 =
+	{0x1799, 0x7011, pci_subsys_14e4_4320_1799_7011, 0};
+#undef pci_ss_info_1799_7011
+#define pci_ss_info_1799_7011 pci_ss_info_14e4_4320_1799_7011
 static const pciSubsystemInfo pci_ss_info_14e4_4320_185f_1220 =
 	{0x185f, 0x1220, pci_subsys_14e4_4320_185f_1220, 0};
 #undef pci_ss_info_185f_1220
@@ -36022,6 +40829,12 @@
 	{0x1414, 0x0004, pci_subsys_14e4_4325_1414_0004, 0};
 #undef pci_ss_info_1414_0004
 #define pci_ss_info_1414_0004 pci_ss_info_14e4_4325_1414_0004
+#endif
+static const pciSubsystemInfo pci_ss_info_14e4_4401_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_14e4_4401_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_14e4_4401_103c_08b0
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_14e4_4401_1043_80a8 =
 	{0x1043, 0x80a8, pci_subsys_14e4_4401_1043_80a8, 0};
 #undef pci_ss_info_1043_80a8
@@ -36254,6 +41067,12 @@
 #undef pci_ss_info_104d_8097
 #define pci_ss_info_104d_8097 pci_ss_info_14f1_2443_104d_8097
 #ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
+static const pciSubsystemInfo pci_ss_info_14f1_2bfa_1025_0009 =
+	{0x1025, 0x0009, pci_subsys_14f1_2bfa_1025_0009, 0};
+#undef pci_ss_info_1025_0009
+#define pci_ss_info_1025_0009 pci_ss_info_14f1_2bfa_1025_0009
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_14f1_2f00_13e0_8d84 =
 	{0x13e0, 0x8d84, pci_subsys_14f1_2f00_13e0_8d84, 0};
 #undef pci_ss_info_13e0_8d84
@@ -36603,6 +41422,12 @@
 #define pci_ss_info_103c_006a pci_ss_info_1524_0510_103c_006a
 #ifdef VENDOR_INCLUDE_NONVIDEO
 #endif
+static const pciSubsystemInfo pci_ss_info_1524_1410_1025_003c =
+	{0x1025, 0x003c, pci_subsys_1524_1410_1025_003c, 0};
+#undef pci_ss_info_1025_003c
+#define pci_ss_info_1025_003c pci_ss_info_1524_1410_1025_003c
+#ifdef VENDOR_INCLUDE_NONVIDEO
+#endif
 static const pciSubsystemInfo pci_ss_info_1524_1410_1025_005a =
 	{0x1025, 0x005a, pci_subsys_1524_1410_1025_005a, 0};
 #undef pci_ss_info_1025_005a
@@ -36658,10 +41483,18 @@
 	{0x1186, 0x3a63, pci_subsys_168c_0013_1186_3a63, 0};
 #undef pci_ss_info_1186_3a63
 #define pci_ss_info_1186_3a63 pci_ss_info_168c_0013_1186_3a63
+static const pciSubsystemInfo pci_ss_info_168c_0013_1186_3a93 =
+	{0x1186, 0x3a93, pci_subsys_168c_0013_1186_3a93, 0};
+#undef pci_ss_info_1186_3a93
+#define pci_ss_info_1186_3a93 pci_ss_info_168c_0013_1186_3a93
 static const pciSubsystemInfo pci_ss_info_168c_0013_1186_3a94 =
 	{0x1186, 0x3a94, pci_subsys_168c_0013_1186_3a94, 0};
 #undef pci_ss_info_1186_3a94
 #define pci_ss_info_1186_3a94 pci_ss_info_168c_0013_1186_3a94
+static const pciSubsystemInfo pci_ss_info_168c_0013_1186_3ab0 =
+	{0x1186, 0x3ab0, pci_subsys_168c_0013_1186_3ab0, 0};
+#undef pci_ss_info_1186_3ab0
+#define pci_ss_info_1186_3ab0 pci_ss_info_168c_0013_1186_3ab0
 static const pciSubsystemInfo pci_ss_info_168c_0013_1385_4d00 =
 	{0x1385, 0x4d00, pci_subsys_168c_0013_1385_4d00, 0};
 #undef pci_ss_info_1385_4d00
@@ -36674,6 +41507,10 @@
 	{0x14b7, 0x0a60, pci_subsys_168c_0013_14b7_0a60, 0};
 #undef pci_ss_info_14b7_0a60
 #define pci_ss_info_14b7_0a60 pci_ss_info_168c_0013_14b7_0a60
+static const pciSubsystemInfo pci_ss_info_168c_0013_1668_1026 =
+	{0x1668, 0x1026, pci_subsys_168c_0013_1668_1026, 0};
+#undef pci_ss_info_1668_1026
+#define pci_ss_info_1668_1026 pci_ss_info_168c_0013_1668_1026
 static const pciSubsystemInfo pci_ss_info_168c_0013_168c_0013 =
 	{0x168c, 0x0013, pci_subsys_168c_0013_168c_0013, 0};
 #undef pci_ss_info_168c_0013
@@ -36686,6 +41523,10 @@
 	{0x168c, 0x1027, pci_subsys_168c_0013_168c_1027, 0};
 #undef pci_ss_info_168c_1027
 #define pci_ss_info_168c_1027 pci_ss_info_168c_0013_168c_1027
+static const pciSubsystemInfo pci_ss_info_168c_0013_168c_1042 =
+	{0x168c, 0x1042, pci_subsys_168c_0013_168c_1042, 0};
+#undef pci_ss_info_168c_1042
+#define pci_ss_info_168c_1042 pci_ss_info_168c_0013_168c_1042
 static const pciSubsystemInfo pci_ss_info_168c_0013_168c_2026 =
 	{0x168c, 0x2026, pci_subsys_168c_0013_168c_2026, 0};
 #undef pci_ss_info_168c_2026
@@ -36698,10 +41539,38 @@
 	{0x168c, 0x2042, pci_subsys_168c_0013_168c_2042, 0};
 #undef pci_ss_info_168c_2042
 #define pci_ss_info_168c_2042 pci_ss_info_168c_0013_168c_2042
+static const pciSubsystemInfo pci_ss_info_168c_0013_168c_2051 =
+	{0x168c, 0x2051, pci_subsys_168c_0013_168c_2051, 0};
+#undef pci_ss_info_168c_2051
+#define pci_ss_info_168c_2051 pci_ss_info_168c_0013_168c_2051
 static const pciSubsystemInfo pci_ss_info_168c_0013_16ab_7302 =
 	{0x16ab, 0x7302, pci_subsys_168c_0013_16ab_7302, 0};
 #undef pci_ss_info_16ab_7302
 #define pci_ss_info_16ab_7302 pci_ss_info_168c_0013_16ab_7302
+static const pciSubsystemInfo pci_ss_info_168c_0013_17cf_0042 =
+	{0x17cf, 0x0042, pci_subsys_168c_0013_17cf_0042, 0};
+#undef pci_ss_info_17cf_0042
+#define pci_ss_info_17cf_0042 pci_ss_info_168c_0013_17cf_0042
+static const pciSubsystemInfo pci_ss_info_168c_0013_185f_1012 =
+	{0x185f, 0x1012, pci_subsys_168c_0013_185f_1012, 0};
+#undef pci_ss_info_185f_1012
+#define pci_ss_info_185f_1012 pci_ss_info_168c_0013_185f_1012
+static const pciSubsystemInfo pci_ss_info_168c_0013_185f_2012 =
+	{0x185f, 0x2012, pci_subsys_168c_0013_185f_2012, 0};
+#undef pci_ss_info_185f_2012
+#define pci_ss_info_185f_2012 pci_ss_info_168c_0013_185f_2012
+static const pciSubsystemInfo pci_ss_info_168c_001a_1052_168c =
+	{0x1052, 0x168c, pci_subsys_168c_001a_1052_168c, 0};
+#undef pci_ss_info_1052_168c
+#define pci_ss_info_1052_168c pci_ss_info_168c_001a_1052_168c
+static const pciSubsystemInfo pci_ss_info_168c_001a_1113_ee20 =
+	{0x1113, 0xee20, pci_subsys_168c_001a_1113_ee20, 0};
+#undef pci_ss_info_1113_ee20
+#define pci_ss_info_1113_ee20 pci_ss_info_168c_001a_1113_ee20
+static const pciSubsystemInfo pci_ss_info_168c_001a_1113_ee24 =
+	{0x1113, 0xee24, pci_subsys_168c_001a_1113_ee24, 0};
+#undef pci_ss_info_1113_ee24
+#define pci_ss_info_1113_ee24 pci_ss_info_168c_001a_1113_ee24
 static const pciSubsystemInfo pci_ss_info_168c_001a_1186_3a15 =
 	{0x1186, 0x3a15, pci_subsys_168c_001a_1186_3a15, 0};
 #undef pci_ss_info_1186_3a15
@@ -36718,10 +41587,22 @@
 	{0x1186, 0x3a24, pci_subsys_168c_001a_1186_3a24, 0};
 #undef pci_ss_info_1186_3a24
 #define pci_ss_info_1186_3a24 pci_ss_info_168c_001a_1186_3a24
+static const pciSubsystemInfo pci_ss_info_168c_001a_1186_3b08 =
+	{0x1186, 0x3b08, pci_subsys_168c_001a_1186_3b08, 0};
+#undef pci_ss_info_1186_3b08
+#define pci_ss_info_1186_3b08 pci_ss_info_168c_001a_1186_3b08
+static const pciSubsystemInfo pci_ss_info_168c_001a_168c_001a =
+	{0x168c, 0x001a, pci_subsys_168c_001a_168c_001a, 0};
+#undef pci_ss_info_168c_001a
+#define pci_ss_info_168c_001a pci_ss_info_168c_001a_168c_001a
 static const pciSubsystemInfo pci_ss_info_168c_001a_168c_1052 =
 	{0x168c, 0x1052, pci_subsys_168c_001a_168c_1052, 0};
 #undef pci_ss_info_168c_1052
 #define pci_ss_info_168c_1052 pci_ss_info_168c_001a_168c_1052
+static const pciSubsystemInfo pci_ss_info_168c_001a_168c_2052 =
+	{0x168c, 0x2052, pci_subsys_168c_001a_168c_2052, 0};
+#undef pci_ss_info_168c_2052
+#define pci_ss_info_168c_2052 pci_ss_info_168c_001a_168c_2052
 static const pciSubsystemInfo pci_ss_info_168c_001b_1186_3a19 =
 	{0x1186, 0x3a19, pci_subsys_168c_001b_1186_3a19, 0};
 #undef pci_ss_info_1186_3a19
@@ -36730,6 +41611,30 @@
 	{0x1186, 0x3a22, pci_subsys_168c_001b_1186_3a22, 0};
 #undef pci_ss_info_1186_3a22
 #define pci_ss_info_1186_3a22 pci_ss_info_168c_001b_1186_3a22
+static const pciSubsystemInfo pci_ss_info_168c_001b_1458_e901 =
+	{0x1458, 0xe901, pci_subsys_168c_001b_1458_e901, 0};
+#undef pci_ss_info_1458_e901
+#define pci_ss_info_1458_e901 pci_ss_info_168c_001b_1458_e901
+static const pciSubsystemInfo pci_ss_info_168c_001b_168c_001b =
+	{0x168c, 0x001b, pci_subsys_168c_001b_168c_001b, 0};
+#undef pci_ss_info_168c_001b
+#define pci_ss_info_168c_001b pci_ss_info_168c_001b_168c_001b
+static const pciSubsystemInfo pci_ss_info_168c_001b_168c_2062 =
+	{0x168c, 0x2062, pci_subsys_168c_001b_168c_2062, 0};
+#undef pci_ss_info_168c_2062
+#define pci_ss_info_168c_2062 pci_ss_info_168c_001b_168c_2062
+static const pciSubsystemInfo pci_ss_info_168c_001b_168c_2063 =
+	{0x168c, 0x2063, pci_subsys_168c_001b_168c_2063, 0};
+#undef pci_ss_info_168c_2063
+#define pci_ss_info_168c_2063 pci_ss_info_168c_001b_168c_2063
+static const pciSubsystemInfo pci_ss_info_168c_001b_a727_6804 =
+	{0xa727, 0x6804, pci_subsys_168c_001b_a727_6804, 0};
+#undef pci_ss_info_a727_6804
+#define pci_ss_info_a727_6804 pci_ss_info_168c_001b_a727_6804
+static const pciSubsystemInfo pci_ss_info_168c_1014_1014_058a =
+	{0x1014, 0x058a, pci_subsys_168c_1014_1014_058a, 0};
+#undef pci_ss_info_1014_058a
+#define pci_ss_info_1014_058a pci_ss_info_168c_1014_1014_058a
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_1737_1032_1737_0015 =
@@ -36758,6 +41663,18 @@
 #undef pci_ss_info_103c_12d5
 #define pci_ss_info_103c_12d5 pci_ss_info_17d5_5831_103c_12d5
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_17d5_5831_10a9_8020 =
+	{0x10a9, 0x8020, pci_subsys_17d5_5831_10a9_8020, 0};
+#undef pci_ss_info_10a9_8020
+#define pci_ss_info_10a9_8020 pci_ss_info_17d5_5831_10a9_8020
+static const pciSubsystemInfo pci_ss_info_17d5_5831_10a9_8024 =
+	{0x10a9, 0x8024, pci_subsys_17d5_5831_10a9_8024, 0};
+#undef pci_ss_info_10a9_8024
+#define pci_ss_info_10a9_8024 pci_ss_info_17d5_5831_10a9_8024
+static const pciSubsystemInfo pci_ss_info_17d5_5832_10a9_8021 =
+	{0x10a9, 0x8021, pci_subsys_17d5_5832_10a9_8021, 0};
+#undef pci_ss_info_10a9_8021
+#define pci_ss_info_10a9_8021 pci_ss_info_17d5_5832_10a9_8021
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_17fe_2220_17fe_2220 =
@@ -36828,10 +41745,34 @@
 	{0x185f, 0x22a0, pci_subsys_1814_0201_185f_22a0, 0};
 #undef pci_ss_info_185f_22a0
 #define pci_ss_info_185f_22a0 pci_ss_info_1814_0201_185f_22a0
-static const pciSubsystemInfo pci_ss_info_1814_0301_2561_1814 =
-	{0x2561, 0x1814, pci_subsys_1814_0301_2561_1814, 0};
-#undef pci_ss_info_2561_1814
-#define pci_ss_info_2561_1814 pci_ss_info_1814_0301_2561_1814
+static const pciSubsystemInfo pci_ss_info_1814_0301_1186_3c08 =
+	{0x1186, 0x3c08, pci_subsys_1814_0301_1186_3c08, 0};
+#undef pci_ss_info_1186_3c08
+#define pci_ss_info_1186_3c08 pci_ss_info_1814_0301_1186_3c08
+static const pciSubsystemInfo pci_ss_info_1814_0301_1186_3c09 =
+	{0x1186, 0x3c09, pci_subsys_1814_0301_1186_3c09, 0};
+#undef pci_ss_info_1186_3c09
+#define pci_ss_info_1186_3c09 pci_ss_info_1814_0301_1186_3c09
+static const pciSubsystemInfo pci_ss_info_1814_0301_1458_e934 =
+	{0x1458, 0xe934, pci_subsys_1814_0301_1458_e934, 0};
+#undef pci_ss_info_1458_e934
+#define pci_ss_info_1458_e934 pci_ss_info_1814_0301_1458_e934
+static const pciSubsystemInfo pci_ss_info_1814_0301_1737_0055 =
+	{0x1737, 0x0055, pci_subsys_1814_0301_1737_0055, 0};
+#undef pci_ss_info_1737_0055
+#define pci_ss_info_1737_0055 pci_ss_info_1814_0301_1737_0055
+static const pciSubsystemInfo pci_ss_info_1814_0302_1186_3c08 =
+	{0x1186, 0x3c08, pci_subsys_1814_0302_1186_3c08, 0};
+#undef pci_ss_info_1186_3c08
+#define pci_ss_info_1186_3c08 pci_ss_info_1814_0302_1186_3c08
+static const pciSubsystemInfo pci_ss_info_1814_0302_1186_3c09 =
+	{0x1186, 0x3c09, pci_subsys_1814_0302_1186_3c09, 0};
+#undef pci_ss_info_1186_3c09
+#define pci_ss_info_1186_3c09 pci_ss_info_1814_0302_1186_3c09
+static const pciSubsystemInfo pci_ss_info_1814_0302_1462_b834 =
+	{0x1462, 0xb834, pci_subsys_1814_0302_1462_b834, 0};
+#undef pci_ss_info_1462_b834
+#define pci_ss_info_1462_b834 pci_ss_info_1814_0302_1462_b834
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo pci_ss_info_18ec_c006_18ec_d001 =
@@ -36868,6 +41809,26 @@
 #define pci_ss_info_18ec_d004 pci_ss_info_18ec_c058_18ec_d004
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_1971_1011_1043_0001 =
+	{0x1043, 0x0001, pci_subsys_1971_1011_1043_0001, 0};
+#undef pci_ss_info_1043_0001
+#define pci_ss_info_1043_0001 pci_ss_info_1971_1011_1043_0001
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_197b_2361_1462_7235 =
+	{0x1462, 0x7235, pci_subsys_197b_2361_1462_7235, 0};
+#undef pci_ss_info_1462_7235
+#define pci_ss_info_1462_7235 pci_ss_info_197b_2361_1462_7235
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo pci_ss_info_3388_0021_1775_c200 =
+	{0x1775, 0xc200, pci_subsys_3388_0021_1775_c200, 0};
+#undef pci_ss_info_1775_c200
+#define pci_ss_info_1775_c200 pci_ss_info_3388_0021_1775_c200
+static const pciSubsystemInfo pci_ss_info_3388_0021_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_3388_0021_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_3388_0021_1775_ce90
 static const pciSubsystemInfo pci_ss_info_3388_0021_4c53_1050 =
 	{0x4c53, 0x1050, pci_subsys_3388_0021_4c53_1050, 0};
 #undef pci_ss_info_4c53_1050
@@ -37038,10 +41999,22 @@
 	{0x0070, 0xe817, pci_subsys_4444_0016_0070_e817, 0};
 #undef pci_ss_info_0070_e817
 #define pci_ss_info_0070_e817 pci_ss_info_4444_0016_0070_e817
+static const pciSubsystemInfo pci_ss_info_4444_0016_0070_ff92 =
+	{0x0070, 0xff92, pci_subsys_4444_0016_0070_ff92, 0};
+#undef pci_ss_info_0070_ff92
+#define pci_ss_info_0070_ff92 pci_ss_info_4444_0016_0070_ff92
 static const pciSubsystemInfo pci_ss_info_4444_0016_0270_0801 =
 	{0x0270, 0x0801, pci_subsys_4444_0016_0270_0801, 0};
 #undef pci_ss_info_0270_0801
 #define pci_ss_info_0270_0801 pci_ss_info_4444_0016_0270_0801
+static const pciSubsystemInfo pci_ss_info_4444_0016_10fc_d038 =
+	{0x10fc, 0xd038, pci_subsys_4444_0016_10fc_d038, 0};
+#undef pci_ss_info_10fc_d038
+#define pci_ss_info_10fc_d038 pci_ss_info_4444_0016_10fc_d038
+static const pciSubsystemInfo pci_ss_info_4444_0016_10fc_d039 =
+	{0x10fc, 0xd039, pci_subsys_4444_0016_10fc_d039, 0};
+#undef pci_ss_info_10fc_d039
+#define pci_ss_info_10fc_d039 pci_ss_info_4444_0016_10fc_d039
 static const pciSubsystemInfo pci_ss_info_4444_0016_12ab_fff3 =
 	{0x12ab, 0xfff3, pci_subsys_4444_0016_12ab_fff3, 0};
 #undef pci_ss_info_12ab_fff3
@@ -37050,10 +42023,10 @@
 	{0x12ab, 0xffff, pci_subsys_4444_0016_12ab_ffff, 0};
 #undef pci_ss_info_12ab_ffff
 #define pci_ss_info_12ab_ffff pci_ss_info_4444_0016_12ab_ffff
-static const pciSubsystemInfo pci_ss_info_4444_0016_4070_8801 =
-	{0x4070, 0x8801, pci_subsys_4444_0016_4070_8801, 0};
-#undef pci_ss_info_4070_8801
-#define pci_ss_info_4070_8801 pci_ss_info_4444_0016_4070_8801
+static const pciSubsystemInfo pci_ss_info_4444_0016_1461_c019 =
+	{0x1461, 0xc019, pci_subsys_4444_0016_1461_c019, 0};
+#undef pci_ss_info_1461_c019
+#define pci_ss_info_1461_c019 pci_ss_info_4444_0016_1461_c019
 static const pciSubsystemInfo pci_ss_info_4444_0016_9005_0092 =
 	{0x9005, 0x0092, pci_subsys_4444_0016_9005_0092, 0};
 #undef pci_ss_info_9005_0092
@@ -37062,10 +42035,6 @@
 	{0x9005, 0x0093, pci_subsys_4444_0016_9005_0093, 0};
 #undef pci_ss_info_9005_0093
 #define pci_ss_info_9005_0093 pci_ss_info_4444_0016_9005_0093
-static const pciSubsystemInfo pci_ss_info_4444_0016_ff92_0070 =
-	{0xff92, 0x0070, pci_subsys_4444_0016_ff92_0070, 0};
-#undef pci_ss_info_ff92_0070
-#define pci_ss_info_ff92_0070 pci_ss_info_4444_0016_ff92_0070
 static const pciSubsystemInfo pci_ss_info_4444_0803_0070_4000 =
 	{0x0070, 0x4000, pci_subsys_4444_0803_0070_4000, 0};
 #undef pci_ss_info_0070_4000
@@ -37123,6 +42092,10 @@
 	{0x1014, 0x00db, pci_subsys_5333_8904_1014_00db, 0};
 #undef pci_ss_info_1014_00db
 #define pci_ss_info_1014_00db pci_ss_info_5333_8904_1014_00db
+static const pciSubsystemInfo pci_ss_info_5333_8904_4843_314a =
+	{0x4843, 0x314a, pci_subsys_5333_8904_4843_314a, 0};
+#undef pci_ss_info_4843_314a
+#define pci_ss_info_4843_314a pci_ss_info_5333_8904_4843_314a
 static const pciSubsystemInfo pci_ss_info_5333_8904_5333_8904 =
 	{0x5333, 0x8904, pci_subsys_5333_8904_5333_8904, 0};
 #undef pci_ss_info_5333_8904
@@ -37479,14 +42452,14 @@
 	{0x1014, 0x026a, pci_subsys_8086_100e_1014_026a, 0};
 #undef pci_ss_info_1014_026a
 #define pci_ss_info_1014_026a pci_ss_info_8086_100e_1014_026a
-static const pciSubsystemInfo pci_ss_info_8086_100e_1024_0134 =
-	{0x1024, 0x0134, pci_subsys_8086_100e_1024_0134, 0};
-#undef pci_ss_info_1024_0134
-#define pci_ss_info_1024_0134 pci_ss_info_8086_100e_1024_0134
 static const pciSubsystemInfo pci_ss_info_8086_100e_1028_002e =
 	{0x1028, 0x002e, pci_subsys_8086_100e_1028_002e, 0};
 #undef pci_ss_info_1028_002e
 #define pci_ss_info_1028_002e pci_ss_info_8086_100e_1028_002e
+static const pciSubsystemInfo pci_ss_info_8086_100e_1028_0134 =
+	{0x1028, 0x0134, pci_subsys_8086_100e_1028_0134, 0};
+#undef pci_ss_info_1028_0134
+#define pci_ss_info_1028_0134 pci_ss_info_8086_100e_1028_0134
 static const pciSubsystemInfo pci_ss_info_8086_100e_1028_0151 =
 	{0x1028, 0x0151, pci_subsys_8086_100e_1028_0151, 0};
 #undef pci_ss_info_1028_0151
@@ -37599,6 +42572,18 @@
 	{0x8086, 0x1113, pci_subsys_8086_1013_8086_1113, 0};
 #undef pci_ss_info_8086_1113
 #define pci_ss_info_8086_1113 pci_ss_info_8086_1013_8086_1113
+static const pciSubsystemInfo pci_ss_info_8086_1014_8086_0014 =
+	{0x8086, 0x0014, pci_subsys_8086_1014_8086_0014, 0};
+#undef pci_ss_info_8086_0014
+#define pci_ss_info_8086_0014 pci_ss_info_8086_1014_8086_0014
+static const pciSubsystemInfo pci_ss_info_8086_1014_8086_1014 =
+	{0x8086, 0x1014, pci_subsys_8086_1014_8086_1014, 0};
+#undef pci_ss_info_8086_1014
+#define pci_ss_info_8086_1014 pci_ss_info_8086_1014_8086_1014
+static const pciSubsystemInfo pci_ss_info_8086_1015_8086_1015 =
+	{0x8086, 0x1015, pci_subsys_8086_1015_8086_1015, 0};
+#undef pci_ss_info_8086_1015
+#define pci_ss_info_8086_1015 pci_ss_info_8086_1015_8086_1015
 static const pciSubsystemInfo pci_ss_info_8086_1016_1014_052c =
 	{0x1014, 0x052c, pci_subsys_8086_1016_1014_052c, 0};
 #undef pci_ss_info_1014_052c
@@ -37635,10 +42620,18 @@
 	{0x8086, 0x301f, pci_subsys_8086_1019_8086_301f, 0};
 #undef pci_ss_info_8086_301f
 #define pci_ss_info_8086_301f pci_ss_info_8086_1019_8086_301f
+static const pciSubsystemInfo pci_ss_info_8086_1019_8086_302c =
+	{0x8086, 0x302c, pci_subsys_8086_1019_8086_302c, 0};
+#undef pci_ss_info_8086_302c
+#define pci_ss_info_8086_302c pci_ss_info_8086_1019_8086_302c
 static const pciSubsystemInfo pci_ss_info_8086_1019_8086_3427 =
 	{0x8086, 0x3427, pci_subsys_8086_1019_8086_3427, 0};
 #undef pci_ss_info_8086_3427
 #define pci_ss_info_8086_3427 pci_ss_info_8086_1019_8086_3427
+static const pciSubsystemInfo pci_ss_info_8086_101a_8086_101a =
+	{0x8086, 0x101a, pci_subsys_8086_101a_8086_101a, 0};
+#undef pci_ss_info_8086_101a
+#define pci_ss_info_8086_101a pci_ss_info_8086_101a_8086_101a
 static const pciSubsystemInfo pci_ss_info_8086_101d_8086_1000 =
 	{0x8086, 0x1000, pci_subsys_8086_101d_8086_1000, 0};
 #undef pci_ss_info_8086_1000
@@ -37671,6 +42664,10 @@
 	{0x8086, 0x1002, pci_subsys_8086_1026_8086_1002, 0};
 #undef pci_ss_info_8086_1002
 #define pci_ss_info_8086_1002 pci_ss_info_8086_1026_8086_1002
+static const pciSubsystemInfo pci_ss_info_8086_1026_8086_1003 =
+	{0x8086, 0x1003, pci_subsys_8086_1026_8086_1003, 0};
+#undef pci_ss_info_8086_1003
+#define pci_ss_info_8086_1003 pci_ss_info_8086_1026_8086_1003
 static const pciSubsystemInfo pci_ss_info_8086_1026_8086_1026 =
 	{0x8086, 0x1026, pci_subsys_8086_1026_8086_1026, 0};
 #undef pci_ss_info_8086_1026
@@ -37707,6 +42704,10 @@
 	{0x104d, 0x80e7, pci_subsys_8086_1031_104d_80e7, 0};
 #undef pci_ss_info_104d_80e7
 #define pci_ss_info_104d_80e7 pci_ss_info_8086_1031_104d_80e7
+static const pciSubsystemInfo pci_ss_info_8086_1031_104d_813c =
+	{0x104d, 0x813c, pci_subsys_8086_1031_104d_813c, 0};
+#undef pci_ss_info_104d_813c
+#define pci_ss_info_104d_813c pci_ss_info_8086_1031_104d_813c
 static const pciSubsystemInfo pci_ss_info_8086_1031_107b_5350 =
 	{0x107b, 0x5350, pci_subsys_8086_1031_107b_5350, 0};
 #undef pci_ss_info_107b_5350
@@ -37731,10 +42732,6 @@
 	{0x144d, 0xc006, pci_subsys_8086_1031_144d_c006, 0};
 #undef pci_ss_info_144d_c006
 #define pci_ss_info_144d_c006 pci_ss_info_8086_1031_144d_c006
-static const pciSubsystemInfo pci_ss_info_8086_1031_813c_104d =
-	{0x813c, 0x104d, pci_subsys_8086_1031_813c_104d, 0};
-#undef pci_ss_info_813c_104d
-#define pci_ss_info_813c_104d pci_ss_info_8086_1031_813c_104d
 static const pciSubsystemInfo pci_ss_info_8086_1038_0e11_0098 =
 	{0x0e11, 0x0098, pci_subsys_8086_1038_0e11_0098, 0};
 #undef pci_ss_info_0e11_0098
@@ -37743,14 +42740,30 @@
 	{0x1014, 0x0267, pci_subsys_8086_1039_1014_0267, 0};
 #undef pci_ss_info_1014_0267
 #define pci_ss_info_1014_0267 pci_ss_info_8086_1039_1014_0267
+static const pciSubsystemInfo pci_ss_info_8086_103d_1014_0522 =
+	{0x1014, 0x0522, pci_subsys_8086_103d_1014_0522, 0};
+#undef pci_ss_info_1014_0522
+#define pci_ss_info_1014_0522 pci_ss_info_8086_103d_1014_0522
 static const pciSubsystemInfo pci_ss_info_8086_1040_16be_1040 =
 	{0x16be, 0x1040, pci_subsys_8086_1040_16be_1040, 0};
 #undef pci_ss_info_16be_1040
 #define pci_ss_info_16be_1040 pci_ss_info_8086_1040_16be_1040
+static const pciSubsystemInfo pci_ss_info_8086_1043_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_8086_1043_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_8086_1043_103c_08b0
+static const pciSubsystemInfo pci_ss_info_8086_1043_8086_2522 =
+	{0x8086, 0x2522, pci_subsys_8086_1043_8086_2522, 0};
+#undef pci_ss_info_8086_2522
+#define pci_ss_info_8086_2522 pci_ss_info_8086_1043_8086_2522
 static const pciSubsystemInfo pci_ss_info_8086_1043_8086_2527 =
 	{0x8086, 0x2527, pci_subsys_8086_1043_8086_2527, 0};
 #undef pci_ss_info_8086_2527
 #define pci_ss_info_8086_2527 pci_ss_info_8086_1043_8086_2527
+static const pciSubsystemInfo pci_ss_info_8086_1043_8086_2581 =
+	{0x8086, 0x2581, pci_subsys_8086_1043_8086_2581, 0};
+#undef pci_ss_info_8086_2581
+#define pci_ss_info_8086_2581 pci_ss_info_8086_1043_8086_2581
 static const pciSubsystemInfo pci_ss_info_8086_1048_8086_a01f =
 	{0x8086, 0xa01f, pci_subsys_8086_1048_8086_a01f, 0};
 #undef pci_ss_info_8086_a01f
@@ -37779,10 +42792,62 @@
 	{0x8086, 0x3427, pci_subsys_8086_1050_8086_3427, 0};
 #undef pci_ss_info_8086_3427
 #define pci_ss_info_8086_3427 pci_ss_info_8086_1050_8086_3427
+static const pciSubsystemInfo pci_ss_info_8086_105e_103c_7044 =
+	{0x103c, 0x7044, pci_subsys_8086_105e_103c_7044, 0};
+#undef pci_ss_info_103c_7044
+#define pci_ss_info_103c_7044 pci_ss_info_8086_105e_103c_7044
 static const pciSubsystemInfo pci_ss_info_8086_105e_1775_6003 =
 	{0x1775, 0x6003, pci_subsys_8086_105e_1775_6003, 0};
 #undef pci_ss_info_1775_6003
 #define pci_ss_info_1775_6003 pci_ss_info_8086_105e_1775_6003
+static const pciSubsystemInfo pci_ss_info_8086_105e_8086_005e =
+	{0x8086, 0x005e, pci_subsys_8086_105e_8086_005e, 0};
+#undef pci_ss_info_8086_005e
+#define pci_ss_info_8086_005e pci_ss_info_8086_105e_8086_005e
+static const pciSubsystemInfo pci_ss_info_8086_105e_8086_105e =
+	{0x8086, 0x105e, pci_subsys_8086_105e_8086_105e, 0};
+#undef pci_ss_info_8086_105e
+#define pci_ss_info_8086_105e pci_ss_info_8086_105e_8086_105e
+static const pciSubsystemInfo pci_ss_info_8086_105e_8086_115e =
+	{0x8086, 0x115e, pci_subsys_8086_105e_8086_115e, 0};
+#undef pci_ss_info_8086_115e
+#define pci_ss_info_8086_115e pci_ss_info_8086_105e_8086_115e
+static const pciSubsystemInfo pci_ss_info_8086_105e_8086_116e =
+	{0x8086, 0x116e, pci_subsys_8086_105e_8086_116e, 0};
+#undef pci_ss_info_8086_116e
+#define pci_ss_info_8086_116e pci_ss_info_8086_105e_8086_116e
+static const pciSubsystemInfo pci_ss_info_8086_105e_8086_125e =
+	{0x8086, 0x125e, pci_subsys_8086_105e_8086_125e, 0};
+#undef pci_ss_info_8086_125e
+#define pci_ss_info_8086_125e pci_ss_info_8086_105e_8086_125e
+static const pciSubsystemInfo pci_ss_info_8086_105e_8086_135e =
+	{0x8086, 0x135e, pci_subsys_8086_105e_8086_135e, 0};
+#undef pci_ss_info_8086_135e
+#define pci_ss_info_8086_135e pci_ss_info_8086_105e_8086_135e
+static const pciSubsystemInfo pci_ss_info_8086_105f_8086_115f =
+	{0x8086, 0x115f, pci_subsys_8086_105f_8086_115f, 0};
+#undef pci_ss_info_8086_115f
+#define pci_ss_info_8086_115f pci_ss_info_8086_105f_8086_115f
+static const pciSubsystemInfo pci_ss_info_8086_105f_8086_116f =
+	{0x8086, 0x116f, pci_subsys_8086_105f_8086_116f, 0};
+#undef pci_ss_info_8086_116f
+#define pci_ss_info_8086_116f pci_ss_info_8086_105f_8086_116f
+static const pciSubsystemInfo pci_ss_info_8086_105f_8086_125f =
+	{0x8086, 0x125f, pci_subsys_8086_105f_8086_125f, 0};
+#undef pci_ss_info_8086_125f
+#define pci_ss_info_8086_125f pci_ss_info_8086_105f_8086_125f
+static const pciSubsystemInfo pci_ss_info_8086_105f_8086_135f =
+	{0x8086, 0x135f, pci_subsys_8086_105f_8086_135f, 0};
+#undef pci_ss_info_8086_135f
+#define pci_ss_info_8086_135f pci_ss_info_8086_105f_8086_135f
+static const pciSubsystemInfo pci_ss_info_8086_1060_8086_0060 =
+	{0x8086, 0x0060, pci_subsys_8086_1060_8086_0060, 0};
+#undef pci_ss_info_8086_0060
+#define pci_ss_info_8086_0060 pci_ss_info_8086_1060_8086_0060
+static const pciSubsystemInfo pci_ss_info_8086_1060_8086_1060 =
+	{0x8086, 0x1060, pci_subsys_8086_1060_8086_1060, 0};
+#undef pci_ss_info_8086_1060
+#define pci_ss_info_8086_1060 pci_ss_info_8086_1060_8086_1060
 static const pciSubsystemInfo pci_ss_info_8086_1064_1043_80f8 =
 	{0x1043, 0x80f8, pci_subsys_8086_1064_1043_80f8, 0};
 #undef pci_ss_info_1043_80f8
@@ -37847,6 +42912,14 @@
 	{0x103c, 0x12cf, pci_subsys_8086_1079_103c_12cf, 0};
 #undef pci_ss_info_103c_12cf
 #define pci_ss_info_103c_12cf pci_ss_info_8086_1079_103c_12cf
+static const pciSubsystemInfo pci_ss_info_8086_1079_1775_10d0 =
+	{0x1775, 0x10d0, pci_subsys_8086_1079_1775_10d0, 0};
+#undef pci_ss_info_1775_10d0
+#define pci_ss_info_1775_10d0 pci_ss_info_8086_1079_1775_10d0
+static const pciSubsystemInfo pci_ss_info_8086_1079_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_1079_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_1079_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_1079_1fc1_0027 =
 	{0x1fc1, 0x0027, pci_subsys_8086_1079_1fc1_0027, 0};
 #undef pci_ss_info_1fc1_0027
@@ -37895,6 +42968,102 @@
 	{0x8086, 0x107b, pci_subsys_8086_107b_8086_107b, 0};
 #undef pci_ss_info_8086_107b
 #define pci_ss_info_8086_107b pci_ss_info_8086_107b_8086_107b
+static const pciSubsystemInfo pci_ss_info_8086_107c_8086_1376 =
+	{0x8086, 0x1376, pci_subsys_8086_107c_8086_1376, 0};
+#undef pci_ss_info_8086_1376
+#define pci_ss_info_8086_1376 pci_ss_info_8086_107c_8086_1376
+static const pciSubsystemInfo pci_ss_info_8086_107c_8086_1476 =
+	{0x8086, 0x1476, pci_subsys_8086_107c_8086_1476, 0};
+#undef pci_ss_info_8086_1476
+#define pci_ss_info_8086_1476 pci_ss_info_8086_107c_8086_1476
+static const pciSubsystemInfo pci_ss_info_8086_107d_8086_1082 =
+	{0x8086, 0x1082, pci_subsys_8086_107d_8086_1082, 0};
+#undef pci_ss_info_8086_1082
+#define pci_ss_info_8086_1082 pci_ss_info_8086_107d_8086_1082
+static const pciSubsystemInfo pci_ss_info_8086_107d_8086_1092 =
+	{0x8086, 0x1092, pci_subsys_8086_107d_8086_1092, 0};
+#undef pci_ss_info_8086_1092
+#define pci_ss_info_8086_1092 pci_ss_info_8086_107d_8086_1092
+static const pciSubsystemInfo pci_ss_info_8086_107e_8086_1084 =
+	{0x8086, 0x1084, pci_subsys_8086_107e_8086_1084, 0};
+#undef pci_ss_info_8086_1084
+#define pci_ss_info_8086_1084 pci_ss_info_8086_107e_8086_1084
+static const pciSubsystemInfo pci_ss_info_8086_107e_8086_1094 =
+	{0x8086, 0x1094, pci_subsys_8086_107e_8086_1094, 0};
+#undef pci_ss_info_8086_1094
+#define pci_ss_info_8086_1094 pci_ss_info_8086_107e_8086_1094
+static const pciSubsystemInfo pci_ss_info_8086_108a_8086_108a =
+	{0x8086, 0x108a, pci_subsys_8086_108a_8086_108a, 0};
+#undef pci_ss_info_8086_108a
+#define pci_ss_info_8086_108a pci_ss_info_8086_108a_8086_108a
+static const pciSubsystemInfo pci_ss_info_8086_108a_8086_118a =
+	{0x8086, 0x118a, pci_subsys_8086_108a_8086_118a, 0};
+#undef pci_ss_info_8086_118a
+#define pci_ss_info_8086_118a pci_ss_info_8086_108a_8086_118a
+static const pciSubsystemInfo pci_ss_info_8086_1099_8086_1099 =
+	{0x8086, 0x1099, pci_subsys_8086_1099_8086_1099, 0};
+#undef pci_ss_info_8086_1099
+#define pci_ss_info_8086_1099 pci_ss_info_8086_1099_8086_1099
+static const pciSubsystemInfo pci_ss_info_8086_109a_1179_ff10 =
+	{0x1179, 0xff10, pci_subsys_8086_109a_1179_ff10, 0};
+#undef pci_ss_info_1179_ff10
+#define pci_ss_info_1179_ff10 pci_ss_info_8086_109a_1179_ff10
+static const pciSubsystemInfo pci_ss_info_8086_109a_17aa_2001 =
+	{0x17aa, 0x2001, pci_subsys_8086_109a_17aa_2001, 0};
+#undef pci_ss_info_17aa_2001
+#define pci_ss_info_17aa_2001 pci_ss_info_8086_109a_17aa_2001
+static const pciSubsystemInfo pci_ss_info_8086_109a_17aa_207e =
+	{0x17aa, 0x207e, pci_subsys_8086_109a_17aa_207e, 0};
+#undef pci_ss_info_17aa_207e
+#define pci_ss_info_17aa_207e pci_ss_info_8086_109a_17aa_207e
+static const pciSubsystemInfo pci_ss_info_8086_109a_8086_109a =
+	{0x8086, 0x109a, pci_subsys_8086_109a_8086_109a, 0};
+#undef pci_ss_info_8086_109a
+#define pci_ss_info_8086_109a pci_ss_info_8086_109a_8086_109a
+static const pciSubsystemInfo pci_ss_info_8086_109e_8086_a01f =
+	{0x8086, 0xa01f, pci_subsys_8086_109e_8086_a01f, 0};
+#undef pci_ss_info_8086_a01f
+#define pci_ss_info_8086_a01f pci_ss_info_8086_109e_8086_a01f
+static const pciSubsystemInfo pci_ss_info_8086_109e_8086_a11f =
+	{0x8086, 0xa11f, pci_subsys_8086_109e_8086_a11f, 0};
+#undef pci_ss_info_8086_a11f
+#define pci_ss_info_8086_a11f pci_ss_info_8086_109e_8086_a11f
+static const pciSubsystemInfo pci_ss_info_8086_10a4_8086_10a4 =
+	{0x8086, 0x10a4, pci_subsys_8086_10a4_8086_10a4, 0};
+#undef pci_ss_info_8086_10a4
+#define pci_ss_info_8086_10a4 pci_ss_info_8086_10a4_8086_10a4
+static const pciSubsystemInfo pci_ss_info_8086_10a4_8086_11a4 =
+	{0x8086, 0x11a4, pci_subsys_8086_10a4_8086_11a4, 0};
+#undef pci_ss_info_8086_11a4
+#define pci_ss_info_8086_11a4 pci_ss_info_8086_10a4_8086_11a4
+static const pciSubsystemInfo pci_ss_info_8086_10b5_103c_3109 =
+	{0x103c, 0x3109, pci_subsys_8086_10b5_103c_3109, 0};
+#undef pci_ss_info_103c_3109
+#define pci_ss_info_103c_3109 pci_ss_info_8086_10b5_103c_3109
+static const pciSubsystemInfo pci_ss_info_8086_10b5_8086_1099 =
+	{0x8086, 0x1099, pci_subsys_8086_10b5_8086_1099, 0};
+#undef pci_ss_info_8086_1099
+#define pci_ss_info_8086_1099 pci_ss_info_8086_10b5_8086_1099
+static const pciSubsystemInfo pci_ss_info_8086_10b5_8086_1199 =
+	{0x8086, 0x1199, pci_subsys_8086_10b5_8086_1199, 0};
+#undef pci_ss_info_8086_1199
+#define pci_ss_info_8086_1199 pci_ss_info_8086_10b5_8086_1199
+static const pciSubsystemInfo pci_ss_info_8086_10b9_8086_1083 =
+	{0x8086, 0x1083, pci_subsys_8086_10b9_8086_1083, 0};
+#undef pci_ss_info_8086_1083
+#define pci_ss_info_8086_1083 pci_ss_info_8086_10b9_8086_1083
+static const pciSubsystemInfo pci_ss_info_8086_10b9_8086_1093 =
+	{0x8086, 0x1093, pci_subsys_8086_10b9_8086_1093, 0};
+#undef pci_ss_info_8086_1093
+#define pci_ss_info_8086_1093 pci_ss_info_8086_10b9_8086_1093
+static const pciSubsystemInfo pci_ss_info_8086_10bc_8086_10bc =
+	{0x8086, 0x10bc, pci_subsys_8086_10bc_8086_10bc, 0};
+#undef pci_ss_info_8086_10bc
+#define pci_ss_info_8086_10bc pci_ss_info_8086_10bc_8086_10bc
+static const pciSubsystemInfo pci_ss_info_8086_10bc_8086_11bc =
+	{0x8086, 0x11bc, pci_subsys_8086_10bc_8086_11bc, 0};
+#undef pci_ss_info_8086_11bc
+#define pci_ss_info_8086_11bc pci_ss_info_8086_10bc_8086_11bc
 static const pciSubsystemInfo pci_ss_info_8086_1130_1025_1016 =
 	{0x1025, 0x1016, pci_subsys_8086_1130_1025_1016, 0};
 #undef pci_ss_info_1025_1016
@@ -38227,6 +43396,10 @@
 	{0x1668, 0x1100, pci_subsys_8086_1229_1668_1100, 0};
 #undef pci_ss_info_1668_1100
 #define pci_ss_info_1668_1100 pci_ss_info_8086_1229_1668_1100
+static const pciSubsystemInfo pci_ss_info_8086_1229_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_1229_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_1229_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_1229_4c53_1080 =
 	{0x4c53, 0x1080, pci_subsys_8086_1229_4c53_1080, 0};
 #undef pci_ss_info_4c53_1080
@@ -38267,6 +43440,10 @@
 	{0x8086, 0x0008, pci_subsys_8086_1229_8086_0008, 0};
 #undef pci_ss_info_8086_0008
 #define pci_ss_info_8086_0008 pci_ss_info_8086_1229_8086_0008
+static const pciSubsystemInfo pci_ss_info_8086_1229_8086_0009 =
+	{0x8086, 0x0009, pci_subsys_8086_1229_8086_0009, 0};
+#undef pci_ss_info_8086_0009
+#define pci_ss_info_8086_0009 pci_ss_info_8086_1229_8086_0009
 static const pciSubsystemInfo pci_ss_info_8086_1229_8086_000a =
 	{0x8086, 0x000a, pci_subsys_8086_1229_8086_000a, 0};
 #undef pci_ss_info_8086_000a
@@ -38567,6 +43744,10 @@
 	{0x8086, 0x3012, pci_subsys_8086_1229_8086_3012, 0};
 #undef pci_ss_info_8086_3012
 #define pci_ss_info_8086_3012 pci_ss_info_8086_1229_8086_3012
+static const pciSubsystemInfo pci_ss_info_8086_1229_8086_301a =
+	{0x8086, 0x301a, pci_subsys_8086_1229_8086_301a, 0};
+#undef pci_ss_info_8086_301a
+#define pci_ss_info_8086_301a pci_ss_info_8086_1229_8086_301a
 static const pciSubsystemInfo pci_ss_info_8086_1229_8086_3411 =
 	{0x8086, 0x3411, pci_subsys_8086_1229_8086_3411, 0};
 #undef pci_ss_info_8086_3411
@@ -38691,6 +43872,14 @@
 	{0x1028, 0x010e, pci_subsys_8086_1a30_1028_010e, 0};
 #undef pci_ss_info_1028_010e
 #define pci_ss_info_1028_010e pci_ss_info_8086_1a30_1028_010e
+static const pciSubsystemInfo pci_ss_info_8086_1b48_8086_a01f =
+	{0x8086, 0xa01f, pci_subsys_8086_1b48_8086_a01f, 0};
+#undef pci_ss_info_8086_a01f
+#define pci_ss_info_8086_a01f pci_ss_info_8086_1b48_8086_a01f
+static const pciSubsystemInfo pci_ss_info_8086_1b48_8086_a11f =
+	{0x8086, 0xa11f, pci_subsys_8086_1b48_8086_a11f, 0};
+#undef pci_ss_info_8086_a11f
+#define pci_ss_info_8086_a11f pci_ss_info_8086_1b48_8086_a11f
 static const pciSubsystemInfo pci_ss_info_8086_2415_1028_0095 =
 	{0x1028, 0x0095, pci_subsys_8086_2415_1028_0095, 0};
 #undef pci_ss_info_1028_0095
@@ -38723,6 +43912,10 @@
 	{0x11d4, 0x0048, pci_subsys_8086_2425_11d4_0048, 0};
 #undef pci_ss_info_11d4_0048
 #define pci_ss_info_11d4_0048 pci_ss_info_8086_2425_11d4_0048
+static const pciSubsystemInfo pci_ss_info_8086_2440_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_8086_2440_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_2440_8086_5744
 static const pciSubsystemInfo pci_ss_info_8086_2442_1014_01c6 =
 	{0x1014, 0x01c6, pci_subsys_8086_2442_1014_01c6, 0};
 #undef pci_ss_info_1014_01c6
@@ -38731,6 +43924,10 @@
 	{0x1025, 0x1016, pci_subsys_8086_2442_1025_1016, 0};
 #undef pci_ss_info_1025_1016
 #define pci_ss_info_1025_1016 pci_ss_info_8086_2442_1025_1016
+static const pciSubsystemInfo pci_ss_info_8086_2442_1028_00c7 =
+	{0x1028, 0x00c7, pci_subsys_8086_2442_1028_00c7, 0};
+#undef pci_ss_info_1028_00c7
+#define pci_ss_info_1028_00c7 pci_ss_info_8086_2442_1028_00c7
 static const pciSubsystemInfo pci_ss_info_8086_2442_1028_010e =
 	{0x1028, 0x010e, pci_subsys_8086_2442_1028_010e, 0};
 #undef pci_ss_info_1028_010e
@@ -38755,6 +43952,10 @@
 	{0x8086, 0x4557, pci_subsys_8086_2442_8086_4557, 0};
 #undef pci_ss_info_8086_4557
 #define pci_ss_info_8086_4557 pci_ss_info_8086_2442_8086_4557
+static const pciSubsystemInfo pci_ss_info_8086_2442_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_8086_2442_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_2442_8086_5744
 static const pciSubsystemInfo pci_ss_info_8086_2443_1014_01c6 =
 	{0x1014, 0x01c6, pci_subsys_8086_2443_1014_01c6, 0};
 #undef pci_ss_info_1014_01c6
@@ -38763,6 +43964,10 @@
 	{0x1025, 0x1016, pci_subsys_8086_2443_1025_1016, 0};
 #undef pci_ss_info_1025_1016
 #define pci_ss_info_1025_1016 pci_ss_info_8086_2443_1025_1016
+static const pciSubsystemInfo pci_ss_info_8086_2443_1028_00c7 =
+	{0x1028, 0x00c7, pci_subsys_8086_2443_1028_00c7, 0};
+#undef pci_ss_info_1028_00c7
+#define pci_ss_info_1028_00c7 pci_ss_info_8086_2443_1028_00c7
 static const pciSubsystemInfo pci_ss_info_8086_2443_1028_010e =
 	{0x1028, 0x010e, pci_subsys_8086_2443_1028_010e, 0};
 #undef pci_ss_info_1028_010e
@@ -38787,10 +43992,18 @@
 	{0x8086, 0x4557, pci_subsys_8086_2443_8086_4557, 0};
 #undef pci_ss_info_8086_4557
 #define pci_ss_info_8086_4557 pci_ss_info_8086_2443_8086_4557
+static const pciSubsystemInfo pci_ss_info_8086_2443_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_8086_2443_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_2443_8086_5744
 static const pciSubsystemInfo pci_ss_info_8086_2444_1025_1016 =
 	{0x1025, 0x1016, pci_subsys_8086_2444_1025_1016, 0};
 #undef pci_ss_info_1025_1016
 #define pci_ss_info_1025_1016 pci_ss_info_8086_2444_1025_1016
+static const pciSubsystemInfo pci_ss_info_8086_2444_1028_00c7 =
+	{0x1028, 0x00c7, pci_subsys_8086_2444_1028_00c7, 0};
+#undef pci_ss_info_1028_00c7
+#define pci_ss_info_1028_00c7 pci_ss_info_8086_2444_1028_00c7
 static const pciSubsystemInfo pci_ss_info_8086_2444_1028_010e =
 	{0x1028, 0x010e, pci_subsys_8086_2444_1028_010e, 0};
 #undef pci_ss_info_1028_010e
@@ -38811,6 +44024,18 @@
 	{0x8086, 0x4532, pci_subsys_8086_2444_8086_4532, 0};
 #undef pci_ss_info_8086_4532
 #define pci_ss_info_8086_4532 pci_ss_info_8086_2444_8086_4532
+static const pciSubsystemInfo pci_ss_info_8086_2444_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_8086_2444_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_2444_8086_5744
+static const pciSubsystemInfo pci_ss_info_8086_2445_0e11_000b =
+	{0x0e11, 0x000b, pci_subsys_8086_2445_0e11_000b, 0};
+#undef pci_ss_info_0e11_000b
+#define pci_ss_info_0e11_000b pci_ss_info_8086_2445_0e11_000b
+static const pciSubsystemInfo pci_ss_info_8086_2445_0e11_0088 =
+	{0x0e11, 0x0088, pci_subsys_8086_2445_0e11_0088, 0};
+#undef pci_ss_info_0e11_0088
+#define pci_ss_info_0e11_0088 pci_ss_info_8086_2445_0e11_0088
 static const pciSubsystemInfo pci_ss_info_8086_2445_1014_01c6 =
 	{0x1014, 0x01c6, pci_subsys_8086_2445_1014_01c6, 0};
 #undef pci_ss_info_1014_01c6
@@ -38847,6 +44072,10 @@
 	{0x103c, 0x099c, pci_subsys_8086_2448_103c_099c, 0};
 #undef pci_ss_info_103c_099c
 #define pci_ss_info_103c_099c pci_ss_info_8086_2448_103c_099c
+static const pciSubsystemInfo pci_ss_info_8086_2448_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_2448_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_2448_144d_c00c
 static const pciSubsystemInfo pci_ss_info_8086_2448_1734_1055 =
 	{0x1734, 0x1055, pci_subsys_8086_2448_1734_1055, 0};
 #undef pci_ss_info_1734_1055
@@ -38983,6 +44212,10 @@
 	{0x1014, 0x01c6, pci_subsys_8086_244b_1014_01c6, 0};
 #undef pci_ss_info_1014_01c6
 #define pci_ss_info_1014_01c6 pci_ss_info_8086_244b_1014_01c6
+static const pciSubsystemInfo pci_ss_info_8086_244b_1028_00c7 =
+	{0x1028, 0x00c7, pci_subsys_8086_244b_1028_00c7, 0};
+#undef pci_ss_info_1028_00c7
+#define pci_ss_info_1028_00c7 pci_ss_info_8086_244b_1028_00c7
 static const pciSubsystemInfo pci_ss_info_8086_244b_1028_010e =
 	{0x1028, 0x010e, pci_subsys_8086_244b_1028_010e, 0};
 #undef pci_ss_info_1028_010e
@@ -39003,6 +44236,10 @@
 	{0x8086, 0x4557, pci_subsys_8086_244b_8086_4557, 0};
 #undef pci_ss_info_8086_4557
 #define pci_ss_info_8086_4557 pci_ss_info_8086_244b_8086_4557
+static const pciSubsystemInfo pci_ss_info_8086_244b_8086_5744 =
+	{0x8086, 0x5744, pci_subsys_8086_244b_8086_5744, 0};
+#undef pci_ss_info_8086_5744
+#define pci_ss_info_8086_5744 pci_ss_info_8086_244b_8086_5744
 static const pciSubsystemInfo pci_ss_info_8086_244e_1014_0267 =
 	{0x1014, 0x0267, pci_subsys_8086_244e_1014_0267, 0};
 #undef pci_ss_info_1014_0267
@@ -39183,6 +44420,10 @@
 	{0x1014, 0x0267, pci_subsys_8086_24c2_1014_0267, 0};
 #undef pci_ss_info_1014_0267
 #define pci_ss_info_1014_0267 pci_ss_info_8086_24c2_1014_0267
+static const pciSubsystemInfo pci_ss_info_8086_24c2_1014_052d =
+	{0x1014, 0x052d, pci_subsys_8086_24c2_1014_052d, 0};
+#undef pci_ss_info_1014_052d
+#define pci_ss_info_1014_052d pci_ss_info_8086_24c2_1014_052d
 static const pciSubsystemInfo pci_ss_info_8086_24c2_1025_005a =
 	{0x1025, 0x005a, pci_subsys_8086_24c2_1025_005a, 0};
 #undef pci_ss_info_1025_005a
@@ -39207,10 +44448,18 @@
 	{0x103c, 0x0890, pci_subsys_8086_24c2_103c_0890, 0};
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_8086_24c2_103c_0890
+static const pciSubsystemInfo pci_ss_info_8086_24c2_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_8086_24c2_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_8086_24c2_103c_08b0
 static const pciSubsystemInfo pci_ss_info_8086_24c2_1071_8160 =
 	{0x1071, 0x8160, pci_subsys_8086_24c2_1071_8160, 0};
 #undef pci_ss_info_1071_8160
 #define pci_ss_info_1071_8160 pci_ss_info_8086_24c2_1071_8160
+static const pciSubsystemInfo pci_ss_info_8086_24c2_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_24c2_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_24c2_144d_c00c
 static const pciSubsystemInfo pci_ss_info_8086_24c2_1462_5800 =
 	{0x1462, 0x5800, pci_subsys_8086_24c2_1462_5800, 0};
 #undef pci_ss_info_1462_5800
@@ -39219,6 +44468,10 @@
 	{0x1509, 0x2990, pci_subsys_8086_24c2_1509_2990, 0};
 #undef pci_ss_info_1509_2990
 #define pci_ss_info_1509_2990 pci_ss_info_8086_24c2_1509_2990
+static const pciSubsystemInfo pci_ss_info_8086_24c2_1734_1004 =
+	{0x1734, 0x1004, pci_subsys_8086_24c2_1734_1004, 0};
+#undef pci_ss_info_1734_1004
+#define pci_ss_info_1734_1004 pci_ss_info_8086_24c2_1734_1004
 static const pciSubsystemInfo pci_ss_info_8086_24c2_1734_1055 =
 	{0x1734, 0x1055, pci_subsys_8086_24c2_1734_1055, 0};
 #undef pci_ss_info_1734_1055
@@ -39231,10 +44484,22 @@
 	{0x8086, 0x4541, pci_subsys_8086_24c2_8086_4541, 0};
 #undef pci_ss_info_8086_4541
 #define pci_ss_info_8086_4541 pci_ss_info_8086_24c2_8086_4541
+static const pciSubsystemInfo pci_ss_info_8086_24c2_e4bf_0cc9 =
+	{0xe4bf, 0x0cc9, pci_subsys_8086_24c2_e4bf_0cc9, 0};
+#undef pci_ss_info_e4bf_0cc9
+#define pci_ss_info_e4bf_0cc9 pci_ss_info_8086_24c2_e4bf_0cc9
+static const pciSubsystemInfo pci_ss_info_8086_24c2_e4bf_0cd2 =
+	{0xe4bf, 0x0cd2, pci_subsys_8086_24c2_e4bf_0cd2, 0};
+#undef pci_ss_info_e4bf_0cd2
+#define pci_ss_info_e4bf_0cd2 pci_ss_info_8086_24c2_e4bf_0cd2
 static const pciSubsystemInfo pci_ss_info_8086_24c3_1014_0267 =
 	{0x1014, 0x0267, pci_subsys_8086_24c3_1014_0267, 0};
 #undef pci_ss_info_1014_0267
 #define pci_ss_info_1014_0267 pci_ss_info_8086_24c3_1014_0267
+static const pciSubsystemInfo pci_ss_info_8086_24c3_1014_052d =
+	{0x1014, 0x052d, pci_subsys_8086_24c3_1014_052d, 0};
+#undef pci_ss_info_1014_052d
+#define pci_ss_info_1014_052d pci_ss_info_8086_24c3_1014_052d
 static const pciSubsystemInfo pci_ss_info_8086_24c3_1025_005a =
 	{0x1025, 0x005a, pci_subsys_8086_24c3_1025_005a, 0};
 #undef pci_ss_info_1025_005a
@@ -39251,10 +44516,18 @@
 	{0x103c, 0x0890, pci_subsys_8086_24c3_103c_0890, 0};
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_8086_24c3_103c_0890
+static const pciSubsystemInfo pci_ss_info_8086_24c3_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_8086_24c3_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_8086_24c3_103c_08b0
 static const pciSubsystemInfo pci_ss_info_8086_24c3_1071_8160 =
 	{0x1071, 0x8160, pci_subsys_8086_24c3_1071_8160, 0};
 #undef pci_ss_info_1071_8160
 #define pci_ss_info_1071_8160 pci_ss_info_8086_24c3_1071_8160
+static const pciSubsystemInfo pci_ss_info_8086_24c3_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_24c3_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_24c3_144d_c00c
 static const pciSubsystemInfo pci_ss_info_8086_24c3_1458_24c2 =
 	{0x1458, 0x24c2, pci_subsys_8086_24c3_1458_24c2, 0};
 #undef pci_ss_info_1458_24c2
@@ -39263,6 +44536,10 @@
 	{0x1462, 0x5800, pci_subsys_8086_24c3_1462_5800, 0};
 #undef pci_ss_info_1462_5800
 #define pci_ss_info_1462_5800 pci_ss_info_8086_24c3_1462_5800
+static const pciSubsystemInfo pci_ss_info_8086_24c3_1734_1004 =
+	{0x1734, 0x1004, pci_subsys_8086_24c3_1734_1004, 0};
+#undef pci_ss_info_1734_1004
+#define pci_ss_info_1734_1004 pci_ss_info_8086_24c3_1734_1004
 static const pciSubsystemInfo pci_ss_info_8086_24c3_1734_1055 =
 	{0x1734, 0x1055, pci_subsys_8086_24c3_1734_1055, 0};
 #undef pci_ss_info_1734_1055
@@ -39271,10 +44548,22 @@
 	{0x4c53, 0x1090, pci_subsys_8086_24c3_4c53_1090, 0};
 #undef pci_ss_info_4c53_1090
 #define pci_ss_info_4c53_1090 pci_ss_info_8086_24c3_4c53_1090
+static const pciSubsystemInfo pci_ss_info_8086_24c3_e4bf_0cc9 =
+	{0xe4bf, 0x0cc9, pci_subsys_8086_24c3_e4bf_0cc9, 0};
+#undef pci_ss_info_e4bf_0cc9
+#define pci_ss_info_e4bf_0cc9 pci_ss_info_8086_24c3_e4bf_0cc9
+static const pciSubsystemInfo pci_ss_info_8086_24c3_e4bf_0cd2 =
+	{0xe4bf, 0x0cd2, pci_subsys_8086_24c3_e4bf_0cd2, 0};
+#undef pci_ss_info_e4bf_0cd2
+#define pci_ss_info_e4bf_0cd2 pci_ss_info_8086_24c3_e4bf_0cd2
 static const pciSubsystemInfo pci_ss_info_8086_24c4_1014_0267 =
 	{0x1014, 0x0267, pci_subsys_8086_24c4_1014_0267, 0};
 #undef pci_ss_info_1014_0267
 #define pci_ss_info_1014_0267 pci_ss_info_8086_24c4_1014_0267
+static const pciSubsystemInfo pci_ss_info_8086_24c4_1014_052d =
+	{0x1014, 0x052d, pci_subsys_8086_24c4_1014_052d, 0};
+#undef pci_ss_info_1014_052d
+#define pci_ss_info_1014_052d pci_ss_info_8086_24c4_1014_052d
 static const pciSubsystemInfo pci_ss_info_8086_24c4_1025_005a =
 	{0x1025, 0x005a, pci_subsys_8086_24c4_1025_005a, 0};
 #undef pci_ss_info_1025_005a
@@ -39299,10 +44588,18 @@
 	{0x103c, 0x0890, pci_subsys_8086_24c4_103c_0890, 0};
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_8086_24c4_103c_0890
+static const pciSubsystemInfo pci_ss_info_8086_24c4_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_8086_24c4_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_8086_24c4_103c_08b0
 static const pciSubsystemInfo pci_ss_info_8086_24c4_1071_8160 =
 	{0x1071, 0x8160, pci_subsys_8086_24c4_1071_8160, 0};
 #undef pci_ss_info_1071_8160
 #define pci_ss_info_1071_8160 pci_ss_info_8086_24c4_1071_8160
+static const pciSubsystemInfo pci_ss_info_8086_24c4_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_24c4_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_24c4_144d_c00c
 static const pciSubsystemInfo pci_ss_info_8086_24c4_1462_5800 =
 	{0x1462, 0x5800, pci_subsys_8086_24c4_1462_5800, 0};
 #undef pci_ss_info_1462_5800
@@ -39311,6 +44608,10 @@
 	{0x1509, 0x2990, pci_subsys_8086_24c4_1509_2990, 0};
 #undef pci_ss_info_1509_2990
 #define pci_ss_info_1509_2990 pci_ss_info_8086_24c4_1509_2990
+static const pciSubsystemInfo pci_ss_info_8086_24c4_1734_1004 =
+	{0x1734, 0x1004, pci_subsys_8086_24c4_1734_1004, 0};
+#undef pci_ss_info_1734_1004
+#define pci_ss_info_1734_1004 pci_ss_info_8086_24c4_1734_1004
 static const pciSubsystemInfo pci_ss_info_8086_24c4_4c53_1090 =
 	{0x4c53, 0x1090, pci_subsys_8086_24c4_4c53_1090, 0};
 #undef pci_ss_info_4c53_1090
@@ -39319,6 +44620,14 @@
 	{0x8086, 0x4541, pci_subsys_8086_24c4_8086_4541, 0};
 #undef pci_ss_info_8086_4541
 #define pci_ss_info_8086_4541 pci_ss_info_8086_24c4_8086_4541
+static const pciSubsystemInfo pci_ss_info_8086_24c4_e4bf_0cc9 =
+	{0xe4bf, 0x0cc9, pci_subsys_8086_24c4_e4bf_0cc9, 0};
+#undef pci_ss_info_e4bf_0cc9
+#define pci_ss_info_e4bf_0cc9 pci_ss_info_8086_24c4_e4bf_0cc9
+static const pciSubsystemInfo pci_ss_info_8086_24c4_e4bf_0cd2 =
+	{0xe4bf, 0x0cd2, pci_subsys_8086_24c4_e4bf_0cd2, 0};
+#undef pci_ss_info_e4bf_0cd2
+#define pci_ss_info_e4bf_0cd2 pci_ss_info_8086_24c4_e4bf_0cd2
 static const pciSubsystemInfo pci_ss_info_8086_24c5_0e11_00b8 =
 	{0x0e11, 0x00b8, pci_subsys_8086_24c5_0e11_00b8, 0};
 #undef pci_ss_info_0e11_00b8
@@ -39327,6 +44636,14 @@
 	{0x1014, 0x0267, pci_subsys_8086_24c5_1014_0267, 0};
 #undef pci_ss_info_1014_0267
 #define pci_ss_info_1014_0267 pci_ss_info_8086_24c5_1014_0267
+static const pciSubsystemInfo pci_ss_info_8086_24c5_1014_0537 =
+	{0x1014, 0x0537, pci_subsys_8086_24c5_1014_0537, 0};
+#undef pci_ss_info_1014_0537
+#define pci_ss_info_1014_0537 pci_ss_info_8086_24c5_1014_0537
+static const pciSubsystemInfo pci_ss_info_8086_24c5_1014_055f =
+	{0x1014, 0x055f, pci_subsys_8086_24c5_1014_055f, 0};
+#undef pci_ss_info_1014_055f
+#define pci_ss_info_1014_055f pci_ss_info_8086_24c5_1014_055f
 static const pciSubsystemInfo pci_ss_info_8086_24c5_1025_005a =
 	{0x1025, 0x005a, pci_subsys_8086_24c5_1025_005a, 0};
 #undef pci_ss_info_1025_005a
@@ -39351,10 +44668,18 @@
 	{0x103c, 0x0890, pci_subsys_8086_24c5_103c_0890, 0};
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_8086_24c5_103c_0890
+static const pciSubsystemInfo pci_ss_info_8086_24c5_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_8086_24c5_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_8086_24c5_103c_08b0
 static const pciSubsystemInfo pci_ss_info_8086_24c5_1071_8160 =
 	{0x1071, 0x8160, pci_subsys_8086_24c5_1071_8160, 0};
 #undef pci_ss_info_1071_8160
 #define pci_ss_info_1071_8160 pci_ss_info_8086_24c5_1071_8160
+static const pciSubsystemInfo pci_ss_info_8086_24c5_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_24c5_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_24c5_144d_c00c
 static const pciSubsystemInfo pci_ss_info_8086_24c5_1458_a002 =
 	{0x1458, 0xa002, pci_subsys_8086_24c5_1458_a002, 0};
 #undef pci_ss_info_1458_a002
@@ -39363,14 +44688,26 @@
 	{0x1462, 0x5800, pci_subsys_8086_24c5_1462_5800, 0};
 #undef pci_ss_info_1462_5800
 #define pci_ss_info_1462_5800 pci_ss_info_8086_24c5_1462_5800
+static const pciSubsystemInfo pci_ss_info_8086_24c5_1734_1005 =
+	{0x1734, 0x1005, pci_subsys_8086_24c5_1734_1005, 0};
+#undef pci_ss_info_1734_1005
+#define pci_ss_info_1734_1005 pci_ss_info_8086_24c5_1734_1005
 static const pciSubsystemInfo pci_ss_info_8086_24c5_1734_1055 =
 	{0x1734, 0x1055, pci_subsys_8086_24c5_1734_1055, 0};
 #undef pci_ss_info_1734_1055
 #define pci_ss_info_1734_1055 pci_ss_info_8086_24c5_1734_1055
-static const pciSubsystemInfo pci_ss_info_8086_24c6_003c_1025 =
-	{0x003c, 0x1025, pci_subsys_8086_24c6_003c_1025, 0};
-#undef pci_ss_info_003c_1025
-#define pci_ss_info_003c_1025 pci_ss_info_8086_24c6_003c_1025
+static const pciSubsystemInfo pci_ss_info_8086_24c6_1014_0524 =
+	{0x1014, 0x0524, pci_subsys_8086_24c6_1014_0524, 0};
+#undef pci_ss_info_1014_0524
+#define pci_ss_info_1014_0524 pci_ss_info_8086_24c6_1014_0524
+static const pciSubsystemInfo pci_ss_info_8086_24c6_1014_0559 =
+	{0x1014, 0x0559, pci_subsys_8086_24c6_1014_0559, 0};
+#undef pci_ss_info_1014_0559
+#define pci_ss_info_1014_0559 pci_ss_info_8086_24c6_1014_0559
+static const pciSubsystemInfo pci_ss_info_8086_24c6_1025_003c =
+	{0x1025, 0x003c, pci_subsys_8086_24c6_1025_003c, 0};
+#undef pci_ss_info_1025_003c
+#define pci_ss_info_1025_003c pci_ss_info_8086_24c6_1025_003c
 static const pciSubsystemInfo pci_ss_info_8086_24c6_1025_005a =
 	{0x1025, 0x005a, pci_subsys_8086_24c6_1025_005a, 0};
 #undef pci_ss_info_1025_005a
@@ -39387,14 +44724,26 @@
 	{0x103c, 0x0890, pci_subsys_8086_24c6_103c_0890, 0};
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_8086_24c6_103c_0890
+static const pciSubsystemInfo pci_ss_info_8086_24c6_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_8086_24c6_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_8086_24c6_103c_08b0
 static const pciSubsystemInfo pci_ss_info_8086_24c6_1071_8160 =
 	{0x1071, 0x8160, pci_subsys_8086_24c6_1071_8160, 0};
 #undef pci_ss_info_1071_8160
 #define pci_ss_info_1071_8160 pci_ss_info_8086_24c6_1071_8160
+static const pciSubsystemInfo pci_ss_info_8086_24c6_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_24c6_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_24c6_144d_c00c
 static const pciSubsystemInfo pci_ss_info_8086_24c7_1014_0267 =
 	{0x1014, 0x0267, pci_subsys_8086_24c7_1014_0267, 0};
 #undef pci_ss_info_1014_0267
 #define pci_ss_info_1014_0267 pci_ss_info_8086_24c7_1014_0267
+static const pciSubsystemInfo pci_ss_info_8086_24c7_1014_052d =
+	{0x1014, 0x052d, pci_subsys_8086_24c7_1014_052d, 0};
+#undef pci_ss_info_1014_052d
+#define pci_ss_info_1014_052d pci_ss_info_8086_24c7_1014_052d
 static const pciSubsystemInfo pci_ss_info_8086_24c7_1025_005a =
 	{0x1025, 0x005a, pci_subsys_8086_24c7_1025_005a, 0};
 #undef pci_ss_info_1025_005a
@@ -39419,10 +44768,18 @@
 	{0x103c, 0x0890, pci_subsys_8086_24c7_103c_0890, 0};
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_8086_24c7_103c_0890
+static const pciSubsystemInfo pci_ss_info_8086_24c7_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_8086_24c7_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_8086_24c7_103c_08b0
 static const pciSubsystemInfo pci_ss_info_8086_24c7_1071_8160 =
 	{0x1071, 0x8160, pci_subsys_8086_24c7_1071_8160, 0};
 #undef pci_ss_info_1071_8160
 #define pci_ss_info_1071_8160 pci_ss_info_8086_24c7_1071_8160
+static const pciSubsystemInfo pci_ss_info_8086_24c7_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_24c7_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_24c7_144d_c00c
 static const pciSubsystemInfo pci_ss_info_8086_24c7_1462_5800 =
 	{0x1462, 0x5800, pci_subsys_8086_24c7_1462_5800, 0};
 #undef pci_ss_info_1462_5800
@@ -39431,6 +44788,10 @@
 	{0x1509, 0x2990, pci_subsys_8086_24c7_1509_2990, 0};
 #undef pci_ss_info_1509_2990
 #define pci_ss_info_1509_2990 pci_ss_info_8086_24c7_1509_2990
+static const pciSubsystemInfo pci_ss_info_8086_24c7_1734_1004 =
+	{0x1734, 0x1004, pci_subsys_8086_24c7_1734_1004, 0};
+#undef pci_ss_info_1734_1004
+#define pci_ss_info_1734_1004 pci_ss_info_8086_24c7_1734_1004
 static const pciSubsystemInfo pci_ss_info_8086_24c7_4c53_1090 =
 	{0x4c53, 0x1090, pci_subsys_8086_24c7_4c53_1090, 0};
 #undef pci_ss_info_4c53_1090
@@ -39439,6 +44800,18 @@
 	{0x8086, 0x4541, pci_subsys_8086_24c7_8086_4541, 0};
 #undef pci_ss_info_8086_4541
 #define pci_ss_info_8086_4541 pci_ss_info_8086_24c7_8086_4541
+static const pciSubsystemInfo pci_ss_info_8086_24c7_e4bf_0cc9 =
+	{0xe4bf, 0x0cc9, pci_subsys_8086_24c7_e4bf_0cc9, 0};
+#undef pci_ss_info_e4bf_0cc9
+#define pci_ss_info_e4bf_0cc9 pci_ss_info_8086_24c7_e4bf_0cc9
+static const pciSubsystemInfo pci_ss_info_8086_24c7_e4bf_0cd2 =
+	{0xe4bf, 0x0cd2, pci_subsys_8086_24c7_e4bf_0cd2, 0};
+#undef pci_ss_info_e4bf_0cd2
+#define pci_ss_info_e4bf_0cd2 pci_ss_info_8086_24c7_e4bf_0cd2
+static const pciSubsystemInfo pci_ss_info_8086_24ca_1014_052d =
+	{0x1014, 0x052d, pci_subsys_8086_24ca_1014_052d, 0};
+#undef pci_ss_info_1014_052d
+#define pci_ss_info_1014_052d pci_ss_info_8086_24ca_1014_052d
 static const pciSubsystemInfo pci_ss_info_8086_24ca_1025_005a =
 	{0x1025, 0x005a, pci_subsys_8086_24ca_1025_005a, 0};
 #undef pci_ss_info_1025_005a
@@ -39459,10 +44832,18 @@
 	{0x103c, 0x0890, pci_subsys_8086_24ca_103c_0890, 0};
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_8086_24ca_103c_0890
+static const pciSubsystemInfo pci_ss_info_8086_24ca_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_8086_24ca_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_8086_24ca_103c_08b0
 static const pciSubsystemInfo pci_ss_info_8086_24ca_1071_8160 =
 	{0x1071, 0x8160, pci_subsys_8086_24ca_1071_8160, 0};
 #undef pci_ss_info_1071_8160
 #define pci_ss_info_1071_8160 pci_ss_info_8086_24ca_1071_8160
+static const pciSubsystemInfo pci_ss_info_8086_24ca_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_24ca_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_24ca_144d_c00c
 static const pciSubsystemInfo pci_ss_info_8086_24ca_1734_1055 =
 	{0x1734, 0x1055, pci_subsys_8086_24ca_1734_1055, 0};
 #undef pci_ss_info_1734_1055
@@ -39487,10 +44868,26 @@
 	{0x1462, 0x5800, pci_subsys_8086_24cb_1462_5800, 0};
 #undef pci_ss_info_1462_5800
 #define pci_ss_info_1462_5800 pci_ss_info_8086_24cb_1462_5800
+static const pciSubsystemInfo pci_ss_info_8086_24cb_1734_1004 =
+	{0x1734, 0x1004, pci_subsys_8086_24cb_1734_1004, 0};
+#undef pci_ss_info_1734_1004
+#define pci_ss_info_1734_1004 pci_ss_info_8086_24cb_1734_1004
 static const pciSubsystemInfo pci_ss_info_8086_24cb_4c53_1090 =
 	{0x4c53, 0x1090, pci_subsys_8086_24cb_4c53_1090, 0};
 #undef pci_ss_info_4c53_1090
 #define pci_ss_info_4c53_1090 pci_ss_info_8086_24cb_4c53_1090
+static const pciSubsystemInfo pci_ss_info_8086_24cb_e4bf_0cc9 =
+	{0xe4bf, 0x0cc9, pci_subsys_8086_24cb_e4bf_0cc9, 0};
+#undef pci_ss_info_e4bf_0cc9
+#define pci_ss_info_e4bf_0cc9 pci_ss_info_8086_24cb_e4bf_0cc9
+static const pciSubsystemInfo pci_ss_info_8086_24cb_e4bf_0cd2 =
+	{0xe4bf, 0x0cd2, pci_subsys_8086_24cb_e4bf_0cd2, 0};
+#undef pci_ss_info_e4bf_0cd2
+#define pci_ss_info_e4bf_0cd2 pci_ss_info_8086_24cb_e4bf_0cd2
+static const pciSubsystemInfo pci_ss_info_8086_24cc_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_24cc_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_24cc_144d_c00c
 static const pciSubsystemInfo pci_ss_info_8086_24cc_1734_1055 =
 	{0x1734, 0x1055, pci_subsys_8086_24cc_1734_1055, 0};
 #undef pci_ss_info_1734_1055
@@ -39499,6 +44896,10 @@
 	{0x1014, 0x0267, pci_subsys_8086_24cd_1014_0267, 0};
 #undef pci_ss_info_1014_0267
 #define pci_ss_info_1014_0267 pci_ss_info_8086_24cd_1014_0267
+static const pciSubsystemInfo pci_ss_info_8086_24cd_1014_052e =
+	{0x1014, 0x052e, pci_subsys_8086_24cd_1014_052e, 0};
+#undef pci_ss_info_1014_052e
+#define pci_ss_info_1014_052e pci_ss_info_8086_24cd_1014_052e
 static const pciSubsystemInfo pci_ss_info_8086_24cd_1025_005a =
 	{0x1025, 0x005a, pci_subsys_8086_24cd_1025_005a, 0};
 #undef pci_ss_info_1025_005a
@@ -39531,10 +44932,22 @@
 	{0x103c, 0x0890, pci_subsys_8086_24cd_103c_0890, 0};
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_8086_24cd_103c_0890
+static const pciSubsystemInfo pci_ss_info_8086_24cd_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_8086_24cd_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_8086_24cd_103c_08b0
 static const pciSubsystemInfo pci_ss_info_8086_24cd_1071_8160 =
 	{0x1071, 0x8160, pci_subsys_8086_24cd_1071_8160, 0};
 #undef pci_ss_info_1071_8160
 #define pci_ss_info_1071_8160 pci_ss_info_8086_24cd_1071_8160
+static const pciSubsystemInfo pci_ss_info_8086_24cd_1179_ff00 =
+	{0x1179, 0xff00, pci_subsys_8086_24cd_1179_ff00, 0};
+#undef pci_ss_info_1179_ff00
+#define pci_ss_info_1179_ff00 pci_ss_info_8086_24cd_1179_ff00
+static const pciSubsystemInfo pci_ss_info_8086_24cd_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_24cd_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_24cd_144d_c00c
 static const pciSubsystemInfo pci_ss_info_8086_24cd_1462_3981 =
 	{0x1462, 0x3981, pci_subsys_8086_24cd_1462_3981, 0};
 #undef pci_ss_info_1462_3981
@@ -39543,6 +44956,10 @@
 	{0x1509, 0x1968, pci_subsys_8086_24cd_1509_1968, 0};
 #undef pci_ss_info_1509_1968
 #define pci_ss_info_1509_1968 pci_ss_info_8086_24cd_1509_1968
+static const pciSubsystemInfo pci_ss_info_8086_24cd_1734_1004 =
+	{0x1734, 0x1004, pci_subsys_8086_24cd_1734_1004, 0};
+#undef pci_ss_info_1734_1004
+#define pci_ss_info_1734_1004 pci_ss_info_8086_24cd_1734_1004
 static const pciSubsystemInfo pci_ss_info_8086_24cd_1734_1055 =
 	{0x1734, 0x1055, pci_subsys_8086_24cd_1734_1055, 0};
 #undef pci_ss_info_1734_1055
@@ -39551,6 +44968,14 @@
 	{0x4c53, 0x1090, pci_subsys_8086_24cd_4c53_1090, 0};
 #undef pci_ss_info_4c53_1090
 #define pci_ss_info_4c53_1090 pci_ss_info_8086_24cd_4c53_1090
+static const pciSubsystemInfo pci_ss_info_8086_24cd_e4bf_0cc9 =
+	{0xe4bf, 0x0cc9, pci_subsys_8086_24cd_e4bf_0cc9, 0};
+#undef pci_ss_info_e4bf_0cc9
+#define pci_ss_info_e4bf_0cc9 pci_ss_info_8086_24cd_e4bf_0cc9
+static const pciSubsystemInfo pci_ss_info_8086_24cd_e4bf_0cd2 =
+	{0xe4bf, 0x0cd2, pci_subsys_8086_24cd_e4bf_0cd2, 0};
+#undef pci_ss_info_e4bf_0cd2
+#define pci_ss_info_e4bf_0cd2 pci_ss_info_8086_24cd_e4bf_0cd2
 static const pciSubsystemInfo pci_ss_info_8086_24d1_1028_0169 =
 	{0x1028, 0x0169, pci_subsys_8086_24d1_1028_0169, 0};
 #undef pci_ss_info_1028_0169
@@ -39587,6 +45012,10 @@
 	{0x8086, 0x4246, pci_subsys_8086_24d1_8086_4246, 0};
 #undef pci_ss_info_8086_4246
 #define pci_ss_info_8086_4246 pci_ss_info_8086_24d1_8086_4246
+static const pciSubsystemInfo pci_ss_info_8086_24d1_8086_4c43 =
+	{0x8086, 0x4c43, pci_subsys_8086_24d1_8086_4c43, 0};
+#undef pci_ss_info_8086_4c43
+#define pci_ss_info_8086_4c43 pci_ss_info_8086_24d1_8086_4c43
 static const pciSubsystemInfo pci_ss_info_8086_24d1_8086_524c =
 	{0x8086, 0x524c, pci_subsys_8086_24d1_8086_524c, 0};
 #undef pci_ss_info_8086_524c
@@ -39643,6 +45072,10 @@
 	{0x8086, 0x4246, pci_subsys_8086_24d2_8086_4246, 0};
 #undef pci_ss_info_8086_4246
 #define pci_ss_info_8086_4246 pci_ss_info_8086_24d2_8086_4246
+static const pciSubsystemInfo pci_ss_info_8086_24d2_8086_4c43 =
+	{0x8086, 0x4c43, pci_subsys_8086_24d2_8086_4c43, 0};
+#undef pci_ss_info_8086_4c43
+#define pci_ss_info_8086_4c43 pci_ss_info_8086_24d2_8086_4c43
 static const pciSubsystemInfo pci_ss_info_8086_24d2_8086_524c =
 	{0x8086, 0x524c, pci_subsys_8086_24d2_8086_524c, 0};
 #undef pci_ss_info_8086_524c
@@ -39659,6 +45092,10 @@
 	{0x1028, 0x0169, pci_subsys_8086_24d3_1028_0169, 0};
 #undef pci_ss_info_1028_0169
 #define pci_ss_info_1028_0169 pci_ss_info_8086_24d3_1028_0169
+static const pciSubsystemInfo pci_ss_info_8086_24d3_103c_12bc =
+	{0x103c, 0x12bc, pci_subsys_8086_24d3_103c_12bc, 0};
+#undef pci_ss_info_103c_12bc
+#define pci_ss_info_103c_12bc pci_ss_info_8086_24d3_103c_12bc
 static const pciSubsystemInfo pci_ss_info_8086_24d3_1043_80a6 =
 	{0x1043, 0x80a6, pci_subsys_8086_24d3_1043_80a6, 0};
 #undef pci_ss_info_1043_80a6
@@ -39687,6 +45124,10 @@
 	{0x8086, 0x4246, pci_subsys_8086_24d3_8086_4246, 0};
 #undef pci_ss_info_8086_4246
 #define pci_ss_info_8086_4246 pci_ss_info_8086_24d3_8086_4246
+static const pciSubsystemInfo pci_ss_info_8086_24d3_8086_4c43 =
+	{0x8086, 0x4c43, pci_subsys_8086_24d3_8086_4c43, 0};
+#undef pci_ss_info_8086_4c43
+#define pci_ss_info_8086_4c43 pci_ss_info_8086_24d3_8086_4c43
 static const pciSubsystemInfo pci_ss_info_8086_24d3_8086_524c =
 	{0x8086, 0x524c, pci_subsys_8086_24d3_8086_524c, 0};
 #undef pci_ss_info_8086_524c
@@ -39743,10 +45184,18 @@
 	{0x8086, 0x4246, pci_subsys_8086_24d4_8086_4246, 0};
 #undef pci_ss_info_8086_4246
 #define pci_ss_info_8086_4246 pci_ss_info_8086_24d4_8086_4246
+static const pciSubsystemInfo pci_ss_info_8086_24d4_8086_4c43 =
+	{0x8086, 0x4c43, pci_subsys_8086_24d4_8086_4c43, 0};
+#undef pci_ss_info_8086_4c43
+#define pci_ss_info_8086_4c43 pci_ss_info_8086_24d4_8086_4c43
 static const pciSubsystemInfo pci_ss_info_8086_24d4_8086_524c =
 	{0x8086, 0x524c, pci_subsys_8086_24d4_8086_524c, 0};
 #undef pci_ss_info_8086_524c
 #define pci_ss_info_8086_524c pci_ss_info_8086_24d4_8086_524c
+static const pciSubsystemInfo pci_ss_info_8086_24d5_100a_147b =
+	{0x100a, 0x147b, pci_subsys_8086_24d5_100a_147b, 0};
+#undef pci_ss_info_100a_147b
+#define pci_ss_info_100a_147b pci_ss_info_8086_24d5_100a_147b
 static const pciSubsystemInfo pci_ss_info_8086_24d5_1028_0169 =
 	{0x1028, 0x0169, pci_subsys_8086_24d5_1028_0169, 0};
 #undef pci_ss_info_1028_0169
@@ -39755,6 +45204,10 @@
 	{0x103c, 0x006a, pci_subsys_8086_24d5_103c_006a, 0};
 #undef pci_ss_info_103c_006a
 #define pci_ss_info_103c_006a pci_ss_info_8086_24d5_103c_006a
+static const pciSubsystemInfo pci_ss_info_8086_24d5_103c_12bc =
+	{0x103c, 0x12bc, pci_subsys_8086_24d5_103c_12bc, 0};
+#undef pci_ss_info_103c_12bc
+#define pci_ss_info_103c_12bc pci_ss_info_8086_24d5_103c_12bc
 static const pciSubsystemInfo pci_ss_info_8086_24d5_1043_80f3 =
 	{0x1043, 0x80f3, pci_subsys_8086_24d5_1043_80f3, 0};
 #undef pci_ss_info_1043_80f3
@@ -39787,6 +45240,10 @@
 	{0x8086, 0xe001, pci_subsys_8086_24d5_8086_e001, 0};
 #undef pci_ss_info_8086_e001
 #define pci_ss_info_8086_e001 pci_ss_info_8086_24d5_8086_e001
+static const pciSubsystemInfo pci_ss_info_8086_24d5_8086_e002 =
+	{0x8086, 0xe002, pci_subsys_8086_24d5_8086_e002, 0};
+#undef pci_ss_info_8086_e002
+#define pci_ss_info_8086_e002 pci_ss_info_8086_24d5_8086_e002
 static const pciSubsystemInfo pci_ss_info_8086_24d6_103c_006a =
 	{0x103c, 0x006a, pci_subsys_8086_24d6_103c_006a, 0};
 #undef pci_ss_info_103c_006a
@@ -39839,6 +45296,10 @@
 	{0x8086, 0x4246, pci_subsys_8086_24d7_8086_4246, 0};
 #undef pci_ss_info_8086_4246
 #define pci_ss_info_8086_4246 pci_ss_info_8086_24d7_8086_4246
+static const pciSubsystemInfo pci_ss_info_8086_24d7_8086_4c43 =
+	{0x8086, 0x4c43, pci_subsys_8086_24d7_8086_4c43, 0};
+#undef pci_ss_info_8086_4c43
+#define pci_ss_info_8086_4c43 pci_ss_info_8086_24d7_8086_4c43
 static const pciSubsystemInfo pci_ss_info_8086_24d7_8086_524c =
 	{0x8086, 0x524c, pci_subsys_8086_24d7_8086_524c, 0};
 #undef pci_ss_info_8086_524c
@@ -39899,6 +45360,10 @@
 	{0x8086, 0x4246, pci_subsys_8086_24db_8086_4246, 0};
 #undef pci_ss_info_8086_4246
 #define pci_ss_info_8086_4246 pci_ss_info_8086_24db_8086_4246
+static const pciSubsystemInfo pci_ss_info_8086_24db_8086_4c43 =
+	{0x8086, 0x4c43, pci_subsys_8086_24db_8086_4c43, 0};
+#undef pci_ss_info_8086_4c43
+#define pci_ss_info_8086_4c43 pci_ss_info_8086_24db_8086_4c43
 static const pciSubsystemInfo pci_ss_info_8086_24db_8086_524c =
 	{0x8086, 0x524c, pci_subsys_8086_24db_8086_524c, 0};
 #undef pci_ss_info_8086_524c
@@ -39947,6 +45412,10 @@
 	{0x8086, 0x4246, pci_subsys_8086_24dd_8086_4246, 0};
 #undef pci_ss_info_8086_4246
 #define pci_ss_info_8086_4246 pci_ss_info_8086_24dd_8086_4246
+static const pciSubsystemInfo pci_ss_info_8086_24dd_8086_4c43 =
+	{0x8086, 0x4c43, pci_subsys_8086_24dd_8086_4c43, 0};
+#undef pci_ss_info_8086_4c43
+#define pci_ss_info_8086_4c43 pci_ss_info_8086_24dd_8086_4c43
 static const pciSubsystemInfo pci_ss_info_8086_24dd_8086_524c =
 	{0x8086, 0x524c, pci_subsys_8086_24dd_8086_524c, 0};
 #undef pci_ss_info_8086_524c
@@ -39987,6 +45456,10 @@
 	{0x8086, 0x4246, pci_subsys_8086_24de_8086_4246, 0};
 #undef pci_ss_info_8086_4246
 #define pci_ss_info_8086_4246 pci_ss_info_8086_24de_8086_4246
+static const pciSubsystemInfo pci_ss_info_8086_24de_8086_4c43 =
+	{0x8086, 0x4c43, pci_subsys_8086_24de_8086_4c43, 0};
+#undef pci_ss_info_8086_4c43
+#define pci_ss_info_8086_4c43 pci_ss_info_8086_24de_8086_4c43
 static const pciSubsystemInfo pci_ss_info_8086_24de_8086_524c =
 	{0x8086, 0x524c, pci_subsys_8086_24de_8086_524c, 0};
 #undef pci_ss_info_8086_524c
@@ -40003,6 +45476,10 @@
 	{0x1043, 0x801c, pci_subsys_8086_2501_1043_801c, 0};
 #undef pci_ss_info_1043_801c
 #define pci_ss_info_1043_801c pci_ss_info_8086_2501_1043_801c
+static const pciSubsystemInfo pci_ss_info_8086_2530_1028_00c7 =
+	{0x1028, 0x00c7, pci_subsys_8086_2530_1028_00c7, 0};
+#undef pci_ss_info_1028_00c7
+#define pci_ss_info_1028_00c7 pci_ss_info_8086_2530_1028_00c7
 static const pciSubsystemInfo pci_ss_info_8086_2530_147b_0507 =
 	{0x147b, 0x0507, pci_subsys_8086_2530_147b_0507, 0};
 #undef pci_ss_info_147b_0507
@@ -40047,14 +45524,26 @@
 	{0x1462, 0x5800, pci_subsys_8086_2560_1462_5800, 0};
 #undef pci_ss_info_1462_5800
 #define pci_ss_info_1462_5800 pci_ss_info_8086_2560_1462_5800
+static const pciSubsystemInfo pci_ss_info_8086_2562_0e11_00b9 =
+	{0x0e11, 0x00b9, pci_subsys_8086_2562_0e11_00b9, 0};
+#undef pci_ss_info_0e11_00b9
+#define pci_ss_info_0e11_00b9 pci_ss_info_8086_2562_0e11_00b9
 static const pciSubsystemInfo pci_ss_info_8086_2562_1014_0267 =
 	{0x1014, 0x0267, pci_subsys_8086_2562_1014_0267, 0};
 #undef pci_ss_info_1014_0267
 #define pci_ss_info_1014_0267 pci_ss_info_8086_2562_1014_0267
+static const pciSubsystemInfo pci_ss_info_8086_2562_1734_1004 =
+	{0x1734, 0x1004, pci_subsys_8086_2562_1734_1004, 0};
+#undef pci_ss_info_1734_1004
+#define pci_ss_info_1734_1004 pci_ss_info_8086_2562_1734_1004
 static const pciSubsystemInfo pci_ss_info_8086_2570_103c_006a =
 	{0x103c, 0x006a, pci_subsys_8086_2570_103c_006a, 0};
 #undef pci_ss_info_103c_006a
 #define pci_ss_info_103c_006a pci_ss_info_8086_2570_103c_006a
+static const pciSubsystemInfo pci_ss_info_8086_2570_103c_12bc =
+	{0x103c, 0x12bc, pci_subsys_8086_2570_103c_12bc, 0};
+#undef pci_ss_info_103c_12bc
+#define pci_ss_info_103c_12bc pci_ss_info_8086_2570_103c_12bc
 static const pciSubsystemInfo pci_ss_info_8086_2570_1043_80f2 =
 	{0x1043, 0x80f2, pci_subsys_8086_2570_1043_80f2, 0};
 #undef pci_ss_info_1043_80f2
@@ -40067,6 +45556,10 @@
 	{0x1028, 0x019d, pci_subsys_8086_2572_1028_019d, 0};
 #undef pci_ss_info_1028_019d
 #define pci_ss_info_1028_019d pci_ss_info_8086_2572_1028_019d
+static const pciSubsystemInfo pci_ss_info_8086_2572_103c_12bc =
+	{0x103c, 0x12bc, pci_subsys_8086_2572_103c_12bc, 0};
+#undef pci_ss_info_103c_12bc
+#define pci_ss_info_103c_12bc pci_ss_info_8086_2572_103c_12bc
 static const pciSubsystemInfo pci_ss_info_8086_2572_1043_80a5 =
 	{0x1043, 0x80a5, pci_subsys_8086_2572_1043_80a5, 0};
 #undef pci_ss_info_1043_80a5
@@ -40075,6 +45568,10 @@
 	{0x8086, 0x4246, pci_subsys_8086_2572_8086_4246, 0};
 #undef pci_ss_info_8086_4246
 #define pci_ss_info_8086_4246 pci_ss_info_8086_2572_8086_4246
+static const pciSubsystemInfo pci_ss_info_8086_2572_8086_4c43 =
+	{0x8086, 0x4c43, pci_subsys_8086_2572_8086_4c43, 0};
+#undef pci_ss_info_8086_4c43
+#define pci_ss_info_8086_4c43 pci_ss_info_8086_2572_8086_4c43
 static const pciSubsystemInfo pci_ss_info_8086_2578_1458_2578 =
 	{0x1458, 0x2578, pci_subsys_8086_2578_1458_2578, 0};
 #undef pci_ss_info_1458_2578
@@ -40103,6 +45600,10 @@
 	{0x1028, 0x1079, pci_subsys_8086_2582_1028_1079, 0};
 #undef pci_ss_info_1028_1079
 #define pci_ss_info_1028_1079 pci_ss_info_8086_2582_1028_1079
+static const pciSubsystemInfo pci_ss_info_8086_2582_103c_3006 =
+	{0x103c, 0x3006, pci_subsys_8086_2582_103c_3006, 0};
+#undef pci_ss_info_103c_3006
+#define pci_ss_info_103c_3006 pci_ss_info_8086_2582_103c_3006
 static const pciSubsystemInfo pci_ss_info_8086_2582_1043_2582 =
 	{0x1043, 0x2582, pci_subsys_8086_2582_1043_2582, 0};
 #undef pci_ss_info_1043_2582
@@ -40127,14 +45628,34 @@
 	{0xa304, 0x81b7, pci_subsys_8086_2590_a304_81b7, 0};
 #undef pci_ss_info_a304_81b7
 #define pci_ss_info_a304_81b7 pci_ss_info_8086_2590_a304_81b7
+static const pciSubsystemInfo pci_ss_info_8086_2590_e4bf_0ccd =
+	{0xe4bf, 0x0ccd, pci_subsys_8086_2590_e4bf_0ccd, 0};
+#undef pci_ss_info_e4bf_0ccd
+#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2590_e4bf_0ccd
 static const pciSubsystemInfo pci_ss_info_8086_2592_103c_099c =
 	{0x103c, 0x099c, pci_subsys_8086_2592_103c_099c, 0};
 #undef pci_ss_info_103c_099c
 #define pci_ss_info_103c_099c pci_ss_info_8086_2592_103c_099c
+static const pciSubsystemInfo pci_ss_info_8086_2592_103c_308a =
+	{0x103c, 0x308a, pci_subsys_8086_2592_103c_308a, 0};
+#undef pci_ss_info_103c_308a
+#define pci_ss_info_103c_308a pci_ss_info_8086_2592_103c_308a
 static const pciSubsystemInfo pci_ss_info_8086_2592_1043_1881 =
 	{0x1043, 0x1881, pci_subsys_8086_2592_1043_1881, 0};
 #undef pci_ss_info_1043_1881
 #define pci_ss_info_1043_1881 pci_ss_info_8086_2592_1043_1881
+static const pciSubsystemInfo pci_ss_info_8086_2592_e4bf_0ccd =
+	{0xe4bf, 0x0ccd, pci_subsys_8086_2592_e4bf_0ccd, 0};
+#undef pci_ss_info_e4bf_0ccd
+#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2592_e4bf_0ccd
+static const pciSubsystemInfo pci_ss_info_8086_25a2_1775_10d0 =
+	{0x1775, 0x10d0, pci_subsys_8086_25a2_1775_10d0, 0};
+#undef pci_ss_info_1775_10d0
+#define pci_ss_info_1775_10d0 pci_ss_info_8086_25a2_1775_10d0
+static const pciSubsystemInfo pci_ss_info_8086_25a2_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_25a2_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_25a2_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_25a2_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_25a2_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
@@ -40143,6 +45664,10 @@
 	{0x4c53, 0x10e0, pci_subsys_8086_25a2_4c53_10e0, 0};
 #undef pci_ss_info_4c53_10e0
 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_25a2_4c53_10e0
+static const pciSubsystemInfo pci_ss_info_8086_25a3_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_25a3_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_25a3_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_25a3_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_25a3_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
@@ -40155,6 +45680,14 @@
 	{0x4c53, 0x10e0, pci_subsys_8086_25a3_4c53_10e0, 0};
 #undef pci_ss_info_4c53_10e0
 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_25a3_4c53_10e0
+static const pciSubsystemInfo pci_ss_info_8086_25a4_1775_10d0 =
+	{0x1775, 0x10d0, pci_subsys_8086_25a4_1775_10d0, 0};
+#undef pci_ss_info_1775_10d0
+#define pci_ss_info_1775_10d0 pci_ss_info_8086_25a4_1775_10d0
+static const pciSubsystemInfo pci_ss_info_8086_25a4_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_25a4_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_25a4_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_25a4_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_25a4_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
@@ -40167,10 +45700,22 @@
 	{0x4c53, 0x10e0, pci_subsys_8086_25a4_4c53_10e0, 0};
 #undef pci_ss_info_4c53_10e0
 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_25a4_4c53_10e0
+static const pciSubsystemInfo pci_ss_info_8086_25a6_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_25a6_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_25a6_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_25a6_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_25a6_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
 #define pci_ss_info_4c53_10b0 pci_ss_info_8086_25a6_4c53_10b0
+static const pciSubsystemInfo pci_ss_info_8086_25a9_1775_10d0 =
+	{0x1775, 0x10d0, pci_subsys_8086_25a9_1775_10d0, 0};
+#undef pci_ss_info_1775_10d0
+#define pci_ss_info_1775_10d0 pci_ss_info_8086_25a9_1775_10d0
+static const pciSubsystemInfo pci_ss_info_8086_25a9_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_25a9_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_25a9_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_25a9_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_25a9_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
@@ -40183,6 +45728,10 @@
 	{0x4c53, 0x10e0, pci_subsys_8086_25a9_4c53_10e0, 0};
 #undef pci_ss_info_4c53_10e0
 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_25a9_4c53_10e0
+static const pciSubsystemInfo pci_ss_info_8086_25aa_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_25aa_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_25aa_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_25aa_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_25aa_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
@@ -40191,6 +45740,14 @@
 	{0x4c53, 0x10e0, pci_subsys_8086_25aa_4c53_10e0, 0};
 #undef pci_ss_info_4c53_10e0
 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_25aa_4c53_10e0
+static const pciSubsystemInfo pci_ss_info_8086_25ab_1775_10d0 =
+	{0x1775, 0x10d0, pci_subsys_8086_25ab_1775_10d0, 0};
+#undef pci_ss_info_1775_10d0
+#define pci_ss_info_1775_10d0 pci_ss_info_8086_25ab_1775_10d0
+static const pciSubsystemInfo pci_ss_info_8086_25ab_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_25ab_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_25ab_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_25ab_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_25ab_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
@@ -40203,6 +45760,14 @@
 	{0x4c53, 0x10e0, pci_subsys_8086_25ab_4c53_10e0, 0};
 #undef pci_ss_info_4c53_10e0
 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_25ab_4c53_10e0
+static const pciSubsystemInfo pci_ss_info_8086_25ac_1775_10d0 =
+	{0x1775, 0x10d0, pci_subsys_8086_25ac_1775_10d0, 0};
+#undef pci_ss_info_1775_10d0
+#define pci_ss_info_1775_10d0 pci_ss_info_8086_25ac_1775_10d0
+static const pciSubsystemInfo pci_ss_info_8086_25ac_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_25ac_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_25ac_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_25ac_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_25ac_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
@@ -40215,6 +45780,14 @@
 	{0x4c53, 0x10e0, pci_subsys_8086_25ac_4c53_10e0, 0};
 #undef pci_ss_info_4c53_10e0
 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_25ac_4c53_10e0
+static const pciSubsystemInfo pci_ss_info_8086_25ad_1775_10d0 =
+	{0x1775, 0x10d0, pci_subsys_8086_25ad_1775_10d0, 0};
+#undef pci_ss_info_1775_10d0
+#define pci_ss_info_1775_10d0 pci_ss_info_8086_25ad_1775_10d0
+static const pciSubsystemInfo pci_ss_info_8086_25ad_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_25ad_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_25ad_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_25ad_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_25ad_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
@@ -40243,6 +45816,10 @@
 	{0x1734, 0x105c, pci_subsys_8086_2640_1734_105c, 0};
 #undef pci_ss_info_1734_105c
 #define pci_ss_info_1734_105c pci_ss_info_8086_2640_1734_105c
+static const pciSubsystemInfo pci_ss_info_8086_2640_e4bf_0ccd =
+	{0xe4bf, 0x0ccd, pci_subsys_8086_2640_e4bf_0ccd, 0};
+#undef pci_ss_info_e4bf_0ccd
+#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2640_e4bf_0ccd
 static const pciSubsystemInfo pci_ss_info_8086_2641_103c_099c =
 	{0x103c, 0x099c, pci_subsys_8086_2641_103c_099c, 0};
 #undef pci_ss_info_103c_099c
@@ -40263,6 +45840,10 @@
 	{0x8086, 0x4147, pci_subsys_8086_2651_8086_4147, 0};
 #undef pci_ss_info_8086_4147
 #define pci_ss_info_8086_4147 pci_ss_info_8086_2651_8086_4147
+static const pciSubsystemInfo pci_ss_info_8086_2651_e4bf_0ccd =
+	{0xe4bf, 0x0ccd, pci_subsys_8086_2651_e4bf_0ccd, 0};
+#undef pci_ss_info_e4bf_0ccd
+#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2651_e4bf_0ccd
 static const pciSubsystemInfo pci_ss_info_8086_2652_1462_7028 =
 	{0x1462, 0x7028, pci_subsys_8086_2652_1462_7028, 0};
 #undef pci_ss_info_1462_7028
@@ -40291,6 +45872,10 @@
 	{0x1734, 0x105c, pci_subsys_8086_2658_1734_105c, 0};
 #undef pci_ss_info_1734_105c
 #define pci_ss_info_1734_105c pci_ss_info_8086_2658_1734_105c
+static const pciSubsystemInfo pci_ss_info_8086_2658_e4bf_0ccd =
+	{0xe4bf, 0x0ccd, pci_subsys_8086_2658_e4bf_0ccd, 0};
+#undef pci_ss_info_e4bf_0ccd
+#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2658_e4bf_0ccd
 static const pciSubsystemInfo pci_ss_info_8086_2659_1028_0179 =
 	{0x1028, 0x0179, pci_subsys_8086_2659_1028_0179, 0};
 #undef pci_ss_info_1028_0179
@@ -40315,6 +45900,10 @@
 	{0x1734, 0x105c, pci_subsys_8086_2659_1734_105c, 0};
 #undef pci_ss_info_1734_105c
 #define pci_ss_info_1734_105c pci_ss_info_8086_2659_1734_105c
+static const pciSubsystemInfo pci_ss_info_8086_2659_e4bf_0ccd =
+	{0xe4bf, 0x0ccd, pci_subsys_8086_2659_e4bf_0ccd, 0};
+#undef pci_ss_info_e4bf_0ccd
+#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_2659_e4bf_0ccd
 static const pciSubsystemInfo pci_ss_info_8086_265a_1028_0179 =
 	{0x1028, 0x0179, pci_subsys_8086_265a_1028_0179, 0};
 #undef pci_ss_info_1028_0179
@@ -40339,6 +45928,10 @@
 	{0x1734, 0x105c, pci_subsys_8086_265a_1734_105c, 0};
 #undef pci_ss_info_1734_105c
 #define pci_ss_info_1734_105c pci_ss_info_8086_265a_1734_105c
+static const pciSubsystemInfo pci_ss_info_8086_265a_e4bf_0ccd =
+	{0xe4bf, 0x0ccd, pci_subsys_8086_265a_e4bf_0ccd, 0};
+#undef pci_ss_info_e4bf_0ccd
+#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_265a_e4bf_0ccd
 static const pciSubsystemInfo pci_ss_info_8086_265b_1028_0179 =
 	{0x1028, 0x0179, pci_subsys_8086_265b_1028_0179, 0};
 #undef pci_ss_info_1028_0179
@@ -40363,6 +45956,10 @@
 	{0x1734, 0x105c, pci_subsys_8086_265b_1734_105c, 0};
 #undef pci_ss_info_1734_105c
 #define pci_ss_info_1734_105c pci_ss_info_8086_265b_1734_105c
+static const pciSubsystemInfo pci_ss_info_8086_265b_e4bf_0ccd =
+	{0xe4bf, 0x0ccd, pci_subsys_8086_265b_e4bf_0ccd, 0};
+#undef pci_ss_info_e4bf_0ccd
+#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_265b_e4bf_0ccd
 static const pciSubsystemInfo pci_ss_info_8086_265c_1028_0179 =
 	{0x1028, 0x0179, pci_subsys_8086_265c_1028_0179, 0};
 #undef pci_ss_info_1028_0179
@@ -40387,10 +45984,22 @@
 	{0x1734, 0x105c, pci_subsys_8086_265c_1734_105c, 0};
 #undef pci_ss_info_1734_105c
 #define pci_ss_info_1734_105c pci_ss_info_8086_265c_1734_105c
+static const pciSubsystemInfo pci_ss_info_8086_265c_8086_265c =
+	{0x8086, 0x265c, pci_subsys_8086_265c_8086_265c, 0};
+#undef pci_ss_info_8086_265c
+#define pci_ss_info_8086_265c pci_ss_info_8086_265c_8086_265c
+static const pciSubsystemInfo pci_ss_info_8086_265c_e4bf_0ccd =
+	{0xe4bf, 0x0ccd, pci_subsys_8086_265c_e4bf_0ccd, 0};
+#undef pci_ss_info_e4bf_0ccd
+#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_265c_e4bf_0ccd
 static const pciSubsystemInfo pci_ss_info_8086_2660_103c_099c =
 	{0x103c, 0x099c, pci_subsys_8086_2660_103c_099c, 0};
 #undef pci_ss_info_103c_099c
 #define pci_ss_info_103c_099c pci_ss_info_8086_2660_103c_099c
+static const pciSubsystemInfo pci_ss_info_8086_2668_103c_2a09 =
+	{0x103c, 0x2a09, pci_subsys_8086_2668_103c_2a09, 0};
+#undef pci_ss_info_103c_2a09
+#define pci_ss_info_103c_2a09 pci_ss_info_8086_2668_103c_2a09
 static const pciSubsystemInfo pci_ss_info_8086_2668_1043_814e =
 	{0x1043, 0x814e, pci_subsys_8086_2668_1043_814e, 0};
 #undef pci_ss_info_1043_814e
@@ -40415,6 +46024,10 @@
 	{0x1734, 0x105c, pci_subsys_8086_266a_1734_105c, 0};
 #undef pci_ss_info_1734_105c
 #define pci_ss_info_1734_105c pci_ss_info_8086_266a_1734_105c
+static const pciSubsystemInfo pci_ss_info_8086_266a_e4bf_0ccd =
+	{0xe4bf, 0x0ccd, pci_subsys_8086_266a_e4bf_0ccd, 0};
+#undef pci_ss_info_e4bf_0ccd
+#define pci_ss_info_e4bf_0ccd pci_ss_info_8086_266a_e4bf_0ccd
 static const pciSubsystemInfo pci_ss_info_8086_266d_1025_006a =
 	{0x1025, 0x006a, pci_subsys_8086_266d_1025_006a, 0};
 #undef pci_ss_info_1025_006a
@@ -40439,14 +46052,26 @@
 	{0x1028, 0x0188, pci_subsys_8086_266e_1028_0188, 0};
 #undef pci_ss_info_1028_0188
 #define pci_ss_info_1028_0188 pci_ss_info_8086_266e_1028_0188
+static const pciSubsystemInfo pci_ss_info_8086_266e_103c_0944 =
+	{0x103c, 0x0944, pci_subsys_8086_266e_103c_0944, 0};
+#undef pci_ss_info_103c_0944
+#define pci_ss_info_103c_0944 pci_ss_info_8086_266e_103c_0944
 static const pciSubsystemInfo pci_ss_info_8086_266e_103c_099c =
 	{0x103c, 0x099c, pci_subsys_8086_266e_103c_099c, 0};
 #undef pci_ss_info_103c_099c
 #define pci_ss_info_103c_099c pci_ss_info_8086_266e_103c_099c
+static const pciSubsystemInfo pci_ss_info_8086_266e_103c_3006 =
+	{0x103c, 0x3006, pci_subsys_8086_266e_103c_3006, 0};
+#undef pci_ss_info_103c_3006
+#define pci_ss_info_103c_3006 pci_ss_info_8086_266e_103c_3006
 static const pciSubsystemInfo pci_ss_info_8086_266e_1458_a002 =
 	{0x1458, 0xa002, pci_subsys_8086_266e_1458_a002, 0};
 #undef pci_ss_info_1458_a002
 #define pci_ss_info_1458_a002 pci_ss_info_8086_266e_1458_a002
+static const pciSubsystemInfo pci_ss_info_8086_266e_152d_0745 =
+	{0x152d, 0x0745, pci_subsys_8086_266e_152d_0745, 0};
+#undef pci_ss_info_152d_0745
+#define pci_ss_info_152d_0745 pci_ss_info_8086_266e_152d_0745
 static const pciSubsystemInfo pci_ss_info_8086_266e_1734_105a =
 	{0x1734, 0x105a, pci_subsys_8086_266e_1734_105a, 0};
 #undef pci_ss_info_1734_105a
@@ -40471,6 +46096,10 @@
 	{0x1734, 0x105c, pci_subsys_8086_266f_1734_105c, 0};
 #undef pci_ss_info_1734_105c
 #define pci_ss_info_1734_105c pci_ss_info_8086_266f_1734_105c
+static const pciSubsystemInfo pci_ss_info_8086_2770_107b_5048 =
+	{0x107b, 0x5048, pci_subsys_8086_2770_107b_5048, 0};
+#undef pci_ss_info_107b_5048
+#define pci_ss_info_107b_5048 pci_ss_info_8086_2770_107b_5048
 static const pciSubsystemInfo pci_ss_info_8086_2770_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_2770_8086_544e, 0};
 #undef pci_ss_info_8086_544e
@@ -40495,34 +46124,174 @@
 	{0x1043, 0x1881, pci_subsys_8086_2792_1043_1881, 0};
 #undef pci_ss_info_1043_1881
 #define pci_ss_info_1043_1881 pci_ss_info_8086_2792_1043_1881
+static const pciSubsystemInfo pci_ss_info_8086_27a0_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27a0_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27a0_103c_30a1
+static const pciSubsystemInfo pci_ss_info_8086_27a0_17aa_2017 =
+	{0x17aa, 0x2017, pci_subsys_8086_27a0_17aa_2017, 0};
+#undef pci_ss_info_17aa_2017
+#define pci_ss_info_17aa_2017 pci_ss_info_8086_27a0_17aa_2017
+static const pciSubsystemInfo pci_ss_info_8086_27a2_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27a2_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27a2_103c_30a1
+static const pciSubsystemInfo pci_ss_info_8086_27a2_17aa_201a =
+	{0x17aa, 0x201a, pci_subsys_8086_27a2_17aa_201a, 0};
+#undef pci_ss_info_17aa_201a
+#define pci_ss_info_17aa_201a pci_ss_info_8086_27a2_17aa_201a
+static const pciSubsystemInfo pci_ss_info_8086_27a6_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27a6_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27a6_103c_30a1
+static const pciSubsystemInfo pci_ss_info_8086_27a6_17aa_201a =
+	{0x17aa, 0x201a, pci_subsys_8086_27a6_17aa_201a, 0};
+#undef pci_ss_info_17aa_201a
+#define pci_ss_info_17aa_201a pci_ss_info_8086_27a6_17aa_201a
+static const pciSubsystemInfo pci_ss_info_8086_27b8_107b_5048 =
+	{0x107b, 0x5048, pci_subsys_8086_27b8_107b_5048, 0};
+#undef pci_ss_info_107b_5048
+#define pci_ss_info_107b_5048 pci_ss_info_8086_27b8_107b_5048
 static const pciSubsystemInfo pci_ss_info_8086_27b8_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27b8_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27b8_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27b9_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27b9_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27b9_103c_30a1
+static const pciSubsystemInfo pci_ss_info_8086_27b9_10f7_8338 =
+	{0x10f7, 0x8338, pci_subsys_8086_27b9_10f7_8338, 0};
+#undef pci_ss_info_10f7_8338
+#define pci_ss_info_10f7_8338 pci_ss_info_8086_27b9_10f7_8338
+static const pciSubsystemInfo pci_ss_info_8086_27b9_17aa_2009 =
+	{0x17aa, 0x2009, pci_subsys_8086_27b9_17aa_2009, 0};
+#undef pci_ss_info_17aa_2009
+#define pci_ss_info_17aa_2009 pci_ss_info_8086_27b9_17aa_2009
+static const pciSubsystemInfo pci_ss_info_8086_27c0_107b_5048 =
+	{0x107b, 0x5048, pci_subsys_8086_27c0_107b_5048, 0};
+#undef pci_ss_info_107b_5048
+#define pci_ss_info_107b_5048 pci_ss_info_8086_27c0_107b_5048
 static const pciSubsystemInfo pci_ss_info_8086_27c0_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27c0_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27c0_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27c5_17aa_200d =
+	{0x17aa, 0x200d, pci_subsys_8086_27c5_17aa_200d, 0};
+#undef pci_ss_info_17aa_200d
+#define pci_ss_info_17aa_200d pci_ss_info_8086_27c5_17aa_200d
+static const pciSubsystemInfo pci_ss_info_8086_27c8_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27c8_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27c8_103c_30a1
+static const pciSubsystemInfo pci_ss_info_8086_27c8_107b_5048 =
+	{0x107b, 0x5048, pci_subsys_8086_27c8_107b_5048, 0};
+#undef pci_ss_info_107b_5048
+#define pci_ss_info_107b_5048 pci_ss_info_8086_27c8_107b_5048
+static const pciSubsystemInfo pci_ss_info_8086_27c8_17aa_200a =
+	{0x17aa, 0x200a, pci_subsys_8086_27c8_17aa_200a, 0};
+#undef pci_ss_info_17aa_200a
+#define pci_ss_info_17aa_200a pci_ss_info_8086_27c8_17aa_200a
 static const pciSubsystemInfo pci_ss_info_8086_27c8_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27c8_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27c8_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27c9_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27c9_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27c9_103c_30a1
+static const pciSubsystemInfo pci_ss_info_8086_27c9_107b_5048 =
+	{0x107b, 0x5048, pci_subsys_8086_27c9_107b_5048, 0};
+#undef pci_ss_info_107b_5048
+#define pci_ss_info_107b_5048 pci_ss_info_8086_27c9_107b_5048
+static const pciSubsystemInfo pci_ss_info_8086_27c9_17aa_200a =
+	{0x17aa, 0x200a, pci_subsys_8086_27c9_17aa_200a, 0};
+#undef pci_ss_info_17aa_200a
+#define pci_ss_info_17aa_200a pci_ss_info_8086_27c9_17aa_200a
 static const pciSubsystemInfo pci_ss_info_8086_27c9_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27c9_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27c9_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27ca_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27ca_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27ca_103c_30a1
+static const pciSubsystemInfo pci_ss_info_8086_27ca_107b_5048 =
+	{0x107b, 0x5048, pci_subsys_8086_27ca_107b_5048, 0};
+#undef pci_ss_info_107b_5048
+#define pci_ss_info_107b_5048 pci_ss_info_8086_27ca_107b_5048
+static const pciSubsystemInfo pci_ss_info_8086_27ca_17aa_200a =
+	{0x17aa, 0x200a, pci_subsys_8086_27ca_17aa_200a, 0};
+#undef pci_ss_info_17aa_200a
+#define pci_ss_info_17aa_200a pci_ss_info_8086_27ca_17aa_200a
 static const pciSubsystemInfo pci_ss_info_8086_27ca_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27ca_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27ca_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27cb_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27cb_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27cb_103c_30a1
+static const pciSubsystemInfo pci_ss_info_8086_27cb_107b_5048 =
+	{0x107b, 0x5048, pci_subsys_8086_27cb_107b_5048, 0};
+#undef pci_ss_info_107b_5048
+#define pci_ss_info_107b_5048 pci_ss_info_8086_27cb_107b_5048
+static const pciSubsystemInfo pci_ss_info_8086_27cb_17aa_200a =
+	{0x17aa, 0x200a, pci_subsys_8086_27cb_17aa_200a, 0};
+#undef pci_ss_info_17aa_200a
+#define pci_ss_info_17aa_200a pci_ss_info_8086_27cb_17aa_200a
 static const pciSubsystemInfo pci_ss_info_8086_27cb_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27cb_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27cb_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27cc_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27cc_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27cc_103c_30a1
+static const pciSubsystemInfo pci_ss_info_8086_27cc_17aa_200b =
+	{0x17aa, 0x200b, pci_subsys_8086_27cc_17aa_200b, 0};
+#undef pci_ss_info_17aa_200b
+#define pci_ss_info_17aa_200b pci_ss_info_8086_27cc_17aa_200b
 static const pciSubsystemInfo pci_ss_info_8086_27cc_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27cc_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27cc_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_27d8_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27d8_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27d8_103c_30a1
+static const pciSubsystemInfo pci_ss_info_8086_27d8_107b_5048 =
+	{0x107b, 0x5048, pci_subsys_8086_27d8_107b_5048, 0};
+#undef pci_ss_info_107b_5048
+#define pci_ss_info_107b_5048 pci_ss_info_8086_27d8_107b_5048
+static const pciSubsystemInfo pci_ss_info_8086_27d8_10f7_8338 =
+	{0x10f7, 0x8338, pci_subsys_8086_27d8_10f7_8338, 0};
+#undef pci_ss_info_10f7_8338
+#define pci_ss_info_10f7_8338 pci_ss_info_8086_27d8_10f7_8338
+static const pciSubsystemInfo pci_ss_info_8086_27d8_1179_ff31 =
+	{0x1179, 0xff31, pci_subsys_8086_27d8_1179_ff31, 0};
+#undef pci_ss_info_1179_ff31
+#define pci_ss_info_1179_ff31 pci_ss_info_8086_27d8_1179_ff31
+static const pciSubsystemInfo pci_ss_info_8086_27d8_152d_0753 =
+	{0x152d, 0x0753, pci_subsys_8086_27d8_152d_0753, 0};
+#undef pci_ss_info_152d_0753
+#define pci_ss_info_152d_0753 pci_ss_info_8086_27d8_152d_0753
+static const pciSubsystemInfo pci_ss_info_8086_27d8_1734_10ad =
+	{0x1734, 0x10ad, pci_subsys_8086_27d8_1734_10ad, 0};
+#undef pci_ss_info_1734_10ad
+#define pci_ss_info_1734_10ad pci_ss_info_8086_27d8_1734_10ad
+static const pciSubsystemInfo pci_ss_info_8086_27d8_17aa_2010 =
+	{0x17aa, 0x2010, pci_subsys_8086_27d8_17aa_2010, 0};
+#undef pci_ss_info_17aa_2010
+#define pci_ss_info_17aa_2010 pci_ss_info_8086_27d8_17aa_2010
+static const pciSubsystemInfo pci_ss_info_8086_27da_10f7_8338 =
+	{0x10f7, 0x8338, pci_subsys_8086_27da_10f7_8338, 0};
+#undef pci_ss_info_10f7_8338
+#define pci_ss_info_10f7_8338 pci_ss_info_8086_27da_10f7_8338
+static const pciSubsystemInfo pci_ss_info_8086_27da_17aa_200f =
+	{0x17aa, 0x200f, pci_subsys_8086_27da_17aa_200f, 0};
+#undef pci_ss_info_17aa_200f
+#define pci_ss_info_17aa_200f pci_ss_info_8086_27da_17aa_200f
 static const pciSubsystemInfo pci_ss_info_8086_27da_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27da_8086_544e, 0};
 #undef pci_ss_info_8086_544e
@@ -40531,10 +46300,62 @@
 	{0x8086, 0x308d, pci_subsys_8086_27dc_8086_308d, 0};
 #undef pci_ss_info_8086_308d
 #define pci_ss_info_8086_308d pci_ss_info_8086_27dc_8086_308d
+static const pciSubsystemInfo pci_ss_info_8086_27df_103c_30a1 =
+	{0x103c, 0x30a1, pci_subsys_8086_27df_103c_30a1, 0};
+#undef pci_ss_info_103c_30a1
+#define pci_ss_info_103c_30a1 pci_ss_info_8086_27df_103c_30a1
+static const pciSubsystemInfo pci_ss_info_8086_27df_107b_5048 =
+	{0x107b, 0x5048, pci_subsys_8086_27df_107b_5048, 0};
+#undef pci_ss_info_107b_5048
+#define pci_ss_info_107b_5048 pci_ss_info_8086_27df_107b_5048
+static const pciSubsystemInfo pci_ss_info_8086_27df_10f7_8338 =
+	{0x10f7, 0x8338, pci_subsys_8086_27df_10f7_8338, 0};
+#undef pci_ss_info_10f7_8338
+#define pci_ss_info_10f7_8338 pci_ss_info_8086_27df_10f7_8338
+static const pciSubsystemInfo pci_ss_info_8086_27df_17aa_200c =
+	{0x17aa, 0x200c, pci_subsys_8086_27df_17aa_200c, 0};
+#undef pci_ss_info_17aa_200c
+#define pci_ss_info_17aa_200c pci_ss_info_8086_27df_17aa_200c
 static const pciSubsystemInfo pci_ss_info_8086_27df_8086_544e =
 	{0x8086, 0x544e, pci_subsys_8086_27df_8086_544e, 0};
 #undef pci_ss_info_8086_544e
 #define pci_ss_info_8086_544e pci_ss_info_8086_27df_8086_544e
+static const pciSubsystemInfo pci_ss_info_8086_2820_1462_7235 =
+	{0x1462, 0x7235, pci_subsys_8086_2820_1462_7235, 0};
+#undef pci_ss_info_1462_7235
+#define pci_ss_info_1462_7235 pci_ss_info_8086_2820_1462_7235
+static const pciSubsystemInfo pci_ss_info_8086_2825_1462_7235 =
+	{0x1462, 0x7235, pci_subsys_8086_2825_1462_7235, 0};
+#undef pci_ss_info_1462_7235
+#define pci_ss_info_1462_7235 pci_ss_info_8086_2825_1462_7235
+static const pciSubsystemInfo pci_ss_info_8086_2830_1462_7235 =
+	{0x1462, 0x7235, pci_subsys_8086_2830_1462_7235, 0};
+#undef pci_ss_info_1462_7235
+#define pci_ss_info_1462_7235 pci_ss_info_8086_2830_1462_7235
+static const pciSubsystemInfo pci_ss_info_8086_2831_1462_7235 =
+	{0x1462, 0x7235, pci_subsys_8086_2831_1462_7235, 0};
+#undef pci_ss_info_1462_7235
+#define pci_ss_info_1462_7235 pci_ss_info_8086_2831_1462_7235
+static const pciSubsystemInfo pci_ss_info_8086_2834_1462_7235 =
+	{0x1462, 0x7235, pci_subsys_8086_2834_1462_7235, 0};
+#undef pci_ss_info_1462_7235
+#define pci_ss_info_1462_7235 pci_ss_info_8086_2834_1462_7235
+static const pciSubsystemInfo pci_ss_info_8086_2836_1462_7235 =
+	{0x1462, 0x7235, pci_subsys_8086_2836_1462_7235, 0};
+#undef pci_ss_info_1462_7235
+#define pci_ss_info_1462_7235 pci_ss_info_8086_2836_1462_7235
+static const pciSubsystemInfo pci_ss_info_8086_283e_1462_7235 =
+	{0x1462, 0x7235, pci_subsys_8086_283e_1462_7235, 0};
+#undef pci_ss_info_1462_7235
+#define pci_ss_info_1462_7235 pci_ss_info_8086_283e_1462_7235
+static const pciSubsystemInfo pci_ss_info_8086_3200_1775_c200 =
+	{0x1775, 0xc200, pci_subsys_8086_3200_1775_c200, 0};
+#undef pci_ss_info_1775_c200
+#define pci_ss_info_1775_c200 pci_ss_info_8086_3200_1775_c200
+static const pciSubsystemInfo pci_ss_info_8086_3340_1014_0529 =
+	{0x1014, 0x0529, pci_subsys_8086_3340_1014_0529, 0};
+#undef pci_ss_info_1014_0529
+#define pci_ss_info_1014_0529 pci_ss_info_8086_3340_1014_0529
 static const pciSubsystemInfo pci_ss_info_8086_3340_1025_005a =
 	{0x1025, 0x005a, pci_subsys_8086_3340_1025_005a, 0};
 #undef pci_ss_info_1025_005a
@@ -40547,6 +46368,18 @@
 	{0x103c, 0x0890, pci_subsys_8086_3340_103c_0890, 0};
 #undef pci_ss_info_103c_0890
 #define pci_ss_info_103c_0890 pci_ss_info_8086_3340_103c_0890
+static const pciSubsystemInfo pci_ss_info_8086_3340_103c_08b0 =
+	{0x103c, 0x08b0, pci_subsys_8086_3340_103c_08b0, 0};
+#undef pci_ss_info_103c_08b0
+#define pci_ss_info_103c_08b0 pci_ss_info_8086_3340_103c_08b0
+static const pciSubsystemInfo pci_ss_info_8086_3340_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_3340_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_3340_144d_c00c
+static const pciSubsystemInfo pci_ss_info_8086_3341_144d_c00c =
+	{0x144d, 0xc00c, pci_subsys_8086_3341_144d_c00c, 0};
+#undef pci_ss_info_144d_c00c
+#define pci_ss_info_144d_c00c pci_ss_info_8086_3341_144d_c00c
 static const pciSubsystemInfo pci_ss_info_8086_3575_0e11_0030 =
 	{0x0e11, 0x0030, pci_subsys_8086_3575_0e11_0030, 0};
 #undef pci_ss_info_0e11_0030
@@ -40563,6 +46396,10 @@
 	{0x1014, 0x0513, pci_subsys_8086_3577_1014_0513, 0};
 #undef pci_ss_info_1014_0513
 #define pci_ss_info_1014_0513 pci_ss_info_8086_3577_1014_0513
+static const pciSubsystemInfo pci_ss_info_8086_3580_1014_055c =
+	{0x1014, 0x055c, pci_subsys_8086_3580_1014_055c, 0};
+#undef pci_ss_info_1014_055c
+#define pci_ss_info_1014_055c pci_ss_info_8086_3580_1014_055c
 static const pciSubsystemInfo pci_ss_info_8086_3580_1028_0139 =
 	{0x1028, 0x0139, pci_subsys_8086_3580_1028_0139, 0};
 #undef pci_ss_info_1028_0139
@@ -40579,6 +46416,14 @@
 	{0x1734, 0x1055, pci_subsys_8086_3580_1734_1055, 0};
 #undef pci_ss_info_1734_1055
 #define pci_ss_info_1734_1055 pci_ss_info_8086_3580_1734_1055
+static const pciSubsystemInfo pci_ss_info_8086_3580_1775_10d0 =
+	{0x1775, 0x10d0, pci_subsys_8086_3580_1775_10d0, 0};
+#undef pci_ss_info_1775_10d0
+#define pci_ss_info_1775_10d0 pci_ss_info_8086_3580_1775_10d0
+static const pciSubsystemInfo pci_ss_info_8086_3580_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_3580_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_3580_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_3580_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_3580_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
@@ -40587,10 +46432,22 @@
 	{0x4c53, 0x10e0, pci_subsys_8086_3580_4c53_10e0, 0};
 #undef pci_ss_info_4c53_10e0
 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_3580_4c53_10e0
+static const pciSubsystemInfo pci_ss_info_8086_3580_e4bf_0cc9 =
+	{0xe4bf, 0x0cc9, pci_subsys_8086_3580_e4bf_0cc9, 0};
+#undef pci_ss_info_e4bf_0cc9
+#define pci_ss_info_e4bf_0cc9 pci_ss_info_8086_3580_e4bf_0cc9
+static const pciSubsystemInfo pci_ss_info_8086_3580_e4bf_0cd2 =
+	{0xe4bf, 0x0cd2, pci_subsys_8086_3580_e4bf_0cd2, 0};
+#undef pci_ss_info_e4bf_0cd2
+#define pci_ss_info_e4bf_0cd2 pci_ss_info_8086_3580_e4bf_0cd2
 static const pciSubsystemInfo pci_ss_info_8086_3581_1734_1055 =
 	{0x1734, 0x1055, pci_subsys_8086_3581_1734_1055, 0};
 #undef pci_ss_info_1734_1055
 #define pci_ss_info_1734_1055 pci_ss_info_8086_3581_1734_1055
+static const pciSubsystemInfo pci_ss_info_8086_3582_1014_0562 =
+	{0x1014, 0x0562, pci_subsys_8086_3582_1014_0562, 0};
+#undef pci_ss_info_1014_0562
+#define pci_ss_info_1014_0562 pci_ss_info_8086_3582_1014_0562
 static const pciSubsystemInfo pci_ss_info_8086_3582_1028_0139 =
 	{0x1028, 0x0139, pci_subsys_8086_3582_1028_0139, 0};
 #undef pci_ss_info_1028_0139
@@ -40599,6 +46456,14 @@
 	{0x1028, 0x0163, pci_subsys_8086_3582_1028_0163, 0};
 #undef pci_ss_info_1028_0163
 #define pci_ss_info_1028_0163 pci_ss_info_8086_3582_1028_0163
+static const pciSubsystemInfo pci_ss_info_8086_3582_1775_10d0 =
+	{0x1775, 0x10d0, pci_subsys_8086_3582_1775_10d0, 0};
+#undef pci_ss_info_1775_10d0
+#define pci_ss_info_1775_10d0 pci_ss_info_8086_3582_1775_10d0
+static const pciSubsystemInfo pci_ss_info_8086_3582_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_3582_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_3582_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_3582_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_3582_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
@@ -40607,6 +46472,18 @@
 	{0x4c53, 0x10e0, pci_subsys_8086_3582_4c53_10e0, 0};
 #undef pci_ss_info_4c53_10e0
 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_3582_4c53_10e0
+static const pciSubsystemInfo pci_ss_info_8086_3582_e4bf_0cc9 =
+	{0xe4bf, 0x0cc9, pci_subsys_8086_3582_e4bf_0cc9, 0};
+#undef pci_ss_info_e4bf_0cc9
+#define pci_ss_info_e4bf_0cc9 pci_ss_info_8086_3582_e4bf_0cc9
+static const pciSubsystemInfo pci_ss_info_8086_3582_e4bf_0cd2 =
+	{0xe4bf, 0x0cd2, pci_subsys_8086_3582_e4bf_0cd2, 0};
+#undef pci_ss_info_e4bf_0cd2
+#define pci_ss_info_e4bf_0cd2 pci_ss_info_8086_3582_e4bf_0cd2
+static const pciSubsystemInfo pci_ss_info_8086_3584_1014_055d =
+	{0x1014, 0x055d, pci_subsys_8086_3584_1014_055d, 0};
+#undef pci_ss_info_1014_055d
+#define pci_ss_info_1014_055d pci_ss_info_8086_3584_1014_055d
 static const pciSubsystemInfo pci_ss_info_8086_3584_1028_0139 =
 	{0x1028, 0x0139, pci_subsys_8086_3584_1028_0139, 0};
 #undef pci_ss_info_1028_0139
@@ -40623,6 +46500,14 @@
 	{0x1734, 0x1055, pci_subsys_8086_3584_1734_1055, 0};
 #undef pci_ss_info_1734_1055
 #define pci_ss_info_1734_1055 pci_ss_info_8086_3584_1734_1055
+static const pciSubsystemInfo pci_ss_info_8086_3584_1775_10d0 =
+	{0x1775, 0x10d0, pci_subsys_8086_3584_1775_10d0, 0};
+#undef pci_ss_info_1775_10d0
+#define pci_ss_info_1775_10d0 pci_ss_info_8086_3584_1775_10d0
+static const pciSubsystemInfo pci_ss_info_8086_3584_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_3584_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_3584_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_3584_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_3584_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
@@ -40631,6 +46516,10 @@
 	{0x4c53, 0x10e0, pci_subsys_8086_3584_4c53_10e0, 0};
 #undef pci_ss_info_4c53_10e0
 #define pci_ss_info_4c53_10e0 pci_ss_info_8086_3584_4c53_10e0
+static const pciSubsystemInfo pci_ss_info_8086_3585_1014_055e =
+	{0x1014, 0x055e, pci_subsys_8086_3585_1014_055e, 0};
+#undef pci_ss_info_1014_055e
+#define pci_ss_info_1014_055e pci_ss_info_8086_3585_1014_055e
 static const pciSubsystemInfo pci_ss_info_8086_3585_1028_0139 =
 	{0x1028, 0x0139, pci_subsys_8086_3585_1028_0139, 0};
 #undef pci_ss_info_1028_0139
@@ -40647,6 +46536,14 @@
 	{0x1734, 0x1055, pci_subsys_8086_3585_1734_1055, 0};
 #undef pci_ss_info_1734_1055
 #define pci_ss_info_1734_1055 pci_ss_info_8086_3585_1734_1055
+static const pciSubsystemInfo pci_ss_info_8086_3585_1775_10d0 =
+	{0x1775, 0x10d0, pci_subsys_8086_3585_1775_10d0, 0};
+#undef pci_ss_info_1775_10d0
+#define pci_ss_info_1775_10d0 pci_ss_info_8086_3585_1775_10d0
+static const pciSubsystemInfo pci_ss_info_8086_3585_1775_ce90 =
+	{0x1775, 0xce90, pci_subsys_8086_3585_1775_ce90, 0};
+#undef pci_ss_info_1775_ce90
+#define pci_ss_info_1775_ce90 pci_ss_info_8086_3585_1775_ce90
 static const pciSubsystemInfo pci_ss_info_8086_3585_4c53_10b0 =
 	{0x4c53, 0x10b0, pci_subsys_8086_3585_4c53_10b0, 0};
 #undef pci_ss_info_4c53_10b0
@@ -40683,6 +46580,14 @@
 	{0x1028, 0x0169, pci_subsys_8086_359e_1028_0169, 0};
 #undef pci_ss_info_1028_0169
 #define pci_ss_info_1028_0169 pci_ss_info_8086_359e_1028_0169
+static const pciSubsystemInfo pci_ss_info_8086_4220_2731_8086 =
+	{0x2731, 0x8086, pci_subsys_8086_4220_2731_8086, 0};
+#undef pci_ss_info_2731_8086
+#define pci_ss_info_2731_8086 pci_ss_info_8086_4220_2731_8086
+static const pciSubsystemInfo pci_ss_info_8086_4220_8086_2731 =
+	{0x8086, 0x2731, pci_subsys_8086_4220_8086_2731, 0};
+#undef pci_ss_info_8086_2731
+#define pci_ss_info_8086_2731 pci_ss_info_8086_4220_8086_2731
 static const pciSubsystemInfo pci_ss_info_8086_4222_8086_1005 =
 	{0x8086, 0x1005, pci_subsys_8086_4222_8086_1005, 0};
 #undef pci_ss_info_8086_1005
@@ -40695,6 +46600,14 @@
 	{0x8086, 0x1044, pci_subsys_8086_4222_8086_1044, 0};
 #undef pci_ss_info_8086_1044
 #define pci_ss_info_8086_1044 pci_ss_info_8086_4222_8086_1044
+static const pciSubsystemInfo pci_ss_info_8086_4223_1351_103c =
+	{0x1351, 0x103c, pci_subsys_8086_4223_1351_103c, 0};
+#undef pci_ss_info_1351_103c
+#define pci_ss_info_1351_103c pci_ss_info_8086_4223_1351_103c
+static const pciSubsystemInfo pci_ss_info_8086_4227_8086_1011 =
+	{0x8086, 0x1011, pci_subsys_8086_4227_8086_1011, 0};
+#undef pci_ss_info_8086_1011
+#define pci_ss_info_8086_1011 pci_ss_info_8086_4227_8086_1011
 static const pciSubsystemInfo pci_ss_info_8086_4227_8086_1014 =
 	{0x8086, 0x1014, pci_subsys_8086_4227_8086_1014, 0};
 #undef pci_ss_info_8086_1014
@@ -40747,6 +46660,10 @@
 	{0x0e11, 0xb110, pci_subsys_8086_7190_0e11_b110, 0};
 #undef pci_ss_info_0e11_b110
 #define pci_ss_info_0e11_b110 pci_ss_info_8086_7190_0e11_b110
+static const pciSubsystemInfo pci_ss_info_8086_7190_1028_008e =
+	{0x1028, 0x008e, pci_subsys_8086_7190_1028_008e, 0};
+#undef pci_ss_info_1028_008e
+#define pci_ss_info_1028_008e pci_ss_info_8086_7190_1028_008e
 static const pciSubsystemInfo pci_ss_info_8086_7190_1179_0001 =
 	{0x1179, 0x0001, pci_subsys_8086_7190_1179_0001, 0};
 #undef pci_ss_info_1179_0001
@@ -40763,6 +46680,10 @@
 	{0x4c53, 0x1051, pci_subsys_8086_7190_4c53_1051, 0};
 #undef pci_ss_info_4c53_1051
 #define pci_ss_info_4c53_1051 pci_ss_info_8086_7190_4c53_1051
+static const pciSubsystemInfo pci_ss_info_8086_7191_1028_008e =
+	{0x1028, 0x008e, pci_subsys_8086_7191_1028_008e, 0};
+#undef pci_ss_info_1028_008e
+#define pci_ss_info_1028_008e pci_ss_info_8086_7191_1028_008e
 static const pciSubsystemInfo pci_ss_info_8086_7192_0e11_0460 =
 	{0x0e11, 0x0460, pci_subsys_8086_7192_0e11_0460, 0};
 #undef pci_ss_info_0e11_0460
@@ -40847,6 +46768,14 @@
 	{0x1993, 0x0def, pci_subsys_8086_8500_1993_0def, 0};
 #undef pci_ss_info_1993_0def
 #define pci_ss_info_1993_0def pci_ss_info_8086_8500_1993_0def
+static const pciSubsystemInfo pci_ss_info_8086_b555_12c7_5005 =
+	{0x12c7, 0x5005, pci_subsys_8086_b555_12c7_5005, 0};
+#undef pci_ss_info_12c7_5005
+#define pci_ss_info_12c7_5005 pci_ss_info_8086_b555_12c7_5005
+static const pciSubsystemInfo pci_ss_info_8086_b555_12c7_5006 =
+	{0x12c7, 0x5006, pci_subsys_8086_b555_12c7_5006, 0};
+#undef pci_ss_info_12c7_5006
+#define pci_ss_info_12c7_5006 pci_ss_info_8086_b555_12c7_5006
 static const pciSubsystemInfo pci_ss_info_8086_b555_12d9_000a =
 	{0x12d9, 0x000a, pci_subsys_8086_b555_12d9_000a, 0};
 #undef pci_ss_info_12d9_000a
@@ -41252,6 +47181,98 @@
 	{0x9005, 0x029a, pci_subsys_9005_0285_9005_029a, 0};
 #undef pci_ss_info_9005_029a
 #define pci_ss_info_9005_029a pci_ss_info_9005_0285_9005_029a
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02a4 =
+	{0x9005, 0x02a4, pci_subsys_9005_0285_9005_02a4, 0};
+#undef pci_ss_info_9005_02a4
+#define pci_ss_info_9005_02a4 pci_ss_info_9005_0285_9005_02a4
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02a5 =
+	{0x9005, 0x02a5, pci_subsys_9005_0285_9005_02a5, 0};
+#undef pci_ss_info_9005_02a5
+#define pci_ss_info_9005_02a5 pci_ss_info_9005_0285_9005_02a5
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02b5 =
+	{0x9005, 0x02b5, pci_subsys_9005_0285_9005_02b5, 0};
+#undef pci_ss_info_9005_02b5
+#define pci_ss_info_9005_02b5 pci_ss_info_9005_0285_9005_02b5
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02b6 =
+	{0x9005, 0x02b6, pci_subsys_9005_0285_9005_02b6, 0};
+#undef pci_ss_info_9005_02b6
+#define pci_ss_info_9005_02b6 pci_ss_info_9005_0285_9005_02b6
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02b7 =
+	{0x9005, 0x02b7, pci_subsys_9005_0285_9005_02b7, 0};
+#undef pci_ss_info_9005_02b7
+#define pci_ss_info_9005_02b7 pci_ss_info_9005_0285_9005_02b7
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02b8 =
+	{0x9005, 0x02b8, pci_subsys_9005_0285_9005_02b8, 0};
+#undef pci_ss_info_9005_02b8
+#define pci_ss_info_9005_02b8 pci_ss_info_9005_0285_9005_02b8
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02b9 =
+	{0x9005, 0x02b9, pci_subsys_9005_0285_9005_02b9, 0};
+#undef pci_ss_info_9005_02b9
+#define pci_ss_info_9005_02b9 pci_ss_info_9005_0285_9005_02b9
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02ba =
+	{0x9005, 0x02ba, pci_subsys_9005_0285_9005_02ba, 0};
+#undef pci_ss_info_9005_02ba
+#define pci_ss_info_9005_02ba pci_ss_info_9005_0285_9005_02ba
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02bb =
+	{0x9005, 0x02bb, pci_subsys_9005_0285_9005_02bb, 0};
+#undef pci_ss_info_9005_02bb
+#define pci_ss_info_9005_02bb pci_ss_info_9005_0285_9005_02bb
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02bc =
+	{0x9005, 0x02bc, pci_subsys_9005_0285_9005_02bc, 0};
+#undef pci_ss_info_9005_02bc
+#define pci_ss_info_9005_02bc pci_ss_info_9005_0285_9005_02bc
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02bd =
+	{0x9005, 0x02bd, pci_subsys_9005_0285_9005_02bd, 0};
+#undef pci_ss_info_9005_02bd
+#define pci_ss_info_9005_02bd pci_ss_info_9005_0285_9005_02bd
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02be =
+	{0x9005, 0x02be, pci_subsys_9005_0285_9005_02be, 0};
+#undef pci_ss_info_9005_02be
+#define pci_ss_info_9005_02be pci_ss_info_9005_0285_9005_02be
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02bf =
+	{0x9005, 0x02bf, pci_subsys_9005_0285_9005_02bf, 0};
+#undef pci_ss_info_9005_02bf
+#define pci_ss_info_9005_02bf pci_ss_info_9005_0285_9005_02bf
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02c0 =
+	{0x9005, 0x02c0, pci_subsys_9005_0285_9005_02c0, 0};
+#undef pci_ss_info_9005_02c0
+#define pci_ss_info_9005_02c0 pci_ss_info_9005_0285_9005_02c0
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02c1 =
+	{0x9005, 0x02c1, pci_subsys_9005_0285_9005_02c1, 0};
+#undef pci_ss_info_9005_02c1
+#define pci_ss_info_9005_02c1 pci_ss_info_9005_0285_9005_02c1
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02c2 =
+	{0x9005, 0x02c2, pci_subsys_9005_0285_9005_02c2, 0};
+#undef pci_ss_info_9005_02c2
+#define pci_ss_info_9005_02c2 pci_ss_info_9005_0285_9005_02c2
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02c3 =
+	{0x9005, 0x02c3, pci_subsys_9005_0285_9005_02c3, 0};
+#undef pci_ss_info_9005_02c3
+#define pci_ss_info_9005_02c3 pci_ss_info_9005_0285_9005_02c3
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02c4 =
+	{0x9005, 0x02c4, pci_subsys_9005_0285_9005_02c4, 0};
+#undef pci_ss_info_9005_02c4
+#define pci_ss_info_9005_02c4 pci_ss_info_9005_0285_9005_02c4
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02c5 =
+	{0x9005, 0x02c5, pci_subsys_9005_0285_9005_02c5, 0};
+#undef pci_ss_info_9005_02c5
+#define pci_ss_info_9005_02c5 pci_ss_info_9005_0285_9005_02c5
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02c6 =
+	{0x9005, 0x02c6, pci_subsys_9005_0285_9005_02c6, 0};
+#undef pci_ss_info_9005_02c6
+#define pci_ss_info_9005_02c6 pci_ss_info_9005_0285_9005_02c6
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02c7 =
+	{0x9005, 0x02c7, pci_subsys_9005_0285_9005_02c7, 0};
+#undef pci_ss_info_9005_02c7
+#define pci_ss_info_9005_02c7 pci_ss_info_9005_0285_9005_02c7
+static const pciSubsystemInfo pci_ss_info_9005_0285_9005_02c8 =
+	{0x9005, 0x02c8, pci_subsys_9005_0285_9005_02c8, 0};
+#undef pci_ss_info_9005_02c8
+#define pci_ss_info_9005_02c8 pci_ss_info_9005_0285_9005_02c8
+static const pciSubsystemInfo pci_ss_info_9005_0286_1014_034d =
+	{0x1014, 0x034d, pci_subsys_9005_0286_1014_034d, 0};
+#undef pci_ss_info_1014_034d
+#define pci_ss_info_1014_034d pci_ss_info_9005_0286_1014_034d
 static const pciSubsystemInfo pci_ss_info_9005_0286_1014_9540 =
 	{0x1014, 0x9540, pci_subsys_9005_0286_1014_9540, 0};
 #undef pci_ss_info_1014_9540
@@ -41332,10 +47353,50 @@
 	{0x9005, 0x02aa, pci_subsys_9005_0286_9005_02aa, 0};
 #undef pci_ss_info_9005_02aa
 #define pci_ss_info_9005_02aa pci_ss_info_9005_0286_9005_02aa
+static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02ac =
+	{0x9005, 0x02ac, pci_subsys_9005_0286_9005_02ac, 0};
+#undef pci_ss_info_9005_02ac
+#define pci_ss_info_9005_02ac pci_ss_info_9005_0286_9005_02ac
+static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02b3 =
+	{0x9005, 0x02b3, pci_subsys_9005_0286_9005_02b3, 0};
+#undef pci_ss_info_9005_02b3
+#define pci_ss_info_9005_02b3 pci_ss_info_9005_0286_9005_02b3
+static const pciSubsystemInfo pci_ss_info_9005_0286_9005_02b4 =
+	{0x9005, 0x02b4, pci_subsys_9005_0286_9005_02b4, 0};
+#undef pci_ss_info_9005_02b4
+#define pci_ss_info_9005_02b4 pci_ss_info_9005_0286_9005_02b4
 static const pciSubsystemInfo pci_ss_info_9005_0286_9005_0800 =
 	{0x9005, 0x0800, pci_subsys_9005_0286_9005_0800, 0};
 #undef pci_ss_info_9005_0800
 #define pci_ss_info_9005_0800 pci_ss_info_9005_0286_9005_0800
+static const pciSubsystemInfo pci_ss_info_9005_0410_9005_0410 =
+	{0x9005, 0x0410, pci_subsys_9005_0410_9005_0410, 0};
+#undef pci_ss_info_9005_0410
+#define pci_ss_info_9005_0410 pci_ss_info_9005_0410_9005_0410
+static const pciSubsystemInfo pci_ss_info_9005_0410_9005_0411 =
+	{0x9005, 0x0411, pci_subsys_9005_0410_9005_0411, 0};
+#undef pci_ss_info_9005_0411
+#define pci_ss_info_9005_0411 pci_ss_info_9005_0410_9005_0411
+static const pciSubsystemInfo pci_ss_info_9005_0412_9005_0412 =
+	{0x9005, 0x0412, pci_subsys_9005_0412_9005_0412, 0};
+#undef pci_ss_info_9005_0412
+#define pci_ss_info_9005_0412 pci_ss_info_9005_0412_9005_0412
+static const pciSubsystemInfo pci_ss_info_9005_0412_9005_0413 =
+	{0x9005, 0x0413, pci_subsys_9005_0412_9005_0413, 0};
+#undef pci_ss_info_9005_0413
+#define pci_ss_info_9005_0413 pci_ss_info_9005_0412_9005_0413
+static const pciSubsystemInfo pci_ss_info_9005_041f_9005_041f =
+	{0x9005, 0x041f, pci_subsys_9005_041f_9005_041f, 0};
+#undef pci_ss_info_9005_041f
+#define pci_ss_info_9005_041f pci_ss_info_9005_041f_9005_041f
+static const pciSubsystemInfo pci_ss_info_9005_0430_9005_0430 =
+	{0x9005, 0x0430, pci_subsys_9005_0430_9005_0430, 0};
+#undef pci_ss_info_9005_0430
+#define pci_ss_info_9005_0430 pci_ss_info_9005_0430_9005_0430
+static const pciSubsystemInfo pci_ss_info_9005_0432_9005_0432 =
+	{0x9005, 0x0432, pci_subsys_9005_0432_9005_0432, 0};
+#undef pci_ss_info_9005_0432
+#define pci_ss_info_9005_0432 pci_ss_info_9005_0432_9005_0432
 static const pciSubsystemInfo pci_ss_info_9005_0500_1014_02c1 =
 	{0x1014, 0x02c1, pci_subsys_9005_0500_1014_02c1, 0};
 #undef pci_ss_info_1014_02c1
@@ -41362,6 +47423,14 @@
 	{0x9005, 0x0041, pci_subsys_9005_8011_9005_0041, 0};
 #undef pci_ss_info_9005_0041
 #define pci_ss_info_9005_0041 pci_ss_info_9005_8011_9005_0041
+static const pciSubsystemInfo pci_ss_info_9005_8017_9005_0044 =
+	{0x9005, 0x0044, pci_subsys_9005_8017_9005_0044, 0};
+#undef pci_ss_info_9005_0044
+#define pci_ss_info_9005_0044 pci_ss_info_9005_8017_9005_0044
+static const pciSubsystemInfo pci_ss_info_9005_8017_9005_0045 =
+	{0x9005, 0x0045, pci_subsys_9005_8017_9005_0045, 0};
+#undef pci_ss_info_9005_0045
+#define pci_ss_info_9005_0045 pci_ss_info_9005_8017_9005_0045
 static const pciSubsystemInfo pci_ss_info_9005_801f_1734_1011 =
 	{0x1734, 0x1011, pci_subsys_9005_801f_1734_1011, 0};
 #undef pci_ss_info_1734_1011
@@ -41406,29 +47475,29 @@
 	{0x00a7, 0x0001, pci_subsys_e159_0001_00a7_0001, 0};
 #undef pci_ss_info_00a7_0001
 #define pci_ss_info_00a7_0001 pci_ss_info_e159_0001_00a7_0001
-static const pciSubsystemInfo pci_ss_info_e159_0001_6159_0001 =
-	{0x6159, 0x0001, pci_subsys_e159_0001_6159_0001, 0};
-#undef pci_ss_info_6159_0001
-#define pci_ss_info_6159_0001 pci_ss_info_e159_0001_6159_0001
-static const pciSubsystemInfo pci_ss_info_e159_0001_79fe_0001 =
-	{0x79fe, 0x0001, pci_subsys_e159_0001_79fe_0001, 0};
-#undef pci_ss_info_79fe_0001
-#define pci_ss_info_79fe_0001 pci_ss_info_e159_0001_79fe_0001
 #endif
 static const pciSubsystemInfo pci_ss_info_e159_0001_8086_0003 =
 	{0x8086, 0x0003, pci_subsys_e159_0001_8086_0003, 0};
 #undef pci_ss_info_8086_0003
 #define pci_ss_info_8086_0003 pci_ss_info_e159_0001_8086_0003
 #ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciSubsystemInfo pci_ss_info_e159_0001_b1b9_0001 =
-	{0xb1b9, 0x0001, pci_subsys_e159_0001_b1b9_0001, 0};
-#undef pci_ss_info_b1b9_0001
-#define pci_ss_info_b1b9_0001 pci_ss_info_e159_0001_b1b9_0001
-static const pciSubsystemInfo pci_ss_info_e159_0001_b1b9_0003 =
-	{0xb1b9, 0x0003, pci_subsys_e159_0001_b1b9_0003, 0};
-#undef pci_ss_info_b1b9_0003
-#define pci_ss_info_b1b9_0003 pci_ss_info_e159_0001_b1b9_0003
 #endif
+#define pci_ss_list_001c_0001 NULL
+#define pci_ss_list_0070_0003 NULL
+#define pci_ss_list_0070_0009 NULL
+#define pci_ss_list_0070_0801 NULL
+#define pci_ss_list_0070_0807 NULL
+#define pci_ss_list_0070_4000 NULL
+#define pci_ss_list_0070_4001 NULL
+#define pci_ss_list_0070_4009 NULL
+#define pci_ss_list_0070_4800 NULL
+#define pci_ss_list_0070_4801 NULL
+#define pci_ss_list_0070_4803 NULL
+#define pci_ss_list_0070_8003 NULL
+#define pci_ss_list_0070_8801 NULL
+#define pci_ss_list_0070_c801 NULL
+#define pci_ss_list_0070_e807 NULL
+#define pci_ss_list_0070_e817 NULL
 #define pci_ss_list_0095_0680 NULL
 #define pci_ss_list_018a_0106 NULL
 #define pci_ss_list_021b_8139 NULL
@@ -41439,15 +47508,45 @@
 #define pci_ss_list_045e_006e NULL
 #define pci_ss_list_045e_00c2 NULL
 #define pci_ss_list_04cf_8818 NULL
+#define pci_ss_list_050d_001a NULL
+#define pci_ss_list_050d_0109 NULL
 #define pci_ss_list_050d_7050 NULL
+#define pci_ss_list_050d_705c NULL
+#define pci_ss_list_05a9_8519 NULL
 #define pci_ss_list_05e3_0701 NULL
+#define pci_ss_list_066f_3410 NULL
+#define pci_ss_list_066f_3500 NULL
 #define pci_ss_list_0675_1700 NULL
 #define pci_ss_list_0675_1702 NULL
 #define pci_ss_list_0675_1703 NULL
 #define pci_ss_list_0675_1704 NULL
+#define pci_ss_list_067b_2303 NULL
 #define pci_ss_list_067b_3507 NULL
+#define pci_ss_list_07ca_b808 NULL
+#define pci_ss_list_08ff_afe4 NULL
+#define pci_ss_list_093a_010e NULL
+#define pci_ss_list_093a_010f NULL
+#define pci_ss_list_093a_2468 NULL
+#define pci_ss_list_093a_2603 NULL
+#define pci_ss_list_093a_2608 NULL
 #define pci_ss_list_09c1_0704 NULL
+#define pci_ss_list_0ace_1211 NULL
+#define pci_ss_list_0b0b_0105 NULL
+#define pci_ss_list_0b0b_0205 NULL
+#define pci_ss_list_0b0b_0206 NULL
+#define pci_ss_list_0b0b_0305 NULL
+#define pci_ss_list_0b0b_0405 NULL
+#define pci_ss_list_0b0b_0406 NULL
+#define pci_ss_list_0b0b_0505 NULL
+#define pci_ss_list_0b0b_0506 NULL
+#define pci_ss_list_0b0b_0605 NULL
+#define pci_ss_list_0b0b_0705 NULL
+#define pci_ss_list_0b0b_0706 NULL
+#define pci_ss_list_0b0b_0905 NULL
+#define pci_ss_list_0b0b_0906 NULL
+#define pci_ss_list_0b0b_0a06 NULL
 #define pci_ss_list_0b49_064f NULL
+#define pci_ss_list_0ccd_0038 NULL
 #define pci_ss_list_0e11_0001 NULL
 #define pci_ss_list_0e11_0002 NULL
 static const pciSubsystemInfo *pci_ss_list_0e11_0046[] = {
@@ -41580,6 +47679,7 @@
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1000_000a[] = {
+	&pci_ss_info_1000_000a_0e11_b143,
 	&pci_ss_info_1000_000a_1000_1000,
 	NULL
 };
@@ -41605,6 +47705,8 @@
 	&pci_ss_info_1000_000f_1000_1010,
 	&pci_ss_info_1000_000f_1000_1020,
 	&pci_ss_info_1000_000f_1092_8760,
+	&pci_ss_info_1000_000f_1775_10d0,
+	&pci_ss_info_1000_000f_1775_10d1,
 	&pci_ss_info_1000_000f_1de1_3904,
 	&pci_ss_info_1000_000f_4c53_1000,
 	&pci_ss_info_1000_000f_4c53_1050,
@@ -41626,12 +47728,15 @@
 };
 static const pciSubsystemInfo *pci_ss_list_1000_0020[] = {
 	&pci_ss_info_1000_0020_1000_1000,
+	&pci_ss_info_1000_0020_107b_1040,
 	&pci_ss_info_1000_0020_1de1_1020,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1000_0021[] = {
 	&pci_ss_info_1000_0021_1000_1000,
 	&pci_ss_info_1000_0021_1000_1010,
+	&pci_ss_info_1000_0021_103c_1330,
+	&pci_ss_info_1000_0021_103c_1340,
 	&pci_ss_info_1000_0021_124b_1070,
 	&pci_ss_info_1000_0021_4c53_1080,
 	&pci_ss_info_1000_0021_4c53_1300,
@@ -41645,6 +47750,7 @@
 	&pci_ss_info_1000_0030_1028_016c,
 	&pci_ss_info_1000_0030_1028_0183,
 	&pci_ss_info_1000_0030_1028_1010,
+	&pci_ss_info_1000_0030_103c_12c5,
 	&pci_ss_info_1000_0030_124b_1170,
 	&pci_ss_info_1000_0030_1734_1052,
 	NULL
@@ -41663,12 +47769,37 @@
 #define pci_ss_list_1000_0041 NULL
 #define pci_ss_list_1000_0050 NULL
 #define pci_ss_list_1000_0054 NULL
+static const pciSubsystemInfo *pci_ss_list_1000_0055[] = {
+	&pci_ss_info_1000_0055_1033_8336,
+	NULL
+};
 #define pci_ss_list_1000_0056 NULL
 #define pci_ss_list_1000_0058 NULL
 #define pci_ss_list_1000_005a NULL
 #define pci_ss_list_1000_005c NULL
 #define pci_ss_list_1000_005e NULL
-#define pci_ss_list_1000_0060 NULL
+static const pciSubsystemInfo *pci_ss_list_1000_0060[] = {
+	&pci_ss_info_1000_0060_1000_1006,
+	&pci_ss_info_1000_0060_1000_100a,
+	&pci_ss_info_1000_0060_1000_100e,
+	&pci_ss_info_1000_0060_1000_100f,
+	&pci_ss_info_1000_0060_1000_1010,
+	&pci_ss_info_1000_0060_1000_1011,
+	&pci_ss_info_1000_0060_1000_1012,
+	&pci_ss_info_1000_0060_1014_0363,
+	&pci_ss_info_1000_0060_1014_0364,
+	&pci_ss_info_1000_0060_1014_0365,
+	&pci_ss_info_1000_0060_1028_1f0a,
+	&pci_ss_info_1000_0060_1028_1f0b,
+	&pci_ss_info_1000_0060_1028_1f0c,
+	&pci_ss_info_1000_0060_1028_1f0d,
+	&pci_ss_info_1000_0060_1028_1f11,
+	&pci_ss_info_1000_0060_1043_824d,
+	&pci_ss_info_1000_0060_1170_002f,
+	&pci_ss_info_1000_0060_8086_34cc,
+	&pci_ss_info_1000_0060_8086_34cd,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_1000_0062[] = {
 	&pci_ss_info_1000_0062_1000_0062,
 	NULL
@@ -41694,6 +47825,9 @@
 	&pci_ss_info_1000_0408_1025_004d,
 	&pci_ss_info_1000_0408_1028_0001,
 	&pci_ss_info_1000_0408_1028_0002,
+	&pci_ss_info_1000_0408_1028_0012,
+	&pci_ss_info_1000_0408_1028_0015,
+	&pci_ss_info_1000_0408_1028_1f03,
 	&pci_ss_info_1000_0408_1734_1065,
 	&pci_ss_info_1000_0408_8086_0002,
 	NULL
@@ -41706,6 +47840,31 @@
 	&pci_ss_info_1000_0409_8086_3499,
 	NULL
 };
+static const pciSubsystemInfo *pci_ss_list_1000_0411[] = {
+	&pci_ss_info_1000_0411_1000_1001,
+	&pci_ss_info_1000_0411_1000_1002,
+	&pci_ss_info_1000_0411_1000_1003,
+	&pci_ss_info_1000_0411_1000_1004,
+	&pci_ss_info_1000_0411_1000_1008,
+	&pci_ss_info_1000_0411_1000_100c,
+	&pci_ss_info_1000_0411_1000_100d,
+	&pci_ss_info_1000_0411_1000_2004,
+	&pci_ss_info_1000_0411_1000_2005,
+	&pci_ss_info_1000_0411_1033_8287,
+	&pci_ss_info_1000_0411_1054_3016,
+	&pci_ss_info_1000_0411_1734_1081,
+	&pci_ss_info_1000_0411_1734_10a3,
+	&pci_ss_info_1000_0411_8086_1001,
+	&pci_ss_info_1000_0411_8086_1003,
+	&pci_ss_info_1000_0411_8086_3500,
+	&pci_ss_info_1000_0411_8086_3501,
+	&pci_ss_info_1000_0411_8086_3504,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_1000_0413[] = {
+	&pci_ss_info_1000_0413_1000_1005,
+	NULL
+};
 #define pci_ss_list_1000_0621 NULL
 static const pciSubsystemInfo *pci_ss_list_1000_0622[] = {
 	&pci_ss_info_1000_0622_1000_1020,
@@ -41803,6 +47962,7 @@
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_4153[] = {
+	&pci_ss_info_1002_4153_1043_010c,
 	&pci_ss_info_1002_4153_1462_932c,
 	NULL
 };
@@ -41838,7 +47998,10 @@
 	&pci_ss_info_1002_4172_1787_4003,
 	NULL
 };
-#define pci_ss_list_1002_4173 NULL
+static const pciSubsystemInfo *pci_ss_list_1002_4173[] = {
+	&pci_ss_info_1002_4173_1043_010d,
+	NULL
+};
 #define pci_ss_list_1002_4237 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_4242[] = {
 	&pci_ss_info_1002_4242_1002_02aa,
@@ -41868,7 +48031,10 @@
 #define pci_ss_list_1002_4363 NULL
 #define pci_ss_list_1002_436e NULL
 static const pciSubsystemInfo *pci_ss_list_1002_4370[] = {
+	&pci_ss_info_1002_4370_1025_0079,
 	&pci_ss_info_1002_4370_103c_308b,
+	&pci_ss_info_1002_4370_105b_0c81,
+	&pci_ss_info_1002_4370_107b_0300,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_4371[] = {
@@ -41876,10 +48042,12 @@
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_4372[] = {
+	&pci_ss_info_1002_4372_1025_0080,
 	&pci_ss_info_1002_4372_103c_308b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_4373[] = {
+	&pci_ss_info_1002_4373_1025_0080,
 	&pci_ss_info_1002_4373_103c_308b,
 	NULL
 };
@@ -41888,23 +48056,51 @@
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_4375[] = {
+	&pci_ss_info_1002_4375_1025_0080,
 	&pci_ss_info_1002_4375_103c_308b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_4376[] = {
+	&pci_ss_info_1002_4376_1025_0080,
 	&pci_ss_info_1002_4376_103c_308b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_4377[] = {
+	&pci_ss_info_1002_4377_1025_0080,
 	&pci_ss_info_1002_4377_103c_308b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_4378[] = {
+	&pci_ss_info_1002_4378_1025_0080,
 	&pci_ss_info_1002_4378_103c_308b,
 	NULL
 };
 #define pci_ss_list_1002_4379 NULL
-#define pci_ss_list_1002_437a NULL
+static const pciSubsystemInfo *pci_ss_list_1002_437a[] = {
+	&pci_ss_info_1002_437a_1002_4379,
+	&pci_ss_info_1002_437a_1002_437a,
+	&pci_ss_info_1002_437a_14f1_8800,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_1002_437b[] = {
+	&pci_ss_info_1002_437b_1734_10b8,
+	NULL
+};
+#define pci_ss_list_1002_4380 NULL
+#define pci_ss_list_1002_4381 NULL
+#define pci_ss_list_1002_4382 NULL
+#define pci_ss_list_1002_4383 NULL
+#define pci_ss_list_1002_4384 NULL
+#define pci_ss_list_1002_4385 NULL
+#define pci_ss_list_1002_4386 NULL
+#define pci_ss_list_1002_4387 NULL
+#define pci_ss_list_1002_4388 NULL
+#define pci_ss_list_1002_4389 NULL
+#define pci_ss_list_1002_438a NULL
+#define pci_ss_list_1002_438b NULL
+#define pci_ss_list_1002_438c NULL
+#define pci_ss_list_1002_438d NULL
+#define pci_ss_list_1002_438e NULL
 #define pci_ss_list_1002_4437 NULL
 #define pci_ss_list_1002_4554 NULL
 #define pci_ss_list_1002_4654 NULL
@@ -41965,6 +48161,7 @@
 };
 #define pci_ss_list_1002_4751 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_4752[] = {
+	&pci_ss_info_1002_4752_0e11_001e,
 	&pci_ss_info_1002_4752_1002_0008,
 	&pci_ss_info_1002_4752_1002_4752,
 	&pci_ss_info_1002_4752_1002_8008,
@@ -41972,9 +48169,12 @@
 	&pci_ss_info_1002_4752_1028_00d1,
 	&pci_ss_info_1002_4752_1028_00d9,
 	&pci_ss_info_1002_4752_1028_0134,
+	&pci_ss_info_1002_4752_103c_10e1,
+	&pci_ss_info_1002_4752_107b_6400,
 	&pci_ss_info_1002_4752_1734_007a,
 	&pci_ss_info_1002_4752_8086_3411,
 	&pci_ss_info_1002_4752_8086_3427,
+	&pci_ss_info_1002_4752_8086_5744,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_4753[] = {
@@ -41990,6 +48190,7 @@
 static const pciSubsystemInfo *pci_ss_list_1002_4757[] = {
 	&pci_ss_info_1002_4757_1002_4757,
 	&pci_ss_info_1002_4757_1028_0089,
+	&pci_ss_info_1002_4757_1028_008e,
 	&pci_ss_info_1002_4757_1028_4082,
 	&pci_ss_info_1002_4757_1028_8082,
 	&pci_ss_info_1002_4757_1028_c082,
@@ -42026,7 +48227,12 @@
 #define pci_ss_list_1002_4a4d NULL
 #define pci_ss_list_1002_4a4e NULL
 #define pci_ss_list_1002_4a50 NULL
+#define pci_ss_list_1002_4a54 NULL
+#define pci_ss_list_1002_4a69 NULL
+#define pci_ss_list_1002_4a6a NULL
+#define pci_ss_list_1002_4a6b NULL
 #define pci_ss_list_1002_4a70 NULL
+#define pci_ss_list_1002_4a74 NULL
 #define pci_ss_list_1002_4b49 NULL
 #define pci_ss_list_1002_4b4b NULL
 #define pci_ss_list_1002_4b4c NULL
@@ -42095,13 +48301,17 @@
 	&pci_ss_info_1002_4c59_1014_0235,
 	&pci_ss_info_1002_4c59_1014_0239,
 	&pci_ss_info_1002_4c59_104d_80e7,
+	&pci_ss_info_1002_4c59_104d_8140,
 	&pci_ss_info_1002_4c59_1509_1930,
 	NULL
 };
 #define pci_ss_list_1002_4c5a NULL
 #define pci_ss_list_1002_4c64 NULL
 #define pci_ss_list_1002_4c65 NULL
-#define pci_ss_list_1002_4c66 NULL
+static const pciSubsystemInfo *pci_ss_list_1002_4c66[] = {
+	&pci_ss_info_1002_4c66_1014_054d,
+	NULL
+};
 #define pci_ss_list_1002_4c67 NULL
 #define pci_ss_list_1002_4c6e NULL
 #define pci_ss_list_1002_4d46 NULL
@@ -42126,11 +48336,16 @@
 	&pci_ss_info_1002_4e50_1025_005a,
 	&pci_ss_info_1002_4e50_103c_088c,
 	&pci_ss_info_1002_4e50_103c_0890,
+	&pci_ss_info_1002_4e50_144d_c00c,
+	&pci_ss_info_1002_4e50_1462_0311,
 	&pci_ss_info_1002_4e50_1734_1055,
 	NULL
 };
 #define pci_ss_list_1002_4e51 NULL
-#define pci_ss_list_1002_4e52 NULL
+static const pciSubsystemInfo *pci_ss_list_1002_4e52[] = {
+	&pci_ss_info_1002_4e52_144d_c00c,
+	NULL
+};
 #define pci_ss_list_1002_4e53 NULL
 #define pci_ss_list_1002_4e54 NULL
 #define pci_ss_list_1002_4e56 NULL
@@ -42149,6 +48364,8 @@
 	NULL
 };
 #define pci_ss_list_1002_4e71 NULL
+#define pci_ss_list_1002_4f72 NULL
+#define pci_ss_list_1002_4f73 NULL
 #define pci_ss_list_1002_5041 NULL
 #define pci_ss_list_1002_5042 NULL
 #define pci_ss_list_1002_5043 NULL
@@ -42254,19 +48471,23 @@
 	&pci_ss_info_1002_5159_1002_003a,
 	&pci_ss_info_1002_5159_1002_00ba,
 	&pci_ss_info_1002_5159_1002_013a,
+	&pci_ss_info_1002_5159_1002_0908,
 	&pci_ss_info_1002_5159_1014_029a,
 	&pci_ss_info_1002_5159_1014_02c8,
 	&pci_ss_info_1002_5159_1028_019a,
+	&pci_ss_info_1002_5159_103c_1292,
 	&pci_ss_info_1002_5159_1458_4002,
 	&pci_ss_info_1002_5159_148c_2003,
 	&pci_ss_info_1002_5159_148c_2023,
 	&pci_ss_info_1002_5159_174b_7112,
 	&pci_ss_info_1002_5159_174b_7c28,
 	&pci_ss_info_1002_5159_1787_0202,
+	&pci_ss_info_1002_5159_17ee_1001,
 	NULL
 };
 #define pci_ss_list_1002_515a NULL
 #define pci_ss_list_1002_515e NULL
+#define pci_ss_list_1002_515f NULL
 #define pci_ss_list_1002_5168 NULL
 #define pci_ss_list_1002_5169 NULL
 #define pci_ss_list_1002_516a NULL
@@ -42347,13 +48568,19 @@
 #define pci_ss_list_1002_5551 NULL
 #define pci_ss_list_1002_5552 NULL
 #define pci_ss_list_1002_5554 NULL
+#define pci_ss_list_1002_5569 NULL
 #define pci_ss_list_1002_556b NULL
 #define pci_ss_list_1002_556d NULL
 #define pci_ss_list_1002_556f NULL
+#define pci_ss_list_1002_5571 NULL
 #define pci_ss_list_1002_564a NULL
 #define pci_ss_list_1002_564b NULL
+#define pci_ss_list_1002_564f NULL
 #define pci_ss_list_1002_5652 NULL
-#define pci_ss_list_1002_5653 NULL
+static const pciSubsystemInfo *pci_ss_list_1002_5653[] = {
+	&pci_ss_info_1002_5653_1025_0080,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_1002_5654[] = {
 	&pci_ss_info_1002_5654_1002_5654,
 	NULL
@@ -42377,10 +48604,12 @@
 };
 #define pci_ss_list_1002_5944 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_5950[] = {
+	&pci_ss_info_1002_5950_1025_0080,
 	&pci_ss_info_1002_5950_103c_308b,
 	NULL
 };
 #define pci_ss_list_1002_5951 NULL
+#define pci_ss_list_1002_5952 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_5954[] = {
 	&pci_ss_info_1002_5954_1002_5954,
 	NULL
@@ -42405,8 +48634,10 @@
 };
 #define pci_ss_list_1002_5962 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_5964[] = {
+	&pci_ss_info_1002_5964_1002_5964,
 	&pci_ss_info_1002_5964_1043_c006,
 	&pci_ss_info_1002_5964_1458_4018,
+	&pci_ss_info_1002_5964_1458_4032,
 	&pci_ss_info_1002_5964_147b_6191,
 	&pci_ss_info_1002_5964_148c_2073,
 	&pci_ss_info_1002_5964_174b_7c13,
@@ -42419,8 +48650,12 @@
 #define pci_ss_list_1002_5969 NULL
 #define pci_ss_list_1002_5974 NULL
 #define pci_ss_list_1002_5975 NULL
+#define pci_ss_list_1002_5a33 NULL
 #define pci_ss_list_1002_5a34 NULL
+#define pci_ss_list_1002_5a36 NULL
+#define pci_ss_list_1002_5a37 NULL
 #define pci_ss_list_1002_5a38 NULL
+#define pci_ss_list_1002_5a39 NULL
 #define pci_ss_list_1002_5a3f NULL
 #define pci_ss_list_1002_5a41 NULL
 #define pci_ss_list_1002_5a42 NULL
@@ -42429,7 +48664,9 @@
 static const pciSubsystemInfo *pci_ss_list_1002_5b60[] = {
 	&pci_ss_info_1002_5b60_1043_002a,
 	&pci_ss_info_1002_5b60_1043_032e,
+	&pci_ss_info_1002_5b60_1462_0400,
 	&pci_ss_info_1002_5b60_1462_0402,
+	&pci_ss_info_1002_5b60_196d_1086,
 	NULL
 };
 #define pci_ss_list_1002_5b62 NULL
@@ -42438,6 +48675,7 @@
 #define pci_ss_list_1002_5b65 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_5b70[] = {
 	&pci_ss_info_1002_5b70_1462_0403,
+	&pci_ss_info_1002_5b70_196d_1087,
 	NULL
 };
 #define pci_ss_list_1002_5b72 NULL
@@ -42446,10 +48684,12 @@
 #define pci_ss_list_1002_5c61 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_5c63[] = {
 	&pci_ss_info_1002_5c63_1002_5c63,
+	&pci_ss_info_1002_5c63_144d_c00c,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1002_5d44[] = {
 	&pci_ss_info_1002_5d44_1458_4019,
+	&pci_ss_info_1002_5d44_1458_4032,
 	&pci_ss_info_1002_5d44_174b_7c12,
 	&pci_ss_info_1002_5d44_1787_5965,
 	&pci_ss_info_1002_5d44_17af_2013,
@@ -42487,29 +48727,53 @@
 	&pci_ss_info_1002_5e6d_148c_2117,
 	NULL
 };
+#define pci_ss_list_1002_5f57 NULL
 #define pci_ss_list_1002_700f NULL
 #define pci_ss_list_1002_7010 NULL
 #define pci_ss_list_1002_7100 NULL
+#define pci_ss_list_1002_7102 NULL
+#define pci_ss_list_1002_7103 NULL
+#define pci_ss_list_1002_7104 NULL
 #define pci_ss_list_1002_7105 NULL
+#define pci_ss_list_1002_7106 NULL
+#define pci_ss_list_1002_7108 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_7109[] = {
 	&pci_ss_info_1002_7109_1002_0322,
 	&pci_ss_info_1002_7109_1002_0d02,
 	NULL
 };
+#define pci_ss_list_1002_710a NULL
+#define pci_ss_list_1002_710b NULL
+#define pci_ss_list_1002_710c NULL
 #define pci_ss_list_1002_7120 NULL
+#define pci_ss_list_1002_7124 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_7129[] = {
 	&pci_ss_info_1002_7129_1002_0323,
 	&pci_ss_info_1002_7129_1002_0d03,
 	NULL
 };
+#define pci_ss_list_1002_7140 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_7142[] = {
 	&pci_ss_info_1002_7142_1002_0322,
 	NULL
 };
+#define pci_ss_list_1002_7143 NULL
+#define pci_ss_list_1002_7145 NULL
 static const pciSubsystemInfo *pci_ss_list_1002_7146[] = {
 	&pci_ss_info_1002_7146_1002_0322,
 	NULL
 };
+#define pci_ss_list_1002_7147 NULL
+#define pci_ss_list_1002_7149 NULL
+#define pci_ss_list_1002_714a NULL
+#define pci_ss_list_1002_714b NULL
+#define pci_ss_list_1002_714c NULL
+#define pci_ss_list_1002_714d NULL
+#define pci_ss_list_1002_714e NULL
+#define pci_ss_list_1002_7152 NULL
+#define pci_ss_list_1002_7153 NULL
+#define pci_ss_list_1002_715e NULL
+#define pci_ss_list_1002_715f NULL
 static const pciSubsystemInfo *pci_ss_list_1002_7162[] = {
 	&pci_ss_info_1002_7162_1002_0323,
 	NULL
@@ -42518,14 +48782,82 @@
 	&pci_ss_info_1002_7166_1002_0323,
 	NULL
 };
+#define pci_ss_list_1002_7172 NULL
+#define pci_ss_list_1002_7173 NULL
+#define pci_ss_list_1002_7180 NULL
+#define pci_ss_list_1002_7181 NULL
+#define pci_ss_list_1002_7183 NULL
+#define pci_ss_list_1002_7187 NULL
+#define pci_ss_list_1002_7188 NULL
+#define pci_ss_list_1002_718a NULL
+#define pci_ss_list_1002_718c NULL
+#define pci_ss_list_1002_718d NULL
+#define pci_ss_list_1002_7193 NULL
+#define pci_ss_list_1002_719b NULL
+#define pci_ss_list_1002_719f NULL
+#define pci_ss_list_1002_71a0 NULL
+#define pci_ss_list_1002_71a1 NULL
+#define pci_ss_list_1002_71a3 NULL
+#define pci_ss_list_1002_71a7 NULL
+#define pci_ss_list_1002_71bb NULL
 #define pci_ss_list_1002_71c0 NULL
 #define pci_ss_list_1002_71c2 NULL
+static const pciSubsystemInfo *pci_ss_list_1002_71c4[] = {
+	&pci_ss_info_1002_71c4_17aa_2007,
+	NULL
+};
+#define pci_ss_list_1002_71c5 NULL
+#define pci_ss_list_1002_71c6 NULL
+#define pci_ss_list_1002_71c7 NULL
+#define pci_ss_list_1002_71ce NULL
+#define pci_ss_list_1002_71d4 NULL
+#define pci_ss_list_1002_71d5 NULL
+#define pci_ss_list_1002_71d6 NULL
+#define pci_ss_list_1002_71de NULL
 #define pci_ss_list_1002_71e0 NULL
 #define pci_ss_list_1002_71e2 NULL
+#define pci_ss_list_1002_71e6 NULL
+#define pci_ss_list_1002_71e7 NULL
+#define pci_ss_list_1002_7210 NULL
+#define pci_ss_list_1002_7211 NULL
+#define pci_ss_list_1002_7240 NULL
+#define pci_ss_list_1002_7241 NULL
+#define pci_ss_list_1002_7242 NULL
+#define pci_ss_list_1002_7243 NULL
+#define pci_ss_list_1002_7244 NULL
+#define pci_ss_list_1002_7245 NULL
+#define pci_ss_list_1002_7246 NULL
+#define pci_ss_list_1002_7247 NULL
+#define pci_ss_list_1002_7248 NULL
+#define pci_ss_list_1002_7249 NULL
+#define pci_ss_list_1002_724a NULL
+static const pciSubsystemInfo *pci_ss_list_1002_724b[] = {
+	&pci_ss_info_1002_724b_1002_0b12,
+	&pci_ss_info_1002_724b_1002_0b13,
+	NULL
+};
+#define pci_ss_list_1002_724c NULL
+#define pci_ss_list_1002_724d NULL
+#define pci_ss_list_1002_724e NULL
+#define pci_ss_list_1002_7269 NULL
+#define pci_ss_list_1002_726b NULL
+#define pci_ss_list_1002_726e NULL
+#define pci_ss_list_1002_7280 NULL
+#define pci_ss_list_1002_7288 NULL
+#define pci_ss_list_1002_7291 NULL
+#define pci_ss_list_1002_7293 NULL
+#define pci_ss_list_1002_72a0 NULL
+#define pci_ss_list_1002_72a8 NULL
+#define pci_ss_list_1002_72b1 NULL
+#define pci_ss_list_1002_72b3 NULL
 #define pci_ss_list_1002_7833 NULL
 #define pci_ss_list_1002_7834 NULL
 #define pci_ss_list_1002_7835 NULL
 #define pci_ss_list_1002_7838 NULL
+#define pci_ss_list_1002_7919 NULL
+#define pci_ss_list_1002_791e NULL
+#define pci_ss_list_1002_791f NULL
+#define pci_ss_list_1002_793f NULL
 #define pci_ss_list_1002_7c37 NULL
 #define pci_ss_list_1002_cab0 NULL
 #define pci_ss_list_1002_cab2 NULL
@@ -42646,7 +48978,11 @@
 };
 #define pci_ss_list_1011_000a NULL
 #define pci_ss_list_1011_000d NULL
-#define pci_ss_list_1011_000f NULL
+static const pciSubsystemInfo *pci_ss_list_1011_000f[] = {
+	&pci_ss_info_1011_000f_1011_def1,
+	&pci_ss_info_1011_000f_103c_def1,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_1011_0014[] = {
 	&pci_ss_info_1011_0014_1186_0100,
 	NULL
@@ -42660,6 +48996,7 @@
 	&pci_ss_info_1011_0019_1025_0315,
 	&pci_ss_info_1011_0019_1033_800c,
 	&pci_ss_info_1011_0019_1033_800d,
+	&pci_ss_info_1011_0019_103c_125a,
 	&pci_ss_info_1011_0019_108d_0016,
 	&pci_ss_info_1011_0019_108d_0017,
 	&pci_ss_info_1011_0019_10b8_2005,
@@ -42687,6 +49024,9 @@
 	&pci_ss_info_1011_0019_1385_2100,
 	&pci_ss_info_1011_0019_1395_0001,
 	&pci_ss_info_1011_0019_13d1_ab01,
+	&pci_ss_info_1011_0019_1498_000a,
+	&pci_ss_info_1011_0019_1498_000b,
+	&pci_ss_info_1011_0019_1498_000c,
 	&pci_ss_info_1011_0019_14cb_0100,
 	&pci_ss_info_1011_0019_8086_0001,
 	NULL
@@ -42761,9 +49101,12 @@
 };
 static const pciSubsystemInfo *pci_ss_list_1013_6003[] = {
 	&pci_ss_info_1013_6003_1013_4280,
+	&pci_ss_info_1013_6003_1014_0153,
+	&pci_ss_info_1013_6003_153b_112e,
 	&pci_ss_info_1013_6003_153b_1136,
 	&pci_ss_info_1013_6003_1681_0050,
 	&pci_ss_info_1013_6003_1681_a011,
+	&pci_ss_info_1013_6003_5053_3357,
 	NULL
 };
 #define pci_ss_list_1013_6004 NULL
@@ -42827,6 +49170,7 @@
 #define pci_ss_list_1014_0053 NULL
 #define pci_ss_list_1014_0054 NULL
 #define pci_ss_list_1014_0057 NULL
+#define pci_ss_list_1014_0058 NULL
 #define pci_ss_list_1014_005c NULL
 #define pci_ss_list_1014_005e NULL
 #define pci_ss_list_1014_007c NULL
@@ -42919,6 +49263,7 @@
 	NULL
 };
 #define pci_ss_list_1014_0302 NULL
+#define pci_ss_list_1014_0308 NULL
 #define pci_ss_list_1014_0314 NULL
 #define pci_ss_list_1014_3022 NULL
 #define pci_ss_list_1014_4022 NULL
@@ -42926,6 +49271,14 @@
 #endif
 #define pci_ss_list_1017_5343 NULL
 #define pci_ss_list_101a_0005 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_101a_1dc1[] = {
+	&pci_ss_info_101a_1dc1_101a_0019,
+	&pci_ss_info_101a_1dc1_101a_001f,
+	&pci_ss_info_101a_1dc1_101a_0ece,
+	NULL
+};
+#endif
 #define pci_ss_list_101c_0193 NULL
 #define pci_ss_list_101c_0196 NULL
 #define pci_ss_list_101c_0197 NULL
@@ -42987,6 +49340,7 @@
 	&pci_ss_info_1022_2000_1259_2701,
 	&pci_ss_info_1022_2000_1259_2702,
 	&pci_ss_info_1022_2000_1259_2703,
+	&pci_ss_info_1022_2000_1259_2704,
 	&pci_ss_info_1022_2000_4c53_1000,
 	&pci_ss_info_1022_2000_4c53_1010,
 	&pci_ss_info_1022_2000_4c53_1020,
@@ -43003,6 +49357,7 @@
 #define pci_ss_list_1022_2003 NULL
 #define pci_ss_list_1022_2020 NULL
 #define pci_ss_list_1022_2040 NULL
+#define pci_ss_list_1022_2080 NULL
 #define pci_ss_list_1022_2081 NULL
 #define pci_ss_list_1022_2082 NULL
 #define pci_ss_list_1022_208f NULL
@@ -43155,6 +49510,7 @@
 };
 #define pci_ss_list_1023_9910 NULL
 #define pci_ss_list_1023_9930 NULL
+#define pci_ss_list_1025_0090 NULL
 #define pci_ss_list_1025_1435 NULL
 #define pci_ss_list_1025_1445 NULL
 #define pci_ss_list_1025_1449 NULL
@@ -43228,17 +49584,28 @@
 };
 static const pciSubsystemInfo *pci_ss_list_1028_0002[] = {
 	&pci_ss_info_1028_0002_1028_0002,
+	&pci_ss_info_1028_0002_1028_00d1,
+	&pci_ss_info_1028_0002_1028_00d9,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1028_0003[] = {
 	&pci_ss_info_1028_0003_1028_0003,
 	NULL
 };
+static const pciSubsystemInfo *pci_ss_list_1028_0004[] = {
+	&pci_ss_info_1028_0004_1028_0004,
+	NULL
+};
 #define pci_ss_list_1028_0006 NULL
 #define pci_ss_list_1028_0007 NULL
 #define pci_ss_list_1028_0008 NULL
 #define pci_ss_list_1028_0009 NULL
-#define pci_ss_list_1028_000a NULL
+static const pciSubsystemInfo *pci_ss_list_1028_000a[] = {
+	&pci_ss_info_1028_000a_1028_0106,
+	&pci_ss_info_1028_000a_1028_011b,
+	&pci_ss_info_1028_000a_1028_0121,
+	NULL
+};
 #define pci_ss_list_1028_000c NULL
 #define pci_ss_list_1028_000d NULL
 #define pci_ss_list_1028_000e NULL
@@ -43255,7 +49622,12 @@
 	NULL
 };
 #define pci_ss_list_1028_0014 NULL
-#define pci_ss_list_1028_0015 NULL
+static const pciSubsystemInfo *pci_ss_list_1028_0015[] = {
+	&pci_ss_info_1028_0015_1028_1f01,
+	&pci_ss_info_1028_0015_1028_1f02,
+	NULL
+};
+#define pci_ss_list_1028_1f03 NULL
 #define pci_ss_list_102a_0000 NULL
 #define pci_ss_list_102a_0010 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -43342,6 +49714,7 @@
 	&pci_ss_info_102b_0521_110a_0032,
 	NULL
 };
+#define pci_ss_list_102b_0522 NULL
 static const pciSubsystemInfo *pci_ss_list_102b_0525[] = {
 	&pci_ss_info_102b_0525_0e11_b16f,
 	&pci_ss_info_102b_0525_102b_0328,
@@ -43443,6 +49816,9 @@
 	NULL
 };
 #define pci_ss_list_102b_4536 NULL
+#define pci_ss_list_102b_4cdc NULL
+#define pci_ss_list_102b_4fc5 NULL
+#define pci_ss_list_102b_5e10 NULL
 #define pci_ss_list_102b_6573 NULL
 #define pci_ss_list_102c_00b8 NULL
 static const pciSubsystemInfo *pci_ss_list_102c_00c0[] = {
@@ -43485,6 +49861,7 @@
 };
 #define pci_ss_list_102f_0030 NULL
 #define pci_ss_list_102f_0031 NULL
+#define pci_ss_list_102f_0032 NULL
 #define pci_ss_list_102f_0105 NULL
 #define pci_ss_list_102f_0106 NULL
 #define pci_ss_list_102f_0107 NULL
@@ -43566,6 +49943,8 @@
 #define pci_ss_list_1033_00f2 NULL
 #define pci_ss_list_1033_00f3 NULL
 #define pci_ss_list_1033_010c NULL
+#define pci_ss_list_1033_0125 NULL
+#define pci_ss_list_1033_013a NULL
 #define pci_ss_list_1036_0000 NULL
 #define pci_ss_list_1039_0001 NULL
 #define pci_ss_list_1039_0002 NULL
@@ -43580,6 +49959,7 @@
 #define pci_ss_list_1039_0180 NULL
 #define pci_ss_list_1039_0181 NULL
 #define pci_ss_list_1039_0182 NULL
+#define pci_ss_list_1039_0186 NULL
 #define pci_ss_list_1039_0190 NULL
 #define pci_ss_list_1039_0191 NULL
 static const pciSubsystemInfo *pci_ss_list_1039_0200[] = {
@@ -43615,6 +49995,7 @@
 #define pci_ss_list_1039_0655 NULL
 #define pci_ss_list_1039_0660 NULL
 #define pci_ss_list_1039_0661 NULL
+#define pci_ss_list_1039_0662 NULL
 #define pci_ss_list_1039_0730 NULL
 #define pci_ss_list_1039_0733 NULL
 #define pci_ss_list_1039_0735 NULL
@@ -43629,6 +50010,7 @@
 	&pci_ss_info_1039_0900_1019_0a14,
 	&pci_ss_info_1039_0900_1039_0900,
 	&pci_ss_info_1039_0900_1043_8035,
+	&pci_ss_info_1039_0900_1462_0900,
 	NULL
 };
 #define pci_ss_list_1039_0961 NULL
@@ -43636,6 +50018,13 @@
 #define pci_ss_list_1039_0963 NULL
 #define pci_ss_list_1039_0964 NULL
 #define pci_ss_list_1039_0965 NULL
+#define pci_ss_list_1039_0966 NULL
+#define pci_ss_list_1039_0968 NULL
+#define pci_ss_list_1039_1180 NULL
+#define pci_ss_list_1039_1182 NULL
+#define pci_ss_list_1039_1183 NULL
+#define pci_ss_list_1039_1184 NULL
+#define pci_ss_list_1039_1185 NULL
 #define pci_ss_list_1039_3602 NULL
 #define pci_ss_list_1039_5107 NULL
 #define pci_ss_list_1039_5300 NULL
@@ -43646,6 +50035,7 @@
 	&pci_ss_info_1039_5513_1019_0970,
 	&pci_ss_info_1039_5513_1039_5513,
 	&pci_ss_info_1039_5513_1043_8035,
+	&pci_ss_info_1039_5513_1462_7010,
 	NULL
 };
 #define pci_ss_list_1039_5517 NULL
@@ -43680,20 +50070,29 @@
 };
 static const pciSubsystemInfo *pci_ss_list_1039_6330[] = {
 	&pci_ss_info_1039_6330_1039_6330,
+	&pci_ss_info_1039_6330_1043_8113,
 	NULL
 };
+#define pci_ss_list_1039_6350 NULL
+#define pci_ss_list_1039_6351 NULL
 static const pciSubsystemInfo *pci_ss_list_1039_7001[] = {
 	&pci_ss_info_1039_7001_1019_0a14,
 	&pci_ss_info_1039_7001_1039_7000,
 	&pci_ss_info_1039_7001_1462_5470,
+	&pci_ss_info_1039_7001_1462_7010,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1039_7002[] = {
+	&pci_ss_info_1039_7002_1462_7010,
 	&pci_ss_info_1039_7002_1509_7002,
 	NULL
 };
-#define pci_ss_list_1039_7007 NULL
+static const pciSubsystemInfo *pci_ss_list_1039_7007[] = {
+	&pci_ss_info_1039_7007_1462_701d,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_1039_7012[] = {
+	&pci_ss_info_1039_7012_1462_7010,
 	&pci_ss_info_1039_7012_15bd_1001,
 	NULL
 };
@@ -43728,10 +50127,10 @@
 	NULL
 };
 #define pci_ss_list_1039_7019 NULL
+#define pci_ss_list_1039_7502 NULL
+#define pci_ss_list_103c_002a NULL
 #define pci_ss_list_103c_1005 NULL
-#define pci_ss_list_103c_1006 NULL
 #define pci_ss_list_103c_1008 NULL
-#define pci_ss_list_103c_100a NULL
 #define pci_ss_list_103c_1028 NULL
 static const pciSubsystemInfo *pci_ss_list_103c_1029[] = {
 	&pci_ss_info_103c_1029_107e_000f,
@@ -43781,16 +50180,34 @@
 #define pci_ss_list_103c_1229 NULL
 #define pci_ss_list_103c_122a NULL
 #define pci_ss_list_103c_122e NULL
+#define pci_ss_list_103c_127b NULL
 #define pci_ss_list_103c_127c NULL
 #define pci_ss_list_103c_1290 NULL
 #define pci_ss_list_103c_1291 NULL
 #define pci_ss_list_103c_12b4 NULL
+#define pci_ss_list_103c_12eb NULL
+#define pci_ss_list_103c_12ec NULL
+#define pci_ss_list_103c_12ee NULL
+#define pci_ss_list_103c_12f8 NULL
 #define pci_ss_list_103c_12fa NULL
+#define pci_ss_list_103c_1302 NULL
+#define pci_ss_list_103c_1303 NULL
 #define pci_ss_list_103c_2910 NULL
 #define pci_ss_list_103c_2925 NULL
 #define pci_ss_list_103c_3080 NULL
-#define pci_ss_list_103c_3220 NULL
+#define pci_ss_list_103c_3085 NULL
+#define pci_ss_list_103c_30b5 NULL
+static const pciSubsystemInfo *pci_ss_list_103c_3220[] = {
+	&pci_ss_info_103c_3220_103c_3225,
+	NULL
+};
 #define pci_ss_list_103c_3230 NULL
+#define pci_ss_list_103c_3238 NULL
+#define pci_ss_list_103c_4030 NULL
+#define pci_ss_list_103c_4031 NULL
+#define pci_ss_list_103c_4037 NULL
+#define pci_ss_list_103c_403b NULL
+#define pci_ss_list_103c_60e8 NULL
 #define pci_ss_list_1042_1000 NULL
 #define pci_ss_list_1042_1001 NULL
 #define pci_ss_list_1042_3000 NULL
@@ -43803,16 +50220,23 @@
 	&pci_ss_info_1043_0675_10cf_105e,
 	NULL
 };
+#define pci_ss_list_1043_0c11 NULL
 #define pci_ss_list_1043_4015 NULL
 #define pci_ss_list_1043_4021 NULL
 #define pci_ss_list_1043_4057 NULL
 #define pci_ss_list_1043_8043 NULL
+#define pci_ss_list_1043_8047 NULL
 #define pci_ss_list_1043_807b NULL
+#define pci_ss_list_1043_8095 NULL
+#define pci_ss_list_1043_80ac NULL
 #define pci_ss_list_1043_80bb NULL
 #define pci_ss_list_1043_80c5 NULL
 #define pci_ss_list_1043_80df NULL
+#define pci_ss_list_1043_815a NULL
+#define pci_ss_list_1043_8168 NULL
 #define pci_ss_list_1043_8187 NULL
 #define pci_ss_list_1043_8188 NULL
+#define pci_ss_list_1043_81f4 NULL
 #endif
 #define pci_ss_list_1044_1012 NULL
 #define pci_ss_list_1044_a400 NULL
@@ -43902,7 +50326,10 @@
 #define pci_ss_list_104a_0210 NULL
 #define pci_ss_list_104a_021a NULL
 #define pci_ss_list_104a_021b NULL
-#define pci_ss_list_104a_0500 NULL
+static const pciSubsystemInfo *pci_ss_list_104a_0500[] = {
+	&pci_ss_info_104a_0500_104a_0500,
+	NULL
+};
 #define pci_ss_list_104a_0564 NULL
 #define pci_ss_list_104a_0981 NULL
 #define pci_ss_list_104a_1746 NULL
@@ -43963,6 +50390,7 @@
 };
 static const pciSubsystemInfo *pci_ss_list_104c_8020[] = {
 	&pci_ss_info_104c_8020_11bd_000f,
+	&pci_ss_info_104c_8020_11bd_001c,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_104c_8021[] = {
@@ -43974,6 +50402,7 @@
 static const pciSubsystemInfo *pci_ss_list_104c_8023[] = {
 	&pci_ss_info_104c_8023_103c_088c,
 	&pci_ss_info_104c_8023_1043_808b,
+	&pci_ss_info_104c_8023_1043_815b,
 	NULL
 };
 #define pci_ss_list_104c_8024 NULL
@@ -43982,6 +50411,7 @@
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_104c_8026[] = {
+	&pci_ss_info_104c_8026_1025_003c,
 	&pci_ss_info_104c_8026_103c_006a,
 	&pci_ss_info_104c_8026_1043_808d,
 	NULL
@@ -44003,21 +50433,25 @@
 };
 #define pci_ss_list_104c_802e NULL
 static const pciSubsystemInfo *pci_ss_list_104c_8031[] = {
+	&pci_ss_info_104c_8031_1025_0080,
 	&pci_ss_info_104c_8031_103c_099c,
 	&pci_ss_info_104c_8031_103c_308b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_104c_8032[] = {
+	&pci_ss_info_104c_8032_1025_0080,
 	&pci_ss_info_104c_8032_103c_099c,
 	&pci_ss_info_104c_8032_103c_308b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_104c_8033[] = {
+	&pci_ss_info_104c_8033_1025_0080,
 	&pci_ss_info_104c_8033_103c_099c,
 	&pci_ss_info_104c_8033_103c_308b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_104c_8034[] = {
+	&pci_ss_info_104c_8034_1025_0080,
 	&pci_ss_info_104c_8034_103c_099c,
 	&pci_ss_info_104c_8034_103c_308b,
 	NULL
@@ -44028,12 +50462,37 @@
 };
 #define pci_ss_list_104c_8036 NULL
 #define pci_ss_list_104c_8038 NULL
+static const pciSubsystemInfo *pci_ss_list_104c_8039[] = {
+	&pci_ss_info_104c_8039_103c_309f,
+	&pci_ss_info_104c_8039_103c_30a1,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_104c_803a[] = {
+	&pci_ss_info_104c_803a_103c_309f,
+	&pci_ss_info_104c_803a_103c_30a1,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_104c_803b[] = {
+	&pci_ss_info_104c_803b_103c_309f,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_104c_803c[] = {
+	&pci_ss_info_104c_803c_103c_309f,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_104c_803d[] = {
+	&pci_ss_info_104c_803d_103c_309f,
+	&pci_ss_info_104c_803d_103c_30a1,
+	NULL
+};
 #define pci_ss_list_104c_8201 NULL
 static const pciSubsystemInfo *pci_ss_list_104c_8204[] = {
 	&pci_ss_info_104c_8204_1028_0139,
 	&pci_ss_info_104c_8204_1028_014e,
 	NULL
 };
+#define pci_ss_list_104c_8231 NULL
+#define pci_ss_list_104c_8235 NULL
 static const pciSubsystemInfo *pci_ss_list_104c_8400[] = {
 	&pci_ss_info_104c_8400_1186_3b00,
 	&pci_ss_info_104c_8400_1186_3b01,
@@ -44048,6 +50507,7 @@
 	&pci_ss_info_104c_9066_1186_3b04,
 	&pci_ss_info_104c_9066_1186_3b05,
 	&pci_ss_info_104c_9066_13d1_aba0,
+	&pci_ss_info_104c_9066_1737_0033,
 	NULL
 };
 #define pci_ss_list_104c_a001 NULL
@@ -44098,6 +50558,7 @@
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_104c_ac44[] = {
+	&pci_ss_info_104c_ac44_1028_0149,
 	&pci_ss_info_104c_ac44_1028_0163,
 	&pci_ss_info_104c_ac44_1028_0196,
 	&pci_ss_info_104c_ac44_1071_8160,
@@ -44106,6 +50567,7 @@
 #define pci_ss_list_104c_ac46 NULL
 static const pciSubsystemInfo *pci_ss_list_104c_ac47[] = {
 	&pci_ss_info_104c_ac47_1028_0139,
+	&pci_ss_info_104c_ac47_1028_013f,
 	&pci_ss_info_104c_ac47_1028_014e,
 	NULL
 };
@@ -44117,6 +50579,7 @@
 #define pci_ss_list_104c_ac50 NULL
 static const pciSubsystemInfo *pci_ss_list_104c_ac51[] = {
 	&pci_ss_info_104c_ac51_0e11_004e,
+	&pci_ss_info_104c_ac51_1014_0148,
 	&pci_ss_info_104c_ac51_1014_023b,
 	&pci_ss_info_104c_ac51_1028_00b1,
 	&pci_ss_info_104c_ac51_1028_012a,
@@ -44128,13 +50591,18 @@
 };
 #define pci_ss_list_104c_ac52 NULL
 #define pci_ss_list_104c_ac53 NULL
-#define pci_ss_list_104c_ac54 NULL
+static const pciSubsystemInfo *pci_ss_list_104c_ac54[] = {
+	&pci_ss_info_104c_ac54_103c_08b0,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_104c_ac55[] = {
 	&pci_ss_info_104c_ac55_1014_0512,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_104c_ac56[] = {
+	&pci_ss_info_104c_ac56_1014_0512,
 	&pci_ss_info_104c_ac56_1014_0528,
+	&pci_ss_info_104c_ac56_17aa_2012,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_104c_ac60[] = {
@@ -44146,7 +50614,10 @@
 };
 #define pci_ss_list_104c_ac8d NULL
 #define pci_ss_list_104c_ac8e NULL
-#define pci_ss_list_104c_ac8f NULL
+static const pciSubsystemInfo *pci_ss_list_104c_ac8f[] = {
+	&pci_ss_info_104c_ac8f_1028_018d,
+	NULL
+};
 #define pci_ss_list_104c_fe00 NULL
 #define pci_ss_list_104c_fe03 NULL
 #define pci_ss_list_104d_8004 NULL
@@ -44162,6 +50633,7 @@
 #define pci_ss_list_104e_0317 NULL
 #define pci_ss_list_1050_0000 NULL
 #define pci_ss_list_1050_0001 NULL
+#define pci_ss_list_1050_0033 NULL
 #define pci_ss_list_1050_0105 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1050_0840[] = {
@@ -44195,6 +50667,7 @@
 #define pci_ss_list_1057_0006 NULL
 #define pci_ss_list_1057_0008 NULL
 #define pci_ss_list_1057_0009 NULL
+#define pci_ss_list_1057_0012 NULL
 #define pci_ss_list_1057_0100 NULL
 #define pci_ss_list_1057_0431 NULL
 static const pciSubsystemInfo *pci_ss_list_1057_1801[] = {
@@ -44226,6 +50699,8 @@
 };
 #define pci_ss_list_1057_18c0 NULL
 #define pci_ss_list_1057_18c1 NULL
+#define pci_ss_list_1057_3052 NULL
+#define pci_ss_list_1057_3055 NULL
 static const pciSubsystemInfo *pci_ss_list_1057_3410[] = {
 	&pci_ss_info_1057_3410_ecc0_0050,
 	&pci_ss_info_1057_3410_ecc0_0051,
@@ -44270,10 +50745,12 @@
 #define pci_ss_list_1057_5803 NULL
 #define pci_ss_list_1057_5806 NULL
 #define pci_ss_list_1057_5808 NULL
+#define pci_ss_list_1057_5809 NULL
 #define pci_ss_list_1057_6400 NULL
 #define pci_ss_list_1057_6405 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_105a_0d30[] = {
+	&pci_ss_info_105a_0d30_1043_8042,
 	&pci_ss_info_105a_0d30_105a_4d33,
 	NULL
 };
@@ -44308,9 +50785,11 @@
 #define pci_ss_list_105a_3d18 NULL
 #define pci_ss_list_105a_3d73 NULL
 #define pci_ss_list_105a_3d75 NULL
+#define pci_ss_list_105a_4302 NULL
 static const pciSubsystemInfo *pci_ss_list_105a_4d30[] = {
 	&pci_ss_info_105a_4d30_105a_4d33,
 	&pci_ss_info_105a_4d30_105a_4d39,
+	&pci_ss_info_105a_4d30_8086_5744,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_105a_4d33[] = {
@@ -44354,7 +50833,18 @@
 #define pci_ss_list_105a_6629 NULL
 #define pci_ss_list_105a_7275 NULL
 #define pci_ss_list_105a_8002 NULL
+#define pci_ss_list_105a_8350 NULL
+static const pciSubsystemInfo *pci_ss_list_105a_8650[] = {
+	&pci_ss_info_105a_8650_105a_4600,
+	&pci_ss_info_105a_8650_105a_4610,
+	&pci_ss_info_105a_8650_105a_8601,
+	&pci_ss_info_105a_8650_105a_8602,
+	NULL
+};
+#define pci_ss_list_105a_c350 NULL
+#define pci_ss_list_105a_e350 NULL
 #endif
+#define pci_ss_list_105b_0c4d NULL
 #define pci_ss_list_105d_2309 NULL
 static const pciSubsystemInfo *pci_ss_list_105d_2339[] = {
 	&pci_ss_info_105d_2339_105d_0000,
@@ -44393,6 +50883,8 @@
 };
 static const pciSubsystemInfo *pci_ss_list_105d_5348[] = {
 	&pci_ss_info_105d_5348_105d_0037,
+	&pci_ss_info_105d_5348_11a4_0028,
+	&pci_ss_info_105d_5348_11a4_0038,
 	NULL
 };
 #define pci_ss_list_1060_0001 NULL
@@ -44577,6 +51069,7 @@
 	NULL
 };
 #define pci_ss_list_1073_0020 NULL
+#define pci_ss_list_1073_1000 NULL
 static const pciSubsystemInfo *pci_ss_list_1073_2000[] = {
 	&pci_ss_info_1073_2000_1073_2000,
 	NULL
@@ -44605,14 +51098,24 @@
 	NULL
 };
 #define pci_ss_list_1077_2300 NULL
-#define pci_ss_list_1077_2312 NULL
+static const pciSubsystemInfo *pci_ss_list_1077_2312[] = {
+	&pci_ss_info_1077_2312_103c_0131,
+	&pci_ss_info_1077_2312_103c_12ba,
+	NULL
+};
 #define pci_ss_list_1077_2322 NULL
-#define pci_ss_list_1077_2422 NULL
+static const pciSubsystemInfo *pci_ss_list_1077_2422[] = {
+	&pci_ss_info_1077_2422_103c_12d7,
+	&pci_ss_info_1077_2422_103c_12dd,
+	NULL
+};
 #define pci_ss_list_1077_2432 NULL
-#define pci_ss_list_1077_3010 NULL
 #define pci_ss_list_1077_3022 NULL
+#define pci_ss_list_1077_3032 NULL
 #define pci_ss_list_1077_4010 NULL
 #define pci_ss_list_1077_4022 NULL
+#define pci_ss_list_1077_4032 NULL
+#define pci_ss_list_1077_5432 NULL
 #define pci_ss_list_1077_6312 NULL
 #define pci_ss_list_1077_6322 NULL
 #endif
@@ -44629,6 +51132,7 @@
 #define pci_ss_list_1078_0402 NULL
 #define pci_ss_list_1078_0403 NULL
 #define pci_ss_list_107d_0000 NULL
+#define pci_ss_list_107d_204d NULL
 #define pci_ss_list_107d_2134 NULL
 #define pci_ss_list_107d_2971 NULL
 #define pci_ss_list_107e_0001 NULL
@@ -44735,6 +51239,7 @@
 #define pci_ss_list_1092_9999 NULL
 #define pci_ss_list_1093_0160 NULL
 #define pci_ss_list_1093_0162 NULL
+#define pci_ss_list_1093_1150 NULL
 #define pci_ss_list_1093_1170 NULL
 #define pci_ss_list_1093_1180 NULL
 #define pci_ss_list_1093_1190 NULL
@@ -44846,6 +51351,7 @@
 	&pci_ss_info_109e_036e_1461_0003,
 	&pci_ss_info_109e_036e_1461_0004,
 	&pci_ss_info_109e_036e_1461_0761,
+	&pci_ss_info_109e_036e_1461_0771,
 	&pci_ss_info_109e_036e_14f1_0001,
 	&pci_ss_info_109e_036e_14f1_0002,
 	&pci_ss_info_109e_036e_14f1_0003,
@@ -44912,8 +51418,10 @@
 	&pci_ss_info_109e_0878_13e9_0070,
 	&pci_ss_info_109e_0878_144f_3000,
 	&pci_ss_info_109e_0878_1461_0002,
+	&pci_ss_info_109e_0878_1461_0003,
 	&pci_ss_info_109e_0878_1461_0004,
 	&pci_ss_info_109e_0878_1461_0761,
+	&pci_ss_info_109e_0878_1461_0771,
 	&pci_ss_info_109e_0878_14f1_0001,
 	&pci_ss_info_109e_0878_14f1_0002,
 	&pci_ss_info_109e_0878_14f1_0003,
@@ -45048,6 +51556,7 @@
 	&pci_ss_info_10b5_9030_10b5_2978,
 	&pci_ss_info_10b5_9030_10b5_3025,
 	&pci_ss_info_10b5_9030_10b5_3068,
+	&pci_ss_info_10b5_9030_12fe_0111,
 	&pci_ss_info_10b5_9030_1397_3136,
 	&pci_ss_info_10b5_9030_1397_3137,
 	&pci_ss_info_10b5_9030_1518_0200,
@@ -45106,6 +51615,8 @@
 	&pci_ss_info_10b5_9054_10b5_2844,
 	&pci_ss_info_10b5_9054_12c7_4001,
 	&pci_ss_info_10b5_9054_12d9_0002,
+	&pci_ss_info_10b5_9054_14b4_d100,
+	&pci_ss_info_10b5_9054_14b4_d114,
 	&pci_ss_info_10b5_9054_16df_0011,
 	&pci_ss_info_10b5_9054_16df_0012,
 	&pci_ss_info_10b5_9054_16df_0013,
@@ -45116,6 +51627,7 @@
 };
 static const pciSubsystemInfo *pci_ss_list_10b5_9056[] = {
 	&pci_ss_info_10b5_9056_10b5_2979,
+	&pci_ss_info_10b5_9056_14b4_d140,
 	NULL
 };
 #define pci_ss_list_10b5_9060 NULL
@@ -45127,13 +51639,22 @@
 static const pciSubsystemInfo *pci_ss_list_10b5_9080[] = {
 	&pci_ss_info_10b5_9080_103c_10eb,
 	&pci_ss_info_10b5_9080_103c_10ec,
+	&pci_ss_info_10b5_9080_10b5_1123,
 	&pci_ss_info_10b5_9080_10b5_9080,
 	&pci_ss_info_10b5_9080_129d_0002,
 	&pci_ss_info_10b5_9080_12d9_0002,
 	&pci_ss_info_10b5_9080_12df_4422,
+	&pci_ss_info_10b5_9080_1517_000b,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10b5_9656[] = {
+	&pci_ss_info_10b5_9656_1517_000f,
+	&pci_ss_info_10b5_9656_1885_0700,
+	&pci_ss_info_10b5_9656_1885_0701,
 	NULL
 };
 #define pci_ss_list_10b5_bb04 NULL
+#define pci_ss_list_10b5_c001 NULL
 #endif
 #define pci_ss_list_10b6_0001 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -45186,6 +51707,7 @@
 #define pci_ss_list_10b7_0910 NULL
 #define pci_ss_list_10b7_1006 NULL
 static const pciSubsystemInfo *pci_ss_list_10b7_1007[] = {
+	&pci_ss_info_10b7_1007_10b7_615b,
 	&pci_ss_info_10b7_1007_10b7_615c,
 	NULL
 };
@@ -45272,6 +51794,10 @@
 #define pci_ss_list_10b7_900a NULL
 #define pci_ss_list_10b7_9050 NULL
 #define pci_ss_list_10b7_9051 NULL
+static const pciSubsystemInfo *pci_ss_list_10b7_9054[] = {
+	&pci_ss_info_10b7_9054_10b7_9054,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_10b7_9055[] = {
 	&pci_ss_info_10b7_9055_1028_0080,
 	&pci_ss_info_10b7_9055_1028_0081,
@@ -45447,6 +51973,7 @@
 	&pci_ss_info_10b9_5229_1014_053d,
 	&pci_ss_info_10b9_5229_103c_0024,
 	&pci_ss_info_10b9_5229_1043_8053,
+	&pci_ss_info_10b9_5229_1849_5229,
 	NULL
 };
 #define pci_ss_list_10b9_5235 NULL
@@ -45566,6 +52093,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_10cd_1300[] = {
 	&pci_ss_info_10cd_1300_10cd_1310,
+	&pci_ss_info_10cd_1300_1195_1320,
 	NULL
 };
 #define pci_ss_list_10cd_2300 NULL
@@ -45707,17 +52235,22 @@
 };
 #define pci_ss_list_10de_0042 NULL
 #define pci_ss_list_10de_0043 NULL
+#define pci_ss_list_10de_0044 NULL
 #define pci_ss_list_10de_0045 NULL
+#define pci_ss_list_10de_0046 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0047[] = {
 	&pci_ss_info_10de_0047_1682_2109,
 	NULL
 };
+#define pci_ss_list_10de_0048 NULL
 #define pci_ss_list_10de_0049 NULL
+#define pci_ss_list_10de_004d NULL
 #define pci_ss_list_10de_004e NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0050[] = {
 	&pci_ss_info_10de_0050_1043_815a,
 	&pci_ss_info_10de_0050_1458_0c11,
 	&pci_ss_info_10de_0050_1462_7100,
+	&pci_ss_info_10de_0050_147b_1c1a,
 	NULL
 };
 #define pci_ss_list_10de_0051 NULL
@@ -45725,22 +52258,27 @@
 	&pci_ss_info_10de_0052_1043_815a,
 	&pci_ss_info_10de_0052_1458_0c11,
 	&pci_ss_info_10de_0052_1462_7100,
+	&pci_ss_info_10de_0052_147b_1c1a,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_10de_0053[] = {
 	&pci_ss_info_10de_0053_1043_815a,
 	&pci_ss_info_10de_0053_1458_5002,
 	&pci_ss_info_10de_0053_1462_7100,
+	&pci_ss_info_10de_0053_147b_1c1a,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_10de_0054[] = {
+	&pci_ss_info_10de_0054_1043_815a,
 	&pci_ss_info_10de_0054_1458_b003,
 	&pci_ss_info_10de_0054_1462_7100,
+	&pci_ss_info_10de_0054_147b_1c1a,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_10de_0055[] = {
 	&pci_ss_info_10de_0055_1043_815a,
 	&pci_ss_info_10de_0055_1458_b003,
+	&pci_ss_info_10de_0055_147b_1c1a,
 	NULL
 };
 #define pci_ss_list_10de_0056 NULL
@@ -45748,39 +52286,53 @@
 	&pci_ss_info_10de_0057_1043_8141,
 	&pci_ss_info_10de_0057_1458_e000,
 	&pci_ss_info_10de_0057_1462_7100,
+	&pci_ss_info_10de_0057_147b_1c1a,
 	NULL
 };
 #define pci_ss_list_10de_0058 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0059[] = {
 	&pci_ss_info_10de_0059_1043_812a,
+	&pci_ss_info_10de_0059_147b_1c1a,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_10de_005a[] = {
 	&pci_ss_info_10de_005a_1043_815a,
 	&pci_ss_info_10de_005a_1458_5004,
 	&pci_ss_info_10de_005a_1462_7100,
+	&pci_ss_info_10de_005a_147b_1c1a,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_10de_005b[] = {
 	&pci_ss_info_10de_005b_1043_815a,
 	&pci_ss_info_10de_005b_1458_5004,
 	&pci_ss_info_10de_005b_1462_7100,
+	&pci_ss_info_10de_005b_147b_1c1a,
 	NULL
 };
 #define pci_ss_list_10de_005c NULL
 #define pci_ss_list_10de_005d NULL
 static const pciSubsystemInfo *pci_ss_list_10de_005e[] = {
+	&pci_ss_info_10de_005e_1043_815a,
+	&pci_ss_info_10de_005e_10f1_2891,
 	&pci_ss_info_10de_005e_1458_5000,
 	&pci_ss_info_10de_005e_1462_7100,
+	&pci_ss_info_10de_005e_147b_1c1a,
 	NULL
 };
 #define pci_ss_list_10de_005f NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0060[] = {
 	&pci_ss_info_10de_0060_1043_80ad,
+	&pci_ss_info_10de_0060_a0a0_03ba,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_0064[] = {
+	&pci_ss_info_10de_0064_a0a0_03bb,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_0065[] = {
+	&pci_ss_info_10de_0065_a0a0_03b2,
 	NULL
 };
-#define pci_ss_list_10de_0064 NULL
-#define pci_ss_list_10de_0065 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0066[] = {
 	&pci_ss_info_10de_0066_1043_80a7,
 	NULL
@@ -45791,16 +52343,24 @@
 };
 static const pciSubsystemInfo *pci_ss_list_10de_0068[] = {
 	&pci_ss_info_10de_0068_1043_0c11,
+	&pci_ss_info_10de_0068_a0a0_03b4,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_006a[] = {
+	&pci_ss_info_10de_006a_1043_8095,
+	&pci_ss_info_10de_006a_a0a0_0304,
 	NULL
 };
-#define pci_ss_list_10de_006a NULL
 static const pciSubsystemInfo *pci_ss_list_10de_006b[] = {
 	&pci_ss_info_10de_006b_10de_006b,
 	NULL
 };
 #define pci_ss_list_10de_006c NULL
 #define pci_ss_list_10de_006d NULL
-#define pci_ss_list_10de_006e NULL
+static const pciSubsystemInfo *pci_ss_list_10de_006e[] = {
+	&pci_ss_info_10de_006e_a0a0_0306,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_10de_0080[] = {
 	&pci_ss_info_10de_0080_147b_1c09,
 	NULL
@@ -45829,9 +52389,13 @@
 #define pci_ss_list_10de_008b NULL
 #define pci_ss_list_10de_008c NULL
 #define pci_ss_list_10de_008e NULL
+#define pci_ss_list_10de_0090 NULL
 #define pci_ss_list_10de_0091 NULL
 #define pci_ss_list_10de_0092 NULL
+#define pci_ss_list_10de_0093 NULL
+#define pci_ss_list_10de_0098 NULL
 #define pci_ss_list_10de_0099 NULL
+#define pci_ss_list_10de_009d NULL
 static const pciSubsystemInfo *pci_ss_list_10de_00a0[] = {
 	&pci_ss_info_10de_00a0_14af_5810,
 	NULL
@@ -45839,10 +52403,14 @@
 #define pci_ss_list_10de_00c0 NULL
 #define pci_ss_list_10de_00c1 NULL
 #define pci_ss_list_10de_00c2 NULL
+#define pci_ss_list_10de_00c3 NULL
 #define pci_ss_list_10de_00c8 NULL
 #define pci_ss_list_10de_00c9 NULL
 #define pci_ss_list_10de_00cc NULL
-#define pci_ss_list_10de_00cd NULL
+static const pciSubsystemInfo *pci_ss_list_10de_00cd[] = {
+	&pci_ss_info_10de_00cd_10de_029b,
+	NULL
+};
 #define pci_ss_list_10de_00ce NULL
 #define pci_ss_list_10de_00d0 NULL
 #define pci_ss_list_10de_00d1 NULL
@@ -45857,40 +52425,55 @@
 #define pci_ss_list_10de_00da NULL
 #define pci_ss_list_10de_00dd NULL
 static const pciSubsystemInfo *pci_ss_list_10de_00df[] = {
+	&pci_ss_info_10de_00df_105b_0c43,
 	&pci_ss_info_10de_00df_147b_1c0b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_10de_00e0[] = {
+	&pci_ss_info_10de_00e0_10de_0c11,
+	&pci_ss_info_10de_00e0_1462_7030,
 	&pci_ss_info_10de_00e0_147b_1c0b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_10de_00e1[] = {
+	&pci_ss_info_10de_00e1_1462_7030,
 	&pci_ss_info_10de_00e1_147b_1c0b,
 	NULL
 };
 #define pci_ss_list_10de_00e2 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_00e3[] = {
+	&pci_ss_info_10de_00e3_105b_0c43,
 	&pci_ss_info_10de_00e3_147b_1c0b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_10de_00e4[] = {
+	&pci_ss_info_10de_00e4_105b_0c43,
+	&pci_ss_info_10de_00e4_1462_7030,
 	&pci_ss_info_10de_00e4_147b_1c0b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_10de_00e5[] = {
+	&pci_ss_info_10de_00e5_105b_0c43,
+	&pci_ss_info_10de_00e5_1462_7030,
 	&pci_ss_info_10de_00e5_147b_1c0b,
 	NULL
 };
 #define pci_ss_list_10de_00e6 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_00e7[] = {
+	&pci_ss_info_10de_00e7_105b_0c43,
+	&pci_ss_info_10de_00e7_1462_7030,
 	&pci_ss_info_10de_00e7_147b_1c0b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_10de_00e8[] = {
+	&pci_ss_info_10de_00e8_105b_0c43,
+	&pci_ss_info_10de_00e8_1462_7030,
 	&pci_ss_info_10de_00e8_147b_1c0b,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_10de_00ea[] = {
+	&pci_ss_info_10de_00ea_105b_0c43,
+	&pci_ss_info_10de_00ea_1462_b010,
 	&pci_ss_info_10de_00ea_147b_1c0b,
 	NULL
 };
@@ -45899,6 +52482,8 @@
 #define pci_ss_list_10de_00f0 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_00f1[] = {
 	&pci_ss_info_10de_00f1_1043_81a6,
+	&pci_ss_info_10de_00f1_1458_3150,
+	&pci_ss_info_10de_00f1_1682_2119,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_10de_00f2[] = {
@@ -45906,6 +52491,12 @@
 	NULL
 };
 #define pci_ss_list_10de_00f3 NULL
+#define pci_ss_list_10de_00f4 NULL
+#define pci_ss_list_10de_00f5 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_00f6[] = {
+	&pci_ss_info_10de_00f6_1682_217e,
+	NULL
+};
 #define pci_ss_list_10de_00f8 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_00f9[] = {
 	&pci_ss_info_10de_00f9_1682_2120,
@@ -45949,6 +52540,7 @@
 };
 static const pciSubsystemInfo *pci_ss_list_10de_0110[] = {
 	&pci_ss_info_10de_0110_1043_4015,
+	&pci_ss_info_10de_0110_1043_4021,
 	&pci_ss_info_10de_0110_1043_4031,
 	&pci_ss_info_10de_0110_1048_0c60,
 	&pci_ss_info_10de_0110_1048_0c61,
@@ -45968,14 +52560,21 @@
 #define pci_ss_list_10de_0113 NULL
 #define pci_ss_list_10de_0140 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0141[] = {
+	&pci_ss_info_10de_0141_1043_81b0,
 	&pci_ss_info_10de_0141_1458_3124,
 	NULL
 };
 #define pci_ss_list_10de_0142 NULL
+#define pci_ss_list_10de_0143 NULL
 #define pci_ss_list_10de_0144 NULL
 #define pci_ss_list_10de_0145 NULL
 #define pci_ss_list_10de_0146 NULL
+#define pci_ss_list_10de_0147 NULL
 #define pci_ss_list_10de_0148 NULL
+#define pci_ss_list_10de_0149 NULL
+#define pci_ss_list_10de_014a NULL
+#define pci_ss_list_10de_014c NULL
+#define pci_ss_list_10de_014d NULL
 #define pci_ss_list_10de_014e NULL
 #define pci_ss_list_10de_014f NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0150[] = {
@@ -45984,6 +52583,7 @@
 	&pci_ss_info_10de_0150_1048_0c52,
 	&pci_ss_info_10de_0150_107d_2840,
 	&pci_ss_info_10de_0150_107d_2842,
+	&pci_ss_info_10de_0150_10de_002e,
 	&pci_ss_info_10de_0150_1462_8831,
 	NULL
 };
@@ -45997,10 +52597,17 @@
 	NULL
 };
 #define pci_ss_list_10de_0153 NULL
+#define pci_ss_list_10de_0160 NULL
 #define pci_ss_list_10de_0161 NULL
+#define pci_ss_list_10de_0162 NULL
+#define pci_ss_list_10de_0163 NULL
 #define pci_ss_list_10de_0164 NULL
 #define pci_ss_list_10de_0165 NULL
+#define pci_ss_list_10de_0166 NULL
 #define pci_ss_list_10de_0167 NULL
+#define pci_ss_list_10de_0168 NULL
+#define pci_ss_list_10de_0169 NULL
+#define pci_ss_list_10de_016a NULL
 #define pci_ss_list_10de_0170 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0171[] = {
 	&pci_ss_info_10de_0171_10b0_0002,
@@ -46016,6 +52623,7 @@
 #define pci_ss_list_10de_0174 NULL
 #define pci_ss_list_10de_0175 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0176[] = {
+	&pci_ss_info_10de_0176_103c_08b0,
 	&pci_ss_info_10de_0176_4c53_1090,
 	NULL
 };
@@ -46030,6 +52638,7 @@
 #define pci_ss_list_10de_017c NULL
 #define pci_ss_list_10de_017d NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0181[] = {
+	&pci_ss_info_10de_0181_1043_8063,
 	&pci_ss_info_10de_0181_1043_806f,
 	&pci_ss_info_10de_0181_1462_8880,
 	&pci_ss_info_10de_0181_1462_8900,
@@ -46039,13 +52648,17 @@
 };
 #define pci_ss_list_10de_0182 NULL
 #define pci_ss_list_10de_0183 NULL
+#define pci_ss_list_10de_0184 NULL
 #define pci_ss_list_10de_0185 NULL
 #define pci_ss_list_10de_0186 NULL
 #define pci_ss_list_10de_0187 NULL
 #define pci_ss_list_10de_0188 NULL
 #define pci_ss_list_10de_018a NULL
 #define pci_ss_list_10de_018b NULL
+#define pci_ss_list_10de_018c NULL
 #define pci_ss_list_10de_018d NULL
+#define pci_ss_list_10de_0191 NULL
+#define pci_ss_list_10de_0193 NULL
 #define pci_ss_list_10de_01a0 NULL
 #define pci_ss_list_10de_01a4 NULL
 #define pci_ss_list_10de_01ab NULL
@@ -46061,18 +52674,55 @@
 #define pci_ss_list_10de_01c1 NULL
 #define pci_ss_list_10de_01c2 NULL
 #define pci_ss_list_10de_01c3 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_01d1[] = {
+	&pci_ss_info_10de_01d1_1462_0345,
+	NULL
+};
+#define pci_ss_list_10de_01d3 NULL
+#define pci_ss_list_10de_01d6 NULL
+#define pci_ss_list_10de_01d7 NULL
+#define pci_ss_list_10de_01d8 NULL
+#define pci_ss_list_10de_01da NULL
+#define pci_ss_list_10de_01dc NULL
+#define pci_ss_list_10de_01dd NULL
+static const pciSubsystemInfo *pci_ss_list_10de_01de[] = {
+	&pci_ss_info_10de_01de_10de_01dc,
+	NULL
+};
+#define pci_ss_list_10de_01df NULL
 static const pciSubsystemInfo *pci_ss_list_10de_01e0[] = {
 	&pci_ss_info_10de_01e0_147b_1c09,
 	NULL
 };
 #define pci_ss_list_10de_01e8 NULL
-#define pci_ss_list_10de_01ea NULL
-#define pci_ss_list_10de_01eb NULL
-#define pci_ss_list_10de_01ec NULL
-#define pci_ss_list_10de_01ed NULL
-#define pci_ss_list_10de_01ee NULL
-#define pci_ss_list_10de_01ef NULL
-#define pci_ss_list_10de_01f0 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_01ea[] = {
+	&pci_ss_info_10de_01ea_a0a0_03b9,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_01eb[] = {
+	&pci_ss_info_10de_01eb_a0a0_03b9,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_01ec[] = {
+	&pci_ss_info_10de_01ec_a0a0_03b9,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_01ed[] = {
+	&pci_ss_info_10de_01ed_a0a0_03b9,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_01ee[] = {
+	&pci_ss_info_10de_01ee_a0a0_03b9,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_01ef[] = {
+	&pci_ss_info_10de_01ef_a0a0_03b9,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_01f0[] = {
+	&pci_ss_info_10de_01f0_a0a0_03b5,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_10de_0200[] = {
 	&pci_ss_info_10de_0200_1043_402f,
 	&pci_ss_info_10de_0200_1048_0c70,
@@ -46085,15 +52735,30 @@
 	NULL
 };
 #define pci_ss_list_10de_0203 NULL
+#define pci_ss_list_10de_0211 NULL
+#define pci_ss_list_10de_0212 NULL
+#define pci_ss_list_10de_0215 NULL
+#define pci_ss_list_10de_0218 NULL
 #define pci_ss_list_10de_0221 NULL
-#define pci_ss_list_10de_0240 NULL
+#define pci_ss_list_10de_0222 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0240[] = {
+	&pci_ss_info_10de_0240_1043_81cd,
+	&pci_ss_info_10de_0240_1462_7207,
+	NULL
+};
 #define pci_ss_list_10de_0241 NULL
 #define pci_ss_list_10de_0242 NULL
 #define pci_ss_list_10de_0243 NULL
-#define pci_ss_list_10de_0244 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0244[] = {
+	&pci_ss_info_10de_0244_10de_0244,
+	NULL
+};
 #define pci_ss_list_10de_0245 NULL
 #define pci_ss_list_10de_0246 NULL
-#define pci_ss_list_10de_0247 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0247[] = {
+	&pci_ss_info_10de_0247_1043_1382,
+	NULL
+};
 #define pci_ss_list_10de_0248 NULL
 #define pci_ss_list_10de_0249 NULL
 #define pci_ss_list_10de_024a NULL
@@ -46116,27 +52781,75 @@
 #define pci_ss_list_10de_0258 NULL
 #define pci_ss_list_10de_0259 NULL
 #define pci_ss_list_10de_025b NULL
-#define pci_ss_list_10de_0260 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0260[] = {
+	&pci_ss_info_10de_0260_1043_81bc,
+	&pci_ss_info_10de_0260_1462_7207,
+	NULL
+};
 #define pci_ss_list_10de_0261 NULL
 #define pci_ss_list_10de_0262 NULL
 #define pci_ss_list_10de_0263 NULL
-#define pci_ss_list_10de_0264 NULL
-#define pci_ss_list_10de_0265 NULL
-#define pci_ss_list_10de_0266 NULL
-#define pci_ss_list_10de_0267 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0264[] = {
+	&pci_ss_info_10de_0264_1043_81bc,
+	&pci_ss_info_10de_0264_1462_7207,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_0265[] = {
+	&pci_ss_info_10de_0265_1043_81bc,
+	&pci_ss_info_10de_0265_1462_7207,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_0266[] = {
+	&pci_ss_info_10de_0266_1043_81bc,
+	&pci_ss_info_10de_0266_1462_7207,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_0267[] = {
+	&pci_ss_info_10de_0267_1043_81bc,
+	&pci_ss_info_10de_0267_1462_7207,
+	NULL
+};
 #define pci_ss_list_10de_0268 NULL
-#define pci_ss_list_10de_0269 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0269[] = {
+	&pci_ss_info_10de_0269_1043_8141,
+	&pci_ss_info_10de_0269_1462_7207,
+	NULL
+};
 #define pci_ss_list_10de_026a NULL
 #define pci_ss_list_10de_026b NULL
-#define pci_ss_list_10de_026c NULL
-#define pci_ss_list_10de_026d NULL
-#define pci_ss_list_10de_026e NULL
+static const pciSubsystemInfo *pci_ss_list_10de_026c[] = {
+	&pci_ss_info_10de_026c_10de_cb84,
+	&pci_ss_info_10de_026c_1462_7207,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_026d[] = {
+	&pci_ss_info_10de_026d_1043_81bc,
+	&pci_ss_info_10de_026d_1462_7207,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_026e[] = {
+	&pci_ss_info_10de_026e_1043_81bc,
+	&pci_ss_info_10de_026e_1462_7207,
+	NULL
+};
 #define pci_ss_list_10de_026f NULL
-#define pci_ss_list_10de_0270 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0270[] = {
+	&pci_ss_info_10de_0270_1043_81bc,
+	&pci_ss_info_10de_0270_1462_7207,
+	NULL
+};
 #define pci_ss_list_10de_0271 NULL
 #define pci_ss_list_10de_0272 NULL
-#define pci_ss_list_10de_027e NULL
-#define pci_ss_list_10de_027f NULL
+static const pciSubsystemInfo *pci_ss_list_10de_027e[] = {
+	&pci_ss_info_10de_027e_1043_81cd,
+	&pci_ss_info_10de_027e_1462_7207,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_027f[] = {
+	&pci_ss_info_10de_027f_1043_81cd,
+	&pci_ss_info_10de_027f_1462_7207,
+	NULL
+};
 #define pci_ss_list_10de_0280 NULL
 #define pci_ss_list_10de_0281 NULL
 #define pci_ss_list_10de_0282 NULL
@@ -46144,8 +52857,36 @@
 #define pci_ss_list_10de_0288 NULL
 #define pci_ss_list_10de_0289 NULL
 #define pci_ss_list_10de_028c NULL
+#define pci_ss_list_10de_0290 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0291[] = {
+	&pci_ss_info_10de_0291_10de_042b,
+	NULL
+};
+#define pci_ss_list_10de_0292 NULL
+#define pci_ss_list_10de_0293 NULL
+#define pci_ss_list_10de_0294 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0295[] = {
+	&pci_ss_info_10de_0295_107d_2a68,
+	NULL
+};
+#define pci_ss_list_10de_0297 NULL
+#define pci_ss_list_10de_0298 NULL
+#define pci_ss_list_10de_0299 NULL
+#define pci_ss_list_10de_029a NULL
+#define pci_ss_list_10de_029b NULL
+#define pci_ss_list_10de_029c NULL
+#define pci_ss_list_10de_029d NULL
+#define pci_ss_list_10de_029e NULL
+#define pci_ss_list_10de_029f NULL
 #define pci_ss_list_10de_02a0 NULL
-#define pci_ss_list_10de_02f0 NULL
+#define pci_ss_list_10de_02e0 NULL
+#define pci_ss_list_10de_02e1 NULL
+#define pci_ss_list_10de_02e2 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_02f0[] = {
+	&pci_ss_info_10de_02f0_1043_81cd,
+	&pci_ss_info_10de_02f0_1462_7207,
+	NULL
+};
 #define pci_ss_list_10de_02f1 NULL
 #define pci_ss_list_10de_02f2 NULL
 #define pci_ss_list_10de_02f3 NULL
@@ -46153,14 +52894,34 @@
 #define pci_ss_list_10de_02f5 NULL
 #define pci_ss_list_10de_02f6 NULL
 #define pci_ss_list_10de_02f7 NULL
-#define pci_ss_list_10de_02f8 NULL
-#define pci_ss_list_10de_02f9 NULL
-#define pci_ss_list_10de_02fa NULL
+static const pciSubsystemInfo *pci_ss_list_10de_02f8[] = {
+	&pci_ss_info_10de_02f8_1043_81cd,
+	&pci_ss_info_10de_02f8_1462_7207,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_02f9[] = {
+	&pci_ss_info_10de_02f9_1043_81cd,
+	&pci_ss_info_10de_02f9_1462_7207,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_02fa[] = {
+	&pci_ss_info_10de_02fa_1043_81cd,
+	&pci_ss_info_10de_02fa_1462_7207,
+	NULL
+};
 #define pci_ss_list_10de_02fb NULL
 #define pci_ss_list_10de_02fc NULL
 #define pci_ss_list_10de_02fd NULL
-#define pci_ss_list_10de_02fe NULL
-#define pci_ss_list_10de_02ff NULL
+static const pciSubsystemInfo *pci_ss_list_10de_02fe[] = {
+	&pci_ss_info_10de_02fe_1043_81cd,
+	&pci_ss_info_10de_02fe_1462_7207,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_02ff[] = {
+	&pci_ss_info_10de_02ff_1043_81cd,
+	&pci_ss_info_10de_02ff_1462_7207,
+	NULL
+};
 #define pci_ss_list_10de_0300 NULL
 #define pci_ss_list_10de_0301 NULL
 #define pci_ss_list_10de_0302 NULL
@@ -46184,6 +52945,7 @@
 #define pci_ss_list_10de_0320 NULL
 #define pci_ss_list_10de_0321 NULL
 static const pciSubsystemInfo *pci_ss_list_10de_0322[] = {
+	&pci_ss_info_10de_0322_1043_02fb,
 	&pci_ss_info_10de_0322_1462_9171,
 	&pci_ss_info_10de_0322_1462_9360,
 	NULL
@@ -46240,15 +53002,125 @@
 #define pci_ss_list_10de_0368 NULL
 #define pci_ss_list_10de_0369 NULL
 #define pci_ss_list_10de_036a NULL
+#define pci_ss_list_10de_036b NULL
 #define pci_ss_list_10de_036c NULL
 #define pci_ss_list_10de_036d NULL
 #define pci_ss_list_10de_036e NULL
+#define pci_ss_list_10de_0370 NULL
 #define pci_ss_list_10de_0371 NULL
 #define pci_ss_list_10de_0372 NULL
 #define pci_ss_list_10de_0373 NULL
+#define pci_ss_list_10de_0374 NULL
+#define pci_ss_list_10de_0375 NULL
+#define pci_ss_list_10de_0376 NULL
+#define pci_ss_list_10de_0377 NULL
+#define pci_ss_list_10de_0378 NULL
 #define pci_ss_list_10de_037a NULL
 #define pci_ss_list_10de_037e NULL
 #define pci_ss_list_10de_037f NULL
+#define pci_ss_list_10de_0390 NULL
+static const pciSubsystemInfo *pci_ss_list_10de_0391[] = {
+	&pci_ss_info_10de_0391_1458_3427,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_10de_0392[] = {
+	&pci_ss_info_10de_0392_1462_0622,
+	NULL
+};
+#define pci_ss_list_10de_0393 NULL
+#define pci_ss_list_10de_0394 NULL
+#define pci_ss_list_10de_0395 NULL
+#define pci_ss_list_10de_0397 NULL
+#define pci_ss_list_10de_0398 NULL
+#define pci_ss_list_10de_039b NULL
+#define pci_ss_list_10de_039c NULL
+#define pci_ss_list_10de_039e NULL
+#define pci_ss_list_10de_03a0 NULL
+#define pci_ss_list_10de_03a1 NULL
+#define pci_ss_list_10de_03a2 NULL
+#define pci_ss_list_10de_03a3 NULL
+#define pci_ss_list_10de_03a4 NULL
+#define pci_ss_list_10de_03a5 NULL
+#define pci_ss_list_10de_03a6 NULL
+#define pci_ss_list_10de_03a7 NULL
+#define pci_ss_list_10de_03a8 NULL
+#define pci_ss_list_10de_03a9 NULL
+#define pci_ss_list_10de_03aa NULL
+#define pci_ss_list_10de_03ab NULL
+#define pci_ss_list_10de_03ac NULL
+#define pci_ss_list_10de_03ad NULL
+#define pci_ss_list_10de_03ae NULL
+#define pci_ss_list_10de_03af NULL
+#define pci_ss_list_10de_03b0 NULL
+#define pci_ss_list_10de_03b1 NULL
+#define pci_ss_list_10de_03b2 NULL
+#define pci_ss_list_10de_03b3 NULL
+#define pci_ss_list_10de_03b4 NULL
+#define pci_ss_list_10de_03b5 NULL
+#define pci_ss_list_10de_03b6 NULL
+#define pci_ss_list_10de_03b7 NULL
+#define pci_ss_list_10de_03b8 NULL
+#define pci_ss_list_10de_03b9 NULL
+#define pci_ss_list_10de_03ba NULL
+#define pci_ss_list_10de_03bb NULL
+#define pci_ss_list_10de_03d0 NULL
+#define pci_ss_list_10de_03d1 NULL
+#define pci_ss_list_10de_03d2 NULL
+#define pci_ss_list_10de_03d5 NULL
+#define pci_ss_list_10de_03e0 NULL
+#define pci_ss_list_10de_03e1 NULL
+#define pci_ss_list_10de_03e2 NULL
+#define pci_ss_list_10de_03e3 NULL
+#define pci_ss_list_10de_03e4 NULL
+#define pci_ss_list_10de_03e5 NULL
+#define pci_ss_list_10de_03e6 NULL
+#define pci_ss_list_10de_03e7 NULL
+#define pci_ss_list_10de_03e8 NULL
+#define pci_ss_list_10de_03e9 NULL
+#define pci_ss_list_10de_03ea NULL
+#define pci_ss_list_10de_03eb NULL
+#define pci_ss_list_10de_03ec NULL
+#define pci_ss_list_10de_03ee NULL
+#define pci_ss_list_10de_03ef NULL
+#define pci_ss_list_10de_03f0 NULL
+#define pci_ss_list_10de_03f1 NULL
+#define pci_ss_list_10de_03f2 NULL
+#define pci_ss_list_10de_03f3 NULL
+#define pci_ss_list_10de_03f4 NULL
+#define pci_ss_list_10de_03f5 NULL
+#define pci_ss_list_10de_03f6 NULL
+#define pci_ss_list_10de_03f7 NULL
+#define pci_ss_list_10de_0440 NULL
+#define pci_ss_list_10de_0441 NULL
+#define pci_ss_list_10de_0442 NULL
+#define pci_ss_list_10de_0443 NULL
+#define pci_ss_list_10de_0444 NULL
+#define pci_ss_list_10de_0445 NULL
+#define pci_ss_list_10de_0446 NULL
+#define pci_ss_list_10de_0447 NULL
+#define pci_ss_list_10de_0448 NULL
+#define pci_ss_list_10de_0449 NULL
+#define pci_ss_list_10de_044a NULL
+#define pci_ss_list_10de_044b NULL
+#define pci_ss_list_10de_044c NULL
+#define pci_ss_list_10de_044d NULL
+#define pci_ss_list_10de_044e NULL
+#define pci_ss_list_10de_044f NULL
+#define pci_ss_list_10de_0450 NULL
+#define pci_ss_list_10de_0451 NULL
+#define pci_ss_list_10de_0452 NULL
+#define pci_ss_list_10de_0453 NULL
+#define pci_ss_list_10de_0454 NULL
+#define pci_ss_list_10de_0455 NULL
+#define pci_ss_list_10de_0456 NULL
+#define pci_ss_list_10de_0457 NULL
+#define pci_ss_list_10de_0458 NULL
+#define pci_ss_list_10de_0459 NULL
+#define pci_ss_list_10de_045a NULL
+#define pci_ss_list_10de_045c NULL
+#define pci_ss_list_10de_045d NULL
+#define pci_ss_list_10de_045e NULL
+#define pci_ss_list_10de_045f NULL
 #define pci_ss_list_10df_1ae5 NULL
 #define pci_ss_list_10df_f085 NULL
 #define pci_ss_list_10df_f095 NULL
@@ -46293,11 +53165,13 @@
 #define pci_ss_list_10e1_dc29 NULL
 #endif
 #define pci_ss_list_10e3_0000 NULL
+#define pci_ss_list_10e3_0108 NULL
 #define pci_ss_list_10e3_0148 NULL
 #define pci_ss_list_10e3_0860 NULL
 #define pci_ss_list_10e3_0862 NULL
 #define pci_ss_list_10e3_8260 NULL
 #define pci_ss_list_10e3_8261 NULL
+#define pci_ss_list_10e3_a108 NULL
 #define pci_ss_list_10e4_8029 NULL
 #define pci_ss_list_10e8_1072 NULL
 #define pci_ss_list_10e8_2011 NULL
@@ -46312,10 +53186,12 @@
 #define pci_ss_list_10e8_80d7 NULL
 #define pci_ss_list_10e8_80d9 NULL
 #define pci_ss_list_10e8_80da NULL
+#define pci_ss_list_10e8_80fc NULL
 #define pci_ss_list_10e8_811a NULL
 #define pci_ss_list_10e8_814c NULL
 #define pci_ss_list_10e8_8170 NULL
 #define pci_ss_list_10e8_81e6 NULL
+#define pci_ss_list_10e8_828d NULL
 #define pci_ss_list_10e8_8291 NULL
 #define pci_ss_list_10e8_82c4 NULL
 #define pci_ss_list_10e8_82c5 NULL
@@ -46324,6 +53200,8 @@
 #define pci_ss_list_10e8_82ca NULL
 #define pci_ss_list_10e8_82db NULL
 #define pci_ss_list_10e8_82e2 NULL
+#define pci_ss_list_10e8_8406 NULL
+#define pci_ss_list_10e8_8407 NULL
 #define pci_ss_list_10e8_8851 NULL
 #define pci_ss_list_10ea_1680 NULL
 #define pci_ss_list_10ea_1682 NULL
@@ -46337,7 +53215,18 @@
 #define pci_ss_list_10eb_0101 NULL
 #define pci_ss_list_10eb_8111 NULL
 #define pci_ss_list_10ec_0139 NULL
+#define pci_ss_list_10ec_0260 NULL
+#define pci_ss_list_10ec_0261 NULL
+#define pci_ss_list_10ec_0280 NULL
+#define pci_ss_list_10ec_0861 NULL
+#define pci_ss_list_10ec_0862 NULL
+#define pci_ss_list_10ec_0880 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_10ec_0883[] = {
+	&pci_ss_info_10ec_0883_1025_1605,
+	NULL
+};
+#define pci_ss_list_10ec_0888 NULL
 static const pciSubsystemInfo *pci_ss_list_10ec_8029[] = {
 	&pci_ss_info_10ec_8029_10b8_2011,
 	&pci_ss_info_10ec_8029_10ec_8029,
@@ -46350,6 +53239,7 @@
 	&pci_ss_info_10ec_8129_10ec_8129,
 	NULL
 };
+#define pci_ss_list_10ec_8136 NULL
 static const pciSubsystemInfo *pci_ss_list_10ec_8138[] = {
 	&pci_ss_info_10ec_8138_10ec_8138,
 	NULL
@@ -46360,10 +53250,12 @@
 	&pci_ss_info_10ec_8139_1025_8920,
 	&pci_ss_info_10ec_8139_1025_8921,
 	&pci_ss_info_10ec_8139_103c_006a,
+	&pci_ss_info_10ec_8139_1043_1045,
 	&pci_ss_info_10ec_8139_1043_8109,
 	&pci_ss_info_10ec_8139_1071_8160,
 	&pci_ss_info_10ec_8139_10bd_0320,
 	&pci_ss_info_10ec_8139_10ec_8139,
+	&pci_ss_info_10ec_8139_10f7_8338,
 	&pci_ss_info_10ec_8139_1113_ec01,
 	&pci_ss_info_10ec_8139_1186_1300,
 	&pci_ss_info_10ec_8139_1186_1320,
@@ -46374,6 +53266,7 @@
 	&pci_ss_info_10ec_8139_1429_d010,
 	&pci_ss_info_10ec_8139_1432_9130,
 	&pci_ss_info_10ec_8139_1436_8139,
+	&pci_ss_info_10ec_8139_144d_c00c,
 	&pci_ss_info_10ec_8139_1458_e000,
 	&pci_ss_info_10ec_8139_1462_788c,
 	&pci_ss_info_10ec_8139_146c_1439,
@@ -46382,23 +53275,31 @@
 	&pci_ss_info_10ec_8139_149c_139a,
 	&pci_ss_info_10ec_8139_149c_8139,
 	&pci_ss_info_10ec_8139_14cb_0200,
+	&pci_ss_info_10ec_8139_1695_9001,
 	&pci_ss_info_10ec_8139_1799_5000,
 	&pci_ss_info_10ec_8139_1904_8139,
 	&pci_ss_info_10ec_8139_2646_0001,
 	&pci_ss_info_10ec_8139_8e2e_7000,
 	&pci_ss_info_10ec_8139_8e2e_7100,
-	&pci_ss_info_10ec_8139_9001_1695,
 	&pci_ss_info_10ec_8139_a0a0_0007,
 	NULL
 };
+static const pciSubsystemInfo *pci_ss_list_10ec_8167[] = {
+	&pci_ss_info_10ec_8167_1462_235c,
+	NULL
+};
+#define pci_ss_list_10ec_8168 NULL
 static const pciSubsystemInfo *pci_ss_list_10ec_8169[] = {
+	&pci_ss_info_10ec_8169_1025_0079,
 	&pci_ss_info_10ec_8169_1259_c107,
 	&pci_ss_info_10ec_8169_1371_434e,
 	&pci_ss_info_10ec_8169_1458_e000,
+	&pci_ss_info_10ec_8169_1462_030c,
 	&pci_ss_info_10ec_8169_1462_702c,
 	NULL
 };
 #define pci_ss_list_10ec_8180 NULL
+#define pci_ss_list_10ec_8185 NULL
 #define pci_ss_list_10ec_8197 NULL
 #endif
 #define pci_ss_list_10ed_7310 NULL
@@ -46415,13 +53316,16 @@
 #define pci_ss_list_10ee_3fc5 NULL
 #define pci_ss_list_10ee_3fc6 NULL
 #define pci_ss_list_10ee_8381 NULL
+#define pci_ss_list_10ee_d154 NULL
 #define pci_ss_list_10ef_8154 NULL
+#define pci_ss_list_10f1_2865 NULL
 #define pci_ss_list_10f5_a001 NULL
 #define pci_ss_list_10fa_000c NULL
 #define pci_ss_list_10fb_186f NULL
 #define pci_ss_list_10fc_0003 NULL
 #define pci_ss_list_10fc_0005 NULL
 #define pci_ss_list_1101_1060 NULL
+#define pci_ss_list_1101_1622 NULL
 #define pci_ss_list_1101_9100 NULL
 #define pci_ss_list_1101_9400 NULL
 #define pci_ss_list_1101_9401 NULL
@@ -46453,8 +53357,15 @@
 	&pci_ss_info_1102_0004_1102_0051,
 	&pci_ss_info_1102_0004_1102_0053,
 	&pci_ss_info_1102_0004_1102_0058,
+	&pci_ss_info_1102_0004_1102_1002,
 	&pci_ss_info_1102_0004_1102_1007,
 	&pci_ss_info_1102_0004_1102_2002,
+	&pci_ss_info_1102_0004_1102_4001,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_1102_0005[] = {
+	&pci_ss_info_1102_0005_1102_0021,
+	&pci_ss_info_1102_0005_1102_1003,
 	NULL
 };
 #define pci_ss_list_1102_0006 NULL
@@ -46515,8 +53426,6 @@
 	&pci_ss_info_1103_0004_1103_0004,
 	&pci_ss_info_1103_0004_1103_0005,
 	&pci_ss_info_1103_0004_1103_0006,
-	&pci_ss_info_1103_0004_1103_0007,
-	&pci_ss_info_1103_0004_1103_0008,
 	NULL
 };
 #define pci_ss_list_1103_0005 NULL
@@ -46545,7 +53454,9 @@
 #endif
 #define pci_ss_list_1106_0102 NULL
 #define pci_ss_list_1106_0130 NULL
+#define pci_ss_list_1106_0198 NULL
 #define pci_ss_list_1106_0204 NULL
+#define pci_ss_list_1106_0208 NULL
 #define pci_ss_list_1106_0238 NULL
 #define pci_ss_list_1106_0258 NULL
 #define pci_ss_list_1106_0259 NULL
@@ -46556,6 +53467,7 @@
 	NULL
 };
 #define pci_ss_list_1106_0290 NULL
+#define pci_ss_list_1106_0293 NULL
 #define pci_ss_list_1106_0296 NULL
 static const pciSubsystemInfo *pci_ss_list_1106_0305[] = {
 	&pci_ss_info_1106_0305_1019_0987,
@@ -46567,6 +53479,15 @@
 };
 #define pci_ss_list_1106_0308 NULL
 #define pci_ss_list_1106_0314 NULL
+#define pci_ss_list_1106_0324 NULL
+#define pci_ss_list_1106_0327 NULL
+#define pci_ss_list_1106_0336 NULL
+#define pci_ss_list_1106_0340 NULL
+#define pci_ss_list_1106_0351 NULL
+static const pciSubsystemInfo *pci_ss_list_1106_0364[] = {
+	&pci_ss_info_1106_0364_1043_81ce,
+	NULL
+};
 #define pci_ss_list_1106_0391 NULL
 #define pci_ss_list_1106_0501 NULL
 #define pci_ss_list_1106_0505 NULL
@@ -46640,9 +53561,16 @@
 #define pci_ss_list_1106_1269 NULL
 #define pci_ss_list_1106_1282 NULL
 #define pci_ss_list_1106_1290 NULL
+#define pci_ss_list_1106_1293 NULL
 #define pci_ss_list_1106_1296 NULL
 #define pci_ss_list_1106_1308 NULL
 #define pci_ss_list_1106_1314 NULL
+#define pci_ss_list_1106_1324 NULL
+#define pci_ss_list_1106_1327 NULL
+#define pci_ss_list_1106_1336 NULL
+#define pci_ss_list_1106_1340 NULL
+#define pci_ss_list_1106_1351 NULL
+#define pci_ss_list_1106_1364 NULL
 #define pci_ss_list_1106_1571 NULL
 #define pci_ss_list_1106_1595 NULL
 #define pci_ss_list_1106_2204 NULL
@@ -46653,9 +53581,16 @@
 #define pci_ss_list_1106_2269 NULL
 #define pci_ss_list_1106_2282 NULL
 #define pci_ss_list_1106_2290 NULL
+#define pci_ss_list_1106_2293 NULL
 #define pci_ss_list_1106_2296 NULL
 #define pci_ss_list_1106_2308 NULL
 #define pci_ss_list_1106_2314 NULL
+#define pci_ss_list_1106_2324 NULL
+#define pci_ss_list_1106_2327 NULL
+#define pci_ss_list_1106_2336 NULL
+#define pci_ss_list_1106_2340 NULL
+#define pci_ss_list_1106_2351 NULL
+#define pci_ss_list_1106_2364 NULL
 #define pci_ss_list_1106_287a NULL
 #define pci_ss_list_1106_287b NULL
 #define pci_ss_list_1106_287c NULL
@@ -46686,10 +53621,11 @@
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1106_3044[] = {
-	&pci_ss_info_1106_3044_0574_086c,
+	&pci_ss_info_1106_3044_0010_0001,
 	&pci_ss_info_1106_3044_1025_005a,
 	&pci_ss_info_1106_3044_1043_808a,
 	&pci_ss_info_1106_3044_1458_1000,
+	&pci_ss_info_1106_3044_1462_207d,
 	&pci_ss_info_1106_3044_1462_702d,
 	&pci_ss_info_1106_3044_1462_971d,
 	NULL
@@ -46728,15 +53664,18 @@
 	&pci_ss_info_1106_3059_1043_812a,
 	&pci_ss_info_1106_3059_1106_3059,
 	&pci_ss_info_1106_3059_1106_4161,
+	&pci_ss_info_1106_3059_1106_4170,
+	&pci_ss_info_1106_3059_1106_4552,
 	&pci_ss_info_1106_3059_1297_c160,
+	&pci_ss_info_1106_3059_1413_147b,
 	&pci_ss_info_1106_3059_1458_a002,
 	&pci_ss_info_1106_3059_1462_0080,
 	&pci_ss_info_1106_3059_1462_3800,
 	&pci_ss_info_1106_3059_147b_1407,
+	&pci_ss_info_1106_3059_1849_0850,
 	&pci_ss_info_1106_3059_1849_9761,
+	&pci_ss_info_1106_3059_3005_1695,
 	&pci_ss_info_1106_3059_4005_4710,
-	&pci_ss_info_1106_3059_4170_1106,
-	&pci_ss_info_1106_3059_4552_1106,
 	&pci_ss_info_1106_3059_a0a0_01b6,
 	NULL
 };
@@ -46816,6 +53755,7 @@
 	NULL
 };
 #define pci_ss_list_1106_3156 NULL
+#define pci_ss_list_1106_3157 NULL
 static const pciSubsystemInfo *pci_ss_list_1106_3164[] = {
 	&pci_ss_info_1106_3164_1043_80f4,
 	&pci_ss_info_1106_3164_1462_7028,
@@ -46859,8 +53799,12 @@
 	&pci_ss_info_1106_3227_1849_3227,
 	NULL
 };
+#define pci_ss_list_1106_3230 NULL
 #define pci_ss_list_1106_3238 NULL
 #define pci_ss_list_1106_3249 NULL
+#define pci_ss_list_1106_324a NULL
+#define pci_ss_list_1106_324b NULL
+#define pci_ss_list_1106_324e NULL
 #define pci_ss_list_1106_3258 NULL
 #define pci_ss_list_1106_3259 NULL
 #define pci_ss_list_1106_3269 NULL
@@ -46869,9 +53813,17 @@
 #define pci_ss_list_1106_3288 NULL
 #define pci_ss_list_1106_3290 NULL
 #define pci_ss_list_1106_3296 NULL
+#define pci_ss_list_1106_3324 NULL
+#define pci_ss_list_1106_3327 NULL
+#define pci_ss_list_1106_3336 NULL
 #define pci_ss_list_1106_3337 NULL
+#define pci_ss_list_1106_3340 NULL
 #define pci_ss_list_1106_3344 NULL
 #define pci_ss_list_1106_3349 NULL
+#define pci_ss_list_1106_3351 NULL
+#define pci_ss_list_1106_3364 NULL
+#define pci_ss_list_1106_3371 NULL
+#define pci_ss_list_1106_3372 NULL
 #define pci_ss_list_1106_337a NULL
 #define pci_ss_list_1106_337b NULL
 #define pci_ss_list_1106_4149 NULL
@@ -46883,15 +53835,30 @@
 #define pci_ss_list_1106_4269 NULL
 #define pci_ss_list_1106_4282 NULL
 #define pci_ss_list_1106_4290 NULL
+#define pci_ss_list_1106_4293 NULL
 #define pci_ss_list_1106_4296 NULL
 #define pci_ss_list_1106_4308 NULL
 #define pci_ss_list_1106_4314 NULL
+#define pci_ss_list_1106_4324 NULL
+#define pci_ss_list_1106_4327 NULL
+#define pci_ss_list_1106_4336 NULL
+#define pci_ss_list_1106_4340 NULL
+#define pci_ss_list_1106_4351 NULL
+#define pci_ss_list_1106_4364 NULL
 #define pci_ss_list_1106_5030 NULL
 #define pci_ss_list_1106_5208 NULL
 #define pci_ss_list_1106_5238 NULL
 #define pci_ss_list_1106_5290 NULL
 #define pci_ss_list_1106_5308 NULL
+#define pci_ss_list_1106_5324 NULL
+#define pci_ss_list_1106_5327 NULL
+#define pci_ss_list_1106_5336 NULL
+#define pci_ss_list_1106_5340 NULL
+#define pci_ss_list_1106_5351 NULL
+#define pci_ss_list_1106_5364 NULL
 #define pci_ss_list_1106_6100 NULL
+#define pci_ss_list_1106_6327 NULL
+#define pci_ss_list_1106_6364 NULL
 #define pci_ss_list_1106_7204 NULL
 static const pciSubsystemInfo *pci_ss_list_1106_7205[] = {
 	&pci_ss_info_1106_7205_1458_d000,
@@ -46904,12 +53871,20 @@
 #define pci_ss_list_1106_7269 NULL
 #define pci_ss_list_1106_7282 NULL
 #define pci_ss_list_1106_7290 NULL
+#define pci_ss_list_1106_7293 NULL
 #define pci_ss_list_1106_7296 NULL
 #define pci_ss_list_1106_7308 NULL
 #define pci_ss_list_1106_7314 NULL
+#define pci_ss_list_1106_7324 NULL
+#define pci_ss_list_1106_7327 NULL
+#define pci_ss_list_1106_7336 NULL
+#define pci_ss_list_1106_7340 NULL
+#define pci_ss_list_1106_7351 NULL
+#define pci_ss_list_1106_7364 NULL
 #define pci_ss_list_1106_8231 NULL
 #define pci_ss_list_1106_8235 NULL
 #define pci_ss_list_1106_8305 NULL
+#define pci_ss_list_1106_8324 NULL
 #define pci_ss_list_1106_8391 NULL
 #define pci_ss_list_1106_8501 NULL
 #define pci_ss_list_1106_8596 NULL
@@ -46924,6 +53899,8 @@
 #define pci_ss_list_1106_8693 NULL
 #define pci_ss_list_1106_a208 NULL
 #define pci_ss_list_1106_a238 NULL
+#define pci_ss_list_1106_a327 NULL
+#define pci_ss_list_1106_a364 NULL
 #define pci_ss_list_1106_b091 NULL
 #define pci_ss_list_1106_b099 NULL
 #define pci_ss_list_1106_b101 NULL
@@ -46939,16 +53916,23 @@
 };
 #define pci_ss_list_1106_b198 NULL
 #define pci_ss_list_1106_b213 NULL
+#define pci_ss_list_1106_b999 NULL
 #define pci_ss_list_1106_c208 NULL
 #define pci_ss_list_1106_c238 NULL
+#define pci_ss_list_1106_c327 NULL
+#define pci_ss_list_1106_c340 NULL
+#define pci_ss_list_1106_c364 NULL
 #define pci_ss_list_1106_d104 NULL
 #define pci_ss_list_1106_d208 NULL
 #define pci_ss_list_1106_d213 NULL
 #define pci_ss_list_1106_d238 NULL
+#define pci_ss_list_1106_d340 NULL
 #define pci_ss_list_1106_e208 NULL
 #define pci_ss_list_1106_e238 NULL
+#define pci_ss_list_1106_e340 NULL
 #define pci_ss_list_1106_f208 NULL
 #define pci_ss_list_1106_f238 NULL
+#define pci_ss_list_1106_f340 NULL
 #endif
 #define pci_ss_list_1107_0576 NULL
 #define pci_ss_list_1108_0100 NULL
@@ -47119,6 +54103,7 @@
 #define pci_ss_list_111d_0005 NULL
 #define pci_ss_list_111f_4a47 NULL
 #define pci_ss_list_111f_5243 NULL
+#define pci_ss_list_1124_2581 NULL
 #define pci_ss_list_1127_0200 NULL
 #define pci_ss_list_1127_0210 NULL
 #define pci_ss_list_1127_0250 NULL
@@ -47133,11 +54118,17 @@
 #define pci_ss_list_112f_0000 NULL
 #define pci_ss_list_112f_0001 NULL
 #define pci_ss_list_112f_0008 NULL
-#define pci_ss_list_1131_1561 NULL
-#define pci_ss_list_1131_1562 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1131_1561[] = {
+	&pci_ss_info_1131_1561_1775_c200,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_1131_1562[] = {
+	&pci_ss_info_1131_1562_1775_c200,
+	NULL
+};
 #define pci_ss_list_1131_3400 NULL
 #define pci_ss_list_1131_5400 NULL
-#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1131_5402[] = {
 	&pci_ss_info_1131_5402_1244_0f00,
 	NULL
@@ -47161,17 +54152,19 @@
 };
 static const pciSubsystemInfo *pci_ss_list_1131_7133[] = {
 	&pci_ss_info_1131_7133_0000_4091,
-	&pci_ss_info_1131_7133_002b_11bd,
 	&pci_ss_info_1131_7133_1019_4cb5,
 	&pci_ss_info_1131_7133_1043_0210,
 	&pci_ss_info_1131_7133_1043_4843,
 	&pci_ss_info_1131_7133_1043_4845,
 	&pci_ss_info_1131_7133_1043_4862,
+	&pci_ss_info_1131_7133_1131_0000,
 	&pci_ss_info_1131_7133_1131_2001,
 	&pci_ss_info_1131_7133_1131_2018,
 	&pci_ss_info_1131_7133_1131_4ee9,
+	&pci_ss_info_1131_7133_11bd_002b,
 	&pci_ss_info_1131_7133_11bd_002e,
 	&pci_ss_info_1131_7133_12ab_0800,
+	&pci_ss_info_1131_7133_1421_0335,
 	&pci_ss_info_1131_7133_1421_1370,
 	&pci_ss_info_1131_7133_1435_7330,
 	&pci_ss_info_1131_7133_1435_7350,
@@ -47182,23 +54175,30 @@
 	&pci_ss_info_1131_7133_14c0_1212,
 	&pci_ss_info_1131_7133_153b_1160,
 	&pci_ss_info_1131_7133_153b_1162,
+	&pci_ss_info_1131_7133_17de_7350,
 	&pci_ss_info_1131_7133_185b_c100,
-	&pci_ss_info_1131_7133_4e42_0212,
-	&pci_ss_info_1131_7133_4e42_0502,
 	&pci_ss_info_1131_7133_5168_0306,
 	&pci_ss_info_1131_7133_5168_0319,
-	&pci_ss_info_1131_7133_5456_7135,
+	&pci_ss_info_1131_7133_5168_0502,
+	&pci_ss_info_1131_7133_5168_0520,
+	&pci_ss_info_1131_7133_5168_1502,
+	&pci_ss_info_1131_7133_5168_2502,
+	&pci_ss_info_1131_7133_5168_2520,
+	&pci_ss_info_1131_7133_5168_3502,
+	&pci_ss_info_1131_7133_5168_3520,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1131_7134[] = {
 	&pci_ss_info_1131_7134_1019_4cb4,
 	&pci_ss_info_1131_7134_1043_0210,
 	&pci_ss_info_1131_7134_1043_4840,
+	&pci_ss_info_1131_7134_1043_4842,
 	&pci_ss_info_1131_7134_1131_2004,
 	&pci_ss_info_1131_7134_1131_4e85,
 	&pci_ss_info_1131_7134_1131_6752,
 	&pci_ss_info_1131_7134_11bd_002b,
 	&pci_ss_info_1131_7134_11bd_002d,
+	&pci_ss_info_1131_7134_1461_2c00,
 	&pci_ss_info_1131_7134_1461_9715,
 	&pci_ss_info_1131_7134_1461_a70a,
 	&pci_ss_info_1131_7134_1461_a70b,
@@ -47213,7 +54213,6 @@
 	&pci_ss_info_1131_7134_185b_c900,
 	&pci_ss_info_1131_7134_1894_a006,
 	&pci_ss_info_1131_7134_1894_fe01,
-	&pci_ss_info_1131_7134_4e42_0138,
 	NULL
 };
 #define pci_ss_list_1131_7145 NULL
@@ -47242,12 +54241,19 @@
 	&pci_ss_info_1131_7146_13c2_100c,
 	&pci_ss_info_1131_7146_13c2_100f,
 	&pci_ss_info_1131_7146_13c2_1011,
+	&pci_ss_info_1131_7146_13c2_1012,
 	&pci_ss_info_1131_7146_13c2_1013,
 	&pci_ss_info_1131_7146_13c2_1016,
+	&pci_ss_info_1131_7146_13c2_1018,
+	&pci_ss_info_1131_7146_13c2_1019,
 	&pci_ss_info_1131_7146_13c2_1102,
+	&pci_ss_info_1131_7146_153b_1156,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_1131_9730[] = {
+	&pci_ss_info_1131_9730_1131_0000,
 	NULL
 };
-#define pci_ss_list_1131_9730 NULL
 #endif
 #define pci_ss_list_1133_7901 NULL
 #define pci_ss_list_1133_7902 NULL
@@ -47327,6 +54333,7 @@
 };
 #define pci_ss_list_1133_e01e NULL
 #define pci_ss_list_1133_e020 NULL
+#define pci_ss_list_1133_e022 NULL
 static const pciSubsystemInfo *pci_ss_list_1133_e024[] = {
 	&pci_ss_info_1133_e024_1133_2400,
 	&pci_ss_info_1133_e024_1133_e024,
@@ -47463,6 +54470,7 @@
 #define pci_ss_list_114f_000d NULL
 #define pci_ss_list_114f_0011 NULL
 #define pci_ss_list_114f_0012 NULL
+#define pci_ss_list_114f_0013 NULL
 #define pci_ss_list_114f_0014 NULL
 #define pci_ss_list_114f_0015 NULL
 #define pci_ss_list_114f_0016 NULL
@@ -47587,12 +54595,20 @@
 #define pci_ss_list_1166_0017 NULL
 #define pci_ss_list_1166_0036 NULL
 #define pci_ss_list_1166_0101 NULL
+#define pci_ss_list_1166_0103 NULL
 #define pci_ss_list_1166_0104 NULL
 #define pci_ss_list_1166_0110 NULL
 #define pci_ss_list_1166_0130 NULL
-#define pci_ss_list_1166_0132 NULL
-#define pci_ss_list_1166_0200 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1166_0132[] = {
+	&pci_ss_info_1166_0132_1166_0132,
+	NULL
+};
+#define pci_ss_list_1166_0140 NULL
+#define pci_ss_list_1166_0141 NULL
+#define pci_ss_list_1166_0142 NULL
+#define pci_ss_list_1166_0144 NULL
+#define pci_ss_list_1166_0200 NULL
 static const pciSubsystemInfo *pci_ss_list_1166_0201[] = {
 	&pci_ss_info_1166_0201_4c53_1080,
 	NULL
@@ -47608,6 +54624,7 @@
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1166_0213[] = {
+	&pci_ss_info_1166_0213_1028_4134,
 	&pci_ss_info_1166_0213_1028_c134,
 	&pci_ss_info_1166_0213_1734_1012,
 	NULL
@@ -47640,6 +54657,7 @@
 #define pci_ss_list_1166_0241 NULL
 #define pci_ss_list_1166_0242 NULL
 #define pci_ss_list_1166_024a NULL
+#define pci_ss_list_1166_024b NULL
 #endif
 #define pci_ss_list_116a_6100 NULL
 #define pci_ss_list_116a_6800 NULL
@@ -47693,7 +54711,11 @@
 	&pci_ss_info_1180_0476_1043_1987,
 	&pci_ss_info_1180_0476_104d_80df,
 	&pci_ss_info_1180_0476_104d_80e7,
+	&pci_ss_info_1180_0476_104d_814e,
+	&pci_ss_info_1180_0476_10f7_8338,
+	&pci_ss_info_1180_0476_144d_c00c,
 	&pci_ss_info_1180_0476_14ef_0220,
+	&pci_ss_info_1180_0476_17aa_201c,
 	NULL
 };
 #define pci_ss_list_1180_0477 NULL
@@ -47714,6 +54736,8 @@
 static const pciSubsystemInfo *pci_ss_list_1180_0552[] = {
 	&pci_ss_info_1180_0552_1014_0511,
 	&pci_ss_info_1180_0552_1028_0188,
+	&pci_ss_info_1180_0552_144d_c00c,
+	&pci_ss_info_1180_0552_17aa_201e,
 	NULL
 };
 #define pci_ss_list_1180_0554 NULL
@@ -47721,16 +54745,22 @@
 #define pci_ss_list_1180_0576 NULL
 static const pciSubsystemInfo *pci_ss_list_1180_0592[] = {
 	&pci_ss_info_1180_0592_1043_1967,
+	&pci_ss_info_1180_0592_144d_c018,
 	NULL
 };
 #define pci_ss_list_1180_0811 NULL
 static const pciSubsystemInfo *pci_ss_list_1180_0822[] = {
 	&pci_ss_info_1180_0822_1014_0556,
+	&pci_ss_info_1180_0822_1014_0598,
 	&pci_ss_info_1180_0822_1028_0188,
 	&pci_ss_info_1180_0822_1028_01a2,
 	&pci_ss_info_1180_0822_1043_1967,
+	&pci_ss_info_1180_0822_10f7_8338,
+	&pci_ss_info_1180_0822_144d_c018,
+	&pci_ss_info_1180_0822_17aa_201d,
 	NULL
 };
+#define pci_ss_list_1180_0832 NULL
 #define pci_ss_list_1180_0841 NULL
 static const pciSubsystemInfo *pci_ss_list_1180_0852[] = {
 	&pci_ss_info_1180_0852_1043_1967,
@@ -47754,6 +54784,7 @@
 	NULL
 };
 #define pci_ss_list_1186_1340 NULL
+#define pci_ss_list_1186_1405 NULL
 #define pci_ss_list_1186_1541 NULL
 #define pci_ss_list_1186_1561 NULL
 #define pci_ss_list_1186_2027 NULL
@@ -47772,6 +54803,8 @@
 #define pci_ss_list_1186_3a63 NULL
 #define pci_ss_list_1186_4000 NULL
 #define pci_ss_list_1186_4300 NULL
+#define pci_ss_list_1186_4800 NULL
+#define pci_ss_list_1186_4b01 NULL
 static const pciSubsystemInfo *pci_ss_list_1186_4c00[] = {
 	&pci_ss_info_1186_4c00_1186_4c00,
 	NULL
@@ -47823,6 +54856,7 @@
 #define pci_ss_list_119e_0003 NULL
 #define pci_ss_list_11a9_4240 NULL
 #define pci_ss_list_11ab_0146 NULL
+#define pci_ss_list_11ab_11ab NULL
 #define pci_ss_list_11ab_138f NULL
 #define pci_ss_list_11ab_1fa6 NULL
 #define pci_ss_list_11ab_1fa7 NULL
@@ -47831,6 +54865,7 @@
 	&pci_ss_info_11ab_1faa_1385_4e00,
 	NULL
 };
+#define pci_ss_list_11ab_2a01 NULL
 static const pciSubsystemInfo *pci_ss_list_11ab_4320[] = {
 	&pci_ss_info_11ab_4320_1019_0f38,
 	&pci_ss_info_11ab_4320_1019_8001,
@@ -47841,6 +54876,7 @@
 	&pci_ss_info_11ab_4320_11ab_0121,
 	&pci_ss_info_11ab_4320_11ab_0321,
 	&pci_ss_info_11ab_4320_11ab_1021,
+	&pci_ss_info_11ab_4320_11ab_4320,
 	&pci_ss_info_11ab_4320_11ab_5021,
 	&pci_ss_info_11ab_4320_11ab_9521,
 	&pci_ss_info_11ab_4320_1458_e000,
@@ -47858,7 +54894,10 @@
 #define pci_ss_list_11ab_4344 NULL
 #define pci_ss_list_11ab_4345 NULL
 #define pci_ss_list_11ab_4346 NULL
-#define pci_ss_list_11ab_4347 NULL
+static const pciSubsystemInfo *pci_ss_list_11ab_4347[] = {
+	&pci_ss_info_11ab_4347_4c53_10d0,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_11ab_4350[] = {
 	&pci_ss_info_11ab_4350_1179_0001,
 	&pci_ss_info_11ab_4350_11ab_3521,
@@ -47961,6 +55000,7 @@
 	NULL
 };
 #define pci_ss_list_11ab_4363 NULL
+#define pci_ss_list_11ab_4364 NULL
 #define pci_ss_list_11ab_4611 NULL
 #define pci_ss_list_11ab_4620 NULL
 #define pci_ss_list_11ab_4801 NULL
@@ -47971,8 +55011,15 @@
 #define pci_ss_list_11ab_5081 NULL
 #define pci_ss_list_11ab_6041 NULL
 #define pci_ss_list_11ab_6081 NULL
+#define pci_ss_list_11ab_6101 NULL
+#define pci_ss_list_11ab_6141 NULL
+#define pci_ss_list_11ab_6450 NULL
 #define pci_ss_list_11ab_6460 NULL
-#define pci_ss_list_11ab_6480 NULL
+static const pciSubsystemInfo *pci_ss_list_11ab_6480[] = {
+	&pci_ss_info_11ab_6480_1775_c200,
+	NULL
+};
+#define pci_ss_list_11ab_6485 NULL
 #define pci_ss_list_11ab_f003 NULL
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -47999,7 +55046,21 @@
 #define pci_ss_list_11b9_c0ed NULL
 #define pci_ss_list_11bc_0001 NULL
 #define pci_ss_list_11bd_002e NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_11bd_0040[] = {
+	&pci_ss_info_11bd_0040_11bd_0044,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_11bd_0041[] = {
+	&pci_ss_info_11bd_0041_11bd_0044,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_11bd_0042[] = {
+	&pci_ss_info_11bd_0042_11bd_0044,
+	NULL
+};
 #define pci_ss_list_11bd_bede NULL
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_11c1_0440[] = {
 	&pci_ss_info_11c1_0440_1033_8015,
@@ -48121,6 +55182,8 @@
 #define pci_ss_list_11c1_0480 NULL
 #define pci_ss_list_11c1_048c NULL
 #define pci_ss_list_11c1_048f NULL
+#define pci_ss_list_11c1_1040 NULL
+#define pci_ss_list_11c1_2600 NULL
 #define pci_ss_list_11c1_5801 NULL
 #define pci_ss_list_11c1_5802 NULL
 #define pci_ss_list_11c1_5803 NULL
@@ -48148,6 +55211,7 @@
 	NULL
 };
 #define pci_ss_list_11c1_ed00 NULL
+#define pci_ss_list_11c1_ed01 NULL
 #endif
 #define pci_ss_list_11c8_0658 NULL
 #define pci_ss_list_11c8_d665 NULL
@@ -48164,9 +55228,13 @@
 #define pci_ss_list_11cb_8000 NULL
 #endif
 #define pci_ss_list_11d1_01f7 NULL
+#define pci_ss_list_11d4_0078 NULL
 #define pci_ss_list_11d4_1535 NULL
 #define pci_ss_list_11d4_1805 NULL
 #define pci_ss_list_11d4_1889 NULL
+#define pci_ss_list_11d4_1981 NULL
+#define pci_ss_list_11d4_1983 NULL
+#define pci_ss_list_11d4_1986 NULL
 #define pci_ss_list_11d4_5340 NULL
 #define pci_ss_list_11d5_0115 NULL
 #define pci_ss_list_11d5_0117 NULL
@@ -48261,6 +55329,7 @@
 #define pci_ss_list_120e_0321 NULL
 #define pci_ss_list_120e_0400 NULL
 #define pci_ss_list_120f_0001 NULL
+#define pci_ss_list_1217_00f7 NULL
 #define pci_ss_list_1217_6729 NULL
 #define pci_ss_list_1217_673a NULL
 #define pci_ss_list_1217_6832 NULL
@@ -48280,18 +55349,23 @@
 static const pciSubsystemInfo *pci_ss_list_1217_7110[] = {
 	&pci_ss_info_1217_7110_103c_088c,
 	&pci_ss_info_1217_7110_103c_0890,
+	&pci_ss_info_1217_7110_1734_106c,
 	NULL
 };
 #define pci_ss_list_1217_7112 NULL
 #define pci_ss_list_1217_7113 NULL
 #define pci_ss_list_1217_7114 NULL
+#define pci_ss_list_1217_7120 NULL
+#define pci_ss_list_1217_7130 NULL
 #define pci_ss_list_1217_7134 NULL
+#define pci_ss_list_1217_7135 NULL
 #define pci_ss_list_1217_71e2 NULL
 #define pci_ss_list_1217_7212 NULL
 #define pci_ss_list_1217_7213 NULL
 static const pciSubsystemInfo *pci_ss_list_1217_7223[] = {
 	&pci_ss_info_1217_7223_103c_088c,
 	&pci_ss_info_1217_7223_103c_0890,
+	&pci_ss_info_1217_7223_10cf_11c4,
 	NULL
 };
 #define pci_ss_list_1217_7233 NULL
@@ -48345,6 +55419,7 @@
 	NULL
 };
 #define pci_ss_list_121a_0057 NULL
+#define pci_ss_list_121e_0201 NULL
 #define pci_ss_list_1220_1220 NULL
 #define pci_ss_list_1223_0003 NULL
 #define pci_ss_list_1223_0004 NULL
@@ -48435,6 +55510,7 @@
 #define pci_ss_list_1256_5201 NULL
 #define pci_ss_list_1259_2560 NULL
 #define pci_ss_list_1259_a117 NULL
+#define pci_ss_list_1259_a11e NULL
 #define pci_ss_list_1259_a120 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_125b_1400[] = {
@@ -48494,6 +55570,7 @@
 	&pci_ss_info_125d_2898_125d_0428,
 	&pci_ss_info_125d_2898_125d_0429,
 	&pci_ss_info_125d_2898_147a_c001,
+	&pci_ss_info_125d_2898_148d_1030,
 	&pci_ss_info_125d_2898_14fe_0428,
 	&pci_ss_info_125d_2898_14fe_0429,
 	NULL
@@ -48523,10 +55600,12 @@
 	&pci_ss_info_1260_3890_10b8_2835,
 	&pci_ss_info_1260_3890_10b8_a835,
 	&pci_ss_info_1260_3890_1113_4203,
+	&pci_ss_info_1260_3890_1113_8201,
 	&pci_ss_info_1260_3890_1113_ee03,
 	&pci_ss_info_1260_3890_1113_ee08,
 	&pci_ss_info_1260_3890_1186_3202,
 	&pci_ss_info_1260_3890_1259_c104,
+	&pci_ss_info_1260_3890_1260_0000,
 	&pci_ss_info_1260_3890_1385_4800,
 	&pci_ss_info_1260_3890_16a5_1605,
 	&pci_ss_info_1260_3890_17cf_0014,
@@ -48821,10 +55900,15 @@
 #define pci_ss_list_128e_000a NULL
 #define pci_ss_list_128e_000b NULL
 #define pci_ss_list_128e_000c NULL
+#define pci_ss_list_1292_fc02 NULL
 #define pci_ss_list_129a_0615 NULL
 #define pci_ss_list_12a3_8105 NULL
+#define pci_ss_list_12ab_0000 NULL
 #define pci_ss_list_12ab_0002 NULL
+#define pci_ss_list_12ab_2300 NULL
 #define pci_ss_list_12ab_3000 NULL
+#define pci_ss_list_12ab_fff3 NULL
+#define pci_ss_list_12ab_ffff NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_12ae_0001[] = {
 	&pci_ss_info_12ae_0001_1014_0104,
@@ -48854,6 +55938,7 @@
 };
 static const pciSubsystemInfo *pci_ss_list_12b9_1007[] = {
 	&pci_ss_info_12b9_1007_12b9_00a3,
+	&pci_ss_info_12b9_1007_12b9_00c4,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_12b9_1008[] = {
@@ -48939,10 +56024,17 @@
 #define pci_ss_list_12d4_0200 NULL
 #define pci_ss_list_12d5_0003 NULL
 #define pci_ss_list_12d5_1000 NULL
+#define pci_ss_list_12d8_01a7 NULL
 #define pci_ss_list_12d8_8150 NULL
 #define pci_ss_list_12d9_0002 NULL
 #define pci_ss_list_12d9_0004 NULL
 #define pci_ss_list_12d9_0005 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_12d9_1078[] = {
+	&pci_ss_info_12d9_1078_12d9_000d,
+	NULL
+};
+#endif
 #define pci_ss_list_12de_0200 NULL
 #define pci_ss_list_12e0_0010 NULL
 #define pci_ss_list_12e0_0020 NULL
@@ -49051,11 +56143,14 @@
 };
 #endif
 #define pci_ss_list_1317_0981 NULL
-#define pci_ss_list_1317_0985 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1317_0985[] = {
+	&pci_ss_info_1317_0985_1734_100c,
+	NULL
+};
 #define pci_ss_list_1317_1985 NULL
 #define pci_ss_list_1317_2850 NULL
 #define pci_ss_list_1317_5120 NULL
-#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1317_8201[] = {
 	&pci_ss_info_1317_8201_10b8_2635,
 	&pci_ss_info_1317_8201_1317_8201,
@@ -49172,15 +56267,23 @@
 #define pci_ss_list_135e_7401 NULL
 #define pci_ss_list_135e_7402 NULL
 #define pci_ss_list_135e_7801 NULL
+#define pci_ss_list_135e_7804 NULL
 #define pci_ss_list_135e_8001 NULL
 #define pci_ss_list_1360_0101 NULL
 #define pci_ss_list_1360_0102 NULL
 #define pci_ss_list_1360_0103 NULL
+#define pci_ss_list_1360_0104 NULL
 #define pci_ss_list_1360_0201 NULL
 #define pci_ss_list_1360_0202 NULL
 #define pci_ss_list_1360_0203 NULL
+#define pci_ss_list_1360_0204 NULL
 #define pci_ss_list_1360_0301 NULL
 #define pci_ss_list_1360_0302 NULL
+#define pci_ss_list_1360_0303 NULL
+#define pci_ss_list_136a_0004 NULL
+#define pci_ss_list_136a_0007 NULL
+#define pci_ss_list_136a_0008 NULL
+#define pci_ss_list_136a_000a NULL
 #define pci_ss_list_136b_ff01 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1371_434e[] = {
@@ -49209,9 +56312,12 @@
 #define pci_ss_list_1374_0038 NULL
 #define pci_ss_list_1374_0039 NULL
 #define pci_ss_list_1374_003a NULL
+#define pci_ss_list_1374_003b NULL
+#define pci_ss_list_1374_003c NULL
 #define pci_ss_list_137a_0001 NULL
 #define pci_ss_list_1382_0001 NULL
 #define pci_ss_list_1382_2008 NULL
+#define pci_ss_list_1382_2048 NULL
 #define pci_ss_list_1382_2088 NULL
 #define pci_ss_list_1382_20c8 NULL
 #define pci_ss_list_1382_4008 NULL
@@ -49221,9 +56327,11 @@
 #define pci_ss_list_1382_4248 NULL
 #define pci_ss_list_1382_4424 NULL
 #define pci_ss_list_1385_0013 NULL
+#define pci_ss_list_1385_006b NULL
 #define pci_ss_list_1385_311a NULL
 #define pci_ss_list_1385_4100 NULL
 #define pci_ss_list_1385_4105 NULL
+#define pci_ss_list_1385_4251 NULL
 #define pci_ss_list_1385_4400 NULL
 #define pci_ss_list_1385_4600 NULL
 #define pci_ss_list_1385_4601 NULL
@@ -49242,11 +56350,16 @@
 #define pci_ss_list_1385_630a NULL
 #define pci_ss_list_1385_6b00 NULL
 #define pci_ss_list_1385_6d00 NULL
+#define pci_ss_list_1385_7b00 NULL
+#define pci_ss_list_1385_7c00 NULL
+#define pci_ss_list_1385_7d00 NULL
+#define pci_ss_list_1385_7e00 NULL
 #define pci_ss_list_1385_f004 NULL
 #define pci_ss_list_1389_0001 NULL
 #define pci_ss_list_1393_1040 NULL
 #define pci_ss_list_1393_1141 NULL
 #define pci_ss_list_1393_1680 NULL
+#define pci_ss_list_1393_1681 NULL
 #define pci_ss_list_1393_2040 NULL
 #define pci_ss_list_1393_2180 NULL
 #define pci_ss_list_1393_3200 NULL
@@ -49256,9 +56369,13 @@
 	NULL
 };
 #endif
-#define pci_ss_list_1397_08b4 NULL
-#define pci_ss_list_1397_16b8 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1397_08b4[] = {
+	&pci_ss_info_1397_08b4_1397_b520,
+	&pci_ss_info_1397_08b4_1397_b540,
+	NULL
+};
+#define pci_ss_list_1397_16b8 NULL
 static const pciSubsystemInfo *pci_ss_list_1397_2bd0[] = {
 	&pci_ss_info_1397_2bd0_0675_1704,
 	&pci_ss_info_1397_2bd0_0675_1708,
@@ -49266,6 +56383,8 @@
 	&pci_ss_info_1397_2bd0_e4bf_1000,
 	NULL
 };
+#define pci_ss_list_1397_30b1 NULL
+#define pci_ss_list_1397_f001 NULL
 #endif
 #define pci_ss_list_139a_0001 NULL
 #define pci_ss_list_139a_0003 NULL
@@ -49296,7 +56415,9 @@
 };
 #define pci_ss_list_13c1_1002 NULL
 #define pci_ss_list_13c1_1003 NULL
+#define pci_ss_list_13c1_1004 NULL
 #endif
+#define pci_ss_list_13c2_000e NULL
 #define pci_ss_list_13c6_0520 NULL
 #define pci_ss_list_13c6_0620 NULL
 #define pci_ss_list_13c6_0820 NULL
@@ -49312,6 +56433,7 @@
 	NULL
 };
 #endif
+#define pci_ss_list_13ec_000a NULL
 #define pci_ss_list_13f0_0200 NULL
 #define pci_ss_list_13f0_0201 NULL
 #define pci_ss_list_13f0_1023 NULL
@@ -49336,13 +56458,27 @@
 	NULL
 };
 #define pci_ss_list_13f6_0211 NULL
+#define pci_ss_list_13f6_9880 NULL
 #endif
 #define pci_ss_list_13fe_1240 NULL
-#define pci_ss_list_13fe_1600 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_13fe_1600[] = {
+	&pci_ss_info_13fe_1600_1601_0002,
+	&pci_ss_info_13fe_1600_1602_0002,
+	&pci_ss_info_13fe_1600_1612_0004,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_13fe_16ff[] = {
+	&pci_ss_info_13fe_16ff_1601_0000,
+	&pci_ss_info_13fe_16ff_1602_0000,
+	&pci_ss_info_13fe_16ff_1612_0000,
+	NULL
+};
 #define pci_ss_list_13fe_1733 NULL
 #define pci_ss_list_13fe_1752 NULL
 #define pci_ss_list_13fe_1754 NULL
 #define pci_ss_list_13fe_1756 NULL
+#endif
 #define pci_ss_list_1400_1401 NULL
 #define pci_ss_list_1407_0100 NULL
 #define pci_ss_list_1407_0101 NULL
@@ -49399,12 +56535,18 @@
 	&pci_ss_info_1412_1724_153b_1153,
 	&pci_ss_info_1412_1724_270f_f641,
 	&pci_ss_info_1412_1724_270f_f645,
+	&pci_ss_info_1412_1724_3136_4154,
 	NULL
 };
 #endif
 #define pci_ss_list_1415_8403 NULL
+#define pci_ss_list_1415_9500 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1415_9501[] = {
+	&pci_ss_info_1415_9501_12c4_0201,
+	&pci_ss_info_1415_9501_12c4_0202,
+	&pci_ss_info_1415_9501_12c4_0203,
+	&pci_ss_info_1415_9501_12c4_0210,
 	&pci_ss_info_1415_9501_131f_2050,
 	&pci_ss_info_1415_9501_131f_2051,
 	&pci_ss_info_1415_9501_15ed_2000,
@@ -49413,21 +56555,35 @@
 };
 #define pci_ss_list_1415_950a NULL
 #define pci_ss_list_1415_950b NULL
-#define pci_ss_list_1415_9510 NULL
+static const pciSubsystemInfo *pci_ss_list_1415_9510[] = {
+	&pci_ss_info_1415_9510_12c4_0200,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_1415_9511[] = {
+	&pci_ss_info_1415_9511_12c4_0211,
 	&pci_ss_info_1415_9511_15ed_2000,
 	&pci_ss_info_1415_9511_15ed_2001,
 	NULL
 };
+#define pci_ss_list_1415_9512 NULL
+#define pci_ss_list_1415_9513 NULL
 #define pci_ss_list_1415_9521 NULL
 #define pci_ss_list_1415_9523 NULL
 #endif
 #define pci_ss_list_1420_8002 NULL
 #define pci_ss_list_1420_8003 NULL
 #define pci_ss_list_1425_000b NULL
+#define pci_ss_list_1425_000c NULL
 #define pci_ss_list_142e_4020 NULL
 #define pci_ss_list_142e_4337 NULL
 #define pci_ss_list_1432_9130 NULL
+#define pci_ss_list_1435_4520 NULL
+#define pci_ss_list_1435_6020 NULL
+#define pci_ss_list_1435_6030 NULL
+#define pci_ss_list_1435_6420 NULL
+#define pci_ss_list_1435_6430 NULL
+#define pci_ss_list_1435_7520 NULL
+#define pci_ss_list_1435_7820 NULL
 #define pci_ss_list_144a_7296 NULL
 #define pci_ss_list_144a_7432 NULL
 #define pci_ss_list_144a_7433 NULL
@@ -49439,24 +56595,35 @@
 #define pci_ss_list_144a_9111 NULL
 #define pci_ss_list_144a_9113 NULL
 #define pci_ss_list_144a_9114 NULL
+#define pci_ss_list_144d_c00c NULL
 #define pci_ss_list_1458_0c11 NULL
+#define pci_ss_list_1458_9001 NULL
 #define pci_ss_list_1458_e911 NULL
 #define pci_ss_list_145f_0001 NULL
+#define pci_ss_list_1461_a3ce NULL
+#define pci_ss_list_1461_a3cf NULL
+#define pci_ss_list_1461_a836 NULL
 #define pci_ss_list_1461_f436 NULL
 #define pci_ss_list_1462_5501 NULL
 #define pci_ss_list_1462_6819 NULL
 #define pci_ss_list_1462_6825 NULL
 #define pci_ss_list_1462_6834 NULL
+#define pci_ss_list_1462_7125 NULL
+#define pci_ss_list_1462_7235 NULL
 #define pci_ss_list_1462_8725 NULL
 #define pci_ss_list_1462_9000 NULL
 #define pci_ss_list_1462_9110 NULL
 #define pci_ss_list_1462_9119 NULL
+#define pci_ss_list_1462_9123 NULL
+#define pci_ss_list_1462_9510 NULL
+#define pci_ss_list_1462_9511 NULL
 #define pci_ss_list_1462_9591 NULL
 #define pci_ss_list_146c_1430 NULL
 #define pci_ss_list_148d_1003 NULL
 #define pci_ss_list_1497_1497 NULL
 #define pci_ss_list_1498_0330 NULL
 #define pci_ss_list_1498_0385 NULL
+#define pci_ss_list_1498_21cc NULL
 #define pci_ss_list_1498_21cd NULL
 #define pci_ss_list_1498_30c8 NULL
 #define pci_ss_list_149d_0001 NULL
@@ -49479,7 +56646,15 @@
 #define pci_ss_list_14b9_a504 NULL
 #define pci_ss_list_14b9_a505 NULL
 #define pci_ss_list_14b9_a506 NULL
-#define pci_ss_list_14c1_8043 NULL
+#define pci_ss_list_14bc_d002 NULL
+#define pci_ss_list_14bc_d00f NULL
+#define pci_ss_list_14c1_0008 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_14c1_8043[] = {
+	&pci_ss_info_14c1_8043_103c_1240,
+	NULL
+};
+#endif
 #define pci_ss_list_14d2_8001 NULL
 #define pci_ss_list_14d2_8002 NULL
 #define pci_ss_list_14d2_8010 NULL
@@ -49520,9 +56695,14 @@
 #define pci_ss_list_14e4_080f NULL
 #define pci_ss_list_14e4_0811 NULL
 #define pci_ss_list_14e4_0816 NULL
-#define pci_ss_list_14e4_1600 NULL
-#define pci_ss_list_14e4_1601 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_14e4_1600[] = {
+	&pci_ss_info_14e4_1600_103c_3015,
+	&pci_ss_info_14e4_1600_107b_5048,
+	NULL
+};
+#define pci_ss_list_14e4_1601 NULL
+#define pci_ss_list_14e4_1639 NULL
 static const pciSubsystemInfo *pci_ss_list_14e4_1644[] = {
 	&pci_ss_info_14e4_1644_1014_0277,
 	&pci_ss_info_14e4_1644_1028_00d1,
@@ -49592,6 +56772,10 @@
 	&pci_ss_info_14e4_1648_0e11_00cf,
 	&pci_ss_info_14e4_1648_0e11_00d0,
 	&pci_ss_info_14e4_1648_0e11_00d1,
+	&pci_ss_info_14e4_1648_10a9_8013,
+	&pci_ss_info_14e4_1648_10a9_8018,
+	&pci_ss_info_14e4_1648_10a9_801a,
+	&pci_ss_info_14e4_1648_10a9_801b,
 	&pci_ss_info_14e4_1648_10b7_2000,
 	&pci_ss_info_14e4_1648_10b7_3000,
 	&pci_ss_info_14e4_1648_1166_1648,
@@ -49599,10 +56783,15 @@
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_14e4_164a[] = {
+	&pci_ss_info_14e4_164a_103c_3070,
 	&pci_ss_info_14e4_164a_103c_3101,
 	NULL
 };
-#define pci_ss_list_14e4_164c NULL
+static const pciSubsystemInfo *pci_ss_list_14e4_164c[] = {
+	&pci_ss_info_14e4_164c_103c_7037,
+	&pci_ss_info_14e4_164c_103c_7038,
+	NULL
+};
 #define pci_ss_list_14e4_164d NULL
 static const pciSubsystemInfo *pci_ss_list_14e4_1653[] = {
 	&pci_ss_info_14e4_1653_0e11_00e3,
@@ -49621,6 +56810,11 @@
 	&pci_ss_info_14e4_1659_1734_1061,
 	NULL
 };
+static const pciSubsystemInfo *pci_ss_list_14e4_165a[] = {
+	&pci_ss_info_14e4_165a_103c_7051,
+	&pci_ss_info_14e4_165a_103c_7052,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_14e4_165d[] = {
 	&pci_ss_info_14e4_165d_1028_865d,
 	NULL
@@ -49629,32 +56823,55 @@
 	&pci_ss_info_14e4_165e_103c_088c,
 	&pci_ss_info_14e4_165e_103c_0890,
 	&pci_ss_info_14e4_165e_103c_099c,
+	&pci_ss_info_14e4_165e_10cf_1279,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_14e4_1668[] = {
 	&pci_ss_info_14e4_1668_103c_7039,
 	NULL
 };
+#define pci_ss_list_14e4_1669 NULL
 #define pci_ss_list_14e4_166a NULL
 #define pci_ss_list_14e4_166b NULL
 #define pci_ss_list_14e4_166e NULL
+#define pci_ss_list_14e4_1672 NULL
+#define pci_ss_list_14e4_1673 NULL
+#define pci_ss_list_14e4_1674 NULL
 static const pciSubsystemInfo *pci_ss_list_14e4_1677[] = {
 	&pci_ss_info_14e4_1677_1028_0179,
 	&pci_ss_info_14e4_1677_1028_0182,
+	&pci_ss_info_14e4_1677_1028_0187,
 	&pci_ss_info_14e4_1677_1028_01ad,
+	&pci_ss_info_14e4_1677_103c_3006,
 	&pci_ss_info_14e4_1677_1734_105d,
 	NULL
 };
 #define pci_ss_list_14e4_1678 NULL
-#define pci_ss_list_14e4_167d NULL
+static const pciSubsystemInfo *pci_ss_list_14e4_1679[] = {
+	&pci_ss_info_14e4_1679_103c_1707,
+	&pci_ss_info_14e4_1679_103c_170c,
+	&pci_ss_info_14e4_1679_103c_703c,
+	NULL
+};
+#define pci_ss_list_14e4_167a NULL
+#define pci_ss_list_14e4_167b NULL
+static const pciSubsystemInfo *pci_ss_list_14e4_167d[] = {
+	&pci_ss_info_14e4_167d_17aa_2081,
+	NULL
+};
 #define pci_ss_list_14e4_167e NULL
+#define pci_ss_list_14e4_167f NULL
+#define pci_ss_list_14e4_1693 NULL
 static const pciSubsystemInfo *pci_ss_list_14e4_1696[] = {
 	&pci_ss_info_14e4_1696_103c_12bc,
 	&pci_ss_info_14e4_1696_14e4_000d,
 	NULL
 };
+#define pci_ss_list_14e4_169a NULL
+#define pci_ss_list_14e4_169b NULL
 static const pciSubsystemInfo *pci_ss_list_14e4_169c[] = {
 	&pci_ss_info_14e4_169c_103c_308b,
+	&pci_ss_info_14e4_169c_103c_30a1,
 	NULL
 };
 #define pci_ss_list_14e4_169d NULL
@@ -49675,6 +56892,8 @@
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_14e4_16a8[] = {
+	&pci_ss_info_14e4_16a8_10a9_8014,
+	&pci_ss_info_14e4_16a8_10a9_801c,
 	&pci_ss_info_14e4_16a8_10b7_2001,
 	NULL
 };
@@ -49682,7 +56901,13 @@
 	&pci_ss_info_14e4_16aa_103c_3102,
 	NULL
 };
-#define pci_ss_list_14e4_16ac NULL
+static const pciSubsystemInfo *pci_ss_list_14e4_16ac[] = {
+	&pci_ss_info_14e4_16ac_103c_1706,
+	&pci_ss_info_14e4_16ac_103c_7038,
+	&pci_ss_info_14e4_16ac_103c_703b,
+	&pci_ss_info_14e4_16ac_103c_703d,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_14e4_16c6[] = {
 	&pci_ss_info_14e4_16c6_10b7_1100,
 	&pci_ss_info_14e4_16c6_14e4_000c,
@@ -49705,6 +56930,7 @@
 static const pciSubsystemInfo *pci_ss_list_14e4_170c[] = {
 	&pci_ss_info_14e4_170c_1028_0188,
 	&pci_ss_info_14e4_170c_1028_0196,
+	&pci_ss_info_14e4_170c_1028_01af,
 	&pci_ss_info_14e4_170c_103c_099c,
 	NULL
 };
@@ -49713,6 +56939,8 @@
 	NULL
 };
 #define pci_ss_list_14e4_170e NULL
+#define pci_ss_list_14e4_1712 NULL
+#define pci_ss_list_14e4_1713 NULL
 #define pci_ss_list_14e4_3352 NULL
 #define pci_ss_list_14e4_3360 NULL
 #define pci_ss_list_14e4_4210 NULL
@@ -49727,16 +56955,19 @@
 #define pci_ss_list_14e4_4306 NULL
 #define pci_ss_list_14e4_4307 NULL
 #define pci_ss_list_14e4_4310 NULL
+#define pci_ss_list_14e4_4311 NULL
 #define pci_ss_list_14e4_4312 NULL
 #define pci_ss_list_14e4_4313 NULL
 #define pci_ss_list_14e4_4315 NULL
 static const pciSubsystemInfo *pci_ss_list_14e4_4318[] = {
 	&pci_ss_info_14e4_4318_103c_1356,
+	&pci_ss_info_14e4_4318_1043_120f,
 	&pci_ss_info_14e4_4318_1468_0311,
 	&pci_ss_info_14e4_4318_1468_0312,
 	&pci_ss_info_14e4_4318_14e4_0449,
 	&pci_ss_info_14e4_4318_14e4_4318,
 	&pci_ss_info_14e4_4318_16ec_0119,
+	&pci_ss_info_14e4_4318_1737_0048,
 	NULL
 };
 #define pci_ss_list_14e4_4319 NULL
@@ -49748,11 +56979,14 @@
 	&pci_ss_info_14e4_4320_1043_100f,
 	&pci_ss_info_14e4_4320_1057_7025,
 	&pci_ss_info_14e4_4320_106b_004e,
+	&pci_ss_info_14e4_4320_1154_0330,
 	&pci_ss_info_14e4_4320_144f_7050,
+	&pci_ss_info_14e4_4320_144f_7051,
 	&pci_ss_info_14e4_4320_14e4_4320,
 	&pci_ss_info_14e4_4320_1737_4320,
 	&pci_ss_info_14e4_4320_1799_7001,
 	&pci_ss_info_14e4_4320_1799_7010,
+	&pci_ss_info_14e4_4320_1799_7011,
 	&pci_ss_info_14e4_4320_185f_1220,
 	NULL
 };
@@ -49769,7 +57003,10 @@
 	NULL
 };
 #define pci_ss_list_14e4_4326 NULL
+#define pci_ss_list_14e4_4329 NULL
+#define pci_ss_list_14e4_4344 NULL
 static const pciSubsystemInfo *pci_ss_list_14e4_4401[] = {
+	&pci_ss_info_14e4_4401_103c_08b0,
 	&pci_ss_info_14e4_4401_1043_80a8,
 	NULL
 };
@@ -49813,6 +57050,8 @@
 #define pci_ss_list_14e4_5690 NULL
 #define pci_ss_list_14e4_5691 NULL
 #define pci_ss_list_14e4_5692 NULL
+#define pci_ss_list_14e4_5695 NULL
+#define pci_ss_list_14e4_5698 NULL
 #define pci_ss_list_14e4_5820 NULL
 #define pci_ss_list_14e4_5821 NULL
 #define pci_ss_list_14e4_5822 NULL
@@ -49887,6 +57126,7 @@
 	NULL
 };
 #define pci_ss_list_14f1_1085 NULL
+#define pci_ss_list_14f1_10b6 NULL
 #define pci_ss_list_14f1_1433 NULL
 #define pci_ss_list_14f1_1434 NULL
 #define pci_ss_list_14f1_1435 NULL
@@ -49983,6 +57223,10 @@
 #define pci_ss_list_14f1_2464 NULL
 #define pci_ss_list_14f1_2465 NULL
 #define pci_ss_list_14f1_2466 NULL
+static const pciSubsystemInfo *pci_ss_list_14f1_2bfa[] = {
+	&pci_ss_info_14f1_2bfa_1025_0009,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_14f1_2f00[] = {
 	&pci_ss_info_14f1_2f00_13e0_8d84,
 	&pci_ss_info_14f1_2f00_13e0_8d85,
@@ -49992,6 +57236,9 @@
 #define pci_ss_list_14f1_2f02 NULL
 #define pci_ss_list_14f1_2f11 NULL
 #define pci_ss_list_14f1_2f20 NULL
+#define pci_ss_list_14f1_2f30 NULL
+#define pci_ss_list_14f1_5045 NULL
+#define pci_ss_list_14f1_5047 NULL
 #define pci_ss_list_14f1_8234 NULL
 static const pciSubsystemInfo *pci_ss_list_14f1_8800[] = {
 	&pci_ss_info_14f1_8800_0070_2801,
@@ -50081,6 +57328,7 @@
 #define pci_ss_list_14f8_2077 NULL
 #define pci_ss_list_14fc_0000 NULL
 #define pci_ss_list_14fc_0001 NULL
+#define pci_ss_list_14fc_0002 NULL
 #define pci_ss_list_1500_1360 NULL
 #define pci_ss_list_1507_0001 NULL
 #define pci_ss_list_1507_0002 NULL
@@ -50136,10 +57384,12 @@
 #define pci_ss_list_1524_0520 NULL
 #define pci_ss_list_1524_0530 NULL
 #define pci_ss_list_1524_0550 NULL
+#define pci_ss_list_1524_0551 NULL
 #define pci_ss_list_1524_0610 NULL
 #define pci_ss_list_1524_1211 NULL
 #define pci_ss_list_1524_1225 NULL
 static const pciSubsystemInfo *pci_ss_list_1524_1410[] = {
+	&pci_ss_info_1524_1410_1025_003c,
 	&pci_ss_info_1524_1410_1025_005a,
 	NULL
 };
@@ -50158,6 +57408,7 @@
 #define pci_ss_list_153b_1147 NULL
 #define pci_ss_list_153b_1158 NULL
 #define pci_ss_list_153f_0001 NULL
+#define pci_ss_list_1542_9260 NULL
 #define pci_ss_list_1543_3052 NULL
 #define pci_ss_list_1543_4c22 NULL
 #define pci_ss_list_1571_a001 NULL
@@ -50202,6 +57453,10 @@
 #define pci_ss_list_15b3_6278 NULL
 #define pci_ss_list_15b3_6279 NULL
 #define pci_ss_list_15b3_6282 NULL
+#define pci_ss_list_15b8_1003 NULL
+#define pci_ss_list_15b8_1005 NULL
+#define pci_ss_list_15b8_100a NULL
+#define pci_ss_list_15b8_3001 NULL
 #define pci_ss_list_15bc_1100 NULL
 #define pci_ss_list_15bc_2922 NULL
 #define pci_ss_list_15bc_2928 NULL
@@ -50209,6 +57464,7 @@
 #define pci_ss_list_15c5_8010 NULL
 #define pci_ss_list_15c7_0349 NULL
 #define pci_ss_list_15dc_0001 NULL
+#define pci_ss_list_15e2_0500 NULL
 #define pci_ss_list_15e8_0130 NULL
 #define pci_ss_list_15e9_1841 NULL
 #define pci_ss_list_15ec_3101 NULL
@@ -50222,6 +57478,8 @@
 #define pci_ss_list_1619_2610 NULL
 #define pci_ss_list_1626_8410 NULL
 #define pci_ss_list_1629_1003 NULL
+#define pci_ss_list_1629_1006 NULL
+#define pci_ss_list_1629_1007 NULL
 #define pci_ss_list_1629_2002 NULL
 #define pci_ss_list_1637_3874 NULL
 #define pci_ss_list_1638_1100 NULL
@@ -50236,12 +57494,14 @@
 #define pci_ss_list_166d_0002 NULL
 #define pci_ss_list_1677_104e NULL
 #define pci_ss_list_1677_12d7 NULL
+#define pci_ss_list_1677_20ad NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_167b_2102[] = {
 	&pci_ss_info_167b_2102_187e_3406,
 	NULL
 };
 #endif
+#define pci_ss_list_167d_a000 NULL
 #define pci_ss_list_1681_0010 NULL
 #define pci_ss_list_1688_1170 NULL
 #define pci_ss_list_168c_0007 NULL
@@ -50258,53 +57518,87 @@
 	&pci_ss_info_168c_0013_1186_3a17,
 	&pci_ss_info_168c_0013_1186_3a18,
 	&pci_ss_info_168c_0013_1186_3a63,
+	&pci_ss_info_168c_0013_1186_3a93,
 	&pci_ss_info_168c_0013_1186_3a94,
+	&pci_ss_info_168c_0013_1186_3ab0,
 	&pci_ss_info_168c_0013_1385_4d00,
 	&pci_ss_info_168c_0013_1458_e911,
 	&pci_ss_info_168c_0013_14b7_0a60,
+	&pci_ss_info_168c_0013_1668_1026,
 	&pci_ss_info_168c_0013_168c_0013,
 	&pci_ss_info_168c_0013_168c_1025,
 	&pci_ss_info_168c_0013_168c_1027,
+	&pci_ss_info_168c_0013_168c_1042,
 	&pci_ss_info_168c_0013_168c_2026,
 	&pci_ss_info_168c_0013_168c_2041,
 	&pci_ss_info_168c_0013_168c_2042,
+	&pci_ss_info_168c_0013_168c_2051,
 	&pci_ss_info_168c_0013_16ab_7302,
+	&pci_ss_info_168c_0013_17cf_0042,
+	&pci_ss_info_168c_0013_185f_1012,
+	&pci_ss_info_168c_0013_185f_2012,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_168c_001a[] = {
+	&pci_ss_info_168c_001a_1052_168c,
+	&pci_ss_info_168c_001a_1113_ee20,
+	&pci_ss_info_168c_001a_1113_ee24,
 	&pci_ss_info_168c_001a_1186_3a15,
 	&pci_ss_info_168c_001a_1186_3a16,
 	&pci_ss_info_168c_001a_1186_3a23,
 	&pci_ss_info_168c_001a_1186_3a24,
+	&pci_ss_info_168c_001a_1186_3b08,
+	&pci_ss_info_168c_001a_168c_001a,
 	&pci_ss_info_168c_001a_168c_1052,
+	&pci_ss_info_168c_001a_168c_2052,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_168c_001b[] = {
 	&pci_ss_info_168c_001b_1186_3a19,
 	&pci_ss_info_168c_001b_1186_3a22,
+	&pci_ss_info_168c_001b_1458_e901,
+	&pci_ss_info_168c_001b_168c_001b,
+	&pci_ss_info_168c_001b_168c_2062,
+	&pci_ss_info_168c_001b_168c_2063,
+	&pci_ss_info_168c_001b_a727_6804,
 	NULL
 };
+#define pci_ss_list_168c_001c NULL
 #define pci_ss_list_168c_0020 NULL
-#define pci_ss_list_168c_1014 NULL
+#define pci_ss_list_168c_0023 NULL
+#define pci_ss_list_168c_0024 NULL
+static const pciSubsystemInfo *pci_ss_list_168c_1014[] = {
+	&pci_ss_info_168c_1014_1014_058a,
+	NULL
+};
+#define pci_ss_list_168c_3b08 NULL
 #endif
 #define pci_ss_list_169c_0044 NULL
+#define pci_ss_list_169d_3306 NULL
 #define pci_ss_list_16ab_1100 NULL
 #define pci_ss_list_16ab_1101 NULL
 #define pci_ss_list_16ab_1102 NULL
 #define pci_ss_list_16ab_8501 NULL
 #define pci_ss_list_16ae_1141 NULL
+#define pci_ss_list_16c6_8695 NULL
 #define pci_ss_list_16ca_0001 NULL
+#define pci_ss_list_16d5_4d4e NULL
 #define pci_ss_list_16e3_1e0f NULL
+#define pci_ss_list_16e5_6000 NULL
 #define pci_ss_list_16ec_00ff NULL
 #define pci_ss_list_16ec_0116 NULL
+#define pci_ss_list_16ec_2f00 NULL
 #define pci_ss_list_16ec_3685 NULL
 #define pci_ss_list_16ed_1001 NULL
 #define pci_ss_list_16f4_8000 NULL
 #define pci_ss_list_170b_0100 NULL
 #define pci_ss_list_1725_7174 NULL
 #define pci_ss_list_172a_13c8 NULL
+#define pci_ss_list_1734_1078 NULL
+#define pci_ss_list_1734_1085 NULL
 #define pci_ss_list_1737_0013 NULL
 #define pci_ss_list_1737_0015 NULL
+#define pci_ss_list_1737_0029 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1737_1032[] = {
 	&pci_ss_info_1737_1032_1737_0015,
@@ -50338,6 +57632,7 @@
 #define pci_ss_list_1799_6020 NULL
 #define pci_ss_list_1799_6060 NULL
 #define pci_ss_list_1799_7000 NULL
+#define pci_ss_list_1799_700a NULL
 #define pci_ss_list_1799_7010 NULL
 #define pci_ss_list_179c_0557 NULL
 #define pci_ss_list_179c_0566 NULL
@@ -50349,6 +57644,8 @@
 #define pci_ss_list_17a0_8034 NULL
 #define pci_ss_list_17b3_ab08 NULL
 #define pci_ss_list_17b4_0011 NULL
+#define pci_ss_list_17cb_0001 NULL
+#define pci_ss_list_17cb_0002 NULL
 #define pci_ss_list_17cc_2280 NULL
 #define pci_ss_list_17d3_1110 NULL
 #define pci_ss_list_17d3_1120 NULL
@@ -50361,10 +57658,28 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_17d5_5831[] = {
 	&pci_ss_info_17d5_5831_103c_12d5,
+	&pci_ss_info_17d5_5831_10a9_8020,
+	&pci_ss_info_17d5_5831_10a9_8024,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_17d5_5832[] = {
+	&pci_ss_info_17d5_5832_10a9_8021,
 	NULL
 };
-#define pci_ss_list_17d5_5832 NULL
 #endif
+#define pci_ss_list_17db_0101 NULL
+#define pci_ss_list_17db_0201 NULL
+#define pci_ss_list_17db_0202 NULL
+#define pci_ss_list_17e4_0001 NULL
+#define pci_ss_list_17e4_0002 NULL
+#define pci_ss_list_17e6_0010 NULL
+#define pci_ss_list_17e6_0011 NULL
+#define pci_ss_list_17e6_0021 NULL
+#define pci_ss_list_17f3_6020 NULL
+#define pci_ss_list_17f3_6030 NULL
+#define pci_ss_list_17f3_6040 NULL
+#define pci_ss_list_17f3_6060 NULL
+#define pci_ss_list_17f3_6061 NULL
 #define pci_ss_list_17fe_2120 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_17fe_2220[] = {
@@ -50404,7 +57719,16 @@
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_1814_0301[] = {
-	&pci_ss_info_1814_0301_2561_1814,
+	&pci_ss_info_1814_0301_1186_3c08,
+	&pci_ss_info_1814_0301_1186_3c09,
+	&pci_ss_info_1814_0301_1458_e934,
+	&pci_ss_info_1814_0301_1737_0055,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_1814_0302[] = {
+	&pci_ss_info_1814_0302_1186_3c08,
+	&pci_ss_info_1814_0302_1186_3c09,
+	&pci_ss_info_1814_0302_1462_b834,
 	NULL
 };
 #define pci_ss_list_1814_0401 NULL
@@ -50412,25 +57736,31 @@
 #define pci_ss_list_1822_4e35 NULL
 #define pci_ss_list_182d_3069 NULL
 #define pci_ss_list_182d_9790 NULL
+#define pci_ss_list_182e_0008 NULL
 #define pci_ss_list_183b_08a7 NULL
 #define pci_ss_list_183b_08a8 NULL
 #define pci_ss_list_183b_08a9 NULL
+#define pci_ss_list_183b_08b0 NULL
 #define pci_ss_list_1864_2110 NULL
 #define pci_ss_list_1867_5a44 NULL
 #define pci_ss_list_1867_5a45 NULL
 #define pci_ss_list_1867_5a46 NULL
 #define pci_ss_list_1867_6278 NULL
 #define pci_ss_list_1867_6282 NULL
+#define pci_ss_list_187e_3403 NULL
+#define pci_ss_list_187e_340e NULL
 #define pci_ss_list_1888_0301 NULL
 #define pci_ss_list_1888_0601 NULL
 #define pci_ss_list_1888_0710 NULL
 #define pci_ss_list_1888_0720 NULL
 #define pci_ss_list_18ac_d500 NULL
+#define pci_ss_list_18ac_d800 NULL
 #define pci_ss_list_18ac_d810 NULL
 #define pci_ss_list_18ac_d820 NULL
 #define pci_ss_list_18b8_b001 NULL
 #define pci_ss_list_18ca_0020 NULL
 #define pci_ss_list_18ca_0040 NULL
+#define pci_ss_list_18ca_0047 NULL
 #define pci_ss_list_18d2_3069 NULL
 #define pci_ss_list_18dd_4c6f NULL
 #define pci_ss_list_18e6_0001 NULL
@@ -50452,13 +57782,27 @@
 	NULL
 };
 #endif
+#define pci_ss_list_18f6_1000 NULL
+#define pci_ss_list_18f6_1050 NULL
+#define pci_ss_list_18f6_2000 NULL
 #define pci_ss_list_18f7_0001 NULL
 #define pci_ss_list_18f7_0002 NULL
 #define pci_ss_list_18f7_0004 NULL
 #define pci_ss_list_18f7_0005 NULL
 #define pci_ss_list_18f7_000a NULL
+#define pci_ss_list_1904_8139 NULL
+#define pci_ss_list_1923_0040 NULL
 #define pci_ss_list_1923_0100 NULL
+#define pci_ss_list_1923_0300 NULL
+#define pci_ss_list_1923_0400 NULL
+#define pci_ss_list_1931_000c NULL
 #define pci_ss_list_1942_e511 NULL
+#define pci_ss_list_194a_1111 NULL
+#define pci_ss_list_194a_1112 NULL
+#define pci_ss_list_194a_1113 NULL
+#define pci_ss_list_194a_1114 NULL
+#define pci_ss_list_194a_1115 NULL
+#define pci_ss_list_1957_0012 NULL
 #define pci_ss_list_1957_0080 NULL
 #define pci_ss_list_1957_0081 NULL
 #define pci_ss_list_1957_0082 NULL
@@ -50468,15 +57812,45 @@
 #define pci_ss_list_1957_0086 NULL
 #define pci_ss_list_1957_0087 NULL
 #define pci_ss_list_1966_1975 NULL
+#define pci_ss_list_1969_1048 NULL
 #define pci_ss_list_196a_0101 NULL
 #define pci_ss_list_196a_0102 NULL
+#define pci_ss_list_196a_0105 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1971_1011[] = {
+	&pci_ss_info_1971_1011_1043_0001,
+	NULL
+};
+#endif
 #define pci_ss_list_197b_2360 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_197b_2361[] = {
+	&pci_ss_info_197b_2361_1462_7235,
+	NULL
+};
 #define pci_ss_list_197b_2363 NULL
+#define pci_ss_list_197b_2365 NULL
+#define pci_ss_list_197b_2366 NULL
+#define pci_ss_list_197b_2368 NULL
+#endif
+#define pci_ss_list_1982_1600 NULL
+#define pci_ss_list_1982_16ff NULL
 #define pci_ss_list_1989_0001 NULL
 #define pci_ss_list_1989_8001 NULL
+#define pci_ss_list_19a2_0200 NULL
+#define pci_ss_list_19a2_0201 NULL
+#define pci_ss_list_19ac_0001 NULL
 #define pci_ss_list_19ae_0520 NULL
+#define pci_ss_list_19e7_1001 NULL
+#define pci_ss_list_19e7_1002 NULL
+#define pci_ss_list_19e7_1003 NULL
+#define pci_ss_list_19e7_1004 NULL
+#define pci_ss_list_19e7_1005 NULL
 #define pci_ss_list_1a03_2000 NULL
+#define pci_ss_list_1a07_0006 NULL
+#define pci_ss_list_1a07_0007 NULL
 #define pci_ss_list_1a08_0000 NULL
+#define pci_ss_list_1a1d_1a17 NULL
 #define pci_ss_list_1c1c_0001 NULL
 #define pci_ss_list_1d44_a400 NULL
 #define pci_ss_list_1de1_0391 NULL
@@ -50485,6 +57859,7 @@
 #define pci_ss_list_1de1_dc29 NULL
 #define pci_ss_list_1fc0_0300 NULL
 #define pci_ss_list_1fc1_000d NULL
+#define pci_ss_list_1fc1_0010 NULL
 #define pci_ss_list_1fce_0001 NULL
 #define pci_ss_list_2348_2010 NULL
 #define pci_ss_list_3388_0013 NULL
@@ -50492,6 +57867,8 @@
 #define pci_ss_list_3388_0020 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_3388_0021[] = {
+	&pci_ss_info_3388_0021_1775_c200,
+	&pci_ss_info_3388_0021_1775_ce90,
 	&pci_ss_info_3388_0021_4c53_1050,
 	&pci_ss_info_3388_0021_4c53_1080,
 	&pci_ss_info_3388_0021_4c53_1090,
@@ -50612,13 +57989,15 @@
 	&pci_ss_info_4444_0016_0070_c801,
 	&pci_ss_info_4444_0016_0070_e807,
 	&pci_ss_info_4444_0016_0070_e817,
+	&pci_ss_info_4444_0016_0070_ff92,
 	&pci_ss_info_4444_0016_0270_0801,
+	&pci_ss_info_4444_0016_10fc_d038,
+	&pci_ss_info_4444_0016_10fc_d039,
 	&pci_ss_info_4444_0016_12ab_fff3,
 	&pci_ss_info_4444_0016_12ab_ffff,
-	&pci_ss_info_4444_0016_4070_8801,
+	&pci_ss_info_4444_0016_1461_c019,
 	&pci_ss_info_4444_0016_9005_0092,
 	&pci_ss_info_4444_0016_9005_0093,
-	&pci_ss_info_4444_0016_ff92_0070,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_4444_0803[] = {
@@ -50651,6 +58030,7 @@
 };
 #endif
 #define pci_ss_list_4d51_0200 NULL
+#define pci_ss_list_4d56_0000 NULL
 #define pci_ss_list_4ddc_0100 NULL
 #define pci_ss_list_4ddc_0801 NULL
 #define pci_ss_list_4ddc_0802 NULL
@@ -50671,6 +58051,7 @@
 #define pci_ss_list_5046_1001 NULL
 #define pci_ss_list_5053_2010 NULL
 #define pci_ss_list_5145_3031 NULL
+#define pci_ss_list_5168_0300 NULL
 #define pci_ss_list_5168_0301 NULL
 #define pci_ss_list_5301_0001 NULL
 #define pci_ss_list_5333_0551 NULL
@@ -50717,6 +58098,7 @@
 #define pci_ss_list_5333_8903 NULL
 static const pciSubsystemInfo *pci_ss_list_5333_8904[] = {
 	&pci_ss_info_5333_8904_1014_00db,
+	&pci_ss_info_5333_8904_4843_314a,
 	&pci_ss_info_5333_8904_5333_8904,
 	NULL
 };
@@ -50823,6 +58205,7 @@
 #define pci_ss_list_5333_8d02 NULL
 #define pci_ss_list_5333_8d03 NULL
 #define pci_ss_list_5333_8d04 NULL
+#define pci_ss_list_5333_8e48 NULL
 static const pciSubsystemInfo *pci_ss_list_5333_9102[] = {
 	&pci_ss_info_5333_9102_1092_5932,
 	&pci_ss_info_5333_9102_1092_5934,
@@ -50840,6 +58223,7 @@
 #define pci_ss_list_5544_0001 NULL
 #define pci_ss_list_5555_0003 NULL
 #define pci_ss_list_5654_3132 NULL
+#define pci_ss_list_5853_0001 NULL
 #define pci_ss_list_6374_6773 NULL
 #define pci_ss_list_6666_0001 NULL
 #define pci_ss_list_6666_0002 NULL
@@ -50847,6 +58231,7 @@
 #define pci_ss_list_6666_0101 NULL
 #define pci_ss_list_7063_2000 NULL
 #define pci_ss_list_7063_3000 NULL
+#define pci_ss_list_7063_5500 NULL
 #define pci_ss_list_8008_0010 NULL
 #define pci_ss_list_8008_0011 NULL
 #define pci_ss_list_8086_0007 NULL
@@ -50970,8 +58355,8 @@
 	&pci_ss_info_8086_100e_1014_0265,
 	&pci_ss_info_8086_100e_1014_0267,
 	&pci_ss_info_8086_100e_1014_026a,
-	&pci_ss_info_8086_100e_1024_0134,
 	&pci_ss_info_8086_100e_1028_002e,
+	&pci_ss_info_8086_100e_1028_0134,
 	&pci_ss_info_8086_100e_1028_0151,
 	&pci_ss_info_8086_100e_107b_8920,
 	&pci_ss_info_8086_100e_8086_001e,
@@ -51017,8 +58402,15 @@
 	&pci_ss_info_8086_1013_8086_1113,
 	NULL
 };
-#define pci_ss_list_8086_1014 NULL
-#define pci_ss_list_8086_1015 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_1014[] = {
+	&pci_ss_info_8086_1014_8086_0014,
+	&pci_ss_info_8086_1014_8086_1014,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_1015[] = {
+	&pci_ss_info_8086_1015_8086_1015,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_8086_1016[] = {
 	&pci_ss_info_8086_1016_1014_052c,
 	&pci_ss_info_8086_1016_1179_0001,
@@ -51038,10 +58430,14 @@
 	&pci_ss_info_8086_1019_1458_e000,
 	&pci_ss_info_8086_1019_8086_1019,
 	&pci_ss_info_8086_1019_8086_301f,
+	&pci_ss_info_8086_1019_8086_302c,
 	&pci_ss_info_8086_1019_8086_3427,
 	NULL
 };
-#define pci_ss_list_8086_101a NULL
+static const pciSubsystemInfo *pci_ss_list_8086_101a[] = {
+	&pci_ss_info_8086_101a_8086_101a,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_8086_101d[] = {
 	&pci_ss_info_8086_101d_8086_1000,
 	NULL
@@ -51057,6 +58453,7 @@
 	&pci_ss_info_8086_1026_8086_1000,
 	&pci_ss_info_8086_1026_8086_1001,
 	&pci_ss_info_8086_1026_8086_1002,
+	&pci_ss_info_8086_1026_8086_1003,
 	&pci_ss_info_8086_1026_8086_1026,
 	NULL
 };
@@ -51077,13 +58474,13 @@
 static const pciSubsystemInfo *pci_ss_list_8086_1031[] = {
 	&pci_ss_info_8086_1031_1014_0209,
 	&pci_ss_info_8086_1031_104d_80e7,
+	&pci_ss_info_8086_1031_104d_813c,
 	&pci_ss_info_8086_1031_107b_5350,
 	&pci_ss_info_8086_1031_1179_0001,
 	&pci_ss_info_8086_1031_144d_c000,
 	&pci_ss_info_8086_1031_144d_c001,
 	&pci_ss_info_8086_1031_144d_c003,
 	&pci_ss_info_8086_1031_144d_c006,
-	&pci_ss_info_8086_1031_813c_104d,
 	NULL
 };
 #define pci_ss_list_8086_1032 NULL
@@ -51103,14 +58500,20 @@
 #define pci_ss_list_8086_103a NULL
 #define pci_ss_list_8086_103b NULL
 #define pci_ss_list_8086_103c NULL
-#define pci_ss_list_8086_103d NULL
+static const pciSubsystemInfo *pci_ss_list_8086_103d[] = {
+	&pci_ss_info_8086_103d_1014_0522,
+	NULL
+};
 #define pci_ss_list_8086_103e NULL
 static const pciSubsystemInfo *pci_ss_list_8086_1040[] = {
 	&pci_ss_info_8086_1040_16be_1040,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_1043[] = {
+	&pci_ss_info_8086_1043_103c_08b0,
+	&pci_ss_info_8086_1043_8086_2522,
 	&pci_ss_info_8086_1043_8086_2527,
+	&pci_ss_info_8086_1043_8086_2581,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_1048[] = {
@@ -51118,7 +58521,11 @@
 	&pci_ss_info_8086_1048_8086_a11f,
 	NULL
 };
+#define pci_ss_list_8086_1049 NULL
+#define pci_ss_list_8086_104a NULL
 #define pci_ss_list_8086_104b NULL
+#define pci_ss_list_8086_104c NULL
+#define pci_ss_list_8086_104d NULL
 static const pciSubsystemInfo *pci_ss_list_8086_1050[] = {
 	&pci_ss_info_8086_1050_1462_728c,
 	&pci_ss_info_8086_1050_1462_758c,
@@ -51130,13 +58537,35 @@
 #define pci_ss_list_8086_1051 NULL
 #define pci_ss_list_8086_1052 NULL
 #define pci_ss_list_8086_1053 NULL
+#define pci_ss_list_8086_1054 NULL
+#define pci_ss_list_8086_1055 NULL
+#define pci_ss_list_8086_1056 NULL
+#define pci_ss_list_8086_1057 NULL
 #define pci_ss_list_8086_1059 NULL
+#define pci_ss_list_8086_105b NULL
 static const pciSubsystemInfo *pci_ss_list_8086_105e[] = {
+	&pci_ss_info_8086_105e_103c_7044,
 	&pci_ss_info_8086_105e_1775_6003,
+	&pci_ss_info_8086_105e_8086_005e,
+	&pci_ss_info_8086_105e_8086_105e,
+	&pci_ss_info_8086_105e_8086_115e,
+	&pci_ss_info_8086_105e_8086_116e,
+	&pci_ss_info_8086_105e_8086_125e,
+	&pci_ss_info_8086_105e_8086_135e,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_105f[] = {
+	&pci_ss_info_8086_105f_8086_115f,
+	&pci_ss_info_8086_105f_8086_116f,
+	&pci_ss_info_8086_105f_8086_125f,
+	&pci_ss_info_8086_105f_8086_135f,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_1060[] = {
+	&pci_ss_info_8086_1060_8086_0060,
+	&pci_ss_info_8086_1060_8086_1060,
 	NULL
 };
-#define pci_ss_list_8086_105f NULL
-#define pci_ss_list_8086_1060 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_1064[] = {
 	&pci_ss_info_8086_1064_1043_80f8,
 	NULL
@@ -51176,6 +58605,8 @@
 static const pciSubsystemInfo *pci_ss_list_8086_1079[] = {
 	&pci_ss_info_8086_1079_103c_12a6,
 	&pci_ss_info_8086_1079_103c_12cf,
+	&pci_ss_info_8086_1079_1775_10d0,
+	&pci_ss_info_8086_1079_1775_ce90,
 	&pci_ss_info_8086_1079_1fc1_0027,
 	&pci_ss_info_8086_1079_4c53_1090,
 	&pci_ss_info_8086_1079_4c53_10b0,
@@ -51196,9 +58627,21 @@
 	&pci_ss_info_8086_107b_8086_107b,
 	NULL
 };
-#define pci_ss_list_8086_107c NULL
-#define pci_ss_list_8086_107d NULL
-#define pci_ss_list_8086_107e NULL
+static const pciSubsystemInfo *pci_ss_list_8086_107c[] = {
+	&pci_ss_info_8086_107c_8086_1376,
+	&pci_ss_info_8086_107c_8086_1476,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_107d[] = {
+	&pci_ss_info_8086_107d_8086_1082,
+	&pci_ss_info_8086_107d_8086_1092,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_107e[] = {
+	&pci_ss_info_8086_107e_8086_1084,
+	&pci_ss_info_8086_107e_8086_1094,
+	NULL
+};
 #define pci_ss_list_8086_107f NULL
 #define pci_ss_list_8086_1080 NULL
 #define pci_ss_list_8086_1081 NULL
@@ -51209,25 +58652,71 @@
 #define pci_ss_list_8086_1086 NULL
 #define pci_ss_list_8086_1087 NULL
 #define pci_ss_list_8086_1089 NULL
-#define pci_ss_list_8086_108a NULL
+static const pciSubsystemInfo *pci_ss_list_8086_108a[] = {
+	&pci_ss_info_8086_108a_8086_108a,
+	&pci_ss_info_8086_108a_8086_118a,
+	NULL
+};
 #define pci_ss_list_8086_108b NULL
 #define pci_ss_list_8086_108c NULL
 #define pci_ss_list_8086_108e NULL
 #define pci_ss_list_8086_108f NULL
+#define pci_ss_list_8086_1091 NULL
 #define pci_ss_list_8086_1092 NULL
+#define pci_ss_list_8086_1093 NULL
+#define pci_ss_list_8086_1094 NULL
+#define pci_ss_list_8086_1095 NULL
 #define pci_ss_list_8086_1096 NULL
 #define pci_ss_list_8086_1097 NULL
 #define pci_ss_list_8086_1098 NULL
-#define pci_ss_list_8086_1099 NULL
-#define pci_ss_list_8086_109a NULL
+static const pciSubsystemInfo *pci_ss_list_8086_1099[] = {
+	&pci_ss_info_8086_1099_8086_1099,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_109a[] = {
+	&pci_ss_info_8086_109a_1179_ff10,
+	&pci_ss_info_8086_109a_17aa_2001,
+	&pci_ss_info_8086_109a_17aa_207e,
+	&pci_ss_info_8086_109a_8086_109a,
+	NULL
+};
 #define pci_ss_list_8086_109b NULL
+static const pciSubsystemInfo *pci_ss_list_8086_109e[] = {
+	&pci_ss_info_8086_109e_8086_a01f,
+	&pci_ss_info_8086_109e_8086_a11f,
+	NULL
+};
 #define pci_ss_list_8086_10a0 NULL
 #define pci_ss_list_8086_10a1 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_10a4[] = {
+	&pci_ss_info_8086_10a4_8086_10a4,
+	&pci_ss_info_8086_10a4_8086_11a4,
+	NULL
+};
 #define pci_ss_list_8086_10b0 NULL
 #define pci_ss_list_8086_10b2 NULL
 #define pci_ss_list_8086_10b3 NULL
 #define pci_ss_list_8086_10b4 NULL
-#define pci_ss_list_8086_10b5 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_10b5[] = {
+	&pci_ss_info_8086_10b5_103c_3109,
+	&pci_ss_info_8086_10b5_8086_1099,
+	&pci_ss_info_8086_10b5_8086_1199,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_10b9[] = {
+	&pci_ss_info_8086_10b9_8086_1083,
+	&pci_ss_info_8086_10b9_8086_1093,
+	NULL
+};
+#define pci_ss_list_8086_10ba NULL
+#define pci_ss_list_8086_10bb NULL
+static const pciSubsystemInfo *pci_ss_list_8086_10bc[] = {
+	&pci_ss_info_8086_10bc_8086_10bc,
+	&pci_ss_info_8086_10bc_8086_11bc,
+	NULL
+};
+#define pci_ss_list_8086_10c4 NULL
+#define pci_ss_list_8086_10c5 NULL
 #define pci_ss_list_8086_1107 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_1130[] = {
 	&pci_ss_info_8086_1130_1025_1016,
@@ -51337,6 +58826,7 @@
 	&pci_ss_info_8086_1229_144d_2501,
 	&pci_ss_info_8086_1229_144d_2502,
 	&pci_ss_info_8086_1229_1668_1100,
+	&pci_ss_info_8086_1229_1775_ce90,
 	&pci_ss_info_8086_1229_4c53_1080,
 	&pci_ss_info_8086_1229_4c53_10e0,
 	&pci_ss_info_8086_1229_8086_0001,
@@ -51347,6 +58837,7 @@
 	&pci_ss_info_8086_1229_8086_0006,
 	&pci_ss_info_8086_1229_8086_0007,
 	&pci_ss_info_8086_1229_8086_0008,
+	&pci_ss_info_8086_1229_8086_0009,
 	&pci_ss_info_8086_1229_8086_000a,
 	&pci_ss_info_8086_1229_8086_000b,
 	&pci_ss_info_8086_1229_8086_000c,
@@ -51422,6 +58913,7 @@
 	&pci_ss_info_8086_1229_8086_3010,
 	&pci_ss_info_8086_1229_8086_3011,
 	&pci_ss_info_8086_1229_8086_3012,
+	&pci_ss_info_8086_1229_8086_301a,
 	&pci_ss_info_8086_1229_8086_3411,
 	NULL
 };
@@ -51495,6 +58987,11 @@
 #define pci_ss_list_8086_1a31 NULL
 #define pci_ss_list_8086_1a38 NULL
 #define pci_ss_list_8086_1a48 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_1b48[] = {
+	&pci_ss_info_8086_1b48_8086_a01f,
+	&pci_ss_info_8086_1b48_8086_a11f,
+	NULL
+};
 #define pci_ss_list_8086_2410 NULL
 #define pci_ss_list_8086_2411 NULL
 #define pci_ss_list_8086_2412 NULL
@@ -51521,39 +59018,50 @@
 };
 #define pci_ss_list_8086_2426 NULL
 #define pci_ss_list_8086_2428 NULL
-#define pci_ss_list_8086_2440 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_2440[] = {
+	&pci_ss_info_8086_2440_8086_5744,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_8086_2442[] = {
 	&pci_ss_info_8086_2442_1014_01c6,
 	&pci_ss_info_8086_2442_1025_1016,
+	&pci_ss_info_8086_2442_1028_00c7,
 	&pci_ss_info_8086_2442_1028_010e,
 	&pci_ss_info_8086_2442_1043_8027,
 	&pci_ss_info_8086_2442_104d_80df,
 	&pci_ss_info_8086_2442_147b_0507,
 	&pci_ss_info_8086_2442_8086_4532,
 	&pci_ss_info_8086_2442_8086_4557,
+	&pci_ss_info_8086_2442_8086_5744,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2443[] = {
 	&pci_ss_info_8086_2443_1014_01c6,
 	&pci_ss_info_8086_2443_1025_1016,
+	&pci_ss_info_8086_2443_1028_00c7,
 	&pci_ss_info_8086_2443_1028_010e,
 	&pci_ss_info_8086_2443_1043_8027,
 	&pci_ss_info_8086_2443_104d_80df,
 	&pci_ss_info_8086_2443_147b_0507,
 	&pci_ss_info_8086_2443_8086_4532,
 	&pci_ss_info_8086_2443_8086_4557,
+	&pci_ss_info_8086_2443_8086_5744,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2444[] = {
 	&pci_ss_info_8086_2444_1025_1016,
+	&pci_ss_info_8086_2444_1028_00c7,
 	&pci_ss_info_8086_2444_1028_010e,
 	&pci_ss_info_8086_2444_1043_8027,
 	&pci_ss_info_8086_2444_104d_80df,
 	&pci_ss_info_8086_2444_147b_0507,
 	&pci_ss_info_8086_2444_8086_4532,
+	&pci_ss_info_8086_2444_8086_5744,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2445[] = {
+	&pci_ss_info_8086_2445_0e11_000b,
+	&pci_ss_info_8086_2445_0e11_0088,
 	&pci_ss_info_8086_2445_1014_01c6,
 	&pci_ss_info_8086_2445_1025_1016,
 	&pci_ss_info_8086_2445_104d_80df,
@@ -51569,6 +59077,7 @@
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2448[] = {
 	&pci_ss_info_8086_2448_103c_099c,
+	&pci_ss_info_8086_2448_144d_c00c,
 	&pci_ss_info_8086_2448_1734_1055,
 	NULL
 };
@@ -51612,11 +59121,13 @@
 };
 static const pciSubsystemInfo *pci_ss_list_8086_244b[] = {
 	&pci_ss_info_8086_244b_1014_01c6,
+	&pci_ss_info_8086_244b_1028_00c7,
 	&pci_ss_info_8086_244b_1028_010e,
 	&pci_ss_info_8086_244b_1043_8027,
 	&pci_ss_info_8086_244b_147b_0507,
 	&pci_ss_info_8086_244b_8086_4532,
 	&pci_ss_info_8086_244b_8086_4557,
+	&pci_ss_info_8086_244b_8086_5744,
 	NULL
 };
 #define pci_ss_list_8086_244c NULL
@@ -51706,94 +59217,130 @@
 #define pci_ss_list_8086_24c1 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_24c2[] = {
 	&pci_ss_info_8086_24c2_1014_0267,
+	&pci_ss_info_8086_24c2_1014_052d,
 	&pci_ss_info_8086_24c2_1025_005a,
 	&pci_ss_info_8086_24c2_1028_0126,
 	&pci_ss_info_8086_24c2_1028_0163,
 	&pci_ss_info_8086_24c2_1028_0196,
 	&pci_ss_info_8086_24c2_103c_088c,
 	&pci_ss_info_8086_24c2_103c_0890,
+	&pci_ss_info_8086_24c2_103c_08b0,
 	&pci_ss_info_8086_24c2_1071_8160,
+	&pci_ss_info_8086_24c2_144d_c00c,
 	&pci_ss_info_8086_24c2_1462_5800,
 	&pci_ss_info_8086_24c2_1509_2990,
+	&pci_ss_info_8086_24c2_1734_1004,
 	&pci_ss_info_8086_24c2_1734_1055,
 	&pci_ss_info_8086_24c2_4c53_1090,
 	&pci_ss_info_8086_24c2_8086_4541,
+	&pci_ss_info_8086_24c2_e4bf_0cc9,
+	&pci_ss_info_8086_24c2_e4bf_0cd2,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_24c3[] = {
 	&pci_ss_info_8086_24c3_1014_0267,
+	&pci_ss_info_8086_24c3_1014_052d,
 	&pci_ss_info_8086_24c3_1025_005a,
 	&pci_ss_info_8086_24c3_1028_0126,
 	&pci_ss_info_8086_24c3_103c_088c,
 	&pci_ss_info_8086_24c3_103c_0890,
+	&pci_ss_info_8086_24c3_103c_08b0,
 	&pci_ss_info_8086_24c3_1071_8160,
+	&pci_ss_info_8086_24c3_144d_c00c,
 	&pci_ss_info_8086_24c3_1458_24c2,
 	&pci_ss_info_8086_24c3_1462_5800,
+	&pci_ss_info_8086_24c3_1734_1004,
 	&pci_ss_info_8086_24c3_1734_1055,
 	&pci_ss_info_8086_24c3_4c53_1090,
+	&pci_ss_info_8086_24c3_e4bf_0cc9,
+	&pci_ss_info_8086_24c3_e4bf_0cd2,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_24c4[] = {
 	&pci_ss_info_8086_24c4_1014_0267,
+	&pci_ss_info_8086_24c4_1014_052d,
 	&pci_ss_info_8086_24c4_1025_005a,
 	&pci_ss_info_8086_24c4_1028_0126,
 	&pci_ss_info_8086_24c4_1028_0163,
 	&pci_ss_info_8086_24c4_1028_0196,
 	&pci_ss_info_8086_24c4_103c_088c,
 	&pci_ss_info_8086_24c4_103c_0890,
+	&pci_ss_info_8086_24c4_103c_08b0,
 	&pci_ss_info_8086_24c4_1071_8160,
+	&pci_ss_info_8086_24c4_144d_c00c,
 	&pci_ss_info_8086_24c4_1462_5800,
 	&pci_ss_info_8086_24c4_1509_2990,
+	&pci_ss_info_8086_24c4_1734_1004,
 	&pci_ss_info_8086_24c4_4c53_1090,
 	&pci_ss_info_8086_24c4_8086_4541,
+	&pci_ss_info_8086_24c4_e4bf_0cc9,
+	&pci_ss_info_8086_24c4_e4bf_0cd2,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_24c5[] = {
 	&pci_ss_info_8086_24c5_0e11_00b8,
 	&pci_ss_info_8086_24c5_1014_0267,
+	&pci_ss_info_8086_24c5_1014_0537,
+	&pci_ss_info_8086_24c5_1014_055f,
 	&pci_ss_info_8086_24c5_1025_005a,
 	&pci_ss_info_8086_24c5_1028_0139,
 	&pci_ss_info_8086_24c5_1028_0163,
 	&pci_ss_info_8086_24c5_1028_0196,
 	&pci_ss_info_8086_24c5_103c_088c,
 	&pci_ss_info_8086_24c5_103c_0890,
+	&pci_ss_info_8086_24c5_103c_08b0,
 	&pci_ss_info_8086_24c5_1071_8160,
+	&pci_ss_info_8086_24c5_144d_c00c,
 	&pci_ss_info_8086_24c5_1458_a002,
 	&pci_ss_info_8086_24c5_1462_5800,
+	&pci_ss_info_8086_24c5_1734_1005,
 	&pci_ss_info_8086_24c5_1734_1055,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_24c6[] = {
-	&pci_ss_info_8086_24c6_003c_1025,
+	&pci_ss_info_8086_24c6_1014_0524,
+	&pci_ss_info_8086_24c6_1014_0559,
+	&pci_ss_info_8086_24c6_1025_003c,
 	&pci_ss_info_8086_24c6_1025_005a,
 	&pci_ss_info_8086_24c6_1028_0196,
 	&pci_ss_info_8086_24c6_103c_088c,
 	&pci_ss_info_8086_24c6_103c_0890,
+	&pci_ss_info_8086_24c6_103c_08b0,
 	&pci_ss_info_8086_24c6_1071_8160,
+	&pci_ss_info_8086_24c6_144d_c00c,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_24c7[] = {
 	&pci_ss_info_8086_24c7_1014_0267,
+	&pci_ss_info_8086_24c7_1014_052d,
 	&pci_ss_info_8086_24c7_1025_005a,
 	&pci_ss_info_8086_24c7_1028_0126,
 	&pci_ss_info_8086_24c7_1028_0163,
 	&pci_ss_info_8086_24c7_1028_0196,
 	&pci_ss_info_8086_24c7_103c_088c,
 	&pci_ss_info_8086_24c7_103c_0890,
+	&pci_ss_info_8086_24c7_103c_08b0,
 	&pci_ss_info_8086_24c7_1071_8160,
+	&pci_ss_info_8086_24c7_144d_c00c,
 	&pci_ss_info_8086_24c7_1462_5800,
 	&pci_ss_info_8086_24c7_1509_2990,
+	&pci_ss_info_8086_24c7_1734_1004,
 	&pci_ss_info_8086_24c7_4c53_1090,
 	&pci_ss_info_8086_24c7_8086_4541,
+	&pci_ss_info_8086_24c7_e4bf_0cc9,
+	&pci_ss_info_8086_24c7_e4bf_0cd2,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_24ca[] = {
+	&pci_ss_info_8086_24ca_1014_052d,
 	&pci_ss_info_8086_24ca_1025_005a,
 	&pci_ss_info_8086_24ca_1028_0163,
 	&pci_ss_info_8086_24ca_1028_0196,
 	&pci_ss_info_8086_24ca_103c_088c,
 	&pci_ss_info_8086_24ca_103c_0890,
+	&pci_ss_info_8086_24ca_103c_08b0,
 	&pci_ss_info_8086_24ca_1071_8160,
+	&pci_ss_info_8086_24ca_144d_c00c,
 	&pci_ss_info_8086_24ca_1734_1055,
 	&pci_ss_info_8086_24ca_8086_4541,
 	NULL
@@ -51803,15 +59350,20 @@
 	&pci_ss_info_8086_24cb_1028_0126,
 	&pci_ss_info_8086_24cb_1458_24c2,
 	&pci_ss_info_8086_24cb_1462_5800,
+	&pci_ss_info_8086_24cb_1734_1004,
 	&pci_ss_info_8086_24cb_4c53_1090,
+	&pci_ss_info_8086_24cb_e4bf_0cc9,
+	&pci_ss_info_8086_24cb_e4bf_0cd2,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_24cc[] = {
+	&pci_ss_info_8086_24cc_144d_c00c,
 	&pci_ss_info_8086_24cc_1734_1055,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_24cd[] = {
 	&pci_ss_info_8086_24cd_1014_0267,
+	&pci_ss_info_8086_24cd_1014_052e,
 	&pci_ss_info_8086_24cd_1025_005a,
 	&pci_ss_info_8086_24cd_1028_011d,
 	&pci_ss_info_8086_24cd_1028_0126,
@@ -51820,11 +59372,17 @@
 	&pci_ss_info_8086_24cd_1028_0196,
 	&pci_ss_info_8086_24cd_103c_088c,
 	&pci_ss_info_8086_24cd_103c_0890,
+	&pci_ss_info_8086_24cd_103c_08b0,
 	&pci_ss_info_8086_24cd_1071_8160,
+	&pci_ss_info_8086_24cd_1179_ff00,
+	&pci_ss_info_8086_24cd_144d_c00c,
 	&pci_ss_info_8086_24cd_1462_3981,
 	&pci_ss_info_8086_24cd_1509_1968,
+	&pci_ss_info_8086_24cd_1734_1004,
 	&pci_ss_info_8086_24cd_1734_1055,
 	&pci_ss_info_8086_24cd_4c53_1090,
+	&pci_ss_info_8086_24cd_e4bf_0cc9,
+	&pci_ss_info_8086_24cd_e4bf_0cd2,
 	NULL
 };
 #define pci_ss_list_8086_24d0 NULL
@@ -51838,6 +59396,7 @@
 	&pci_ss_info_8086_24d1_15d9_4580,
 	&pci_ss_info_8086_24d1_8086_3427,
 	&pci_ss_info_8086_24d1_8086_4246,
+	&pci_ss_info_8086_24d1_8086_4c43,
 	&pci_ss_info_8086_24d1_8086_524c,
 	NULL
 };
@@ -51855,6 +59414,7 @@
 	&pci_ss_info_8086_24d2_1734_101c,
 	&pci_ss_info_8086_24d2_8086_3427,
 	&pci_ss_info_8086_24d2_8086_4246,
+	&pci_ss_info_8086_24d2_8086_4c43,
 	&pci_ss_info_8086_24d2_8086_524c,
 	NULL
 };
@@ -51862,6 +59422,7 @@
 	&pci_ss_info_8086_24d3_1014_02ed,
 	&pci_ss_info_8086_24d3_1028_0156,
 	&pci_ss_info_8086_24d3_1028_0169,
+	&pci_ss_info_8086_24d3_103c_12bc,
 	&pci_ss_info_8086_24d3_1043_80a6,
 	&pci_ss_info_8086_24d3_1458_24d2,
 	&pci_ss_info_8086_24d3_1462_7280,
@@ -51869,6 +59430,7 @@
 	&pci_ss_info_8086_24d3_1734_101c,
 	&pci_ss_info_8086_24d3_8086_3427,
 	&pci_ss_info_8086_24d3_8086_4246,
+	&pci_ss_info_8086_24d3_8086_4c43,
 	&pci_ss_info_8086_24d3_8086_524c,
 	NULL
 };
@@ -51886,12 +59448,15 @@
 	&pci_ss_info_8086_24d4_1734_101c,
 	&pci_ss_info_8086_24d4_8086_3427,
 	&pci_ss_info_8086_24d4_8086_4246,
+	&pci_ss_info_8086_24d4_8086_4c43,
 	&pci_ss_info_8086_24d4_8086_524c,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_24d5[] = {
+	&pci_ss_info_8086_24d5_100a_147b,
 	&pci_ss_info_8086_24d5_1028_0169,
 	&pci_ss_info_8086_24d5_103c_006a,
+	&pci_ss_info_8086_24d5_103c_12bc,
 	&pci_ss_info_8086_24d5_1043_80f3,
 	&pci_ss_info_8086_24d5_1043_810f,
 	&pci_ss_info_8086_24d5_1458_a002,
@@ -51900,6 +59465,7 @@
 	&pci_ss_info_8086_24d5_8086_a000,
 	&pci_ss_info_8086_24d5_8086_e000,
 	&pci_ss_info_8086_24d5_8086_e001,
+	&pci_ss_info_8086_24d5_8086_e002,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_24d6[] = {
@@ -51919,6 +59485,7 @@
 	&pci_ss_info_8086_24d7_1734_101c,
 	&pci_ss_info_8086_24d7_8086_3427,
 	&pci_ss_info_8086_24d7_8086_4246,
+	&pci_ss_info_8086_24d7_8086_4c43,
 	&pci_ss_info_8086_24d7_8086_524c,
 	NULL
 };
@@ -51937,6 +59504,7 @@
 	&pci_ss_info_8086_24db_8086_24db,
 	&pci_ss_info_8086_24db_8086_3427,
 	&pci_ss_info_8086_24db_8086_4246,
+	&pci_ss_info_8086_24db_8086_4c43,
 	&pci_ss_info_8086_24db_8086_524c,
 	NULL
 };
@@ -51953,6 +59521,7 @@
 	&pci_ss_info_8086_24dd_1462_7280,
 	&pci_ss_info_8086_24dd_8086_3427,
 	&pci_ss_info_8086_24dd_8086_4246,
+	&pci_ss_info_8086_24dd_8086_4c43,
 	&pci_ss_info_8086_24dd_8086_524c,
 	NULL
 };
@@ -51966,6 +59535,7 @@
 	&pci_ss_info_8086_24de_1734_101c,
 	&pci_ss_info_8086_24de_8086_3427,
 	&pci_ss_info_8086_24de_8086_4246,
+	&pci_ss_info_8086_24de_8086_4c43,
 	&pci_ss_info_8086_24de_8086_524c,
 	NULL
 };
@@ -51984,6 +59554,7 @@
 #define pci_ss_list_8086_2520 NULL
 #define pci_ss_list_8086_2521 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_2530[] = {
+	&pci_ss_info_8086_2530_1028_00c7,
 	&pci_ss_info_8086_2530_147b_0507,
 	NULL
 };
@@ -52029,11 +59600,14 @@
 };
 #define pci_ss_list_8086_2561 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_2562[] = {
+	&pci_ss_info_8086_2562_0e11_00b9,
 	&pci_ss_info_8086_2562_1014_0267,
+	&pci_ss_info_8086_2562_1734_1004,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2570[] = {
 	&pci_ss_info_8086_2570_103c_006a,
+	&pci_ss_info_8086_2570_103c_12bc,
 	&pci_ss_info_8086_2570_1043_80f2,
 	&pci_ss_info_8086_2570_1458_2570,
 	NULL
@@ -52041,8 +59615,10 @@
 #define pci_ss_list_8086_2571 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_2572[] = {
 	&pci_ss_info_8086_2572_1028_019d,
+	&pci_ss_info_8086_2572_103c_12bc,
 	&pci_ss_info_8086_2572_1043_80a5,
 	&pci_ss_info_8086_2572_8086_4246,
+	&pci_ss_info_8086_2572_8086_4c43,
 	NULL
 };
 #define pci_ss_list_8086_2573 NULL
@@ -52065,6 +59641,7 @@
 #define pci_ss_list_8086_2581 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_2582[] = {
 	&pci_ss_info_8086_2582_1028_1079,
+	&pci_ss_info_8086_2582_103c_3006,
 	&pci_ss_info_8086_2582_1043_2582,
 	&pci_ss_info_8086_2582_1458_2582,
 	&pci_ss_info_8086_2582_1734_105b,
@@ -52079,61 +59656,79 @@
 	&pci_ss_info_8086_2590_1028_0182,
 	&pci_ss_info_8086_2590_103c_099c,
 	&pci_ss_info_8086_2590_a304_81b7,
+	&pci_ss_info_8086_2590_e4bf_0ccd,
 	NULL
 };
 #define pci_ss_list_8086_2591 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_2592[] = {
 	&pci_ss_info_8086_2592_103c_099c,
+	&pci_ss_info_8086_2592_103c_308a,
 	&pci_ss_info_8086_2592_1043_1881,
+	&pci_ss_info_8086_2592_e4bf_0ccd,
 	NULL
 };
 #define pci_ss_list_8086_25a1 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_25a2[] = {
+	&pci_ss_info_8086_25a2_1775_10d0,
+	&pci_ss_info_8086_25a2_1775_ce90,
 	&pci_ss_info_8086_25a2_4c53_10b0,
 	&pci_ss_info_8086_25a2_4c53_10e0,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_25a3[] = {
+	&pci_ss_info_8086_25a3_1775_ce90,
 	&pci_ss_info_8086_25a3_4c53_10b0,
 	&pci_ss_info_8086_25a3_4c53_10d0,
 	&pci_ss_info_8086_25a3_4c53_10e0,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_25a4[] = {
+	&pci_ss_info_8086_25a4_1775_10d0,
+	&pci_ss_info_8086_25a4_1775_ce90,
 	&pci_ss_info_8086_25a4_4c53_10b0,
 	&pci_ss_info_8086_25a4_4c53_10d0,
 	&pci_ss_info_8086_25a4_4c53_10e0,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_25a6[] = {
+	&pci_ss_info_8086_25a6_1775_ce90,
 	&pci_ss_info_8086_25a6_4c53_10b0,
 	NULL
 };
 #define pci_ss_list_8086_25a7 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_25a9[] = {
+	&pci_ss_info_8086_25a9_1775_10d0,
+	&pci_ss_info_8086_25a9_1775_ce90,
 	&pci_ss_info_8086_25a9_4c53_10b0,
 	&pci_ss_info_8086_25a9_4c53_10d0,
 	&pci_ss_info_8086_25a9_4c53_10e0,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_25aa[] = {
+	&pci_ss_info_8086_25aa_1775_ce90,
 	&pci_ss_info_8086_25aa_4c53_10b0,
 	&pci_ss_info_8086_25aa_4c53_10e0,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_25ab[] = {
+	&pci_ss_info_8086_25ab_1775_10d0,
+	&pci_ss_info_8086_25ab_1775_ce90,
 	&pci_ss_info_8086_25ab_4c53_10b0,
 	&pci_ss_info_8086_25ab_4c53_10d0,
 	&pci_ss_info_8086_25ab_4c53_10e0,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_25ac[] = {
+	&pci_ss_info_8086_25ac_1775_10d0,
+	&pci_ss_info_8086_25ac_1775_ce90,
 	&pci_ss_info_8086_25ac_4c53_10b0,
 	&pci_ss_info_8086_25ac_4c53_10d0,
 	&pci_ss_info_8086_25ac_4c53_10e0,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_25ad[] = {
+	&pci_ss_info_8086_25ad_1775_10d0,
+	&pci_ss_info_8086_25ad_1775_ce90,
 	&pci_ss_info_8086_25ad_4c53_10b0,
 	&pci_ss_info_8086_25ad_4c53_10d0,
 	&pci_ss_info_8086_25ad_4c53_10e0,
@@ -52155,7 +59750,6 @@
 #define pci_ss_list_8086_25e5 NULL
 #define pci_ss_list_8086_25e6 NULL
 #define pci_ss_list_8086_25e7 NULL
-#define pci_ss_list_8086_25e8 NULL
 #define pci_ss_list_8086_25f0 NULL
 #define pci_ss_list_8086_25f1 NULL
 #define pci_ss_list_8086_25f3 NULL
@@ -52202,6 +59796,7 @@
 static const pciSubsystemInfo *pci_ss_list_8086_2640[] = {
 	&pci_ss_info_8086_2640_1462_7028,
 	&pci_ss_info_8086_2640_1734_105c,
+	&pci_ss_info_8086_2640_e4bf_0ccd,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2641[] = {
@@ -52214,6 +59809,7 @@
 	&pci_ss_info_8086_2651_1043_2601,
 	&pci_ss_info_8086_2651_1734_105c,
 	&pci_ss_info_8086_2651_8086_4147,
+	&pci_ss_info_8086_2651_e4bf_0ccd,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2652[] = {
@@ -52228,6 +59824,7 @@
 	&pci_ss_info_8086_2658_1458_2558,
 	&pci_ss_info_8086_2658_1462_7028,
 	&pci_ss_info_8086_2658_1734_105c,
+	&pci_ss_info_8086_2658_e4bf_0ccd,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2659[] = {
@@ -52237,6 +59834,7 @@
 	&pci_ss_info_8086_2659_1458_2659,
 	&pci_ss_info_8086_2659_1462_7028,
 	&pci_ss_info_8086_2659_1734_105c,
+	&pci_ss_info_8086_2659_e4bf_0ccd,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_265a[] = {
@@ -52246,6 +59844,7 @@
 	&pci_ss_info_8086_265a_1458_265a,
 	&pci_ss_info_8086_265a_1462_7028,
 	&pci_ss_info_8086_265a_1734_105c,
+	&pci_ss_info_8086_265a_e4bf_0ccd,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_265b[] = {
@@ -52255,6 +59854,7 @@
 	&pci_ss_info_8086_265b_1458_265a,
 	&pci_ss_info_8086_265b_1462_7028,
 	&pci_ss_info_8086_265b_1734_105c,
+	&pci_ss_info_8086_265b_e4bf_0ccd,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_265c[] = {
@@ -52264,6 +59864,8 @@
 	&pci_ss_info_8086_265c_1458_5006,
 	&pci_ss_info_8086_265c_1462_7028,
 	&pci_ss_info_8086_265c_1734_105c,
+	&pci_ss_info_8086_265c_8086_265c,
+	&pci_ss_info_8086_265c_e4bf_0ccd,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_2660[] = {
@@ -52274,6 +59876,7 @@
 #define pci_ss_list_8086_2664 NULL
 #define pci_ss_list_8086_2666 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_2668[] = {
+	&pci_ss_info_8086_2668_103c_2a09,
 	&pci_ss_info_8086_2668_1043_814e,
 	NULL
 };
@@ -52283,6 +59886,7 @@
 	&pci_ss_info_8086_266a_1458_266a,
 	&pci_ss_info_8086_266a_1462_7028,
 	&pci_ss_info_8086_266a_1734_105c,
+	&pci_ss_info_8086_266a_e4bf_0ccd,
 	NULL
 };
 #define pci_ss_list_8086_266c NULL
@@ -52296,8 +59900,11 @@
 	&pci_ss_info_8086_266e_1028_0179,
 	&pci_ss_info_8086_266e_1028_0182,
 	&pci_ss_info_8086_266e_1028_0188,
+	&pci_ss_info_8086_266e_103c_0944,
 	&pci_ss_info_8086_266e_103c_099c,
+	&pci_ss_info_8086_266e_103c_3006,
 	&pci_ss_info_8086_266e_1458_a002,
+	&pci_ss_info_8086_266e_152d_0745,
 	&pci_ss_info_8086_266e_1734_105a,
 	NULL
 };
@@ -52329,6 +59936,7 @@
 #define pci_ss_list_8086_269b NULL
 #define pci_ss_list_8086_269e NULL
 static const pciSubsystemInfo *pci_ss_list_8086_2770[] = {
+	&pci_ss_info_8086_2770_107b_5048,
 	&pci_ss_info_8086_2770_8086_544e,
 	NULL
 };
@@ -52355,43 +59963,79 @@
 	&pci_ss_info_8086_2792_1043_1881,
 	NULL
 };
-#define pci_ss_list_8086_27a0 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_27a0[] = {
+	&pci_ss_info_8086_27a0_103c_30a1,
+	&pci_ss_info_8086_27a0_17aa_2017,
+	NULL
+};
 #define pci_ss_list_8086_27a1 NULL
-#define pci_ss_list_8086_27a2 NULL
-#define pci_ss_list_8086_27a6 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_27a2[] = {
+	&pci_ss_info_8086_27a2_103c_30a1,
+	&pci_ss_info_8086_27a2_17aa_201a,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_27a6[] = {
+	&pci_ss_info_8086_27a6_103c_30a1,
+	&pci_ss_info_8086_27a6_17aa_201a,
+	NULL
+};
 #define pci_ss_list_8086_27b0 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_27b8[] = {
+	&pci_ss_info_8086_27b8_107b_5048,
 	&pci_ss_info_8086_27b8_8086_544e,
 	NULL
 };
-#define pci_ss_list_8086_27b9 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_27b9[] = {
+	&pci_ss_info_8086_27b9_103c_30a1,
+	&pci_ss_info_8086_27b9_10f7_8338,
+	&pci_ss_info_8086_27b9_17aa_2009,
+	NULL
+};
 #define pci_ss_list_8086_27bd NULL
 static const pciSubsystemInfo *pci_ss_list_8086_27c0[] = {
+	&pci_ss_info_8086_27c0_107b_5048,
 	&pci_ss_info_8086_27c0_8086_544e,
 	NULL
 };
 #define pci_ss_list_8086_27c1 NULL
 #define pci_ss_list_8086_27c3 NULL
 #define pci_ss_list_8086_27c4 NULL
-#define pci_ss_list_8086_27c5 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_27c5[] = {
+	&pci_ss_info_8086_27c5_17aa_200d,
+	NULL
+};
 #define pci_ss_list_8086_27c6 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_27c8[] = {
+	&pci_ss_info_8086_27c8_103c_30a1,
+	&pci_ss_info_8086_27c8_107b_5048,
+	&pci_ss_info_8086_27c8_17aa_200a,
 	&pci_ss_info_8086_27c8_8086_544e,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_27c9[] = {
+	&pci_ss_info_8086_27c9_103c_30a1,
+	&pci_ss_info_8086_27c9_107b_5048,
+	&pci_ss_info_8086_27c9_17aa_200a,
 	&pci_ss_info_8086_27c9_8086_544e,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_27ca[] = {
+	&pci_ss_info_8086_27ca_103c_30a1,
+	&pci_ss_info_8086_27ca_107b_5048,
+	&pci_ss_info_8086_27ca_17aa_200a,
 	&pci_ss_info_8086_27ca_8086_544e,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_27cb[] = {
+	&pci_ss_info_8086_27cb_103c_30a1,
+	&pci_ss_info_8086_27cb_107b_5048,
+	&pci_ss_info_8086_27cb_17aa_200a,
 	&pci_ss_info_8086_27cb_8086_544e,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_27cc[] = {
+	&pci_ss_info_8086_27cc_103c_30a1,
+	&pci_ss_info_8086_27cc_17aa_200b,
 	&pci_ss_info_8086_27cc_8086_544e,
 	NULL
 };
@@ -52399,8 +60043,19 @@
 #define pci_ss_list_8086_27d2 NULL
 #define pci_ss_list_8086_27d4 NULL
 #define pci_ss_list_8086_27d6 NULL
-#define pci_ss_list_8086_27d8 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_27d8[] = {
+	&pci_ss_info_8086_27d8_103c_30a1,
+	&pci_ss_info_8086_27d8_107b_5048,
+	&pci_ss_info_8086_27d8_10f7_8338,
+	&pci_ss_info_8086_27d8_1179_ff31,
+	&pci_ss_info_8086_27d8_152d_0753,
+	&pci_ss_info_8086_27d8_1734_10ad,
+	&pci_ss_info_8086_27d8_17aa_2010,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_8086_27da[] = {
+	&pci_ss_info_8086_27da_10f7_8338,
+	&pci_ss_info_8086_27da_17aa_200f,
 	&pci_ss_info_8086_27da_8086_544e,
 	NULL
 };
@@ -52411,6 +60066,10 @@
 #define pci_ss_list_8086_27dd NULL
 #define pci_ss_list_8086_27de NULL
 static const pciSubsystemInfo *pci_ss_list_8086_27df[] = {
+	&pci_ss_info_8086_27df_103c_30a1,
+	&pci_ss_info_8086_27df_107b_5048,
+	&pci_ss_info_8086_27df_10f7_8338,
+	&pci_ss_info_8086_27df_17aa_200c,
 	&pci_ss_info_8086_27df_8086_544e,
 	NULL
 };
@@ -52421,22 +60080,43 @@
 #define pci_ss_list_8086_2812 NULL
 #define pci_ss_list_8086_2814 NULL
 #define pci_ss_list_8086_2815 NULL
-#define pci_ss_list_8086_2820 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_2820[] = {
+	&pci_ss_info_8086_2820_1462_7235,
+	NULL
+};
 #define pci_ss_list_8086_2821 NULL
 #define pci_ss_list_8086_2822 NULL
 #define pci_ss_list_8086_2824 NULL
-#define pci_ss_list_8086_2825 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_2825[] = {
+	&pci_ss_info_8086_2825_1462_7235,
+	NULL
+};
 #define pci_ss_list_8086_2828 NULL
 #define pci_ss_list_8086_2829 NULL
 #define pci_ss_list_8086_282a NULL
-#define pci_ss_list_8086_2830 NULL
-#define pci_ss_list_8086_2831 NULL
-#define pci_ss_list_8086_2832 NULL
-#define pci_ss_list_8086_2834 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_2830[] = {
+	&pci_ss_info_8086_2830_1462_7235,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_2831[] = {
+	&pci_ss_info_8086_2831_1462_7235,
+	NULL
+};
+#define pci_ss_list_8086_2832 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_2834[] = {
+	&pci_ss_info_8086_2834_1462_7235,
+	NULL
+};
 #define pci_ss_list_8086_2835 NULL
-#define pci_ss_list_8086_2836 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_2836[] = {
+	&pci_ss_info_8086_2836_1462_7235,
+	NULL
+};
 #define pci_ss_list_8086_283a NULL
-#define pci_ss_list_8086_283e NULL
+static const pciSubsystemInfo *pci_ss_list_8086_283e[] = {
+	&pci_ss_info_8086_283e_1462_7235,
+	NULL
+};
 #define pci_ss_list_8086_283f NULL
 #define pci_ss_list_8086_2841 NULL
 #define pci_ss_list_8086_2843 NULL
@@ -52446,13 +60126,50 @@
 #define pci_ss_list_8086_284b NULL
 #define pci_ss_list_8086_284f NULL
 #define pci_ss_list_8086_2850 NULL
+#define pci_ss_list_8086_2910 NULL
+#define pci_ss_list_8086_2911 NULL
+#define pci_ss_list_8086_2912 NULL
+#define pci_ss_list_8086_2914 NULL
+#define pci_ss_list_8086_2916 NULL
+#define pci_ss_list_8086_2918 NULL
+#define pci_ss_list_8086_2920 NULL
+#define pci_ss_list_8086_2921 NULL
+#define pci_ss_list_8086_2922 NULL
+#define pci_ss_list_8086_2923 NULL
+#define pci_ss_list_8086_2925 NULL
+#define pci_ss_list_8086_2926 NULL
+#define pci_ss_list_8086_2928 NULL
+#define pci_ss_list_8086_292d NULL
+#define pci_ss_list_8086_292e NULL
+#define pci_ss_list_8086_2930 NULL
+#define pci_ss_list_8086_2932 NULL
+#define pci_ss_list_8086_2934 NULL
+#define pci_ss_list_8086_2935 NULL
+#define pci_ss_list_8086_2936 NULL
+#define pci_ss_list_8086_2937 NULL
+#define pci_ss_list_8086_2938 NULL
+#define pci_ss_list_8086_2939 NULL
+#define pci_ss_list_8086_293a NULL
+#define pci_ss_list_8086_293c NULL
+#define pci_ss_list_8086_293e NULL
+#define pci_ss_list_8086_2940 NULL
+#define pci_ss_list_8086_2942 NULL
+#define pci_ss_list_8086_2944 NULL
+#define pci_ss_list_8086_2946 NULL
+#define pci_ss_list_8086_2948 NULL
+#define pci_ss_list_8086_294a NULL
+#define pci_ss_list_8086_294c NULL
 #define pci_ss_list_8086_2970 NULL
 #define pci_ss_list_8086_2971 NULL
 #define pci_ss_list_8086_2972 NULL
 #define pci_ss_list_8086_2973 NULL
 #define pci_ss_list_8086_2974 NULL
+#define pci_ss_list_8086_2975 NULL
 #define pci_ss_list_8086_2976 NULL
 #define pci_ss_list_8086_2977 NULL
+#define pci_ss_list_8086_2980 NULL
+#define pci_ss_list_8086_2981 NULL
+#define pci_ss_list_8086_2982 NULL
 #define pci_ss_list_8086_2990 NULL
 #define pci_ss_list_8086_2991 NULL
 #define pci_ss_list_8086_2992 NULL
@@ -52469,15 +60186,71 @@
 #define pci_ss_list_8086_29a5 NULL
 #define pci_ss_list_8086_29a6 NULL
 #define pci_ss_list_8086_29a7 NULL
+#define pci_ss_list_8086_29b0 NULL
+#define pci_ss_list_8086_29b1 NULL
+#define pci_ss_list_8086_29b2 NULL
+#define pci_ss_list_8086_29b3 NULL
+#define pci_ss_list_8086_29b4 NULL
+#define pci_ss_list_8086_29b5 NULL
+#define pci_ss_list_8086_29b6 NULL
+#define pci_ss_list_8086_29b7 NULL
+#define pci_ss_list_8086_29c0 NULL
+#define pci_ss_list_8086_29c1 NULL
+#define pci_ss_list_8086_29c2 NULL
+#define pci_ss_list_8086_29c3 NULL
+#define pci_ss_list_8086_29c4 NULL
+#define pci_ss_list_8086_29c5 NULL
+#define pci_ss_list_8086_29c6 NULL
+#define pci_ss_list_8086_29c7 NULL
+#define pci_ss_list_8086_29cf NULL
+#define pci_ss_list_8086_29d0 NULL
+#define pci_ss_list_8086_29d1 NULL
+#define pci_ss_list_8086_29d2 NULL
+#define pci_ss_list_8086_29d3 NULL
+#define pci_ss_list_8086_29d4 NULL
+#define pci_ss_list_8086_29d5 NULL
+#define pci_ss_list_8086_29d6 NULL
+#define pci_ss_list_8086_29d7 NULL
+#define pci_ss_list_8086_29e0 NULL
+#define pci_ss_list_8086_29e1 NULL
+#define pci_ss_list_8086_29e4 NULL
+#define pci_ss_list_8086_29e5 NULL
+#define pci_ss_list_8086_29e6 NULL
+#define pci_ss_list_8086_29e7 NULL
+#define pci_ss_list_8086_29e9 NULL
+#define pci_ss_list_8086_29f0 NULL
+#define pci_ss_list_8086_29f1 NULL
+#define pci_ss_list_8086_29f4 NULL
+#define pci_ss_list_8086_29f5 NULL
+#define pci_ss_list_8086_29f6 NULL
+#define pci_ss_list_8086_29f7 NULL
+#define pci_ss_list_8086_29f9 NULL
+#define pci_ss_list_8086_2a00 NULL
+#define pci_ss_list_8086_2a01 NULL
+#define pci_ss_list_8086_2a02 NULL
+#define pci_ss_list_8086_2a03 NULL
+#define pci_ss_list_8086_2a04 NULL
+#define pci_ss_list_8086_2a05 NULL
+#define pci_ss_list_8086_2a06 NULL
+#define pci_ss_list_8086_2a07 NULL
 #define pci_ss_list_8086_3092 NULL
-#define pci_ss_list_8086_3200 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_3200[] = {
+	&pci_ss_info_8086_3200_1775_c200,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_8086_3340[] = {
+	&pci_ss_info_8086_3340_1014_0529,
 	&pci_ss_info_8086_3340_1025_005a,
 	&pci_ss_info_8086_3340_103c_088c,
 	&pci_ss_info_8086_3340_103c_0890,
+	&pci_ss_info_8086_3340_103c_08b0,
+	&pci_ss_info_8086_3340_144d_c00c,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_8086_3341[] = {
+	&pci_ss_info_8086_3341_144d_c00c,
 	NULL
 };
-#define pci_ss_list_8086_3341 NULL
 #define pci_ss_list_8086_3500 NULL
 #define pci_ss_list_8086_3501 NULL
 #define pci_ss_list_8086_3504 NULL
@@ -52503,12 +60276,17 @@
 };
 #define pci_ss_list_8086_3578 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_3580[] = {
+	&pci_ss_info_8086_3580_1014_055c,
 	&pci_ss_info_8086_3580_1028_0139,
 	&pci_ss_info_8086_3580_1028_0163,
 	&pci_ss_info_8086_3580_1028_0196,
 	&pci_ss_info_8086_3580_1734_1055,
+	&pci_ss_info_8086_3580_1775_10d0,
+	&pci_ss_info_8086_3580_1775_ce90,
 	&pci_ss_info_8086_3580_4c53_10b0,
 	&pci_ss_info_8086_3580_4c53_10e0,
+	&pci_ss_info_8086_3580_e4bf_0cc9,
+	&pci_ss_info_8086_3580_e4bf_0cd2,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_3581[] = {
@@ -52516,26 +60294,37 @@
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_3582[] = {
+	&pci_ss_info_8086_3582_1014_0562,
 	&pci_ss_info_8086_3582_1028_0139,
 	&pci_ss_info_8086_3582_1028_0163,
+	&pci_ss_info_8086_3582_1775_10d0,
+	&pci_ss_info_8086_3582_1775_ce90,
 	&pci_ss_info_8086_3582_4c53_10b0,
 	&pci_ss_info_8086_3582_4c53_10e0,
+	&pci_ss_info_8086_3582_e4bf_0cc9,
+	&pci_ss_info_8086_3582_e4bf_0cd2,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_3584[] = {
+	&pci_ss_info_8086_3584_1014_055d,
 	&pci_ss_info_8086_3584_1028_0139,
 	&pci_ss_info_8086_3584_1028_0163,
 	&pci_ss_info_8086_3584_1028_0196,
 	&pci_ss_info_8086_3584_1734_1055,
+	&pci_ss_info_8086_3584_1775_10d0,
+	&pci_ss_info_8086_3584_1775_ce90,
 	&pci_ss_info_8086_3584_4c53_10b0,
 	&pci_ss_info_8086_3584_4c53_10e0,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_8086_3585[] = {
+	&pci_ss_info_8086_3585_1014_055e,
 	&pci_ss_info_8086_3585_1028_0139,
 	&pci_ss_info_8086_3585_1028_0163,
 	&pci_ss_info_8086_3585_1028_0196,
 	&pci_ss_info_8086_3585_1734_1055,
+	&pci_ss_info_8086_3585_1775_10d0,
+	&pci_ss_info_8086_3585_1775_ce90,
 	&pci_ss_info_8086_3585_4c53_10b0,
 	&pci_ss_info_8086_3585_4c53_10e0,
 	NULL
@@ -52568,25 +60357,90 @@
 	&pci_ss_info_8086_359e_1028_0169,
 	NULL
 };
-#define pci_ss_list_8086_4220 NULL
+#define pci_ss_list_8086_35b0 NULL
+#define pci_ss_list_8086_35b1 NULL
+#define pci_ss_list_8086_35b5 NULL
+#define pci_ss_list_8086_35b6 NULL
+#define pci_ss_list_8086_35b7 NULL
+#define pci_ss_list_8086_35c8 NULL
+#define pci_ss_list_8086_3600 NULL
+#define pci_ss_list_8086_3604 NULL
+#define pci_ss_list_8086_3605 NULL
+#define pci_ss_list_8086_3606 NULL
+#define pci_ss_list_8086_3607 NULL
+#define pci_ss_list_8086_3608 NULL
+#define pci_ss_list_8086_3609 NULL
+#define pci_ss_list_8086_360a NULL
+#define pci_ss_list_8086_360b NULL
+#define pci_ss_list_8086_360c NULL
+#define pci_ss_list_8086_360d NULL
+#define pci_ss_list_8086_360e NULL
+#define pci_ss_list_8086_360f NULL
+#define pci_ss_list_8086_3610 NULL
+#define pci_ss_list_8086_4000 NULL
+#define pci_ss_list_8086_4008 NULL
+#define pci_ss_list_8086_4010 NULL
+#define pci_ss_list_8086_4021 NULL
+#define pci_ss_list_8086_4022 NULL
+#define pci_ss_list_8086_4023 NULL
+#define pci_ss_list_8086_4024 NULL
+#define pci_ss_list_8086_4025 NULL
+#define pci_ss_list_8086_4026 NULL
+#define pci_ss_list_8086_4027 NULL
+#define pci_ss_list_8086_4028 NULL
+#define pci_ss_list_8086_4029 NULL
+#define pci_ss_list_8086_402d NULL
+#define pci_ss_list_8086_402e NULL
+#define pci_ss_list_8086_402f NULL
+#define pci_ss_list_8086_4030 NULL
+#define pci_ss_list_8086_4032 NULL
+#define pci_ss_list_8086_4035 NULL
+#define pci_ss_list_8086_4036 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_4220[] = {
+	&pci_ss_info_8086_4220_2731_8086,
+	&pci_ss_info_8086_4220_8086_2731,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_8086_4222[] = {
 	&pci_ss_info_8086_4222_8086_1005,
 	&pci_ss_info_8086_4222_8086_1034,
 	&pci_ss_info_8086_4222_8086_1044,
 	NULL
 };
-#define pci_ss_list_8086_4223 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_4223[] = {
+	&pci_ss_info_8086_4223_1351_103c,
+	NULL
+};
 #define pci_ss_list_8086_4224 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_4227[] = {
+	&pci_ss_info_8086_4227_8086_1011,
 	&pci_ss_info_8086_4227_8086_1014,
 	NULL
 };
+#define pci_ss_list_8086_5001 NULL
 #define pci_ss_list_8086_5200 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_5201[] = {
 	&pci_ss_info_8086_5201_8086_0001,
 	NULL
 };
 #define pci_ss_list_8086_530d NULL
+#define pci_ss_list_8086_65c0 NULL
+#define pci_ss_list_8086_65e2 NULL
+#define pci_ss_list_8086_65e3 NULL
+#define pci_ss_list_8086_65e4 NULL
+#define pci_ss_list_8086_65e5 NULL
+#define pci_ss_list_8086_65e6 NULL
+#define pci_ss_list_8086_65e7 NULL
+#define pci_ss_list_8086_65f0 NULL
+#define pci_ss_list_8086_65f1 NULL
+#define pci_ss_list_8086_65f3 NULL
+#define pci_ss_list_8086_65f5 NULL
+#define pci_ss_list_8086_65f6 NULL
+#define pci_ss_list_8086_65f7 NULL
+#define pci_ss_list_8086_65f8 NULL
+#define pci_ss_list_8086_65f9 NULL
+#define pci_ss_list_8086_65fa NULL
+#define pci_ss_list_8086_65ff NULL
 #define pci_ss_list_8086_7000 NULL
 #define pci_ss_list_8086_7010 NULL
 #define pci_ss_list_8086_7020 NULL
@@ -52633,13 +60487,17 @@
 static const pciSubsystemInfo *pci_ss_list_8086_7190[] = {
 	&pci_ss_info_8086_7190_0e11_0500,
 	&pci_ss_info_8086_7190_0e11_b110,
+	&pci_ss_info_8086_7190_1028_008e,
 	&pci_ss_info_8086_7190_1179_0001,
 	&pci_ss_info_8086_7190_15ad_1976,
 	&pci_ss_info_8086_7190_4c53_1050,
 	&pci_ss_info_8086_7190_4c53_1051,
 	NULL
 };
-#define pci_ss_list_8086_7191 NULL
+static const pciSubsystemInfo *pci_ss_list_8086_7191[] = {
+	&pci_ss_info_8086_7191_1028_008e,
+	NULL
+};
 static const pciSubsystemInfo *pci_ss_list_8086_7192[] = {
 	&pci_ss_info_8086_7192_0e11_0460,
 	&pci_ss_info_8086_7192_4c53_1000,
@@ -52686,6 +60544,7 @@
 	&pci_ss_info_8086_7800_8086_0100,
 	NULL
 };
+#define pci_ss_list_8086_8002 NULL
 #define pci_ss_list_8086_84c4 NULL
 #define pci_ss_list_8086_84c5 NULL
 #define pci_ss_list_8086_84ca NULL
@@ -52711,15 +60570,24 @@
 #define pci_ss_list_8086_9622 NULL
 #define pci_ss_list_8086_9641 NULL
 #define pci_ss_list_8086_96a1 NULL
+#define pci_ss_list_8086_a620 NULL
 #define pci_ss_list_8086_b152 NULL
 #define pci_ss_list_8086_b154 NULL
 static const pciSubsystemInfo *pci_ss_list_8086_b555[] = {
+	&pci_ss_info_8086_b555_12c7_5005,
+	&pci_ss_info_8086_b555_12c7_5006,
 	&pci_ss_info_8086_b555_12d9_000a,
 	&pci_ss_info_8086_b555_4c53_1050,
 	&pci_ss_info_8086_b555_4c53_1051,
 	&pci_ss_info_8086_b555_e4bf_1000,
 	NULL
 };
+#define pci_ss_list_80ee_beef NULL
+#define pci_ss_list_80ee_cafe NULL
+#define pci_ss_list_8384_7618 NULL
+#define pci_ss_list_8384_7670 NULL
+#define pci_ss_list_8384_7672 NULL
+#define pci_ss_list_8686_1010 NULL
 #define pci_ss_list_8800_2008 NULL
 #define pci_ss_list_8c4a_1980 NULL
 #define pci_ss_list_8e2e_3000 NULL
@@ -52912,6 +60780,8 @@
 	&pci_ss_info_9005_008f_15d9_9005,
 	NULL
 };
+#define pci_ss_list_9005_0092 NULL
+#define pci_ss_list_9005_0093 NULL
 static const pciSubsystemInfo *pci_ss_list_9005_00c0[] = {
 	&pci_ss_info_9005_00c0_0e11_f620,
 	&pci_ss_info_9005_00c0_9005_f620,
@@ -52973,9 +60843,32 @@
 	&pci_ss_info_9005_0285_9005_0298,
 	&pci_ss_info_9005_0285_9005_0299,
 	&pci_ss_info_9005_0285_9005_029a,
+	&pci_ss_info_9005_0285_9005_02a4,
+	&pci_ss_info_9005_0285_9005_02a5,
+	&pci_ss_info_9005_0285_9005_02b5,
+	&pci_ss_info_9005_0285_9005_02b6,
+	&pci_ss_info_9005_0285_9005_02b7,
+	&pci_ss_info_9005_0285_9005_02b8,
+	&pci_ss_info_9005_0285_9005_02b9,
+	&pci_ss_info_9005_0285_9005_02ba,
+	&pci_ss_info_9005_0285_9005_02bb,
+	&pci_ss_info_9005_0285_9005_02bc,
+	&pci_ss_info_9005_0285_9005_02bd,
+	&pci_ss_info_9005_0285_9005_02be,
+	&pci_ss_info_9005_0285_9005_02bf,
+	&pci_ss_info_9005_0285_9005_02c0,
+	&pci_ss_info_9005_0285_9005_02c1,
+	&pci_ss_info_9005_0285_9005_02c2,
+	&pci_ss_info_9005_0285_9005_02c3,
+	&pci_ss_info_9005_0285_9005_02c4,
+	&pci_ss_info_9005_0285_9005_02c5,
+	&pci_ss_info_9005_0285_9005_02c6,
+	&pci_ss_info_9005_0285_9005_02c7,
+	&pci_ss_info_9005_0285_9005_02c8,
 	NULL
 };
 static const pciSubsystemInfo *pci_ss_list_9005_0286[] = {
+	&pci_ss_info_9005_0286_1014_034d,
 	&pci_ss_info_9005_0286_1014_9540,
 	&pci_ss_info_9005_0286_1014_9580,
 	&pci_ss_info_9005_0286_9005_028c,
@@ -52996,9 +60889,37 @@
 	&pci_ss_info_9005_0286_9005_02a8,
 	&pci_ss_info_9005_0286_9005_02a9,
 	&pci_ss_info_9005_0286_9005_02aa,
+	&pci_ss_info_9005_0286_9005_02ac,
+	&pci_ss_info_9005_0286_9005_02b3,
+	&pci_ss_info_9005_0286_9005_02b4,
 	&pci_ss_info_9005_0286_9005_0800,
 	NULL
 };
+static const pciSubsystemInfo *pci_ss_list_9005_0410[] = {
+	&pci_ss_info_9005_0410_9005_0410,
+	&pci_ss_info_9005_0410_9005_0411,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_9005_0412[] = {
+	&pci_ss_info_9005_0412_9005_0412,
+	&pci_ss_info_9005_0412_9005_0413,
+	NULL
+};
+#define pci_ss_list_9005_041e NULL
+static const pciSubsystemInfo *pci_ss_list_9005_041f[] = {
+	&pci_ss_info_9005_041f_9005_041f,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_9005_0430[] = {
+	&pci_ss_info_9005_0430_9005_0430,
+	NULL
+};
+static const pciSubsystemInfo *pci_ss_list_9005_0432[] = {
+	&pci_ss_info_9005_0432_9005_0432,
+	NULL
+};
+#define pci_ss_list_9005_043e NULL
+#define pci_ss_list_9005_043f NULL
 static const pciSubsystemInfo *pci_ss_list_9005_0500[] = {
 	&pci_ss_info_9005_0500_1014_02c1,
 	&pci_ss_info_9005_0500_1014_02c2,
@@ -53024,7 +60945,11 @@
 #define pci_ss_list_9005_8014 NULL
 #define pci_ss_list_9005_8015 NULL
 #define pci_ss_list_9005_8016 NULL
-#define pci_ss_list_9005_8017 NULL
+static const pciSubsystemInfo *pci_ss_list_9005_8017[] = {
+	&pci_ss_info_9005_8017_9005_0044,
+	&pci_ss_info_9005_8017_9005_0045,
+	NULL
+};
 #define pci_ss_list_9005_801c NULL
 #define pci_ss_list_9005_801d NULL
 #define pci_ss_list_9005_801e NULL
@@ -53077,6 +61002,7 @@
 #define pci_ss_list_9902_0003 NULL
 #define pci_ss_list_a727_0013 NULL
 #define pci_ss_list_aecb_6250 NULL
+#define pci_ss_list_affe_02e1 NULL
 #define pci_ss_list_affe_dead NULL
 #define pci_ss_list_cafe_0003 NULL
 #define pci_ss_list_cddd_0101 NULL
@@ -53084,7 +61010,9 @@
 #define pci_ss_list_d161_0205 NULL
 #define pci_ss_list_d161_0210 NULL
 #define pci_ss_list_d161_0405 NULL
+#define pci_ss_list_d161_0406 NULL
 #define pci_ss_list_d161_0410 NULL
+#define pci_ss_list_d161_0411 NULL
 #define pci_ss_list_d161_2400 NULL
 #define pci_ss_list_d4d4_0601 NULL
 #define pci_ss_list_deaf_9050 NULL
@@ -53096,11 +61024,7 @@
 	&pci_ss_info_e159_0001_0059_0001,
 	&pci_ss_info_e159_0001_0059_0003,
 	&pci_ss_info_e159_0001_00a7_0001,
-	&pci_ss_info_e159_0001_6159_0001,
-	&pci_ss_info_e159_0001_79fe_0001,
 	&pci_ss_info_e159_0001_8086_0003,
-	&pci_ss_info_e159_0001_b1b9_0001,
-	&pci_ss_info_e159_0001_b1b9_0003,
 	NULL
 };
 #define pci_ss_list_e159_0002 NULL
@@ -53156,6 +61080,7 @@
 };
 #endif
 #define pci_ss_list_001a NULL
+#define pci_ss_list_001c NULL
 #define pci_ss_list_0033 NULL
 static const pciSubsystemInfo *pci_ss_list_003d[] = {
 	&pci_ss_info_003d_0008,
@@ -53196,6 +61121,7 @@
 	&pci_ss_info_0070_e807,
 	&pci_ss_info_0070_e817,
 	&pci_ss_info_0070_ff01,
+	&pci_ss_info_0070_ff92,
 	NULL
 };
 #endif
@@ -53212,7 +61138,9 @@
 	NULL
 };
 #endif
+#define pci_ss_list_00f5 NULL
 #define pci_ss_list_0100 NULL
+#define pci_ss_list_0123 NULL
 #define pci_ss_list_018a NULL
 #define pci_ss_list_021b NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -53223,16 +61151,20 @@
 #endif
 #define pci_ss_list_0291 NULL
 #define pci_ss_list_02ac NULL
+#define pci_ss_list_0315 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_0357[] = {
 	&pci_ss_info_0357_000a,
 	NULL
 };
 #endif
+#define pci_ss_list_0403 NULL
 #define pci_ss_list_0432 NULL
 #define pci_ss_list_045e NULL
+#define pci_ss_list_0482 NULL
 #define pci_ss_list_04cf NULL
 #define pci_ss_list_050d NULL
+#define pci_ss_list_05a9 NULL
 #define pci_ss_list_05e3 NULL
 #define pci_ss_list_066f NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -53244,19 +61176,29 @@
 };
 #endif
 #define pci_ss_list_067b NULL
+#define pci_ss_list_069d NULL
 #define pci_ss_list_0721 NULL
+#define pci_ss_list_07ca NULL
 #define pci_ss_list_07e2 NULL
+#define pci_ss_list_0842 NULL
+#define pci_ss_list_08ff NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_0925[] = {
 	&pci_ss_info_0925_1234,
 	NULL
 };
 #endif
+#define pci_ss_list_093a NULL
 #define pci_ss_list_09c1 NULL
 #define pci_ss_list_0a89 NULL
+#define pci_ss_list_0ace NULL
+#define pci_ss_list_0b0b NULL
 #define pci_ss_list_0b49 NULL
+#define pci_ss_list_0ccd NULL
 static const pciSubsystemInfo *pci_ss_list_0e11[] = {
+	&pci_ss_info_0e11_000b,
 	&pci_ss_info_0e11_0012,
+	&pci_ss_info_0e11_001e,
 	&pci_ss_info_0e11_0022,
 	&pci_ss_info_0e11_0023,
 	&pci_ss_info_0e11_0024,
@@ -53271,6 +61213,7 @@
 	&pci_ss_info_0e11_007d,
 	&pci_ss_info_0e11_007e,
 	&pci_ss_info_0e11_0085,
+	&pci_ss_info_0e11_0088,
 	&pci_ss_info_0e11_0091,
 	&pci_ss_info_0e11_0097,
 	&pci_ss_info_0e11_0098,
@@ -53278,6 +61221,7 @@
 	&pci_ss_info_0e11_009a,
 	&pci_ss_info_0e11_00ac,
 	&pci_ss_info_0e11_00b8,
+	&pci_ss_info_0e11_00b9,
 	&pci_ss_info_0e11_00bb,
 	&pci_ss_info_0e11_00c1,
 	&pci_ss_info_0e11_00ca,
@@ -53352,6 +61296,7 @@
 	&pci_ss_info_0e11_b126,
 	&pci_ss_info_0e11_b134,
 	&pci_ss_info_0e11_b13c,
+	&pci_ss_info_0e11_b143,
 	&pci_ss_info_0e11_b144,
 	&pci_ss_info_0e11_b14d,
 	&pci_ss_info_0e11_b15a,
@@ -53370,7 +61315,9 @@
 	&pci_ss_info_0e11_f620,
 	NULL
 };
+#define pci_ss_list_0e21 NULL
 #define pci_ss_list_0e55 NULL
+#define pci_ss_list_0eac NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1000[] = {
 	&pci_ss_info_1000_0001,
@@ -53391,8 +61338,24 @@
 	&pci_ss_info_1000_0531,
 	&pci_ss_info_1000_0532,
 	&pci_ss_info_1000_1000,
+	&pci_ss_info_1000_1001,
+	&pci_ss_info_1000_1002,
+	&pci_ss_info_1000_1003,
+	&pci_ss_info_1000_1004,
+	&pci_ss_info_1000_1005,
+	&pci_ss_info_1000_1006,
+	&pci_ss_info_1000_1008,
+	&pci_ss_info_1000_100a,
+	&pci_ss_info_1000_100c,
+	&pci_ss_info_1000_100d,
+	&pci_ss_info_1000_100e,
+	&pci_ss_info_1000_100f,
 	&pci_ss_info_1000_1010,
+	&pci_ss_info_1000_1011,
+	&pci_ss_info_1000_1012,
 	&pci_ss_info_1000_1020,
+	&pci_ss_info_1000_2004,
+	&pci_ss_info_1000_2005,
 	&pci_ss_info_1000_3004,
 	&pci_ss_info_1000_3008,
 	&pci_ss_info_1000_4523,
@@ -53447,6 +61410,7 @@
 	&pci_ss_info_1002_0323,
 	&pci_ss_info_1002_0448,
 	&pci_ss_info_1002_053a,
+	&pci_ss_info_1002_0908,
 	&pci_ss_info_1002_0b12,
 	&pci_ss_info_1002_0b13,
 	&pci_ss_info_1002_0d02,
@@ -53456,6 +61420,8 @@
 	&pci_ss_info_1002_2001,
 	&pci_ss_info_1002_2f72,
 	&pci_ss_info_1002_4336,
+	&pci_ss_info_1002_4379,
+	&pci_ss_info_1002_437a,
 	&pci_ss_info_1002_4722,
 	&pci_ss_info_1002_4723,
 	&pci_ss_info_1002_4742,
@@ -53479,6 +61445,7 @@
 	&pci_ss_info_1002_5654,
 	&pci_ss_info_1002_5954,
 	&pci_ss_info_1002_5955,
+	&pci_ss_info_1002_5964,
 	&pci_ss_info_1002_5965,
 	&pci_ss_info_1002_5c63,
 	&pci_ss_info_1002_8001,
@@ -53502,7 +61469,12 @@
 #define pci_ss_list_1006 NULL
 #define pci_ss_list_1007 NULL
 #define pci_ss_list_1008 NULL
-#define pci_ss_list_100a NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_100a[] = {
+	&pci_ss_info_100a_147b,
+	NULL
+};
+#endif
 #define pci_ss_list_100b NULL
 #define pci_ss_list_100c NULL
 #define pci_ss_list_100d NULL
@@ -53522,6 +61494,7 @@
 	&pci_ss_info_1011_4d10,
 	&pci_ss_info_1011_500a,
 	&pci_ss_info_1011_500b,
+	&pci_ss_info_1011_def1,
 	NULL
 };
 #define pci_ss_list_1012 NULL
@@ -53558,6 +61531,8 @@
 	&pci_ss_info_1014_0131,
 	&pci_ss_info_1014_0143,
 	&pci_ss_info_1014_0145,
+	&pci_ss_info_1014_0148,
+	&pci_ss_info_1014_0153,
 	&pci_ss_info_1014_0154,
 	&pci_ss_info_1014_0166,
 	&pci_ss_info_1014_016d,
@@ -53639,6 +61614,10 @@
 	&pci_ss_info_1014_02ed,
 	&pci_ss_info_1014_02f2,
 	&pci_ss_info_1014_030d,
+	&pci_ss_info_1014_034d,
+	&pci_ss_info_1014_0363,
+	&pci_ss_info_1014_0364,
+	&pci_ss_info_1014_0365,
 	&pci_ss_info_1014_0502,
 	&pci_ss_info_1014_0503,
 	&pci_ss_info_1014_0506,
@@ -53651,9 +61630,15 @@
 	&pci_ss_info_1014_0517,
 	&pci_ss_info_1014_051a,
 	&pci_ss_info_1014_051c,
+	&pci_ss_info_1014_0522,
+	&pci_ss_info_1014_0524,
 	&pci_ss_info_1014_0528,
+	&pci_ss_info_1014_0529,
 	&pci_ss_info_1014_052c,
+	&pci_ss_info_1014_052d,
+	&pci_ss_info_1014_052e,
 	&pci_ss_info_1014_0535,
+	&pci_ss_info_1014_0537,
 	&pci_ss_info_1014_053a,
 	&pci_ss_info_1014_053b,
 	&pci_ss_info_1014_053c,
@@ -53662,7 +61647,16 @@
 	&pci_ss_info_1014_0540,
 	&pci_ss_info_1014_0545,
 	&pci_ss_info_1014_0549,
+	&pci_ss_info_1014_054d,
 	&pci_ss_info_1014_0556,
+	&pci_ss_info_1014_0559,
+	&pci_ss_info_1014_055c,
+	&pci_ss_info_1014_055d,
+	&pci_ss_info_1014_055e,
+	&pci_ss_info_1014_055f,
+	&pci_ss_info_1014_0562,
+	&pci_ss_info_1014_058a,
+	&pci_ss_info_1014_0598,
 	&pci_ss_info_1014_1010,
 	&pci_ss_info_1014_1025,
 	&pci_ss_info_1014_105c,
@@ -53706,7 +61700,14 @@
 	NULL
 };
 #endif
-#define pci_ss_list_101a NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_101a[] = {
+	&pci_ss_info_101a_0019,
+	&pci_ss_info_101a_001f,
+	&pci_ss_info_101a_0ece,
+	NULL
+};
+#endif
 #define pci_ss_list_101b NULL
 #define pci_ss_list_101c NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -53753,23 +61754,23 @@
 	&pci_ss_info_1023_9880,
 	NULL
 };
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciSubsystemInfo *pci_ss_list_1024[] = {
-	&pci_ss_info_1024_0134,
-	NULL
-};
-#endif
+#define pci_ss_list_1024 NULL
 static const pciSubsystemInfo *pci_ss_list_1025[] = {
+	&pci_ss_info_1025_0009,
 	&pci_ss_info_1025_000e,
 	&pci_ss_info_1025_0018,
+	&pci_ss_info_1025_003c,
 	&pci_ss_info_1025_004d,
 	&pci_ss_info_1025_005a,
 	&pci_ss_info_1025_006a,
+	&pci_ss_info_1025_0079,
+	&pci_ss_info_1025_0080,
 	&pci_ss_info_1025_0310,
 	&pci_ss_info_1025_0315,
 	&pci_ss_info_1025_1003,
 	&pci_ss_info_1025_1007,
 	&pci_ss_info_1025_1016,
+	&pci_ss_info_1025_1605,
 	&pci_ss_info_1025_8013,
 	&pci_ss_info_1025_8920,
 	&pci_ss_info_1025_8921,
@@ -53779,6 +61780,9 @@
 	&pci_ss_info_1028_0001,
 	&pci_ss_info_1028_0002,
 	&pci_ss_info_1028_0003,
+	&pci_ss_info_1028_0004,
+	&pci_ss_info_1028_0012,
+	&pci_ss_info_1028_0015,
 	&pci_ss_info_1028_002e,
 	&pci_ss_info_1028_0074,
 	&pci_ss_info_1028_0075,
@@ -53794,6 +61798,7 @@
 	&pci_ss_info_1028_0087,
 	&pci_ss_info_1028_0088,
 	&pci_ss_info_1028_0089,
+	&pci_ss_info_1028_008e,
 	&pci_ss_info_1028_008f,
 	&pci_ss_info_1028_0090,
 	&pci_ss_info_1028_0091,
@@ -53810,6 +61815,7 @@
 	&pci_ss_info_1028_00b1,
 	&pci_ss_info_1028_00bb,
 	&pci_ss_info_1028_00c5,
+	&pci_ss_info_1028_00c7,
 	&pci_ss_info_1028_00ce,
 	&pci_ss_info_1028_00d1,
 	&pci_ss_info_1028_00d9,
@@ -53819,6 +61825,7 @@
 	&pci_ss_info_1028_0109,
 	&pci_ss_info_1028_010a,
 	&pci_ss_info_1028_010e,
+	&pci_ss_info_1028_011b,
 	&pci_ss_info_1028_011c,
 	&pci_ss_info_1028_011d,
 	&pci_ss_info_1028_0121,
@@ -53827,6 +61834,8 @@
 	&pci_ss_info_1028_012a,
 	&pci_ss_info_1028_0134,
 	&pci_ss_info_1028_0139,
+	&pci_ss_info_1028_013f,
+	&pci_ss_info_1028_0149,
 	&pci_ss_info_1028_014a,
 	&pci_ss_info_1028_014e,
 	&pci_ss_info_1028_0151,
@@ -53842,12 +61851,15 @@
 	&pci_ss_info_1028_0179,
 	&pci_ss_info_1028_0182,
 	&pci_ss_info_1028_0183,
+	&pci_ss_info_1028_0187,
 	&pci_ss_info_1028_0188,
+	&pci_ss_info_1028_018d,
 	&pci_ss_info_1028_0196,
 	&pci_ss_info_1028_019a,
 	&pci_ss_info_1028_019d,
 	&pci_ss_info_1028_01a2,
 	&pci_ss_info_1028_01ad,
+	&pci_ss_info_1028_01af,
 	&pci_ss_info_1028_0287,
 	&pci_ss_info_1028_0291,
 	&pci_ss_info_1028_0407,
@@ -53863,6 +61875,14 @@
 	&pci_ss_info_1028_1010,
 	&pci_ss_info_1028_1079,
 	&pci_ss_info_1028_1111,
+	&pci_ss_info_1028_1f01,
+	&pci_ss_info_1028_1f02,
+	&pci_ss_info_1028_1f03,
+	&pci_ss_info_1028_1f0a,
+	&pci_ss_info_1028_1f0b,
+	&pci_ss_info_1028_1f0c,
+	&pci_ss_info_1028_1f0d,
+	&pci_ss_info_1028_1f11,
 	&pci_ss_info_1028_4082,
 	&pci_ss_info_1028_4134,
 	&pci_ss_info_1028_8082,
@@ -54032,6 +62052,8 @@
 	&pci_ss_info_1033_80e5,
 	&pci_ss_info_1033_8110,
 	&pci_ss_info_1033_8112,
+	&pci_ss_info_1033_8287,
+	&pci_ss_info_1033_8336,
 	NULL
 };
 #define pci_ss_list_1034 NULL
@@ -54059,10 +62081,13 @@
 	&pci_ss_info_103c_000d,
 	&pci_ss_info_103c_0024,
 	&pci_ss_info_103c_006a,
+	&pci_ss_info_103c_0131,
 	&pci_ss_info_103c_03a2,
 	&pci_ss_info_103c_0850,
 	&pci_ss_info_103c_088c,
 	&pci_ss_info_103c_0890,
+	&pci_ss_info_103c_08b0,
+	&pci_ss_info_103c_0944,
 	&pci_ss_info_103c_099c,
 	&pci_ss_info_103c_1040,
 	&pci_ss_info_103c_1041,
@@ -54084,6 +62109,7 @@
 	&pci_ss_info_103c_10cb,
 	&pci_ss_info_103c_10cc,
 	&pci_ss_info_103c_10cd,
+	&pci_ss_info_103c_10e1,
 	&pci_ss_info_103c_10e3,
 	&pci_ss_info_103c_10e4,
 	&pci_ss_info_103c_10ea,
@@ -54094,36 +62120,66 @@
 	&pci_ss_info_103c_1223,
 	&pci_ss_info_103c_1226,
 	&pci_ss_info_103c_1227,
+	&pci_ss_info_103c_1240,
+	&pci_ss_info_103c_125a,
 	&pci_ss_info_103c_1279,
 	&pci_ss_info_103c_1282,
 	&pci_ss_info_103c_128a,
 	&pci_ss_info_103c_128b,
+	&pci_ss_info_103c_1292,
 	&pci_ss_info_103c_12a4,
 	&pci_ss_info_103c_12a6,
 	&pci_ss_info_103c_12a8,
+	&pci_ss_info_103c_12ba,
 	&pci_ss_info_103c_12bc,
 	&pci_ss_info_103c_12c1,
 	&pci_ss_info_103c_12c3,
+	&pci_ss_info_103c_12c5,
 	&pci_ss_info_103c_12ca,
 	&pci_ss_info_103c_12cf,
 	&pci_ss_info_103c_12d5,
+	&pci_ss_info_103c_12d7,
+	&pci_ss_info_103c_12dd,
 	&pci_ss_info_103c_12f4,
 	&pci_ss_info_103c_12fa,
 	&pci_ss_info_103c_1300,
 	&pci_ss_info_103c_1301,
+	&pci_ss_info_103c_1330,
+	&pci_ss_info_103c_1340,
 	&pci_ss_info_103c_1356,
+	&pci_ss_info_103c_1706,
+	&pci_ss_info_103c_1707,
+	&pci_ss_info_103c_170c,
+	&pci_ss_info_103c_2a09,
 	&pci_ss_info_103c_2a0d,
+	&pci_ss_info_103c_3006,
+	&pci_ss_info_103c_3015,
+	&pci_ss_info_103c_3070,
+	&pci_ss_info_103c_308a,
 	&pci_ss_info_103c_308b,
+	&pci_ss_info_103c_309f,
+	&pci_ss_info_103c_30a1,
 	&pci_ss_info_103c_3100,
 	&pci_ss_info_103c_3101,
 	&pci_ss_info_103c_3102,
 	&pci_ss_info_103c_3103,
+	&pci_ss_info_103c_3109,
+	&pci_ss_info_103c_3225,
 	&pci_ss_info_103c_3226,
 	&pci_ss_info_103c_3227,
 	&pci_ss_info_103c_60e7,
 	&pci_ss_info_103c_7031,
 	&pci_ss_info_103c_7032,
+	&pci_ss_info_103c_7037,
+	&pci_ss_info_103c_7038,
 	&pci_ss_info_103c_7039,
+	&pci_ss_info_103c_703b,
+	&pci_ss_info_103c_703c,
+	&pci_ss_info_103c_703d,
+	&pci_ss_info_103c_7044,
+	&pci_ss_info_103c_7051,
+	&pci_ss_info_103c_7052,
+	&pci_ss_info_103c_def1,
 	NULL
 };
 #define pci_ss_list_103e NULL
@@ -54144,7 +62200,10 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1043[] = {
+	&pci_ss_info_1043_0001,
 	&pci_ss_info_1043_002a,
+	&pci_ss_info_1043_010c,
+	&pci_ss_info_1043_010d,
 	&pci_ss_info_1043_0120,
 	&pci_ss_info_1043_0127,
 	&pci_ss_info_1043_0200,
@@ -54152,11 +62211,15 @@
 	&pci_ss_info_1043_0202,
 	&pci_ss_info_1043_0205,
 	&pci_ss_info_1043_0210,
+	&pci_ss_info_1043_02fb,
 	&pci_ss_info_1043_032e,
 	&pci_ss_info_1043_0c11,
 	&pci_ss_info_1043_100f,
+	&pci_ss_info_1043_1045,
 	&pci_ss_info_1043_1106,
+	&pci_ss_info_1043_120f,
 	&pci_ss_info_1043_130f,
+	&pci_ss_info_1043_1382,
 	&pci_ss_info_1043_1702,
 	&pci_ss_info_1043_1703,
 	&pci_ss_info_1043_1707,
@@ -54173,12 +62236,14 @@
 	&pci_ss_info_1043_400b,
 	&pci_ss_info_1043_4015,
 	&pci_ss_info_1043_4016,
+	&pci_ss_info_1043_4021,
 	&pci_ss_info_1043_402f,
 	&pci_ss_info_1043_4031,
 	&pci_ss_info_1043_405b,
 	&pci_ss_info_1043_405f,
 	&pci_ss_info_1043_4823,
 	&pci_ss_info_1043_4840,
+	&pci_ss_info_1043_4842,
 	&pci_ss_info_1043_4843,
 	&pci_ss_info_1043_4845,
 	&pci_ss_info_1043_4862,
@@ -54196,6 +62261,7 @@
 	&pci_ss_info_1043_8044,
 	&pci_ss_info_1043_8052,
 	&pci_ss_info_1043_8053,
+	&pci_ss_info_1043_8063,
 	&pci_ss_info_1043_8064,
 	&pci_ss_info_1043_806f,
 	&pci_ss_info_1043_8077,
@@ -54227,6 +62293,7 @@
 	&pci_ss_info_1043_80f8,
 	&pci_ss_info_1043_8109,
 	&pci_ss_info_1043_810f,
+	&pci_ss_info_1043_8113,
 	&pci_ss_info_1043_811a,
 	&pci_ss_info_1043_812a,
 	&pci_ss_info_1043_8134,
@@ -54237,8 +62304,14 @@
 	&pci_ss_info_1043_814a,
 	&pci_ss_info_1043_814e,
 	&pci_ss_info_1043_815a,
+	&pci_ss_info_1043_815b,
 	&pci_ss_info_1043_817b,
 	&pci_ss_info_1043_81a6,
+	&pci_ss_info_1043_81b0,
+	&pci_ss_info_1043_81bc,
+	&pci_ss_info_1043_81cd,
+	&pci_ss_info_1043_81ce,
+	&pci_ss_info_1043_824d,
 	&pci_ss_info_1043_c002,
 	&pci_ss_info_1043_c003,
 	&pci_ss_info_1043_c004,
@@ -54350,7 +62423,10 @@
 };
 #endif
 #define pci_ss_list_1049 NULL
-#define pci_ss_list_104a NULL
+static const pciSubsystemInfo *pci_ss_list_104a[] = {
+	&pci_ss_info_104a_0500,
+	NULL
+};
 #define pci_ss_list_104b NULL
 static const pciSubsystemInfo *pci_ss_list_104c[] = {
 	&pci_ss_info_104c_9066,
@@ -54378,6 +62454,9 @@
 	&pci_ss_info_104d_80df,
 	&pci_ss_info_104d_80e7,
 	&pci_ss_info_104d_810f,
+	&pci_ss_info_104d_813c,
+	&pci_ss_info_104d_8140,
+	&pci_ss_info_104d_814e,
 	&pci_ss_info_104d_830b,
 	NULL
 };
@@ -54391,10 +62470,16 @@
 };
 #endif
 #define pci_ss_list_1051 NULL
-#define pci_ss_list_1052 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1052[] = {
+	&pci_ss_info_1052_168c,
+	NULL
+};
+#endif
 #define pci_ss_list_1053 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1054[] = {
+	&pci_ss_info_1054_3016,
 	&pci_ss_info_1054_7018,
 	NULL
 };
@@ -54427,18 +62512,24 @@
 	&pci_ss_info_105a_0275,
 	&pci_ss_info_105a_1275,
 	&pci_ss_info_105a_2168,
+	&pci_ss_info_105a_4600,
+	&pci_ss_info_105a_4610,
 	&pci_ss_info_105a_4d30,
 	&pci_ss_info_105a_4d33,
 	&pci_ss_info_105a_4d39,
 	&pci_ss_info_105a_4d68,
 	&pci_ss_info_105a_5168,
 	&pci_ss_info_105a_6269,
+	&pci_ss_info_105a_8601,
+	&pci_ss_info_105a_8602,
 	NULL
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_105b[] = {
 	&pci_ss_info_105b_0c19,
+	&pci_ss_info_105b_0c43,
+	&pci_ss_info_105b_0c81,
 	NULL
 };
 #endif
@@ -54550,9 +62641,13 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_107b[] = {
+	&pci_ss_info_107b_0300,
+	&pci_ss_info_107b_1040,
 	&pci_ss_info_107b_3015,
 	&pci_ss_info_107b_4009,
+	&pci_ss_info_107b_5048,
 	&pci_ss_info_107b_5350,
+	&pci_ss_info_107b_6400,
 	&pci_ss_info_107b_8030,
 	&pci_ss_info_107b_8054,
 	&pci_ss_info_107b_8920,
@@ -54569,6 +62664,7 @@
 	&pci_ss_info_107d_2840,
 	&pci_ss_info_107d_2842,
 	&pci_ss_info_107d_2896,
+	&pci_ss_info_107d_2a68,
 	&pci_ss_info_107d_5330,
 	&pci_ss_info_107d_5350,
 	&pci_ss_info_107d_6606,
@@ -54754,6 +62850,15 @@
 	&pci_ss_info_10a9_8010,
 	&pci_ss_info_10a9_8011,
 	&pci_ss_info_10a9_8012,
+	&pci_ss_info_10a9_8013,
+	&pci_ss_info_10a9_8014,
+	&pci_ss_info_10a9_8018,
+	&pci_ss_info_10a9_801a,
+	&pci_ss_info_10a9_801b,
+	&pci_ss_info_10a9_801c,
+	&pci_ss_info_10a9_8020,
+	&pci_ss_info_10a9_8021,
+	&pci_ss_info_10a9_8024,
 	NULL
 };
 #endif
@@ -54802,6 +62907,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_10b5[] = {
 	&pci_ss_info_10b5_1067,
+	&pci_ss_info_10b5_1123,
 	&pci_ss_info_10b5_1172,
 	&pci_ss_info_10b5_2036,
 	&pci_ss_info_10b5_2221,
@@ -54867,6 +62973,7 @@
 	&pci_ss_info_10b7_5a57,
 	&pci_ss_info_10b7_5b57,
 	&pci_ss_info_10b7_5c57,
+	&pci_ss_info_10b7_615b,
 	&pci_ss_info_10b7_615c,
 	&pci_ss_info_10b7_6556,
 	&pci_ss_info_10b7_656a,
@@ -54874,6 +62981,7 @@
 	&pci_ss_info_10b7_7000,
 	&pci_ss_info_10b7_9004,
 	&pci_ss_info_10b7_9005,
+	&pci_ss_info_10b7_9054,
 	&pci_ss_info_10b7_9055,
 	&pci_ss_info_10b7_9800,
 	&pci_ss_info_10b7_9805,
@@ -54990,6 +63098,8 @@
 	&pci_ss_info_10cf_10b4,
 	&pci_ss_info_10cf_1115,
 	&pci_ss_info_10cf_1143,
+	&pci_ss_info_10cf_11c4,
+	&pci_ss_info_10cf_1279,
 	NULL
 };
 #endif
@@ -55012,10 +63122,17 @@
 	&pci_ss_info_10de_000f,
 	&pci_ss_info_10de_001e,
 	&pci_ss_info_10de_0020,
+	&pci_ss_info_10de_002e,
 	&pci_ss_info_10de_006b,
 	&pci_ss_info_10de_0091,
 	&pci_ss_info_10de_00a1,
 	&pci_ss_info_10de_0179,
+	&pci_ss_info_10de_01dc,
+	&pci_ss_info_10de_0244,
+	&pci_ss_info_10de_029b,
+	&pci_ss_info_10de_042b,
+	&pci_ss_info_10de_0c11,
+	&pci_ss_info_10de_cb84,
 	NULL
 };
 #define pci_ss_list_10df NULL
@@ -55060,6 +63177,7 @@
 	&pci_ss_info_10f1_0002,
 	&pci_ss_info_10f1_2462,
 	&pci_ss_info_10f1_2466,
+	&pci_ss_info_10f1_2891,
 	NULL
 };
 #endif
@@ -55087,6 +63205,8 @@
 static const pciSubsystemInfo *pci_ss_list_10fc[] = {
 	&pci_ss_info_10fc_d003,
 	&pci_ss_info_10fc_d035,
+	&pci_ss_info_10fc_d038,
+	&pci_ss_info_10fc_d039,
 	NULL
 };
 #endif
@@ -55118,6 +63238,7 @@
 	&pci_ss_info_1102_0058,
 	&pci_ss_info_1102_1001,
 	&pci_ss_info_1102_1002,
+	&pci_ss_info_1102_1003,
 	&pci_ss_info_1102_1006,
 	&pci_ss_info_1102_1007,
 	&pci_ss_info_1102_100a,
@@ -55164,8 +63285,6 @@
 	&pci_ss_info_1103_0004,
 	&pci_ss_info_1103_0005,
 	&pci_ss_info_1103_0006,
-	&pci_ss_info_1103_0007,
-	&pci_ss_info_1103_0008,
 	NULL
 };
 #endif
@@ -55186,7 +63305,9 @@
 	&pci_ss_info_1106_3059,
 	&pci_ss_info_1106_3227,
 	&pci_ss_info_1106_4161,
+	&pci_ss_info_1106_4170,
 	&pci_ss_info_1106_4511,
+	&pci_ss_info_1106_4552,
 	NULL
 };
 #endif
@@ -55246,11 +63367,14 @@
 	&pci_ss_info_1113_2220,
 	&pci_ss_info_1113_2242,
 	&pci_ss_info_1113_4203,
+	&pci_ss_info_1113_8201,
 	&pci_ss_info_1113_9211,
 	&pci_ss_info_1113_d301,
 	&pci_ss_info_1113_ec01,
 	&pci_ss_info_1113_ee03,
 	&pci_ss_info_1113_ee08,
+	&pci_ss_info_1113_ee20,
+	&pci_ss_info_1113_ee24,
 	NULL
 };
 #endif
@@ -55308,6 +63432,7 @@
 #define pci_ss_list_1130 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1131[] = {
+	&pci_ss_info_1131_0000,
 	&pci_ss_info_1131_2001,
 	&pci_ss_info_1131_2004,
 	&pci_ss_info_1131_2005,
@@ -55453,7 +63578,12 @@
 #define pci_ss_list_1151 NULL
 #define pci_ss_list_1152 NULL
 #define pci_ss_list_1153 NULL
-#define pci_ss_list_1154 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1154[] = {
+	&pci_ss_info_1154_0330,
+	NULL
+};
+#endif
 #define pci_ss_list_1155 NULL
 #define pci_ss_list_1156 NULL
 #define pci_ss_list_1157 NULL
@@ -55484,6 +63614,7 @@
 #define pci_ss_list_1165 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1166[] = {
+	&pci_ss_info_1166_0132,
 	&pci_ss_info_1166_1648,
 	NULL
 };
@@ -55499,6 +63630,7 @@
 #define pci_ss_list_116f NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1170[] = {
+	&pci_ss_info_1170_002f,
 	&pci_ss_info_1170_3209,
 	NULL
 };
@@ -55522,6 +63654,7 @@
 	&pci_ss_info_1179_ff00,
 	&pci_ss_info_1179_ff01,
 	&pci_ss_info_1179_ff10,
+	&pci_ss_info_1179_ff31,
 	NULL
 };
 #endif
@@ -55578,11 +63711,16 @@
 	&pci_ss_info_1186_3a23,
 	&pci_ss_info_1186_3a24,
 	&pci_ss_info_1186_3a63,
+	&pci_ss_info_1186_3a93,
 	&pci_ss_info_1186_3a94,
+	&pci_ss_info_1186_3ab0,
 	&pci_ss_info_1186_3b00,
 	&pci_ss_info_1186_3b01,
 	&pci_ss_info_1186_3b04,
 	&pci_ss_info_1186_3b05,
+	&pci_ss_info_1186_3b08,
+	&pci_ss_info_1186_3c08,
+	&pci_ss_info_1186_3c09,
 	&pci_ss_info_1186_4c00,
 	&pci_ss_info_1186_7801,
 	&pci_ss_info_1186_8139,
@@ -55603,7 +63741,12 @@
 #define pci_ss_list_1192 NULL
 #define pci_ss_list_1193 NULL
 #define pci_ss_list_1194 NULL
-#define pci_ss_list_1195 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1195[] = {
+	&pci_ss_info_1195_1320,
+	NULL
+};
+#endif
 #define pci_ss_list_1196 NULL
 #define pci_ss_list_1197 NULL
 #define pci_ss_list_1198 NULL
@@ -55622,6 +63765,8 @@
 static const pciSubsystemInfo *pci_ss_list_11a4[] = {
 	&pci_ss_info_11a4_000a,
 	&pci_ss_info_11a4_000b,
+	&pci_ss_info_11a4_0028,
+	&pci_ss_info_11a4_0038,
 	NULL
 };
 #endif
@@ -55638,6 +63783,7 @@
 	&pci_ss_info_11ab_1021,
 	&pci_ss_info_11ab_3521,
 	&pci_ss_info_11ab_3621,
+	&pci_ss_info_11ab_4320,
 	&pci_ss_info_11ab_5021,
 	&pci_ss_info_11ab_5221,
 	&pci_ss_info_11ab_5321,
@@ -55682,6 +63828,7 @@
 	&pci_ss_info_11bd_002b,
 	&pci_ss_info_11bd_002d,
 	&pci_ss_info_11bd_002e,
+	&pci_ss_info_11bd_0044,
 	NULL
 };
 #endif
@@ -55990,6 +64137,7 @@
 	&pci_ss_info_1259_2701,
 	&pci_ss_info_1259_2702,
 	&pci_ss_info_1259_2703,
+	&pci_ss_info_1259_2704,
 	&pci_ss_info_1259_2800,
 	&pci_ss_info_1259_2970,
 	&pci_ss_info_1259_2971,
@@ -56227,6 +64375,7 @@
 	&pci_ss_info_12b9_00ab,
 	&pci_ss_info_12b9_00ac,
 	&pci_ss_info_12b9_00ad,
+	&pci_ss_info_12b9_00c4,
 	NULL
 };
 #endif
@@ -56245,12 +64394,24 @@
 #define pci_ss_list_12c1 NULL
 #define pci_ss_list_12c2 NULL
 #define pci_ss_list_12c3 NULL
-#define pci_ss_list_12c4 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_12c4[] = {
+	&pci_ss_info_12c4_0200,
+	&pci_ss_info_12c4_0201,
+	&pci_ss_info_12c4_0202,
+	&pci_ss_info_12c4_0203,
+	&pci_ss_info_12c4_0210,
+	&pci_ss_info_12c4_0211,
+	NULL
+};
+#endif
 #define pci_ss_list_12c5 NULL
 #define pci_ss_list_12c6 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_12c7[] = {
 	&pci_ss_info_12c7_4001,
+	&pci_ss_info_12c7_5005,
+	&pci_ss_info_12c7_5006,
 	NULL
 };
 #endif
@@ -56276,6 +64437,7 @@
 	&pci_ss_info_12d9_0002,
 	&pci_ss_info_12d9_000a,
 	&pci_ss_info_12d9_000c,
+	&pci_ss_info_12d9_000d,
 	NULL
 };
 #endif
@@ -56340,7 +64502,12 @@
 #define pci_ss_list_12fb NULL
 #define pci_ss_list_12fc NULL
 #define pci_ss_list_12fd NULL
-#define pci_ss_list_12fe NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_12fe[] = {
+	&pci_ss_info_12fe_0111,
+	NULL
+};
+#endif
 #define pci_ss_list_12ff NULL
 #define pci_ss_list_1300 NULL
 #define pci_ss_list_1302 NULL
@@ -56456,7 +64623,12 @@
 #define pci_ss_list_134e NULL
 #define pci_ss_list_134f NULL
 #define pci_ss_list_1350 NULL
-#define pci_ss_list_1351 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1351[] = {
+	&pci_ss_info_1351_103c,
+	NULL
+};
+#endif
 #define pci_ss_list_1353 NULL
 #define pci_ss_list_1354 NULL
 #define pci_ss_list_1355 NULL
@@ -56565,6 +64737,8 @@
 	&pci_ss_info_1397_2bd0,
 	&pci_ss_info_1397_3136,
 	&pci_ss_info_1397_3137,
+	&pci_ss_info_1397_b520,
+	&pci_ss_info_1397_b540,
 	NULL
 };
 #endif
@@ -56657,8 +64831,11 @@
 	&pci_ss_info_13c2_100c,
 	&pci_ss_info_13c2_100f,
 	&pci_ss_info_13c2_1011,
+	&pci_ss_info_13c2_1012,
 	&pci_ss_info_13c2_1013,
 	&pci_ss_info_13c2_1016,
+	&pci_ss_info_13c2_1018,
+	&pci_ss_info_13c2_1019,
 	&pci_ss_info_13c2_1102,
 	NULL
 };
@@ -56887,7 +65064,12 @@
 	NULL
 };
 #endif
-#define pci_ss_list_1413 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1413[] = {
+	&pci_ss_info_1413_147b,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1414[] = {
 	&pci_ss_info_1414_0003,
@@ -56920,6 +65102,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1421[] = {
 	&pci_ss_info_1421_0334,
+	&pci_ss_info_1421_0335,
 	&pci_ss_info_1421_1370,
 	NULL
 };
@@ -57017,6 +65200,8 @@
 	&pci_ss_info_144d_c001,
 	&pci_ss_info_144d_c003,
 	&pci_ss_info_144d_c006,
+	&pci_ss_info_144d_c00c,
+	&pci_ss_info_144d_c018,
 	NULL
 };
 #endif
@@ -57042,6 +65227,7 @@
 	&pci_ss_info_144f_3000,
 	&pci_ss_info_144f_4005,
 	&pci_ss_info_144f_7050,
+	&pci_ss_info_144f_7051,
 	NULL
 };
 #endif
@@ -57074,12 +65260,15 @@
 	&pci_ss_info_1458_266a,
 	&pci_ss_info_1458_266f,
 	&pci_ss_info_1458_3124,
+	&pci_ss_info_1458_3150,
+	&pci_ss_info_1458_3427,
 	&pci_ss_info_1458_4000,
 	&pci_ss_info_1458_4002,
 	&pci_ss_info_1458_4018,
 	&pci_ss_info_1458_4019,
 	&pci_ss_info_1458_4024,
 	&pci_ss_info_1458_4025,
+	&pci_ss_info_1458_4032,
 	&pci_ss_info_1458_5000,
 	&pci_ss_info_1458_5001,
 	&pci_ss_info_1458_5002,
@@ -57093,8 +65282,10 @@
 	&pci_ss_info_1458_d000,
 	&pci_ss_info_1458_e000,
 	&pci_ss_info_1458_e381,
+	&pci_ss_info_1458_e901,
 	&pci_ss_info_1458_e911,
 	&pci_ss_info_1458_e931,
+	&pci_ss_info_1458_e934,
 	NULL
 };
 #endif
@@ -57115,16 +65306,19 @@
 	&pci_ss_info_1461_000b,
 	&pci_ss_info_1461_050c,
 	&pci_ss_info_1461_0761,
+	&pci_ss_info_1461_0771,
 	&pci_ss_info_1461_1044,
 	&pci_ss_info_1461_10ff,
 	&pci_ss_info_1461_2108,
 	&pci_ss_info_1461_2115,
+	&pci_ss_info_1461_2c00,
 	&pci_ss_info_1461_8011,
 	&pci_ss_info_1461_9715,
 	&pci_ss_info_1461_a3ce,
 	&pci_ss_info_1461_a3cf,
 	&pci_ss_info_1461_a70a,
 	&pci_ss_info_1461_a70b,
+	&pci_ss_info_1461_c019,
 	&pci_ss_info_1461_d6ee,
 	&pci_ss_info_1461_f31f,
 	NULL
@@ -57133,11 +65327,19 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1462[] = {
 	&pci_ss_info_1462_0080,
+	&pci_ss_info_1462_030c,
+	&pci_ss_info_1462_0311,
+	&pci_ss_info_1462_0345,
+	&pci_ss_info_1462_0400,
 	&pci_ss_info_1462_0402,
 	&pci_ss_info_1462_0403,
 	&pci_ss_info_1462_052c,
 	&pci_ss_info_1462_058c,
+	&pci_ss_info_1462_0622,
+	&pci_ss_info_1462_0900,
 	&pci_ss_info_1462_1009,
+	&pci_ss_info_1462_207d,
+	&pci_ss_info_1462_235c,
 	&pci_ss_info_1462_3091,
 	&pci_ss_info_1462_309e,
 	&pci_ss_info_1462_3300,
@@ -57167,12 +65369,17 @@
 	&pci_ss_info_1462_6930,
 	&pci_ss_info_1462_6990,
 	&pci_ss_info_1462_6991,
+	&pci_ss_info_1462_7010,
+	&pci_ss_info_1462_701d,
 	&pci_ss_info_1462_7020,
 	&pci_ss_info_1462_7028,
 	&pci_ss_info_1462_702c,
 	&pci_ss_info_1462_702d,
 	&pci_ss_info_1462_702e,
+	&pci_ss_info_1462_7030,
 	&pci_ss_info_1462_7100,
+	&pci_ss_info_1462_7207,
+	&pci_ss_info_1462_7235,
 	&pci_ss_info_1462_7280,
 	&pci_ss_info_1462_728c,
 	&pci_ss_info_1462_7580,
@@ -57192,6 +65399,8 @@
 	&pci_ss_info_1462_9350,
 	&pci_ss_info_1462_9360,
 	&pci_ss_info_1462_971d,
+	&pci_ss_info_1462_b010,
+	&pci_ss_info_1462_b834,
 	NULL
 };
 #endif
@@ -57255,6 +65464,7 @@
 	&pci_ss_info_147b_1408,
 	&pci_ss_info_147b_1c09,
 	&pci_ss_info_147b_1c0b,
+	&pci_ss_info_147b_1c1a,
 	&pci_ss_info_147b_6191,
 	&pci_ss_info_147b_8f00,
 	&pci_ss_info_147b_8f09,
@@ -57312,7 +65522,12 @@
 	NULL
 };
 #endif
-#define pci_ss_list_148d NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_148d[] = {
+	&pci_ss_info_148d_1030,
+	NULL
+};
+#endif
 #define pci_ss_list_148e NULL
 #define pci_ss_list_148f NULL
 #define pci_ss_list_1490 NULL
@@ -57331,6 +65546,9 @@
 #define pci_ss_list_1497 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1498[] = {
+	&pci_ss_info_1498_000a,
+	&pci_ss_info_1498_000b,
+	&pci_ss_info_1498_000c,
 	&pci_ss_info_1498_0362,
 	NULL
 };
@@ -57398,7 +65616,14 @@
 #define pci_ss_list_14b1 NULL
 #define pci_ss_list_14b2 NULL
 #define pci_ss_list_14b3 NULL
-#define pci_ss_list_14b4 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_14b4[] = {
+	&pci_ss_info_14b4_d100,
+	&pci_ss_info_14b4_d114,
+	&pci_ss_info_14b4_d140,
+	NULL
+};
+#endif
 #define pci_ss_list_14b5 NULL
 #define pci_ss_list_14b6 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -57554,6 +65779,7 @@
 	&pci_ss_info_14f1_2004,
 	&pci_ss_info_14f1_2045,
 	&pci_ss_info_14f1_5421,
+	&pci_ss_info_14f1_8800,
 	NULL
 };
 #endif
@@ -57634,7 +65860,13 @@
 #define pci_ss_list_1514 NULL
 #define pci_ss_list_1515 NULL
 #define pci_ss_list_1516 NULL
-#define pci_ss_list_1517 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1517[] = {
+	&pci_ss_info_1517_000b,
+	&pci_ss_info_1517_000f,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1518[] = {
 	&pci_ss_info_1518_0200,
@@ -57691,6 +65923,8 @@
 #define pci_ss_list_152c NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_152d[] = {
+	&pci_ss_info_152d_0745,
+	&pci_ss_info_152d_0753,
 	&pci_ss_info_152d_8801,
 	&pci_ss_info_152d_8802,
 	&pci_ss_info_152d_8803,
@@ -57719,6 +65953,7 @@
 	&pci_ss_info_153b_1125,
 	&pci_ss_info_153b_112b,
 	&pci_ss_info_153b_112c,
+	&pci_ss_info_153b_112e,
 	&pci_ss_info_153b_1130,
 	&pci_ss_info_153b_1136,
 	&pci_ss_info_153b_1138,
@@ -57729,6 +65964,7 @@
 	&pci_ss_info_153b_1151,
 	&pci_ss_info_153b_1152,
 	&pci_ss_info_153b_1153,
+	&pci_ss_info_153b_1156,
 	&pci_ss_info_153b_1158,
 	&pci_ss_info_153b_1160,
 	&pci_ss_info_153b_1162,
@@ -58023,8 +66259,20 @@
 #define pci_ss_list_15fe NULL
 #define pci_ss_list_15ff NULL
 #define pci_ss_list_1600 NULL
-#define pci_ss_list_1601 NULL
-#define pci_ss_list_1602 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1601[] = {
+	&pci_ss_info_1601_0000,
+	&pci_ss_info_1601_0002,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1602[] = {
+	&pci_ss_info_1602_0000,
+	&pci_ss_info_1602_0002,
+	NULL
+};
+#endif
 #define pci_ss_list_1603 NULL
 #define pci_ss_list_1604 NULL
 #define pci_ss_list_1605 NULL
@@ -58032,7 +66280,13 @@
 #define pci_ss_list_1607 NULL
 #define pci_ss_list_1608 NULL
 #define pci_ss_list_1609 NULL
-#define pci_ss_list_1612 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1612[] = {
+	&pci_ss_info_1612_0000,
+	&pci_ss_info_1612_0004,
+	NULL
+};
+#endif
 #define pci_ss_list_1619 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_161f[] = {
@@ -58060,6 +66314,7 @@
 	&pci_ss_info_1668_0302,
 	&pci_ss_info_1668_0414,
 	&pci_ss_info_1668_0440,
+	&pci_ss_info_1668_1026,
 	&pci_ss_info_1668_1100,
 	&pci_ss_info_1668_2400,
 	NULL
@@ -58068,6 +66323,7 @@
 #define pci_ss_list_166d NULL
 #define pci_ss_list_1677 NULL
 #define pci_ss_list_167b NULL
+#define pci_ss_list_167d NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1681[] = {
 	&pci_ss_info_1681_0002,
@@ -58083,8 +66339,10 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1682[] = {
 	&pci_ss_info_1682_2109,
+	&pci_ss_info_1682_2119,
 	&pci_ss_info_1682_211c,
 	&pci_ss_info_1682_2120,
+	&pci_ss_info_1682_217e,
 	NULL
 };
 #endif
@@ -58092,12 +66350,19 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_168c[] = {
 	&pci_ss_info_168c_0013,
+	&pci_ss_info_168c_001a,
+	&pci_ss_info_168c_001b,
 	&pci_ss_info_168c_1025,
 	&pci_ss_info_168c_1027,
+	&pci_ss_info_168c_1042,
 	&pci_ss_info_168c_1052,
 	&pci_ss_info_168c_2026,
 	&pci_ss_info_168c_2041,
 	&pci_ss_info_168c_2042,
+	&pci_ss_info_168c_2051,
+	&pci_ss_info_168c_2052,
+	&pci_ss_info_168c_2062,
+	&pci_ss_info_168c_2063,
 	NULL
 };
 #endif
@@ -58105,12 +66370,14 @@
 static const pciSubsystemInfo *pci_ss_list_1695[] = {
 	&pci_ss_info_1695_3005,
 	&pci_ss_info_1695_300c,
+	&pci_ss_info_1695_9001,
 	&pci_ss_info_1695_9025,
 	&pci_ss_info_1695_9029,
 	NULL
 };
 #endif
 #define pci_ss_list_169c NULL
+#define pci_ss_list_169d NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_16a5[] = {
 	&pci_ss_info_16a5_1601,
@@ -58138,6 +66405,7 @@
 	NULL
 };
 #endif
+#define pci_ss_list_16c6 NULL
 #define pci_ss_list_16c8 NULL
 #define pci_ss_list_16c9 NULL
 #define pci_ss_list_16ca NULL
@@ -58148,6 +66416,7 @@
 	NULL
 };
 #endif
+#define pci_ss_list_16d5 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_16df[] = {
 	&pci_ss_info_16df_0011,
@@ -58160,6 +66429,7 @@
 };
 #endif
 #define pci_ss_list_16e3 NULL
+#define pci_ss_list_16e5 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_16ec[] = {
 	&pci_ss_info_16ec_0119,
@@ -58192,7 +66462,10 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1734[] = {
 	&pci_ss_info_1734_007a,
+	&pci_ss_info_1734_1004,
+	&pci_ss_info_1734_1005,
 	&pci_ss_info_1734_100b,
+	&pci_ss_info_1734_100c,
 	&pci_ss_info_1734_1011,
 	&pci_ss_info_1734_1012,
 	&pci_ss_info_1734_101c,
@@ -58206,6 +66479,11 @@
 	&pci_ss_info_1734_105d,
 	&pci_ss_info_1734_1061,
 	&pci_ss_info_1734_1065,
+	&pci_ss_info_1734_106c,
+	&pci_ss_info_1734_1081,
+	&pci_ss_info_1734_10a3,
+	&pci_ss_info_1734_10ad,
+	&pci_ss_info_1734_10b8,
 	NULL
 };
 #endif
@@ -58215,6 +66493,9 @@
 	&pci_ss_info_1737_0016,
 	&pci_ss_info_1737_0024,
 	&pci_ss_info_1737_0032,
+	&pci_ss_info_1737_0033,
+	&pci_ss_info_1737_0048,
+	&pci_ss_info_1737_0055,
 	&pci_ss_info_1737_3874,
 	&pci_ss_info_1737_4320,
 	NULL
@@ -58264,7 +66545,11 @@
 #define pci_ss_list_175e NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1775[] = {
+	&pci_ss_info_1775_10d0,
+	&pci_ss_info_1775_10d1,
 	&pci_ss_info_1775_6003,
+	&pci_ss_info_1775_c200,
+	&pci_ss_info_1775_ce90,
 	NULL
 };
 #endif
@@ -58288,6 +66573,7 @@
 	&pci_ss_info_1799_7001,
 	&pci_ss_info_1799_700a,
 	&pci_ss_info_1799_7010,
+	&pci_ss_info_1799_7011,
 	&pci_ss_info_1799_701a,
 	NULL
 };
@@ -58298,6 +66584,23 @@
 static const pciSubsystemInfo *pci_ss_list_17aa[] = {
 	&pci_ss_info_17aa_0286,
 	&pci_ss_info_17aa_0287,
+	&pci_ss_info_17aa_2001,
+	&pci_ss_info_17aa_2007,
+	&pci_ss_info_17aa_2009,
+	&pci_ss_info_17aa_200a,
+	&pci_ss_info_17aa_200b,
+	&pci_ss_info_17aa_200c,
+	&pci_ss_info_17aa_200d,
+	&pci_ss_info_17aa_200f,
+	&pci_ss_info_17aa_2010,
+	&pci_ss_info_17aa_2012,
+	&pci_ss_info_17aa_2017,
+	&pci_ss_info_17aa_201a,
+	&pci_ss_info_17aa_201c,
+	&pci_ss_info_17aa_201d,
+	&pci_ss_info_17aa_201e,
+	&pci_ss_info_17aa_207e,
+	&pci_ss_info_17aa_2081,
 	NULL
 };
 #endif
@@ -58324,22 +66627,28 @@
 	&pci_ss_info_17cf_0014,
 	&pci_ss_info_17cf_0020,
 	&pci_ss_info_17cf_0037,
+	&pci_ss_info_17cf_0042,
 	NULL
 };
 #endif
 #define pci_ss_list_17d3 NULL
 #define pci_ss_list_17d5 NULL
+#define pci_ss_list_17db NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_17de[] = {
 	&pci_ss_info_17de_08a1,
 	&pci_ss_info_17de_08a6,
 	&pci_ss_info_17de_08b2,
+	&pci_ss_info_17de_7350,
 	&pci_ss_info_17de_a8a6,
 	NULL
 };
 #endif
+#define pci_ss_list_17e4 NULL
+#define pci_ss_list_17e6 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_17ee[] = {
+	&pci_ss_info_17ee_1001,
 	&pci_ss_info_17ee_2002,
 	&pci_ss_info_17ee_2003,
 	NULL
@@ -58352,6 +66661,7 @@
 	NULL
 };
 #endif
+#define pci_ss_list_17f3 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_17fe[] = {
 	&pci_ss_info_17fe_2220,
@@ -58364,6 +66674,12 @@
 	NULL
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1809[] = {
+	&pci_ss_info_1809_0016,
+	NULL
+};
+#endif
 #define pci_ss_list_1813 NULL
 #define pci_ss_list_1814 NULL
 #define pci_ss_list_1820 NULL
@@ -58380,11 +66696,13 @@
 	NULL
 };
 #endif
+#define pci_ss_list_182e NULL
 #define pci_ss_list_1830 NULL
 #define pci_ss_list_183b NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1849[] = {
 	&pci_ss_info_1849_0571,
+	&pci_ss_info_1849_0850,
 	&pci_ss_info_1849_3038,
 	&pci_ss_info_1849_3065,
 	&pci_ss_info_1849_3099,
@@ -58393,12 +66711,14 @@
 	&pci_ss_info_1849_3177,
 	&pci_ss_info_1849_3189,
 	&pci_ss_info_1849_3227,
+	&pci_ss_info_1849_5229,
 	&pci_ss_info_1849_8052,
 	&pci_ss_info_1849_8053,
 	&pci_ss_info_1849_9761,
 	NULL
 };
 #endif
+#define pci_ss_list_184a NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1851[] = {
 	&pci_ss_info_1851_1850,
@@ -58412,6 +66732,7 @@
 	NULL
 };
 #endif
+#define pci_ss_list_1853 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1854[] = {
 	&pci_ss_info_1854_000b,
@@ -58452,7 +66773,9 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_185f[] = {
+	&pci_ss_info_185f_1012,
 	&pci_ss_info_185f_1220,
+	&pci_ss_info_185f_2012,
 	&pci_ss_info_185f_22a0,
 	NULL
 };
@@ -58465,7 +66788,15 @@
 	NULL
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1885[] = {
+	&pci_ss_info_1885_0700,
+	&pci_ss_info_1885_0701,
+	NULL
+};
+#endif
 #define pci_ss_list_1888 NULL
+#define pci_ss_list_188a NULL
 #define pci_ss_list_1890 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1894[] = {
@@ -58503,6 +66834,7 @@
 	NULL
 };
 #endif
+#define pci_ss_list_18c3 NULL
 #define pci_ss_list_18c8 NULL
 #define pci_ss_list_18c9 NULL
 #define pci_ss_list_18ca NULL
@@ -58518,6 +66850,7 @@
 	NULL
 };
 #endif
+#define pci_ss_list_18f6 NULL
 #define pci_ss_list_18f7 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_18fb[] = {
@@ -58525,6 +66858,12 @@
 	NULL
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_1904[] = {
+	&pci_ss_info_1904_8139,
+	NULL
+};
+#endif
 #define pci_ss_list_1923 NULL
 #define pci_ss_list_1924 NULL
 #define pci_ss_list_192e NULL
@@ -58536,11 +66875,23 @@
 };
 #endif
 #define pci_ss_list_1942 NULL
+#define pci_ss_list_194a NULL
 #define pci_ss_list_1957 NULL
 #define pci_ss_list_1958 NULL
+#define pci_ss_list_1959 NULL
 #define pci_ss_list_1966 NULL
+#define pci_ss_list_1969 NULL
 #define pci_ss_list_196a NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_196d[] = {
+	&pci_ss_info_196d_1086,
+	&pci_ss_info_196d_1087,
+	NULL
+};
+#endif
+#define pci_ss_list_1971 NULL
 #define pci_ss_list_197b NULL
+#define pci_ss_list_1982 NULL
 #define pci_ss_list_1989 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_1993[] = {
@@ -58550,13 +66901,26 @@
 	NULL
 };
 #endif
+#define pci_ss_list_199a NULL
+#define pci_ss_list_19a2 NULL
 #define pci_ss_list_19a8 NULL
 #define pci_ss_list_19ac NULL
 #define pci_ss_list_19ae NULL
 #define pci_ss_list_19d4 NULL
 #define pci_ss_list_19e2 NULL
+#define pci_ss_list_19e7 NULL
 #define pci_ss_list_1a03 NULL
+#define pci_ss_list_1a07 NULL
 #define pci_ss_list_1a08 NULL
+#define pci_ss_list_1a1d NULL
+#define pci_ss_list_1a29 NULL
+#define pci_ss_list_1a51 NULL
+#define pci_ss_list_1a5d NULL
+#define pci_ss_list_1a71 NULL
+#define pci_ss_list_1a73 NULL
+#define pci_ss_list_1a77 NULL
+#define pci_ss_list_1a78 NULL
+#define pci_ss_list_1a8c NULL
 #define pci_ss_list_1b13 NULL
 #define pci_ss_list_1c1c NULL
 #define pci_ss_list_1d44 NULL
@@ -58584,6 +66948,7 @@
 #define pci_ss_list_2003 NULL
 #define pci_ss_list_2004 NULL
 #define pci_ss_list_21c3 NULL
+#define pci_ss_list_22b8 NULL
 #define pci_ss_list_2348 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_2646[] = {
@@ -58655,12 +67020,16 @@
 #define pci_ss_list_4144 NULL
 #define pci_ss_list_416c NULL
 #define pci_ss_list_4321 NULL
+#define pci_ss_list_434e NULL
 #define pci_ss_list_4444 NULL
 #define pci_ss_list_4468 NULL
 #define pci_ss_list_4594 NULL
 #define pci_ss_list_45fb NULL
 #define pci_ss_list_4680 NULL
-#define pci_ss_list_4843 NULL
+static const pciSubsystemInfo *pci_ss_list_4843[] = {
+	&pci_ss_info_4843_314a,
+	NULL
+};
 #define pci_ss_list_4916 NULL
 #define pci_ss_list_4943 NULL
 #define pci_ss_list_494f NULL
@@ -58704,12 +67073,14 @@
 #define pci_ss_list_4ca1 NULL
 #define pci_ss_list_4d51 NULL
 #define pci_ss_list_4d54 NULL
+#define pci_ss_list_4d56 NULL
 #define pci_ss_list_4ddc NULL
 #define pci_ss_list_5046 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_5053[] = {
 	&pci_ss_info_5053_3355,
 	&pci_ss_info_5053_3356,
+	&pci_ss_info_5053_3357,
 	NULL
 };
 #endif
@@ -58721,6 +67092,13 @@
 	&pci_ss_info_5168_0138,
 	&pci_ss_info_5168_0306,
 	&pci_ss_info_5168_0319,
+	&pci_ss_info_5168_0502,
+	&pci_ss_info_5168_0520,
+	&pci_ss_info_5168_1502,
+	&pci_ss_info_5168_2502,
+	&pci_ss_info_5168_2520,
+	&pci_ss_info_5168_3502,
+	&pci_ss_info_5168_3520,
 	NULL
 };
 #endif
@@ -58745,6 +67123,7 @@
 };
 #define pci_ss_list_544c NULL
 #define pci_ss_list_5455 NULL
+#define pci_ss_list_5456 NULL
 #define pci_ss_list_5519 NULL
 #define pci_ss_list_5544 NULL
 #define pci_ss_list_5555 NULL
@@ -58758,6 +67137,7 @@
 #endif
 #define pci_ss_list_5700 NULL
 #define pci_ss_list_5851 NULL
+#define pci_ss_list_5853 NULL
 #define pci_ss_list_6356 NULL
 #define pci_ss_list_6374 NULL
 #define pci_ss_list_6409 NULL
@@ -58789,6 +67169,7 @@
 	&pci_ss_info_8086_0006,
 	&pci_ss_info_8086_0007,
 	&pci_ss_info_8086_0008,
+	&pci_ss_info_8086_0009,
 	&pci_ss_info_8086_000a,
 	&pci_ss_info_8086_000b,
 	&pci_ss_info_8086_000c,
@@ -58799,6 +67180,7 @@
 	&pci_ss_info_8086_0011,
 	&pci_ss_info_8086_0012,
 	&pci_ss_info_8086_0013,
+	&pci_ss_info_8086_0014,
 	&pci_ss_info_8086_001e,
 	&pci_ss_info_8086_002a,
 	&pci_ss_info_8086_002b,
@@ -58809,6 +67191,8 @@
 	&pci_ss_info_8086_0041,
 	&pci_ss_info_8086_0042,
 	&pci_ss_info_8086_0050,
+	&pci_ss_info_8086_005e,
+	&pci_ss_info_8086_0060,
 	&pci_ss_info_8086_0075,
 	&pci_ss_info_8086_0076,
 	&pci_ss_info_8086_0077,
@@ -58853,6 +67237,8 @@
 	&pci_ss_info_8086_1050,
 	&pci_ss_info_8086_1051,
 	&pci_ss_info_8086_1052,
+	&pci_ss_info_8086_105e,
+	&pci_ss_info_8086_1060,
 	&pci_ss_info_8086_1075,
 	&pci_ss_info_8086_1076,
 	&pci_ss_info_8086_1077,
@@ -58860,18 +67246,41 @@
 	&pci_ss_info_8086_1079,
 	&pci_ss_info_8086_107a,
 	&pci_ss_info_8086_107b,
+	&pci_ss_info_8086_1082,
+	&pci_ss_info_8086_1083,
+	&pci_ss_info_8086_1084,
+	&pci_ss_info_8086_108a,
+	&pci_ss_info_8086_1092,
+	&pci_ss_info_8086_1093,
+	&pci_ss_info_8086_1094,
+	&pci_ss_info_8086_1099,
+	&pci_ss_info_8086_109a,
+	&pci_ss_info_8086_10a4,
+	&pci_ss_info_8086_10bc,
 	&pci_ss_info_8086_10f0,
 	&pci_ss_info_8086_1107,
 	&pci_ss_info_8086_1109,
 	&pci_ss_info_8086_110d,
 	&pci_ss_info_8086_1112,
 	&pci_ss_info_8086_1113,
+	&pci_ss_info_8086_115e,
+	&pci_ss_info_8086_115f,
 	&pci_ss_info_8086_1161,
+	&pci_ss_info_8086_116e,
+	&pci_ss_info_8086_116f,
 	&pci_ss_info_8086_1176,
 	&pci_ss_info_8086_1179,
 	&pci_ss_info_8086_117a,
+	&pci_ss_info_8086_118a,
+	&pci_ss_info_8086_1199,
+	&pci_ss_info_8086_11a4,
+	&pci_ss_info_8086_11bc,
+	&pci_ss_info_8086_125e,
+	&pci_ss_info_8086_125f,
 	&pci_ss_info_8086_1276,
 	&pci_ss_info_8086_127a,
+	&pci_ss_info_8086_135e,
+	&pci_ss_info_8086_135f,
 	&pci_ss_info_8086_1361,
 	&pci_ss_info_8086_1376,
 	&pci_ss_info_8086_1476,
@@ -58918,7 +67327,11 @@
 	&pci_ss_info_8086_2413,
 	&pci_ss_info_8086_24db,
 	&pci_ss_info_8086_2513,
+	&pci_ss_info_8086_2522,
 	&pci_ss_info_8086_2527,
+	&pci_ss_info_8086_2581,
+	&pci_ss_info_8086_265c,
+	&pci_ss_info_8086_2731,
 	&pci_ss_info_8086_3000,
 	&pci_ss_info_8086_3001,
 	&pci_ss_info_8086_3002,
@@ -58934,8 +67347,10 @@
 	&pci_ss_info_8086_3016,
 	&pci_ss_info_8086_3017,
 	&pci_ss_info_8086_3018,
+	&pci_ss_info_8086_301a,
 	&pci_ss_info_8086_301f,
 	&pci_ss_info_8086_3020,
+	&pci_ss_info_8086_302c,
 	&pci_ss_info_8086_302f,
 	&pci_ss_info_8086_3063,
 	&pci_ss_info_8086_308d,
@@ -58946,6 +67361,11 @@
 	&pci_ss_info_8086_3431,
 	&pci_ss_info_8086_3439,
 	&pci_ss_info_8086_3499,
+	&pci_ss_info_8086_34cc,
+	&pci_ss_info_8086_34cd,
+	&pci_ss_info_8086_3500,
+	&pci_ss_info_8086_3501,
+	&pci_ss_info_8086_3504,
 	&pci_ss_info_8086_4147,
 	&pci_ss_info_8086_4152,
 	&pci_ss_info_8086_4246,
@@ -58959,6 +67379,7 @@
 	&pci_ss_info_8086_4557,
 	&pci_ss_info_8086_4649,
 	&pci_ss_info_8086_464a,
+	&pci_ss_info_8086_4c43,
 	&pci_ss_info_8086_4d4f,
 	&pci_ss_info_8086_4f43,
 	&pci_ss_info_8086_5243,
@@ -58966,6 +67387,7 @@
 	&pci_ss_info_8086_5352,
 	&pci_ss_info_8086_544e,
 	&pci_ss_info_8086_5643,
+	&pci_ss_info_8086_5744,
 	&pci_ss_info_8086_5753,
 	&pci_ss_info_8086_8000,
 	&pci_ss_info_8086_8181,
@@ -58975,9 +67397,13 @@
 	&pci_ss_info_8086_a11f,
 	&pci_ss_info_8086_e000,
 	&pci_ss_info_8086_e001,
+	&pci_ss_info_8086_e002,
 	NULL
 };
+#define pci_ss_list_80ee NULL
+#define pci_ss_list_8384 NULL
 #define pci_ss_list_8401 NULL
+#define pci_ss_list_8686 NULL
 #define pci_ss_list_8800 NULL
 #define pci_ss_list_8866 NULL
 #define pci_ss_list_8888 NULL
@@ -59037,6 +67463,8 @@
 	&pci_ss_info_9005_0003,
 	&pci_ss_info_9005_000f,
 	&pci_ss_info_9005_0041,
+	&pci_ss_info_9005_0044,
+	&pci_ss_info_9005_0045,
 	&pci_ss_info_9005_0092,
 	&pci_ss_info_9005_0093,
 	&pci_ss_info_9005_0106,
@@ -59079,8 +67507,38 @@
 	&pci_ss_info_9005_02a8,
 	&pci_ss_info_9005_02a9,
 	&pci_ss_info_9005_02aa,
+	&pci_ss_info_9005_02ac,
+	&pci_ss_info_9005_02b3,
+	&pci_ss_info_9005_02b4,
+	&pci_ss_info_9005_02b5,
+	&pci_ss_info_9005_02b6,
+	&pci_ss_info_9005_02b7,
+	&pci_ss_info_9005_02b8,
+	&pci_ss_info_9005_02b9,
+	&pci_ss_info_9005_02ba,
+	&pci_ss_info_9005_02bb,
+	&pci_ss_info_9005_02bc,
+	&pci_ss_info_9005_02bd,
+	&pci_ss_info_9005_02be,
+	&pci_ss_info_9005_02bf,
+	&pci_ss_info_9005_02c0,
+	&pci_ss_info_9005_02c1,
+	&pci_ss_info_9005_02c2,
+	&pci_ss_info_9005_02c3,
+	&pci_ss_info_9005_02c4,
+	&pci_ss_info_9005_02c5,
+	&pci_ss_info_9005_02c6,
+	&pci_ss_info_9005_02c7,
+	&pci_ss_info_9005_02c8,
 	&pci_ss_info_9005_0364,
 	&pci_ss_info_9005_0365,
+	&pci_ss_info_9005_0410,
+	&pci_ss_info_9005_0411,
+	&pci_ss_info_9005_0412,
+	&pci_ss_info_9005_0413,
+	&pci_ss_info_9005_041f,
+	&pci_ss_info_9005_0430,
+	&pci_ss_info_9005_0432,
 	&pci_ss_info_9005_0800,
 	&pci_ss_info_9005_1364,
 	&pci_ss_info_9005_1365,
@@ -59112,6 +67570,14 @@
 	&pci_ss_info_a0a0_0007,
 	&pci_ss_info_a0a0_0022,
 	&pci_ss_info_a0a0_01b6,
+	&pci_ss_info_a0a0_0304,
+	&pci_ss_info_a0a0_0306,
+	&pci_ss_info_a0a0_03b2,
+	&pci_ss_info_a0a0_03b4,
+	&pci_ss_info_a0a0_03b5,
+	&pci_ss_info_a0a0_03b9,
+	&pci_ss_info_a0a0_03ba,
+	&pci_ss_info_a0a0_03bb,
 	&pci_ss_info_a0a0_0506,
 	&pci_ss_info_a0a0_0509,
 	NULL
@@ -59127,12 +67593,18 @@
 	NULL
 };
 #endif
-#define pci_ss_list_a727 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciSubsystemInfo *pci_ss_list_a727[] = {
+	&pci_ss_info_a727_6804,
+	NULL
+};
+#endif
 #define pci_ss_list_aa42 NULL
 #define pci_ss_list_ac1e NULL
 #define pci_ss_list_ac3d NULL
 #define pci_ss_list_aecb NULL
 #define pci_ss_list_affe NULL
+#define pci_ss_list_b10b NULL
 #define pci_ss_list_b1b3 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_bd11[] = {
@@ -59147,6 +67619,7 @@
 #define pci_ss_list_ca50 NULL
 #define pci_ss_list_cafe NULL
 #define pci_ss_list_cccc NULL
+#define pci_ss_list_ccec NULL
 #define pci_ss_list_cddd NULL
 #define pci_ss_list_d161 NULL
 #define pci_ss_list_d4d4 NULL
@@ -59189,6 +67662,9 @@
 #define pci_ss_list_e159 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciSubsystemInfo *pci_ss_list_e4bf[] = {
+	&pci_ss_info_e4bf_0cc9,
+	&pci_ss_info_e4bf_0ccd,
+	&pci_ss_info_e4bf_0cd2,
 	&pci_ss_info_e4bf_1000,
 	&pci_ss_info_e4bf_1010,
 	&pci_ss_info_e4bf_1020,
@@ -59239,6 +67715,154 @@
 #endif /* INIT_VENDOR_SUBSYS_INFO */
 #endif /* INIT_SUBSYS_INFO */
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_001c_0001 = {
+	0x0001, pci_device_001c_0001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_001c_0001,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_0070_0003 = {
+	0x0003, pci_device_0070_0003,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_0003,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_0009 = {
+	0x0009, pci_device_0070_0009,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_0009,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_0801 = {
+	0x0801, pci_device_0070_0801,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_0801,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_0807 = {
+	0x0807, pci_device_0070_0807,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_0807,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_4000 = {
+	0x4000, pci_device_0070_4000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_4000,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_4001 = {
+	0x4001, pci_device_0070_4001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_4001,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_4009 = {
+	0x4009, pci_device_0070_4009,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_4009,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_4800 = {
+	0x4800, pci_device_0070_4800,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_4800,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_4801 = {
+	0x4801, pci_device_0070_4801,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_4801,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_4803 = {
+	0x4803, pci_device_0070_4803,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_4803,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_8003 = {
+	0x8003, pci_device_0070_8003,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_8003,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_8801 = {
+	0x8801, pci_device_0070_8801,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_8801,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_c801 = {
+	0xc801, pci_device_0070_c801,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_c801,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_e807 = {
+	0xe807, pci_device_0070_e807,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_e807,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0070_e817 = {
+	0xe817, pci_device_0070_e817,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0070_e817,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_0095_0680 = {
 	0x0680, pci_device_0095_0680,
 #ifdef INIT_SUBSYS_INFO
@@ -59347,6 +67971,24 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_050d_001a = {
+	0x001a, pci_device_050d_001a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_050d_001a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_050d_0109 = {
+	0x0109, pci_device_050d_0109,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_050d_0109,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_050d_7050 = {
 	0x7050, pci_device_050d_7050,
 #ifdef INIT_SUBSYS_INFO
@@ -59356,6 +67998,26 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_050d_705c = {
+	0x705c, pci_device_050d_705c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_050d_705c,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_05a9_8519 = {
+	0x8519, pci_device_05a9_8519,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_05a9_8519,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_05e3_0701 = {
@@ -59369,6 +68031,26 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_066f_3410 = {
+	0x3410, pci_device_066f_3410,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_066f_3410,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_066f_3500 = {
+	0x3500, pci_device_066f_3500,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_066f_3500,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_0675_1700 = {
 	0x1700, pci_device_0675_1700,
 #ifdef INIT_SUBSYS_INFO
@@ -59407,6 +68089,15 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_067b_2303 = {
+	0x2303, pci_device_067b_2303,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_067b_2303,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_067b_3507 = {
 	0x3507, pci_device_067b_3507,
 #ifdef INIT_SUBSYS_INFO
@@ -59418,6 +68109,75 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_07ca_b808 = {
+	0xb808, pci_device_07ca_b808,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_07ca_b808,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_08ff_afe4 = {
+	0xafe4, pci_device_08ff_afe4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_08ff_afe4,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_093a_010e = {
+	0x010e, pci_device_093a_010e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_093a_010e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_093a_010f = {
+	0x010f, pci_device_093a_010f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_093a_010f,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_093a_2468 = {
+	0x2468, pci_device_093a_2468,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_093a_2468,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_093a_2603 = {
+	0x2603, pci_device_093a_2603,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_093a_2603,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_093a_2608 = {
+	0x2608, pci_device_093a_2608,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_093a_2608,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_09c1_0704 = {
 	0x0704, pci_device_09c1_0704,
 #ifdef INIT_SUBSYS_INFO
@@ -59429,6 +68189,145 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_0ace_1211 = {
+	0x1211, pci_device_0ace_1211,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0ace_1211,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_0b0b_0105 = {
+	0x0105, pci_device_0b0b_0105,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0105,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0205 = {
+	0x0205, pci_device_0b0b_0205,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0205,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0206 = {
+	0x0206, pci_device_0b0b_0206,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0206,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0305 = {
+	0x0305, pci_device_0b0b_0305,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0305,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0405 = {
+	0x0405, pci_device_0b0b_0405,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0405,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0406 = {
+	0x0406, pci_device_0b0b_0406,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0406,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0505 = {
+	0x0505, pci_device_0b0b_0505,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0505,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0506 = {
+	0x0506, pci_device_0b0b_0506,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0506,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0605 = {
+	0x0605, pci_device_0b0b_0605,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0605,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0705 = {
+	0x0705, pci_device_0b0b_0705,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0705,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0706 = {
+	0x0706, pci_device_0b0b_0706,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0706,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0905 = {
+	0x0905, pci_device_0b0b_0905,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0905,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0906 = {
+	0x0906, pci_device_0b0b_0906,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0906,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_0b0b_0a06 = {
+	0x0a06, pci_device_0b0b_0a06,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0b0b_0a06,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_0b49_064f = {
 	0x064f, pci_device_0b49_064f,
 #ifdef INIT_SUBSYS_INFO
@@ -59439,6 +68338,17 @@
 	0
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_0ccd_0038 = {
+	0x0038, pci_device_0ccd_0038,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_0ccd_0038,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
 static const pciDeviceInfo pci_dev_info_0e11_0001 = {
 	0x0001, pci_device_0e11_0001,
 #ifdef INIT_SUBSYS_INFO
@@ -60502,6 +69412,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1000_0055 = {
+	0x0055, pci_device_1000_0055,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1000_0055,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1000_0056 = {
 	0x0056, pci_device_1000_0056,
 #ifdef INIT_SUBSYS_INFO
@@ -60601,6 +69520,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1000_0411 = {
+	0x0411, pci_device_1000_0411,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1000_0411,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1000_0413 = {
+	0x0413, pci_device_1000_0413,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1000_0413,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1000_0621 = {
 	0x0621, pci_device_1000_0621,
 #ifdef INIT_SUBSYS_INFO
@@ -61414,6 +70351,150 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_437b = {
+	0x437b, pci_device_1002_437b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_437b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4380 = {
+	0x4380, pci_device_1002_4380,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4380,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4381 = {
+	0x4381, pci_device_1002_4381,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4381,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4382 = {
+	0x4382, pci_device_1002_4382,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4382,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4383 = {
+	0x4383, pci_device_1002_4383,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4383,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4384 = {
+	0x4384, pci_device_1002_4384,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4384,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4385 = {
+	0x4385, pci_device_1002_4385,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4385,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4386 = {
+	0x4386, pci_device_1002_4386,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4386,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4387 = {
+	0x4387, pci_device_1002_4387,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4387,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4388 = {
+	0x4388, pci_device_1002_4388,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4388,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4389 = {
+	0x4389, pci_device_1002_4389,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4389,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_438a = {
+	0x438a, pci_device_1002_438a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_438a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_438b = {
+	0x438b, pci_device_1002_438b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_438b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_438c = {
+	0x438c, pci_device_1002_438c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_438c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_438d = {
+	0x438d, pci_device_1002_438d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_438d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_438e = {
+	0x438e, pci_device_1002_438e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_438e,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_4437 = {
 	0x4437, pci_device_1002_4437,
 #ifdef INIT_SUBSYS_INFO
@@ -61729,6 +70810,42 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_4a54 = {
+	0x4a54, pci_device_1002_4a54,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4a54,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4a69 = {
+	0x4a69, pci_device_1002_4a69,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4a69,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4a6a = {
+	0x4a6a, pci_device_1002_4a6a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4a6a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4a6b = {
+	0x4a6b, pci_device_1002_4a6b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4a6b,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_4a70 = {
 	0x4a70, pci_device_1002_4a70,
 #ifdef INIT_SUBSYS_INFO
@@ -61738,6 +70855,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_4a74 = {
+	0x4a74, pci_device_1002_4a74,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4a74,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_4b49 = {
 	0x4b49, pci_device_1002_4b49,
 #ifdef INIT_SUBSYS_INFO
@@ -62206,6 +71332,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_4f72 = {
+	0x4f72, pci_device_1002_4f72,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4f72,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_4f73 = {
+	0x4f73, pci_device_1002_4f73,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_4f73,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_5041 = {
 	0x5041, pci_device_1002_5041,
 #ifdef INIT_SUBSYS_INFO
@@ -62593,6 +71737,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_515f = {
+	0x515f, pci_device_1002_515f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_515f,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_5168 = {
 	0x5168, pci_device_1002_5168,
 #ifdef INIT_SUBSYS_INFO
@@ -62935,6 +72088,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_5569 = {
+	0x5569, pci_device_1002_5569,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_5569,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_556b = {
 	0x556b, pci_device_1002_556b,
 #ifdef INIT_SUBSYS_INFO
@@ -62962,6 +72124,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_5571 = {
+	0x5571, pci_device_1002_5571,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_5571,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_564a = {
 	0x564a, pci_device_1002_564a,
 #ifdef INIT_SUBSYS_INFO
@@ -62980,6 +72151,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_564f = {
+	0x564f, pci_device_1002_564f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_564f,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_5652 = {
 	0x5652, pci_device_1002_5652,
 #ifdef INIT_SUBSYS_INFO
@@ -63133,6 +72313,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_5952 = {
+	0x5952, pci_device_1002_5952,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_5952,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_5954 = {
 	0x5954, pci_device_1002_5954,
 #ifdef INIT_SUBSYS_INFO
@@ -63214,6 +72403,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_5a33 = {
+	0x5a33, pci_device_1002_5a33,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_5a33,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_5a34 = {
 	0x5a34, pci_device_1002_5a34,
 #ifdef INIT_SUBSYS_INFO
@@ -63223,6 +72421,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_5a36 = {
+	0x5a36, pci_device_1002_5a36,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_5a36,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1002_5a37 = {
+	0x5a37, pci_device_1002_5a37,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_5a37,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_5a38 = {
 	0x5a38, pci_device_1002_5a38,
 #ifdef INIT_SUBSYS_INFO
@@ -63232,6 +72448,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_5a39 = {
+	0x5a39, pci_device_1002_5a39,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_5a39,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_5a3f = {
 	0x5a3f, pci_device_1002_5a3f,
 #ifdef INIT_SUBSYS_INFO
@@ -63565,6 +72790,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1002_5f57 = {
+	0x5f57, pci_device_1002_5f57,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1002_5f57,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1002_700f = {
 	0x700f, pci_device_1002_700f,
 #ifdef INIT_SUBSYS_INFO
@@ -63592,966 +72826,1722 @@
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7105 = {
-	0x7105, pci_device_1002_7105,
+static const pciDeviceInfo pci_dev_info_1002_7102 = {
+	0x7102, pci_device_1002_7102,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7105,
+	pci_ss_list_1002_7102,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7109 = {
-	0x7109, pci_device_1002_7109,
+static const pciDeviceInfo pci_dev_info_1002_7103 = {
+	0x7103, pci_device_1002_7103,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7109,
+	pci_ss_list_1002_7103,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7120 = {
-	0x7120, pci_device_1002_7120,
+static const pciDeviceInfo pci_dev_info_1002_7104 = {
+	0x7104, pci_device_1002_7104,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7120,
+	pci_ss_list_1002_7104,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7129 = {
-	0x7129, pci_device_1002_7129,
+static const pciDeviceInfo pci_dev_info_1002_7105 = {
+	0x7105, pci_device_1002_7105,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7129,
+	pci_ss_list_1002_7105,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7142 = {
-	0x7142, pci_device_1002_7142,
+static const pciDeviceInfo pci_dev_info_1002_7106 = {
+	0x7106, pci_device_1002_7106,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7142,
+	pci_ss_list_1002_7106,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7146 = {
-	0x7146, pci_device_1002_7146,
+static const pciDeviceInfo pci_dev_info_1002_7108 = {
+	0x7108, pci_device_1002_7108,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7146,
+	pci_ss_list_1002_7108,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7162 = {
-	0x7162, pci_device_1002_7162,
+static const pciDeviceInfo pci_dev_info_1002_7109 = {
+	0x7109, pci_device_1002_7109,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7162,
+	pci_ss_list_1002_7109,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7166 = {
-	0x7166, pci_device_1002_7166,
+static const pciDeviceInfo pci_dev_info_1002_710a = {
+	0x710a, pci_device_1002_710a,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7166,
+	pci_ss_list_1002_710a,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_71c0 = {
-	0x71c0, pci_device_1002_71c0,
+static const pciDeviceInfo pci_dev_info_1002_710b = {
+	0x710b, pci_device_1002_710b,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_71c0,
+	pci_ss_list_1002_710b,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_71c2 = {
-	0x71c2, pci_device_1002_71c2,
+static const pciDeviceInfo pci_dev_info_1002_710c = {
+	0x710c, pci_device_1002_710c,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_71c2,
+	pci_ss_list_1002_710c,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_71e0 = {
-	0x71e0, pci_device_1002_71e0,
+static const pciDeviceInfo pci_dev_info_1002_7120 = {
+	0x7120, pci_device_1002_7120,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_71e0,
+	pci_ss_list_1002_7120,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_71e2 = {
-	0x71e2, pci_device_1002_71e2,
+static const pciDeviceInfo pci_dev_info_1002_7124 = {
+	0x7124, pci_device_1002_7124,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_71e2,
+	pci_ss_list_1002_7124,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7833 = {
-	0x7833, pci_device_1002_7833,
+static const pciDeviceInfo pci_dev_info_1002_7129 = {
+	0x7129, pci_device_1002_7129,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7833,
+	pci_ss_list_1002_7129,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7834 = {
-	0x7834, pci_device_1002_7834,
+static const pciDeviceInfo pci_dev_info_1002_7140 = {
+	0x7140, pci_device_1002_7140,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7834,
+	pci_ss_list_1002_7140,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7835 = {
-	0x7835, pci_device_1002_7835,
+static const pciDeviceInfo pci_dev_info_1002_7142 = {
+	0x7142, pci_device_1002_7142,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7835,
+	pci_ss_list_1002_7142,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7838 = {
-	0x7838, pci_device_1002_7838,
+static const pciDeviceInfo pci_dev_info_1002_7143 = {
+	0x7143, pci_device_1002_7143,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7838,
+	pci_ss_list_1002_7143,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_7c37 = {
-	0x7c37, pci_device_1002_7c37,
+static const pciDeviceInfo pci_dev_info_1002_7145 = {
+	0x7145, pci_device_1002_7145,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_7c37,
+	pci_ss_list_1002_7145,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_cab0 = {
-	0xcab0, pci_device_1002_cab0,
+static const pciDeviceInfo pci_dev_info_1002_7146 = {
+	0x7146, pci_device_1002_7146,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_cab0,
+	pci_ss_list_1002_7146,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_cab2 = {
-	0xcab2, pci_device_1002_cab2,
+static const pciDeviceInfo pci_dev_info_1002_7147 = {
+	0x7147, pci_device_1002_7147,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_cab2,
+	pci_ss_list_1002_7147,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_cab3 = {
-	0xcab3, pci_device_1002_cab3,
+static const pciDeviceInfo pci_dev_info_1002_7149 = {
+	0x7149, pci_device_1002_7149,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_cab3,
+	pci_ss_list_1002_7149,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1002_cbb2 = {
-	0xcbb2, pci_device_1002_cbb2,
+static const pciDeviceInfo pci_dev_info_1002_714a = {
+	0x714a, pci_device_1002_714a,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1002_cbb2,
+	pci_ss_list_1002_714a,
 #else
 	NULL,
 #endif
 	0
 };
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_1003_0201 = {
-	0x0201, pci_device_1003_0201,
+static const pciDeviceInfo pci_dev_info_1002_714b = {
+	0x714b, pci_device_1002_714b,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1003_0201,
+	pci_ss_list_1002_714b,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_1004_0005 = {
-	0x0005, pci_device_1004_0005,
+static const pciDeviceInfo pci_dev_info_1002_714c = {
+	0x714c, pci_device_1002_714c,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0005,
+	pci_ss_list_1002_714c,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0006 = {
-	0x0006, pci_device_1004_0006,
+static const pciDeviceInfo pci_dev_info_1002_714d = {
+	0x714d, pci_device_1002_714d,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0006,
+	pci_ss_list_1002_714d,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0007 = {
-	0x0007, pci_device_1004_0007,
+static const pciDeviceInfo pci_dev_info_1002_714e = {
+	0x714e, pci_device_1002_714e,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0007,
+	pci_ss_list_1002_714e,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0008 = {
-	0x0008, pci_device_1004_0008,
+static const pciDeviceInfo pci_dev_info_1002_7152 = {
+	0x7152, pci_device_1002_7152,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0008,
+	pci_ss_list_1002_7152,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0009 = {
-	0x0009, pci_device_1004_0009,
+static const pciDeviceInfo pci_dev_info_1002_7153 = {
+	0x7153, pci_device_1002_7153,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0009,
+	pci_ss_list_1002_7153,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_000c = {
-	0x000c, pci_device_1004_000c,
+static const pciDeviceInfo pci_dev_info_1002_715e = {
+	0x715e, pci_device_1002_715e,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_000c,
+	pci_ss_list_1002_715e,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_000d = {
-	0x000d, pci_device_1004_000d,
+static const pciDeviceInfo pci_dev_info_1002_715f = {
+	0x715f, pci_device_1002_715f,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_000d,
+	pci_ss_list_1002_715f,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0101 = {
-	0x0101, pci_device_1004_0101,
+static const pciDeviceInfo pci_dev_info_1002_7162 = {
+	0x7162, pci_device_1002_7162,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0101,
+	pci_ss_list_1002_7162,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0102 = {
-	0x0102, pci_device_1004_0102,
+static const pciDeviceInfo pci_dev_info_1002_7166 = {
+	0x7166, pci_device_1002_7166,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0102,
+	pci_ss_list_1002_7166,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0103 = {
-	0x0103, pci_device_1004_0103,
+static const pciDeviceInfo pci_dev_info_1002_7172 = {
+	0x7172, pci_device_1002_7172,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0103,
+	pci_ss_list_1002_7172,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0104 = {
-	0x0104, pci_device_1004_0104,
+static const pciDeviceInfo pci_dev_info_1002_7173 = {
+	0x7173, pci_device_1002_7173,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0104,
+	pci_ss_list_1002_7173,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0105 = {
-	0x0105, pci_device_1004_0105,
+static const pciDeviceInfo pci_dev_info_1002_7180 = {
+	0x7180, pci_device_1002_7180,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0105,
+	pci_ss_list_1002_7180,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0200 = {
-	0x0200, pci_device_1004_0200,
+static const pciDeviceInfo pci_dev_info_1002_7181 = {
+	0x7181, pci_device_1002_7181,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0200,
+	pci_ss_list_1002_7181,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0280 = {
-	0x0280, pci_device_1004_0280,
+static const pciDeviceInfo pci_dev_info_1002_7183 = {
+	0x7183, pci_device_1002_7183,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0280,
+	pci_ss_list_1002_7183,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0304 = {
-	0x0304, pci_device_1004_0304,
+static const pciDeviceInfo pci_dev_info_1002_7187 = {
+	0x7187, pci_device_1002_7187,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0304,
+	pci_ss_list_1002_7187,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0305 = {
-	0x0305, pci_device_1004_0305,
+static const pciDeviceInfo pci_dev_info_1002_7188 = {
+	0x7188, pci_device_1002_7188,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0305,
+	pci_ss_list_1002_7188,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0306 = {
-	0x0306, pci_device_1004_0306,
+static const pciDeviceInfo pci_dev_info_1002_718a = {
+	0x718a, pci_device_1002_718a,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0306,
+	pci_ss_list_1002_718a,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0307 = {
-	0x0307, pci_device_1004_0307,
+static const pciDeviceInfo pci_dev_info_1002_718c = {
+	0x718c, pci_device_1002_718c,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0307,
+	pci_ss_list_1002_718c,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0308 = {
-	0x0308, pci_device_1004_0308,
+static const pciDeviceInfo pci_dev_info_1002_718d = {
+	0x718d, pci_device_1002_718d,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0308,
+	pci_ss_list_1002_718d,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0702 = {
-	0x0702, pci_device_1004_0702,
+static const pciDeviceInfo pci_dev_info_1002_7193 = {
+	0x7193, pci_device_1002_7193,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0702,
+	pci_ss_list_1002_7193,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1004_0703 = {
-	0x0703, pci_device_1004_0703,
+static const pciDeviceInfo pci_dev_info_1002_719b = {
+	0x719b, pci_device_1002_719b,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1004_0703,
+	pci_ss_list_1002_719b,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-static const pciDeviceInfo pci_dev_info_1005_2064 = {
-	0x2064, pci_device_1005_2064,
+static const pciDeviceInfo pci_dev_info_1002_719f = {
+	0x719f, pci_device_1002_719f,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1005_2064,
+	pci_ss_list_1002_719f,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1005_2128 = {
-	0x2128, pci_device_1005_2128,
+static const pciDeviceInfo pci_dev_info_1002_71a0 = {
+	0x71a0, pci_device_1002_71a0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1005_2128,
+	pci_ss_list_1002_71a0,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1005_2301 = {
-	0x2301, pci_device_1005_2301,
+static const pciDeviceInfo pci_dev_info_1002_71a1 = {
+	0x71a1, pci_device_1002_71a1,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1005_2301,
+	pci_ss_list_1002_71a1,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1005_2302 = {
-	0x2302, pci_device_1005_2302,
+static const pciDeviceInfo pci_dev_info_1002_71a3 = {
+	0x71a3, pci_device_1002_71a3,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1005_2302,
+	pci_ss_list_1002_71a3,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1005_2364 = {
-	0x2364, pci_device_1005_2364,
+static const pciDeviceInfo pci_dev_info_1002_71a7 = {
+	0x71a7, pci_device_1002_71a7,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1005_2364,
+	pci_ss_list_1002_71a7,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1005_2464 = {
-	0x2464, pci_device_1005_2464,
+static const pciDeviceInfo pci_dev_info_1002_71bb = {
+	0x71bb, pci_device_1002_71bb,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1005_2464,
+	pci_ss_list_1002_71bb,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1005_2501 = {
-	0x2501, pci_device_1005_2501,
+static const pciDeviceInfo pci_dev_info_1002_71c0 = {
+	0x71c0, pci_device_1002_71c0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1005_2501,
+	pci_ss_list_1002_71c0,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0001 = {
-	0x0001, pci_device_100b_0001,
+static const pciDeviceInfo pci_dev_info_1002_71c2 = {
+	0x71c2, pci_device_1002_71c2,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0001,
+	pci_ss_list_1002_71c2,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0002 = {
-	0x0002, pci_device_100b_0002,
+static const pciDeviceInfo pci_dev_info_1002_71c4 = {
+	0x71c4, pci_device_1002_71c4,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0002,
+	pci_ss_list_1002_71c4,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_000e = {
-	0x000e, pci_device_100b_000e,
+static const pciDeviceInfo pci_dev_info_1002_71c5 = {
+	0x71c5, pci_device_1002_71c5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_000e,
+	pci_ss_list_1002_71c5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_000f = {
-	0x000f, pci_device_100b_000f,
+static const pciDeviceInfo pci_dev_info_1002_71c6 = {
+	0x71c6, pci_device_1002_71c6,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_000f,
+	pci_ss_list_1002_71c6,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0011 = {
-	0x0011, pci_device_100b_0011,
+static const pciDeviceInfo pci_dev_info_1002_71c7 = {
+	0x71c7, pci_device_1002_71c7,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0011,
+	pci_ss_list_1002_71c7,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0012 = {
-	0x0012, pci_device_100b_0012,
+static const pciDeviceInfo pci_dev_info_1002_71ce = {
+	0x71ce, pci_device_1002_71ce,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0012,
+	pci_ss_list_1002_71ce,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0020 = {
-	0x0020, pci_device_100b_0020,
+static const pciDeviceInfo pci_dev_info_1002_71d4 = {
+	0x71d4, pci_device_1002_71d4,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0020,
+	pci_ss_list_1002_71d4,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0021 = {
-	0x0021, pci_device_100b_0021,
+static const pciDeviceInfo pci_dev_info_1002_71d5 = {
+	0x71d5, pci_device_1002_71d5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0021,
+	pci_ss_list_1002_71d5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0022 = {
-	0x0022, pci_device_100b_0022,
+static const pciDeviceInfo pci_dev_info_1002_71d6 = {
+	0x71d6, pci_device_1002_71d6,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0022,
+	pci_ss_list_1002_71d6,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0028 = {
-	0x0028, pci_device_100b_0028,
+static const pciDeviceInfo pci_dev_info_1002_71de = {
+	0x71de, pci_device_1002_71de,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0028,
+	pci_ss_list_1002_71de,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_002a = {
-	0x002a, pci_device_100b_002a,
+static const pciDeviceInfo pci_dev_info_1002_71e0 = {
+	0x71e0, pci_device_1002_71e0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_002a,
+	pci_ss_list_1002_71e0,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_002b = {
-	0x002b, pci_device_100b_002b,
+static const pciDeviceInfo pci_dev_info_1002_71e2 = {
+	0x71e2, pci_device_1002_71e2,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_002b,
+	pci_ss_list_1002_71e2,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_002d = {
-	0x002d, pci_device_100b_002d,
+static const pciDeviceInfo pci_dev_info_1002_71e6 = {
+	0x71e6, pci_device_1002_71e6,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_002d,
+	pci_ss_list_1002_71e6,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_002e = {
-	0x002e, pci_device_100b_002e,
+static const pciDeviceInfo pci_dev_info_1002_71e7 = {
+	0x71e7, pci_device_1002_71e7,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_002e,
+	pci_ss_list_1002_71e7,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_002f = {
-	0x002f, pci_device_100b_002f,
+static const pciDeviceInfo pci_dev_info_1002_7210 = {
+	0x7210, pci_device_1002_7210,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_002f,
+	pci_ss_list_1002_7210,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0030 = {
-	0x0030, pci_device_100b_0030,
+static const pciDeviceInfo pci_dev_info_1002_7211 = {
+	0x7211, pci_device_1002_7211,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0030,
+	pci_ss_list_1002_7211,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0035 = {
-	0x0035, pci_device_100b_0035,
+static const pciDeviceInfo pci_dev_info_1002_7240 = {
+	0x7240, pci_device_1002_7240,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0035,
+	pci_ss_list_1002_7240,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0500 = {
-	0x0500, pci_device_100b_0500,
+static const pciDeviceInfo pci_dev_info_1002_7241 = {
+	0x7241, pci_device_1002_7241,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0500,
+	pci_ss_list_1002_7241,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0501 = {
-	0x0501, pci_device_100b_0501,
+static const pciDeviceInfo pci_dev_info_1002_7242 = {
+	0x7242, pci_device_1002_7242,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0501,
+	pci_ss_list_1002_7242,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0502 = {
-	0x0502, pci_device_100b_0502,
+static const pciDeviceInfo pci_dev_info_1002_7243 = {
+	0x7243, pci_device_1002_7243,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0502,
+	pci_ss_list_1002_7243,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0503 = {
-	0x0503, pci_device_100b_0503,
+static const pciDeviceInfo pci_dev_info_1002_7244 = {
+	0x7244, pci_device_1002_7244,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0503,
+	pci_ss_list_1002_7244,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0504 = {
-	0x0504, pci_device_100b_0504,
+static const pciDeviceInfo pci_dev_info_1002_7245 = {
+	0x7245, pci_device_1002_7245,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0504,
+	pci_ss_list_1002_7245,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0505 = {
-	0x0505, pci_device_100b_0505,
+static const pciDeviceInfo pci_dev_info_1002_7246 = {
+	0x7246, pci_device_1002_7246,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0505,
+	pci_ss_list_1002_7246,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0510 = {
-	0x0510, pci_device_100b_0510,
+static const pciDeviceInfo pci_dev_info_1002_7247 = {
+	0x7247, pci_device_1002_7247,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0510,
+	pci_ss_list_1002_7247,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0511 = {
-	0x0511, pci_device_100b_0511,
+static const pciDeviceInfo pci_dev_info_1002_7248 = {
+	0x7248, pci_device_1002_7248,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0511,
+	pci_ss_list_1002_7248,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_0515 = {
-	0x0515, pci_device_100b_0515,
+static const pciDeviceInfo pci_dev_info_1002_7249 = {
+	0x7249, pci_device_1002_7249,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_0515,
+	pci_ss_list_1002_7249,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100b_d001 = {
-	0xd001, pci_device_100b_d001,
+static const pciDeviceInfo pci_dev_info_1002_724a = {
+	0x724a, pci_device_1002_724a,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100b_d001,
+	pci_ss_list_1002_724a,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100c_3202 = {
-	0x3202, pci_device_100c_3202,
+static const pciDeviceInfo pci_dev_info_1002_724b = {
+	0x724b, pci_device_1002_724b,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100c_3202,
+	pci_ss_list_1002_724b,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100c_3205 = {
-	0x3205, pci_device_100c_3205,
+static const pciDeviceInfo pci_dev_info_1002_724c = {
+	0x724c, pci_device_1002_724c,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100c_3205,
+	pci_ss_list_1002_724c,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100c_3206 = {
-	0x3206, pci_device_100c_3206,
+static const pciDeviceInfo pci_dev_info_1002_724d = {
+	0x724d, pci_device_1002_724d,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100c_3206,
+	pci_ss_list_1002_724d,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100c_3207 = {
-	0x3207, pci_device_100c_3207,
+static const pciDeviceInfo pci_dev_info_1002_724e = {
+	0x724e, pci_device_1002_724e,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100c_3207,
+	pci_ss_list_1002_724e,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100c_3208 = {
-	0x3208, pci_device_100c_3208,
+static const pciDeviceInfo pci_dev_info_1002_7269 = {
+	0x7269, pci_device_1002_7269,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100c_3208,
+	pci_ss_list_1002_7269,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100c_4702 = {
-	0x4702, pci_device_100c_4702,
+static const pciDeviceInfo pci_dev_info_1002_726b = {
+	0x726b, pci_device_1002_726b,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100c_4702,
+	pci_ss_list_1002_726b,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100e_9000 = {
-	0x9000, pci_device_100e_9000,
+static const pciDeviceInfo pci_dev_info_1002_726e = {
+	0x726e, pci_device_1002_726e,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100e_9000,
+	pci_ss_list_1002_726e,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100e_9001 = {
-	0x9001, pci_device_100e_9001,
+static const pciDeviceInfo pci_dev_info_1002_7280 = {
+	0x7280, pci_device_1002_7280,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100e_9001,
+	pci_ss_list_1002_7280,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100e_9002 = {
-	0x9002, pci_device_100e_9002,
+static const pciDeviceInfo pci_dev_info_1002_7288 = {
+	0x7288, pci_device_1002_7288,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100e_9002,
+	pci_ss_list_1002_7288,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_100e_9100 = {
-	0x9100, pci_device_100e_9100,
+static const pciDeviceInfo pci_dev_info_1002_7291 = {
+	0x7291, pci_device_1002_7291,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_100e_9100,
+	pci_ss_list_1002_7291,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0001 = {
-	0x0001, pci_device_1011_0001,
+static const pciDeviceInfo pci_dev_info_1002_7293 = {
+	0x7293, pci_device_1002_7293,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0001,
+	pci_ss_list_1002_7293,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0002 = {
-	0x0002, pci_device_1011_0002,
+static const pciDeviceInfo pci_dev_info_1002_72a0 = {
+	0x72a0, pci_device_1002_72a0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0002,
+	pci_ss_list_1002_72a0,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0004 = {
-	0x0004, pci_device_1011_0004,
+static const pciDeviceInfo pci_dev_info_1002_72a8 = {
+	0x72a8, pci_device_1002_72a8,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0004,
+	pci_ss_list_1002_72a8,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0007 = {
-	0x0007, pci_device_1011_0007,
+static const pciDeviceInfo pci_dev_info_1002_72b1 = {
+	0x72b1, pci_device_1002_72b1,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0007,
+	pci_ss_list_1002_72b1,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0008 = {
-	0x0008, pci_device_1011_0008,
+static const pciDeviceInfo pci_dev_info_1002_72b3 = {
+	0x72b3, pci_device_1002_72b3,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0008,
+	pci_ss_list_1002_72b3,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0009 = {
-	0x0009, pci_device_1011_0009,
+static const pciDeviceInfo pci_dev_info_1002_7833 = {
+	0x7833, pci_device_1002_7833,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0009,
+	pci_ss_list_1002_7833,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_000a = {
-	0x000a, pci_device_1011_000a,
+static const pciDeviceInfo pci_dev_info_1002_7834 = {
+	0x7834, pci_device_1002_7834,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_000a,
+	pci_ss_list_1002_7834,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_000d = {
-	0x000d, pci_device_1011_000d,
+static const pciDeviceInfo pci_dev_info_1002_7835 = {
+	0x7835, pci_device_1002_7835,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_000d,
+	pci_ss_list_1002_7835,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_000f = {
-	0x000f, pci_device_1011_000f,
+static const pciDeviceInfo pci_dev_info_1002_7838 = {
+	0x7838, pci_device_1002_7838,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_000f,
+	pci_ss_list_1002_7838,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0014 = {
-	0x0014, pci_device_1011_0014,
+static const pciDeviceInfo pci_dev_info_1002_7919 = {
+	0x7919, pci_device_1002_7919,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0014,
+	pci_ss_list_1002_7919,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0016 = {
-	0x0016, pci_device_1011_0016,
+static const pciDeviceInfo pci_dev_info_1002_791e = {
+	0x791e, pci_device_1002_791e,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0016,
+	pci_ss_list_1002_791e,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0017 = {
-	0x0017, pci_device_1011_0017,
+static const pciDeviceInfo pci_dev_info_1002_791f = {
+	0x791f, pci_device_1002_791f,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0017,
+	pci_ss_list_1002_791f,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0019 = {
-	0x0019, pci_device_1011_0019,
+static const pciDeviceInfo pci_dev_info_1002_793f = {
+	0x793f, pci_device_1002_793f,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0019,
+	pci_ss_list_1002_793f,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_001a = {
-	0x001a, pci_device_1011_001a,
+static const pciDeviceInfo pci_dev_info_1002_7c37 = {
+	0x7c37, pci_device_1002_7c37,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_001a,
+	pci_ss_list_1002_7c37,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0021 = {
-	0x0021, pci_device_1011_0021,
+static const pciDeviceInfo pci_dev_info_1002_cab0 = {
+	0xcab0, pci_device_1002_cab0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0021,
+	pci_ss_list_1002_cab0,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0022 = {
-	0x0022, pci_device_1011_0022,
+static const pciDeviceInfo pci_dev_info_1002_cab2 = {
+	0xcab2, pci_device_1002_cab2,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0022,
+	pci_ss_list_1002_cab2,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0023 = {
-	0x0023, pci_device_1011_0023,
+static const pciDeviceInfo pci_dev_info_1002_cab3 = {
+	0xcab3, pci_device_1002_cab3,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0023,
+	pci_ss_list_1002_cab3,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0024 = {
-	0x0024, pci_device_1011_0024,
+static const pciDeviceInfo pci_dev_info_1002_cbb2 = {
+	0xcbb2, pci_device_1002_cbb2,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0024,
+	pci_ss_list_1002_cbb2,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0025 = {
-	0x0025, pci_device_1011_0025,
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1003_0201 = {
+	0x0201, pci_device_1003_0201,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1011_0025,
+	pci_ss_list_1003_0201,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1011_0026 = {
-	0x0026, pci_device_1011_0026,
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1004_0005 = {
+	0x0005, pci_device_1004_0005,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0005,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0006 = {
+	0x0006, pci_device_1004_0006,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0006,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0007 = {
+	0x0007, pci_device_1004_0007,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0007,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0008 = {
+	0x0008, pci_device_1004_0008,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0008,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0009 = {
+	0x0009, pci_device_1004_0009,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0009,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_000c = {
+	0x000c, pci_device_1004_000c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_000c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_000d = {
+	0x000d, pci_device_1004_000d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_000d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0101 = {
+	0x0101, pci_device_1004_0101,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0101,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0102 = {
+	0x0102, pci_device_1004_0102,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0102,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0103 = {
+	0x0103, pci_device_1004_0103,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0103,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0104 = {
+	0x0104, pci_device_1004_0104,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0104,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0105 = {
+	0x0105, pci_device_1004_0105,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0105,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0200 = {
+	0x0200, pci_device_1004_0200,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0200,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0280 = {
+	0x0280, pci_device_1004_0280,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0280,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0304 = {
+	0x0304, pci_device_1004_0304,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0304,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0305 = {
+	0x0305, pci_device_1004_0305,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0305,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0306 = {
+	0x0306, pci_device_1004_0306,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0306,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0307 = {
+	0x0307, pci_device_1004_0307,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0307,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0308 = {
+	0x0308, pci_device_1004_0308,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0308,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0702 = {
+	0x0702, pci_device_1004_0702,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0702,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1004_0703 = {
+	0x0703, pci_device_1004_0703,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1004_0703,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+static const pciDeviceInfo pci_dev_info_1005_2064 = {
+	0x2064, pci_device_1005_2064,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1005_2064,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1005_2128 = {
+	0x2128, pci_device_1005_2128,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1005_2128,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1005_2301 = {
+	0x2301, pci_device_1005_2301,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1005_2301,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1005_2302 = {
+	0x2302, pci_device_1005_2302,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1005_2302,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1005_2364 = {
+	0x2364, pci_device_1005_2364,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1005_2364,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1005_2464 = {
+	0x2464, pci_device_1005_2464,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1005_2464,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1005_2501 = {
+	0x2501, pci_device_1005_2501,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1005_2501,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0001 = {
+	0x0001, pci_device_100b_0001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0001,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0002 = {
+	0x0002, pci_device_100b_0002,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0002,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_000e = {
+	0x000e, pci_device_100b_000e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_000e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_000f = {
+	0x000f, pci_device_100b_000f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_000f,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0011 = {
+	0x0011, pci_device_100b_0011,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0011,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0012 = {
+	0x0012, pci_device_100b_0012,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0012,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0020 = {
+	0x0020, pci_device_100b_0020,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0020,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0021 = {
+	0x0021, pci_device_100b_0021,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0021,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0022 = {
+	0x0022, pci_device_100b_0022,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0022,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0028 = {
+	0x0028, pci_device_100b_0028,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0028,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_002a = {
+	0x002a, pci_device_100b_002a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_002a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_002b = {
+	0x002b, pci_device_100b_002b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_002b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_002d = {
+	0x002d, pci_device_100b_002d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_002d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_002e = {
+	0x002e, pci_device_100b_002e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_002e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_002f = {
+	0x002f, pci_device_100b_002f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_002f,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0030 = {
+	0x0030, pci_device_100b_0030,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0030,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0035 = {
+	0x0035, pci_device_100b_0035,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0035,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0500 = {
+	0x0500, pci_device_100b_0500,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0500,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0501 = {
+	0x0501, pci_device_100b_0501,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0501,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0502 = {
+	0x0502, pci_device_100b_0502,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0502,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0503 = {
+	0x0503, pci_device_100b_0503,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0503,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0504 = {
+	0x0504, pci_device_100b_0504,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0504,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0505 = {
+	0x0505, pci_device_100b_0505,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0505,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0510 = {
+	0x0510, pci_device_100b_0510,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0510,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0511 = {
+	0x0511, pci_device_100b_0511,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0511,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_0515 = {
+	0x0515, pci_device_100b_0515,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_0515,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100b_d001 = {
+	0xd001, pci_device_100b_d001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100b_d001,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100c_3202 = {
+	0x3202, pci_device_100c_3202,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100c_3202,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100c_3205 = {
+	0x3205, pci_device_100c_3205,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100c_3205,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100c_3206 = {
+	0x3206, pci_device_100c_3206,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100c_3206,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100c_3207 = {
+	0x3207, pci_device_100c_3207,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100c_3207,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100c_3208 = {
+	0x3208, pci_device_100c_3208,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100c_3208,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100c_4702 = {
+	0x4702, pci_device_100c_4702,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100c_4702,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100e_9000 = {
+	0x9000, pci_device_100e_9000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100e_9000,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100e_9001 = {
+	0x9001, pci_device_100e_9001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100e_9001,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100e_9002 = {
+	0x9002, pci_device_100e_9002,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100e_9002,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_100e_9100 = {
+	0x9100, pci_device_100e_9100,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_100e_9100,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0001 = {
+	0x0001, pci_device_1011_0001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0001,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0002 = {
+	0x0002, pci_device_1011_0002,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0002,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0004 = {
+	0x0004, pci_device_1011_0004,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0004,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0007 = {
+	0x0007, pci_device_1011_0007,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0007,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0008 = {
+	0x0008, pci_device_1011_0008,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0008,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0009 = {
+	0x0009, pci_device_1011_0009,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0009,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_000a = {
+	0x000a, pci_device_1011_000a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_000a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_000d = {
+	0x000d, pci_device_1011_000d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_000d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_000f = {
+	0x000f, pci_device_1011_000f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_000f,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0014 = {
+	0x0014, pci_device_1011_0014,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0014,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0016 = {
+	0x0016, pci_device_1011_0016,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0016,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0017 = {
+	0x0017, pci_device_1011_0017,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0017,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0019 = {
+	0x0019, pci_device_1011_0019,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0019,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_001a = {
+	0x001a, pci_device_1011_001a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_001a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0021 = {
+	0x0021, pci_device_1011_0021,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0021,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0022 = {
+	0x0022, pci_device_1011_0022,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0022,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0023 = {
+	0x0023, pci_device_1011_0023,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0023,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0024 = {
+	0x0024, pci_device_1011_0024,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0024,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0025 = {
+	0x0025, pci_device_1011_0025,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1011_0025,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1011_0026 = {
+	0x0026, pci_device_1011_0026,
 #ifdef INIT_SUBSYS_INFO
 	pci_ss_list_1011_0026,
 #else
@@ -65136,6 +75126,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1014_0058 = {
+	0x0058, pci_device_1014_0058,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1014_0058,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1014_005c = {
 	0x005c, pci_device_1014_005c,
 #ifdef INIT_SUBSYS_INFO
@@ -65559,6 +75558,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1014_0308 = {
+	0x0308, pci_device_1014_0308,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1014_0308,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1014_0314 = {
 	0x0314, pci_device_1014_0314,
 #ifdef INIT_SUBSYS_INFO
@@ -65617,6 +75625,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_101a_1dc1 = {
+	0x1dc1, pci_device_101a_1dc1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_101a_1dc1,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_101c_0193 = {
@@ -65892,6 +75909,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1022_2080 = {
+	0x2080, pci_device_1022_2080,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1022_2080,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1022_2081 = {
 	0x2081, pci_device_1022_2081,
 #ifdef INIT_SUBSYS_INFO
@@ -66792,6 +76818,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1025_0090 = {
+	0x0090, pci_device_1025_0090,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1025_0090,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1025_1435 = {
 	0x1435, pci_device_1025_1435,
 #ifdef INIT_SUBSYS_INFO
@@ -67287,6 +77322,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1028_0004 = {
+	0x0004, pci_device_1028_0004,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1028_0004,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1028_0006 = {
 	0x0006, pci_device_1028_0006,
 #ifdef INIT_SUBSYS_INFO
@@ -67422,6 +77466,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1028_1f03 = {
+	0x1f03, pci_device_1028_1f03,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1028_1f03,
+#else
+	NULL,
+#endif
+	0
+};
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_102a_0000 = {
 	0x0000, pci_device_102a_0000,
@@ -67559,6 +77612,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_102b_0522 = {
+	0x0522, pci_device_102b_0522,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_102b_0522,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_102b_0525 = {
 	0x0525, pci_device_102b_0525,
 #ifdef INIT_SUBSYS_INFO
@@ -67658,6 +77720,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_102b_4cdc = {
+	0x4cdc, pci_device_102b_4cdc,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_102b_4cdc,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_102b_4fc5 = {
+	0x4fc5, pci_device_102b_4fc5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_102b_4fc5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_102b_5e10 = {
+	0x5e10, pci_device_102b_5e10,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_102b_5e10,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_102b_6573 = {
 	0x6573, pci_device_102b_6573,
 #ifdef INIT_SUBSYS_INFO
@@ -67832,6 +77921,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_102f_0032 = {
+	0x0032, pci_device_102f_0032,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_102f_0032,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_102f_0105 = {
 	0x0105, pci_device_102f_0105,
 #ifdef INIT_SUBSYS_INFO
@@ -68265,6 +78363,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1033_0125 = {
+	0x0125, pci_device_1033_0125,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1033_0125,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1033_013a = {
+	0x013a, pci_device_1033_013a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1033_013a,
+#else
+	NULL,
+#endif
+	0
+};
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1036_0000 = {
 	0x0000, pci_device_1036_0000,
@@ -68393,6 +78509,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1039_0186 = {
+	0x0186, pci_device_1039_0186,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_0186,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1039_0190 = {
 	0x0190, pci_device_1039_0190,
 #ifdef INIT_SUBSYS_INFO
@@ -68654,6 +78779,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1039_0662 = {
+	0x0662, pci_device_1039_0662,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_0662,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1039_0730 = {
 	0x0730, pci_device_1039_0730,
 #ifdef INIT_SUBSYS_INFO
@@ -68798,6 +78932,69 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1039_0966 = {
+	0x0966, pci_device_1039_0966,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_0966,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1039_0968 = {
+	0x0968, pci_device_1039_0968,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_0968,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1039_1180 = {
+	0x1180, pci_device_1039_1180,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_1180,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1039_1182 = {
+	0x1182, pci_device_1039_1182,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_1182,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1039_1183 = {
+	0x1183, pci_device_1039_1183,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_1183,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1039_1184 = {
+	0x1184, pci_device_1039_1184,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_1184,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1039_1185 = {
+	0x1185, pci_device_1039_1185,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_1185,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1039_3602 = {
 	0x3602, pci_device_1039_3602,
 #ifdef INIT_SUBSYS_INFO
@@ -69005,6 +79202,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1039_6350 = {
+	0x6350, pci_device_1039_6350,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_6350,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1039_6351 = {
+	0x6351, pci_device_1039_6351,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1039_6351,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1039_7001 = {
 	0x7001, pci_device_1039_7001,
 #ifdef INIT_SUBSYS_INFO
@@ -69077,37 +79292,37 @@
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_103c_1005 = {
-	0x1005, pci_device_103c_1005,
+static const pciDeviceInfo pci_dev_info_1039_7502 = {
+	0x7502, pci_device_1039_7502,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_103c_1005,
+	pci_ss_list_1039_7502,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_103c_1006 = {
-	0x1006, pci_device_103c_1006,
+static const pciDeviceInfo pci_dev_info_103c_002a = {
+	0x002a, pci_device_103c_002a,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_103c_1006,
+	pci_ss_list_103c_002a,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_103c_1008 = {
-	0x1008, pci_device_103c_1008,
+static const pciDeviceInfo pci_dev_info_103c_1005 = {
+	0x1005, pci_device_103c_1005,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_103c_1008,
+	pci_ss_list_103c_1005,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_103c_100a = {
-	0x100a, pci_device_103c_100a,
+static const pciDeviceInfo pci_dev_info_103c_1008 = {
+	0x1008, pci_device_103c_1008,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_103c_100a,
+	pci_ss_list_103c_1008,
 #else
 	NULL,
 #endif
@@ -69329,6 +79544,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_103c_127b = {
+	0x127b, pci_device_103c_127b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_127b,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_103c_127c = {
 	0x127c, pci_device_103c_127c,
 #ifdef INIT_SUBSYS_INFO
@@ -69365,6 +79589,42 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_103c_12eb = {
+	0x12eb, pci_device_103c_12eb,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_12eb,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_103c_12ec = {
+	0x12ec, pci_device_103c_12ec,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_12ec,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_103c_12ee = {
+	0x12ee, pci_device_103c_12ee,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_12ee,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_103c_12f8 = {
+	0x12f8, pci_device_103c_12f8,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_12f8,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_103c_12fa = {
 	0x12fa, pci_device_103c_12fa,
 #ifdef INIT_SUBSYS_INFO
@@ -69374,6 +79634,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_103c_1302 = {
+	0x1302, pci_device_103c_1302,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_1302,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_103c_1303 = {
+	0x1303, pci_device_103c_1303,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_1303,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_103c_2910 = {
 	0x2910, pci_device_103c_2910,
 #ifdef INIT_SUBSYS_INFO
@@ -69401,6 +79679,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_103c_3085 = {
+	0x3085, pci_device_103c_3085,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_3085,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_103c_30b5 = {
+	0x30b5, pci_device_103c_30b5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_30b5,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_103c_3220 = {
 	0x3220, pci_device_103c_3220,
 #ifdef INIT_SUBSYS_INFO
@@ -69419,6 +79715,60 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_103c_3238 = {
+	0x3238, pci_device_103c_3238,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_3238,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_103c_4030 = {
+	0x4030, pci_device_103c_4030,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_4030,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_103c_4031 = {
+	0x4031, pci_device_103c_4031,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_4031,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_103c_4037 = {
+	0x4037, pci_device_103c_4037,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_4037,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_103c_403b = {
+	0x403b, pci_device_103c_403b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_403b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_103c_60e8 = {
+	0x60e8, pci_device_103c_60e8,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_103c_60e8,
+#else
+	NULL,
+#endif
+	0
+};
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1042_1000 = {
 	0x1000, pci_device_1042_1000,
@@ -69476,6 +79826,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1043_0c11 = {
+	0x0c11, pci_device_1043_0c11,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1043_0c11,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1043_4015 = {
 	0x4015, pci_device_1043_4015,
 #ifdef INIT_SUBSYS_INFO
@@ -69512,17 +79871,44 @@
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1043_807b = {
-	0x807b, pci_device_1043_807b,
+static const pciDeviceInfo pci_dev_info_1043_8047 = {
+	0x8047, pci_device_1043_8047,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1043_807b,
+	pci_ss_list_1043_8047,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1043_80bb = {
-	0x80bb, pci_device_1043_80bb,
+static const pciDeviceInfo pci_dev_info_1043_807b = {
+	0x807b, pci_device_1043_807b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1043_807b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1043_8095 = {
+	0x8095, pci_device_1043_8095,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1043_8095,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1043_80ac = {
+	0x80ac, pci_device_1043_80ac,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1043_80ac,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1043_80bb = {
+	0x80bb, pci_device_1043_80bb,
 #ifdef INIT_SUBSYS_INFO
 	pci_ss_list_1043_80bb,
 #else
@@ -69548,6 +79934,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1043_815a = {
+	0x815a, pci_device_1043_815a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1043_815a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1043_8168 = {
+	0x8168, pci_device_1043_8168,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1043_8168,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1043_8187 = {
 	0x8187, pci_device_1043_8187,
 #ifdef INIT_SUBSYS_INFO
@@ -69566,6 +79970,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1043_81f4 = {
+	0x81f4, pci_device_1043_81f4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1043_81f4,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1044_1012 = {
@@ -70277,6 +80690,51 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_104c_8039 = {
+	0x8039, pci_device_104c_8039,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_104c_8039,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_104c_803a = {
+	0x803a, pci_device_104c_803a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_104c_803a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_104c_803b = {
+	0x803b, pci_device_104c_803b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_104c_803b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_104c_803c = {
+	0x803c, pci_device_104c_803c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_104c_803c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_104c_803d = {
+	0x803d, pci_device_104c_803d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_104c_803d,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_104c_8201 = {
 	0x8201, pci_device_104c_8201,
 #ifdef INIT_SUBSYS_INFO
@@ -70295,6 +80753,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_104c_8231 = {
+	0x8231, pci_device_104c_8231,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_104c_8231,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_104c_8235 = {
+	0x8235, pci_device_104c_8235,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_104c_8235,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_104c_8400 = {
 	0x8400, pci_device_104c_8400,
 #ifdef INIT_SUBSYS_INFO
@@ -70863,6 +81339,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1050_0033 = {
+	0x0033, pci_device_1050_0033,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1050_0033,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1050_0105 = {
 	0x0105, pci_device_1050_0105,
 #ifdef INIT_SUBSYS_INFO
@@ -71037,6 +81522,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1057_0012 = {
+	0x0012, pci_device_1057_0012,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1057_0012,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1057_0100 = {
 	0x0100, pci_device_1057_0100,
 #ifdef INIT_SUBSYS_INFO
@@ -71082,6 +81576,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1057_3052 = {
+	0x3052, pci_device_1057_3052,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1057_3052,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1057_3055 = {
+	0x3055, pci_device_1057_3055,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1057_3055,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1057_3410 = {
 	0x3410, pci_device_1057_3410,
 #ifdef INIT_SUBSYS_INFO
@@ -71181,6 +81693,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1057_5809 = {
+	0x5809, pci_device_1057_5809,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1057_5809,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1057_6400 = {
 	0x6400, pci_device_1057_6400,
 #ifdef INIT_SUBSYS_INFO
@@ -71371,6 +81892,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_105a_4302 = {
+	0x4302, pci_device_105a_4302,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_105a_4302,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_105a_4d30 = {
 	0x4d30, pci_device_105a_4d30,
 #ifdef INIT_SUBSYS_INFO
@@ -71515,6 +82045,53 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_105a_8350 = {
+	0x8350, pci_device_105a_8350,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_105a_8350,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_105a_8650 = {
+	0x8650, pci_device_105a_8650,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_105a_8650,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_105a_c350 = {
+	0xc350, pci_device_105a_c350,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_105a_c350,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_105a_e350 = {
+	0xe350, pci_device_105a_e350,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_105a_e350,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_105b_0c4d = {
+	0x0c4d, pci_device_105b_0c4d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_105b_0c4d,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 static const pciDeviceInfo pci_dev_info_105d_2309 = {
 	0x2309, pci_device_105d_2309,
@@ -72694,6 +83271,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1073_1000 = {
+	0x1000, pci_device_1073_1000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1073_1000,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1073_2000 = {
 	0x2000, pci_device_1073_2000,
 #ifdef INIT_SUBSYS_INFO
@@ -72851,19 +83437,19 @@
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1077_3010 = {
-	0x3010, pci_device_1077_3010,
+static const pciDeviceInfo pci_dev_info_1077_3022 = {
+	0x3022, pci_device_1077_3022,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1077_3010,
+	pci_ss_list_1077_3022,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1077_3022 = {
-	0x3022, pci_device_1077_3022,
+static const pciDeviceInfo pci_dev_info_1077_3032 = {
+	0x3032, pci_device_1077_3032,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1077_3022,
+	pci_ss_list_1077_3032,
 #else
 	NULL,
 #endif
@@ -72887,6 +83473,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1077_4032 = {
+	0x4032, pci_device_1077_4032,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1077_4032,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1077_5432 = {
+	0x5432, pci_device_1077_5432,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1077_5432,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1077_6312 = {
 	0x6312, pci_device_1077_6312,
 #ifdef INIT_SUBSYS_INFO
@@ -73024,6 +83628,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_107d_204d = {
+	0x204d, pci_device_107d_204d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_107d_204d,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_107d_2134 = {
 	0x2134, pci_device_107d_2134,
 #ifdef INIT_SUBSYS_INFO
@@ -73861,6 +84474,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1093_1150 = {
+	0x1150, pci_device_1093_1150,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1093_1150,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1093_1170 = {
 	0x1170, pci_device_1093_1170,
 #ifdef INIT_SUBSYS_INFO
@@ -75114,6 +85736,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10b5_9656 = {
+	0x9656, pci_device_10b5_9656,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10b5_9656,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10b5_bb04 = {
 	0xbb04, pci_device_10b5_bb04,
 #ifdef INIT_SUBSYS_INFO
@@ -75123,6 +85754,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10b5_c001 = {
+	0xc001, pci_device_10b5_c001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10b5_c001,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_10b6_0001 = {
@@ -75649,6 +86289,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10b7_9054 = {
+	0x9054, pci_device_10b7_9054,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10b7_9054,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10b7_9055 = {
 	0x9055, pci_device_10b7_9055,
 #ifdef INIT_SUBSYS_INFO
@@ -77249,6 +87898,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0044 = {
+	0x0044, pci_device_10de_0044,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0044,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0045 = {
 	0x0045, pci_device_10de_0045,
 #ifdef INIT_SUBSYS_INFO
@@ -77258,6 +87916,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0046 = {
+	0x0046, pci_device_10de_0046,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0046,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0047 = {
 	0x0047, pci_device_10de_0047,
 #ifdef INIT_SUBSYS_INFO
@@ -77267,6 +87934,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0048 = {
+	0x0048, pci_device_10de_0048,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0048,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0049 = {
 	0x0049, pci_device_10de_0049,
 #ifdef INIT_SUBSYS_INFO
@@ -77276,6 +87952,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_004d = {
+	0x004d, pci_device_10de_004d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_004d,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_004e = {
 	0x004e, pci_device_10de_004e,
 #ifdef INIT_SUBSYS_INFO
@@ -77618,6 +88303,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0090 = {
+	0x0090, pci_device_10de_0090,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0090,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0091 = {
 	0x0091, pci_device_10de_0091,
 #ifdef INIT_SUBSYS_INFO
@@ -77636,6 +88330,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0093 = {
+	0x0093, pci_device_10de_0093,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0093,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0098 = {
+	0x0098, pci_device_10de_0098,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0098,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0099 = {
 	0x0099, pci_device_10de_0099,
 #ifdef INIT_SUBSYS_INFO
@@ -77645,6 +88357,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_009d = {
+	0x009d, pci_device_10de_009d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_009d,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_00a0 = {
 	0x00a0, pci_device_10de_00a0,
 #ifdef INIT_SUBSYS_INFO
@@ -77681,6 +88402,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_00c3 = {
+	0x00c3, pci_device_10de_00c3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_00c3,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_00c8 = {
 	0x00c8, pci_device_10de_00c8,
 #ifdef INIT_SUBSYS_INFO
@@ -77987,6 +88717,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_00f4 = {
+	0x00f4, pci_device_10de_00f4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_00f4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_00f5 = {
+	0x00f5, pci_device_10de_00f5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_00f5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_00f6 = {
+	0x00f6, pci_device_10de_00f6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_00f6,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_00f8 = {
 	0x00f8, pci_device_10de_00f8,
 #ifdef INIT_SUBSYS_INFO
@@ -78149,6 +88906,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0143 = {
+	0x0143, pci_device_10de_0143,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0143,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0144 = {
 	0x0144, pci_device_10de_0144,
 #ifdef INIT_SUBSYS_INFO
@@ -78176,6 +88942,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0147 = {
+	0x0147, pci_device_10de_0147,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0147,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0148 = {
 	0x0148, pci_device_10de_0148,
 #ifdef INIT_SUBSYS_INFO
@@ -78185,6 +88960,42 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0149 = {
+	0x0149, pci_device_10de_0149,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0149,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_014a = {
+	0x014a, pci_device_10de_014a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_014a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_014c = {
+	0x014c, pci_device_10de_014c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_014c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_014d = {
+	0x014d, pci_device_10de_014d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_014d,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_014e = {
 	0x014e, pci_device_10de_014e,
 #ifdef INIT_SUBSYS_INFO
@@ -78239,6 +89050,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0160 = {
+	0x0160, pci_device_10de_0160,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0160,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0161 = {
 	0x0161, pci_device_10de_0161,
 #ifdef INIT_SUBSYS_INFO
@@ -78248,6 +89068,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0162 = {
+	0x0162, pci_device_10de_0162,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0162,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0163 = {
+	0x0163, pci_device_10de_0163,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0163,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0164 = {
 	0x0164, pci_device_10de_0164,
 #ifdef INIT_SUBSYS_INFO
@@ -78266,6 +89104,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0166 = {
+	0x0166, pci_device_10de_0166,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0166,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0167 = {
 	0x0167, pci_device_10de_0167,
 #ifdef INIT_SUBSYS_INFO
@@ -78275,6 +89122,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0168 = {
+	0x0168, pci_device_10de_0168,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0168,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0169 = {
+	0x0169, pci_device_10de_0169,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0169,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_016a = {
+	0x016a, pci_device_10de_016a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_016a,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0170 = {
 	0x0170, pci_device_10de_0170,
 #ifdef INIT_SUBSYS_INFO
@@ -78428,6 +89302,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0184 = {
+	0x0184, pci_device_10de_0184,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0184,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0185 = {
 	0x0185, pci_device_10de_0185,
 #ifdef INIT_SUBSYS_INFO
@@ -78482,6 +89365,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_018c = {
+	0x018c, pci_device_10de_018c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_018c,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_018d = {
 	0x018d, pci_device_10de_018d,
 #ifdef INIT_SUBSYS_INFO
@@ -78491,6 +89383,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0191 = {
+	0x0191, pci_device_10de_0191,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0191,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0193 = {
+	0x0193, pci_device_10de_0193,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0193,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_01a0 = {
 	0x01a0, pci_device_10de_01a0,
 #ifdef INIT_SUBSYS_INFO
@@ -78626,6 +89536,96 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_01d1 = {
+	0x01d1, pci_device_10de_01d1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01d1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_01d3 = {
+	0x01d3, pci_device_10de_01d3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01d3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_01d6 = {
+	0x01d6, pci_device_10de_01d6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01d6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_01d7 = {
+	0x01d7, pci_device_10de_01d7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01d7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_01d8 = {
+	0x01d8, pci_device_10de_01d8,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01d8,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_01da = {
+	0x01da, pci_device_10de_01da,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01da,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_01dc = {
+	0x01dc, pci_device_10de_01dc,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01dc,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_01dd = {
+	0x01dd, pci_device_10de_01dd,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01dd,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_01de = {
+	0x01de, pci_device_10de_01de,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01de,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_01df = {
+	0x01df, pci_device_10de_01df,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_01df,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_01e0 = {
 	0x01e0, pci_device_10de_01e0,
 #ifdef INIT_SUBSYS_INFO
@@ -78743,6 +89743,42 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0211 = {
+	0x0211, pci_device_10de_0211,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0211,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0212 = {
+	0x0212, pci_device_10de_0212,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0212,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0215 = {
+	0x0215, pci_device_10de_0215,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0215,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0218 = {
+	0x0218, pci_device_10de_0218,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0218,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0221 = {
 	0x0221, pci_device_10de_0221,
 #ifdef INIT_SUBSYS_INFO
@@ -78752,6 +89788,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0222 = {
+	0x0222, pci_device_10de_0222,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0222,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0240 = {
 	0x0240, pci_device_10de_0240,
 #ifdef INIT_SUBSYS_INFO
@@ -79211,6 +90256,141 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0290 = {
+	0x0290, pci_device_10de_0290,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0290,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0291 = {
+	0x0291, pci_device_10de_0291,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0291,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0292 = {
+	0x0292, pci_device_10de_0292,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0292,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0293 = {
+	0x0293, pci_device_10de_0293,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0293,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0294 = {
+	0x0294, pci_device_10de_0294,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0294,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0295 = {
+	0x0295, pci_device_10de_0295,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0295,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0297 = {
+	0x0297, pci_device_10de_0297,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0297,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0298 = {
+	0x0298, pci_device_10de_0298,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0298,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_0299 = {
+	0x0299, pci_device_10de_0299,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0299,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_029a = {
+	0x029a, pci_device_10de_029a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_029a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_029b = {
+	0x029b, pci_device_10de_029b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_029b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_029c = {
+	0x029c, pci_device_10de_029c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_029c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_029d = {
+	0x029d, pci_device_10de_029d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_029d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_029e = {
+	0x029e, pci_device_10de_029e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_029e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_029f = {
+	0x029f, pci_device_10de_029f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_029f,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_02a0 = {
 	0x02a0, pci_device_10de_02a0,
 #ifdef INIT_SUBSYS_INFO
@@ -79220,6 +90400,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_02e0 = {
+	0x02e0, pci_device_10de_02e0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_02e0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_02e1 = {
+	0x02e1, pci_device_10de_02e1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_02e1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10de_02e2 = {
+	0x02e2, pci_device_10de_02e2,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_02e2,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_02f0 = {
 	0x02f0, pci_device_10de_02f0,
 #ifdef INIT_SUBSYS_INFO
@@ -79922,6 +91129,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_036b = {
+	0x036b, pci_device_10de_036b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_036b,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_036c = {
 	0x036c, pci_device_10de_036c,
 #ifdef INIT_SUBSYS_INFO
@@ -79949,6 +91165,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_10de_0370 = {
+	0x0370, pci_device_10de_0370,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10de_0370,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_10de_0371 = {
 	0x0371, pci_device_10de_0371,
 #ifdef INIT_SUBSYS_INFO
@@ -79976,1100 +91201,2209 @@
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10de_037a = {
-	0x037a, pci_device_10de_037a,
+static const pciDeviceInfo pci_dev_info_10de_0374 = {
+	0x0374, pci_device_10de_0374,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10de_037a,
+	pci_ss_list_10de_0374,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10de_037e = {
-	0x037e, pci_device_10de_037e,
+static const pciDeviceInfo pci_dev_info_10de_0375 = {
+	0x0375, pci_device_10de_0375,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10de_037e,
+	pci_ss_list_10de_0375,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10de_037f = {
-	0x037f, pci_device_10de_037f,
+static const pciDeviceInfo pci_dev_info_10de_0376 = {
+	0x0376, pci_device_10de_0376,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10de_037f,
+	pci_ss_list_10de_0376,
 #else
 	NULL,
 #endif
 	0
 };
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10df_1ae5 = {
-	0x1ae5, pci_device_10df_1ae5,
+static const pciDeviceInfo pci_dev_info_10de_0377 = {
+	0x0377, pci_device_10de_0377,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_1ae5,
+	pci_ss_list_10de_0377,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f085 = {
-	0xf085, pci_device_10df_f085,
+static const pciDeviceInfo pci_dev_info_10de_0378 = {
+	0x0378, pci_device_10de_0378,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f085,
+	pci_ss_list_10de_0378,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f095 = {
-	0xf095, pci_device_10df_f095,
+static const pciDeviceInfo pci_dev_info_10de_037a = {
+	0x037a, pci_device_10de_037a,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f095,
+	pci_ss_list_10de_037a,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f098 = {
-	0xf098, pci_device_10df_f098,
+static const pciDeviceInfo pci_dev_info_10de_037e = {
+	0x037e, pci_device_10de_037e,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f098,
+	pci_ss_list_10de_037e,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f0a1 = {
-	0xf0a1, pci_device_10df_f0a1,
+static const pciDeviceInfo pci_dev_info_10de_037f = {
+	0x037f, pci_device_10de_037f,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f0a1,
+	pci_ss_list_10de_037f,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f0a5 = {
-	0xf0a5, pci_device_10df_f0a5,
+static const pciDeviceInfo pci_dev_info_10de_0390 = {
+	0x0390, pci_device_10de_0390,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f0a5,
+	pci_ss_list_10de_0390,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f0b5 = {
-	0xf0b5, pci_device_10df_f0b5,
+static const pciDeviceInfo pci_dev_info_10de_0391 = {
+	0x0391, pci_device_10de_0391,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f0b5,
+	pci_ss_list_10de_0391,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f0d1 = {
-	0xf0d1, pci_device_10df_f0d1,
+static const pciDeviceInfo pci_dev_info_10de_0392 = {
+	0x0392, pci_device_10de_0392,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f0d1,
+	pci_ss_list_10de_0392,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f0d5 = {
-	0xf0d5, pci_device_10df_f0d5,
+static const pciDeviceInfo pci_dev_info_10de_0393 = {
+	0x0393, pci_device_10de_0393,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f0d5,
+	pci_ss_list_10de_0393,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f0e1 = {
-	0xf0e1, pci_device_10df_f0e1,
+static const pciDeviceInfo pci_dev_info_10de_0394 = {
+	0x0394, pci_device_10de_0394,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f0e1,
+	pci_ss_list_10de_0394,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f0e5 = {
-	0xf0e5, pci_device_10df_f0e5,
+static const pciDeviceInfo pci_dev_info_10de_0395 = {
+	0x0395, pci_device_10de_0395,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f0e5,
+	pci_ss_list_10de_0395,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f0f5 = {
-	0xf0f5, pci_device_10df_f0f5,
+static const pciDeviceInfo pci_dev_info_10de_0397 = {
+	0x0397, pci_device_10de_0397,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f0f5,
+	pci_ss_list_10de_0397,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f700 = {
-	0xf700, pci_device_10df_f700,
+static const pciDeviceInfo pci_dev_info_10de_0398 = {
+	0x0398, pci_device_10de_0398,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f700,
+	pci_ss_list_10de_0398,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f701 = {
-	0xf701, pci_device_10df_f701,
+static const pciDeviceInfo pci_dev_info_10de_039b = {
+	0x039b, pci_device_10de_039b,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f701,
+	pci_ss_list_10de_039b,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f800 = {
-	0xf800, pci_device_10df_f800,
+static const pciDeviceInfo pci_dev_info_10de_039c = {
+	0x039c, pci_device_10de_039c,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f800,
+	pci_ss_list_10de_039c,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f801 = {
-	0xf801, pci_device_10df_f801,
+static const pciDeviceInfo pci_dev_info_10de_039e = {
+	0x039e, pci_device_10de_039e,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f801,
+	pci_ss_list_10de_039e,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f900 = {
-	0xf900, pci_device_10df_f900,
+static const pciDeviceInfo pci_dev_info_10de_03a0 = {
+	0x03a0, pci_device_10de_03a0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f900,
+	pci_ss_list_10de_03a0,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f901 = {
-	0xf901, pci_device_10df_f901,
+static const pciDeviceInfo pci_dev_info_10de_03a1 = {
+	0x03a1, pci_device_10de_03a1,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f901,
+	pci_ss_list_10de_03a1,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f980 = {
-	0xf980, pci_device_10df_f980,
+static const pciDeviceInfo pci_dev_info_10de_03a2 = {
+	0x03a2, pci_device_10de_03a2,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f980,
+	pci_ss_list_10de_03a2,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f981 = {
-	0xf981, pci_device_10df_f981,
+static const pciDeviceInfo pci_dev_info_10de_03a3 = {
+	0x03a3, pci_device_10de_03a3,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f981,
+	pci_ss_list_10de_03a3,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_f982 = {
-	0xf982, pci_device_10df_f982,
+static const pciDeviceInfo pci_dev_info_10de_03a4 = {
+	0x03a4, pci_device_10de_03a4,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_f982,
+	pci_ss_list_10de_03a4,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_fa00 = {
-	0xfa00, pci_device_10df_fa00,
+static const pciDeviceInfo pci_dev_info_10de_03a5 = {
+	0x03a5, pci_device_10de_03a5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_fa00,
+	pci_ss_list_10de_03a5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_fb00 = {
-	0xfb00, pci_device_10df_fb00,
+static const pciDeviceInfo pci_dev_info_10de_03a6 = {
+	0x03a6, pci_device_10de_03a6,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_fb00,
+	pci_ss_list_10de_03a6,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_fc00 = {
-	0xfc00, pci_device_10df_fc00,
+static const pciDeviceInfo pci_dev_info_10de_03a7 = {
+	0x03a7, pci_device_10de_03a7,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_fc00,
+	pci_ss_list_10de_03a7,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_fc10 = {
-	0xfc10, pci_device_10df_fc10,
+static const pciDeviceInfo pci_dev_info_10de_03a8 = {
+	0x03a8, pci_device_10de_03a8,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_fc10,
+	pci_ss_list_10de_03a8,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_fc20 = {
-	0xfc20, pci_device_10df_fc20,
+static const pciDeviceInfo pci_dev_info_10de_03a9 = {
+	0x03a9, pci_device_10de_03a9,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_fc20,
+	pci_ss_list_10de_03a9,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_fd00 = {
-	0xfd00, pci_device_10df_fd00,
+static const pciDeviceInfo pci_dev_info_10de_03aa = {
+	0x03aa, pci_device_10de_03aa,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_fd00,
+	pci_ss_list_10de_03aa,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_fe00 = {
-	0xfe00, pci_device_10df_fe00,
+static const pciDeviceInfo pci_dev_info_10de_03ab = {
+	0x03ab, pci_device_10de_03ab,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_fe00,
+	pci_ss_list_10de_03ab,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10df_ff00 = {
-	0xff00, pci_device_10df_ff00,
+static const pciDeviceInfo pci_dev_info_10de_03ac = {
+	0x03ac, pci_device_10de_03ac,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10df_ff00,
+	pci_ss_list_10de_03ac,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-static const pciDeviceInfo pci_dev_info_10e0_5026 = {
-	0x5026, pci_device_10e0_5026,
+static const pciDeviceInfo pci_dev_info_10de_03ad = {
+	0x03ad, pci_device_10de_03ad,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e0_5026,
+	pci_ss_list_10de_03ad,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e0_5027 = {
-	0x5027, pci_device_10e0_5027,
+static const pciDeviceInfo pci_dev_info_10de_03ae = {
+	0x03ae, pci_device_10de_03ae,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e0_5027,
+	pci_ss_list_10de_03ae,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e0_5028 = {
-	0x5028, pci_device_10e0_5028,
+static const pciDeviceInfo pci_dev_info_10de_03af = {
+	0x03af, pci_device_10de_03af,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e0_5028,
+	pci_ss_list_10de_03af,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e0_8849 = {
-	0x8849, pci_device_10e0_8849,
+static const pciDeviceInfo pci_dev_info_10de_03b0 = {
+	0x03b0, pci_device_10de_03b0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e0_8849,
+	pci_ss_list_10de_03b0,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e0_8853 = {
-	0x8853, pci_device_10e0_8853,
+static const pciDeviceInfo pci_dev_info_10de_03b1 = {
+	0x03b1, pci_device_10de_03b1,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e0_8853,
+	pci_ss_list_10de_03b1,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e0_9128 = {
-	0x9128, pci_device_10e0_9128,
+static const pciDeviceInfo pci_dev_info_10de_03b2 = {
+	0x03b2, pci_device_10de_03b2,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e0_9128,
+	pci_ss_list_10de_03b2,
 #else
 	NULL,
 #endif
 	0
 };
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10e1_0391 = {
-	0x0391, pci_device_10e1_0391,
+static const pciDeviceInfo pci_dev_info_10de_03b3 = {
+	0x03b3, pci_device_10de_03b3,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e1_0391,
+	pci_ss_list_10de_03b3,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e1_690c = {
-	0x690c, pci_device_10e1_690c,
+static const pciDeviceInfo pci_dev_info_10de_03b4 = {
+	0x03b4, pci_device_10de_03b4,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e1_690c,
+	pci_ss_list_10de_03b4,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e1_dc29 = {
-	0xdc29, pci_device_10e1_dc29,
+static const pciDeviceInfo pci_dev_info_10de_03b5 = {
+	0x03b5, pci_device_10de_03b5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e1_dc29,
+	pci_ss_list_10de_03b5,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10e3_0000 = {
-	0x0000, pci_device_10e3_0000,
+static const pciDeviceInfo pci_dev_info_10de_03b6 = {
+	0x03b6, pci_device_10de_03b6,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e3_0000,
+	pci_ss_list_10de_03b6,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e3_0148 = {
-	0x0148, pci_device_10e3_0148,
+static const pciDeviceInfo pci_dev_info_10de_03b7 = {
+	0x03b7, pci_device_10de_03b7,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e3_0148,
+	pci_ss_list_10de_03b7,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e3_0860 = {
-	0x0860, pci_device_10e3_0860,
+static const pciDeviceInfo pci_dev_info_10de_03b8 = {
+	0x03b8, pci_device_10de_03b8,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e3_0860,
+	pci_ss_list_10de_03b8,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e3_0862 = {
-	0x0862, pci_device_10e3_0862,
+static const pciDeviceInfo pci_dev_info_10de_03b9 = {
+	0x03b9, pci_device_10de_03b9,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e3_0862,
+	pci_ss_list_10de_03b9,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e3_8260 = {
-	0x8260, pci_device_10e3_8260,
+static const pciDeviceInfo pci_dev_info_10de_03ba = {
+	0x03ba, pci_device_10de_03ba,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e3_8260,
+	pci_ss_list_10de_03ba,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e3_8261 = {
-	0x8261, pci_device_10e3_8261,
+static const pciDeviceInfo pci_dev_info_10de_03bb = {
+	0x03bb, pci_device_10de_03bb,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e3_8261,
+	pci_ss_list_10de_03bb,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10e4_8029 = {
-	0x8029, pci_device_10e4_8029,
+static const pciDeviceInfo pci_dev_info_10de_03d0 = {
+	0x03d0, pci_device_10de_03d0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e4_8029,
+	pci_ss_list_10de_03d0,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10e8_1072 = {
-	0x1072, pci_device_10e8_1072,
+static const pciDeviceInfo pci_dev_info_10de_03d1 = {
+	0x03d1, pci_device_10de_03d1,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_1072,
+	pci_ss_list_10de_03d1,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_2011 = {
-	0x2011, pci_device_10e8_2011,
+static const pciDeviceInfo pci_dev_info_10de_03d2 = {
+	0x03d2, pci_device_10de_03d2,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_2011,
+	pci_ss_list_10de_03d2,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_4750 = {
-	0x4750, pci_device_10e8_4750,
+static const pciDeviceInfo pci_dev_info_10de_03d5 = {
+	0x03d5, pci_device_10de_03d5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_4750,
+	pci_ss_list_10de_03d5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_5920 = {
-	0x5920, pci_device_10e8_5920,
+static const pciDeviceInfo pci_dev_info_10de_03e0 = {
+	0x03e0, pci_device_10de_03e0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_5920,
+	pci_ss_list_10de_03e0,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_8043 = {
-	0x8043, pci_device_10e8_8043,
+static const pciDeviceInfo pci_dev_info_10de_03e1 = {
+	0x03e1, pci_device_10de_03e1,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_8043,
+	pci_ss_list_10de_03e1,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_8062 = {
-	0x8062, pci_device_10e8_8062,
+static const pciDeviceInfo pci_dev_info_10de_03e2 = {
+	0x03e2, pci_device_10de_03e2,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_8062,
+	pci_ss_list_10de_03e2,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_807d = {
-	0x807d, pci_device_10e8_807d,
+static const pciDeviceInfo pci_dev_info_10de_03e3 = {
+	0x03e3, pci_device_10de_03e3,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_807d,
+	pci_ss_list_10de_03e3,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_8088 = {
-	0x8088, pci_device_10e8_8088,
+static const pciDeviceInfo pci_dev_info_10de_03e4 = {
+	0x03e4, pci_device_10de_03e4,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_8088,
+	pci_ss_list_10de_03e4,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_8089 = {
-	0x8089, pci_device_10e8_8089,
+static const pciDeviceInfo pci_dev_info_10de_03e5 = {
+	0x03e5, pci_device_10de_03e5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_8089,
+	pci_ss_list_10de_03e5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_809c = {
-	0x809c, pci_device_10e8_809c,
+static const pciDeviceInfo pci_dev_info_10de_03e6 = {
+	0x03e6, pci_device_10de_03e6,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_809c,
+	pci_ss_list_10de_03e6,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_80d7 = {
-	0x80d7, pci_device_10e8_80d7,
+static const pciDeviceInfo pci_dev_info_10de_03e7 = {
+	0x03e7, pci_device_10de_03e7,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_80d7,
+	pci_ss_list_10de_03e7,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_80d9 = {
-	0x80d9, pci_device_10e8_80d9,
+static const pciDeviceInfo pci_dev_info_10de_03e8 = {
+	0x03e8, pci_device_10de_03e8,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_80d9,
+	pci_ss_list_10de_03e8,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_80da = {
-	0x80da, pci_device_10e8_80da,
+static const pciDeviceInfo pci_dev_info_10de_03e9 = {
+	0x03e9, pci_device_10de_03e9,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_80da,
+	pci_ss_list_10de_03e9,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_811a = {
-	0x811a, pci_device_10e8_811a,
+static const pciDeviceInfo pci_dev_info_10de_03ea = {
+	0x03ea, pci_device_10de_03ea,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_811a,
+	pci_ss_list_10de_03ea,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_814c = {
-	0x814c, pci_device_10e8_814c,
+static const pciDeviceInfo pci_dev_info_10de_03eb = {
+	0x03eb, pci_device_10de_03eb,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_814c,
+	pci_ss_list_10de_03eb,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_8170 = {
-	0x8170, pci_device_10e8_8170,
+static const pciDeviceInfo pci_dev_info_10de_03ec = {
+	0x03ec, pci_device_10de_03ec,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_8170,
+	pci_ss_list_10de_03ec,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_81e6 = {
-	0x81e6, pci_device_10e8_81e6,
+static const pciDeviceInfo pci_dev_info_10de_03ee = {
+	0x03ee, pci_device_10de_03ee,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_81e6,
+	pci_ss_list_10de_03ee,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_8291 = {
-	0x8291, pci_device_10e8_8291,
+static const pciDeviceInfo pci_dev_info_10de_03ef = {
+	0x03ef, pci_device_10de_03ef,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_8291,
+	pci_ss_list_10de_03ef,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_82c4 = {
-	0x82c4, pci_device_10e8_82c4,
+static const pciDeviceInfo pci_dev_info_10de_03f0 = {
+	0x03f0, pci_device_10de_03f0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_82c4,
+	pci_ss_list_10de_03f0,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_82c5 = {
-	0x82c5, pci_device_10e8_82c5,
+static const pciDeviceInfo pci_dev_info_10de_03f1 = {
+	0x03f1, pci_device_10de_03f1,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_82c5,
+	pci_ss_list_10de_03f1,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_82c6 = {
-	0x82c6, pci_device_10e8_82c6,
+static const pciDeviceInfo pci_dev_info_10de_03f2 = {
+	0x03f2, pci_device_10de_03f2,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_82c6,
+	pci_ss_list_10de_03f2,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_82c7 = {
-	0x82c7, pci_device_10e8_82c7,
+static const pciDeviceInfo pci_dev_info_10de_03f3 = {
+	0x03f3, pci_device_10de_03f3,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_82c7,
+	pci_ss_list_10de_03f3,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_82ca = {
-	0x82ca, pci_device_10e8_82ca,
+static const pciDeviceInfo pci_dev_info_10de_03f4 = {
+	0x03f4, pci_device_10de_03f4,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_82ca,
+	pci_ss_list_10de_03f4,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_82db = {
-	0x82db, pci_device_10e8_82db,
+static const pciDeviceInfo pci_dev_info_10de_03f5 = {
+	0x03f5, pci_device_10de_03f5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_82db,
+	pci_ss_list_10de_03f5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_82e2 = {
-	0x82e2, pci_device_10e8_82e2,
+static const pciDeviceInfo pci_dev_info_10de_03f6 = {
+	0x03f6, pci_device_10de_03f6,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_82e2,
+	pci_ss_list_10de_03f6,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10e8_8851 = {
-	0x8851, pci_device_10e8_8851,
+static const pciDeviceInfo pci_dev_info_10de_03f7 = {
+	0x03f7, pci_device_10de_03f7,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10e8_8851,
+	pci_ss_list_10de_03f7,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-static const pciDeviceInfo pci_dev_info_10ea_1680 = {
-	0x1680, pci_device_10ea_1680,
+static const pciDeviceInfo pci_dev_info_10de_0440 = {
+	0x0440, pci_device_10de_0440,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ea_1680,
+	pci_ss_list_10de_0440,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ea_1682 = {
-	0x1682, pci_device_10ea_1682,
+static const pciDeviceInfo pci_dev_info_10de_0441 = {
+	0x0441, pci_device_10de_0441,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ea_1682,
+	pci_ss_list_10de_0441,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ea_1683 = {
-	0x1683, pci_device_10ea_1683,
+static const pciDeviceInfo pci_dev_info_10de_0442 = {
+	0x0442, pci_device_10de_0442,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ea_1683,
+	pci_ss_list_10de_0442,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ea_2000 = {
-	0x2000, pci_device_10ea_2000,
+static const pciDeviceInfo pci_dev_info_10de_0443 = {
+	0x0443, pci_device_10de_0443,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ea_2000,
+	pci_ss_list_10de_0443,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ea_2010 = {
-	0x2010, pci_device_10ea_2010,
+static const pciDeviceInfo pci_dev_info_10de_0444 = {
+	0x0444, pci_device_10de_0444,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ea_2010,
+	pci_ss_list_10de_0444,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ea_5000 = {
-	0x5000, pci_device_10ea_5000,
+static const pciDeviceInfo pci_dev_info_10de_0445 = {
+	0x0445, pci_device_10de_0445,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ea_5000,
+	pci_ss_list_10de_0445,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ea_5050 = {
-	0x5050, pci_device_10ea_5050,
+static const pciDeviceInfo pci_dev_info_10de_0446 = {
+	0x0446, pci_device_10de_0446,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ea_5050,
+	pci_ss_list_10de_0446,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ea_5202 = {
-	0x5202, pci_device_10ea_5202,
+static const pciDeviceInfo pci_dev_info_10de_0447 = {
+	0x0447, pci_device_10de_0447,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ea_5202,
+	pci_ss_list_10de_0447,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ea_5252 = {
-	0x5252, pci_device_10ea_5252,
+static const pciDeviceInfo pci_dev_info_10de_0448 = {
+	0x0448, pci_device_10de_0448,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ea_5252,
+	pci_ss_list_10de_0448,
 #else
 	NULL,
 #endif
 	0
 };
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10eb_0101 = {
-	0x0101, pci_device_10eb_0101,
+static const pciDeviceInfo pci_dev_info_10de_0449 = {
+	0x0449, pci_device_10de_0449,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10eb_0101,
+	pci_ss_list_10de_0449,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10eb_8111 = {
-	0x8111, pci_device_10eb_8111,
+static const pciDeviceInfo pci_dev_info_10de_044a = {
+	0x044a, pci_device_10de_044a,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10eb_8111,
+	pci_ss_list_10de_044a,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10ec_0139 = {
-	0x0139, pci_device_10ec_0139,
+static const pciDeviceInfo pci_dev_info_10de_044b = {
+	0x044b, pci_device_10de_044b,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ec_0139,
+	pci_ss_list_10de_044b,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ec_8029 = {
-	0x8029, pci_device_10ec_8029,
+static const pciDeviceInfo pci_dev_info_10de_044c = {
+	0x044c, pci_device_10de_044c,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ec_8029,
+	pci_ss_list_10de_044c,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ec_8129 = {
-	0x8129, pci_device_10ec_8129,
+static const pciDeviceInfo pci_dev_info_10de_044d = {
+	0x044d, pci_device_10de_044d,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ec_8129,
+	pci_ss_list_10de_044d,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ec_8138 = {
-	0x8138, pci_device_10ec_8138,
+static const pciDeviceInfo pci_dev_info_10de_044e = {
+	0x044e, pci_device_10de_044e,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ec_8138,
+	pci_ss_list_10de_044e,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ec_8139 = {
-	0x8139, pci_device_10ec_8139,
+static const pciDeviceInfo pci_dev_info_10de_044f = {
+	0x044f, pci_device_10de_044f,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ec_8139,
+	pci_ss_list_10de_044f,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ec_8169 = {
-	0x8169, pci_device_10ec_8169,
+static const pciDeviceInfo pci_dev_info_10de_0450 = {
+	0x0450, pci_device_10de_0450,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ec_8169,
+	pci_ss_list_10de_0450,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ec_8180 = {
-	0x8180, pci_device_10ec_8180,
+static const pciDeviceInfo pci_dev_info_10de_0451 = {
+	0x0451, pci_device_10de_0451,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ec_8180,
+	pci_ss_list_10de_0451,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ec_8197 = {
-	0x8197, pci_device_10ec_8197,
+static const pciDeviceInfo pci_dev_info_10de_0452 = {
+	0x0452, pci_device_10de_0452,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ec_8197,
+	pci_ss_list_10de_0452,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10ed_7310 = {
-	0x7310, pci_device_10ed_7310,
+static const pciDeviceInfo pci_dev_info_10de_0453 = {
+	0x0453, pci_device_10de_0453,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ed_7310,
+	pci_ss_list_10de_0453,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10ee_0205 = {
-	0x0205, pci_device_10ee_0205,
+static const pciDeviceInfo pci_dev_info_10de_0454 = {
+	0x0454, pci_device_10de_0454,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_0205,
+	pci_ss_list_10de_0454,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ee_0210 = {
-	0x0210, pci_device_10ee_0210,
+static const pciDeviceInfo pci_dev_info_10de_0455 = {
+	0x0455, pci_device_10de_0455,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_0210,
+	pci_ss_list_10de_0455,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ee_0314 = {
-	0x0314, pci_device_10ee_0314,
+static const pciDeviceInfo pci_dev_info_10de_0456 = {
+	0x0456, pci_device_10de_0456,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_0314,
+	pci_ss_list_10de_0456,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ee_0405 = {
-	0x0405, pci_device_10ee_0405,
+static const pciDeviceInfo pci_dev_info_10de_0457 = {
+	0x0457, pci_device_10de_0457,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_0405,
+	pci_ss_list_10de_0457,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ee_0410 = {
-	0x0410, pci_device_10ee_0410,
+static const pciDeviceInfo pci_dev_info_10de_0458 = {
+	0x0458, pci_device_10de_0458,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_0410,
+	pci_ss_list_10de_0458,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ee_3fc0 = {
-	0x3fc0, pci_device_10ee_3fc0,
+static const pciDeviceInfo pci_dev_info_10de_0459 = {
+	0x0459, pci_device_10de_0459,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_3fc0,
+	pci_ss_list_10de_0459,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ee_3fc1 = {
-	0x3fc1, pci_device_10ee_3fc1,
+static const pciDeviceInfo pci_dev_info_10de_045a = {
+	0x045a, pci_device_10de_045a,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_3fc1,
+	pci_ss_list_10de_045a,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ee_3fc2 = {
-	0x3fc2, pci_device_10ee_3fc2,
+static const pciDeviceInfo pci_dev_info_10de_045c = {
+	0x045c, pci_device_10de_045c,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_3fc2,
+	pci_ss_list_10de_045c,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ee_3fc3 = {
-	0x3fc3, pci_device_10ee_3fc3,
+static const pciDeviceInfo pci_dev_info_10de_045d = {
+	0x045d, pci_device_10de_045d,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_3fc3,
+	pci_ss_list_10de_045d,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ee_3fc4 = {
-	0x3fc4, pci_device_10ee_3fc4,
+static const pciDeviceInfo pci_dev_info_10de_045e = {
+	0x045e, pci_device_10de_045e,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_3fc4,
+	pci_ss_list_10de_045e,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ee_3fc5 = {
-	0x3fc5, pci_device_10ee_3fc5,
+static const pciDeviceInfo pci_dev_info_10de_045f = {
+	0x045f, pci_device_10de_045f,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_3fc5,
+	pci_ss_list_10de_045f,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ee_3fc6 = {
-	0x3fc6, pci_device_10ee_3fc6,
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10df_1ae5 = {
+	0x1ae5, pci_device_10df_1ae5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_3fc6,
+	pci_ss_list_10df_1ae5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10ee_8381 = {
-	0x8381, pci_device_10ee_8381,
+static const pciDeviceInfo pci_dev_info_10df_f085 = {
+	0xf085, pci_device_10df_f085,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ee_8381,
+	pci_ss_list_10df_f085,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10ef_8154 = {
-	0x8154, pci_device_10ef_8154,
+static const pciDeviceInfo pci_dev_info_10df_f095 = {
+	0xf095, pci_device_10df_f095,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10ef_8154,
+	pci_ss_list_10df_f095,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10f5_a001 = {
-	0xa001, pci_device_10f5_a001,
+static const pciDeviceInfo pci_dev_info_10df_f098 = {
+	0xf098, pci_device_10df_f098,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10f5_a001,
+	pci_ss_list_10df_f098,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10fa_000c = {
-	0x000c, pci_device_10fa_000c,
+static const pciDeviceInfo pci_dev_info_10df_f0a1 = {
+	0xf0a1, pci_device_10df_f0a1,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10fa_000c,
+	pci_ss_list_10df_f0a1,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10fb_186f = {
-	0x186f, pci_device_10fb_186f,
+static const pciDeviceInfo pci_dev_info_10df_f0a5 = {
+	0xf0a5, pci_device_10df_f0a5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10fb_186f,
+	pci_ss_list_10df_f0a5,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_10fc_0003 = {
-	0x0003, pci_device_10fc_0003,
+static const pciDeviceInfo pci_dev_info_10df_f0b5 = {
+	0xf0b5, pci_device_10df_f0b5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10fc_0003,
+	pci_ss_list_10df_f0b5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_10fc_0005 = {
-	0x0005, pci_device_10fc_0005,
+static const pciDeviceInfo pci_dev_info_10df_f0d1 = {
+	0xf0d1, pci_device_10df_f0d1,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_10fc_0005,
+	pci_ss_list_10df_f0d1,
 #else
 	NULL,
 #endif
 	0
 };
-#endif
-#ifdef VENDOR_INCLUDE_NONVIDEO
-static const pciDeviceInfo pci_dev_info_1101_1060 = {
-	0x1060, pci_device_1101_1060,
+static const pciDeviceInfo pci_dev_info_10df_f0d5 = {
+	0xf0d5, pci_device_10df_f0d5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1101_1060,
+	pci_ss_list_10df_f0d5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1101_9100 = {
-	0x9100, pci_device_1101_9100,
+static const pciDeviceInfo pci_dev_info_10df_f0e1 = {
+	0xf0e1, pci_device_10df_f0e1,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1101_9100,
+	pci_ss_list_10df_f0e1,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1101_9400 = {
-	0x9400, pci_device_1101_9400,
+static const pciDeviceInfo pci_dev_info_10df_f0e5 = {
+	0xf0e5, pci_device_10df_f0e5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1101_9400,
+	pci_ss_list_10df_f0e5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1101_9401 = {
-	0x9401, pci_device_1101_9401,
+static const pciDeviceInfo pci_dev_info_10df_f0f5 = {
+	0xf0f5, pci_device_10df_f0f5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1101_9401,
+	pci_ss_list_10df_f0f5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1101_9500 = {
-	0x9500, pci_device_1101_9500,
+static const pciDeviceInfo pci_dev_info_10df_f700 = {
+	0xf700, pci_device_10df_f700,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_1101_9500,
+	pci_ss_list_10df_f700,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_1101_9502 = {
-	0x9502, pci_device_1101_9502,
-#ifdef INIT_SUBSYS_INFO
+static const pciDeviceInfo pci_dev_info_10df_f701 = {
+	0xf701, pci_device_10df_f701,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_f701,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_f800 = {
+	0xf800, pci_device_10df_f800,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_f800,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_f801 = {
+	0xf801, pci_device_10df_f801,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_f801,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_f900 = {
+	0xf900, pci_device_10df_f900,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_f900,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_f901 = {
+	0xf901, pci_device_10df_f901,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_f901,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_f980 = {
+	0xf980, pci_device_10df_f980,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_f980,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_f981 = {
+	0xf981, pci_device_10df_f981,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_f981,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_f982 = {
+	0xf982, pci_device_10df_f982,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_f982,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_fa00 = {
+	0xfa00, pci_device_10df_fa00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_fa00,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_fb00 = {
+	0xfb00, pci_device_10df_fb00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_fb00,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_fc00 = {
+	0xfc00, pci_device_10df_fc00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_fc00,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_fc10 = {
+	0xfc10, pci_device_10df_fc10,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_fc10,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_fc20 = {
+	0xfc20, pci_device_10df_fc20,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_fc20,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_fd00 = {
+	0xfd00, pci_device_10df_fd00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_fd00,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_fe00 = {
+	0xfe00, pci_device_10df_fe00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_fe00,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10df_ff00 = {
+	0xff00, pci_device_10df_ff00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10df_ff00,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+static const pciDeviceInfo pci_dev_info_10e0_5026 = {
+	0x5026, pci_device_10e0_5026,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e0_5026,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e0_5027 = {
+	0x5027, pci_device_10e0_5027,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e0_5027,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e0_5028 = {
+	0x5028, pci_device_10e0_5028,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e0_5028,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e0_8849 = {
+	0x8849, pci_device_10e0_8849,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e0_8849,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e0_8853 = {
+	0x8853, pci_device_10e0_8853,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e0_8853,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e0_9128 = {
+	0x9128, pci_device_10e0_9128,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e0_9128,
+#else
+	NULL,
+#endif
+	0
+};
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10e1_0391 = {
+	0x0391, pci_device_10e1_0391,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e1_0391,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e1_690c = {
+	0x690c, pci_device_10e1_690c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e1_690c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e1_dc29 = {
+	0xdc29, pci_device_10e1_dc29,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e1_dc29,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10e3_0000 = {
+	0x0000, pci_device_10e3_0000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e3_0000,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e3_0108 = {
+	0x0108, pci_device_10e3_0108,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e3_0108,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e3_0148 = {
+	0x0148, pci_device_10e3_0148,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e3_0148,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e3_0860 = {
+	0x0860, pci_device_10e3_0860,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e3_0860,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e3_0862 = {
+	0x0862, pci_device_10e3_0862,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e3_0862,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e3_8260 = {
+	0x8260, pci_device_10e3_8260,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e3_8260,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e3_8261 = {
+	0x8261, pci_device_10e3_8261,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e3_8261,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e3_a108 = {
+	0xa108, pci_device_10e3_a108,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e3_a108,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10e4_8029 = {
+	0x8029, pci_device_10e4_8029,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e4_8029,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10e8_1072 = {
+	0x1072, pci_device_10e8_1072,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_1072,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_2011 = {
+	0x2011, pci_device_10e8_2011,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_2011,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_4750 = {
+	0x4750, pci_device_10e8_4750,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_4750,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_5920 = {
+	0x5920, pci_device_10e8_5920,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_5920,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_8043 = {
+	0x8043, pci_device_10e8_8043,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_8043,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_8062 = {
+	0x8062, pci_device_10e8_8062,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_8062,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_807d = {
+	0x807d, pci_device_10e8_807d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_807d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_8088 = {
+	0x8088, pci_device_10e8_8088,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_8088,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_8089 = {
+	0x8089, pci_device_10e8_8089,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_8089,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_809c = {
+	0x809c, pci_device_10e8_809c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_809c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_80d7 = {
+	0x80d7, pci_device_10e8_80d7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_80d7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_80d9 = {
+	0x80d9, pci_device_10e8_80d9,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_80d9,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_80da = {
+	0x80da, pci_device_10e8_80da,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_80da,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_80fc = {
+	0x80fc, pci_device_10e8_80fc,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_80fc,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_811a = {
+	0x811a, pci_device_10e8_811a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_811a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_814c = {
+	0x814c, pci_device_10e8_814c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_814c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_8170 = {
+	0x8170, pci_device_10e8_8170,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_8170,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_81e6 = {
+	0x81e6, pci_device_10e8_81e6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_81e6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_828d = {
+	0x828d, pci_device_10e8_828d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_828d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_8291 = {
+	0x8291, pci_device_10e8_8291,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_8291,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_82c4 = {
+	0x82c4, pci_device_10e8_82c4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_82c4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_82c5 = {
+	0x82c5, pci_device_10e8_82c5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_82c5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_82c6 = {
+	0x82c6, pci_device_10e8_82c6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_82c6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_82c7 = {
+	0x82c7, pci_device_10e8_82c7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_82c7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_82ca = {
+	0x82ca, pci_device_10e8_82ca,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_82ca,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_82db = {
+	0x82db, pci_device_10e8_82db,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_82db,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_82e2 = {
+	0x82e2, pci_device_10e8_82e2,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_82e2,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_8406 = {
+	0x8406, pci_device_10e8_8406,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_8406,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_8407 = {
+	0x8407, pci_device_10e8_8407,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_8407,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10e8_8851 = {
+	0x8851, pci_device_10e8_8851,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10e8_8851,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+static const pciDeviceInfo pci_dev_info_10ea_1680 = {
+	0x1680, pci_device_10ea_1680,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ea_1680,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ea_1682 = {
+	0x1682, pci_device_10ea_1682,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ea_1682,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ea_1683 = {
+	0x1683, pci_device_10ea_1683,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ea_1683,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ea_2000 = {
+	0x2000, pci_device_10ea_2000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ea_2000,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ea_2010 = {
+	0x2010, pci_device_10ea_2010,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ea_2010,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ea_5000 = {
+	0x5000, pci_device_10ea_5000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ea_5000,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ea_5050 = {
+	0x5050, pci_device_10ea_5050,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ea_5050,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ea_5202 = {
+	0x5202, pci_device_10ea_5202,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ea_5202,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ea_5252 = {
+	0x5252, pci_device_10ea_5252,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ea_5252,
+#else
+	NULL,
+#endif
+	0
+};
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10eb_0101 = {
+	0x0101, pci_device_10eb_0101,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10eb_0101,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10eb_8111 = {
+	0x8111, pci_device_10eb_8111,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10eb_8111,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10ec_0139 = {
+	0x0139, pci_device_10ec_0139,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_0139,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_0260 = {
+	0x0260, pci_device_10ec_0260,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_0260,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_0261 = {
+	0x0261, pci_device_10ec_0261,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_0261,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_0280 = {
+	0x0280, pci_device_10ec_0280,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_0280,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_0861 = {
+	0x0861, pci_device_10ec_0861,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_0861,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_0862 = {
+	0x0862, pci_device_10ec_0862,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_0862,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_0880 = {
+	0x0880, pci_device_10ec_0880,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_0880,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_0883 = {
+	0x0883, pci_device_10ec_0883,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_0883,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_0888 = {
+	0x0888, pci_device_10ec_0888,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_0888,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_8029 = {
+	0x8029, pci_device_10ec_8029,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_8029,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_8129 = {
+	0x8129, pci_device_10ec_8129,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_8129,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_8136 = {
+	0x8136, pci_device_10ec_8136,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_8136,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_8138 = {
+	0x8138, pci_device_10ec_8138,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_8138,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_8139 = {
+	0x8139, pci_device_10ec_8139,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_8139,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_8167 = {
+	0x8167, pci_device_10ec_8167,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_8167,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_8168 = {
+	0x8168, pci_device_10ec_8168,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_8168,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_8169 = {
+	0x8169, pci_device_10ec_8169,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_8169,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_8180 = {
+	0x8180, pci_device_10ec_8180,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_8180,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_8185 = {
+	0x8185, pci_device_10ec_8185,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_8185,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ec_8197 = {
+	0x8197, pci_device_10ec_8197,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ec_8197,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10ed_7310 = {
+	0x7310, pci_device_10ed_7310,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ed_7310,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10ee_0205 = {
+	0x0205, pci_device_10ee_0205,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_0205,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_0210 = {
+	0x0210, pci_device_10ee_0210,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_0210,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_0314 = {
+	0x0314, pci_device_10ee_0314,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_0314,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_0405 = {
+	0x0405, pci_device_10ee_0405,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_0405,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_0410 = {
+	0x0410, pci_device_10ee_0410,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_0410,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_3fc0 = {
+	0x3fc0, pci_device_10ee_3fc0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_3fc0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_3fc1 = {
+	0x3fc1, pci_device_10ee_3fc1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_3fc1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_3fc2 = {
+	0x3fc2, pci_device_10ee_3fc2,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_3fc2,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_3fc3 = {
+	0x3fc3, pci_device_10ee_3fc3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_3fc3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_3fc4 = {
+	0x3fc4, pci_device_10ee_3fc4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_3fc4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_3fc5 = {
+	0x3fc5, pci_device_10ee_3fc5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_3fc5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_3fc6 = {
+	0x3fc6, pci_device_10ee_3fc6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_3fc6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_8381 = {
+	0x8381, pci_device_10ee_8381,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_8381,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10ee_d154 = {
+	0xd154, pci_device_10ee_d154,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ee_d154,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10ef_8154 = {
+	0x8154, pci_device_10ef_8154,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10ef_8154,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10f1_2865 = {
+	0x2865, pci_device_10f1_2865,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10f1_2865,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10f5_a001 = {
+	0xa001, pci_device_10f5_a001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10f5_a001,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10fa_000c = {
+	0x000c, pci_device_10fa_000c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10fa_000c,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10fb_186f = {
+	0x186f, pci_device_10fb_186f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10fb_186f,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_10fc_0003 = {
+	0x0003, pci_device_10fc_0003,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10fc_0003,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_10fc_0005 = {
+	0x0005, pci_device_10fc_0005,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_10fc_0005,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1101_1060 = {
+	0x1060, pci_device_1101_1060,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1101_1060,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1101_1622 = {
+	0x1622, pci_device_1101_1622,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1101_1622,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1101_9100 = {
+	0x9100, pci_device_1101_9100,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1101_9100,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1101_9400 = {
+	0x9400, pci_device_1101_9400,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1101_9400,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1101_9401 = {
+	0x9401, pci_device_1101_9401,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1101_9401,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1101_9500 = {
+	0x9500, pci_device_1101_9500,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1101_9500,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1101_9502 = {
+	0x9502, pci_device_1101_9502,
+#ifdef INIT_SUBSYS_INFO
 	pci_ss_list_1101_9502,
 #else
 	NULL,
@@ -81095,6 +93429,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1102_0005 = {
+	0x0005, pci_device_1102_0005,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1102_0005,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1102_0006 = {
 	0x0006, pci_device_1102_0006,
 #ifdef INIT_SUBSYS_INFO
@@ -81361,6 +93704,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_0198 = {
+	0x0198, pci_device_1106_0198,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_0198,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_0204 = {
 	0x0204, pci_device_1106_0204,
 #ifdef INIT_SUBSYS_INFO
@@ -81370,6 +93722,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_0208 = {
+	0x0208, pci_device_1106_0208,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_0208,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_0238 = {
 	0x0238, pci_device_1106_0238,
 #ifdef INIT_SUBSYS_INFO
@@ -81424,6 +93785,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_0293 = {
+	0x0293, pci_device_1106_0293,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_0293,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_0296 = {
 	0x0296, pci_device_1106_0296,
 #ifdef INIT_SUBSYS_INFO
@@ -81460,6 +93830,60 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_0324 = {
+	0x0324, pci_device_1106_0324,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_0324,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_0327 = {
+	0x0327, pci_device_1106_0327,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_0327,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_0336 = {
+	0x0336, pci_device_1106_0336,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_0336,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_0340 = {
+	0x0340, pci_device_1106_0340,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_0340,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_0351 = {
+	0x0351, pci_device_1106_0351,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_0351,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_0364 = {
+	0x0364, pci_device_1106_0364,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_0364,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_0391 = {
 	0x0391, pci_device_1106_0391,
 #ifdef INIT_SUBSYS_INFO
@@ -81739,6 +94163,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_1293 = {
+	0x1293, pci_device_1106_1293,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_1293,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_1296 = {
 	0x1296, pci_device_1106_1296,
 #ifdef INIT_SUBSYS_INFO
@@ -81766,6 +94199,60 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_1324 = {
+	0x1324, pci_device_1106_1324,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_1324,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_1327 = {
+	0x1327, pci_device_1106_1327,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_1327,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_1336 = {
+	0x1336, pci_device_1106_1336,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_1336,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_1340 = {
+	0x1340, pci_device_1106_1340,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_1340,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_1351 = {
+	0x1351, pci_device_1106_1351,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_1351,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_1364 = {
+	0x1364, pci_device_1106_1364,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_1364,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_1571 = {
 	0x1571, pci_device_1106_1571,
 #ifdef INIT_SUBSYS_INFO
@@ -81856,6 +94343,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_2293 = {
+	0x2293, pci_device_1106_2293,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_2293,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_2296 = {
 	0x2296, pci_device_1106_2296,
 #ifdef INIT_SUBSYS_INFO
@@ -81883,6 +94379,60 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_2324 = {
+	0x2324, pci_device_1106_2324,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_2324,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_2327 = {
+	0x2327, pci_device_1106_2327,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_2327,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_2336 = {
+	0x2336, pci_device_1106_2336,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_2336,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_2340 = {
+	0x2340, pci_device_1106_2340,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_2340,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_2351 = {
+	0x2351, pci_device_1106_2351,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_2351,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_2364 = {
+	0x2364, pci_device_1106_2364,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_2364,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_287a = {
 	0x287a, pci_device_1106_287a,
 #ifdef INIT_SUBSYS_INFO
@@ -82252,6 +94802,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_3157 = {
+	0x3157, pci_device_1106_3157,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3157,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_3164 = {
 	0x3164, pci_device_1106_3164,
 #ifdef INIT_SUBSYS_INFO
@@ -82360,6 +94919,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_3230 = {
+	0x3230, pci_device_1106_3230,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3230,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_3238 = {
 	0x3238, pci_device_1106_3238,
 #ifdef INIT_SUBSYS_INFO
@@ -82378,6 +94946,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_324a = {
+	0x324a, pci_device_1106_324a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_324a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_324b = {
+	0x324b, pci_device_1106_324b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_324b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_324e = {
+	0x324e, pci_device_1106_324e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_324e,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_3258 = {
 	0x3258, pci_device_1106_3258,
 #ifdef INIT_SUBSYS_INFO
@@ -82450,6 +95045,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_3324 = {
+	0x3324, pci_device_1106_3324,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3324,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_3327 = {
+	0x3327, pci_device_1106_3327,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3327,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_3336 = {
+	0x3336, pci_device_1106_3336,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3336,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_3337 = {
 	0x3337, pci_device_1106_3337,
 #ifdef INIT_SUBSYS_INFO
@@ -82459,6 +95081,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_3340 = {
+	0x3340, pci_device_1106_3340,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3340,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_3344 = {
 	0x3344, pci_device_1106_3344,
 #ifdef INIT_SUBSYS_INFO
@@ -82477,6 +95108,42 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_3351 = {
+	0x3351, pci_device_1106_3351,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3351,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_3364 = {
+	0x3364, pci_device_1106_3364,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3364,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_3371 = {
+	0x3371, pci_device_1106_3371,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3371,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_3372 = {
+	0x3372, pci_device_1106_3372,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_3372,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_337a = {
 	0x337a, pci_device_1106_337a,
 #ifdef INIT_SUBSYS_INFO
@@ -82576,6 +95243,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_4293 = {
+	0x4293, pci_device_1106_4293,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_4293,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_4296 = {
 	0x4296, pci_device_1106_4296,
 #ifdef INIT_SUBSYS_INFO
@@ -82603,6 +95279,60 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_4324 = {
+	0x4324, pci_device_1106_4324,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_4324,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_4327 = {
+	0x4327, pci_device_1106_4327,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_4327,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_4336 = {
+	0x4336, pci_device_1106_4336,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_4336,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_4340 = {
+	0x4340, pci_device_1106_4340,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_4340,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_4351 = {
+	0x4351, pci_device_1106_4351,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_4351,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_4364 = {
+	0x4364, pci_device_1106_4364,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_4364,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_5030 = {
 	0x5030, pci_device_1106_5030,
 #ifdef INIT_SUBSYS_INFO
@@ -82648,6 +95378,60 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_5324 = {
+	0x5324, pci_device_1106_5324,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_5324,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_5327 = {
+	0x5327, pci_device_1106_5327,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_5327,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_5336 = {
+	0x5336, pci_device_1106_5336,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_5336,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_5340 = {
+	0x5340, pci_device_1106_5340,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_5340,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_5351 = {
+	0x5351, pci_device_1106_5351,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_5351,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_5364 = {
+	0x5364, pci_device_1106_5364,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_5364,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_6100 = {
 	0x6100, pci_device_1106_6100,
 #ifdef INIT_SUBSYS_INFO
@@ -82657,6 +95441,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_6327 = {
+	0x6327, pci_device_1106_6327,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_6327,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_6364 = {
+	0x6364, pci_device_1106_6364,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_6364,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_7204 = {
 	0x7204, pci_device_1106_7204,
 #ifdef INIT_SUBSYS_INFO
@@ -82738,6 +95540,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_7293 = {
+	0x7293, pci_device_1106_7293,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_7293,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_7296 = {
 	0x7296, pci_device_1106_7296,
 #ifdef INIT_SUBSYS_INFO
@@ -82765,6 +95576,60 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_7324 = {
+	0x7324, pci_device_1106_7324,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_7324,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_7327 = {
+	0x7327, pci_device_1106_7327,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_7327,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_7336 = {
+	0x7336, pci_device_1106_7336,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_7336,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_7340 = {
+	0x7340, pci_device_1106_7340,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_7340,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_7351 = {
+	0x7351, pci_device_1106_7351,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_7351,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_7364 = {
+	0x7364, pci_device_1106_7364,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_7364,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_8231 = {
 	0x8231, pci_device_1106_8231,
 #ifdef INIT_SUBSYS_INFO
@@ -82792,6 +95657,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_8324 = {
+	0x8324, pci_device_1106_8324,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_8324,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_8391 = {
 	0x8391, pci_device_1106_8391,
 #ifdef INIT_SUBSYS_INFO
@@ -82891,6 +95765,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_a327 = {
+	0xa327, pci_device_1106_a327,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_a327,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_a364 = {
+	0xa364, pci_device_1106_a364,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_a364,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_b091 = {
 	0xb091, pci_device_1106_b091,
 #ifdef INIT_SUBSYS_INFO
@@ -82999,6 +95891,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_b999 = {
+	0xb999, pci_device_1106_b999,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_b999,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_c208 = {
 	0xc208, pci_device_1106_c208,
 #ifdef INIT_SUBSYS_INFO
@@ -83017,6 +95918,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_c327 = {
+	0xc327, pci_device_1106_c327,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_c327,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_c340 = {
+	0xc340, pci_device_1106_c340,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_c340,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1106_c364 = {
+	0xc364, pci_device_1106_c364,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_c364,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_d104 = {
 	0xd104, pci_device_1106_d104,
 #ifdef INIT_SUBSYS_INFO
@@ -83053,6 +95981,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_d340 = {
+	0xd340, pci_device_1106_d340,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_d340,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_e208 = {
 	0xe208, pci_device_1106_e208,
 #ifdef INIT_SUBSYS_INFO
@@ -83071,6 +96008,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_e340 = {
+	0xe340, pci_device_1106_e340,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_e340,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1106_f208 = {
 	0xf208, pci_device_1106_f208,
 #ifdef INIT_SUBSYS_INFO
@@ -83089,6 +96035,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1106_f340 = {
+	0xf340, pci_device_1106_f340,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1106_f340,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1107_0576 = {
@@ -84374,6 +97329,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1124_2581 = {
+	0x2581, pci_device_1124_2581,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1124_2581,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1127_0200 = {
 	0x0200, pci_device_1127_0200,
 #ifdef INIT_SUBSYS_INFO
@@ -84938,6 +97904,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1133_e022 = {
+	0xe022, pci_device_1133_e022,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1133_e022,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1133_e024 = {
 	0xe024, pci_device_1133_e024,
 #ifdef INIT_SUBSYS_INFO
@@ -85491,6 +98466,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_114f_0013 = {
+	0x0013, pci_device_114f_0013,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_114f_0013,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_114f_0014 = {
 	0x0014, pci_device_114f_0014,
 #ifdef INIT_SUBSYS_INFO
@@ -86095,6 +99079,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1166_0103 = {
+	0x0103, pci_device_1166_0103,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1166_0103,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1166_0104 = {
 	0x0104, pci_device_1166_0104,
 #ifdef INIT_SUBSYS_INFO
@@ -86131,6 +99124,42 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1166_0140 = {
+	0x0140, pci_device_1166_0140,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1166_0140,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1166_0141 = {
+	0x0141, pci_device_1166_0141,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1166_0141,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1166_0142 = {
+	0x0142, pci_device_1166_0142,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1166_0142,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1166_0144 = {
+	0x0144, pci_device_1166_0144,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1166_0144,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1166_0200 = {
 	0x0200, pci_device_1166_0200,
 #ifdef INIT_SUBSYS_INFO
@@ -86311,6 +99340,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1166_024b = {
+	0x024b, pci_device_1166_024b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1166_024b,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_116a_6100 = {
@@ -86654,6 +99692,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1180_0832 = {
+	0x0832, pci_device_1180_0832,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1180_0832,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1180_0841 = {
 	0x0841, pci_device_1180_0841,
 #ifdef INIT_SUBSYS_INFO
@@ -86737,6 +99784,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1186_1405 = {
+	0x1405, pci_device_1186_1405,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1186_1405,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1186_1541 = {
 	0x1541, pci_device_1186_1541,
 #ifdef INIT_SUBSYS_INFO
@@ -86899,6 +99955,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1186_4800 = {
+	0x4800, pci_device_1186_4800,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1186_4800,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1186_4b01 = {
+	0x4b01, pci_device_1186_4b01,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1186_4b01,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1186_4c00 = {
 	0x4c00, pci_device_1186_4c00,
 #ifdef INIT_SUBSYS_INFO
@@ -87342,6 +100416,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_11ab_11ab = {
+	0x11ab, pci_device_11ab_11ab,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11ab_11ab,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_11ab_138f = {
 	0x138f, pci_device_11ab_138f,
 #ifdef INIT_SUBSYS_INFO
@@ -87378,6 +100461,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_11ab_2a01 = {
+	0x2a01, pci_device_11ab_2a01,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11ab_2a01,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_11ab_4320 = {
 	0x4320, pci_device_11ab_4320,
 #ifdef INIT_SUBSYS_INFO
@@ -87522,6 +100614,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_11ab_4364 = {
+	0x4364, pci_device_11ab_4364,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11ab_4364,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_11ab_4611 = {
 	0x4611, pci_device_11ab_4611,
 #ifdef INIT_SUBSYS_INFO
@@ -87612,6 +100713,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_11ab_6101 = {
+	0x6101, pci_device_11ab_6101,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11ab_6101,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_11ab_6141 = {
+	0x6141, pci_device_11ab_6141,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11ab_6141,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_11ab_6450 = {
+	0x6450, pci_device_11ab_6450,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11ab_6450,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_11ab_6460 = {
 	0x6460, pci_device_11ab_6460,
 #ifdef INIT_SUBSYS_INFO
@@ -87630,6 +100758,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_11ab_6485 = {
+	0x6485, pci_device_11ab_6485,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11ab_6485,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_11ab_f003 = {
 	0xf003, pci_device_11ab_f003,
 #ifdef INIT_SUBSYS_INFO
@@ -87761,6 +100898,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_11bd_0040 = {
+	0x0040, pci_device_11bd_0040,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11bd_0040,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_11bd_0041 = {
+	0x0041, pci_device_11bd_0041,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11bd_0041,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_11bd_0042 = {
+	0x0042, pci_device_11bd_0042,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11bd_0042,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_11bd_bede = {
 	0xbede, pci_device_11bd_bede,
 #ifdef INIT_SUBSYS_INFO
@@ -88069,6 +101233,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_11c1_1040 = {
+	0x1040, pci_device_11c1_1040,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11c1_1040,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_11c1_2600 = {
+	0x2600, pci_device_11c1_2600,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11c1_2600,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_11c1_5801 = {
 	0x5801, pci_device_11c1_5801,
 #ifdef INIT_SUBSYS_INFO
@@ -88168,6 +101350,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_11c1_ed01 = {
+	0xed01, pci_device_11c1_ed01,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11c1_ed01,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_11c8_0658 = {
@@ -88259,6 +101450,15 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_11d4_0078 = {
+	0x0078, pci_device_11d4_0078,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11d4_0078,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_11d4_1535 = {
 	0x1535, pci_device_11d4_1535,
 #ifdef INIT_SUBSYS_INFO
@@ -88286,6 +101486,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_11d4_1981 = {
+	0x1981, pci_device_11d4_1981,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11d4_1981,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_11d4_1983 = {
+	0x1983, pci_device_11d4_1983,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11d4_1983,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_11d4_1986 = {
+	0x1986, pci_device_11d4_1986,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_11d4_1986,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_11d4_5340 = {
 	0x5340, pci_device_11d4_5340,
 #ifdef INIT_SUBSYS_INFO
@@ -88899,6 +102126,15 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1217_00f7 = {
+	0x00f7, pci_device_1217_00f7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1217_00f7,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1217_6729 = {
 	0x6729, pci_device_1217_6729,
 #ifdef INIT_SUBSYS_INFO
@@ -89007,6 +102243,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1217_7120 = {
+	0x7120, pci_device_1217_7120,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1217_7120,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1217_7130 = {
+	0x7130, pci_device_1217_7130,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1217_7130,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1217_7134 = {
 	0x7134, pci_device_1217_7134,
 #ifdef INIT_SUBSYS_INFO
@@ -89016,6 +102270,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1217_7135 = {
+	0x7135, pci_device_1217_7135,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1217_7135,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1217_71e2 = {
 	0x71e2, pci_device_1217_71e2,
 #ifdef INIT_SUBSYS_INFO
@@ -89126,6 +102389,17 @@
 	0
 };
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_121e_0201 = {
+	0x0201, pci_device_121e_0201,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_121e_0201,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1220_1220 = {
 	0x1220, pci_device_1220_1220,
 #ifdef INIT_SUBSYS_INFO
@@ -89631,6 +102905,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1259_a11e = {
+	0xa11e, pci_device_1259_a11e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1259_a11e,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1259_a120 = {
 	0xa120, pci_device_1259_a120,
 #ifdef INIT_SUBSYS_INFO
@@ -90566,6 +103849,15 @@
 	0
 };
 #endif
+static const pciDeviceInfo pci_dev_info_1292_fc02 = {
+	0xfc02, pci_device_1292_fc02,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1292_fc02,
+#else
+	NULL,
+#endif
+	0
+};
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_129a_0615 = {
 	0x0615, pci_device_129a_0615,
@@ -90589,6 +103881,15 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_12ab_0000 = {
+	0x0000, pci_device_12ab_0000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_12ab_0000,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_12ab_0002 = {
 	0x0002, pci_device_12ab_0002,
 #ifdef INIT_SUBSYS_INFO
@@ -90598,6 +103899,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_12ab_2300 = {
+	0x2300, pci_device_12ab_2300,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_12ab_2300,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_12ab_3000 = {
 	0x3000, pci_device_12ab_3000,
 #ifdef INIT_SUBSYS_INFO
@@ -90607,6 +103917,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_12ab_fff3 = {
+	0xfff3, pci_device_12ab_fff3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_12ab_fff3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_12ab_ffff = {
+	0xffff, pci_device_12ab_ffff,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_12ab_ffff,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_12ae_0001 = {
@@ -91120,6 +104448,15 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_12d8_01a7 = {
+	0x01a7, pci_device_12d8_01a7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_12d8_01a7,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_12d8_8150 = {
 	0x8150, pci_device_12d8_8150,
 #ifdef INIT_SUBSYS_INFO
@@ -91158,6 +104495,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_12d9_1078 = {
+	0x1078, pci_device_12d9_1078,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_12d9_1078,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_12de_0200 = {
@@ -92616,6 +105962,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_135e_7804 = {
+	0x7804, pci_device_135e_7804,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_135e_7804,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_135e_8001 = {
 	0x8001, pci_device_135e_8001,
 #ifdef INIT_SUBSYS_INFO
@@ -92654,6 +106009,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1360_0104 = {
+	0x0104, pci_device_1360_0104,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1360_0104,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1360_0201 = {
 	0x0201, pci_device_1360_0201,
 #ifdef INIT_SUBSYS_INFO
@@ -92681,6 +106045,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1360_0204 = {
+	0x0204, pci_device_1360_0204,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1360_0204,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1360_0301 = {
 	0x0301, pci_device_1360_0301,
 #ifdef INIT_SUBSYS_INFO
@@ -92699,6 +106072,53 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1360_0303 = {
+	0x0303, pci_device_1360_0303,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1360_0303,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_136a_0004 = {
+	0x0004, pci_device_136a_0004,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_136a_0004,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_136a_0007 = {
+	0x0007, pci_device_136a_0007,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_136a_0007,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_136a_0008 = {
+	0x0008, pci_device_136a_0008,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_136a_0008,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_136a_000a = {
+	0x000a, pci_device_136a_000a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_136a_000a,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_136b_ff01 = {
@@ -92912,6 +106332,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1374_003b = {
+	0x003b, pci_device_1374_003b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1374_003b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1374_003c = {
+	0x003c, pci_device_1374_003c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1374_003c,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_137a_0001 = {
@@ -92943,6 +106381,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1382_2048 = {
+	0x2048, pci_device_1382_2048,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1382_2048,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1382_2088 = {
 	0x2088, pci_device_1382_2088,
 #ifdef INIT_SUBSYS_INFO
@@ -93026,6 +106473,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1385_006b = {
+	0x006b, pci_device_1385_006b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1385_006b,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1385_311a = {
 	0x311a, pci_device_1385_311a,
 #ifdef INIT_SUBSYS_INFO
@@ -93053,6 +106509,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1385_4251 = {
+	0x4251, pci_device_1385_4251,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1385_4251,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1385_4400 = {
 	0x4400, pci_device_1385_4400,
 #ifdef INIT_SUBSYS_INFO
@@ -93215,6 +106680,42 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1385_7b00 = {
+	0x7b00, pci_device_1385_7b00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1385_7b00,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1385_7c00 = {
+	0x7c00, pci_device_1385_7c00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1385_7c00,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1385_7d00 = {
+	0x7d00, pci_device_1385_7d00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1385_7d00,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1385_7e00 = {
+	0x7e00, pci_device_1385_7e00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1385_7e00,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1385_f004 = {
 	0xf004, pci_device_1385_f004,
 #ifdef INIT_SUBSYS_INFO
@@ -93264,6 +106765,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1393_1681 = {
+	0x1681, pci_device_1393_1681,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1393_1681,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1393_2040 = {
 	0x2040, pci_device_1393_2040,
 #ifdef INIT_SUBSYS_INFO
@@ -93331,6 +106841,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1397_30b1 = {
+	0x30b1, pci_device_1397_30b1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1397_30b1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1397_f001 = {
+	0xf001, pci_device_1397_f001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1397_f001,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_139a_0001 = {
@@ -93566,6 +107094,26 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_13c1_1004 = {
+	0x1004, pci_device_13c1_1004,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_13c1_1004,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_13c2_000e = {
+	0x000e, pci_device_13c2_000e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_13c2_000e,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_13c6_0520 = {
@@ -93666,6 +107214,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_13ec_000a = {
+	0x000a, pci_device_13ec_000a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_13ec_000a,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_13f0_0200 = {
 	0x0200, pci_device_13f0_0200,
 #ifdef INIT_SUBSYS_INFO
@@ -93751,6 +107310,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_13f6_9880 = {
+	0x9880, pci_device_13f6_9880,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_13f6_9880,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_13fe_1240 = {
@@ -93765,7 +107333,16 @@
 static const pciDeviceInfo pci_dev_info_13fe_1600 = {
 	0x1600, pci_device_13fe_1600,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_13fe_1600,
+	pci_ss_list_13fe_1600,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_13fe_16ff = {
+	0x16ff, pci_device_13fe_16ff,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_13fe_16ff,
 #else
 	NULL,
 #endif
@@ -94051,6 +107628,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1415_9500 = {
+	0x9500, pci_device_1415_9500,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1415_9500,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1415_9501 = {
 	0x9501, pci_device_1415_9501,
 #ifdef INIT_SUBSYS_INFO
@@ -94096,6 +107682,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1415_9512 = {
+	0x9512, pci_device_1415_9512,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1415_9512,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1415_9513 = {
+	0x9513, pci_device_1415_9513,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1415_9513,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1415_9521 = {
 	0x9521, pci_device_1415_9521,
 #ifdef INIT_SUBSYS_INFO
@@ -94145,6 +107749,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1425_000c = {
+	0x000c, pci_device_1425_000c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1425_000c,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_142e_4020 = {
@@ -94178,6 +107791,71 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1435_4520 = {
+	0x4520, pci_device_1435_4520,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1435_4520,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1435_6020 = {
+	0x6020, pci_device_1435_6020,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1435_6020,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1435_6030 = {
+	0x6030, pci_device_1435_6030,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1435_6030,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1435_6420 = {
+	0x6420, pci_device_1435_6420,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1435_6420,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1435_6430 = {
+	0x6430, pci_device_1435_6430,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1435_6430,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1435_7520 = {
+	0x7520, pci_device_1435_7520,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1435_7520,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1435_7820 = {
+	0x7820, pci_device_1435_7820,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1435_7820,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_144a_7296 = {
 	0x7296, pci_device_144a_7296,
 #ifdef INIT_SUBSYS_INFO
@@ -94279,6 +107957,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_144d_c00c = {
+	0xc00c, pci_device_144d_c00c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_144d_c00c,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1458_0c11 = {
 	0x0c11, pci_device_1458_0c11,
 #ifdef INIT_SUBSYS_INFO
@@ -94288,6 +107977,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1458_9001 = {
+	0x9001, pci_device_1458_9001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1458_9001,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1458_e911 = {
 	0xe911, pci_device_1458_e911,
 #ifdef INIT_SUBSYS_INFO
@@ -94310,6 +108008,33 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1461_a3ce = {
+	0xa3ce, pci_device_1461_a3ce,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1461_a3ce,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1461_a3cf = {
+	0xa3cf, pci_device_1461_a3cf,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1461_a3cf,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1461_a836 = {
+	0xa836, pci_device_1461_a836,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1461_a836,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1461_f436 = {
 	0xf436, pci_device_1461_f436,
 #ifdef INIT_SUBSYS_INFO
@@ -94357,6 +108082,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1462_7125 = {
+	0x7125, pci_device_1462_7125,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1462_7125,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1462_7235 = {
+	0x7235, pci_device_1462_7235,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1462_7235,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1462_8725 = {
 	0x8725, pci_device_1462_8725,
 #ifdef INIT_SUBSYS_INFO
@@ -94393,6 +108136,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1462_9123 = {
+	0x9123, pci_device_1462_9123,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1462_9123,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1462_9510 = {
+	0x9510, pci_device_1462_9510,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1462_9510,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1462_9511 = {
+	0x9511, pci_device_1462_9511,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1462_9511,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1462_9591 = {
 	0x9591, pci_device_1462_9591,
 #ifdef INIT_SUBSYS_INFO
@@ -94455,6 +108225,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1498_21cc = {
+	0x21cc, pci_device_1498_21cc,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1498_21cc,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1498_21cd = {
 	0x21cd, pci_device_1498_21cd,
 #ifdef INIT_SUBSYS_INFO
@@ -94667,6 +108446,35 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_14bc_d002 = {
+	0xd002, pci_device_14bc_d002,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14bc_d002,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14bc_d00f = {
+	0xd00f, pci_device_14bc_d00f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14bc_d00f,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_14c1_0008 = {
+	0x0008, pci_device_14c1_0008,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14c1_0008,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14c1_8043 = {
 	0x8043, pci_device_14c1_8043,
 #ifdef INIT_SUBSYS_INFO
@@ -95064,6 +108872,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_1639 = {
+	0x1639, pci_device_14e4_1639,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_1639,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_1644 = {
 	0x1644, pci_device_14e4_1644,
 #ifdef INIT_SUBSYS_INFO
@@ -95163,6 +108980,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_165a = {
+	0x165a, pci_device_14e4_165a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_165a,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_165d = {
 	0x165d, pci_device_14e4_165d,
 #ifdef INIT_SUBSYS_INFO
@@ -95190,6 +109016,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_1669 = {
+	0x1669, pci_device_14e4_1669,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_1669,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_166a = {
 	0x166a, pci_device_14e4_166a,
 #ifdef INIT_SUBSYS_INFO
@@ -95217,6 +109052,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_1672 = {
+	0x1672, pci_device_14e4_1672,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_1672,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_1673 = {
+	0x1673, pci_device_14e4_1673,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_1673,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_1674 = {
+	0x1674, pci_device_14e4_1674,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_1674,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_1677 = {
 	0x1677, pci_device_14e4_1677,
 #ifdef INIT_SUBSYS_INFO
@@ -95235,6 +109097,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_1679 = {
+	0x1679, pci_device_14e4_1679,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_1679,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_167a = {
+	0x167a, pci_device_14e4_167a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_167a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_167b = {
+	0x167b, pci_device_14e4_167b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_167b,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_167d = {
 	0x167d, pci_device_14e4_167d,
 #ifdef INIT_SUBSYS_INFO
@@ -95253,6 +109142,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_167f = {
+	0x167f, pci_device_14e4_167f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_167f,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_1693 = {
+	0x1693, pci_device_14e4_1693,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_1693,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_1696 = {
 	0x1696, pci_device_14e4_1696,
 #ifdef INIT_SUBSYS_INFO
@@ -95262,6 +109169,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_169a = {
+	0x169a, pci_device_14e4_169a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_169a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_169b = {
+	0x169b, pci_device_14e4_169b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_169b,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_169c = {
 	0x169c, pci_device_14e4_169c,
 #ifdef INIT_SUBSYS_INFO
@@ -95406,6 +109331,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_1712 = {
+	0x1712, pci_device_14e4_1712,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_1712,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_1713 = {
+	0x1713, pci_device_14e4_1713,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_1713,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_3352 = {
 	0x3352, pci_device_14e4_3352,
 #ifdef INIT_SUBSYS_INFO
@@ -95496,6 +109439,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_4311 = {
+	0x4311, pci_device_14e4_4311,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_4311,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_4312 = {
 	0x4312, pci_device_14e4_4312,
 #ifdef INIT_SUBSYS_INFO
@@ -95595,6 +109547,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_4329 = {
+	0x4329, pci_device_14e4_4329,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_4329,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_4344 = {
+	0x4344, pci_device_14e4_4344,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_4344,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_4401 = {
 	0x4401, pci_device_14e4_4401,
 #ifdef INIT_SUBSYS_INFO
@@ -95964,6 +109934,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14e4_5695 = {
+	0x5695, pci_device_14e4_5695,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_5695,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14e4_5698 = {
+	0x5698, pci_device_14e4_5698,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14e4_5698,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14e4_5820 = {
 	0x5820, pci_device_14e4_5820,
 #ifdef INIT_SUBSYS_INFO
@@ -96310,6 +110298,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14f1_10b6 = {
+	0x10b6, pci_device_14f1_10b6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14f1_10b6,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14f1_1433 = {
 	0x1433, pci_device_14f1_1433,
 #ifdef INIT_SUBSYS_INFO
@@ -96823,6 +110820,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14f1_2bfa = {
+	0x2bfa, pci_device_14f1_2bfa,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14f1_2bfa,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14f1_2f00 = {
 	0x2f00, pci_device_14f1_2f00,
 #ifdef INIT_SUBSYS_INFO
@@ -96859,6 +110865,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14f1_2f30 = {
+	0x2f30, pci_device_14f1_2f30,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14f1_2f30,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14f1_5045 = {
+	0x5045, pci_device_14f1_5045,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14f1_5045,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_14f1_5047 = {
+	0x5047, pci_device_14f1_5047,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14f1_5047,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_14f1_8234 = {
 	0x8234, pci_device_14f1_8234,
 #ifdef INIT_SUBSYS_INFO
@@ -97020,6 +111053,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_14fc_0002 = {
+	0x0002, pci_device_14fc_0002,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_14fc_0002,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1500_1360 = {
@@ -97252,6 +111294,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1524_0551 = {
+	0x0551, pci_device_1524_0551,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1524_0551,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1524_0610 = {
 	0x0610, pci_device_1524_0610,
 #ifdef INIT_SUBSYS_INFO
@@ -97397,6 +111448,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1542_9260 = {
+	0x9260, pci_device_1542_9260,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1542_9260,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1543_3052 = {
 	0x3052, pci_device_1543_3052,
 #ifdef INIT_SUBSYS_INFO
@@ -97807,6 +111869,44 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_15b8_1003 = {
+	0x1003, pci_device_15b8_1003,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_15b8_1003,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_15b8_1005 = {
+	0x1005, pci_device_15b8_1005,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_15b8_1005,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_15b8_100a = {
+	0x100a, pci_device_15b8_100a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_15b8_100a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_15b8_3001 = {
+	0x3001, pci_device_15b8_3001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_15b8_3001,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_15bc_1100 = {
 	0x1100, pci_device_15bc_1100,
 #ifdef INIT_SUBSYS_INFO
@@ -97878,6 +111978,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_15e2_0500 = {
+	0x0500, pci_device_15e2_0500,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_15e2_0500,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_15e8_0130 = {
 	0x0130, pci_device_15e8_0130,
 #ifdef INIT_SUBSYS_INFO
@@ -98005,6 +112116,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1629_1006 = {
+	0x1006, pci_device_1629_1006,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1629_1006,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1629_1007 = {
+	0x1007, pci_device_1629_1007,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1629_1007,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1629_2002 = {
 	0x2002, pci_device_1629_2002,
 #ifdef INIT_SUBSYS_INFO
@@ -98147,6 +112276,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1677_20ad = {
+	0x20ad, pci_device_1677_20ad,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1677_20ad,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_167b_2102 = {
@@ -98160,6 +112298,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_167d_a000 = {
+	0xa000, pci_device_167d_a000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_167d_a000,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1681_0010 = {
 	0x0010, pci_device_1681_0010,
 #ifdef INIT_SUBSYS_INFO
@@ -98236,6 +112385,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_168c_001c = {
+	0x001c, pci_device_168c_001c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_168c_001c,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_168c_0020 = {
 	0x0020, pci_device_168c_0020,
 #ifdef INIT_SUBSYS_INFO
@@ -98245,6 +112403,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_168c_0023 = {
+	0x0023, pci_device_168c_0023,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_168c_0023,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_168c_0024 = {
+	0x0024, pci_device_168c_0024,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_168c_0024,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_168c_1014 = {
 	0x1014, pci_device_168c_1014,
 #ifdef INIT_SUBSYS_INFO
@@ -98254,6 +112430,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_168c_3b08 = {
+	0x3b08, pci_device_168c_3b08,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_168c_3b08,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_169c_0044 = {
@@ -98267,6 +112452,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_169d_3306 = {
+	0x3306, pci_device_169d_3306,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_169d_3306,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_16ab_1100 = {
 	0x1100, pci_device_16ab_1100,
 #ifdef INIT_SUBSYS_INFO
@@ -98316,6 +112512,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_16c6_8695 = {
+	0x8695, pci_device_16c6_8695,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_16c6_8695,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_16ca_0001 = {
 	0x0001, pci_device_16ca_0001,
 #ifdef INIT_SUBSYS_INFO
@@ -98327,6 +112534,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_16d5_4d4e = {
+	0x4d4e, pci_device_16d5_4d4e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_16d5_4d4e,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_16e3_1e0f = {
 	0x1e0f, pci_device_16e3_1e0f,
 #ifdef INIT_SUBSYS_INFO
@@ -98338,6 +112556,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_16e5_6000 = {
+	0x6000, pci_device_16e5_6000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_16e5_6000,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_16ec_00ff = {
 	0x00ff, pci_device_16ec_00ff,
 #ifdef INIT_SUBSYS_INFO
@@ -98356,6 +112585,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_16ec_2f00 = {
+	0x2f00, pci_device_16ec_2f00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_16ec_2f00,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_16ec_3685 = {
 	0x3685, pci_device_16ec_3685,
 #ifdef INIT_SUBSYS_INFO
@@ -98422,6 +112660,26 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1734_1078 = {
+	0x1078, pci_device_1734_1078,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1734_1078,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1734_1085 = {
+	0x1085, pci_device_1734_1085,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1734_1085,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1737_0013 = {
 	0x0013, pci_device_1737_0013,
 #ifdef INIT_SUBSYS_INFO
@@ -98440,6 +112698,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1737_0029 = {
+	0x0029, pci_device_1737_0029,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1737_0029,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1737_1032 = {
 	0x1032, pci_device_1737_1032,
 #ifdef INIT_SUBSYS_INFO
@@ -98619,6 +112886,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1799_700a = {
+	0x700a, pci_device_1799_700a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1799_700a,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1799_7010 = {
 	0x7010, pci_device_1799_7010,
 #ifdef INIT_SUBSYS_INFO
@@ -98728,6 +113004,26 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_17cb_0001 = {
+	0x0001, pci_device_17cb_0001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17cb_0001,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_17cb_0002 = {
+	0x0002, pci_device_17cb_0002,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17cb_0002,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_17cc_2280 = {
 	0x2280, pci_device_17cc_2280,
 #ifdef INIT_SUBSYS_INFO
@@ -98833,6 +113129,131 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_17db_0101 = {
+	0x0101, pci_device_17db_0101,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17db_0101,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_17db_0201 = {
+	0x0201, pci_device_17db_0201,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17db_0201,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_17db_0202 = {
+	0x0202, pci_device_17db_0202,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17db_0202,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_17e4_0001 = {
+	0x0001, pci_device_17e4_0001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17e4_0001,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_17e4_0002 = {
+	0x0002, pci_device_17e4_0002,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17e4_0002,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_17e6_0010 = {
+	0x0010, pci_device_17e6_0010,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17e6_0010,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_17e6_0011 = {
+	0x0011, pci_device_17e6_0011,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17e6_0011,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_17e6_0021 = {
+	0x0021, pci_device_17e6_0021,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17e6_0021,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_17f3_6020 = {
+	0x6020, pci_device_17f3_6020,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17f3_6020,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_17f3_6030 = {
+	0x6030, pci_device_17f3_6030,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17f3_6030,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_17f3_6040 = {
+	0x6040, pci_device_17f3_6040,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17f3_6040,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_17f3_6060 = {
+	0x6060, pci_device_17f3_6060,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17f3_6060,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_17f3_6061 = {
+	0x6061, pci_device_17f3_6061,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_17f3_6061,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_17fe_2120 = {
 	0x2120, pci_device_17fe_2120,
 #ifdef INIT_SUBSYS_INFO
@@ -98909,6 +113330,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1814_0302 = {
+	0x0302, pci_device_1814_0302,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1814_0302,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1814_0401 = {
 	0x0401, pci_device_1814_0401,
 #ifdef INIT_SUBSYS_INFO
@@ -98951,6 +113381,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_182e_0008 = {
+	0x0008, pci_device_182e_0008,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_182e_0008,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_183b_08a7 = {
 	0x08a7, pci_device_183b_08a7,
 #ifdef INIT_SUBSYS_INFO
@@ -98978,6 +113419,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_183b_08b0 = {
+	0x08b0, pci_device_183b_08b0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_183b_08b0,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1864_2110 = {
@@ -99038,6 +113488,26 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_187e_3403 = {
+	0x3403, pci_device_187e_3403,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_187e_3403,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_187e_340e = {
+	0x340e, pci_device_187e_340e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_187e_340e,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1888_0301 = {
 	0x0301, pci_device_1888_0301,
 #ifdef INIT_SUBSYS_INFO
@@ -99085,6 +113555,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_18ac_d800 = {
+	0xd800, pci_device_18ac_d800,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_18ac_d800,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_18ac_d810 = {
 	0xd810, pci_device_18ac_d810,
 #ifdef INIT_SUBSYS_INFO
@@ -99133,6 +113612,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_18ca_0047 = {
+	0x0047, pci_device_18ca_0047,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_18ca_0047,
+#else
+	NULL,
+#endif
+	0
+};
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_18d2_3069 = {
 	0x3069, pci_device_18d2_3069,
@@ -99205,6 +113693,35 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_18f6_1000 = {
+	0x1000, pci_device_18f6_1000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_18f6_1000,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_18f6_1050 = {
+	0x1050, pci_device_18f6_1050,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_18f6_1050,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_18f6_2000 = {
+	0x2000, pci_device_18f6_2000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_18f6_2000,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_18f7_0001 = {
 	0x0001, pci_device_18f7_0001,
 #ifdef INIT_SUBSYS_INFO
@@ -99252,6 +113769,26 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1904_8139 = {
+	0x8139, pci_device_1904_8139,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1904_8139,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1923_0040 = {
+	0x0040, pci_device_1923_0040,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1923_0040,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1923_0100 = {
 	0x0100, pci_device_1923_0100,
 #ifdef INIT_SUBSYS_INFO
@@ -99261,6 +113798,35 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1923_0300 = {
+	0x0300, pci_device_1923_0300,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1923_0300,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1923_0400 = {
+	0x0400, pci_device_1923_0400,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1923_0400,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1931_000c = {
+	0x000c, pci_device_1931_000c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1931_000c,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1942_e511 = {
@@ -99274,6 +113840,62 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_194a_1111 = {
+	0x1111, pci_device_194a_1111,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_194a_1111,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_194a_1112 = {
+	0x1112, pci_device_194a_1112,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_194a_1112,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_194a_1113 = {
+	0x1113, pci_device_194a_1113,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_194a_1113,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_194a_1114 = {
+	0x1114, pci_device_194a_1114,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_194a_1114,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_194a_1115 = {
+	0x1115, pci_device_194a_1115,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_194a_1115,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1957_0012 = {
+	0x0012, pci_device_1957_0012,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1957_0012,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_1957_0080 = {
 	0x0080, pci_device_1957_0080,
 #ifdef INIT_SUBSYS_INFO
@@ -99359,6 +113981,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1969_1048 = {
+	0x1048, pci_device_1969_1048,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1969_1048,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_196a_0101 = {
 	0x0101, pci_device_196a_0101,
 #ifdef INIT_SUBSYS_INFO
@@ -99377,6 +114010,26 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_196a_0105 = {
+	0x0105, pci_device_196a_0105,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_196a_0105,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1971_1011 = {
+	0x1011, pci_device_1971_1011,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1971_1011,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_197b_2360 = {
@@ -99388,6 +114041,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_197b_2361 = {
+	0x2361, pci_device_197b_2361,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_197b_2361,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_197b_2363 = {
 	0x2363, pci_device_197b_2363,
 #ifdef INIT_SUBSYS_INFO
@@ -99397,6 +114059,53 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_197b_2365 = {
+	0x2365, pci_device_197b_2365,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_197b_2365,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_197b_2366 = {
+	0x2366, pci_device_197b_2366,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_197b_2366,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_197b_2368 = {
+	0x2368, pci_device_197b_2368,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_197b_2368,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1982_1600 = {
+	0x1600, pci_device_1982_1600,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1982_1600,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1982_16ff = {
+	0x16ff, pci_device_1982_16ff,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1982_16ff,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1989_0001 = {
@@ -99419,6 +114128,37 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_19a2_0200 = {
+	0x0200, pci_device_19a2_0200,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_19a2_0200,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_19a2_0201 = {
+	0x0201, pci_device_19a2_0201,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_19a2_0201,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_19ac_0001 = {
+	0x0001, pci_device_19ac_0001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_19ac_0001,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_19ae_0520 = {
 	0x0520, pci_device_19ae_0520,
 #ifdef INIT_SUBSYS_INFO
@@ -99429,6 +114169,53 @@
 	0
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_19e7_1001 = {
+	0x1001, pci_device_19e7_1001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_19e7_1001,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_19e7_1002 = {
+	0x1002, pci_device_19e7_1002,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_19e7_1002,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_19e7_1003 = {
+	0x1003, pci_device_19e7_1003,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_19e7_1003,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_19e7_1004 = {
+	0x1004, pci_device_19e7_1004,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_19e7_1004,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_19e7_1005 = {
+	0x1005, pci_device_19e7_1005,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_19e7_1005,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
 static const pciDeviceInfo pci_dev_info_1a03_2000 = {
 	0x2000, pci_device_1a03_2000,
 #ifdef INIT_SUBSYS_INFO
@@ -99439,6 +114226,26 @@
 	0
 };
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1a07_0006 = {
+	0x0006, pci_device_1a07_0006,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1a07_0006,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_1a07_0007 = {
+	0x0007, pci_device_1a07_0007,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1a07_0007,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1a08_0000 = {
 	0x0000, pci_device_1a08_0000,
 #ifdef INIT_SUBSYS_INFO
@@ -99450,6 +114257,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_1a1d_1a17 = {
+	0x1a17, pci_device_1a1d_1a17,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1a1d_1a17,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1c1c_0001 = {
 	0x0001, pci_device_1c1c_0001,
 #ifdef INIT_SUBSYS_INFO
@@ -99530,6 +114348,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_1fc1_0010 = {
+	0x0010, pci_device_1fc1_0010,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_1fc1_0010,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_1fce_0001 = {
@@ -100143,6 +114970,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_4d56_0000 = {
+	0x0000, pci_device_4d56_0000,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_4d56_0000,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_4ddc_0100 = {
 	0x0100, pci_device_4ddc_0100,
 #ifdef INIT_SUBSYS_INFO
@@ -100331,6 +115169,15 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_5168_0300 = {
+	0x0300, pci_device_5168_0300,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_5168_0300,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_5168_0301 = {
 	0x0301, pci_device_5168_0301,
 #ifdef INIT_SUBSYS_INFO
@@ -101054,6 +115901,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_5333_8e48 = {
+	0x8e48, pci_device_5333_8e48,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_5333_8e48,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_5333_9102 = {
 	0x9102, pci_device_5333_9102,
 #ifdef INIT_SUBSYS_INFO
@@ -101128,6 +115984,17 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_5853_0001 = {
+	0x0001, pci_device_5853_0001,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_5853_0001,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_6374_6773 = {
 	0x6773, pci_device_6374_6773,
 #ifdef INIT_SUBSYS_INFO
@@ -101195,6 +116062,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_7063_5500 = {
+	0x5500, pci_device_7063_5500,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_7063_5500,
+#else
+	NULL,
+#endif
+	0
+};
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_8008_0010 = {
@@ -102125,6 +117001,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_1049 = {
+	0x1049, pci_device_8086_1049,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_1049,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_104a = {
+	0x104a, pci_device_8086_104a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_104a,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_104b = {
 	0x104b, pci_device_8086_104b,
 #ifdef INIT_SUBSYS_INFO
@@ -102134,6 +117028,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_104c = {
+	0x104c, pci_device_8086_104c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_104c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_104d = {
+	0x104d, pci_device_8086_104d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_104d,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_1050 = {
 	0x1050, pci_device_8086_1050,
 #ifdef INIT_SUBSYS_INFO
@@ -102170,6 +117082,42 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_1054 = {
+	0x1054, pci_device_8086_1054,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_1054,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_1055 = {
+	0x1055, pci_device_8086_1055,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_1055,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_1056 = {
+	0x1056, pci_device_8086_1056,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_1056,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_1057 = {
+	0x1057, pci_device_8086_1057,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_1057,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_1059 = {
 	0x1059, pci_device_8086_1059,
 #ifdef INIT_SUBSYS_INFO
@@ -102179,6 +117127,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_105b = {
+	0x105b, pci_device_8086_105b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_105b,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_105e = {
 	0x105e, pci_device_8086_105e,
 #ifdef INIT_SUBSYS_INFO
@@ -102503,6 +117460,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_1091 = {
+	0x1091, pci_device_8086_1091,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_1091,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_1092 = {
 	0x1092, pci_device_8086_1092,
 #ifdef INIT_SUBSYS_INFO
@@ -102512,6 +117478,33 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_1093 = {
+	0x1093, pci_device_8086_1093,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_1093,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_1094 = {
+	0x1094, pci_device_8086_1094,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_1094,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_1095 = {
+	0x1095, pci_device_8086_1095,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_1095,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_1096 = {
 	0x1096, pci_device_8086_1096,
 #ifdef INIT_SUBSYS_INFO
@@ -102566,6 +117559,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_109e = {
+	0x109e, pci_device_8086_109e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_109e,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_10a0 = {
 	0x10a0, pci_device_8086_10a0,
 #ifdef INIT_SUBSYS_INFO
@@ -102584,6 +117586,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_10a4 = {
+	0x10a4, pci_device_8086_10a4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_10a4,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_10b0 = {
 	0x10b0, pci_device_8086_10b0,
 #ifdef INIT_SUBSYS_INFO
@@ -102629,6 +117640,60 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_10b9 = {
+	0x10b9, pci_device_8086_10b9,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_10b9,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_10ba = {
+	0x10ba, pci_device_8086_10ba,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_10ba,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_10bb = {
+	0x10bb, pci_device_8086_10bb,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_10bb,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_10bc = {
+	0x10bc, pci_device_8086_10bc,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_10bc,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_10c4 = {
+	0x10c4, pci_device_8086_10c4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_10c4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_10c5 = {
+	0x10c5, pci_device_8086_10c5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_10c5,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_1107 = {
 	0x1107, pci_device_8086_1107,
 #ifdef INIT_SUBSYS_INFO
@@ -103034,10 +118099,19 @@
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_1a48 = {
-	0x1a48, pci_device_8086_1a48,
+static const pciDeviceInfo pci_dev_info_8086_1a48 = {
+	0x1a48, pci_device_8086_1a48,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_1a48,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_1b48 = {
+	0x1b48, pci_device_8086_1b48,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_1a48,
+	pci_ss_list_8086_1b48,
 #else
 	NULL,
 #endif
@@ -104303,15 +119377,6 @@
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_25e8 = {
-	0x25e8, pci_device_8086_25e8,
-#ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_25e8,
-#else
-	NULL,
-#endif
-	0
-};
 static const pciDeviceInfo pci_dev_info_8086_25f0 = {
 	0x25f0, pci_device_8086_25f0,
 #ifdef INIT_SUBSYS_INFO
@@ -105458,889 +120523,2158 @@
 static const pciDeviceInfo pci_dev_info_8086_2810 = {
 	0x2810, pci_device_8086_2810,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2810,
+	pci_ss_list_8086_2810,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2811 = {
+	0x2811, pci_device_8086_2811,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2811,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2812 = {
+	0x2812, pci_device_8086_2812,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2812,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2814 = {
+	0x2814, pci_device_8086_2814,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2814,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2815 = {
+	0x2815, pci_device_8086_2815,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2815,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2820 = {
+	0x2820, pci_device_8086_2820,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2820,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2821 = {
+	0x2821, pci_device_8086_2821,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2821,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2822 = {
+	0x2822, pci_device_8086_2822,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2822,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2824 = {
+	0x2824, pci_device_8086_2824,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2824,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2825 = {
+	0x2825, pci_device_8086_2825,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2825,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2828 = {
+	0x2828, pci_device_8086_2828,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2828,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2829 = {
+	0x2829, pci_device_8086_2829,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2829,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_282a = {
+	0x282a, pci_device_8086_282a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_282a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2830 = {
+	0x2830, pci_device_8086_2830,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2830,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2831 = {
+	0x2831, pci_device_8086_2831,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2831,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2832 = {
+	0x2832, pci_device_8086_2832,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2832,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2834 = {
+	0x2834, pci_device_8086_2834,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2834,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2835 = {
+	0x2835, pci_device_8086_2835,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2835,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2836 = {
+	0x2836, pci_device_8086_2836,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2836,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_283a = {
+	0x283a, pci_device_8086_283a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_283a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_283e = {
+	0x283e, pci_device_8086_283e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_283e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_283f = {
+	0x283f, pci_device_8086_283f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_283f,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2841 = {
+	0x2841, pci_device_8086_2841,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2841,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2843 = {
+	0x2843, pci_device_8086_2843,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2843,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2845 = {
+	0x2845, pci_device_8086_2845,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2845,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2847 = {
+	0x2847, pci_device_8086_2847,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2847,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2849 = {
+	0x2849, pci_device_8086_2849,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2849,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_284b = {
+	0x284b, pci_device_8086_284b,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_284b,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_284f = {
+	0x284f, pci_device_8086_284f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_284f,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2850 = {
+	0x2850, pci_device_8086_2850,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2850,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2910 = {
+	0x2910, pci_device_8086_2910,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2910,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2911 = {
+	0x2911, pci_device_8086_2911,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2911,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2912 = {
+	0x2912, pci_device_8086_2912,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2912,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2914 = {
+	0x2914, pci_device_8086_2914,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2914,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2916 = {
+	0x2916, pci_device_8086_2916,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2916,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2918 = {
+	0x2918, pci_device_8086_2918,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2918,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2920 = {
+	0x2920, pci_device_8086_2920,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2920,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2921 = {
+	0x2921, pci_device_8086_2921,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2921,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2922 = {
+	0x2922, pci_device_8086_2922,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2922,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2923 = {
+	0x2923, pci_device_8086_2923,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2923,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2925 = {
+	0x2925, pci_device_8086_2925,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2925,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2926 = {
+	0x2926, pci_device_8086_2926,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2926,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2928 = {
+	0x2928, pci_device_8086_2928,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2928,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_292d = {
+	0x292d, pci_device_8086_292d,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_292d,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_292e = {
+	0x292e, pci_device_8086_292e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_292e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2930 = {
+	0x2930, pci_device_8086_2930,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2930,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2932 = {
+	0x2932, pci_device_8086_2932,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2932,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2934 = {
+	0x2934, pci_device_8086_2934,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2934,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2935 = {
+	0x2935, pci_device_8086_2935,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2935,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2936 = {
+	0x2936, pci_device_8086_2936,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2936,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2937 = {
+	0x2937, pci_device_8086_2937,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2937,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2938 = {
+	0x2938, pci_device_8086_2938,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2938,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2939 = {
+	0x2939, pci_device_8086_2939,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2939,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_293a = {
+	0x293a, pci_device_8086_293a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_293a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_293c = {
+	0x293c, pci_device_8086_293c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_293c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_293e = {
+	0x293e, pci_device_8086_293e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_293e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2940 = {
+	0x2940, pci_device_8086_2940,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2940,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2942 = {
+	0x2942, pci_device_8086_2942,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2942,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2944 = {
+	0x2944, pci_device_8086_2944,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2944,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2946 = {
+	0x2946, pci_device_8086_2946,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2946,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2948 = {
+	0x2948, pci_device_8086_2948,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2948,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_294a = {
+	0x294a, pci_device_8086_294a,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_294a,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_294c = {
+	0x294c, pci_device_8086_294c,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_294c,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2970 = {
+	0x2970, pci_device_8086_2970,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2970,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2971 = {
+	0x2971, pci_device_8086_2971,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2971,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2972 = {
+	0x2972, pci_device_8086_2972,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2972,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2973 = {
+	0x2973, pci_device_8086_2973,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2973,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2974 = {
+	0x2974, pci_device_8086_2974,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2974,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2975 = {
+	0x2975, pci_device_8086_2975,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2975,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2976 = {
+	0x2976, pci_device_8086_2976,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2976,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2977 = {
+	0x2977, pci_device_8086_2977,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2977,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2980 = {
+	0x2980, pci_device_8086_2980,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2980,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2981 = {
+	0x2981, pci_device_8086_2981,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2981,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2982 = {
+	0x2982, pci_device_8086_2982,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2982,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2990 = {
+	0x2990, pci_device_8086_2990,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2990,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2991 = {
+	0x2991, pci_device_8086_2991,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2991,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2992 = {
+	0x2992, pci_device_8086_2992,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2992,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2993 = {
+	0x2993, pci_device_8086_2993,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2993,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2994 = {
+	0x2994, pci_device_8086_2994,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2994,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2995 = {
+	0x2995, pci_device_8086_2995,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2995,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2996 = {
+	0x2996, pci_device_8086_2996,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2996,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2997 = {
+	0x2997, pci_device_8086_2997,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2997,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29a0 = {
+	0x29a0, pci_device_8086_29a0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29a0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29a1 = {
+	0x29a1, pci_device_8086_29a1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29a1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29a2 = {
+	0x29a2, pci_device_8086_29a2,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29a2,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29a3 = {
+	0x29a3, pci_device_8086_29a3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29a3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29a4 = {
+	0x29a4, pci_device_8086_29a4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29a4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29a5 = {
+	0x29a5, pci_device_8086_29a5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29a5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29a6 = {
+	0x29a6, pci_device_8086_29a6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29a6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29a7 = {
+	0x29a7, pci_device_8086_29a7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29a7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b0 = {
+	0x29b0, pci_device_8086_29b0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b1 = {
+	0x29b1, pci_device_8086_29b1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b2 = {
+	0x29b2, pci_device_8086_29b2,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b2,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b3 = {
+	0x29b3, pci_device_8086_29b3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b4 = {
+	0x29b4, pci_device_8086_29b4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b5 = {
+	0x29b5, pci_device_8086_29b5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b6 = {
+	0x29b6, pci_device_8086_29b6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29b7 = {
+	0x29b7, pci_device_8086_29b7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29b7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c0 = {
+	0x29c0, pci_device_8086_29c0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c1 = {
+	0x29c1, pci_device_8086_29c1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c2 = {
+	0x29c2, pci_device_8086_29c2,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c2,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c3 = {
+	0x29c3, pci_device_8086_29c3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c4 = {
+	0x29c4, pci_device_8086_29c4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c5 = {
+	0x29c5, pci_device_8086_29c5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c6 = {
+	0x29c6, pci_device_8086_29c6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29c7 = {
+	0x29c7, pci_device_8086_29c7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29c7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29cf = {
+	0x29cf, pci_device_8086_29cf,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29cf,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29d0 = {
+	0x29d0, pci_device_8086_29d0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29d0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29d1 = {
+	0x29d1, pci_device_8086_29d1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29d1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29d2 = {
+	0x29d2, pci_device_8086_29d2,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29d2,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29d3 = {
+	0x29d3, pci_device_8086_29d3,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29d3,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29d4 = {
+	0x29d4, pci_device_8086_29d4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29d4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29d5 = {
+	0x29d5, pci_device_8086_29d5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29d5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29d6 = {
+	0x29d6, pci_device_8086_29d6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29d6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29d7 = {
+	0x29d7, pci_device_8086_29d7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29d7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e0 = {
+	0x29e0, pci_device_8086_29e0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e1 = {
+	0x29e1, pci_device_8086_29e1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e4 = {
+	0x29e4, pci_device_8086_29e4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e5 = {
+	0x29e5, pci_device_8086_29e5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e6 = {
+	0x29e6, pci_device_8086_29e6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e7 = {
+	0x29e7, pci_device_8086_29e7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29e9 = {
+	0x29e9, pci_device_8086_29e9,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29e9,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f0 = {
+	0x29f0, pci_device_8086_29f0,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f0,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f1 = {
+	0x29f1, pci_device_8086_29f1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f1,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f4 = {
+	0x29f4, pci_device_8086_29f4,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f4,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f5 = {
+	0x29f5, pci_device_8086_29f5,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f5,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f6 = {
+	0x29f6, pci_device_8086_29f6,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f6,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f7 = {
+	0x29f7, pci_device_8086_29f7,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f7,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_29f9 = {
+	0x29f9, pci_device_8086_29f9,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_29f9,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2a00 = {
+	0x2a00, pci_device_8086_2a00,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2a00,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2a01 = {
+	0x2a01, pci_device_8086_2a01,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2a01,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2a02 = {
+	0x2a02, pci_device_8086_2a02,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2a02,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2a03 = {
+	0x2a03, pci_device_8086_2a03,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2a03,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2a04 = {
+	0x2a04, pci_device_8086_2a04,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2a04,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2a05 = {
+	0x2a05, pci_device_8086_2a05,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2a05,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2a06 = {
+	0x2a06, pci_device_8086_2a06,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2a06,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_2a07 = {
+	0x2a07, pci_device_8086_2a07,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_2a07,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3092 = {
+	0x3092, pci_device_8086_3092,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3092,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3200 = {
+	0x3200, pci_device_8086_3200,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3200,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3340 = {
+	0x3340, pci_device_8086_3340,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3340,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3341 = {
+	0x3341, pci_device_8086_3341,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3341,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8086_3500 = {
+	0x3500, pci_device_8086_3500,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_3500,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2811 = {
-	0x2811, pci_device_8086_2811,
+static const pciDeviceInfo pci_dev_info_8086_3501 = {
+	0x3501, pci_device_8086_3501,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2811,
+	pci_ss_list_8086_3501,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2812 = {
-	0x2812, pci_device_8086_2812,
+static const pciDeviceInfo pci_dev_info_8086_3504 = {
+	0x3504, pci_device_8086_3504,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2812,
+	pci_ss_list_8086_3504,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2814 = {
-	0x2814, pci_device_8086_2814,
+static const pciDeviceInfo pci_dev_info_8086_3505 = {
+	0x3505, pci_device_8086_3505,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2814,
+	pci_ss_list_8086_3505,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2815 = {
-	0x2815, pci_device_8086_2815,
+static const pciDeviceInfo pci_dev_info_8086_350c = {
+	0x350c, pci_device_8086_350c,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2815,
+	pci_ss_list_8086_350c,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2820 = {
-	0x2820, pci_device_8086_2820,
+static const pciDeviceInfo pci_dev_info_8086_350d = {
+	0x350d, pci_device_8086_350d,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2820,
+	pci_ss_list_8086_350d,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2821 = {
-	0x2821, pci_device_8086_2821,
+static const pciDeviceInfo pci_dev_info_8086_3510 = {
+	0x3510, pci_device_8086_3510,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2821,
+	pci_ss_list_8086_3510,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2822 = {
-	0x2822, pci_device_8086_2822,
+static const pciDeviceInfo pci_dev_info_8086_3511 = {
+	0x3511, pci_device_8086_3511,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2822,
+	pci_ss_list_8086_3511,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2824 = {
-	0x2824, pci_device_8086_2824,
+static const pciDeviceInfo pci_dev_info_8086_3514 = {
+	0x3514, pci_device_8086_3514,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2824,
+	pci_ss_list_8086_3514,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2825 = {
-	0x2825, pci_device_8086_2825,
+static const pciDeviceInfo pci_dev_info_8086_3515 = {
+	0x3515, pci_device_8086_3515,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2825,
+	pci_ss_list_8086_3515,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2828 = {
-	0x2828, pci_device_8086_2828,
+static const pciDeviceInfo pci_dev_info_8086_3518 = {
+	0x3518, pci_device_8086_3518,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2828,
+	pci_ss_list_8086_3518,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2829 = {
-	0x2829, pci_device_8086_2829,
+static const pciDeviceInfo pci_dev_info_8086_3519 = {
+	0x3519, pci_device_8086_3519,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2829,
+	pci_ss_list_8086_3519,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_282a = {
-	0x282a, pci_device_8086_282a,
+static const pciDeviceInfo pci_dev_info_8086_3575 = {
+	0x3575, pci_device_8086_3575,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_282a,
+	pci_ss_list_8086_3575,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2830 = {
-	0x2830, pci_device_8086_2830,
+static const pciDeviceInfo pci_dev_info_8086_3576 = {
+	0x3576, pci_device_8086_3576,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2830,
+	pci_ss_list_8086_3576,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2831 = {
-	0x2831, pci_device_8086_2831,
+static const pciDeviceInfo pci_dev_info_8086_3577 = {
+	0x3577, pci_device_8086_3577,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2831,
+	pci_ss_list_8086_3577,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2832 = {
-	0x2832, pci_device_8086_2832,
+static const pciDeviceInfo pci_dev_info_8086_3578 = {
+	0x3578, pci_device_8086_3578,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2832,
+	pci_ss_list_8086_3578,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2834 = {
-	0x2834, pci_device_8086_2834,
+static const pciDeviceInfo pci_dev_info_8086_3580 = {
+	0x3580, pci_device_8086_3580,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2834,
+	pci_ss_list_8086_3580,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2835 = {
-	0x2835, pci_device_8086_2835,
+static const pciDeviceInfo pci_dev_info_8086_3581 = {
+	0x3581, pci_device_8086_3581,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2835,
+	pci_ss_list_8086_3581,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2836 = {
-	0x2836, pci_device_8086_2836,
+static const pciDeviceInfo pci_dev_info_8086_3582 = {
+	0x3582, pci_device_8086_3582,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2836,
+	pci_ss_list_8086_3582,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_283a = {
-	0x283a, pci_device_8086_283a,
+static const pciDeviceInfo pci_dev_info_8086_3584 = {
+	0x3584, pci_device_8086_3584,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_283a,
+	pci_ss_list_8086_3584,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_283e = {
-	0x283e, pci_device_8086_283e,
+static const pciDeviceInfo pci_dev_info_8086_3585 = {
+	0x3585, pci_device_8086_3585,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_283e,
+	pci_ss_list_8086_3585,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_283f = {
-	0x283f, pci_device_8086_283f,
+static const pciDeviceInfo pci_dev_info_8086_3590 = {
+	0x3590, pci_device_8086_3590,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_283f,
+	pci_ss_list_8086_3590,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2841 = {
-	0x2841, pci_device_8086_2841,
+static const pciDeviceInfo pci_dev_info_8086_3591 = {
+	0x3591, pci_device_8086_3591,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2841,
+	pci_ss_list_8086_3591,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2843 = {
-	0x2843, pci_device_8086_2843,
+static const pciDeviceInfo pci_dev_info_8086_3592 = {
+	0x3592, pci_device_8086_3592,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2843,
+	pci_ss_list_8086_3592,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2845 = {
-	0x2845, pci_device_8086_2845,
+static const pciDeviceInfo pci_dev_info_8086_3593 = {
+	0x3593, pci_device_8086_3593,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2845,
+	pci_ss_list_8086_3593,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2847 = {
-	0x2847, pci_device_8086_2847,
+static const pciDeviceInfo pci_dev_info_8086_3594 = {
+	0x3594, pci_device_8086_3594,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2847,
+	pci_ss_list_8086_3594,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2849 = {
-	0x2849, pci_device_8086_2849,
+static const pciDeviceInfo pci_dev_info_8086_3595 = {
+	0x3595, pci_device_8086_3595,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2849,
+	pci_ss_list_8086_3595,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_284b = {
-	0x284b, pci_device_8086_284b,
+static const pciDeviceInfo pci_dev_info_8086_3596 = {
+	0x3596, pci_device_8086_3596,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_284b,
+	pci_ss_list_8086_3596,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_284f = {
-	0x284f, pci_device_8086_284f,
+static const pciDeviceInfo pci_dev_info_8086_3597 = {
+	0x3597, pci_device_8086_3597,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_284f,
+	pci_ss_list_8086_3597,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2850 = {
-	0x2850, pci_device_8086_2850,
+static const pciDeviceInfo pci_dev_info_8086_3598 = {
+	0x3598, pci_device_8086_3598,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2850,
+	pci_ss_list_8086_3598,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2970 = {
-	0x2970, pci_device_8086_2970,
+static const pciDeviceInfo pci_dev_info_8086_3599 = {
+	0x3599, pci_device_8086_3599,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2970,
+	pci_ss_list_8086_3599,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2971 = {
-	0x2971, pci_device_8086_2971,
+static const pciDeviceInfo pci_dev_info_8086_359a = {
+	0x359a, pci_device_8086_359a,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2971,
+	pci_ss_list_8086_359a,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2972 = {
-	0x2972, pci_device_8086_2972,
+static const pciDeviceInfo pci_dev_info_8086_359b = {
+	0x359b, pci_device_8086_359b,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2972,
+	pci_ss_list_8086_359b,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2973 = {
-	0x2973, pci_device_8086_2973,
+static const pciDeviceInfo pci_dev_info_8086_359e = {
+	0x359e, pci_device_8086_359e,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2973,
+	pci_ss_list_8086_359e,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2974 = {
-	0x2974, pci_device_8086_2974,
+static const pciDeviceInfo pci_dev_info_8086_35b0 = {
+	0x35b0, pci_device_8086_35b0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2974,
+	pci_ss_list_8086_35b0,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2976 = {
-	0x2976, pci_device_8086_2976,
+static const pciDeviceInfo pci_dev_info_8086_35b1 = {
+	0x35b1, pci_device_8086_35b1,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2976,
+	pci_ss_list_8086_35b1,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2977 = {
-	0x2977, pci_device_8086_2977,
+static const pciDeviceInfo pci_dev_info_8086_35b5 = {
+	0x35b5, pci_device_8086_35b5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2977,
+	pci_ss_list_8086_35b5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2990 = {
-	0x2990, pci_device_8086_2990,
+static const pciDeviceInfo pci_dev_info_8086_35b6 = {
+	0x35b6, pci_device_8086_35b6,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2990,
+	pci_ss_list_8086_35b6,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2991 = {
-	0x2991, pci_device_8086_2991,
+static const pciDeviceInfo pci_dev_info_8086_35b7 = {
+	0x35b7, pci_device_8086_35b7,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2991,
+	pci_ss_list_8086_35b7,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2992 = {
-	0x2992, pci_device_8086_2992,
+static const pciDeviceInfo pci_dev_info_8086_35c8 = {
+	0x35c8, pci_device_8086_35c8,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2992,
+	pci_ss_list_8086_35c8,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2993 = {
-	0x2993, pci_device_8086_2993,
+static const pciDeviceInfo pci_dev_info_8086_3600 = {
+	0x3600, pci_device_8086_3600,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2993,
+	pci_ss_list_8086_3600,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2994 = {
-	0x2994, pci_device_8086_2994,
+static const pciDeviceInfo pci_dev_info_8086_3604 = {
+	0x3604, pci_device_8086_3604,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2994,
+	pci_ss_list_8086_3604,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2995 = {
-	0x2995, pci_device_8086_2995,
+static const pciDeviceInfo pci_dev_info_8086_3605 = {
+	0x3605, pci_device_8086_3605,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2995,
+	pci_ss_list_8086_3605,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2996 = {
-	0x2996, pci_device_8086_2996,
+static const pciDeviceInfo pci_dev_info_8086_3606 = {
+	0x3606, pci_device_8086_3606,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2996,
+	pci_ss_list_8086_3606,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_2997 = {
-	0x2997, pci_device_8086_2997,
+static const pciDeviceInfo pci_dev_info_8086_3607 = {
+	0x3607, pci_device_8086_3607,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_2997,
+	pci_ss_list_8086_3607,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_29a0 = {
-	0x29a0, pci_device_8086_29a0,
+static const pciDeviceInfo pci_dev_info_8086_3608 = {
+	0x3608, pci_device_8086_3608,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_29a0,
+	pci_ss_list_8086_3608,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_29a1 = {
-	0x29a1, pci_device_8086_29a1,
+static const pciDeviceInfo pci_dev_info_8086_3609 = {
+	0x3609, pci_device_8086_3609,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_29a1,
+	pci_ss_list_8086_3609,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_29a2 = {
-	0x29a2, pci_device_8086_29a2,
+static const pciDeviceInfo pci_dev_info_8086_360a = {
+	0x360a, pci_device_8086_360a,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_29a2,
+	pci_ss_list_8086_360a,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_29a3 = {
-	0x29a3, pci_device_8086_29a3,
+static const pciDeviceInfo pci_dev_info_8086_360b = {
+	0x360b, pci_device_8086_360b,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_29a3,
+	pci_ss_list_8086_360b,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_29a4 = {
-	0x29a4, pci_device_8086_29a4,
+static const pciDeviceInfo pci_dev_info_8086_360c = {
+	0x360c, pci_device_8086_360c,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_29a4,
+	pci_ss_list_8086_360c,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_29a5 = {
-	0x29a5, pci_device_8086_29a5,
+static const pciDeviceInfo pci_dev_info_8086_360d = {
+	0x360d, pci_device_8086_360d,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_29a5,
+	pci_ss_list_8086_360d,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_29a6 = {
-	0x29a6, pci_device_8086_29a6,
+static const pciDeviceInfo pci_dev_info_8086_360e = {
+	0x360e, pci_device_8086_360e,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_29a6,
+	pci_ss_list_8086_360e,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_29a7 = {
-	0x29a7, pci_device_8086_29a7,
+static const pciDeviceInfo pci_dev_info_8086_360f = {
+	0x360f, pci_device_8086_360f,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_29a7,
+	pci_ss_list_8086_360f,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3092 = {
-	0x3092, pci_device_8086_3092,
+static const pciDeviceInfo pci_dev_info_8086_3610 = {
+	0x3610, pci_device_8086_3610,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3092,
+	pci_ss_list_8086_3610,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3200 = {
-	0x3200, pci_device_8086_3200,
+static const pciDeviceInfo pci_dev_info_8086_4000 = {
+	0x4000, pci_device_8086_4000,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3200,
+	pci_ss_list_8086_4000,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3340 = {
-	0x3340, pci_device_8086_3340,
+static const pciDeviceInfo pci_dev_info_8086_4008 = {
+	0x4008, pci_device_8086_4008,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3340,
+	pci_ss_list_8086_4008,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3341 = {
-	0x3341, pci_device_8086_3341,
+static const pciDeviceInfo pci_dev_info_8086_4010 = {
+	0x4010, pci_device_8086_4010,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3341,
+	pci_ss_list_8086_4010,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3500 = {
-	0x3500, pci_device_8086_3500,
+static const pciDeviceInfo pci_dev_info_8086_4021 = {
+	0x4021, pci_device_8086_4021,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3500,
+	pci_ss_list_8086_4021,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3501 = {
-	0x3501, pci_device_8086_3501,
+static const pciDeviceInfo pci_dev_info_8086_4022 = {
+	0x4022, pci_device_8086_4022,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3501,
+	pci_ss_list_8086_4022,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3504 = {
-	0x3504, pci_device_8086_3504,
+static const pciDeviceInfo pci_dev_info_8086_4023 = {
+	0x4023, pci_device_8086_4023,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3504,
+	pci_ss_list_8086_4023,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3505 = {
-	0x3505, pci_device_8086_3505,
+static const pciDeviceInfo pci_dev_info_8086_4024 = {
+	0x4024, pci_device_8086_4024,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3505,
+	pci_ss_list_8086_4024,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_350c = {
-	0x350c, pci_device_8086_350c,
+static const pciDeviceInfo pci_dev_info_8086_4025 = {
+	0x4025, pci_device_8086_4025,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_350c,
+	pci_ss_list_8086_4025,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_350d = {
-	0x350d, pci_device_8086_350d,
+static const pciDeviceInfo pci_dev_info_8086_4026 = {
+	0x4026, pci_device_8086_4026,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_350d,
+	pci_ss_list_8086_4026,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3510 = {
-	0x3510, pci_device_8086_3510,
+static const pciDeviceInfo pci_dev_info_8086_4027 = {
+	0x4027, pci_device_8086_4027,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3510,
+	pci_ss_list_8086_4027,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3511 = {
-	0x3511, pci_device_8086_3511,
+static const pciDeviceInfo pci_dev_info_8086_4028 = {
+	0x4028, pci_device_8086_4028,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3511,
+	pci_ss_list_8086_4028,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3514 = {
-	0x3514, pci_device_8086_3514,
+static const pciDeviceInfo pci_dev_info_8086_4029 = {
+	0x4029, pci_device_8086_4029,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3514,
+	pci_ss_list_8086_4029,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3515 = {
-	0x3515, pci_device_8086_3515,
+static const pciDeviceInfo pci_dev_info_8086_402d = {
+	0x402d, pci_device_8086_402d,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3515,
+	pci_ss_list_8086_402d,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3518 = {
-	0x3518, pci_device_8086_3518,
+static const pciDeviceInfo pci_dev_info_8086_402e = {
+	0x402e, pci_device_8086_402e,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3518,
+	pci_ss_list_8086_402e,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3519 = {
-	0x3519, pci_device_8086_3519,
+static const pciDeviceInfo pci_dev_info_8086_402f = {
+	0x402f, pci_device_8086_402f,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3519,
+	pci_ss_list_8086_402f,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3575 = {
-	0x3575, pci_device_8086_3575,
+static const pciDeviceInfo pci_dev_info_8086_4030 = {
+	0x4030, pci_device_8086_4030,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3575,
+	pci_ss_list_8086_4030,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3576 = {
-	0x3576, pci_device_8086_3576,
+static const pciDeviceInfo pci_dev_info_8086_4032 = {
+	0x4032, pci_device_8086_4032,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3576,
+	pci_ss_list_8086_4032,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3577 = {
-	0x3577, pci_device_8086_3577,
+static const pciDeviceInfo pci_dev_info_8086_4035 = {
+	0x4035, pci_device_8086_4035,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3577,
+	pci_ss_list_8086_4035,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3578 = {
-	0x3578, pci_device_8086_3578,
+static const pciDeviceInfo pci_dev_info_8086_4036 = {
+	0x4036, pci_device_8086_4036,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3578,
+	pci_ss_list_8086_4036,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3580 = {
-	0x3580, pci_device_8086_3580,
+static const pciDeviceInfo pci_dev_info_8086_4220 = {
+	0x4220, pci_device_8086_4220,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3580,
+	pci_ss_list_8086_4220,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3581 = {
-	0x3581, pci_device_8086_3581,
+static const pciDeviceInfo pci_dev_info_8086_4222 = {
+	0x4222, pci_device_8086_4222,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3581,
+	pci_ss_list_8086_4222,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3582 = {
-	0x3582, pci_device_8086_3582,
+static const pciDeviceInfo pci_dev_info_8086_4223 = {
+	0x4223, pci_device_8086_4223,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3582,
+	pci_ss_list_8086_4223,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3584 = {
-	0x3584, pci_device_8086_3584,
+static const pciDeviceInfo pci_dev_info_8086_4224 = {
+	0x4224, pci_device_8086_4224,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3584,
+	pci_ss_list_8086_4224,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3585 = {
-	0x3585, pci_device_8086_3585,
+static const pciDeviceInfo pci_dev_info_8086_4227 = {
+	0x4227, pci_device_8086_4227,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3585,
+	pci_ss_list_8086_4227,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3590 = {
-	0x3590, pci_device_8086_3590,
+static const pciDeviceInfo pci_dev_info_8086_5001 = {
+	0x5001, pci_device_8086_5001,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3590,
+	pci_ss_list_8086_5001,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3591 = {
-	0x3591, pci_device_8086_3591,
+static const pciDeviceInfo pci_dev_info_8086_5200 = {
+	0x5200, pci_device_8086_5200,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3591,
+	pci_ss_list_8086_5200,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3592 = {
-	0x3592, pci_device_8086_3592,
+static const pciDeviceInfo pci_dev_info_8086_5201 = {
+	0x5201, pci_device_8086_5201,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3592,
+	pci_ss_list_8086_5201,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3593 = {
-	0x3593, pci_device_8086_3593,
+static const pciDeviceInfo pci_dev_info_8086_530d = {
+	0x530d, pci_device_8086_530d,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3593,
+	pci_ss_list_8086_530d,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3594 = {
-	0x3594, pci_device_8086_3594,
+static const pciDeviceInfo pci_dev_info_8086_65c0 = {
+	0x65c0, pci_device_8086_65c0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3594,
+	pci_ss_list_8086_65c0,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3595 = {
-	0x3595, pci_device_8086_3595,
+static const pciDeviceInfo pci_dev_info_8086_65e2 = {
+	0x65e2, pci_device_8086_65e2,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3595,
+	pci_ss_list_8086_65e2,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3596 = {
-	0x3596, pci_device_8086_3596,
+static const pciDeviceInfo pci_dev_info_8086_65e3 = {
+	0x65e3, pci_device_8086_65e3,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3596,
+	pci_ss_list_8086_65e3,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3597 = {
-	0x3597, pci_device_8086_3597,
+static const pciDeviceInfo pci_dev_info_8086_65e4 = {
+	0x65e4, pci_device_8086_65e4,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3597,
+	pci_ss_list_8086_65e4,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3598 = {
-	0x3598, pci_device_8086_3598,
+static const pciDeviceInfo pci_dev_info_8086_65e5 = {
+	0x65e5, pci_device_8086_65e5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3598,
+	pci_ss_list_8086_65e5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_3599 = {
-	0x3599, pci_device_8086_3599,
+static const pciDeviceInfo pci_dev_info_8086_65e6 = {
+	0x65e6, pci_device_8086_65e6,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_3599,
+	pci_ss_list_8086_65e6,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_359a = {
-	0x359a, pci_device_8086_359a,
+static const pciDeviceInfo pci_dev_info_8086_65e7 = {
+	0x65e7, pci_device_8086_65e7,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_359a,
+	pci_ss_list_8086_65e7,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_359b = {
-	0x359b, pci_device_8086_359b,
+static const pciDeviceInfo pci_dev_info_8086_65f0 = {
+	0x65f0, pci_device_8086_65f0,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_359b,
+	pci_ss_list_8086_65f0,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_359e = {
-	0x359e, pci_device_8086_359e,
+static const pciDeviceInfo pci_dev_info_8086_65f1 = {
+	0x65f1, pci_device_8086_65f1,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_359e,
+	pci_ss_list_8086_65f1,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_4220 = {
-	0x4220, pci_device_8086_4220,
+static const pciDeviceInfo pci_dev_info_8086_65f3 = {
+	0x65f3, pci_device_8086_65f3,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_4220,
+	pci_ss_list_8086_65f3,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_4222 = {
-	0x4222, pci_device_8086_4222,
+static const pciDeviceInfo pci_dev_info_8086_65f5 = {
+	0x65f5, pci_device_8086_65f5,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_4222,
+	pci_ss_list_8086_65f5,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_4223 = {
-	0x4223, pci_device_8086_4223,
+static const pciDeviceInfo pci_dev_info_8086_65f6 = {
+	0x65f6, pci_device_8086_65f6,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_4223,
+	pci_ss_list_8086_65f6,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_4224 = {
-	0x4224, pci_device_8086_4224,
+static const pciDeviceInfo pci_dev_info_8086_65f7 = {
+	0x65f7, pci_device_8086_65f7,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_4224,
+	pci_ss_list_8086_65f7,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_4227 = {
-	0x4227, pci_device_8086_4227,
+static const pciDeviceInfo pci_dev_info_8086_65f8 = {
+	0x65f8, pci_device_8086_65f8,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_4227,
+	pci_ss_list_8086_65f8,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_5200 = {
-	0x5200, pci_device_8086_5200,
+static const pciDeviceInfo pci_dev_info_8086_65f9 = {
+	0x65f9, pci_device_8086_65f9,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_5200,
+	pci_ss_list_8086_65f9,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_5201 = {
-	0x5201, pci_device_8086_5201,
+static const pciDeviceInfo pci_dev_info_8086_65fa = {
+	0x65fa, pci_device_8086_65fa,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_5201,
+	pci_ss_list_8086_65fa,
 #else
 	NULL,
 #endif
 	0
 };
-static const pciDeviceInfo pci_dev_info_8086_530d = {
-	0x530d, pci_device_8086_530d,
+static const pciDeviceInfo pci_dev_info_8086_65ff = {
+	0x65ff, pci_device_8086_65ff,
 #ifdef INIT_SUBSYS_INFO
-	pci_ss_list_8086_530d,
+	pci_ss_list_8086_65ff,
 #else
 	NULL,
 #endif
@@ -106706,6 +123040,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_8002 = {
+	0x8002, pci_device_8086_8002,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_8002,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_84c4 = {
 	0x84c4, pci_device_8086_84c4,
 #ifdef INIT_SUBSYS_INFO
@@ -106886,6 +123229,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_8086_a620 = {
+	0xa620, pci_device_8086_a620,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8086_a620,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_8086_b152 = {
 	0xb152, pci_device_8086_b152,
 #ifdef INIT_SUBSYS_INFO
@@ -106914,6 +123266,66 @@
 	0
 };
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_80ee_beef = {
+	0xbeef, pci_device_80ee_beef,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_80ee_beef,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_80ee_cafe = {
+	0xcafe, pci_device_80ee_cafe,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_80ee_cafe,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_8384_7618 = {
+	0x7618, pci_device_8384_7618,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8384_7618,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8384_7670 = {
+	0x7670, pci_device_8384_7670,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8384_7670,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_8384_7672 = {
+	0x7672, pci_device_8384_7672,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8384_7672,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_8686_1010 = {
+	0x1010, pci_device_8686_1010,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_8686_1010,
+#else
+	NULL,
+#endif
+	0
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo pci_dev_info_8800_2008 = {
 	0x2008, pci_device_8800_2008,
 #ifdef INIT_SUBSYS_INFO
@@ -107786,6 +124198,24 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_9005_0092 = {
+	0x0092, pci_device_9005_0092,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_9005_0092,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_9005_0093 = {
+	0x0093, pci_device_9005_0093,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_9005_0093,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_9005_00c0 = {
 	0x00c0, pci_device_9005_00c0,
 #ifdef INIT_SUBSYS_INFO
@@ -107894,6 +124324,78 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_9005_0410 = {
+	0x0410, pci_device_9005_0410,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_9005_0410,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_9005_0412 = {
+	0x0412, pci_device_9005_0412,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_9005_0412,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_9005_041e = {
+	0x041e, pci_device_9005_041e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_9005_041e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_9005_041f = {
+	0x041f, pci_device_9005_041f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_9005_041f,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_9005_0430 = {
+	0x0430, pci_device_9005_0430,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_9005_0430,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_9005_0432 = {
+	0x0432, pci_device_9005_0432,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_9005_0432,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_9005_043e = {
+	0x043e, pci_device_9005_043e,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_9005_043e,
+#else
+	NULL,
+#endif
+	0
+};
+static const pciDeviceInfo pci_dev_info_9005_043f = {
+	0x043f, pci_device_9005_043f,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_9005_043f,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_9005_0500 = {
 	0x0500, pci_device_9005_0500,
 #ifdef INIT_SUBSYS_INFO
@@ -108324,6 +124826,15 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo pci_dev_info_affe_02e1 = {
+	0x02e1, pci_device_affe_02e1,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_affe_02e1,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_affe_dead = {
 	0xdead, pci_device_affe_dead,
 #ifdef INIT_SUBSYS_INFO
@@ -108393,6 +124904,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_d161_0406 = {
+	0x0406, pci_device_d161_0406,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_d161_0406,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_d161_0410 = {
 	0x0410, pci_device_d161_0410,
 #ifdef INIT_SUBSYS_INFO
@@ -108402,6 +124922,15 @@
 #endif
 	0
 };
+static const pciDeviceInfo pci_dev_info_d161_0411 = {
+	0x0411, pci_device_d161_0411,
+#ifdef INIT_SUBSYS_INFO
+	pci_ss_list_d161_0411,
+#else
+	NULL,
+#endif
+	0
+};
 static const pciDeviceInfo pci_dev_info_d161_2400 = {
 	0x2400, pci_device_d161_2400,
 #ifdef INIT_SUBSYS_INFO
@@ -108883,10 +125412,35 @@
 #endif
 #define pci_dev_list_0000 NULL
 #define pci_dev_list_001a NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_001c[] = {
+	&pci_dev_info_001c_0001,
+	NULL
+};
+#endif
 #define pci_dev_list_0033 NULL
 #define pci_dev_list_003d NULL
 #define pci_dev_list_0059 NULL
-#define pci_dev_list_0070 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_0070[] = {
+	&pci_dev_info_0070_0003,
+	&pci_dev_info_0070_0009,
+	&pci_dev_info_0070_0801,
+	&pci_dev_info_0070_0807,
+	&pci_dev_info_0070_4000,
+	&pci_dev_info_0070_4001,
+	&pci_dev_info_0070_4009,
+	&pci_dev_info_0070_4800,
+	&pci_dev_info_0070_4801,
+	&pci_dev_info_0070_4803,
+	&pci_dev_info_0070_8003,
+	&pci_dev_info_0070_8801,
+	&pci_dev_info_0070_c801,
+	&pci_dev_info_0070_e807,
+	&pci_dev_info_0070_e817,
+	NULL
+};
+#endif
 #define pci_dev_list_0071 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_0095[] = {
@@ -108895,7 +125449,9 @@
 };
 #endif
 #define pci_dev_list_00a7 NULL
+#define pci_dev_list_00f5 NULL
 #define pci_dev_list_0100 NULL
+#define pci_dev_list_0123 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_018a[] = {
 	&pci_dev_info_018a_0106,
@@ -108921,12 +125477,14 @@
 	NULL
 };
 #endif
+#define pci_dev_list_0315 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_0357[] = {
 	&pci_dev_info_0357_000a,
 	NULL
 };
 #endif
+#define pci_dev_list_0403 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_0432[] = {
 	&pci_dev_info_0432_0001,
@@ -108940,6 +125498,7 @@
 	NULL
 };
 #endif
+#define pci_dev_list_0482 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_04cf[] = {
 	&pci_dev_info_04cf_8818,
@@ -108948,7 +125507,16 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_050d[] = {
+	&pci_dev_info_050d_001a,
+	&pci_dev_info_050d_0109,
 	&pci_dev_info_050d_7050,
+	&pci_dev_info_050d_705c,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_05a9[] = {
+	&pci_dev_info_05a9_8519,
 	NULL
 };
 #endif
@@ -108958,7 +125526,13 @@
 	NULL
 };
 #endif
-#define pci_dev_list_066f NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_066f[] = {
+	&pci_dev_info_066f_3410,
+	&pci_dev_info_066f_3500,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_0675[] = {
 	&pci_dev_info_0675_1700,
@@ -108970,14 +125544,39 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_067b[] = {
+	&pci_dev_info_067b_2303,
 	&pci_dev_info_067b_3507,
 	NULL
 };
 #endif
+#define pci_dev_list_069d NULL
 #define pci_dev_list_0721 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_07ca[] = {
+	&pci_dev_info_07ca_b808,
+	NULL
+};
+#endif
 #define pci_dev_list_07e2 NULL
+#define pci_dev_list_0842 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_08ff[] = {
+	&pci_dev_info_08ff_afe4,
+	NULL
+};
+#endif
 #define pci_dev_list_0925 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_093a[] = {
+	&pci_dev_info_093a_010e,
+	&pci_dev_info_093a_010f,
+	&pci_dev_info_093a_2468,
+	&pci_dev_info_093a_2603,
+	&pci_dev_info_093a_2608,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_09c1[] = {
 	&pci_dev_info_09c1_0704,
 	NULL
@@ -108985,11 +125584,42 @@
 #endif
 #define pci_dev_list_0a89 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_0ace[] = {
+	&pci_dev_info_0ace_1211,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_0b0b[] = {
+	&pci_dev_info_0b0b_0105,
+	&pci_dev_info_0b0b_0205,
+	&pci_dev_info_0b0b_0206,
+	&pci_dev_info_0b0b_0305,
+	&pci_dev_info_0b0b_0405,
+	&pci_dev_info_0b0b_0406,
+	&pci_dev_info_0b0b_0505,
+	&pci_dev_info_0b0b_0506,
+	&pci_dev_info_0b0b_0605,
+	&pci_dev_info_0b0b_0705,
+	&pci_dev_info_0b0b_0706,
+	&pci_dev_info_0b0b_0905,
+	&pci_dev_info_0b0b_0906,
+	&pci_dev_info_0b0b_0a06,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_0b49[] = {
 	&pci_dev_info_0b49_064f,
 	NULL
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_0ccd[] = {
+	&pci_dev_info_0ccd_0038,
+	NULL
+};
+#endif
 static const pciDeviceInfo *pci_dev_list_0e11[] = {
 	&pci_dev_info_0e11_0001,
 	&pci_dev_info_0e11_0002,
@@ -109087,7 +125717,9 @@
 	&pci_dev_info_0e11_f150,
 	NULL
 };
+#define pci_dev_list_0e21 NULL
 #define pci_dev_list_0e55 NULL
+#define pci_dev_list_0eac NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1000[] = {
 	&pci_dev_info_1000_0001,
@@ -109114,6 +125746,7 @@
 	&pci_dev_info_1000_0041,
 	&pci_dev_info_1000_0050,
 	&pci_dev_info_1000_0054,
+	&pci_dev_info_1000_0055,
 	&pci_dev_info_1000_0056,
 	&pci_dev_info_1000_0058,
 	&pci_dev_info_1000_005a,
@@ -109125,6 +125758,8 @@
 	&pci_dev_info_1000_0407,
 	&pci_dev_info_1000_0408,
 	&pci_dev_info_1000_0409,
+	&pci_dev_info_1000_0411,
+	&pci_dev_info_1000_0413,
 	&pci_dev_info_1000_0621,
 	&pci_dev_info_1000_0622,
 	&pci_dev_info_1000_0623,
@@ -109224,6 +125859,22 @@
 	&pci_dev_info_1002_4378,
 	&pci_dev_info_1002_4379,
 	&pci_dev_info_1002_437a,
+	&pci_dev_info_1002_437b,
+	&pci_dev_info_1002_4380,
+	&pci_dev_info_1002_4381,
+	&pci_dev_info_1002_4382,
+	&pci_dev_info_1002_4383,
+	&pci_dev_info_1002_4384,
+	&pci_dev_info_1002_4385,
+	&pci_dev_info_1002_4386,
+	&pci_dev_info_1002_4387,
+	&pci_dev_info_1002_4388,
+	&pci_dev_info_1002_4389,
+	&pci_dev_info_1002_438a,
+	&pci_dev_info_1002_438b,
+	&pci_dev_info_1002_438c,
+	&pci_dev_info_1002_438d,
+	&pci_dev_info_1002_438e,
 	&pci_dev_info_1002_4437,
 	&pci_dev_info_1002_4554,
 	&pci_dev_info_1002_4654,
@@ -109259,7 +125910,12 @@
 	&pci_dev_info_1002_4a4d,
 	&pci_dev_info_1002_4a4e,
 	&pci_dev_info_1002_4a50,
+	&pci_dev_info_1002_4a54,
+	&pci_dev_info_1002_4a69,
+	&pci_dev_info_1002_4a6a,
+	&pci_dev_info_1002_4a6b,
 	&pci_dev_info_1002_4a70,
+	&pci_dev_info_1002_4a74,
 	&pci_dev_info_1002_4b49,
 	&pci_dev_info_1002_4b4b,
 	&pci_dev_info_1002_4b4c,
@@ -109312,6 +125968,8 @@
 	&pci_dev_info_1002_4e69,
 	&pci_dev_info_1002_4e6a,
 	&pci_dev_info_1002_4e71,
+	&pci_dev_info_1002_4f72,
+	&pci_dev_info_1002_4f73,
 	&pci_dev_info_1002_5041,
 	&pci_dev_info_1002_5042,
 	&pci_dev_info_1002_5043,
@@ -109355,6 +126013,7 @@
 	&pci_dev_info_1002_5159,
 	&pci_dev_info_1002_515a,
 	&pci_dev_info_1002_515e,
+	&pci_dev_info_1002_515f,
 	&pci_dev_info_1002_5168,
 	&pci_dev_info_1002_5169,
 	&pci_dev_info_1002_516a,
@@ -109393,11 +126052,14 @@
 	&pci_dev_info_1002_5551,
 	&pci_dev_info_1002_5552,
 	&pci_dev_info_1002_5554,
+	&pci_dev_info_1002_5569,
 	&pci_dev_info_1002_556b,
 	&pci_dev_info_1002_556d,
 	&pci_dev_info_1002_556f,
+	&pci_dev_info_1002_5571,
 	&pci_dev_info_1002_564a,
 	&pci_dev_info_1002_564b,
+	&pci_dev_info_1002_564f,
 	&pci_dev_info_1002_5652,
 	&pci_dev_info_1002_5653,
 	&pci_dev_info_1002_5654,
@@ -109415,6 +126077,7 @@
 	&pci_dev_info_1002_5944,
 	&pci_dev_info_1002_5950,
 	&pci_dev_info_1002_5951,
+	&pci_dev_info_1002_5952,
 	&pci_dev_info_1002_5954,
 	&pci_dev_info_1002_5955,
 	&pci_dev_info_1002_5960,
@@ -109424,8 +126087,12 @@
 	&pci_dev_info_1002_5969,
 	&pci_dev_info_1002_5974,
 	&pci_dev_info_1002_5975,
+	&pci_dev_info_1002_5a33,
 	&pci_dev_info_1002_5a34,
+	&pci_dev_info_1002_5a36,
+	&pci_dev_info_1002_5a37,
 	&pci_dev_info_1002_5a38,
+	&pci_dev_info_1002_5a39,
 	&pci_dev_info_1002_5a3f,
 	&pci_dev_info_1002_5a41,
 	&pci_dev_info_1002_5a42,
@@ -109463,25 +126130,110 @@
 	&pci_dev_info_1002_5e4f,
 	&pci_dev_info_1002_5e6b,
 	&pci_dev_info_1002_5e6d,
+	&pci_dev_info_1002_5f57,
 	&pci_dev_info_1002_700f,
 	&pci_dev_info_1002_7010,
 	&pci_dev_info_1002_7100,
+	&pci_dev_info_1002_7102,
+	&pci_dev_info_1002_7103,
+	&pci_dev_info_1002_7104,
 	&pci_dev_info_1002_7105,
+	&pci_dev_info_1002_7106,
+	&pci_dev_info_1002_7108,
 	&pci_dev_info_1002_7109,
+	&pci_dev_info_1002_710a,
+	&pci_dev_info_1002_710b,
+	&pci_dev_info_1002_710c,
 	&pci_dev_info_1002_7120,
+	&pci_dev_info_1002_7124,
 	&pci_dev_info_1002_7129,
+	&pci_dev_info_1002_7140,
 	&pci_dev_info_1002_7142,
+	&pci_dev_info_1002_7143,
+	&pci_dev_info_1002_7145,
 	&pci_dev_info_1002_7146,
+	&pci_dev_info_1002_7147,
+	&pci_dev_info_1002_7149,
+	&pci_dev_info_1002_714a,
+	&pci_dev_info_1002_714b,
+	&pci_dev_info_1002_714c,
+	&pci_dev_info_1002_714d,
+	&pci_dev_info_1002_714e,
+	&pci_dev_info_1002_7152,
+	&pci_dev_info_1002_7153,
+	&pci_dev_info_1002_715e,
+	&pci_dev_info_1002_715f,
 	&pci_dev_info_1002_7162,
 	&pci_dev_info_1002_7166,
+	&pci_dev_info_1002_7172,
+	&pci_dev_info_1002_7173,
+	&pci_dev_info_1002_7180,
+	&pci_dev_info_1002_7181,
+	&pci_dev_info_1002_7183,
+	&pci_dev_info_1002_7187,
+	&pci_dev_info_1002_7188,
+	&pci_dev_info_1002_718a,
+	&pci_dev_info_1002_718c,
+	&pci_dev_info_1002_718d,
+	&pci_dev_info_1002_7193,
+	&pci_dev_info_1002_719b,
+	&pci_dev_info_1002_719f,
+	&pci_dev_info_1002_71a0,
+	&pci_dev_info_1002_71a1,
+	&pci_dev_info_1002_71a3,
+	&pci_dev_info_1002_71a7,
+	&pci_dev_info_1002_71bb,
 	&pci_dev_info_1002_71c0,
 	&pci_dev_info_1002_71c2,
+	&pci_dev_info_1002_71c4,
+	&pci_dev_info_1002_71c5,
+	&pci_dev_info_1002_71c6,
+	&pci_dev_info_1002_71c7,
+	&pci_dev_info_1002_71ce,
+	&pci_dev_info_1002_71d4,
+	&pci_dev_info_1002_71d5,
+	&pci_dev_info_1002_71d6,
+	&pci_dev_info_1002_71de,
 	&pci_dev_info_1002_71e0,
 	&pci_dev_info_1002_71e2,
+	&pci_dev_info_1002_71e6,
+	&pci_dev_info_1002_71e7,
+	&pci_dev_info_1002_7210,
+	&pci_dev_info_1002_7211,
+	&pci_dev_info_1002_7240,
+	&pci_dev_info_1002_7241,
+	&pci_dev_info_1002_7242,
+	&pci_dev_info_1002_7243,
+	&pci_dev_info_1002_7244,
+	&pci_dev_info_1002_7245,
+	&pci_dev_info_1002_7246,
+	&pci_dev_info_1002_7247,
+	&pci_dev_info_1002_7248,
+	&pci_dev_info_1002_7249,
+	&pci_dev_info_1002_724a,
+	&pci_dev_info_1002_724b,
+	&pci_dev_info_1002_724c,
+	&pci_dev_info_1002_724d,
+	&pci_dev_info_1002_724e,
+	&pci_dev_info_1002_7269,
+	&pci_dev_info_1002_726b,
+	&pci_dev_info_1002_726e,
+	&pci_dev_info_1002_7280,
+	&pci_dev_info_1002_7288,
+	&pci_dev_info_1002_7291,
+	&pci_dev_info_1002_7293,
+	&pci_dev_info_1002_72a0,
+	&pci_dev_info_1002_72a8,
+	&pci_dev_info_1002_72b1,
+	&pci_dev_info_1002_72b3,
 	&pci_dev_info_1002_7833,
 	&pci_dev_info_1002_7834,
 	&pci_dev_info_1002_7835,
 	&pci_dev_info_1002_7838,
+	&pci_dev_info_1002_7919,
+	&pci_dev_info_1002_791e,
+	&pci_dev_info_1002_791f,
+	&pci_dev_info_1002_793f,
 	&pci_dev_info_1002_7c37,
 	&pci_dev_info_1002_cab0,
 	&pci_dev_info_1002_cab2,
@@ -109676,6 +126428,7 @@
 	&pci_dev_info_1014_0053,
 	&pci_dev_info_1014_0054,
 	&pci_dev_info_1014_0057,
+	&pci_dev_info_1014_0058,
 	&pci_dev_info_1014_005c,
 	&pci_dev_info_1014_005e,
 	&pci_dev_info_1014_007c,
@@ -109723,6 +126476,7 @@
 	&pci_dev_info_1014_02a1,
 	&pci_dev_info_1014_02bd,
 	&pci_dev_info_1014_0302,
+	&pci_dev_info_1014_0308,
 	&pci_dev_info_1014_0314,
 	&pci_dev_info_1014_3022,
 	&pci_dev_info_1014_4022,
@@ -109743,6 +126497,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_101a[] = {
 	&pci_dev_info_101a_0005,
+	&pci_dev_info_101a_1dc1,
 	NULL
 };
 #endif
@@ -109791,6 +126546,7 @@
 	&pci_dev_info_1022_2003,
 	&pci_dev_info_1022_2020,
 	&pci_dev_info_1022_2040,
+	&pci_dev_info_1022_2080,
 	&pci_dev_info_1022_2081,
 	&pci_dev_info_1022_2082,
 	&pci_dev_info_1022_208f,
@@ -109898,6 +126654,7 @@
 };
 #define pci_dev_list_1024 NULL
 static const pciDeviceInfo *pci_dev_list_1025[] = {
+	&pci_dev_info_1025_0090,
 	&pci_dev_info_1025_1435,
 	&pci_dev_info_1025_1445,
 	&pci_dev_info_1025_1449,
@@ -109956,6 +126713,7 @@
 	&pci_dev_info_1028_0001,
 	&pci_dev_info_1028_0002,
 	&pci_dev_info_1028_0003,
+	&pci_dev_info_1028_0004,
 	&pci_dev_info_1028_0006,
 	&pci_dev_info_1028_0007,
 	&pci_dev_info_1028_0008,
@@ -109971,6 +126729,7 @@
 	&pci_dev_info_1028_0013,
 	&pci_dev_info_1028_0014,
 	&pci_dev_info_1028_0015,
+	&pci_dev_info_1028_1f03,
 	NULL
 };
 #define pci_dev_list_1029 NULL
@@ -109995,6 +126754,7 @@
 	&pci_dev_info_102b_051f,
 	&pci_dev_info_102b_0520,
 	&pci_dev_info_102b_0521,
+	&pci_dev_info_102b_0522,
 	&pci_dev_info_102b_0525,
 	&pci_dev_info_102b_0527,
 	&pci_dev_info_102b_0528,
@@ -110006,6 +126766,9 @@
 	&pci_dev_info_102b_2537,
 	&pci_dev_info_102b_2538,
 	&pci_dev_info_102b_4536,
+	&pci_dev_info_102b_4cdc,
+	&pci_dev_info_102b_4fc5,
+	&pci_dev_info_102b_5e10,
 	&pci_dev_info_102b_6573,
 	NULL
 };
@@ -110038,6 +126801,7 @@
 	&pci_dev_info_102f_0020,
 	&pci_dev_info_102f_0030,
 	&pci_dev_info_102f_0031,
+	&pci_dev_info_102f_0032,
 	&pci_dev_info_102f_0105,
 	&pci_dev_info_102f_0106,
 	&pci_dev_info_102f_0107,
@@ -110095,6 +126859,8 @@
 	&pci_dev_info_1033_00f2,
 	&pci_dev_info_1033_00f3,
 	&pci_dev_info_1033_010c,
+	&pci_dev_info_1033_0125,
+	&pci_dev_info_1033_013a,
 	NULL
 };
 #define pci_dev_list_1034 NULL
@@ -110121,6 +126887,7 @@
 	&pci_dev_info_1039_0180,
 	&pci_dev_info_1039_0181,
 	&pci_dev_info_1039_0182,
+	&pci_dev_info_1039_0186,
 	&pci_dev_info_1039_0190,
 	&pci_dev_info_1039_0191,
 	&pci_dev_info_1039_0200,
@@ -110150,6 +126917,7 @@
 	&pci_dev_info_1039_0655,
 	&pci_dev_info_1039_0660,
 	&pci_dev_info_1039_0661,
+	&pci_dev_info_1039_0662,
 	&pci_dev_info_1039_0730,
 	&pci_dev_info_1039_0733,
 	&pci_dev_info_1039_0735,
@@ -110166,6 +126934,13 @@
 	&pci_dev_info_1039_0963,
 	&pci_dev_info_1039_0964,
 	&pci_dev_info_1039_0965,
+	&pci_dev_info_1039_0966,
+	&pci_dev_info_1039_0968,
+	&pci_dev_info_1039_1180,
+	&pci_dev_info_1039_1182,
+	&pci_dev_info_1039_1183,
+	&pci_dev_info_1039_1184,
+	&pci_dev_info_1039_1185,
 	&pci_dev_info_1039_3602,
 	&pci_dev_info_1039_5107,
 	&pci_dev_info_1039_5300,
@@ -110189,6 +126964,8 @@
 	&pci_dev_info_1039_6325,
 	&pci_dev_info_1039_6326,
 	&pci_dev_info_1039_6330,
+	&pci_dev_info_1039_6350,
+	&pci_dev_info_1039_6351,
 	&pci_dev_info_1039_7001,
 	&pci_dev_info_1039_7002,
 	&pci_dev_info_1039_7007,
@@ -110197,15 +126974,15 @@
 	&pci_dev_info_1039_7016,
 	&pci_dev_info_1039_7018,
 	&pci_dev_info_1039_7019,
+	&pci_dev_info_1039_7502,
 	NULL
 };
 #define pci_dev_list_103a NULL
 #define pci_dev_list_103b NULL
 static const pciDeviceInfo *pci_dev_list_103c[] = {
+	&pci_dev_info_103c_002a,
 	&pci_dev_info_103c_1005,
-	&pci_dev_info_103c_1006,
 	&pci_dev_info_103c_1008,
-	&pci_dev_info_103c_100a,
 	&pci_dev_info_103c_1028,
 	&pci_dev_info_103c_1029,
 	&pci_dev_info_103c_102a,
@@ -110230,16 +127007,31 @@
 	&pci_dev_info_103c_1229,
 	&pci_dev_info_103c_122a,
 	&pci_dev_info_103c_122e,
+	&pci_dev_info_103c_127b,
 	&pci_dev_info_103c_127c,
 	&pci_dev_info_103c_1290,
 	&pci_dev_info_103c_1291,
 	&pci_dev_info_103c_12b4,
+	&pci_dev_info_103c_12eb,
+	&pci_dev_info_103c_12ec,
+	&pci_dev_info_103c_12ee,
+	&pci_dev_info_103c_12f8,
 	&pci_dev_info_103c_12fa,
+	&pci_dev_info_103c_1302,
+	&pci_dev_info_103c_1303,
 	&pci_dev_info_103c_2910,
 	&pci_dev_info_103c_2925,
 	&pci_dev_info_103c_3080,
+	&pci_dev_info_103c_3085,
+	&pci_dev_info_103c_30b5,
 	&pci_dev_info_103c_3220,
 	&pci_dev_info_103c_3230,
+	&pci_dev_info_103c_3238,
+	&pci_dev_info_103c_4030,
+	&pci_dev_info_103c_4031,
+	&pci_dev_info_103c_4037,
+	&pci_dev_info_103c_403b,
+	&pci_dev_info_103c_60e8,
 	NULL
 };
 #define pci_dev_list_103e NULL
@@ -110259,16 +127051,23 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1043[] = {
 	&pci_dev_info_1043_0675,
+	&pci_dev_info_1043_0c11,
 	&pci_dev_info_1043_4015,
 	&pci_dev_info_1043_4021,
 	&pci_dev_info_1043_4057,
 	&pci_dev_info_1043_8043,
+	&pci_dev_info_1043_8047,
 	&pci_dev_info_1043_807b,
+	&pci_dev_info_1043_8095,
+	&pci_dev_info_1043_80ac,
 	&pci_dev_info_1043_80bb,
 	&pci_dev_info_1043_80c5,
 	&pci_dev_info_1043_80df,
+	&pci_dev_info_1043_815a,
+	&pci_dev_info_1043_8168,
 	&pci_dev_info_1043_8187,
 	&pci_dev_info_1043_8188,
+	&pci_dev_info_1043_81f4,
 	NULL
 };
 #endif
@@ -110377,8 +127176,15 @@
 	&pci_dev_info_104c_8035,
 	&pci_dev_info_104c_8036,
 	&pci_dev_info_104c_8038,
+	&pci_dev_info_104c_8039,
+	&pci_dev_info_104c_803a,
+	&pci_dev_info_104c_803b,
+	&pci_dev_info_104c_803c,
+	&pci_dev_info_104c_803d,
 	&pci_dev_info_104c_8201,
 	&pci_dev_info_104c_8204,
+	&pci_dev_info_104c_8231,
+	&pci_dev_info_104c_8235,
 	&pci_dev_info_104c_8400,
 	&pci_dev_info_104c_8401,
 	&pci_dev_info_104c_9000,
@@ -110453,6 +127259,7 @@
 static const pciDeviceInfo *pci_dev_list_1050[] = {
 	&pci_dev_info_1050_0000,
 	&pci_dev_info_1050_0001,
+	&pci_dev_info_1050_0033,
 	&pci_dev_info_1050_0105,
 	&pci_dev_info_1050_0840,
 	&pci_dev_info_1050_0940,
@@ -110486,11 +127293,14 @@
 	&pci_dev_info_1057_0006,
 	&pci_dev_info_1057_0008,
 	&pci_dev_info_1057_0009,
+	&pci_dev_info_1057_0012,
 	&pci_dev_info_1057_0100,
 	&pci_dev_info_1057_0431,
 	&pci_dev_info_1057_1801,
 	&pci_dev_info_1057_18c0,
 	&pci_dev_info_1057_18c1,
+	&pci_dev_info_1057_3052,
+	&pci_dev_info_1057_3055,
 	&pci_dev_info_1057_3410,
 	&pci_dev_info_1057_4801,
 	&pci_dev_info_1057_4802,
@@ -110502,6 +127312,7 @@
 	&pci_dev_info_1057_5803,
 	&pci_dev_info_1057_5806,
 	&pci_dev_info_1057_5808,
+	&pci_dev_info_1057_5809,
 	&pci_dev_info_1057_6400,
 	&pci_dev_info_1057_6405,
 	NULL
@@ -110529,6 +127340,7 @@
 	&pci_dev_info_105a_3d18,
 	&pci_dev_info_105a_3d73,
 	&pci_dev_info_105a_3d75,
+	&pci_dev_info_105a_4302,
 	&pci_dev_info_105a_4d30,
 	&pci_dev_info_105a_4d33,
 	&pci_dev_info_105a_4d38,
@@ -110545,10 +127357,19 @@
 	&pci_dev_info_105a_6629,
 	&pci_dev_info_105a_7275,
 	&pci_dev_info_105a_8002,
+	&pci_dev_info_105a_8350,
+	&pci_dev_info_105a_8650,
+	&pci_dev_info_105a_c350,
+	&pci_dev_info_105a_e350,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_105b[] = {
+	&pci_dev_info_105b_0c4d,
 	NULL
 };
 #endif
-#define pci_dev_list_105b NULL
 #define pci_dev_list_105c NULL
 static const pciDeviceInfo *pci_dev_list_105d[] = {
 	&pci_dev_info_105d_2309,
@@ -110737,6 +127558,7 @@
 	&pci_dev_info_1073_0010,
 	&pci_dev_info_1073_0012,
 	&pci_dev_info_1073_0020,
+	&pci_dev_info_1073_1000,
 	&pci_dev_info_1073_2000,
 	NULL
 };
@@ -110766,10 +127588,12 @@
 	&pci_dev_info_1077_2322,
 	&pci_dev_info_1077_2422,
 	&pci_dev_info_1077_2432,
-	&pci_dev_info_1077_3010,
 	&pci_dev_info_1077_3022,
+	&pci_dev_info_1077_3032,
 	&pci_dev_info_1077_4010,
 	&pci_dev_info_1077_4022,
+	&pci_dev_info_1077_4032,
+	&pci_dev_info_1077_5432,
 	&pci_dev_info_1077_6312,
 	&pci_dev_info_1077_6322,
 	NULL
@@ -110797,6 +127621,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_107d[] = {
 	&pci_dev_info_107d_0000,
+	&pci_dev_info_107d_204d,
 	&pci_dev_info_107d_2134,
 	&pci_dev_info_107d_2971,
 	NULL
@@ -110949,6 +127774,7 @@
 static const pciDeviceInfo *pci_dev_list_1093[] = {
 	&pci_dev_info_1093_0160,
 	&pci_dev_info_1093_0162,
+	&pci_dev_info_1093_1150,
 	&pci_dev_info_1093_1170,
 	&pci_dev_info_1093_1180,
 	&pci_dev_info_1093_1190,
@@ -111162,7 +127988,9 @@
 	&pci_dev_info_10b5_906d,
 	&pci_dev_info_10b5_906e,
 	&pci_dev_info_10b5_9080,
+	&pci_dev_info_10b5_9656,
 	&pci_dev_info_10b5_bb04,
+	&pci_dev_info_10b5_c001,
 	NULL
 };
 #endif
@@ -111231,6 +128059,7 @@
 	&pci_dev_info_10b7_900a,
 	&pci_dev_info_10b7_9050,
 	&pci_dev_info_10b7_9051,
+	&pci_dev_info_10b7_9054,
 	&pci_dev_info_10b7_9055,
 	&pci_dev_info_10b7_9056,
 	&pci_dev_info_10b7_9058,
@@ -111497,9 +128326,13 @@
 	&pci_dev_info_10de_0041,
 	&pci_dev_info_10de_0042,
 	&pci_dev_info_10de_0043,
+	&pci_dev_info_10de_0044,
 	&pci_dev_info_10de_0045,
+	&pci_dev_info_10de_0046,
 	&pci_dev_info_10de_0047,
+	&pci_dev_info_10de_0048,
 	&pci_dev_info_10de_0049,
+	&pci_dev_info_10de_004d,
 	&pci_dev_info_10de_004e,
 	&pci_dev_info_10de_0050,
 	&pci_dev_info_10de_0051,
@@ -111538,13 +128371,18 @@
 	&pci_dev_info_10de_008b,
 	&pci_dev_info_10de_008c,
 	&pci_dev_info_10de_008e,
+	&pci_dev_info_10de_0090,
 	&pci_dev_info_10de_0091,
 	&pci_dev_info_10de_0092,
+	&pci_dev_info_10de_0093,
+	&pci_dev_info_10de_0098,
 	&pci_dev_info_10de_0099,
+	&pci_dev_info_10de_009d,
 	&pci_dev_info_10de_00a0,
 	&pci_dev_info_10de_00c0,
 	&pci_dev_info_10de_00c1,
 	&pci_dev_info_10de_00c2,
+	&pci_dev_info_10de_00c3,
 	&pci_dev_info_10de_00c8,
 	&pci_dev_info_10de_00c9,
 	&pci_dev_info_10de_00cc,
@@ -111579,6 +128417,9 @@
 	&pci_dev_info_10de_00f1,
 	&pci_dev_info_10de_00f2,
 	&pci_dev_info_10de_00f3,
+	&pci_dev_info_10de_00f4,
+	&pci_dev_info_10de_00f5,
+	&pci_dev_info_10de_00f6,
 	&pci_dev_info_10de_00f8,
 	&pci_dev_info_10de_00f9,
 	&pci_dev_info_10de_00fa,
@@ -111597,20 +128438,33 @@
 	&pci_dev_info_10de_0140,
 	&pci_dev_info_10de_0141,
 	&pci_dev_info_10de_0142,
+	&pci_dev_info_10de_0143,
 	&pci_dev_info_10de_0144,
 	&pci_dev_info_10de_0145,
 	&pci_dev_info_10de_0146,
+	&pci_dev_info_10de_0147,
 	&pci_dev_info_10de_0148,
+	&pci_dev_info_10de_0149,
+	&pci_dev_info_10de_014a,
+	&pci_dev_info_10de_014c,
+	&pci_dev_info_10de_014d,
 	&pci_dev_info_10de_014e,
 	&pci_dev_info_10de_014f,
 	&pci_dev_info_10de_0150,
 	&pci_dev_info_10de_0151,
 	&pci_dev_info_10de_0152,
 	&pci_dev_info_10de_0153,
+	&pci_dev_info_10de_0160,
 	&pci_dev_info_10de_0161,
+	&pci_dev_info_10de_0162,
+	&pci_dev_info_10de_0163,
 	&pci_dev_info_10de_0164,
 	&pci_dev_info_10de_0165,
+	&pci_dev_info_10de_0166,
 	&pci_dev_info_10de_0167,
+	&pci_dev_info_10de_0168,
+	&pci_dev_info_10de_0169,
+	&pci_dev_info_10de_016a,
 	&pci_dev_info_10de_0170,
 	&pci_dev_info_10de_0171,
 	&pci_dev_info_10de_0172,
@@ -111628,13 +128482,17 @@
 	&pci_dev_info_10de_0181,
 	&pci_dev_info_10de_0182,
 	&pci_dev_info_10de_0183,
+	&pci_dev_info_10de_0184,
 	&pci_dev_info_10de_0185,
 	&pci_dev_info_10de_0186,
 	&pci_dev_info_10de_0187,
 	&pci_dev_info_10de_0188,
 	&pci_dev_info_10de_018a,
 	&pci_dev_info_10de_018b,
+	&pci_dev_info_10de_018c,
 	&pci_dev_info_10de_018d,
+	&pci_dev_info_10de_0191,
+	&pci_dev_info_10de_0193,
 	&pci_dev_info_10de_01a0,
 	&pci_dev_info_10de_01a4,
 	&pci_dev_info_10de_01ab,
@@ -111650,6 +128508,16 @@
 	&pci_dev_info_10de_01c1,
 	&pci_dev_info_10de_01c2,
 	&pci_dev_info_10de_01c3,
+	&pci_dev_info_10de_01d1,
+	&pci_dev_info_10de_01d3,
+	&pci_dev_info_10de_01d6,
+	&pci_dev_info_10de_01d7,
+	&pci_dev_info_10de_01d8,
+	&pci_dev_info_10de_01da,
+	&pci_dev_info_10de_01dc,
+	&pci_dev_info_10de_01dd,
+	&pci_dev_info_10de_01de,
+	&pci_dev_info_10de_01df,
 	&pci_dev_info_10de_01e0,
 	&pci_dev_info_10de_01e8,
 	&pci_dev_info_10de_01ea,
@@ -111663,7 +128531,12 @@
 	&pci_dev_info_10de_0201,
 	&pci_dev_info_10de_0202,
 	&pci_dev_info_10de_0203,
+	&pci_dev_info_10de_0211,
+	&pci_dev_info_10de_0212,
+	&pci_dev_info_10de_0215,
+	&pci_dev_info_10de_0218,
 	&pci_dev_info_10de_0221,
+	&pci_dev_info_10de_0222,
 	&pci_dev_info_10de_0240,
 	&pci_dev_info_10de_0241,
 	&pci_dev_info_10de_0242,
@@ -111715,7 +128588,25 @@
 	&pci_dev_info_10de_0288,
 	&pci_dev_info_10de_0289,
 	&pci_dev_info_10de_028c,
+	&pci_dev_info_10de_0290,
+	&pci_dev_info_10de_0291,
+	&pci_dev_info_10de_0292,
+	&pci_dev_info_10de_0293,
+	&pci_dev_info_10de_0294,
+	&pci_dev_info_10de_0295,
+	&pci_dev_info_10de_0297,
+	&pci_dev_info_10de_0298,
+	&pci_dev_info_10de_0299,
+	&pci_dev_info_10de_029a,
+	&pci_dev_info_10de_029b,
+	&pci_dev_info_10de_029c,
+	&pci_dev_info_10de_029d,
+	&pci_dev_info_10de_029e,
+	&pci_dev_info_10de_029f,
 	&pci_dev_info_10de_02a0,
+	&pci_dev_info_10de_02e0,
+	&pci_dev_info_10de_02e1,
+	&pci_dev_info_10de_02e2,
 	&pci_dev_info_10de_02f0,
 	&pci_dev_info_10de_02f1,
 	&pci_dev_info_10de_02f2,
@@ -111794,15 +128685,119 @@
 	&pci_dev_info_10de_0368,
 	&pci_dev_info_10de_0369,
 	&pci_dev_info_10de_036a,
+	&pci_dev_info_10de_036b,
 	&pci_dev_info_10de_036c,
 	&pci_dev_info_10de_036d,
 	&pci_dev_info_10de_036e,
+	&pci_dev_info_10de_0370,
 	&pci_dev_info_10de_0371,
 	&pci_dev_info_10de_0372,
 	&pci_dev_info_10de_0373,
+	&pci_dev_info_10de_0374,
+	&pci_dev_info_10de_0375,
+	&pci_dev_info_10de_0376,
+	&pci_dev_info_10de_0377,
+	&pci_dev_info_10de_0378,
 	&pci_dev_info_10de_037a,
 	&pci_dev_info_10de_037e,
 	&pci_dev_info_10de_037f,
+	&pci_dev_info_10de_0390,
+	&pci_dev_info_10de_0391,
+	&pci_dev_info_10de_0392,
+	&pci_dev_info_10de_0393,
+	&pci_dev_info_10de_0394,
+	&pci_dev_info_10de_0395,
+	&pci_dev_info_10de_0397,
+	&pci_dev_info_10de_0398,
+	&pci_dev_info_10de_039b,
+	&pci_dev_info_10de_039c,
+	&pci_dev_info_10de_039e,
+	&pci_dev_info_10de_03a0,
+	&pci_dev_info_10de_03a1,
+	&pci_dev_info_10de_03a2,
+	&pci_dev_info_10de_03a3,
+	&pci_dev_info_10de_03a4,
+	&pci_dev_info_10de_03a5,
+	&pci_dev_info_10de_03a6,
+	&pci_dev_info_10de_03a7,
+	&pci_dev_info_10de_03a8,
+	&pci_dev_info_10de_03a9,
+	&pci_dev_info_10de_03aa,
+	&pci_dev_info_10de_03ab,
+	&pci_dev_info_10de_03ac,
+	&pci_dev_info_10de_03ad,
+	&pci_dev_info_10de_03ae,
+	&pci_dev_info_10de_03af,
+	&pci_dev_info_10de_03b0,
+	&pci_dev_info_10de_03b1,
+	&pci_dev_info_10de_03b2,
+	&pci_dev_info_10de_03b3,
+	&pci_dev_info_10de_03b4,
+	&pci_dev_info_10de_03b5,
+	&pci_dev_info_10de_03b6,
+	&pci_dev_info_10de_03b7,
+	&pci_dev_info_10de_03b8,
+	&pci_dev_info_10de_03b9,
+	&pci_dev_info_10de_03ba,
+	&pci_dev_info_10de_03bb,
+	&pci_dev_info_10de_03d0,
+	&pci_dev_info_10de_03d1,
+	&pci_dev_info_10de_03d2,
+	&pci_dev_info_10de_03d5,
+	&pci_dev_info_10de_03e0,
+	&pci_dev_info_10de_03e1,
+	&pci_dev_info_10de_03e2,
+	&pci_dev_info_10de_03e3,
+	&pci_dev_info_10de_03e4,
+	&pci_dev_info_10de_03e5,
+	&pci_dev_info_10de_03e6,
+	&pci_dev_info_10de_03e7,
+	&pci_dev_info_10de_03e8,
+	&pci_dev_info_10de_03e9,
+	&pci_dev_info_10de_03ea,
+	&pci_dev_info_10de_03eb,
+	&pci_dev_info_10de_03ec,
+	&pci_dev_info_10de_03ee,
+	&pci_dev_info_10de_03ef,
+	&pci_dev_info_10de_03f0,
+	&pci_dev_info_10de_03f1,
+	&pci_dev_info_10de_03f2,
+	&pci_dev_info_10de_03f3,
+	&pci_dev_info_10de_03f4,
+	&pci_dev_info_10de_03f5,
+	&pci_dev_info_10de_03f6,
+	&pci_dev_info_10de_03f7,
+	&pci_dev_info_10de_0440,
+	&pci_dev_info_10de_0441,
+	&pci_dev_info_10de_0442,
+	&pci_dev_info_10de_0443,
+	&pci_dev_info_10de_0444,
+	&pci_dev_info_10de_0445,
+	&pci_dev_info_10de_0446,
+	&pci_dev_info_10de_0447,
+	&pci_dev_info_10de_0448,
+	&pci_dev_info_10de_0449,
+	&pci_dev_info_10de_044a,
+	&pci_dev_info_10de_044b,
+	&pci_dev_info_10de_044c,
+	&pci_dev_info_10de_044d,
+	&pci_dev_info_10de_044e,
+	&pci_dev_info_10de_044f,
+	&pci_dev_info_10de_0450,
+	&pci_dev_info_10de_0451,
+	&pci_dev_info_10de_0452,
+	&pci_dev_info_10de_0453,
+	&pci_dev_info_10de_0454,
+	&pci_dev_info_10de_0455,
+	&pci_dev_info_10de_0456,
+	&pci_dev_info_10de_0457,
+	&pci_dev_info_10de_0458,
+	&pci_dev_info_10de_0459,
+	&pci_dev_info_10de_045a,
+	&pci_dev_info_10de_045c,
+	&pci_dev_info_10de_045d,
+	&pci_dev_info_10de_045e,
+	&pci_dev_info_10de_045f,
 	NULL
 };
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -111860,11 +128855,13 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_10e3[] = {
 	&pci_dev_info_10e3_0000,
+	&pci_dev_info_10e3_0108,
 	&pci_dev_info_10e3_0148,
 	&pci_dev_info_10e3_0860,
 	&pci_dev_info_10e3_0862,
 	&pci_dev_info_10e3_8260,
 	&pci_dev_info_10e3_8261,
+	&pci_dev_info_10e3_a108,
 	NULL
 };
 #endif
@@ -111892,10 +128889,12 @@
 	&pci_dev_info_10e8_80d7,
 	&pci_dev_info_10e8_80d9,
 	&pci_dev_info_10e8_80da,
+	&pci_dev_info_10e8_80fc,
 	&pci_dev_info_10e8_811a,
 	&pci_dev_info_10e8_814c,
 	&pci_dev_info_10e8_8170,
 	&pci_dev_info_10e8_81e6,
+	&pci_dev_info_10e8_828d,
 	&pci_dev_info_10e8_8291,
 	&pci_dev_info_10e8_82c4,
 	&pci_dev_info_10e8_82c5,
@@ -111904,6 +128903,8 @@
 	&pci_dev_info_10e8_82ca,
 	&pci_dev_info_10e8_82db,
 	&pci_dev_info_10e8_82e2,
+	&pci_dev_info_10e8_8406,
+	&pci_dev_info_10e8_8407,
 	&pci_dev_info_10e8_8851,
 	NULL
 };
@@ -111931,12 +128932,24 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_10ec[] = {
 	&pci_dev_info_10ec_0139,
+	&pci_dev_info_10ec_0260,
+	&pci_dev_info_10ec_0261,
+	&pci_dev_info_10ec_0280,
+	&pci_dev_info_10ec_0861,
+	&pci_dev_info_10ec_0862,
+	&pci_dev_info_10ec_0880,
+	&pci_dev_info_10ec_0883,
+	&pci_dev_info_10ec_0888,
 	&pci_dev_info_10ec_8029,
 	&pci_dev_info_10ec_8129,
+	&pci_dev_info_10ec_8136,
 	&pci_dev_info_10ec_8138,
 	&pci_dev_info_10ec_8139,
+	&pci_dev_info_10ec_8167,
+	&pci_dev_info_10ec_8168,
 	&pci_dev_info_10ec_8169,
 	&pci_dev_info_10ec_8180,
+	&pci_dev_info_10ec_8185,
 	&pci_dev_info_10ec_8197,
 	NULL
 };
@@ -111962,6 +128975,7 @@
 	&pci_dev_info_10ee_3fc5,
 	&pci_dev_info_10ee_3fc6,
 	&pci_dev_info_10ee_8381,
+	&pci_dev_info_10ee_d154,
 	NULL
 };
 #endif
@@ -111972,7 +128986,12 @@
 };
 #endif
 #define pci_dev_list_10f0 NULL
-#define pci_dev_list_10f1 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_10f1[] = {
+	&pci_dev_info_10f1_2865,
+	NULL
+};
+#endif
 #define pci_dev_list_10f2 NULL
 #define pci_dev_list_10f3 NULL
 #define pci_dev_list_10f4 NULL
@@ -112012,6 +129031,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1101[] = {
 	&pci_dev_info_1101_1060,
+	&pci_dev_info_1101_1622,
 	&pci_dev_info_1101_9100,
 	&pci_dev_info_1101_9400,
 	&pci_dev_info_1101_9401,
@@ -112023,6 +129043,7 @@
 static const pciDeviceInfo *pci_dev_list_1102[] = {
 	&pci_dev_info_1102_0002,
 	&pci_dev_info_1102_0004,
+	&pci_dev_info_1102_0005,
 	&pci_dev_info_1102_0006,
 	&pci_dev_info_1102_0007,
 	&pci_dev_info_1102_0008,
@@ -112067,17 +129088,26 @@
 static const pciDeviceInfo *pci_dev_list_1106[] = {
 	&pci_dev_info_1106_0102,
 	&pci_dev_info_1106_0130,
+	&pci_dev_info_1106_0198,
 	&pci_dev_info_1106_0204,
+	&pci_dev_info_1106_0208,
 	&pci_dev_info_1106_0238,
 	&pci_dev_info_1106_0258,
 	&pci_dev_info_1106_0259,
 	&pci_dev_info_1106_0269,
 	&pci_dev_info_1106_0282,
 	&pci_dev_info_1106_0290,
+	&pci_dev_info_1106_0293,
 	&pci_dev_info_1106_0296,
 	&pci_dev_info_1106_0305,
 	&pci_dev_info_1106_0308,
 	&pci_dev_info_1106_0314,
+	&pci_dev_info_1106_0324,
+	&pci_dev_info_1106_0327,
+	&pci_dev_info_1106_0336,
+	&pci_dev_info_1106_0340,
+	&pci_dev_info_1106_0351,
+	&pci_dev_info_1106_0364,
 	&pci_dev_info_1106_0391,
 	&pci_dev_info_1106_0501,
 	&pci_dev_info_1106_0505,
@@ -112109,9 +129139,16 @@
 	&pci_dev_info_1106_1269,
 	&pci_dev_info_1106_1282,
 	&pci_dev_info_1106_1290,
+	&pci_dev_info_1106_1293,
 	&pci_dev_info_1106_1296,
 	&pci_dev_info_1106_1308,
 	&pci_dev_info_1106_1314,
+	&pci_dev_info_1106_1324,
+	&pci_dev_info_1106_1327,
+	&pci_dev_info_1106_1336,
+	&pci_dev_info_1106_1340,
+	&pci_dev_info_1106_1351,
+	&pci_dev_info_1106_1364,
 	&pci_dev_info_1106_1571,
 	&pci_dev_info_1106_1595,
 	&pci_dev_info_1106_2204,
@@ -112122,9 +129159,16 @@
 	&pci_dev_info_1106_2269,
 	&pci_dev_info_1106_2282,
 	&pci_dev_info_1106_2290,
+	&pci_dev_info_1106_2293,
 	&pci_dev_info_1106_2296,
 	&pci_dev_info_1106_2308,
 	&pci_dev_info_1106_2314,
+	&pci_dev_info_1106_2324,
+	&pci_dev_info_1106_2327,
+	&pci_dev_info_1106_2336,
+	&pci_dev_info_1106_2340,
+	&pci_dev_info_1106_2351,
+	&pci_dev_info_1106_2364,
 	&pci_dev_info_1106_287a,
 	&pci_dev_info_1106_287b,
 	&pci_dev_info_1106_287c,
@@ -112166,6 +129210,7 @@
 	&pci_dev_info_1106_3148,
 	&pci_dev_info_1106_3149,
 	&pci_dev_info_1106_3156,
+	&pci_dev_info_1106_3157,
 	&pci_dev_info_1106_3164,
 	&pci_dev_info_1106_3168,
 	&pci_dev_info_1106_3177,
@@ -112178,8 +129223,12 @@
 	&pci_dev_info_1106_3213,
 	&pci_dev_info_1106_3218,
 	&pci_dev_info_1106_3227,
+	&pci_dev_info_1106_3230,
 	&pci_dev_info_1106_3238,
 	&pci_dev_info_1106_3249,
+	&pci_dev_info_1106_324a,
+	&pci_dev_info_1106_324b,
+	&pci_dev_info_1106_324e,
 	&pci_dev_info_1106_3258,
 	&pci_dev_info_1106_3259,
 	&pci_dev_info_1106_3269,
@@ -112188,9 +129237,17 @@
 	&pci_dev_info_1106_3288,
 	&pci_dev_info_1106_3290,
 	&pci_dev_info_1106_3296,
+	&pci_dev_info_1106_3324,
+	&pci_dev_info_1106_3327,
+	&pci_dev_info_1106_3336,
 	&pci_dev_info_1106_3337,
+	&pci_dev_info_1106_3340,
 	&pci_dev_info_1106_3344,
 	&pci_dev_info_1106_3349,
+	&pci_dev_info_1106_3351,
+	&pci_dev_info_1106_3364,
+	&pci_dev_info_1106_3371,
+	&pci_dev_info_1106_3372,
 	&pci_dev_info_1106_337a,
 	&pci_dev_info_1106_337b,
 	&pci_dev_info_1106_4149,
@@ -112202,15 +129259,30 @@
 	&pci_dev_info_1106_4269,
 	&pci_dev_info_1106_4282,
 	&pci_dev_info_1106_4290,
+	&pci_dev_info_1106_4293,
 	&pci_dev_info_1106_4296,
 	&pci_dev_info_1106_4308,
 	&pci_dev_info_1106_4314,
+	&pci_dev_info_1106_4324,
+	&pci_dev_info_1106_4327,
+	&pci_dev_info_1106_4336,
+	&pci_dev_info_1106_4340,
+	&pci_dev_info_1106_4351,
+	&pci_dev_info_1106_4364,
 	&pci_dev_info_1106_5030,
 	&pci_dev_info_1106_5208,
 	&pci_dev_info_1106_5238,
 	&pci_dev_info_1106_5290,
 	&pci_dev_info_1106_5308,
+	&pci_dev_info_1106_5324,
+	&pci_dev_info_1106_5327,
+	&pci_dev_info_1106_5336,
+	&pci_dev_info_1106_5340,
+	&pci_dev_info_1106_5351,
+	&pci_dev_info_1106_5364,
 	&pci_dev_info_1106_6100,
+	&pci_dev_info_1106_6327,
+	&pci_dev_info_1106_6364,
 	&pci_dev_info_1106_7204,
 	&pci_dev_info_1106_7205,
 	&pci_dev_info_1106_7208,
@@ -112220,12 +129292,20 @@
 	&pci_dev_info_1106_7269,
 	&pci_dev_info_1106_7282,
 	&pci_dev_info_1106_7290,
+	&pci_dev_info_1106_7293,
 	&pci_dev_info_1106_7296,
 	&pci_dev_info_1106_7308,
 	&pci_dev_info_1106_7314,
+	&pci_dev_info_1106_7324,
+	&pci_dev_info_1106_7327,
+	&pci_dev_info_1106_7336,
+	&pci_dev_info_1106_7340,
+	&pci_dev_info_1106_7351,
+	&pci_dev_info_1106_7364,
 	&pci_dev_info_1106_8231,
 	&pci_dev_info_1106_8235,
 	&pci_dev_info_1106_8305,
+	&pci_dev_info_1106_8324,
 	&pci_dev_info_1106_8391,
 	&pci_dev_info_1106_8501,
 	&pci_dev_info_1106_8596,
@@ -112237,6 +129317,8 @@
 	&pci_dev_info_1106_8693,
 	&pci_dev_info_1106_a208,
 	&pci_dev_info_1106_a238,
+	&pci_dev_info_1106_a327,
+	&pci_dev_info_1106_a364,
 	&pci_dev_info_1106_b091,
 	&pci_dev_info_1106_b099,
 	&pci_dev_info_1106_b101,
@@ -112249,16 +129331,23 @@
 	&pci_dev_info_1106_b188,
 	&pci_dev_info_1106_b198,
 	&pci_dev_info_1106_b213,
+	&pci_dev_info_1106_b999,
 	&pci_dev_info_1106_c208,
 	&pci_dev_info_1106_c238,
+	&pci_dev_info_1106_c327,
+	&pci_dev_info_1106_c340,
+	&pci_dev_info_1106_c364,
 	&pci_dev_info_1106_d104,
 	&pci_dev_info_1106_d208,
 	&pci_dev_info_1106_d213,
 	&pci_dev_info_1106_d238,
+	&pci_dev_info_1106_d340,
 	&pci_dev_info_1106_e208,
 	&pci_dev_info_1106_e238,
+	&pci_dev_info_1106_e340,
 	&pci_dev_info_1106_f208,
 	&pci_dev_info_1106_f238,
+	&pci_dev_info_1106_f340,
 	NULL
 };
 #endif
@@ -112494,7 +129583,12 @@
 #define pci_dev_list_1121 NULL
 #define pci_dev_list_1122 NULL
 #define pci_dev_list_1123 NULL
-#define pci_dev_list_1124 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1124[] = {
+	&pci_dev_info_1124_2581,
+	NULL
+};
+#endif
 #define pci_dev_list_1125 NULL
 #define pci_dev_list_1126 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -112584,6 +129678,7 @@
 	&pci_dev_info_1133_e01c,
 	&pci_dev_info_1133_e01e,
 	&pci_dev_info_1133_e020,
+	&pci_dev_info_1133_e022,
 	&pci_dev_info_1133_e024,
 	&pci_dev_info_1133_e028,
 	&pci_dev_info_1133_e02a,
@@ -112717,6 +129812,7 @@
 	&pci_dev_info_114f_000d,
 	&pci_dev_info_114f_0011,
 	&pci_dev_info_114f_0012,
+	&pci_dev_info_114f_0013,
 	&pci_dev_info_114f_0014,
 	&pci_dev_info_114f_0015,
 	&pci_dev_info_114f_0016,
@@ -112828,10 +129924,15 @@
 	&pci_dev_info_1166_0017,
 	&pci_dev_info_1166_0036,
 	&pci_dev_info_1166_0101,
+	&pci_dev_info_1166_0103,
 	&pci_dev_info_1166_0104,
 	&pci_dev_info_1166_0110,
 	&pci_dev_info_1166_0130,
 	&pci_dev_info_1166_0132,
+	&pci_dev_info_1166_0140,
+	&pci_dev_info_1166_0141,
+	&pci_dev_info_1166_0142,
+	&pci_dev_info_1166_0144,
 	&pci_dev_info_1166_0200,
 	&pci_dev_info_1166_0201,
 	&pci_dev_info_1166_0203,
@@ -112852,6 +129953,7 @@
 	&pci_dev_info_1166_0241,
 	&pci_dev_info_1166_0242,
 	&pci_dev_info_1166_024a,
+	&pci_dev_info_1166_024b,
 	NULL
 };
 #endif
@@ -112935,6 +130037,7 @@
 	&pci_dev_info_1180_0592,
 	&pci_dev_info_1180_0811,
 	&pci_dev_info_1180_0822,
+	&pci_dev_info_1180_0832,
 	&pci_dev_info_1180_0841,
 	&pci_dev_info_1180_0852,
 	NULL
@@ -112953,6 +130056,7 @@
 	&pci_dev_info_1186_1043,
 	&pci_dev_info_1186_1300,
 	&pci_dev_info_1186_1340,
+	&pci_dev_info_1186_1405,
 	&pci_dev_info_1186_1541,
 	&pci_dev_info_1186_1561,
 	&pci_dev_info_1186_2027,
@@ -112971,6 +130075,8 @@
 	&pci_dev_info_1186_3a63,
 	&pci_dev_info_1186_4000,
 	&pci_dev_info_1186_4300,
+	&pci_dev_info_1186_4800,
+	&pci_dev_info_1186_4b01,
 	&pci_dev_info_1186_4c00,
 	&pci_dev_info_1186_8400,
 	NULL
@@ -113095,10 +130201,12 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_11ab[] = {
 	&pci_dev_info_11ab_0146,
+	&pci_dev_info_11ab_11ab,
 	&pci_dev_info_11ab_138f,
 	&pci_dev_info_11ab_1fa6,
 	&pci_dev_info_11ab_1fa7,
 	&pci_dev_info_11ab_1faa,
+	&pci_dev_info_11ab_2a01,
 	&pci_dev_info_11ab_4320,
 	&pci_dev_info_11ab_4340,
 	&pci_dev_info_11ab_4341,
@@ -113115,6 +130223,7 @@
 	&pci_dev_info_11ab_4361,
 	&pci_dev_info_11ab_4362,
 	&pci_dev_info_11ab_4363,
+	&pci_dev_info_11ab_4364,
 	&pci_dev_info_11ab_4611,
 	&pci_dev_info_11ab_4620,
 	&pci_dev_info_11ab_4801,
@@ -113125,8 +130234,12 @@
 	&pci_dev_info_11ab_5081,
 	&pci_dev_info_11ab_6041,
 	&pci_dev_info_11ab_6081,
+	&pci_dev_info_11ab_6101,
+	&pci_dev_info_11ab_6141,
+	&pci_dev_info_11ab_6450,
 	&pci_dev_info_11ab_6460,
 	&pci_dev_info_11ab_6480,
+	&pci_dev_info_11ab_6485,
 	&pci_dev_info_11ab_f003,
 	NULL
 };
@@ -113186,6 +130299,9 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_11bd[] = {
 	&pci_dev_info_11bd_002e,
+	&pci_dev_info_11bd_0040,
+	&pci_dev_info_11bd_0041,
+	&pci_dev_info_11bd_0042,
 	&pci_dev_info_11bd_bede,
 	NULL
 };
@@ -113228,6 +130344,8 @@
 	&pci_dev_info_11c1_0480,
 	&pci_dev_info_11c1_048c,
 	&pci_dev_info_11c1_048f,
+	&pci_dev_info_11c1_1040,
+	&pci_dev_info_11c1_2600,
 	&pci_dev_info_11c1_5801,
 	&pci_dev_info_11c1_5802,
 	&pci_dev_info_11c1_5803,
@@ -113239,6 +130357,7 @@
 	&pci_dev_info_11c1_ab21,
 	&pci_dev_info_11c1_ab30,
 	&pci_dev_info_11c1_ed00,
+	&pci_dev_info_11c1_ed01,
 	NULL
 };
 #endif
@@ -113287,9 +130406,13 @@
 #define pci_dev_list_11d3 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_11d4[] = {
+	&pci_dev_info_11d4_0078,
 	&pci_dev_info_11d4_1535,
 	&pci_dev_info_11d4_1805,
 	&pci_dev_info_11d4_1889,
+	&pci_dev_info_11d4_1981,
+	&pci_dev_info_11d4_1983,
+	&pci_dev_info_11d4_1986,
 	&pci_dev_info_11d4_5340,
 	NULL
 };
@@ -113477,6 +130600,7 @@
 #define pci_dev_list_1216 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1217[] = {
+	&pci_dev_info_1217_00f7,
 	&pci_dev_info_1217_6729,
 	&pci_dev_info_1217_673a,
 	&pci_dev_info_1217_6832,
@@ -113489,7 +130613,10 @@
 	&pci_dev_info_1217_7112,
 	&pci_dev_info_1217_7113,
 	&pci_dev_info_1217_7114,
+	&pci_dev_info_1217_7120,
+	&pci_dev_info_1217_7130,
 	&pci_dev_info_1217_7134,
+	&pci_dev_info_1217_7135,
 	&pci_dev_info_1217_71e2,
 	&pci_dev_info_1217_7212,
 	&pci_dev_info_1217_7213,
@@ -113513,7 +130640,12 @@
 #define pci_dev_list_121b NULL
 #define pci_dev_list_121c NULL
 #define pci_dev_list_121d NULL
-#define pci_dev_list_121e NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_121e[] = {
+	&pci_dev_info_121e_0201,
+	NULL
+};
+#endif
 #define pci_dev_list_121f NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1220[] = {
@@ -113681,6 +130813,7 @@
 static const pciDeviceInfo *pci_dev_list_1259[] = {
 	&pci_dev_info_1259_2560,
 	&pci_dev_info_1259_a117,
+	&pci_dev_info_1259_a11e,
 	&pci_dev_info_1259_a120,
 	NULL
 };
@@ -113912,7 +131045,10 @@
 #define pci_dev_list_128f NULL
 #define pci_dev_list_1290 NULL
 #define pci_dev_list_1291 NULL
-#define pci_dev_list_1292 NULL
+static const pciDeviceInfo *pci_dev_list_1292[] = {
+	&pci_dev_info_1292_fc02,
+	NULL
+};
 #define pci_dev_list_1293 NULL
 #define pci_dev_list_1294 NULL
 #define pci_dev_list_1295 NULL
@@ -113949,8 +131085,12 @@
 #define pci_dev_list_12aa NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_12ab[] = {
+	&pci_dev_info_12ab_0000,
 	&pci_dev_info_12ab_0002,
+	&pci_dev_info_12ab_2300,
 	&pci_dev_info_12ab_3000,
+	&pci_dev_info_12ab_fff3,
+	&pci_dev_info_12ab_ffff,
 	NULL
 };
 #endif
@@ -114089,6 +131229,7 @@
 #define pci_dev_list_12d7 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_12d8[] = {
+	&pci_dev_info_12d8_01a7,
 	&pci_dev_info_12d8_8150,
 	NULL
 };
@@ -114098,6 +131239,7 @@
 	&pci_dev_info_12d9_0002,
 	&pci_dev_info_12d9_0004,
 	&pci_dev_info_12d9_0005,
+	&pci_dev_info_12d9_1078,
 	NULL
 };
 #endif
@@ -114446,6 +131588,7 @@
 	&pci_dev_info_135e_7401,
 	&pci_dev_info_135e_7402,
 	&pci_dev_info_135e_7801,
+	&pci_dev_info_135e_7804,
 	&pci_dev_info_135e_8001,
 	NULL
 };
@@ -114456,11 +131599,14 @@
 	&pci_dev_info_1360_0101,
 	&pci_dev_info_1360_0102,
 	&pci_dev_info_1360_0103,
+	&pci_dev_info_1360_0104,
 	&pci_dev_info_1360_0201,
 	&pci_dev_info_1360_0202,
 	&pci_dev_info_1360_0203,
+	&pci_dev_info_1360_0204,
 	&pci_dev_info_1360_0301,
 	&pci_dev_info_1360_0302,
+	&pci_dev_info_1360_0303,
 	NULL
 };
 #endif
@@ -114473,7 +131619,15 @@
 #define pci_dev_list_1367 NULL
 #define pci_dev_list_1368 NULL
 #define pci_dev_list_1369 NULL
-#define pci_dev_list_136a NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_136a[] = {
+	&pci_dev_info_136a_0004,
+	&pci_dev_info_136a_0007,
+	&pci_dev_info_136a_0008,
+	&pci_dev_info_136a_000a,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_136b[] = {
 	&pci_dev_info_136b_ff01,
@@ -114514,6 +131668,8 @@
 	&pci_dev_info_1374_0038,
 	&pci_dev_info_1374_0039,
 	&pci_dev_info_1374_003a,
+	&pci_dev_info_1374_003b,
+	&pci_dev_info_1374_003c,
 	NULL
 };
 #endif
@@ -114539,6 +131695,7 @@
 static const pciDeviceInfo *pci_dev_list_1382[] = {
 	&pci_dev_info_1382_0001,
 	&pci_dev_info_1382_2008,
+	&pci_dev_info_1382_2048,
 	&pci_dev_info_1382_2088,
 	&pci_dev_info_1382_20c8,
 	&pci_dev_info_1382_4008,
@@ -114555,9 +131712,11 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1385[] = {
 	&pci_dev_info_1385_0013,
+	&pci_dev_info_1385_006b,
 	&pci_dev_info_1385_311a,
 	&pci_dev_info_1385_4100,
 	&pci_dev_info_1385_4105,
+	&pci_dev_info_1385_4251,
 	&pci_dev_info_1385_4400,
 	&pci_dev_info_1385_4600,
 	&pci_dev_info_1385_4601,
@@ -114576,6 +131735,10 @@
 	&pci_dev_info_1385_630a,
 	&pci_dev_info_1385_6b00,
 	&pci_dev_info_1385_6d00,
+	&pci_dev_info_1385_7b00,
+	&pci_dev_info_1385_7c00,
+	&pci_dev_info_1385_7d00,
+	&pci_dev_info_1385_7e00,
 	&pci_dev_info_1385_f004,
 	NULL
 };
@@ -114603,6 +131766,7 @@
 	&pci_dev_info_1393_1040,
 	&pci_dev_info_1393_1141,
 	&pci_dev_info_1393_1680,
+	&pci_dev_info_1393_1681,
 	&pci_dev_info_1393_2040,
 	&pci_dev_info_1393_2180,
 	&pci_dev_info_1393_3200,
@@ -114622,6 +131786,8 @@
 	&pci_dev_info_1397_08b4,
 	&pci_dev_info_1397_16b8,
 	&pci_dev_info_1397_2bd0,
+	&pci_dev_info_1397_30b1,
+	&pci_dev_info_1397_f001,
 	NULL
 };
 #endif
@@ -114709,10 +131875,16 @@
 	&pci_dev_info_13c1_1001,
 	&pci_dev_info_13c1_1002,
 	&pci_dev_info_13c1_1003,
+	&pci_dev_info_13c1_1004,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_13c2[] = {
+	&pci_dev_info_13c2_000e,
 	NULL
 };
 #endif
-#define pci_dev_list_13c2 NULL
 #define pci_dev_list_13c3 NULL
 #define pci_dev_list_13c4 NULL
 #define pci_dev_list_13c5 NULL
@@ -114780,7 +131952,12 @@
 #define pci_dev_list_13e9 NULL
 #define pci_dev_list_13ea NULL
 #define pci_dev_list_13eb NULL
-#define pci_dev_list_13ec NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_13ec[] = {
+	&pci_dev_info_13ec_000a,
+	NULL
+};
+#endif
 #define pci_dev_list_13ed NULL
 #define pci_dev_list_13ee NULL
 #define pci_dev_list_13ef NULL
@@ -114809,6 +131986,7 @@
 	&pci_dev_info_13f6_0101,
 	&pci_dev_info_13f6_0111,
 	&pci_dev_info_13f6_0211,
+	&pci_dev_info_13f6_9880,
 	NULL
 };
 #endif
@@ -114823,6 +132001,7 @@
 static const pciDeviceInfo *pci_dev_list_13fe[] = {
 	&pci_dev_info_13fe_1240,
 	&pci_dev_info_13fe_1600,
+	&pci_dev_info_13fe_16ff,
 	&pci_dev_info_13fe_1733,
 	&pci_dev_info_13fe_1752,
 	&pci_dev_info_13fe_1754,
@@ -114896,11 +132075,14 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1415[] = {
 	&pci_dev_info_1415_8403,
+	&pci_dev_info_1415_9500,
 	&pci_dev_info_1415_9501,
 	&pci_dev_info_1415_950a,
 	&pci_dev_info_1415_950b,
 	&pci_dev_info_1415_9510,
 	&pci_dev_info_1415_9511,
+	&pci_dev_info_1415_9512,
+	&pci_dev_info_1415_9513,
 	&pci_dev_info_1415_9521,
 	&pci_dev_info_1415_9523,
 	NULL
@@ -114929,6 +132111,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1425[] = {
 	&pci_dev_info_1425_000b,
+	&pci_dev_info_1425_000c,
 	NULL
 };
 #endif
@@ -114957,7 +132140,18 @@
 };
 #endif
 #define pci_dev_list_1433 NULL
-#define pci_dev_list_1435 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1435[] = {
+	&pci_dev_info_1435_4520,
+	&pci_dev_info_1435_6020,
+	&pci_dev_info_1435_6030,
+	&pci_dev_info_1435_6420,
+	&pci_dev_info_1435_6430,
+	&pci_dev_info_1435_7520,
+	&pci_dev_info_1435_7820,
+	NULL
+};
+#endif
 #define pci_dev_list_1436 NULL
 #define pci_dev_list_1437 NULL
 #define pci_dev_list_1438 NULL
@@ -114996,7 +132190,12 @@
 #endif
 #define pci_dev_list_144b NULL
 #define pci_dev_list_144c NULL
-#define pci_dev_list_144d NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_144d[] = {
+	&pci_dev_info_144d_c00c,
+	NULL
+};
+#endif
 #define pci_dev_list_144e NULL
 #define pci_dev_list_144f NULL
 #define pci_dev_list_1450 NULL
@@ -115009,6 +132208,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1458[] = {
 	&pci_dev_info_1458_0c11,
+	&pci_dev_info_1458_9001,
 	&pci_dev_info_1458_e911,
 	NULL
 };
@@ -115028,6 +132228,9 @@
 #define pci_dev_list_1460 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1461[] = {
+	&pci_dev_info_1461_a3ce,
+	&pci_dev_info_1461_a3cf,
+	&pci_dev_info_1461_a836,
 	&pci_dev_info_1461_f436,
 	NULL
 };
@@ -115038,10 +132241,15 @@
 	&pci_dev_info_1462_6819,
 	&pci_dev_info_1462_6825,
 	&pci_dev_info_1462_6834,
+	&pci_dev_info_1462_7125,
+	&pci_dev_info_1462_7235,
 	&pci_dev_info_1462_8725,
 	&pci_dev_info_1462_9000,
 	&pci_dev_info_1462_9110,
 	&pci_dev_info_1462_9119,
+	&pci_dev_info_1462_9123,
+	&pci_dev_info_1462_9510,
+	&pci_dev_info_1462_9511,
 	&pci_dev_info_1462_9591,
 	NULL
 };
@@ -115118,6 +132326,7 @@
 static const pciDeviceInfo *pci_dev_list_1498[] = {
 	&pci_dev_info_1498_0330,
 	&pci_dev_info_1498_0385,
+	&pci_dev_info_1498_21cc,
 	&pci_dev_info_1498_21cd,
 	&pci_dev_info_1498_30c8,
 	NULL
@@ -115202,13 +132411,20 @@
 #endif
 #define pci_dev_list_14ba NULL
 #define pci_dev_list_14bb NULL
-#define pci_dev_list_14bc NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_14bc[] = {
+	&pci_dev_info_14bc_d002,
+	&pci_dev_info_14bc_d00f,
+	NULL
+};
+#endif
 #define pci_dev_list_14bd NULL
 #define pci_dev_list_14be NULL
 #define pci_dev_list_14bf NULL
 #define pci_dev_list_14c0 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_14c1[] = {
+	&pci_dev_info_14c1_0008,
 	&pci_dev_info_14c1_8043,
 	NULL
 };
@@ -115306,6 +132522,7 @@
 	&pci_dev_info_14e4_0816,
 	&pci_dev_info_14e4_1600,
 	&pci_dev_info_14e4_1601,
+	&pci_dev_info_14e4_1639,
 	&pci_dev_info_14e4_1644,
 	&pci_dev_info_14e4_1645,
 	&pci_dev_info_14e4_1646,
@@ -115317,17 +132534,29 @@
 	&pci_dev_info_14e4_1653,
 	&pci_dev_info_14e4_1654,
 	&pci_dev_info_14e4_1659,
+	&pci_dev_info_14e4_165a,
 	&pci_dev_info_14e4_165d,
 	&pci_dev_info_14e4_165e,
 	&pci_dev_info_14e4_1668,
+	&pci_dev_info_14e4_1669,
 	&pci_dev_info_14e4_166a,
 	&pci_dev_info_14e4_166b,
 	&pci_dev_info_14e4_166e,
+	&pci_dev_info_14e4_1672,
+	&pci_dev_info_14e4_1673,
+	&pci_dev_info_14e4_1674,
 	&pci_dev_info_14e4_1677,
 	&pci_dev_info_14e4_1678,
+	&pci_dev_info_14e4_1679,
+	&pci_dev_info_14e4_167a,
+	&pci_dev_info_14e4_167b,
 	&pci_dev_info_14e4_167d,
 	&pci_dev_info_14e4_167e,
+	&pci_dev_info_14e4_167f,
+	&pci_dev_info_14e4_1693,
 	&pci_dev_info_14e4_1696,
+	&pci_dev_info_14e4_169a,
+	&pci_dev_info_14e4_169b,
 	&pci_dev_info_14e4_169c,
 	&pci_dev_info_14e4_169d,
 	&pci_dev_info_14e4_16a6,
@@ -115344,6 +132573,8 @@
 	&pci_dev_info_14e4_170c,
 	&pci_dev_info_14e4_170d,
 	&pci_dev_info_14e4_170e,
+	&pci_dev_info_14e4_1712,
+	&pci_dev_info_14e4_1713,
 	&pci_dev_info_14e4_3352,
 	&pci_dev_info_14e4_3360,
 	&pci_dev_info_14e4_4210,
@@ -115354,6 +132585,7 @@
 	&pci_dev_info_14e4_4306,
 	&pci_dev_info_14e4_4307,
 	&pci_dev_info_14e4_4310,
+	&pci_dev_info_14e4_4311,
 	&pci_dev_info_14e4_4312,
 	&pci_dev_info_14e4_4313,
 	&pci_dev_info_14e4_4315,
@@ -115365,6 +132597,8 @@
 	&pci_dev_info_14e4_4324,
 	&pci_dev_info_14e4_4325,
 	&pci_dev_info_14e4_4326,
+	&pci_dev_info_14e4_4329,
+	&pci_dev_info_14e4_4344,
 	&pci_dev_info_14e4_4401,
 	&pci_dev_info_14e4_4402,
 	&pci_dev_info_14e4_4403,
@@ -115406,6 +132640,8 @@
 	&pci_dev_info_14e4_5690,
 	&pci_dev_info_14e4_5691,
 	&pci_dev_info_14e4_5692,
+	&pci_dev_info_14e4_5695,
+	&pci_dev_info_14e4_5698,
 	&pci_dev_info_14e4_5820,
 	&pci_dev_info_14e4_5821,
 	&pci_dev_info_14e4_5822,
@@ -115465,6 +132701,7 @@
 	&pci_dev_info_14f1_1065,
 	&pci_dev_info_14f1_1066,
 	&pci_dev_info_14f1_1085,
+	&pci_dev_info_14f1_10b6,
 	&pci_dev_info_14f1_1433,
 	&pci_dev_info_14f1_1434,
 	&pci_dev_info_14f1_1435,
@@ -115522,10 +132759,14 @@
 	&pci_dev_info_14f1_2464,
 	&pci_dev_info_14f1_2465,
 	&pci_dev_info_14f1_2466,
+	&pci_dev_info_14f1_2bfa,
 	&pci_dev_info_14f1_2f00,
 	&pci_dev_info_14f1_2f02,
 	&pci_dev_info_14f1_2f11,
 	&pci_dev_info_14f1_2f20,
+	&pci_dev_info_14f1_2f30,
+	&pci_dev_info_14f1_5045,
+	&pci_dev_info_14f1_5047,
 	&pci_dev_info_14f1_8234,
 	&pci_dev_info_14f1_8800,
 	&pci_dev_info_14f1_8801,
@@ -115570,6 +132811,7 @@
 static const pciDeviceInfo *pci_dev_list_14fc[] = {
 	&pci_dev_info_14fc_0000,
 	&pci_dev_info_14fc_0001,
+	&pci_dev_info_14fc_0002,
 	NULL
 };
 #endif
@@ -115666,6 +132908,7 @@
 	&pci_dev_info_1524_0520,
 	&pci_dev_info_1524_0530,
 	&pci_dev_info_1524_0550,
+	&pci_dev_info_1524_0551,
 	&pci_dev_info_1524_0610,
 	&pci_dev_info_1524_1211,
 	&pci_dev_info_1524_1225,
@@ -115728,7 +132971,12 @@
 #endif
 #define pci_dev_list_1540 NULL
 #define pci_dev_list_1541 NULL
-#define pci_dev_list_1542 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1542[] = {
+	&pci_dev_info_1542_9260,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1543[] = {
 	&pci_dev_info_1543_3052,
@@ -115917,7 +133165,15 @@
 #define pci_dev_list_15b5 NULL
 #define pci_dev_list_15b6 NULL
 #define pci_dev_list_15b7 NULL
-#define pci_dev_list_15b8 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_15b8[] = {
+	&pci_dev_info_15b8_1003,
+	&pci_dev_info_15b8_1005,
+	&pci_dev_info_15b8_100a,
+	&pci_dev_info_15b8_3001,
+	NULL
+};
+#endif
 #define pci_dev_list_15b9 NULL
 #define pci_dev_list_15ba NULL
 #define pci_dev_list_15bb NULL
@@ -115981,7 +133237,12 @@
 #define pci_dev_list_15df NULL
 #define pci_dev_list_15e0 NULL
 #define pci_dev_list_15e1 NULL
-#define pci_dev_list_15e2 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_15e2[] = {
+	&pci_dev_info_15e2_0500,
+	NULL
+};
+#endif
 #define pci_dev_list_15e3 NULL
 #define pci_dev_list_15e4 NULL
 #define pci_dev_list_15e5 NULL
@@ -116060,6 +133321,8 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1629[] = {
 	&pci_dev_info_1629_1003,
+	&pci_dev_info_1629_1006,
+	&pci_dev_info_1629_1007,
 	&pci_dev_info_1629_2002,
 	NULL
 };
@@ -116117,6 +133380,7 @@
 static const pciDeviceInfo *pci_dev_list_1677[] = {
 	&pci_dev_info_1677_104e,
 	&pci_dev_info_1677_12d7,
+	&pci_dev_info_1677_20ad,
 	NULL
 };
 #endif
@@ -116127,6 +133391,12 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_167d[] = {
+	&pci_dev_info_167d_a000,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1681[] = {
 	&pci_dev_info_1681_0010,
 	NULL
@@ -116147,8 +133417,12 @@
 	&pci_dev_info_168c_0013,
 	&pci_dev_info_168c_001a,
 	&pci_dev_info_168c_001b,
+	&pci_dev_info_168c_001c,
 	&pci_dev_info_168c_0020,
+	&pci_dev_info_168c_0023,
+	&pci_dev_info_168c_0024,
 	&pci_dev_info_168c_1014,
+	&pci_dev_info_168c_3b08,
 	NULL
 };
 #endif
@@ -116159,6 +133433,12 @@
 	NULL
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_169d[] = {
+	&pci_dev_info_169d_3306,
+	NULL
+};
+#endif
 #define pci_dev_list_16a5 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_16ab[] = {
@@ -116179,6 +133459,12 @@
 #define pci_dev_list_16b4 NULL
 #define pci_dev_list_16b8 NULL
 #define pci_dev_list_16be NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_16c6[] = {
+	&pci_dev_info_16c6_8695,
+	NULL
+};
+#endif
 #define pci_dev_list_16c8 NULL
 #define pci_dev_list_16c9 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -116189,6 +133475,12 @@
 #endif
 #define pci_dev_list_16cd NULL
 #define pci_dev_list_16ce NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_16d5[] = {
+	&pci_dev_info_16d5_4d4e,
+	NULL
+};
+#endif
 #define pci_dev_list_16df NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_16e3[] = {
@@ -116197,9 +133489,16 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_16e5[] = {
+	&pci_dev_info_16e5_6000,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_16ec[] = {
 	&pci_dev_info_16ec_00ff,
 	&pci_dev_info_16ec_0116,
+	&pci_dev_info_16ec_2f00,
 	&pci_dev_info_16ec_3685,
 	NULL
 };
@@ -116239,11 +133538,18 @@
 	NULL
 };
 #endif
-#define pci_dev_list_1734 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1734[] = {
+	&pci_dev_info_1734_1078,
+	&pci_dev_info_1734_1085,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1737[] = {
 	&pci_dev_info_1737_0013,
 	&pci_dev_info_1737_0015,
+	&pci_dev_info_1737_0029,
 	&pci_dev_info_1737_1032,
 	&pci_dev_info_1737_1064,
 	&pci_dev_info_1737_ab08,
@@ -116291,6 +133597,7 @@
 	&pci_dev_info_1799_6020,
 	&pci_dev_info_1799_6060,
 	&pci_dev_info_1799_7000,
+	&pci_dev_info_1799_700a,
 	&pci_dev_info_1799_7010,
 	NULL
 };
@@ -116329,7 +133636,13 @@
 #endif
 #define pci_dev_list_17c0 NULL
 #define pci_dev_list_17c2 NULL
-#define pci_dev_list_17cb NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_17cb[] = {
+	&pci_dev_info_17cb_0001,
+	&pci_dev_info_17cb_0002,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_17cc[] = {
 	&pci_dev_info_17cc_2280,
@@ -116357,10 +133670,43 @@
 	NULL
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_17db[] = {
+	&pci_dev_info_17db_0101,
+	&pci_dev_info_17db_0201,
+	&pci_dev_info_17db_0202,
+	NULL
+};
+#endif
 #define pci_dev_list_17de NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_17e4[] = {
+	&pci_dev_info_17e4_0001,
+	&pci_dev_info_17e4_0002,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_17e6[] = {
+	&pci_dev_info_17e6_0010,
+	&pci_dev_info_17e6_0011,
+	&pci_dev_info_17e6_0021,
+	NULL
+};
+#endif
 #define pci_dev_list_17ee NULL
 #define pci_dev_list_17f2 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_17f3[] = {
+	&pci_dev_info_17f3_6020,
+	&pci_dev_info_17f3_6030,
+	&pci_dev_info_17f3_6040,
+	&pci_dev_info_17f3_6060,
+	&pci_dev_info_17f3_6061,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_17fe[] = {
 	&pci_dev_info_17fe_2120,
 	&pci_dev_info_17fe_2220,
@@ -116368,6 +133714,7 @@
 };
 #endif
 #define pci_dev_list_17ff NULL
+#define pci_dev_list_1809 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1813[] = {
 	&pci_dev_info_1813_4000,
@@ -116381,6 +133728,7 @@
 	&pci_dev_info_1814_0200,
 	&pci_dev_info_1814_0201,
 	&pci_dev_info_1814_0301,
+	&pci_dev_info_1814_0302,
 	&pci_dev_info_1814_0401,
 	NULL
 };
@@ -116399,18 +133747,27 @@
 	NULL
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_182e[] = {
+	&pci_dev_info_182e_0008,
+	NULL
+};
+#endif
 #define pci_dev_list_1830 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_183b[] = {
 	&pci_dev_info_183b_08a7,
 	&pci_dev_info_183b_08a8,
 	&pci_dev_info_183b_08a9,
+	&pci_dev_info_183b_08b0,
 	NULL
 };
 #endif
 #define pci_dev_list_1849 NULL
+#define pci_dev_list_184a NULL
 #define pci_dev_list_1851 NULL
 #define pci_dev_list_1852 NULL
+#define pci_dev_list_1853 NULL
 #define pci_dev_list_1854 NULL
 #define pci_dev_list_185b NULL
 #define pci_dev_list_185f NULL
@@ -116430,7 +133787,14 @@
 	NULL
 };
 #endif
-#define pci_dev_list_187e NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_187e[] = {
+	&pci_dev_info_187e_3403,
+	&pci_dev_info_187e_340e,
+	NULL
+};
+#endif
+#define pci_dev_list_1885 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1888[] = {
 	&pci_dev_info_1888_0301,
@@ -116440,6 +133804,7 @@
 	NULL
 };
 #endif
+#define pci_dev_list_188a NULL
 #define pci_dev_list_1890 NULL
 #define pci_dev_list_1894 NULL
 #define pci_dev_list_1896 NULL
@@ -116447,6 +133812,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_18ac[] = {
 	&pci_dev_info_18ac_d500,
+	&pci_dev_info_18ac_d800,
 	&pci_dev_info_18ac_d810,
 	&pci_dev_info_18ac_d820,
 	NULL
@@ -116459,11 +133825,13 @@
 };
 #endif
 #define pci_dev_list_18bc NULL
+#define pci_dev_list_18c3 NULL
 #define pci_dev_list_18c8 NULL
 #define pci_dev_list_18c9 NULL
 static const pciDeviceInfo *pci_dev_list_18ca[] = {
 	&pci_dev_info_18ca_0020,
 	&pci_dev_info_18ca_0040,
+	&pci_dev_info_18ca_0047,
 	NULL
 };
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -116494,6 +133862,14 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_18f6[] = {
+	&pci_dev_info_18f6_1000,
+	&pci_dev_info_18f6_1050,
+	&pci_dev_info_18f6_2000,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_18f7[] = {
 	&pci_dev_info_18f7_0001,
 	&pci_dev_info_18f7_0002,
@@ -116505,14 +133881,28 @@
 #endif
 #define pci_dev_list_18fb NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1904[] = {
+	&pci_dev_info_1904_8139,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1923[] = {
+	&pci_dev_info_1923_0040,
 	&pci_dev_info_1923_0100,
+	&pci_dev_info_1923_0300,
+	&pci_dev_info_1923_0400,
 	NULL
 };
 #endif
 #define pci_dev_list_1924 NULL
 #define pci_dev_list_192e NULL
-#define pci_dev_list_1931 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1931[] = {
+	&pci_dev_info_1931_000c,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1942[] = {
 	&pci_dev_info_1942_e511,
@@ -116520,7 +133910,18 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_194a[] = {
+	&pci_dev_info_194a_1111,
+	&pci_dev_info_194a_1112,
+	&pci_dev_info_194a_1113,
+	&pci_dev_info_194a_1114,
+	&pci_dev_info_194a_1115,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1957[] = {
+	&pci_dev_info_1957_0012,
 	&pci_dev_info_1957_0080,
 	&pci_dev_info_1957_0081,
 	&pci_dev_info_1957_0082,
@@ -116533,6 +133934,7 @@
 };
 #endif
 #define pci_dev_list_1958 NULL
+#define pci_dev_list_1959 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1966[] = {
 	&pci_dev_info_1966_1975,
@@ -116540,16 +133942,41 @@
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1969[] = {
+	&pci_dev_info_1969_1048,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_196a[] = {
 	&pci_dev_info_196a_0101,
 	&pci_dev_info_196a_0102,
+	&pci_dev_info_196a_0105,
+	NULL
+};
+#endif
+#define pci_dev_list_196d NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1971[] = {
+	&pci_dev_info_1971_1011,
 	NULL
 };
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_197b[] = {
 	&pci_dev_info_197b_2360,
+	&pci_dev_info_197b_2361,
 	&pci_dev_info_197b_2363,
+	&pci_dev_info_197b_2365,
+	&pci_dev_info_197b_2366,
+	&pci_dev_info_197b_2368,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1982[] = {
+	&pci_dev_info_1982_1600,
+	&pci_dev_info_1982_16ff,
 	NULL
 };
 #endif
@@ -116561,8 +133988,21 @@
 };
 #endif
 #define pci_dev_list_1993 NULL
+#define pci_dev_list_199a NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_19a2[] = {
+	&pci_dev_info_19a2_0200,
+	&pci_dev_info_19a2_0201,
+	NULL
+};
+#endif
 #define pci_dev_list_19a8 NULL
-#define pci_dev_list_19ac NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_19ac[] = {
+	&pci_dev_info_19ac_0001,
+	NULL
+};
+#endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_19ae[] = {
 	&pci_dev_info_19ae_0520,
@@ -116571,16 +134011,47 @@
 #endif
 #define pci_dev_list_19d4 NULL
 #define pci_dev_list_19e2 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_19e7[] = {
+	&pci_dev_info_19e7_1001,
+	&pci_dev_info_19e7_1002,
+	&pci_dev_info_19e7_1003,
+	&pci_dev_info_19e7_1004,
+	&pci_dev_info_19e7_1005,
+	NULL
+};
+#endif
 static const pciDeviceInfo *pci_dev_list_1a03[] = {
 	&pci_dev_info_1a03_2000,
 	NULL
 };
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1a07[] = {
+	&pci_dev_info_1a07_0006,
+	&pci_dev_info_1a07_0007,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1a08[] = {
 	&pci_dev_info_1a08_0000,
 	NULL
 };
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_1a1d[] = {
+	&pci_dev_info_1a1d_1a17,
+	NULL
+};
+#endif
+#define pci_dev_list_1a29 NULL
+#define pci_dev_list_1a51 NULL
+#define pci_dev_list_1a5d NULL
+#define pci_dev_list_1a71 NULL
+#define pci_dev_list_1a73 NULL
+#define pci_dev_list_1a77 NULL
+#define pci_dev_list_1a78 NULL
+#define pci_dev_list_1a8c NULL
 #define pci_dev_list_1b13 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1c1c[] = {
@@ -116612,6 +134083,7 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_1fc1[] = {
 	&pci_dev_info_1fc1_000d,
+	&pci_dev_info_1fc1_0010,
 	NULL
 };
 #endif
@@ -116626,6 +134098,7 @@
 #define pci_dev_list_2003 NULL
 #define pci_dev_list_2004 NULL
 #define pci_dev_list_21c3 NULL
+#define pci_dev_list_22b8 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_2348[] = {
 	&pci_dev_info_2348_2010,
@@ -116730,6 +134203,7 @@
 };
 #endif
 #define pci_dev_list_4321 NULL
+#define pci_dev_list_434e NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_4444[] = {
 	&pci_dev_info_4444_0016,
@@ -116780,6 +134254,12 @@
 #endif
 #define pci_dev_list_4d54 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_4d56[] = {
+	&pci_dev_info_4d56_0000,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_4ddc[] = {
 	&pci_dev_info_4ddc_0100,
 	&pci_dev_info_4ddc_0801,
@@ -116823,6 +134303,7 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_5168[] = {
+	&pci_dev_info_5168_0300,
 	&pci_dev_info_5168_0301,
 	NULL
 };
@@ -116912,6 +134393,7 @@
 	&pci_dev_info_5333_8d02,
 	&pci_dev_info_5333_8d03,
 	&pci_dev_info_5333_8d04,
+	&pci_dev_info_5333_8e48,
 	&pci_dev_info_5333_9102,
 	&pci_dev_info_5333_ca00,
 	NULL
@@ -116928,6 +134410,7 @@
 	NULL
 };
 #endif
+#define pci_dev_list_5456 NULL
 #define pci_dev_list_5519 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_5544[] = {
@@ -116949,6 +134432,12 @@
 #endif
 #define pci_dev_list_5700 NULL
 #define pci_dev_list_5851 NULL
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_5853[] = {
+	&pci_dev_info_5853_0001,
+	NULL
+};
+#endif
 #define pci_dev_list_6356 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_6374[] = {
@@ -116970,6 +134459,7 @@
 static const pciDeviceInfo *pci_dev_list_7063[] = {
 	&pci_dev_info_7063_2000,
 	&pci_dev_info_7063_3000,
+	&pci_dev_info_7063_5500,
 	NULL
 };
 #endif
@@ -117086,12 +134576,21 @@
 	&pci_dev_info_8086_1040,
 	&pci_dev_info_8086_1043,
 	&pci_dev_info_8086_1048,
+	&pci_dev_info_8086_1049,
+	&pci_dev_info_8086_104a,
 	&pci_dev_info_8086_104b,
+	&pci_dev_info_8086_104c,
+	&pci_dev_info_8086_104d,
 	&pci_dev_info_8086_1050,
 	&pci_dev_info_8086_1051,
 	&pci_dev_info_8086_1052,
 	&pci_dev_info_8086_1053,
+	&pci_dev_info_8086_1054,
+	&pci_dev_info_8086_1055,
+	&pci_dev_info_8086_1056,
+	&pci_dev_info_8086_1057,
 	&pci_dev_info_8086_1059,
+	&pci_dev_info_8086_105b,
 	&pci_dev_info_8086_105e,
 	&pci_dev_info_8086_105f,
 	&pci_dev_info_8086_1060,
@@ -117128,20 +134627,32 @@
 	&pci_dev_info_8086_108c,
 	&pci_dev_info_8086_108e,
 	&pci_dev_info_8086_108f,
+	&pci_dev_info_8086_1091,
 	&pci_dev_info_8086_1092,
+	&pci_dev_info_8086_1093,
+	&pci_dev_info_8086_1094,
+	&pci_dev_info_8086_1095,
 	&pci_dev_info_8086_1096,
 	&pci_dev_info_8086_1097,
 	&pci_dev_info_8086_1098,
 	&pci_dev_info_8086_1099,
 	&pci_dev_info_8086_109a,
 	&pci_dev_info_8086_109b,
+	&pci_dev_info_8086_109e,
 	&pci_dev_info_8086_10a0,
 	&pci_dev_info_8086_10a1,
+	&pci_dev_info_8086_10a4,
 	&pci_dev_info_8086_10b0,
 	&pci_dev_info_8086_10b2,
 	&pci_dev_info_8086_10b3,
 	&pci_dev_info_8086_10b4,
 	&pci_dev_info_8086_10b5,
+	&pci_dev_info_8086_10b9,
+	&pci_dev_info_8086_10ba,
+	&pci_dev_info_8086_10bb,
+	&pci_dev_info_8086_10bc,
+	&pci_dev_info_8086_10c4,
+	&pci_dev_info_8086_10c5,
 	&pci_dev_info_8086_1107,
 	&pci_dev_info_8086_1130,
 	&pci_dev_info_8086_1131,
@@ -117188,6 +134699,7 @@
 	&pci_dev_info_8086_1a31,
 	&pci_dev_info_8086_1a38,
 	&pci_dev_info_8086_1a48,
+	&pci_dev_info_8086_1b48,
 	&pci_dev_info_8086_2410,
 	&pci_dev_info_8086_2411,
 	&pci_dev_info_8086_2412,
@@ -117328,7 +134840,6 @@
 	&pci_dev_info_8086_25e5,
 	&pci_dev_info_8086_25e6,
 	&pci_dev_info_8086_25e7,
-	&pci_dev_info_8086_25e8,
 	&pci_dev_info_8086_25f0,
 	&pci_dev_info_8086_25f1,
 	&pci_dev_info_8086_25f3,
@@ -117486,13 +134997,50 @@
 	&pci_dev_info_8086_284b,
 	&pci_dev_info_8086_284f,
 	&pci_dev_info_8086_2850,
+	&pci_dev_info_8086_2910,
+	&pci_dev_info_8086_2911,
+	&pci_dev_info_8086_2912,
+	&pci_dev_info_8086_2914,
+	&pci_dev_info_8086_2916,
+	&pci_dev_info_8086_2918,
+	&pci_dev_info_8086_2920,
+	&pci_dev_info_8086_2921,
+	&pci_dev_info_8086_2922,
+	&pci_dev_info_8086_2923,
+	&pci_dev_info_8086_2925,
+	&pci_dev_info_8086_2926,
+	&pci_dev_info_8086_2928,
+	&pci_dev_info_8086_292d,
+	&pci_dev_info_8086_292e,
+	&pci_dev_info_8086_2930,
+	&pci_dev_info_8086_2932,
+	&pci_dev_info_8086_2934,
+	&pci_dev_info_8086_2935,
+	&pci_dev_info_8086_2936,
+	&pci_dev_info_8086_2937,
+	&pci_dev_info_8086_2938,
+	&pci_dev_info_8086_2939,
+	&pci_dev_info_8086_293a,
+	&pci_dev_info_8086_293c,
+	&pci_dev_info_8086_293e,
+	&pci_dev_info_8086_2940,
+	&pci_dev_info_8086_2942,
+	&pci_dev_info_8086_2944,
+	&pci_dev_info_8086_2946,
+	&pci_dev_info_8086_2948,
+	&pci_dev_info_8086_294a,
+	&pci_dev_info_8086_294c,
 	&pci_dev_info_8086_2970,
 	&pci_dev_info_8086_2971,
 	&pci_dev_info_8086_2972,
 	&pci_dev_info_8086_2973,
 	&pci_dev_info_8086_2974,
+	&pci_dev_info_8086_2975,
 	&pci_dev_info_8086_2976,
 	&pci_dev_info_8086_2977,
+	&pci_dev_info_8086_2980,
+	&pci_dev_info_8086_2981,
+	&pci_dev_info_8086_2982,
 	&pci_dev_info_8086_2990,
 	&pci_dev_info_8086_2991,
 	&pci_dev_info_8086_2992,
@@ -117509,6 +135057,53 @@
 	&pci_dev_info_8086_29a5,
 	&pci_dev_info_8086_29a6,
 	&pci_dev_info_8086_29a7,
+	&pci_dev_info_8086_29b0,
+	&pci_dev_info_8086_29b1,
+	&pci_dev_info_8086_29b2,
+	&pci_dev_info_8086_29b3,
+	&pci_dev_info_8086_29b4,
+	&pci_dev_info_8086_29b5,
+	&pci_dev_info_8086_29b6,
+	&pci_dev_info_8086_29b7,
+	&pci_dev_info_8086_29c0,
+	&pci_dev_info_8086_29c1,
+	&pci_dev_info_8086_29c2,
+	&pci_dev_info_8086_29c3,
+	&pci_dev_info_8086_29c4,
+	&pci_dev_info_8086_29c5,
+	&pci_dev_info_8086_29c6,
+	&pci_dev_info_8086_29c7,
+	&pci_dev_info_8086_29cf,
+	&pci_dev_info_8086_29d0,
+	&pci_dev_info_8086_29d1,
+	&pci_dev_info_8086_29d2,
+	&pci_dev_info_8086_29d3,
+	&pci_dev_info_8086_29d4,
+	&pci_dev_info_8086_29d5,
+	&pci_dev_info_8086_29d6,
+	&pci_dev_info_8086_29d7,
+	&pci_dev_info_8086_29e0,
+	&pci_dev_info_8086_29e1,
+	&pci_dev_info_8086_29e4,
+	&pci_dev_info_8086_29e5,
+	&pci_dev_info_8086_29e6,
+	&pci_dev_info_8086_29e7,
+	&pci_dev_info_8086_29e9,
+	&pci_dev_info_8086_29f0,
+	&pci_dev_info_8086_29f1,
+	&pci_dev_info_8086_29f4,
+	&pci_dev_info_8086_29f5,
+	&pci_dev_info_8086_29f6,
+	&pci_dev_info_8086_29f7,
+	&pci_dev_info_8086_29f9,
+	&pci_dev_info_8086_2a00,
+	&pci_dev_info_8086_2a01,
+	&pci_dev_info_8086_2a02,
+	&pci_dev_info_8086_2a03,
+	&pci_dev_info_8086_2a04,
+	&pci_dev_info_8086_2a05,
+	&pci_dev_info_8086_2a06,
+	&pci_dev_info_8086_2a07,
 	&pci_dev_info_8086_3092,
 	&pci_dev_info_8086_3200,
 	&pci_dev_info_8086_3340,
@@ -117547,14 +135142,71 @@
 	&pci_dev_info_8086_359a,
 	&pci_dev_info_8086_359b,
 	&pci_dev_info_8086_359e,
+	&pci_dev_info_8086_35b0,
+	&pci_dev_info_8086_35b1,
+	&pci_dev_info_8086_35b5,
+	&pci_dev_info_8086_35b6,
+	&pci_dev_info_8086_35b7,
+	&pci_dev_info_8086_35c8,
+	&pci_dev_info_8086_3600,
+	&pci_dev_info_8086_3604,
+	&pci_dev_info_8086_3605,
+	&pci_dev_info_8086_3606,
+	&pci_dev_info_8086_3607,
+	&pci_dev_info_8086_3608,
+	&pci_dev_info_8086_3609,
+	&pci_dev_info_8086_360a,
+	&pci_dev_info_8086_360b,
+	&pci_dev_info_8086_360c,
+	&pci_dev_info_8086_360d,
+	&pci_dev_info_8086_360e,
+	&pci_dev_info_8086_360f,
+	&pci_dev_info_8086_3610,
+	&pci_dev_info_8086_4000,
+	&pci_dev_info_8086_4008,
+	&pci_dev_info_8086_4010,
+	&pci_dev_info_8086_4021,
+	&pci_dev_info_8086_4022,
+	&pci_dev_info_8086_4023,
+	&pci_dev_info_8086_4024,
+	&pci_dev_info_8086_4025,
+	&pci_dev_info_8086_4026,
+	&pci_dev_info_8086_4027,
+	&pci_dev_info_8086_4028,
+	&pci_dev_info_8086_4029,
+	&pci_dev_info_8086_402d,
+	&pci_dev_info_8086_402e,
+	&pci_dev_info_8086_402f,
+	&pci_dev_info_8086_4030,
+	&pci_dev_info_8086_4032,
+	&pci_dev_info_8086_4035,
+	&pci_dev_info_8086_4036,
 	&pci_dev_info_8086_4220,
 	&pci_dev_info_8086_4222,
 	&pci_dev_info_8086_4223,
 	&pci_dev_info_8086_4224,
 	&pci_dev_info_8086_4227,
+	&pci_dev_info_8086_5001,
 	&pci_dev_info_8086_5200,
 	&pci_dev_info_8086_5201,
 	&pci_dev_info_8086_530d,
+	&pci_dev_info_8086_65c0,
+	&pci_dev_info_8086_65e2,
+	&pci_dev_info_8086_65e3,
+	&pci_dev_info_8086_65e4,
+	&pci_dev_info_8086_65e5,
+	&pci_dev_info_8086_65e6,
+	&pci_dev_info_8086_65e7,
+	&pci_dev_info_8086_65f0,
+	&pci_dev_info_8086_65f1,
+	&pci_dev_info_8086_65f3,
+	&pci_dev_info_8086_65f5,
+	&pci_dev_info_8086_65f6,
+	&pci_dev_info_8086_65f7,
+	&pci_dev_info_8086_65f8,
+	&pci_dev_info_8086_65f9,
+	&pci_dev_info_8086_65fa,
+	&pci_dev_info_8086_65ff,
 	&pci_dev_info_8086_7000,
 	&pci_dev_info_8086_7010,
 	&pci_dev_info_8086_7020,
@@ -117595,6 +135247,7 @@
 	&pci_dev_info_8086_7602,
 	&pci_dev_info_8086_7603,
 	&pci_dev_info_8086_7800,
+	&pci_dev_info_8086_8002,
 	&pci_dev_info_8086_84c4,
 	&pci_dev_info_8086_84c5,
 	&pci_dev_info_8086_84ca,
@@ -117615,13 +135268,35 @@
 	&pci_dev_info_8086_9622,
 	&pci_dev_info_8086_9641,
 	&pci_dev_info_8086_96a1,
+	&pci_dev_info_8086_a620,
 	&pci_dev_info_8086_b152,
 	&pci_dev_info_8086_b154,
 	&pci_dev_info_8086_b555,
 	NULL
 };
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_80ee[] = {
+	&pci_dev_info_80ee_beef,
+	&pci_dev_info_80ee_cafe,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_8384[] = {
+	&pci_dev_info_8384_7618,
+	&pci_dev_info_8384_7670,
+	&pci_dev_info_8384_7672,
+	NULL
+};
+#endif
 #define pci_dev_list_8401 NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
+static const pciDeviceInfo *pci_dev_list_8686[] = {
+	&pci_dev_info_8686_1010,
+	NULL
+};
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_8800[] = {
 	&pci_dev_info_8800_2008,
 	NULL
@@ -117743,6 +135418,8 @@
 	&pci_dev_info_9005_0081,
 	&pci_dev_info_9005_0083,
 	&pci_dev_info_9005_008f,
+	&pci_dev_info_9005_0092,
+	&pci_dev_info_9005_0093,
 	&pci_dev_info_9005_00c0,
 	&pci_dev_info_9005_00c1,
 	&pci_dev_info_9005_00c3,
@@ -117755,6 +135432,14 @@
 	&pci_dev_info_9005_0284,
 	&pci_dev_info_9005_0285,
 	&pci_dev_info_9005_0286,
+	&pci_dev_info_9005_0410,
+	&pci_dev_info_9005_0412,
+	&pci_dev_info_9005_041e,
+	&pci_dev_info_9005_041f,
+	&pci_dev_info_9005_0430,
+	&pci_dev_info_9005_0432,
+	&pci_dev_info_9005_043e,
+	&pci_dev_info_9005_043f,
 	&pci_dev_info_9005_0500,
 	&pci_dev_info_9005_0503,
 	&pci_dev_info_9005_0910,
@@ -117851,10 +135536,12 @@
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_affe[] = {
+	&pci_dev_info_affe_02e1,
 	&pci_dev_info_affe_dead,
 	NULL
 };
 #endif
+#define pci_dev_list_b10b NULL
 #define pci_dev_list_b1b3 NULL
 #define pci_dev_list_bd11 NULL
 #define pci_dev_list_c001 NULL
@@ -117869,6 +135556,7 @@
 };
 #endif
 #define pci_dev_list_cccc NULL
+#define pci_dev_list_ccec NULL
 #ifdef VENDOR_INCLUDE_NONVIDEO
 static const pciDeviceInfo *pci_dev_list_cddd[] = {
 	&pci_dev_info_cddd_0101,
@@ -117881,7 +135569,9 @@
 	&pci_dev_info_d161_0205,
 	&pci_dev_info_d161_0210,
 	&pci_dev_info_d161_0405,
+	&pci_dev_info_d161_0406,
 	&pci_dev_info_d161_0410,
+	&pci_dev_info_d161_0411,
 	&pci_dev_info_d161_2400,
 	NULL
 };
@@ -118027,6 +135717,9 @@
 	{0x001a, pci_vendor_001a, pci_dev_list_001a},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x001c, pci_vendor_001c, pci_dev_list_001c},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0033, pci_vendor_0033, pci_dev_list_0033},
 #endif
 	{0x003d, pci_vendor_003d, pci_dev_list_003d},
@@ -118046,9 +135739,15 @@
 	{0x00a7, pci_vendor_00a7, pci_dev_list_00a7},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x00f5, pci_vendor_00f5, pci_dev_list_00f5},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0100, pci_vendor_0100, pci_dev_list_0100},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0123, pci_vendor_0123, pci_dev_list_0123},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x018a, pci_vendor_018a, pci_dev_list_018a},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -118064,21 +135763,33 @@
 	{0x02ac, pci_vendor_02ac, pci_dev_list_02ac},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0315, pci_vendor_0315, pci_dev_list_0315},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0357, pci_vendor_0357, pci_dev_list_0357},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0403, pci_vendor_0403, pci_dev_list_0403},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0432, pci_vendor_0432, pci_dev_list_0432},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x045e, pci_vendor_045e, pci_dev_list_045e},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0482, pci_vendor_0482, pci_dev_list_0482},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x04cf, pci_vendor_04cf, pci_dev_list_04cf},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x050d, pci_vendor_050d, pci_dev_list_050d},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x05a9, pci_vendor_05a9, pci_dev_list_05a9},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x05e3, pci_vendor_05e3, pci_dev_list_05e3},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -118091,28 +135802,58 @@
 	{0x067b, pci_vendor_067b, pci_dev_list_067b},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x069d, pci_vendor_069d, pci_dev_list_069d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0721, pci_vendor_0721, pci_dev_list_0721},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x07ca, pci_vendor_07ca, pci_dev_list_07ca},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x07e2, pci_vendor_07e2, pci_dev_list_07e2},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0842, pci_vendor_0842, pci_dev_list_0842},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x08ff, pci_vendor_08ff, pci_dev_list_08ff},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0925, pci_vendor_0925, pci_dev_list_0925},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x093a, pci_vendor_093a, pci_dev_list_093a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x09c1, pci_vendor_09c1, pci_dev_list_09c1},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0a89, pci_vendor_0a89, pci_dev_list_0a89},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0ace, pci_vendor_0ace, pci_dev_list_0ace},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0b0b, pci_vendor_0b0b, pci_dev_list_0b0b},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0b49, pci_vendor_0b49, pci_dev_list_0b49},
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0ccd, pci_vendor_0ccd, pci_dev_list_0ccd},
+#endif
 	{0x0e11, pci_vendor_0e11, pci_dev_list_0e11},
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0e21, pci_vendor_0e21, pci_dev_list_0e21},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0e55, pci_vendor_0e55, pci_dev_list_0e55},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0eac, pci_vendor_0eac, pci_dev_list_0eac},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1000, pci_vendor_1000, pci_dev_list_1000},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122603,6 +140344,9 @@
 	{0x167b, pci_vendor_167b, pci_dev_list_167b},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x167d, pci_vendor_167d, pci_dev_list_167d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1681, pci_vendor_1681, pci_dev_list_1681},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122621,6 +140365,9 @@
 	{0x169c, pci_vendor_169c, pci_dev_list_169c},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x169d, pci_vendor_169d, pci_dev_list_169d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16a5, pci_vendor_16a5, pci_dev_list_16a5},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122642,6 +140389,9 @@
 	{0x16be, pci_vendor_16be, pci_dev_list_16be},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x16c6, pci_vendor_16c6, pci_dev_list_16c6},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16c8, pci_vendor_16c8, pci_dev_list_16c8},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122657,12 +140407,18 @@
 	{0x16ce, pci_vendor_16ce, pci_dev_list_16ce},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x16d5, pci_vendor_16d5, pci_dev_list_16d5},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16df, pci_vendor_16df, pci_dev_list_16df},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16e3, pci_vendor_16e3, pci_dev_list_16e3},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x16e5, pci_vendor_16e5, pci_dev_list_16e5},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16ec, pci_vendor_16ec, pci_dev_list_16ec},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122777,21 +140533,36 @@
 	{0x17d5, pci_vendor_17d5, pci_dev_list_17d5},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x17db, pci_vendor_17db, pci_dev_list_17db},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x17de, pci_vendor_17de, pci_dev_list_17de},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x17e4, pci_vendor_17e4, pci_dev_list_17e4},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x17e6, pci_vendor_17e6, pci_dev_list_17e6},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x17ee, pci_vendor_17ee, pci_dev_list_17ee},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x17f2, pci_vendor_17f2, pci_dev_list_17f2},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x17f3, pci_vendor_17f3, pci_dev_list_17f3},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x17fe, pci_vendor_17fe, pci_dev_list_17fe},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x17ff, pci_vendor_17ff, pci_dev_list_17ff},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1809, pci_vendor_1809, pci_dev_list_1809},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1813, pci_vendor_1813, pci_dev_list_1813},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122807,6 +140578,9 @@
 	{0x182d, pci_vendor_182d, pci_dev_list_182d},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x182e, pci_vendor_182e, pci_dev_list_182e},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1830, pci_vendor_1830, pci_dev_list_1830},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122816,12 +140590,18 @@
 	{0x1849, pci_vendor_1849, pci_dev_list_1849},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x184a, pci_vendor_184a, pci_dev_list_184a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1851, pci_vendor_1851, pci_dev_list_1851},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1852, pci_vendor_1852, pci_dev_list_1852},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1853, pci_vendor_1853, pci_dev_list_1853},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1854, pci_vendor_1854, pci_dev_list_1854},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122840,9 +140620,15 @@
 	{0x187e, pci_vendor_187e, pci_dev_list_187e},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1885, pci_vendor_1885, pci_dev_list_1885},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1888, pci_vendor_1888, pci_dev_list_1888},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x188a, pci_vendor_188a, pci_dev_list_188a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1890, pci_vendor_1890, pci_dev_list_1890},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122864,6 +140650,9 @@
 	{0x18bc, pci_vendor_18bc, pci_dev_list_18bc},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x18c3, pci_vendor_18c3, pci_dev_list_18c3},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x18c8, pci_vendor_18c8, pci_dev_list_18c8},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122883,12 +140672,18 @@
 	{0x18ec, pci_vendor_18ec, pci_dev_list_18ec},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x18f6, pci_vendor_18f6, pci_dev_list_18f6},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x18f7, pci_vendor_18f7, pci_dev_list_18f7},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x18fb, pci_vendor_18fb, pci_dev_list_18fb},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1904, pci_vendor_1904, pci_dev_list_1904},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1923, pci_vendor_1923, pci_dev_list_1923},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122904,27 +140699,51 @@
 	{0x1942, pci_vendor_1942, pci_dev_list_1942},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x194a, pci_vendor_194a, pci_dev_list_194a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1957, pci_vendor_1957, pci_dev_list_1957},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1958, pci_vendor_1958, pci_dev_list_1958},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1959, pci_vendor_1959, pci_dev_list_1959},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1966, pci_vendor_1966, pci_dev_list_1966},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1969, pci_vendor_1969, pci_dev_list_1969},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x196a, pci_vendor_196a, pci_dev_list_196a},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x196d, pci_vendor_196d, pci_dev_list_196d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1971, pci_vendor_1971, pci_dev_list_1971},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x197b, pci_vendor_197b, pci_dev_list_197b},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1982, pci_vendor_1982, pci_dev_list_1982},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1989, pci_vendor_1989, pci_dev_list_1989},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1993, pci_vendor_1993, pci_dev_list_1993},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x199a, pci_vendor_199a, pci_dev_list_199a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x19a2, pci_vendor_19a2, pci_dev_list_19a2},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x19a8, pci_vendor_19a8, pci_dev_list_19a8},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122939,11 +140758,44 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x19e2, pci_vendor_19e2, pci_dev_list_19e2},
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x19e7, pci_vendor_19e7, pci_dev_list_19e7},
+#endif
 	{0x1a03, pci_vendor_1a03, pci_dev_list_1a03},
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a07, pci_vendor_1a07, pci_dev_list_1a07},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1a08, pci_vendor_1a08, pci_dev_list_1a08},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a1d, pci_vendor_1a1d, pci_dev_list_1a1d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a29, pci_vendor_1a29, pci_dev_list_1a29},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a51, pci_vendor_1a51, pci_dev_list_1a51},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a5d, pci_vendor_1a5d, pci_dev_list_1a5d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a71, pci_vendor_1a71, pci_dev_list_1a71},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a73, pci_vendor_1a73, pci_dev_list_1a73},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a77, pci_vendor_1a77, pci_dev_list_1a77},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a78, pci_vendor_1a78, pci_dev_list_1a78},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a8c, pci_vendor_1a8c, pci_dev_list_1a8c},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1b13, pci_vendor_1b13, pci_dev_list_1b13},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -122980,6 +140832,9 @@
 	{0x21c3, pci_vendor_21c3, pci_dev_list_21c3},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x22b8, pci_vendor_22b8, pci_dev_list_22b8},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x2348, pci_vendor_2348, pci_dev_list_2348},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -123036,6 +140891,9 @@
 	{0x4321, pci_vendor_4321, pci_dev_list_4321},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x434e, pci_vendor_434e, pci_dev_list_434e},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x4444, pci_vendor_4444, pci_dev_list_4444},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -123085,6 +140943,9 @@
 	{0x4d54, pci_vendor_4d54, pci_dev_list_4d54},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x4d56, pci_vendor_4d56, pci_dev_list_4d56},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x4ddc, pci_vendor_4ddc, pci_dev_list_4ddc},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -123116,6 +140977,9 @@
 	{0x5455, pci_vendor_5455, pci_dev_list_5455},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x5456, pci_vendor_5456, pci_dev_list_5456},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x5519, pci_vendor_5519, pci_dev_list_5519},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -123134,6 +140998,9 @@
 	{0x5851, pci_vendor_5851, pci_dev_list_5851},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x5853, pci_vendor_5853, pci_dev_list_5853},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x6356, pci_vendor_6356, pci_dev_list_6356},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -123165,9 +141032,18 @@
 #endif
 	{0x8086, pci_vendor_8086, pci_dev_list_8086},
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x80ee, pci_vendor_80ee, pci_dev_list_80ee},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x8384, pci_vendor_8384, pci_dev_list_8384},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x8401, pci_vendor_8401, pci_dev_list_8401},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x8686, pci_vendor_8686, pci_dev_list_8686},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x8800, pci_vendor_8800, pci_dev_list_8800},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -123249,6 +141125,9 @@
 	{0xaffe, pci_vendor_affe, pci_dev_list_affe},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0xb10b, pci_vendor_b10b, pci_dev_list_b10b},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0xb1b3, pci_vendor_b1b3, pci_dev_list_b1b3},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -123276,6 +141155,9 @@
 	{0xcccc, pci_vendor_cccc, pci_dev_list_cccc},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0xccec, pci_vendor_ccec, pci_dev_list_ccec},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0xcddd, pci_vendor_cddd, pci_dev_list_cddd},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -123366,6 +141248,9 @@
 	{0x001a, pci_vendor_001a, pci_ss_list_001a},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x001c, pci_vendor_001c, pci_ss_list_001c},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0033, pci_vendor_0033, pci_ss_list_0033},
 #endif
 	{0x003d, pci_vendor_003d, pci_ss_list_003d},
@@ -123385,9 +141270,15 @@
 	{0x00a7, pci_vendor_00a7, pci_ss_list_00a7},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x00f5, pci_vendor_00f5, pci_ss_list_00f5},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0100, pci_vendor_0100, pci_ss_list_0100},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0123, pci_vendor_0123, pci_ss_list_0123},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x018a, pci_vendor_018a, pci_ss_list_018a},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -123403,21 +141294,33 @@
 	{0x02ac, pci_vendor_02ac, pci_ss_list_02ac},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0315, pci_vendor_0315, pci_ss_list_0315},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0357, pci_vendor_0357, pci_ss_list_0357},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0403, pci_vendor_0403, pci_ss_list_0403},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0432, pci_vendor_0432, pci_ss_list_0432},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x045e, pci_vendor_045e, pci_ss_list_045e},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0482, pci_vendor_0482, pci_ss_list_0482},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x04cf, pci_vendor_04cf, pci_ss_list_04cf},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x050d, pci_vendor_050d, pci_ss_list_050d},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x05a9, pci_vendor_05a9, pci_ss_list_05a9},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x05e3, pci_vendor_05e3, pci_ss_list_05e3},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -123430,28 +141333,58 @@
 	{0x067b, pci_vendor_067b, pci_ss_list_067b},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x069d, pci_vendor_069d, pci_ss_list_069d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0721, pci_vendor_0721, pci_ss_list_0721},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x07ca, pci_vendor_07ca, pci_ss_list_07ca},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x07e2, pci_vendor_07e2, pci_ss_list_07e2},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0842, pci_vendor_0842, pci_ss_list_0842},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x08ff, pci_vendor_08ff, pci_ss_list_08ff},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0925, pci_vendor_0925, pci_ss_list_0925},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x093a, pci_vendor_093a, pci_ss_list_093a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x09c1, pci_vendor_09c1, pci_ss_list_09c1},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0a89, pci_vendor_0a89, pci_ss_list_0a89},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0ace, pci_vendor_0ace, pci_ss_list_0ace},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0b0b, pci_vendor_0b0b, pci_ss_list_0b0b},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0b49, pci_vendor_0b49, pci_ss_list_0b49},
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0ccd, pci_vendor_0ccd, pci_ss_list_0ccd},
+#endif
 	{0x0e11, pci_vendor_0e11, pci_ss_list_0e11},
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0e21, pci_vendor_0e21, pci_ss_list_0e21},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x0e55, pci_vendor_0e55, pci_ss_list_0e55},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x0eac, pci_vendor_0eac, pci_ss_list_0eac},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1000, pci_vendor_1000, pci_ss_list_1000},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -127942,6 +145875,9 @@
 	{0x167b, pci_vendor_167b, pci_ss_list_167b},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x167d, pci_vendor_167d, pci_ss_list_167d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1681, pci_vendor_1681, pci_ss_list_1681},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -127960,6 +145896,9 @@
 	{0x169c, pci_vendor_169c, pci_ss_list_169c},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x169d, pci_vendor_169d, pci_ss_list_169d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16a5, pci_vendor_16a5, pci_ss_list_16a5},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -127981,6 +145920,9 @@
 	{0x16be, pci_vendor_16be, pci_ss_list_16be},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x16c6, pci_vendor_16c6, pci_ss_list_16c6},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16c8, pci_vendor_16c8, pci_ss_list_16c8},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -127996,12 +145938,18 @@
 	{0x16ce, pci_vendor_16ce, pci_ss_list_16ce},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x16d5, pci_vendor_16d5, pci_ss_list_16d5},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16df, pci_vendor_16df, pci_ss_list_16df},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16e3, pci_vendor_16e3, pci_ss_list_16e3},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x16e5, pci_vendor_16e5, pci_ss_list_16e5},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x16ec, pci_vendor_16ec, pci_ss_list_16ec},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128116,21 +146064,36 @@
 	{0x17d5, pci_vendor_17d5, pci_ss_list_17d5},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x17db, pci_vendor_17db, pci_ss_list_17db},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x17de, pci_vendor_17de, pci_ss_list_17de},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x17e4, pci_vendor_17e4, pci_ss_list_17e4},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x17e6, pci_vendor_17e6, pci_ss_list_17e6},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x17ee, pci_vendor_17ee, pci_ss_list_17ee},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x17f2, pci_vendor_17f2, pci_ss_list_17f2},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x17f3, pci_vendor_17f3, pci_ss_list_17f3},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x17fe, pci_vendor_17fe, pci_ss_list_17fe},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x17ff, pci_vendor_17ff, pci_ss_list_17ff},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1809, pci_vendor_1809, pci_ss_list_1809},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1813, pci_vendor_1813, pci_ss_list_1813},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128146,6 +146109,9 @@
 	{0x182d, pci_vendor_182d, pci_ss_list_182d},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x182e, pci_vendor_182e, pci_ss_list_182e},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1830, pci_vendor_1830, pci_ss_list_1830},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128155,12 +146121,18 @@
 	{0x1849, pci_vendor_1849, pci_ss_list_1849},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x184a, pci_vendor_184a, pci_ss_list_184a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1851, pci_vendor_1851, pci_ss_list_1851},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1852, pci_vendor_1852, pci_ss_list_1852},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1853, pci_vendor_1853, pci_ss_list_1853},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1854, pci_vendor_1854, pci_ss_list_1854},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128179,9 +146151,15 @@
 	{0x187e, pci_vendor_187e, pci_ss_list_187e},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1885, pci_vendor_1885, pci_ss_list_1885},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1888, pci_vendor_1888, pci_ss_list_1888},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x188a, pci_vendor_188a, pci_ss_list_188a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1890, pci_vendor_1890, pci_ss_list_1890},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128203,6 +146181,9 @@
 	{0x18bc, pci_vendor_18bc, pci_ss_list_18bc},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x18c3, pci_vendor_18c3, pci_ss_list_18c3},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x18c8, pci_vendor_18c8, pci_ss_list_18c8},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128222,12 +146203,18 @@
 	{0x18ec, pci_vendor_18ec, pci_ss_list_18ec},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x18f6, pci_vendor_18f6, pci_ss_list_18f6},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x18f7, pci_vendor_18f7, pci_ss_list_18f7},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x18fb, pci_vendor_18fb, pci_ss_list_18fb},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1904, pci_vendor_1904, pci_ss_list_1904},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1923, pci_vendor_1923, pci_ss_list_1923},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128243,27 +146230,51 @@
 	{0x1942, pci_vendor_1942, pci_ss_list_1942},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x194a, pci_vendor_194a, pci_ss_list_194a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1957, pci_vendor_1957, pci_ss_list_1957},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1958, pci_vendor_1958, pci_ss_list_1958},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1959, pci_vendor_1959, pci_ss_list_1959},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1966, pci_vendor_1966, pci_ss_list_1966},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1969, pci_vendor_1969, pci_ss_list_1969},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x196a, pci_vendor_196a, pci_ss_list_196a},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x196d, pci_vendor_196d, pci_ss_list_196d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1971, pci_vendor_1971, pci_ss_list_1971},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x197b, pci_vendor_197b, pci_ss_list_197b},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1982, pci_vendor_1982, pci_ss_list_1982},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1989, pci_vendor_1989, pci_ss_list_1989},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1993, pci_vendor_1993, pci_ss_list_1993},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x199a, pci_vendor_199a, pci_ss_list_199a},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x19a2, pci_vendor_19a2, pci_ss_list_19a2},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x19a8, pci_vendor_19a8, pci_ss_list_19a8},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128278,11 +146289,44 @@
 #ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x19e2, pci_vendor_19e2, pci_ss_list_19e2},
 #endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x19e7, pci_vendor_19e7, pci_ss_list_19e7},
+#endif
 	{0x1a03, pci_vendor_1a03, pci_ss_list_1a03},
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a07, pci_vendor_1a07, pci_ss_list_1a07},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1a08, pci_vendor_1a08, pci_ss_list_1a08},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a1d, pci_vendor_1a1d, pci_ss_list_1a1d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a29, pci_vendor_1a29, pci_ss_list_1a29},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a51, pci_vendor_1a51, pci_ss_list_1a51},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a5d, pci_vendor_1a5d, pci_ss_list_1a5d},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a71, pci_vendor_1a71, pci_ss_list_1a71},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a73, pci_vendor_1a73, pci_ss_list_1a73},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a77, pci_vendor_1a77, pci_ss_list_1a77},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a78, pci_vendor_1a78, pci_ss_list_1a78},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x1a8c, pci_vendor_1a8c, pci_ss_list_1a8c},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x1b13, pci_vendor_1b13, pci_ss_list_1b13},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128319,6 +146363,9 @@
 	{0x21c3, pci_vendor_21c3, pci_ss_list_21c3},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x22b8, pci_vendor_22b8, pci_ss_list_22b8},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x2348, pci_vendor_2348, pci_ss_list_2348},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128375,6 +146422,9 @@
 	{0x4321, pci_vendor_4321, pci_ss_list_4321},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x434e, pci_vendor_434e, pci_ss_list_434e},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x4444, pci_vendor_4444, pci_ss_list_4444},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128424,6 +146474,9 @@
 	{0x4d54, pci_vendor_4d54, pci_ss_list_4d54},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x4d56, pci_vendor_4d56, pci_ss_list_4d56},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x4ddc, pci_vendor_4ddc, pci_ss_list_4ddc},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128455,6 +146508,9 @@
 	{0x5455, pci_vendor_5455, pci_ss_list_5455},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x5456, pci_vendor_5456, pci_ss_list_5456},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x5519, pci_vendor_5519, pci_ss_list_5519},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128473,6 +146529,9 @@
 	{0x5851, pci_vendor_5851, pci_ss_list_5851},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x5853, pci_vendor_5853, pci_ss_list_5853},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x6356, pci_vendor_6356, pci_ss_list_6356},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128504,9 +146563,18 @@
 #endif
 	{0x8086, pci_vendor_8086, pci_ss_list_8086},
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x80ee, pci_vendor_80ee, pci_ss_list_80ee},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x8384, pci_vendor_8384, pci_ss_list_8384},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x8401, pci_vendor_8401, pci_ss_list_8401},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0x8686, pci_vendor_8686, pci_ss_list_8686},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0x8800, pci_vendor_8800, pci_ss_list_8800},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128588,6 +146656,9 @@
 	{0xaffe, pci_vendor_affe, pci_ss_list_affe},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0xb10b, pci_vendor_b10b, pci_ss_list_b10b},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0xb1b3, pci_vendor_b1b3, pci_ss_list_b1b3},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
@@ -128615,6 +146686,9 @@
 	{0xcccc, pci_vendor_cccc, pci_ss_list_cccc},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO
+	{0xccec, pci_vendor_ccec, pci_ss_list_ccec},
+#endif
+#ifdef VENDOR_INCLUDE_NONVIDEO
 	{0xcddd, pci_vendor_cddd, pci_ss_list_cddd},
 #endif
 #ifdef VENDOR_INCLUDE_NONVIDEO