diff -u --new-file --recursive v2.2.20/COPYING linux/COPYING --- v2.2.20/COPYING Mon May 20 16:10:12 2002 +++ linux/COPYING Mon May 20 16:32:34 2002 @@ -303,7 +303,7 @@ the "copyright" line and a pointer to where the full notice is found. - Copyright (C) 19yy + Copyright (C) This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -325,7 +325,7 @@ If the program is interactive, make it output a short notice like this when it starts in an interactive mode: - Gnomovision version 69, Copyright (C) 19yy name of author + Gnomovision version 69, Copyright (C) year name of author Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. This is free software, and you are welcome to redistribute it under certain conditions; type `show c' for details. diff -u --new-file --recursive v2.2.20/Documentation/Configure.help linux/Documentation/Configure.help --- v2.2.20/Documentation/Configure.help Mon May 20 16:11:52 2002 +++ linux/Documentation/Configure.help Mon May 20 16:32:34 2002 @@ -5927,6 +5927,21 @@ of the Cisco HDLC/PPP driver (syncppp.c). The SyncLink WAN driver (in character devices) must also be enabled. +FarSync T-Series support +CONFIG_FARSYNC + This driver supports the FarSync T-Series X.21 (and V.35/V.24) cards + from FarSite Communications Ltd. + Synchronous communication is supported on all ports at speeds up to + 8Mb/s (128K on V.24) using synchronous PPP or Cisco HDLC. + + If you want to compile this driver as a module ( = code which can be + inserted in and removed from the running kernel whenever you want) + say M here and read Documentation/modules.txt. + The module will be called farsync.o and if you want the module to be + automatically loaded when the interface is reference then you should + add "alias syncX farsync" to /etc/conf.modules for each interface, + where X is 0, 1, 2, ... + Frame Relay (DLCI) support CONFIG_DLCI This is support for the frame relay protocol; frame relay is a fast diff -u --new-file --recursive v2.2.20/Documentation/SubmittingDrivers linux/Documentation/SubmittingDrivers --- v2.2.20/Documentation/SubmittingDrivers Mon May 20 16:11:53 2002 +++ linux/Documentation/SubmittingDrivers Mon May 20 16:32:34 2002 @@ -2,7 +2,7 @@ --------------------------------------- This document is intended to explain how to submit device drivers to the -Linux 2.2 and 2.4test kernel trees. Note that if you are interested in video +Linux 2.2, 2.4 and 2.5 kernel trees. Note that if you are interested in video card drivers you should probably talk to XFree86 (http://wwww.xfree86.org) instead. @@ -10,9 +10,9 @@ ------------------------- Major and minor numbers for devices are allocated by the Linux assigned name -and number authority (currently better known as H Peter Anvin). The -site is http://www.lanana.org/. This also deals with allocating numbers for -devices that are not going to be submitted to the mainstream kernel. +and number authority (currently better known as H Peter Anvin). The site is +http://www.lanana.org/. This also deals with allocating numbers for devices +that are not going to be submitted to the mainstream kernel. If you don't use assigned numbers then when you device is submitted it will get given an assigned number even if that is different from values you may @@ -22,21 +22,28 @@ ------------------------ Linux 2.0: - No new drivers are accepted for this kernel tree + No new drivers are accepted for this kernel tree. If you have any + security or other fixes then please contact David Weinehall + Linux 2.2: If the code area has a general maintainer then please submit it to the maintainer listed in MAINTAINERS in the kernel file. If the maintainer does not respond or you cannot find the appropriate - maintainer then please contact Alan Cox + maintainer then please contact Alan Cox . -Linux 2.4test: +Linux 2.4: + If the code area has a general maintainer then please submit it to + the maintainer listed in MAINTAINERS in the kernel file. If the + maintainer does not respond or you cannot find the appropriate + maintainer then please contact Marcelo Tosatti + . + +Linux 2.5: This kernel tree is under active development. The same rules apply - as 2.2 but you may wish to submit your driver via linux-kernel (see - resources) and follow that list to track changes in API's. These - should no longer be occurring as we are now in a code freeze. - The final contact point for Linux 2.4 submissions is - . + as 2.4 but you may wish to submit your driver via linux-kernel (see + resources) and follow that list to track changes in API's. The final + contact point for Linux 2.5 submissions is . What Criteria Determine Acceptance ---------------------------------- diff -u --new-file --recursive v2.2.20/Documentation/isdn/INTERFACE linux/Documentation/isdn/INTERFACE --- v2.2.20/Documentation/isdn/INTERFACE Mon May 20 16:11:52 2002 +++ linux/Documentation/isdn/INTERFACE Mon May 20 16:32:34 2002 @@ -1,4 +1,4 @@ -$Id: INTERFACE,v 1.15.8.2 2001/03/13 16:17:07 kai Exp $ +$Id: INTERFACE,v 1.1 2001/05/26 11:47:14 armin Exp $ Description of the Interface between Linklevel and Hardwarelevel of isdn4linux: diff -u --new-file --recursive v2.2.20/Documentation/isdn/INTERFACE.fax linux/Documentation/isdn/INTERFACE.fax --- v2.2.20/Documentation/isdn/INTERFACE.fax Mon May 20 16:11:52 2002 +++ linux/Documentation/isdn/INTERFACE.fax Mon May 20 16:32:34 2002 @@ -1,4 +1,4 @@ -$Id: INTERFACE.fax,v 1.2 2000/08/06 09:22:50 armin Exp $ +$Id: INTERFACE.fax,v 1.1 2001/05/26 11:47:14 armin Exp $ Description of the fax-subinterface between linklevel and hardwarelevel of diff -u --new-file --recursive v2.2.20/Documentation/isdn/README.act2000 linux/Documentation/isdn/README.act2000 --- v2.2.20/Documentation/isdn/README.act2000 Mon May 20 16:11:52 2002 +++ linux/Documentation/isdn/README.act2000 Mon May 20 16:32:34 2002 @@ -1,4 +1,4 @@ -$Id: README.act2000,v 1.3 2000/08/06 09:22:51 armin Exp $ +$Id: README.act2000,v 1.1 2001/05/26 11:47:16 armin Exp $ This document describes the ACT2000 driver for the IBM Active 2000 ISDN card. diff -u --new-file --recursive v2.2.20/Documentation/isdn/README.audio linux/Documentation/isdn/README.audio --- v2.2.20/Documentation/isdn/README.audio Mon May 20 16:11:52 2002 +++ linux/Documentation/isdn/README.audio Mon May 20 16:32:34 2002 @@ -1,4 +1,4 @@ -$Id: README.audio,v 1.8 1999/07/11 17:17:29 armin Exp $ +$Id: README.audio,v 1.1 2001/05/26 11:47:17 armin Exp $ ISDN subsystem for Linux. Description of audio mode. diff -u --new-file --recursive v2.2.20/Documentation/isdn/README.concap linux/Documentation/isdn/README.concap --- v2.2.20/Documentation/isdn/README.concap Mon May 20 16:11:52 2002 +++ linux/Documentation/isdn/README.concap Mon May 20 16:32:34 2002 @@ -118,7 +118,7 @@ or when the device driver resets the interface. All services of the encapsulation protocol may be used after this*/ int (*restart)(struct concap_proto *cprot, - struct net_device *ndev, + struct device *ndev, struct concap_device_ops *dops); /* deactivate an encapsulation protocol instance. The encapsulation @@ -174,7 +174,7 @@ An encapsulation protocol itself is actually the struct concap_proto{ - struct net_device *net_dev; /* net device using our service */ + struct device *net_dev; /* net device using our service */ struct concap_device_ops *dops; /* callbacks provided by device */ struct concap_proto_ops *pops; /* callbacks provided by us */ int flags; @@ -199,7 +199,7 @@ encapsulation services could look like this: struct concap_device{ - struct net_device net_dev; + struct device net_dev; struct my_priv /* device->local stuff */ /* the my_priv struct might contain a struct concap_device_ops *dops; @@ -225,9 +225,9 @@ If general linux network interfaces explicitly supported concap -protocols (e.g. by a member struct concap_proto* in struct net_device) +protocols (e.g. by a member struct concap_proto* in struct device) then the interface of the service function could be changed -by passing a pointer of type (struct net_device*) instead of +by passing a pointer of type (struct device*) instead of type (struct concap_proto*). Doing so would make many of the service functions compatible to network device support functions. @@ -237,7 +237,7 @@ we could have - int (*encap_and_xmit)(struct net_device *ndev, struct sk_buff *skb); + int (*encap_and_xmit)(struct device *ndev, struct sk_buff *skb); As this is compatible to the dev->hard_start_xmit() method, the device driver could directly register the concap protocol's encap_and_xmit() @@ -247,7 +247,7 @@ The device's data request function could also be defined as - int (*data_req)(struct net_device *ndev, struct sk_buff *skb); + int (*data_req)(struct device *ndev, struct sk_buff *skb); This might even allow for some protocol stacking. And the network interface might even register the same data_req() function directly diff -u --new-file --recursive v2.2.20/Documentation/isdn/README.eicon linux/Documentation/isdn/README.eicon --- v2.2.20/Documentation/isdn/README.eicon Mon May 20 16:11:52 2002 +++ linux/Documentation/isdn/README.eicon Mon May 20 16:32:34 2002 @@ -1,4 +1,4 @@ -$Id: README.eicon,v 1.10.6.1 2001/02/19 10:04:59 armin Exp $ +$Id: README.eicon,v 1.1 2001/05/26 11:47:18 armin Exp $ (c) 1999,2000 Armin Schindler (mac@melware.de) (c) 1999,2000 Cytronics & Melware (info@melware.de) diff -u --new-file --recursive v2.2.20/Documentation/isdn/README.hysdn linux/Documentation/isdn/README.hysdn --- v2.2.20/Documentation/isdn/README.hysdn Mon May 20 16:11:52 2002 +++ linux/Documentation/isdn/README.hysdn Mon May 20 16:32:34 2002 @@ -1,4 +1,4 @@ -$Id: README.hysdn,v 1.3.6.1 2001/02/10 14:41:19 kai Exp $ +$Id: README.hysdn,v 1.1 2001/05/26 11:47:18 armin Exp $ The hysdn driver has been written by by Werner Cornelius (werner@isdn4linux.de or werner@titro.de) for Hypercope GmbH Aachen Germany. Hypercope agreed to publish this driver diff -u --new-file --recursive v2.2.20/Documentation/isdn/README.icn linux/Documentation/isdn/README.icn --- v2.2.20/Documentation/isdn/README.icn Mon May 20 16:11:52 2002 +++ linux/Documentation/isdn/README.icn Mon May 20 16:32:34 2002 @@ -1,4 +1,4 @@ -$Id: README.icn,v 1.7 2000/08/06 09:22:51 armin Exp $ +$Id: README.icn,v 1.1 2001/05/26 11:47:18 armin Exp $ You can get the ICN-ISDN-card from: diff -u --new-file --recursive v2.2.20/Documentation/sound/VIBRA16 linux/Documentation/sound/VIBRA16 --- v2.2.20/Documentation/sound/VIBRA16 Mon May 20 16:11:53 2002 +++ linux/Documentation/sound/VIBRA16 Mon May 20 16:32:34 2002 @@ -15,6 +15,8 @@ (tried it with a 2.2.2-ac7), nor in the commercial OSS package (it reports it as half-duplex soundcard). Oh, I almost forgot, the RedHat sndconfig failed detecting it ;) + Kernel 2.2.21pre2 also works with this card. /proc/sound +reports "OSS/Free:3.8s2++-971130" and "Sound Blaster 16 (4.13) (DUPLEX)" So, the big problem still remains, because the sb module wants a 8-bit and a 16-bit dma, which we could not allocate for vibra... it supports only two 8-bit dma channels, the second one will be passed to the module @@ -59,6 +61,8 @@ you may want to: modprobe sb io=0x220 irq=5 dma=1 dma16=3 +# do you need MIDI? +modprobe opl3 io=0x388 Or, take the hard way: @@ -67,14 +71,18 @@ insmod uart401 insmod sb io=0x220 irq=5 dma=1 dma16=3 # do you need MIDI? -insmod opl3=0x388 +insmod opl3 io=0x388 Just in case, the kernel sound support should be: CONFIG_SOUND=m CONFIG_SOUND_OSS=m CONFIG_SOUND_SB=m +# do you need MIDI? YM3812 gets you opl3.o... +CONFIG_SOUND_YM3812=m Enjoy your new noisy Linux box! ;) +Minor corrections and updates + Neale Banks Mon, 28 Jan 2002 15:06:35 +1100 diff -u --new-file --recursive v2.2.20/MAINTAINERS linux/MAINTAINERS --- v2.2.20/MAINTAINERS Mon May 20 16:10:12 2002 +++ linux/MAINTAINERS Mon May 20 16:32:34 2002 @@ -1000,9 +1000,8 @@ S: Maintained USB SUBSYSTEM -P: Johannes Erdfelt -M jerdfelt@valinux.com -M: johannes@erdfelt.com +P: Greg Kroah-Hartman +M: greg@kroah.com L: linux-usb-users@lists.sourceforge.net L: linux-usb-devel@lists.sourceforge.net W: http://www.linux-usb.org @@ -1046,12 +1045,12 @@ S: Maintained USB OV511 DRIVER -P: Mark McClelland -M: mmcclelland@delphi.com -L: linux-usb-users@lists.sourceforge.net -L: linux-usb-devel@lists.sourceforge.net -W: http://alpha.dyndns.org/ov511/ -S: Maintained +P: Mark McClelland +M: mmcclell@bigfoot.com +L: linux-usb-users@lists.sourceforge.net +L: linux-usb-devel@lists.sourceforge.net +W: http://alpha.dyndns.org/ov511/ +S: Maintained USB PEGASUS DRIVER P: Petko Manolov @@ -1076,12 +1075,12 @@ S: Maintained USB SERIAL KEYSPAN DRIVER -P: Hugh Blemings -M: hugh@linuxcare.com +P: Greg Kroah-Hartman +M: greg@kroah.com L: linux-usb-users@lists.sourceforge.net L: linux-usb-devel@lists.sourceforge.net S: Maintained -W: http://www.linuxcare.com.au/hugh/keyspan.html +W: http://www.kroah.com/linux/ USB SERIAL DRIVER P: Greg Kroah-Hartman diff -u --new-file --recursive v2.2.20/Makefile linux/Makefile --- v2.2.20/Makefile Mon May 20 16:09:49 2002 +++ linux/Makefile Mon May 20 16:32:34 2002 @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 2 -SUBLEVEL = 20 -EXTRAVERSION = +SUBLEVEL = 21 +EXTRAVERSION = ARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ -e s/arm.*/arm/ -e s/sa110/arm/) @@ -170,7 +170,7 @@ DRIVERS := $(DRIVERS) drivers/net/fc/fc.a endif -ifdef CONFIG_POWERMAC +ifdef CONFIG_PPC DRIVERS := $(DRIVERS) drivers/macintosh/macintosh.o endif @@ -445,6 +445,9 @@ # set -e; for i in $(SUBDIRS); do $(MAKE) -C $$i fastdep ;done # let this be made through the fastdep rule in Rules.make $(MAKE) $(patsubst %,_sfdep_%,$(SUBDIRS)) _FASTDEP_ALL_SUB_DIRS="$(SUBDIRS)" +ifdef CONFIG_MODVERSIONS + $(MAKE) update-modverfile +endif MODVERFILE := diff -u --new-file --recursive v2.2.20/Rules.make linux/Rules.make --- v2.2.20/Rules.make Mon May 20 16:09:58 2002 +++ linux/Rules.make Mon May 20 16:32:34 2002 @@ -230,8 +230,16 @@ $(addprefix $(MODINCL)/,$(SYMTAB_OBJS:.o=.ver)): $(TOPDIR)/include/linux/autoconf.h -$(TOPDIR)/include/linux/modversions.h: $(addprefix $(MODINCL)/,$(SYMTAB_OBJS:.o=.ver)) - @echo updating $(TOPDIR)/include/linux/modversions.h +# updates .ver files but not modversions.h +fastdep: $(addprefix $(MODINCL)/,$(SYMTAB_OBJS:.o=.ver)) + +# updates .ver files and modversions.h like before (is this needed?) +dep: fastdep update-modverfile + +endif # SYMTAB_OBJS + +# update modversions.h, but only if it would change +update-modverfile: @(echo "#ifndef _LINUX_MODVERSIONS_H";\ echo "#define _LINUX_MODVERSIONS_H"; \ echo "#include "; \ @@ -240,11 +248,14 @@ if [ -f $$f ]; then echo "#include "; fi; \ done; \ echo "#endif"; \ - ) > $@ - -dep fastdep: $(TOPDIR)/include/linux/modversions.h - -endif # SYMTAB_OBJS + ) > $(TOPDIR)/include/linux/modversions.h.tmp + @if [ -r $(TOPDIR)/include/linux/modversions.h ] && cmp -s $(TOPDIR)/include/linux/modversions.h $(TOPDIR)/include/linux/modversions.h.tmp; then \ + echo $(TOPDIR)/include/linux/modversions.h was not updated; \ + rm -f $(TOPDIR)/include/linux/modversions.h.tmp; \ + else \ + echo $(TOPDIR)/include/linux/modversions.h was updated; \ + mv -f $(TOPDIR)/include/linux/modversions.h.tmp $(TOPDIR)/include/linux/modversions.h; \ + fi $(M_OBJS): $(TOPDIR)/include/linux/modversions.h ifdef MAKING_MODULES diff -u --new-file --recursive v2.2.20/arch/i386/boot/compressed/misc.c linux/arch/i386/boot/compressed/misc.c --- v2.2.20/arch/i386/boot/compressed/misc.c Mon May 20 16:11:41 2002 +++ linux/arch/i386/boot/compressed/misc.c Mon May 20 16:32:34 2002 @@ -297,6 +297,7 @@ if ((ALT_MEM_K > EXT_MEM_K ? ALT_MEM_K : EXT_MEM_K) < 1024) error("Less than 2MB of memory.\n"); #endif output_data = (char *)0x100000; /* Points to 1M */ + free_mem_end_ptr = (long)real_mode; } struct moveparams { diff -u --new-file --recursive v2.2.20/arch/i386/kernel/bluesmoke.c linux/arch/i386/kernel/bluesmoke.c --- v2.2.20/arch/i386/kernel/bluesmoke.c Mon May 20 16:11:41 2002 +++ linux/arch/i386/kernel/bluesmoke.c Mon May 20 16:32:34 2002 @@ -1,17 +1,18 @@ -/* - * Machine Check Handler For PII/PIII - */ -#include +#include #include #include #include #include #include -static int banks = 0; +/* + * Machine Check Handler For PII/PIII + */ + +static int banks; -void mcheck_fault(void) +static void intel_machine_check(struct pt_regs * regs, long error_code) { int recover=1; u32 alow, ahigh, high, low; @@ -37,20 +38,19 @@ high&=~(1<<31); if(high&(1<<27)) { - rdmsr(0x403+i*4, alow, ahigh); - printk("[%08x%08x]", alow, ahigh); + rdmsr(0x402+i*4, alow, ahigh); + printk("[%08x%08x]", ahigh, alow); } if(high&(1<<26)) { rdmsr(0x402+i*4, alow, ahigh); - printk(" at %08x%08x", - high, low); + printk(" at %08x%08x", ahigh, alow); } printk("\n"); /* Clear it */ wrmsr(0x401+i*4, 0UL, 0UL); /* Serialize */ - mb(); + wmb(); } } @@ -63,31 +63,101 @@ wrmsr(0x17a,mcgstl, mcgsth); } +/* + * Machine check handler for Pentium class Intel + */ + +static void pentium_machine_check(struct pt_regs * regs, long error_code) +{ + u32 loaddr, hi, lotype; + rdmsr(0x0, loaddr, hi); + rdmsr(0x1, lotype, hi); + printk(KERN_EMERG "CPU#%d: Machine Check Exception: 0x%8X (type 0x%8X).\n", smp_processor_id(), loaddr, lotype); + if(lotype&(1<<5)) + printk(KERN_EMERG "CPU#%d: Possible thermal failure (CPU on fire ?).\n", smp_processor_id()); +} /* - * This has to be run for each processor + * Machine check handler for WinChip C6 */ -void mcheck_init(void) +static void winchip_machine_check(struct pt_regs * regs, long error_code) +{ + printk(KERN_EMERG "CPU#%d: Machine Check Exception.\n", smp_processor_id()); +} + +/* + * Handle unconfigured int18 (should never happen) + */ + +static void unexpected_machine_check(struct pt_regs * regs, long error_code) +{ + printk(KERN_ERR "CPU#%d: Unexpected int18 (Machine Check).\n", smp_processor_id()); +} + +/* + * Call the installed machine check handler for this CPU setup. + */ + +static void (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check; + +void do_machine_check(struct pt_regs * regs, long error_code) +{ + machine_check_vector(regs, error_code); +} + +/* + * Set up machine check reporting for Intel processors + */ + +void __init intel_mcheck_init(struct cpuinfo_x86 *c) { u32 l, h; int i; - struct cpuinfo_x86 *c; - static int done=0; + static int done; + + /* + * Check for MCE support + */ - c=cpu_data+smp_processor_id(); + if(!(c->x86_capability&X86_FEATURE_MCE)) + return; - if(c->x86_vendor!=X86_VENDOR_INTEL) - return; + /* + * Pentium machine check + */ - if(!(c->x86_capability&X86_FEATURE_MCE)) + if(c->x86 == 5) + { + machine_check_vector = pentium_machine_check; + wmb(); + /* Read registers before enabling */ + rdmsr(0x0, l, h); + rdmsr(0x1, l, h); + if(done==0) + printk(KERN_INFO "Intel old style machine check architecture supported.\n"); + /* Enable MCE */ + __asm__ __volatile__ ( + "movl %%cr4, %%eax\n\t" + "orl $0x40, %%eax\n\t" + "movl %%eax, %%cr4\n\t" : : : "eax"); + printk(KERN_INFO "Intel old style machine check reporting enabled on CPU#%d.\n", smp_processor_id()); return; - + } + + + /* + * Check for PPro style MCA + */ + if(!(c->x86_capability&X86_FEATURE_MCA)) return; /* Ok machine check is available */ + machine_check_vector = intel_machine_check; + wmb(); + if(done==0) printk(KERN_INFO "Intel machine check architecture supported.\n"); rdmsr(0x179, l, h); @@ -102,10 +172,69 @@ { wrmsr(0x401+4*i, 0x0, 0x0); } + set_in_cr4(X86_CR4_MCE); + printk(KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n", smp_processor_id()); + done=1; +} + +/* + * Set up machine check reporting on the Winchip C6 series + */ + +static void __init winchip_mcheck_init(struct cpuinfo_x86 *c) +{ + u32 lo, hi; + /* Not supported on C3 */ + if(c->x86 != 5) + return; + /* Winchip C6 */ + machine_check_vector = winchip_machine_check; + wmb(); + rdmsr(0x107, lo, hi); + lo|= (1<<2); /* Enable EIERRINT (int 18 MCE) */ + lo&= ~(1<<4); /* Enable MCE */ + wrmsr(0x107, lo, hi); __asm__ __volatile__ ( "movl %%cr4, %%eax\n\t" "orl $0x40, %%eax\n\t" "movl %%eax, %%cr4\n\t" : : : "eax"); - printk(KERN_INFO "Intel machine check reporting enabled on CPU#%d.\n", smp_processor_id()); - done=1; + printk(KERN_INFO "Winchip machine check reporting enabled on CPU#%d.\n", smp_processor_id()); +} + + +/* + * This has to be run for each processor + */ + + +static int mce_disabled = 0; + +void __init mcheck_init(struct cpuinfo_x86 *c) +{ + if(mce_disabled) + return; + + switch(c->x86_vendor) + { + case X86_VENDOR_AMD: + /* + * AMD K7 machine check is Intel like + */ + if(c->x86 == 6) + intel_mcheck_init(c); + break; + case X86_VENDOR_INTEL: + intel_mcheck_init(c); + break; + case X86_VENDOR_CENTAUR: + winchip_mcheck_init(c); + break; + } +} + +static int __init mcheck_disable(char *str, int *unused) +{ + mce_disabled = 1; + return 0; } +__setup("nomce", mcheck_disable); diff -u --new-file --recursive v2.2.20/arch/i386/kernel/entry.S linux/arch/i386/kernel/entry.S --- v2.2.20/arch/i386/kernel/entry.S Mon May 20 16:11:41 2002 +++ linux/arch/i386/kernel/entry.S Mon May 20 16:32:34 2002 @@ -366,7 +366,7 @@ ENTRY(machine_check) pushl $0 - pushl $ SYMBOL_NAME(mcheck_fault) + pushl $ SYMBOL_NAME(do_machine_check) jmp error_code ENTRY(spurious_interrupt_bug) diff -u --new-file --recursive v2.2.20/arch/i386/kernel/head.S linux/arch/i386/kernel/head.S --- v2.2.20/arch/i386/kernel/head.S Mon May 20 16:11:41 2002 +++ linux/arch/i386/kernel/head.S Mon May 20 16:32:34 2002 @@ -160,7 +160,7 @@ * we don't need to preserve eflags. */ - movl $3,X86 # at least 386 + movb $3,X86 # at least 386 pushfl # push EFLAGS popl %eax # get EFLAGS movl %eax,%ecx # save original EFLAGS @@ -173,7 +173,7 @@ andl $0x40000,%eax # check if AC bit changed je is386 - movl $4,X86 # at least 486 + movb $4,X86 # at least 486 movl %ecx,%eax xorl $0x200000,%eax # check ID flag pushl %eax diff -u --new-file --recursive v2.2.20/arch/i386/kernel/setup.c linux/arch/i386/kernel/setup.c --- v2.2.20/arch/i386/kernel/setup.c Mon May 20 16:11:41 2002 +++ linux/arch/i386/kernel/setup.c Mon May 20 16:32:34 2002 @@ -36,9 +36,13 @@ * Added Cyrix III initial detection code * Alan Cox , Septembr 2000 * - * Improve cache size calculation - * Asit Mallick , October 2000 - * Andrew Ip , October 2000 + * Improve cache size calculation + * Asit Mallick , October 2000 + * Andrew Ip , October 2000 + * + * Backport various workarounds from 2.4.16 + * Dave Jones , December 2001 + * */ /* @@ -114,10 +118,13 @@ extern int rd_image_start; /* starting block # of image */ #endif +extern void mcheck_init(struct cpuinfo_x86 *c); extern int root_mountflags; extern int _etext, _edata, _end; extern unsigned long cpu_khz; +static int disable_x86_serial_nr __initdata = 1; + /* * This is set up by the setup-routine at boot-time */ @@ -386,8 +393,8 @@ static char command_line[COMMAND_LINE_SIZE] = { 0, }; char saved_command_line[COMMAND_LINE_SIZE]; -__initfunc(void setup_arch(char **cmdline_p, - unsigned long * memory_start_p, unsigned long * memory_end_p)) +void __init setup_arch(char **cmdline_p, + unsigned long * memory_start_p, unsigned long * memory_end_p) { unsigned long memory_start, memory_end = 0; char c = ' ', *to = command_line, *from = COMMAND_LINE; @@ -572,49 +579,52 @@ } -__initfunc(static int get_model_name(struct cpuinfo_x86 *c)) +static int __init get_model_name(struct cpuinfo_x86 *c) { - unsigned int n, dummy, *v; - - /* - * Actually we must have cpuid or we could never have - * figured out that this was AMD/Centaur/Cyrix/Transmeta - * from the vendor info :-). - */ + unsigned int *v; + char *p, *q; - cpuid(0x80000000, &n, &dummy, &dummy, &dummy); - if (n < 0x80000004) + if (cpuid_eax(0x80000000) < 0x80000004) return 0; - cpuid(0x80000001, &dummy, &dummy, &dummy, &(c->x86_capability)); v = (unsigned int *) c->x86_model_id; cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]); cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]); cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]); c->x86_model_id[48] = 0; - + + /* Intel chips right-justify this string for some dumb reason; + undo that brain damage */ + p = q = &c->x86_model_id[0]; + while ( *p == ' ' ) + p++; + if ( p != q ) { + while ( *p ) + *q++ = *p++; + while ( q <= &c->x86_model_id[48] ) + *q++ = '\0'; /* Zero-pad the rest */ + } return 1; } -__initfunc (static void display_cacheinfo(struct cpuinfo_x86 *c)) +static void __init display_cacheinfo(struct cpuinfo_x86 *c) { - unsigned int n, dummy, ecx, edx; + unsigned int n, dummy, ecx, edx, l2size; - cpuid(0x80000000, &n, &dummy, &dummy, &dummy); + n = cpuid_eax(0x80000000); if (n >= 0x80000005){ cpuid(0x80000005, &dummy, &dummy, &ecx, &edx); - printk("CPU: L1 I Cache: %dK L1 D Cache: %dK\n", - ecx>>24, edx>>24); + printk("CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n", + edx>>24, edx&0xFF, ecx>>24, ecx&0xFF); c->x86_cache_size=(ecx>>24)+(edx>>24); } - /* Yes this can occur - the CyrixIII just has a large L1 */ - if (n < 0x80000006) - return; /* No function to get L2 info */ + if (n < 0x80000006) /* Some chips just has a large L1. */ + return; - cpuid(0x80000006, &dummy, &dummy, &ecx, &edx); - c->x86_cache_size = ecx>>16; + ecx = cpuid_ecx(0x80000006); + l2size = ecx >> 16; /* AMD errata T13 (order #21922) */ if(boot_cpu_data.x86_vendor == X86_VENDOR_AMD && @@ -622,15 +632,20 @@ boot_cpu_data.x86_model== 3 && boot_cpu_data.x86_mask == 0) { - c->x86_cache_size = 64; + l2size = 64; } - printk("CPU: L2 Cache: %dK\n", c->x86_cache_size); -} + if (l2size == 0) + return; /* Again, no L2 cache is possible */ + + c->x86_cache_size = l2size; + printk("CPU: L2 Cache: %dK (%d bytes/line)\n", + l2size, ecx & 0xFF); +} -__initfunc(static int amd_model(struct cpuinfo_x86 *c)) +static int __init init_amd(struct cpuinfo_x86 *c) { u32 l, h; unsigned long flags; @@ -645,23 +660,24 @@ switch(c->x86) { case 5: - if( c->x86_model < 6 ) - { - /* Anyone with a K5 want to fill this in */ + if( c->x86_model < 6 ) { + /* Based on AMD doc 20734R - June 2000 */ + if ( c->x86_model == 0 ) { + c->x86_capability&=~X86_FEATURE_APIC; + c->x86_capability|=X86_FEATURE_PGE; + } break; } /* K6 with old style WHCR */ - if( c->x86_model < 8 || - (c->x86_model== 8 && c->x86_mask < 8)) - { + if (c->x86_model < 8 || + (c->x86_model== 8 && c->x86_mask < 8)) { /* We can only write allocate on the low 508Mb */ if(mbytes>508) mbytes=508; - + rdmsr(0xC0000082, l, h); - if((l&0x0000FFFF)==0) - { + if((l&0x0000FFFF)==0) { l=(1<<0)|((mbytes/4)<<1); save_flags(flags); __cli(); @@ -670,20 +686,19 @@ restore_flags(flags); printk(KERN_INFO "Enabling old style K6 write allocation for %d Mb\n", mbytes); - } break; } - if (c->x86_model == 8 || c->x86_model == 9 || c->x86_model == 13) - { + + if ((c->x86_model == 8 && c->x86_mask >7) || + c->x86_model == 9 || c->x86_model == 13) { /* The more serious chips .. */ - + if(mbytes>4092) mbytes=4092; rdmsr(0xC0000082, l, h); - if((l&0xFFFF0000)==0) - { + if((l&0xFFFF0000)==0) { l=((mbytes>>2)<<22)|(1<<16); save_flags(flags); __cli(); @@ -695,38 +710,24 @@ } /* Set MTRR capability flag if appropriate */ - if((boot_cpu_data.x86_model == 13) || - (boot_cpu_data.x86_model == 9) || - ((boot_cpu_data.x86_model == 8) && - (boot_cpu_data.x86_mask >= 8))) + if (c->x86_model == 13 || c->x86_model == 9 || + (c->x86_model == 8 && c->x86_mask >= 8)) c->x86_capability |= X86_FEATURE_MTRR; break; } break; case 6: /* An Athlon. We can trust the BIOS probably */ - { break; - } } display_cacheinfo(c); return r; } -__initfunc(static void intel_model(struct cpuinfo_x86 *c)) -{ - unsigned int *v = (unsigned int *) c->x86_model_id; - cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]); - cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]); - cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]); - c->x86_model_id[48] = 0; - printk("CPU: %s\n", c->x86_model_id); -} - /* - * Read Cyrix DEVID registers (DIR) to get more detailed info. about the CPU + * Read NSC/Cyrix DEVID registers (DIR) to get more detailed info. about the CPU */ static inline void do_cyrix_devid(unsigned char *dir0, unsigned char *dir1) { @@ -762,7 +763,7 @@ /* * Cx86_dir0_msb is a HACK needed by check_cx686_cpuid/slop in bugs.h in - * order to identify the Cyrix CPU model after we're out of setup.c + * order to identify the NSC/Cyrix CPU model after we're out of setup.c */ unsigned char Cx86_dir0_msb __initdata = 0; @@ -784,7 +785,7 @@ static char cyrix_model_mult1[] __initdata = "12??43"; static char cyrix_model_mult2[] __initdata = "12233445"; -__initfunc(static void cyrix_model(struct cpuinfo_x86 *c)) +static void __init init_cyrix(struct cpuinfo_x86 *c) { unsigned char dir0, dir0_msn, dir0_lsn, dir1 = 0; char *buf = c->x86_model_id; @@ -860,6 +861,8 @@ isa_dma_bridge_buggy = 2; #endif + c->x86_cache_size=16; /* Yep 16K integrated cache thats it */ + /* GXm supports extended cpuid levels 'ala' AMD */ if (c->cpuid_level == 2) { get_model_name(c); /* get CPU marketing name */ @@ -875,8 +878,13 @@ break; case 5: /* 6x86MX/M II */ - if (dir1 > 7) dir0_msn++; /* M II */ - else c->coma_bug = 1; /* 6x86MX, it has the bug. */ + if (dir1 > 7) { + dir0_msn++; /* M II */ + /* Enable MMX extensions (App note 108) */ + setCx86(CX86_CCR7, getCx86(CX86_CCR7)|1); + } else { + c->coma_bug = 1; /* 6x86MX, it has the bug. */ + } tmp = (!(dir0_lsn & 7) || dir0_lsn & 1) ? 2 : 0; Cx86_cb[tmp] = cyrix_model_mult2[dir0_lsn & 7]; p = Cx86_cb+tmp; @@ -897,8 +905,8 @@ dir0_msn = 0; p = Cx486S_name[0]; break; - break; } + break; default: /* unknown (shouldn't happen, we know everyone ;-) */ dir0_msn = 7; @@ -909,14 +917,14 @@ return; } -__initfunc(static void transmeta_model(struct cpuinfo_x86 *c)) +static void __init init_transmeta(struct cpuinfo_x86 *c) { unsigned int cap_mask, uk, max, dummy; unsigned int cms_rev1, cms_rev2; unsigned int cpu_rev, cpu_freq, cpu_flags; char cpu_info[65]; - get_model_name(c); /* Same as AMD/Cyrix */ + get_model_name(c); /* Same as AMD/NSC/Cyrix */ display_cacheinfo(c); /* Print CMS and CPU revision */ @@ -974,7 +982,31 @@ } -__initfunc(void get_cpu_vendor(struct cpuinfo_x86 *c)) +static void __init init_rise(struct cpuinfo_x86 *c) +{ + printk("CPU: Rise iDragon"); + if (c->x86_model > 2) + printk(" II"); + printk("\n"); + + /* Unhide possibly hidden capability flags + * The mp6 iDragon family don't have MSRs + * We switch on extra features with this cpuid weirdness: */ + __asm__ ( + "movl $0x6363452a, %%eax\n\t" + "movl $0x3231206c, %%ecx\n\t" + "movl $0x2a32313a, %%edx\n\t" + "cpuid\n\t" + "movl $0x63634523, %%eax\n\t" + "movl $0x32315f6c, %%ecx\n\t" + "movl $0x2333313a, %%edx\n\t" + "cpuid\n\t" : : : "eax", "ebx", "ecx", "edx" + ); + c->x86_capability |= X86_FEATURE_CX8; +} + + +static void __init get_cpu_vendor(struct cpuinfo_x86 *c) { char *v = c->x86_vendor_id; @@ -984,6 +1016,8 @@ c->x86_vendor = X86_VENDOR_AMD; else if (!strcmp(v, "CyrixInstead")) c->x86_vendor = X86_VENDOR_CYRIX; + else if (!strcmp(v, "Geode by NSC")) + c->x86_vendor = X86_VENDOR_NSC; else if (!strcmp(v, "UMC UMC UMC ")) c->x86_vendor = X86_VENDOR_UMC; else if (!strcmp(v, "CentaurHauls")) @@ -998,9 +1032,214 @@ c->x86_vendor = X86_VENDOR_UNKNOWN; } + +static void __init init_centaur(struct cpuinfo_x86 *c) +{ + u32 hv,lv; + + /* Centaur C6 Series */ + if(c->x86==5) + { + rdmsr(0x107, lv, hv); + printk("Centaur FSR was 0x%X ",lv); + lv|=(1<<1 | 1<<2 | 1<<7); + /* lv|=(1<<6); - may help too if the board can cope */ + printk("now 0x%X\n", lv); + wrmsr(0x107, lv, hv); + /* Emulate MTRRs using Centaur's MCR. */ + c->x86_capability |= X86_FEATURE_MTRR; + + /* Disable TSC on C6 as per errata. */ + if (c->x86_model ==4) { + printk ("Disabling bugged TSC.\n"); + c->x86_capability &= ~X86_FEATURE_TSC; + } + + /* Set 3DNow! on Winchip 2 and above. */ + if (c->x86_model >=8) + c->x86_capability |= X86_FEATURE_AMD3D; + + c->x86_capability |=X86_FEATURE_CX8; + } + /* Cyrix III 'Samuel' CPU */ + if(c->x86 == 6 && c->x86_model == 6) + { + rdmsr(0x1107, lv, hv); + lv|=(1<<1); /* Report CX8 */ + lv|=(1<<7); /* PGE enable */ + wrmsr(0x1107, lv, hv); + /* Cyrix III */ + c->x86_capability |= X86_FEATURE_CX8; + + /* Check for 3dnow */ + cpuid(0x80000001, &lv, &lv, &lv, &hv); + if(hv&(1<<31)) + c->x86_capability |= X86_FEATURE_AMD3D; + } +} + + +static void __init init_intel(struct cpuinfo_x86 *c) +{ + char *p = NULL; + unsigned int l1i = 0, l1d = 0, l2 = 0, l3 = 0; /* Cache sizes */ + + if (c->cpuid_level > 1) { + /* supports eax=2 call */ + int i, j, n; + int regs[4]; + unsigned char *dp = (unsigned char *)regs; + + /* Number of times to iterate */ + n = cpuid_eax(2) & 0xFF; + + for ( i = 0 ; i < n ; i++ ) { + cpuid(2, ®s[0], ®s[1], ®s[2], ®s[3]); + + /* If bit 31 is set, this is an unknown format */ + for ( j = 0 ; j < 3 ; j++ ) { + if ( regs[j] < 0 ) regs[j] = 0; + } + + /* Byte 0 is level count, not a descriptor */ + for ( j = 1 ; j < 16 ; j++ ) { + unsigned char des = dp[j]; + unsigned char dl, dh; + unsigned int cs; + + dh = des >> 4; + dl = des & 0x0F; + + /* Black magic... */ + + switch ( dh ) + { + case 0: + switch ( dl ) { + case 6: + /* L1 I cache */ + l1i += 8; + break; + case 8: + /* L1 I cache */ + l1i += 16; + break; + case 10: + /* L1 D cache */ + l1d += 8; + break; + case 12: + /* L1 D cache */ + l1d += 16; + break; + default:; + /* TLB, or unknown */ + } + break; + case 2: + if ( dl ) { + /* L3 cache */ + cs = (dl-1) << 9; + l3 += cs; + } + break; + case 4: + if ( c->x86 > 6 && dl ) { + /* P4 family */ + /* L3 cache */ + cs = 128 << (dl-1); + l3 += cs; + break; + } + /* else same as 8 - fall through */ + case 8: + if ( dl ) { + /* L2 cache */ + cs = 128 << (dl-1); + l2 += cs; + } + break; + case 6: + if (dl > 5) { + /* L1 D cache */ + cs = 8<<(dl-6); + l1d += cs; + } + break; + case 7: + if ( dl >= 8 ) + { + /* L2 cache */ + cs = 64<<(dl-8); + l2 += cs; + } else { + /* L0 I cache, count as L1 */ + cs = dl ? (16 << (dl-1)) : 12; + l1i += cs; + } + break; + default: + /* TLB, or something else we don't know about */ + break; + } + } + } + if ( l1i || l1d ) + printk(KERN_INFO "CPU: L1 I cache: %dK, L1 D cache: %dK\n", + l1i, l1d); + if ( l2 ) + printk(KERN_INFO "CPU: L2 cache: %dK\n", l2); + if ( l3 ) + printk(KERN_INFO "CPU: L3 cache: %dK\n", l3); + + /* + * This assumes the L3 cache is shared; it typically lives in + * the northbridge. The L1 caches are included by the L2 + * cache, and so should not be included for the purpose of + * SMP switching weights. + */ + c->x86_cache_size = l2 ? l2 : (l1i+l1d); + } + + /* + * Intel finally adopted the AMD/Cyrix extended id naming + * stuff for the 'Pentium IV' + */ + + if (c->x86 == 15) { + get_model_name(c); + printk("CPU: %s\n", c->x86_model_id); + return; + } + + /* Names for the Pentium II Celeron processors + detectable only by also checking the cache size */ + if (c->x86 == 6) { + switch (c->x86_model) { + case 5: + if (c->x86_cache_size == 0) + p = "Celeron (Covington)"; + if (c->x86_cache_size == 256) + p = "Mobile Pentium II (Dixon)"; + break; + case 6: + if (c->x86_cache_size == 128) + p = "Celeron (Mendocino)"; + break; + case 8: + if (c->x86_cache_size == 128) + p = "Celeron (Coppermine)"; + break; + } + } + + if ( p ) + strcpy(c->x86_model_id, p); +} + struct cpu_model_info { int vendor; - int x86; + int family; char *model_names[16]; }; @@ -1042,251 +1281,142 @@ { X86_VENDOR_NEXGEN, 5, { "Nx586", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL }}, + { X86_VENDOR_RISE, 5, + { "iDragon", NULL, "iDragon", NULL, NULL, NULL, NULL, + NULL, "iDragon II", "iDragon II", NULL, NULL, NULL, NULL, NULL, NULL }}, }; -__initfunc(void identify_cpu(struct cpuinfo_x86 *c)) + +static char __init *table_lookup_model(struct cpuinfo_x86 *c) { + struct cpu_model_info *info = cpu_models; int i; - char *p = NULL; - extern void mcheck_init(void); - - c->loops_per_jiffy = loops_per_jiffy; - c->x86_cache_size = -1; - get_cpu_vendor(c); + if ( c->x86_model >= 16 ) + return NULL; /* Range check */ + + for ( i = 0 ; i < sizeof(cpu_models)/sizeof(struct cpu_model_info) ; i++ ) { + if ( info->vendor == c->x86_vendor && + info->family == c->x86 ) { + return info->model_names[c->x86_model]; + } + info++; + } + return NULL; /* Not found */ +} - if (c->x86_vendor == X86_VENDOR_UNKNOWN && - c->cpuid_level < 0) - return; - /* It should be possible for the user to override this. */ - if(c->cpuid_level > 0 && - (c->x86_vendor == X86_VENDOR_INTEL || c->x86_vendor == X86_VENDOR_TRANSMETA) && - c->x86_capability&(1<<18)) { +static void __init squash_the_stupid_serial_number(struct cpuinfo_x86 *c) +{ + if (c->x86_capability&(X86_FEATURE_PN) && disable_x86_serial_nr) { /* Disable processor serial number */ unsigned long lo,hi; rdmsr(0x119,lo,hi); lo |= 0x200000; wrmsr(0x119,lo,hi); - printk(KERN_INFO "CPU serial number disabled.\n"); + printk(KERN_NOTICE "CPU serial number disabled.\n"); + c->x86_capability &= ~X86_FEATURE_PN; + c->cpuid_level = cpuid_eax(0); } +} +int __init x86_serial_nr_setup(char *s) +{ + disable_x86_serial_nr = 0; + return 1; +} +__setup("serialnumber", x86_serial_nr_setup); - mcheck_init(); - - if (c->x86_vendor == X86_VENDOR_CYRIX) { - cyrix_model(c); - return; - } - - if (c->x86_vendor == X86_VENDOR_AMD && amd_model(c)) - return; - - if (c->x86_vendor == X86_VENDOR_TRANSMETA) { - transmeta_model(c); - return; - } - - if(c->x86_vendor == X86_VENDOR_CENTAUR && c->x86==6) - { - /* The Cyrix III supports model naming and cache queries */ - get_model_name(c); - display_cacheinfo(c); - return; - } - - if (c->cpuid_level > 1) { - /* supports eax=2 call */ - int regs[4]; - int l1c=0, l1d=0, l2=0, l3=0; /* Cache sizes */ - - cpuid(2, ®s[0], ®s[1], ®s[2], ®s[3]); - - /* Least significant byte of eax says how many times - * to call cpuid with value 2 to get cache and TLB - * info. - */ - if ((regs[0] & 0xFF) != 1 ) - printk(KERN_WARNING "Multiple cache reports are not supported yet\n"); - - c->x86_cache_size = 0; - - for ( i = 0 ; i < 4 ; i++ ) { - - int j; - - if ( regs[i] < 0 ) - continue; /* no useful data */ - - /* look at all the bytes returned */ - - for ( j = ( i == 0 ? 8:0 ) ; j < 25 ; j+=8 ) { - - unsigned char rh = regs[i]>>j; - unsigned char rl; - - rl = rh & 0x0F; - rh >>=4; - - switch(rh) { - - case 2: - if(rl) { - printk("%dK L3 cache\n", (rl-1)*512); - l3 += (rl-1)*512; - } - break; - - case 4: - case 8: - if(rl) { - printk("%dK L2 cache (%d way)\n",128<<(rl-1), rh); - l2 += 128<<(rl-1); - } - break; - - /* - * L1 caches do not count for SMP switching weights, - * they are shadowed by L2. - */ - case 6: - if(rh==6 && rl > 5) { - printk("%dK L1 data cache\n", 8<<(rl - 6)); - l1d+=8<<(rl-6); - } - break; +__initfunc(void identify_cpu(struct cpuinfo_x86 *c)) +{ + c->loops_per_jiffy = loops_per_jiffy; + c->x86_cache_size = -1; - case 7: - printk("%dK L1 instruction cache\n", - rl?(16<<(rl-1)):12); - l1c+=rl?(16<<(rl-1)):12; - break; - } - } - } + get_cpu_vendor(c); - if(l1c && l1d) - printk("CPU: L1 I Cache: %dK L1 D Cache: %dK\n", l1c, l1d); - if(l2) - printk("CPU: L2 Cache: %dK\n", l2); - if(l3) - printk("CPU: L3 Cache: %dK\n", l3); + switch (c->x86_vendor) { + case X86_VENDOR_UNKNOWN: + default: + /* Not much we can do here... */ + /* Check if at least it has cpuid */ + if (c->cpuid_level == -1) { + /* No cpuid. It must be an ancient CPU */ + if (c->x86 == 4) + strcpy(c->x86_model_id, "486"); + else if (c->x86 == 3) + strcpy(c->x86_model_id, "386"); + } + break; - /* - * Assuming L3 is shared. The L1 cache is shadowed by L2 - * so doesn't need to be included. - */ + case X86_VENDOR_CYRIX: + init_cyrix(c); + return; + + case X86_VENDOR_NSC: + init_cyrix(c); + return; + + case X86_VENDOR_AMD: + init_amd(c); + return; - c->x86_cache_size += l2; - } + case X86_VENDOR_CENTAUR: + init_centaur(c); + return; - /* - * Intel finally adopted the AMD/Cyrix extended id naming - * stuff for the 'Pentium IV' - */ + case X86_VENDOR_TRANSMETA: + init_transmeta(c); + return; - if(c->x86_vendor ==X86_VENDOR_INTEL && c->x86 == 15) - { - intel_model(c); - return; - } + case X86_VENDOR_RISE: + init_rise(c); + break; - for (i = 0; i < sizeof(cpu_models)/sizeof(struct cpu_model_info); i++) { - if (cpu_models[i].vendor == c->x86_vendor && - cpu_models[i].x86 == c->x86) { - if (c->x86_model <= 16) - p = cpu_models[i].model_names[c->x86_model]; - - /* Names for the Pentium II Celeron processors - detectable only by also checking the cache size */ - if ((cpu_models[i].vendor == X86_VENDOR_INTEL) - && (cpu_models[i].x86 == 6)){ - if(c->x86_model == 6 && c->x86_cache_size == 128) { - p = "Celeron (Mendocino)"; - } else { - if (c->x86_model == 5 && c->x86_cache_size == 0) { - p = "Celeron (Covington)"; - } - } - } - } + case X86_VENDOR_INTEL: + init_intel(c); + break; } + + squash_the_stupid_serial_number(c); - if (p) { - strcpy(c->x86_model_id, p); - return; + mcheck_init(c); + + /* If the model name is still unset, do table lookup. */ + if ( !c->x86_model_id[0] ) { + char *p; + p = table_lookup_model(c); + if ( p ) + strcpy(c->x86_model_id, p); + else + /* Last resort... */ + sprintf(c->x86_model_id, "%02x/%02x", + c->x86_vendor, c->x86_model); } - - sprintf(c->x86_model_id, "%02x/%02x", c->x86_vendor, c->x86_model); } /* * Perform early boot up checks for a valid TSC. See arch/i386/kernel/time.c */ -__initfunc(void dodgy_tsc(void)) +void __init dodgy_tsc(void) { get_cpu_vendor(&boot_cpu_data); - if(boot_cpu_data.x86_vendor != X86_VENDOR_CYRIX) + if(boot_cpu_data.x86_vendor != X86_VENDOR_CYRIX && boot_cpu_data.x86_vendor != X86_VENDOR_NSC) { return; } - cyrix_model(&boot_cpu_data); + init_cyrix(&boot_cpu_data); } - static char *cpu_vendor_names[] __initdata = { - "Intel", "Cyrix", "AMD", "UMC", "NexGen", "Centaur", "Rise", "Transmeta" }; - - -__initfunc(void setup_centaur(struct cpuinfo_x86 *c)) -{ - u32 hv,lv; - - /* Centaur C6 Series */ - if(c->x86==5) - { - rdmsr(0x107, lv, hv); - printk("Centaur FSR was 0x%X ",lv); - lv|=(1<<1 | 1<<2 | 1<<7); - /* lv|=(1<<6); - may help too if the board can cope */ - printk("now 0x%X\n", lv); - wrmsr(0x107, lv, hv); - /* Emulate MTRRs using Centaur's MCR. */ - c->x86_capability |= X86_FEATURE_MTRR; - - /* Disable TSC on C6 as per errata. */ - if (c->x86_model ==4) { - printk ("Disabling bugged TSC.\n"); - c->x86_capability &= ~X86_FEATURE_TSC; - } - - /* Set 3DNow! on Winchip 2 and above. */ - if (c->x86_model >=8) - c->x86_capability |= X86_FEATURE_AMD3D; + "Intel", "Cyrix", "AMD", "UMC", "NexGen", + "Centaur", "Rise", "Transmeta" , "NSC" +}; - c->x86_capability |=X86_FEATURE_CX8; - } - /* Cyrix III 'Samuel' CPU */ - if(c->x86 == 6 && c->x86_model == 6) - { - rdmsr(0x1107, lv, hv); - lv|=(1<<1); /* Report CX8 */ - lv|=(1<<7); /* PGE enable */ - wrmsr(0x1107, lv, hv); - /* Cyrix III */ - c->x86_capability |= X86_FEATURE_CX8; - - /* Check for 3dnow */ - cpuid(0x80000001, &lv, &lv, &lv, &hv); - if(hv&(1<<31)) - c->x86_capability |= X86_FEATURE_AMD3D; - } -} -__initfunc(void print_cpu_info(struct cpuinfo_x86 *c)) +void __init print_cpu_info(struct cpuinfo_x86 *c) { char *vendor = NULL; @@ -1307,12 +1437,9 @@ printk(" stepping %02x\n", c->x86_mask); else printk("\n"); - - if(c->x86_vendor == X86_VENDOR_CENTAUR) { - setup_centaur(c); - } } + /* * Get CPU information for use by the procfs. */ @@ -1322,10 +1449,10 @@ char *p = buffer; int sep_bug; static char *x86_cap_flags[] = { - "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", - "cx8", "apic", "10", "sep", "mtrr", "pge", "mca", "cmov", - "16", "pse36", "psn", "19", "20", "21", "22", "mmx", - "24", "xmm", "26", "27", "28", "29", "30", "31" + "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce", + "cx8", "apic", "10", "sep", "mtrr", "pge", "mca", "cmov", + "pat", "pse36", "pn", "clflush", "20", "dts", "acpi", "mmx", + "fxsr", "sse", "sse2", "ss", "28", "tm", "ia64", "31" }; struct cpuinfo_x86 *c = cpu_data; int i, n; diff -u --new-file --recursive v2.2.20/arch/i386/kernel/traps.c linux/arch/i386/kernel/traps.c --- v2.2.20/arch/i386/kernel/traps.c Mon May 20 16:11:41 2002 +++ linux/arch/i386/kernel/traps.c Mon May 20 16:32:34 2002 @@ -359,6 +359,7 @@ asmlinkage void do_debug(struct pt_regs * regs, long error_code) { unsigned int condition; + unsigned long eip = regs->eip; struct task_struct *tsk = current; if (regs->eflags & VM_MASK) @@ -366,6 +367,10 @@ __asm__ __volatile__("movl %%db6,%0" : "=r" (condition)); + /* If the user set TF, it's simplest to clear it right away. */ + if ((eip >=PAGE_OFFSET) && (regs->eflags & TF_MASK)) + goto clear_TF; + /* Ensure the debug status register is visible to ptrace (or the process itself) */ tsk->tss.debugreg[6] = condition; diff -u --new-file --recursive v2.2.20/arch/i386/kernel/vm86.c linux/arch/i386/kernel/vm86.c --- v2.2.20/arch/i386/kernel/vm86.c Mon May 20 16:11:41 2002 +++ linux/arch/i386/kernel/vm86.c Mon May 20 16:32:34 2002 @@ -330,74 +330,176 @@ * Boy are these ugly, but we need to do the correct 16-bit arithmetic. * Gcc makes a mess of it, so we do it inline and use non-obvious calling * conventions.. + * FIXME: is VM86_UNKNOWN really the correct return code? */ -#define pushb(base, ptr, val) \ -__asm__ __volatile__( \ - "decw %w0\n\t" \ - "movb %2,0(%1,%0)" \ - : "=r" (ptr) \ - : "r" (base), "q" (val), "0" (ptr)) - -#define pushw(base, ptr, val) \ -__asm__ __volatile__( \ - "decw %w0\n\t" \ - "movb %h2,0(%1,%0)\n\t" \ - "decw %w0\n\t" \ - "movb %b2,0(%1,%0)" \ - : "=r" (ptr) \ - : "r" (base), "q" (val), "0" (ptr)) - -#define pushl(base, ptr, val) \ -__asm__ __volatile__( \ - "decw %w0\n\t" \ - "rorl $16,%2\n\t" \ - "movb %h2,0(%1,%0)\n\t" \ - "decw %w0\n\t" \ - "movb %b2,0(%1,%0)\n\t" \ - "decw %w0\n\t" \ - "rorl $16,%2\n\t" \ - "movb %h2,0(%1,%0)\n\t" \ - "decw %w0\n\t" \ - "movb %b2,0(%1,%0)" \ - : "=r" (ptr) \ - : "r" (base), "q" (val), "0" (ptr)) - -#define popb(base, ptr) \ -({ unsigned long __res; \ -__asm__ __volatile__( \ - "movb 0(%1,%0),%b2\n\t" \ - "incw %w0" \ - : "=r" (ptr), "=r" (base), "=q" (__res) \ - : "0" (ptr), "1" (base), "2" (0)); \ -__res; }) - -#define popw(base, ptr) \ -({ unsigned long __res; \ -__asm__ __volatile__( \ - "movb 0(%1,%0),%b2\n\t" \ - "incw %w0\n\t" \ - "movb 0(%1,%0),%h2\n\t" \ - "incw %w0" \ - : "=r" (ptr), "=r" (base), "=q" (__res) \ - : "0" (ptr), "1" (base), "2" (0)); \ -__res; }) - -#define popl(base, ptr) \ -({ unsigned long __res; \ -__asm__ __volatile__( \ - "movb 0(%1,%0),%b2\n\t" \ - "incw %w0\n\t" \ - "movb 0(%1,%0),%h2\n\t" \ - "incw %w0\n\t" \ - "rorl $16,%2\n\t" \ - "movb 0(%1,%0),%b2\n\t" \ - "incw %w0\n\t" \ - "movb 0(%1,%0),%h2\n\t" \ - "incw %w0\n\t" \ - "rorl $16,%2" \ - : "=r" (ptr), "=r" (base), "=q" (__res) \ - : "0" (ptr), "1" (base)); \ -__res; }) +#define pushb(base, ptr, val, regs) \ + do { \ + int err; \ + __asm__ __volatile__( \ + "decw %w0\n\t" \ + "1: movb %3,0(%2,%0)\n\t" \ + "xor %1,%1\n\t" \ + "2:\n" \ + ".section .fixup,\"ax\"\n\t" \ + "3: movl $1,%1\n\t" \ + " jmp 2b\n\t" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 4\n" \ + " .long 1b,3b\n" \ + ".previous" \ + : "=r" (ptr), "=r" (err) \ + : "r" (base), "q" (val), "0" (ptr)); \ + if (err) \ + return_to_32bit(regs, VM86_UNKNOWN); \ + } while(0) + +#define pushw(base, ptr, val, regs) \ + do { \ + int err; \ + __asm__ __volatile__( \ + "decw %w0\n\t" \ + "1: movb %h3,0(%2,%0)\n\t" \ + "decw %w0\n\t" \ + "2: movb %b3,0(%2,%0)\n\t" \ + "xor %1,%1\n\t" \ + "3:\n" \ + ".section .fixup,\"ax\"\n\t" \ + "4: movl $1,%1\n\t" \ + " jmp 3b\n\t" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 4\n" \ + " .long 1b,4b\n" \ + " .long 2b,4b\n" \ + ".previous" \ + : "=r" (ptr), "=r" (err) \ + : "r" (base), "q" (val), "0" (ptr)); \ + if (err) \ + return_to_32bit(regs, VM86_UNKNOWN); \ + } while(0) + +#define pushl(base, ptr, val, regs) \ + do { \ + int err; \ + __asm__ __volatile__( \ + "decw %w0\n\t" \ + "rorl $16,%3\n\t" \ + "1: movb %h3,0(%2,%0)\n\t" \ + "decw %w0\n\t" \ + "2: movb %b3,0(%2,%0)\n\t" \ + "decw %w0\n\t" \ + "rorl $16,%3\n\t" \ + "3: movb %h3,0(%2,%0)\n\t" \ + "decw %w0\n\t" \ + "4: movb %b3,0(%2,%0)\n\t" \ + "xor %1,%1\n\t" \ + "5:\n" \ + ".section .fixup,\"ax\"\n\t" \ + "6: movl $1,%1\n\t" \ + " jmp 5b\n\t" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 4\n" \ + " .long 1b,6b\n" \ + " .long 2b,6b\n" \ + " .long 3b,6b\n" \ + " .long 4b,6b\n" \ + ".previous" \ + : "=r" (ptr), "=r" (err) \ + : "r" (base), "q" (val), "0" (ptr)); \ + if (err) \ + return_to_32bit(regs, VM86_UNKNOWN); \ + } while(0) + +#define popb(base, ptr, regs) \ + ({ \ + unsigned long __res; \ + unsigned int err; \ + __asm__ __volatile__( \ + "1:movb 0(%1,%0),%b2\n\t" \ + "incw %w0\n\t" \ + "xor %3,%3\n\t" \ + "2:\n" \ + ".section .fixup,\"ax\"\n\t" \ + "3: movl $1,%1\n\t" \ + " jmp 2b\n\t" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 4\n" \ + " .long 1b,3b\n" \ + ".previous" \ + : "=r" (ptr), "=r" (base), "=q" (__res), \ + "=r" (err) \ + : "0" (ptr), "1" (base), "2" (0)); \ + if (err) \ + return_to_32bit(regs, VM86_UNKNOWN); \ + __res; \ + }) + +#define popw(base, ptr, regs) \ + ({ \ + unsigned long __res; \ + unsigned int err; \ + __asm__ __volatile__( \ + "1:movb 0(%1,%0),%b2\n\t" \ + "incw %w0\n\t" \ + "2:movb 0(%1,%0),%h2\n\t" \ + "incw %w0\n\t" \ + "xor %3,%3\n\t" \ + "3:\n" \ + ".section .fixup,\"ax\"\n\t" \ + "4: movl $1,%1\n\t" \ + " jmp 3b\n\t" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 4\n" \ + " .long 1b,4b\n" \ + " .long 2b,4b\n" \ + ".previous" \ + : "=r" (ptr), "=r" (base), "=q" (__res), \ + "=r" (err) \ + : "0" (ptr), "1" (base), "2" (0)); \ + if (err) \ + return_to_32bit(regs, VM86_UNKNOWN); \ + __res; \ + }) + +#define popl(base, ptr, regs) \ + ({ \ + unsigned long __res; \ + unsigned int err; \ + __asm__ __volatile__( \ + "1:movb 0(%1,%0),%b2\n\t" \ + "incw %w0\n\t" \ + "2:movb 0(%1,%0),%h2\n\t" \ + "incw %w0\n\t" \ + "rorl $16,%2\n\t" \ + "3:movb 0(%1,%0),%b2\n\t" \ + "incw %w0\n\t" \ + "4:movb 0(%1,%0),%h2\n\t" \ + "incw %w0\n\t" \ + "rorl $16,%2\n\t" \ + "xor %3,%3\n\t" \ + "5:\n" \ + ".section .fixup,\"ax\"\n\t" \ + "6: movl $1,%1\n\t" \ + " jmp 5b\n\t" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n" \ + " .align 4\n" \ + " .long 1b,6b\n" \ + " .long 2b,6b\n" \ + " .long 3b,6b\n" \ + " .long 4b,6b\n" \ + ".previous" \ + : "=r" (ptr), "=r" (base), "=q" (__res), \ + "=r" (err) \ + : "0" (ptr), "1" (base), "2" (0)); \ + if (err) \ + return_to_32bit(regs, VM86_UNKNOWN); \ + __res; \ + }) static void do_int(struct kernel_vm86_regs *regs, int i, unsigned char * ssp, unsigned long sp) { @@ -414,9 +516,9 @@ goto cannot_handle; if ((segoffs >> 16) == BIOSSEG) goto cannot_handle; - pushw(ssp, sp, get_vflags(regs)); - pushw(ssp, sp, regs->cs); - pushw(ssp, sp, IP(regs)); + pushw(ssp, sp, get_vflags(regs), regs); + pushw(ssp, sp, regs->cs, regs); + pushw(ssp, sp, IP(regs), regs); regs->cs = segoffs >> 16; SP(regs) -= 6; IP(regs) = segoffs & 0xffff; @@ -460,7 +562,7 @@ #define CHECK_IF_IN_TRAP \ if (VMPI.vm86dbg_active && VMPI.vm86dbg_TFpendig) \ - pushw(ssp,sp,popw(ssp,sp) | TF_MASK); + pushw(ssp,sp,popw(ssp,sp, regs) | TF_MASK, regs); #define VM86_FAULT_RETURN \ if (VMPI.force_return_for_pic && (VEFLAGS & IF_MASK)) \ return_to_32bit(regs, VM86_PICRETURN); \ @@ -471,17 +573,17 @@ sp = SP(regs); ip = IP(regs); - switch (popb(csp, ip)) { + switch (popb(csp, ip, regs)) { /* operand size override */ case 0x66: - switch (popb(csp, ip)) { + switch (popb(csp, ip, regs)) { /* pushfd */ case 0x9c: SP(regs) -= 4; IP(regs) += 2; - pushl(ssp, sp, get_vflags(regs)); + pushl(ssp, sp, get_vflags(regs), regs); VM86_FAULT_RETURN; /* popfd */ @@ -489,16 +591,16 @@ SP(regs) += 4; IP(regs) += 2; CHECK_IF_IN_TRAP - set_vflags_long(popl(ssp, sp), regs); + set_vflags_long(popl(ssp, sp, regs), regs); VM86_FAULT_RETURN; /* iretd */ case 0xcf: SP(regs) += 12; - IP(regs) = (unsigned short)popl(ssp, sp); - regs->cs = (unsigned short)popl(ssp, sp); + IP(regs) = (unsigned short)popl(ssp, sp, regs); + regs->cs = (unsigned short)popl(ssp, sp, regs); CHECK_IF_IN_TRAP - set_vflags_long(popl(ssp, sp), regs); + set_vflags_long(popl(ssp, sp, regs), regs); VM86_FAULT_RETURN; /* need this to avoid a fallthrough */ default: @@ -509,7 +611,7 @@ case 0x9c: SP(regs) -= 2; IP(regs)++; - pushw(ssp, sp, get_vflags(regs)); + pushw(ssp, sp, get_vflags(regs), regs); VM86_FAULT_RETURN; /* popf */ @@ -517,12 +619,12 @@ SP(regs) += 2; IP(regs)++; CHECK_IF_IN_TRAP - set_vflags_short(popw(ssp, sp), regs); + set_vflags_short(popw(ssp, sp, regs), regs); VM86_FAULT_RETURN; /* int xx */ case 0xcd: { - int intno=popb(csp, ip); + int intno=popb(csp, ip, regs); IP(regs) += 2; if (VMPI.vm86dbg_active) { if ( (1 << (intno &7)) & VMPI.vm86dbg_intxxtab[intno >> 3] ) @@ -535,10 +637,10 @@ /* iret */ case 0xcf: SP(regs) += 6; - IP(regs) = popw(ssp, sp); - regs->cs = popw(ssp, sp); + IP(regs) = popw(ssp, sp, regs); + regs->cs = popw(ssp, sp, regs); CHECK_IF_IN_TRAP - set_vflags_short(popw(ssp, sp), regs); + set_vflags_short(popw(ssp, sp, regs), regs); VM86_FAULT_RETURN; /* cli */ diff -u --new-file --recursive v2.2.20/arch/i386/mm/init.c linux/arch/i386/mm/init.c --- v2.2.20/arch/i386/mm/init.c Mon May 20 16:11:41 2002 +++ linux/arch/i386/mm/init.c Mon May 20 16:32:34 2002 @@ -185,33 +185,8 @@ extern char _text, _etext, _edata, __bss_start, _end; extern char __init_begin, __init_end; -#define X86_CR4_VME 0x0001 /* enable vm86 extensions */ -#define X86_CR4_PVI 0x0002 /* virtual interrupts flag enable */ -#define X86_CR4_TSD 0x0004 /* disable time stamp at ipl 3 */ -#define X86_CR4_DE 0x0008 /* enable debugging extensions */ -#define X86_CR4_PSE 0x0010 /* enable page size extensions */ -#define X86_CR4_PAE 0x0020 /* enable physical address extensions */ -#define X86_CR4_MCE 0x0040 /* Machine check enable */ -#define X86_CR4_PGE 0x0080 /* enable global pages */ -#define X86_CR4_PCE 0x0100 /* enable performance counters at ipl 3 */ - -/* - * Save the cr4 feature set we're using (ie - * Pentium 4MB enable and PPro Global page - * enable), so that any CPU's that boot up - * after us can get the correct flags. - */ unsigned long mmu_cr4_features __initdata = 0; -static inline void set_in_cr4(unsigned long mask) -{ - mmu_cr4_features |= mask; - __asm__("movl %%cr4,%%eax\n\t" - "orl %0,%%eax\n\t" - "movl %%eax,%%cr4\n" - : : "irg" (mask) - :"ax"); -} /* * allocate page table(s) for compile-time fixed mappings diff -u --new-file --recursive v2.2.20/arch/ppc/kernel/ppc_ksyms.c linux/arch/ppc/kernel/ppc_ksyms.c --- v2.2.20/arch/ppc/kernel/ppc_ksyms.c Mon May 20 16:11:43 2002 +++ linux/arch/ppc/kernel/ppc_ksyms.c Mon May 20 16:32:34 2002 @@ -73,7 +73,7 @@ EXPORT_SYMBOL(isa_mem_base); EXPORT_SYMBOL(pci_dram_offset); EXPORT_SYMBOL(ISA_DMA_THRESHOLD); -EXPORT_SYMBOL(DMA_MODE_READ); +EXPORT_SYMBOL_NOVERS(DMA_MODE_READ); EXPORT_SYMBOL(DMA_MODE_WRITE); #if defined(CONFIG_PREP) || defined(CONFIG_ALL_PPC) EXPORT_SYMBOL(_prep_type); diff -u --new-file --recursive v2.2.20/arch/s390/defconfig linux/arch/s390/defconfig --- v2.2.20/arch/s390/defconfig Mon May 20 16:11:51 2002 +++ linux/arch/s390/defconfig Mon May 20 16:32:34 2002 @@ -63,6 +63,7 @@ # # S390 Network devices # +CONFIG_LCS=m CONFIG_CTC=y CONFIG_IUCV=y # CONFIG_DUMMY is not set diff -u --new-file --recursive v2.2.20/arch/s390/kernel/debug.c linux/arch/s390/kernel/debug.c --- v2.2.20/arch/s390/kernel/debug.c Mon May 20 16:11:51 2002 +++ linux/arch/s390/kernel/debug.c Mon May 20 16:32:34 2002 @@ -83,6 +83,9 @@ static int debug_input_level_fn(debug_info_t * id, struct debug_view *view, struct file *file, const char *user_buf, size_t user_buf_size, loff_t * offset); +static int debug_input_flush_fn(debug_info_t * id, struct debug_view *view, + struct file *file, const char *user_buf, + size_t user_buf_size, loff_t * offset); static int debug_hex_ascii_format_fn(debug_info_t * id, struct debug_view *view, char *out_buf, const char *in_buf); static int debug_raw_format_fn(debug_info_t * id, @@ -123,6 +126,15 @@ NULL }; +struct debug_view debug_flush_view = { + "flush", + NULL, + NULL, + NULL, + &debug_input_flush_fn, + NULL +}; + struct debug_view debug_sprintf_view = { "sprintf", NULL, @@ -664,6 +676,7 @@ if(!rc) goto out; debug_register_view(rc, &debug_level_view); + debug_register_view(rc, &debug_flush_view); printk(KERN_INFO "debug: reserved %d areas of %d pages for debugging %s\n", nr_areas, 1 << page_order, rc->name); @@ -1029,6 +1042,73 @@ return rc; /* number of input characters */ } + +/* + * flushes debug areas + */ + +void debug_flush(debug_info_t* id, int area) +{ + unsigned long flags; + int i; + + if(!id) + return; + spin_lock_irqsave(&id->lock,flags); + if(area == DEBUG_FLUSH_ALL){ + id->active_area = 0; + memset(id->active_entry, 0, id->nr_areas * sizeof(int)); + for (i = 0; i < id->nr_areas; i++) + memset(id->areas[i], 0, PAGE_SIZE << id->page_order); + printk(KERN_INFO "debug: %s: all areas flushed\n",id->name); + } else if(area >= 0 && area < id->nr_areas) { + id->active_entry[area] = 0; + memset(id->areas[area], 0, PAGE_SIZE << id->page_order); + printk(KERN_INFO + "debug: %s: area %i has been flushed\n", + id->name, area); + } else { + printk(KERN_INFO + "debug: %s: area %i cannot be flushed (range: %i - %i)\n", + id->name, area, 0, id->nr_areas-1); + } + spin_unlock_irqrestore(&id->lock,flags); +} + +/* + * view function: flushes debug areas + */ + +static int debug_input_flush_fn(debug_info_t * id, struct debug_view *view, + struct file *file, const char *user_buf, + size_t in_buf_size, loff_t * offset) +{ + char input_buf[1]; + int rc = in_buf_size; + + if (*offset != 0) + goto out; + if (copy_from_user(input_buf, user_buf, 1)){ + rc = -EFAULT; + goto out; + } + if(input_buf[0] == '-') { + debug_flush(id, DEBUG_FLUSH_ALL); + goto out; + } + if (isdigit(input_buf[0])) { + int area = ((int) input_buf[0] - (int) '0'); + debug_flush(id, area); + goto out; + } + + printk(KERN_INFO "debug: area `%c` is not valid\n", input_buf[0]); + + out: + *offset += in_buf_size; + return rc; /* number of input characters */ +} + /* * prints debug header in raw format */ diff -u --new-file --recursive v2.2.20/arch/s390/kernel/s390io.c linux/arch/s390/kernel/s390io.c --- v2.2.20/arch/s390/kernel/s390io.c Mon May 20 16:11:51 2002 +++ linux/arch/s390/kernel/s390io.c Mon May 20 16:32:34 2002 @@ -2280,9 +2280,8 @@ ioinfo[irq]->stctl |= stctl; ending_status = ( stctl & SCSW_STCTL_SEC_STATUS ) - || ( stctl == (SCSW_STCTL_ALERT_STATUS | SCSW_STCTL_STATUS_PEND) ) - || ( (fctl == SCSW_FCTL_HALT_FUNC) && (stctl == SCSW_STCTL_STATUS_PEND) ) - || ( (fctl == SCSW_FCTL_CLEAR_FUNC) && (stctl == SCSW_STCTL_STATUS_PEND) ); + || ( stctl == (SCSW_STCTL_ALERT_STATUS | SCSW_STCTL_STATUS_PEND) ) + || ( stctl == SCSW_STCTL_STATUS_PEND); /* * Check for unsolicited interrupts - for debug purposes only @@ -5109,6 +5108,18 @@ { if ( mpath ) { + /* + * We now try single path mode. + * Note we must not issue the suspend + * multipath reconnect, or we will get + * a command reject by tapes. + */ + + spid_ccw[0].cmd_code = CCW_CMD_SET_PGID; + spid_ccw[0].cda = (__u32)virt_to_phys (pgid); + spid_ccw[0].count = sizeof (pgid_t); + spid_ccw[0].flags = CCW_FLAG_SLI; + pgid->inf.fc = SPID_FUNC_SINGLE_PATH | SPID_FUNC_ESTABLISH; mpath = 0; diff -u --new-file --recursive v2.2.20/arch/s390/tools/dasdfmt/dasdfmt.8 linux/arch/s390/tools/dasdfmt/dasdfmt.8 --- v2.2.20/arch/s390/tools/dasdfmt/dasdfmt.8 Mon May 20 16:11:51 2002 +++ linux/arch/s390/tools/dasdfmt/dasdfmt.8 Mon May 20 16:32:34 2002 @@ -32,6 +32,11 @@ Print version number and exit. .TP +\fB-F\fR +Formats the device without checking, if the device is mounted or used +as swap space. + +.TP \fB-b\fR \fIblockSize\fR Specify blocksize to be used. \fIblocksize\fR must be a positive integer and always be a power of two. Due due some limitations in the driver, diff -u --new-file --recursive v2.2.20/arch/s390/tools/dasdfmt/dasdfmt.c linux/arch/s390/tools/dasdfmt/dasdfmt.c --- v2.2.20/arch/s390/tools/dasdfmt/dasdfmt.c Mon May 20 16:11:51 2002 +++ linux/arch/s390/tools/dasdfmt/dasdfmt.c Mon May 20 16:32:34 2002 @@ -158,15 +158,16 @@ exit_usage(int exitcode) { #ifdef RANGE_FORMATTING - printf("Usage: %s [-htvyLV] [-l